From sabre at nondot.org Mon Nov 15 00:01:10 2010 From: sabre at nondot.org (Chris Lattner) Date: Mon, 15 Nov 2010 06:01:10 -0000 Subject: [llvm-commits] [llvm] r119124 - in /llvm/trunk/lib/Target/PowerPC: InstPrinter/PPCInstPrinter.h PPCInstrInfo.td Message-ID: <20101115060110.36CCF2A6C12C@llvm.org> Author: lattner Date: Mon Nov 15 00:01:10 2010 New Revision: 119124 URL: http://llvm.org/viewvc/llvm-project?rev=119124&view=rev Log: eliminate a now-unneeded operand printer. Modified: llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Modified: llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h?rev=119124&r1=119123&r2=119124&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h (original) +++ llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h Mon Nov 15 00:01:10 2010 @@ -52,9 +52,6 @@ void printU16ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); void printS16X4ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); void printBranchOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); - void printCallOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - printOperand(MI, OpNo, O); - } void printAbsAddrOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); void printcrbitm(const MCInst *MI, unsigned OpNo, raw_ostream &O); Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td?rev=119124&r1=119123&r2=119124&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td (original) +++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Mon Nov 15 00:01:10 2010 @@ -290,7 +290,6 @@ let PrintMethod = "printBranchOperand"; } def calltarget : Operand { - let PrintMethod = "printCallOperand"; let EncoderMethod = "getCallTargetEncoding"; } def aaddr : Operand { From sabre at nondot.org Mon Nov 15 00:09:35 2010 From: sabre at nondot.org (Chris Lattner) Date: Mon, 15 Nov 2010 06:09:35 -0000 Subject: [llvm-commits] [llvm] r119125 - in /llvm/trunk/lib/Target/PowerPC: PPCCodeEmitter.cpp PPCInstrInfo.td PPCMCCodeEmitter.cpp Message-ID: <20101115060935.7941E2A6C12C@llvm.org> Author: lattner Date: Mon Nov 15 00:09:35 2010 New Revision: 119125 URL: http://llvm.org/viewvc/llvm-project?rev=119125&view=rev Log: change direct branches to encode with the same encoding method as direct calls. Change conditional branches to encode with their own method, simplifying the JIT encoder and making room for adding an mc fixup. Modified: llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp Modified: llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp?rev=119125&r1=119124&r2=119125&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp Mon Nov 15 00:09:35 2010 @@ -61,7 +61,8 @@ const MachineOperand &MO) const; unsigned get_crbitm_encoding(const MachineInstr &MI, unsigned OpNo) const; - unsigned getCallTargetEncoding(const MachineInstr &MI, unsigned OpNo) const; + unsigned getDirectBrEncoding(const MachineInstr &MI, unsigned OpNo) const; + unsigned getCondBrEncoding(const MachineInstr &MI, unsigned OpNo) const; const char *getPassName() const { return "PowerPC Machine Code Emitter"; } @@ -159,8 +160,8 @@ RelocID, MO.getIndex(), 0); } -unsigned PPCCodeEmitter::getCallTargetEncoding(const MachineInstr &MI, - unsigned OpNo) const { +unsigned PPCCodeEmitter::getDirectBrEncoding(const MachineInstr &MI, + unsigned OpNo) const { const MachineOperand &MO = MI.getOperand(OpNo); if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO); @@ -168,6 +169,13 @@ return 0; } +unsigned PPCCodeEmitter::getCondBrEncoding(const MachineInstr &MI, + unsigned OpNo) const { + const MachineOperand &MO = MI.getOperand(OpNo); + MCE.addRelocation(GetRelocation(MO, PPC::reloc_pcrel_bcx)); + return 0; +} + unsigned PPCCodeEmitter::getMachineOpValue(const MachineInstr &MI, const MachineOperand &MO) const { @@ -239,17 +247,6 @@ R.setConstantVal(-(intptr_t)MovePCtoLROffset - 4); } MCE.addRelocation(R); - - } else if (MO.isMBB()) { - unsigned Reloc = 0; - unsigned Opcode = MI.getOpcode(); - if (Opcode == PPC::B) - Reloc = PPC::reloc_pcrel_bx; - else // BCC instruction - Reloc = PPC::reloc_pcrel_bcx; - - MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(), - Reloc, MO.getMBB())); } else { #ifndef NDEBUG errs() << "ERROR: Unknown type of MachineOperand: " << MO << "\n"; Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td?rev=119125&r1=119124&r2=119125&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td (original) +++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Mon Nov 15 00:09:35 2010 @@ -286,11 +286,15 @@ def s16immX4 : Operand { // Multiply imm by 4 before printing. let PrintMethod = "printS16X4ImmOperand"; } -def target : Operand { +def directbrtarget : Operand { let PrintMethod = "printBranchOperand"; + let EncoderMethod = "getDirectBrEncoding"; +} +def condbrtarget : Operand { + let EncoderMethod = "getCondBrEncoding"; } def calltarget : Operand { - let EncoderMethod = "getCallTargetEncoding"; + let EncoderMethod = "getDirectBrEncoding"; } def aaddr : Operand { let PrintMethod = "printAbsAddrOperand"; @@ -409,7 +413,7 @@ let isBranch = 1, isTerminator = 1, hasCtrlDep = 1, PPC970_Unit = 7 in { let isBarrier = 1 in { - def B : IForm<18, 0, 0, (outs), (ins target:$dst), + def B : IForm<18, 0, 0, (outs), (ins directbrtarget:$dst), "b $dst", BrB, [(br bb:$dst)]>; } @@ -417,7 +421,7 @@ // BCC represents an arbitrary conditional branch on a predicate. // FIXME: should be able to write a pattern for PPCcondbranch, but can't use // a two-value operand where a dag node expects two operands. :( - def BCC : BForm<16, 0, 0, (outs), (ins pred:$cond, target:$dst), + def BCC : BForm<16, 0, 0, (outs), (ins pred:$cond, condbrtarget:$dst), "b${cond:cc} ${cond:reg}, $dst" /*[(PPCcondbranch CRRC:$crS, imm:$opc, bb:$dst)]*/>; } Modified: llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp?rev=119125&r1=119124&r2=119125&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp Mon Nov 15 00:09:35 2010 @@ -58,9 +58,12 @@ return Infos[Kind - FirstTargetFixupKind]; } - unsigned getCallTargetEncoding(const MCInst &MI, unsigned OpNo, - SmallVectorImpl &Fixups) const; - + unsigned getDirectBrEncoding(const MCInst &MI, unsigned OpNo, + SmallVectorImpl &Fixups) const; + + unsigned getCondBrEncoding(const MCInst &MI, unsigned OpNo, + SmallVectorImpl &Fixups) const; + unsigned get_crbitm_encoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl &Fixups) const; @@ -96,8 +99,8 @@ } unsigned PPCMCCodeEmitter:: -getCallTargetEncoding(const MCInst &MI, unsigned OpNo, - SmallVectorImpl &Fixups) const { +getDirectBrEncoding(const MCInst &MI, unsigned OpNo, + SmallVectorImpl &Fixups) const { const MCOperand &MO = MI.getOperand(OpNo); if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups); @@ -107,6 +110,17 @@ return 0; } +unsigned PPCMCCodeEmitter::getCondBrEncoding(const MCInst &MI, unsigned OpNo, + SmallVectorImpl &Fixups) const { + const MCOperand &MO = MI.getOperand(OpNo); + if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups); + + + + return 0; +} + + unsigned PPCMCCodeEmitter:: get_crbitm_encoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl &Fixups) const { From sabre at nondot.org Mon Nov 15 00:12:22 2010 From: sabre at nondot.org (Chris Lattner) Date: Mon, 15 Nov 2010 06:12:22 -0000 Subject: [llvm-commits] [llvm] r119126 - in /llvm/trunk/lib/Target/PowerPC: PPCFixupKinds.h PPCMCCodeEmitter.cpp Message-ID: <20101115061222.ED0EB2A6C12C@llvm.org> Author: lattner Date: Mon Nov 15 00:12:22 2010 New Revision: 119126 URL: http://llvm.org/viewvc/llvm-project?rev=119126&view=rev Log: add a fixup for conditional branches, giving us output like this: beq cr0, LBB0_4 ; encoding: [0x41,0x82,A,0bAAAAAA00] ; fixup A - offset: 0, value: LBB0_4, kind: fixup_ppc_brcond14 Modified: llvm/trunk/lib/Target/PowerPC/PPCFixupKinds.h llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp Modified: llvm/trunk/lib/Target/PowerPC/PPCFixupKinds.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCFixupKinds.h?rev=119126&r1=119125&r2=119126&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCFixupKinds.h (original) +++ llvm/trunk/lib/Target/PowerPC/PPCFixupKinds.h Mon Nov 15 00:12:22 2010 @@ -15,9 +15,14 @@ namespace llvm { namespace PPC { enum Fixups { - // fixup_ppc_br24 - 24-bit PC relative relocation for calls like 'bl'. + // fixup_ppc_br24 - 24-bit PC relative relocation for direct branches like 'b' + // and 'bl'. fixup_ppc_br24 = FirstTargetFixupKind, + /// fixup_ppc_brcond14 - 14-bit PC relative relocation for conditional + /// branches. + fixup_ppc_brcond14, + // Marker LastTargetFixupKind, NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind Modified: llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp?rev=119126&r1=119125&r2=119126&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp Mon Nov 15 00:12:22 2010 @@ -43,11 +43,8 @@ const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const { const static MCFixupKindInfo Infos[] = { // name offset bits flags - { "fixup_ppc_br24", 6, 24, MCFixupKindInfo::FKF_IsPCRel } -#if 0 - { "fixup_arm_vfp_pcrel_12", 3, 8, MCFixupKindInfo::FKF_IsPCRel }, - { "fixup_arm_branch", 1, 24, MCFixupKindInfo::FKF_IsPCRel }, -#endif + { "fixup_ppc_br24", 6, 24, MCFixupKindInfo::FKF_IsPCRel }, + { "fixup_ppc_brcond14", 16, 14, MCFixupKindInfo::FKF_IsPCRel } }; if (Kind < FirstTargetFixupKind) @@ -115,8 +112,9 @@ const MCOperand &MO = MI.getOperand(OpNo); if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups); - - + // Add a fixup for the branch target. + Fixups.push_back(MCFixup::Create(0, MO.getExpr(), + (MCFixupKind)PPC::fixup_ppc_brcond14)); return 0; } From sabre at nondot.org Mon Nov 15 00:33:39 2010 From: sabre at nondot.org (Chris Lattner) Date: Mon, 15 Nov 2010 06:33:39 -0000 Subject: [llvm-commits] [llvm] r119127 - in /llvm/trunk/lib/Target/PowerPC: PPCCodeEmitter.cpp PPCFixupKinds.h PPCInstr64Bit.td PPCInstrInfo.td PPCMCCodeEmitter.cpp Message-ID: <20101115063339.5AD6F2A6C12C@llvm.org> Author: lattner Date: Mon Nov 15 00:33:39 2010 New Revision: 119127 URL: http://llvm.org/viewvc/llvm-project?rev=119127&view=rev Log: implement the start of support for lo16 and ha16, allowing us to get stuff like: lis r4, ha16(__ZL4init) ; encoding: [0x3c,0x80,A,A] ; fixup A - offset: 0, value: ha16(__ZL4init), kind: fixup_ppc_ha16 Modified: llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp llvm/trunk/lib/Target/PowerPC/PPCFixupKinds.h llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp Modified: llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp?rev=119127&r1=119126&r2=119127&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp Mon Nov 15 00:33:39 2010 @@ -63,7 +63,11 @@ unsigned get_crbitm_encoding(const MachineInstr &MI, unsigned OpNo) const; unsigned getDirectBrEncoding(const MachineInstr &MI, unsigned OpNo) const; unsigned getCondBrEncoding(const MachineInstr &MI, unsigned OpNo) const; - + + unsigned getHA16Encoding(const MachineInstr &MI, unsigned OpNo) const; + unsigned getLO16Encoding(const MachineInstr &MI, unsigned OpNo) const; + unsigned getLO14Encoding(const MachineInstr &MI, unsigned OpNo) const; + const char *getPassName() const { return "PowerPC Machine Code Emitter"; } /// runOnMachineFunction - emits the given MachineFunction to memory @@ -140,16 +144,27 @@ MachineRelocation PPCCodeEmitter::GetRelocation(const MachineOperand &MO, unsigned RelocID) const { + // If in PIC mode, we need to encode the negated address of the + // 'movepctolr' into the unrelocated field. After relocation, we'll have + // &gv-&movepctolr-4 in the imm field. Once &movepctolr is added to the imm + // field, we get &gv. This doesn't happen for branch relocations, which are + // always implicitly pc relative. + intptr_t Cst = 0; + if (TM.getRelocationModel() == Reloc::PIC_) { + assert(MovePCtoLROffset && "MovePCtoLR not seen yet?"); + Cst = -(intptr_t)MovePCtoLROffset - 4; + } + if (MO.isGlobal()) return MachineRelocation::getGV(MCE.getCurrentPCOffset(), RelocID, - const_cast(MO.getGlobal()),0, - isa(MO.getGlobal())); + const_cast(MO.getGlobal()), + Cst, isa(MO.getGlobal())); if (MO.isSymbol()) return MachineRelocation::getExtSym(MCE.getCurrentPCOffset(), - RelocID, MO.getSymbolName(), 0); + RelocID, MO.getSymbolName(), Cst); if (MO.isCPI()) return MachineRelocation::getConstPool(MCE.getCurrentPCOffset(), - RelocID, MO.getIndex(), 0); + RelocID, MO.getIndex(), Cst); if (MO.isMBB()) MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(), @@ -157,7 +172,7 @@ assert(MO.isJTI()); return MachineRelocation::getJumpTable(MCE.getCurrentPCOffset(), - RelocID, MO.getIndex(), 0); + RelocID, MO.getIndex(), Cst); } unsigned PPCCodeEmitter::getDirectBrEncoding(const MachineInstr &MI, @@ -176,6 +191,33 @@ return 0; } +unsigned PPCCodeEmitter::getHA16Encoding(const MachineInstr &MI, + unsigned OpNo) const { + const MachineOperand &MO = MI.getOperand(OpNo); + if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO); + + MCE.addRelocation(GetRelocation(MO, PPC::reloc_absolute_high)); + return 0; +} + +unsigned PPCCodeEmitter::getLO16Encoding(const MachineInstr &MI, + unsigned OpNo) const { + const MachineOperand &MO = MI.getOperand(OpNo); + if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO); + + MCE.addRelocation(GetRelocation(MO, PPC::reloc_absolute_low)); + return 0; +} + +unsigned PPCCodeEmitter::getLO14Encoding(const MachineInstr &MI, + unsigned OpNo) const { + const MachineOperand &MO = MI.getOperand(OpNo); + if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO); + + MCE.addRelocation(GetRelocation(MO, PPC::reloc_absolute_low_ix)); + return 0; +} + unsigned PPCCodeEmitter::getMachineOpValue(const MachineInstr &MI, const MachineOperand &MO) const { @@ -194,15 +236,6 @@ "MovePCtoLR not seen yet?"); switch (MI.getOpcode()) { default: MI.dump(); llvm_unreachable("Unknown instruction for relocation!"); - case PPC::LIS: - case PPC::LIS8: - case PPC::ADDIS: - case PPC::ADDIS8: - Reloc = PPC::reloc_absolute_high; // Pointer to symbol - break; - case PPC::LI: - case PPC::LI8: - case PPC::LA: // Loads. case PPC::LBZ: case PPC::LBZ8: @@ -235,18 +268,7 @@ break; } - MachineRelocation R = GetRelocation(MO, Reloc); - - // If in PIC mode, we need to encode the negated address of the - // 'movepctolr' into the unrelocated field. After relocation, we'll have - // &gv-&movepctolr-4 in the imm field. Once &movepctolr is added to the imm - // field, we get &gv. This doesn't happen for branch relocations, which are - // always implicitly pc relative. - if (TM.getRelocationModel() == Reloc::PIC_) { - assert(MovePCtoLROffset && "MovePCtoLR not seen yet?"); - R.setConstantVal(-(intptr_t)MovePCtoLROffset - 4); - } - MCE.addRelocation(R); + MCE.addRelocation(GetRelocation(MO, Reloc)); } else { #ifndef NDEBUG errs() << "ERROR: Unknown type of MachineOperand: " << MO << "\n"; Modified: llvm/trunk/lib/Target/PowerPC/PPCFixupKinds.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCFixupKinds.h?rev=119127&r1=119126&r2=119127&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCFixupKinds.h (original) +++ llvm/trunk/lib/Target/PowerPC/PPCFixupKinds.h Mon Nov 15 00:33:39 2010 @@ -23,6 +23,18 @@ /// branches. fixup_ppc_brcond14, + /// fixup_ppc_lo16 - A 16-bit fixup corresponding to lo16(_foo) for instrs + /// like 'li'. + fixup_ppc_lo16, + + /// fixup_ppc_ha16 - A 16-bit fixup corresponding to ha16(_foo) for instrs + /// like 'lis'. + fixup_ppc_ha16, + + /// fixup_ppc_lo14 - A 14-bit fixup corresponding to lo16(_foo) for instrs + /// like 'std'. + fixup_ppc_lo14, + // Marker LastTargetFixupKind, NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind Modified: llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td?rev=119127&r1=119126&r2=119127&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td (original) +++ llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td Mon Nov 15 00:33:39 2010 @@ -23,9 +23,11 @@ } def symbolHi64 : Operand { let PrintMethod = "printSymbolHi"; + let EncoderMethod = "getHA16Encoding"; } def symbolLo64 : Operand { let PrintMethod = "printSymbolLo"; + let EncoderMethod = "getLO16Encoding"; } //===----------------------------------------------------------------------===// Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td?rev=119127&r1=119126&r2=119127&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td (original) +++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Mon Nov 15 00:33:39 2010 @@ -302,9 +302,11 @@ def piclabel: Operand {} def symbolHi: Operand { let PrintMethod = "printSymbolHi"; + let EncoderMethod = "getHA16Encoding"; } def symbolLo: Operand { let PrintMethod = "printSymbolLo"; + let EncoderMethod = "getLO16Encoding"; } def crbitm: Operand { let PrintMethod = "printcrbitm"; Modified: llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp?rev=119127&r1=119126&r2=119127&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp Mon Nov 15 00:33:39 2010 @@ -44,7 +44,10 @@ const static MCFixupKindInfo Infos[] = { // name offset bits flags { "fixup_ppc_br24", 6, 24, MCFixupKindInfo::FKF_IsPCRel }, - { "fixup_ppc_brcond14", 16, 14, MCFixupKindInfo::FKF_IsPCRel } + { "fixup_ppc_brcond14", 16, 14, MCFixupKindInfo::FKF_IsPCRel }, + { "fixup_ppc_lo16", 16, 16, 0 }, + { "fixup_ppc_ha16", 16, 16, 0 }, + { "fixup_ppc_lo14", 16, 14, 0 } }; if (Kind < FirstTargetFixupKind) @@ -57,10 +60,14 @@ unsigned getDirectBrEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl &Fixups) const; - unsigned getCondBrEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl &Fixups) const; - + unsigned getHA16Encoding(const MCInst &MI, unsigned OpNo, + SmallVectorImpl &Fixups) const; + unsigned getLO16Encoding(const MCInst &MI, unsigned OpNo, + SmallVectorImpl &Fixups) const; + unsigned getLO14Encoding(const MCInst &MI, unsigned OpNo, + SmallVectorImpl &Fixups) const; unsigned get_crbitm_encoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl &Fixups) const; @@ -118,6 +125,39 @@ return 0; } +unsigned PPCMCCodeEmitter::getHA16Encoding(const MCInst &MI, unsigned OpNo, + SmallVectorImpl &Fixups) const { + const MCOperand &MO = MI.getOperand(OpNo); + if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups); + + // Add a fixup for the branch target. + Fixups.push_back(MCFixup::Create(0, MO.getExpr(), + (MCFixupKind)PPC::fixup_ppc_ha16)); + return 0; +} + +unsigned PPCMCCodeEmitter::getLO16Encoding(const MCInst &MI, unsigned OpNo, + SmallVectorImpl &Fixups) const { + const MCOperand &MO = MI.getOperand(OpNo); + if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups); + + // Add a fixup for the branch target. + Fixups.push_back(MCFixup::Create(0, MO.getExpr(), + (MCFixupKind)PPC::fixup_ppc_lo16)); + return 0; +} + +unsigned PPCMCCodeEmitter::getLO14Encoding(const MCInst &MI, unsigned OpNo, + SmallVectorImpl &Fixups) const { + const MCOperand &MO = MI.getOperand(OpNo); + if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups); + + // Add a fixup for the branch target. + Fixups.push_back(MCFixup::Create(0, MO.getExpr(), + (MCFixupKind)PPC::fixup_ppc_lo14)); + return 0; +} + unsigned PPCMCCodeEmitter:: get_crbitm_encoding(const MCInst &MI, unsigned OpNo, From sabre at nondot.org Mon Nov 15 00:42:13 2010 From: sabre at nondot.org (Chris Lattner) Date: Mon, 15 Nov 2010 06:42:13 -0000 Subject: [llvm-commits] [llvm] r119128 - /llvm/trunk/utils/TableGen/CodeEmitterGen.cpp Message-ID: <20101115064213.4DAD52A6C12C@llvm.org> Author: lattner Date: Mon Nov 15 00:42:13 2010 New Revision: 119128 URL: http://llvm.org/viewvc/llvm-project?rev=119128&view=rev Log: reduce nesting and minor cleanups, no functionality change. Modified: llvm/trunk/utils/TableGen/CodeEmitterGen.cpp Modified: llvm/trunk/utils/TableGen/CodeEmitterGen.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeEmitterGen.cpp?rev=119128&r1=119127&r2=119128&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/CodeEmitterGen.cpp (original) +++ llvm/trunk/utils/TableGen/CodeEmitterGen.cpp Mon Nov 15 00:42:13 2010 @@ -62,13 +62,10 @@ // return the variable bit position. Otherwise return -1. int CodeEmitterGen::getVariableBit(const std::string &VarName, BitsInit *BI, int bit) { - if (VarBitInit *VBI = dynamic_cast(BI->getBit(bit))) { - TypedInit *TI = VBI->getVariable(); - - if (VarInit *VI = dynamic_cast(TI)) { - if (VI->getName() == VarName) return VBI->getBitNum(); - } - } + if (VarBitInit *VBI = dynamic_cast(BI->getBit(bit))) + if (VarInit *VI = dynamic_cast(VBI->getVariable())) + if (VI->getName() == VarName) + return VBI->getBitNum(); return -1; } @@ -141,91 +138,95 @@ // operands to the instruction. unsigned NumberedOp = 0; for (unsigned i = 0, e = Vals.size(); i != e; ++i) { - if (!Vals[i].getPrefix() && !Vals[i].getValue()->isComplete()) { - // Is the operand continuous? If so, we can just mask and OR it in - // instead of doing it bit-by-bit, saving a lot in runtime cost. - const std::string &VarName = Vals[i].getName(); - bool gotOp = false; + // Ignore fixed fields. + if (Vals[i].getPrefix() || Vals[i].getValue()->isComplete()) + continue; + + // Is the operand continuous? If so, we can just mask and OR it in + // instead of doing it bit-by-bit, saving a lot in runtime cost. + const std::string &VarName = Vals[i].getName(); + bool gotOp = false; + + for (int bit = BI->getNumBits()-1; bit >= 0; ) { + int varBit = getVariableBit(VarName, BI, bit); + + // If this bit isn't from a variable, skip it. + if (varBit == -1) { + --bit; + continue; + } - for (int bit = BI->getNumBits()-1; bit >= 0; ) { - int varBit = getVariableBit(VarName, BI, bit); + int beginInstBit = bit; + int beginVarBit = varBit; + int N = 1; + + for (--bit; bit >= 0;) { + varBit = getVariableBit(VarName, BI, bit); + if (varBit == -1 || varBit != (beginVarBit - N)) break; + ++N; + --bit; + } - if (varBit == -1) { - --bit; + if (!gotOp) { + // If the operand matches by name, reference according to that + // operand number. Non-matching operands are assumed to be in + // order. + unsigned OpIdx; + if (CGI.Operands.hasOperandNamed(VarName, OpIdx)) { + // Get the machine operand number for the indicated operand. + OpIdx = CGI.Operands[OpIdx].MIOperandNo; + assert (!CGI.Operands.isFlatOperandNotEmitted(OpIdx) && + "Explicitly used operand also marked as not emitted!"); } else { - int beginInstBit = bit; - int beginVarBit = varBit; - int N = 1; - - for (--bit; bit >= 0;) { - varBit = getVariableBit(VarName, BI, bit); - if (varBit == -1 || varBit != (beginVarBit - N)) break; - ++N; - --bit; - } - - if (!gotOp) { - // If the operand matches by name, reference according to that - // operand number. Non-matching operands are assumed to be in - // order. - unsigned OpIdx; - if (CGI.Operands.hasOperandNamed(VarName, OpIdx)) { - // Get the machine operand number for the indicated operand. - OpIdx = CGI.Operands[OpIdx].MIOperandNo; - assert (!CGI.Operands.isFlatOperandNotEmitted(OpIdx) && - "Explicitly used operand also marked as not emitted!"); - } else { - /// If this operand is not supposed to be emitted by the - /// generated emitter, skip it. - while (CGI.Operands.isFlatOperandNotEmitted(NumberedOp)) - ++NumberedOp; - OpIdx = NumberedOp++; - } - std::pair SO = - CGI.Operands.getSubOperandNumber(OpIdx); - std::string &EncoderMethodName = - CGI.Operands[SO.first].EncoderMethodName; - - // If the source operand has a custom encoder, use it. This will - // get the encoding for all of the suboperands. - if (!EncoderMethodName.empty()) { - // A custom encoder has all of the information for the - // sub-operands, if there are more than one, so only - // query the encoder once per source operand. - if (SO.second == 0) { - Case += " // op: " + VarName + "\n" - + " op = " + EncoderMethodName + "(MI, " - + utostr(OpIdx); - if (MCEmitter) - Case += ", Fixups"; - Case += ");\n"; - } - } else { - Case += " // op: " + VarName + "\n" - + " op = getMachineOpValue(MI, MI.getOperand(" - + utostr(OpIdx) + ")"; - if (MCEmitter) - Case += ", Fixups"; - Case += ");\n"; - } - gotOp = true; - } - - unsigned opMask = ~0U >> (32-N); - int opShift = beginVarBit - N + 1; - opMask <<= opShift; - opShift = beginInstBit - beginVarBit; - - if (opShift > 0) { - Case += " Value |= (op & " + utostr(opMask) + "U) << " - + itostr(opShift) + ";\n"; - } else if (opShift < 0) { - Case += " Value |= (op & " + utostr(opMask) + "U) >> " - + itostr(-opShift) + ";\n"; - } else { - Case += " Value |= op & " + utostr(opMask) + "U;\n"; + /// If this operand is not supposed to be emitted by the + /// generated emitter, skip it. + while (CGI.Operands.isFlatOperandNotEmitted(NumberedOp)) + ++NumberedOp; + OpIdx = NumberedOp++; + } + std::pair SO = + CGI.Operands.getSubOperandNumber(OpIdx); + std::string &EncoderMethodName = + CGI.Operands[SO.first].EncoderMethodName; + + // If the source operand has a custom encoder, use it. This will + // get the encoding for all of the suboperands. + if (!EncoderMethodName.empty()) { + // A custom encoder has all of the information for the + // sub-operands, if there are more than one, so only + // query the encoder once per source operand. + if (SO.second == 0) { + Case += " // op: " + VarName + "\n" + + " op = " + EncoderMethodName + "(MI, " + + utostr(OpIdx); + if (MCEmitter) + Case += ", Fixups"; + Case += ");\n"; } + } else { + Case += " // op: " + VarName + "\n" + + " op = getMachineOpValue(MI, MI.getOperand(" + + utostr(OpIdx) + ")"; + if (MCEmitter) + Case += ", Fixups"; + Case += ");\n"; } + gotOp = true; + } + + unsigned opMask = ~0U >> (32-N); + int opShift = beginVarBit - N + 1; + opMask <<= opShift; + opShift = beginInstBit - beginVarBit; + + if (opShift > 0) { + Case += " Value |= (op & " + utostr(opMask) + "U) << " + + itostr(opShift) + ";\n"; + } else if (opShift < 0) { + Case += " Value |= (op & " + utostr(opMask) + "U) >> " + + itostr(-opShift) + ";\n"; + } else { + Case += " Value |= op & " + utostr(opMask) + "U;\n"; } } } From sabre at nondot.org Mon Nov 15 00:59:17 2010 From: sabre at nondot.org (Chris Lattner) Date: Mon, 15 Nov 2010 06:59:17 -0000 Subject: [llvm-commits] [llvm] r119129 - in /llvm/trunk/utils/TableGen: CodeEmitterGen.cpp CodeEmitterGen.h Message-ID: <20101115065917.A86E12A6C12C@llvm.org> Author: lattner Date: Mon Nov 15 00:59:17 2010 New Revision: 119129 URL: http://llvm.org/viewvc/llvm-project?rev=119129&view=rev Log: split the giant encoder loop into two new helper functions. Modified: llvm/trunk/utils/TableGen/CodeEmitterGen.cpp llvm/trunk/utils/TableGen/CodeEmitterGen.h Modified: llvm/trunk/utils/TableGen/CodeEmitterGen.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeEmitterGen.cpp?rev=119129&r1=119128&r2=119129&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/CodeEmitterGen.cpp (original) +++ llvm/trunk/utils/TableGen/CodeEmitterGen.cpp Mon Nov 15 00:59:17 2010 @@ -61,7 +61,7 @@ // If the VarBitInit at position 'bit' matches the specified variable then // return the variable bit position. Otherwise return -1. int CodeEmitterGen::getVariableBit(const std::string &VarName, - BitsInit *BI, int bit) { + BitsInit *BI, int bit) { if (VarBitInit *VBI = dynamic_cast(BI->getBit(bit))) if (VarInit *VI = dynamic_cast(VBI->getVariable())) if (VI->getName() == VarName) @@ -70,6 +70,123 @@ return -1; } +void CodeEmitterGen:: +AddCodeToMergeInOperand(Record *R, BitsInit *BI, const std::string &VarName, + unsigned &NumberedOp, + std::string &Case, CodeGenTarget &Target) { + bool gotOp = false; + CodeGenInstruction &CGI = Target.getInstruction(R); + + for (int bit = BI->getNumBits()-1; bit >= 0; ) { + int varBit = getVariableBit(VarName, BI, bit); + + // If this bit isn't from a variable, skip it. + if (varBit == -1) { + --bit; + continue; + } + + // Figure out the consequtive range of bits covered by this operand, in + // order to generate better encoding code. + int beginInstBit = bit; + int beginVarBit = varBit; + int N = 1; + for (--bit; bit >= 0;) { + varBit = getVariableBit(VarName, BI, bit); + if (varBit == -1 || varBit != (beginVarBit - N)) break; + ++N; + --bit; + } + + if (!gotOp) { + // If the operand matches by name, reference according to that + // operand number. Non-matching operands are assumed to be in + // order. + unsigned OpIdx; + if (CGI.Operands.hasOperandNamed(VarName, OpIdx)) { + // Get the machine operand number for the indicated operand. + OpIdx = CGI.Operands[OpIdx].MIOperandNo; + assert(!CGI.Operands.isFlatOperandNotEmitted(OpIdx) && + "Explicitly used operand also marked as not emitted!"); + } else { + /// If this operand is not supposed to be emitted by the + /// generated emitter, skip it. + while (CGI.Operands.isFlatOperandNotEmitted(NumberedOp)) + ++NumberedOp; + OpIdx = NumberedOp++; + } + std::pair SO =CGI.Operands.getSubOperandNumber(OpIdx); + std::string &EncoderMethodName = CGI.Operands[SO.first].EncoderMethodName; + + // If the source operand has a custom encoder, use it. This will + // get the encoding for all of the suboperands. + if (!EncoderMethodName.empty()) { + // A custom encoder has all of the information for the + // sub-operands, if there are more than one, so only + // query the encoder once per source operand. + if (SO.second == 0) { + Case += " // op: " + VarName + "\n" + + " op = " + EncoderMethodName + "(MI, " + + utostr(OpIdx); + if (MCEmitter) + Case += ", Fixups"; + Case += ");\n"; + } + } else { + Case += " // op: " + VarName + "\n" + + " op = getMachineOpValue(MI, MI.getOperand(" + + utostr(OpIdx) + ")"; + if (MCEmitter) + Case += ", Fixups"; + Case += ");\n"; + } + gotOp = true; + } + + unsigned opMask = ~0U >> (32-N); + int opShift = beginVarBit - N + 1; + opMask <<= opShift; + opShift = beginInstBit - beginVarBit; + + if (opShift > 0) { + Case += " Value |= (op & " + utostr(opMask) + "U) << " + + itostr(opShift) + ";\n"; + } else if (opShift < 0) { + Case += " Value |= (op & " + utostr(opMask) + "U) >> " + + itostr(-opShift) + ";\n"; + } else { + Case += " Value |= op & " + utostr(opMask) + "U;\n"; + } + } +} + + +std::string CodeEmitterGen::getInstructionCase(Record *R, + CodeGenTarget &Target) { + std::string Case; + + BitsInit *BI = R->getValueAsBitsInit("Inst"); + const std::vector &Vals = R->getValues(); + unsigned NumberedOp = 0; + + // Loop over all of the fields in the instruction, determining which are the + // operands to the instruction. + for (unsigned i = 0, e = Vals.size(); i != e; ++i) { + // Ignore fixed fields in the record, we're looking for values like: + // bits<5> RST = { ?, ?, ?, ?, ? }; + if (Vals[i].getPrefix() || Vals[i].getValue()->isComplete()) + continue; + + AddCodeToMergeInOperand(R, BI, Vals[i].getName(), NumberedOp, Case, Target); + } + + std::string PostEmitter = R->getValueAsString("PostEncoderMethod"); + if (!PostEmitter.empty()) + Case += " Value = " + PostEmitter + "(MI, Value);\n"; + + return Case; +} + void CodeEmitterGen::run(raw_ostream &o) { CodeGenTarget Target; std::vector Insts = Records.getAllDerivedDefinitions("Instruction"); @@ -107,12 +224,11 @@ BitsInit *BI = R->getValueAsBitsInit("Inst"); - // Start by filling in fixed values... + // Start by filling in fixed values. unsigned Value = 0; for (unsigned i = 0, e = BI->getNumBits(); i != e; ++i) { - if (BitInit *B = dynamic_cast(BI->getBit(e-i-1))) { + if (BitInit *B = dynamic_cast(BI->getBit(e-i-1))) Value |= B->getValue() << (e-i-1); - } } o << " " << Value << "U," << '\t' << "// " << R->getName() << "\n"; } @@ -128,115 +244,9 @@ if (R->getValueAsString("Namespace") == "TargetOpcode") continue; const std::string &InstName = R->getName(); - std::string Case(""); - - BitsInit *BI = R->getValueAsBitsInit("Inst"); - const std::vector &Vals = R->getValues(); - CodeGenInstruction &CGI = Target.getInstruction(R); - - // Loop over all of the fields in the instruction, determining which are the - // operands to the instruction. - unsigned NumberedOp = 0; - for (unsigned i = 0, e = Vals.size(); i != e; ++i) { - // Ignore fixed fields. - if (Vals[i].getPrefix() || Vals[i].getValue()->isComplete()) - continue; - - // Is the operand continuous? If so, we can just mask and OR it in - // instead of doing it bit-by-bit, saving a lot in runtime cost. - const std::string &VarName = Vals[i].getName(); - bool gotOp = false; - - for (int bit = BI->getNumBits()-1; bit >= 0; ) { - int varBit = getVariableBit(VarName, BI, bit); - - // If this bit isn't from a variable, skip it. - if (varBit == -1) { - --bit; - continue; - } - - int beginInstBit = bit; - int beginVarBit = varBit; - int N = 1; - - for (--bit; bit >= 0;) { - varBit = getVariableBit(VarName, BI, bit); - if (varBit == -1 || varBit != (beginVarBit - N)) break; - ++N; - --bit; - } - - if (!gotOp) { - // If the operand matches by name, reference according to that - // operand number. Non-matching operands are assumed to be in - // order. - unsigned OpIdx; - if (CGI.Operands.hasOperandNamed(VarName, OpIdx)) { - // Get the machine operand number for the indicated operand. - OpIdx = CGI.Operands[OpIdx].MIOperandNo; - assert (!CGI.Operands.isFlatOperandNotEmitted(OpIdx) && - "Explicitly used operand also marked as not emitted!"); - } else { - /// If this operand is not supposed to be emitted by the - /// generated emitter, skip it. - while (CGI.Operands.isFlatOperandNotEmitted(NumberedOp)) - ++NumberedOp; - OpIdx = NumberedOp++; - } - std::pair SO = - CGI.Operands.getSubOperandNumber(OpIdx); - std::string &EncoderMethodName = - CGI.Operands[SO.first].EncoderMethodName; - - // If the source operand has a custom encoder, use it. This will - // get the encoding for all of the suboperands. - if (!EncoderMethodName.empty()) { - // A custom encoder has all of the information for the - // sub-operands, if there are more than one, so only - // query the encoder once per source operand. - if (SO.second == 0) { - Case += " // op: " + VarName + "\n" - + " op = " + EncoderMethodName + "(MI, " - + utostr(OpIdx); - if (MCEmitter) - Case += ", Fixups"; - Case += ");\n"; - } - } else { - Case += " // op: " + VarName + "\n" - + " op = getMachineOpValue(MI, MI.getOperand(" - + utostr(OpIdx) + ")"; - if (MCEmitter) - Case += ", Fixups"; - Case += ");\n"; - } - gotOp = true; - } - - unsigned opMask = ~0U >> (32-N); - int opShift = beginVarBit - N + 1; - opMask <<= opShift; - opShift = beginInstBit - beginVarBit; - - if (opShift > 0) { - Case += " Value |= (op & " + utostr(opMask) + "U) << " - + itostr(opShift) + ";\n"; - } else if (opShift < 0) { - Case += " Value |= (op & " + utostr(opMask) + "U) >> " - + itostr(-opShift) + ";\n"; - } else { - Case += " Value |= op & " + utostr(opMask) + "U;\n"; - } - } - } - - std::string PostEmitter = R->getValueAsString("PostEncoderMethod"); - if (!PostEmitter.empty()) - Case += " Value = " + PostEmitter + "(MI, Value);\n"; + std::string Case = getInstructionCase(R, Target); - std::vector &InstList = CaseMap[Case]; - InstList.push_back(InstName); + CaseMap[Case].push_back(InstName); } // Emit initial function code Modified: llvm/trunk/utils/TableGen/CodeEmitterGen.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeEmitterGen.h?rev=119129&r1=119128&r2=119129&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/CodeEmitterGen.h (original) +++ llvm/trunk/utils/TableGen/CodeEmitterGen.h Mon Nov 15 00:59:17 2010 @@ -23,6 +23,7 @@ class RecordVal; class BitsInit; +class CodeGenTarget; class CodeEmitterGen : public TableGenBackend { RecordKeeper &Records; @@ -36,6 +37,12 @@ void emitGetValueBit(raw_ostream &o, const std::string &Namespace); void reverseBits(std::vector &Insts); int getVariableBit(const std::string &VarName, BitsInit *BI, int bit); + std::string getInstructionCase(Record *R, CodeGenTarget &Target); + void + AddCodeToMergeInOperand(Record *R, BitsInit *BI, const std::string &VarName, + unsigned &NumberedOp, + std::string &Case, CodeGenTarget &Target); + }; } // End llvm namespace From sabre at nondot.org Mon Nov 15 01:09:28 2010 From: sabre at nondot.org (Chris Lattner) Date: Mon, 15 Nov 2010 07:09:28 -0000 Subject: [llvm-commits] [llvm] r119130 - /llvm/trunk/utils/TableGen/CodeEmitterGen.cpp Message-ID: <20101115070928.879BD2A6C12C@llvm.org> Author: lattner Date: Mon Nov 15 01:09:28 2010 New Revision: 119130 URL: http://llvm.org/viewvc/llvm-project?rev=119130&view=rev Log: pull the code to get the operand value out of the loop. Modified: llvm/trunk/utils/TableGen/CodeEmitterGen.cpp Modified: llvm/trunk/utils/TableGen/CodeEmitterGen.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeEmitterGen.cpp?rev=119130&r1=119129&r2=119130&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/CodeEmitterGen.cpp (original) +++ llvm/trunk/utils/TableGen/CodeEmitterGen.cpp Mon Nov 15 01:09:28 2010 @@ -74,10 +74,65 @@ AddCodeToMergeInOperand(Record *R, BitsInit *BI, const std::string &VarName, unsigned &NumberedOp, std::string &Case, CodeGenTarget &Target) { - bool gotOp = false; CodeGenInstruction &CGI = Target.getInstruction(R); - for (int bit = BI->getNumBits()-1; bit >= 0; ) { + // Determine if VarName actually contributes to the Inst encoding. + int bit = BI->getNumBits()-1; + + // Scan for a bit that this contributed to. + for (; bit >= 0; ) { + if (getVariableBit(VarName, BI, bit) != -1) + break; + + --bit; + } + + // If we found no bits, ignore this value, otherwise emit the call to get the + // operand encoding. + if (bit < 0) return; + + // If the operand matches by name, reference according to that + // operand number. Non-matching operands are assumed to be in + // order. + unsigned OpIdx; + if (CGI.Operands.hasOperandNamed(VarName, OpIdx)) { + // Get the machine operand number for the indicated operand. + OpIdx = CGI.Operands[OpIdx].MIOperandNo; + assert(!CGI.Operands.isFlatOperandNotEmitted(OpIdx) && + "Explicitly used operand also marked as not emitted!"); + } else { + /// If this operand is not supposed to be emitted by the + /// generated emitter, skip it. + while (CGI.Operands.isFlatOperandNotEmitted(NumberedOp)) + ++NumberedOp; + OpIdx = NumberedOp++; + } + + std::pair SO = CGI.Operands.getSubOperandNumber(OpIdx); + std::string &EncoderMethodName = CGI.Operands[SO.first].EncoderMethodName; + + // If the source operand has a custom encoder, use it. This will + // get the encoding for all of the suboperands. + if (!EncoderMethodName.empty()) { + // A custom encoder has all of the information for the + // sub-operands, if there are more than one, so only + // query the encoder once per source operand. + if (SO.second == 0) { + Case += " // op: " + VarName + "\n" + + " op = " + EncoderMethodName + "(MI, " + utostr(OpIdx); + if (MCEmitter) + Case += ", Fixups"; + Case += ");\n"; + } + } else { + Case += " // op: " + VarName + "\n" + + " op = getMachineOpValue(MI, MI.getOperand(" + utostr(OpIdx) + ")"; + if (MCEmitter) + Case += ", Fixups"; + Case += ");\n"; + } + + for (; bit >= 0; ) { int varBit = getVariableBit(VarName, BI, bit); // If this bit isn't from a variable, skip it. @@ -97,52 +152,7 @@ ++N; --bit; } - - if (!gotOp) { - // If the operand matches by name, reference according to that - // operand number. Non-matching operands are assumed to be in - // order. - unsigned OpIdx; - if (CGI.Operands.hasOperandNamed(VarName, OpIdx)) { - // Get the machine operand number for the indicated operand. - OpIdx = CGI.Operands[OpIdx].MIOperandNo; - assert(!CGI.Operands.isFlatOperandNotEmitted(OpIdx) && - "Explicitly used operand also marked as not emitted!"); - } else { - /// If this operand is not supposed to be emitted by the - /// generated emitter, skip it. - while (CGI.Operands.isFlatOperandNotEmitted(NumberedOp)) - ++NumberedOp; - OpIdx = NumberedOp++; - } - std::pair SO =CGI.Operands.getSubOperandNumber(OpIdx); - std::string &EncoderMethodName = CGI.Operands[SO.first].EncoderMethodName; - - // If the source operand has a custom encoder, use it. This will - // get the encoding for all of the suboperands. - if (!EncoderMethodName.empty()) { - // A custom encoder has all of the information for the - // sub-operands, if there are more than one, so only - // query the encoder once per source operand. - if (SO.second == 0) { - Case += " // op: " + VarName + "\n" - + " op = " + EncoderMethodName + "(MI, " - + utostr(OpIdx); - if (MCEmitter) - Case += ", Fixups"; - Case += ");\n"; - } - } else { - Case += " // op: " + VarName + "\n" + - " op = getMachineOpValue(MI, MI.getOperand(" + - utostr(OpIdx) + ")"; - if (MCEmitter) - Case += ", Fixups"; - Case += ");\n"; - } - gotOp = true; - } - + unsigned opMask = ~0U >> (32-N); int opShift = beginVarBit - N + 1; opMask <<= opShift; From sabre at nondot.org Mon Nov 15 01:52:06 2010 From: sabre at nondot.org (Chris Lattner) Date: Mon, 15 Nov 2010 07:52:06 -0000 Subject: [llvm-commits] [llvm] r119132 - /llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp Message-ID: <20101115075206.C8ED02A6C12C@llvm.org> Author: lattner Date: Mon Nov 15 01:52:06 2010 New Revision: 119132 URL: http://llvm.org/viewvc/llvm-project?rev=119132&view=rev Log: fix a regression with the new instprinter: we lost the ability to print DBG_VALUE instructions. This should unbreak the llvm-gcc-powerpc-darwin9 buildbot. Modified: llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp Modified: llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp?rev=119132&r1=119131&r2=119132&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp Mon Nov 15 01:52:06 2010 @@ -298,6 +298,28 @@ // Lower multi-instruction pseudo operations. switch (MI->getOpcode()) { default: break; + case TargetOpcode::DBG_VALUE: { + if (!isVerbose() || !OutStreamer.hasRawTextSupport()) return; + + SmallString<32> Str; + raw_svector_ostream O(Str); + unsigned NOps = MI->getNumOperands(); + assert(NOps==4); + O << '\t' << MAI->getCommentString() << "DEBUG_VALUE: "; + // cast away const; DIetc do not take const operands for some reason. + DIVariable V(const_cast(MI->getOperand(NOps-1).getMetadata())); + O << V.getName(); + O << " <- "; + // Frame address. Currently handles register +- offset only. + assert(MI->getOperand(0).isReg() && MI->getOperand(1).isImm()); + O << '['; printOperand(MI, 0, O); O << '+'; printOperand(MI, 1, O); + O << ']'; + O << "+"; + printOperand(MI, NOps-2, O); + OutStreamer.EmitRawText(O.str()); + return; + } + case PPC::MovePCtoLR: case PPC::MovePCtoLR8: { // Transform %LR = MovePCtoLR From sabre at nondot.org Mon Nov 15 02:02:41 2010 From: sabre at nondot.org (Chris Lattner) Date: Mon, 15 Nov 2010 08:02:41 -0000 Subject: [llvm-commits] [llvm] r119133 - in /llvm/trunk/lib/Target/PowerPC: PPCCodeEmitter.cpp PPCInstr64Bit.td PPCInstrFormats.td PPCInstrInfo.td PPCMCCodeEmitter.cpp Message-ID: <20101115080241.B0EA32A6C12C@llvm.org> Author: lattner Date: Mon Nov 15 02:02:41 2010 New Revision: 119133 URL: http://llvm.org/viewvc/llvm-project?rev=119133&view=rev Log: add support for encoding the lo14 forms used for a few PPC64 addressing modes. For example, we now get: ld r3, lo16(_G)(r3) ; encoding: [0xe8,0x63,A,0bAAAAAA00] ; fixup A - offset: 0, value: lo16(_G), kind: fixup_ppc_lo14 Modified: llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td llvm/trunk/lib/Target/PowerPC/PPCInstrFormats.td llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp Modified: llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp?rev=119133&r1=119132&r2=119133&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp Mon Nov 15 02:02:41 2010 @@ -66,7 +66,7 @@ unsigned getHA16Encoding(const MachineInstr &MI, unsigned OpNo) const; unsigned getLO16Encoding(const MachineInstr &MI, unsigned OpNo) const; - unsigned getLO14Encoding(const MachineInstr &MI, unsigned OpNo) const; + unsigned getMemRIXEncoding(const MachineInstr &MI, unsigned OpNo) const; const char *getPassName() const { return "PowerPC Machine Code Emitter"; } @@ -209,13 +209,19 @@ return 0; } -unsigned PPCCodeEmitter::getLO14Encoding(const MachineInstr &MI, - unsigned OpNo) const { +unsigned PPCCodeEmitter::getMemRIXEncoding(const MachineInstr &MI, + unsigned OpNo) const { + // Encode (imm, reg) as a memrix, which has the low 14-bits as the + // displacement and the next 5 bits as the register #. + assert(MI.getOperand(OpNo+1).isReg()); + unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1)) << 14; + const MachineOperand &MO = MI.getOperand(OpNo); - if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO); + if (MO.isImm()) + return (getMachineOpValue(MI, MO) & 0x3FFF) | RegBits; MCE.addRelocation(GetRelocation(MO, PPC::reloc_absolute_low_ix)); - return 0; + return RegBits; } @@ -259,13 +265,6 @@ case PPC::STFD: Reloc = PPC::reloc_absolute_low; break; - - case PPC::LWA: - case PPC::LD: - case PPC::STD: - case PPC::STD_32: - Reloc = PPC::reloc_absolute_low_ix; - break; } MCE.addRelocation(GetRelocation(MO, Reloc)); Modified: llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td?rev=119133&r1=119132&r2=119133&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td (original) +++ llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td Mon Nov 15 02:02:41 2010 @@ -552,12 +552,13 @@ "", [(set G8RC:$rD, (PPCtoc_entry tglobaladdr:$disp, G8RC:$reg))]>, isPPC64; -let RST = 2, DS = 8 in + +let RST = 2, DS_RA = 0 in // FIXME: Should be a pseudo. def LDinto_toc: DSForm_1<58, 0, (outs), (ins G8RC:$reg), "ld 2, 8($reg)", LdStLD, [(PPCload_toc G8RC:$reg)]>, isPPC64; -let RST = 2, DS = 40, RA = 1 in +let RST = 2, DS_RA = 0 in // FIXME: Should be a pseudo. def LDtoc_restore : DSForm_1<58, 0, (outs), (ins), "ld 2, 40(1)", LdStLD, [(PPCtoc_restore)]>, isPPC64; @@ -628,8 +629,8 @@ iaddroff:$ptroff))]>, RegConstraint<"$ptrreg = $ea_res">, NoEncode<"$ea_res">; -def STDU : DSForm_1<62, 1, (outs ptr_rc:$ea_res), (ins G8RC:$rS, - s16immX4:$ptroff, ptr_rc:$ptrreg), +def STDU : DSForm_1a<62, 1, (outs ptr_rc:$ea_res), (ins G8RC:$rS, + s16immX4:$ptroff, ptr_rc:$ptrreg), "stdu $rS, $ptroff($ptrreg)", LdStSTD, [(set ptr_rc:$ea_res, (pre_store G8RC:$rS, ptr_rc:$ptrreg, iaddroff:$ptroff))]>, Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrFormats.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrFormats.td?rev=119133&r1=119132&r2=119133&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCInstrFormats.td (original) +++ llvm/trunk/lib/Target/PowerPC/PPCInstrFormats.td Mon Nov 15 02:02:41 2010 @@ -188,17 +188,31 @@ InstrItinClass itin, list pattern> : I { bits<5> RST; - bits<14> DS; - bits<5> RA; + bits<19> DS_RA; let Pattern = pattern; let Inst{6-10} = RST; - let Inst{11-15} = RA; - let Inst{16-29} = DS; + let Inst{11-15} = DS_RA{18-14}; // Register # + let Inst{16-29} = DS_RA{13-0}; // Displacement. let Inst{30-31} = xo; } +class DSForm_1a opcode, bits<2> xo, dag OOL, dag IOL, string asmstr, + InstrItinClass itin, list pattern> + : I { + bits<5> RST; + bits<14> DS; + bits<5> RA; + + let Pattern = pattern; + + let Inst{6-10} = RST; + let Inst{11-15} = RA; + let Inst{16-29} = DS; + let Inst{30-31} = xo; +} + // 1.7.6 X-Form class XForm_base_r3xo opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, InstrItinClass itin, list pattern> Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td?rev=119133&r1=119132&r2=119133&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td (original) +++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Mon Nov 15 02:02:41 2010 @@ -324,6 +324,7 @@ def memrix : Operand { // memri where the imm is shifted 2 bits. let PrintMethod = "printMemRegImmShifted"; let MIOperandInfo = (ops i32imm:$imm, ptr_rc:$reg); + let EncoderMethod = "getMemRIXEncoding"; } def tocentry : Operand { let MIOperandInfo = (ops i32imm:$imm); Modified: llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp?rev=119133&r1=119132&r2=119133&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp Mon Nov 15 02:02:41 2010 @@ -66,8 +66,8 @@ SmallVectorImpl &Fixups) const; unsigned getLO16Encoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl &Fixups) const; - unsigned getLO14Encoding(const MCInst &MI, unsigned OpNo, - SmallVectorImpl &Fixups) const; + unsigned getMemRIXEncoding(const MCInst &MI, unsigned OpNo, + SmallVectorImpl &Fixups) const; unsigned get_crbitm_encoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl &Fixups) const; @@ -147,15 +147,20 @@ return 0; } -unsigned PPCMCCodeEmitter::getLO14Encoding(const MCInst &MI, unsigned OpNo, +unsigned PPCMCCodeEmitter::getMemRIXEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl &Fixups) const { + // Encode (imm, reg) as a memrix, which has the low 14-bits as the + // displacement and the next 5 bits as the register #. + unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups) << 14; + const MCOperand &MO = MI.getOperand(OpNo); - if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups); + if (MO.isImm()) + return (getMachineOpValue(MI, MO, Fixups) & 0x3FFF) | RegBits; // Add a fixup for the branch target. Fixups.push_back(MCFixup::Create(0, MO.getExpr(), (MCFixupKind)PPC::fixup_ppc_lo14)); - return 0; + return RegBits; } From sabre at nondot.org Mon Nov 15 02:22:03 2010 From: sabre at nondot.org (Chris Lattner) Date: Mon, 15 Nov 2010 08:22:03 -0000 Subject: [llvm-commits] [llvm] r119134 - in /llvm/trunk/lib/Target/PowerPC: PPCCodeEmitter.cpp PPCInstr64Bit.td PPCInstrFormats.td PPCInstrInfo.td PPCMCCodeEmitter.cpp Message-ID: <20101115082203.D867E2A6C12C@llvm.org> Author: lattner Date: Mon Nov 15 02:22:03 2010 New Revision: 119134 URL: http://llvm.org/viewvc/llvm-project?rev=119134&view=rev Log: split out an encoder for memri operands, allowing a relocation to be plopped into the immediate field. This allows us to encode stuff like this: lbz r3, lo16(__ZL4init)(r4) ; globalopt.cpp:5 ; encoding: [0x88,0x64,A,A] ; fixup A - offset: 0, value: lo16(__ZL4init), kind: fixup_ppc_lo16 stw r3, lo16(__ZL1s)(r5) ; globalopt.cpp:6 ; encoding: [0x90,0x65,A,A] ; fixup A - offset: 0, value: lo16(__ZL1s), kind: fixup_ppc_lo16 With this, we should have a completely function MCCodeEmitter for PPC, wewt. Modified: llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td llvm/trunk/lib/Target/PowerPC/PPCInstrFormats.td llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp Modified: llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp?rev=119134&r1=119133&r2=119134&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp Mon Nov 15 02:22:03 2010 @@ -66,6 +66,7 @@ unsigned getHA16Encoding(const MachineInstr &MI, unsigned OpNo) const; unsigned getLO16Encoding(const MachineInstr &MI, unsigned OpNo) const; + unsigned getMemRIEncoding(const MachineInstr &MI, unsigned OpNo) const; unsigned getMemRIXEncoding(const MachineInstr &MI, unsigned OpNo) const; const char *getPassName() const { return "PowerPC Machine Code Emitter"; } @@ -209,6 +210,22 @@ return 0; } +unsigned PPCCodeEmitter::getMemRIEncoding(const MachineInstr &MI, + unsigned OpNo) const { + // Encode (imm, reg) as a memri, which has the low 16-bits as the + // displacement and the next 5 bits as the register #. + assert(MI.getOperand(OpNo+1).isReg()); + unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1)) << 16; + + const MachineOperand &MO = MI.getOperand(OpNo); + if (MO.isImm()) + return (getMachineOpValue(MI, MO) & 0xFFFF) | RegBits; + + // Add a fixup for the displacement field. + MCE.addRelocation(GetRelocation(MO, PPC::reloc_absolute_low)); + return RegBits; +} + unsigned PPCCodeEmitter::getMemRIXEncoding(const MachineInstr &MI, unsigned OpNo) const { // Encode (imm, reg) as a memrix, which has the low 14-bits as the @@ -233,49 +250,9 @@ return PPCRegisterInfo::getRegisterNumbering(MO.getReg()); } - if (MO.isImm()) - return MO.getImm(); - - if (MO.isGlobal() || MO.isSymbol() || MO.isCPI() || MO.isJTI()) { - unsigned Reloc = 0; - assert((TM.getRelocationModel() != Reloc::PIC_ || MovePCtoLROffset) && - "MovePCtoLR not seen yet?"); - switch (MI.getOpcode()) { - default: MI.dump(); llvm_unreachable("Unknown instruction for relocation!"); - // Loads. - case PPC::LBZ: - case PPC::LBZ8: - case PPC::LHA: - case PPC::LHA8: - case PPC::LHZ: - case PPC::LHZ8: - case PPC::LWZ: - case PPC::LWZ8: - case PPC::LFS: - case PPC::LFD: - - // Stores. - case PPC::STB: - case PPC::STB8: - case PPC::STH: - case PPC::STH8: - case PPC::STW: - case PPC::STW8: - case PPC::STFS: - case PPC::STFD: - Reloc = PPC::reloc_absolute_low; - break; - } - - MCE.addRelocation(GetRelocation(MO, Reloc)); - } else { -#ifndef NDEBUG - errs() << "ERROR: Unknown type of MachineOperand: " << MO << "\n"; -#endif - llvm_unreachable(0); - } - - return 0; + assert(MO.isImm() && + "Relocation required in an instruction that we cannot encode!"); + return MO.getImm(); } #include "PPCGenCodeEmitter.inc" Modified: llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td?rev=119134&r1=119133&r2=119134&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td (original) +++ llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td Mon Nov 15 02:22:03 2010 @@ -493,7 +493,7 @@ // Update forms. let mayLoad = 1 in -def LHAU8 : DForm_1<43, (outs G8RC:$rD, ptr_rc:$ea_result), (ins symbolLo:$disp, +def LHAU8 : DForm_1a<43, (outs G8RC:$rD, ptr_rc:$ea_result), (ins symbolLo:$disp, ptr_rc:$rA), "lhau $rD, $disp($rA)", LdStGeneral, []>, RegConstraint<"$rA = $ea_result">, @@ -614,14 +614,14 @@ let PPC970_Unit = 2 in { -def STBU8 : DForm_1<38, (outs ptr_rc:$ea_res), (ins G8RC:$rS, +def STBU8 : DForm_1a<38, (outs ptr_rc:$ea_res), (ins G8RC:$rS, symbolLo:$ptroff, ptr_rc:$ptrreg), "stbu $rS, $ptroff($ptrreg)", LdStGeneral, [(set ptr_rc:$ea_res, (pre_truncsti8 G8RC:$rS, ptr_rc:$ptrreg, iaddroff:$ptroff))]>, RegConstraint<"$ptrreg = $ea_res">, NoEncode<"$ea_res">; -def STHU8 : DForm_1<45, (outs ptr_rc:$ea_res), (ins G8RC:$rS, +def STHU8 : DForm_1a<45, (outs ptr_rc:$ea_res), (ins G8RC:$rS, symbolLo:$ptroff, ptr_rc:$ptrreg), "sthu $rS, $ptroff($ptrreg)", LdStGeneral, [(set ptr_rc:$ea_res, Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrFormats.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrFormats.td?rev=119134&r1=119133&r2=119134&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCInstrFormats.td (original) +++ llvm/trunk/lib/Target/PowerPC/PPCInstrFormats.td Mon Nov 15 02:22:03 2010 @@ -102,6 +102,19 @@ InstrItinClass itin, list pattern> : I { bits<5> A; + bits<21> Addr; + + let Pattern = pattern; + + let Inst{6-10} = A; + let Inst{11-15} = Addr{20-16}; // Base Reg + let Inst{16-31} = Addr{15-0}; // Displacement +} + +class DForm_1a opcode, dag OOL, dag IOL, string asmstr, + InstrItinClass itin, list pattern> + : I { + bits<5> A; bits<16> C; bits<5> B; @@ -112,6 +125,7 @@ let Inst{16-31} = C; } + class DForm_2 opcode, dag OOL, dag IOL, string asmstr, InstrItinClass itin, list pattern> : DForm_base; @@ -147,8 +161,7 @@ InstrItinClass itin, list pattern> : DForm_1 { let A = 0; - let B = 0; - let C = 0; + let Addr = 0; } class DForm_5 opcode, dag OOL, dag IOL, string asmstr, Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td?rev=119134&r1=119133&r2=119134&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td (original) +++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Mon Nov 15 02:22:03 2010 @@ -316,6 +316,7 @@ def memri : Operand { let PrintMethod = "printMemRegImm"; let MIOperandInfo = (ops i32imm:$imm, ptr_rc:$reg); + let EncoderMethod = "getMemRIEncoding"; } def memrr : Operand { let PrintMethod = "printMemRegReg"; @@ -763,33 +764,33 @@ // Unindexed (r+i) Stores with Update (preinc). let PPC970_Unit = 2 in { -def STBU : DForm_1<39, (outs ptr_rc:$ea_res), (ins GPRC:$rS, +def STBU : DForm_1a<39, (outs ptr_rc:$ea_res), (ins GPRC:$rS, symbolLo:$ptroff, ptr_rc:$ptrreg), "stbu $rS, $ptroff($ptrreg)", LdStGeneral, [(set ptr_rc:$ea_res, (pre_truncsti8 GPRC:$rS, ptr_rc:$ptrreg, iaddroff:$ptroff))]>, RegConstraint<"$ptrreg = $ea_res">, NoEncode<"$ea_res">; -def STHU : DForm_1<45, (outs ptr_rc:$ea_res), (ins GPRC:$rS, +def STHU : DForm_1a<45, (outs ptr_rc:$ea_res), (ins GPRC:$rS, symbolLo:$ptroff, ptr_rc:$ptrreg), "sthu $rS, $ptroff($ptrreg)", LdStGeneral, [(set ptr_rc:$ea_res, (pre_truncsti16 GPRC:$rS, ptr_rc:$ptrreg, iaddroff:$ptroff))]>, RegConstraint<"$ptrreg = $ea_res">, NoEncode<"$ea_res">; -def STWU : DForm_1<37, (outs ptr_rc:$ea_res), (ins GPRC:$rS, +def STWU : DForm_1a<37, (outs ptr_rc:$ea_res), (ins GPRC:$rS, symbolLo:$ptroff, ptr_rc:$ptrreg), "stwu $rS, $ptroff($ptrreg)", LdStGeneral, [(set ptr_rc:$ea_res, (pre_store GPRC:$rS, ptr_rc:$ptrreg, iaddroff:$ptroff))]>, RegConstraint<"$ptrreg = $ea_res">, NoEncode<"$ea_res">; -def STFSU : DForm_1<37, (outs ptr_rc:$ea_res), (ins F4RC:$rS, +def STFSU : DForm_1a<37, (outs ptr_rc:$ea_res), (ins F4RC:$rS, symbolLo:$ptroff, ptr_rc:$ptrreg), "stfsu $rS, $ptroff($ptrreg)", LdStGeneral, [(set ptr_rc:$ea_res, (pre_store F4RC:$rS, ptr_rc:$ptrreg, iaddroff:$ptroff))]>, RegConstraint<"$ptrreg = $ea_res">, NoEncode<"$ea_res">; -def STFDU : DForm_1<37, (outs ptr_rc:$ea_res), (ins F8RC:$rS, +def STFDU : DForm_1a<37, (outs ptr_rc:$ea_res), (ins F8RC:$rS, symbolLo:$ptroff, ptr_rc:$ptrreg), "stfdu $rS, $ptroff($ptrreg)", LdStGeneral, [(set ptr_rc:$ea_res, (pre_store F8RC:$rS, ptr_rc:$ptrreg, Modified: llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp?rev=119134&r1=119133&r2=119134&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp Mon Nov 15 02:22:03 2010 @@ -66,6 +66,8 @@ SmallVectorImpl &Fixups) const; unsigned getLO16Encoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl &Fixups) const; + unsigned getMemRIEncoding(const MCInst &MI, unsigned OpNo, + SmallVectorImpl &Fixups) const; unsigned getMemRIXEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl &Fixups) const; unsigned get_crbitm_encoding(const MCInst &MI, unsigned OpNo, @@ -147,10 +149,29 @@ return 0; } +unsigned PPCMCCodeEmitter::getMemRIEncoding(const MCInst &MI, unsigned OpNo, + SmallVectorImpl &Fixups) const { + // Encode (imm, reg) as a memri, which has the low 16-bits as the + // displacement and the next 5 bits as the register #. + assert(MI.getOperand(OpNo+1).isReg()); + unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups) << 16; + + const MCOperand &MO = MI.getOperand(OpNo); + if (MO.isImm()) + return (getMachineOpValue(MI, MO, Fixups) & 0xFFFF) | RegBits; + + // Add a fixup for the displacement field. + Fixups.push_back(MCFixup::Create(0, MO.getExpr(), + (MCFixupKind)PPC::fixup_ppc_lo16)); + return RegBits; +} + + unsigned PPCMCCodeEmitter::getMemRIXEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl &Fixups) const { // Encode (imm, reg) as a memrix, which has the low 14-bits as the // displacement and the next 5 bits as the register #. + assert(MI.getOperand(OpNo+1).isReg()); unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups) << 14; const MCOperand &MO = MI.getOperand(OpNo); @@ -182,11 +203,9 @@ return PPCRegisterInfo::getRegisterNumbering(MO.getReg()); } - if (MO.isImm()) - return MO.getImm(); - - // FIXME. - return 0; + assert(MO.isImm() && + "Relocation required in an instruction that we cannot encode!"); + return MO.getImm(); } From sabre at nondot.org Mon Nov 15 02:49:58 2010 From: sabre at nondot.org (Chris Lattner) Date: Mon, 15 Nov 2010 08:49:58 -0000 Subject: [llvm-commits] [llvm] r119136 - in /llvm/trunk/lib/Target/PowerPC: CMakeLists.txt PPC.h PPCAsmBackend.cpp PPCAsmPrinter.cpp PPCTargetMachine.cpp Message-ID: <20101115084958.A22822A6C12D@llvm.org> Author: lattner Date: Mon Nov 15 02:49:58 2010 New Revision: 119136 URL: http://llvm.org/viewvc/llvm-project?rev=119136&view=rev Log: Wire up primitive support in the assembler backend for writing .o files directly on the mac. This is very early, doesn't support relocations and has a terrible hack to avoid .machine from being printed, but despite that it generates an bitwise-identical-to-cctools .o file for stuff like this: define i32 @test() nounwind { ret i32 42 } I don't plan to continue pushing this forward, but if anyone else was interested in doing it, it should be really straight-forward. Added: llvm/trunk/lib/Target/PowerPC/PPCAsmBackend.cpp Modified: llvm/trunk/lib/Target/PowerPC/CMakeLists.txt llvm/trunk/lib/Target/PowerPC/PPC.h llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp Modified: llvm/trunk/lib/Target/PowerPC/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/CMakeLists.txt?rev=119136&r1=119135&r2=119136&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/CMakeLists.txt (original) +++ llvm/trunk/lib/Target/PowerPC/CMakeLists.txt Mon Nov 15 02:49:58 2010 @@ -13,6 +13,7 @@ tablegen(PPCGenSubtarget.inc -gen-subtarget) add_llvm_target(PowerPCCodeGen + PPCAsmBackend.cpp PPCAsmPrinter.cpp PPCBranchSelector.cpp PPCCodeEmitter.cpp Modified: llvm/trunk/lib/Target/PowerPC/PPC.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPC.h?rev=119136&r1=119135&r2=119136&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPC.h (original) +++ llvm/trunk/lib/Target/PowerPC/PPC.h Mon Nov 15 02:49:58 2010 @@ -15,6 +15,8 @@ #ifndef LLVM_TARGET_POWERPC_H #define LLVM_TARGET_POWERPC_H +#include + // GCC #defines PPC on Linux but we use it as our namespace name #undef PPC @@ -30,6 +32,7 @@ class MCCodeEmitter; class MCContext; class TargetMachine; + class TargetAsmBackend; FunctionPass *createPPCBranchSelectionPass(); FunctionPass *createPPCISelDag(PPCTargetMachine &TM); @@ -37,6 +40,7 @@ JITCodeEmitter &MCE); MCCodeEmitter *createPPCMCCodeEmitter(const Target &, TargetMachine &TM, MCContext &Ctx); + TargetAsmBackend *createPPCAsmBackend(const Target &, const std::string &); void LowerPPCMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI, AsmPrinter &AP); Added: llvm/trunk/lib/Target/PowerPC/PPCAsmBackend.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCAsmBackend.cpp?rev=119136&view=auto ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCAsmBackend.cpp (added) +++ llvm/trunk/lib/Target/PowerPC/PPCAsmBackend.cpp Mon Nov 15 02:49:58 2010 @@ -0,0 +1,104 @@ +//===-- PPCAsmBackend.cpp - PPC Assembler Backend -------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/Target/TargetAsmBackend.h" +#include "PPC.h" +#include "PPCFixupKinds.h" +#include "llvm/MC/MCSectionMachO.h" +#include "llvm/MC/MCObjectFormat.h" +#include "llvm/MC/MCObjectWriter.h" +#include "llvm/Target/TargetRegistry.h" +#include "llvm/Support/MachO.h" +using namespace llvm; + +namespace { + class PPCAsmBackend : public TargetAsmBackend { + public: + PPCAsmBackend(const Target &T) : TargetAsmBackend(T) {} + + bool MayNeedRelaxation(const MCInst &Inst) const { + // FIXME. + return false; + } + + void RelaxInstruction(const MCInst &Inst, MCInst &Res) const { + // FIXME. + assert(0 && "RelaxInstruction() unimplemented"); + } + + bool WriteNopData(uint64_t Count, MCObjectWriter *OW) const { + // FIXME: Zero fill for now. That's not right, but at least will get the + // section size right. + for (uint64_t i = 0; i != Count; ++i) + OW->Write8(0); + return true; + } + + unsigned getPointerSize() const { + StringRef Name = TheTarget.getName(); + if (Name == "ppc64") return 8; + assert(Name == "ppc32" && "Unknown target name!"); + return 4; + } + }; +} // end anonymous namespace + + +// FIXME: This should be in a separate file. +namespace { + class DarwinPPCAsmBackend : public PPCAsmBackend { + MCMachOObjectFormat Format; + public: + DarwinPPCAsmBackend(const Target &T) : PPCAsmBackend(T) { + HasScatteredSymbols = true; + } + + virtual const MCObjectFormat &getObjectFormat() const { + return Format; + } + + void ApplyFixup(const MCFixup &Fixup, MCDataFragment &DF, + uint64_t Value) const { + assert(0 && "UNIMP"); + } + + bool isVirtualSection(const MCSection &Section) const { + const MCSectionMachO &SMO = static_cast(Section); + return (SMO.getType() == MCSectionMachO::S_ZEROFILL || + SMO.getType() == MCSectionMachO::S_GB_ZEROFILL || + SMO.getType() == MCSectionMachO::S_THREAD_LOCAL_ZEROFILL); + } + + MCObjectWriter *createObjectWriter(raw_ostream &OS) const { + bool is64 = getPointerSize() == 8; + return createMachObjectWriter(OS, /*Is64Bit=*/is64, + is64 ? MachO::CPUTypePowerPC64 : + MachO::CPUTypePowerPC64, + MachO::CPUSubType_POWERPC_ALL, + /*IsLittleEndian=*/false); + } + + virtual bool doesSectionRequireSymbols(const MCSection &Section) const { + return false; + } + }; +} // end anonymous namespace + + + + +TargetAsmBackend *llvm::createPPCAsmBackend(const Target &T, + const std::string &TT) { + switch (Triple(TT).getOS()) { + case Triple::Darwin: + return new DarwinPPCAsmBackend(T); + default: + return 0; + } +} Modified: llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp?rev=119136&r1=119135&r2=119136&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp Mon Nov 15 02:49:58 2010 @@ -438,7 +438,10 @@ if (Subtarget.isPPC64() && Directive < PPC::DIR_970) Directive = PPC::DIR_64; assert(Directive <= PPC::DIR_64 && "Directive out of range."); - OutStreamer.EmitRawText("\t.machine " + Twine(CPUDirectives[Directive])); + + // FIXME: This is a total hack, finish mc'izing the PPC backend. + if (OutStreamer.hasRawTextSupport()) + OutStreamer.EmitRawText("\t.machine " + Twine(CPUDirectives[Directive])); // Prime text sections so they are adjacent. This reduces the likelihood a // large data or debug section causes a branch to exceed 16M limit. Modified: llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp?rev=119136&r1=119135&r2=119136&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp Mon Nov 15 02:49:58 2010 @@ -15,6 +15,7 @@ #include "PPCMCAsmInfo.h" #include "PPCTargetMachine.h" #include "llvm/PassManager.h" +#include "llvm/MC/MCStreamer.h" #include "llvm/Target/TargetOptions.h" #include "llvm/Target/TargetRegistry.h" #include "llvm/Support/FormattedStream.h" @@ -29,6 +30,20 @@ } +// This is duplicated code. Refactor this. +static MCStreamer *createMCStreamer(const Target &T, const std::string &TT, + MCContext &Ctx, TargetAsmBackend &TAB, + raw_ostream &OS, + MCCodeEmitter *Emitter, + bool RelaxAll) { + switch (Triple(TT).getOS()) { + case Triple::Darwin: + return createMachOStreamer(Ctx, TAB, OS, Emitter, RelaxAll); + default: + return NULL; + } +} + extern "C" void LLVMInitializePowerPCTarget() { // Register the targets RegisterTargetMachine A(ThePPC32Target); @@ -40,6 +55,15 @@ // Register the MC Code Emitter TargetRegistry::RegisterCodeEmitter(ThePPC32Target, createPPCMCCodeEmitter); TargetRegistry::RegisterCodeEmitter(ThePPC64Target, createPPCMCCodeEmitter); + + + // Register the asm backend. + TargetRegistry::RegisterAsmBackend(ThePPC32Target, createPPCAsmBackend); + TargetRegistry::RegisterAsmBackend(ThePPC64Target, createPPCAsmBackend); + + // Register the object streamer. + TargetRegistry::RegisterObjectStreamer(ThePPC32Target, createMCStreamer); + TargetRegistry::RegisterObjectStreamer(ThePPC64Target, createMCStreamer); } From baldrick at free.fr Mon Nov 15 03:03:26 2010 From: baldrick at free.fr (Duncan Sands) Date: Mon, 15 Nov 2010 10:03:26 +0100 Subject: [llvm-commits] r119002 breaks snow.c from FFmpeg In-Reply-To: References: Message-ID: <4CE0F75E.9030701@free.fr> Hi ?smail, > According to > http://fate.ffmpeg.org/x86_64-apple-darwin10-clang/20101114104032 clang has > regressed wrt. ffmpeg regtesting. A quick search showed that r119002 broke > snow.c . I attached preprocessed source code for snow.c. Here is the difference > between working & non-working snow.c assemblies : sorry about that. Can you please attach complete assembler before and after, and also let me know what compile options were passed to clang. Thanks a lot, Duncan. From kalle.raiskila at nokia.com Mon Nov 15 04:12:33 2010 From: kalle.raiskila at nokia.com (Kalle Raiskila) Date: Mon, 15 Nov 2010 10:12:33 -0000 Subject: [llvm-commits] [llvm] r119142 - /llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Message-ID: <20101115101233.222FE2A6C12C@llvm.org> Author: kraiskil Date: Mon Nov 15 04:12:32 2010 New Revision: 119142 URL: http://llvm.org/viewvc/llvm-project?rev=119142&view=rev Log: Improve code layout, mostly indentation. No functionality change. Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp?rev=119142&r1=119141&r2=119142&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Mon Nov 15 04:12:32 2010 @@ -559,98 +559,96 @@ // Get pointerinfos to the memory chunk(s) that contain the data to load uint64_t mpi_offset = LN->getPointerInfo().Offset; mpi_offset -= mpi_offset%16; - MachinePointerInfo lowMemPtr( LN->getPointerInfo().V, mpi_offset); - MachinePointerInfo highMemPtr( LN->getPointerInfo().V, mpi_offset+16); + MachinePointerInfo lowMemPtr(LN->getPointerInfo().V, mpi_offset); + MachinePointerInfo highMemPtr(LN->getPointerInfo().V, mpi_offset+16); + SDValue result; + SDValue basePtr = LN->getBasePtr(); + SDValue rotate; + if (alignment == 16) { + ConstantSDNode *CN; - SDValue result; - SDValue basePtr = LN->getBasePtr(); - SDValue rotate; - - if (alignment == 16) { - ConstantSDNode *CN; - - // Special cases for a known aligned load to simplify the base pointer - // and the rotation amount: - if (basePtr.getOpcode() == ISD::ADD - && (CN = dyn_cast (basePtr.getOperand(1))) != 0) { - // Known offset into basePtr - int64_t offset = CN->getSExtValue(); - int64_t rotamt = int64_t((offset & 0xf) - pso); - - if (rotamt < 0) - rotamt += 16; - - rotate = DAG.getConstant(rotamt, MVT::i16); - - // Simplify the base pointer for this case: - basePtr = basePtr.getOperand(0); - if ((offset & ~0xf) > 0) { - basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, - basePtr, - DAG.getConstant((offset & ~0xf), PtrVT)); - } - } else if ((basePtr.getOpcode() == SPUISD::AFormAddr) - || (basePtr.getOpcode() == SPUISD::IndirectAddr - && basePtr.getOperand(0).getOpcode() == SPUISD::Hi - && basePtr.getOperand(1).getOpcode() == SPUISD::Lo)) { - // Plain aligned a-form address: rotate into preferred slot - // Same for (SPUindirect (SPUhi ...), (SPUlo ...)) - int64_t rotamt = -pso; - if (rotamt < 0) - rotamt += 16; - rotate = DAG.getConstant(rotamt, MVT::i16); - } else { - // Offset the rotate amount by the basePtr and the preferred slot - // byte offset - int64_t rotamt = -pso; - if (rotamt < 0) - rotamt += 16; - rotate = DAG.getNode(ISD::ADD, dl, PtrVT, - basePtr, - DAG.getConstant(rotamt, PtrVT)); - } - } else { - // Unaligned load: must be more pessimistic about addressing modes: - if (basePtr.getOpcode() == ISD::ADD) { - MachineFunction &MF = DAG.getMachineFunction(); - MachineRegisterInfo &RegInfo = MF.getRegInfo(); - unsigned VReg = RegInfo.createVirtualRegister(&SPU::R32CRegClass); - SDValue Flag; - - SDValue Op0 = basePtr.getOperand(0); - SDValue Op1 = basePtr.getOperand(1); - - if (isa(Op1)) { - // Convert the (add , ) to an indirect address contained - // in a register. Note that this is done because we need to avoid - // creating a 0(reg) d-form address due to the SPU's block loads. - basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, Op0, Op1); - the_chain = DAG.getCopyToReg(the_chain, dl, VReg, basePtr, Flag); - basePtr = DAG.getCopyFromReg(the_chain, dl, VReg, PtrVT); - } else { - // Convert the (add , ) to an indirect address, which - // will likely be lowered as a reg(reg) x-form address. - basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, Op0, Op1); - } - } else { + // Special cases for a known aligned load to simplify the base pointer + // and the rotation amount: + if (basePtr.getOpcode() == ISD::ADD + && (CN = dyn_cast (basePtr.getOperand(1))) != 0) { + // Known offset into basePtr + int64_t offset = CN->getSExtValue(); + int64_t rotamt = int64_t((offset & 0xf) - pso); + + if (rotamt < 0) + rotamt += 16; + + rotate = DAG.getConstant(rotamt, MVT::i16); + + // Simplify the base pointer for this case: + basePtr = basePtr.getOperand(0); + if ((offset & ~0xf) > 0) { basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, basePtr, - DAG.getConstant(0, PtrVT)); + DAG.getConstant((offset & ~0xf), PtrVT)); } - + } else if ((basePtr.getOpcode() == SPUISD::AFormAddr) + || (basePtr.getOpcode() == SPUISD::IndirectAddr + && basePtr.getOperand(0).getOpcode() == SPUISD::Hi + && basePtr.getOperand(1).getOpcode() == SPUISD::Lo)) { + // Plain aligned a-form address: rotate into preferred slot + // Same for (SPUindirect (SPUhi ...), (SPUlo ...)) + int64_t rotamt = -pso; + if (rotamt < 0) + rotamt += 16; + rotate = DAG.getConstant(rotamt, MVT::i16); + } else { // Offset the rotate amount by the basePtr and the preferred slot // byte offset + int64_t rotamt = -pso; + if (rotamt < 0) + rotamt += 16; rotate = DAG.getNode(ISD::ADD, dl, PtrVT, basePtr, - DAG.getConstant(-pso, PtrVT)); + DAG.getConstant(rotamt, PtrVT)); } + } else { + // Unaligned load: must be more pessimistic about addressing modes: + if (basePtr.getOpcode() == ISD::ADD) { + MachineFunction &MF = DAG.getMachineFunction(); + MachineRegisterInfo &RegInfo = MF.getRegInfo(); + unsigned VReg = RegInfo.createVirtualRegister(&SPU::R32CRegClass); + SDValue Flag; + + SDValue Op0 = basePtr.getOperand(0); + SDValue Op1 = basePtr.getOperand(1); + + if (isa(Op1)) { + // Convert the (add , ) to an indirect address contained + // in a register. Note that this is done because we need to avoid + // creating a 0(reg) d-form address due to the SPU's block loads. + basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, Op0, Op1); + the_chain = DAG.getCopyToReg(the_chain, dl, VReg, basePtr, Flag); + basePtr = DAG.getCopyFromReg(the_chain, dl, VReg, PtrVT); + } else { + // Convert the (add , ) to an indirect address, which + // will likely be lowered as a reg(reg) x-form address. + basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, Op0, Op1); + } + } else { + basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, + basePtr, + DAG.getConstant(0, PtrVT)); + } - // Do the load as a i128 to allow possible shifting - SDValue low = DAG.getLoad(MVT::i128, dl, the_chain, basePtr, - lowMemPtr, - LN->isVolatile(), LN->isNonTemporal(), 16); + // Offset the rotate amount by the basePtr and the preferred slot + // byte offset + rotate = DAG.getNode(ISD::ADD, dl, PtrVT, + basePtr, + DAG.getConstant(-pso, PtrVT)); + } + + // Do the load as a i128 to allow possible shifting + SDValue low = DAG.getLoad(MVT::i128, dl, the_chain, basePtr, + lowMemPtr, + LN->isVolatile(), LN->isNonTemporal(), 16); // When the size is not greater than alignment we get all data with just // one load @@ -675,16 +673,16 @@ // extra kowledge, and might avoid the second load else { // storage position offset from lower 16 byte aligned memory chunk - SDValue offset = DAG.getNode( ISD::AND, dl, MVT::i32, + SDValue offset = DAG.getNode(ISD::AND, dl, MVT::i32, basePtr, DAG.getConstant( 0xf, MVT::i32 ) ); // 16 - offset - SDValue offset_compl = DAG.getNode( ISD::SUB, dl, MVT::i32, + SDValue offset_compl = DAG.getNode(ISD::SUB, dl, MVT::i32, DAG.getConstant( 16, MVT::i32), offset ); // get a registerfull of ones. (this implementation is a workaround: LLVM // cannot handle 128 bit signed int constants) - SDValue ones = DAG.getConstant( -1, MVT::v4i32 ); - ones = DAG.getNode( ISD::BIT_CONVERT, dl, MVT::i128, ones); + SDValue ones = DAG.getConstant(-1, MVT::v4i32 ); + ones = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i128, ones); SDValue high = DAG.getLoad(MVT::i128, dl, the_chain, DAG.getNode(ISD::ADD, dl, PtrVT, @@ -699,22 +697,22 @@ // Shift the (possible) high part right to compensate the misalignemnt. // if there is no highpart (i.e. value is i64 and offset is 4), this // will zero out the high value. - high = DAG.getNode( SPUISD::SRL_BYTES, dl, MVT::i128, high, - DAG.getNode( ISD::SUB, dl, MVT::i32, + high = DAG.getNode(SPUISD::SRL_BYTES, dl, MVT::i128, high, + DAG.getNode(ISD::SUB, dl, MVT::i32, DAG.getConstant( 16, MVT::i32), offset )); // Shift the low similarily // TODO: add SPUISD::SHL_BYTES - low = DAG.getNode( SPUISD::SHL_BYTES, dl, MVT::i128, low, offset ); + low = DAG.getNode(SPUISD::SHL_BYTES, dl, MVT::i128, low, offset ); // Merge the two parts - result = DAG.getNode( ISD::BIT_CONVERT, dl, vecVT, + result = DAG.getNode(ISD::BIT_CONVERT, dl, vecVT, DAG.getNode(ISD::OR, dl, MVT::i128, low, high)); if (!InVT.isVector()) { - result = DAG.getNode( SPUISD::VEC2PREFSLOT, dl, InVT, result ); + result = DAG.getNode(SPUISD::VEC2PREFSLOT, dl, InVT, result ); } } @@ -764,8 +762,8 @@ // Get pointerinfos to the memory chunk(s) that contain the data to load uint64_t mpi_offset = SN->getPointerInfo().Offset; mpi_offset -= mpi_offset%16; - MachinePointerInfo lowMemPtr( SN->getPointerInfo().V, mpi_offset); - MachinePointerInfo highMemPtr( SN->getPointerInfo().V, mpi_offset+16); + MachinePointerInfo lowMemPtr(SN->getPointerInfo().V, mpi_offset); + MachinePointerInfo highMemPtr(SN->getPointerInfo().V, mpi_offset+16); // two sanity checks @@ -775,80 +773,78 @@ if (StVT.getSizeInBits() == 128 && alignment == 16) return SDValue(); + SDValue alignLoadVec; + SDValue basePtr = SN->getBasePtr(); + SDValue the_chain = SN->getChain(); + SDValue insertEltOffs; + + if (alignment == 16) { + ConstantSDNode *CN; + // Special cases for a known aligned load to simplify the base pointer + // and insertion byte: + if (basePtr.getOpcode() == ISD::ADD + && (CN = dyn_cast(basePtr.getOperand(1))) != 0) { + // Known offset into basePtr + int64_t offset = CN->getSExtValue(); + + // Simplify the base pointer for this case: + basePtr = basePtr.getOperand(0); + insertEltOffs = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, + basePtr, + DAG.getConstant((offset & 0xf), PtrVT)); - - SDValue alignLoadVec; - SDValue basePtr = SN->getBasePtr(); - SDValue the_chain = SN->getChain(); - SDValue insertEltOffs; - - if (alignment == 16) { - ConstantSDNode *CN; - // Special cases for a known aligned load to simplify the base pointer - // and insertion byte: - if (basePtr.getOpcode() == ISD::ADD - && (CN = dyn_cast(basePtr.getOperand(1))) != 0) { - // Known offset into basePtr - int64_t offset = CN->getSExtValue(); - - // Simplify the base pointer for this case: - basePtr = basePtr.getOperand(0); - insertEltOffs = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, - basePtr, - DAG.getConstant((offset & 0xf), PtrVT)); - - if ((offset & ~0xf) > 0) { - basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, - basePtr, - DAG.getConstant((offset & ~0xf), PtrVT)); - } - } else { - // Otherwise, assume it's at byte 0 of basePtr - insertEltOffs = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, - basePtr, - DAG.getConstant(0, PtrVT)); - basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, - basePtr, - DAG.getConstant(0, PtrVT)); - } - } else { - // Unaligned load: must be more pessimistic about addressing modes: - if (basePtr.getOpcode() == ISD::ADD) { - MachineFunction &MF = DAG.getMachineFunction(); - MachineRegisterInfo &RegInfo = MF.getRegInfo(); - unsigned VReg = RegInfo.createVirtualRegister(&SPU::R32CRegClass); - SDValue Flag; - - SDValue Op0 = basePtr.getOperand(0); - SDValue Op1 = basePtr.getOperand(1); - - if (isa(Op1)) { - // Convert the (add , ) to an indirect address contained - // in a register. Note that this is done because we need to avoid - // creating a 0(reg) d-form address due to the SPU's block loads. - basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, Op0, Op1); - the_chain = DAG.getCopyToReg(the_chain, dl, VReg, basePtr, Flag); - basePtr = DAG.getCopyFromReg(the_chain, dl, VReg, PtrVT); - } else { - // Convert the (add , ) to an indirect address, which - // will likely be lowered as a reg(reg) x-form address. - basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, Op0, Op1); - } - } else { + if ((offset & ~0xf) > 0) { basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, basePtr, - DAG.getConstant(0, PtrVT)); + DAG.getConstant((offset & ~0xf), PtrVT)); } - - // Insertion point is solely determined by basePtr's contents - insertEltOffs = DAG.getNode(ISD::ADD, dl, PtrVT, + } else { + // Otherwise, assume it's at byte 0 of basePtr + insertEltOffs = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, basePtr, DAG.getConstant(0, PtrVT)); + basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, + basePtr, + DAG.getConstant(0, PtrVT)); + } + } else { + // Unaligned load: must be more pessimistic about addressing modes: + if (basePtr.getOpcode() == ISD::ADD) { + MachineFunction &MF = DAG.getMachineFunction(); + MachineRegisterInfo &RegInfo = MF.getRegInfo(); + unsigned VReg = RegInfo.createVirtualRegister(&SPU::R32CRegClass); + SDValue Flag; + + SDValue Op0 = basePtr.getOperand(0); + SDValue Op1 = basePtr.getOperand(1); + + if (isa(Op1)) { + // Convert the (add , ) to an indirect address contained + // in a register. Note that this is done because we need to avoid + // creating a 0(reg) d-form address due to the SPU's block loads. + basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, Op0, Op1); + the_chain = DAG.getCopyToReg(the_chain, dl, VReg, basePtr, Flag); + basePtr = DAG.getCopyFromReg(the_chain, dl, VReg, PtrVT); + } else { + // Convert the (add , ) to an indirect address, which + // will likely be lowered as a reg(reg) x-form address. + basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, Op0, Op1); + } + } else { + basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, + basePtr, + DAG.getConstant(0, PtrVT)); } - // Load the lower part of the memory to which to store. - SDValue low = DAG.getLoad(vecVT, dl, the_chain, basePtr, - lowMemPtr, SN->isVolatile(), SN->isNonTemporal(), 16); + // Insertion point is solely determined by basePtr's contents + insertEltOffs = DAG.getNode(ISD::ADD, dl, PtrVT, + basePtr, + DAG.getConstant(0, PtrVT)); + } + + // Load the lower part of the memory to which to store. + SDValue low = DAG.getLoad(vecVT, dl, the_chain, basePtr, + lowMemPtr, SN->isVolatile(), SN->isNonTemporal(), 16); // if we don't need to store over the 16 byte boundary, one store suffices if (alignment >= StVT.getSizeInBits()/8) { @@ -893,17 +889,6 @@ LN->isVolatile(), LN->isNonTemporal(), 16); -#if 0 && !defined(NDEBUG) - if (DebugFlag && isCurrentDebugType(DEBUG_TYPE)) { - const SDValue ¤tRoot = DAG.getRoot(); - - DAG.setRoot(result); - errs() << "------- CellSPU:LowerStore result:\n"; - DAG.dump(); - errs() << "-------\n"; - DAG.setRoot(currentRoot); - } -#endif } // do the store when it might cross the 16 byte memory access boundary. else { @@ -1003,7 +988,6 @@ } return result; - } //! Generate the address of a constant pool entry. From ismail at namtrac.org Mon Nov 15 03:31:23 2010 From: ismail at namtrac.org (=?UTF-8?B?xLBzbWFpbCBEw7ZubWV6?=) Date: Mon, 15 Nov 2010 11:31:23 +0200 Subject: [llvm-commits] r119002 breaks snow.c from FFmpeg In-Reply-To: <4CE0F75E.9030701@free.fr> References: <4CE0F75E.9030701@free.fr> Message-ID: Hi Duncan; On Mon, Nov 15, 2010 at 11:03 AM, Duncan Sands wrote: > Hi ?smail, > > > According to >> http://fate.ffmpeg.org/x86_64-apple-darwin10-clang/20101114104032 clang >> has >> regressed wrt. ffmpeg regtesting. A quick search showed that r119002 broke >> snow.c . I attached preprocessed source code for snow.c. Here is the >> difference >> between working & non-working snow.c assemblies : >> > > sorry about that. Can you please attach complete assembler before and > after, > and also let me know what compile options were passed to clang. > Problem only reproduces with -O1 and later, attached is two files: snow-working.s snow-broken.s Thanks, ismail -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101115/76903859/attachment-0001.html -------------- next part -------------- A non-text attachment was scrubbed... Name: snow.tar.bz2 Type: application/x-bzip2 Size: 121002 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101115/76903859/attachment-0001.bz2 From jasonwkim at google.com Mon Nov 15 07:46:16 2010 From: jasonwkim at google.com (Jason Kim) Date: Mon, 15 Nov 2010 05:46:16 -0800 Subject: [llvm-commits] [PATCH] Object File Library In-Reply-To: References: Message-ID: I am curious as to how these patches will impact the existing MCObjectWriter code. What is the overall intent beyond llvm-nm and llvm-objdump? Thanks -jason On Sun, Nov 14, 2010 at 5:20 PM, Michael Spencer wrote: > 2010/11/14 Rafael Esp?ndola : >>> I have no problem with that. The only thing I don't like about them >>> currently is the super typedef macro I had to add to avoid adding 14 >>> lines of typedefs in each templated class :(. >> >> Can you declare a base class with just those typedefs? You could then use >> >> class foo : public ElfTypeDefs > > That's what I originally was trying to do. The problem is that you > have to explicitly bring the typedefs into scope because of some weird > C++ template rule. > >>> Oh, and I haven't decided how to add writing to >>> packed_endian_specific_integral yet. Currently it's not possible >>> (without reinterpret_cast). >> >> np. Whatever the solution is (even explicit method calls) is something >> that can be shared. >> >>> - Michael Spencer >>> >> >> Cheers, >> Rafael >> > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > From rafael.espindola at gmail.com Mon Nov 15 08:40:36 2010 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Mon, 15 Nov 2010 14:40:36 -0000 Subject: [llvm-commits] [llvm] r119144 - in /llvm/trunk: include/llvm/MC/MCSymbol.h lib/MC/MCParser/AsmParser.cpp lib/MC/MCSymbol.cpp test/MC/ELF/set.s Message-ID: <20101115144036.5515B2A6C12C@llvm.org> Author: rafael Date: Mon Nov 15 08:40:36 2010 New Revision: 119144 URL: http://llvm.org/viewvc/llvm-project?rev=119144&view=rev Log: Fix PR8565. This moves most of the isUsed logic to the MCSymbol itself. With this we get a bit more relaxed about allowing definitions after uses: uses that don't evaluate their argument immediately (jmp foo) are accepted. ddunbar, this was the smallest compromise I could think of that lets us accept gcc (and clang!) assembly. Added: llvm/trunk/test/MC/ELF/set.s Modified: llvm/trunk/include/llvm/MC/MCSymbol.h llvm/trunk/lib/MC/MCParser/AsmParser.cpp llvm/trunk/lib/MC/MCSymbol.cpp Modified: llvm/trunk/include/llvm/MC/MCSymbol.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCSymbol.h?rev=119144&r1=119143&r2=119144&view=diff ============================================================================== --- llvm/trunk/include/llvm/MC/MCSymbol.h (original) +++ llvm/trunk/include/llvm/MC/MCSymbol.h Mon Nov 15 08:40:36 2010 @@ -52,15 +52,14 @@ /// "Lfoo" or ".foo". unsigned IsTemporary : 1; - /// IsUsedInExpr - True if this symbol has been used in an expression and - /// cannot be redefined. - unsigned IsUsedInExpr : 1; + /// IsUsed - True if this symbol has been used. + mutable unsigned IsUsed : 1; private: // MCContext creates and uniques these. friend class MCContext; MCSymbol(StringRef name, bool isTemporary) : Name(name), Section(0), Value(0), - IsTemporary(isTemporary), IsUsedInExpr(false) {} + IsTemporary(isTemporary), IsUsed(false) {} MCSymbol(const MCSymbol&); // DO NOT IMPLEMENT void operator=(const MCSymbol&); // DO NOT IMPLEMENT @@ -74,9 +73,9 @@ /// isTemporary - Check if this is an assembler temporary symbol. bool isTemporary() const { return IsTemporary; } - /// isUsedInExpr - Check if this is an assembler temporary symbol. - bool isUsedInExpr() const { return IsUsedInExpr; } - void setUsedInExpr(bool Value) { IsUsedInExpr = Value; } + /// isUsed - Check if this is used. + bool isUsed() const { return IsUsed; } + void setUsed(bool Value) const { IsUsed = Value; } /// @} /// @name Associated Sections @@ -135,6 +134,7 @@ /// getValue() - Get the value for variable symbols. const MCExpr *getVariableValue() const { assert(isVariable() && "Invalid accessor!"); + IsUsed = true; return Value; } Modified: llvm/trunk/lib/MC/MCParser/AsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCParser/AsmParser.cpp?rev=119144&r1=119143&r2=119144&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCParser/AsmParser.cpp (original) +++ llvm/trunk/lib/MC/MCParser/AsmParser.cpp Mon Nov 15 08:40:36 2010 @@ -485,9 +485,6 @@ std::pair Split = Identifier.split('@'); MCSymbol *Sym = getContext().GetOrCreateSymbol(Split.first); - // Mark the symbol as used in an expression. - Sym->setUsedInExpr(true); - // Lookup the symbol variant if used. MCSymbolRefExpr::VariantKind Variant = MCSymbolRefExpr::VK_None; if (Split.first.size() != Identifier.size()) { @@ -1191,6 +1188,25 @@ ActiveMacros.pop_back(); } +static void MarkUsed(const MCExpr *Value) { + switch (Value->getKind()) { + case MCExpr::Binary: + MarkUsed(static_cast(Value)->getLHS()); + MarkUsed(static_cast(Value)->getRHS()); + break; + case MCExpr::Target: + case MCExpr::Constant: + break; + case MCExpr::SymbolRef: { + static_cast(Value)->getSymbol().setUsed(true); + break; + } + case MCExpr::Unary: + MarkUsed(static_cast(Value)->getSubExpr()); + break; + } +} + bool AsmParser::ParseAssignment(StringRef Name) { // FIXME: Use better location, we should use proper tokens. SMLoc EqualLoc = Lexer.getLoc(); @@ -1199,6 +1215,8 @@ if (ParseExpression(Value)) return true; + MarkUsed(Value); + if (Lexer.isNot(AsmToken::EndOfStatement)) return TokError("unexpected token in assignment"); @@ -1213,7 +1231,7 @@ // // FIXME: Diagnostics. Note the location of the definition as a label. // FIXME: Diagnose assignment to protected identifier (e.g., register name). - if (Sym->isUndefined() && !Sym->isUsedInExpr()) + if (Sym->isUndefined() && !Sym->isUsed() && !Sym->isVariable()) ; // Allow redefinitions of undefined symbols only used in directives. else if (!Sym->isUndefined() && !Sym->isAbsolute()) return Error(EqualLoc, "redefinition of '" + Name + "'"); @@ -1222,13 +1240,14 @@ else if (!isa(Sym->getVariableValue())) return Error(EqualLoc, "invalid reassignment of non-absolute variable '" + Name + "'"); + + // Don't count these checks as uses. + Sym->setUsed(false); } else Sym = getContext().GetOrCreateSymbol(Name); // FIXME: Handle '.'. - Sym->setUsedInExpr(true); - // Do the assignment. Out.EmitAssignment(Sym, Value); Modified: llvm/trunk/lib/MC/MCSymbol.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCSymbol.cpp?rev=119144&r1=119143&r2=119144&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCSymbol.cpp (original) +++ llvm/trunk/lib/MC/MCSymbol.cpp Mon Nov 15 08:40:36 2010 @@ -40,6 +40,7 @@ } void MCSymbol::setVariableValue(const MCExpr *Value) { + assert(!IsUsed && "Cannot set a variable that has already been used."); assert(Value && "Invalid variable value!"); assert((isUndefined() || (isAbsolute() && isa(Value))) && "Invalid redefinition!"); Added: llvm/trunk/test/MC/ELF/set.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/set.s?rev=119144&view=auto ============================================================================== --- llvm/trunk/test/MC/ELF/set.s (added) +++ llvm/trunk/test/MC/ELF/set.s Mon Nov 15 08:40:36 2010 @@ -0,0 +1,21 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + +// Test that we accept .set of a symbol after it has been used in a statement. + + jmp foo + .set foo, bar + +// or a .quad + + .quad foo2 + .set foo2,bar2 + +// Test that there is an undefined reference to bar +// CHECK: (('st_name', 0x00000001) # 'bar' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ('st_value', 0x00000000) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ), From jason.w.kim.2009 at gmail.com Mon Nov 15 10:18:39 2010 From: jason.w.kim.2009 at gmail.com (Jason W Kim) Date: Mon, 15 Nov 2010 16:18:39 -0000 Subject: [llvm-commits] [llvm] r119149 - /llvm/trunk/lib/MC/ELFObjectWriter.cpp Message-ID: <20101115161839.3145F2A6C12C@llvm.org> Author: jasonwkim Date: Mon Nov 15 10:18:39 2010 New Revision: 119149 URL: http://llvm.org/viewvc/llvm-project?rev=119149&view=rev Log: Dovetail with Dan Dunbar's rework of ELFObjectWriter. Added 2 new subclasses - X86ELFObjectWriter and ARMELFObectWriter. ARM and X86 require different code for RecordRelocation(), possibly others. Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/ELFObjectWriter.cpp?rev=119149&r1=119148&r2=119149&view=diff ============================================================================== --- llvm/trunk/lib/MC/ELFObjectWriter.cpp (original) +++ llvm/trunk/lib/MC/ELFObjectWriter.cpp Mon Nov 15 10:18:39 2010 @@ -99,6 +99,7 @@ namespace { class ELFObjectWriter : public MCObjectWriter { + protected: /*static bool isFixupKindX86RIPRel(unsigned Kind) { return Kind == X86::reloc_riprel_4byte || Kind == X86::reloc_riprel_4byte_movq_load; @@ -194,7 +195,9 @@ Is64Bit(_Is64Bit), HasRelocationAddend(_HasRelAddend), OSType(_OSType), EMachine(_EMachine) { } - + + virtual ~ELFObjectWriter(); + void WriteWord(uint64_t W) { if (Is64Bit) Write64(W); @@ -265,29 +268,31 @@ F.getContents() += StringRef(buf, 8); } - void WriteHeader(uint64_t SectionDataSize, unsigned NumberOfSections); + virtual void WriteHeader(uint64_t SectionDataSize, unsigned NumberOfSections); - void WriteSymbolEntry(MCDataFragment *SymtabF, MCDataFragment *ShndxF, + virtual void WriteSymbolEntry(MCDataFragment *SymtabF, MCDataFragment *ShndxF, uint64_t name, uint8_t info, uint64_t value, uint64_t size, uint8_t other, uint32_t shndx, bool Reserved); - void WriteSymbol(MCDataFragment *SymtabF, MCDataFragment *ShndxF, + virtual void WriteSymbol(MCDataFragment *SymtabF, MCDataFragment *ShndxF, ELFSymbolData &MSD, const MCAsmLayout &Layout); typedef DenseMap SectionIndexMapTy; - void WriteSymbolTable(MCDataFragment *SymtabF, MCDataFragment *ShndxF, + virtual void WriteSymbolTable(MCDataFragment *SymtabF, MCDataFragment *ShndxF, const MCAssembler &Asm, const MCAsmLayout &Layout, const SectionIndexMapTy &SectionIndexMap); - void RecordRelocation(const MCAssembler &Asm, const MCAsmLayout &Layout, + virtual void RecordRelocation(const MCAssembler &Asm, const MCAsmLayout &Layout, const MCFragment *Fragment, const MCFixup &Fixup, - MCValue Target, uint64_t &FixedValue); + MCValue Target, uint64_t &FixedValue) { + assert(0 && "RecordRelocation is not specific enough"); + }; - uint64_t getSymbolIndexInSymbolTable(const MCAssembler &Asm, + virtual uint64_t getSymbolIndexInSymbolTable(const MCAssembler &Asm, const MCSymbol *S); // Map from a group section to the signature symbol @@ -300,54 +305,89 @@ /// \param StringTable [out] - The string table data. /// \param StringIndexMap [out] - Map from symbol names to offsets in the /// string table. - void ComputeSymbolTable(MCAssembler &Asm, + virtual void ComputeSymbolTable(MCAssembler &Asm, const SectionIndexMapTy &SectionIndexMap, RevGroupMapTy RevGroupMap); - void ComputeIndexMap(MCAssembler &Asm, + virtual void ComputeIndexMap(MCAssembler &Asm, SectionIndexMapTy &SectionIndexMap); - void WriteRelocation(MCAssembler &Asm, MCAsmLayout &Layout, + virtual void WriteRelocation(MCAssembler &Asm, MCAsmLayout &Layout, const MCSectionData &SD); - void WriteRelocations(MCAssembler &Asm, MCAsmLayout &Layout) { + virtual void WriteRelocations(MCAssembler &Asm, MCAsmLayout &Layout) { for (MCAssembler::const_iterator it = Asm.begin(), ie = Asm.end(); it != ie; ++it) { WriteRelocation(Asm, Layout, *it); } } - void CreateMetadataSections(MCAssembler &Asm, MCAsmLayout &Layout, + virtual void CreateMetadataSections(MCAssembler &Asm, MCAsmLayout &Layout, const SectionIndexMapTy &SectionIndexMap); - void CreateGroupSections(MCAssembler &Asm, MCAsmLayout &Layout, + virtual void CreateGroupSections(MCAssembler &Asm, MCAsmLayout &Layout, GroupMapTy &GroupMap, RevGroupMapTy &RevGroupMap); - void ExecutePostLayoutBinding(MCAssembler &Asm); + virtual void ExecutePostLayoutBinding(MCAssembler &Asm); - void WriteSecHdrEntry(uint32_t Name, uint32_t Type, uint64_t Flags, + virtual void WriteSecHdrEntry(uint32_t Name, uint32_t Type, uint64_t Flags, uint64_t Address, uint64_t Offset, uint64_t Size, uint32_t Link, uint32_t Info, uint64_t Alignment, uint64_t EntrySize); - void WriteRelocationsFragment(const MCAssembler &Asm, MCDataFragment *F, + virtual void WriteRelocationsFragment(const MCAssembler &Asm, MCDataFragment *F, const MCSectionData *SD); - bool IsFixupFullyResolved(const MCAssembler &Asm, + virtual bool IsFixupFullyResolved(const MCAssembler &Asm, const MCValue Target, bool IsPCRel, const MCFragment *DF) const; - void WriteObject(MCAssembler &Asm, const MCAsmLayout &Layout); - void WriteSection(MCAssembler &Asm, + virtual void WriteObject(MCAssembler &Asm, const MCAsmLayout &Layout); + virtual void WriteSection(MCAssembler &Asm, const SectionIndexMapTy &SectionIndexMap, uint32_t GroupSymbolIndex, uint64_t Offset, uint64_t Size, uint64_t Alignment, const MCSectionELF &Section); }; + //===- X86ELFObjectWriter -------------------------------------------===// + + class X86ELFObjectWriter : public ELFObjectWriter { + public: + X86ELFObjectWriter(raw_ostream &_OS, bool _Is64Bit, bool IsLittleEndian, + uint16_t _EMachine, bool _HasRelAddend, + Triple::OSType _OSType); + + virtual ~X86ELFObjectWriter(); + virtual void RecordRelocation(const MCAssembler &Asm, + const MCAsmLayout &Layout, + const MCFragment *Fragment, + const MCFixup &Fixup, MCValue Target, + uint64_t &FixedValue); + }; + + + //===- ARMELFObjectWriter -------------------------------------------===// + + class ARMELFObjectWriter : public ELFObjectWriter { + public: + ARMELFObjectWriter(raw_ostream &_OS, bool _Is64Bit, bool IsLittleEndian, + uint16_t _EMachine, bool _HasRelAddend, + Triple::OSType _OSType); + + virtual ~ARMELFObjectWriter(); + virtual void RecordRelocation(const MCAssembler &Asm, + const MCAsmLayout &Layout, + const MCFragment *Fragment, + const MCFixup &Fixup, MCValue Target, + uint64_t &FixedValue); + }; } +ELFObjectWriter::~ELFObjectWriter() +{} + // Emit the ELF header. void ELFObjectWriter::WriteHeader(uint64_t SectionDataSize, unsigned NumberOfSections) { @@ -678,207 +718,6 @@ return NULL; } -// FIXME: this is currently X86/X86_64 only -void ELFObjectWriter::RecordRelocation(const MCAssembler &Asm, - const MCAsmLayout &Layout, - const MCFragment *Fragment, - const MCFixup &Fixup, - MCValue Target, - uint64_t &FixedValue) { - int64_t Addend = 0; - int Index = 0; - int64_t Value = Target.getConstant(); - const MCSymbol &Symbol = Target.getSymA()->getSymbol(); - const MCSymbol *RelocSymbol = SymbolToReloc(Asm, Target, *Fragment); - - bool IsPCRel = isFixupKindX86PCRel(Fixup.getKind()); - if (!Target.isAbsolute()) { - if (const MCSymbolRefExpr *RefB = Target.getSymB()) { - const MCSymbol &SymbolB = RefB->getSymbol(); - MCSymbolData &SDB = Asm.getSymbolData(SymbolB); - IsPCRel = true; - MCSectionData *Sec = Fragment->getParent(); - - // Offset of the symbol in the section - int64_t a = Layout.getSymbolAddress(&SDB) - Layout.getSectionAddress(Sec); - - // Ofeset of the relocation in the section - int64_t b = Layout.getFragmentOffset(Fragment) + Fixup.getOffset(); - Value += b - a; - } - - if (!RelocSymbol) { - MCSymbolData &SD = Asm.getSymbolData(Symbol); - MCFragment *F = SD.getFragment(); - - Index = F->getParent()->getOrdinal(); - - MCSectionData *FSD = F->getParent(); - // Offset of the symbol in the section - Value += Layout.getSymbolAddress(&SD) - Layout.getSectionAddress(FSD); - } else { - if (Asm.getSymbolData(Symbol).getFlags() & ELF_Other_Weakref) - WeakrefUsedInReloc.insert(RelocSymbol); - else - UsedInReloc.insert(RelocSymbol); - Index = -1; - } - Addend = Value; - // Compensate for the addend on i386. - if (Is64Bit) - Value = 0; - } - - FixedValue = Value; - - // determine the type of the relocation - - MCSymbolRefExpr::VariantKind Modifier = Target.getSymA()->getKind(); - unsigned Type; - if (Is64Bit) { - if (IsPCRel) { - switch (Modifier) { - default: - llvm_unreachable("Unimplemented"); - case MCSymbolRefExpr::VK_None: - Type = ELF::R_X86_64_PC32; - break; - case MCSymbolRefExpr::VK_PLT: - Type = ELF::R_X86_64_PLT32; - break; - case MCSymbolRefExpr::VK_GOTPCREL: - Type = ELF::R_X86_64_GOTPCREL; - break; - case MCSymbolRefExpr::VK_GOTTPOFF: - Type = ELF::R_X86_64_GOTTPOFF; - break; - case MCSymbolRefExpr::VK_TLSGD: - Type = ELF::R_X86_64_TLSGD; - break; - case MCSymbolRefExpr::VK_TLSLD: - Type = ELF::R_X86_64_TLSLD; - break; - } - } else { - switch ((unsigned)Fixup.getKind()) { - default: llvm_unreachable("invalid fixup kind!"); - case FK_Data_8: Type = ELF::R_X86_64_64; break; - case X86::reloc_signed_4byte: - case X86::reloc_pcrel_4byte: - assert(isInt<32>(Target.getConstant())); - switch (Modifier) { - default: - llvm_unreachable("Unimplemented"); - case MCSymbolRefExpr::VK_None: - Type = ELF::R_X86_64_32S; - break; - case MCSymbolRefExpr::VK_GOT: - Type = ELF::R_X86_64_GOT32; - break; - case MCSymbolRefExpr::VK_GOTPCREL: - Type = ELF::R_X86_64_GOTPCREL; - break; - case MCSymbolRefExpr::VK_TPOFF: - Type = ELF::R_X86_64_TPOFF32; - break; - case MCSymbolRefExpr::VK_DTPOFF: - Type = ELF::R_X86_64_DTPOFF32; - break; - } - break; - case FK_Data_4: - Type = ELF::R_X86_64_32; - break; - case FK_Data_2: Type = ELF::R_X86_64_16; break; - case X86::reloc_pcrel_1byte: - case FK_Data_1: Type = ELF::R_X86_64_8; break; - } - } - } else { - if (IsPCRel) { - switch (Modifier) { - default: - llvm_unreachable("Unimplemented"); - case MCSymbolRefExpr::VK_None: - Type = ELF::R_386_PC32; - break; - case MCSymbolRefExpr::VK_PLT: - Type = ELF::R_386_PLT32; - break; - } - } else { - switch ((unsigned)Fixup.getKind()) { - default: llvm_unreachable("invalid fixup kind!"); - - case X86::reloc_global_offset_table: - Type = ELF::R_386_GOTPC; - break; - - // FIXME: Should we avoid selecting reloc_signed_4byte in 32 bit mode - // instead? - case X86::reloc_signed_4byte: - case X86::reloc_pcrel_4byte: - case FK_Data_4: - switch (Modifier) { - default: - llvm_unreachable("Unimplemented"); - case MCSymbolRefExpr::VK_None: - Type = ELF::R_386_32; - break; - case MCSymbolRefExpr::VK_GOT: - Type = ELF::R_386_GOT32; - break; - case MCSymbolRefExpr::VK_GOTOFF: - Type = ELF::R_386_GOTOFF; - break; - case MCSymbolRefExpr::VK_TLSGD: - Type = ELF::R_386_TLS_GD; - break; - case MCSymbolRefExpr::VK_TPOFF: - Type = ELF::R_386_TLS_LE_32; - break; - case MCSymbolRefExpr::VK_INDNTPOFF: - Type = ELF::R_386_TLS_IE; - break; - case MCSymbolRefExpr::VK_NTPOFF: - Type = ELF::R_386_TLS_LE; - break; - case MCSymbolRefExpr::VK_GOTNTPOFF: - Type = ELF::R_386_TLS_GOTIE; - break; - case MCSymbolRefExpr::VK_TLSLDM: - Type = ELF::R_386_TLS_LDM; - break; - case MCSymbolRefExpr::VK_DTPOFF: - Type = ELF::R_386_TLS_LDO_32; - break; - } - break; - case FK_Data_2: Type = ELF::R_386_16; break; - case X86::reloc_pcrel_1byte: - case FK_Data_1: Type = ELF::R_386_8; break; - } - } - } - - if (RelocNeedsGOT(Modifier)) - NeedsGOT = true; - - ELFRelocationEntry ERE; - - ERE.Index = Index; - ERE.Type = Type; - ERE.Symbol = RelocSymbol; - - ERE.r_offset = Layout.getFragmentOffset(Fragment) + Fixup.getOffset(); - - if (HasRelocationAddend) - ERE.r_addend = Addend; - else - ERE.r_addend = 0; // Silence compiler warning. - - Relocations[Fragment->getParent()].push_back(ERE); -} uint64_t ELFObjectWriter::getSymbolIndexInSymbolTable(const MCAssembler &Asm, @@ -1512,6 +1351,255 @@ uint16_t EMachine, bool IsLittleEndian, bool HasRelocationAddend) { - return new ELFObjectWriter(OS, Is64Bit, IsLittleEndian, EMachine, - HasRelocationAddend, OSType); + switch (EMachine) { + case ELF::EM_386: + case ELF::EM_X86_64: + return new X86ELFObjectWriter(OS, Is64Bit, IsLittleEndian, EMachine, + HasRelocationAddend, OSType); break; + case ELF::EM_ARM: + return new ARMELFObjectWriter(OS, Is64Bit, IsLittleEndian, EMachine, + HasRelocationAddend, OSType); break; + default: assert(0 && "Unsupported architecture"); break; + } +} + + +/// START OF SUBCLASSES for ELFObjectWriter +//===- ARMELFObjectWriter -------------------------------------------===// + +ARMELFObjectWriter::ARMELFObjectWriter(raw_ostream &_OS, bool _Is64Bit, + bool _IsLittleEndian, + uint16_t _EMachine, bool _HasRelocationAddend, + Triple::OSType _OSType) + : ELFObjectWriter(_OS, _Is64Bit, _IsLittleEndian, _EMachine, + _HasRelocationAddend, _OSType) +{} + +ARMELFObjectWriter::~ARMELFObjectWriter() +{} + +void ARMELFObjectWriter::RecordRelocation(const MCAssembler &Asm, + const MCAsmLayout &Layout, + const MCFragment *Fragment, + const MCFixup &Fixup, + MCValue Target, + uint64_t &FixedValue) { + assert(0 && "ARMELFObjectWriter::RecordRelocation() unimplemented"); +} + + + +//===- X86ELFObjectWriter -------------------------------------------===// + + +X86ELFObjectWriter::X86ELFObjectWriter(raw_ostream &_OS, bool _Is64Bit, + bool _IsLittleEndian, + uint16_t _EMachine, bool _HasRelocationAddend, + Triple::OSType _OSType) + : ELFObjectWriter(_OS, _Is64Bit, _IsLittleEndian, _EMachine, + _HasRelocationAddend, _OSType) +{} + +X86ELFObjectWriter::~X86ELFObjectWriter() +{} + +void X86ELFObjectWriter::RecordRelocation(const MCAssembler &Asm, + const MCAsmLayout &Layout, + const MCFragment *Fragment, + const MCFixup &Fixup, + MCValue Target, + uint64_t &FixedValue) { + int64_t Addend = 0; + int Index = 0; + int64_t Value = Target.getConstant(); + const MCSymbol &Symbol = Target.getSymA()->getSymbol(); + const MCSymbol *RelocSymbol = SymbolToReloc(Asm, Target, *Fragment); + + bool IsPCRel = isFixupKindX86PCRel(Fixup.getKind()); + if (!Target.isAbsolute()) { + if (const MCSymbolRefExpr *RefB = Target.getSymB()) { + const MCSymbol &SymbolB = RefB->getSymbol(); + MCSymbolData &SDB = Asm.getSymbolData(SymbolB); + IsPCRel = true; + MCSectionData *Sec = Fragment->getParent(); + + // Offset of the symbol in the section + int64_t a = Layout.getSymbolAddress(&SDB) - Layout.getSectionAddress(Sec); + + // Ofeset of the relocation in the section + int64_t b = Layout.getFragmentOffset(Fragment) + Fixup.getOffset(); + Value += b - a; + } + + if (!RelocSymbol) { + MCSymbolData &SD = Asm.getSymbolData(Symbol); + MCFragment *F = SD.getFragment(); + + Index = F->getParent()->getOrdinal(); + + MCSectionData *FSD = F->getParent(); + // Offset of the symbol in the section + Value += Layout.getSymbolAddress(&SD) - Layout.getSectionAddress(FSD); + } else { + if (Asm.getSymbolData(Symbol).getFlags() & ELF_Other_Weakref) + WeakrefUsedInReloc.insert(RelocSymbol); + else + UsedInReloc.insert(RelocSymbol); + Index = -1; + } + Addend = Value; + // Compensate for the addend on i386. + if (Is64Bit) + Value = 0; + } + + FixedValue = Value; + + // determine the type of the relocation + + MCSymbolRefExpr::VariantKind Modifier = Target.getSymA()->getKind(); + unsigned Type; + if (Is64Bit) { + if (IsPCRel) { + switch (Modifier) { + default: + llvm_unreachable("Unimplemented"); + case MCSymbolRefExpr::VK_None: + Type = ELF::R_X86_64_PC32; + break; + case MCSymbolRefExpr::VK_PLT: + Type = ELF::R_X86_64_PLT32; + break; + case MCSymbolRefExpr::VK_GOTPCREL: + Type = ELF::R_X86_64_GOTPCREL; + break; + case MCSymbolRefExpr::VK_GOTTPOFF: + Type = ELF::R_X86_64_GOTTPOFF; + break; + case MCSymbolRefExpr::VK_TLSGD: + Type = ELF::R_X86_64_TLSGD; + break; + case MCSymbolRefExpr::VK_TLSLD: + Type = ELF::R_X86_64_TLSLD; + break; + } + } else { + switch ((unsigned)Fixup.getKind()) { + default: llvm_unreachable("invalid fixup kind!"); + case FK_Data_8: Type = ELF::R_X86_64_64; break; + case X86::reloc_signed_4byte: + case X86::reloc_pcrel_4byte: + assert(isInt<32>(Target.getConstant())); + switch (Modifier) { + default: + llvm_unreachable("Unimplemented"); + case MCSymbolRefExpr::VK_None: + Type = ELF::R_X86_64_32S; + break; + case MCSymbolRefExpr::VK_GOT: + Type = ELF::R_X86_64_GOT32; + break; + case MCSymbolRefExpr::VK_GOTPCREL: + Type = ELF::R_X86_64_GOTPCREL; + break; + case MCSymbolRefExpr::VK_TPOFF: + Type = ELF::R_X86_64_TPOFF32; + break; + case MCSymbolRefExpr::VK_DTPOFF: + Type = ELF::R_X86_64_DTPOFF32; + break; + } + break; + case FK_Data_4: + Type = ELF::R_X86_64_32; + break; + case FK_Data_2: Type = ELF::R_X86_64_16; break; + case X86::reloc_pcrel_1byte: + case FK_Data_1: Type = ELF::R_X86_64_8; break; + } + } + } else { + if (IsPCRel) { + switch (Modifier) { + default: + llvm_unreachable("Unimplemented"); + case MCSymbolRefExpr::VK_None: + Type = ELF::R_386_PC32; + break; + case MCSymbolRefExpr::VK_PLT: + Type = ELF::R_386_PLT32; + break; + } + } else { + switch ((unsigned)Fixup.getKind()) { + default: llvm_unreachable("invalid fixup kind!"); + + case X86::reloc_global_offset_table: + Type = ELF::R_386_GOTPC; + break; + + // FIXME: Should we avoid selecting reloc_signed_4byte in 32 bit mode + // instead? + case X86::reloc_signed_4byte: + case X86::reloc_pcrel_4byte: + case FK_Data_4: + switch (Modifier) { + default: + llvm_unreachable("Unimplemented"); + case MCSymbolRefExpr::VK_None: + Type = ELF::R_386_32; + break; + case MCSymbolRefExpr::VK_GOT: + Type = ELF::R_386_GOT32; + break; + case MCSymbolRefExpr::VK_GOTOFF: + Type = ELF::R_386_GOTOFF; + break; + case MCSymbolRefExpr::VK_TLSGD: + Type = ELF::R_386_TLS_GD; + break; + case MCSymbolRefExpr::VK_TPOFF: + Type = ELF::R_386_TLS_LE_32; + break; + case MCSymbolRefExpr::VK_INDNTPOFF: + Type = ELF::R_386_TLS_IE; + break; + case MCSymbolRefExpr::VK_NTPOFF: + Type = ELF::R_386_TLS_LE; + break; + case MCSymbolRefExpr::VK_GOTNTPOFF: + Type = ELF::R_386_TLS_GOTIE; + break; + case MCSymbolRefExpr::VK_TLSLDM: + Type = ELF::R_386_TLS_LDM; + break; + case MCSymbolRefExpr::VK_DTPOFF: + Type = ELF::R_386_TLS_LDO_32; + break; + } + break; + case FK_Data_2: Type = ELF::R_386_16; break; + case X86::reloc_pcrel_1byte: + case FK_Data_1: Type = ELF::R_386_8; break; + } + } + } + + if (RelocNeedsGOT(Modifier)) + NeedsGOT = true; + + ELFRelocationEntry ERE; + + ERE.Index = Index; + ERE.Type = Type; + ERE.Symbol = RelocSymbol; + + ERE.r_offset = Layout.getFragmentOffset(Fragment) + Fixup.getOffset(); + + if (HasRelocationAddend) + ERE.r_addend = Addend; + else + ERE.r_addend = 0; // Silence compiler warning. + + Relocations[Fragment->getParent()].push_back(ERE); } From rafael.espindola at gmail.com Mon Nov 15 10:33:49 2010 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Mon, 15 Nov 2010 16:33:49 -0000 Subject: [llvm-commits] [llvm] r119152 - in /llvm/trunk: include/llvm/MC/MCSymbol.h lib/MC/ELFObjectWriter.cpp lib/MC/MCAssembler.cpp lib/MC/MCELFStreamer.cpp lib/MC/MCExpr.cpp lib/MC/MCSymbol.cpp test/MC/ELF/alias-reloc.s Message-ID: <20101115163349.DFB262A6C12C@llvm.org> Author: rafael Date: Mon Nov 15 10:33:49 2010 New Revision: 119152 URL: http://llvm.org/viewvc/llvm-project?rev=119152&view=rev Log: Change MCExpr::EvaluateAsRelocatableImpl of variables to return the original variable if recursing fails to simplify it. Factor AliasedSymbol to be a method of MCSymbol. Update MCAssembler::EvaluateFixup to match the change in EvaluateAsRelocatableImpl. Remove the WeakRefExpr hack, as the object writer now sees the weakref with no extra effort needed. Nothing else is using MCTargetExpr, but keep it for now. Now that the ELF writer sees relocations with aliases, handle .weak foo2 foo2: .weak bar2 .set bar2,foo2 .quad bar2 the same way gas does and produce a relocation with bar2. Modified: llvm/trunk/include/llvm/MC/MCSymbol.h llvm/trunk/lib/MC/ELFObjectWriter.cpp llvm/trunk/lib/MC/MCAssembler.cpp llvm/trunk/lib/MC/MCELFStreamer.cpp llvm/trunk/lib/MC/MCExpr.cpp llvm/trunk/lib/MC/MCSymbol.cpp llvm/trunk/test/MC/ELF/alias-reloc.s Modified: llvm/trunk/include/llvm/MC/MCSymbol.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCSymbol.h?rev=119152&r1=119151&r2=119152&view=diff ============================================================================== --- llvm/trunk/include/llvm/MC/MCSymbol.h (original) +++ llvm/trunk/include/llvm/MC/MCSymbol.h Mon Nov 15 10:33:49 2010 @@ -138,6 +138,11 @@ return Value; } + // AliasedSymbol() - If this is an alias (a = b), return the symbol + // we ultimately point to. For a non alias, this just returns the symbol + // itself. + const MCSymbol &AliasedSymbol() const; + void setVariableValue(const MCExpr *Value); /// @} Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/ELFObjectWriter.cpp?rev=119152&r1=119151&r2=119152&view=diff ============================================================================== --- llvm/trunk/lib/MC/ELFObjectWriter.cpp (original) +++ llvm/trunk/lib/MC/ELFObjectWriter.cpp Mon Nov 15 10:33:49 2010 @@ -504,31 +504,6 @@ return 0; } -static const MCSymbol &AliasedSymbol(const MCSymbol &Symbol) { - const MCSymbol *S = &Symbol; - while (S->isVariable()) { - const MCExpr *Value = S->getVariableValue(); - MCExpr::ExprKind Kind = Value->getKind(); - switch (Kind) { - case MCExpr::SymbolRef: { - const MCSymbolRefExpr *Ref = static_cast(Value); - S = &Ref->getSymbol(); - break; - } - case MCExpr::Target: { - const MCTargetExpr *TExp = static_cast(Value); - MCValue Res; - TExp->EvaluateAsRelocatableImpl(Res, NULL); - S = &Res.getSymA()->getSymbol(); - break; - } - default: - return *S; - } - } - return *S; -} - void ELFObjectWriter::ExecutePostLayoutBinding(MCAssembler &Asm) { // The presence of symbol versions causes undefined symbols and // versions declared with @@@ to be renamed. @@ -536,7 +511,7 @@ for (MCAssembler::symbol_iterator it = Asm.symbol_begin(), ie = Asm.symbol_end(); it != ie; ++it) { const MCSymbol &Alias = it->getSymbol(); - const MCSymbol &Symbol = AliasedSymbol(Alias); + const MCSymbol &Symbol = Alias.AliasedSymbol(); MCSymbolData &SD = Asm.getSymbolData(Symbol); // Not an alias. @@ -572,7 +547,7 @@ const MCAsmLayout &Layout) { MCSymbolData &OrigData = *MSD.SymbolData; MCSymbolData &Data = - Layout.getAssembler().getSymbolData(AliasedSymbol(OrigData.getSymbol())); + Layout.getAssembler().getSymbolData(OrigData.getSymbol().AliasedSymbol()); bool IsReserved = Data.isCommon() || Data.getSymbol().isAbsolute() || Data.getSymbol().isVariable(); @@ -673,28 +648,24 @@ const MCValue &Target, const MCFragment &F) const { const MCSymbol &Symbol = Target.getSymA()->getSymbol(); - const MCSymbol &ASymbol = AliasedSymbol(Symbol); - const MCSymbol *RenamedP = Renames.lookup(&Symbol); - - if (!RenamedP) { - if (Target.getSymA()->getKind() == MCSymbolRefExpr::VK_None || - Asm.getSymbolData(Symbol).getFlags() & ELF_Other_Weakref) - RenamedP = &ASymbol; - else - RenamedP = &Symbol; + const MCSymbol &ASymbol = Symbol.AliasedSymbol(); + const MCSymbol *Renamed = Renames.lookup(&Symbol); + const MCSymbolData &SD = Asm.getSymbolData(Symbol); + + if (ASymbol.isUndefined()) { + if (Renamed) + return Renamed; + return &ASymbol; } - const MCSymbol &Renamed = *RenamedP; - - MCSymbolData &SD = Asm.getSymbolData(Symbol); - - if (Symbol.isUndefined()) - return &Renamed; - if (SD.isExternal()) - return &Renamed; + if (SD.isExternal()) { + if (Renamed) + return Renamed; + return &Symbol; + } const MCSectionELF &Section = - static_cast(Symbol.getSection()); + static_cast(ASymbol.getSection()); if (Section.getKind().isBSS()) return NULL; @@ -706,13 +677,18 @@ if (&Sec2 != &Section && (Kind == MCSymbolRefExpr::VK_PLT || Kind == MCSymbolRefExpr::VK_GOTPCREL || - Kind == MCSymbolRefExpr::VK_GOTOFF)) - return &Renamed; + Kind == MCSymbolRefExpr::VK_GOTOFF)) { + if (Renamed) + return Renamed; + return &Symbol; + } if (Section.getFlags() & MCSectionELF::SHF_MERGE) { - if (Target.getConstant() != 0) - return &Renamed; - return NULL; + if (Target.getConstant() == 0) + return NULL; + if (Renamed) + return Renamed; + return &Symbol; } return NULL; @@ -742,7 +718,7 @@ if (Symbol.getName() == "_GLOBAL_OFFSET_TABLE_") return true; - const MCSymbol &A = AliasedSymbol(Symbol); + const MCSymbol &A = Symbol.AliasedSymbol(); if (!A.isVariable() && A.isUndefined() && !Data.isCommon()) return false; @@ -761,7 +737,7 @@ return false; const MCSymbol &Symbol = Data.getSymbol(); - const MCSymbol &RefSymbol = AliasedSymbol(Symbol); + const MCSymbol &RefSymbol = Symbol.AliasedSymbol(); if (RefSymbol.isUndefined() && !RefSymbol.isVariable()) { if (isSignature && !isUsedInReloc) @@ -830,7 +806,7 @@ ELFSymbolData MSD; MSD.SymbolData = it; - const MCSymbol &RefSymbol = AliasedSymbol(Symbol); + const MCSymbol &RefSymbol = Symbol.AliasedSymbol(); // Undefined symbols are global, but this is the first place we // are able to set it. @@ -1104,13 +1080,13 @@ const MCSection *SectionA = 0; const MCSymbol *SymbolA = 0; if (const MCSymbolRefExpr *A = Target.getSymA()) { - SymbolA = &A->getSymbol(); + SymbolA = &A->getSymbol().AliasedSymbol(); SectionA = &SymbolA->getSection(); } const MCSection *SectionB = 0; if (const MCSymbolRefExpr *B = Target.getSymB()) { - SectionB = &B->getSymbol().getSection(); + SectionB = &B->getSymbol().AliasedSymbol().getSection(); } if (!BaseSection) @@ -1413,6 +1389,7 @@ int Index = 0; int64_t Value = Target.getConstant(); const MCSymbol &Symbol = Target.getSymA()->getSymbol(); + const MCSymbol &ASymbol = Symbol.AliasedSymbol(); const MCSymbol *RelocSymbol = SymbolToReloc(Asm, Target, *Fragment); bool IsPCRel = isFixupKindX86PCRel(Fixup.getKind()); @@ -1432,7 +1409,7 @@ } if (!RelocSymbol) { - MCSymbolData &SD = Asm.getSymbolData(Symbol); + MCSymbolData &SD = Asm.getSymbolData(ASymbol); MCFragment *F = SD.getFragment(); Index = F->getParent()->getOrdinal(); Modified: llvm/trunk/lib/MC/MCAssembler.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCAssembler.cpp?rev=119152&r1=119151&r2=119152&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCAssembler.cpp (original) +++ llvm/trunk/lib/MC/MCAssembler.cpp Mon Nov 15 10:33:49 2010 @@ -285,14 +285,16 @@ Fixup.getKind()).Flags & MCFixupKindInfo::FKF_IsPCRel; bool IsResolved = true; if (const MCSymbolRefExpr *A = Target.getSymA()) { - if (A->getSymbol().isDefined()) - Value += Layout.getSymbolAddress(&getSymbolData(A->getSymbol())); + const MCSymbol &Sym = A->getSymbol().AliasedSymbol(); + if (Sym.isDefined()) + Value += Layout.getSymbolAddress(&getSymbolData(Sym)); else IsResolved = false; } if (const MCSymbolRefExpr *B = Target.getSymB()) { - if (B->getSymbol().isDefined()) - Value -= Layout.getSymbolAddress(&getSymbolData(B->getSymbol())); + const MCSymbol &Sym = B->getSymbol().AliasedSymbol(); + if (Sym.isDefined()) + Value -= Layout.getSymbolAddress(&getSymbolData(Sym)); else IsResolved = false; } Modified: llvm/trunk/lib/MC/MCELFStreamer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCELFStreamer.cpp?rev=119152&r1=119151&r2=119152&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCELFStreamer.cpp (original) +++ llvm/trunk/lib/MC/MCELFStreamer.cpp Mon Nov 15 10:33:49 2010 @@ -240,49 +240,6 @@ Symbol->setVariableValue(AddValueSymbols(Value)); } -// This is a hack. To be able to implement weakrefs the writer has to be able -// to distinguish -// .weakref foo, bar -// .long foo -// from -// .weakref foo, bar -// .long bar -// since the first case should produce a weak undefined reference and the second -// one a strong one. -// If we created foo as a regular alias pointing to bar (foo = bar), then -// MCExpr::EvaluateAsRelocatable would recurse on foo and the writer would -// never see it used in a relocation. -// What we do is create a MCTargetExpr that when evaluated produces a symbol -// ref to a temporary symbol. This temporary symbol in turn is a variable -// that equals the original symbol (tmp = bar). With this hack the writer -// gets a relocation with tmp and can correctly implement weak references. - -namespace { -class WeakRefExpr : public MCTargetExpr { -private: - const MCSymbolRefExpr *Alias; - - explicit WeakRefExpr(const MCSymbolRefExpr *Alias_) - : MCTargetExpr(), Alias(Alias_) {} - -public: - virtual void PrintImpl(raw_ostream &OS) const { - llvm_unreachable("Unimplemented"); - } - - virtual bool EvaluateAsRelocatableImpl(MCValue &Res, - const MCAsmLayout *Layout) const { - Res = MCValue::get(Alias, 0, 0); - return true; - } - - static const WeakRefExpr *Create(const MCSymbol *Alias, MCContext &Ctx) { - const MCSymbolRefExpr *A = MCSymbolRefExpr::Create(Alias, Ctx); - return new (Ctx) WeakRefExpr(A); - } -}; -} // end anonymous namespace - void MCELFStreamer::SwitchSection(const MCSection *Section) { const MCSymbol *Grp = static_cast(Section)->getGroup(); if (Grp) @@ -294,16 +251,7 @@ getAssembler().getOrCreateSymbolData(*Symbol); MCSymbolData &AliasSD = getAssembler().getOrCreateSymbolData(*Alias); AliasSD.setFlags(AliasSD.getFlags() | ELF_Other_Weakref); - - // Create the alias that actually points to Symbol - const MCSymbolRefExpr *SymRef = MCSymbolRefExpr::Create(Symbol, getContext()); - MCSymbol *RealAlias = getContext().CreateTempSymbol(); - RealAlias->setVariableValue(SymRef); - - MCSymbolData &RealAliasSD = getAssembler().getOrCreateSymbolData(*RealAlias); - RealAliasSD.setFlags(RealAliasSD.getFlags() | ELF_Other_Weakref); - - const MCExpr *Value = WeakRefExpr::Create(RealAlias, getContext()); + const MCExpr *Value = MCSymbolRefExpr::Create(Symbol, getContext()); Alias->setVariableValue(Value); } Modified: llvm/trunk/lib/MC/MCExpr.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCExpr.cpp?rev=119152&r1=119151&r2=119152&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCExpr.cpp (original) +++ llvm/trunk/lib/MC/MCExpr.cpp Mon Nov 15 10:33:49 2010 @@ -336,9 +336,14 @@ const MCSymbol &Sym = SRE->getSymbol(); // Evaluate recursively if this is a variable. - if (Sym.isVariable() && SRE->getKind() == MCSymbolRefExpr::VK_None) - return Sym.getVariableValue()->EvaluateAsRelocatableImpl(Res, Layout, - true); + if (Sym.isVariable() && SRE->getKind() == MCSymbolRefExpr::VK_None) { + bool Ret = Sym.getVariableValue()->EvaluateAsRelocatableImpl(Res, Layout, + true); + // If we failed to simplify this to a constant, let the target + // handle it. + if (Ret && !Res.getSymA() && !Res.getSymB()) + return true; + } Res = MCValue::get(SRE, 0, 0); return true; Modified: llvm/trunk/lib/MC/MCSymbol.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCSymbol.cpp?rev=119152&r1=119151&r2=119152&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCSymbol.cpp (original) +++ llvm/trunk/lib/MC/MCSymbol.cpp Mon Nov 15 10:33:49 2010 @@ -39,6 +39,18 @@ return false; } +const MCSymbol &MCSymbol::AliasedSymbol() const { + const MCSymbol *S = this; + while (S->isVariable()) { + const MCExpr *Value = S->getVariableValue(); + if (Value->getKind() != MCExpr::SymbolRef) + return *S; + const MCSymbolRefExpr *Ref = static_cast(Value); + S = &Ref->getSymbol(); + } + return *S; +} + void MCSymbol::setVariableValue(const MCExpr *Value) { assert(!IsUsed && "Cannot set a variable that has already been used."); assert(Value && "Invalid variable value!"); Modified: llvm/trunk/test/MC/ELF/alias-reloc.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/alias-reloc.s?rev=119152&r1=119151&r2=119152&view=diff ============================================================================== --- llvm/trunk/test/MC/ELF/alias-reloc.s (original) +++ llvm/trunk/test/MC/ELF/alias-reloc.s Mon Nov 15 10:33:49 2010 @@ -8,6 +8,15 @@ .section zed, "", @progbits call bar at PLT + +// Test that this produres a relocation with bar2 + + .weak foo2 +foo2: + .weak bar2 + .set bar2,foo2 + .quad bar2 + // CHECK: # Symbol 0x00000001 // CHECK-NEXT: (('st_name', 0x00000005) # 'bar' // CHECK-NEXT: ('st_bind', 0x00000000) @@ -18,9 +27,26 @@ // CHECK-NEXT: ('st_size', 0x00000000) // CHECK-NEXT: ), +// CHECK: # Symbol 0x00000006 +// CHECK-NEXT: (('st_name', 0x0000000e) # 'bar2' +// CHECK-NEXT: ('st_bind', 0x00000002) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000004) +// CHECK-NEXT: ('st_value', 0x00000005) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ), + // CHECK: # Relocation 0x00000000 // CHECK-NEXT: (('r_offset', 0x00000001) // CHECK-NEXT: ('r_sym', 0x00000001) // CHECK-NEXT: ('r_type', 0x00000004) // CHECK-NEXT: ('r_addend', 0xfffffffc) // CHECK-NEXT: ), + +// CHECK: # Relocation 0x00000001 +// CHECK-NEXT: (('r_offset', 0x00000005) +// CHECK-NEXT: ('r_sym', 0x00000006) +// CHECK-NEXT: ('r_type', 0x00000001) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), From baldrick at free.fr Mon Nov 15 10:43:28 2010 From: baldrick at free.fr (Duncan Sands) Date: Mon, 15 Nov 2010 16:43:28 -0000 Subject: [llvm-commits] [llvm] r119153 - in /llvm/trunk/test/Transforms/InstCombine: phi.ll select.ll Message-ID: <20101115164328.388EF2A6C12C@llvm.org> Author: baldrick Date: Mon Nov 15 10:43:28 2010 New Revision: 119153 URL: http://llvm.org/viewvc/llvm-project?rev=119153&view=rev Log: Move PHI tests to phi.ll, out of select.ll. Modified: llvm/trunk/test/Transforms/InstCombine/phi.ll llvm/trunk/test/Transforms/InstCombine/select.ll Modified: llvm/trunk/test/Transforms/InstCombine/phi.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/phi.ll?rev=119153&r1=119152&r2=119153&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/phi.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/phi.ll Mon Nov 15 10:43:28 2010 @@ -423,3 +423,49 @@ ret i32 %res } +define i1 @test18(i1 %cond) { + %zero = alloca i32 + %one = alloca i32 + br i1 %cond, label %true, label %false +true: + br label %ret +false: + br label %ret +ret: + %ptr = phi i32* [ %zero, %true ] , [ %one, %false ] + %isnull = icmp eq i32* %ptr, null + ret i1 %isnull +; CHECK: @test18 +; CHECK: ret i1 false +} + +define i1 @test19(i1 %cond, double %x) { + br i1 %cond, label %true, label %false +true: + br label %ret +false: + br label %ret +ret: + %p = phi double [ %x, %true ], [ 0x7FF0000000000000, %false ]; RHS = +infty + %cmp = fcmp ule double %x, %p + ret i1 %cmp +; CHECK: @test19 +; CHECK: ret i1 true +} + +define i1 @test20(i1 %cond) { + %a = alloca i32 + %b = alloca i32 + %c = alloca i32 + br i1 %cond, label %true, label %false +true: + br label %ret +false: + br label %ret +ret: + %p = phi i32* [ %a, %true ], [ %b, %false ] + %r = icmp eq i32* %p, %c + ret i1 %r +; CHECK: @test20 +; CHECK: ret i1 false +} Modified: llvm/trunk/test/Transforms/InstCombine/select.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/select.ll?rev=119153&r1=119152&r2=119153&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/select.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/select.ll Mon Nov 15 10:43:28 2010 @@ -500,59 +500,12 @@ ; CHECK: ret i1 false } -define i1 @test41(i1 %cond) { - %zero = alloca i32 - %one = alloca i32 - br i1 %cond, label %true, label %false -true: - br label %ret -false: - br label %ret -ret: - %ptr = phi i32* [ %zero, %true ] , [ %one, %false ] - %isnull = icmp eq i32* %ptr, null - ret i1 %isnull -; CHECK: @test41 -; CHECK: ret i1 false -} - -define i1 @test42(i1 %cond, double %x) { - br i1 %cond, label %true, label %false -true: - br label %ret -false: - br label %ret -ret: - %p = phi double [ %x, %true ], [ 0x7FF0000000000000, %false ]; RHS = +infty - %cmp = fcmp ule double %x, %p - ret i1 %cmp -; CHECK: @test42 -; CHECK: ret i1 true -} - -define i1 @test43(i1 %cond) { - %a = alloca i32 - %b = alloca i32 - %c = alloca i32 - br i1 %cond, label %true, label %false -true: - br label %ret -false: - br label %ret -ret: - %p = phi i32* [ %a, %true ], [ %b, %false ] - %r = icmp eq i32* %p, %c - ret i1 %r -; CHECK: @test43 -; CHECK: ret i1 false -} - -define i32 @test44(i1 %cond, i32 %x, i32 %y) { +define i32 @test41(i1 %cond, i32 %x, i32 %y) { %z = and i32 %x, %y %s = select i1 %cond, i32 %y, i32 %z %r = and i32 %x, %s ret i32 %r -; CHECK: @test44 +; CHECK: @test41 ; CHECK: %r = and i32 %x, %y ; CHECK: ret i32 %r } From rafael.espindola at gmail.com Mon Nov 15 10:52:13 2010 From: rafael.espindola at gmail.com (=?UTF-8?Q?Rafael_Esp=C3=ADndola?=) Date: Mon, 15 Nov 2010 11:52:13 -0500 Subject: [llvm-commits] [llvm] r119149 - /llvm/trunk/lib/MC/ELFObjectWriter.cpp In-Reply-To: <20101115161839.3145F2A6C12C@llvm.org> References: <20101115161839.3145F2A6C12C@llvm.org> Message-ID: On 15 November 2010 11:18, Jason W Kim wrote: > Author: jasonwkim > Date: Mon Nov 15 10:18:39 2010 > New Revision: 119149 > > URL: http://llvm.org/viewvc/llvm-project?rev=119149&view=rev > Log: > Dovetail with Dan Dunbar's rework of ELFObjectWriter. > Added 2 new subclasses - X86ELFObjectWriter and ARMELFObectWriter. > ARM and X86 require different code for RecordRelocation(), possibly others. Thanks! Only comment is that it is probably better to make methods virtual as needed. One day we might want to move RecordRelocation to lib/Target, but for now it is better to keep it here so that we see any potential for code sharing. Cheers, Rafael From fjahanian at apple.com Mon Nov 15 11:26:22 2010 From: fjahanian at apple.com (Fariborz Jahanian) Date: Mon, 15 Nov 2010 17:26:22 -0000 Subject: [llvm-commits] [test-suite] r119159 - /test-suite/trunk/SingleSource/UnitTests/black-copied-in-cxxobj.cpp Message-ID: <20101115172622.969282A6C12C@llvm.org> Author: fjahanian Date: Mon Nov 15 11:26:22 2010 New Revision: 119159 URL: http://llvm.org/viewvc/llvm-project?rev=119159&view=rev Log: Test case for blocks with cxx objects copied-in. related to // rdar://8594790 Added: test-suite/trunk/SingleSource/UnitTests/black-copied-in-cxxobj.cpp Added: test-suite/trunk/SingleSource/UnitTests/black-copied-in-cxxobj.cpp URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/black-copied-in-cxxobj.cpp?rev=119159&view=auto ============================================================================== --- test-suite/trunk/SingleSource/UnitTests/black-copied-in-cxxobj.cpp (added) +++ test-suite/trunk/SingleSource/UnitTests/black-copied-in-cxxobj.cpp Mon Nov 15 11:26:22 2010 @@ -0,0 +1,48 @@ +#if defined(__BLOCKS__) && defined(__clang__) +// rdar://8594790 +#include + +extern "C" void abort(); + +int count = 100; +int no=1; + +struct S { + S() { no = 0; }; + ~S() { if (no != 0) abort(); } +}; + +static S s1; + +class A { +public: + int x; + A(const A &o) { ++no; x = o.x; } + A &operator =(const A &o) { x = o.x; return *this; } + A() : x(count++) { ++no; } + virtual ~A() { --no; } + void hello() const { } +}; +#endif + +int +main() +{ +#if defined(__BLOCKS__) && defined(__clang__) + A a; + A a1; + A a2; + void (^b)(void) = ^{ a.hello(); a1.hello(); a2.hello(); }; + b(); + + void (^c)(void) = Block_copy(^{ a.hello(); a1.hello(); a2.hello(); }); + c(); + if (no != 12) + abort(); + Block_release(c); + if (no != 9) + abort(); +#endif + return 0; +} + From jasonwkim at google.com Mon Nov 15 11:35:20 2010 From: jasonwkim at google.com (Jason Kim) Date: Mon, 15 Nov 2010 09:35:20 -0800 Subject: [llvm-commits] [llvm] r119149 - /llvm/trunk/lib/MC/ELFObjectWriter.cpp In-Reply-To: References: <20101115161839.3145F2A6C12C@llvm.org> Message-ID: On Mon, Nov 15, 2010 at 8:52 AM, Rafael Esp?ndola wrote: > On 15 November 2010 11:18, Jason W Kim wrote: >> Author: jasonwkim >> Date: Mon Nov 15 10:18:39 2010 >> New Revision: 119149 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=119149&view=rev >> Log: >> Dovetail with Dan Dunbar's rework of ELFObjectWriter. >> Added 2 new subclasses - X86ELFObjectWriter and ARMELFObectWriter. >> ARM and X86 require different code for RecordRelocation(), possibly others. > > Thanks! > > Only comment is that it is probably better to make methods virtual as needed. Hmm... If the perf hit becomes measurable, we can pare down the virtuals once more ELF targets become MC'ized. Right now, mixing nonvirtuals with virtuals for large methods is probably more confusing than not (might lead to subtle bugs too). Besides, MCObjectWriter uses nonvirtuals only for small leaf methods and virtual for everything else, so keeping that logic consistent is good too, I guess. > > One day we might want to move RecordRelocation to lib/Target, but for > now it is better to keep it here so that we see any potential for code > sharing. I initially tried this, but the result was a link issue due to library order not being correct. Meh. Let's punt on it for now. I agree. > > Cheers, > Rafael > Thanks!! -jason From baldrick at free.fr Mon Nov 15 11:52:46 2010 From: baldrick at free.fr (Duncan Sands) Date: Mon, 15 Nov 2010 17:52:46 -0000 Subject: [llvm-commits] [llvm] r119161 - in /llvm/trunk: lib/Analysis/InstructionSimplify.cpp test/Transforms/InstCombine/phi.ll Message-ID: <20101115175246.2287C2A6C12C@llvm.org> Author: baldrick Date: Mon Nov 15 11:52:45 2010 New Revision: 119161 URL: http://llvm.org/viewvc/llvm-project?rev=119161&view=rev Log: Teach InstructionSimplify the trick of skipping incoming phi values that are equal to the phi itself. Modified: llvm/trunk/lib/Analysis/InstructionSimplify.cpp llvm/trunk/test/Transforms/InstCombine/phi.ll Modified: llvm/trunk/lib/Analysis/InstructionSimplify.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/InstructionSimplify.cpp?rev=119161&r1=119160&r2=119161&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/InstructionSimplify.cpp (original) +++ llvm/trunk/lib/Analysis/InstructionSimplify.cpp Mon Nov 15 11:52:45 2010 @@ -142,9 +142,12 @@ // Evaluate the BinOp on the incoming phi values. Value *CommonValue = 0; for (unsigned i = 0, e = PI->getNumIncomingValues(); i != e; ++i) { + Value *Incoming = PI->getIncomingValue(i); + // If the incoming value is the phi node itself, it can be safely skipped. + if (Incoming == PI) continue; Value *V = PI == LHS ? - SimplifyBinOp(Opcode, PI->getIncomingValue(i), RHS, TD, MaxRecurse) : - SimplifyBinOp(Opcode, LHS, PI->getIncomingValue(i), TD, MaxRecurse); + SimplifyBinOp(Opcode, Incoming, RHS, TD, MaxRecurse) : + SimplifyBinOp(Opcode, LHS, Incoming, TD, MaxRecurse); // If the operation failed to simplify, or simplified to a different value // to previously, then give up. if (!V || (CommonValue && V != CommonValue)) @@ -172,8 +175,10 @@ // Evaluate the BinOp on the incoming phi values. Value *CommonValue = 0; for (unsigned i = 0, e = PI->getNumIncomingValues(); i != e; ++i) { - Value *V = SimplifyCmpInst(Pred, PI->getIncomingValue(i), RHS, TD, - MaxRecurse); + Value *Incoming = PI->getIncomingValue(i); + // If the incoming value is the phi node itself, it can be safely skipped. + if (Incoming == PI) continue; + Value *V = SimplifyCmpInst(Pred, Incoming, RHS, TD, MaxRecurse); // If the operation failed to simplify, or simplified to a different value // to previously, then give up. if (!V || (CommonValue && V != CommonValue)) Modified: llvm/trunk/test/Transforms/InstCombine/phi.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/phi.ll?rev=119161&r1=119160&r2=119161&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/phi.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/phi.ll Mon Nov 15 11:52:45 2010 @@ -469,3 +469,22 @@ ; CHECK: @test20 ; CHECK: ret i1 false } + +define i1 @test21(i1 %c1, i1 %c2) { + %a = alloca i32 + %b = alloca i32 + %c = alloca i32 + br i1 %c1, label %true, label %false +true: + br label %loop +false: + br label %loop +loop: + %p = phi i32* [ %a, %true ], [ %b, %false ], [ %p, %loop ] + %r = icmp eq i32* %p, %c + br i1 %c2, label %ret, label %loop +ret: + ret i1 %r +; CHECK: @test21 +; CHECK: ret i1 false +} From clattner at apple.com Mon Nov 15 11:56:24 2010 From: clattner at apple.com (Chris Lattner) Date: Mon, 15 Nov 2010 09:56:24 -0800 Subject: [llvm-commits] [llvm] r118992 - in /llvm/trunk: include/llvm/MC/ELFObjectWriter.h include/llvm/MC/MCObjectWriter.h include/llvm/MC/MachObjectWriter.h lib/MC/ELFObjectWriter.cpp lib/MC/MachObjectWriter.cpp lib/Target/ARM/ARMAsmBackend.cpp lib/Target/MBlaze/MBlazeAsmBackend.cpp lib/Target/X86/X86AsmBackend.cpp In-Reply-To: <20101113073340.5693D2A6C12C@llvm.org> References: <20101113073340.5693D2A6C12C@llvm.org> Message-ID: <91FF26FB-D9A0-4C3F-97D8-2BD9C9B7A53A@apple.com> On Nov 12, 2010, at 11:33 PM, Daniel Dunbar wrote: > Author: ddunbar > Date: Sat Nov 13 01:33:40 2010 > New Revision: 118992 > > URL: http://llvm.org/viewvc/llvm-project?rev=118992&view=rev > Log: > MC: Simplify Mach-O and ELF object writer implementations. > - What was I thinking????? Random question: shouldn't MCAsmBackend::isVirtualSection be a virtual method on MCSection? -Chris From rafael.espindola at gmail.com Mon Nov 15 12:08:06 2010 From: rafael.espindola at gmail.com (=?UTF-8?Q?Rafael_Esp=C3=ADndola?=) Date: Mon, 15 Nov 2010 13:08:06 -0500 Subject: [llvm-commits] [llvm] r119149 - /llvm/trunk/lib/MC/ELFObjectWriter.cpp In-Reply-To: References: <20101115161839.3145F2A6C12C@llvm.org> Message-ID: > Hmm... If the perf hit becomes measurable, we can pare down the > virtuals once more ELF targets become MC'ized. Right now, mixing > nonvirtuals with virtuals for large methods is probably more confusing > than not (might lead to subtle bugs too). Besides, MCObjectWriter uses > nonvirtuals only for small leaf methods and virtual for everything > else, so keeping that logic consistent is good too, I guess. The issues was not performance, was making the interface unnecessarily general. Since you are the one most likely to be adding/removing things from it, its up to you. > > Thanks!! > -jason > Cheers, Rafael From gohman at apple.com Mon Nov 15 12:07:16 2010 From: gohman at apple.com (Dan Gohman) Date: Mon, 15 Nov 2010 18:07:16 -0000 Subject: [llvm-commits] [llvm] r119163 - /llvm/trunk/docs/AliasAnalysis.html Message-ID: <20101115180716.5FD612A6C12C@llvm.org> Author: djg Date: Mon Nov 15 12:07:16 2010 New Revision: 119163 URL: http://llvm.org/viewvc/llvm-project?rev=119163&view=rev Log: -basicaa is no longer the default. Modified: llvm/trunk/docs/AliasAnalysis.html Modified: llvm/trunk/docs/AliasAnalysis.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/AliasAnalysis.html?rev=119163&r1=119162&r2=119163&view=diff ============================================================================== --- llvm/trunk/docs/AliasAnalysis.html (original) +++ llvm/trunk/docs/AliasAnalysis.html Mon Nov 15 12:07:16 2010 @@ -713,8 +713,8 @@
-

The -basicaa pass is the default LLVM alias analysis. It is an -aggressive local analysis that "knows" many important facts:

+

The -basicaa pass is an aggressive local analysis that "knows" +many important facts:

  • Distinct globals, stack allocations, and heap allocations can never From grosbach at apple.com Mon Nov 15 12:17:24 2010 From: grosbach at apple.com (Jim Grosbach) Date: Mon, 15 Nov 2010 18:17:24 -0000 Subject: [llvm-commits] [llvm] r119164 - /llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Message-ID: <20101115181724.541F12A6C12C@llvm.org> Author: grosbach Date: Mon Nov 15 12:17:24 2010 New Revision: 119164 URL: http://llvm.org/viewvc/llvm-project?rev=119164&view=rev Log: Nuke redundant encoding bit set. Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=119164&r1=119163&r2=119164&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Mon Nov 15 12:17:24 2010 @@ -1550,9 +1550,7 @@ multiclass AI2_ldridx { def _PRE : AI2ldstidx<1, isByte, 1, (outs GPR:$Rt, GPR:$Rn_wb), (ins addrmode2:$addr), IndexModePre, LdFrm, itin, - opc, "\t$Rt, $addr!", "$addr.base = $Rn_wb", []> { - let Inst{21} = 1; // W bit (overwrite) - } + opc, "\t$Rt, $addr!", "$addr.base = $Rn_wb", []>; def _POST : AI2ldstidx<1, isByte, 0, (outs GPR:$Rt, GPR:$Rn_wb), (ins GPR:$Rn, am2offset:$offset), IndexModePost, LdFrm, itin, From grosbach at apple.com Mon Nov 15 12:36:48 2010 From: grosbach at apple.com (Jim Grosbach) Date: Mon, 15 Nov 2010 18:36:48 -0000 Subject: [llvm-commits] [llvm] r119167 - /llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp Message-ID: <20101115183648.40E7D2A6C12C@llvm.org> Author: grosbach Date: Mon Nov 15 12:36:48 2010 New Revision: 119167 URL: http://llvm.org/viewvc/llvm-project?rev=119167&view=rev Log: Add FIXMEs. Modified: llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp Modified: llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp?rev=119167&r1=119166&r2=119167&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp Mon Nov 15 12:36:48 2010 @@ -929,6 +929,8 @@ case ARM::t2BR_JT: { // Lower and emit the instruction itself, then the jump table following it. MCInst TmpInst; + // FIXME: The branch instruction is really a pseudo. We should xform it + // explicitly. LowerARMMachineInstrToMCInst(MI, TmpInst, *this); OutStreamer.EmitInstruction(TmpInst); EmitJump2Table(MI); @@ -940,6 +942,8 @@ case ARM::BR_JTadd: { // Lower and emit the instruction itself, then the jump table following it. MCInst TmpInst; + // FIXME: The branch instruction is really a pseudo. We should xform it + // explicitly. LowerARMMachineInstrToMCInst(MI, TmpInst, *this); OutStreamer.EmitInstruction(TmpInst); EmitJumpTable(MI); From gohman at apple.com Mon Nov 15 12:41:10 2010 From: gohman at apple.com (Dan Gohman) Date: Mon, 15 Nov 2010 18:41:10 -0000 Subject: [llvm-commits] [llvm] r119169 - in /llvm/trunk: docs/tutorial/LangImpl4.html docs/tutorial/LangImpl5.html docs/tutorial/LangImpl6.html docs/tutorial/LangImpl7.html examples/ExceptionDemo/ExceptionDemo.cpp examples/Kaleidoscope/Chapter4/toy.cpp examples/Kaleidoscope/Chapter5/toy.cpp examples/Kaleidoscope/Chapter6/toy.cpp examples/Kaleidoscope/Chapter7/toy.cpp Message-ID: <20101115184110.B4B0A2A6C12C@llvm.org> Author: djg Date: Mon Nov 15 12:41:10 2010 New Revision: 119169 URL: http://llvm.org/viewvc/llvm-project?rev=119169&view=rev Log: Update examples and documentation to explicitly add basicaa, now that it's no longer included by default. Modified: llvm/trunk/docs/tutorial/LangImpl4.html llvm/trunk/docs/tutorial/LangImpl5.html llvm/trunk/docs/tutorial/LangImpl6.html llvm/trunk/docs/tutorial/LangImpl7.html llvm/trunk/examples/ExceptionDemo/ExceptionDemo.cpp llvm/trunk/examples/Kaleidoscope/Chapter4/toy.cpp llvm/trunk/examples/Kaleidoscope/Chapter5/toy.cpp llvm/trunk/examples/Kaleidoscope/Chapter6/toy.cpp llvm/trunk/examples/Kaleidoscope/Chapter7/toy.cpp Modified: llvm/trunk/docs/tutorial/LangImpl4.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/tutorial/LangImpl4.html?rev=119169&r1=119168&r2=119169&view=diff ============================================================================== --- llvm/trunk/docs/tutorial/LangImpl4.html (original) +++ llvm/trunk/docs/tutorial/LangImpl4.html Mon Nov 15 12:41:10 2010 @@ -176,6 +176,8 @@ // Set up the optimizer pipeline. Start with registering info about how the // target lays out data structures. OurFPM.add(new TargetData(*TheExecutionEngine->getTargetData())); + // Provide basic AliasAnalysis support for GVN. + OurFPM.add(createBasicAliasAnalysisPass()); // Do simple "peephole" optimizations and bit-twiddling optzns. OurFPM.add(createInstructionCombiningPass()); // Reassociate expressions. @@ -1086,6 +1088,8 @@ // Set up the optimizer pipeline. Start with registering info about how the // target lays out data structures. OurFPM.add(new TargetData(*TheExecutionEngine->getTargetData())); + // Provide basic AliasAnalysis support for GVN. + OurFPM.add(createBasicAliasAnalysisPass()); // Do simple "peephole" optimizations and bit-twiddling optzns. OurFPM.add(createInstructionCombiningPass()); // Reassociate expressions. Modified: llvm/trunk/docs/tutorial/LangImpl5.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/tutorial/LangImpl5.html?rev=119169&r1=119168&r2=119169&view=diff ============================================================================== --- llvm/trunk/docs/tutorial/LangImpl5.html (original) +++ llvm/trunk/docs/tutorial/LangImpl5.html Mon Nov 15 12:41:10 2010 @@ -1731,6 +1731,8 @@ // Set up the optimizer pipeline. Start with registering info about how the // target lays out data structures. OurFPM.add(new TargetData(*TheExecutionEngine->getTargetData())); + // Provide basic AliasAnalysis support for GVN. + OurFPM.add(createBasicAliasAnalysisPass()); // Do simple "peephole" optimizations and bit-twiddling optzns. OurFPM.add(createInstructionCombiningPass()); // Reassociate expressions. Modified: llvm/trunk/docs/tutorial/LangImpl6.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/tutorial/LangImpl6.html?rev=119169&r1=119168&r2=119169&view=diff ============================================================================== --- llvm/trunk/docs/tutorial/LangImpl6.html (original) +++ llvm/trunk/docs/tutorial/LangImpl6.html Mon Nov 15 12:41:10 2010 @@ -1768,6 +1768,8 @@ // Set up the optimizer pipeline. Start with registering info about how the // target lays out data structures. OurFPM.add(new TargetData(*TheExecutionEngine->getTargetData())); + // Provide basic AliasAnalysis support for GVN. + OurFPM.add(createBasicAliasAnalysisPass()); // Do simple "peephole" optimizations and bit-twiddling optzns. OurFPM.add(createInstructionCombiningPass()); // Reassociate expressions. Modified: llvm/trunk/docs/tutorial/LangImpl7.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/tutorial/LangImpl7.html?rev=119169&r1=119168&r2=119169&view=diff ============================================================================== --- llvm/trunk/docs/tutorial/LangImpl7.html (original) +++ llvm/trunk/docs/tutorial/LangImpl7.html Mon Nov 15 12:41:10 2010 @@ -2116,6 +2116,8 @@ // Set up the optimizer pipeline. Start with registering info about how the // target lays out data structures. OurFPM.add(new TargetData(*TheExecutionEngine->getTargetData())); + // Provide basic AliasAnalysis support for GVN. + OurFPM.add(createBasicAliasAnalysisPass()); // Promote allocas to registers. OurFPM.add(createPromoteMemoryToRegisterPass()); // Do simple "peephole" optimizations and bit-twiddling optzns. Modified: llvm/trunk/examples/ExceptionDemo/ExceptionDemo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/examples/ExceptionDemo/ExceptionDemo.cpp?rev=119169&r1=119168&r2=119169&view=diff ============================================================================== --- llvm/trunk/examples/ExceptionDemo/ExceptionDemo.cpp (original) +++ llvm/trunk/examples/ExceptionDemo/ExceptionDemo.cpp Mon Nov 15 12:41:10 2010 @@ -1974,6 +1974,9 @@ // Optimizations turned on #ifdef ADD_OPT_PASSES + // Basic AliasAnslysis support for GVN. + fpm.add(llvm::createBasicAliasAnalysisPass()); + // Promote allocas to registers. fpm.add(llvm::createPromoteMemoryToRegisterPass()); Modified: llvm/trunk/examples/Kaleidoscope/Chapter4/toy.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/examples/Kaleidoscope/Chapter4/toy.cpp?rev=119169&r1=119168&r2=119169&view=diff ============================================================================== --- llvm/trunk/examples/Kaleidoscope/Chapter4/toy.cpp (original) +++ llvm/trunk/examples/Kaleidoscope/Chapter4/toy.cpp Mon Nov 15 12:41:10 2010 @@ -584,6 +584,8 @@ // Set up the optimizer pipeline. Start with registering info about how the // target lays out data structures. OurFPM.add(new TargetData(*TheExecutionEngine->getTargetData())); + // Provide basic AliasAnalysis support for GVN. + OurFPM.add(createBasicAliasAnalysisPass()); // Do simple "peephole" optimizations and bit-twiddling optzns. OurFPM.add(createInstructionCombiningPass()); // Reassociate expressions. Modified: llvm/trunk/examples/Kaleidoscope/Chapter5/toy.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/examples/Kaleidoscope/Chapter5/toy.cpp?rev=119169&r1=119168&r2=119169&view=diff ============================================================================== --- llvm/trunk/examples/Kaleidoscope/Chapter5/toy.cpp (original) +++ llvm/trunk/examples/Kaleidoscope/Chapter5/toy.cpp Mon Nov 15 12:41:10 2010 @@ -829,6 +829,8 @@ // Set up the optimizer pipeline. Start with registering info about how the // target lays out data structures. OurFPM.add(new TargetData(*TheExecutionEngine->getTargetData())); + // Provide basic AliasAnalysis support for GVN. + OurFPM.add(createBasicAliasAnalysisPass()); // Do simple "peephole" optimizations and bit-twiddling optzns. OurFPM.add(createInstructionCombiningPass()); // Reassociate expressions. Modified: llvm/trunk/examples/Kaleidoscope/Chapter6/toy.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/examples/Kaleidoscope/Chapter6/toy.cpp?rev=119169&r1=119168&r2=119169&view=diff ============================================================================== --- llvm/trunk/examples/Kaleidoscope/Chapter6/toy.cpp (original) +++ llvm/trunk/examples/Kaleidoscope/Chapter6/toy.cpp Mon Nov 15 12:41:10 2010 @@ -947,6 +947,8 @@ // Set up the optimizer pipeline. Start with registering info about how the // target lays out data structures. OurFPM.add(new TargetData(*TheExecutionEngine->getTargetData())); + // Provide basic AliasAnalysis support for GVN. + OurFPM.add(createBasicAliasAnalysisPass()); // Do simple "peephole" optimizations and bit-twiddling optzns. OurFPM.add(createInstructionCombiningPass()); // Reassociate expressions. Modified: llvm/trunk/examples/Kaleidoscope/Chapter7/toy.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/examples/Kaleidoscope/Chapter7/toy.cpp?rev=119169&r1=119168&r2=119169&view=diff ============================================================================== --- llvm/trunk/examples/Kaleidoscope/Chapter7/toy.cpp (original) +++ llvm/trunk/examples/Kaleidoscope/Chapter7/toy.cpp Mon Nov 15 12:41:10 2010 @@ -1111,6 +1111,8 @@ // Set up the optimizer pipeline. Start with registering info about how the // target lays out data structures. OurFPM.add(new TargetData(*TheExecutionEngine->getTargetData())); + // Provide basic AliasAnalysis support for GVN. + OurFPM.add(createBasicAliasAnalysisPass()); // Promote allocas to registers. OurFPM.add(createPromoteMemoryToRegisterPass()); // Do simple "peephole" optimizations and bit-twiddling optzns. From resistor at mac.com Mon Nov 15 12:45:17 2010 From: resistor at mac.com (Owen Anderson) Date: Mon, 15 Nov 2010 18:45:17 -0000 Subject: [llvm-commits] [llvm] r119170 - in /llvm/trunk: lib/Target/ARM/ARMInstrThumb2.td test/MC/ARM/thumb2.s Message-ID: <20101115184517.48AE22A6C12E@llvm.org> Author: resistor Date: Mon Nov 15 12:45:17 2010 New Revision: 119170 URL: http://llvm.org/viewvc/llvm-project?rev=119170&view=rev Log: Add correct Thumb2 encodings for mvn and friends. Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td llvm/trunk/test/MC/ARM/thumb2.s Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=119170&r1=119169&r2=119170&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Mon Nov 15 12:45:17 2010 @@ -170,20 +170,89 @@ // Multiclass helpers... // -class T2TwoRegImm pattern> : T2I { bits<4> Rd; + bits<12> imm; + + let Inst{11-8} = Rd{3-0}; + let Inst{26} = imm{11}; + let Inst{14-12} = imm{10-8}; + let Inst{7-0} = imm{7-0}; +} + +class T2sOneRegImm pattern> + : T2sI { + bits<4> Rd; bits<4> Rn; bits<12> imm; let Inst{11-8} = Rd{3-0}; - let Inst{19-16} = Rn{3-0}; let Inst{26} = imm{11}; let Inst{14-12} = imm{10-8}; let Inst{7-0} = imm{7-0}; } +class T2OneRegShiftedReg pattern> + : T2I { + bits<4> Rd; + bits<12> ShiftedRm; + + let Inst{11-8} = Rd{3-0}; + let Inst{3-0} = ShiftedRm{3-0}; + let Inst{5-4} = ShiftedRm{6-5}; + let Inst{14-12} = ShiftedRm{11-9}; + let Inst{7-6} = ShiftedRm{8-7}; +} + +class T2sOneRegShiftedReg pattern> + : T2I { + bits<4> Rd; + bits<12> ShiftedRm; + + let Inst{11-8} = Rd{3-0}; + let Inst{3-0} = ShiftedRm{3-0}; + let Inst{5-4} = ShiftedRm{6-5}; + let Inst{14-12} = ShiftedRm{11-9}; + let Inst{7-6} = ShiftedRm{8-7}; +} + +class T2TwoReg pattern> + : T2I { + bits<4> Rd; + bits<4> Rm; + + let Inst{11-8} = Rd{3-0}; + let Inst{3-0} = Rm{3-0}; +} + +class T2sTwoReg pattern> + : T2sI { + bits<4> Rd; + bits<4> Rm; + + let Inst{11-8} = Rd{3-0}; + let Inst{3-0} = Rm{3-0}; +} + + +class T2TwoRegImm pattern> + : T2I { + bits<4> Rd; + bits<4> Rm; + + let Inst{11-8} = Rd{3-0}; + let Inst{3-0} = Rm{3-0}; +} + class T2sTwoRegImm pattern> : T2sI { @@ -259,9 +328,9 @@ InstrItinClass iii, InstrItinClass iir, InstrItinClass iis, PatFrag opnode, bit Cheap = 0, bit ReMat = 0> { // shifted imm - def i : T2sI<(outs rGPR:$dst), (ins t2_so_imm:$src), iii, - opc, "\t$dst, $src", - [(set rGPR:$dst, (opnode t2_so_imm:$src))]> { + def i : T2sOneRegImm<(outs rGPR:$Rd), (ins t2_so_imm:$imm), iii, + opc, "\t$Rd, $imm", + [(set rGPR:$Rd, (opnode t2_so_imm:$imm))]> { let isAsCheapAsAMove = Cheap; let isReMaterializable = ReMat; let Inst{31-27} = 0b11110; @@ -272,9 +341,9 @@ let Inst{15} = 0; } // register - def r : T2sI<(outs rGPR:$dst), (ins rGPR:$src), iir, - opc, ".w\t$dst, $src", - [(set rGPR:$dst, (opnode rGPR:$src))]> { + def r : T2sTwoReg<(outs rGPR:$Rd), (ins rGPR:$Rm), iir, + opc, ".w\t$Rd, $Rm", + [(set rGPR:$Rd, (opnode rGPR:$Rm))]> { let Inst{31-27} = 0b11101; let Inst{26-25} = 0b01; let Inst{24-21} = opcod; @@ -285,9 +354,9 @@ let Inst{5-4} = 0b00; // type } // shifted register - def s : T2sI<(outs rGPR:$dst), (ins t2_so_reg:$src), iis, - opc, ".w\t$dst, $src", - [(set rGPR:$dst, (opnode t2_so_reg:$src))]> { + def s : T2sOneRegShiftedReg<(outs rGPR:$Rd), (ins t2_so_reg:$ShiftedRm), iis, + opc, ".w\t$Rd, $ShiftedRm", + [(set rGPR:$Rd, (opnode t2_so_reg:$ShiftedRm))]> { let Inst{31-27} = 0b11101; let Inst{26-25} = 0b01; let Inst{24-21} = opcod; Modified: llvm/trunk/test/MC/ARM/thumb2.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/thumb2.s?rev=119170&r1=119169&r2=119170&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/thumb2.s (original) +++ llvm/trunk/test/MC/ARM/thumb2.s Mon Nov 15 12:45:17 2010 @@ -12,3 +12,12 @@ adc r1, r1, #1448498774 @ CHECK: adc r1, r1, #66846720 @ encoding: [0x7f,0x71,0x41,0xf1] adc r1, r1, #66846720 + +@ CHECK: mvn r0, #187 @ encoding: [0xbb,0x00,0x6f,0xf0] + mvn r0, #187 +@ CHECK: mvn r0, #11141290 @ encoding: [0xaa,0x10,0x6f,0xf0] + mvn r0, #11141290 +@ CHECK: mvn r0, #-872363008 @ encoding: [0xcc,0x20,0x6f,0xf0] + mvn r0, #-872363008 +@ CHECK: mvn r0, #1114112 @ encoding: [0x88,0x10,0x6f,0xf4] + mvn r0, #1114112 \ No newline at end of file From criswell at uiuc.edu Mon Nov 15 13:11:53 2010 From: criswell at uiuc.edu (John Criswell) Date: Mon, 15 Nov 2010 19:11:53 -0000 Subject: [llvm-commits] [poolalloc] r119173 - /poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp Message-ID: <20101115191153.3D2BC2A6C12C@llvm.org> Author: criswell Date: Mon Nov 15 13:11:53 2010 New Revision: 119173 URL: http://llvm.org/viewvc/llvm-project?rev=119173&view=rev Log: Improved comment formatting. No functionality changes. Modified: poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp Modified: poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp?rev=119173&r1=119172&r2=119173&view=diff ============================================================================== --- poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp (original) +++ poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp Mon Nov 15 13:11:53 2010 @@ -832,7 +832,10 @@ } else if (CF->getName() == "pthread_create") { thread_creation_point = true; - //Get DSNode representing the DSNode of the function pointer Value of the pthread_create call + // + // Get DSNode representing the DSNode of the function pointer Value of + // the pthread_create call + // DSNode* thread_callee_node = G->getNodeForValue(CS.getArgument(2)).getNode(); if(!thread_callee_node) { @@ -841,7 +844,7 @@ thread_callee_node = G->getNodeForValue(CFI->MapValueToOriginal(CS.getArgument(2))).getNode(); } - //Fill in CF with the name of one of the functions in thread_callee_node + // Fill in CF with the name of one of the functions in thread_callee_node CF = const_cast(dyn_cast(*thread_callee_node->globals_begin())); } } From benny.kra at googlemail.com Mon Nov 15 13:20:50 2010 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Mon, 15 Nov 2010 19:20:50 -0000 Subject: [llvm-commits] [llvm] r119175 - /llvm/trunk/lib/MC/ELFObjectWriter.cpp Message-ID: <20101115192050.A97282A6C12C@llvm.org> Author: d0k Date: Mon Nov 15 13:20:50 2010 New Revision: 119175 URL: http://llvm.org/viewvc/llvm-project?rev=119175&view=rev Log: Fix compiler warnigns. Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/ELFObjectWriter.cpp?rev=119175&r1=119174&r2=119175&view=diff ============================================================================== --- llvm/trunk/lib/MC/ELFObjectWriter.cpp (original) +++ llvm/trunk/lib/MC/ELFObjectWriter.cpp Mon Nov 15 13:20:50 2010 @@ -290,7 +290,7 @@ const MCFragment *Fragment, const MCFixup &Fixup, MCValue Target, uint64_t &FixedValue) { assert(0 && "RecordRelocation is not specific enough"); - }; + } virtual uint64_t getSymbolIndexInSymbolTable(const MCAssembler &Asm, const MCSymbol *S); @@ -1335,7 +1335,7 @@ case ELF::EM_ARM: return new ARMELFObjectWriter(OS, Is64Bit, IsLittleEndian, EMachine, HasRelocationAddend, OSType); break; - default: assert(0 && "Unsupported architecture"); break; + default: llvm_unreachable("Unsupported architecture"); break; } } From resistor at mac.com Mon Nov 15 13:58:36 2010 From: resistor at mac.com (Owen Anderson) Date: Mon, 15 Nov 2010 19:58:36 -0000 Subject: [llvm-commits] [llvm] r119176 - in /llvm/trunk: lib/Target/ARM/ARMInstrThumb2.td test/MC/ARM/thumb2.s Message-ID: <20101115195836.7470A2A6C12C@llvm.org> Author: resistor Date: Mon Nov 15 13:58:36 2010 New Revision: 119176 URL: http://llvm.org/viewvc/llvm-project?rev=119176&view=rev Log: Add Thumb2 encodings for comparison and shift operators. Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td llvm/trunk/test/MC/ARM/thumb2.s Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=119176&r1=119175&r2=119176&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Mon Nov 15 13:58:36 2010 @@ -183,6 +183,7 @@ let Inst{7-0} = imm{7-0}; } + class T2sOneRegImm pattern> : T2sI { @@ -196,6 +197,19 @@ let Inst{7-0} = imm{7-0}; } +class T2OneRegCmpImm pattern> + : T2I { + bits<4> Rn; + bits<12> imm; + + let Inst{19-16} = Rn{3-0}; + let Inst{26} = imm{11}; + let Inst{14-12} = imm{10-8}; + let Inst{7-0} = imm{7-0}; +} + + class T2OneRegShiftedReg pattern> : T2I { @@ -222,6 +236,19 @@ let Inst{7-6} = ShiftedRm{8-7}; } +class T2OneRegCmpShiftedReg pattern> + : T2I { + bits<4> Rn; + bits<12> ShiftedRm; + + let Inst{19-16} = Rn{3-0}; + let Inst{3-0} = ShiftedRm{3-0}; + let Inst{5-4} = ShiftedRm{6-5}; + let Inst{14-12} = ShiftedRm{11-9}; + let Inst{7-6} = ShiftedRm{8-7}; +} + class T2TwoReg pattern> : T2I { @@ -242,6 +269,16 @@ let Inst{3-0} = Rm{3-0}; } +class T2TwoRegCmp pattern> + : T2I { + bits<4> Rn; + bits<4> Rm; + + let Inst{19-16} = Rn{3-0}; + let Inst{3-0} = Rm{3-0}; +} + class T2TwoRegImm pattern> @@ -267,6 +304,32 @@ let Inst{7-0} = imm{7-0}; } +class T2TwoRegShiftImm pattern> + : T2I { + bits<4> Rd; + bits<4> Rm; + bits<5> imm; + + let Inst{11-8} = Rd{3-0}; + let Inst{3-0} = Rm{3-0}; + let Inst{14-12} = imm{4-2}; + let Inst{7-6} = imm{1-0}; +} + +class T2sTwoRegShiftImm pattern> + : T2sI { + bits<4> Rd; + bits<4> Rm; + bits<5> imm; + + let Inst{11-8} = Rd{3-0}; + let Inst{3-0} = Rm{3-0}; + let Inst{14-12} = imm{4-2}; + let Inst{7-6} = imm{1-0}; +} + class T2ThreeReg pattern> : T2I { @@ -678,18 +741,20 @@ // rotate operation that produces a value. multiclass T2I_sh_ir opcod, string opc, PatFrag opnode> { // 5-bit imm - def ri : T2sI<(outs rGPR:$dst), (ins rGPR:$lhs, i32imm:$rhs), IIC_iMOVsi, - opc, ".w\t$dst, $lhs, $rhs", - [(set rGPR:$dst, (opnode rGPR:$lhs, imm1_31:$rhs))]> { + def ri : T2sTwoRegShiftImm< + (outs rGPR:$Rd), (ins rGPR:$Rm, i32imm:$imm), IIC_iMOVsi, + opc, ".w\t$Rd, $Rm, $imm", + [(set rGPR:$Rd, (opnode rGPR:$Rm, imm1_31:$imm))]> { let Inst{31-27} = 0b11101; let Inst{26-21} = 0b010010; let Inst{19-16} = 0b1111; // Rn let Inst{5-4} = opcod; } // register - def rr : T2sI<(outs rGPR:$dst), (ins rGPR:$lhs, rGPR:$rhs), IIC_iMOVsr, - opc, ".w\t$dst, $lhs, $rhs", - [(set rGPR:$dst, (opnode rGPR:$lhs, rGPR:$rhs))]> { + def rr : T2sThreeReg< + (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMOVsr, + opc, ".w\t$Rd, $Rn, $Rm", + [(set rGPR:$Rd, (opnode rGPR:$Rn, rGPR:$Rm))]> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0100; let Inst{22-21} = opcod; @@ -706,9 +771,10 @@ InstrItinClass iii, InstrItinClass iir, InstrItinClass iis, PatFrag opnode> { // shifted imm - def ri : T2I<(outs), (ins GPR:$lhs, t2_so_imm:$rhs), iii, - opc, ".w\t$lhs, $rhs", - [(opnode GPR:$lhs, t2_so_imm:$rhs)]> { + def ri : T2OneRegCmpImm< + (outs), (ins GPR:$Rn, t2_so_imm:$imm), iii, + opc, ".w\t$Rn, $imm", + [(opnode GPR:$Rn, t2_so_imm:$imm)]> { let Inst{31-27} = 0b11110; let Inst{25} = 0; let Inst{24-21} = opcod; @@ -717,7 +783,8 @@ let Inst{11-8} = 0b1111; // Rd } // register - def rr : T2I<(outs), (ins GPR:$lhs, rGPR:$rhs), iir, + def rr : T2TwoRegCmp< + (outs), (ins GPR:$lhs, rGPR:$rhs), iir, opc, ".w\t$lhs, $rhs", [(opnode GPR:$lhs, rGPR:$rhs)]> { let Inst{31-27} = 0b11101; @@ -730,9 +797,10 @@ let Inst{5-4} = 0b00; // type } // shifted register - def rs : T2I<(outs), (ins GPR:$lhs, t2_so_reg:$rhs), iis, - opc, ".w\t$lhs, $rhs", - [(opnode GPR:$lhs, t2_so_reg:$rhs)]> { + def rs : T2OneRegCmpShiftedReg< + (outs), (ins GPR:$Rn, t2_so_reg:$ShiftedRm), iis, + opc, ".w\t$Rn, $ShiftedRm", + [(opnode GPR:$Rn, t2_so_reg:$ShiftedRm)]> { let Inst{31-27} = 0b11101; let Inst{26-25} = 0b01; let Inst{24-21} = opcod; @@ -1857,9 +1925,10 @@ } let Defs = [CPSR] in { -def t2MOVsrl_flag : T2I<(outs rGPR:$dst), (ins rGPR:$src), IIC_iMOVsi, - "lsrs", ".w\t$dst, $src, #1", - [(set rGPR:$dst, (ARMsrl_flag rGPR:$src))]> { +def t2MOVsrl_flag : T2TwoRegShiftImm< + (outs rGPR:$Rd), (ins rGPR:$Rm), IIC_iMOVsi, + "lsrs", ".w\t$Rd, $Rm, #1", + [(set rGPR:$Rd, (ARMsrl_flag rGPR:$Rm))]> { let Inst{31-27} = 0b11101; let Inst{26-25} = 0b01; let Inst{24-21} = 0b0010; @@ -1870,9 +1939,10 @@ let Inst{14-12} = 0b000; let Inst{7-6} = 0b01; } -def t2MOVsra_flag : T2I<(outs rGPR:$dst), (ins rGPR:$src), IIC_iMOVsi, - "asrs", ".w\t$dst, $src, #1", - [(set rGPR:$dst, (ARMsra_flag rGPR:$src))]> { +def t2MOVsra_flag : T2TwoRegShiftImm< + (outs rGPR:$Rd), (ins rGPR:$Rm), IIC_iMOVsi, + "asrs", ".w\t$Rd, $Rm, #1", + [(set rGPR:$Rd, (ARMsra_flag rGPR:$Rm))]> { let Inst{31-27} = 0b11101; let Inst{26-25} = 0b01; let Inst{24-21} = 0b0010; @@ -2498,7 +2568,7 @@ class T2I_movcc_sh opcod, dag oops, dag iops, InstrItinClass itin, string opc, string asm, list pattern> - : T2I { + : T2TwoRegShiftImm { let Inst{31-27} = 0b11101; let Inst{26-25} = 0b01; let Inst{24-21} = 0b0010; @@ -2506,22 +2576,22 @@ let Inst{19-16} = 0b1111; // Rn let Inst{5-4} = opcod; // Shift type. } -def t2MOVCClsl : T2I_movcc_sh<0b00, (outs rGPR:$dst), - (ins rGPR:$false, rGPR:$true, i32imm:$rhs), - IIC_iCMOVsi, "lsl", ".w\t$dst, $true, $rhs", []>, - RegConstraint<"$false = $dst">; -def t2MOVCClsr : T2I_movcc_sh<0b01, (outs rGPR:$dst), - (ins rGPR:$false, rGPR:$true, i32imm:$rhs), - IIC_iCMOVsi, "lsr", ".w\t$dst, $true, $rhs", []>, - RegConstraint<"$false = $dst">; -def t2MOVCCasr : T2I_movcc_sh<0b10, (outs rGPR:$dst), - (ins rGPR:$false, rGPR:$true, i32imm:$rhs), - IIC_iCMOVsi, "asr", ".w\t$dst, $true, $rhs", []>, - RegConstraint<"$false = $dst">; -def t2MOVCCror : T2I_movcc_sh<0b11, (outs rGPR:$dst), - (ins rGPR:$false, rGPR:$true, i32imm:$rhs), - IIC_iCMOVsi, "ror", ".w\t$dst, $true, $rhs", []>, - RegConstraint<"$false = $dst">; +def t2MOVCClsl : T2I_movcc_sh<0b00, (outs rGPR:$Rd), + (ins rGPR:$false, rGPR:$Rm, i32imm:$imm), + IIC_iCMOVsi, "lsl", ".w\t$Rd, $Rm, $imm", []>, + RegConstraint<"$false = $Rd">; +def t2MOVCClsr : T2I_movcc_sh<0b01, (outs rGPR:$Rd), + (ins rGPR:$false, rGPR:$Rm, i32imm:$imm), + IIC_iCMOVsi, "lsr", ".w\t$Rd, $Rm, $imm", []>, + RegConstraint<"$false = $Rd">; +def t2MOVCCasr : T2I_movcc_sh<0b10, (outs rGPR:$Rd), + (ins rGPR:$false, rGPR:$Rm, i32imm:$imm), + IIC_iCMOVsi, "asr", ".w\t$Rd, $Rm, $imm", []>, + RegConstraint<"$false = $Rd">; +def t2MOVCCror : T2I_movcc_sh<0b11, (outs rGPR:$Rd), + (ins rGPR:$false, rGPR:$Rm, i32imm:$imm), + IIC_iCMOVsi, "ror", ".w\t$Rd, $Rm, $imm", []>, + RegConstraint<"$false = $Rd">; } // neverHasSideEffects //===----------------------------------------------------------------------===// Modified: llvm/trunk/test/MC/ARM/thumb2.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/thumb2.s?rev=119176&r1=119175&r2=119176&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/thumb2.s (original) +++ llvm/trunk/test/MC/ARM/thumb2.s Mon Nov 15 13:58:36 2010 @@ -20,4 +20,15 @@ @ CHECK: mvn r0, #-872363008 @ encoding: [0xcc,0x20,0x6f,0xf0] mvn r0, #-872363008 @ CHECK: mvn r0, #1114112 @ encoding: [0x88,0x10,0x6f,0xf4] - mvn r0, #1114112 \ No newline at end of file + mvn r0, #1114112 + +@ CHECK: cmp.w r0, #11141290 @ encoding: [0xaa,0x1f,0xb0,0xf1] + cmp.w r0, #11141290 +@ CHECK: cmp.w r0, #-872363008 @ encoding: [0xcc,0x2f,0xb0,0xf1] + cmp.w r0, #-872363008 +@ CHECK: cmp.w r0, #-572662307 @ encoding: [0xdd,0x3f,0xb0,0xf1] + cmp.w r0, #-572662307 +@ CHECK: cmp.w r0, #1114112 @ encoding: [0x88,0x1f,0xb0,0xf5] + cmp.w r0, #1114112 +@ CHECK: cmp.w r0, r1, lsl #5 @ encoding: [0x41,0x1f,0xb0,0xeb] + cmp.w r0, r1, lsl #5 \ No newline at end of file From peter at pcc.me.uk Mon Nov 15 14:03:17 2010 From: peter at pcc.me.uk (Peter Collingbourne) Date: Mon, 15 Nov 2010 20:03:17 +0000 Subject: [llvm-commits] [PATCH] Add OpenCL support to makefile system Message-ID: <20101115200317.GA19347@pcc.me.uk> Hi, These patches add OpenCL support to the LLVM makefile system. Needed to build OpenCL components (in my case, a runtime library) using the makefile system. OK to commit? Thanks, -- Peter -------------- next part -------------- A non-text attachment was scrubbed... Name: 0001-Add-SOURCE_SUFFIXES-used-to-build-the-inferred-file-.patch Type: text/x-diff Size: 2633 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101115/ad53ca66/attachment.bin -------------- next part -------------- A non-text attachment was scrubbed... Name: 0002-Add-OpenCL-support-to-makefile-system.patch Type: text/x-diff Size: 4017 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101115/ad53ca66/attachment-0001.bin From grosbach at apple.com Mon Nov 15 14:47:07 2010 From: grosbach at apple.com (Jim Grosbach) Date: Mon, 15 Nov 2010 20:47:07 -0000 Subject: [llvm-commits] [llvm] r119180 - in /llvm/trunk/lib/Target/ARM: ARMCodeEmitter.cpp ARMInstrFormats.td ARMInstrInfo.td ARMMCCodeEmitter.cpp Message-ID: <20101115204707.D8C752A6C12C@llvm.org> Author: grosbach Date: Mon Nov 15 14:47:07 2010 New Revision: 119180 URL: http://llvm.org/viewvc/llvm-project?rev=119180&view=rev Log: ARM LDR_PRE/LDR_POST/STR_PRE/STR_POST (and the *B counterparts) binary encoding. Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp llvm/trunk/lib/Target/ARM/ARMInstrFormats.td llvm/trunk/lib/Target/ARM/ARMInstrInfo.td llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp?rev=119180&r1=119179&r2=119180&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Mon Nov 15 14:47:07 2010 @@ -214,6 +214,10 @@ Binary |= (Reg << 13); return Binary; } + uint32_t getAddrMode2OpValue(const MachineInstr &MI, unsigned OpIdx) + const { return 0;} + uint32_t getAddrMode2OffsetOpValue(const MachineInstr &MI, unsigned OpIdx) + const { return 0;} uint32_t getAddrMode3OffsetOpValue(const MachineInstr &MI, unsigned OpIdx) const { return 0;} uint32_t getAddrMode3OpValue(const MachineInstr &MI, unsigned Op) const Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=119180&r1=119179&r2=119180&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Mon Nov 15 14:47:07 2010 @@ -438,11 +438,13 @@ string asm, string cstr, list pattern> : I { + bits<4> Rt; let Inst{27-26} = 0b01; let Inst{24} = isPre; // P bit let Inst{22} = isByte; // B bit let Inst{21} = isPre; // W bit let Inst{20} = isLd; // L bit + let Inst{15-12} = Rt; } class AXI2ldw, ComplexPattern { + string EncoderMethod = "getAddrMode2OpValue"; let PrintMethod = "printAddrMode2Operand"; let MIOperandInfo = (ops GPR:$base, GPR:$offsreg, i32imm:$offsimm); } @@ -447,6 +448,7 @@ def am2offset : Operand, ComplexPattern { + string EncoderMethod = "getAddrMode2OffsetOpValue"; let PrintMethod = "printAddrMode2OffsetOperand"; let MIOperandInfo = (ops GPR, i32imm); } @@ -1550,11 +1552,31 @@ multiclass AI2_ldridx { def _PRE : AI2ldstidx<1, isByte, 1, (outs GPR:$Rt, GPR:$Rn_wb), (ins addrmode2:$addr), IndexModePre, LdFrm, itin, - opc, "\t$Rt, $addr!", "$addr.base = $Rn_wb", []>; + opc, "\t$Rt, $addr!", "$addr.base = $Rn_wb", []> { + // {17-14} Rn + // {13} 1 == Rm, 0 == imm12 + // {12} isAdd + // {11-0} imm12/Rm + bits<18> addr; + let Inst{25} = addr{13}; + let Inst{23} = addr{12}; + let Inst{19-16} = addr{17-14}; + let Inst{11-0} = addr{11-0}; + } def _POST : AI2ldstidx<1, isByte, 0, (outs GPR:$Rt, GPR:$Rn_wb), (ins GPR:$Rn, am2offset:$offset), IndexModePost, LdFrm, itin, - opc, "\t$Rt, [$Rn], $offset", "$Rn = $Rn_wb", []>; + opc, "\t$Rt, [$Rn], $offset", "$Rn = $Rn_wb", []> { + // {13} 1 == Rm, 0 == imm12 + // {12} isAdd + // {11-0} imm12/Rm + bits<14> offset; + bits<4> Rn; + let Inst{25} = offset{13}; + let Inst{23} = offset{12}; + let Inst{19-16} = Rn; + let Inst{11-0} = offset{11-0}; + } } defm LDR : AI2_ldridx<0, "ldr", IIC_iLoad_ru>; @@ -1647,19 +1669,39 @@ "strd", "\t$src1, $addr", []>, Requires<[IsARM, HasV5TE]>; // Indexed stores -def STR_PRE : AI2ldstidx<0, 0, 1, (outs GPR:$base_wb), - (ins GPR:$src, GPR:$base, am2offset:$offset), +def STR_PRE : AI2ldstidx<0, 0, 1, (outs GPR:$Rn_wb), + (ins GPR:$Rt, GPR:$Rn, am2offset:$offset), IndexModePre, StFrm, IIC_iStore_ru, - "str", "\t$src, [$base, $offset]!", "$base = $base_wb", - [(set GPR:$base_wb, - (pre_store GPR:$src, GPR:$base, am2offset:$offset))]>; + "str", "\t$Rt, [$Rn, $offset]!", "$Rn = $Rn_wb", + [(set GPR:$Rn_wb, + (pre_store GPR:$Rt, GPR:$Rn, am2offset:$offset))]> { + // {13} 1 == Rm, 0 == imm12 + // {12} isAdd + // {11-0} imm12/Rm + bits<14> offset; + bits<4> Rn; + let Inst{25} = offset{13}; + let Inst{23} = offset{12}; + let Inst{19-16} = Rn; + let Inst{11-0} = offset{11-0}; +} -def STR_POST : AI2ldstidx<0, 0, 0, (outs GPR:$base_wb), - (ins GPR:$src, GPR:$base,am2offset:$offset), +def STR_POST : AI2ldstidx<0, 0, 0, (outs GPR:$Rn_wb), + (ins GPR:$Rt, GPR:$Rn, am2offset:$offset), IndexModePost, StFrm, IIC_iStore_ru, - "str", "\t$src, [$base], $offset", "$base = $base_wb", - [(set GPR:$base_wb, - (post_store GPR:$src, GPR:$base, am2offset:$offset))]>; + "str", "\t$Rt, [$Rn], $offset", "$Rn = $Rn_wb", + [(set GPR:$Rn_wb, + (post_store GPR:$Rt, GPR:$Rn, am2offset:$offset))]> { + // {13} 1 == Rm, 0 == imm12 + // {12} isAdd + // {11-0} imm12/Rm + bits<14> offset; + bits<4> Rn; + let Inst{25} = offset{13}; + let Inst{23} = offset{12}; + let Inst{19-16} = Rn; + let Inst{11-0} = offset{11-0}; +} def STRH_PRE : AI3sthpr<(outs GPR:$base_wb), (ins GPR:$src, GPR:$base,am3offset:$offset), @@ -1675,19 +1717,39 @@ [(set GPR:$base_wb, (post_truncsti16 GPR:$src, GPR:$base, am3offset:$offset))]>; -def STRB_PRE : AI2ldstidx<0, 1, 1, (outs GPR:$base_wb), - (ins GPR:$src, GPR:$base,am2offset:$offset), +def STRB_PRE : AI2ldstidx<0, 1, 1, (outs GPR:$Rn_wb), + (ins GPR:$Rt, GPR:$Rn,am2offset:$offset), IndexModePre, StFrm, IIC_iStore_bh_ru, - "strb", "\t$src, [$base, $offset]!", "$base = $base_wb", - [(set GPR:$base_wb, (pre_truncsti8 GPR:$src, - GPR:$base, am2offset:$offset))]>; + "strb", "\t$Rt, [$Rn, $offset]!", "$Rn = $Rn_wb", + [(set GPR:$Rn_wb, (pre_truncsti8 GPR:$Rt, + GPR:$Rn, am2offset:$offset))]> { + // {13} 1 == Rm, 0 == imm12 + // {12} isAdd + // {11-0} imm12/Rm + bits<14> offset; + bits<4> Rn; + let Inst{25} = offset{13}; + let Inst{23} = offset{12}; + let Inst{19-16} = Rn; + let Inst{11-0} = offset{11-0}; +} -def STRB_POST: AI2ldstidx<0, 1, 0, (outs GPR:$base_wb), - (ins GPR:$src, GPR:$base,am2offset:$offset), +def STRB_POST: AI2ldstidx<0, 1, 0, (outs GPR:$Rn_wb), + (ins GPR:$Rt, GPR:$Rn,am2offset:$offset), IndexModePost, StFrm, IIC_iStore_bh_ru, - "strb", "\t$src, [$base], $offset", "$base = $base_wb", - [(set GPR:$base_wb, (post_truncsti8 GPR:$src, - GPR:$base, am2offset:$offset))]>; + "strb", "\t$Rt, [$Rn], $offset", "$Rn = $Rn_wb", + [(set GPR:$Rn_wb, (post_truncsti8 GPR:$Rt, + GPR:$Rn, am2offset:$offset))]> { + // {13} 1 == Rm, 0 == imm12 + // {12} isAdd + // {11-0} imm12/Rm + bits<14> offset; + bits<4> Rn; + let Inst{25} = offset{13}; + let Inst{23} = offset{12}; + let Inst{19-16} = Rn; + let Inst{11-0} = offset{11-0}; +} // For disassembly only def STRD_PRE : AI3stdpr<(outs GPR:$base_wb), Modified: llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp?rev=119180&r1=119179&r2=119180&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp Mon Nov 15 14:47:07 2010 @@ -101,6 +101,29 @@ case ARM_AM::ib: return 3; } } + /// getShiftOp - Return the shift opcode (bit[6:5]) of the immediate value. + /// + unsigned getShiftOp(ARM_AM::ShiftOpc ShOpc) const { + switch (ShOpc) { + default: llvm_unreachable("Unknown shift opc!"); + case ARM_AM::no_shift: + case ARM_AM::lsl: return 0; + case ARM_AM::lsr: return 1; + case ARM_AM::asr: return 2; + case ARM_AM::ror: + case ARM_AM::rrx: return 3; + } + return 0; + } + + /// getAddrMode2OpValue - Return encoding for addrmode2 operands. + uint32_t getAddrMode2OpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups) const; + + /// getAddrMode2OffsetOpValue - Return encoding for am2offset operands. + uint32_t getAddrMode2OffsetOpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups) const; + /// getAddrMode3OffsetOpValue - Return encoding for am3offset operands. uint32_t getAddrMode3OffsetOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl &Fixups) const; @@ -380,24 +403,10 @@ const MCOperand &MO2 = MI.getOperand(OpIdx+2); unsigned Rn = getARMRegisterNumbering(MO.getReg()); unsigned Rm = getARMRegisterNumbering(MO1.getReg()); - ARM_AM::ShiftOpc ShOp = ARM_AM::getAM2ShiftOpc(MO2.getImm()); unsigned ShImm = ARM_AM::getAM2Offset(MO2.getImm()); bool isAdd = ARM_AM::getAM2Op(MO2.getImm()) == ARM_AM::add; - unsigned SBits; - // LSL - 00 - // LSR - 01 - // ASR - 10 - // ROR - 11 - switch (ShOp) { - default: llvm_unreachable("Unknown shift opc!"); - case ARM_AM::no_shift: - assert(ShImm == 0 && "Non-zero shift amount with no shift type!"); - // fall through - case ARM_AM::lsl: SBits = 0x0; break; - case ARM_AM::lsr: SBits = 0x1; break; - case ARM_AM::asr: SBits = 0x2; break; - case ARM_AM::ror: SBits = 0x3; break; - } + ARM_AM::ShiftOpc ShOp = ARM_AM::getAM2ShiftOpc(MO2.getImm()); + unsigned SBits = getShiftOp(ShOp); // {16-13} = Rn // {12} = isAdd @@ -416,6 +425,42 @@ } uint32_t ARMMCCodeEmitter:: +getAddrMode2OpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups) const { + // {17-14} Rn + // {13} 1 == imm12, 0 == Rm + // {12} isAdd + // {11-0} imm12/Rm + const MCOperand &MO = MI.getOperand(OpIdx); + unsigned Rn = getARMRegisterNumbering(MO.getReg()); + uint32_t Binary = getAddrMode2OffsetOpValue(MI, OpIdx + 1, Fixups); + Binary |= Rn << 14; + return Binary; +} + +uint32_t ARMMCCodeEmitter:: +getAddrMode2OffsetOpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups) const { + // {13} 1 == imm12, 0 == Rm + // {12} isAdd + // {11-0} imm12/Rm + const MCOperand &MO = MI.getOperand(OpIdx); + const MCOperand &MO1 = MI.getOperand(OpIdx+1); + unsigned Imm = MO1.getImm(); + bool isAdd = ARM_AM::getAM2Op(Imm) == ARM_AM::add; + bool isReg = MO.getReg() != 0; + uint32_t Binary = ARM_AM::getAM2Offset(Imm); + // if reg +/- reg, Rm will be non-zero. Otherwise, we have reg +/- imm12 + if (isReg) { + ARM_AM::ShiftOpc ShOp = ARM_AM::getAM2ShiftOpc(Imm); + Binary <<= 7; // Shift amount is bits [11:7] + Binary |= getShiftOp(ShOp) << 5; // Shift type is bits [6:5] + Binary |= getARMRegisterNumbering(MO.getReg()); // Rm is bits [3:0] + } + return Binary | (isAdd << 12) | (isReg << 13); +} + +uint32_t ARMMCCodeEmitter:: getAddrMode3OffsetOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl &Fixups) const { // {9} 1 == imm8, 0 == Rm From stoklund at 2pi.dk Mon Nov 15 14:55:50 2010 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Mon, 15 Nov 2010 20:55:50 -0000 Subject: [llvm-commits] [llvm] r119182 - in /llvm/trunk: lib/CodeGen/InlineSpiller.cpp test/CodeGen/ARM/2010-11-15-SpillEarlyClobber.ll Message-ID: <20101115205550.236D72A6C12C@llvm.org> Author: stoklund Date: Mon Nov 15 14:55:49 2010 New Revision: 119182 URL: http://llvm.org/viewvc/llvm-project?rev=119182&view=rev Log: When spilling a register defined by an early clobber, make sure that the new live ranges for the spill register are also defined at the use slot instead of the normal def slot. This fixes PR8612 for the inline spiller. A use was being allocated to the same register as a spilled early clobber def. This problem exists in all the spillers. A fix for the standard spiller is forthcoming. Added: llvm/trunk/test/CodeGen/ARM/2010-11-15-SpillEarlyClobber.ll Modified: llvm/trunk/lib/CodeGen/InlineSpiller.cpp Modified: llvm/trunk/lib/CodeGen/InlineSpiller.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/InlineSpiller.cpp?rev=119182&r1=119181&r2=119182&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/InlineSpiller.cpp (original) +++ llvm/trunk/lib/CodeGen/InlineSpiller.cpp Mon Nov 15 14:55:49 2010 @@ -343,7 +343,13 @@ void InlineSpiller::insertSpill(LiveInterval &NewLI, MachineBasicBlock::iterator MI) { MachineBasicBlock &MBB = *MI->getParent(); + + // Get the defined value. It could be an early clobber so keep the def index. SlotIndex Idx = lis_.getInstructionIndex(MI).getDefIndex(); + VNInfo *VNI = edit_->getParent().getVNInfoAt(Idx); + assert(VNI && VNI->def.getDefIndex() == Idx && "Inconsistent VNInfo"); + Idx = VNI->def; + tii_.storeRegToStackSlot(MBB, ++MI, NewLI.reg, true, stackSlot_, rc_, &tri_); --MI; // Point to store instruction. SlotIndex StoreIdx = lis_.InsertMachineInstrInMaps(MI).getDefIndex(); Added: llvm/trunk/test/CodeGen/ARM/2010-11-15-SpillEarlyClobber.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2010-11-15-SpillEarlyClobber.ll?rev=119182&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/ARM/2010-11-15-SpillEarlyClobber.ll (added) +++ llvm/trunk/test/CodeGen/ARM/2010-11-15-SpillEarlyClobber.ll Mon Nov 15 14:55:49 2010 @@ -0,0 +1,84 @@ +; RUN: llc < %s -verify-machineinstrs -spiller=inline +; PR8612 +; +; This test has an inline asm with early-clobber arguments. +; It is big enough that one of the early clobber registers is spilled. +; +; All the spillers would get the live ranges wrong when spilling an early +; clobber, allowing the undef register to be allocated to the same register as +; the early clobber. +; +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32" +target triple = "armv7-eabi" + +%0 = type { i32, i32 } + +define void @foo(i32* %in) nounwind { +entry: + br label %bb.i + +bb.i: ; preds = %bb.i, %entry + br i1 undef, label %bb10.preheader.i, label %bb.i + +bb10.preheader.i: ; preds = %bb.i + br label %bb10.i + +bb10.i: ; preds = %bb10.i, %bb10.preheader.i + br i1 undef, label %bb27.i, label %bb10.i + +bb27.i: ; preds = %bb10.i + br label %bb28.i + +bb28.i: ; preds = %bb28.i, %bb27.i + br i1 undef, label %presymmetry.exit, label %bb28.i + +presymmetry.exit: ; preds = %bb28.i + %tmp175387 = or i32 undef, 12 + %scevgep101.i = getelementptr i32* %in, i32 undef + %tmp189401 = or i32 undef, 7 + %scevgep97.i = getelementptr i32* %in, i32 undef + %tmp198410 = or i32 undef, 1 + %scevgep.i48 = getelementptr i32* %in, i32 undef + %0 = load i32* %scevgep.i48, align 4 + %1 = add nsw i32 %0, 0 + store i32 %1, i32* undef, align 4 + %asmtmp.i.i33.i.i.i = tail call %0 asm "smull\09$0, $1, $2, $3", "=&r,=&r,%r,r,~{cc}"(i32 undef, i32 1518500250) nounwind + %asmresult1.i.i34.i.i.i = extractvalue %0 %asmtmp.i.i33.i.i.i, 1 + %2 = shl i32 %asmresult1.i.i34.i.i.i, 1 + %3 = load i32* null, align 4 + %4 = load i32* undef, align 4 + %5 = sub nsw i32 %3, %4 + %6 = load i32* undef, align 4 + %7 = load i32* null, align 4 + %8 = sub nsw i32 %6, %7 + %9 = load i32* %scevgep97.i, align 4 + %10 = load i32* undef, align 4 + %11 = sub nsw i32 %9, %10 + %12 = load i32* null, align 4 + %13 = load i32* %scevgep101.i, align 4 + %14 = sub nsw i32 %12, %13 + %15 = load i32* %scevgep.i48, align 4 + %16 = load i32* null, align 4 + %17 = add nsw i32 %16, %15 + %18 = sub nsw i32 %15, %16 + %19 = load i32* undef, align 4 + %20 = add nsw i32 %19, %2 + %21 = sub nsw i32 %19, %2 + %22 = add nsw i32 %14, %5 + %23 = sub nsw i32 %5, %14 + %24 = add nsw i32 %11, %8 + %25 = sub nsw i32 %8, %11 + %26 = add nsw i32 %21, %23 + store i32 %26, i32* %scevgep.i48, align 4 + %27 = sub nsw i32 %25, %18 + store i32 %27, i32* null, align 4 + %28 = sub nsw i32 %23, %21 + store i32 %28, i32* undef, align 4 + %29 = add nsw i32 %18, %25 + store i32 %29, i32* undef, align 4 + %30 = add nsw i32 %17, %22 + store i32 %30, i32* %scevgep101.i, align 4 + %31 = add nsw i32 %20, %24 + store i32 %31, i32* null, align 4 + unreachable +} From stoklund at 2pi.dk Mon Nov 15 14:55:53 2010 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Mon, 15 Nov 2010 20:55:53 -0000 Subject: [llvm-commits] [llvm] r119183 - in /llvm/trunk: lib/CodeGen/LiveIntervalAnalysis.cpp test/CodeGen/ARM/2010-11-15-SpillEarlyClobber.ll Message-ID: <20101115205554.02BB82A6C12D@llvm.org> Author: stoklund Date: Mon Nov 15 14:55:53 2010 New Revision: 119183 URL: http://llvm.org/viewvc/llvm-project?rev=119183&view=rev Log: Fix PR8612 in the standard spiller as well. The live range of a register defined by an early clobber starts at the use slot, not the def slot. Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp llvm/trunk/test/CodeGen/ARM/2010-11-15-SpillEarlyClobber.ll Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=119183&r1=119182&r2=119183&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original) +++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Mon Nov 15 14:55:53 2010 @@ -1136,11 +1136,14 @@ rewriteImplicitOps(li, MI, NewVReg, vrm); // Reuse NewVReg for other reads. + bool HasEarlyClobber = false; for (unsigned j = 0, e = Ops.size(); j != e; ++j) { MachineOperand &mopj = MI->getOperand(Ops[j]); mopj.setReg(NewVReg); if (mopj.isImplicit()) rewriteImplicitOps(li, MI, NewVReg, vrm); + if (mopj.isEarlyClobber()) + HasEarlyClobber = true; } if (CreatedNewVReg) { @@ -1199,7 +1202,8 @@ } } if (HasDef) { - LiveRange LR(index.getDefIndex(), index.getStoreIndex(), + LiveRange LR(HasEarlyClobber ? index.getUseIndex() : index.getDefIndex(), + index.getStoreIndex(), nI.getNextValue(SlotIndex(), 0, VNInfoAllocator)); DEBUG(dbgs() << " +" << LR); nI.addRange(LR); Modified: llvm/trunk/test/CodeGen/ARM/2010-11-15-SpillEarlyClobber.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2010-11-15-SpillEarlyClobber.ll?rev=119183&r1=119182&r2=119183&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/2010-11-15-SpillEarlyClobber.ll (original) +++ llvm/trunk/test/CodeGen/ARM/2010-11-15-SpillEarlyClobber.ll Mon Nov 15 14:55:53 2010 @@ -1,3 +1,4 @@ +; RUN: llc < %s -verify-machineinstrs -spiller=standard ; RUN: llc < %s -verify-machineinstrs -spiller=inline ; PR8612 ; From echristo at apple.com Mon Nov 15 15:11:06 2010 From: echristo at apple.com (Eric Christopher) Date: Mon, 15 Nov 2010 21:11:06 -0000 Subject: [llvm-commits] [llvm] r119184 - in /llvm/trunk: lib/Target/ARM/ARMFastISel.cpp test/CodeGen/ARM/fast-isel.ll Message-ID: <20101115211106.A03692A6C12C@llvm.org> Author: echristo Date: Mon Nov 15 15:11:06 2010 New Revision: 119184 URL: http://llvm.org/viewvc/llvm-project?rev=119184&view=rev Log: Recommit this change and remove the failing part of the test - it didn't pass in the first place and was masked by earlier failures not warning and aborting the block. Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp llvm/trunk/test/CodeGen/ARM/fast-isel.ll Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp?rev=119184&r1=119183&r2=119184&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMFastISel.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Mon Nov 15 15:11:06 2010 @@ -590,10 +590,11 @@ // Don't walk into other basic blocks; it's possible we haven't // visited them yet, so the instructions may not yet be assigned // virtual registers. - if (FuncInfo.MBBMap[I->getParent()] != FuncInfo.MBB) - return false; - Opcode = I->getOpcode(); - U = I; + if (FuncInfo.StaticAllocaMap.count(static_cast(Obj)) || + FuncInfo.MBBMap[I->getParent()] == FuncInfo.MBB) { + Opcode = I->getOpcode(); + U = I; + } } else if (const ConstantExpr *C = dyn_cast(Obj)) { Opcode = C->getOpcode(); U = C; Modified: llvm/trunk/test/CodeGen/ARM/fast-isel.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fast-isel.ll?rev=119184&r1=119183&r2=119184&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/fast-isel.ll (original) +++ llvm/trunk/test/CodeGen/ARM/fast-isel.ll Mon Nov 15 15:11:06 2010 @@ -1,5 +1,5 @@ -; RUN: true -; RUN: true +; RUN: llc < %s -O0 -fast-isel-abort -mtriple=armv7-apple-darwin +; RUN: llc < %s -O0 -fast-isel-abort -mtriple=thumbv7-apple-darwin ; Very basic fast-isel functionality. @@ -13,27 +13,4 @@ %tmp1 = load i32* %b.addr %add = add nsw i32 %tmp, %tmp1 ret i32 %add -} - -define i32* @foo(i32* %p, i32* %q, i32** %z) nounwind { -entry: - %r = load i32* %p - %s = load i32* %q - %y = load i32** %z - br label %fast - -fast: - %t0 = add i32 %r, %s - %t1 = mul i32 %t0, %s - %t2 = sub i32 %t1, %s - %t3 = and i32 %t2, %s - %t4 = xor i32 %t3, 3 - %t5 = xor i32 %t4, %s - %t6 = add i32 %t5, 2 - %t7 = getelementptr i32* %y, i32 1 - %t8 = getelementptr i32* %t7, i32 %t6 - br label %exit - -exit: - ret i32* %t8 -} +} \ No newline at end of file From resistor at mac.com Mon Nov 15 15:12:06 2010 From: resistor at mac.com (Owen Anderson) Date: Mon, 15 Nov 2010 21:12:06 -0000 Subject: [llvm-commits] [llvm] r119185 - in /llvm/trunk: lib/Target/ARM/ARMInstrThumb2.td test/MC/ARM/thumb2.s Message-ID: <20101115211206.1E55C2A6C12C@llvm.org> Author: resistor Date: Mon Nov 15 15:12:05 2010 New Revision: 119185 URL: http://llvm.org/viewvc/llvm-project?rev=119185&view=rev Log: Provide Thumb2 encodings for sxtb and friends. Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td llvm/trunk/test/MC/ARM/thumb2.s Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=119185&r1=119184&r2=119185&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Mon Nov 15 15:12:05 2010 @@ -901,9 +901,9 @@ /// T2I_ext_rrot - A unary operation with two forms: one whose operand is a /// register and one whose operand is a register rotated by 8/16/24. multiclass T2I_ext_rrot opcod, string opc, PatFrag opnode> { - def r : T2I<(outs rGPR:$dst), (ins rGPR:$src), IIC_iEXTr, - opc, ".w\t$dst, $src", - [(set rGPR:$dst, (opnode rGPR:$src))]> { + def r : T2TwoReg<(outs rGPR:$Rd), (ins rGPR:$Rm), IIC_iEXTr, + opc, ".w\t$Rd, $Rm", + [(set rGPR:$Rd, (opnode rGPR:$Rm))]> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0100; let Inst{22-20} = opcod; @@ -912,24 +912,26 @@ let Inst{7} = 1; let Inst{5-4} = 0b00; // rotate } - def r_rot : T2I<(outs rGPR:$dst), (ins rGPR:$src, i32imm:$rot), IIC_iEXTr, - opc, ".w\t$dst, $src, ror $rot", - [(set rGPR:$dst, (opnode (rotr rGPR:$src, rot_imm:$rot)))]> { + def r_rot : T2TwoReg<(outs rGPR:$Rd), (ins rGPR:$Rm, i32imm:$rot), IIC_iEXTr, + opc, ".w\t$Rd, $Rm, ror $rot", + [(set rGPR:$Rd, (opnode (rotr rGPR:$Rm, rot_imm:$rot)))]> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0100; let Inst{22-20} = opcod; let Inst{19-16} = 0b1111; // Rn let Inst{15-12} = 0b1111; let Inst{7} = 1; - let Inst{5-4} = {?,?}; // rotate + + bits<2> rot; + let Inst{5-4} = rot{1-0}; // rotate } } // UXTB16 - Requres T2ExtractPack, does not need the .w qualifier. multiclass T2I_ext_rrot_uxtb16 opcod, string opc, PatFrag opnode> { - def r : T2I<(outs rGPR:$dst), (ins rGPR:$src), IIC_iEXTr, - opc, "\t$dst, $src", - [(set rGPR:$dst, (opnode rGPR:$src))]>, + def r : T2TwoReg<(outs rGPR:$Rd), (ins rGPR:$Rm), IIC_iEXTr, + opc, "\t$Rd, $Rm", + [(set rGPR:$Rd, (opnode rGPR:$Rm))]>, Requires<[HasT2ExtractPack, IsThumb2]> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0100; @@ -939,9 +941,9 @@ let Inst{7} = 1; let Inst{5-4} = 0b00; // rotate } - def r_rot : T2I<(outs rGPR:$dst), (ins rGPR:$src, i32imm:$rot), IIC_iEXTr, - opc, "\t$dst, $src, ror $rot", - [(set rGPR:$dst, (opnode (rotr rGPR:$src, rot_imm:$rot)))]>, + def r_rot : T2TwoReg<(outs rGPR:$dst), (ins rGPR:$Rm, i32imm:$rot), IIC_iEXTr, + opc, "\t$dst, $Rm, ror $rot", + [(set rGPR:$dst, (opnode (rotr rGPR:$Rm, rot_imm:$rot)))]>, Requires<[HasT2ExtractPack, IsThumb2]> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0100; @@ -949,15 +951,17 @@ let Inst{19-16} = 0b1111; // Rn let Inst{15-12} = 0b1111; let Inst{7} = 1; - let Inst{5-4} = {?,?}; // rotate + + bits<2> rot; + let Inst{5-4} = rot{1-0}; // rotate } } // SXTB16 - Requres T2ExtractPack, does not need the .w qualifier, no pattern // supported yet. multiclass T2I_ext_rrot_sxtb16 opcod, string opc> { - def r : T2I<(outs rGPR:$dst), (ins rGPR:$src), IIC_iEXTr, - opc, "\t$dst, $src", []> { + def r : T2TwoReg<(outs rGPR:$Rd), (ins rGPR:$Rm), IIC_iEXTr, + opc, "\t$Rd, $Rm", []> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0100; let Inst{22-20} = opcod; @@ -966,24 +970,26 @@ let Inst{7} = 1; let Inst{5-4} = 0b00; // rotate } - def r_rot : T2I<(outs rGPR:$dst), (ins rGPR:$src, i32imm:$rot), IIC_iEXTr, - opc, "\t$dst, $src, ror $rot", []> { + def r_rot : T2TwoReg<(outs rGPR:$Rd), (ins rGPR:$Rm, i32imm:$rot), IIC_iEXTr, + opc, "\t$Rd, $Rm, ror $rot", []> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0100; let Inst{22-20} = opcod; let Inst{19-16} = 0b1111; // Rn let Inst{15-12} = 0b1111; let Inst{7} = 1; - let Inst{5-4} = {?,?}; // rotate + + bits<2> rot; + let Inst{5-4} = rot{1-0}; // rotate } } /// T2I_exta_rrot - A binary operation with two forms: one whose operand is a /// register and one whose operand is a register rotated by 8/16/24. multiclass T2I_exta_rrot opcod, string opc, PatFrag opnode> { - def rr : T2I<(outs rGPR:$dst), (ins rGPR:$LHS, rGPR:$RHS), IIC_iEXTAr, - opc, "\t$dst, $LHS, $RHS", - [(set rGPR:$dst, (opnode rGPR:$LHS, rGPR:$RHS))]>, + def rr : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iEXTAr, + opc, "\t$Rd, $Rn, $Rm", + [(set rGPR:$Rd, (opnode rGPR:$Rn, rGPR:$Rm))]>, Requires<[HasT2ExtractPack, IsThumb2]> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0100; @@ -992,25 +998,27 @@ let Inst{7} = 1; let Inst{5-4} = 0b00; // rotate } - def rr_rot : T2I<(outs rGPR:$dst), (ins rGPR:$LHS, rGPR:$RHS, i32imm:$rot), - IIC_iEXTAsr, opc, "\t$dst, $LHS, $RHS, ror $rot", - [(set rGPR:$dst, (opnode rGPR:$LHS, - (rotr rGPR:$RHS, rot_imm:$rot)))]>, + def rr_rot : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, i32imm:$rot), + IIC_iEXTAsr, opc, "\t$Rd, $Rn, $Rm, ror $rot", + [(set rGPR:$Rd, (opnode rGPR:$Rn, + (rotr rGPR:$Rm, rot_imm:$rot)))]>, Requires<[HasT2ExtractPack, IsThumb2]> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0100; let Inst{22-20} = opcod; let Inst{15-12} = 0b1111; let Inst{7} = 1; - let Inst{5-4} = {?,?}; // rotate + + bits<2> rot; + let Inst{5-4} = rot{1-0}; // rotate } } // DO variant - disassembly only, no pattern multiclass T2I_exta_rrot_DO opcod, string opc> { - def rr : T2I<(outs rGPR:$dst), (ins rGPR:$LHS, rGPR:$RHS), IIC_iEXTAr, - opc, "\t$dst, $LHS, $RHS", []> { + def rr : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iEXTAr, + opc, "\t$Rd, $Rn, $Rm", []> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0100; let Inst{22-20} = opcod; @@ -1018,14 +1026,16 @@ let Inst{7} = 1; let Inst{5-4} = 0b00; // rotate } - def rr_rot : T2I<(outs rGPR:$dst), (ins rGPR:$LHS, rGPR:$RHS, i32imm:$rot), - IIC_iEXTAsr, opc, "\t$dst, $LHS, $RHS, ror $rot", []> { + def rr_rot : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, i32imm:$rot), + IIC_iEXTAsr, opc, "\t$Rd, $Rn, $Rm, ror $rot", []> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0100; let Inst{22-20} = opcod; let Inst{15-12} = 0b1111; let Inst{7} = 1; - let Inst{5-4} = {?,?}; // rotate + + bits<2> rot; + let Inst{5-4} = rot{1-0}; // rotate } } Modified: llvm/trunk/test/MC/ARM/thumb2.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/thumb2.s?rev=119185&r1=119184&r2=119185&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/thumb2.s (original) +++ llvm/trunk/test/MC/ARM/thumb2.s Mon Nov 15 15:12:05 2010 @@ -31,4 +31,7 @@ @ CHECK: cmp.w r0, #1114112 @ encoding: [0x88,0x1f,0xb0,0xf5] cmp.w r0, #1114112 @ CHECK: cmp.w r0, r1, lsl #5 @ encoding: [0x41,0x1f,0xb0,0xeb] - cmp.w r0, r1, lsl #5 \ No newline at end of file + cmp.w r0, r1, lsl #5 + +@ CHECK: sxtab r0, r1, r0 @ encoding: [0x80,0xf0,0x41,0xfa] + sxtab r0, r1, r0 @ encoding: [0x80,0xf0,0x41,0xfa] \ No newline at end of file From lattner at apple.com Mon Nov 15 15:18:28 2010 From: lattner at apple.com (Tanya Lattner) Date: Mon, 15 Nov 2010 13:18:28 -0800 Subject: [llvm-commits] [PATCH] Add OpenCL support to makefile system In-Reply-To: <20101115200317.GA19347@pcc.me.uk> References: <20101115200317.GA19347@pcc.me.uk> Message-ID: Peter, Can you explain a little bit more about your intentions with these changes? To me, it seems like your runtime library should have its own separate build system and not rely on LLVM Makefiles. I do not think we would ever want to ship a OpenCL runtime library with LLVM. Thanks, Tanya On Nov 15, 2010, at 12:03 PM, Peter Collingbourne wrote: > Hi, > > These patches add OpenCL support to the LLVM makefile system. > Needed to build OpenCL components (in my case, a runtime library) > using the makefile system. > > OK to commit? > > Thanks, > -- > Peter > <0001-Add-SOURCE_SUFFIXES-used-to-build-the-inferred-file-.patch><0002-Add-OpenCL-support-to-makefile-system.patch>_______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From evan.cheng at apple.com Mon Nov 15 15:20:45 2010 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 15 Nov 2010 21:20:45 -0000 Subject: [llvm-commits] [llvm] r119186 - in /llvm/trunk: include/llvm/Target/TargetInstrInfo.h lib/CodeGen/PeepholeOptimizer.cpp lib/Target/ARM/ARMBaseInstrInfo.cpp lib/Target/ARM/ARMBaseInstrInfo.h Message-ID: <20101115212045.E189B2A6C12C@llvm.org> Author: evancheng Date: Mon Nov 15 15:20:45 2010 New Revision: 119186 URL: http://llvm.org/viewvc/llvm-project?rev=119186&view=rev Log: Code clean up. The peephole pass should be the one updating the instruction iterator, not TII->OptimizeCompareInstr. Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrInfo.h?rev=119186&r1=119185&r2=119186&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original) +++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Mon Nov 15 15:20:45 2010 @@ -602,12 +602,10 @@ /// OptimizeCompareInstr - See if the comparison instruction can be converted /// into something more efficient. E.g., on ARM most instructions can set the - /// flags register, obviating the need for a separate CMP. Update the iterator - /// *only* if a transformation took place. + /// flags register, obviating the need for a separate CMP. virtual bool OptimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, int Mask, int Value, - const MachineRegisterInfo *MRI, - MachineBasicBlock::iterator &) const { + const MachineRegisterInfo *MRI) const { return false; } Modified: llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp?rev=119186&r1=119185&r2=119186&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp (original) +++ llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp Mon Nov 15 15:20:45 2010 @@ -82,8 +82,7 @@ } private: - bool OptimizeCmpInstr(MachineInstr *MI, MachineBasicBlock *MBB, - MachineBasicBlock::iterator &MII); + bool OptimizeCmpInstr(MachineInstr *MI, MachineBasicBlock *MBB); bool OptimizeExtInstr(MachineInstr *MI, MachineBasicBlock *MBB, SmallPtrSet &LocalMIs); }; @@ -112,12 +111,10 @@ bool PeepholeOptimizer:: OptimizeExtInstr(MachineInstr *MI, MachineBasicBlock *MBB, SmallPtrSet &LocalMIs) { - LocalMIs.insert(MI); - unsigned SrcReg, DstReg, SubIdx; if (!TII->isCoalescableExtInstr(*MI, SrcReg, DstReg, SubIdx)) return false; - + if (TargetRegisterInfo::isPhysicalRegister(DstReg) || TargetRegisterInfo::isPhysicalRegister(SrcReg)) return false; @@ -242,8 +239,7 @@ /// set) the same flag as the compare, then we can remove the comparison and use /// the flag from the previous instruction. bool PeepholeOptimizer::OptimizeCmpInstr(MachineInstr *MI, - MachineBasicBlock *MBB, - MachineBasicBlock::iterator &NextIter){ + MachineBasicBlock *MBB){ // If this instruction is a comparison against zero and isn't comparing a // physical register, we can try to optimize it. unsigned SrcReg; @@ -253,7 +249,7 @@ return false; // Attempt to optimize the comparison instruction. - if (TII->OptimizeCompareInstr(MI, SrcReg, CmpMask, CmpValue, MRI, NextIter)) { + if (TII->OptimizeCompareInstr(MI, SrcReg, CmpMask, CmpValue, MRI)) { ++NumEliminated; return true; } @@ -262,6 +258,9 @@ } bool PeepholeOptimizer::runOnMachineFunction(MachineFunction &MF) { + if (DisablePeephole) + return false; + TM = &MF.getTarget(); TII = TM->getInstrInfo(); MRI = &MF.getRegInfo(); @@ -276,17 +275,16 @@ for (MachineBasicBlock::iterator MII = I->begin(), MIE = I->end(); MII != MIE; ) { - MachineInstr *MI = &*MII; + MachineInstr *MI = &*MII++; + LocalMIs.insert(MI); + + if (MI->getDesc().hasUnmodeledSideEffects()) + continue; - if (MI->getDesc().isCompare() && - !MI->getDesc().hasUnmodeledSideEffects()) { - if (!DisablePeephole && OptimizeCmpInstr(MI, MBB, MII)) - Changed = true; - else - ++MII; + if (MI->getDesc().isCompare()) { + Changed |= OptimizeCmpInstr(MI, MBB); } else { Changed |= OptimizeExtInstr(MI, MBB, LocalMIs); - ++MII; } } } Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=119186&r1=119185&r2=119186&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Mon Nov 15 15:20:45 2010 @@ -1484,12 +1484,10 @@ } /// OptimizeCompareInstr - Convert the instruction supplying the argument to the -/// comparison into one that sets the zero bit in the flags register. Update the -/// iterator *only* if a transformation took place. +/// comparison into one that sets the zero bit in the flags register. bool ARMBaseInstrInfo:: OptimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, int CmpMask, - int CmpValue, const MachineRegisterInfo *MRI, - MachineBasicBlock::iterator &MII) const { + int CmpValue, const MachineRegisterInfo *MRI) const { if (CmpValue != 0) return false; @@ -1561,7 +1559,6 @@ MI->RemoveOperand(5); MachineInstrBuilder(MI) .addReg(ARM::CPSR, RegState::Define | RegState::Implicit); - MII = llvm::next(MachineBasicBlock::iterator(CmpInstr)); CmpInstr->eraseFromParent(); return true; } Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h?rev=119186&r1=119185&r2=119186&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h (original) +++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h Mon Nov 15 15:20:45 2010 @@ -344,8 +344,7 @@ /// that we can remove a "comparison with zero". virtual bool OptimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, int CmpMask, int CmpValue, - const MachineRegisterInfo *MRI, - MachineBasicBlock::iterator &MII) const; + const MachineRegisterInfo *MRI) const; virtual unsigned getNumMicroOps(const InstrItineraryData *ItinData, const MachineInstr *MI) const; From resistor at mac.com Mon Nov 15 15:30:39 2010 From: resistor at mac.com (Owen Anderson) Date: Mon, 15 Nov 2010 21:30:39 -0000 Subject: [llvm-commits] [llvm] r119187 - /llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Message-ID: <20101115213039.BB5A12A6C12C@llvm.org> Author: resistor Date: Mon Nov 15 15:30:39 2010 New Revision: 119187 URL: http://llvm.org/viewvc/llvm-project?rev=119187&view=rev Log: Attempt to provide encodings for some miscellaneous Thumb2 encodings. Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=119187&r1=119186&r2=119187&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Mon Nov 15 15:30:39 2010 @@ -1047,12 +1047,24 @@ // Miscellaneous Instructions. // +class T2PCOneRegImm pattern> + : T2XI { + bits<4> Rd; + bits<12> label; + + let Inst{11-8} = Rd{3-0}; + let Inst{26} = label{11}; + let Inst{14-12} = label{10-8}; + let Inst{7-0} = label{7-0}; +} + // LEApcrel - Load a pc-relative address into a register without offending the // assembler. let neverHasSideEffects = 1 in { let isReMaterializable = 1 in -def t2LEApcrel : T2XI<(outs rGPR:$dst), (ins i32imm:$label, pred:$p), IIC_iALUi, - "adr${p}.w\t$dst, #$label", []> { +def t2LEApcrel : T2PCOneRegImm<(outs rGPR:$Rd), (ins i32imm:$label, pred:$p), IIC_iALUi, + "adr${p}.w\t$Rd, #$label", []> { let Inst{31-27} = 0b11110; let Inst{25-24} = 0b10; // Inst{23:21} = '11' (add = FALSE) or '00' (add = TRUE) @@ -1060,11 +1072,13 @@ let Inst{20} = 0; let Inst{19-16} = 0b1111; // Rn let Inst{15} = 0; + + } } // neverHasSideEffects -def t2LEApcrelJT : T2XI<(outs rGPR:$dst), +def t2LEApcrelJT : T2PCOneRegImm<(outs rGPR:$Rd), (ins i32imm:$label, nohash_imm:$id, pred:$p), IIC_iALUi, - "adr${p}.w\t$dst, #${label}_${id}", []> { + "adr${p}.w\t$Rd, #${label}_${id}", []> { let Inst{31-27} = 0b11110; let Inst{25-24} = 0b10; // Inst{23:21} = '11' (add = FALSE) or '00' (add = TRUE) @@ -1075,8 +1089,8 @@ } // ADD r, sp, {so_imm|i12} -def t2ADDrSPi : T2sI<(outs GPR:$dst), (ins GPR:$sp, t2_so_imm:$imm), - IIC_iALUi, "add", ".w\t$dst, $sp, $imm", []> { +def t2ADDrSPi : T2sTwoRegImm<(outs GPR:$Rd), (ins GPR:$sp, t2_so_imm:$imm), + IIC_iALUi, "add", ".w\t$Rd, $sp, $imm", []> { let Inst{31-27} = 0b11110; let Inst{25} = 0; let Inst{24-21} = 0b1000; @@ -1084,8 +1098,8 @@ let Inst{19-16} = 0b1101; // Rn = sp let Inst{15} = 0; } -def t2ADDrSPi12 : T2I<(outs GPR:$dst), (ins GPR:$sp, imm0_4095:$imm), - IIC_iALUi, "addw", "\t$dst, $sp, $imm", []> { +def t2ADDrSPi12 : T2TwoRegImm<(outs GPR:$Rd), (ins GPR:$sp, imm0_4095:$imm), + IIC_iALUi, "addw", "\t$Rd, $sp, $imm", []> { let Inst{31-27} = 0b11110; let Inst{25} = 1; let Inst{24-21} = 0b0000; @@ -1095,8 +1109,9 @@ } // ADD r, sp, so_reg -def t2ADDrSPs : T2sI<(outs GPR:$dst), (ins GPR:$sp, t2_so_reg:$rhs), - IIC_iALUsi, "add", ".w\t$dst, $sp, $rhs", []> { +def t2ADDrSPs : T2sTwoRegShiftedReg< + (outs GPR:$Rd), (ins GPR:$sp, t2_so_reg:$ShiftedRm), + IIC_iALUsi, "add", ".w\t$Rd, $sp, $ShiftedRm", []> { let Inst{31-27} = 0b11101; let Inst{26-25} = 0b01; let Inst{24-21} = 0b1000; @@ -1106,8 +1121,8 @@ } // SUB r, sp, {so_imm|i12} -def t2SUBrSPi : T2sI<(outs GPR:$dst), (ins GPR:$sp, t2_so_imm:$imm), - IIC_iALUi, "sub", ".w\t$dst, $sp, $imm", []> { +def t2SUBrSPi : T2sTwoRegImm<(outs GPR:$Rd), (ins GPR:$sp, t2_so_imm:$imm), + IIC_iALUi, "sub", ".w\t$Rd, $sp, $imm", []> { let Inst{31-27} = 0b11110; let Inst{25} = 0; let Inst{24-21} = 0b1101; @@ -1115,8 +1130,8 @@ let Inst{19-16} = 0b1101; // Rn = sp let Inst{15} = 0; } -def t2SUBrSPi12 : T2I<(outs GPR:$dst), (ins GPR:$sp, imm0_4095:$imm), - IIC_iALUi, "subw", "\t$dst, $sp, $imm", []> { +def t2SUBrSPi12 : T2TwoRegImm<(outs GPR:$Rd), (ins GPR:$sp, imm0_4095:$imm), + IIC_iALUi, "subw", "\t$Rd, $sp, $imm", []> { let Inst{31-27} = 0b11110; let Inst{25} = 1; let Inst{24-21} = 0b0101; From clattner at apple.com Mon Nov 15 15:38:38 2010 From: clattner at apple.com (Chris Lattner) Date: Mon, 15 Nov 2010 13:38:38 -0800 Subject: [llvm-commits] [PATCH] Add OpenCL support to makefile system In-Reply-To: References: <20101115200317.GA19347@pcc.me.uk> Message-ID: <60708D87-9F52-4D12-ACB9-DCBADFB737C0@apple.com> On Nov 15, 2010, at 1:18 PM, Tanya Lattner wrote: > Peter, > > Can you explain a little bit more about your intentions with these changes? > > To me, it seems like your runtime library should have its own separate build system and not rely on LLVM Makefiles. I do not think we would ever want to ship a OpenCL runtime library with LLVM. Or, if we did, it seems that it would be another subproject like libc++ or compiler_rt. -Chris From clattner at apple.com Mon Nov 15 15:44:45 2010 From: clattner at apple.com (Chris Lattner) Date: Mon, 15 Nov 2010 13:44:45 -0800 Subject: [llvm-commits] [PATCH][x86] Add support for dynamic stack probing on Windows x64 (Microsoft and MinGW). In-Reply-To: References: Message-ID: <0CB6DFBE-5A8F-4B53-993B-FD02C26451F4@apple.com> On Oct 27, 2010, at 7:53 AM, Michael Spencer wrote: > This patch adds support for stack probing alloca instructions with a > variable size on x86-64. Looks good to me, please apply with a testcase. -Chris From clattner at apple.com Mon Nov 15 15:49:02 2010 From: clattner at apple.com (Chris Lattner) Date: Mon, 15 Nov 2010 13:49:02 -0800 Subject: [llvm-commits] [patch] Change the 11 byte nop In-Reply-To: References: Message-ID: On Oct 27, 2010, at 12:40 PM, Rafael Esp?ndola wrote: > I have no idea if using two 0x66 prefixes is faster or not (the Intel > manual goes till 9 bytes), but this matches what gnu as does. Looks great to me, please apply. It should be faster than the old approach, because it is one instruction instead of two: $ llvm-mc -disassemble 0x66 0x66 0x2e 0x0f 0x1f 0x84 0 0 0 0 0 ^D nopw %cs:(%rax,%rax) $ llvm-mc -disassemble 0x0f 0x1f 0x44 00 00 0x66 0x0f 0x1f 0x44 00 00 ^D nopl (%rax,%rax) nopw (%rax,%rax) From stoklund at 2pi.dk Mon Nov 15 15:51:51 2010 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Mon, 15 Nov 2010 21:51:51 -0000 Subject: [llvm-commits] [llvm] r119270 - in /llvm/trunk: lib/CodeGen/LiveIntervalAnalysis.cpp test/CodeGen/ARM/2010-11-15-SpillEarlyClobber.ll Message-ID: <20101115215151.BA8AA2A6C12C@llvm.org> Author: stoklund Date: Mon Nov 15 15:51:51 2010 New Revision: 119270 URL: http://llvm.org/viewvc/llvm-project?rev=119270&view=rev Log: Revert "Fix PR8612 in the standard spiller as well." This reverts r119183 which borke the buildbots. Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp llvm/trunk/test/CodeGen/ARM/2010-11-15-SpillEarlyClobber.ll Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=119270&r1=119269&r2=119270&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original) +++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Mon Nov 15 15:51:51 2010 @@ -1136,14 +1136,11 @@ rewriteImplicitOps(li, MI, NewVReg, vrm); // Reuse NewVReg for other reads. - bool HasEarlyClobber = false; for (unsigned j = 0, e = Ops.size(); j != e; ++j) { MachineOperand &mopj = MI->getOperand(Ops[j]); mopj.setReg(NewVReg); if (mopj.isImplicit()) rewriteImplicitOps(li, MI, NewVReg, vrm); - if (mopj.isEarlyClobber()) - HasEarlyClobber = true; } if (CreatedNewVReg) { @@ -1202,8 +1199,7 @@ } } if (HasDef) { - LiveRange LR(HasEarlyClobber ? index.getUseIndex() : index.getDefIndex(), - index.getStoreIndex(), + LiveRange LR(index.getDefIndex(), index.getStoreIndex(), nI.getNextValue(SlotIndex(), 0, VNInfoAllocator)); DEBUG(dbgs() << " +" << LR); nI.addRange(LR); Modified: llvm/trunk/test/CodeGen/ARM/2010-11-15-SpillEarlyClobber.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2010-11-15-SpillEarlyClobber.ll?rev=119270&r1=119269&r2=119270&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/2010-11-15-SpillEarlyClobber.ll (original) +++ llvm/trunk/test/CodeGen/ARM/2010-11-15-SpillEarlyClobber.ll Mon Nov 15 15:51:51 2010 @@ -1,4 +1,3 @@ -; RUN: llc < %s -verify-machineinstrs -spiller=standard ; RUN: llc < %s -verify-machineinstrs -spiller=inline ; PR8612 ; From anton at korobeynikov.info Mon Nov 15 15:54:12 2010 From: anton at korobeynikov.info (Anton Korobeynikov) Date: Tue, 16 Nov 2010 00:54:12 +0300 Subject: [llvm-commits] [PATCH][x86] Add support for dynamic stack probing on Windows x64 (Microsoft and MinGW). In-Reply-To: References: Message-ID: + BuildMI(*BB, MI, DL, TII->get(X86::WINCALL64pcrel32)) + .addExternalSymbol("__chkstk") + .addReg(X86::RAX, RegState::Implicit) + .addReg(X86::RSP, RegState::Define | RegState::Implicit); Instruction also changes flags, right? If so, then it should impdef eflags as well. + BuildMI(*BB, MI, DL, TII->get(X86::SUB64rr), X86::RSP) + .addReg(X86::RSP) + .addReg(X86::RAX); Stack should always be aligned on win64, how this is handled here? -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University From peter at pcc.me.uk Mon Nov 15 15:57:03 2010 From: peter at pcc.me.uk (Peter Collingbourne) Date: Mon, 15 Nov 2010 21:57:03 +0000 Subject: [llvm-commits] [PATCH] Add OpenCL support to makefile system In-Reply-To: References: <20101115200317.GA19347@pcc.me.uk> Message-ID: <20101115215703.GB19347@pcc.me.uk> On Mon, Nov 15, 2010 at 01:18:28PM -0800, Tanya Lattner wrote: > Peter, > > Can you explain a little bit more about your intentions with these changes? > > To me, it seems like your runtime library should have its own separate build system and not rely on LLVM Makefiles. I do not think we would ever want to ship a OpenCL runtime library with LLVM. Hi Tanya, The OpenCL runtime library I am working on is an extension of another project (KLEE) which uses the LLVM makefile system, and the easiest way forward for me was to build the kernel runtime library using the existing build system. The second patch is really optional, as I was able to copy the .cl -> .ll rule (which is all I need) to my runtime library makefile and use it there without the patch, but the first patch makes it easier to integrate support for new languages (either internally or externally). Thanks, -- Peter From clattner at apple.com Mon Nov 15 16:14:58 2010 From: clattner at apple.com (Chris Lattner) Date: Mon, 15 Nov 2010 14:14:58 -0800 Subject: [llvm-commits] [llvm] r119107 - in /llvm/trunk: CMakeLists.txt include/llvm/Object/ include/llvm/Object/ObjectFile.h lib/Makefile lib/Object/ lib/Object/CMakeLists.txt lib/Object/ObjectFile.cpp In-Reply-To: <20101115032141.B88132A6C12C@llvm.org> References: <20101115032141.B88132A6C12C@llvm.org> Message-ID: On Nov 14, 2010, at 7:21 PM, Michael J. Spencer wrote: > URL: http://llvm.org/viewvc/llvm-project?rev=119107&view=rev > Log: > Add LLVMObject Library. Looks nice, some minor stuff: > +#include "llvm/ADT/Triple.h" > +#include "llvm/System/Path.h" You should be able to forward declare sys::Path to avoid the Path #include. It take it that you decided not to use an 'unsigned' for the getArch() return value? > --- llvm/trunk/lib/Object/ObjectFile.cpp (added) > +++ llvm/trunk/lib/Object/ObjectFile.cpp Sun Nov 14 21:21:41 2010 ... > +#include "llvm/Object/ObjectFile.h" > +#include "llvm/Support/ErrorHandling.h" > +#include "llvm/Support/MemoryBuffer.h" > + > +namespace llvm { > +namespace object { Instead of nesting the entire contents of the file in the namespace, please use "using namespace" to pull them in scope. using namespace is a good solution for .cpp files (but obviously not for headers). > +ObjectFile *ObjectFile::createObjectFile(const sys::Path &ObjectPath) { > + return createObjectFile(MemoryBuffer::getFile(ObjectPath.c_str())); > +} Do we really want to encourage/force sys::path here? Why not take a stringref? -Chris From daniel at zuster.org Mon Nov 15 16:22:42 2010 From: daniel at zuster.org (Daniel Dunbar) Date: Mon, 15 Nov 2010 14:22:42 -0800 Subject: [llvm-commits] [PATCH] Add OpenCL support to makefile system In-Reply-To: <20101115215703.GB19347@pcc.me.uk> References: <20101115200317.GA19347@pcc.me.uk> <20101115215703.GB19347@pcc.me.uk> Message-ID: Hi Peter, I've never been really happy about KLEE using the LLVM Makefiles, I think we should probably find a way to solve this wholly on the KLEE side (even if it means just cloning all of the existing LLVM Makefiles to start with). Not very fun work, I know... - Daniel On Mon, Nov 15, 2010 at 1:57 PM, Peter Collingbourne wrote: > On Mon, Nov 15, 2010 at 01:18:28PM -0800, Tanya Lattner wrote: >> Peter, >> >> Can you explain a little bit more about your intentions with these changes? >> >> To me, it seems like your runtime library should have its own separate build system and not rely on LLVM Makefiles. I do not think we would ever want to ship a OpenCL runtime library with LLVM. > > Hi Tanya, > > The OpenCL runtime library I am working on is an extension of another > project (KLEE) which uses the LLVM makefile system, and the easiest > way forward for me was to build the kernel runtime library using the > existing build system. > > The second patch is really optional, as I was able to copy the .cl -> > .ll rule (which is all I need) to my runtime library makefile and use > it there without the patch, but the first patch makes it easier to > integrate support for new languages (either internally or externally). > > Thanks, > -- > Peter > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > From bigcheesegs at gmail.com Mon Nov 15 16:51:31 2010 From: bigcheesegs at gmail.com (Michael Spencer) Date: Mon, 15 Nov 2010 17:51:31 -0500 Subject: [llvm-commits] [llvm] r119107 - in /llvm/trunk: CMakeLists.txt include/llvm/Object/ include/llvm/Object/ObjectFile.h lib/Makefile lib/Object/ lib/Object/CMakeLists.txt lib/Object/ObjectFile.cpp In-Reply-To: References: <20101115032141.B88132A6C12C@llvm.org> Message-ID: On Mon, Nov 15, 2010 at 5:14 PM, Chris Lattner wrote: > On Nov 14, 2010, at 7:21 PM, Michael J. Spencer wrote: >> URL: http://llvm.org/viewvc/llvm-project?rev=119107&view=rev >> Log: >> Add LLVMObject Library. > > Looks nice, some minor stuff: > >> +#include "llvm/ADT/Triple.h" >> +#include "llvm/System/Path.h" > > You should be able to forward declare sys::Path to avoid the Path #include. ?It take it that you decided not to use an 'unsigned' for the getArch() return value? I'll get rid of Path. I decided not to use unsigned because it would require adding casts in other places, although this can change. >> --- llvm/trunk/lib/Object/ObjectFile.cpp (added) >> +++ llvm/trunk/lib/Object/ObjectFile.cpp Sun Nov 14 21:21:41 2010 > ... > >> +#include "llvm/Object/ObjectFile.h" >> +#include "llvm/Support/ErrorHandling.h" >> +#include "llvm/Support/MemoryBuffer.h" >> + >> +namespace llvm { >> +namespace object { > > Instead of nesting the entire contents of the file in the namespace, please use "using namespace" to pull them in scope. ?using namespace is a good solution for .cpp files (but obviously not for headers). OK. >> +ObjectFile *ObjectFile::createObjectFile(const sys::Path &ObjectPath) { >> + ?return createObjectFile(MemoryBuffer::getFile(ObjectPath.c_str())); >> +} > > Do we really want to encourage/force sys::path here? ?Why not take a stringref? > > -Chris I think for historical reasons. I'll change it. - Michael Spencer From sabre at nondot.org Mon Nov 15 16:50:51 2010 From: sabre at nondot.org (Chris Lattner) Date: Mon, 15 Nov 2010 22:50:51 -0000 Subject: [llvm-commits] [llvm] r119283 - /llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp Message-ID: <20101115225051.198E32A6C12C@llvm.org> Author: lattner Date: Mon Nov 15 16:50:50 2010 New Revision: 119283 URL: http://llvm.org/viewvc/llvm-project?rev=119283&view=rev Log: fix a pasto that massively broke the ppc jit while the buildbots happened to be broken for other reasons Modified: llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp Modified: llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp?rev=119283&r1=119282&r2=119283&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp Mon Nov 15 16:50:50 2010 @@ -168,8 +168,8 @@ RelocID, MO.getIndex(), Cst); if (MO.isMBB()) - MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(), - RelocID, MO.getMBB())); + return MachineRelocation::getBB(MCE.getCurrentPCOffset(), + RelocID, MO.getMBB()); assert(MO.isJTI()); return MachineRelocation::getJumpTable(MCE.getCurrentPCOffset(), From rafael.espindola at gmail.com Mon Nov 15 17:10:30 2010 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Mon, 15 Nov 2010 23:10:30 -0000 Subject: [llvm-commits] [llvm] r119286 - in /llvm/trunk: lib/Target/X86/X86AsmBackend.cpp test/MC/MachO/x86_32-optimal_nop.s Message-ID: <20101115231030.9BA2A2A6C12C@llvm.org> Author: rafael Date: Mon Nov 15 17:10:30 2010 New Revision: 119286 URL: http://llvm.org/viewvc/llvm-project?rev=119286&view=rev Log: Change the 11 byte nop to be a single instruction. Modified: llvm/trunk/lib/Target/X86/X86AsmBackend.cpp llvm/trunk/test/MC/MachO/x86_32-optimal_nop.s Modified: llvm/trunk/lib/Target/X86/X86AsmBackend.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86AsmBackend.cpp?rev=119286&r1=119285&r2=119286&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86AsmBackend.cpp (original) +++ llvm/trunk/lib/Target/X86/X86AsmBackend.cpp Mon Nov 15 17:10:30 2010 @@ -235,10 +235,8 @@ {0x66, 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00}, // nopw %cs:0L(%[re]ax,%[re]ax,1) {0x66, 0x2e, 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00}, - // nopl 0(%[re]ax,%[re]ax,1) - // nopw 0(%[re]ax,%[re]ax,1) - {0x0f, 0x1f, 0x44, 0x00, 0x00, - 0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00}, + // nopw %cs:0L(%[re]ax,%[re]ax,1) + {0x66, 0x66, 0x2e, 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00}, // nopw 0(%[re]ax,%[re]ax,1) // nopw 0(%[re]ax,%[re]ax,1) {0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00, Modified: llvm/trunk/test/MC/MachO/x86_32-optimal_nop.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/MachO/x86_32-optimal_nop.s?rev=119286&r1=119285&r2=119286&view=diff ============================================================================== --- llvm/trunk/test/MC/MachO/x86_32-optimal_nop.s (original) +++ llvm/trunk/test/MC/MachO/x86_32-optimal_nop.s Mon Nov 15 17:10:30 2010 @@ -104,7 +104,7 @@ ret ret # nopw %cs:0L(%[re]ax,%[re]ax,1) - # 0x66, 0x2e, 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00 + # 0x66, 0x66, 0x2e, 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00 .align 4, 0x90 ret # 12 byte nop test @@ -192,7 +192,7 @@ // CHECK: ), // CHECK: ('_relocations', [ // CHECK: ]) -// CHECK: ('_section_data', 'c390c300 00000000 00000000 00000000 c3c36690 c3000000 00000000 00000000 c30f1f00 c3000000 00000000 00000000 c3c3c3c3 0f1f4000 c3000000 00000000 c3c3c30f 1f440000 c3000000 00000000 c3c3660f 1f440000 c3000000 00000000 c30f1f80 00000000 c3000000 00000000 c3c3c3c3 c3c3c3c3 c3000000 00000000 c3c3c3c3 c3c3c366 0f1f8400 00000000 c3000000 00000000 00000000 00000000 c3c3c3c3 c3c3c366 0f1f8400 00000000 c3000000 00000000 00000000 00000000 c3c3c3c3 c30f1f44 0000660f 1f440000 c3000000 00000000 00000000 00000000 c3c3c3c3 660f1f44 0000660f 1f440000 c3000000 00000000 00000000 00000000 c3c3c366 0f1f4400 000f1f80 00000000 c3000000 00000000 00000000 00000000 c3c30f1f 80000000 000f1f80 00000000 c3000000 00000000 00000000 00000000 c30f1f80 00000000 0f1f8400 00000000 c3') +// CHECK: ('_section_data', 'c390c300 00000000 00000000 00000000 c3c36690 c3000000 00000000 00000000 c30f1f00 c3000000 00000000 00000000 c3c3c3c3 0f1f4000 c3000000 00000000 c3c3c30f 1f440000 c3000000 00000000 c3c3660f 1f440000 c3000000 00000000 c30f1f80 00000000 c3000000 00000000 c3c3c3c3 c3c3c3c3 c3000000 00000000 c3c3c3c3 c3c3c366 0f1f8400 00000000 c3000000 00000000 00000000 00000000 c3c3c3c3 c3c3c366 0f1f8400 00000000 c3000000 00000000 00000000 00000000 c3c3c3c3 c366662e 0f1f8400 00000000 c3000000 00000000 00000000 00000000 c3c3c3c3 660f1f44 0000660f 1f440000 c3000000 00000000 00000000 00000000 c3c3c366 0f1f4400 000f1f80 00000000 c3000000 00000000 00000000 00000000 c3c30f1f 80000000 000f1f80 00000000 c3000000 00000000 00000000 00000000 c30f1f80 00000000 0f1f8400 00000000 c3') // CHECK: # Section 1 // CHECK: (('section_name', '__const\x00\x00\x00\x00\x00\x00\x00\x00\x00') // CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') From aggarwa4 at illinois.edu Mon Nov 15 17:58:47 2010 From: aggarwa4 at illinois.edu (Arushi Aggarwal) Date: Mon, 15 Nov 2010 23:58:47 -0000 Subject: [llvm-commits] [poolalloc] r119291 - /poolalloc/trunk/lib/DSA/BottomUpClosure.cpp Message-ID: <20101115235847.9CF942A6C12C@llvm.org> Author: aggarwa4 Date: Mon Nov 15 17:58:47 2010 New Revision: 119291 URL: http://llvm.org/viewvc/llvm-project?rev=119291&view=rev Log: Since Local pass does not merge in information from the global graph to each of the graphs, the information might be incomplete. Hence, propogate at the beginning of BU. Modified: poolalloc/trunk/lib/DSA/BottomUpClosure.cpp Modified: poolalloc/trunk/lib/DSA/BottomUpClosure.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/BottomUpClosure.cpp?rev=119291&r1=119290&r2=119291&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/BottomUpClosure.cpp (original) +++ poolalloc/trunk/lib/DSA/BottomUpClosure.cpp Mon Nov 15 17:58:47 2010 @@ -83,8 +83,10 @@ // for their DSGraphs, and we want to have them if asked. // for (Module::iterator F = M.begin(); F != M.end(); ++F) { - if (!(F->isDeclaration())) - getOrCreateGraph(F); + if (!(F->isDeclaration())){ + DSGraph *Graph = getOrCreateGraph(F); + cloneGlobalsInto(Graph); + } } // @@ -803,8 +805,8 @@ for (unsigned x = 0; x < CalledFuncs.size(); ++x) { const Function *Callee = CalledFuncs[x]; - // Get the data structure graph for the called function. + GI = getDSGraph(*Callee); // Graph to inline DEBUG(GI->AssertGraphOK(); GI->getGlobalsGraph()->AssertGraphOK()); DEBUG(errs() << " Inlining graph for " << Callee->getName() From dalej at apple.com Mon Nov 15 18:07:59 2010 From: dalej at apple.com (Dale Johannesen) Date: Tue, 16 Nov 2010 00:07:59 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r119292 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Message-ID: <20101116000759.591DE2A6C12C@llvm.org> Author: johannes Date: Mon Nov 15 18:07:59 2010 New Revision: 119292 URL: http://llvm.org/viewvc/llvm-project?rev=119292&view=rev Log: Checks for asm register variables should be checking DECL_HARD_REGISTER not DECL_REGISTER. ASM_ASM_BLOCKS change is work in progress. Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=119292&r1=119291&r2=119292&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Mon Nov 15 18:07:59 2010 @@ -2450,7 +2450,7 @@ static bool canEmitLocalRegisterVariable(tree exp) { // Only variables can be marked as 'register'. - if (TREE_CODE(exp) != VAR_DECL || !DECL_REGISTER(exp)) + if (TREE_CODE(exp) != VAR_DECL || !DECL_HARD_REGISTER(exp)) return false; // Global register variables are not accepted here. @@ -2467,7 +2467,7 @@ static bool canEmitGlobalRegisterVariable(tree exp) { // Only variables can be marked as 'register'. - if (TREE_CODE(exp) != VAR_DECL || !DECL_REGISTER(exp)) + if (TREE_CODE(exp) != VAR_DECL || !DECL_HARD_REGISTER(exp)) return false; // Local register variables are not accepted here. @@ -4776,6 +4776,7 @@ unsigned NumInputs = list_length(ASM_INPUTS(exp)); unsigned NumOutputs = list_length(ASM_OUTPUTS(exp)); unsigned NumInOut = 0; + bool isAsmBlock = ASM_ASM_BLOCK(exp); // Look for multiple alternative constraints: multiple alternatives separated // by commas. @@ -5156,7 +5157,7 @@ } Value *Asm = InlineAsm::get(FTy, NewAsmStr, ConstraintStr, - HasSideEffects, ASM_ASM_BLOCK(exp)); + HasSideEffects, isAsmBlock); CallInst *CV = Builder.CreateCall(Asm, CallOps.begin(), CallOps.end(), CallResultTypes.empty() ? "" : "asmtmp"); CV->setDoesNotThrow(); From dalej at apple.com Mon Nov 15 18:24:33 2010 From: dalej at apple.com (Dale Johannesen) Date: Tue, 16 Nov 2010 00:24:33 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r119294 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Message-ID: <20101116002433.8ECB92A6C12C@llvm.org> Author: johannes Date: Mon Nov 15 18:24:33 2010 New Revision: 119294 URL: http://llvm.org/viewvc/llvm-project?rev=119294&view=rev Log: Revert 119292 which broke the build. Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=119294&r1=119293&r2=119294&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Mon Nov 15 18:24:33 2010 @@ -2450,7 +2450,7 @@ static bool canEmitLocalRegisterVariable(tree exp) { // Only variables can be marked as 'register'. - if (TREE_CODE(exp) != VAR_DECL || !DECL_HARD_REGISTER(exp)) + if (TREE_CODE(exp) != VAR_DECL || !DECL_REGISTER(exp)) return false; // Global register variables are not accepted here. @@ -2467,7 +2467,7 @@ static bool canEmitGlobalRegisterVariable(tree exp) { // Only variables can be marked as 'register'. - if (TREE_CODE(exp) != VAR_DECL || !DECL_HARD_REGISTER(exp)) + if (TREE_CODE(exp) != VAR_DECL || !DECL_REGISTER(exp)) return false; // Local register variables are not accepted here. @@ -4776,7 +4776,6 @@ unsigned NumInputs = list_length(ASM_INPUTS(exp)); unsigned NumOutputs = list_length(ASM_OUTPUTS(exp)); unsigned NumInOut = 0; - bool isAsmBlock = ASM_ASM_BLOCK(exp); // Look for multiple alternative constraints: multiple alternatives separated // by commas. @@ -5157,7 +5156,7 @@ } Value *Asm = InlineAsm::get(FTy, NewAsmStr, ConstraintStr, - HasSideEffects, isAsmBlock); + HasSideEffects, ASM_ASM_BLOCK(exp)); CallInst *CV = Builder.CreateCall(Asm, CallOps.begin(), CallOps.end(), CallResultTypes.empty() ? "" : "asmtmp"); CV->setDoesNotThrow(); From resistor at mac.com Mon Nov 15 18:29:56 2010 From: resistor at mac.com (Owen Anderson) Date: Tue, 16 Nov 2010 00:29:56 -0000 Subject: [llvm-commits] [llvm] r119295 - in /llvm/trunk: lib/Target/ARM/ARMInstrThumb2.td test/MC/ARM/thumb2.s Message-ID: <20101116002956.DCE362A6C12C@llvm.org> Author: resistor Date: Mon Nov 15 18:29:56 2010 New Revision: 119295 URL: http://llvm.org/viewvc/llvm-project?rev=119295&view=rev Log: Add Thumb2 encodings for mov and friends. Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td llvm/trunk/test/MC/ARM/thumb2.s Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=119295&r1=119294&r2=119295&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Mon Nov 15 18:29:56 2010 @@ -1141,9 +1141,9 @@ } // SUB r, sp, so_reg -def t2SUBrSPs : T2sI<(outs GPR:$dst), (ins GPR:$sp, t2_so_reg:$rhs), +def t2SUBrSPs : T2sTwoRegImm<(outs GPR:$Rd), (ins GPR:$sp, t2_so_reg:$imm), IIC_iALUsi, - "sub", "\t$dst, $sp, $rhs", []> { + "sub", "\t$Rd, $sp, $imm", []> { let Inst{31-27} = 0b11101; let Inst{26-25} = 0b01; let Inst{24-21} = 0b1101; @@ -1153,9 +1153,9 @@ } // Signed and unsigned division on v7-M -def t2SDIV : T2I<(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b), IIC_iALUi, - "sdiv", "\t$dst, $a, $b", - [(set rGPR:$dst, (sdiv rGPR:$a, rGPR:$b))]>, +def t2SDIV : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iALUi, + "sdiv", "\t$Rd, $Rn, $Rm", + [(set rGPR:$Rd, (sdiv rGPR:$Rn, rGPR:$Rm))]>, Requires<[HasDivide]> { let Inst{31-27} = 0b11111; let Inst{26-21} = 0b011100; @@ -1164,9 +1164,9 @@ let Inst{7-4} = 0b1111; } -def t2UDIV : T2I<(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b), IIC_iALUi, - "udiv", "\t$dst, $a, $b", - [(set rGPR:$dst, (udiv rGPR:$a, rGPR:$b))]>, +def t2UDIV : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iALUi, + "udiv", "\t$Rd, $Rn, $Rm", + [(set rGPR:$Rd, (udiv rGPR:$Rn, rGPR:$Rm))]>, Requires<[HasDivide]> { let Inst{31-27} = 0b11111; let Inst{26-21} = 0b011101; @@ -1634,8 +1634,8 @@ // let neverHasSideEffects = 1 in -def t2MOVr : T2sI<(outs GPR:$dst), (ins GPR:$src), IIC_iMOVr, - "mov", ".w\t$dst, $src", []> { +def t2MOVr : T2sTwoReg<(outs GPR:$Rd), (ins GPR:$Rm), IIC_iMOVr, + "mov", ".w\t$Rd, $Rm", []> { let Inst{31-27} = 0b11101; let Inst{26-25} = 0b01; let Inst{24-21} = 0b0010; @@ -1647,9 +1647,9 @@ // AddedComplexity to ensure isel tries t2MOVi before t2MOVi16. let isReMaterializable = 1, isAsCheapAsAMove = 1, AddedComplexity = 1 in -def t2MOVi : T2sI<(outs rGPR:$dst), (ins t2_so_imm:$src), IIC_iMOVi, - "mov", ".w\t$dst, $src", - [(set rGPR:$dst, t2_so_imm:$src)]> { +def t2MOVi : T2sOneRegImm<(outs rGPR:$Rd), (ins t2_so_imm:$imm), IIC_iMOVi, + "mov", ".w\t$Rd, $imm", + [(set rGPR:$Rd, t2_so_imm:$imm)]> { let Inst{31-27} = 0b11110; let Inst{25} = 0; let Inst{24-21} = 0b0010; @@ -1659,26 +1659,44 @@ } let isReMaterializable = 1, isAsCheapAsAMove = 1 in -def t2MOVi16 : T2I<(outs rGPR:$dst), (ins i32imm:$src), IIC_iMOVi, - "movw", "\t$dst, $src", - [(set rGPR:$dst, imm0_65535:$src)]> { +def t2MOVi16 : T2I<(outs rGPR:$Rd), (ins i32imm:$imm), IIC_iMOVi, + "movw", "\t$Rd, $imm", + [(set rGPR:$Rd, imm0_65535:$imm)]> { let Inst{31-27} = 0b11110; let Inst{25} = 1; let Inst{24-21} = 0b0010; let Inst{20} = 0; // The S bit. let Inst{15} = 0; + + bits<4> Rd; + bits<16> imm; + + let Inst{11-8} = Rd{3-0}; + let Inst{19-16} = imm{15-12}; + let Inst{26} = imm{11}; + let Inst{14-12} = imm{10-8}; + let Inst{7-0} = imm{7-0}; } -let Constraints = "$src = $dst" in -def t2MOVTi16 : T2I<(outs rGPR:$dst), (ins rGPR:$src, i32imm:$imm), IIC_iMOVi, - "movt", "\t$dst, $imm", - [(set rGPR:$dst, +let Constraints = "$src = $Rd" in +def t2MOVTi16 : T2I<(outs rGPR:$Rd), (ins rGPR:$src, i32imm:$imm), IIC_iMOVi, + "movt", "\t$Rd, $imm", + [(set rGPR:$Rd, (or (and rGPR:$src, 0xffff), lo16AllZero:$imm))]> { let Inst{31-27} = 0b11110; let Inst{25} = 1; let Inst{24-21} = 0b0110; let Inst{20} = 0; // The S bit. let Inst{15} = 0; + + bits<4> Rd; + bits<16> imm; + + let Inst{11-8} = Rd{3-0}; + let Inst{19-16} = imm{15-12}; + let Inst{26} = imm{11}; + let Inst{14-12} = imm{10-8}; + let Inst{7-0} = imm{7-0}; } def : T2Pat<(or rGPR:$src, 0xffff0000), (t2MOVTi16 rGPR:$src, 0xffff)>; @@ -2563,15 +2581,24 @@ let Inst{15} = 0; } -def t2MOVCCi16 : T2I<(outs rGPR:$dst), (ins rGPR:$false, i32imm:$src), +def t2MOVCCi16 : T2I<(outs rGPR:$Rd), (ins rGPR:$false, i32imm:$imm), IIC_iCMOVi, - "movw", "\t$dst, $src", []>, - RegConstraint<"$false = $dst"> { + "movw", "\t$Rd, $imm", []>, + RegConstraint<"$false = $Rd"> { let Inst{31-27} = 0b11110; let Inst{25} = 1; let Inst{24-21} = 0b0010; let Inst{20} = 0; // The S bit. let Inst{15} = 0; + + bits<4> Rd; + bits<16> imm; + + let Inst{11-8} = Rd{3-0}; + let Inst{19-16} = imm{15-12}; + let Inst{26} = imm{11}; + let Inst{14-12} = imm{10-8}; + let Inst{7-0} = imm{7-0}; } def t2MOVCCi32imm : PseudoInst<(outs rGPR:$dst), Modified: llvm/trunk/test/MC/ARM/thumb2.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/thumb2.s?rev=119295&r1=119294&r2=119295&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/thumb2.s (original) +++ llvm/trunk/test/MC/ARM/thumb2.s Mon Nov 15 18:29:56 2010 @@ -34,4 +34,17 @@ cmp.w r0, r1, lsl #5 @ CHECK: sxtab r0, r1, r0 @ encoding: [0x80,0xf0,0x41,0xfa] - sxtab r0, r1, r0 @ encoding: [0x80,0xf0,0x41,0xfa] \ No newline at end of file + sxtab r0, r1, r0 @ encoding: [0x80,0xf0,0x41,0xfa] + +@ CHECK: movw r0, #65535 @ encoding: [0xff,0x70,0x4f,0xf6] + movw r0, #65535 +@ CHECK: movw r1, #43777 @ encoding: [0x01,0x31,0x4a,0xf6] + movw r1, #43777 +@ CHECK: movt r1, #427 @ encoding: [0xab,0x11,0xc0,0xf2] + movt r1, #427 +@ CHECK: movw r1, #43792 @ encoding: [0x10,0x31,0x4a,0xf6] + movw r1, #43792 +@ CHECK: movt r1, #4267 @ encoding: [0xab,0x01,0xc0,0xf2] + movt r1, #4267 +@ CHECK: mov.w r0, #66846720 @ encoding: [0x7f,0x70,0x4f,0xf0] + mov.w r0, #66846720 From daniel at zuster.org Mon Nov 15 18:32:12 2010 From: daniel at zuster.org (Daniel Dunbar) Date: Tue, 16 Nov 2010 00:32:12 -0000 Subject: [llvm-commits] [zorg] r119296 - /zorg/trunk/buildbot/osuosl/master/config/builders.py Message-ID: <20101116003212.6FBD42A6C12C@llvm.org> Author: ddunbar Date: Mon Nov 15 18:32:12 2010 New Revision: 119296 URL: http://llvm.org/viewvc/llvm-project?rev=119296&view=rev Log: buildbot: Switch FreeBSD builder to do clean builds for a while. Modified: zorg/trunk/buildbot/osuosl/master/config/builders.py Modified: zorg/trunk/buildbot/osuosl/master/config/builders.py URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/buildbot/osuosl/master/config/builders.py?rev=119296&r1=119295&r2=119296&view=diff ============================================================================== --- zorg/trunk/buildbot/osuosl/master/config/builders.py (original) +++ zorg/trunk/buildbot/osuosl/master/config/builders.py Mon Nov 15 18:32:12 2010 @@ -159,7 +159,7 @@ {'name': "clang-i686-freebsd", 'slavenames':["freebsd1"], 'builddir':"clang-i686-freebsd", - 'factory': ClangBuilder.getClangBuildFactory(clean=False, use_pty_in_tests=True)}, + 'factory': ClangBuilder.getClangBuildFactory(clean=True, use_pty_in_tests=True)}, {'name' : "clang-i686-xp-msvc9", 'slavenames' :['dunbar-win32-2'], 'builddir' :"clang-i686-xp-msvc9", From clattner at apple.com Mon Nov 15 18:36:41 2010 From: clattner at apple.com (Chris Lattner) Date: Mon, 15 Nov 2010 16:36:41 -0800 Subject: [llvm-commits] [llvm] r119107 - in /llvm/trunk: CMakeLists.txt include/llvm/Object/ include/llvm/Object/ObjectFile.h lib/Makefile lib/Object/ lib/Object/CMakeLists.txt lib/Object/ObjectFile.cpp In-Reply-To: References: <20101115032141.B88132A6C12C@llvm.org> Message-ID: On Nov 15, 2010, at 2:51 PM, Michael Spencer wrote: > On Mon, Nov 15, 2010 at 5:14 PM, Chris Lattner wrote: >> On Nov 14, 2010, at 7:21 PM, Michael J. Spencer wrote: >>> URL: http://llvm.org/viewvc/llvm-project?rev=119107&view=rev >>> Log: >>> Add LLVMObject Library. >> >> Looks nice, some minor stuff: >> >>> +#include "llvm/ADT/Triple.h" >>> +#include "llvm/System/Path.h" >> >> You should be able to forward declare sys::Path to avoid the Path #include. It take it that you decided not to use an 'unsigned' for the getArch() return value? > > I'll get rid of Path. I decided not to use unsigned because it would > require adding casts in other places, although this can change. Sounds good, thanks! -Chris > >>> --- llvm/trunk/lib/Object/ObjectFile.cpp (added) >>> +++ llvm/trunk/lib/Object/ObjectFile.cpp Sun Nov 14 21:21:41 2010 >> ... >> >>> +#include "llvm/Object/ObjectFile.h" >>> +#include "llvm/Support/ErrorHandling.h" >>> +#include "llvm/Support/MemoryBuffer.h" >>> + >>> +namespace llvm { >>> +namespace object { >> >> Instead of nesting the entire contents of the file in the namespace, please use "using namespace" to pull them in scope. using namespace is a good solution for .cpp files (but obviously not for headers). > > OK. > >>> +ObjectFile *ObjectFile::createObjectFile(const sys::Path &ObjectPath) { >>> + return createObjectFile(MemoryBuffer::getFile(ObjectPath.c_str())); >>> +} >> >> Do we really want to encourage/force sys::path here? Why not take a stringref? >> >> -Chris > > I think for historical reasons. I'll change it. > > - Michael Spencer From stoklund at 2pi.dk Mon Nov 15 18:40:59 2010 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Tue, 16 Nov 2010 00:40:59 -0000 Subject: [llvm-commits] [llvm] r119305 - in /llvm/trunk: lib/CodeGen/LiveIntervalAnalysis.cpp test/CodeGen/ARM/2010-11-15-SpillEarlyClobber.ll Message-ID: <20101116004059.655D92A6C12C@llvm.org> Author: stoklund Date: Mon Nov 15 18:40:59 2010 New Revision: 119305 URL: http://llvm.org/viewvc/llvm-project?rev=119305&view=rev Log: Fix PR8612 in the standard spiller, take two. The live range of a register defined by an early clobber starts at the use slot, not the def slot. Except when it is an early clobber tied to a use operand. Then it starts at the def slot like a standard def. Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp llvm/trunk/test/CodeGen/ARM/2010-11-15-SpillEarlyClobber.ll Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=119305&r1=119304&r2=119305&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original) +++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Mon Nov 15 18:40:59 2010 @@ -1136,11 +1136,14 @@ rewriteImplicitOps(li, MI, NewVReg, vrm); // Reuse NewVReg for other reads. + bool HasEarlyClobber = false; for (unsigned j = 0, e = Ops.size(); j != e; ++j) { MachineOperand &mopj = MI->getOperand(Ops[j]); mopj.setReg(NewVReg); if (mopj.isImplicit()) rewriteImplicitOps(li, MI, NewVReg, vrm); + if (mopj.isEarlyClobber()) + HasEarlyClobber = true; } if (CreatedNewVReg) { @@ -1199,7 +1202,11 @@ } } if (HasDef) { - LiveRange LR(index.getDefIndex(), index.getStoreIndex(), + // An early clobber starts at the use slot, except for an early clobber + // tied to a use operand (yes, that is a thing). + LiveRange LR(HasEarlyClobber && !HasUse ? + index.getUseIndex() : index.getDefIndex(), + index.getStoreIndex(), nI.getNextValue(SlotIndex(), 0, VNInfoAllocator)); DEBUG(dbgs() << " +" << LR); nI.addRange(LR); Modified: llvm/trunk/test/CodeGen/ARM/2010-11-15-SpillEarlyClobber.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2010-11-15-SpillEarlyClobber.ll?rev=119305&r1=119304&r2=119305&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/2010-11-15-SpillEarlyClobber.ll (original) +++ llvm/trunk/test/CodeGen/ARM/2010-11-15-SpillEarlyClobber.ll Mon Nov 15 18:40:59 2010 @@ -1,3 +1,4 @@ +; RUN: llc < %s -verify-machineinstrs -spiller=standard ; RUN: llc < %s -verify-machineinstrs -spiller=inline ; PR8612 ; From stoklund at 2pi.dk Mon Nov 15 18:41:01 2010 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Tue, 16 Nov 2010 00:41:01 -0000 Subject: [llvm-commits] [llvm] r119306 - in /llvm/trunk/lib/CodeGen: VirtRegMap.cpp VirtRegMap.h Message-ID: <20101116004101.CFEAE2A6C12D@llvm.org> Author: stoklund Date: Mon Nov 15 18:41:01 2010 New Revision: 119306 URL: http://llvm.org/viewvc/llvm-project?rev=119306&view=rev Log: Remember to resize SpillSlotToUsesMap when allocating an emergency spill slot. Use amazing new function call technology instead of writing identical code in multiple places. This fixes PR8604. Modified: llvm/trunk/lib/CodeGen/VirtRegMap.cpp llvm/trunk/lib/CodeGen/VirtRegMap.h Modified: llvm/trunk/lib/CodeGen/VirtRegMap.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegMap.cpp?rev=119306&r1=119305&r2=119306&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/VirtRegMap.cpp (original) +++ llvm/trunk/lib/CodeGen/VirtRegMap.cpp Mon Nov 15 18:41:01 2010 @@ -99,6 +99,20 @@ ImplicitDefed.resize(LastVirtReg-TargetRegisterInfo::FirstVirtualRegister+1); } +unsigned VirtRegMap::createSpillSlot(const TargetRegisterClass *RC) { + int SS = MF->getFrameInfo()->CreateSpillStackObject(RC->getSize(), + RC->getAlignment()); + if (LowSpillSlot == NO_STACK_SLOT) + LowSpillSlot = SS; + if (HighSpillSlot == NO_STACK_SLOT || SS > HighSpillSlot) + HighSpillSlot = SS; + assert(SS >= LowSpillSlot && "Unexpected low spill slot"); + unsigned Idx = SS-LowSpillSlot; + while (Idx >= SpillSlotToUsesMap.size()) + SpillSlotToUsesMap.resize(SpillSlotToUsesMap.size()*2); + return SS; +} + unsigned VirtRegMap::getRegAllocPref(unsigned virtReg) { std::pair Hint = MRI->getRegAllocationHint(virtReg); unsigned physReg = Hint.second; @@ -116,18 +130,8 @@ assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT && "attempt to assign stack slot to already spilled register"); const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(virtReg); - int SS = MF->getFrameInfo()->CreateSpillStackObject(RC->getSize(), - RC->getAlignment()); - if (LowSpillSlot == NO_STACK_SLOT) - LowSpillSlot = SS; - if (HighSpillSlot == NO_STACK_SLOT || SS > HighSpillSlot) - HighSpillSlot = SS; - unsigned Idx = SS-LowSpillSlot; - while (Idx >= SpillSlotToUsesMap.size()) - SpillSlotToUsesMap.resize(SpillSlotToUsesMap.size()*2); - Virt2StackSlotMap[virtReg] = SS; ++NumSpills; - return SS; + return Virt2StackSlotMap[virtReg] = createSpillSlot(RC); } void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int SS) { @@ -160,14 +164,7 @@ EmergencySpillSlots.find(RC); if (I != EmergencySpillSlots.end()) return I->second; - int SS = MF->getFrameInfo()->CreateSpillStackObject(RC->getSize(), - RC->getAlignment()); - if (LowSpillSlot == NO_STACK_SLOT) - LowSpillSlot = SS; - if (HighSpillSlot == NO_STACK_SLOT || SS > HighSpillSlot) - HighSpillSlot = SS; - EmergencySpillSlots[RC] = SS; - return SS; + return EmergencySpillSlots[RC] = createSpillSlot(RC); } void VirtRegMap::addSpillSlotUse(int FI, MachineInstr *MI) { Modified: llvm/trunk/lib/CodeGen/VirtRegMap.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegMap.h?rev=119306&r1=119305&r2=119306&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/VirtRegMap.h (original) +++ llvm/trunk/lib/CodeGen/VirtRegMap.h Mon Nov 15 18:41:01 2010 @@ -134,6 +134,9 @@ /// UnusedRegs - A list of physical registers that have not been used. BitVector UnusedRegs; + /// createSpillSlot - Allocate a spill slot for RC from MFI. + unsigned createSpillSlot(const TargetRegisterClass *RC); + VirtRegMap(const VirtRegMap&); // DO NOT IMPLEMENT void operator=(const VirtRegMap&); // DO NOT IMPLEMENT From pichet2000 at gmail.com Mon Nov 15 18:45:34 2010 From: pichet2000 at gmail.com (Francois Pichet) Date: Mon, 15 Nov 2010 19:45:34 -0500 Subject: [llvm-commits] [llvm] r119169 - in /llvm/trunk: docs/tutorial/LangImpl4.html docs/tutorial/LangImpl5.html docs/tutorial/LangImpl6.html docs/tutorial/LangImpl7.html examples/ExceptionDemo/ExceptionDemo.cpp examples/Kaleidoscope/Chapter4/toy.cpp ex Message-ID: Hi I am getting 4 compile error with this patch .\toy.cpp(833) : error C3861: 'createBasicAliasAnalysisPass': identifier not found on Windows.. surely an include is missing. On Mon, Nov 15, 2010 at 1:41 PM, Dan Gohman wrote: > Author: djg > Date: Mon Nov 15 12:41:10 2010 > New Revision: 119169 > > URL: http://llvm.org/viewvc/llvm-project?rev=119169&view=rev > Log: > Update examples and documentation to explicitly add basicaa, now that it's > no longer included by default. > > Modified: > ? ?llvm/trunk/docs/tutorial/LangImpl4.html > ? ?llvm/trunk/docs/tutorial/LangImpl5.html > ? ?llvm/trunk/docs/tutorial/LangImpl6.html > ? ?llvm/trunk/docs/tutorial/LangImpl7.html > ? ?llvm/trunk/examples/ExceptionDemo/ExceptionDemo.cpp > ? ?llvm/trunk/examples/Kaleidoscope/Chapter4/toy.cpp > ? ?llvm/trunk/examples/Kaleidoscope/Chapter5/toy.cpp > ? ?llvm/trunk/examples/Kaleidoscope/Chapter6/toy.cpp > ? ?llvm/trunk/examples/Kaleidoscope/Chapter7/toy.cpp > > Modified: llvm/trunk/docs/tutorial/LangImpl4.html > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/tutorial/LangImpl4.html?rev=119169&r1=119168&r2=119169&view=diff > ============================================================================== > --- llvm/trunk/docs/tutorial/LangImpl4.html (original) > +++ llvm/trunk/docs/tutorial/LangImpl4.html Mon Nov 15 12:41:10 2010 > @@ -176,6 +176,8 @@ > ? // Set up the optimizer pipeline. ?Start with registering info about how the > ? // target lays out data structures. > ? OurFPM.add(new TargetData(*TheExecutionEngine->getTargetData())); > + ?// Provide basic AliasAnalysis support for GVN. > + ?OurFPM.add(createBasicAliasAnalysisPass()); > ? // Do simple "peephole" optimizations and bit-twiddling optzns. > ? OurFPM.add(createInstructionCombiningPass()); > ? // Reassociate expressions. > @@ -1086,6 +1088,8 @@ > ? // Set up the optimizer pipeline. ?Start with registering info about how the > ? // target lays out data structures. > ? OurFPM.add(new TargetData(*TheExecutionEngine->getTargetData())); > + ?// Provide basic AliasAnalysis support for GVN. > + ?OurFPM.add(createBasicAliasAnalysisPass()); > ? // Do simple "peephole" optimizations and bit-twiddling optzns. > ? OurFPM.add(createInstructionCombiningPass()); > ? // Reassociate expressions. > > Modified: llvm/trunk/docs/tutorial/LangImpl5.html > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/tutorial/LangImpl5.html?rev=119169&r1=119168&r2=119169&view=diff > ============================================================================== > --- llvm/trunk/docs/tutorial/LangImpl5.html (original) > +++ llvm/trunk/docs/tutorial/LangImpl5.html Mon Nov 15 12:41:10 2010 > @@ -1731,6 +1731,8 @@ > ? // Set up the optimizer pipeline. ?Start with registering info about how the > ? // target lays out data structures. > ? OurFPM.add(new TargetData(*TheExecutionEngine->getTargetData())); > + ?// Provide basic AliasAnalysis support for GVN. > + ?OurFPM.add(createBasicAliasAnalysisPass()); > ? // Do simple "peephole" optimizations and bit-twiddling optzns. > ? OurFPM.add(createInstructionCombiningPass()); > ? // Reassociate expressions. > > Modified: llvm/trunk/docs/tutorial/LangImpl6.html > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/tutorial/LangImpl6.html?rev=119169&r1=119168&r2=119169&view=diff > ============================================================================== > --- llvm/trunk/docs/tutorial/LangImpl6.html (original) > +++ llvm/trunk/docs/tutorial/LangImpl6.html Mon Nov 15 12:41:10 2010 > @@ -1768,6 +1768,8 @@ > ? // Set up the optimizer pipeline. ?Start with registering info about how the > ? // target lays out data structures. > ? OurFPM.add(new TargetData(*TheExecutionEngine->getTargetData())); > + ?// Provide basic AliasAnalysis support for GVN. > + ?OurFPM.add(createBasicAliasAnalysisPass()); > ? // Do simple "peephole" optimizations and bit-twiddling optzns. > ? OurFPM.add(createInstructionCombiningPass()); > ? // Reassociate expressions. > > Modified: llvm/trunk/docs/tutorial/LangImpl7.html > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/tutorial/LangImpl7.html?rev=119169&r1=119168&r2=119169&view=diff > ============================================================================== > --- llvm/trunk/docs/tutorial/LangImpl7.html (original) > +++ llvm/trunk/docs/tutorial/LangImpl7.html Mon Nov 15 12:41:10 2010 > @@ -2116,6 +2116,8 @@ > ? // Set up the optimizer pipeline. ?Start with registering info about how the > ? // target lays out data structures. > ? OurFPM.add(new TargetData(*TheExecutionEngine->getTargetData())); > + ?// Provide basic AliasAnalysis support for GVN. > + ?OurFPM.add(createBasicAliasAnalysisPass()); > ? // Promote allocas to registers. > ? OurFPM.add(createPromoteMemoryToRegisterPass()); > ? // Do simple "peephole" optimizations and bit-twiddling optzns. > > Modified: llvm/trunk/examples/ExceptionDemo/ExceptionDemo.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/examples/ExceptionDemo/ExceptionDemo.cpp?rev=119169&r1=119168&r2=119169&view=diff > ============================================================================== > --- llvm/trunk/examples/ExceptionDemo/ExceptionDemo.cpp (original) > +++ llvm/trunk/examples/ExceptionDemo/ExceptionDemo.cpp Mon Nov 15 12:41:10 2010 > @@ -1974,6 +1974,9 @@ > ? ? ? ? // Optimizations turned on > ?#ifdef ADD_OPT_PASSES > > + ? ? ? ?// Basic AliasAnslysis support for GVN. > + ? ? ? ?fpm.add(llvm::createBasicAliasAnalysisPass()); > + > ? ? ? ? // Promote allocas to registers. > ? ? ? ? fpm.add(llvm::createPromoteMemoryToRegisterPass()); > > > Modified: llvm/trunk/examples/Kaleidoscope/Chapter4/toy.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/examples/Kaleidoscope/Chapter4/toy.cpp?rev=119169&r1=119168&r2=119169&view=diff > ============================================================================== > --- llvm/trunk/examples/Kaleidoscope/Chapter4/toy.cpp (original) > +++ llvm/trunk/examples/Kaleidoscope/Chapter4/toy.cpp Mon Nov 15 12:41:10 2010 > @@ -584,6 +584,8 @@ > ? // Set up the optimizer pipeline. ?Start with registering info about how the > ? // target lays out data structures. > ? OurFPM.add(new TargetData(*TheExecutionEngine->getTargetData())); > + ?// Provide basic AliasAnalysis support for GVN. > + ?OurFPM.add(createBasicAliasAnalysisPass()); > ? // Do simple "peephole" optimizations and bit-twiddling optzns. > ? OurFPM.add(createInstructionCombiningPass()); > ? // Reassociate expressions. > > Modified: llvm/trunk/examples/Kaleidoscope/Chapter5/toy.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/examples/Kaleidoscope/Chapter5/toy.cpp?rev=119169&r1=119168&r2=119169&view=diff > ============================================================================== > --- llvm/trunk/examples/Kaleidoscope/Chapter5/toy.cpp (original) > +++ llvm/trunk/examples/Kaleidoscope/Chapter5/toy.cpp Mon Nov 15 12:41:10 2010 > @@ -829,6 +829,8 @@ > ? // Set up the optimizer pipeline. ?Start with registering info about how the > ? // target lays out data structures. > ? OurFPM.add(new TargetData(*TheExecutionEngine->getTargetData())); > + ?// Provide basic AliasAnalysis support for GVN. > + ?OurFPM.add(createBasicAliasAnalysisPass()); > ? // Do simple "peephole" optimizations and bit-twiddling optzns. > ? OurFPM.add(createInstructionCombiningPass()); > ? // Reassociate expressions. > > Modified: llvm/trunk/examples/Kaleidoscope/Chapter6/toy.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/examples/Kaleidoscope/Chapter6/toy.cpp?rev=119169&r1=119168&r2=119169&view=diff > ============================================================================== > --- llvm/trunk/examples/Kaleidoscope/Chapter6/toy.cpp (original) > +++ llvm/trunk/examples/Kaleidoscope/Chapter6/toy.cpp Mon Nov 15 12:41:10 2010 > @@ -947,6 +947,8 @@ > ? // Set up the optimizer pipeline. ?Start with registering info about how the > ? // target lays out data structures. > ? OurFPM.add(new TargetData(*TheExecutionEngine->getTargetData())); > + ?// Provide basic AliasAnalysis support for GVN. > + ?OurFPM.add(createBasicAliasAnalysisPass()); > ? // Do simple "peephole" optimizations and bit-twiddling optzns. > ? OurFPM.add(createInstructionCombiningPass()); > ? // Reassociate expressions. > > Modified: llvm/trunk/examples/Kaleidoscope/Chapter7/toy.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/examples/Kaleidoscope/Chapter7/toy.cpp?rev=119169&r1=119168&r2=119169&view=diff > ============================================================================== > --- llvm/trunk/examples/Kaleidoscope/Chapter7/toy.cpp (original) > +++ llvm/trunk/examples/Kaleidoscope/Chapter7/toy.cpp Mon Nov 15 12:41:10 2010 > @@ -1111,6 +1111,8 @@ > ? // Set up the optimizer pipeline. ?Start with registering info about how the > ? // target lays out data structures. > ? OurFPM.add(new TargetData(*TheExecutionEngine->getTargetData())); > + ?// Provide basic AliasAnalysis support for GVN. > + ?OurFPM.add(createBasicAliasAnalysisPass()); > ? // Promote allocas to registers. > ? OurFPM.add(createPromoteMemoryToRegisterPass()); > ? // Do simple "peephole" optimizations and bit-twiddling optzns. > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > From sabre at nondot.org Mon Nov 15 18:55:51 2010 From: sabre at nondot.org (Chris Lattner) Date: Tue, 16 Nov 2010 00:55:51 -0000 Subject: [llvm-commits] [llvm] r119307 - in /llvm/trunk/lib/Target/PowerPC: PPCCodeEmitter.cpp PPCMCCodeEmitter.cpp Message-ID: <20101116005551.E991F2A6C12C@llvm.org> Author: lattner Date: Mon Nov 15 18:55:51 2010 New Revision: 119307 URL: http://llvm.org/viewvc/llvm-project?rev=119307&view=rev Log: relax an assertion a bit, allowing the GPR argument of these instructions to be encoded with getMachineOpValue. This unbreaks ExecutionEngine/2003-01-04-ArgumentBug.ll when running on a G5 Modified: llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp Modified: llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp?rev=119307&r1=119306&r2=119307&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp Mon Nov 15 18:55:51 2010 @@ -246,7 +246,10 @@ const MachineOperand &MO) const { if (MO.isReg()) { - assert(MI.getOpcode() != PPC::MTCRF && MI.getOpcode() != PPC::MFOCRF); + // MTCRF/MFOCRF should go through get_crbitm_encoding for the CR operand. + // The GPR operand should come through here though. + assert((MI.getOpcode() != PPC::MTCRF && MI.getOpcode() != PPC::MFOCRF) || + MO.getReg() < PPC::CR0 || MO.getReg() > PPC::CR7); return PPCRegisterInfo::getRegisterNumbering(MO.getReg()); } Modified: llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp?rev=119307&r1=119306&r2=119307&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp Mon Nov 15 18:55:51 2010 @@ -199,7 +199,8 @@ getMachineOpValue(const MCInst &MI, const MCOperand &MO, SmallVectorImpl &Fixups) const { if (MO.isReg()) { - assert(MI.getOpcode() != PPC::MTCRF && MI.getOpcode() != PPC::MFOCRF); + assert((MI.getOpcode() != PPC::MTCRF && MI.getOpcode() != PPC::MFOCRF) || + MO.getReg() < PPC::CR0 || MO.getReg() > PPC::CR7); return PPCRegisterInfo::getRegisterNumbering(MO.getReg()); } From sabre at nondot.org Mon Nov 15 18:57:32 2010 From: sabre at nondot.org (Chris Lattner) Date: Tue, 16 Nov 2010 00:57:32 -0000 Subject: [llvm-commits] [llvm] r119308 - /llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp Message-ID: <20101116005732.6C9EC2A6C12C@llvm.org> Author: lattner Date: Mon Nov 15 18:57:32 2010 New Revision: 119308 URL: http://llvm.org/viewvc/llvm-project?rev=119308&view=rev Log: add copy of comment to the code that will survive the mcjit'ization Modified: llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp Modified: llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp?rev=119308&r1=119307&r2=119308&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp Mon Nov 15 18:57:32 2010 @@ -199,6 +199,8 @@ getMachineOpValue(const MCInst &MI, const MCOperand &MO, SmallVectorImpl &Fixups) const { if (MO.isReg()) { + // MTCRF/MFOCRF should go through get_crbitm_encoding for the CR operand. + // The GPR operand should come through here though. assert((MI.getOpcode() != PPC::MTCRF && MI.getOpcode() != PPC::MFOCRF) || MO.getReg() < PPC::CR0 || MO.getReg() > PPC::CR7); return PPCRegisterInfo::getRegisterNumbering(MO.getReg()); From bigcheesegs at gmail.com Mon Nov 15 19:01:28 2010 From: bigcheesegs at gmail.com (Michael Spencer) Date: Mon, 15 Nov 2010 20:01:28 -0500 Subject: [llvm-commits] [llvm] r119169 - in /llvm/trunk: docs/tutorial/LangImpl4.html docs/tutorial/LangImpl5.html docs/tutorial/LangImpl6.html docs/tutorial/LangImpl7.html examples/ExceptionDemo/ExceptionDemo.cpp examples/Kaleidoscope/Chapter4/toy.cpp ex In-Reply-To: References: Message-ID: On Mon, Nov 15, 2010 at 7:45 PM, Francois Pichet wrote: > Hi ?I am getting 4 compile error with this patch > > .\toy.cpp(833) : error C3861: 'createBasicAliasAnalysisPass': > identifier not found > > on Windows.. surely an include is missing. I get the same error on Linux with CMake. - Michael Spencer > On Mon, Nov 15, 2010 at 1:41 PM, Dan Gohman wrote: >> Author: djg >> Date: Mon Nov 15 12:41:10 2010 >> New Revision: 119169 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=119169&view=rev >> Log: >> Update examples and documentation to explicitly add basicaa, now that it's >> no longer included by default. >> >> Modified: >> ? ?llvm/trunk/docs/tutorial/LangImpl4.html >> ? ?llvm/trunk/docs/tutorial/LangImpl5.html >> ? ?llvm/trunk/docs/tutorial/LangImpl6.html >> ? ?llvm/trunk/docs/tutorial/LangImpl7.html >> ? ?llvm/trunk/examples/ExceptionDemo/ExceptionDemo.cpp >> ? ?llvm/trunk/examples/Kaleidoscope/Chapter4/toy.cpp >> ? ?llvm/trunk/examples/Kaleidoscope/Chapter5/toy.cpp >> ? ?llvm/trunk/examples/Kaleidoscope/Chapter6/toy.cpp >> ? ?llvm/trunk/examples/Kaleidoscope/Chapter7/toy.cpp >> >> Modified: llvm/trunk/docs/tutorial/LangImpl4.html >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/tutorial/LangImpl4.html?rev=119169&r1=119168&r2=119169&view=diff >> ============================================================================== >> --- llvm/trunk/docs/tutorial/LangImpl4.html (original) >> +++ llvm/trunk/docs/tutorial/LangImpl4.html Mon Nov 15 12:41:10 2010 >> @@ -176,6 +176,8 @@ >> ? // Set up the optimizer pipeline. ?Start with registering info about how the >> ? // target lays out data structures. >> ? OurFPM.add(new TargetData(*TheExecutionEngine->getTargetData())); >> + ?// Provide basic AliasAnalysis support for GVN. >> + ?OurFPM.add(createBasicAliasAnalysisPass()); >> ? // Do simple "peephole" optimizations and bit-twiddling optzns. >> ? OurFPM.add(createInstructionCombiningPass()); >> ? // Reassociate expressions. >> @@ -1086,6 +1088,8 @@ >> ? // Set up the optimizer pipeline. ?Start with registering info about how the >> ? // target lays out data structures. >> ? OurFPM.add(new TargetData(*TheExecutionEngine->getTargetData())); >> + ?// Provide basic AliasAnalysis support for GVN. >> + ?OurFPM.add(createBasicAliasAnalysisPass()); >> ? // Do simple "peephole" optimizations and bit-twiddling optzns. >> ? OurFPM.add(createInstructionCombiningPass()); >> ? // Reassociate expressions. >> >> Modified: llvm/trunk/docs/tutorial/LangImpl5.html >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/tutorial/LangImpl5.html?rev=119169&r1=119168&r2=119169&view=diff >> ============================================================================== >> --- llvm/trunk/docs/tutorial/LangImpl5.html (original) >> +++ llvm/trunk/docs/tutorial/LangImpl5.html Mon Nov 15 12:41:10 2010 >> @@ -1731,6 +1731,8 @@ >> ? // Set up the optimizer pipeline. ?Start with registering info about how the >> ? // target lays out data structures. >> ? OurFPM.add(new TargetData(*TheExecutionEngine->getTargetData())); >> + ?// Provide basic AliasAnalysis support for GVN. >> + ?OurFPM.add(createBasicAliasAnalysisPass()); >> ? // Do simple "peephole" optimizations and bit-twiddling optzns. >> ? OurFPM.add(createInstructionCombiningPass()); >> ? // Reassociate expressions. >> >> Modified: llvm/trunk/docs/tutorial/LangImpl6.html >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/tutorial/LangImpl6.html?rev=119169&r1=119168&r2=119169&view=diff >> ============================================================================== >> --- llvm/trunk/docs/tutorial/LangImpl6.html (original) >> +++ llvm/trunk/docs/tutorial/LangImpl6.html Mon Nov 15 12:41:10 2010 >> @@ -1768,6 +1768,8 @@ >> ? // Set up the optimizer pipeline. ?Start with registering info about how the >> ? // target lays out data structures. >> ? OurFPM.add(new TargetData(*TheExecutionEngine->getTargetData())); >> + ?// Provide basic AliasAnalysis support for GVN. >> + ?OurFPM.add(createBasicAliasAnalysisPass()); >> ? // Do simple "peephole" optimizations and bit-twiddling optzns. >> ? OurFPM.add(createInstructionCombiningPass()); >> ? // Reassociate expressions. >> >> Modified: llvm/trunk/docs/tutorial/LangImpl7.html >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/tutorial/LangImpl7.html?rev=119169&r1=119168&r2=119169&view=diff >> ============================================================================== >> --- llvm/trunk/docs/tutorial/LangImpl7.html (original) >> +++ llvm/trunk/docs/tutorial/LangImpl7.html Mon Nov 15 12:41:10 2010 >> @@ -2116,6 +2116,8 @@ >> ? // Set up the optimizer pipeline. ?Start with registering info about how the >> ? // target lays out data structures. >> ? OurFPM.add(new TargetData(*TheExecutionEngine->getTargetData())); >> + ?// Provide basic AliasAnalysis support for GVN. >> + ?OurFPM.add(createBasicAliasAnalysisPass()); >> ? // Promote allocas to registers. >> ? OurFPM.add(createPromoteMemoryToRegisterPass()); >> ? // Do simple "peephole" optimizations and bit-twiddling optzns. >> >> Modified: llvm/trunk/examples/ExceptionDemo/ExceptionDemo.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/examples/ExceptionDemo/ExceptionDemo.cpp?rev=119169&r1=119168&r2=119169&view=diff >> ============================================================================== >> --- llvm/trunk/examples/ExceptionDemo/ExceptionDemo.cpp (original) >> +++ llvm/trunk/examples/ExceptionDemo/ExceptionDemo.cpp Mon Nov 15 12:41:10 2010 >> @@ -1974,6 +1974,9 @@ >> ? ? ? ? // Optimizations turned on >> ?#ifdef ADD_OPT_PASSES >> >> + ? ? ? ?// Basic AliasAnslysis support for GVN. >> + ? ? ? ?fpm.add(llvm::createBasicAliasAnalysisPass()); >> + >> ? ? ? ? // Promote allocas to registers. >> ? ? ? ? fpm.add(llvm::createPromoteMemoryToRegisterPass()); >> >> >> Modified: llvm/trunk/examples/Kaleidoscope/Chapter4/toy.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/examples/Kaleidoscope/Chapter4/toy.cpp?rev=119169&r1=119168&r2=119169&view=diff >> ============================================================================== >> --- llvm/trunk/examples/Kaleidoscope/Chapter4/toy.cpp (original) >> +++ llvm/trunk/examples/Kaleidoscope/Chapter4/toy.cpp Mon Nov 15 12:41:10 2010 >> @@ -584,6 +584,8 @@ >> ? // Set up the optimizer pipeline. ?Start with registering info about how the >> ? // target lays out data structures. >> ? OurFPM.add(new TargetData(*TheExecutionEngine->getTargetData())); >> + ?// Provide basic AliasAnalysis support for GVN. >> + ?OurFPM.add(createBasicAliasAnalysisPass()); >> ? // Do simple "peephole" optimizations and bit-twiddling optzns. >> ? OurFPM.add(createInstructionCombiningPass()); >> ? // Reassociate expressions. >> >> Modified: llvm/trunk/examples/Kaleidoscope/Chapter5/toy.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/examples/Kaleidoscope/Chapter5/toy.cpp?rev=119169&r1=119168&r2=119169&view=diff >> ============================================================================== >> --- llvm/trunk/examples/Kaleidoscope/Chapter5/toy.cpp (original) >> +++ llvm/trunk/examples/Kaleidoscope/Chapter5/toy.cpp Mon Nov 15 12:41:10 2010 >> @@ -829,6 +829,8 @@ >> ? // Set up the optimizer pipeline. ?Start with registering info about how the >> ? // target lays out data structures. >> ? OurFPM.add(new TargetData(*TheExecutionEngine->getTargetData())); >> + ?// Provide basic AliasAnalysis support for GVN. >> + ?OurFPM.add(createBasicAliasAnalysisPass()); >> ? // Do simple "peephole" optimizations and bit-twiddling optzns. >> ? OurFPM.add(createInstructionCombiningPass()); >> ? // Reassociate expressions. >> >> Modified: llvm/trunk/examples/Kaleidoscope/Chapter6/toy.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/examples/Kaleidoscope/Chapter6/toy.cpp?rev=119169&r1=119168&r2=119169&view=diff >> ============================================================================== >> --- llvm/trunk/examples/Kaleidoscope/Chapter6/toy.cpp (original) >> +++ llvm/trunk/examples/Kaleidoscope/Chapter6/toy.cpp Mon Nov 15 12:41:10 2010 >> @@ -947,6 +947,8 @@ >> ? // Set up the optimizer pipeline. ?Start with registering info about how the >> ? // target lays out data structures. >> ? OurFPM.add(new TargetData(*TheExecutionEngine->getTargetData())); >> + ?// Provide basic AliasAnalysis support for GVN. >> + ?OurFPM.add(createBasicAliasAnalysisPass()); >> ? // Do simple "peephole" optimizations and bit-twiddling optzns. >> ? OurFPM.add(createInstructionCombiningPass()); >> ? // Reassociate expressions. >> >> Modified: llvm/trunk/examples/Kaleidoscope/Chapter7/toy.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/examples/Kaleidoscope/Chapter7/toy.cpp?rev=119169&r1=119168&r2=119169&view=diff >> ============================================================================== >> --- llvm/trunk/examples/Kaleidoscope/Chapter7/toy.cpp (original) >> +++ llvm/trunk/examples/Kaleidoscope/Chapter7/toy.cpp Mon Nov 15 12:41:10 2010 >> @@ -1111,6 +1111,8 @@ >> ? // Set up the optimizer pipeline. ?Start with registering info about how the >> ? // target lays out data structures. >> ? OurFPM.add(new TargetData(*TheExecutionEngine->getTargetData())); >> + ?// Provide basic AliasAnalysis support for GVN. >> + ?OurFPM.add(createBasicAliasAnalysisPass()); >> ? // Promote allocas to registers. >> ? OurFPM.add(createPromoteMemoryToRegisterPass()); >> ? // Do simple "peephole" optimizations and bit-twiddling optzns. >> >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >> > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > From bigcheesegs at gmail.com Mon Nov 15 19:06:51 2010 From: bigcheesegs at gmail.com (Michael J. Spencer) Date: Tue, 16 Nov 2010 01:06:51 -0000 Subject: [llvm-commits] [llvm] r119309 - in /llvm/trunk: include/llvm/Object/ObjectFile.h lib/Object/ObjectFile.cpp Message-ID: <20101116010651.515592A6C12C@llvm.org> Author: mspencer Date: Mon Nov 15 19:06:51 2010 New Revision: 119309 URL: http://llvm.org/viewvc/llvm-project?rev=119309&view=rev Log: Object: Get rid of sys::Path, Triple, and cleanup namespace. Modified: llvm/trunk/include/llvm/Object/ObjectFile.h llvm/trunk/lib/Object/ObjectFile.cpp Modified: llvm/trunk/include/llvm/Object/ObjectFile.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Object/ObjectFile.h?rev=119309&r1=119308&r2=119309&view=diff ============================================================================== --- llvm/trunk/include/llvm/Object/ObjectFile.h (original) +++ llvm/trunk/include/llvm/Object/ObjectFile.h Mon Nov 15 19:06:51 2010 @@ -14,12 +14,13 @@ #ifndef LLVM_OBJECT_OBJECT_FILE_H #define LLVM_OBJECT_OBJECT_FILE_H -#include "llvm/ADT/Triple.h" -#include "llvm/System/Path.h" +#include "llvm/ADT/StringRef.h" +#include "llvm/System/DataTypes.h" namespace llvm { class MemoryBuffer; +class StringRef; namespace object { @@ -155,7 +156,7 @@ virtual uint8_t getBytesInAddress() const = 0; virtual StringRef getFileFormatName() const = 0; - virtual Triple::ArchType getArch() const = 0; + virtual /* Triple::ArchType */ unsigned getArch() const = 0; StringRef getFilename() const; @@ -163,7 +164,7 @@ /// @param ObjectPath The path to the object file. ObjectPath.isObject must /// return true. /// @brief Create ObjectFile from path. - static ObjectFile *createObjectFile(const sys::Path &ObjectPath); + static ObjectFile *createObjectFile(StringRef ObjectPath); static ObjectFile *createObjectFile(MemoryBuffer *Object); private: Modified: llvm/trunk/lib/Object/ObjectFile.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Object/ObjectFile.cpp?rev=119309&r1=119308&r2=119309&view=diff ============================================================================== --- llvm/trunk/lib/Object/ObjectFile.cpp (original) +++ llvm/trunk/lib/Object/ObjectFile.cpp Mon Nov 15 19:06:51 2010 @@ -14,9 +14,10 @@ #include "llvm/Object/ObjectFile.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/MemoryBuffer.h" +#include "llvm/System/Path.h" -namespace llvm { -namespace object { +using namespace llvm; +using namespace object; ObjectFile::ObjectFile(MemoryBuffer *Object) : MapFile(Object) { @@ -60,9 +61,6 @@ } } -ObjectFile *ObjectFile::createObjectFile(const sys::Path &ObjectPath) { - return createObjectFile(MemoryBuffer::getFile(ObjectPath.c_str())); +ObjectFile *ObjectFile::createObjectFile(StringRef ObjectPath) { + return createObjectFile(MemoryBuffer::getFile(ObjectPath)); } - -} // end namespace object -} // end namespace llvm From peter at pcc.me.uk Mon Nov 15 19:17:28 2010 From: peter at pcc.me.uk (Peter Collingbourne) Date: Tue, 16 Nov 2010 01:17:28 +0000 Subject: [llvm-commits] [PATCH] Add OpenCL support to makefile system In-Reply-To: References: <20101115200317.GA19347@pcc.me.uk> <20101115215703.GB19347@pcc.me.uk> Message-ID: <20101116011728.GC19347@pcc.me.uk> On Mon, Nov 15, 2010 at 02:22:42PM -0800, Daniel Dunbar wrote: > Hi Peter, > > I've never been really happy about KLEE using the LLVM Makefiles, I > think we should probably find a way to solve this wholly on the KLEE > side (even if it means just cloning all of the existing LLVM Makefiles > to start with). > > Not very fun work, I know... I decided to follow Daniel's suggestion and copy (my modified) Makefile.rules into KLEE. But I think the first patch I posted is still a worthwhile change to make as it cleans up some duplication in Makefile.rules. Thanks, -- Peter From isanbard at gmail.com Mon Nov 15 19:16:36 2010 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 16 Nov 2010 01:16:36 -0000 Subject: [llvm-commits] [llvm] r119310 - in /llvm/trunk: lib/Target/ARM/ lib/Target/ARM/Disassembler/ lib/Target/ARM/InstPrinter/ utils/TableGen/ Message-ID: <20101116011637.126B82A6C12C@llvm.org> Author: void Date: Mon Nov 15 19:16:36 2010 New Revision: 119310 URL: http://llvm.org/viewvc/llvm-project?rev=119310&view=rev Log: Encode the multi-load/store instructions with their respective modes ('ia', 'db', 'ib', 'da') instead of having that mode as a separate field in the instruction. It's more convenient for the asm parser and much more readable for humans. Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp llvm/trunk/lib/Target/ARM/ARMInstrInfo.td llvm/trunk/lib/Target/ARM/ARMInstrNEON.td llvm/trunk/lib/Target/ARM/ARMInstrThumb.td llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td llvm/trunk/lib/Target/ARM/ARMInstrVFP.td llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp llvm/trunk/lib/Target/ARM/Thumb2SizeReduction.cpp llvm/trunk/utils/TableGen/ARMDecoderEmitter.cpp Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=119310&r1=119309&r2=119310&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Mon Nov 15 19:16:36 2010 @@ -697,10 +697,9 @@ .addReg(SrcReg, getKillRegState(isKill)) .addMemOperand(MMO)); } else { - AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VSTMQ)) + AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VSTMQIA)) .addReg(SrcReg, getKillRegState(isKill)) .addFrameIndex(FI) - .addImm(ARM_AM::getAM4ModeImm(ARM_AM::ia)) .addMemOperand(MMO)); } break; @@ -715,9 +714,8 @@ .addMemOperand(MMO)); } else { MachineInstrBuilder MIB = - AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VSTMD)) - .addFrameIndex(FI) - .addImm(ARM_AM::getAM4ModeImm(ARM_AM::ia))) + AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VSTMDIA)) + .addFrameIndex(FI)) .addMemOperand(MMO); MIB = AddDReg(MIB, SrcReg, ARM::dsub_0, getKillRegState(isKill), TRI); MIB = AddDReg(MIB, SrcReg, ARM::dsub_1, 0, TRI); @@ -727,9 +725,8 @@ break; case ARM::QQQQPRRegClassID: { MachineInstrBuilder MIB = - AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VSTMD)) - .addFrameIndex(FI) - .addImm(ARM_AM::getAM4ModeImm(ARM_AM::ia))) + AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VSTMDIA)) + .addFrameIndex(FI)) .addMemOperand(MMO); MIB = AddDReg(MIB, SrcReg, ARM::dsub_0, getKillRegState(isKill), TRI); MIB = AddDReg(MIB, SrcReg, ARM::dsub_1, 0, TRI); @@ -781,10 +778,8 @@ return MI->getOperand(2).getReg(); } break; - case ARM::VSTMQ: + case ARM::VSTMQIA: if (MI->getOperand(1).isFI() && - MI->getOperand(2).isImm() && - MI->getOperand(2).getImm() == ARM_AM::getAM4ModeImm(ARM_AM::ia) && MI->getOperand(0).getSubReg() == 0) { FrameIndex = MI->getOperand(1).getIndex(); return MI->getOperand(0).getReg(); @@ -841,9 +836,8 @@ .addFrameIndex(FI).addImm(16) .addMemOperand(MMO)); } else { - AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VLDMQ), DestReg) + AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VLDMQIA), DestReg) .addFrameIndex(FI) - .addImm(ARM_AM::getAM4ModeImm(ARM_AM::ia)) .addMemOperand(MMO)); } break; @@ -855,9 +849,8 @@ .addMemOperand(MMO)); } else { MachineInstrBuilder MIB = - AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VLDMD)) - .addFrameIndex(FI) - .addImm(ARM_AM::getAM4ModeImm(ARM_AM::ia))) + AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VLDMDIA)) + .addFrameIndex(FI)) .addMemOperand(MMO); MIB = AddDReg(MIB, DestReg, ARM::dsub_0, RegState::Define, TRI); MIB = AddDReg(MIB, DestReg, ARM::dsub_1, RegState::Define, TRI); @@ -867,9 +860,8 @@ break; case ARM::QQQQPRRegClassID: { MachineInstrBuilder MIB = - AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VLDMD)) - .addFrameIndex(FI) - .addImm(ARM_AM::getAM4ModeImm(ARM_AM::ia))) + AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VLDMDIA)) + .addFrameIndex(FI)) .addMemOperand(MMO); MIB = AddDReg(MIB, DestReg, ARM::dsub_0, RegState::Define, TRI); MIB = AddDReg(MIB, DestReg, ARM::dsub_1, RegState::Define, TRI); @@ -921,10 +913,8 @@ return MI->getOperand(0).getReg(); } break; - case ARM::VLDMQ: + case ARM::VLDMQIA: if (MI->getOperand(1).isFI() && - MI->getOperand(2).isImm() && - MI->getOperand(2).getImm() == ARM_AM::getAM4ModeImm(ARM_AM::ia) && MI->getOperand(0).getSubReg() == 0) { FrameIndex = MI->getOperand(1).getIndex(); return MI->getOperand(0).getReg(); @@ -1583,46 +1573,75 @@ default: llvm_unreachable("Unexpected multi-uops instruction!"); break; - case ARM::VLDMQ: - case ARM::VSTMQ: + case ARM::VLDMQIA: + case ARM::VLDMQDB: + case ARM::VSTMQIA: + case ARM::VSTMQDB: return 2; // The number of uOps for load / store multiple are determined by the number // registers. + // // On Cortex-A8, each pair of register loads / stores can be scheduled on the // same cycle. The scheduling for the first load / store must be done // separately by assuming the the address is not 64-bit aligned. + // // On Cortex-A9, the formula is simply (#reg / 2) + (#reg % 2). If the address - // is not 64-bit aligned, then AGU would take an extra cycle. - // For VFP / NEON load / store multiple, the formula is - // (#reg / 2) + (#reg % 2) + 1. - case ARM::VLDMD: - case ARM::VLDMS: - case ARM::VLDMD_UPD: - case ARM::VLDMS_UPD: - case ARM::VSTMD: - case ARM::VSTMS: - case ARM::VSTMD_UPD: - case ARM::VSTMS_UPD: { + // is not 64-bit aligned, then AGU would take an extra cycle. For VFP / NEON + // load / store multiple, the formula is (#reg / 2) + (#reg % 2) + 1. + case ARM::VLDMDIA: + case ARM::VLDMDDB: + case ARM::VLDMDIA_UPD: + case ARM::VLDMDDB_UPD: + case ARM::VLDMSIA: + case ARM::VLDMSDB: + case ARM::VLDMSIA_UPD: + case ARM::VLDMSDB_UPD: + case ARM::VSTMDIA: + case ARM::VSTMDDB: + case ARM::VSTMDIA_UPD: + case ARM::VSTMDDB_UPD: + case ARM::VSTMSIA: + case ARM::VSTMSDB: + case ARM::VSTMSIA_UPD: + case ARM::VSTMSDB_UPD: { unsigned NumRegs = MI->getNumOperands() - Desc.getNumOperands(); return (NumRegs / 2) + (NumRegs % 2) + 1; } - case ARM::LDM_RET: - case ARM::LDM: - case ARM::LDM_UPD: - case ARM::STM: - case ARM::STM_UPD: - case ARM::tLDM: - case ARM::tLDM_UPD: - case ARM::tSTM_UPD: + + case ARM::LDMIA_RET: + case ARM::LDMIA: + case ARM::LDMDA: + case ARM::LDMDB: + case ARM::LDMIB: + case ARM::LDMIA_UPD: + case ARM::LDMDA_UPD: + case ARM::LDMDB_UPD: + case ARM::LDMIB_UPD: + case ARM::STMIA: + case ARM::STMDA: + case ARM::STMDB: + case ARM::STMIB: + case ARM::STMIA_UPD: + case ARM::STMDA_UPD: + case ARM::STMDB_UPD: + case ARM::STMIB_UPD: + case ARM::tLDMIA: + case ARM::tLDMIA_UPD: + case ARM::tSTMIA: + case ARM::tSTMIA_UPD: case ARM::tPOP_RET: case ARM::tPOP: case ARM::tPUSH: - case ARM::t2LDM_RET: - case ARM::t2LDM: - case ARM::t2LDM_UPD: - case ARM::t2STM: - case ARM::t2STM_UPD: { + case ARM::t2LDMIA_RET: + case ARM::t2LDMIA: + case ARM::t2LDMDB: + case ARM::t2LDMIA_UPD: + case ARM::t2LDMDB_UPD: + case ARM::t2STMIA: + case ARM::t2STMDB: + case ARM::t2STMIA_UPD: + case ARM::t2STMDB_UPD: { unsigned NumRegs = MI->getNumOperands() - Desc.getNumOperands() + 1; if (Subtarget.isCortexA8()) { if (NumRegs < 4) @@ -1669,13 +1688,17 @@ } else if (Subtarget.isCortexA9()) { DefCycle = RegNo; bool isSLoad = false; + switch (DefTID.getOpcode()) { default: break; - case ARM::VLDMS: - case ARM::VLDMS_UPD: + case ARM::VLDMSIA: + case ARM::VLDMSDB: + case ARM::VLDMSIA_UPD: + case ARM::VLDMSDB_UPD: isSLoad = true; break; } + // If there are odd number of 'S' registers or if it's not 64-bit aligned, // then it takes an extra cycle. if ((isSLoad && (RegNo % 2)) || DefAlign < 8) @@ -1741,13 +1764,17 @@ } else if (Subtarget.isCortexA9()) { UseCycle = RegNo; bool isSStore = false; + switch (UseTID.getOpcode()) { default: break; - case ARM::VSTMS: - case ARM::VSTMS_UPD: + case ARM::VSTMSIA: + case ARM::VSTMSDB: + case ARM::VSTMSIA_UPD: + case ARM::VSTMSDB_UPD: isSStore = true; break; } + // If there are odd number of 'S' registers or if it's not 64-bit aligned, // then it takes an extra cycle. if ((isSStore && (RegNo % 2)) || UseAlign < 8) @@ -1810,27 +1837,39 @@ default: DefCycle = ItinData->getOperandCycle(DefClass, DefIdx); break; - case ARM::VLDMD: - case ARM::VLDMS: - case ARM::VLDMD_UPD: - case ARM::VLDMS_UPD: { + + case ARM::VLDMDIA: + case ARM::VLDMDDB: + case ARM::VLDMDIA_UPD: + case ARM::VLDMDDB_UPD: + case ARM::VLDMSIA: + case ARM::VLDMSDB: + case ARM::VLDMSIA_UPD: + case ARM::VLDMSDB_UPD: DefCycle = getVLDMDefCycle(ItinData, DefTID, DefClass, DefIdx, DefAlign); break; - } - case ARM::LDM_RET: - case ARM::LDM: - case ARM::LDM_UPD: - case ARM::tLDM: - case ARM::tLDM_UPD: + + case ARM::LDMIA_RET: + case ARM::LDMIA: + case ARM::LDMDA: + case ARM::LDMDB: + case ARM::LDMIB: + case ARM::LDMIA_UPD: + case ARM::LDMDA_UPD: + case ARM::LDMDB_UPD: + case ARM::LDMIB_UPD: + case ARM::tLDMIA: + case ARM::tLDMIA_UPD: case ARM::tPUSH: - case ARM::t2LDM_RET: - case ARM::t2LDM: - case ARM::t2LDM_UPD: { + case ARM::t2LDMIA_RET: + case ARM::t2LDMIA: + case ARM::t2LDMDB: + case ARM::t2LDMIA_UPD: + case ARM::t2LDMDB_UPD: LdmBypass = 1; DefCycle = getLDMDefCycle(ItinData, DefTID, DefClass, DefIdx, DefAlign); break; } - } if (DefCycle == -1) // We can't seem to determine the result latency of the def, assume it's 2. @@ -1841,24 +1880,37 @@ default: UseCycle = ItinData->getOperandCycle(UseClass, UseIdx); break; - case ARM::VSTMD: - case ARM::VSTMS: - case ARM::VSTMD_UPD: - case ARM::VSTMS_UPD: { + + case ARM::VSTMDIA: + case ARM::VSTMDDB: + case ARM::VSTMDIA_UPD: + case ARM::VSTMDDB_UPD: + case ARM::VSTMSIA: + case ARM::VSTMSDB: + case ARM::VSTMSIA_UPD: + case ARM::VSTMSDB_UPD: UseCycle = getVSTMUseCycle(ItinData, UseTID, UseClass, UseIdx, UseAlign); break; - } - case ARM::STM: - case ARM::STM_UPD: - case ARM::tSTM_UPD: + + case ARM::STMIA: + case ARM::STMDA: + case ARM::STMDB: + case ARM::STMIB: + case ARM::STMIA_UPD: + case ARM::STMDA_UPD: + case ARM::STMDB_UPD: + case ARM::STMIB_UPD: + case ARM::tSTMIA: + case ARM::tSTMIA_UPD: case ARM::tPOP_RET: case ARM::tPOP: - case ARM::t2STM: - case ARM::t2STM_UPD: { + case ARM::t2STMIA: + case ARM::t2STMDB: + case ARM::t2STMIA_UPD: + case ARM::t2STMDB_UPD: UseCycle = getSTMUseCycle(ItinData, UseTID, UseClass, UseIdx, UseAlign); break; } - } if (UseCycle == -1) // Assume it's read in the first stage. @@ -1873,8 +1925,9 @@ UseClass, UseIdx)) --UseCycle; } else if (ItinData->hasPipelineForwarding(DefClass, DefIdx, - UseClass, UseIdx)) + UseClass, UseIdx)) { --UseCycle; + } } return UseCycle; @@ -2040,8 +2093,10 @@ switch (Opcode) { default: return ItinData->getStageLatency(get(Opcode).getSchedClass()); - case ARM::VLDMQ: - case ARM::VSTMQ: + case ARM::VLDMQIA: + case ARM::VLDMQDB: + case ARM::VSTMQIA: + case ARM::VSTMQDB: return 2; } } Modified: llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp?rev=119310&r1=119309&r2=119310&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp Mon Nov 15 19:16:36 2010 @@ -782,24 +782,30 @@ break; } - case ARM::VLDMQ: { + case ARM::VLDMQIA: + case ARM::VLDMQDB: { + unsigned NewOpc = (Opcode == ARM::VLDMQIA) ? ARM::VLDMDIA : ARM::VLDMDDB; MachineInstrBuilder MIB = - BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::VLDMD)); + BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(NewOpc)); unsigned OpIdx = 0; + // Grab the Q register destination. bool DstIsDead = MI.getOperand(OpIdx).isDead(); unsigned DstReg = MI.getOperand(OpIdx++).getReg(); - // Copy the addrmode4 operands. - MIB.addOperand(MI.getOperand(OpIdx++)); + + // Copy the source register. MIB.addOperand(MI.getOperand(OpIdx++)); + // Copy the predicate operands. MIB.addOperand(MI.getOperand(OpIdx++)); MIB.addOperand(MI.getOperand(OpIdx++)); + // Add the destination operands (D subregs). unsigned D0 = TRI->getSubReg(DstReg, ARM::dsub_0); unsigned D1 = TRI->getSubReg(DstReg, ARM::dsub_1); MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead)) .addReg(D1, RegState::Define | getDeadRegState(DstIsDead)); + // Add an implicit def for the super-register. MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead)); TransferImpOps(MI, MIB, MIB); @@ -807,26 +813,33 @@ break; } - case ARM::VSTMQ: { + case ARM::VSTMQIA: + case ARM::VSTMQDB: { + unsigned NewOpc = (Opcode == ARM::VSTMQIA) ? ARM::VSTMDIA : ARM::VSTMDDB; MachineInstrBuilder MIB = - BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::VSTMD)); + BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(NewOpc)); unsigned OpIdx = 0; + // Grab the Q register source. bool SrcIsKill = MI.getOperand(OpIdx).isKill(); unsigned SrcReg = MI.getOperand(OpIdx++).getReg(); - // Copy the addrmode4 operands. - MIB.addOperand(MI.getOperand(OpIdx++)); + + // Copy the destination register. MIB.addOperand(MI.getOperand(OpIdx++)); + // Copy the predicate operands. MIB.addOperand(MI.getOperand(OpIdx++)); MIB.addOperand(MI.getOperand(OpIdx++)); + // Add the source operands (D subregs). unsigned D0 = TRI->getSubReg(SrcReg, ARM::dsub_0); unsigned D1 = TRI->getSubReg(SrcReg, ARM::dsub_1); MIB.addReg(D0).addReg(D1); + if (SrcIsKill) // Add an implicit kill for the Q register. (*MIB).addRegisterKilled(SrcReg, TRI, true); + TransferImpOps(MI, MIB, MIB); MI.eraseFromParent(); break; Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=119310&r1=119309&r2=119310&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Mon Nov 15 19:16:36 2010 @@ -1194,18 +1194,6 @@ } } -// FIXME: remove when we have a way to marking a MI with these properties. -// FIXME: Should pc be an implicit operand like PICADD, etc? -let isReturn = 1, isTerminator = 1, isBarrier = 1, mayLoad = 1, - hasExtraDefRegAllocReq = 1, isCodeGenOnly = 1 in - def LDM_RET : AXI4ld<(outs GPR:$wb), (ins GPR:$Rn, ldstm_mode:$mode, pred:$p, - reglist:$dsts, variable_ops), - IndexModeUpd, LdStMulFrm, IIC_iLoad_mBr, - "ldm${mode}${p}\t$Rn!, $dsts", - "$Rn = $wb", []> { - let Inst{21} = 1; -} - // On non-Darwin platforms R9 is callee-saved. let isCall = 1, Defs = [R0, R1, R2, R3, R12, LR, @@ -1797,23 +1785,23 @@ multiclass arm_ldst_mult { - def ia : + def IA : AXI4<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), IndexModeNone, f, itin, - !strconcat(asm, "${p}\t$Rn, $regs"), "", []> { + !strconcat(asm, "ia${p}\t$Rn, $regs"), "", []> { let Inst{24-23} = 0b01; // Increment After let Inst{21} = 0; // No writeback let Inst{20} = L_bit; } - def ia_UPD : + def IA_UPD : AXI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), IndexModeUpd, f, itin_upd, - !strconcat(asm, "${p}\t$Rn!, $regs"), "$Rn = $wb", []> { + !strconcat(asm, "ia${p}\t$Rn!, $regs"), "$Rn = $wb", []> { let Inst{24-23} = 0b01; // Increment After - let Inst{21} = 1; // No writeback + let Inst{21} = 1; // Writeback let Inst{20} = L_bit; } - def da : + def DA : AXI4<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), IndexModeNone, f, itin, !strconcat(asm, "da${p}\t$Rn, $regs"), "", []> { @@ -1821,15 +1809,15 @@ let Inst{21} = 0; // No writeback let Inst{20} = L_bit; } - def da_UPD : + def DA_UPD : AXI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), IndexModeUpd, f, itin_upd, !strconcat(asm, "da${p}\t$Rn!, $regs"), "$Rn = $wb", []> { let Inst{24-23} = 0b00; // Decrement After - let Inst{21} = 1; // No writeback + let Inst{21} = 1; // Writeback let Inst{20} = L_bit; } - def db : + def DB : AXI4<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), IndexModeNone, f, itin, !strconcat(asm, "db${p}\t$Rn, $regs"), "", []> { @@ -1837,15 +1825,15 @@ let Inst{21} = 0; // No writeback let Inst{20} = L_bit; } - def db_UPD : + def DB_UPD : AXI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), IndexModeUpd, f, itin_upd, !strconcat(asm, "db${p}\t$Rn!, $regs"), "$Rn = $wb", []> { let Inst{24-23} = 0b10; // Decrement Before - let Inst{21} = 1; // No writeback + let Inst{21} = 1; // Writeback let Inst{20} = L_bit; } - def ib : + def IB : AXI4<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), IndexModeNone, f, itin, !strconcat(asm, "ib${p}\t$Rn, $regs"), "", []> { @@ -1853,17 +1841,16 @@ let Inst{21} = 0; // No writeback let Inst{20} = L_bit; } - def ib_UPD : + def IB_UPD : AXI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), IndexModeUpd, f, itin_upd, !strconcat(asm, "ib${p}\t$Rn!, $regs"), "$Rn = $wb", []> { let Inst{24-23} = 0b11; // Increment Before - let Inst{21} = 1; // No writeback + let Inst{21} = 1; // Writeback let Inst{20} = L_bit; } } -/* TODO: let neverHasSideEffects = 1 in { let mayLoad = 1, hasExtraDefRegAllocReq = 1 in @@ -1873,45 +1860,24 @@ defm STM : arm_ldst_mult<"stm", 0, LdStMulFrm, IIC_iStore_m, IIC_iStore_mu>; } // neverHasSideEffects -*/ -let mayLoad = 1, neverHasSideEffects = 1, hasExtraDefRegAllocReq = 1, - isCodeGenOnly = 1 in { -def LDM : AXI4ld<(outs), (ins GPR:$Rn, ldstm_mode:$amode, pred:$p, - reglist:$dsts, variable_ops), - IndexModeNone, LdStMulFrm, IIC_iLoad_m, - "ldm${amode}${p}\t$Rn, $dsts", "", []> { - let Inst{21} = 0; -} - -def LDM_UPD : AXI4ld<(outs GPR:$wb), (ins GPR:$Rn, ldstm_mode:$amode, pred:$p, - reglist:$dsts, variable_ops), - IndexModeUpd, LdStMulFrm, IIC_iLoad_mu, - "ldm${amode}${p}\t$Rn!, $dsts", - "$Rn = $wb", []> { - let Inst{21} = 1; -} -} // mayLoad, neverHasSideEffects, hasExtraDefRegAllocReq +// Load / Store Multiple Mnemnoic Aliases +def : MnemonicAlias<"ldm", "ldmia">; +def : MnemonicAlias<"stm", "stmia">; -let mayStore = 1, neverHasSideEffects = 1, hasExtraSrcRegAllocReq = 1, - isCodeGenOnly = 1 in { -def STM : AXI4st<(outs), (ins GPR:$Rn, ldstm_mode:$amode, pred:$p, - reglist:$srcs, variable_ops), - IndexModeNone, LdStMulFrm, IIC_iStore_m, - "stm${amode}${p}\t$Rn, $srcs", "", []> { - let Inst{21} = 0; -} - -def STM_UPD : AXI4st<(outs GPR:$wb), (ins GPR:$Rn, ldstm_mode:$amode, pred:$p, - reglist:$srcs, variable_ops), - IndexModeUpd, LdStMulFrm, IIC_iStore_mu, - "stm${amode}${p}\t$Rn!, $srcs", - "$Rn = $wb", []> { - bits<4> p; - let Inst{31-28} = p; - let Inst{21} = 1; +// FIXME: remove when we have a way to marking a MI with these properties. +// FIXME: Should pc be an implicit operand like PICADD, etc? +let isReturn = 1, isTerminator = 1, isBarrier = 1, mayLoad = 1, + hasExtraDefRegAllocReq = 1, isCodeGenOnly = 1 in +def LDMIA_RET : AXI4ld<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, + reglist:$dsts, variable_ops), + IndexModeUpd, LdStMulFrm, IIC_iLoad_mBr, + "ldmia${p}\t$Rn!, $dsts", + "$Rn = $wb", []> { + let Inst{24-23} = 0b01; // Increment After + let Inst{21} = 1; // Writeback } -} // mayStore, neverHasSideEffects, hasExtraSrcRegAllocReq + //===----------------------------------------------------------------------===// // Move Instructions. Modified: llvm/trunk/lib/Target/ARM/ARMInstrNEON.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrNEON.td?rev=119310&r1=119309&r2=119310&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrNEON.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrNEON.td Mon Nov 15 19:16:36 2010 @@ -142,15 +142,23 @@ // Use VLDM to load a Q register as a D register pair. // This is a pseudo instruction that is expanded to VLDMD after reg alloc. -def VLDMQ - : PseudoVFPLdStM<(outs QPR:$dst), (ins GPR:$Rn, ldstm_mode:$mode), +def VLDMQIA + : PseudoVFPLdStM<(outs QPR:$dst), (ins GPR:$Rn), + IIC_fpLoad_m, "", + [(set QPR:$dst, (v2f64 (load GPR:$Rn)))]>; +def VLDMQDB + : PseudoVFPLdStM<(outs QPR:$dst), (ins GPR:$Rn), IIC_fpLoad_m, "", [(set QPR:$dst, (v2f64 (load GPR:$Rn)))]>; // Use VSTM to store a Q register as a D register pair. // This is a pseudo instruction that is expanded to VSTMD after reg alloc. -def VSTMQ - : PseudoVFPLdStM<(outs), (ins QPR:$src, GPR:$Rn, ldstm_mode:$mode), +def VSTMQIA + : PseudoVFPLdStM<(outs), (ins QPR:$src, GPR:$Rn), + IIC_fpStore_m, "", + [(store (v2f64 QPR:$src), GPR:$Rn)]>; +def VSTMQDB + : PseudoVFPLdStM<(outs), (ins QPR:$src, GPR:$Rn), IIC_fpStore_m, "", [(store (v2f64 QPR:$src), GPR:$Rn)]>; Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb.td?rev=119310&r1=119309&r2=119310&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb.td Mon Nov 15 19:16:36 2010 @@ -539,17 +539,17 @@ multiclass thumb_ldst_mult T1Enc, bit L_bit> { - def ia : + def IA : T1I<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), - itin, !strconcat(asm, "${p}\t$Rn, $regs"), []>, + itin, !strconcat(asm, "ia${p}\t$Rn, $regs"), []>, T1Encoding; - def ia_UPD : + def IA_UPD : T1It<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), - itin_upd, !strconcat(asm, "${p}\t$Rn!, $regs"), "$Rn = $wb", []>, + itin_upd, !strconcat(asm, "ia${p}\t$Rn!, $regs"), "$Rn = $wb", []>, T1Encoding; } -/* TODO: Uncommented, this causes a decoding conflict. +// These require base address to be written back or one of the loaded regs. let neverHasSideEffects = 1 in { let mayLoad = 1, hasExtraDefRegAllocReq = 1 in @@ -561,36 +561,6 @@ {1,1,0,0,0,?}, 0>; } // neverHasSideEffects -*/ - -// These require base address to be written back or one of the loaded regs. -let mayLoad = 1, neverHasSideEffects = 1, hasExtraDefRegAllocReq = 1, - isCodeGenOnly = 1 in { -def tLDM : T1I<(outs), - (ins GPR:$Rn, ldstm_mode:$amode, pred:$p, reglist:$dsts, - variable_ops), - IIC_iLoad_m, - "ldm${amode}${p}\t$Rn, $dsts", []>, - T1Encoding<{1,1,0,0,1,?}>; // A6.2 & A8.6.53 - -def tLDM_UPD : T1It<(outs tGPR:$wb), - (ins GPR:$Rn, ldstm_mode:$amode, pred:$p, reglist:$dsts, - variable_ops), - IIC_iLoad_m, - "ldm${amode}${p}\t$Rn!, $dsts", - "$Rn = $wb", []>, - T1Encoding<{1,1,0,0,1,?}>; // A6.2 & A8.6.53 -} // mayLoad, neverHasSideEffects = 1, hasExtraDefRegAllocReq - -let mayStore = 1, neverHasSideEffects = 1, hasExtraSrcRegAllocReq = 1, - isCodeGenOnly = 1 in -def tSTM_UPD : T1It<(outs tGPR:$wb), - (ins GPR:$Rn, ldstm_mode:$amode, pred:$p, reglist:$srcs, - variable_ops), - IIC_iStore_mu, - "stm${amode}${p}\t$Rn!, $srcs", - "$Rn = $wb", []>, - T1Encoding<{1,1,0,0,0,?}>; // A6.2 & A8.6.189 let mayLoad = 1, Uses = [SP], Defs = [SP], hasExtraDefRegAllocReq = 1 in def tPOP : T1I<(outs), (ins pred:$p, reglist:$dsts, variable_ops), Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=119310&r1=119309&r2=119310&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Mon Nov 15 19:16:36 2010 @@ -1501,9 +1501,9 @@ multiclass thumb2_ldst_mult { - def ia : + def IA : T2XI<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), - itin, !strconcat(asm, "${p}.w\t$Rn, $regs"), []> { + itin, !strconcat(asm, "ia${p}.w\t$Rn, $regs"), []> { bits<4> Rn; bits<16> regs; @@ -1516,9 +1516,9 @@ let Inst{19-16} = Rn; let Inst{15-0} = regs; } - def ia_UPD : + def IA_UPD : T2XIt<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), - itin_upd, !strconcat(asm, "${p}.w\t$Rn!, $regs"), "$Rn = $wb", []> { + itin_upd, !strconcat(asm, "ia${p}.w\t$Rn!, $regs"), "$Rn = $wb", []> { bits<4> Rn; bits<16> regs; @@ -1531,7 +1531,7 @@ let Inst{19-16} = Rn; let Inst{15-0} = regs; } - def db : + def DB : T2XI<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), itin, !strconcat(asm, "db${p}.w\t$Rn, $regs"), []> { bits<4> Rn; @@ -1546,7 +1546,7 @@ let Inst{19-16} = Rn; let Inst{15-0} = regs; } - def db_UPD : + def DB_UPD : T2XIt<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), itin_upd, !strconcat(asm, "db${p}.w\t$Rn, $regs"), "$Rn = $wb", []> { bits<4> Rn; @@ -1563,7 +1563,6 @@ } } -/* TODO: let neverHasSideEffects = 1 in { let mayLoad = 1, hasExtraDefRegAllocReq = 1 in @@ -1573,61 +1572,7 @@ defm t2STM : thumb2_ldst_mult<"stm", IIC_iStore_m, IIC_iStore_mu, 0>; } // neverHasSideEffects -*/ -let mayLoad = 1, neverHasSideEffects = 1, hasExtraDefRegAllocReq = 1, - isCodeGenOnly = 1 in { -def t2LDM : T2XI<(outs), (ins GPR:$Rn, ldstm_mode:$amode, pred:$p, - reglist:$dsts, variable_ops), IIC_iLoad_m, - "ldm${amode}${p}.w\t$Rn, $dsts", []> { - let Inst{31-27} = 0b11101; - let Inst{26-25} = 0b00; - let Inst{24-23} = {?, ?}; // IA: '01', DB: '10' - let Inst{22} = 0; - let Inst{21} = 0; // The W bit. - let Inst{20} = 1; // Load -} - -def t2LDM_UPD : T2XIt<(outs GPR:$wb), (ins GPR:$Rn, ldstm_mode:$amode, pred:$p, - reglist:$dsts, variable_ops), - IIC_iLoad_mu, - "ldm${amode}${p}.w\t$Rn!, $dsts", - "$Rn = $wb", []> { - let Inst{31-27} = 0b11101; - let Inst{26-25} = 0b00; - let Inst{24-23} = {?, ?}; // IA: '01', DB: '10' - let Inst{22} = 0; - let Inst{21} = 1; // The W bit. - let Inst{20} = 1; // Load -} -} // mayLoad, neverHasSideEffects, hasExtraDefRegAllocReq - -let mayStore = 1, neverHasSideEffects = 1, hasExtraSrcRegAllocReq = 1, - isCodeGenOnly = 1 in { -def t2STM : T2XI<(outs), (ins GPR:$Rn, ldstm_mode:$amode, pred:$p, - reglist:$srcs, variable_ops), IIC_iStore_m, - "stm${amode}${p}.w\t$Rn, $srcs", []> { - let Inst{31-27} = 0b11101; - let Inst{26-25} = 0b00; - let Inst{24-23} = {?, ?}; // IA: '01', DB: '10' - let Inst{22} = 0; - let Inst{21} = 0; // The W bit. - let Inst{20} = 0; // Store -} - -def t2STM_UPD : T2XIt<(outs GPR:$wb), (ins GPR:$Rn, ldstm_mode:$amode, pred:$p, - reglist:$srcs, variable_ops), - IIC_iStore_m, - "stm${amode}${p}.w\t$Rn!, $srcs", - "$Rn = $wb", []> { - let Inst{31-27} = 0b11101; - let Inst{26-25} = 0b00; - let Inst{24-23} = {?, ?}; // IA: '01', DB: '10' - let Inst{22} = 0; - let Inst{21} = 1; // The W bit. - let Inst{20} = 0; // Store -} -} // mayStore, neverHasSideEffects, hasExtraSrcRegAllocReq //===----------------------------------------------------------------------===// // Move Instructions. @@ -2814,17 +2759,14 @@ // FIXME: Should pc be an implicit operand like PICADD, etc? let isReturn = 1, isTerminator = 1, isBarrier = 1, mayLoad = 1, hasExtraDefRegAllocReq = 1, isCodeGenOnly = 1 in - def t2LDM_RET: T2XIt<(outs GPR:$wb), (ins GPR:$Rn, ldstm_mode:$amode, pred:$p, +def t2LDMIA_RET: T2XIt<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$dsts, variable_ops), IIC_iLoad_mBr, - "ldm${amode}${p}.w\t$Rn!, $dsts", + "ldmia${p}.w\t$Rn!, $dsts", "$Rn = $wb", []> { - let Inst{31-27} = 0b11101; - let Inst{26-25} = 0b00; - let Inst{24-23} = {?, ?}; // IA: '01', DB: '10' - let Inst{22} = 0; - let Inst{21} = 1; // The W bit. - let Inst{20} = 1; // Load + let Inst{24-23} = 0b01; // IA: '01', DB: '10' + let Inst{21} = 1; // The W bit. + let Inst{20} = 1; // Load } let isBranch = 1, isTerminator = 1, isBarrier = 1 in { Modified: llvm/trunk/lib/Target/ARM/ARMInstrVFP.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrVFP.td?rev=119310&r1=119309&r2=119310&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrVFP.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrVFP.td Mon Nov 15 19:16:36 2010 @@ -74,25 +74,26 @@ // Load / store multiple Instructions. // -multiclass vfp_ldst_d_mult { - def ia : +multiclass vfp_ldst_mult { + // Double Precision + def DIA : AXDI4<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), IndexModeNone, itin, - !strconcat(asm, "${p}\t$Rn, $regs"), "", []> { + !strconcat(asm, "ia${p}\t$Rn, $regs"), "", []> { let Inst{24-23} = 0b01; // Increment After let Inst{21} = 0; // No writeback let Inst{20} = L_bit; } - def ia_UPD : + def DIA_UPD : AXDI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), IndexModeUpd, itin_upd, - !strconcat(asm, "${p}\t$Rn!, $regs"), "$Rn = $wb", []> { + !strconcat(asm, "ia${p}\t$Rn!, $regs"), "$Rn = $wb", []> { let Inst{24-23} = 0b01; // Increment After let Inst{21} = 1; // Writeback let Inst{20} = L_bit; } - def db : + def DDB : AXDI4<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), IndexModeNone, itin, !strconcat(asm, "db${p}\t$Rn, $regs"), "", []> { @@ -100,7 +101,7 @@ let Inst{21} = 0; // No writeback let Inst{20} = L_bit; } - def db_UPD : + def DDB_UPD : AXDI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), IndexModeUpd, itin_upd, !strconcat(asm, "db${p}\t$Rn!, $regs"), "$Rn = $wb", []> { @@ -108,27 +109,25 @@ let Inst{21} = 1; // Writeback let Inst{20} = L_bit; } -} -multiclass vfp_ldst_s_mult { - def ia : + // Single Precision + def SIA : AXSI4<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), IndexModeNone, itin, - !strconcat(asm, "${p}\t$Rn, $regs"), "", []> { + !strconcat(asm, "ia${p}\t$Rn, $regs"), "", []> { let Inst{24-23} = 0b01; // Increment After let Inst{21} = 0; // No writeback let Inst{20} = L_bit; } - def ia_UPD : + def SIA_UPD : AXSI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), IndexModeUpd, itin_upd, - !strconcat(asm, "${p}\t$Rn!, $regs"), "$Rn = $wb", []> { + !strconcat(asm, "ia${p}\t$Rn!, $regs"), "$Rn = $wb", []> { let Inst{24-23} = 0b01; // Increment After let Inst{21} = 1; // Writeback let Inst{20} = L_bit; } - def db : + def SDB : AXSI4<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), IndexModeNone, itin, !strconcat(asm, "db${p}\t$Rn, $regs"), "", []> { @@ -136,7 +135,7 @@ let Inst{21} = 0; // No writeback let Inst{20} = L_bit; } - def db_UPD : + def SDB_UPD : AXSI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), IndexModeUpd, itin_upd, !strconcat(asm, "db${p}\t$Rn!, $regs"), "$Rn = $wb", []> { @@ -148,91 +147,13 @@ let neverHasSideEffects = 1 in { -let mayLoad = 1, hasExtraDefRegAllocReq = 1 in { -defm VLDMD : vfp_ldst_d_mult<"vldm", 1, IIC_fpLoad_m, IIC_fpLoad_mu>; -defm VLDMS : vfp_ldst_s_mult<"vldm", 1, IIC_fpLoad_m, IIC_fpLoad_mu>; -} // mayLoad, hasExtraDefRegAllocReq - -let mayStore = 1, hasExtraSrcRegAllocReq = 1 in { -defm VSTMD : vfp_ldst_d_mult<"vstm", 0, IIC_fpLoad_m, IIC_fpLoad_mu>; -defm VSTMS : vfp_ldst_s_mult<"vstm", 0, IIC_fpLoad_m, IIC_fpLoad_mu>; -} // mayStore, hasExtraSrcRegAllocReq +let mayLoad = 1, hasExtraDefRegAllocReq = 1 in +defm VLDM : vfp_ldst_mult<"vldm", 1, IIC_fpLoad_m, IIC_fpLoad_mu>; -} // neverHasSideEffects +let mayStore = 1, hasExtraSrcRegAllocReq = 1 in +defm VSTM : vfp_ldst_mult<"vstm", 0, IIC_fpLoad_m, IIC_fpLoad_mu>; -let mayLoad = 1, neverHasSideEffects = 1, hasExtraDefRegAllocReq = 1, - isCodeGenOnly = 1 in { -def VLDMD : AXDI4<(outs), (ins GPR:$Rn, ldstm_mode:$amode, pred:$p, - reglist:$dsts, variable_ops), - IndexModeNone, IIC_fpLoad_m, - "vldm${amode}${p}\t$Rn, $dsts", "", []> { - let Inst{21} = 0; // wback = (W == '1') - let Inst{20} = 1; // Load -} - -def VLDMS : AXSI4<(outs), (ins GPR:$Rn, ldstm_mode:$amode, pred:$p, - reglist:$dsts, variable_ops), - IndexModeNone, IIC_fpLoad_m, - "vldm${amode}${p}\t$Rn, $dsts", "", []> { - let Inst{21} = 0; // wback = (W == '1') - let Inst{20} = 1; // Load -} - -def VLDMD_UPD : AXDI4<(outs GPR:$wb), (ins GPR:$Rn, ldstm_mode:$amode, pred:$p, - reglist:$dsts, variable_ops), - IndexModeUpd, IIC_fpLoad_mu, - "vldm${amode}${p}\t$Rn!, $dsts", - "$Rn = $wb", []> { - let Inst{21} = 1; // wback = (W == '1') - let Inst{20} = 1; // Load -} - -def VLDMS_UPD : AXSI4<(outs GPR:$wb), (ins GPR:$Rn, ldstm_mode:$amode, pred:$p, - reglist:$dsts, variable_ops), - IndexModeUpd, IIC_fpLoad_mu, - "vldm${amode}${p}\t$Rn!, $dsts", - "$Rn = $wb", []> { - let Inst{21} = 1; // wback = (W == '1') - let Inst{20} = 1; // Load -} -} // mayLoad, neverHasSideEffects, hasExtraDefRegAllocReq - -let mayStore = 1, neverHasSideEffects = 1, hasExtraSrcRegAllocReq = 1, - isCodeGenOnly = 1 in { -def VSTMD : AXDI4<(outs), (ins GPR:$Rn, ldstm_mode:$amode, pred:$p, - reglist:$srcs, variable_ops), - IndexModeNone, IIC_fpStore_m, - "vstm${amode}${p}\t$Rn, $srcs", "", []> { - let Inst{21} = 0; // wback = (W == '1') - let Inst{20} = 0; // Store -} - -def VSTMS : AXSI4<(outs), (ins GPR:$Rn, ldstm_mode:$amode, pred:$p, - reglist:$srcs, variable_ops), IndexModeNone, - IIC_fpStore_m, - "vstm${amode}${p}\t$Rn, $srcs", "", []> { - let Inst{21} = 0; // wback = (W == '1') - let Inst{20} = 0; // Store -} - -def VSTMD_UPD : AXDI4<(outs GPR:$wb), (ins GPR:$Rn, ldstm_mode:$amode, pred:$p, - reglist:$srcs, variable_ops), - IndexModeUpd, IIC_fpStore_mu, - "vstm${amode}${p}\t$Rn!, $srcs", - "$Rn = $wb", []> { - let Inst{21} = 1; // wback = (W == '1') - let Inst{20} = 0; // Store -} - -def VSTMS_UPD : AXSI4<(outs GPR:$wb), (ins GPR:$Rn, ldstm_mode:$amode, pred:$p, - reglist:$srcs, variable_ops), - IndexModeUpd, IIC_fpStore_mu, - "vstm${amode}${p}\t$Rn!, $srcs", - "$Rn = $wb", []> { - let Inst{21} = 1; // wback = (W == '1') - let Inst{20} = 0; // Store -} -} // mayStore, neverHasSideEffects, hasExtraSrcRegAllocReq +} // neverHasSideEffects // FLDMX, FSTMX - mixing S/D registers for pre-armv6 cores Modified: llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp?rev=119310&r1=119309&r2=119310&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Mon Nov 15 19:16:36 2010 @@ -128,39 +128,119 @@ char ARMLoadStoreOpt::ID = 0; } -static int getLoadStoreMultipleOpcode(int Opcode) { +static int getLoadStoreMultipleOpcode(int Opcode, ARM_AM::AMSubMode Mode) { switch (Opcode) { + default: llvm_unreachable("Unhandled opcode!"); case ARM::LDRi12: ++NumLDMGened; - return ARM::LDM; + switch (Mode) { + default: llvm_unreachable("Unhandled submode!"); + case ARM_AM::ia: return ARM::LDMIA; + case ARM_AM::da: return ARM::LDMDA; + case ARM_AM::db: return ARM::LDMDB; + case ARM_AM::ib: return ARM::LDMIB; + } + break; case ARM::STRi12: ++NumSTMGened; - return ARM::STM; + switch (Mode) { + default: llvm_unreachable("Unhandled submode!"); + case ARM_AM::ia: return ARM::STMIA; + case ARM_AM::da: return ARM::STMDA; + case ARM_AM::db: return ARM::STMDB; + case ARM_AM::ib: return ARM::STMIB; + } + break; case ARM::t2LDRi8: case ARM::t2LDRi12: ++NumLDMGened; - return ARM::t2LDM; + switch (Mode) { + default: llvm_unreachable("Unhandled submode!"); + case ARM_AM::ia: return ARM::t2LDMIA; + case ARM_AM::db: return ARM::t2LDMDB; + } + break; case ARM::t2STRi8: case ARM::t2STRi12: ++NumSTMGened; - return ARM::t2STM; + switch (Mode) { + default: llvm_unreachable("Unhandled submode!"); + case ARM_AM::ia: return ARM::t2STMIA; + case ARM_AM::db: return ARM::t2STMDB; + } + break; case ARM::VLDRS: ++NumVLDMGened; - return ARM::VLDMS; + switch (Mode) { + default: llvm_unreachable("Unhandled submode!"); + case ARM_AM::ia: return ARM::VLDMSIA; + case ARM_AM::db: return ARM::VLDMSDB; + } + break; case ARM::VSTRS: ++NumVSTMGened; - return ARM::VSTMS; + switch (Mode) { + default: llvm_unreachable("Unhandled submode!"); + case ARM_AM::ia: return ARM::VSTMSIA; + case ARM_AM::db: return ARM::VSTMSDB; + } + break; case ARM::VLDRD: ++NumVLDMGened; - return ARM::VLDMD; + switch (Mode) { + default: llvm_unreachable("Unhandled submode!"); + case ARM_AM::ia: return ARM::VLDMDIA; + case ARM_AM::db: return ARM::VLDMDDB; + } + break; case ARM::VSTRD: ++NumVSTMGened; - return ARM::VSTMD; - default: llvm_unreachable("Unhandled opcode!"); + switch (Mode) { + default: llvm_unreachable("Unhandled submode!"); + case ARM_AM::ia: return ARM::VSTMDIA; + case ARM_AM::db: return ARM::VSTMDDB; + } + break; } + return 0; } +static ARM_AM::AMSubMode getLoadStoreMultipleSubMode(int Opcode) { + switch (Opcode) { + default: llvm_unreachable("Unhandled opcode!"); + case ARM::LDMIA: + case ARM::STMIA: + case ARM::t2LDMIA: + case ARM::t2STMIA: + case ARM::VLDMSIA: + case ARM::VSTMSIA: + case ARM::VLDMDIA: + case ARM::VSTMDIA: + return ARM_AM::ia; + + case ARM::LDMDA: + case ARM::STMDA: + return ARM_AM::da; + + case ARM::LDMDB: + case ARM::STMDB: + case ARM::t2LDMDB: + case ARM::t2STMDB: + case ARM::VLDMSDB: + case ARM::VSTMSDB: + case ARM::VLDMDDB: + case ARM::VSTMDDB: + return ARM_AM::db; + + case ARM::LDMIB: + case ARM::STMIB: + return ARM_AM::ib; + } + + return ARM_AM::bad_am_submode; +} + static bool isT2i32Load(unsigned Opc) { return Opc == ARM::t2LDRi12 || Opc == ARM::t2LDRi8; } @@ -245,10 +325,10 @@ bool isDef = (isi32Load(Opcode) || Opcode == ARM::VLDRS || Opcode == ARM::VLDRD); - Opcode = getLoadStoreMultipleOpcode(Opcode); + Opcode = getLoadStoreMultipleOpcode(Opcode, Mode); MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII->get(Opcode)) .addReg(Base, getKillRegState(BaseKill)) - .addImm(ARM_AM::getAM4ModeImm(Mode)).addImm(Pred).addReg(PredReg); + .addImm(Pred).addReg(PredReg); for (unsigned i = 0; i != NumRegs; ++i) MIB = MIB.addReg(Regs[i].first, getDefRegState(isDef) | getKillRegState(Regs[i].second)); @@ -452,31 +532,109 @@ case ARM::VLDRD: case ARM::VSTRD: return 8; - case ARM::LDM: - case ARM::STM: - case ARM::t2LDM: - case ARM::t2STM: - case ARM::VLDMS: - case ARM::VSTMS: + case ARM::LDMIA: + case ARM::LDMDA: + case ARM::LDMDB: + case ARM::LDMIB: + case ARM::STMIA: + case ARM::STMDA: + case ARM::STMDB: + case ARM::STMIB: + case ARM::t2LDMIA: + case ARM::t2LDMDB: + case ARM::t2STMIA: + case ARM::t2STMDB: + case ARM::VLDMSIA: + case ARM::VLDMSDB: + case ARM::VSTMSIA: + case ARM::VSTMSDB: return (MI->getNumOperands() - MI->getDesc().getNumOperands() + 1) * 4; - case ARM::VLDMD: - case ARM::VSTMD: + case ARM::VLDMDIA: + case ARM::VLDMDDB: + case ARM::VSTMDIA: + case ARM::VSTMDDB: return (MI->getNumOperands() - MI->getDesc().getNumOperands() + 1) * 8; } } -static unsigned getUpdatingLSMultipleOpcode(unsigned Opc) { +static unsigned getUpdatingLSMultipleOpcode(unsigned Opc, + ARM_AM::AMSubMode Mode) { switch (Opc) { - case ARM::LDM: return ARM::LDM_UPD; - case ARM::STM: return ARM::STM_UPD; - case ARM::t2LDM: return ARM::t2LDM_UPD; - case ARM::t2STM: return ARM::t2STM_UPD; - case ARM::VLDMS: return ARM::VLDMS_UPD; - case ARM::VLDMD: return ARM::VLDMD_UPD; - case ARM::VSTMS: return ARM::VSTMS_UPD; - case ARM::VSTMD: return ARM::VSTMD_UPD; default: llvm_unreachable("Unhandled opcode!"); + case ARM::LDMIA: + case ARM::LDMDA: + case ARM::LDMDB: + case ARM::LDMIB: + switch (Mode) { + default: llvm_unreachable("Unhandled submode!"); + case ARM_AM::ia: return ARM::LDMIA_UPD; + case ARM_AM::ib: return ARM::LDMIB_UPD; + case ARM_AM::da: return ARM::LDMDA_UPD; + case ARM_AM::db: return ARM::LDMDB_UPD; + } + break; + case ARM::STMIA: + case ARM::STMDA: + case ARM::STMDB: + case ARM::STMIB: + switch (Mode) { + default: llvm_unreachable("Unhandled submode!"); + case ARM_AM::ia: return ARM::STMIA_UPD; + case ARM_AM::ib: return ARM::STMIB_UPD; + case ARM_AM::da: return ARM::STMDA_UPD; + case ARM_AM::db: return ARM::STMDB_UPD; + } + break; + case ARM::t2LDMIA: + case ARM::t2LDMDB: + switch (Mode) { + default: llvm_unreachable("Unhandled submode!"); + case ARM_AM::ia: return ARM::t2LDMIA_UPD; + case ARM_AM::db: return ARM::t2LDMDB_UPD; + } + break; + case ARM::t2STMIA: + case ARM::t2STMDB: + switch (Mode) { + default: llvm_unreachable("Unhandled submode!"); + case ARM_AM::ia: return ARM::t2STMIA_UPD; + case ARM_AM::db: return ARM::t2STMDB_UPD; + } + break; + case ARM::VLDMSIA: + case ARM::VLDMSDB: + switch (Mode) { + default: llvm_unreachable("Unhandled submode!"); + case ARM_AM::ia: return ARM::VLDMSIA_UPD; + case ARM_AM::db: return ARM::VLDMSDB_UPD; + } + break; + case ARM::VLDMDIA: + case ARM::VLDMDDB: + switch (Mode) { + default: llvm_unreachable("Unhandled submode!"); + case ARM_AM::ia: return ARM::VLDMDIA_UPD; + case ARM_AM::db: return ARM::VLDMDDB_UPD; + } + break; + case ARM::VSTMSIA: + case ARM::VSTMSDB: + switch (Mode) { + default: llvm_unreachable("Unhandled submode!"); + case ARM_AM::ia: return ARM::VSTMSIA_UPD; + case ARM_AM::db: return ARM::VSTMSDB_UPD; + } + break; + case ARM::VSTMDIA: + case ARM::VSTMDDB: + switch (Mode) { + default: llvm_unreachable("Unhandled submode!"); + case ARM_AM::ia: return ARM::VSTMDIA_UPD; + case ARM_AM::db: return ARM::VSTMDDB_UPD; + } + break; } + return 0; } @@ -505,16 +663,14 @@ int Opcode = MI->getOpcode(); DebugLoc dl = MI->getDebugLoc(); - bool DoMerge = false; - ARM_AM::AMSubMode Mode = ARM_AM::ia; - // Can't use an updating ld/st if the base register is also a dest // register. e.g. ldmdb r0!, {r0, r1, r2}. The behavior is undefined. - for (unsigned i = 3, e = MI->getNumOperands(); i != e; ++i) { + for (unsigned i = 2, e = MI->getNumOperands(); i != e; ++i) if (MI->getOperand(i).getReg() == Base) return false; - } - Mode = ARM_AM::getAM4SubMode(MI->getOperand(1).getImm()); + + bool DoMerge = false; + ARM_AM::AMSubMode Mode = getLoadStoreMultipleSubMode(Opcode); // Try merging with the previous instruction. MachineBasicBlock::iterator BeginMBBI = MBB.begin(); @@ -560,15 +716,16 @@ if (!DoMerge) return false; - unsigned NewOpc = getUpdatingLSMultipleOpcode(Opcode); + unsigned NewOpc = getUpdatingLSMultipleOpcode(Opcode, Mode); MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII->get(NewOpc)) .addReg(Base, getDefRegState(true)) // WB base register .addReg(Base, getKillRegState(BaseKill)) - .addImm(ARM_AM::getAM4ModeImm(Mode)) .addImm(Pred).addReg(PredReg); + // Transfer the rest of operands. - for (unsigned OpNum = 4, e = MI->getNumOperands(); OpNum != e; ++OpNum) + for (unsigned OpNum = 3, e = MI->getNumOperands(); OpNum != e; ++OpNum) MIB.addOperand(MI->getOperand(OpNum)); + // Transfer memoperands. (*MIB).setMemRefs(MI->memoperands_begin(), MI->memoperands_end()); @@ -576,14 +733,21 @@ return true; } -static unsigned getPreIndexedLoadStoreOpcode(unsigned Opc) { +static unsigned getPreIndexedLoadStoreOpcode(unsigned Opc, + ARM_AM::AddrOpc Mode) { switch (Opc) { - case ARM::LDRi12: return ARM::LDR_PRE; - case ARM::STRi12: return ARM::STR_PRE; - case ARM::VLDRS: return ARM::VLDMS_UPD; - case ARM::VLDRD: return ARM::VLDMD_UPD; - case ARM::VSTRS: return ARM::VSTMS_UPD; - case ARM::VSTRD: return ARM::VSTMD_UPD; + case ARM::LDRi12: + return ARM::LDR_PRE; + case ARM::STRi12: + return ARM::STR_PRE; + case ARM::VLDRS: + return Mode == ARM_AM::add ? ARM::VLDMSIA_UPD : ARM::VLDMSDB_UPD; + case ARM::VLDRD: + return Mode == ARM_AM::add ? ARM::VLDMDIA_UPD : ARM::VLDMDDB_UPD; + case ARM::VSTRS: + return Mode == ARM_AM::add ? ARM::VSTMSIA_UPD : ARM::VSTMSDB_UPD; + case ARM::VSTRD: + return Mode == ARM_AM::add ? ARM::VSTMDIA_UPD : ARM::VSTMDDB_UPD; case ARM::t2LDRi8: case ARM::t2LDRi12: return ARM::t2LDR_PRE; @@ -595,14 +759,21 @@ return 0; } -static unsigned getPostIndexedLoadStoreOpcode(unsigned Opc) { +static unsigned getPostIndexedLoadStoreOpcode(unsigned Opc, + ARM_AM::AddrOpc Mode) { switch (Opc) { - case ARM::LDRi12: return ARM::LDR_POST; - case ARM::STRi12: return ARM::STR_POST; - case ARM::VLDRS: return ARM::VLDMS_UPD; - case ARM::VLDRD: return ARM::VLDMD_UPD; - case ARM::VSTRS: return ARM::VSTMS_UPD; - case ARM::VSTRD: return ARM::VSTMD_UPD; + case ARM::LDRi12: + return ARM::LDR_POST; + case ARM::STRi12: + return ARM::STR_POST; + case ARM::VLDRS: + return Mode == ARM_AM::add ? ARM::VLDMSIA_UPD : ARM::VLDMSDB_UPD; + case ARM::VLDRD: + return Mode == ARM_AM::add ? ARM::VLDMDIA_UPD : ARM::VLDMDDB_UPD; + case ARM::VSTRS: + return Mode == ARM_AM::add ? ARM::VSTMSIA_UPD : ARM::VSTMSDB_UPD; + case ARM::VSTRD: + return Mode == ARM_AM::add ? ARM::VSTMDIA_UPD : ARM::VSTMDDB_UPD; case ARM::t2LDRi8: case ARM::t2LDRi12: return ARM::t2LDR_POST; @@ -664,7 +835,7 @@ DoMerge = true; } if (DoMerge) { - NewOpc = getPreIndexedLoadStoreOpcode(Opcode); + NewOpc = getPreIndexedLoadStoreOpcode(Opcode, AddSub); MBB.erase(PrevMBBI); } } @@ -683,7 +854,7 @@ DoMerge = true; } if (DoMerge) { - NewOpc = getPostIndexedLoadStoreOpcode(Opcode); + NewOpc = getPostIndexedLoadStoreOpcode(Opcode, AddSub); if (NextMBBI == I) { Advance = true; ++I; @@ -696,12 +867,9 @@ return false; unsigned Offset = 0; - if (isAM5) - Offset = ARM_AM::getAM4ModeImm(AddSub == ARM_AM::sub ? - ARM_AM::db : ARM_AM::ia); - else if (isAM2) + if (isAM2) Offset = ARM_AM::getAM2Opc(AddSub, Bytes, ARM_AM::no_shift); - else + else if (!isAM5) Offset = AddSub == ARM_AM::sub ? -Bytes : Bytes; if (isAM5) { @@ -713,7 +881,6 @@ BuildMI(MBB, MBBI, dl, TII->get(NewOpc)) .addReg(Base, getDefRegState(true)) // WB base register .addReg(Base, getKillRegState(isLd ? BaseKill : false)) - .addImm(Offset) .addImm(Pred).addReg(PredReg) .addReg(MO.getReg(), (isLd ? getDefRegState(true) : getKillRegState(MO.isKill()))); @@ -897,12 +1064,11 @@ // Ascending register numbers and no offset. It's safe to change it to a // ldm or stm. unsigned NewOpc = (isLd) - ? (isT2 ? ARM::t2LDM : ARM::LDM) - : (isT2 ? ARM::t2STM : ARM::STM); + ? (isT2 ? ARM::t2LDMIA : ARM::LDMIA) + : (isT2 ? ARM::t2STMIA : ARM::STMIA); if (isLd) { BuildMI(MBB, MBBI, MBBI->getDebugLoc(), TII->get(NewOpc)) .addReg(BaseReg, getKillRegState(BaseKill)) - .addImm(ARM_AM::getAM4ModeImm(ARM_AM::ia)) .addImm(Pred).addReg(PredReg) .addReg(EvenReg, getDefRegState(isLd) | getDeadRegState(EvenDeadKill)) .addReg(OddReg, getDefRegState(isLd) | getDeadRegState(OddDeadKill)); @@ -910,7 +1076,6 @@ } else { BuildMI(MBB, MBBI, MBBI->getDebugLoc(), TII->get(NewOpc)) .addReg(BaseReg, getKillRegState(BaseKill)) - .addImm(ARM_AM::getAM4ModeImm(ARM_AM::ia)) .addImm(Pred).addReg(PredReg) .addReg(EvenReg, getKillRegState(EvenDeadKill) | getUndefRegState(EvenUndef)) @@ -1164,12 +1329,16 @@ MBBI->getOpcode() == ARM::tBX_RET || MBBI->getOpcode() == ARM::MOVPCLR)) { MachineInstr *PrevMI = prior(MBBI); - if (PrevMI->getOpcode() == ARM::LDM_UPD || - PrevMI->getOpcode() == ARM::t2LDM_UPD) { + unsigned Opcode = PrevMI->getOpcode(); + if (Opcode == ARM::LDMIA_UPD || Opcode == ARM::LDMDA_UPD || + Opcode == ARM::LDMDB_UPD || Opcode == ARM::LDMIB_UPD || + Opcode == ARM::t2LDMIA_UPD || Opcode == ARM::t2LDMDB_UPD) { MachineOperand &MO = PrevMI->getOperand(PrevMI->getNumOperands()-1); if (MO.getReg() != ARM::LR) return false; - unsigned NewOpc = isThumb2 ? ARM::t2LDM_RET : ARM::LDM_RET; + unsigned NewOpc = (isThumb2 ? ARM::t2LDMIA_RET : ARM::LDMIA_RET); + assert(((isThumb2 && Opcode == ARM::t2LDMIA_UPD) || + Opcode == ARM::LDMIA_UPD) && "Unsupported multiple load-return!"); PrevMI->setDesc(TII->get(NewOpc)); MO.setReg(ARM::PC); PrevMI->copyImplicitOps(&*MBBI); Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp?rev=119310&r1=119309&r2=119310&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp (original) +++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp Mon Nov 15 19:16:36 2010 @@ -1306,30 +1306,28 @@ unsigned short NumOps, unsigned &NumOpsAdded, BO B) { assert(NumOps >= 5 && "LdStMulFrm expects NumOps >= 5"); - - unsigned &OpIdx = NumOpsAdded; - - OpIdx = 0; + NumOpsAdded = 0; unsigned Base = getRegisterEnum(B, ARM::GPRRegClassID, decodeRn(insn)); // Writeback to base, if necessary. - if (Opcode == ARM::LDM_UPD || Opcode == ARM::STM_UPD) { + if (Opcode == ARM::LDMIA_UPD || Opcode == ARM::STMIA_UPD || + Opcode == ARM::LDMDA_UPD || Opcode == ARM::STMDA_UPD || + Opcode == ARM::LDMDB_UPD || Opcode == ARM::STMDB_UPD || + Opcode == ARM::LDMIB_UPD || Opcode == ARM::STMIB_UPD) { MI.addOperand(MCOperand::CreateReg(Base)); - ++OpIdx; + ++NumOpsAdded; } + // Add the base register operand. MI.addOperand(MCOperand::CreateReg(Base)); - ARM_AM::AMSubMode SubMode = getAMSubModeForBits(getPUBits(insn)); - MI.addOperand(MCOperand::CreateImm(ARM_AM::getAM4ModeImm(SubMode))); - // Handling the two predicate operands before the reglist. int64_t CondVal = insn >> ARMII::CondShift; MI.addOperand(MCOperand::CreateImm(CondVal == 0xF ? 0xE : CondVal)); MI.addOperand(MCOperand::CreateReg(ARM::CPSR)); - OpIdx += 4; + NumOpsAdded += 3; // Fill the variadic part of reglist. unsigned RegListBits = insn & ((1 << 16) - 1); @@ -1337,7 +1335,7 @@ if ((RegListBits >> i) & 1) { MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID, i))); - ++OpIdx; + ++NumOpsAdded; } } @@ -1882,8 +1880,10 @@ unsigned Base = getRegisterEnum(B, ARM::GPRRegClassID, decodeRn(insn)); // Writeback to base, if necessary. - if (Opcode == ARM::VLDMD_UPD || Opcode == ARM::VLDMS_UPD || - Opcode == ARM::VSTMD_UPD || Opcode == ARM::VSTMS_UPD) { + if (Opcode == ARM::VLDMDIA_UPD || Opcode == ARM::VLDMSIA_UPD || + Opcode == ARM::VLDMDDB_UPD || Opcode == ARM::VLDMSDB_UPD || + Opcode == ARM::VSTMDIA_UPD || Opcode == ARM::VSTMSIA_UPD || + Opcode == ARM::VSTMDDB_UPD || Opcode == ARM::VSTMSDB_UPD) { MI.addOperand(MCOperand::CreateReg(Base)); ++OpIdx; } @@ -1906,8 +1906,10 @@ OpIdx += 4; - bool isSPVFP = (Opcode == ARM::VLDMS || Opcode == ARM::VLDMS_UPD || - Opcode == ARM::VSTMS || Opcode == ARM::VSTMS_UPD); + bool isSPVFP = (Opcode == ARM::VLDMSIA || Opcode == ARM::VLDMSDB || + Opcode == ARM::VLDMSIA_UPD || Opcode == ARM::VLDMSDB_UPD || + Opcode == ARM::VSTMSIA || Opcode == ARM::VSTMSDB || + Opcode == ARM::VSTMSIA_UPD || Opcode == ARM::VSTMSDB_UPD); unsigned RegClassID = isSPVFP ? ARM::SPRRegClassID : ARM::DPRRegClassID; // Extract Dd/Sd. Modified: llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h?rev=119310&r1=119309&r2=119310&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h (original) +++ llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h Mon Nov 15 19:16:36 2010 @@ -833,40 +833,32 @@ // A8.6.53 LDM / LDMIA // A8.6.189 STM / STMIA // -// tLDM_UPD/tSTM_UPD: tRt tRt AM4ModeImm Pred-Imm Pred-CCR register_list -// tLDM: tRt AM4ModeImm Pred-Imm Pred-CCR register_list +// tLDMIA_UPD/tSTMIA_UPD: tRt tRt AM4ModeImm Pred-Imm Pred-CCR register_list +// tLDMIA: tRt AM4ModeImm Pred-Imm Pred-CCR register_list static bool DisassembleThumb1LdStMul(bool Ld, MCInst &MI, unsigned Opcode, - uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) { - - assert((Opcode == ARM::tLDM || Opcode == ARM::tLDM_UPD || - Opcode == ARM::tSTM_UPD) && "Unexpected opcode"); - - unsigned &OpIdx = NumOpsAdded; + uint32_t insn, unsigned short NumOps, + unsigned &NumOpsAdded, BO B) { + assert((Opcode == ARM::tLDMIA || Opcode == ARM::tLDMIA_UPD || + Opcode == ARM::tSTMIA_UPD) && "Unexpected opcode"); unsigned tRt = getT1tRt(insn); - - OpIdx = 0; + NumOpsAdded = 0; // WB register, if necessary. - if (Opcode == ARM::tLDM_UPD || Opcode == ARM::tSTM_UPD) { + if (Opcode == ARM::tLDMIA_UPD || Opcode == ARM::tSTMIA_UPD) { MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID, tRt))); - ++OpIdx; + ++NumOpsAdded; } MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID, tRt))); - ++OpIdx; - - // A8.6.53 LDM / LDMIA / LDMFD - Encoding T1 - // A8.6.53 STM / STMIA / STMEA - Encoding T1 - MI.addOperand(MCOperand::CreateImm(ARM_AM::getAM4ModeImm(ARM_AM::ia))); - ++OpIdx; + ++NumOpsAdded; // Handling the two predicate operands before the reglist. - if (B->DoPredicateOperands(MI, Opcode, insn, NumOps)) - OpIdx += 2; - else { + if (B->DoPredicateOperands(MI, Opcode, insn, NumOps)) { + NumOpsAdded += 2; + } else { DEBUG(errs() << "Expected predicate operands not found.\n"); return false; } @@ -874,13 +866,12 @@ unsigned RegListBits = slice(insn, 7, 0); // Fill the variadic part of reglist. - for (unsigned i = 0; i < 8; ++i) { + for (unsigned i = 0; i < 8; ++i) if ((RegListBits >> i) & 1) { MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID, i))); - ++OpIdx; + ++NumOpsAdded; } - } return true; } @@ -1122,34 +1113,31 @@ if (Thumb2RFEOpcode(Opcode)) return DisassembleThumb2RFE(MI, Opcode, insn, NumOps, NumOpsAdded, B); - assert((Opcode == ARM::t2LDM || Opcode == ARM::t2LDM_UPD || - Opcode == ARM::t2STM || Opcode == ARM::t2STM_UPD) + assert((Opcode == ARM::t2LDMIA || Opcode == ARM::t2LDMIA_UPD || + Opcode == ARM::t2LDMDB || Opcode == ARM::t2LDMDB_UPD || + Opcode == ARM::t2STMIA || Opcode == ARM::t2STMIA_UPD || + Opcode == ARM::t2STMDB || Opcode == ARM::t2STMDB_UPD) && "Unexpected opcode"); assert(NumOps >= 5 && "Thumb2 LdStMul expects NumOps >= 5"); - unsigned &OpIdx = NumOpsAdded; - - OpIdx = 0; + NumOpsAdded = 0; unsigned Base = getRegisterEnum(B, ARM::GPRRegClassID, decodeRn(insn)); // Writeback to base. - if (Opcode == ARM::t2LDM_UPD || Opcode == ARM::t2STM_UPD) { + if (Opcode == ARM::t2LDMIA_UPD || Opcode == ARM::t2LDMDB_UPD || + Opcode == ARM::t2STMIA_UPD || Opcode == ARM::t2STMDB_UPD) { MI.addOperand(MCOperand::CreateReg(Base)); - ++OpIdx; + ++NumOpsAdded; } MI.addOperand(MCOperand::CreateReg(Base)); - ++OpIdx; - - ARM_AM::AMSubMode SubMode = getAMSubModeForBits(getPUBits(insn)); - MI.addOperand(MCOperand::CreateImm(ARM_AM::getAM4ModeImm(SubMode))); - ++OpIdx; + ++NumOpsAdded; // Handling the two predicate operands before the reglist. - if (B->DoPredicateOperands(MI, Opcode, insn, NumOps)) - OpIdx += 2; - else { + if (B->DoPredicateOperands(MI, Opcode, insn, NumOps)) { + NumOpsAdded += 2; + } else { DEBUG(errs() << "Expected predicate operands not found.\n"); return false; } @@ -1157,13 +1145,12 @@ unsigned RegListBits = insn & ((1 << 16) - 1); // Fill the variadic part of reglist. - for (unsigned i = 0; i < 16; ++i) { + for (unsigned i = 0; i < 16; ++i) if ((RegListBits >> i) & 1) { MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID, i))); - ++OpIdx; + ++NumOpsAdded; } - } return true; } Modified: llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp?rev=119310&r1=119309&r2=119310&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp (original) +++ llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp Mon Nov 15 19:16:36 2010 @@ -63,55 +63,43 @@ } // A8.6.123 PUSH - if ((Opcode == ARM::STM_UPD || Opcode == ARM::t2STM_UPD) && + if ((Opcode == ARM::STMDB_UPD || Opcode == ARM::t2STMDB_UPD) && MI->getOperand(0).getReg() == ARM::SP) { - const MCOperand &MO1 = MI->getOperand(2); - if (ARM_AM::getAM4SubMode(MO1.getImm()) == ARM_AM::db) { - O << '\t' << "push"; - printPredicateOperand(MI, 3, O); - O << '\t'; - printRegisterList(MI, 5, O); - return; - } + O << '\t' << "push"; + printPredicateOperand(MI, 2, O); + O << '\t'; + printRegisterList(MI, 4, O); + return; } // A8.6.122 POP - if ((Opcode == ARM::LDM_UPD || Opcode == ARM::t2LDM_UPD) && + if ((Opcode == ARM::LDMIA_UPD || Opcode == ARM::t2LDMIA_UPD) && MI->getOperand(0).getReg() == ARM::SP) { - const MCOperand &MO1 = MI->getOperand(2); - if (ARM_AM::getAM4SubMode(MO1.getImm()) == ARM_AM::ia) { - O << '\t' << "pop"; - printPredicateOperand(MI, 3, O); - O << '\t'; - printRegisterList(MI, 5, O); - return; - } + O << '\t' << "pop"; + printPredicateOperand(MI, 2, O); + O << '\t'; + printRegisterList(MI, 4, O); + return; } // A8.6.355 VPUSH - if ((Opcode == ARM::VSTMS_UPD || Opcode == ARM::VSTMD_UPD) && + if ((Opcode == ARM::VSTMSDB_UPD || Opcode == ARM::VSTMDDB_UPD) && MI->getOperand(0).getReg() == ARM::SP) { - const MCOperand &MO1 = MI->getOperand(2); - if (ARM_AM::getAM4SubMode(MO1.getImm()) == ARM_AM::db) { - O << '\t' << "vpush"; - printPredicateOperand(MI, 3, O); - O << '\t'; - printRegisterList(MI, 5, O); - return; - } + O << '\t' << "vpush"; + printPredicateOperand(MI, 2, O); + O << '\t'; + printRegisterList(MI, 4, O); + return; } // A8.6.354 VPOP - if ((Opcode == ARM::VLDMS_UPD || Opcode == ARM::VLDMD_UPD) && + if ((Opcode == ARM::VLDMSIA_UPD || Opcode == ARM::VLDMDIA_UPD) && MI->getOperand(0).getReg() == ARM::SP) { - const MCOperand &MO1 = MI->getOperand(2); - if (ARM_AM::getAM4SubMode(MO1.getImm()) == ARM_AM::ia) { - O << '\t' << "vpop"; - printPredicateOperand(MI, 3, O); - O << '\t'; - printRegisterList(MI, 5, O); - return; - } + O << '\t' << "vpop"; + printPredicateOperand(MI, 2, O); + O << '\t'; + printRegisterList(MI, 4, O); + return; } printInstruction(MI, O); Modified: llvm/trunk/lib/Target/ARM/Thumb2SizeReduction.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Thumb2SizeReduction.cpp?rev=119310&r1=119309&r2=119310&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/Thumb2SizeReduction.cpp (original) +++ llvm/trunk/lib/Target/ARM/Thumb2SizeReduction.cpp Mon Nov 15 19:16:36 2010 @@ -121,11 +121,11 @@ { ARM::t2STRHi12,ARM::tSTRH, 0, 5, 0, 1, 0, 0,0, 1 }, { ARM::t2STRHs, ARM::tSTRH, 0, 0, 0, 1, 0, 0,0, 1 }, - { ARM::t2LDM, ARM::tLDM, 0, 0, 0, 1, 1, 1,1, 1 }, - { ARM::t2LDM_RET,0, ARM::tPOP_RET, 0, 0, 1, 1, 1,1, 1 }, - { ARM::t2LDM_UPD,ARM::tLDM_UPD,ARM::tPOP, 0, 0, 1, 1, 1,1, 1 }, + { ARM::t2LDMIA, ARM::tLDMIA, 0, 0, 0, 1, 1, 1,1, 1 }, + { ARM::t2LDMIA_RET,0, ARM::tPOP_RET, 0, 0, 1, 1, 1,1, 1 }, + { ARM::t2LDMIA_UPD,ARM::tLDMIA_UPD,ARM::tPOP,0, 0, 1, 1, 1,1, 1 }, // ARM::t2STM (with no basereg writeback) has no Thumb1 equivalent - { ARM::t2STM_UPD,ARM::tSTM_UPD,ARM::tPUSH, 0, 0, 1, 1, 1,1, 1 }, + { ARM::t2STMIA_UPD,ARM::tSTMIA_UPD,ARM::tPUSH,0, 0, 1, 1, 1,1, 1 }, }; class Thumb2SizeReduce : public MachineFunctionPass { @@ -233,9 +233,10 @@ static bool VerifyLowRegs(MachineInstr *MI) { unsigned Opc = MI->getOpcode(); - bool isPCOk = (Opc == ARM::t2LDM_RET || Opc == ARM::t2LDM || - Opc == ARM::t2LDM_UPD); - bool isLROk = (Opc == ARM::t2STM_UPD); + bool isPCOk = (Opc == ARM::t2LDMIA_RET || Opc == ARM::t2LDMIA || + Opc == ARM::t2LDMDB || Opc == ARM::t2LDMIA_UPD || + Opc == ARM::t2LDMDB_UPD); + bool isLROk = (Opc == ARM::t2STMIA_UPD || Opc == ARM::t2STMDB_UPD); bool isSPOk = isPCOk || isLROk || (Opc == ARM::t2ADDrSPi); for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { const MachineOperand &MO = MI->getOperand(i); @@ -275,6 +276,7 @@ unsigned Opc = Entry.NarrowOpc1; unsigned OpNum = 3; // First 'rest' of operands. uint8_t ImmLimit = Entry.Imm1Limit; + switch (Entry.WideOpc) { default: llvm_unreachable("Unexpected Thumb2 load / store opcode!"); @@ -310,10 +312,10 @@ HasShift = true; OpNum = 4; break; - case ARM::t2LDM: { + case ARM::t2LDMIA: + case ARM::t2LDMDB: { unsigned BaseReg = MI->getOperand(0).getReg(); - ARM_AM::AMSubMode Mode = ARM_AM::getAM4SubMode(MI->getOperand(1).getImm()); - if (!isARMLowRegister(BaseReg) || Mode != ARM_AM::ia) + if (!isARMLowRegister(BaseReg) || Entry.WideOpc != ARM::t2LDMIA) return false; // For the non-writeback version (this one), the base register must be // one of the registers being loaded. @@ -331,26 +333,29 @@ isLdStMul = true; break; } - case ARM::t2LDM_RET: { + case ARM::t2LDMIA_RET: { unsigned BaseReg = MI->getOperand(1).getReg(); if (BaseReg != ARM::SP) return false; Opc = Entry.NarrowOpc2; // tPOP_RET - OpNum = 3; + OpNum = 2; isLdStMul = true; break; } - case ARM::t2LDM_UPD: - case ARM::t2STM_UPD: { + case ARM::t2LDMIA_UPD: + case ARM::t2LDMDB_UPD: + case ARM::t2STMIA_UPD: + case ARM::t2STMDB_UPD: { OpNum = 0; unsigned BaseReg = MI->getOperand(1).getReg(); - ARM_AM::AMSubMode Mode = ARM_AM::getAM4SubMode(MI->getOperand(2).getImm()); if (BaseReg == ARM::SP && - ((Entry.WideOpc == ARM::t2LDM_UPD && Mode == ARM_AM::ia) || - (Entry.WideOpc == ARM::t2STM_UPD && Mode == ARM_AM::db))) { + (Entry.WideOpc == ARM::t2LDMIA_UPD || + Entry.WideOpc == ARM::t2STMDB_UPD)) { Opc = Entry.NarrowOpc2; // tPOP or tPUSH - OpNum = 3; - } else if (!isARMLowRegister(BaseReg) || Mode != ARM_AM::ia) { + OpNum = 2; + } else if (!isARMLowRegister(BaseReg) || + (Entry.WideOpc != ARM::t2LDMIA_UPD && + Entry.WideOpc != ARM::t2STMIA_UPD)) { return false; } isLdStMul = true; Modified: llvm/trunk/utils/TableGen/ARMDecoderEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/ARMDecoderEmitter.cpp?rev=119310&r1=119309&r2=119310&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/ARMDecoderEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/ARMDecoderEmitter.cpp Mon Nov 15 19:16:36 2010 @@ -1629,10 +1629,10 @@ // operations in order to work around some performance issues. if (Name.find("_sfp") != std::string::npos) return false; - // LDM_RET is a special case of LDM (Load Multiple) where the registers + // LDMIA_RET is a special case of LDM (Load Multiple) where the registers // loaded include the PC, causing a branch to a loaded address. Ignore - // the LDM_RET instruction when decoding. - if (Name == "LDM_RET") return false; + // the LDMIA_RET instruction when decoding. + if (Name == "LDMIA_RET") return false; // Bcc is in a more generic form than B. Ignore B when decoding. if (Name == "B") return false; @@ -1726,7 +1726,7 @@ // // tBfar conflicts with tBLr9 // tCMNz conflicts with tCMN (with assembly format strings being equal) - // tPOP_RET/t2LDM_RET conflict with tPOP/t2LDM (ditto) + // tPOP_RET/t2LDMIA_RET conflict with tPOP/t2LDM (ditto) // tMOVCCi conflicts with tMOVi8 // tMOVCCr conflicts with tMOVgpr2gpr // tBR_JTr conflicts with tBRIND @@ -1739,7 +1739,7 @@ /* Name == "tCMNz" || */ Name == "tCMPzi8" || Name == "tCMPzr" || Name == "tCMPzhir" || /* Name == "t2CMNzrr" || Name == "t2CMNzrs" || Name == "t2CMNzri" || */ Name == "t2CMPzrr" || Name == "t2CMPzrs" || - Name == "t2CMPzri" || Name == "tPOP_RET" || Name == "t2LDM_RET" || + Name == "t2CMPzri" || Name == "tPOP_RET" || Name == "t2LDMIA_RET" || Name == "tMOVCCi" || Name == "tMOVCCr" || Name == "tBR_JTr" || Name == "tSpill" || Name == "tLDRcp" || Name == "tRestore" || Name == "t2LEApcrelJT" || Name == "t2MOVCCi16") From rafael.espindola at gmail.com Mon Nov 15 19:19:05 2010 From: rafael.espindola at gmail.com (=?UTF-8?Q?Rafael_Esp=C3=ADndola?=) Date: Mon, 15 Nov 2010 20:19:05 -0500 Subject: [llvm-commits] [PATCH] Object File Library In-Reply-To: References: Message-ID: > That's what I originally was trying to do. The problem is that you > have to explicitly bring the typedefs into scope because of some weird > C++ template rule. Lookup into a depended base class, correct? For members you can do this->foo. I wonder if there is something like that for types. Cheers, Rafael From rafael.espindola at gmail.com Mon Nov 15 19:21:02 2010 From: rafael.espindola at gmail.com (=?UTF-8?Q?Rafael_Esp=C3=ADndola?=) Date: Mon, 15 Nov 2010 20:21:02 -0500 Subject: [llvm-commits] [PATCH] Object File Library In-Reply-To: References: Message-ID: On 15 November 2010 08:46, Jason Kim wrote: > I am curious as to ?how these patches will impact the existing > MCObjectWriter code. What is the overall intent beyond llvm-nm and > llvm-objdump? A full set of object file tools. Once this library support writing, I would love to move the existing object writers to use it. > Thanks > > -jason Cheers, Rafael From isanbard at gmail.com Mon Nov 15 19:38:20 2010 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 16 Nov 2010 01:38:20 -0000 Subject: [llvm-commits] [llvm] r119315 - /llvm/trunk/test/MC/ARM/arm_instructions.s Message-ID: <20101116013820.D38572A6C12C@llvm.org> Author: void Date: Mon Nov 15 19:38:20 2010 New Revision: 119315 URL: http://llvm.org/viewvc/llvm-project?rev=119315&view=rev Log: Test encodings for LDM and STM. Modified: llvm/trunk/test/MC/ARM/arm_instructions.s Modified: llvm/trunk/test/MC/ARM/arm_instructions.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/arm_instructions.s?rev=119315&r1=119314&r2=119315&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/arm_instructions.s (original) +++ llvm/trunk/test/MC/ARM/arm_instructions.s Mon Nov 15 19:38:20 2010 @@ -15,3 +15,21 @@ @ CHECK: vqdmull.s32 q8, d17, d16 @ CHECK: encoding: [0xa0,0x0d,0xe1,0xf2] vqdmull.s32 q8, d17, d16 + +@ CHECK: ldmia r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x92,0xe8] +@ CHECK: ldmib r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x92,0xe9] +@ CHECK: ldmda r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x12,0xe8] +@ CHECK: ldmdb r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x12,0xe9] + ldmia r2, {r1,r3-r6,sp} + ldmib r2, {r1,r3-r6,sp} + ldmda r2, {r1,r3-r6,sp} + ldmdb r2, {r1,r3-r6,sp} + +@ CHECK: stmia r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x82,0xe8] +@ CHECK: stmib r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x82,0xe9] +@ CHECK: stmda r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x02,0xe8] +@ CHECK: stmdb r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x02,0xe9] + stmia r2, {r1,r3-r6,sp} + stmib r2, {r1,r3-r6,sp} + stmda r2, {r1,r3-r6,sp} + stmdb r2, {r1,r3-r6,sp} From sabre at nondot.org Mon Nov 15 19:45:05 2010 From: sabre at nondot.org (Chris Lattner) Date: Tue, 16 Nov 2010 01:45:05 -0000 Subject: [llvm-commits] [llvm] r119317 - /llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Message-ID: <20101116014505.C07092A6C12C@llvm.org> Author: lattner Date: Mon Nov 15 19:45:05 2010 New Revision: 119317 URL: http://llvm.org/viewvc/llvm-project?rev=119317&view=rev Log: Fix a bug I introduced in the ppc refactoring, which caused long branches to be emitted as: bne cr0, 2 instead of: bne cr0, $+8 Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td?rev=119317&r1=119316&r2=119317&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td (original) +++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Mon Nov 15 19:45:05 2010 @@ -291,6 +291,7 @@ let EncoderMethod = "getDirectBrEncoding"; } def condbrtarget : Operand { + let PrintMethod = "printBranchOperand"; let EncoderMethod = "getCondBrEncoding"; } def calltarget : Operand { From echristo at apple.com Mon Nov 15 19:58:21 2010 From: echristo at apple.com (Eric Christopher) Date: Tue, 16 Nov 2010 01:58:21 -0000 Subject: [llvm-commits] [llvm] r119320 - /llvm/trunk/lib/CodeGen/MachineVerifier.cpp Message-ID: <20101116015821.66DBB2A6C12C@llvm.org> Author: echristo Date: Mon Nov 15 19:58:21 2010 New Revision: 119320 URL: http://llvm.org/viewvc/llvm-project?rev=119320&view=rev Log: Make the verifier a little quieter on instructions that it's probably (and likely) wrong about anyhow. Modified: llvm/trunk/lib/CodeGen/MachineVerifier.cpp Modified: llvm/trunk/lib/CodeGen/MachineVerifier.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineVerifier.cpp?rev=119320&r1=119319&r2=119320&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/MachineVerifier.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineVerifier.cpp Mon Nov 15 19:58:21 2010 @@ -558,7 +558,9 @@ else if (MO->isImplicit()) report("Explicit definition marked as implicit", MO, MONum); } else if (MONum < TI.getNumOperands()) { - if (MO->isReg()) { + // Don't check if it's a variadic instruction. See, e.g., LDM_RET in the arm + // back end. + if (MO->isReg() && MONum != TI.getNumOperands()-1) { if (MO->isDef()) report("Explicit operand marked as def", MO, MONum); if (MO->isImplicit()) From bigcheesegs at gmail.com Mon Nov 15 20:02:04 2010 From: bigcheesegs at gmail.com (Michael Spencer) Date: Mon, 15 Nov 2010 21:02:04 -0500 Subject: [llvm-commits] [PATCH] Object File Library In-Reply-To: References: Message-ID: On Mon, Nov 15, 2010 at 8:46 AM, Jason Kim wrote: > I am curious as to ?how these patches will impact the existing > MCObjectWriter code. What is the overall intent beyond llvm-nm and > llvm-objdump? > > Thanks > > -jason My main goal is to write a portable linker, loader and binary tool-chain with extensive bitcode support. In doing so I plan to make the components modular enough to support the needs of any other tools that need them. I'm not sure if it makes sense to make MCObjectWriter fully format independent due to the different semantics of the different formats. It would also require a major change to the code generators to handle GOT/PLT. However, there's no reason it can't use the object serialization API for the individual formats. - Michael Spencer > On Sun, Nov 14, 2010 at 5:20 PM, Michael Spencer wrote: >> 2010/11/14 Rafael Esp?ndola : >>>> I have no problem with that. The only thing I don't like about them >>>> currently is the super typedef macro I had to add to avoid adding 14 >>>> lines of typedefs in each templated class :(. >>> >>> Can you declare a base class with just those typedefs? You could then use >>> >>> class foo : public ElfTypeDefs >> >> That's what I originally was trying to do. The problem is that you >> have to explicitly bring the typedefs into scope because of some weird >> C++ template rule. >> >>>> Oh, and I haven't decided how to add writing to >>>> packed_endian_specific_integral yet. Currently it's not possible >>>> (without reinterpret_cast). >>> >>> np. Whatever the solution is (even explicit method calls) is something >>> that can be shared. >>> >>>> - Michael Spencer >>>> >>> >>> Cheers, >>> Rafael >>> >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >> > From isanbard at gmail.com Mon Nov 15 20:00:24 2010 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 16 Nov 2010 02:00:24 -0000 Subject: [llvm-commits] [llvm] r119321 - /llvm/trunk/lib/Target/ARM/ARMInstrVFP.td Message-ID: <20101116020024.871922A6C12C@llvm.org> Author: void Date: Mon Nov 15 20:00:24 2010 New Revision: 119321 URL: http://llvm.org/viewvc/llvm-project?rev=119321&view=rev Log: vldm and vstm are mnemonics for vldmia and vstmia resp. Modified: llvm/trunk/lib/Target/ARM/ARMInstrVFP.td Modified: llvm/trunk/lib/Target/ARM/ARMInstrVFP.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrVFP.td?rev=119321&r1=119320&r2=119321&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrVFP.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrVFP.td Mon Nov 15 20:00:24 2010 @@ -155,6 +155,9 @@ } // neverHasSideEffects +def : MnemonicAlias<"vldm", "vldmia">; +def : MnemonicAlias<"vstm", "vstmia">; + // FLDMX, FSTMX - mixing S/D registers for pre-armv6 cores //===----------------------------------------------------------------------===// From isanbard at gmail.com Mon Nov 15 20:08:46 2010 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 16 Nov 2010 02:08:46 -0000 Subject: [llvm-commits] [llvm] r119323 - in /llvm/trunk/lib/Target/ARM: ARMInstrFormats.td ARMInstrInfo.td ARMInstrThumb2.td Message-ID: <20101116020846.36FC62A6C12C@llvm.org> Author: void Date: Mon Nov 15 20:08:45 2010 New Revision: 119323 URL: http://llvm.org/viewvc/llvm-project?rev=119323&view=rev Log: - Remove dead patterns. - Add encodings to the *LDMIA_RET instrs. Probably not needed... Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td llvm/trunk/lib/Target/ARM/ARMInstrInfo.td llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=119323&r1=119322&r2=119323&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Mon Nov 15 20:08:45 2010 @@ -834,38 +834,6 @@ let Inst{19-16} = Rn; let Inst{15-0} = regs; } -class AXI4ld pattern> - : XI { - bits<4> p; - bits<16> dsts; - bits<4> Rn; - bits<2> amode; - let Inst{31-28} = p; - let Inst{27-25} = 0b100; - let Inst{24-23} = amode; - let Inst{22} = 0; // S bit - let Inst{20} = 1; // L bit - let Inst{19-16} = Rn; - let Inst{15-0} = dsts; -} -class AXI4st pattern> - : XI { - bits<4> p; - bits<16> srcs; - bits<4> Rn; - bits<2> amode; - let Inst{31-28} = p; - let Inst{27-25} = 0b100; - let Inst{24-23} = amode; - let Inst{22} = 0; // S bit - let Inst{20} = 0; // L bit - let Inst{19-16} = Rn; - let Inst{15-0} = srcs; -} // Unsigned multiply, multiply-accumulate instructions. class AMul1I opcod, dag oops, dag iops, InstrItinClass itin, Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=119323&r1=119322&r2=119323&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Mon Nov 15 20:08:45 2010 @@ -1869,16 +1869,16 @@ // FIXME: Should pc be an implicit operand like PICADD, etc? let isReturn = 1, isTerminator = 1, isBarrier = 1, mayLoad = 1, hasExtraDefRegAllocReq = 1, isCodeGenOnly = 1 in -def LDMIA_RET : AXI4ld<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, - reglist:$dsts, variable_ops), - IndexModeUpd, LdStMulFrm, IIC_iLoad_mBr, - "ldmia${p}\t$Rn!, $dsts", - "$Rn = $wb", []> { - let Inst{24-23} = 0b01; // Increment After - let Inst{21} = 1; // Writeback +def LDMIA_RET : AXI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, + reglist:$dsts, variable_ops), + IndexModeUpd, LdStMulFrm, IIC_iLoad_mBr, + "ldmia${p}\t$Rn!, $dsts", + "$Rn = $wb", []> { + let Inst{24-23} = 0b01; // Increment After + let Inst{21} = 1; // Writeback + let Inst{20} = 1; // Load } - //===----------------------------------------------------------------------===// // Move Instructions. // Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=119323&r1=119322&r2=119323&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Mon Nov 15 20:08:45 2010 @@ -2764,9 +2764,17 @@ IIC_iLoad_mBr, "ldmia${p}.w\t$Rn!, $dsts", "$Rn = $wb", []> { - let Inst{24-23} = 0b01; // IA: '01', DB: '10' - let Inst{21} = 1; // The W bit. - let Inst{20} = 1; // Load + bits<4> Rn; + bits<16> regs; + + let Inst{31-27} = 0b11101; + let Inst{26-25} = 0b00; + let Inst{24-23} = 0b01; // Increment After + let Inst{22} = 0; + let Inst{21} = 1; // Writeback + let Inst{20} = L_bit; + let Inst{19-16} = Rn; + let Inst{15-0} = regs; } let isBranch = 1, isTerminator = 1, isBarrier = 1 in { From isanbard at gmail.com Mon Nov 15 20:20:22 2010 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 16 Nov 2010 02:20:22 -0000 Subject: [llvm-commits] [llvm] r119325 - /llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Message-ID: <20101116022022.320862A6C12C@llvm.org> Author: void Date: Mon Nov 15 20:20:22 2010 New Revision: 119325 URL: http://llvm.org/viewvc/llvm-project?rev=119325&view=rev Log: L_bit doesn't work here. Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=119325&r1=119324&r2=119325&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Mon Nov 15 20:20:22 2010 @@ -2772,7 +2772,7 @@ let Inst{24-23} = 0b01; // Increment After let Inst{22} = 0; let Inst{21} = 1; // Writeback - let Inst{20} = L_bit; + let Inst{20} = 1; let Inst{19-16} = Rn; let Inst{15-0} = regs; } From rafael.espindola at gmail.com Mon Nov 15 20:36:14 2010 From: rafael.espindola at gmail.com (=?UTF-8?Q?Rafael_Esp=C3=ADndola?=) Date: Mon, 15 Nov 2010 21:36:14 -0500 Subject: [llvm-commits] [PATCH] Object File Library In-Reply-To: References: Message-ID: > I'm not sure if it makes sense to make MCObjectWriter fully format > independent due to the different semantics of the different formats. > It would also require a major change to the code generators to handle > GOT/PLT. However, there's no reason it can't use the object > serialization API for the individual formats. That was my idea. There is enough difference is the file formats to have one MCObjectWriter for each, so just use the bits that the object library provides for that format. > - Michael Spencer Cheers, Rafael From rafael.espindola at gmail.com Mon Nov 15 22:11:46 2010 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Tue, 16 Nov 2010 04:11:46 -0000 Subject: [llvm-commits] [llvm] r119328 - in /llvm/trunk: lib/MC/ELFObjectWriter.cpp test/MC/ELF/relax.s Message-ID: <20101116041146.93DB82A6C12C@llvm.org> Author: rafael Date: Mon Nov 15 22:11:46 2010 New Revision: 119328 URL: http://llvm.org/viewvc/llvm-project?rev=119328&view=rev Log: A bit more of gnu as compatibility when handling relocations with aliases. Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp llvm/trunk/test/MC/ELF/relax.s Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/ELFObjectWriter.cpp?rev=119328&r1=119327&r2=119328&view=diff ============================================================================== --- llvm/trunk/lib/MC/ELFObjectWriter.cpp (original) +++ llvm/trunk/lib/MC/ELFObjectWriter.cpp Mon Nov 15 22:11:46 2010 @@ -1080,8 +1080,8 @@ const MCSection *SectionA = 0; const MCSymbol *SymbolA = 0; if (const MCSymbolRefExpr *A = Target.getSymA()) { - SymbolA = &A->getSymbol().AliasedSymbol(); - SectionA = &SymbolA->getSection(); + SymbolA = &A->getSymbol(); + SectionA = &SymbolA->AliasedSymbol().getSection(); } const MCSection *SectionB = 0; @@ -1092,6 +1092,9 @@ if (!BaseSection) return SectionA == SectionB; + // FIXME: This is in here just to match gnu as output. If the two ends + // are in the same section, there is nothing that the linker can do to + // break it. const MCSymbolData &DataA = Asm.getSymbolData(*SymbolA); if (DataA.isExternal()) return false; Modified: llvm/trunk/test/MC/ELF/relax.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/relax.s?rev=119328&r1=119327&r2=119328&view=diff ============================================================================== --- llvm/trunk/test/MC/ELF/relax.s (original) +++ llvm/trunk/test/MC/ELF/relax.s Mon Nov 15 22:11:46 2010 @@ -1,6 +1,6 @@ // RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s -// Test that we do a relaxation for foo but not for bar. Relaxing foo is +// Test that we do a relaxation for foo but not for bar or zed. Relaxing foo is // probably not necessary, but matches what gnu as does. // Also test that the relaxation done for foo uses the symbol, not section and @@ -9,29 +9,32 @@ bar: .globl foo foo: + .set zed,foo + jmp bar jmp foo + jmp zed // CHECK: ('sh_name', 0x00000001) # '.text' // CHECK-NEXT: ('sh_type', 0x00000001) // CHECK-NEXT: ('sh_flags', 0x00000006) // CHECK-NEXT: ('sh_addr', 0x00000000) // CHECK-NEXT: ('sh_offset', 0x00000040) -// CHECK-NEXT: ('sh_size', 0x00000007) +// CHECK-NEXT: ('sh_size', 0x00000009) // CHECK-NEXT: ('sh_link', 0x00000000) // CHECK-NEXT: ('sh_info', 0x00000000) // CHECK-NEXT: ('sh_addralign', 0x00000004) // CHECK-NEXT: ('sh_entsize', 0x00000000) -// CHECK-NEXT: ('_section_data', 'ebfee900 000000') +// CHECK-NEXT: ('_section_data', 'ebfee900 000000eb f7') -// CHECK: # Symbol 0x00000005 +// CHECK: # Symbol 0x00000006 // CHECK-NEXT: (('st_name', 0x00000005) # 'foo' // CHECK: .rela.text // CHECK: ('_relocations', [ // CHECK-NEXT: Relocation 0x00000000 // CHECK-NEXT: (('r_offset', 0x00000003) -// CHECK-NEXT: ('r_sym', 0x00000005) +// CHECK-NEXT: ('r_sym', 0x00000006) // CHECK-NEXT: ('r_type', 0x00000002) // CHECK-NEXT: ('r_addend', 0xfffffffc) // CHECK-NEXT: ), From geek4civic at gmail.com Mon Nov 15 22:19:41 2010 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Tue, 16 Nov 2010 13:19:41 +0900 Subject: [llvm-commits] [Review request] CMake/MSVS: Support for the target "check" Message-ID: Good afternoon, guys! They provide ability to run "check" on Visual Studio IDE with any configurations. Please take a look into them. * 0001-test-CMakeLists.txt-Apply-multiple-configurations-on.patch test/CMakeLists.txt: Apply multiple configurations on Visual Studio with clang/test's stuff. * 0002-lit.GoogleTest-On-case-insensitive-filesystem-matchi.patch lit.GoogleTest: On case-insensitive filesystem, matching should be case-insensitive when directory name is checked with test_sub_dir. On MSVS8, ${CMAKE_CFG_INTDIR}, aka $(OutDir), has capitalized name(eg. Debug), although $(OutDir) is made with lower case(eg. debug). ...Takumi -------------- next part -------------- A non-text attachment was scrubbed... Name: 0001-test-CMakeLists.txt-Apply-multiple-configurations-on.patch Type: application/octet-stream Size: 3850 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101116/b788438c/attachment.obj -------------- next part -------------- A non-text attachment was scrubbed... Name: 0002-lit.GoogleTest-On-case-insensitive-filesystem-matchi.patch Type: application/octet-stream Size: 1557 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101116/b788438c/attachment-0001.obj From stoklund at 2pi.dk Mon Nov 15 22:51:37 2010 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Mon, 15 Nov 2010 20:51:37 -0800 Subject: [llvm-commits] [llvm] r119320 - /llvm/trunk/lib/CodeGen/MachineVerifier.cpp In-Reply-To: <20101116015821.66DBB2A6C12C@llvm.org> References: <20101116015821.66DBB2A6C12C@llvm.org> Message-ID: <20C350A5-2FE6-4881-B77A-89D98056645F@2pi.dk> On Nov 15, 2010, at 5:58 PM, Eric Christopher wrote: > Author: echristo > Date: Mon Nov 15 19:58:21 2010 > New Revision: 119320 > > URL: http://llvm.org/viewvc/llvm-project?rev=119320&view=rev > Log: > Make the verifier a little quieter on instructions that it's probably > (and likely) wrong about anyhow. > > Modified: > llvm/trunk/lib/CodeGen/MachineVerifier.cpp > > Modified: llvm/trunk/lib/CodeGen/MachineVerifier.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineVerifier.cpp?rev=119320&r1=119319&r2=119320&view=diff > ============================================================================== > --- llvm/trunk/lib/CodeGen/MachineVerifier.cpp (original) > +++ llvm/trunk/lib/CodeGen/MachineVerifier.cpp Mon Nov 15 19:58:21 2010 > @@ -558,7 +558,9 @@ > else if (MO->isImplicit()) > report("Explicit definition marked as implicit", MO, MONum); > } else if (MONum < TI.getNumOperands()) { > - if (MO->isReg()) { > + // Don't check if it's a variadic instruction. See, e.g., LDM_RET in the arm > + // back end. > + if (MO->isReg() && MONum != TI.getNumOperands()-1) { > if (MO->isDef()) > report("Explicit operand marked as def", MO, MONum); You should only allow this for the last fixed operand on variadic instructions. > if (MO->isImplicit()) > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From bigcheesegs at gmail.com Tue Nov 16 02:25:30 2010 From: bigcheesegs at gmail.com (Michael Spencer) Date: Tue, 16 Nov 2010 03:25:30 -0500 Subject: [llvm-commits] [PATCH] System: Move system_error from KillTheDoctor. In-Reply-To: <1289895429-23671-1-git-send-email-bigcheesegs@gmail.com> References: <1289895429-23671-1-git-send-email-bigcheesegs@gmail.com> Message-ID: This is the first step in adding sane error handling support to LLVMSystem. The system API's will be shifted over to returning an error_code, and returning other return values as out parameters to the function. Code that needs to check error conditions will use the errc enum values which are the same as the posix_errno defines (EBADF, E2BIG, etc...), and are compatable with the error codes in WinError.h due to some magic in system_error. An example would be: if ((error_code ec = KillEvil("Java")) != errc::success) { if (ec == kill_error::too_much_evil) std::terminate(); errs() << ":O There was an error! " << ec.message(); } --- ?.../llvm/System}/system_error.h ? ? ? ? ? ? ? ? ? ?| ?139 ++++------ ?lib/System/CMakeLists.txt ? ? ? ? ? ? ? ? ? ? ? ? ?| ? ?3 + ?lib/System/Unix/system_error.inc ? ? ? ? ? ? ? ? ? | ? 34 +++ ?lib/System/Win32/system_error.inc ? ? ? ? ? ? ? ? ?| ?140 ++++++++++ ?lib/System/system_error.cpp ? ? ? ? ? ? ? ? ? ? ? ?| ?121 ++++++++ ?utils/KillTheDoctor/CMakeLists.txt ? ? ? ? ? ? ? ? | ? ?1 - ?utils/KillTheDoctor/KillTheDoctor.cpp ? ? ? ? ? ? ?| ? ?2 +- ?utils/KillTheDoctor/system_error.cpp ? ? ? ? ? ? ? | ?287 -------------------- ?8 files changed, 359 insertions(+), 368 deletions(-) ?rename {utils/KillTheDoctor => include/llvm/System}/system_error.h (88%) ?create mode 100644 lib/System/Unix/system_error.inc ?create mode 100644 lib/System/Win32/system_error.inc ?create mode 100644 lib/System/system_error.cpp ?delete mode 100644 utils/KillTheDoctor/system_error.cpp -------------- next part -------------- A non-text attachment was scrubbed... Name: 0001-System-Move-system_error-from-KillTheDoctor.patch Type: text/x-patch Size: 32354 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101116/966e7d5d/attachment-0001.bin From fvbommel at gmail.com Tue Nov 16 03:13:02 2010 From: fvbommel at gmail.com (Frits van Bommel) Date: Tue, 16 Nov 2010 10:13:02 +0100 Subject: [llvm-commits] [llvm] r119309 - in /llvm/trunk: include/llvm/Object/ObjectFile.h lib/Object/ObjectFile.cpp In-Reply-To: <20101116010651.515592A6C12C@llvm.org> References: <20101116010651.515592A6C12C@llvm.org> Message-ID: On Tue, Nov 16, 2010 at 2:06 AM, Michael J. Spencer wrote: > +#include "llvm/ADT/StringRef.h" > +#include "llvm/System/DataTypes.h" > > ?namespace llvm { > > ?class MemoryBuffer; > +class StringRef; Surely you don't need both the #include *and* the forward declaration? From baldrick at free.fr Tue Nov 16 06:16:38 2010 From: baldrick at free.fr (Duncan Sands) Date: Tue, 16 Nov 2010 12:16:38 -0000 Subject: [llvm-commits] [llvm] r119347 - in /llvm/trunk: include/llvm/Analysis/InstructionSimplify.h lib/Analysis/InstructionSimplify.cpp lib/Analysis/PHITransAddr.cpp test/Transforms/InstCombine/phi.ll Message-ID: <20101116121638.A495C2A6C12C@llvm.org> Author: baldrick Date: Tue Nov 16 06:16:38 2010 New Revision: 119347 URL: http://llvm.org/viewvc/llvm-project?rev=119347&view=rev Log: In which I discover the existence of loops. Threading an operation over a phi node by applying it to each operand may be wrong if the operation and the phi node are mutually interdependent (the testcase has a simple example of this). So only do this transform if it would be correct to perform the operation in each predecessor of the block containing the phi, i.e. if the other operands all dominate the phi. This should fix the FFMPEG snow.c regression reported by ?smail D?nmez. Modified: llvm/trunk/include/llvm/Analysis/InstructionSimplify.h llvm/trunk/lib/Analysis/InstructionSimplify.cpp llvm/trunk/lib/Analysis/PHITransAddr.cpp llvm/trunk/test/Transforms/InstCombine/phi.ll Modified: llvm/trunk/include/llvm/Analysis/InstructionSimplify.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/InstructionSimplify.h?rev=119347&r1=119346&r2=119347&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/InstructionSimplify.h (original) +++ llvm/trunk/include/llvm/Analysis/InstructionSimplify.h Tue Nov 16 06:16:38 2010 @@ -25,37 +25,40 @@ /// SimplifyAddInst - Given operands for an Add, see if we can /// fold the result. If not, this returns null. Value *SimplifyAddInst(Value *LHS, Value *RHS, bool isNSW, bool isNUW, - const TargetData *TD = 0); + const TargetData *TD = 0, const DominatorTree *DT = 0); /// SimplifyAndInst - Given operands for an And, see if we can /// fold the result. If not, this returns null. - Value *SimplifyAndInst(Value *LHS, Value *RHS, - const TargetData *TD = 0); + Value *SimplifyAndInst(Value *LHS, Value *RHS, const TargetData *TD = 0, + const DominatorTree *DT = 0); /// SimplifyOrInst - Given operands for an Or, see if we can /// fold the result. If not, this returns null. - Value *SimplifyOrInst(Value *LHS, Value *RHS, - const TargetData *TD = 0); + Value *SimplifyOrInst(Value *LHS, Value *RHS, const TargetData *TD = 0, + const DominatorTree *DT = 0); /// SimplifyICmpInst - Given operands for an ICmpInst, see if we can /// fold the result. If not, this returns null. Value *SimplifyICmpInst(unsigned Predicate, Value *LHS, Value *RHS, - const TargetData *TD = 0); + const TargetData *TD = 0, + const DominatorTree *DT = 0); /// SimplifyFCmpInst - Given operands for an FCmpInst, see if we can /// fold the result. If not, this returns null. Value *SimplifyFCmpInst(unsigned Predicate, Value *LHS, Value *RHS, - const TargetData *TD = 0); + const TargetData *TD = 0, + const DominatorTree *DT = 0); /// SimplifySelectInst - Given operands for a SelectInst, see if we can fold /// the result. If not, this returns null. Value *SimplifySelectInst(Value *Cond, Value *TrueVal, Value *FalseVal, - const TargetData *TD = 0); + const TargetData *TD = 0, + const DominatorTree *DT = 0); /// SimplifyGEPInst - Given operands for an GetElementPtrInst, see if we can /// fold the result. If not, this returns null. Value *SimplifyGEPInst(Value * const *Ops, unsigned NumOps, - const TargetData *TD = 0); + const TargetData *TD = 0, const DominatorTree *DT = 0); //=== Helper functions for higher up the class hierarchy. @@ -63,12 +66,12 @@ /// SimplifyCmpInst - Given operands for a CmpInst, see if we can /// fold the result. If not, this returns null. Value *SimplifyCmpInst(unsigned Predicate, Value *LHS, Value *RHS, - const TargetData *TD = 0); + const TargetData *TD = 0, const DominatorTree *DT = 0); /// SimplifyBinOp - Given operands for a BinaryOperator, see if we can /// fold the result. If not, this returns null. Value *SimplifyBinOp(unsigned Opcode, Value *LHS, Value *RHS, - const TargetData *TD = 0); + const TargetData *TD = 0, const DominatorTree *DT = 0); /// SimplifyInstruction - See if we can compute a simplified version of this /// instruction. If not, this returns null. Modified: llvm/trunk/lib/Analysis/InstructionSimplify.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/InstructionSimplify.cpp?rev=119347&r1=119346&r2=119347&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/InstructionSimplify.cpp (original) +++ llvm/trunk/lib/Analysis/InstructionSimplify.cpp Tue Nov 16 06:16:38 2010 @@ -15,25 +15,47 @@ #include "llvm/Analysis/InstructionSimplify.h" #include "llvm/Analysis/ConstantFolding.h" -#include "llvm/Support/ValueHandle.h" -#include "llvm/Instructions.h" +#include "llvm/Analysis/Dominators.h" #include "llvm/Support/PatternMatch.h" +#include "llvm/Support/ValueHandle.h" using namespace llvm; using namespace llvm::PatternMatch; -#define MaxRecursionDepth 3 +#define RecursionLimit 3 static Value *SimplifyBinOp(unsigned, Value *, Value *, const TargetData *, - unsigned); + const DominatorTree *, unsigned); static Value *SimplifyCmpInst(unsigned, Value *, Value *, const TargetData *, - unsigned); + const DominatorTree *, unsigned); + +/// ValueDominatesPHI - Does the given value dominate the specified phi node? +static bool ValueDominatesPHI(Value *V, PHINode *P, const DominatorTree *DT) { + Instruction *I = dyn_cast(V); + if (!I) + // Arguments and constants dominate all instructions. + return true; + + // If we have a DominatorTree then do a precise test. + if (DT) + return DT->dominates(I, P); + + // Otherwise, if the instruction is in the entry block, and is not an invoke, + // then it obviously dominates all phi nodes. + if (I->getParent() == &I->getParent()->getParent()->getEntryBlock() && + !isa(I)) + return true; + + return false; +} /// ThreadBinOpOverSelect - In the case of a binary operation with a select /// instruction as an operand, try to simplify the binop by seeing whether /// evaluating it on both branches of the select results in the same value. /// Returns the common value if so, otherwise returns null. static Value *ThreadBinOpOverSelect(unsigned Opcode, Value *LHS, Value *RHS, - const TargetData *TD, unsigned MaxRecurse) { + const TargetData *TD, + const DominatorTree *DT, + unsigned MaxRecurse) { SelectInst *SI; if (isa(LHS)) { SI = cast(LHS); @@ -46,11 +68,11 @@ Value *TV; Value *FV; if (SI == LHS) { - TV = SimplifyBinOp(Opcode, SI->getTrueValue(), RHS, TD, MaxRecurse); - FV = SimplifyBinOp(Opcode, SI->getFalseValue(), RHS, TD, MaxRecurse); + TV = SimplifyBinOp(Opcode, SI->getTrueValue(), RHS, TD, DT, MaxRecurse); + FV = SimplifyBinOp(Opcode, SI->getFalseValue(), RHS, TD, DT, MaxRecurse); } else { - TV = SimplifyBinOp(Opcode, LHS, SI->getTrueValue(), TD, MaxRecurse); - FV = SimplifyBinOp(Opcode, LHS, SI->getFalseValue(), TD, MaxRecurse); + TV = SimplifyBinOp(Opcode, LHS, SI->getTrueValue(), TD, DT, MaxRecurse); + FV = SimplifyBinOp(Opcode, LHS, SI->getFalseValue(), TD, DT, MaxRecurse); } // If they simplified to the same value, then return the common value. @@ -102,6 +124,7 @@ /// null. static Value *ThreadCmpOverSelect(CmpInst::Predicate Pred, Value *LHS, Value *RHS, const TargetData *TD, + const DominatorTree *DT, unsigned MaxRecurse) { // Make sure the select is on the LHS. if (!isa(LHS)) { @@ -113,10 +136,10 @@ // Now that we have "cmp select(cond, TV, FV), RHS", analyse it. // Does "cmp TV, RHS" simplify? - if (Value *TCmp = SimplifyCmpInst(Pred, SI->getTrueValue(), RHS, TD, + if (Value *TCmp = SimplifyCmpInst(Pred, SI->getTrueValue(), RHS, TD, DT, MaxRecurse)) // It does! Does "cmp FV, RHS" simplify? - if (Value *FCmp = SimplifyCmpInst(Pred, SI->getFalseValue(), RHS, TD, + if (Value *FCmp = SimplifyCmpInst(Pred, SI->getFalseValue(), RHS, TD, DT, MaxRecurse)) // It does! If they simplified to the same value, then use it as the // result of the original comparison. @@ -130,13 +153,20 @@ /// it on the incoming phi values yields the same result for every value. If so /// returns the common value, otherwise returns null. static Value *ThreadBinOpOverPHI(unsigned Opcode, Value *LHS, Value *RHS, - const TargetData *TD, unsigned MaxRecurse) { + const TargetData *TD, const DominatorTree *DT, + unsigned MaxRecurse) { PHINode *PI; if (isa(LHS)) { PI = cast(LHS); + // Bail out if RHS and the phi may be mutually interdependent due to a loop. + if (!ValueDominatesPHI(RHS, PI, DT)) + return 0; } else { assert(isa(RHS) && "No PHI instruction operand!"); PI = cast(RHS); + // Bail out if LHS and the phi may be mutually interdependent due to a loop. + if (!ValueDominatesPHI(LHS, PI, DT)) + return 0; } // Evaluate the BinOp on the incoming phi values. @@ -146,8 +176,8 @@ // If the incoming value is the phi node itself, it can be safely skipped. if (Incoming == PI) continue; Value *V = PI == LHS ? - SimplifyBinOp(Opcode, Incoming, RHS, TD, MaxRecurse) : - SimplifyBinOp(Opcode, LHS, Incoming, TD, MaxRecurse); + SimplifyBinOp(Opcode, Incoming, RHS, TD, DT, MaxRecurse) : + SimplifyBinOp(Opcode, LHS, Incoming, TD, DT, MaxRecurse); // If the operation failed to simplify, or simplified to a different value // to previously, then give up. if (!V || (CommonValue && V != CommonValue)) @@ -163,7 +193,8 @@ /// incoming phi values yields the same result every time. If so returns the /// common result, otherwise returns null. static Value *ThreadCmpOverPHI(CmpInst::Predicate Pred, Value *LHS, Value *RHS, - const TargetData *TD, unsigned MaxRecurse) { + const TargetData *TD, const DominatorTree *DT, + unsigned MaxRecurse) { // Make sure the phi is on the LHS. if (!isa(LHS)) { std::swap(LHS, RHS); @@ -172,13 +203,17 @@ assert(isa(LHS) && "Not comparing with a phi instruction!"); PHINode *PI = cast(LHS); + // Bail out if RHS and the phi may be mutually interdependent due to a loop. + if (!ValueDominatesPHI(RHS, PI, DT)) + return 0; + // Evaluate the BinOp on the incoming phi values. Value *CommonValue = 0; for (unsigned i = 0, e = PI->getNumIncomingValues(); i != e; ++i) { Value *Incoming = PI->getIncomingValue(i); // If the incoming value is the phi node itself, it can be safely skipped. if (Incoming == PI) continue; - Value *V = SimplifyCmpInst(Pred, Incoming, RHS, TD, MaxRecurse); + Value *V = SimplifyCmpInst(Pred, Incoming, RHS, TD, DT, MaxRecurse); // If the operation failed to simplify, or simplified to a different value // to previously, then give up. if (!V || (CommonValue && V != CommonValue)) @@ -192,7 +227,7 @@ /// SimplifyAddInst - Given operands for an Add, see if we can /// fold the result. If not, this returns null. Value *llvm::SimplifyAddInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, - const TargetData *TD) { + const TargetData *TD, const DominatorTree *) { if (Constant *CLHS = dyn_cast(Op0)) { if (Constant *CRHS = dyn_cast(Op1)) { Constant *Ops[] = { CLHS, CRHS }; @@ -221,7 +256,7 @@ /// SimplifyAndInst - Given operands for an And, see if we can /// fold the result. If not, this returns null. static Value *SimplifyAndInst(Value *Op0, Value *Op1, const TargetData *TD, - unsigned MaxRecurse) { + const DominatorTree *DT, unsigned MaxRecurse) { if (Constant *CLHS = dyn_cast(Op0)) { if (Constant *CRHS = dyn_cast(Op1)) { Constant *Ops[] = { CLHS, CRHS }; @@ -288,28 +323,29 @@ // If the operation is with the result of a select instruction, check whether // operating on either branch of the select always yields the same value. if (MaxRecurse && (isa(Op0) || isa(Op1))) - if (Value *V = ThreadBinOpOverSelect(Instruction::And, Op0, Op1, TD, + if (Value *V = ThreadBinOpOverSelect(Instruction::And, Op0, Op1, TD, DT, MaxRecurse-1)) return V; // If the operation is with the result of a phi instruction, check whether // operating on all incoming values of the phi always yields the same value. if (MaxRecurse && (isa(Op0) || isa(Op1))) - if (Value *V = ThreadBinOpOverPHI(Instruction::And, Op0, Op1, TD, + if (Value *V = ThreadBinOpOverPHI(Instruction::And, Op0, Op1, TD, DT, MaxRecurse-1)) return V; return 0; } -Value *llvm::SimplifyAndInst(Value *Op0, Value *Op1, const TargetData *TD) { - return ::SimplifyAndInst(Op0, Op1, TD, MaxRecursionDepth); +Value *llvm::SimplifyAndInst(Value *Op0, Value *Op1, const TargetData *TD, + const DominatorTree *DT) { + return ::SimplifyAndInst(Op0, Op1, TD, DT, RecursionLimit); } /// SimplifyOrInst - Given operands for an Or, see if we can /// fold the result. If not, this returns null. static Value *SimplifyOrInst(Value *Op0, Value *Op1, const TargetData *TD, - unsigned MaxRecurse) { + const DominatorTree *DT, unsigned MaxRecurse) { if (Constant *CLHS = dyn_cast(Op0)) { if (Constant *CRHS = dyn_cast(Op1)) { Constant *Ops[] = { CLHS, CRHS }; @@ -376,22 +412,23 @@ // If the operation is with the result of a select instruction, check whether // operating on either branch of the select always yields the same value. if (MaxRecurse && (isa(Op0) || isa(Op1))) - if (Value *V = ThreadBinOpOverSelect(Instruction::Or, Op0, Op1, TD, + if (Value *V = ThreadBinOpOverSelect(Instruction::Or, Op0, Op1, TD, DT, MaxRecurse-1)) return V; // If the operation is with the result of a phi instruction, check whether // operating on all incoming values of the phi always yields the same value. if (MaxRecurse && (isa(Op0) || isa(Op1))) - if (Value *V = ThreadBinOpOverPHI(Instruction::Or, Op0, Op1, TD, + if (Value *V = ThreadBinOpOverPHI(Instruction::Or, Op0, Op1, TD, DT, MaxRecurse-1)) return V; return 0; } -Value *llvm::SimplifyOrInst(Value *Op0, Value *Op1, const TargetData *TD) { - return ::SimplifyOrInst(Op0, Op1, TD, MaxRecursionDepth); +Value *llvm::SimplifyOrInst(Value *Op0, Value *Op1, const TargetData *TD, + const DominatorTree *DT) { + return ::SimplifyOrInst(Op0, Op1, TD, DT, RecursionLimit); } static const Type *GetCompareTy(Value *Op) { @@ -401,7 +438,8 @@ /// SimplifyICmpInst - Given operands for an ICmpInst, see if we can /// fold the result. If not, this returns null. static Value *SimplifyICmpInst(unsigned Predicate, Value *LHS, Value *RHS, - const TargetData *TD, unsigned MaxRecurse) { + const TargetData *TD, const DominatorTree *DT, + unsigned MaxRecurse) { CmpInst::Predicate Pred = (CmpInst::Predicate)Predicate; assert(CmpInst::isIntPredicate(Pred) && "Not an integer compare!"); @@ -460,27 +498,28 @@ // If the comparison is with the result of a select instruction, check whether // comparing with either branch of the select always yields the same value. if (MaxRecurse && (isa(LHS) || isa(RHS))) - if (Value *V = ThreadCmpOverSelect(Pred, LHS, RHS, TD, MaxRecurse-1)) + if (Value *V = ThreadCmpOverSelect(Pred, LHS, RHS, TD, DT, MaxRecurse-1)) return V; // If the comparison is with the result of a phi instruction, check whether // doing the compare with each incoming phi value yields a common result. if (MaxRecurse && (isa(LHS) || isa(RHS))) - if (Value *V = ThreadCmpOverPHI(Pred, LHS, RHS, TD, MaxRecurse-1)) + if (Value *V = ThreadCmpOverPHI(Pred, LHS, RHS, TD, DT, MaxRecurse-1)) return V; return 0; } Value *llvm::SimplifyICmpInst(unsigned Predicate, Value *LHS, Value *RHS, - const TargetData *TD) { - return ::SimplifyICmpInst(Predicate, LHS, RHS, TD, MaxRecursionDepth); + const TargetData *TD, const DominatorTree *DT) { + return ::SimplifyICmpInst(Predicate, LHS, RHS, TD, DT, RecursionLimit); } /// SimplifyFCmpInst - Given operands for an FCmpInst, see if we can /// fold the result. If not, this returns null. static Value *SimplifyFCmpInst(unsigned Predicate, Value *LHS, Value *RHS, - const TargetData *TD, unsigned MaxRecurse) { + const TargetData *TD, const DominatorTree *DT, + unsigned MaxRecurse) { CmpInst::Predicate Pred = (CmpInst::Predicate)Predicate; assert(CmpInst::isFPPredicate(Pred) && "Not an FP compare!"); @@ -554,27 +593,27 @@ // If the comparison is with the result of a select instruction, check whether // comparing with either branch of the select always yields the same value. if (MaxRecurse && (isa(LHS) || isa(RHS))) - if (Value *V = ThreadCmpOverSelect(Pred, LHS, RHS, TD, MaxRecurse-1)) + if (Value *V = ThreadCmpOverSelect(Pred, LHS, RHS, TD, DT, MaxRecurse-1)) return V; // If the comparison is with the result of a phi instruction, check whether // doing the compare with each incoming phi value yields a common result. if (MaxRecurse && (isa(LHS) || isa(RHS))) - if (Value *V = ThreadCmpOverPHI(Pred, LHS, RHS, TD, MaxRecurse-1)) + if (Value *V = ThreadCmpOverPHI(Pred, LHS, RHS, TD, DT, MaxRecurse-1)) return V; return 0; } Value *llvm::SimplifyFCmpInst(unsigned Predicate, Value *LHS, Value *RHS, - const TargetData *TD) { - return ::SimplifyFCmpInst(Predicate, LHS, RHS, TD, MaxRecursionDepth); + const TargetData *TD, const DominatorTree *DT) { + return ::SimplifyFCmpInst(Predicate, LHS, RHS, TD, DT, RecursionLimit); } /// SimplifySelectInst - Given operands for a SelectInst, see if we can fold /// the result. If not, this returns null. Value *llvm::SimplifySelectInst(Value *CondVal, Value *TrueVal, Value *FalseVal, - const TargetData *TD) { + const TargetData *TD, const DominatorTree *) { // select true, X, Y -> X // select false, X, Y -> Y if (ConstantInt *CB = dyn_cast(CondVal)) @@ -597,11 +636,10 @@ return 0; } - /// SimplifyGEPInst - Given operands for an GetElementPtrInst, see if we can /// fold the result. If not, this returns null. Value *llvm::SimplifyGEPInst(Value *const *Ops, unsigned NumOps, - const TargetData *TD) { + const TargetData *TD, const DominatorTree *) { // getelementptr P -> P. if (NumOps == 1) return Ops[0]; @@ -631,10 +669,11 @@ /// SimplifyBinOp - Given operands for a BinaryOperator, see if we can /// fold the result. If not, this returns null. static Value *SimplifyBinOp(unsigned Opcode, Value *LHS, Value *RHS, - const TargetData *TD, unsigned MaxRecurse) { + const TargetData *TD, const DominatorTree *DT, + unsigned MaxRecurse) { switch (Opcode) { - case Instruction::And: return SimplifyAndInst(LHS, RHS, TD, MaxRecurse); - case Instruction::Or: return SimplifyOrInst(LHS, RHS, TD, MaxRecurse); + case Instruction::And: return SimplifyAndInst(LHS, RHS, TD, DT, MaxRecurse); + case Instruction::Or: return SimplifyOrInst(LHS, RHS, TD, DT, MaxRecurse); default: if (Constant *CLHS = dyn_cast(LHS)) if (Constant *CRHS = dyn_cast(RHS)) { @@ -645,13 +684,14 @@ // If the operation is with the result of a select instruction, check whether // operating on either branch of the select always yields the same value. if (MaxRecurse && (isa(LHS) || isa(RHS))) - if (Value *V = ThreadBinOpOverSelect(Opcode, LHS, RHS, TD, MaxRecurse-1)) + if (Value *V = ThreadBinOpOverSelect(Opcode, LHS, RHS, TD, DT, + MaxRecurse-1)) return V; // If the operation is with the result of a phi instruction, check whether // operating on all incoming values of the phi always yields the same value. if (MaxRecurse && (isa(LHS) || isa(RHS))) - if (Value *V = ThreadBinOpOverPHI(Opcode, LHS, RHS, TD, MaxRecurse-1)) + if (Value *V = ThreadBinOpOverPHI(Opcode, LHS, RHS, TD, DT, MaxRecurse-1)) return V; return 0; @@ -659,22 +699,23 @@ } Value *llvm::SimplifyBinOp(unsigned Opcode, Value *LHS, Value *RHS, - const TargetData *TD) { - return ::SimplifyBinOp(Opcode, LHS, RHS, TD, MaxRecursionDepth); + const TargetData *TD, const DominatorTree *DT) { + return ::SimplifyBinOp(Opcode, LHS, RHS, TD, DT, RecursionLimit); } /// SimplifyCmpInst - Given operands for a CmpInst, see if we can /// fold the result. static Value *SimplifyCmpInst(unsigned Predicate, Value *LHS, Value *RHS, - const TargetData *TD, unsigned MaxRecurse) { + const TargetData *TD, const DominatorTree *DT, + unsigned MaxRecurse) { if (CmpInst::isIntPredicate((CmpInst::Predicate)Predicate)) - return SimplifyICmpInst(Predicate, LHS, RHS, TD, MaxRecurse); - return SimplifyFCmpInst(Predicate, LHS, RHS, TD, MaxRecurse); + return SimplifyICmpInst(Predicate, LHS, RHS, TD, DT, MaxRecurse); + return SimplifyFCmpInst(Predicate, LHS, RHS, TD, DT, MaxRecurse); } Value *llvm::SimplifyCmpInst(unsigned Predicate, Value *LHS, Value *RHS, - const TargetData *TD) { - return ::SimplifyCmpInst(Predicate, LHS, RHS, TD, MaxRecursionDepth); + const TargetData *TD, const DominatorTree *DT) { + return ::SimplifyCmpInst(Predicate, LHS, RHS, TD, DT, RecursionLimit); } /// SimplifyInstruction - See if we can compute a simplified version of this @@ -687,23 +728,24 @@ case Instruction::Add: return SimplifyAddInst(I->getOperand(0), I->getOperand(1), cast(I)->hasNoSignedWrap(), - cast(I)->hasNoUnsignedWrap(), TD); + cast(I)->hasNoUnsignedWrap(), + TD, DT); case Instruction::And: - return SimplifyAndInst(I->getOperand(0), I->getOperand(1), TD); + return SimplifyAndInst(I->getOperand(0), I->getOperand(1), TD, DT); case Instruction::Or: - return SimplifyOrInst(I->getOperand(0), I->getOperand(1), TD); + return SimplifyOrInst(I->getOperand(0), I->getOperand(1), TD, DT); case Instruction::ICmp: return SimplifyICmpInst(cast(I)->getPredicate(), - I->getOperand(0), I->getOperand(1), TD); + I->getOperand(0), I->getOperand(1), TD, DT); case Instruction::FCmp: return SimplifyFCmpInst(cast(I)->getPredicate(), - I->getOperand(0), I->getOperand(1), TD); + I->getOperand(0), I->getOperand(1), TD, DT); case Instruction::Select: return SimplifySelectInst(I->getOperand(0), I->getOperand(1), - I->getOperand(2), TD); + I->getOperand(2), TD, DT); case Instruction::GetElementPtr: { SmallVector Ops(I->op_begin(), I->op_end()); - return SimplifyGEPInst(&Ops[0], Ops.size(), TD); + return SimplifyGEPInst(&Ops[0], Ops.size(), TD, DT); } case Instruction::PHI: return cast(I)->hasConstantValue(DT); Modified: llvm/trunk/lib/Analysis/PHITransAddr.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/PHITransAddr.cpp?rev=119347&r1=119346&r2=119347&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/PHITransAddr.cpp (original) +++ llvm/trunk/lib/Analysis/PHITransAddr.cpp Tue Nov 16 06:16:38 2010 @@ -217,7 +217,7 @@ return GEP; // Simplify the GEP to handle 'gep x, 0' -> x etc. - if (Value *V = SimplifyGEPInst(&GEPOps[0], GEPOps.size(), TD)) { + if (Value *V = SimplifyGEPInst(&GEPOps[0], GEPOps.size(), TD, DT)) { for (unsigned i = 0, e = GEPOps.size(); i != e; ++i) RemoveInstInputs(GEPOps[i], InstInputs); @@ -273,7 +273,7 @@ } // See if the add simplifies away. - if (Value *Res = SimplifyAddInst(LHS, RHS, isNSW, isNUW, TD)) { + if (Value *Res = SimplifyAddInst(LHS, RHS, isNSW, isNUW, TD, DT)) { // If we simplified the operands, the LHS is no longer an input, but Res // is. RemoveInstInputs(LHS, InstInputs); Modified: llvm/trunk/test/Transforms/InstCombine/phi.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/phi.ll?rev=119347&r1=119346&r2=119347&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/phi.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/phi.ll Tue Nov 16 06:16:38 2010 @@ -488,3 +488,18 @@ ; CHECK: @test21 ; CHECK: ret i1 false } + +define void @test22() { +; CHECK: @test22 +entry: + br label %loop +loop: + %phi = phi i32 [ 0, %entry ], [ %y, %loop ] + %y = add i32 %phi, 1 + %o = or i32 %y, %phi + %e = icmp eq i32 %o, %y + br i1 %e, label %loop, label %ret +; CHECK: br i1 %e +ret: + ret void +} From baldrick at free.fr Tue Nov 16 06:21:34 2010 From: baldrick at free.fr (Duncan Sands) Date: Tue, 16 Nov 2010 13:21:34 +0100 Subject: [llvm-commits] r119002 breaks snow.c from FFmpeg In-Reply-To: References: <4CE0F75E.9030701@free.fr> Message-ID: <4CE2774E.9010102@free.fr> Hi ?smail, this should be fixed in commit 119347, please confirm. Best wishes, Duncan. > According to > http://fate.ffmpeg.org/x86_64-apple-darwin10-clang/20101114104032 clang has > regressed wrt. ffmpeg regtesting. A quick search showed that r119002 broke > snow.c . I attached preprocessed source code for snow.c. Here is the > difference > between working & non-working snow.c assemblies : > > > sorry about that. Can you please attach complete assembler before and after, > and also let me know what compile options were passed to clang. > > > Problem only reproduces with -O1 and later, attached is two files: > > snow-working.s > snow-broken.s From daniel at zuster.org Tue Nov 16 10:03:30 2010 From: daniel at zuster.org (Daniel Dunbar) Date: Tue, 16 Nov 2010 16:03:30 -0000 Subject: [llvm-commits] [test-suite] r119350 - /test-suite/trunk/SingleSource/UnitTests/black-copied-in-cxxobj.reference_output Message-ID: <20101116160330.31FF52A6C12C@llvm.org> Author: ddunbar Date: Tue Nov 16 10:03:30 2010 New Revision: 119350 URL: http://llvm.org/viewvc/llvm-project?rev=119350&view=rev Log: Add a reference output. Added: test-suite/trunk/SingleSource/UnitTests/black-copied-in-cxxobj.reference_output Added: test-suite/trunk/SingleSource/UnitTests/black-copied-in-cxxobj.reference_output URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/black-copied-in-cxxobj.reference_output?rev=119350&view=auto ============================================================================== --- test-suite/trunk/SingleSource/UnitTests/black-copied-in-cxxobj.reference_output (added) +++ test-suite/trunk/SingleSource/UnitTests/black-copied-in-cxxobj.reference_output Tue Nov 16 10:03:30 2010 @@ -0,0 +1 @@ +exit 0 From ismail at namtrac.org Tue Nov 16 11:16:25 2010 From: ismail at namtrac.org (=?UTF-8?B?xLBzbWFpbCBEw7ZubWV6?=) Date: Tue, 16 Nov 2010 19:16:25 +0200 Subject: [llvm-commits] r119002 breaks snow.c from FFmpeg In-Reply-To: <4CE2774E.9010102@free.fr> References: <4CE0F75E.9030701@free.fr> <4CE2774E.9010102@free.fr> Message-ID: Hi; On Tue, Nov 16, 2010 at 2:21 PM, Duncan Sands wrote: > Hi ?smail, this should be fixed in commit 119347, please confirm. This is indeed fixed, thank you! Regards, ismail From gohman at apple.com Tue Nov 16 11:26:17 2010 From: gohman at apple.com (Dan Gohman) Date: Tue, 16 Nov 2010 09:26:17 -0800 Subject: [llvm-commits] [PATCH] System: Move system_error from KillTheDoctor. In-Reply-To: References: <1289895429-23671-1-git-send-email-bigcheesegs@gmail.com> Message-ID: On Nov 16, 2010, at 12:25 AM, Michael Spencer wrote: > This is the first step in adding sane error handling support to LLVMSystem. > > The system API's will be shifted over to returning an error_code, and returning > other return values as out parameters to the function. What purpose does all the error_category code have here? It looks like, ultimately, all that's really going on here is an enum and a mapping from enum values to strings. > > Code that needs to check error conditions will use the errc enum values which > are the same as the posix_errno defines (EBADF, E2BIG, etc...), and > are compatable > with the error codes in WinError.h due to some magic in system_error. > > An example would be: > > if ((error_code ec = KillEvil("Java")) != errc::success) { > if (ec == kill_error::too_much_evil) > std::terminate(); > errs() << ":O There was an error! " << ec.message(); > } How is this better than: if ((errc ec = KillEvil("Java")) != errc::success) { if (ec == kill_error::too_much_evil) std::terminate(); errs() << ":O There was an error! " << sys::StrError(ec)) } ? Dan From gohman at apple.com Tue Nov 16 11:28:22 2010 From: gohman at apple.com (Dan Gohman) Date: Tue, 16 Nov 2010 17:28:22 -0000 Subject: [llvm-commits] [llvm] r119351 - in /llvm/trunk: docs/tutorial/LangImpl4.html docs/tutorial/LangImpl5.html docs/tutorial/LangImpl6.html docs/tutorial/LangImpl7.html examples/Kaleidoscope/Chapter4/toy.cpp examples/Kaleidoscope/Chapter5/toy.cpp examples/Kaleidoscope/Chapter6/toy.cpp examples/Kaleidoscope/Chapter7/toy.cpp Message-ID: <20101116172822.5FDB92A6C12C@llvm.org> Author: djg Date: Tue Nov 16 11:28:22 2010 New Revision: 119351 URL: http://llvm.org/viewvc/llvm-project?rev=119351&view=rev Log: Fix missing includes of "llvm/Analysis/Passes.h" in the tutorials. Thanks for Arnaud Allard de Grandmaison for preparing a patch. Modified: llvm/trunk/docs/tutorial/LangImpl4.html llvm/trunk/docs/tutorial/LangImpl5.html llvm/trunk/docs/tutorial/LangImpl6.html llvm/trunk/docs/tutorial/LangImpl7.html llvm/trunk/examples/Kaleidoscope/Chapter4/toy.cpp llvm/trunk/examples/Kaleidoscope/Chapter5/toy.cpp llvm/trunk/examples/Kaleidoscope/Chapter6/toy.cpp llvm/trunk/examples/Kaleidoscope/Chapter7/toy.cpp Modified: llvm/trunk/docs/tutorial/LangImpl4.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/tutorial/LangImpl4.html?rev=119351&r1=119350&r2=119351&view=diff ============================================================================== --- llvm/trunk/docs/tutorial/LangImpl4.html (original) +++ llvm/trunk/docs/tutorial/LangImpl4.html Tue Nov 16 11:28:22 2010 @@ -509,6 +509,7 @@ #include "llvm/Module.h" #include "llvm/PassManager.h" #include "llvm/Analysis/Verifier.h" +#include "llvm/Analysis/Passes.h" #include "llvm/Target/TargetData.h" #include "llvm/Target/TargetSelect.h" #include "llvm/Transforms/Scalar.h" Modified: llvm/trunk/docs/tutorial/LangImpl5.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/tutorial/LangImpl5.html?rev=119351&r1=119350&r2=119351&view=diff ============================================================================== --- llvm/trunk/docs/tutorial/LangImpl5.html (original) +++ llvm/trunk/docs/tutorial/LangImpl5.html Tue Nov 16 11:28:22 2010 @@ -907,6 +907,7 @@ #include "llvm/Module.h" #include "llvm/PassManager.h" #include "llvm/Analysis/Verifier.h" +#include "llvm/Analysis/Passes.h" #include "llvm/Target/TargetData.h" #include "llvm/Target/TargetSelect.h" #include "llvm/Transforms/Scalar.h" Modified: llvm/trunk/docs/tutorial/LangImpl6.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/tutorial/LangImpl6.html?rev=119351&r1=119350&r2=119351&view=diff ============================================================================== --- llvm/trunk/docs/tutorial/LangImpl6.html (original) +++ llvm/trunk/docs/tutorial/LangImpl6.html Tue Nov 16 11:28:22 2010 @@ -826,6 +826,7 @@ #include "llvm/Module.h" #include "llvm/PassManager.h" #include "llvm/Analysis/Verifier.h" +#include "llvm/Analysis/Passes.h" #include "llvm/Target/TargetData.h" #include "llvm/Target/TargetSelect.h" #include "llvm/Transforms/Scalar.h" Modified: llvm/trunk/docs/tutorial/LangImpl7.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/tutorial/LangImpl7.html?rev=119351&r1=119350&r2=119351&view=diff ============================================================================== --- llvm/trunk/docs/tutorial/LangImpl7.html (original) +++ llvm/trunk/docs/tutorial/LangImpl7.html Tue Nov 16 11:28:22 2010 @@ -1009,6 +1009,7 @@ #include "llvm/Module.h" #include "llvm/PassManager.h" #include "llvm/Analysis/Verifier.h" +#include "llvm/Analysis/Passes.h" #include "llvm/Target/TargetData.h" #include "llvm/Target/TargetSelect.h" #include "llvm/Transforms/Scalar.h" Modified: llvm/trunk/examples/Kaleidoscope/Chapter4/toy.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/examples/Kaleidoscope/Chapter4/toy.cpp?rev=119351&r1=119350&r2=119351&view=diff ============================================================================== --- llvm/trunk/examples/Kaleidoscope/Chapter4/toy.cpp (original) +++ llvm/trunk/examples/Kaleidoscope/Chapter4/toy.cpp Tue Nov 16 11:28:22 2010 @@ -5,6 +5,7 @@ #include "llvm/Module.h" #include "llvm/PassManager.h" #include "llvm/Analysis/Verifier.h" +#include "llvm/Analysis/Passes.h" #include "llvm/Target/TargetData.h" #include "llvm/Target/TargetSelect.h" #include "llvm/Transforms/Scalar.h" Modified: llvm/trunk/examples/Kaleidoscope/Chapter5/toy.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/examples/Kaleidoscope/Chapter5/toy.cpp?rev=119351&r1=119350&r2=119351&view=diff ============================================================================== --- llvm/trunk/examples/Kaleidoscope/Chapter5/toy.cpp (original) +++ llvm/trunk/examples/Kaleidoscope/Chapter5/toy.cpp Tue Nov 16 11:28:22 2010 @@ -5,6 +5,7 @@ #include "llvm/Module.h" #include "llvm/PassManager.h" #include "llvm/Analysis/Verifier.h" +#include "llvm/Analysis/Passes.h" #include "llvm/Target/TargetData.h" #include "llvm/Target/TargetSelect.h" #include "llvm/Transforms/Scalar.h" Modified: llvm/trunk/examples/Kaleidoscope/Chapter6/toy.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/examples/Kaleidoscope/Chapter6/toy.cpp?rev=119351&r1=119350&r2=119351&view=diff ============================================================================== --- llvm/trunk/examples/Kaleidoscope/Chapter6/toy.cpp (original) +++ llvm/trunk/examples/Kaleidoscope/Chapter6/toy.cpp Tue Nov 16 11:28:22 2010 @@ -5,6 +5,7 @@ #include "llvm/Module.h" #include "llvm/PassManager.h" #include "llvm/Analysis/Verifier.h" +#include "llvm/Analysis/Passes.h" #include "llvm/Target/TargetData.h" #include "llvm/Target/TargetSelect.h" #include "llvm/Transforms/Scalar.h" Modified: llvm/trunk/examples/Kaleidoscope/Chapter7/toy.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/examples/Kaleidoscope/Chapter7/toy.cpp?rev=119351&r1=119350&r2=119351&view=diff ============================================================================== --- llvm/trunk/examples/Kaleidoscope/Chapter7/toy.cpp (original) +++ llvm/trunk/examples/Kaleidoscope/Chapter7/toy.cpp Tue Nov 16 11:28:22 2010 @@ -5,6 +5,7 @@ #include "llvm/Module.h" #include "llvm/PassManager.h" #include "llvm/Analysis/Verifier.h" +#include "llvm/Analysis/Passes.h" #include "llvm/Target/TargetData.h" #include "llvm/Target/TargetSelect.h" #include "llvm/Transforms/Scalar.h" From baldrick at free.fr Tue Nov 16 11:41:24 2010 From: baldrick at free.fr (Duncan Sands) Date: Tue, 16 Nov 2010 17:41:24 -0000 Subject: [llvm-commits] [llvm] r119352 - in /llvm/trunk/lib/Transforms: Scalar/CorrelatedValuePropagation.cpp Scalar/TailRecursionElimination.cpp Utils/LoopSimplify.cpp Utils/PromoteMemoryToRegister.cpp Utils/SSAUpdater.cpp Message-ID: <20101116174124.72F902A6C12C@llvm.org> Author: baldrick Date: Tue Nov 16 11:41:24 2010 New Revision: 119352 URL: http://llvm.org/viewvc/llvm-project?rev=119352&view=rev Log: Have a few places that want to simplify phi nodes use SimplifyInstruction rather than calling hasConstantValue. No intended functionality change. Modified: llvm/trunk/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp llvm/trunk/lib/Transforms/Scalar/TailRecursionElimination.cpp llvm/trunk/lib/Transforms/Utils/LoopSimplify.cpp llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp llvm/trunk/lib/Transforms/Utils/SSAUpdater.cpp Modified: llvm/trunk/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp?rev=119352&r1=119351&r2=119352&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp Tue Nov 16 11:41:24 2010 @@ -16,6 +16,7 @@ #include "llvm/Function.h" #include "llvm/Instructions.h" #include "llvm/Pass.h" +#include "llvm/Analysis/InstructionSimplify.h" #include "llvm/Analysis/LazyValueInfo.h" #include "llvm/Support/CFG.h" #include "llvm/Transforms/Utils/Local.h" @@ -96,13 +97,13 @@ P->setIncomingValue(i, C); Changed = true; } - - if (Value *ConstVal = P->hasConstantValue()) { - P->replaceAllUsesWith(ConstVal); + + if (Value *V = SimplifyInstruction(P)) { + P->replaceAllUsesWith(V); P->eraseFromParent(); Changed = true; } - + ++NumPhis; return Changed; Modified: llvm/trunk/lib/Transforms/Scalar/TailRecursionElimination.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/TailRecursionElimination.cpp?rev=119352&r1=119351&r2=119352&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/TailRecursionElimination.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/TailRecursionElimination.cpp Tue Nov 16 11:41:24 2010 @@ -60,6 +60,7 @@ #include "llvm/Pass.h" #include "llvm/Analysis/CaptureTracking.h" #include "llvm/Analysis/InlineCost.h" +#include "llvm/Analysis/InstructionSimplify.h" #include "llvm/Analysis/Loads.h" #include "llvm/Support/CallSite.h" #include "llvm/Support/CFG.h" @@ -177,7 +178,7 @@ PHINode *PN = ArgumentPHIs[i]; // If the PHI Node is a dynamic constant, replace it with the value it is. - if (Value *PNV = PN->hasConstantValue()) { + if (Value *PNV = SimplifyInstruction(PN)) { PN->replaceAllUsesWith(PNV); PN->eraseFromParent(); } Modified: llvm/trunk/lib/Transforms/Utils/LoopSimplify.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/LoopSimplify.cpp?rev=119352&r1=119351&r2=119352&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/LoopSimplify.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/LoopSimplify.cpp Tue Nov 16 11:41:24 2010 @@ -46,9 +46,10 @@ #include "llvm/LLVMContext.h" #include "llvm/Type.h" #include "llvm/Analysis/AliasAnalysis.h" -#include "llvm/Analysis/ScalarEvolution.h" #include "llvm/Analysis/Dominators.h" +#include "llvm/Analysis/InstructionSimplify.h" #include "llvm/Analysis/LoopPass.h" +#include "llvm/Analysis/ScalarEvolution.h" #include "llvm/Transforms/Utils/BasicBlockUtils.h" #include "llvm/Transforms/Utils/Local.h" #include "llvm/Support/CFG.h" @@ -268,7 +269,7 @@ PHINode *PN; for (BasicBlock::iterator I = L->getHeader()->begin(); (PN = dyn_cast(I++)); ) - if (Value *V = PN->hasConstantValue(DT)) { + if (Value *V = SimplifyInstruction(PN, 0, DT)) { if (AA) AA->deleteValue(PN); PN->replaceAllUsesWith(V); PN->eraseFromParent(); @@ -448,7 +449,7 @@ for (BasicBlock::iterator I = L->getHeader()->begin(); isa(I); ) { PHINode *PN = cast(I); ++I; - if (Value *V = PN->hasConstantValue(DT)) { + if (Value *V = SimplifyInstruction(PN, 0, DT)) { // This is a degenerate PHI already, don't modify it! PN->replaceAllUsesWith(V); if (AA) AA->deleteValue(PN); Modified: llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp?rev=119352&r1=119351&r2=119352&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp Tue Nov 16 11:41:24 2010 @@ -24,9 +24,10 @@ #include "llvm/Instructions.h" #include "llvm/IntrinsicInst.h" #include "llvm/Metadata.h" +#include "llvm/Analysis/AliasSetTracker.h" #include "llvm/Analysis/DebugInfo.h" #include "llvm/Analysis/Dominators.h" -#include "llvm/Analysis/AliasSetTracker.h" +#include "llvm/Analysis/InstructionSimplify.h" #include "llvm/ADT/DenseMap.h" #include "llvm/ADT/SmallPtrSet.h" #include "llvm/ADT/SmallVector.h" @@ -509,9 +510,9 @@ for (DenseMap, PHINode*>::iterator I = NewPhiNodes.begin(), E = NewPhiNodes.end(); I != E;) { PHINode *PN = I->second; - + // If this PHI node merges one value and/or undefs, get the value. - if (Value *V = PN->hasConstantValue(&DT)) { + if (Value *V = SimplifyInstruction(PN, 0, &DT)) { if (AST && PN->getType()->isPointerTy()) AST->deleteValue(PN); PN->replaceAllUsesWith(V); Modified: llvm/trunk/lib/Transforms/Utils/SSAUpdater.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/SSAUpdater.cpp?rev=119352&r1=119351&r2=119352&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/SSAUpdater.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/SSAUpdater.cpp Tue Nov 16 11:41:24 2010 @@ -14,6 +14,7 @@ #define DEBUG_TYPE "ssaupdater" #include "llvm/Instructions.h" #include "llvm/ADT/DenseMap.h" +#include "llvm/Analysis/InstructionSimplify.h" #include "llvm/Support/AlignOf.h" #include "llvm/Support/Allocator.h" #include "llvm/Support/CFG.h" @@ -178,9 +179,9 @@ // See if the PHI node can be merged to a single value. This can happen in // loop cases when we get a PHI of itself and one other value. - if (Value *ConstVal = InsertedPHI->hasConstantValue()) { + if (Value *V = SimplifyInstruction(InsertedPHI)) { InsertedPHI->eraseFromParent(); - return ConstVal; + return V; } // If the client wants to know about all new instructions, tell it. From bigcheesegs at gmail.com Tue Nov 16 12:05:34 2010 From: bigcheesegs at gmail.com (Michael Spencer) Date: Tue, 16 Nov 2010 13:05:34 -0500 Subject: [llvm-commits] [PATCH] System: Move system_error from KillTheDoctor. In-Reply-To: References: <1289895429-23671-1-git-send-email-bigcheesegs@gmail.com> Message-ID: On Tue, Nov 16, 2010 at 12:26 PM, Dan Gohman wrote: > > On Nov 16, 2010, at 12:25 AM, Michael Spencer wrote: > >> This is the first step in adding sane error handling support to LLVMSystem. >> >> The system API's will be shifted over to returning an error_code, and returning >> other return values as out parameters to the function. > > What purpose does all the error_category code have here? It looks like, > ultimately, all that's really going on here is an enum and a mapping from > enum values to strings. error_category is the magic that allows the Windows error codes to be compared with the standard posix error conditions. It also will allow other libraries to define their own error codes without worrying about conflicting with the posix errors. http://blog.think-async.com/2010/04/system-error-support-in-c0x-part-1.html is a blog series that explains the design decisions behind it. >> >> Code that needs to check error conditions will use the errc enum values which >> are the same as the posix_errno defines (EBADF, E2BIG, etc...), and >> are compatable >> with the error codes in WinError.h due to some magic in system_error. >> >> An example would be: >> >> if ((error_code ec = KillEvil("Java")) != errc::success) { >> ?if (ec == kill_error::too_much_evil) >> ? ?std::terminate(); >> ?errs() << ":O There was an error! " << ec.message(); >> } > > How is this better than: > > if ((errc ec = KillEvil("Java")) != errc::success) { > ?if (ec == kill_error::too_much_evil) > ? std::terminate(); > ?errs() << ":O There was an error! " << sys::StrError(ec)) > } > > ? > > Dan The above is incorrect because KillEvil returns a kill_error, not a posix error condition (errc). There could be multiple kill_error values that indicate success, and sys::StrError doesn't know how to convert any of the values to strings. - Michael Spencer From clattner at apple.com Tue Nov 16 12:13:11 2010 From: clattner at apple.com (Chris Lattner) Date: Tue, 16 Nov 2010 10:13:11 -0800 Subject: [llvm-commits] [PATCH] System: Move system_error from KillTheDoctor. In-Reply-To: References: <1289895429-23671-1-git-send-email-bigcheesegs@gmail.com> Message-ID: On Nov 16, 2010, at 12:25 AM, Michael Spencer wrote: > This is the first step in adding sane error handling support to LLVMSystem. > > The system API's will be shifted over to returning an error_code, and returning > other return values as out parameters to the function. Looks great to me, except: +++ b/lib/System/Unix/system_error.inc @@ -0,0 +1,34 @@ +//===- llvm/System/Unix/system_error.cpp - Unix error_code ------*- C++ -*-===// Please be careful with file header comments (.cpp -> .inc). > Code that needs to check error conditions will use the errc enum values which > are the same as the posix_errno defines (EBADF, E2BIG, etc...), and > are compatable > with the error codes in WinError.h due to some magic in system_error. > > An example would be: > > if ((error_code ec = KillEvil("Java")) != errc::success) { > if (ec == kill_error::too_much_evil) > std::terminate(); > errs() << ":O There was an error! " << ec.message(); > } Why not just: if (error_code ec = KillEvil("Java")) { handle_error(ec); } I thought that error_code is convertible to bool? -Chris From grosbach at apple.com Tue Nov 16 12:13:42 2010 From: grosbach at apple.com (Jim Grosbach) Date: Tue, 16 Nov 2010 18:13:42 -0000 Subject: [llvm-commits] [llvm] r119354 - in /llvm/trunk: cmake/modules/LLVMLibDeps.cmake lib/Target/ARM/ARMInstrInfo.td Message-ID: <20101116181343.061DB2A6C12C@llvm.org> Author: grosbach Date: Tue Nov 16 12:13:42 2010 New Revision: 119354 URL: http://llvm.org/viewvc/llvm-project?rev=119354&view=rev Log: ARM conditional mov encoding fix. Modified: llvm/trunk/cmake/modules/LLVMLibDeps.cmake llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Modified: llvm/trunk/cmake/modules/LLVMLibDeps.cmake URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/cmake/modules/LLVMLibDeps.cmake?rev=119354&r1=119353&r2=119354&view=diff ============================================================================== --- llvm/trunk/cmake/modules/LLVMLibDeps.cmake (original) +++ llvm/trunk/cmake/modules/LLVMLibDeps.cmake Tue Nov 16 12:13:42 2010 @@ -1,28 +1,28 @@ -set(MSVC_LIB_DEPS_LLVMARMAsmParser LLVMARMInfo LLVMMC LLVMMCParser LLVMSupport LLVMTarget) -set(MSVC_LIB_DEPS_LLVMARMAsmPrinter LLVMMC LLVMSupport) +set(MSVC_LIB_DEPS_LLVMARMAsmParser LLVMARMInfo LLVMMC LLVMMCParser LLVMSupport LLVMSystem LLVMTarget) +set(MSVC_LIB_DEPS_LLVMARMAsmPrinter LLVMMC LLVMSupport LLVMSystem) set(MSVC_LIB_DEPS_LLVMARMCodeGen LLVMARMAsmPrinter LLVMARMInfo LLVMAnalysis LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) -set(MSVC_LIB_DEPS_LLVMARMDisassembler LLVMARMCodeGen LLVMARMInfo LLVMMC LLVMSupport) +set(MSVC_LIB_DEPS_LLVMARMDisassembler LLVMARMCodeGen LLVMARMInfo LLVMMC LLVMSupport LLVMSystem) set(MSVC_LIB_DEPS_LLVMARMInfo LLVMMC LLVMSupport) -set(MSVC_LIB_DEPS_LLVMAlphaAsmPrinter LLVMAlphaInfo LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMTarget) +set(MSVC_LIB_DEPS_LLVMAlphaAsmPrinter LLVMAlphaInfo LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMTarget) set(MSVC_LIB_DEPS_LLVMAlphaCodeGen LLVMAlphaInfo LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) set(MSVC_LIB_DEPS_LLVMAlphaInfo LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMAnalysis LLVMCore LLVMSupport LLVMSystem LLVMTarget) set(MSVC_LIB_DEPS_LLVMArchive LLVMBitReader LLVMCore LLVMSupport LLVMSystem) -set(MSVC_LIB_DEPS_LLVMAsmParser LLVMCore LLVMSupport) +set(MSVC_LIB_DEPS_LLVMAsmParser LLVMCore LLVMSupport LLVMSystem) set(MSVC_LIB_DEPS_LLVMAsmPrinter LLVMAnalysis LLVMCodeGen LLVMCore LLVMMC LLVMMCParser LLVMSupport LLVMSystem LLVMTarget) -set(MSVC_LIB_DEPS_LLVMBitReader LLVMCore LLVMSupport) -set(MSVC_LIB_DEPS_LLVMBitWriter LLVMCore LLVMSupport) -set(MSVC_LIB_DEPS_LLVMBlackfinAsmPrinter LLVMAsmPrinter LLVMBlackfinInfo LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMTarget) -set(MSVC_LIB_DEPS_LLVMBlackfinCodeGen LLVMAsmPrinter LLVMBlackfinInfo LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMTarget) +set(MSVC_LIB_DEPS_LLVMBitReader LLVMCore LLVMSupport LLVMSystem) +set(MSVC_LIB_DEPS_LLVMBitWriter LLVMCore LLVMSupport LLVMSystem) +set(MSVC_LIB_DEPS_LLVMBlackfinAsmPrinter LLVMAsmPrinter LLVMBlackfinInfo LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMTarget) +set(MSVC_LIB_DEPS_LLVMBlackfinCodeGen LLVMAsmPrinter LLVMBlackfinInfo LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) set(MSVC_LIB_DEPS_LLVMBlackfinInfo LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMCBackend LLVMAnalysis LLVMCBackendInfo LLVMCodeGen LLVMCore LLVMMC LLVMScalarOpts LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils LLVMipa) set(MSVC_LIB_DEPS_LLVMCBackendInfo LLVMMC LLVMSupport) -set(MSVC_LIB_DEPS_LLVMCellSPUAsmPrinter LLVMAsmPrinter LLVMCellSPUInfo LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMTarget) -set(MSVC_LIB_DEPS_LLVMCellSPUCodeGen LLVMAsmPrinter LLVMCellSPUInfo LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMTarget) +set(MSVC_LIB_DEPS_LLVMCellSPUAsmPrinter LLVMAsmPrinter LLVMCellSPUInfo LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMTarget) +set(MSVC_LIB_DEPS_LLVMCellSPUCodeGen LLVMAsmPrinter LLVMCellSPUInfo LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) set(MSVC_LIB_DEPS_LLVMCellSPUInfo LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMCodeGen LLVMAnalysis LLVMCore LLVMMC LLVMScalarOpts LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils) set(MSVC_LIB_DEPS_LLVMCore LLVMSupport LLVMSystem) -set(MSVC_LIB_DEPS_LLVMCppBackend LLVMCore LLVMCppBackendInfo LLVMSupport LLVMTarget) +set(MSVC_LIB_DEPS_LLVMCppBackend LLVMCore LLVMCppBackendInfo LLVMSupport LLVMSystem LLVMTarget) set(MSVC_LIB_DEPS_LLVMCppBackendInfo LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMExecutionEngine LLVMCore LLVMSupport LLVMSystem LLVMTarget) set(MSVC_LIB_DEPS_LLVMInstCombine LLVMAnalysis LLVMCore LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils) @@ -30,45 +30,46 @@ set(MSVC_LIB_DEPS_LLVMInterpreter LLVMCodeGen LLVMCore LLVMExecutionEngine LLVMSupport LLVMSystem LLVMTarget) set(MSVC_LIB_DEPS_LLVMJIT LLVMCodeGen LLVMCore LLVMExecutionEngine LLVMMC LLVMSupport LLVMSystem LLVMTarget) set(MSVC_LIB_DEPS_LLVMLinker LLVMArchive LLVMBitReader LLVMCore LLVMSupport LLVMSystem LLVMTransformUtils) -set(MSVC_LIB_DEPS_LLVMMBlazeAsmParser LLVMMBlazeCodeGen LLVMMBlazeInfo LLVMMC LLVMMCParser LLVMSupport LLVMTarget) -set(MSVC_LIB_DEPS_LLVMMBlazeAsmPrinter LLVMMC LLVMSupport) +set(MSVC_LIB_DEPS_LLVMMBlazeAsmParser LLVMMBlazeCodeGen LLVMMBlazeInfo LLVMMC LLVMMCParser LLVMSupport LLVMSystem LLVMTarget) +set(MSVC_LIB_DEPS_LLVMMBlazeAsmPrinter LLVMMC LLVMSupport LLVMSystem) set(MSVC_LIB_DEPS_LLVMMBlazeCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMBlazeAsmPrinter LLVMMBlazeInfo LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) set(MSVC_LIB_DEPS_LLVMMBlazeDisassembler LLVMMBlazeCodeGen LLVMMBlazeInfo LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMMBlazeInfo LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMMC LLVMSupport LLVMSystem) set(MSVC_LIB_DEPS_LLVMMCDisassembler LLVMARMAsmParser LLVMARMCodeGen LLVMARMDisassembler LLVMARMInfo LLVMAlphaCodeGen LLVMAlphaInfo LLVMBlackfinCodeGen LLVMBlackfinInfo LLVMCBackend LLVMCBackendInfo LLVMCellSPUCodeGen LLVMCellSPUInfo LLVMCppBackend LLVMCppBackendInfo LLVMMBlazeAsmParser LLVMMBlazeCodeGen LLVMMBlazeDisassembler LLVMMBlazeInfo LLVMMC LLVMMCParser LLVMMSP430CodeGen LLVMMSP430Info LLVMMipsCodeGen LLVMMipsInfo LLVMPTXCodeGen LLVMPTXInfo LLVMPowerPCCodeGen LLVMPowerPCInfo LLVMSparcCodeGen LLVMSparcInfo LLVMSupport LLVMSystem LLVMSystemZCodeGen LLVMSystemZInfo LLVMX86AsmParser LLVMX86CodeGen LLVMX86Disassembler LLVMX86Info LLVMXCoreCodeGen LLVMXCoreInfo) -set(MSVC_LIB_DEPS_LLVMMCParser LLVMMC LLVMSupport) -set(MSVC_LIB_DEPS_LLVMMSP430AsmPrinter LLVMMC LLVMSupport) +set(MSVC_LIB_DEPS_LLVMMCParser LLVMMC LLVMSupport LLVMSystem) +set(MSVC_LIB_DEPS_LLVMMSP430AsmPrinter LLVMMC LLVMSupport LLVMSystem) set(MSVC_LIB_DEPS_LLVMMSP430CodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMMSP430AsmPrinter LLVMMSP430Info LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) set(MSVC_LIB_DEPS_LLVMMSP430Info LLVMMC LLVMSupport) -set(MSVC_LIB_DEPS_LLVMMipsAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMMipsCodeGen LLVMMipsInfo LLVMSupport LLVMTarget) +set(MSVC_LIB_DEPS_LLVMMipsAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMMipsCodeGen LLVMMipsInfo LLVMSupport LLVMSystem LLVMTarget) set(MSVC_LIB_DEPS_LLVMMipsCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMMipsInfo LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) set(MSVC_LIB_DEPS_LLVMMipsInfo LLVMMC LLVMSupport) -set(MSVC_LIB_DEPS_LLVMPTXAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMPTXInfo LLVMSupport) -set(MSVC_LIB_DEPS_LLVMPTXCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMPTXInfo LLVMSelectionDAG LLVMSupport LLVMTarget) +set(MSVC_LIB_DEPS_LLVMObject LLVMSupport LLVMSystem) +set(MSVC_LIB_DEPS_LLVMPTXAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMPTXInfo LLVMSupport LLVMSystem) +set(MSVC_LIB_DEPS_LLVMPTXCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMPTXInfo LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) set(MSVC_LIB_DEPS_LLVMPTXInfo LLVMMC LLVMSupport) -set(MSVC_LIB_DEPS_LLVMPowerPCAsmPrinter LLVMMC LLVMSupport) +set(MSVC_LIB_DEPS_LLVMPowerPCAsmPrinter LLVMMC LLVMSupport LLVMSystem) set(MSVC_LIB_DEPS_LLVMPowerPCCodeGen LLVMAnalysis LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMPowerPCAsmPrinter LLVMPowerPCInfo LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) set(MSVC_LIB_DEPS_LLVMPowerPCInfo LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMScalarOpts LLVMAnalysis LLVMCore LLVMInstCombine LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils) set(MSVC_LIB_DEPS_LLVMSelectionDAG LLVMAnalysis LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMTarget) -set(MSVC_LIB_DEPS_LLVMSparcAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSparcInfo LLVMSupport LLVMTarget) +set(MSVC_LIB_DEPS_LLVMSparcAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSparcInfo LLVMSupport LLVMSystem LLVMTarget) set(MSVC_LIB_DEPS_LLVMSparcCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSparcInfo LLVMSupport LLVMSystem LLVMTarget) set(MSVC_LIB_DEPS_LLVMSparcInfo LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMSupport LLVMSystem) set(MSVC_LIB_DEPS_LLVMSystem ) -set(MSVC_LIB_DEPS_LLVMSystemZAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystemZInfo LLVMTarget) -set(MSVC_LIB_DEPS_LLVMSystemZCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystemZInfo LLVMTarget) +set(MSVC_LIB_DEPS_LLVMSystemZAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMSystemZInfo LLVMTarget) +set(MSVC_LIB_DEPS_LLVMSystemZCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMSystemZInfo LLVMTarget) set(MSVC_LIB_DEPS_LLVMSystemZInfo LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMTarget LLVMCore LLVMMC LLVMSupport LLVMSystem) set(MSVC_LIB_DEPS_LLVMTransformUtils LLVMAnalysis LLVMCore LLVMSupport LLVMSystem LLVMTarget LLVMipa) -set(MSVC_LIB_DEPS_LLVMX86AsmParser LLVMMC LLVMMCParser LLVMSupport LLVMTarget LLVMX86Info) -set(MSVC_LIB_DEPS_LLVMX86AsmPrinter LLVMMC LLVMSupport) +set(MSVC_LIB_DEPS_LLVMX86AsmParser LLVMMC LLVMMCParser LLVMSupport LLVMSystem LLVMTarget LLVMX86Info) +set(MSVC_LIB_DEPS_LLVMX86AsmPrinter LLVMMC LLVMSupport LLVMSystem) set(MSVC_LIB_DEPS_LLVMX86CodeGen LLVMAnalysis LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget LLVMX86AsmPrinter LLVMX86Info) set(MSVC_LIB_DEPS_LLVMX86Disassembler LLVMMC LLVMSupport LLVMX86Info) set(MSVC_LIB_DEPS_LLVMX86Info LLVMMC LLVMSupport) -set(MSVC_LIB_DEPS_LLVMXCoreAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMTarget LLVMXCoreInfo) -set(MSVC_LIB_DEPS_LLVMXCoreCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMTarget LLVMXCoreInfo) +set(MSVC_LIB_DEPS_LLVMXCoreAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMTarget LLVMXCoreInfo) +set(MSVC_LIB_DEPS_LLVMXCoreCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget LLVMXCoreInfo) set(MSVC_LIB_DEPS_LLVMXCoreInfo LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMipa LLVMAnalysis LLVMCore LLVMSupport LLVMSystem) set(MSVC_LIB_DEPS_LLVMipo LLVMAnalysis LLVMCore LLVMScalarOpts LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils LLVMipa) Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=119354&r1=119353&r2=119354&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Tue Nov 16 12:13:42 2010 @@ -3008,11 +3008,10 @@ [/*(set GPR:$Rd, (ARMcmov GPR:$false, so_reg:$shift, imm:$cc, CCR:$ccr))*/]>, RegConstraint<"$false = $Rd">, UnaryDP { bits<4> Rd; - bits<4> Rn; bits<12> shift; let Inst{25} = 0; let Inst{20} = 0; - let Inst{19-16} = Rn; + let Inst{19-16} = 0; let Inst{15-12} = Rd; let Inst{11-0} = shift; } From grosbach at apple.com Tue Nov 16 12:14:41 2010 From: grosbach at apple.com (Jim Grosbach) Date: Tue, 16 Nov 2010 18:14:41 -0000 Subject: [llvm-commits] [llvm] r119355 - /llvm/trunk/cmake/modules/LLVMLibDeps.cmake Message-ID: <20101116181441.9EF092A6C12C@llvm.org> Author: grosbach Date: Tue Nov 16 12:14:41 2010 New Revision: 119355 URL: http://llvm.org/viewvc/llvm-project?rev=119355&view=rev Log: Revert inadvertant checkin of CMake libdeps. Modified: llvm/trunk/cmake/modules/LLVMLibDeps.cmake Modified: llvm/trunk/cmake/modules/LLVMLibDeps.cmake URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/cmake/modules/LLVMLibDeps.cmake?rev=119355&r1=119354&r2=119355&view=diff ============================================================================== --- llvm/trunk/cmake/modules/LLVMLibDeps.cmake (original) +++ llvm/trunk/cmake/modules/LLVMLibDeps.cmake Tue Nov 16 12:14:41 2010 @@ -1,28 +1,28 @@ -set(MSVC_LIB_DEPS_LLVMARMAsmParser LLVMARMInfo LLVMMC LLVMMCParser LLVMSupport LLVMSystem LLVMTarget) -set(MSVC_LIB_DEPS_LLVMARMAsmPrinter LLVMMC LLVMSupport LLVMSystem) +set(MSVC_LIB_DEPS_LLVMARMAsmParser LLVMARMInfo LLVMMC LLVMMCParser LLVMSupport LLVMTarget) +set(MSVC_LIB_DEPS_LLVMARMAsmPrinter LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMARMCodeGen LLVMARMAsmPrinter LLVMARMInfo LLVMAnalysis LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) -set(MSVC_LIB_DEPS_LLVMARMDisassembler LLVMARMCodeGen LLVMARMInfo LLVMMC LLVMSupport LLVMSystem) +set(MSVC_LIB_DEPS_LLVMARMDisassembler LLVMARMCodeGen LLVMARMInfo LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMARMInfo LLVMMC LLVMSupport) -set(MSVC_LIB_DEPS_LLVMAlphaAsmPrinter LLVMAlphaInfo LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMTarget) +set(MSVC_LIB_DEPS_LLVMAlphaAsmPrinter LLVMAlphaInfo LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMTarget) set(MSVC_LIB_DEPS_LLVMAlphaCodeGen LLVMAlphaInfo LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) set(MSVC_LIB_DEPS_LLVMAlphaInfo LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMAnalysis LLVMCore LLVMSupport LLVMSystem LLVMTarget) set(MSVC_LIB_DEPS_LLVMArchive LLVMBitReader LLVMCore LLVMSupport LLVMSystem) -set(MSVC_LIB_DEPS_LLVMAsmParser LLVMCore LLVMSupport LLVMSystem) +set(MSVC_LIB_DEPS_LLVMAsmParser LLVMCore LLVMSupport) set(MSVC_LIB_DEPS_LLVMAsmPrinter LLVMAnalysis LLVMCodeGen LLVMCore LLVMMC LLVMMCParser LLVMSupport LLVMSystem LLVMTarget) -set(MSVC_LIB_DEPS_LLVMBitReader LLVMCore LLVMSupport LLVMSystem) -set(MSVC_LIB_DEPS_LLVMBitWriter LLVMCore LLVMSupport LLVMSystem) -set(MSVC_LIB_DEPS_LLVMBlackfinAsmPrinter LLVMAsmPrinter LLVMBlackfinInfo LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMTarget) -set(MSVC_LIB_DEPS_LLVMBlackfinCodeGen LLVMAsmPrinter LLVMBlackfinInfo LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) +set(MSVC_LIB_DEPS_LLVMBitReader LLVMCore LLVMSupport) +set(MSVC_LIB_DEPS_LLVMBitWriter LLVMCore LLVMSupport) +set(MSVC_LIB_DEPS_LLVMBlackfinAsmPrinter LLVMAsmPrinter LLVMBlackfinInfo LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMTarget) +set(MSVC_LIB_DEPS_LLVMBlackfinCodeGen LLVMAsmPrinter LLVMBlackfinInfo LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMTarget) set(MSVC_LIB_DEPS_LLVMBlackfinInfo LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMCBackend LLVMAnalysis LLVMCBackendInfo LLVMCodeGen LLVMCore LLVMMC LLVMScalarOpts LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils LLVMipa) set(MSVC_LIB_DEPS_LLVMCBackendInfo LLVMMC LLVMSupport) -set(MSVC_LIB_DEPS_LLVMCellSPUAsmPrinter LLVMAsmPrinter LLVMCellSPUInfo LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMTarget) -set(MSVC_LIB_DEPS_LLVMCellSPUCodeGen LLVMAsmPrinter LLVMCellSPUInfo LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) +set(MSVC_LIB_DEPS_LLVMCellSPUAsmPrinter LLVMAsmPrinter LLVMCellSPUInfo LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMTarget) +set(MSVC_LIB_DEPS_LLVMCellSPUCodeGen LLVMAsmPrinter LLVMCellSPUInfo LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMTarget) set(MSVC_LIB_DEPS_LLVMCellSPUInfo LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMCodeGen LLVMAnalysis LLVMCore LLVMMC LLVMScalarOpts LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils) set(MSVC_LIB_DEPS_LLVMCore LLVMSupport LLVMSystem) -set(MSVC_LIB_DEPS_LLVMCppBackend LLVMCore LLVMCppBackendInfo LLVMSupport LLVMSystem LLVMTarget) +set(MSVC_LIB_DEPS_LLVMCppBackend LLVMCore LLVMCppBackendInfo LLVMSupport LLVMTarget) set(MSVC_LIB_DEPS_LLVMCppBackendInfo LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMExecutionEngine LLVMCore LLVMSupport LLVMSystem LLVMTarget) set(MSVC_LIB_DEPS_LLVMInstCombine LLVMAnalysis LLVMCore LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils) @@ -30,46 +30,45 @@ set(MSVC_LIB_DEPS_LLVMInterpreter LLVMCodeGen LLVMCore LLVMExecutionEngine LLVMSupport LLVMSystem LLVMTarget) set(MSVC_LIB_DEPS_LLVMJIT LLVMCodeGen LLVMCore LLVMExecutionEngine LLVMMC LLVMSupport LLVMSystem LLVMTarget) set(MSVC_LIB_DEPS_LLVMLinker LLVMArchive LLVMBitReader LLVMCore LLVMSupport LLVMSystem LLVMTransformUtils) -set(MSVC_LIB_DEPS_LLVMMBlazeAsmParser LLVMMBlazeCodeGen LLVMMBlazeInfo LLVMMC LLVMMCParser LLVMSupport LLVMSystem LLVMTarget) -set(MSVC_LIB_DEPS_LLVMMBlazeAsmPrinter LLVMMC LLVMSupport LLVMSystem) +set(MSVC_LIB_DEPS_LLVMMBlazeAsmParser LLVMMBlazeCodeGen LLVMMBlazeInfo LLVMMC LLVMMCParser LLVMSupport LLVMTarget) +set(MSVC_LIB_DEPS_LLVMMBlazeAsmPrinter LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMMBlazeCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMBlazeAsmPrinter LLVMMBlazeInfo LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) set(MSVC_LIB_DEPS_LLVMMBlazeDisassembler LLVMMBlazeCodeGen LLVMMBlazeInfo LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMMBlazeInfo LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMMC LLVMSupport LLVMSystem) set(MSVC_LIB_DEPS_LLVMMCDisassembler LLVMARMAsmParser LLVMARMCodeGen LLVMARMDisassembler LLVMARMInfo LLVMAlphaCodeGen LLVMAlphaInfo LLVMBlackfinCodeGen LLVMBlackfinInfo LLVMCBackend LLVMCBackendInfo LLVMCellSPUCodeGen LLVMCellSPUInfo LLVMCppBackend LLVMCppBackendInfo LLVMMBlazeAsmParser LLVMMBlazeCodeGen LLVMMBlazeDisassembler LLVMMBlazeInfo LLVMMC LLVMMCParser LLVMMSP430CodeGen LLVMMSP430Info LLVMMipsCodeGen LLVMMipsInfo LLVMPTXCodeGen LLVMPTXInfo LLVMPowerPCCodeGen LLVMPowerPCInfo LLVMSparcCodeGen LLVMSparcInfo LLVMSupport LLVMSystem LLVMSystemZCodeGen LLVMSystemZInfo LLVMX86AsmParser LLVMX86CodeGen LLVMX86Disassembler LLVMX86Info LLVMXCoreCodeGen LLVMXCoreInfo) -set(MSVC_LIB_DEPS_LLVMMCParser LLVMMC LLVMSupport LLVMSystem) -set(MSVC_LIB_DEPS_LLVMMSP430AsmPrinter LLVMMC LLVMSupport LLVMSystem) +set(MSVC_LIB_DEPS_LLVMMCParser LLVMMC LLVMSupport) +set(MSVC_LIB_DEPS_LLVMMSP430AsmPrinter LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMMSP430CodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMMSP430AsmPrinter LLVMMSP430Info LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) set(MSVC_LIB_DEPS_LLVMMSP430Info LLVMMC LLVMSupport) -set(MSVC_LIB_DEPS_LLVMMipsAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMMipsCodeGen LLVMMipsInfo LLVMSupport LLVMSystem LLVMTarget) +set(MSVC_LIB_DEPS_LLVMMipsAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMMipsCodeGen LLVMMipsInfo LLVMSupport LLVMTarget) set(MSVC_LIB_DEPS_LLVMMipsCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMMipsInfo LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) set(MSVC_LIB_DEPS_LLVMMipsInfo LLVMMC LLVMSupport) -set(MSVC_LIB_DEPS_LLVMObject LLVMSupport LLVMSystem) -set(MSVC_LIB_DEPS_LLVMPTXAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMPTXInfo LLVMSupport LLVMSystem) -set(MSVC_LIB_DEPS_LLVMPTXCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMPTXInfo LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) +set(MSVC_LIB_DEPS_LLVMPTXAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMPTXInfo LLVMSupport) +set(MSVC_LIB_DEPS_LLVMPTXCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMPTXInfo LLVMSelectionDAG LLVMSupport LLVMTarget) set(MSVC_LIB_DEPS_LLVMPTXInfo LLVMMC LLVMSupport) -set(MSVC_LIB_DEPS_LLVMPowerPCAsmPrinter LLVMMC LLVMSupport LLVMSystem) +set(MSVC_LIB_DEPS_LLVMPowerPCAsmPrinter LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMPowerPCCodeGen LLVMAnalysis LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMPowerPCAsmPrinter LLVMPowerPCInfo LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) set(MSVC_LIB_DEPS_LLVMPowerPCInfo LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMScalarOpts LLVMAnalysis LLVMCore LLVMInstCombine LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils) set(MSVC_LIB_DEPS_LLVMSelectionDAG LLVMAnalysis LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMTarget) -set(MSVC_LIB_DEPS_LLVMSparcAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSparcInfo LLVMSupport LLVMSystem LLVMTarget) +set(MSVC_LIB_DEPS_LLVMSparcAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSparcInfo LLVMSupport LLVMTarget) set(MSVC_LIB_DEPS_LLVMSparcCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSparcInfo LLVMSupport LLVMSystem LLVMTarget) set(MSVC_LIB_DEPS_LLVMSparcInfo LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMSupport LLVMSystem) set(MSVC_LIB_DEPS_LLVMSystem ) -set(MSVC_LIB_DEPS_LLVMSystemZAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMSystemZInfo LLVMTarget) -set(MSVC_LIB_DEPS_LLVMSystemZCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMSystemZInfo LLVMTarget) +set(MSVC_LIB_DEPS_LLVMSystemZAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystemZInfo LLVMTarget) +set(MSVC_LIB_DEPS_LLVMSystemZCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystemZInfo LLVMTarget) set(MSVC_LIB_DEPS_LLVMSystemZInfo LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMTarget LLVMCore LLVMMC LLVMSupport LLVMSystem) set(MSVC_LIB_DEPS_LLVMTransformUtils LLVMAnalysis LLVMCore LLVMSupport LLVMSystem LLVMTarget LLVMipa) -set(MSVC_LIB_DEPS_LLVMX86AsmParser LLVMMC LLVMMCParser LLVMSupport LLVMSystem LLVMTarget LLVMX86Info) -set(MSVC_LIB_DEPS_LLVMX86AsmPrinter LLVMMC LLVMSupport LLVMSystem) +set(MSVC_LIB_DEPS_LLVMX86AsmParser LLVMMC LLVMMCParser LLVMSupport LLVMTarget LLVMX86Info) +set(MSVC_LIB_DEPS_LLVMX86AsmPrinter LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMX86CodeGen LLVMAnalysis LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget LLVMX86AsmPrinter LLVMX86Info) set(MSVC_LIB_DEPS_LLVMX86Disassembler LLVMMC LLVMSupport LLVMX86Info) set(MSVC_LIB_DEPS_LLVMX86Info LLVMMC LLVMSupport) -set(MSVC_LIB_DEPS_LLVMXCoreAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMTarget LLVMXCoreInfo) -set(MSVC_LIB_DEPS_LLVMXCoreCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget LLVMXCoreInfo) +set(MSVC_LIB_DEPS_LLVMXCoreAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMTarget LLVMXCoreInfo) +set(MSVC_LIB_DEPS_LLVMXCoreCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMTarget LLVMXCoreInfo) set(MSVC_LIB_DEPS_LLVMXCoreInfo LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMipa LLVMAnalysis LLVMCore LLVMSupport LLVMSystem) set(MSVC_LIB_DEPS_LLVMipo LLVMAnalysis LLVMCore LLVMScalarOpts LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils LLVMipa) From bob.wilson at apple.com Tue Nov 16 12:17:03 2010 From: bob.wilson at apple.com (Bob Wilson) Date: Tue, 16 Nov 2010 18:17:03 -0000 Subject: [llvm-commits] [llvm] r119358 - /llvm/trunk/utils/TableGen/NeonEmitter.cpp Message-ID: <20101116181703.951D82A6C12C@llvm.org> Author: bwilson Date: Tue Nov 16 12:17:03 2010 New Revision: 119358 URL: http://llvm.org/viewvc/llvm-project?rev=119358&view=rev Log: Stop using struct wrappers for Neon vector types in . Thanks to Nate Begeman for an earlier version of this patch. Modified: llvm/trunk/utils/TableGen/NeonEmitter.cpp Modified: llvm/trunk/utils/TableGen/NeonEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/NeonEmitter.cpp?rev=119358&r1=119357&r2=119358&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/NeonEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/NeonEmitter.cpp Tue Nov 16 12:17:03 2010 @@ -535,10 +535,8 @@ } // Generate the definition for this intrinsic, e.g. "a + b" for OpAdd. -// If structTypes is true, the NEON types are structs of vector types rather -// than vector types, and the call becomes "a.val + b.val" static std::string GenOpString(OpKind op, const std::string &proto, - StringRef typestr, bool structTypes = true) { + StringRef typestr) { bool dummy, quad = false; char type = ClassifyType(typestr, quad, dummy, dummy); unsigned nElts = 0; @@ -557,100 +555,95 @@ s = "union { " + ts + " r; double d; } u; u.d"; } else { s = ts + " r; r"; - if (structTypes) - s += ".val"; } s += " = "; - std::string a, b, c; - if (proto.size() > 1) - a = (structTypes && proto[1] != 'l' && proto[1] != 's') ? "a.val" : "a"; - b = structTypes ? "b.val" : "b"; - c = structTypes ? "c.val" : "c"; - switch(op) { case OpAdd: - s += a + " + " + b; + s += "a + b"; break; case OpSub: - s += a + " - " + b; + s += "a - b"; break; case OpMulN: - b = Duplicate(nElts << (int)quad, typestr, "b"); + s += "a * " + Duplicate(nElts << (int)quad, typestr, "b"); + break; case OpMul: - s += a + " * " + b; + s += "a * b"; break; case OpMlaN: - c = Duplicate(nElts << (int)quad, typestr, "c"); + s += "a + (b * " + Duplicate(nElts << (int)quad, typestr, "c") + ")"; + break; case OpMla: - s += a + " + ( " + b + " * " + c + " )"; + s += "a + (b * c)"; break; case OpMlsN: - c = Duplicate(nElts << (int)quad, typestr, "c"); + s += "a - (b * " + Duplicate(nElts << (int)quad, typestr, "c") + ")"; + break; case OpMls: - s += a + " - ( " + b + " * " + c + " )"; + s += "a - (b * c)"; break; case OpEq: - s += "(__neon_" + ts + ")(" + a + " == " + b + ")"; + s += "(__neon_" + ts + ")(a == b)"; break; case OpGe: - s += "(__neon_" + ts + ")(" + a + " >= " + b + ")"; + s += "(__neon_" + ts + ")(a >= b)"; break; case OpLe: - s += "(__neon_" + ts + ")(" + a + " <= " + b + ")"; + s += "(__neon_" + ts + ")(a <= b)"; break; case OpGt: - s += "(__neon_" + ts + ")(" + a + " > " + b + ")"; + s += "(__neon_" + ts + ")(a > b)"; break; case OpLt: - s += "(__neon_" + ts + ")(" + a + " < " + b + ")"; + s += "(__neon_" + ts + ")(a < b)"; break; case OpNeg: - s += " -" + a; + s += " -a"; break; case OpNot: - s += " ~" + a; + s += " ~a"; break; case OpAnd: - s += a + " & " + b; + s += "a & b"; break; case OpOr: - s += a + " | " + b; + s += "a | b"; break; case OpXor: - s += a + " ^ " + b; + s += "a ^ b"; break; case OpAndNot: - s += a + " & ~" + b; + s += "a & ~b"; break; case OpOrNot: - s += a + " | ~" + b; + s += "a | ~b"; break; case OpCast: - s += "(__neon_" + ts + ")" + a; + s += "(__neon_" + ts + ")a"; break; case OpConcat: - s += "__builtin_shufflevector((__neon_int64x1_t)" + a; - s += ", (__neon_int64x1_t)" + b + ", 0, 1)"; + s += "__builtin_shufflevector((__neon_int64x1_t)a"; + s += ", (__neon_int64x1_t)b, 0, 1)"; break; case OpHi: - s += "(((__neon_float64x2_t)" + a + ")[1])"; + s += "(((__neon_float64x2_t)a)[1])"; break; case OpLo: - s += "(((__neon_float64x2_t)" + a + ")[0])"; + s += "(((__neon_float64x2_t)a)[0])"; break; case OpDup: - s += Duplicate(nElts << (int)quad, typestr, a); + s += Duplicate(nElts << (int)quad, typestr, "a"); break; case OpSelect: // ((0 & 1) | (~0 & 2)) ts = TypeString(proto[1], typestr); - s += "( " + a + " & (__neon_" + ts + ")" + b + ") | "; - s += "(~" + a + " & (__neon_" + ts + ")" + c + ")"; + s += "(a & (__neon_" + ts + ")b) | "; + s += "(~a & (__neon_" + ts + ")c)"; break; case OpRev16: - s += "__builtin_shufflevector(" + a + ", " + a; + s += "__builtin_shufflevector(a, a"; for (unsigned i = 2; i <= nElts << (int)quad; i += 2) for (unsigned j = 0; j != 2; ++j) s += ", " + utostr(i - j - 1); @@ -658,14 +651,14 @@ break; case OpRev32: nElts >>= 1; - s += "__builtin_shufflevector(" + a + ", " + a; + s += "__builtin_shufflevector(a, a"; for (unsigned i = nElts; i <= nElts << (1 + (int)quad); i += nElts) for (unsigned j = 0; j != nElts; ++j) s += ", " + utostr(i - j - 1); s += ")"; break; case OpRev64: - s += "__builtin_shufflevector(" + a + ", " + a; + s += "__builtin_shufflevector(a, a"; for (unsigned i = nElts; i <= nElts << (int)quad; i += nElts) for (unsigned j = 0; j != nElts; ++j) s += ", " + utostr(i - j - 1); @@ -734,11 +727,8 @@ } // Generate the definition for this intrinsic, e.g. __builtin_neon_cls(a) -// If structTypes is true, the NEON types are structs of vector types rather -// than vector types, and the call becomes __builtin_neon_cls(a.val) static std::string GenBuiltin(const std::string &name, const std::string &proto, - StringRef typestr, ClassKind ck, - bool structTypes = true) { + StringRef typestr, ClassKind ck) { bool dummy, quad = false; char type = ClassifyType(typestr, quad, dummy, dummy); unsigned nElts = 0; @@ -777,15 +767,11 @@ if (sret) s += "({ " + ts + " r; "; else if (proto[0] != 's') - s += "(" + ts + "){(__neon_" + ts + ")"; + s += "(" + ts + ")"; } else if (sret) { s += ts + " r; "; } else { - s += ts + " r; r"; - if (structTypes && proto[0] != 's' && proto[0] != 'i' && proto[0] != 'l') - s += ".val"; - - s += " = "; + s += ts + " r; r = "; } } @@ -812,9 +798,9 @@ // Handle multiple-vector values specially, emitting each subvector as an // argument to the __builtin. - if (structTypes && (proto[i] == '2' || proto[i] == '3' || proto[i] == '4')){ + if (proto[i] == '2' || proto[i] == '3' || proto[i] == '4') { for (unsigned vi = 0, ve = proto[i] - '0'; vi != ve; ++vi) { - s += args + ".val[" + utostr(vi) + "].val"; + s += args + ".val[" + utostr(vi) + "]"; if ((vi + 1) < ve) s += ", "; } @@ -828,11 +814,6 @@ s += Duplicate(nElts, typestr, args); else s += args; - - if (structTypes && proto[i] != 's' && proto[i] != 'i' && proto[i] != 'l' && - proto[i] != 'p' && proto[i] != 'c' && proto[i] != 'a') { - s += ".val"; - } if ((i + 1) < e) s += ", "; } @@ -850,8 +831,6 @@ if (define) { if (sret) s += "; r; })"; - else if (proto[0] != 's') - s += "}"; } else { s += " return r;"; } @@ -942,11 +921,15 @@ std::string ts = TypeString('d', TDTypeVec[i], vi == 1); std::string vs = TypeString((vi > 1) ? '0' + vi : 'd', TDTypeVec[i]); std::string tag = (vi > 1) ? vs : StructTag(TDTypeVec[i]); - OS << "typedef struct " << tag << " {\n"; - OS << " " << ts << " val"; - if (vi > 1) + if (vi > 1) { + OS << "typedef struct " << tag << " {\n"; + OS << " " << ts << " val"; OS << "[" << utostr(vi) << "]"; - OS << ";\n} " << vs << ";\n\n"; + OS << ";\n} "; + } else { + OS << "typedef " << ts << " "; + } + OS << vs << ";\n\n"; } } From bigcheesegs at gmail.com Tue Nov 16 12:23:08 2010 From: bigcheesegs at gmail.com (Michael Spencer) Date: Tue, 16 Nov 2010 13:23:08 -0500 Subject: [llvm-commits] [PATCH] System: Move system_error from KillTheDoctor. In-Reply-To: References: <1289895429-23671-1-git-send-email-bigcheesegs@gmail.com> Message-ID: On Tue, Nov 16, 2010 at 1:13 PM, Chris Lattner wrote: > > On Nov 16, 2010, at 12:25 AM, Michael Spencer wrote: > >> This is the first step in adding sane error handling support to LLVMSystem. >> >> The system API's will be shifted over to returning an error_code, and returning >> other return values as out parameters to the function. > > Looks great to me, except: > > +++ b/lib/System/Unix/system_error.inc > @@ -0,0 +1,34 @@ > +//===- llvm/System/Unix/system_error.cpp - Unix error_code ------*- C++ -*-===// > > Please be careful with file header comments (.cpp -> .inc). I don't know why I have such a hard time seeing that. Even when I look I don't see it ;/. >> Code that needs to check error conditions will use the errc enum values which >> are the same as the posix_errno defines (EBADF, E2BIG, etc...), and >> are compatable >> with the error codes in WinError.h due to some magic in system_error. >> >> An example would be: >> >> if ((error_code ec = KillEvil("Java")) != errc::success) { >> ?if (ec == kill_error::too_much_evil) >> ? ?std::terminate(); >> ?errs() << ":O There was an error! " << ec.message(); >> } > > Why not just: > > > if (error_code ec = KillEvil("Java")) { > ? handle_error(ec); > } > > I thought that error_code is convertible to bool? > > -Chris That works too. - Michael Spencer From bigcheesegs at gmail.com Tue Nov 16 12:31:53 2010 From: bigcheesegs at gmail.com (Michael J. Spencer) Date: Tue, 16 Nov 2010 18:31:53 -0000 Subject: [llvm-commits] [llvm] r119360 - in /llvm/trunk: include/llvm/System/system_error.h lib/System/CMakeLists.txt lib/System/Unix/system_error.inc lib/System/Win32/system_error.inc lib/System/system_error.cpp utils/KillTheDoctor/CMakeLists.txt utils/KillTheDoctor/KillTheDoctor.cpp utils/KillTheDoctor/system_error.cpp utils/KillTheDoctor/system_error.h Message-ID: <20101116183153.23B542A6C12C@llvm.org> Author: mspencer Date: Tue Nov 16 12:31:52 2010 New Revision: 119360 URL: http://llvm.org/viewvc/llvm-project?rev=119360&view=rev Log: This is the first step in adding sane error handling support to LLVMSystem. The system API's will be shifted over to returning an error_code, and returning other return values as out parameters to the function. Code that needs to check error conditions will use the errc enum values which are the same as the posix_errno defines (EBADF, E2BIG, etc...), and are compatable with the error codes in WinError.h due to some magic in system_error. An example would be: if (error_code ec = KillEvil("Java")) { // error_code can be converted to bool. handle_error(ec); } Added: llvm/trunk/include/llvm/System/system_error.h - copied, changed from r119358, llvm/trunk/utils/KillTheDoctor/system_error.h llvm/trunk/lib/System/Unix/system_error.inc llvm/trunk/lib/System/Win32/system_error.inc llvm/trunk/lib/System/system_error.cpp Removed: llvm/trunk/utils/KillTheDoctor/system_error.cpp llvm/trunk/utils/KillTheDoctor/system_error.h Modified: llvm/trunk/lib/System/CMakeLists.txt llvm/trunk/utils/KillTheDoctor/CMakeLists.txt llvm/trunk/utils/KillTheDoctor/KillTheDoctor.cpp Copied: llvm/trunk/include/llvm/System/system_error.h (from r119358, llvm/trunk/utils/KillTheDoctor/system_error.h) URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/System/system_error.h?p2=llvm/trunk/include/llvm/System/system_error.h&p1=llvm/trunk/utils/KillTheDoctor/system_error.h&r1=119358&r2=119360&rev=119360&view=diff ============================================================================== --- llvm/trunk/utils/KillTheDoctor/system_error.h (original) +++ llvm/trunk/include/llvm/System/system_error.h Tue Nov 16 12:31:52 2010 @@ -7,7 +7,10 @@ // //===----------------------------------------------------------------------===// // -// This was lifted from libc++ and modified for C++03. +// This was lifted from libc++ and modified for C++03. This is called +// system_error even though it does not define that class because that's what +// it's called in C++0x. We don't define system_error because it is only used +// for exception handling, which we don't use in LLVM. // //===----------------------------------------------------------------------===// @@ -224,6 +227,8 @@ #include #include +// This must be here instead of a .inc file because it is used in the definition +// of the enum values below. #ifdef LLVM_ON_WIN32 // VS 2008 needs this for some of the defines below. # include @@ -691,7 +696,7 @@ inline bool operator<(const error_condition& _x, const error_condition& _y) { return _x.category() < _y.category() - || _x.category() == _y.category() && _x.value() < _y.value(); + || (_x.category() == _y.category() && _x.value() < _y.value()); } // error_code @@ -750,7 +755,7 @@ inline bool operator<(const error_code& _x, const error_code& _y) { return _x.category() < _y.category() - || _x.category() == _y.category() && _x.value() < _y.value(); + || (_x.category() == _y.category() && _x.value() < _y.value()); } inline bool operator==(const error_code& _x, const error_code& _y) { @@ -788,97 +793,73 @@ // system_error -class system_error : public std::runtime_error { - error_code _ec_; -public: - system_error(error_code _ec, const std::string& _what_arg); - system_error(error_code _ec, const char* _what_arg); - system_error(error_code _ec); - system_error(int _ev, const error_category& _ecat, - const std::string& _what_arg); - system_error(int _ev, const error_category& _ecat, const char* _what_arg); - system_error(int _ev, const error_category& _ecat); - ~system_error() throw(); - - const error_code& code() const throw() {return _ec_;} - -private: - static std::string _init(const error_code&, std::string); -}; - -void _throw_system_error(int ev, const char* what_arg); - } // end namespace llvm +// This needs to stay here for KillTheDoctor. #ifdef LLVM_ON_WIN32 #include #include namespace llvm { -// To construct an error_code after a API error: +// To construct an error_code after an API error: // // error_code( ::GetLastError(), system_category() ) struct windows_error { enum _ { success = 0, // These names and values are based on Windows winerror.h - invalid_function = ERROR_INVALID_FUNCTION, - file_not_found = ERROR_FILE_NOT_FOUND, - path_not_found = ERROR_PATH_NOT_FOUND, - too_many_open_files = ERROR_TOO_MANY_OPEN_FILES, - access_denied = ERROR_ACCESS_DENIED, - invalid_handle = ERROR_INVALID_HANDLE, - arena_trashed = ERROR_ARENA_TRASHED, - not_enough_memory = ERROR_NOT_ENOUGH_MEMORY, - invalid_block = ERROR_INVALID_BLOCK, - bad_environment = ERROR_BAD_ENVIRONMENT, - bad_format = ERROR_BAD_FORMAT, - invalid_access = ERROR_INVALID_ACCESS, - outofmemory = ERROR_OUTOFMEMORY, - invalid_drive = ERROR_INVALID_DRIVE, - current_directory = ERROR_CURRENT_DIRECTORY, - not_same_device = ERROR_NOT_SAME_DEVICE, - no_more_files = ERROR_NO_MORE_FILES, - write_protect = ERROR_WRITE_PROTECT, - bad_unit = ERROR_BAD_UNIT, - not_ready = ERROR_NOT_READY, - bad_command = ERROR_BAD_COMMAND, - crc = ERROR_CRC, - bad_length = ERROR_BAD_LENGTH, - seek = ERROR_SEEK, - not_dos_disk = ERROR_NOT_DOS_DISK, - sector_not_found = ERROR_SECTOR_NOT_FOUND, - out_of_paper = ERROR_OUT_OF_PAPER, - write_fault = ERROR_WRITE_FAULT, - read_fault = ERROR_READ_FAULT, - gen_failure = ERROR_GEN_FAILURE, - sharing_violation = ERROR_SHARING_VIOLATION, - lock_violation = ERROR_LOCK_VIOLATION, - wrong_disk = ERROR_WRONG_DISK, + // This is not a complete list. + invalid_function = ERROR_INVALID_FUNCTION, + file_not_found = ERROR_FILE_NOT_FOUND, + path_not_found = ERROR_PATH_NOT_FOUND, + too_many_open_files = ERROR_TOO_MANY_OPEN_FILES, + access_denied = ERROR_ACCESS_DENIED, + invalid_handle = ERROR_INVALID_HANDLE, + arena_trashed = ERROR_ARENA_TRASHED, + not_enough_memory = ERROR_NOT_ENOUGH_MEMORY, + invalid_block = ERROR_INVALID_BLOCK, + bad_environment = ERROR_BAD_ENVIRONMENT, + bad_format = ERROR_BAD_FORMAT, + invalid_access = ERROR_INVALID_ACCESS, + outofmemory = ERROR_OUTOFMEMORY, + invalid_drive = ERROR_INVALID_DRIVE, + current_directory = ERROR_CURRENT_DIRECTORY, + not_same_device = ERROR_NOT_SAME_DEVICE, + no_more_files = ERROR_NO_MORE_FILES, + write_protect = ERROR_WRITE_PROTECT, + bad_unit = ERROR_BAD_UNIT, + not_ready = ERROR_NOT_READY, + bad_command = ERROR_BAD_COMMAND, + crc = ERROR_CRC, + bad_length = ERROR_BAD_LENGTH, + seek = ERROR_SEEK, + not_dos_disk = ERROR_NOT_DOS_DISK, + sector_not_found = ERROR_SECTOR_NOT_FOUND, + out_of_paper = ERROR_OUT_OF_PAPER, + write_fault = ERROR_WRITE_FAULT, + read_fault = ERROR_READ_FAULT, + gen_failure = ERROR_GEN_FAILURE, + sharing_violation = ERROR_SHARING_VIOLATION, + lock_violation = ERROR_LOCK_VIOLATION, + wrong_disk = ERROR_WRONG_DISK, sharing_buffer_exceeded = ERROR_SHARING_BUFFER_EXCEEDED, - handle_eof = ERROR_HANDLE_EOF, - handle_disk_full= ERROR_HANDLE_DISK_FULL, - rem_not_list = ERROR_REM_NOT_LIST, - dup_name = ERROR_DUP_NAME, - bad_net_path = ERROR_BAD_NETPATH, - network_busy = ERROR_NETWORK_BUSY, - // ... - file_exists = ERROR_FILE_EXISTS, - cannot_make = ERROR_CANNOT_MAKE, - // ... - broken_pipe = ERROR_BROKEN_PIPE, - open_failed = ERROR_OPEN_FAILED, - buffer_overflow = ERROR_BUFFER_OVERFLOW, - disk_full= ERROR_DISK_FULL, - // ... - lock_failed = ERROR_LOCK_FAILED, - busy = ERROR_BUSY, - cancel_violation = ERROR_CANCEL_VIOLATION, - already_exists = ERROR_ALREADY_EXISTS - // ... - - // TODO: add more Windows errors + handle_eof = ERROR_HANDLE_EOF, + handle_disk_full = ERROR_HANDLE_DISK_FULL, + rem_not_list = ERROR_REM_NOT_LIST, + dup_name = ERROR_DUP_NAME, + bad_net_path = ERROR_BAD_NETPATH, + network_busy = ERROR_NETWORK_BUSY, + file_exists = ERROR_FILE_EXISTS, + cannot_make = ERROR_CANNOT_MAKE, + broken_pipe = ERROR_BROKEN_PIPE, + open_failed = ERROR_OPEN_FAILED, + buffer_overflow = ERROR_BUFFER_OVERFLOW, + disk_full = ERROR_DISK_FULL, + lock_failed = ERROR_LOCK_FAILED, + busy = ERROR_BUSY, + cancel_violation = ERROR_CANCEL_VIOLATION, + already_exists = ERROR_ALREADY_EXISTS }; _ v_; Modified: llvm/trunk/lib/System/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/CMakeLists.txt?rev=119360&r1=119359&r2=119360&view=diff ============================================================================== --- llvm/trunk/lib/System/CMakeLists.txt (original) +++ llvm/trunk/lib/System/CMakeLists.txt Tue Nov 16 12:31:52 2010 @@ -19,6 +19,7 @@ RWMutex.cpp SearchForAddressOfSpecialSymbol.cpp Signals.cpp + system_error.cpp ThreadLocal.cpp Threading.cpp TimeValue.cpp @@ -32,6 +33,7 @@ Unix/Program.inc Unix/RWMutex.inc Unix/Signals.inc + Unix/system_error.inc Unix/ThreadLocal.inc Unix/TimeValue.inc Win32/Alarm.inc @@ -44,6 +46,7 @@ Win32/Program.inc Win32/RWMutex.inc Win32/Signals.inc + Win32/system_error.inc Win32/ThreadLocal.inc Win32/TimeValue.inc ) Added: llvm/trunk/lib/System/Unix/system_error.inc URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Unix/system_error.inc?rev=119360&view=auto ============================================================================== --- llvm/trunk/lib/System/Unix/system_error.inc (added) +++ llvm/trunk/lib/System/Unix/system_error.inc Tue Nov 16 12:31:52 2010 @@ -0,0 +1,34 @@ +//===- llvm/System/Unix/system_error.inc - Unix error_code ------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file provides the Unix specific implementation of the error_code +// and error_condition classes. +// +//===----------------------------------------------------------------------===// + +//===----------------------------------------------------------------------===// +//=== WARNING: Implementation here must contain only generic UNIX code that +//=== is guaranteed to work on *all* UNIX variants. +//===----------------------------------------------------------------------===// + +using namespace llvm; + +std::string +_system_error_category::message(int ev) const { + return _do_message::message(ev); +} + +error_condition +_system_error_category::default_error_condition(int ev) const { +#ifdef ELAST + if (ev > ELAST) + return error_condition(ev, system_category()); +#endif // ELAST + return error_condition(ev, generic_category()); +} Added: llvm/trunk/lib/System/Win32/system_error.inc URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Win32/system_error.inc?rev=119360&view=auto ============================================================================== --- llvm/trunk/lib/System/Win32/system_error.inc (added) +++ llvm/trunk/lib/System/Win32/system_error.inc Tue Nov 16 12:31:52 2010 @@ -0,0 +1,140 @@ +//===- llvm/System/Win32/system_error.inc - Windows error_code --*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file provides the Windows specific implementation of the error_code +// and error_condition classes. +// +//===----------------------------------------------------------------------===// + +//===----------------------------------------------------------------------===// +//=== WARNING: Implementation here must contain only generic Windows code that +//=== is guaranteed to work on *all* Windows variants. +//===----------------------------------------------------------------------===// + +#include +#include + +using namespace llvm; + +std::string +_system_error_category::message(int ev) const { + LPVOID lpMsgBuf = 0; + DWORD retval = ::FormatMessageA( + FORMAT_MESSAGE_ALLOCATE_BUFFER | + FORMAT_MESSAGE_FROM_SYSTEM | + FORMAT_MESSAGE_IGNORE_INSERTS, + NULL, + ev, + MAKELANGID(LANG_NEUTRAL, SUBLANG_DEFAULT), // Default language + (LPSTR) &lpMsgBuf, + 0, + NULL); + if (retval == 0) { + ::LocalFree(lpMsgBuf); + return std::string("Unknown error"); + } + + std::string str( static_cast(lpMsgBuf) ); + ::LocalFree(lpMsgBuf); + + while (str.size() + && (str[str.size()-1] == '\n' || str[str.size()-1] == '\r')) + str.erase( str.size()-1 ); + if (str.size() && str[str.size()-1] == '.') + str.erase( str.size()-1 ); + return str; +} + +// I'd rather not double the line count of the following. +#define MAP_ERR_TO_COND(x, y) case x: return make_error_condition(errc::y) + +error_condition +_system_error_category::default_error_condition(int ev) const { + switch (ev) { + MAP_ERR_TO_COND(0, success); + // Windows system -> posix_errno decode table ---------------------------// + // see WinError.h comments for descriptions of errors + MAP_ERR_TO_COND(ERROR_ACCESS_DENIED, permission_denied); + MAP_ERR_TO_COND(ERROR_ALREADY_EXISTS, file_exists); + MAP_ERR_TO_COND(ERROR_BAD_UNIT, no_such_device); + MAP_ERR_TO_COND(ERROR_BUFFER_OVERFLOW, filename_too_long); + MAP_ERR_TO_COND(ERROR_BUSY, device_or_resource_busy); + MAP_ERR_TO_COND(ERROR_BUSY_DRIVE, device_or_resource_busy); + MAP_ERR_TO_COND(ERROR_CANNOT_MAKE, permission_denied); + MAP_ERR_TO_COND(ERROR_CANTOPEN, io_error); + MAP_ERR_TO_COND(ERROR_CANTREAD, io_error); + MAP_ERR_TO_COND(ERROR_CANTWRITE, io_error); + MAP_ERR_TO_COND(ERROR_CURRENT_DIRECTORY, permission_denied); + MAP_ERR_TO_COND(ERROR_DEV_NOT_EXIST, no_such_device); + MAP_ERR_TO_COND(ERROR_DEVICE_IN_USE, device_or_resource_busy); + MAP_ERR_TO_COND(ERROR_DIR_NOT_EMPTY, directory_not_empty); + MAP_ERR_TO_COND(ERROR_DIRECTORY, invalid_argument); + MAP_ERR_TO_COND(ERROR_DISK_FULL, no_space_on_device); + MAP_ERR_TO_COND(ERROR_FILE_EXISTS, file_exists); + MAP_ERR_TO_COND(ERROR_FILE_NOT_FOUND, no_such_file_or_directory); + MAP_ERR_TO_COND(ERROR_HANDLE_DISK_FULL, no_space_on_device); + MAP_ERR_TO_COND(ERROR_INVALID_ACCESS, permission_denied); + MAP_ERR_TO_COND(ERROR_INVALID_DRIVE, no_such_device); + MAP_ERR_TO_COND(ERROR_INVALID_FUNCTION, function_not_supported); + MAP_ERR_TO_COND(ERROR_INVALID_HANDLE, invalid_argument); + MAP_ERR_TO_COND(ERROR_INVALID_NAME, invalid_argument); + MAP_ERR_TO_COND(ERROR_LOCK_VIOLATION, no_lock_available); + MAP_ERR_TO_COND(ERROR_LOCKED, no_lock_available); + MAP_ERR_TO_COND(ERROR_NEGATIVE_SEEK, invalid_argument); + MAP_ERR_TO_COND(ERROR_NOACCESS, permission_denied); + MAP_ERR_TO_COND(ERROR_NOT_ENOUGH_MEMORY, not_enough_memory); + MAP_ERR_TO_COND(ERROR_NOT_READY, resource_unavailable_try_again); + MAP_ERR_TO_COND(ERROR_NOT_SAME_DEVICE, cross_device_link); + MAP_ERR_TO_COND(ERROR_OPEN_FAILED, io_error); + MAP_ERR_TO_COND(ERROR_OPEN_FILES, device_or_resource_busy); + MAP_ERR_TO_COND(ERROR_OPERATION_ABORTED, operation_canceled); + MAP_ERR_TO_COND(ERROR_OUTOFMEMORY, not_enough_memory); + MAP_ERR_TO_COND(ERROR_PATH_NOT_FOUND, no_such_file_or_directory); + MAP_ERR_TO_COND(ERROR_READ_FAULT, io_error); + MAP_ERR_TO_COND(ERROR_RETRY, resource_unavailable_try_again); + MAP_ERR_TO_COND(ERROR_SEEK, io_error); + MAP_ERR_TO_COND(ERROR_SHARING_VIOLATION, permission_denied); + MAP_ERR_TO_COND(ERROR_TOO_MANY_OPEN_FILES, too_many_files_open); + MAP_ERR_TO_COND(ERROR_WRITE_FAULT, io_error); + MAP_ERR_TO_COND(ERROR_WRITE_PROTECT, permission_denied); + MAP_ERR_TO_COND(ERROR_SEM_TIMEOUT, timed_out); + MAP_ERR_TO_COND(WSAEACCES, permission_denied); + MAP_ERR_TO_COND(WSAEADDRINUSE, address_in_use); + MAP_ERR_TO_COND(WSAEADDRNOTAVAIL, address_not_available); + MAP_ERR_TO_COND(WSAEAFNOSUPPORT, address_family_not_supported); + MAP_ERR_TO_COND(WSAEALREADY, connection_already_in_progress); + MAP_ERR_TO_COND(WSAEBADF, bad_file_descriptor); + MAP_ERR_TO_COND(WSAECONNABORTED, connection_aborted); + MAP_ERR_TO_COND(WSAECONNREFUSED, connection_refused); + MAP_ERR_TO_COND(WSAECONNRESET, connection_reset); + MAP_ERR_TO_COND(WSAEDESTADDRREQ, destination_address_required); + MAP_ERR_TO_COND(WSAEFAULT, bad_address); + MAP_ERR_TO_COND(WSAEHOSTUNREACH, host_unreachable); + MAP_ERR_TO_COND(WSAEINPROGRESS, operation_in_progress); + MAP_ERR_TO_COND(WSAEINTR, interrupted); + MAP_ERR_TO_COND(WSAEINVAL, invalid_argument); + MAP_ERR_TO_COND(WSAEISCONN, already_connected); + MAP_ERR_TO_COND(WSAEMFILE, too_many_files_open); + MAP_ERR_TO_COND(WSAEMSGSIZE, message_size); + MAP_ERR_TO_COND(WSAENAMETOOLONG, filename_too_long); + MAP_ERR_TO_COND(WSAENETDOWN, network_down); + MAP_ERR_TO_COND(WSAENETRESET, network_reset); + MAP_ERR_TO_COND(WSAENETUNREACH, network_unreachable); + MAP_ERR_TO_COND(WSAENOBUFS, no_buffer_space); + MAP_ERR_TO_COND(WSAENOPROTOOPT, no_protocol_option); + MAP_ERR_TO_COND(WSAENOTCONN, not_connected); + MAP_ERR_TO_COND(WSAENOTSOCK, not_a_socket); + MAP_ERR_TO_COND(WSAEOPNOTSUPP, operation_not_supported); + MAP_ERR_TO_COND(WSAEPROTONOSUPPORT, protocol_not_supported); + MAP_ERR_TO_COND(WSAEPROTOTYPE, wrong_protocol_type); + MAP_ERR_TO_COND(WSAETIMEDOUT, timed_out); + MAP_ERR_TO_COND(WSAEWOULDBLOCK, operation_would_block); + default: return error_condition(ev, system_category()); + } +} Added: llvm/trunk/lib/System/system_error.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/system_error.cpp?rev=119360&view=auto ============================================================================== --- llvm/trunk/lib/System/system_error.cpp (added) +++ llvm/trunk/lib/System/system_error.cpp Tue Nov 16 12:31:52 2010 @@ -0,0 +1,121 @@ +//===---------------------- system_error.cpp ------------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This was lifted from libc++ and modified for C++03. +// +//===----------------------------------------------------------------------===// + +#include "llvm/System/system_error.h" +#include "llvm/System/Errno.h" +#include +#include + +namespace llvm { + +// class error_category + +error_category::error_category() { +} + +error_category::~error_category() { +} + +error_condition +error_category::default_error_condition(int ev) const { + return error_condition(ev, *this); +} + +bool +error_category::equivalent(int code, const error_condition& condition) const { + return default_error_condition(code) == condition; +} + +bool +error_category::equivalent(const error_code& code, int condition) const { + return *this == code.category() && code.value() == condition; +} + +std::string +_do_message::message(int ev) const { + return std::string(sys::StrError(ev)); +} + +class _generic_error_category : public _do_message { +public: + virtual const char* name() const; + virtual std::string message(int ev) const; +}; + +const char* +_generic_error_category::name() const { + return "generic"; +} + +std::string +_generic_error_category::message(int ev) const { +#ifdef ELAST + if (ev > ELAST) + return std::string("unspecified generic_category error"); +#endif // ELAST + return _do_message::message(ev); +} + +const error_category& +generic_category() { + static _generic_error_category s; + return s; +} + +class _system_error_category : public _do_message { +public: + virtual const char* name() const; + virtual std::string message(int ev) const; + virtual error_condition default_error_condition(int ev) const; +}; + +const char* +_system_error_category::name() const { + return "system"; +} + +// std::string _system_error_category::message(int ev) const { +// Is in Platform/system_error.inc + +// error_condition _system_error_category::default_error_condition(int ev) const +// Is in Platform/system_error.inc + +const error_category& +system_category() { + static _system_error_category s; + return s; +} + +// error_condition + +std::string +error_condition::message() const { + return _cat_->message(_val_); +} + +// error_code + +std::string +error_code::message() const { + return _cat_->message(_val_); +} + +} // end namespace llvm + +// Include the truly platform-specific parts of this class. +#if defined(LLVM_ON_UNIX) +#include "Unix/system_error.inc" +#endif +#if defined(LLVM_ON_WIN32) +#include "Win32/system_error.inc" +#endif Modified: llvm/trunk/utils/KillTheDoctor/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/KillTheDoctor/CMakeLists.txt?rev=119360&r1=119359&r2=119360&view=diff ============================================================================== --- llvm/trunk/utils/KillTheDoctor/CMakeLists.txt (original) +++ llvm/trunk/utils/KillTheDoctor/CMakeLists.txt Tue Nov 16 12:31:52 2010 @@ -1,6 +1,5 @@ add_executable(KillTheDoctor KillTheDoctor.cpp - system_error.cpp ) target_link_libraries(KillTheDoctor LLVMSupport LLVMSystem) Modified: llvm/trunk/utils/KillTheDoctor/KillTheDoctor.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/KillTheDoctor/KillTheDoctor.cpp?rev=119360&r1=119359&r2=119360&view=diff ============================================================================== --- llvm/trunk/utils/KillTheDoctor/KillTheDoctor.cpp (original) +++ llvm/trunk/utils/KillTheDoctor/KillTheDoctor.cpp Tue Nov 16 12:31:52 2010 @@ -42,7 +42,7 @@ #include "llvm/Support/raw_ostream.h" #include "llvm/Support/type_traits.h" #include "llvm/System/Signals.h" -#include "system_error.h" +#include "llvm/System/system_error.h" #include #include #include Removed: llvm/trunk/utils/KillTheDoctor/system_error.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/KillTheDoctor/system_error.cpp?rev=119359&view=auto ============================================================================== --- llvm/trunk/utils/KillTheDoctor/system_error.cpp (original) +++ llvm/trunk/utils/KillTheDoctor/system_error.cpp (removed) @@ -1,287 +0,0 @@ -//===---------------------- system_error.cpp ------------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This was lifted from libc++ and modified for C++03. -// -//===----------------------------------------------------------------------===// - -#include "llvm/Config/config.h" -#include "system_error.h" -#include -#include - -namespace llvm { - -// class error_category - -error_category::error_category() { -} - -error_category::~error_category() { -} - -error_condition -error_category::default_error_condition(int ev) const { - return error_condition(ev, *this); -} - -bool -error_category::equivalent(int code, const error_condition& condition) const { - return default_error_condition(code) == condition; -} - -bool -error_category::equivalent(const error_code& code, int condition) const { - return *this == code.category() && code.value() == condition; -} - -std::string -_do_message::message(int ev) const { - return std::string(std::strerror(ev)); -} - -class _generic_error_category : public _do_message { -public: - virtual const char* name() const; - virtual std::string message(int ev) const; -}; - -const char* -_generic_error_category::name() const { - return "generic"; -} - -std::string -_generic_error_category::message(int ev) const { -#ifdef ELAST - if (ev > ELAST) - return std::string("unspecified generic_category error"); -#endif // ELAST - return _do_message::message(ev); -} - -const error_category& -generic_category() { - static _generic_error_category s; - return s; -} - -class _system_error_category : public _do_message { -public: - virtual const char* name() const; - virtual std::string message(int ev) const; - virtual error_condition default_error_condition(int ev) const; -}; - -const char* -_system_error_category::name() const { - return "system"; -} - -// std::string _system_error_category::message(int ev) const { -// Is in Platform/system_error.inc - -// error_condition _system_error_category::default_error_condition(int ev) const -// Is in Platform/system_error.inc - -const error_category& -system_category() { - static _system_error_category s; - return s; -} - -// error_condition - -std::string -error_condition::message() const { - return _cat_->message(_val_); -} - -// error_code - -std::string -error_code::message() const { - return _cat_->message(_val_); -} - -// system_error - -std::string -system_error::_init(const error_code& ec, std::string what_arg) { - if (ec) - { - if (!what_arg.empty()) - what_arg += ": "; - what_arg += ec.message(); - } - return what_arg; -} - -system_error::system_error(error_code ec, const std::string& what_arg) - : runtime_error(_init(ec, what_arg)), _ec_(ec) { -} - -system_error::system_error(error_code ec, const char* what_arg) - : runtime_error(_init(ec, what_arg)), _ec_(ec) { -} - -system_error::system_error(error_code ec) - : runtime_error(_init(ec, "")), _ec_(ec) { -} - -system_error::system_error(int ev, const error_category& ecat, - const std::string& what_arg) - : runtime_error(_init(error_code(ev, ecat), what_arg)) - , _ec_(error_code(ev, ecat)) { -} - -system_error::system_error(int ev, const error_category& ecat, - const char* what_arg) - : runtime_error(_init(error_code(ev, ecat), what_arg)) - , _ec_(error_code(ev, ecat)) { -} - -system_error::system_error(int ev, const error_category& ecat) - : runtime_error(_init(error_code(ev, ecat), "")), _ec_(error_code(ev, ecat)) { -} - -system_error::~system_error() throw() { -} - -void -_throw_system_error(int ev, const char* what_arg) { - throw system_error(error_code(ev, system_category()), what_arg); -} - -} // end namespace llvm - -#ifdef LLVM_ON_WIN32 -#include -#include - -namespace llvm { - -std::string -_system_error_category::message(int ev) const { - LPVOID lpMsgBuf = 0; - DWORD retval = ::FormatMessageA( - FORMAT_MESSAGE_ALLOCATE_BUFFER | - FORMAT_MESSAGE_FROM_SYSTEM | - FORMAT_MESSAGE_IGNORE_INSERTS, - NULL, - ev, - MAKELANGID(LANG_NEUTRAL, SUBLANG_DEFAULT), // Default language - (LPSTR) &lpMsgBuf, - 0, - NULL); - if (retval == 0) { - ::LocalFree(lpMsgBuf); - return std::string("Unknown error"); - } - - std::string str( static_cast(lpMsgBuf) ); - ::LocalFree(lpMsgBuf); - - while (str.size() - && (str[str.size()-1] == '\n' || str[str.size()-1] == '\r')) - str.erase( str.size()-1 ); - if (str.size() && str[str.size()-1] == '.') - str.erase( str.size()-1 ); - return str; -} - -error_condition -_system_error_category::default_error_condition(int ev) const { - switch (ev) - { - case 0: return make_error_condition(errc::success); - // Windows system -> posix_errno decode table ---------------------------// - // see WinError.h comments for descriptions of errors - case ERROR_ACCESS_DENIED: return make_error_condition(errc::permission_denied); - case ERROR_ALREADY_EXISTS: return make_error_condition(errc::file_exists); - case ERROR_BAD_UNIT: return make_error_condition(errc::no_such_device); - case ERROR_BUFFER_OVERFLOW: return make_error_condition(errc::filename_too_long); - case ERROR_BUSY: return make_error_condition(errc::device_or_resource_busy); - case ERROR_BUSY_DRIVE: return make_error_condition(errc::device_or_resource_busy); - case ERROR_CANNOT_MAKE: return make_error_condition(errc::permission_denied); - case ERROR_CANTOPEN: return make_error_condition(errc::io_error); - case ERROR_CANTREAD: return make_error_condition(errc::io_error); - case ERROR_CANTWRITE: return make_error_condition(errc::io_error); - case ERROR_CURRENT_DIRECTORY: return make_error_condition(errc::permission_denied); - case ERROR_DEV_NOT_EXIST: return make_error_condition(errc::no_such_device); - case ERROR_DEVICE_IN_USE: return make_error_condition(errc::device_or_resource_busy); - case ERROR_DIR_NOT_EMPTY: return make_error_condition(errc::directory_not_empty); - case ERROR_DIRECTORY: return make_error_condition(errc::invalid_argument); - case ERROR_DISK_FULL: return make_error_condition(errc::no_space_on_device); - case ERROR_FILE_EXISTS: return make_error_condition(errc::file_exists); - case ERROR_FILE_NOT_FOUND: return make_error_condition(errc::no_such_file_or_directory); - case ERROR_HANDLE_DISK_FULL: return make_error_condition(errc::no_space_on_device); - case ERROR_INVALID_ACCESS: return make_error_condition(errc::permission_denied); - case ERROR_INVALID_DRIVE: return make_error_condition(errc::no_such_device); - case ERROR_INVALID_FUNCTION: return make_error_condition(errc::function_not_supported); - case ERROR_INVALID_HANDLE: return make_error_condition(errc::invalid_argument); - case ERROR_INVALID_NAME: return make_error_condition(errc::invalid_argument); - case ERROR_LOCK_VIOLATION: return make_error_condition(errc::no_lock_available); - case ERROR_LOCKED: return make_error_condition(errc::no_lock_available); - case ERROR_NEGATIVE_SEEK: return make_error_condition(errc::invalid_argument); - case ERROR_NOACCESS: return make_error_condition(errc::permission_denied); - case ERROR_NOT_ENOUGH_MEMORY: return make_error_condition(errc::not_enough_memory); - case ERROR_NOT_READY: return make_error_condition(errc::resource_unavailable_try_again); - case ERROR_NOT_SAME_DEVICE: return make_error_condition(errc::cross_device_link); - case ERROR_OPEN_FAILED: return make_error_condition(errc::io_error); - case ERROR_OPEN_FILES: return make_error_condition(errc::device_or_resource_busy); - case ERROR_OPERATION_ABORTED: return make_error_condition(errc::operation_canceled); - case ERROR_OUTOFMEMORY: return make_error_condition(errc::not_enough_memory); - case ERROR_PATH_NOT_FOUND: return make_error_condition(errc::no_such_file_or_directory); - case ERROR_READ_FAULT: return make_error_condition(errc::io_error); - case ERROR_RETRY: return make_error_condition(errc::resource_unavailable_try_again); - case ERROR_SEEK: return make_error_condition(errc::io_error); - case ERROR_SHARING_VIOLATION: return make_error_condition(errc::permission_denied); - case ERROR_TOO_MANY_OPEN_FILES: return make_error_condition(errc::too_many_files_open); - case ERROR_WRITE_FAULT: return make_error_condition(errc::io_error); - case ERROR_WRITE_PROTECT: return make_error_condition(errc::permission_denied); - case ERROR_SEM_TIMEOUT: return make_error_condition(errc::timed_out); - case WSAEACCES: return make_error_condition(errc::permission_denied); - case WSAEADDRINUSE: return make_error_condition(errc::address_in_use); - case WSAEADDRNOTAVAIL: return make_error_condition(errc::address_not_available); - case WSAEAFNOSUPPORT: return make_error_condition(errc::address_family_not_supported); - case WSAEALREADY: return make_error_condition(errc::connection_already_in_progress); - case WSAEBADF: return make_error_condition(errc::bad_file_descriptor); - case WSAECONNABORTED: return make_error_condition(errc::connection_aborted); - case WSAECONNREFUSED: return make_error_condition(errc::connection_refused); - case WSAECONNRESET: return make_error_condition(errc::connection_reset); - case WSAEDESTADDRREQ: return make_error_condition(errc::destination_address_required); - case WSAEFAULT: return make_error_condition(errc::bad_address); - case WSAEHOSTUNREACH: return make_error_condition(errc::host_unreachable); - case WSAEINPROGRESS: return make_error_condition(errc::operation_in_progress); - case WSAEINTR: return make_error_condition(errc::interrupted); - case WSAEINVAL: return make_error_condition(errc::invalid_argument); - case WSAEISCONN: return make_error_condition(errc::already_connected); - case WSAEMFILE: return make_error_condition(errc::too_many_files_open); - case WSAEMSGSIZE: return make_error_condition(errc::message_size); - case WSAENAMETOOLONG: return make_error_condition(errc::filename_too_long); - case WSAENETDOWN: return make_error_condition(errc::network_down); - case WSAENETRESET: return make_error_condition(errc::network_reset); - case WSAENETUNREACH: return make_error_condition(errc::network_unreachable); - case WSAENOBUFS: return make_error_condition(errc::no_buffer_space); - case WSAENOPROTOOPT: return make_error_condition(errc::no_protocol_option); - case WSAENOTCONN: return make_error_condition(errc::not_connected); - case WSAENOTSOCK: return make_error_condition(errc::not_a_socket); - case WSAEOPNOTSUPP: return make_error_condition(errc::operation_not_supported); - case WSAEPROTONOSUPPORT: return make_error_condition(errc::protocol_not_supported); - case WSAEPROTOTYPE: return make_error_condition(errc::wrong_protocol_type); - case WSAETIMEDOUT: return make_error_condition(errc::timed_out); - case WSAEWOULDBLOCK: return make_error_condition(errc::operation_would_block); - default: return error_condition(ev, system_category()); - } -} - -} // end namespace llvm - -#endif // LLVM_ON_WIN32 Removed: llvm/trunk/utils/KillTheDoctor/system_error.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/KillTheDoctor/system_error.h?rev=119359&view=auto ============================================================================== --- llvm/trunk/utils/KillTheDoctor/system_error.h (original) +++ llvm/trunk/utils/KillTheDoctor/system_error.h (removed) @@ -1,903 +0,0 @@ -//===---------------------------- system_error ----------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This was lifted from libc++ and modified for C++03. -// -//===----------------------------------------------------------------------===// - -#ifndef LLVM_SYSTEM_SYSTEM_ERROR_H -#define LLVM_SYSTEM_SYSTEM_ERROR_H - -/* - system_error synopsis - -namespace std -{ - -class error_category -{ -public: - virtual ~error_category(); - - error_category(const error_category&) = delete; - error_category& operator=(const error_category&) = delete; - - virtual const char* name() const = 0; - virtual error_condition default_error_condition(int ev) const; - virtual bool equivalent(int code, const error_condition& condition) const; - virtual bool equivalent(const error_code& code, int condition) const; - virtual std::string message(int ev) const = 0; - - bool operator==(const error_category& rhs) const; - bool operator!=(const error_category& rhs) const; - bool operator<(const error_category& rhs) const; -}; - -const error_category& generic_category(); -const error_category& system_category(); - -template struct is_error_code_enum - : public false_type {}; - -template struct is_error_condition_enum - : public false_type {}; - -class error_code -{ -public: - // constructors: - error_code(); - error_code(int val, const error_category& cat); - template - error_code(ErrorCodeEnum e); - - // modifiers: - void assign(int val, const error_category& cat); - template - error_code& operator=(ErrorCodeEnum e); - void clear(); - - // observers: - int value() const; - const error_category& category() const; - error_condition default_error_condition() const; - std::string message() const; - explicit operator bool() const; -}; - -// non-member functions: -bool operator<(const error_code& lhs, const error_code& rhs); -template - basic_ostream& - operator<<(basic_ostream& os, const error_code& ec); - -class error_condition -{ -public: - // constructors: - error_condition(); - error_condition(int val, const error_category& cat); - template - error_condition(ErrorConditionEnum e); - - // modifiers: - void assign(int val, const error_category& cat); - template - error_condition& operator=(ErrorConditionEnum e); - void clear(); - - // observers: - int value() const; - const error_category& category() const; - std::string message() const; - explicit operator bool() const; -}; - -bool operator<(const error_condition& lhs, const error_condition& rhs); - -class system_error - : public runtime_error -{ -public: - system_error(error_code ec, const std::string& what_arg); - system_error(error_code ec, const char* what_arg); - system_error(error_code ec); - system_error(int ev, const error_category& ecat, const std::string& what_arg); - system_error(int ev, const error_category& ecat, const char* what_arg); - system_error(int ev, const error_category& ecat); - - const error_code& code() const throw(); - const char* what() const throw(); -}; - -enum class errc -{ - address_family_not_supported, // EAFNOSUPPORT - address_in_use, // EADDRINUSE - address_not_available, // EADDRNOTAVAIL - already_connected, // EISCONN - argument_list_too_long, // E2BIG - argument_out_of_domain, // EDOM - bad_address, // EFAULT - bad_file_descriptor, // EBADF - bad_message, // EBADMSG - broken_pipe, // EPIPE - connection_aborted, // ECONNABORTED - connection_already_in_progress, // EALREADY - connection_refused, // ECONNREFUSED - connection_reset, // ECONNRESET - cross_device_link, // EXDEV - destination_address_required, // EDESTADDRREQ - device_or_resource_busy, // EBUSY - directory_not_empty, // ENOTEMPTY - executable_format_error, // ENOEXEC - file_exists, // EEXIST - file_too_large, // EFBIG - filename_too_long, // ENAMETOOLONG - function_not_supported, // ENOSYS - host_unreachable, // EHOSTUNREACH - identifier_removed, // EIDRM - illegal_byte_sequence, // EILSEQ - inappropriate_io_control_operation, // ENOTTY - interrupted, // EINTR - invalid_argument, // EINVAL - invalid_seek, // ESPIPE - io_error, // EIO - is_a_directory, // EISDIR - message_size, // EMSGSIZE - network_down, // ENETDOWN - network_reset, // ENETRESET - network_unreachable, // ENETUNREACH - no_buffer_space, // ENOBUFS - no_child_process, // ECHILD - no_link, // ENOLINK - no_lock_available, // ENOLCK - no_message_available, // ENODATA - no_message, // ENOMSG - no_protocol_option, // ENOPROTOOPT - no_space_on_device, // ENOSPC - no_stream_resources, // ENOSR - no_such_device_or_address, // ENXIO - no_such_device, // ENODEV - no_such_file_or_directory, // ENOENT - no_such_process, // ESRCH - not_a_directory, // ENOTDIR - not_a_socket, // ENOTSOCK - not_a_stream, // ENOSTR - not_connected, // ENOTCONN - not_enough_memory, // ENOMEM - not_supported, // ENOTSUP - operation_canceled, // ECANCELED - operation_in_progress, // EINPROGRESS - operation_not_permitted, // EPERM - operation_not_supported, // EOPNOTSUPP - operation_would_block, // EWOULDBLOCK - owner_dead, // EOWNERDEAD - permission_denied, // EACCES - protocol_error, // EPROTO - protocol_not_supported, // EPROTONOSUPPORT - read_only_file_system, // EROFS - resource_deadlock_would_occur, // EDEADLK - resource_unavailable_try_again, // EAGAIN - result_out_of_range, // ERANGE - state_not_recoverable, // ENOTRECOVERABLE - stream_timeout, // ETIME - text_file_busy, // ETXTBSY - timed_out, // ETIMEDOUT - too_many_files_open_in_system, // ENFILE - too_many_files_open, // EMFILE - too_many_links, // EMLINK - too_many_symbolic_link_levels, // ELOOP - value_too_large, // EOVERFLOW - wrong_protocol_type // EPROTOTYPE -}; - -template <> struct is_error_condition_enum : true_type { } - -error_code make_error_code(errc e); -error_condition make_error_condition(errc e); - -// Comparison operators: -bool operator==(const error_code& lhs, const error_code& rhs); -bool operator==(const error_code& lhs, const error_condition& rhs); -bool operator==(const error_condition& lhs, const error_code& rhs); -bool operator==(const error_condition& lhs, const error_condition& rhs); -bool operator!=(const error_code& lhs, const error_code& rhs); -bool operator!=(const error_code& lhs, const error_condition& rhs); -bool operator!=(const error_condition& lhs, const error_code& rhs); -bool operator!=(const error_condition& lhs, const error_condition& rhs); - -template <> struct hash; - -} // std - -*/ - -#include "llvm/Config/config.h" -#include "llvm/Support/type_traits.h" -#include -#include - -#ifdef LLVM_ON_WIN32 - // VS 2008 needs this for some of the defines below. -# include - - // The following numbers were taken from VS2010. -# ifndef EAFNOSUPPORT -# define EAFNOSUPPORT WSAEAFNOSUPPORT -# endif -# ifndef EADDRINUSE -# define EADDRINUSE WSAEADDRINUSE -# endif -# ifndef EADDRNOTAVAIL -# define EADDRNOTAVAIL WSAEADDRNOTAVAIL -# endif -# ifndef EISCONN -# define EISCONN WSAEISCONN -# endif -# ifndef E2BIG -# define E2BIG WSAE2BIG -# endif -# ifndef EDOM -# define EDOM WSAEDOM -# endif -# ifndef EFAULT -# define EFAULT WSAEFAULT -# endif -# ifndef EBADF -# define EBADF WSAEBADF -# endif -# ifndef EBADMSG -# define EBADMSG 104 -# endif -# ifndef EPIPE -# define EPIPE WSAEPIPE -# endif -# ifndef ECONNABORTED -# define ECONNABORTED WSAECONNABORTED -# endif -# ifndef EALREADY -# define EALREADY WSAEALREADY -# endif -# ifndef ECONNREFUSED -# define ECONNREFUSED WSAECONNREFUSED -# endif -# ifndef ECONNRESET -# define ECONNRESET WSAECONNRESET -# endif -# ifndef EXDEV -# define EXDEV WSAEXDEV -# endif -# ifndef EDESTADDRREQ -# define EDESTADDRREQ WSAEDESTADDRREQ -# endif -# ifndef EBUSY -# define EBUSY WSAEBUSY -# endif -# ifndef ENOTEMPTY -# define ENOTEMPTY WSAENOTEMPTY -# endif -# ifndef ENOEXEC -# define ENOEXEC WSAENOEXEC -# endif -# ifndef EEXIST -# define EEXIST WSAEEXIST -# endif -# ifndef EFBIG -# define EFBIG WSAEFBIG -# endif -# ifndef ENAMETOOLONG -# define ENAMETOOLONG WSAENAMETOOLONG -# endif -# ifndef ENOSYS -# define ENOSYS WSAENOSYS -# endif -# ifndef EHOSTUNREACH -# define EHOSTUNREACH WSAEHOSTUNREACH -# endif -# ifndef EIDRM -# define EIDRM 111 -# endif -# ifndef EILSEQ -# define EILSEQ WSAEILSEQ -# endif -# ifndef ENOTTY -# define ENOTTY WSAENOTTY -# endif -# ifndef EINTR -# define EINTR WSAEINTR -# endif -# ifndef EINVAL -# define EINVAL WSAEINVAL -# endif -# ifndef ESPIPE -# define ESPIPE WSAESPIPE -# endif -# ifndef EIO -# define EIO WSAEIO -# endif -# ifndef EISDIR -# define EISDIR WSAEISDIR -# endif -# ifndef EMSGSIZE -# define EMSGSIZE WSAEMSGSIZE -# endif -# ifndef ENETDOWN -# define ENETDOWN WSAENETDOWN -# endif -# ifndef ENETRESET -# define ENETRESET WSAENETRESET -# endif -# ifndef ENETUNREACH -# define ENETUNREACH WSAENETUNREACH -# endif -# ifndef ENOBUFS -# define ENOBUFS WSAENOBUFS -# endif -# ifndef ECHILD -# define ECHILD WSAECHILD -# endif -# ifndef ENOLINK -# define ENOLINK 121 -# endif -# ifndef ENOLCK -# define ENOLCK WSAENOLCK -# endif -# ifndef ENODATA -# define ENODATA 120 -# endif -# ifndef ENOMSG -# define ENOMSG 122 -# endif -# ifndef ENOPROTOOPT -# define ENOPROTOOPT WSAENOPROTOOPT -# endif -# ifndef ENOSPC -# define ENOSPC WSAENOSPC -# endif -# ifndef ENOSR -# define ENOSR 124 -# endif -# ifndef ENXIO -# define ENXIO WSAENXIO -# endif -# ifndef ENODEV -# define ENODEV WSAENODEV -# endif -# ifndef ENOENT -# define ENOENT WSAENOENT -# endif -# ifndef ESRCH -# define ESRCH WSAESRCH -# endif -# ifndef ENOTDIR -# define ENOTDIR WSAENOTDIR -# endif -# ifndef ENOTSOCK -# define ENOTSOCK WSAENOTSOCK -# endif -# ifndef ENOSTR -# define ENOSTR 125 -# endif -# ifndef ENOTCONN -# define ENOTCONN WSAENOTCONN -# endif -# ifndef ENOMEM -# define ENOMEM WSAENOMEM -# endif -# ifndef ENOTSUP -# define ENOTSUP 129 -# endif -# ifndef ECANCELED -# define ECANCELED 105 -# endif -# ifndef EINPROGRESS -# define EINPROGRESS WSAEINPROGRESS -# endif -# ifndef EPERM -# define EPERM WSAEPERM -# endif -# ifndef EOPNOTSUPP -# define EOPNOTSUPP WSAEOPNOTSUPP -# endif -# ifndef EWOULDBLOCK -# define EWOULDBLOCK WSAEWOULDBLOCK -# endif -# ifndef EOWNERDEAD -# define EOWNERDEAD 133 -# endif -# ifndef EACCES -# define EACCES WSAEACCES -# endif -# ifndef EPROTO -# define EPROTO 134 -# endif -# ifndef EPROTONOSUPPORT -# define EPROTONOSUPPORT WSAEPROTONOSUPPORT -# endif -# ifndef EROFS -# define EROFS WSAEROFS -# endif -# ifndef EDEADLK -# define EDEADLK WSAEDEADLK -# endif -# ifndef EAGAIN -# define EAGAIN WSAEAGAIN -# endif -# ifndef ERANGE -# define ERANGE WSAERANGE -# endif -# ifndef ENOTRECOVERABLE -# define ENOTRECOVERABLE 127 -# endif -# ifndef ETIME -# define ETIME 137 -# endif -# ifndef ETXTBSY -# define ETXTBSY 139 -# endif -# ifndef ETIMEDOUT -# define ETIMEDOUT WSAETIMEDOUT -# endif -# ifndef ENFILE -# define ENFILE WSAENFILE -# endif -# ifndef EMFILE -# define EMFILE WSAEMFILE -# endif -# ifndef EMLINK -# define EMLINK WSAEMLINK -# endif -# ifndef ELOOP -# define ELOOP WSAELOOP -# endif -# ifndef EOVERFLOW -# define EOVERFLOW 132 -# endif -# ifndef EPROTOTYPE -# define EPROTOTYPE WSAEPROTOTYPE -# endif -#endif - -namespace llvm { - -template -struct integral_constant { - typedef T value_type; - static const value_type value = v; - typedef integral_constant type; - operator value_type() { return value; } -}; - -typedef integral_constant true_type; -typedef integral_constant false_type; - -// is_error_code_enum - -template struct is_error_code_enum : public false_type {}; - -// is_error_condition_enum - -template struct is_error_condition_enum : public false_type {}; - -// Some error codes are not present on all platforms, so we provide equivalents -// for them: - -//enum class errc -struct errc { -enum _ { - success = 0, - address_family_not_supported = EAFNOSUPPORT, - address_in_use = EADDRINUSE, - address_not_available = EADDRNOTAVAIL, - already_connected = EISCONN, - argument_list_too_long = E2BIG, - argument_out_of_domain = EDOM, - bad_address = EFAULT, - bad_file_descriptor = EBADF, - bad_message = EBADMSG, - broken_pipe = EPIPE, - connection_aborted = ECONNABORTED, - connection_already_in_progress = EALREADY, - connection_refused = ECONNREFUSED, - connection_reset = ECONNRESET, - cross_device_link = EXDEV, - destination_address_required = EDESTADDRREQ, - device_or_resource_busy = EBUSY, - directory_not_empty = ENOTEMPTY, - executable_format_error = ENOEXEC, - file_exists = EEXIST, - file_too_large = EFBIG, - filename_too_long = ENAMETOOLONG, - function_not_supported = ENOSYS, - host_unreachable = EHOSTUNREACH, - identifier_removed = EIDRM, - illegal_byte_sequence = EILSEQ, - inappropriate_io_control_operation = ENOTTY, - interrupted = EINTR, - invalid_argument = EINVAL, - invalid_seek = ESPIPE, - io_error = EIO, - is_a_directory = EISDIR, - message_size = EMSGSIZE, - network_down = ENETDOWN, - network_reset = ENETRESET, - network_unreachable = ENETUNREACH, - no_buffer_space = ENOBUFS, - no_child_process = ECHILD, - no_link = ENOLINK, - no_lock_available = ENOLCK, -#ifdef ENODATA - no_message_available = ENODATA, -#else - no_message_available = ENOMSG, -#endif - no_message = ENOMSG, - no_protocol_option = ENOPROTOOPT, - no_space_on_device = ENOSPC, -#ifdef ENOSR - no_stream_resources = ENOSR, -#else - no_stream_resources = ENOMEM, -#endif - no_such_device_or_address = ENXIO, - no_such_device = ENODEV, - no_such_file_or_directory = ENOENT, - no_such_process = ESRCH, - not_a_directory = ENOTDIR, - not_a_socket = ENOTSOCK, -#ifdef ENOSTR - not_a_stream = ENOSTR, -#else - not_a_stream = EINVAL, -#endif - not_connected = ENOTCONN, - not_enough_memory = ENOMEM, - not_supported = ENOTSUP, - operation_canceled = ECANCELED, - operation_in_progress = EINPROGRESS, - operation_not_permitted = EPERM, - operation_not_supported = EOPNOTSUPP, - operation_would_block = EWOULDBLOCK, - owner_dead = EOWNERDEAD, - permission_denied = EACCES, - protocol_error = EPROTO, - protocol_not_supported = EPROTONOSUPPORT, - read_only_file_system = EROFS, - resource_deadlock_would_occur = EDEADLK, - resource_unavailable_try_again = EAGAIN, - result_out_of_range = ERANGE, - state_not_recoverable = ENOTRECOVERABLE, -#ifdef ETIME - stream_timeout = ETIME, -#else - stream_timeout = ETIMEDOUT, -#endif - text_file_busy = ETXTBSY, - timed_out = ETIMEDOUT, - too_many_files_open_in_system = ENFILE, - too_many_files_open = EMFILE, - too_many_links = EMLINK, - too_many_symbolic_link_levels = ELOOP, - value_too_large = EOVERFLOW, - wrong_protocol_type = EPROTOTYPE -}; - - _ v_; - - errc(_ v) : v_(v) {} - operator int() const {return v_;} -}; - -template <> struct is_error_condition_enum : true_type { }; - -template <> struct is_error_condition_enum : true_type { }; - -class error_condition; -class error_code; - -// class error_category - -class _do_message; - -class error_category -{ -public: - virtual ~error_category(); - -private: - error_category(); - error_category(const error_category&);// = delete; - error_category& operator=(const error_category&);// = delete; - -public: - virtual const char* name() const = 0; - virtual error_condition default_error_condition(int _ev) const; - virtual bool equivalent(int _code, const error_condition& _condition) const; - virtual bool equivalent(const error_code& _code, int _condition) const; - virtual std::string message(int _ev) const = 0; - - bool operator==(const error_category& _rhs) const {return this == &_rhs;} - - bool operator!=(const error_category& _rhs) const {return !(*this == _rhs);} - - bool operator< (const error_category& _rhs) const {return this < &_rhs;} - - friend class _do_message; -}; - -class _do_message : public error_category -{ -public: - virtual std::string message(int ev) const; -}; - -const error_category& generic_category(); -const error_category& system_category(); - -class error_condition -{ - int _val_; - const error_category* _cat_; -public: - error_condition() : _val_(0), _cat_(&generic_category()) {} - - error_condition(int _val, const error_category& _cat) - : _val_(_val), _cat_(&_cat) {} - - template - error_condition(E _e, typename enable_if_c< - is_error_condition_enum::value - >::type* = 0) - {*this = make_error_condition(_e);} - - void assign(int _val, const error_category& _cat) { - _val_ = _val; - _cat_ = &_cat; - } - - template - typename enable_if_c - < - is_error_condition_enum::value, - error_condition& - >::type - operator=(E _e) - {*this = make_error_condition(_e); return *this;} - - void clear() { - _val_ = 0; - _cat_ = &generic_category(); - } - - int value() const {return _val_;} - - const error_category& category() const {return *_cat_;} - std::string message() const; - - // explicit - operator bool() const {return _val_ != 0;} -}; - -inline error_condition make_error_condition(errc _e) { - return error_condition(static_cast(_e), generic_category()); -} - -inline bool operator<(const error_condition& _x, const error_condition& _y) { - return _x.category() < _y.category() - || _x.category() == _y.category() && _x.value() < _y.value(); -} - -// error_code - -class error_code { - int _val_; - const error_category* _cat_; -public: - error_code() : _val_(0), _cat_(&system_category()) {} - - error_code(int _val, const error_category& _cat) - : _val_(_val), _cat_(&_cat) {} - - template - error_code(E _e, typename enable_if_c< - is_error_code_enum::value - >::type* = 0) { - *this = make_error_code(_e); - } - - void assign(int _val, const error_category& _cat) { - _val_ = _val; - _cat_ = &_cat; - } - - template - typename enable_if_c - < - is_error_code_enum::value, - error_code& - >::type - operator=(E _e) - {*this = make_error_code(_e); return *this;} - - void clear() { - _val_ = 0; - _cat_ = &system_category(); - } - - int value() const {return _val_;} - - const error_category& category() const {return *_cat_;} - - error_condition default_error_condition() const - {return _cat_->default_error_condition(_val_);} - - std::string message() const; - - // explicit - operator bool() const {return _val_ != 0;} -}; - -inline error_code make_error_code(errc _e) { - return error_code(static_cast(_e), generic_category()); -} - -inline bool operator<(const error_code& _x, const error_code& _y) { - return _x.category() < _y.category() - || _x.category() == _y.category() && _x.value() < _y.value(); -} - -inline bool operator==(const error_code& _x, const error_code& _y) { - return _x.category() == _y.category() && _x.value() == _y.value(); -} - -inline bool operator==(const error_code& _x, const error_condition& _y) { - return _x.category().equivalent(_x.value(), _y) - || _y.category().equivalent(_x, _y.value()); -} - -inline bool operator==(const error_condition& _x, const error_code& _y) { - return _y == _x; -} - -inline bool operator==(const error_condition& _x, const error_condition& _y) { - return _x.category() == _y.category() && _x.value() == _y.value(); -} - -inline bool operator!=(const error_code& _x, const error_code& _y) { - return !(_x == _y); -} - -inline bool operator!=(const error_code& _x, const error_condition& _y) { - return !(_x == _y); -} - -inline bool operator!=(const error_condition& _x, const error_code& _y) { - return !(_x == _y); -} - -inline bool operator!=(const error_condition& _x, const error_condition& _y) { - return !(_x == _y); -} - -// system_error - -class system_error : public std::runtime_error { - error_code _ec_; -public: - system_error(error_code _ec, const std::string& _what_arg); - system_error(error_code _ec, const char* _what_arg); - system_error(error_code _ec); - system_error(int _ev, const error_category& _ecat, - const std::string& _what_arg); - system_error(int _ev, const error_category& _ecat, const char* _what_arg); - system_error(int _ev, const error_category& _ecat); - ~system_error() throw(); - - const error_code& code() const throw() {return _ec_;} - -private: - static std::string _init(const error_code&, std::string); -}; - -void _throw_system_error(int ev, const char* what_arg); - -} // end namespace llvm - -#ifdef LLVM_ON_WIN32 -#include -#include - -namespace llvm { - -// To construct an error_code after a API error: -// -// error_code( ::GetLastError(), system_category() ) -struct windows_error { -enum _ { - success = 0, - // These names and values are based on Windows winerror.h - invalid_function = ERROR_INVALID_FUNCTION, - file_not_found = ERROR_FILE_NOT_FOUND, - path_not_found = ERROR_PATH_NOT_FOUND, - too_many_open_files = ERROR_TOO_MANY_OPEN_FILES, - access_denied = ERROR_ACCESS_DENIED, - invalid_handle = ERROR_INVALID_HANDLE, - arena_trashed = ERROR_ARENA_TRASHED, - not_enough_memory = ERROR_NOT_ENOUGH_MEMORY, - invalid_block = ERROR_INVALID_BLOCK, - bad_environment = ERROR_BAD_ENVIRONMENT, - bad_format = ERROR_BAD_FORMAT, - invalid_access = ERROR_INVALID_ACCESS, - outofmemory = ERROR_OUTOFMEMORY, - invalid_drive = ERROR_INVALID_DRIVE, - current_directory = ERROR_CURRENT_DIRECTORY, - not_same_device = ERROR_NOT_SAME_DEVICE, - no_more_files = ERROR_NO_MORE_FILES, - write_protect = ERROR_WRITE_PROTECT, - bad_unit = ERROR_BAD_UNIT, - not_ready = ERROR_NOT_READY, - bad_command = ERROR_BAD_COMMAND, - crc = ERROR_CRC, - bad_length = ERROR_BAD_LENGTH, - seek = ERROR_SEEK, - not_dos_disk = ERROR_NOT_DOS_DISK, - sector_not_found = ERROR_SECTOR_NOT_FOUND, - out_of_paper = ERROR_OUT_OF_PAPER, - write_fault = ERROR_WRITE_FAULT, - read_fault = ERROR_READ_FAULT, - gen_failure = ERROR_GEN_FAILURE, - sharing_violation = ERROR_SHARING_VIOLATION, - lock_violation = ERROR_LOCK_VIOLATION, - wrong_disk = ERROR_WRONG_DISK, - sharing_buffer_exceeded = ERROR_SHARING_BUFFER_EXCEEDED, - handle_eof = ERROR_HANDLE_EOF, - handle_disk_full= ERROR_HANDLE_DISK_FULL, - rem_not_list = ERROR_REM_NOT_LIST, - dup_name = ERROR_DUP_NAME, - bad_net_path = ERROR_BAD_NETPATH, - network_busy = ERROR_NETWORK_BUSY, - // ... - file_exists = ERROR_FILE_EXISTS, - cannot_make = ERROR_CANNOT_MAKE, - // ... - broken_pipe = ERROR_BROKEN_PIPE, - open_failed = ERROR_OPEN_FAILED, - buffer_overflow = ERROR_BUFFER_OVERFLOW, - disk_full= ERROR_DISK_FULL, - // ... - lock_failed = ERROR_LOCK_FAILED, - busy = ERROR_BUSY, - cancel_violation = ERROR_CANCEL_VIOLATION, - already_exists = ERROR_ALREADY_EXISTS - // ... - - // TODO: add more Windows errors -}; - _ v_; - - windows_error(_ v) : v_(v) {} - explicit windows_error(DWORD v) : v_(_(v)) {} - operator int() const {return v_;} -}; - - -template <> struct is_error_code_enum : true_type { }; - -template <> struct is_error_code_enum : true_type { }; - -inline error_code make_error_code(windows_error e) { - return error_code(static_cast(e), system_category()); -} - -} // end namespace llvm - -#endif // LLVM_ON_WINDOWS - -#endif From rafael.espindola at gmail.com Tue Nov 16 12:34:08 2010 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Tue, 16 Nov 2010 18:34:08 -0000 Subject: [llvm-commits] [llvm] r119362 - /llvm/trunk/lib/MC/MCParser/AsmParser.cpp Message-ID: <20101116183408.0C7312A6C12C@llvm.org> Author: rafael Date: Tue Nov 16 12:34:07 2010 New Revision: 119362 URL: http://llvm.org/viewvc/llvm-project?rev=119362&view=rev Log: Parse and ignore some .cfi_* directives. Modified: llvm/trunk/lib/MC/MCParser/AsmParser.cpp Modified: llvm/trunk/lib/MC/MCParser/AsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCParser/AsmParser.cpp?rev=119362&r1=119361&r2=119362&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCParser/AsmParser.cpp (original) +++ llvm/trunk/lib/MC/MCParser/AsmParser.cpp Tue Nov 16 12:34:07 2010 @@ -238,6 +238,22 @@ AddDirectiveHandler<&GenericAsmParser::ParseDirectiveLoc>(".loc"); AddDirectiveHandler<&GenericAsmParser::ParseDirectiveStabs>(".stabs"); + // CFI directives. + AddDirectiveHandler<&GenericAsmParser::ParseDirectiveCFIStartProc>( + ".cfi_startproc"); + AddDirectiveHandler<&GenericAsmParser::ParseDirectiveCFIEndProc>( + ".cfi_endproc"); + AddDirectiveHandler<&GenericAsmParser::ParseDirectiveCFIDefCfaOffset>( + ".cfi_def_cfa_offset"); + AddDirectiveHandler<&GenericAsmParser::ParseDirectiveCFIDefCfaRegister>( + ".cfi_def_cfa_register"); + AddDirectiveHandler<&GenericAsmParser::ParseDirectiveCFIOffset>( + ".cfi_offset"); + AddDirectiveHandler< + &GenericAsmParser::ParseDirectiveCFIPersonalityOrLsda>(".cfi_personality"); + AddDirectiveHandler< + &GenericAsmParser::ParseDirectiveCFIPersonalityOrLsda>(".cfi_lsda"); + // Macro directives. AddDirectiveHandler<&GenericAsmParser::ParseDirectiveMacrosOnOff>( ".macros_on"); @@ -255,6 +271,12 @@ bool ParseDirectiveLine(StringRef, SMLoc DirectiveLoc); bool ParseDirectiveLoc(StringRef, SMLoc DirectiveLoc); bool ParseDirectiveStabs(StringRef, SMLoc DirectiveLoc); + bool ParseDirectiveCFIStartProc(StringRef, SMLoc DirectiveLoc); + bool ParseDirectiveCFIEndProc(StringRef, SMLoc DirectiveLoc); + bool ParseDirectiveCFIDefCfaOffset(StringRef, SMLoc DirectiveLoc); + bool ParseDirectiveCFIDefCfaRegister(StringRef, SMLoc DirectiveLoc); + bool ParseDirectiveCFIOffset(StringRef, SMLoc DirectiveLoc); + bool ParseDirectiveCFIPersonalityOrLsda(StringRef, SMLoc DirectiveLoc); bool ParseDirectiveMacrosOnOff(StringRef, SMLoc DirectiveLoc); bool ParseDirectiveMacro(StringRef, SMLoc DirectiveLoc); @@ -2116,6 +2138,79 @@ return TokError("unsupported directive '" + Directive + "'"); } +/// ParseDirectiveCFIStartProc +/// ::= .cfi_startproc +bool GenericAsmParser::ParseDirectiveCFIStartProc(StringRef, + SMLoc DirectiveLoc) { + return false; +} + +/// ParseDirectiveCFIEndProc +/// ::= .cfi_endproc +bool GenericAsmParser::ParseDirectiveCFIEndProc(StringRef, SMLoc DirectiveLoc) { + return false; +} + +/// ParseDirectiveCFIDefCfaOffset +/// ::= .cfi_def_cfa_offset offset +bool GenericAsmParser::ParseDirectiveCFIDefCfaOffset(StringRef, + SMLoc DirectiveLoc) { + int64_t Offset = 0; + if (getParser().ParseAbsoluteExpression(Offset)) + return true; + + return false; +} + +/// ParseDirectiveCFIDefCfaRegister +/// ::= .cfi_def_cfa_register register +bool GenericAsmParser::ParseDirectiveCFIDefCfaRegister(StringRef, + SMLoc DirectiveLoc) { + int64_t Register = 0; + if (getParser().ParseAbsoluteExpression(Register)) + return true; + return false; +} + +/// ParseDirectiveCFIOffset +/// ::= .cfi_off register, offset +bool GenericAsmParser::ParseDirectiveCFIOffset(StringRef, SMLoc DirectiveLoc) { + int64_t Register = 0; + int64_t Offset = 0; + if (getParser().ParseAbsoluteExpression(Register)) + return true; + + if (getLexer().isNot(AsmToken::Comma)) + return TokError("unexpected token in directive"); + Lex(); + + if (getParser().ParseAbsoluteExpression(Offset)) + return true; + + return false; +} + +/// ParseDirectiveCFIPersonalityOrLsda +/// ::= .cfi_personality encoding, [symbol_name] +/// ::= .cfi_lsda encoding, [symbol_name] +bool GenericAsmParser::ParseDirectiveCFIPersonalityOrLsda(StringRef, + SMLoc DirectiveLoc) { + int64_t Encoding = 0; + if (getParser().ParseAbsoluteExpression(Encoding)) + return true; + if (Encoding == 255) + return false; + + if (getLexer().isNot(AsmToken::Comma)) + return TokError("unexpected token in directive"); + Lex(); + + StringRef Name; + if (getParser().ParseIdentifier(Name)) + return TokError("expected identifier in directive"); + return false; +} + /// ParseDirectiveMacrosOnOff /// ::= .macros_on /// ::= .macros_off From bob.wilson at apple.com Tue Nov 16 12:43:07 2010 From: bob.wilson at apple.com (Bob Wilson) Date: Tue, 16 Nov 2010 18:43:07 -0000 Subject: [llvm-commits] [llvm] r119363 - /llvm/trunk/utils/TableGen/NeonEmitter.cpp Message-ID: <20101116184307.9CB9F2A6C12C@llvm.org> Author: bwilson Date: Tue Nov 16 12:43:07 2010 New Revision: 119363 URL: http://llvm.org/viewvc/llvm-project?rev=119363&view=rev Log: Revert "Stop using struct wrappers for Neon vector types in ." It's breaking buildbots. Modified: llvm/trunk/utils/TableGen/NeonEmitter.cpp Modified: llvm/trunk/utils/TableGen/NeonEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/NeonEmitter.cpp?rev=119363&r1=119362&r2=119363&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/NeonEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/NeonEmitter.cpp Tue Nov 16 12:43:07 2010 @@ -535,8 +535,10 @@ } // Generate the definition for this intrinsic, e.g. "a + b" for OpAdd. +// If structTypes is true, the NEON types are structs of vector types rather +// than vector types, and the call becomes "a.val + b.val" static std::string GenOpString(OpKind op, const std::string &proto, - StringRef typestr) { + StringRef typestr, bool structTypes = true) { bool dummy, quad = false; char type = ClassifyType(typestr, quad, dummy, dummy); unsigned nElts = 0; @@ -555,95 +557,100 @@ s = "union { " + ts + " r; double d; } u; u.d"; } else { s = ts + " r; r"; + if (structTypes) + s += ".val"; } s += " = "; + std::string a, b, c; + if (proto.size() > 1) + a = (structTypes && proto[1] != 'l' && proto[1] != 's') ? "a.val" : "a"; + b = structTypes ? "b.val" : "b"; + c = structTypes ? "c.val" : "c"; + switch(op) { case OpAdd: - s += "a + b"; + s += a + " + " + b; break; case OpSub: - s += "a - b"; + s += a + " - " + b; break; case OpMulN: - s += "a * " + Duplicate(nElts << (int)quad, typestr, "b"); - break; + b = Duplicate(nElts << (int)quad, typestr, "b"); case OpMul: - s += "a * b"; + s += a + " * " + b; break; case OpMlaN: - s += "a + (b * " + Duplicate(nElts << (int)quad, typestr, "c") + ")"; - break; + c = Duplicate(nElts << (int)quad, typestr, "c"); case OpMla: - s += "a + (b * c)"; + s += a + " + ( " + b + " * " + c + " )"; break; case OpMlsN: - s += "a - (b * " + Duplicate(nElts << (int)quad, typestr, "c") + ")"; - break; + c = Duplicate(nElts << (int)quad, typestr, "c"); case OpMls: - s += "a - (b * c)"; + s += a + " - ( " + b + " * " + c + " )"; break; case OpEq: - s += "(__neon_" + ts + ")(a == b)"; + s += "(__neon_" + ts + ")(" + a + " == " + b + ")"; break; case OpGe: - s += "(__neon_" + ts + ")(a >= b)"; + s += "(__neon_" + ts + ")(" + a + " >= " + b + ")"; break; case OpLe: - s += "(__neon_" + ts + ")(a <= b)"; + s += "(__neon_" + ts + ")(" + a + " <= " + b + ")"; break; case OpGt: - s += "(__neon_" + ts + ")(a > b)"; + s += "(__neon_" + ts + ")(" + a + " > " + b + ")"; break; case OpLt: - s += "(__neon_" + ts + ")(a < b)"; + s += "(__neon_" + ts + ")(" + a + " < " + b + ")"; break; case OpNeg: - s += " -a"; + s += " -" + a; break; case OpNot: - s += " ~a"; + s += " ~" + a; break; case OpAnd: - s += "a & b"; + s += a + " & " + b; break; case OpOr: - s += "a | b"; + s += a + " | " + b; break; case OpXor: - s += "a ^ b"; + s += a + " ^ " + b; break; case OpAndNot: - s += "a & ~b"; + s += a + " & ~" + b; break; case OpOrNot: - s += "a | ~b"; + s += a + " | ~" + b; break; case OpCast: - s += "(__neon_" + ts + ")a"; + s += "(__neon_" + ts + ")" + a; break; case OpConcat: - s += "__builtin_shufflevector((__neon_int64x1_t)a"; - s += ", (__neon_int64x1_t)b, 0, 1)"; + s += "__builtin_shufflevector((__neon_int64x1_t)" + a; + s += ", (__neon_int64x1_t)" + b + ", 0, 1)"; break; case OpHi: - s += "(((__neon_float64x2_t)a)[1])"; + s += "(((__neon_float64x2_t)" + a + ")[1])"; break; case OpLo: - s += "(((__neon_float64x2_t)a)[0])"; + s += "(((__neon_float64x2_t)" + a + ")[0])"; break; case OpDup: - s += Duplicate(nElts << (int)quad, typestr, "a"); + s += Duplicate(nElts << (int)quad, typestr, a); break; case OpSelect: // ((0 & 1) | (~0 & 2)) ts = TypeString(proto[1], typestr); - s += "(a & (__neon_" + ts + ")b) | "; - s += "(~a & (__neon_" + ts + ")c)"; + s += "( " + a + " & (__neon_" + ts + ")" + b + ") | "; + s += "(~" + a + " & (__neon_" + ts + ")" + c + ")"; break; case OpRev16: - s += "__builtin_shufflevector(a, a"; + s += "__builtin_shufflevector(" + a + ", " + a; for (unsigned i = 2; i <= nElts << (int)quad; i += 2) for (unsigned j = 0; j != 2; ++j) s += ", " + utostr(i - j - 1); @@ -651,14 +658,14 @@ break; case OpRev32: nElts >>= 1; - s += "__builtin_shufflevector(a, a"; + s += "__builtin_shufflevector(" + a + ", " + a; for (unsigned i = nElts; i <= nElts << (1 + (int)quad); i += nElts) for (unsigned j = 0; j != nElts; ++j) s += ", " + utostr(i - j - 1); s += ")"; break; case OpRev64: - s += "__builtin_shufflevector(a, a"; + s += "__builtin_shufflevector(" + a + ", " + a; for (unsigned i = nElts; i <= nElts << (int)quad; i += nElts) for (unsigned j = 0; j != nElts; ++j) s += ", " + utostr(i - j - 1); @@ -727,8 +734,11 @@ } // Generate the definition for this intrinsic, e.g. __builtin_neon_cls(a) +// If structTypes is true, the NEON types are structs of vector types rather +// than vector types, and the call becomes __builtin_neon_cls(a.val) static std::string GenBuiltin(const std::string &name, const std::string &proto, - StringRef typestr, ClassKind ck) { + StringRef typestr, ClassKind ck, + bool structTypes = true) { bool dummy, quad = false; char type = ClassifyType(typestr, quad, dummy, dummy); unsigned nElts = 0; @@ -767,11 +777,15 @@ if (sret) s += "({ " + ts + " r; "; else if (proto[0] != 's') - s += "(" + ts + ")"; + s += "(" + ts + "){(__neon_" + ts + ")"; } else if (sret) { s += ts + " r; "; } else { - s += ts + " r; r = "; + s += ts + " r; r"; + if (structTypes && proto[0] != 's' && proto[0] != 'i' && proto[0] != 'l') + s += ".val"; + + s += " = "; } } @@ -798,9 +812,9 @@ // Handle multiple-vector values specially, emitting each subvector as an // argument to the __builtin. - if (proto[i] == '2' || proto[i] == '3' || proto[i] == '4') { + if (structTypes && (proto[i] == '2' || proto[i] == '3' || proto[i] == '4')){ for (unsigned vi = 0, ve = proto[i] - '0'; vi != ve; ++vi) { - s += args + ".val[" + utostr(vi) + "]"; + s += args + ".val[" + utostr(vi) + "].val"; if ((vi + 1) < ve) s += ", "; } @@ -814,6 +828,11 @@ s += Duplicate(nElts, typestr, args); else s += args; + + if (structTypes && proto[i] != 's' && proto[i] != 'i' && proto[i] != 'l' && + proto[i] != 'p' && proto[i] != 'c' && proto[i] != 'a') { + s += ".val"; + } if ((i + 1) < e) s += ", "; } @@ -831,6 +850,8 @@ if (define) { if (sret) s += "; r; })"; + else if (proto[0] != 's') + s += "}"; } else { s += " return r;"; } @@ -921,15 +942,11 @@ std::string ts = TypeString('d', TDTypeVec[i], vi == 1); std::string vs = TypeString((vi > 1) ? '0' + vi : 'd', TDTypeVec[i]); std::string tag = (vi > 1) ? vs : StructTag(TDTypeVec[i]); - if (vi > 1) { - OS << "typedef struct " << tag << " {\n"; - OS << " " << ts << " val"; + OS << "typedef struct " << tag << " {\n"; + OS << " " << ts << " val"; + if (vi > 1) OS << "[" << utostr(vi) << "]"; - OS << ";\n} "; - } else { - OS << "typedef " << ts << " "; - } - OS << vs << ";\n\n"; + OS << ";\n} " << vs << ";\n\n"; } } From bigcheesegs at gmail.com Tue Nov 16 12:48:21 2010 From: bigcheesegs at gmail.com (Michael J. Spencer) Date: Tue, 16 Nov 2010 18:48:21 -0000 Subject: [llvm-commits] [llvm] r119365 - /llvm/trunk/include/llvm/System/system_error.h Message-ID: <20101116184821.BEE832A6C12C@llvm.org> Author: mspencer Date: Tue Nov 16 12:48:21 2010 New Revision: 119365 URL: http://llvm.org/viewvc/llvm-project?rev=119365&view=rev Log: system_error: More conditional error codes for Darwin. Modified: llvm/trunk/include/llvm/System/system_error.h Modified: llvm/trunk/include/llvm/System/system_error.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/System/system_error.h?rev=119365&r1=119364&r2=119365&view=diff ============================================================================== --- llvm/trunk/include/llvm/System/system_error.h (original) +++ llvm/trunk/include/llvm/System/system_error.h Tue Nov 16 12:48:21 2010 @@ -570,7 +570,11 @@ operation_not_permitted = EPERM, operation_not_supported = EOPNOTSUPP, operation_would_block = EWOULDBLOCK, +#ifdef EOWNERDEAD owner_dead = EOWNERDEAD, +#else + owner_dead = EINVAL, +#endif permission_denied = EACCES, protocol_error = EPROTO, protocol_not_supported = EPROTONOSUPPORT, @@ -578,7 +582,11 @@ resource_deadlock_would_occur = EDEADLK, resource_unavailable_try_again = EAGAIN, result_out_of_range = ERANGE, +#ifdef ENOTRECOVERABLE state_not_recoverable = ENOTRECOVERABLE, +#else + state_not_recoverable = EINVAL, +#endif #ifdef ETIME stream_timeout = ETIME, #else From bob.wilson at apple.com Tue Nov 16 13:16:06 2010 From: bob.wilson at apple.com (Bob Wilson) Date: Tue, 16 Nov 2010 19:16:06 -0000 Subject: [llvm-commits] [llvm] r119367 - /llvm/trunk/utils/TableGen/NeonEmitter.cpp Message-ID: <20101116191606.DA8A22A6C12C@llvm.org> Author: bwilson Date: Tue Nov 16 13:16:06 2010 New Revision: 119367 URL: http://llvm.org/viewvc/llvm-project?rev=119367&view=rev Log: Reapply "Stop using struct wrappers for Neon vector types in ." I've temporarily disabled the failing clang test. Modified: llvm/trunk/utils/TableGen/NeonEmitter.cpp Modified: llvm/trunk/utils/TableGen/NeonEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/NeonEmitter.cpp?rev=119367&r1=119366&r2=119367&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/NeonEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/NeonEmitter.cpp Tue Nov 16 13:16:06 2010 @@ -535,10 +535,8 @@ } // Generate the definition for this intrinsic, e.g. "a + b" for OpAdd. -// If structTypes is true, the NEON types are structs of vector types rather -// than vector types, and the call becomes "a.val + b.val" static std::string GenOpString(OpKind op, const std::string &proto, - StringRef typestr, bool structTypes = true) { + StringRef typestr) { bool dummy, quad = false; char type = ClassifyType(typestr, quad, dummy, dummy); unsigned nElts = 0; @@ -557,100 +555,95 @@ s = "union { " + ts + " r; double d; } u; u.d"; } else { s = ts + " r; r"; - if (structTypes) - s += ".val"; } s += " = "; - std::string a, b, c; - if (proto.size() > 1) - a = (structTypes && proto[1] != 'l' && proto[1] != 's') ? "a.val" : "a"; - b = structTypes ? "b.val" : "b"; - c = structTypes ? "c.val" : "c"; - switch(op) { case OpAdd: - s += a + " + " + b; + s += "a + b"; break; case OpSub: - s += a + " - " + b; + s += "a - b"; break; case OpMulN: - b = Duplicate(nElts << (int)quad, typestr, "b"); + s += "a * " + Duplicate(nElts << (int)quad, typestr, "b"); + break; case OpMul: - s += a + " * " + b; + s += "a * b"; break; case OpMlaN: - c = Duplicate(nElts << (int)quad, typestr, "c"); + s += "a + (b * " + Duplicate(nElts << (int)quad, typestr, "c") + ")"; + break; case OpMla: - s += a + " + ( " + b + " * " + c + " )"; + s += "a + (b * c)"; break; case OpMlsN: - c = Duplicate(nElts << (int)quad, typestr, "c"); + s += "a - (b * " + Duplicate(nElts << (int)quad, typestr, "c") + ")"; + break; case OpMls: - s += a + " - ( " + b + " * " + c + " )"; + s += "a - (b * c)"; break; case OpEq: - s += "(__neon_" + ts + ")(" + a + " == " + b + ")"; + s += "(__neon_" + ts + ")(a == b)"; break; case OpGe: - s += "(__neon_" + ts + ")(" + a + " >= " + b + ")"; + s += "(__neon_" + ts + ")(a >= b)"; break; case OpLe: - s += "(__neon_" + ts + ")(" + a + " <= " + b + ")"; + s += "(__neon_" + ts + ")(a <= b)"; break; case OpGt: - s += "(__neon_" + ts + ")(" + a + " > " + b + ")"; + s += "(__neon_" + ts + ")(a > b)"; break; case OpLt: - s += "(__neon_" + ts + ")(" + a + " < " + b + ")"; + s += "(__neon_" + ts + ")(a < b)"; break; case OpNeg: - s += " -" + a; + s += " -a"; break; case OpNot: - s += " ~" + a; + s += " ~a"; break; case OpAnd: - s += a + " & " + b; + s += "a & b"; break; case OpOr: - s += a + " | " + b; + s += "a | b"; break; case OpXor: - s += a + " ^ " + b; + s += "a ^ b"; break; case OpAndNot: - s += a + " & ~" + b; + s += "a & ~b"; break; case OpOrNot: - s += a + " | ~" + b; + s += "a | ~b"; break; case OpCast: - s += "(__neon_" + ts + ")" + a; + s += "(__neon_" + ts + ")a"; break; case OpConcat: - s += "__builtin_shufflevector((__neon_int64x1_t)" + a; - s += ", (__neon_int64x1_t)" + b + ", 0, 1)"; + s += "__builtin_shufflevector((__neon_int64x1_t)a"; + s += ", (__neon_int64x1_t)b, 0, 1)"; break; case OpHi: - s += "(((__neon_float64x2_t)" + a + ")[1])"; + s += "(((__neon_float64x2_t)a)[1])"; break; case OpLo: - s += "(((__neon_float64x2_t)" + a + ")[0])"; + s += "(((__neon_float64x2_t)a)[0])"; break; case OpDup: - s += Duplicate(nElts << (int)quad, typestr, a); + s += Duplicate(nElts << (int)quad, typestr, "a"); break; case OpSelect: // ((0 & 1) | (~0 & 2)) ts = TypeString(proto[1], typestr); - s += "( " + a + " & (__neon_" + ts + ")" + b + ") | "; - s += "(~" + a + " & (__neon_" + ts + ")" + c + ")"; + s += "(a & (__neon_" + ts + ")b) | "; + s += "(~a & (__neon_" + ts + ")c)"; break; case OpRev16: - s += "__builtin_shufflevector(" + a + ", " + a; + s += "__builtin_shufflevector(a, a"; for (unsigned i = 2; i <= nElts << (int)quad; i += 2) for (unsigned j = 0; j != 2; ++j) s += ", " + utostr(i - j - 1); @@ -658,14 +651,14 @@ break; case OpRev32: nElts >>= 1; - s += "__builtin_shufflevector(" + a + ", " + a; + s += "__builtin_shufflevector(a, a"; for (unsigned i = nElts; i <= nElts << (1 + (int)quad); i += nElts) for (unsigned j = 0; j != nElts; ++j) s += ", " + utostr(i - j - 1); s += ")"; break; case OpRev64: - s += "__builtin_shufflevector(" + a + ", " + a; + s += "__builtin_shufflevector(a, a"; for (unsigned i = nElts; i <= nElts << (int)quad; i += nElts) for (unsigned j = 0; j != nElts; ++j) s += ", " + utostr(i - j - 1); @@ -734,11 +727,8 @@ } // Generate the definition for this intrinsic, e.g. __builtin_neon_cls(a) -// If structTypes is true, the NEON types are structs of vector types rather -// than vector types, and the call becomes __builtin_neon_cls(a.val) static std::string GenBuiltin(const std::string &name, const std::string &proto, - StringRef typestr, ClassKind ck, - bool structTypes = true) { + StringRef typestr, ClassKind ck) { bool dummy, quad = false; char type = ClassifyType(typestr, quad, dummy, dummy); unsigned nElts = 0; @@ -777,15 +767,11 @@ if (sret) s += "({ " + ts + " r; "; else if (proto[0] != 's') - s += "(" + ts + "){(__neon_" + ts + ")"; + s += "(" + ts + ")"; } else if (sret) { s += ts + " r; "; } else { - s += ts + " r; r"; - if (structTypes && proto[0] != 's' && proto[0] != 'i' && proto[0] != 'l') - s += ".val"; - - s += " = "; + s += ts + " r; r = "; } } @@ -812,9 +798,9 @@ // Handle multiple-vector values specially, emitting each subvector as an // argument to the __builtin. - if (structTypes && (proto[i] == '2' || proto[i] == '3' || proto[i] == '4')){ + if (proto[i] == '2' || proto[i] == '3' || proto[i] == '4') { for (unsigned vi = 0, ve = proto[i] - '0'; vi != ve; ++vi) { - s += args + ".val[" + utostr(vi) + "].val"; + s += args + ".val[" + utostr(vi) + "]"; if ((vi + 1) < ve) s += ", "; } @@ -828,11 +814,6 @@ s += Duplicate(nElts, typestr, args); else s += args; - - if (structTypes && proto[i] != 's' && proto[i] != 'i' && proto[i] != 'l' && - proto[i] != 'p' && proto[i] != 'c' && proto[i] != 'a') { - s += ".val"; - } if ((i + 1) < e) s += ", "; } @@ -850,8 +831,6 @@ if (define) { if (sret) s += "; r; })"; - else if (proto[0] != 's') - s += "}"; } else { s += " return r;"; } @@ -942,11 +921,15 @@ std::string ts = TypeString('d', TDTypeVec[i], vi == 1); std::string vs = TypeString((vi > 1) ? '0' + vi : 'd', TDTypeVec[i]); std::string tag = (vi > 1) ? vs : StructTag(TDTypeVec[i]); - OS << "typedef struct " << tag << " {\n"; - OS << " " << ts << " val"; - if (vi > 1) + if (vi > 1) { + OS << "typedef struct " << tag << " {\n"; + OS << " " << ts << " val"; OS << "[" << utostr(vi) << "]"; - OS << ";\n} " << vs << ";\n\n"; + OS << ";\n} "; + } else { + OS << "typedef " << ts << " "; + } + OS << vs << ";\n\n"; } } From bob.wilson at apple.com Tue Nov 16 13:39:14 2010 From: bob.wilson at apple.com (Bob Wilson) Date: Tue, 16 Nov 2010 19:39:14 -0000 Subject: [llvm-commits] [llvm] r119369 - /llvm/trunk/utils/TableGen/NeonEmitter.cpp Message-ID: <20101116193914.5DD922A6C12C@llvm.org> Author: bwilson Date: Tue Nov 16 13:39:14 2010 New Revision: 119369 URL: http://llvm.org/viewvc/llvm-project?rev=119369&view=rev Log: Tidy up some things in . Stop defining types with "__neon_" prefixes and then using typedefs without the prefix; there's no reason to do that anymore. Remove types that combine multiple Neon vectors and treat them as a single long vector; they are not used. Modified: llvm/trunk/utils/TableGen/NeonEmitter.cpp Modified: llvm/trunk/utils/TableGen/NeonEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/NeonEmitter.cpp?rev=119369&r1=119368&r2=119369&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/NeonEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/NeonEmitter.cpp Tue Nov 16 13:39:14 2010 @@ -189,10 +189,8 @@ } /// TypeString - for a modifier and type, generate the name of the typedef for -/// that type. If generic is true, emit the generic vector type rather than -/// the public NEON type. QUc -> uint8x8_t / __neon_uint8x8_t. -static std::string TypeString(const char mod, StringRef typestr, - bool generic = false) { +/// that type. QUc -> uint8x8_t. +static std::string TypeString(const char mod, StringRef typestr) { bool quad = false; bool poly = false; bool usgn = false; @@ -213,9 +211,6 @@ SmallString<128> s; - if (generic) - s += "__neon_"; - if (usgn) s.push_back('u'); @@ -371,52 +366,6 @@ return quad ? "V16c" : "V8c"; } -/// StructTag - generate the name of the struct tag for a type. -/// These names are mandated by ARM's ABI. -static std::string StructTag(StringRef typestr) { - bool quad = false; - bool poly = false; - bool usgn = false; - - // base type to get the type string for. - char type = ClassifyType(typestr, quad, poly, usgn); - - SmallString<128> s; - s += "__simd"; - s += quad ? "128_" : "64_"; - if (usgn) - s.push_back('u'); - - switch (type) { - case 'c': - s += poly ? "poly8" : "int8"; - break; - case 's': - s += poly ? "poly16" : "int16"; - break; - case 'i': - s += "int32"; - break; - case 'l': - s += "int64"; - break; - case 'h': - s += "float16"; - break; - case 'f': - s += "float32"; - break; - default: - throw "unhandled type!"; - break; - } - - // Append _t, finishing the struct tag name. - s += "_t"; - - return s.str(); -} - /// MangleName - Append a type or width suffix to a base neon function name, /// and insert a 'q' in the appropriate location if the operation works on /// 128b rather than 64b. E.g. turn "vst2_lane" into "vst2q_lane_f32", etc. @@ -523,7 +472,7 @@ const std::string &a) { std::string s; - s = "(__neon_" + TypeString('d', typestr) + "){ "; + s = "(" + TypeString('d', typestr) + "){ "; for (unsigned i = 0; i != nElts; ++i) { s += a; if ((i + 1) < nElts) @@ -585,19 +534,19 @@ s += "a - (b * c)"; break; case OpEq: - s += "(__neon_" + ts + ")(a == b)"; + s += "(" + ts + ")(a == b)"; break; case OpGe: - s += "(__neon_" + ts + ")(a >= b)"; + s += "(" + ts + ")(a >= b)"; break; case OpLe: - s += "(__neon_" + ts + ")(a <= b)"; + s += "(" + ts + ")(a <= b)"; break; case OpGt: - s += "(__neon_" + ts + ")(a > b)"; + s += "(" + ts + ")(a > b)"; break; case OpLt: - s += "(__neon_" + ts + ")(a < b)"; + s += "(" + ts + ")(a < b)"; break; case OpNeg: s += " -a"; @@ -621,17 +570,17 @@ s += "a | ~b"; break; case OpCast: - s += "(__neon_" + ts + ")a"; + s += "(" + ts + ")a"; break; case OpConcat: - s += "__builtin_shufflevector((__neon_int64x1_t)a"; - s += ", (__neon_int64x1_t)b, 0, 1)"; + s += "__builtin_shufflevector((int64x1_t)a"; + s += ", (int64x1_t)b, 0, 1)"; break; case OpHi: - s += "(((__neon_float64x2_t)a)[1])"; + s += "(((float64x2_t)a)[1])"; break; case OpLo: - s += "(((__neon_float64x2_t)a)[0])"; + s += "(((float64x2_t)a)[0])"; break; case OpDup: s += Duplicate(nElts << (int)quad, typestr, "a"); @@ -639,8 +588,8 @@ case OpSelect: // ((0 & 1) | (~0 & 2)) ts = TypeString(proto[1], typestr); - s += "(a & (__neon_" + ts + ")b) | "; - s += "(~a & (__neon_" + ts + ")c)"; + s += "(a & (" + ts + ")b) | "; + s += "(~a & (" + ts + ")c)"; break; case OpRev16: s += "__builtin_shufflevector(a, a"; @@ -891,44 +840,34 @@ ParseTypes(0, TypedefTypes, TDTypeVec); // Emit vector typedefs. - for (unsigned v = 1; v != 5; ++v) { - for (unsigned i = 0, e = TDTypeVec.size(); i != e; ++i) { - bool dummy, quad = false; - (void) ClassifyType(TDTypeVec[i], quad, dummy, dummy); - OS << "typedef __attribute__(( __vector_size__("; + for (unsigned i = 0, e = TDTypeVec.size(); i != e; ++i) { + bool dummy, quad = false; + (void) ClassifyType(TDTypeVec[i], quad, dummy, dummy); + OS << "typedef __attribute__(( __vector_size__("; + + OS << utostr(8*(quad ? 2 : 1)) << ") )) "; + if (!quad) + OS << " "; - OS << utostr(8*v*(quad ? 2 : 1)) << ") )) "; - if (!quad && v == 1) - OS << " "; - - OS << TypeString('s', TDTypeVec[i]); - OS << " __neon_"; - - char t = (v == 1) ? 'd' : '0' + v; - OS << TypeString(t, TDTypeVec[i]) << ";\n"; - } + OS << TypeString('s', TDTypeVec[i]); + OS << " " << TypeString('d', TDTypeVec[i]) << ";\n"; } OS << "\n"; OS << "typedef __attribute__(( __vector_size__(8) )) " - "double __neon_float64x1_t;\n"; + "double float64x1_t;\n"; OS << "typedef __attribute__(( __vector_size__(16) )) " - "double __neon_float64x2_t;\n"; + "double float64x2_t;\n"; OS << "\n"; // Emit struct typedefs. - for (unsigned vi = 1; vi != 5; ++vi) { + for (unsigned vi = 2; vi != 5; ++vi) { for (unsigned i = 0, e = TDTypeVec.size(); i != e; ++i) { - std::string ts = TypeString('d', TDTypeVec[i], vi == 1); - std::string vs = TypeString((vi > 1) ? '0' + vi : 'd', TDTypeVec[i]); - std::string tag = (vi > 1) ? vs : StructTag(TDTypeVec[i]); - if (vi > 1) { - OS << "typedef struct " << tag << " {\n"; - OS << " " << ts << " val"; - OS << "[" << utostr(vi) << "]"; - OS << ";\n} "; - } else { - OS << "typedef " << ts << " "; - } + std::string ts = TypeString('d', TDTypeVec[i]); + std::string vs = TypeString('0' + vi, TDTypeVec[i]); + OS << "typedef struct " << vs << " {\n"; + OS << " " << ts << " val"; + OS << "[" << utostr(vi) << "]"; + OS << ";\n} "; OS << vs << ";\n\n"; } } From peter at pcc.me.uk Tue Nov 16 13:40:13 2010 From: peter at pcc.me.uk (Peter Collingbourne) Date: Tue, 16 Nov 2010 19:40:13 -0000 Subject: [llvm-commits] [llvm] r119370 - in /llvm/trunk/docs/CommandGuide: llc.pod lli.pod Message-ID: <20101116194013.408CB2A6C12C@llvm.org> Author: pcc Date: Tue Nov 16 13:40:13 2010 New Revision: 119370 URL: http://llvm.org/viewvc/llvm-project?rev=119370&view=rev Log: Document -enable-no-infs-fp-math and -enable-no-nans-fp-math command line options Modified: llvm/trunk/docs/CommandGuide/llc.pod llvm/trunk/docs/CommandGuide/lli.pod Modified: llvm/trunk/docs/CommandGuide/llc.pod URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CommandGuide/llc.pod?rev=119370&r1=119369&r2=119370&view=diff ============================================================================== --- llvm/trunk/docs/CommandGuide/llc.pod (original) +++ llvm/trunk/docs/CommandGuide/llc.pod Tue Nov 16 13:40:13 2010 @@ -84,6 +84,14 @@ Note that this option can dramatically slow down code on some systems (e.g. X86). +=item B<--enable-no-infs-fp-math> + +Enable optimizations that assume no Inf values. + +=item B<--enable-no-nans-fp-math> + +Enable optimizations that assume no NAN values. + =item B<--enable-unsafe-fp-math> Enable optimizations that make unsafe assumptions about IEEE math (e.g. that Modified: llvm/trunk/docs/CommandGuide/lli.pod URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CommandGuide/lli.pod?rev=119370&r1=119369&r2=119370&view=diff ============================================================================== --- llvm/trunk/docs/CommandGuide/lli.pod (original) +++ llvm/trunk/docs/CommandGuide/lli.pod Tue Nov 16 13:40:13 2010 @@ -102,10 +102,13 @@ Disable optimizations that may increase floating point precision. -=item B<-enable-finite-only-fp-math> +=item B<-enable-no-infs-fp-math> -Enable optimizations that assumes only finite floating point math. That is, -there is no NAN or Inf values. +Enable optimizations that assume no Inf values. + +=item B<-enable-no-nans-fp-math> + +Enable optimizations that assume no NAN values. =item B<-enable-unsafe-fp-math> From dpatel at apple.com Tue Nov 16 13:50:33 2010 From: dpatel at apple.com (Devang Patel) Date: Tue, 16 Nov 2010 19:50:33 -0000 Subject: [llvm-commits] [test-suite] r119372 - /test-suite/trunk/TEST.simple.Makefile Message-ID: <20101116195033.CD8502A6C12C@llvm.org> Author: dpatel Date: Tue Nov 16 13:50:33 2010 New Revision: 119372 URL: http://llvm.org/viewvc/llvm-project?rev=119372&view=rev Log: Fix header. Modified: test-suite/trunk/TEST.simple.Makefile Modified: test-suite/trunk/TEST.simple.Makefile URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/TEST.simple.Makefile?rev=119372&r1=119371&r2=119372&view=diff ============================================================================== --- test-suite/trunk/TEST.simple.Makefile (original) +++ test-suite/trunk/TEST.simple.Makefile Tue Nov 16 13:50:33 2010 @@ -1,4 +1,4 @@ -##===- TEST.nightly.Makefile ------------------------------*- Makefile -*--===## +##===- TEST.simple.Makefile -------------------------------*- Makefile -*--===## # # This test is used in conjunction with the llvm/utils/NightlyTest* stuff to # generate information about program status for the nightly report. From stoklund at 2pi.dk Tue Nov 16 13:55:12 2010 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Tue, 16 Nov 2010 19:55:12 -0000 Subject: [llvm-commits] [llvm] r119374 - /llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp Message-ID: <20101116195512.B89862A6C12C@llvm.org> Author: stoklund Date: Tue Nov 16 13:55:12 2010 New Revision: 119374 URL: http://llvm.org/viewvc/llvm-project?rev=119374&view=rev Log: Print out the register class of the current interval. Modified: llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp Modified: llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp?rev=119374&r1=119373&r2=119374&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp (original) +++ llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp Tue Nov 16 13:55:12 2010 @@ -954,10 +954,11 @@ /// assignRegOrStackSlotAtInterval - assign a register if one is available, or /// spill. void RALinScan::assignRegOrStackSlotAtInterval(LiveInterval* cur) { - DEBUG(dbgs() << "\tallocating current interval: "); + const TargetRegisterClass *RC = mri_->getRegClass(cur->reg); + DEBUG(dbgs() << "\tallocating current interval from " + << RC->getName() << ": "); // This is an implicitly defined live interval, just assign any register. - const TargetRegisterClass *RC = mri_->getRegClass(cur->reg); if (cur->empty()) { unsigned physReg = vrm_->getRegAllocPref(cur->reg); if (!physReg) From stoklund at 2pi.dk Tue Nov 16 13:55:15 2010 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Tue, 16 Nov 2010 19:55:15 -0000 Subject: [llvm-commits] [llvm] r119375 - /llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Message-ID: <20101116195515.0D2912A6C12D@llvm.org> Author: stoklund Date: Tue Nov 16 13:55:14 2010 New Revision: 119375 URL: http://llvm.org/viewvc/llvm-project?rev=119375&view=rev Log: Fix emergency spilling in LiveIntervals::spillPhysRegAroundRegDefsUses. Always spill the full representative register at any point where any subregister is live. This fixes PR8620 which caused the old logic to get confused and not spill anything at all. The fundamental problem here is that the coalescer is too aggressive about physical register coalescing. It sometimes makes it impossible to allocate registers without these emergency spills. Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=119375&r1=119374&r2=119375&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original) +++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Tue Nov 16 13:55:14 2010 @@ -1928,6 +1928,9 @@ unsigned PhysReg, VirtRegMap &vrm) { unsigned SpillReg = getRepresentativeReg(PhysReg); + DEBUG(dbgs() << "spillPhysRegAroundRegDefsUses " << tri_->getName(PhysReg) + << " represented by " << tri_->getName(SpillReg) << '\n'); + for (const unsigned *AS = tri_->getAliasSet(PhysReg); *AS; ++AS) // If there are registers which alias PhysReg, but which are not a // sub-register of the chosen representative super register. Assert @@ -1939,15 +1942,16 @@ SmallVector PRegs; if (hasInterval(SpillReg)) PRegs.push_back(SpillReg); - else { - SmallSet Added; - for (const unsigned* AS = tri_->getSubRegisters(SpillReg); *AS; ++AS) - if (Added.insert(*AS) && hasInterval(*AS)) { - PRegs.push_back(*AS); - for (const unsigned* ASS = tri_->getSubRegisters(*AS); *ASS; ++ASS) - Added.insert(*ASS); - } - } + for (const unsigned *SR = tri_->getSubRegisters(SpillReg); *SR; ++SR) + if (hasInterval(*SR)) + PRegs.push_back(*SR); + + DEBUG({ + dbgs() << "Trying to spill:"; + for (unsigned i = 0, e = PRegs.size(); i != e; ++i) + dbgs() << ' ' << tri_->getName(PRegs[i]); + dbgs() << '\n'; + }); SmallPtrSet SeenMIs; for (MachineRegisterInfo::reg_iterator I = mri_->reg_begin(li.reg), @@ -1958,18 +1962,16 @@ continue; SeenMIs.insert(MI); SlotIndex Index = getInstructionIndex(MI); + bool LiveReg = false; for (unsigned i = 0, e = PRegs.size(); i != e; ++i) { unsigned PReg = PRegs[i]; LiveInterval &pli = getInterval(PReg); if (!pli.liveAt(Index)) continue; - vrm.addEmergencySpill(PReg, MI); + LiveReg = true; SlotIndex StartIdx = Index.getLoadIndex(); SlotIndex EndIdx = Index.getNextIndex().getBaseIndex(); - if (pli.isInOneLiveRange(StartIdx, EndIdx)) { - pli.removeRange(StartIdx, EndIdx); - Cut = true; - } else { + if (!pli.isInOneLiveRange(StartIdx, EndIdx)) { std::string msg; raw_string_ostream Msg(msg); Msg << "Ran out of registers during register allocation!"; @@ -1980,15 +1982,14 @@ } report_fatal_error(Msg.str()); } - for (const unsigned* AS = tri_->getSubRegisters(PReg); *AS; ++AS) { - if (!hasInterval(*AS)) - continue; - LiveInterval &spli = getInterval(*AS); - if (spli.liveAt(Index)) - spli.removeRange(Index.getLoadIndex(), - Index.getNextIndex().getBaseIndex()); - } + pli.removeRange(StartIdx, EndIdx); + LiveReg = true; } + if (!LiveReg) + continue; + DEBUG(dbgs() << "Emergency spill around " << Index << '\t' << *MI); + vrm.addEmergencySpill(SpillReg, MI); + Cut = true; } return Cut; } From rafael.espindola at gmail.com Tue Nov 16 14:56:24 2010 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Tue, 16 Nov 2010 20:56:24 -0000 Subject: [llvm-commits] [llvm] r119380 - /llvm/trunk/include/llvm/MC/MCDwarf.h Message-ID: <20101116205624.0D6BB2A6C12C@llvm.org> Author: rafael Date: Tue Nov 16 14:56:23 2010 New Revision: 119380 URL: http://llvm.org/viewvc/llvm-project?rev=119380&view=rev Log: Add const. Modified: llvm/trunk/include/llvm/MC/MCDwarf.h Modified: llvm/trunk/include/llvm/MC/MCDwarf.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCDwarf.h?rev=119380&r1=119379&r2=119380&view=diff ============================================================================== --- llvm/trunk/include/llvm/MC/MCDwarf.h (original) +++ llvm/trunk/include/llvm/MC/MCDwarf.h Tue Nov 16 14:56:23 2010 @@ -107,22 +107,22 @@ public: /// getFileNum - Get the FileNum of this MCDwarfLoc. - unsigned getFileNum() { return FileNum; } + unsigned getFileNum() const { return FileNum; } /// getLine - Get the Line of this MCDwarfLoc. - unsigned getLine() { return Line; } + unsigned getLine() const { return Line; } /// getColumn - Get the Column of this MCDwarfLoc. - unsigned getColumn() { return Column; } + unsigned getColumn() const { return Column; } /// getFlags - Get the Flags of this MCDwarfLoc. - unsigned getFlags() { return Flags; } + unsigned getFlags() const { return Flags; } /// getIsa - Get the Isa of this MCDwarfLoc. - unsigned getIsa() { return Isa; } + unsigned getIsa() const { return Isa; } /// getDiscriminator - Get the Discriminator of this MCDwarfLoc. - unsigned getDiscriminator() { return Discriminator; } + unsigned getDiscriminator() const { return Discriminator; } /// setFileNum - Set the FileNum of this MCDwarfLoc. void setFileNum(unsigned fileNum) { FileNum = fileNum; } From gohman at apple.com Tue Nov 16 15:02:38 2010 From: gohman at apple.com (Dan Gohman) Date: Tue, 16 Nov 2010 21:02:38 -0000 Subject: [llvm-commits] [llvm] r119382 - in /llvm/trunk: include/llvm/CodeGen/Passes.h include/llvm/InitializePasses.h lib/CodeGen/ExpandPseudos.cpp lib/CodeGen/LLVMTargetMachine.cpp lib/CodeGen/SelectionDAG/InstrEmitter.cpp Message-ID: <20101116210238.2AF6F2A6C12C@llvm.org> Author: djg Date: Tue Nov 16 15:02:37 2010 New Revision: 119382 URL: http://llvm.org/viewvc/llvm-project?rev=119382&view=rev Log: Split pseudo-instruction expansion into a separate pass, to make it easier to debug, and to avoid complications when the CFG changes in the middle of the instruction selection process. Added: llvm/trunk/lib/CodeGen/ExpandPseudos.cpp Modified: llvm/trunk/include/llvm/CodeGen/Passes.h llvm/trunk/include/llvm/InitializePasses.h llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp Modified: llvm/trunk/include/llvm/CodeGen/Passes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/Passes.h?rev=119382&r1=119381&r2=119382&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/Passes.h (original) +++ llvm/trunk/include/llvm/CodeGen/Passes.h Tue Nov 16 15:02:37 2010 @@ -213,6 +213,10 @@ /// addressing. FunctionPass *createLocalStackSlotAllocationPass(); + /// createExpandPseudosPass - This pass expands pseudo-instructions. + /// + FunctionPass *createExpandPseudosPass(); + } // End llvm namespace #endif Modified: llvm/trunk/include/llvm/InitializePasses.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/InitializePasses.h?rev=119382&r1=119381&r2=119382&view=diff ============================================================================== --- llvm/trunk/include/llvm/InitializePasses.h (original) +++ llvm/trunk/include/llvm/InitializePasses.h Tue Nov 16 15:02:37 2010 @@ -92,6 +92,7 @@ void initializeDominanceFrontierPass(PassRegistry&); void initializeDominatorTreePass(PassRegistry&); void initializeEdgeProfilerPass(PassRegistry&); +void initializeExpandPseudosPass(PassRegistry&); void initializeFindUsedTypesPass(PassRegistry&); void initializeFunctionAttrsPass(PassRegistry&); void initializeGCModuleInfoPass(PassRegistry&); Added: llvm/trunk/lib/CodeGen/ExpandPseudos.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ExpandPseudos.cpp?rev=119382&view=auto ============================================================================== --- llvm/trunk/lib/CodeGen/ExpandPseudos.cpp (added) +++ llvm/trunk/lib/CodeGen/ExpandPseudos.cpp Tue Nov 16 15:02:37 2010 @@ -0,0 +1,84 @@ +//===-- llvm/CodeGen/ExpandPseudos.cpp --------------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// Expand Psuedo-instructions produced by ISel. These is usually to allow +// the expansion to contain control flow, such as a conditional move +// implemented with a conditional branch and a phi, or an atomic operation +// implemented with a loop. +// +//===----------------------------------------------------------------------===// + +#define DEBUG_TYPE "expand-pseudos" +#include "llvm/CodeGen/MachineFunction.h" +#include "llvm/CodeGen/MachineFunctionPass.h" +#include "llvm/CodeGen/Passes.h" +#include "llvm/Target/TargetLowering.h" +#include "llvm/Target/TargetMachine.h" +#include "llvm/Support/Debug.h" +using namespace llvm; + +namespace { + class ExpandPseudos : public MachineFunctionPass { + public: + static char ID; // Pass identification, replacement for typeid + ExpandPseudos() : MachineFunctionPass(ID) {} + + private: + virtual bool runOnMachineFunction(MachineFunction &MF); + + const char *getPassName() const { + return "Expand CodeGen Pseudo-instructions"; + } + + virtual void getAnalysisUsage(AnalysisUsage &AU) const { + MachineFunctionPass::getAnalysisUsage(AU); + } + }; +} // end anonymous namespace + +char ExpandPseudos::ID = 0; +INITIALIZE_PASS_BEGIN(ExpandPseudos, "expand-pseudos", + "Expand CodeGen Psueod-instructions", false, false) +INITIALIZE_PASS_END(ExpandPseudos, "expand-pseudos", + "Expand CodeGen Psueod-instructions", false, false) + +FunctionPass *llvm::createExpandPseudosPass() { + return new ExpandPseudos(); +} + +bool ExpandPseudos::runOnMachineFunction(MachineFunction &MF) { + bool Changed = false; + const TargetLowering *TLI = MF.getTarget().getTargetLowering(); + + // Iterate through each instruction in the function, looking for pseudos. + for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) { + MachineBasicBlock *MBB = I; + for (MachineBasicBlock::iterator MBBI = MBB->begin(), MBBE = MBB->end(); + MBBI != MBBE; ) { + MachineInstr *MI = MBBI++; + + // If MI is a pseudo, expand it. + const TargetInstrDesc &TID = MI->getDesc(); + if (TID.usesCustomInsertionHook()) { + Changed = true; + MachineBasicBlock *NewMBB = + TLI->EmitInstrWithCustomInserter(MI, MBB); + // The expansion may involve new basic blocks. + if (NewMBB != MBB) { + MBB = NewMBB; + I = NewMBB; + MBBI = NewMBB->begin(); + MBBE = NewMBB->end(); + } + } + } + } + + return Changed; +} Modified: llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp?rev=119382&r1=119381&r2=119382&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp (original) +++ llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp Tue Nov 16 15:02:37 2010 @@ -345,6 +345,9 @@ // Print the instruction selected machine code... printAndVerify(PM, "After Instruction Selection"); + // Expand pseudo-instructions emitted by isel. + PM.add(createExpandPseudosPass()); + // Optimize PHIs before DCE: removing dead PHI cycles may make more // instructions dead. if (OptLevel != CodeGenOpt::None) Modified: llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp?rev=119382&r1=119381&r2=119382&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp Tue Nov 16 15:02:37 2010 @@ -721,19 +721,6 @@ // hook knows where in the block to insert the replacement code. MBB->insert(InsertPos, MI); - if (II.usesCustomInsertionHook()) { - // Insert this instruction into the basic block using a target - // specific inserter which may returns a new basic block. - bool AtEnd = InsertPos == MBB->end(); - MachineBasicBlock *NewMBB = TLI->EmitInstrWithCustomInserter(MI, MBB); - if (NewMBB != MBB) { - if (AtEnd) - InsertPos = NewMBB->end(); - MBB = NewMBB; - } - return; - } - // Additional results must be an physical register def. if (HasPhysRegOuts) { for (unsigned i = II.getNumDefs(); i < NumResults; ++i) { From grosbach at apple.com Tue Nov 16 15:14:29 2010 From: grosbach at apple.com (Jim Grosbach) Date: Tue, 16 Nov 2010 13:14:29 -0800 Subject: [llvm-commits] [llvm] r119382 - in /llvm/trunk: include/llvm/CodeGen/Passes.h include/llvm/InitializePasses.h lib/CodeGen/ExpandPseudos.cpp lib/CodeGen/LLVMTargetMachine.cpp lib/CodeGen/SelectionDAG/InstrEmitter.cpp In-Reply-To: <20101116210238.2AF6F2A6C12C@llvm.org> References: <20101116210238.2AF6F2A6C12C@llvm.org> Message-ID: <799FC90C-ABAD-4DF5-96C0-D9198B5456DB@apple.com> Hi Dan, Naming implies redundancy with the ARMExpandPseudos pass for the ARM target. IIRC (vague memories here, so....), these may happen earlier? Would it be reasonable to try to merge those passes? One nitty comment below. -Jim On Nov 16, 2010, at 1:02 PM, Dan Gohman wrote: > Author: djg > Date: Tue Nov 16 15:02:37 2010 > New Revision: 119382 > > URL: http://llvm.org/viewvc/llvm-project?rev=119382&view=rev > Log: > Split pseudo-instruction expansion into a separate pass, to make it > easier to debug, and to avoid complications when the CFG changes > in the middle of the instruction selection process. > > Added: > llvm/trunk/lib/CodeGen/ExpandPseudos.cpp > Modified: > llvm/trunk/include/llvm/CodeGen/Passes.h > llvm/trunk/include/llvm/InitializePasses.h > llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp > llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp > > Modified: llvm/trunk/include/llvm/CodeGen/Passes.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/Passes.h?rev=119382&r1=119381&r2=119382&view=diff > ============================================================================== > --- llvm/trunk/include/llvm/CodeGen/Passes.h (original) > +++ llvm/trunk/include/llvm/CodeGen/Passes.h Tue Nov 16 15:02:37 2010 > @@ -213,6 +213,10 @@ > /// addressing. > FunctionPass *createLocalStackSlotAllocationPass(); > > + /// createExpandPseudosPass - This pass expands pseudo-instructions. > + /// > + FunctionPass *createExpandPseudosPass(); > + > } // End llvm namespace > > #endif > > Modified: llvm/trunk/include/llvm/InitializePasses.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/InitializePasses.h?rev=119382&r1=119381&r2=119382&view=diff > ============================================================================== > --- llvm/trunk/include/llvm/InitializePasses.h (original) > +++ llvm/trunk/include/llvm/InitializePasses.h Tue Nov 16 15:02:37 2010 > @@ -92,6 +92,7 @@ > void initializeDominanceFrontierPass(PassRegistry&); > void initializeDominatorTreePass(PassRegistry&); > void initializeEdgeProfilerPass(PassRegistry&); > +void initializeExpandPseudosPass(PassRegistry&); > void initializeFindUsedTypesPass(PassRegistry&); > void initializeFunctionAttrsPass(PassRegistry&); > void initializeGCModuleInfoPass(PassRegistry&); > > Added: llvm/trunk/lib/CodeGen/ExpandPseudos.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ExpandPseudos.cpp?rev=119382&view=auto > ============================================================================== > --- llvm/trunk/lib/CodeGen/ExpandPseudos.cpp (added) > +++ llvm/trunk/lib/CodeGen/ExpandPseudos.cpp Tue Nov 16 15:02:37 2010 > @@ -0,0 +1,84 @@ > +//===-- llvm/CodeGen/ExpandPseudos.cpp --------------------------*- C++ -*-===// > +// > +// The LLVM Compiler Infrastructure > +// > +// This file is distributed under the University of Illinois Open Source > +// License. See LICENSE.TXT for details. > +// > +//===----------------------------------------------------------------------===// > +// > +// Expand Psuedo-instructions produced by ISel. These is usually to allow > +// the expansion to contain control flow, such as a conditional move Grammar. "These are". > +// implemented with a conditional branch and a phi, or an atomic operation > +// implemented with a loop. > +// > +//===----------------------------------------------------------------------===// > + > +#define DEBUG_TYPE "expand-pseudos" > +#include "llvm/CodeGen/MachineFunction.h" > +#include "llvm/CodeGen/MachineFunctionPass.h" > +#include "llvm/CodeGen/Passes.h" > +#include "llvm/Target/TargetLowering.h" > +#include "llvm/Target/TargetMachine.h" > +#include "llvm/Support/Debug.h" > +using namespace llvm; > + > +namespace { > + class ExpandPseudos : public MachineFunctionPass { > + public: > + static char ID; // Pass identification, replacement for typeid > + ExpandPseudos() : MachineFunctionPass(ID) {} > + > + private: > + virtual bool runOnMachineFunction(MachineFunction &MF); > + > + const char *getPassName() const { > + return "Expand CodeGen Pseudo-instructions"; > + } > + > + virtual void getAnalysisUsage(AnalysisUsage &AU) const { > + MachineFunctionPass::getAnalysisUsage(AU); > + } > + }; > +} // end anonymous namespace > + > +char ExpandPseudos::ID = 0; > +INITIALIZE_PASS_BEGIN(ExpandPseudos, "expand-pseudos", > + "Expand CodeGen Psueod-instructions", false, false) > +INITIALIZE_PASS_END(ExpandPseudos, "expand-pseudos", > + "Expand CodeGen Psueod-instructions", false, false) > + > +FunctionPass *llvm::createExpandPseudosPass() { > + return new ExpandPseudos(); > +} > + > +bool ExpandPseudos::runOnMachineFunction(MachineFunction &MF) { > + bool Changed = false; > + const TargetLowering *TLI = MF.getTarget().getTargetLowering(); > + > + // Iterate through each instruction in the function, looking for pseudos. > + for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) { > + MachineBasicBlock *MBB = I; > + for (MachineBasicBlock::iterator MBBI = MBB->begin(), MBBE = MBB->end(); > + MBBI != MBBE; ) { > + MachineInstr *MI = MBBI++; > + > + // If MI is a pseudo, expand it. > + const TargetInstrDesc &TID = MI->getDesc(); > + if (TID.usesCustomInsertionHook()) { > + Changed = true; > + MachineBasicBlock *NewMBB = > + TLI->EmitInstrWithCustomInserter(MI, MBB); > + // The expansion may involve new basic blocks. > + if (NewMBB != MBB) { > + MBB = NewMBB; > + I = NewMBB; > + MBBI = NewMBB->begin(); > + MBBE = NewMBB->end(); > + } > + } > + } > + } > + > + return Changed; > +} > > Modified: llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp?rev=119382&r1=119381&r2=119382&view=diff > ============================================================================== > --- llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp (original) > +++ llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp Tue Nov 16 15:02:37 2010 > @@ -345,6 +345,9 @@ > // Print the instruction selected machine code... > printAndVerify(PM, "After Instruction Selection"); > > + // Expand pseudo-instructions emitted by isel. > + PM.add(createExpandPseudosPass()); > + > // Optimize PHIs before DCE: removing dead PHI cycles may make more > // instructions dead. > if (OptLevel != CodeGenOpt::None) > > Modified: llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp?rev=119382&r1=119381&r2=119382&view=diff > ============================================================================== > --- llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp (original) > +++ llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp Tue Nov 16 15:02:37 2010 > @@ -721,19 +721,6 @@ > // hook knows where in the block to insert the replacement code. > MBB->insert(InsertPos, MI); > > - if (II.usesCustomInsertionHook()) { > - // Insert this instruction into the basic block using a target > - // specific inserter which may returns a new basic block. > - bool AtEnd = InsertPos == MBB->end(); > - MachineBasicBlock *NewMBB = TLI->EmitInstrWithCustomInserter(MI, MBB); > - if (NewMBB != MBB) { > - if (AtEnd) > - InsertPos = NewMBB->end(); > - MBB = NewMBB; > - } > - return; > - } > - > // Additional results must be an physical register def. > if (HasPhysRegOuts) { > for (unsigned i = II.getNumDefs(); i < NumResults; ++i) { > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From rafael.espindola at gmail.com Tue Nov 16 15:20:32 2010 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Tue, 16 Nov 2010 21:20:32 -0000 Subject: [llvm-commits] [llvm] r119384 - in /llvm/trunk: include/llvm/MC/MCStreamer.h lib/MC/MCAsmStreamer.cpp lib/MC/MCContext.cpp lib/MC/MCELFStreamer.cpp lib/MC/MCLoggingStreamer.cpp lib/MC/MCMachOStreamer.cpp lib/MC/MCNullStreamer.cpp lib/MC/MCParser/AsmParser.cpp lib/MC/MCStreamer.cpp lib/MC/WinCOFFStreamer.cpp lib/Target/PTX/PTXMCAsmStreamer.cpp lib/Target/PTX/PTXMCAsmStreamer.h Message-ID: <20101116212032.51CAF2A6C12C@llvm.org> Author: rafael Date: Tue Nov 16 15:20:32 2010 New Revision: 119384 URL: http://llvm.org/viewvc/llvm-project?rev=119384&view=rev Log: Add .loc methods to the streamer. Next: Add support for the !HasDotLocAndDotFile case to the MCAsmStreamer and then switch codegen to use it. Modified: llvm/trunk/include/llvm/MC/MCStreamer.h llvm/trunk/lib/MC/MCAsmStreamer.cpp llvm/trunk/lib/MC/MCContext.cpp llvm/trunk/lib/MC/MCELFStreamer.cpp llvm/trunk/lib/MC/MCLoggingStreamer.cpp llvm/trunk/lib/MC/MCMachOStreamer.cpp llvm/trunk/lib/MC/MCNullStreamer.cpp llvm/trunk/lib/MC/MCParser/AsmParser.cpp llvm/trunk/lib/MC/MCStreamer.cpp llvm/trunk/lib/MC/WinCOFFStreamer.cpp llvm/trunk/lib/Target/PTX/PTXMCAsmStreamer.cpp llvm/trunk/lib/Target/PTX/PTXMCAsmStreamer.h Modified: llvm/trunk/include/llvm/MC/MCStreamer.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCStreamer.h?rev=119384&r1=119383&r2=119384&view=diff ============================================================================== --- llvm/trunk/include/llvm/MC/MCStreamer.h (original) +++ llvm/trunk/include/llvm/MC/MCStreamer.h Tue Nov 16 15:20:32 2010 @@ -342,7 +342,14 @@ /// EmitDwarfFileDirective - Associate a filename with a specified logical /// file number. This implements the DWARF2 '.file 4 "foo.c"' assembler /// directive. - virtual void EmitDwarfFileDirective(unsigned FileNo,StringRef Filename) = 0; + virtual bool EmitDwarfFileDirective(unsigned FileNo,StringRef Filename); + + /// EmitDwarfLocDirective - This implements the DWARF2 + // '.loc fileno lineno ...' assembler directive. + virtual void EmitDwarfLocDirective(unsigned FileNo, unsigned Line, + unsigned Column, unsigned Flags, + unsigned Isa, + unsigned Discriminator); /// EmitInstruction - Emit the given @p Instruction into the current /// section. Modified: llvm/trunk/lib/MC/MCAsmStreamer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCAsmStreamer.cpp?rev=119384&r1=119383&r2=119384&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCAsmStreamer.cpp (original) +++ llvm/trunk/lib/MC/MCAsmStreamer.cpp Tue Nov 16 15:20:32 2010 @@ -166,7 +166,10 @@ unsigned char Value = 0); virtual void EmitFileDirective(StringRef Filename); - virtual void EmitDwarfFileDirective(unsigned FileNo, StringRef Filename); + virtual bool EmitDwarfFileDirective(unsigned FileNo, StringRef Filename); + virtual void EmitDwarfLocDirective(unsigned FileNo, unsigned Line, + unsigned Column, unsigned Flags, + unsigned Isa, unsigned Discriminator); virtual void EmitInstruction(const MCInst &Inst); @@ -633,10 +636,42 @@ EmitEOL(); } -void MCAsmStreamer::EmitDwarfFileDirective(unsigned FileNo, StringRef Filename){ +bool MCAsmStreamer::EmitDwarfFileDirective(unsigned FileNo, StringRef Filename){ OS << "\t.file\t" << FileNo << ' '; PrintQuotedString(Filename, OS); EmitEOL(); + return this->MCStreamer::EmitDwarfFileDirective(FileNo, Filename); +} + +void MCAsmStreamer::EmitDwarfLocDirective(unsigned FileNo, unsigned Line, + unsigned Column, unsigned Flags, + unsigned Isa, + unsigned Discriminator) { + OS << "\t.loc\t" << FileNo << " " << Line << " " << Column; + if (Flags & DWARF2_FLAG_BASIC_BLOCK) + OS << " basic_block"; + if (Flags & DWARF2_FLAG_PROLOGUE_END) + OS << " prologue_end"; + if (Flags & DWARF2_FLAG_EPILOGUE_BEGIN) + OS << " epilogue_begin"; + + unsigned OldFlags = getContext().getCurrentDwarfLoc().getFlags(); + if ((Flags & DWARF2_FLAG_IS_STMT) != (OldFlags & DWARF2_FLAG_IS_STMT)) { + OS << " is_stmt "; + + if (Flags & DWARF2_FLAG_IS_STMT) + OS << "1"; + else + OS << "0"; + } + + if (Isa) + OS << "isa " << Isa; + if (Discriminator) + OS << "discriminator " << Discriminator; + EmitEOL(); + return this->MCStreamer::EmitDwarfLocDirective(FileNo, Line, Column, Flags, + Isa, Discriminator); } void MCAsmStreamer::AddEncodingComment(const MCInst &Inst) { Modified: llvm/trunk/lib/MC/MCContext.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCContext.cpp?rev=119384&r1=119383&r2=119384&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCContext.cpp (original) +++ llvm/trunk/lib/MC/MCContext.cpp Tue Nov 16 15:20:32 2010 @@ -25,7 +25,7 @@ MCContext::MCContext(const MCAsmInfo &mai) : MAI(mai), NextUniqueID(0), - CurrentDwarfLoc(0,0,0,0,0,0) { + CurrentDwarfLoc(0,0,0,DWARF2_FLAG_IS_STMT,0,0) { MachOUniquingMap = 0; ELFUniquingMap = 0; COFFUniquingMap = 0; Modified: llvm/trunk/lib/MC/MCELFStreamer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCELFStreamer.cpp?rev=119384&r1=119383&r2=119384&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCELFStreamer.cpp (original) +++ llvm/trunk/lib/MC/MCELFStreamer.cpp Tue Nov 16 15:20:32 2010 @@ -137,9 +137,6 @@ unsigned char Value = 0); virtual void EmitFileDirective(StringRef Filename); - virtual void EmitDwarfFileDirective(unsigned FileNo, StringRef Filename) { - DEBUG(dbgs() << "FIXME: MCELFStreamer:EmitDwarfFileDirective not implemented\n"); - } virtual void Finish(); Modified: llvm/trunk/lib/MC/MCLoggingStreamer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCLoggingStreamer.cpp?rev=119384&r1=119383&r2=119384&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCLoggingStreamer.cpp (original) +++ llvm/trunk/lib/MC/MCLoggingStreamer.cpp Tue Nov 16 15:20:32 2010 @@ -205,12 +205,23 @@ return Child->EmitFileDirective(Filename); } - virtual void EmitDwarfFileDirective(unsigned FileNo, StringRef Filename) { + virtual bool EmitDwarfFileDirective(unsigned FileNo, StringRef Filename) { LogCall("EmitDwarfFileDirective", "FileNo:" + Twine(FileNo) + " Filename:" + Filename); return Child->EmitDwarfFileDirective(FileNo, Filename); } + virtual void EmitDwarfLocDirective(unsigned FileNo, unsigned Line, + unsigned Column, unsigned Flags, + unsigned Isa, unsigned Discriminator) { + LogCall("EmitDwarfLocDirective", + "FileNo:" + Twine(FileNo) + " Line:" + Twine(Line) + + " Column:" + Twine(Column) + " Flags:" + Twine(Flags) + + " Isa:" + Twine(Isa) + " Discriminator:" + Twine(Discriminator)); + return Child->EmitDwarfLocDirective(FileNo, Line, Column, Flags, + Isa, Discriminator); + } + virtual void EmitInstruction(const MCInst &Inst) { LogCall("EmitInstruction"); return Child->EmitInstruction(Inst); Modified: llvm/trunk/lib/MC/MCMachOStreamer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCMachOStreamer.cpp?rev=119384&r1=119383&r2=119384&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCMachOStreamer.cpp (original) +++ llvm/trunk/lib/MC/MCMachOStreamer.cpp Tue Nov 16 15:20:32 2010 @@ -92,12 +92,6 @@ //report_fatal_error("unsupported directive: '.file'"); } - virtual void EmitDwarfFileDirective(unsigned FileNo, StringRef Filename) { - // FIXME: Just ignore the .file; it isn't important enough to fail the - // entire assembly. - - //report_fatal_error("unsupported directive: '.file'"); - } virtual void Finish(); Modified: llvm/trunk/lib/MC/MCNullStreamer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCNullStreamer.cpp?rev=119384&r1=119383&r2=119384&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCNullStreamer.cpp (original) +++ llvm/trunk/lib/MC/MCNullStreamer.cpp Tue Nov 16 15:20:32 2010 @@ -83,7 +83,12 @@ unsigned char Value = 0) {} virtual void EmitFileDirective(StringRef Filename) {} - virtual void EmitDwarfFileDirective(unsigned FileNo,StringRef Filename) {} + virtual bool EmitDwarfFileDirective(unsigned FileNo,StringRef Filename) { + return false; + } + virtual void EmitDwarfLocDirective(unsigned FileNo, unsigned Line, + unsigned Column, unsigned Flags, + unsigned Isa, unsigned Discriminator) {} virtual void EmitInstruction(const MCInst &Inst) {} virtual void Finish() {} Modified: llvm/trunk/lib/MC/MCParser/AsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCParser/AsmParser.cpp?rev=119384&r1=119383&r2=119384&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCParser/AsmParser.cpp (original) +++ llvm/trunk/lib/MC/MCParser/AsmParser.cpp Tue Nov 16 15:20:32 2010 @@ -1995,9 +1995,8 @@ if (FileNumber == -1) getStreamer().EmitFileDirective(Filename); else { - if (getContext().GetDwarfFile(Filename, FileNumber) == 0) + if (getStreamer().EmitDwarfFileDirective(FileNumber, Filename)) Error(FileNumberLoc, "file number already allocated"); - getStreamer().EmitDwarfFileDirective(FileNumber, Filename); } return false; @@ -2125,8 +2124,8 @@ } } - getContext().setCurrentDwarfLoc(FileNumber, LineNumber, ColumnPos, Flags, - Isa, Discriminator); + getStreamer().EmitDwarfLocDirective(FileNumber, LineNumber, ColumnPos, Flags, + Isa, Discriminator); return false; } Modified: llvm/trunk/lib/MC/MCStreamer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCStreamer.cpp?rev=119384&r1=119383&r2=119384&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCStreamer.cpp (original) +++ llvm/trunk/lib/MC/MCStreamer.cpp Tue Nov 16 15:20:32 2010 @@ -7,6 +7,7 @@ // //===----------------------------------------------------------------------===// +#include "llvm/MC/MCContext.h" #include "llvm/MC/MCStreamer.h" #include "llvm/MC/MCExpr.h" #include "llvm/MC/MCObjectWriter.h" @@ -63,6 +64,19 @@ EmitValue(E, 1, AddrSpace); } +bool MCStreamer::EmitDwarfFileDirective(unsigned FileNo, + StringRef Filename) { + return getContext().GetDwarfFile(Filename, FileNo) == 0; +} + +void MCStreamer::EmitDwarfLocDirective(unsigned FileNo, unsigned Line, + unsigned Column, unsigned Flags, + unsigned Isa, + unsigned Discriminator) { + getContext().setCurrentDwarfLoc(FileNo, Line, Column, Flags, Isa, + Discriminator); +} + /// EmitRawText - If this file is backed by an assembly streamer, this dumps /// the specified string in the output .s file. This capability is /// indicated by the hasRawTextSupport() predicate. Modified: llvm/trunk/lib/MC/WinCOFFStreamer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/WinCOFFStreamer.cpp?rev=119384&r1=119383&r2=119384&view=diff ============================================================================== --- llvm/trunk/lib/MC/WinCOFFStreamer.cpp (original) +++ llvm/trunk/lib/MC/WinCOFFStreamer.cpp Tue Nov 16 15:20:32 2010 @@ -77,7 +77,6 @@ unsigned MaxBytesToEmit); virtual void EmitValueToOffset(const MCExpr *Offset, unsigned char Value); virtual void EmitFileDirective(StringRef Filename); - virtual void EmitDwarfFileDirective(unsigned FileNo,StringRef Filename); virtual void EmitInstruction(const MCInst &Instruction); virtual void Finish(); @@ -414,11 +413,6 @@ // info will be a much large effort. } -void WinCOFFStreamer::EmitDwarfFileDirective(unsigned FileNo, - StringRef Filename) { - llvm_unreachable("not implemented"); -} - void WinCOFFStreamer::EmitInstruction(const MCInst &Instruction) { for (unsigned i = 0, e = Instruction.getNumOperands(); i != e; ++i) if (Instruction.getOperand(i).isExpr()) Modified: llvm/trunk/lib/Target/PTX/PTXMCAsmStreamer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXMCAsmStreamer.cpp?rev=119384&r1=119383&r2=119384&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXMCAsmStreamer.cpp (original) +++ llvm/trunk/lib/Target/PTX/PTXMCAsmStreamer.cpp Tue Nov 16 15:20:32 2010 @@ -337,11 +337,13 @@ EmitEOL(); } -void PTXMCAsmStreamer::EmitDwarfFileDirective(unsigned FileNo, +// FIXME: should we inherit from MCAsmStreamer? +bool PTXMCAsmStreamer::EmitDwarfFileDirective(unsigned FileNo, StringRef Filename){ OS << "\t.file\t" << FileNo << ' '; PrintQuotedString(Filename, OS); EmitEOL(); + return this->MCStreamer::EmitDwarfFileDirective(FileNo, Filename); } void PTXMCAsmStreamer::AddEncodingComment(const MCInst &Inst) {} Modified: llvm/trunk/lib/Target/PTX/PTXMCAsmStreamer.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXMCAsmStreamer.h?rev=119384&r1=119383&r2=119384&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXMCAsmStreamer.h (original) +++ llvm/trunk/lib/Target/PTX/PTXMCAsmStreamer.h Tue Nov 16 15:20:32 2010 @@ -171,7 +171,7 @@ unsigned char Value = 0); virtual void EmitFileDirective(StringRef Filename); - virtual void EmitDwarfFileDirective(unsigned FileNo, StringRef Filename); + virtual bool EmitDwarfFileDirective(unsigned FileNo, StringRef Filename); virtual void EmitInstruction(const MCInst &Inst); From evan.cheng at apple.com Tue Nov 16 15:20:36 2010 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 16 Nov 2010 21:20:36 -0000 Subject: [llvm-commits] [llvm] r119385 - /llvm/trunk/lib/CodeGen/CMakeLists.txt Message-ID: <20101116212036.B4EF52A6C12D@llvm.org> Author: evancheng Date: Tue Nov 16 15:20:36 2010 New Revision: 119385 URL: http://llvm.org/viewvc/llvm-project?rev=119385&view=rev Log: Add ExpandPseudos.cpp. Modified: llvm/trunk/lib/CodeGen/CMakeLists.txt Modified: llvm/trunk/lib/CodeGen/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/CMakeLists.txt?rev=119385&r1=119384&r2=119385&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/CMakeLists.txt (original) +++ llvm/trunk/lib/CodeGen/CMakeLists.txt Tue Nov 16 15:20:36 2010 @@ -11,6 +11,7 @@ DwarfEHPrepare.cpp ELFCodeEmitter.cpp ELFWriter.cpp + ExpandPseudos.cpp GCMetadata.cpp GCMetadataPrinter.cpp GCStrategy.cpp From gohman at apple.com Tue Nov 16 15:27:00 2010 From: gohman at apple.com (Dan Gohman) Date: Tue, 16 Nov 2010 21:27:00 -0000 Subject: [llvm-commits] [llvm] r119386 - /llvm/trunk/lib/CodeGen/ExpandPseudos.cpp Message-ID: <20101116212700.D76432A6C12C@llvm.org> Author: djg Date: Tue Nov 16 15:27:00 2010 New Revision: 119386 URL: http://llvm.org/viewvc/llvm-project?rev=119386&view=rev Log: Fix grammaro. Modified: llvm/trunk/lib/CodeGen/ExpandPseudos.cpp Modified: llvm/trunk/lib/CodeGen/ExpandPseudos.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ExpandPseudos.cpp?rev=119386&r1=119385&r2=119386&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/ExpandPseudos.cpp (original) +++ llvm/trunk/lib/CodeGen/ExpandPseudos.cpp Tue Nov 16 15:27:00 2010 @@ -7,7 +7,7 @@ // //===----------------------------------------------------------------------===// // -// Expand Psuedo-instructions produced by ISel. These is usually to allow +// Expand Psuedo-instructions produced by ISel. These are usually to allow // the expansion to contain control flow, such as a conditional move // implemented with a conditional branch and a phi, or an atomic operation // implemented with a loop. From sabre at nondot.org Tue Nov 16 15:32:53 2010 From: sabre at nondot.org (Chris Lattner) Date: Tue, 16 Nov 2010 21:32:53 -0000 Subject: [llvm-commits] [llvm] r119387 - /llvm/trunk/docs/DeveloperPolicy.html Message-ID: <20101116213253.BBED42A6C12C@llvm.org> Author: lattner Date: Tue Nov 16 15:32:53 2010 New Revision: 119387 URL: http://llvm.org/viewvc/llvm-project?rev=119387&view=rev Log: libc++ and compiler_rt are now dual licensed under UIUC and MIT license. Modified: llvm/trunk/docs/DeveloperPolicy.html Modified: llvm/trunk/docs/DeveloperPolicy.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/DeveloperPolicy.html?rev=119387&r1=119386&r2=119387&view=diff ============================================================================== --- llvm/trunk/docs/DeveloperPolicy.html (original) +++ llvm/trunk/docs/DeveloperPolicy.html Tue Nov 16 15:32:53 2010 @@ -533,20 +533,16 @@
    License

    We intend to keep LLVM perpetually open source and to use a liberal open - source license. The current license is the + source license. All of the code in LLVM is available under the University of Illinois/NCSA Open Source License, which boils down to this:

    • You can freely distribute LLVM.
      • -
    • You must retain the copyright notice if you redistribute LLVM.
      • - -
    • Binaries derived from LLVM must reproduce the copyright notice (e.g. in - an included readme file).
      • - +
    • Binaries derived from LLVM must reproduce the copyright notice (e.g. in an + included readme file).
    • You can't use our names to promote your LLVM derived products.
      • -
    • There's no warranty on LLVM at all.
    @@ -556,7 +552,22 @@ LLVM's license is not a "copyleft" license like the GPL). We suggest that you read the License if further clarification is needed.

    - + +

    In addition to the UIUC license, the runtime library components of LLVM + (compiler_rt and libc++) are also licensed under the MIT license, + which does not contain the binary redistribution clause. As a user of these + runtime libraries, it means that you can choose to use the code under either + license (and thus don't need the binary redistribution clause), and as a + contributor to the code that you agree that any contributions to these + libraries be licensed under both licenses. We feel that this is important + for runtime libraries, because they are implicitly linked into applications + and therefore should not subject those applications to the binary + redistribution clause. This also means that it is ok to move code from (e.g.) + libc++ to the LLVM core without concern, but that code cannot be moved from + the LLVM core to libc++ without the copyright owner's permission. +

    +

    Note that the LLVM Project does distribute llvm-gcc, which is GPL. This means that anything "linked" into llvm-gcc must itself be compatible with the GPL, and must be releasable under the terms of the GPL. This @@ -570,7 +581,7 @@

    We have no plans to change the license of LLVM. If you have questions or comments about the license, please contact the - LLVM Oversight Group.

    + LLVM Developer's Mailing List.

    From sabre at nondot.org Tue Nov 16 15:34:56 2010 From: sabre at nondot.org (Chris Lattner) Date: Tue, 16 Nov 2010 21:34:56 -0000 Subject: [llvm-commits] [compiler-rt] r119389 - in /compiler-rt/trunk: LICENSE.TXT www/index.html Message-ID: <20101116213456.E7FBE2A6C12C@llvm.org> Author: lattner Date: Tue Nov 16 15:34:56 2010 New Revision: 119389 URL: http://llvm.org/viewvc/llvm-project?rev=119389&view=rev Log: compiler_rt is now dual licensed under MIT and UIUC license. Modified: compiler-rt/trunk/LICENSE.TXT compiler-rt/trunk/www/index.html Modified: compiler-rt/trunk/LICENSE.TXT URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/LICENSE.TXT?rev=119389&r1=119388&r2=119389&view=diff ============================================================================== --- compiler-rt/trunk/LICENSE.TXT (original) +++ compiler-rt/trunk/LICENSE.TXT Tue Nov 16 15:34:56 2010 @@ -1,10 +1,21 @@ ============================================================================== -LLVM Release License +compiler_rt License ============================================================================== + +The compiler_rt library is dual licensed under both the University of Illinois +"BSD-Like" license and the MIT license. As a user of this code you may choose +to use it under either license. As a contributor, you agree to allow your code +to be used under both. + +Full text of the relevant licenses is included below. + +============================================================================== + University of Illinois/NCSA Open Source License -Copyright (c) 2003-2009 University of Illinois at Urbana-Champaign. +Copyright (c) 2009-2010 by the contributors listed in CREDITS.TXT + All rights reserved. Developed by: @@ -43,21 +54,23 @@ SOFTWARE. ============================================================================== -Copyrights and Licenses for Third Party Software Distributed with LLVM: -============================================================================== -The LLVM software contains code written by third parties. Such software will -have its own individual LICENSE.TXT file in the directory in which it appears. -This file will describe the copyrights, license, and restrictions which apply -to that code. - -The disclaimer of warranty in the University of Illinois Open Source License -applies to all code in the LLVM Distribution, and nothing in any of the -other licenses gives permission to use the names of the LLVM Team or the -University of Illinois to endorse or promote products derived from this -Software. -The following pieces of software have additional or alternate copyrights, -licenses, and/or restrictions: +Copyright (c) 2009-2010 by the contributors listed in CREDITS.TXT + +Permission is hereby granted, free of charge, to any person obtaining a copy +of this software and associated documentation files (the "Software"), to deal +in the Software without restriction, including without limitation the rights +to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +copies of the Software, and to permit persons to whom the Software is +furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in +all copies or substantial portions of the Software. -Program Directory -------- --------- +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +THE SOFTWARE. Modified: compiler-rt/trunk/www/index.html URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/www/index.html?rev=119389&r1=119388&r2=119389&view=diff ============================================================================== --- compiler-rt/trunk/www/index.html (original) +++ compiler-rt/trunk/www/index.html Tue Nov 16 15:34:56 2010 @@ -23,9 +23,9 @@ call to the "__fixunsdfdi" function. The compiler-rt library provides optimized implementations of this and other low-level routines.

    -

    All of the code in the compiler-rt project is available under the standard - LLVM - License, a "BSD-style" license.

    +

    All of the code in the compiler-rt project is dual licensed + under the MIT license and the UIUC License (a BSD-like license).

    Goals

    From gohman at apple.com Tue Nov 16 15:36:54 2010 From: gohman at apple.com (Dan Gohman) Date: Tue, 16 Nov 2010 13:36:54 -0800 Subject: [llvm-commits] [llvm] r119382 - in /llvm/trunk: include/llvm/CodeGen/Passes.h include/llvm/InitializePasses.h lib/CodeGen/ExpandPseudos.cpp lib/CodeGen/LLVMTargetMachine.cpp lib/CodeGen/SelectionDAG/InstrEmitter.cpp In-Reply-To: <799FC90C-ABAD-4DF5-96C0-D9198B5456DB@apple.com> References: <20101116210238.2AF6F2A6C12C@llvm.org> <799FC90C-ABAD-4DF5-96C0-D9198B5456DB@apple.com> Message-ID: <32CAFF1B-5055-4DDE-9703-9493E2EE53FD@apple.com> On Nov 16, 2010, at 1:14 PM, Jim Grosbach wrote: > Hi Dan, > > Naming implies redundancy with the ARMExpandPseudos pass for the ARM target. IIRC (vague memories here, so....), these may happen earlier? Would it be reasonable to try to merge those passes? It looks like ARMExpandPseudos runs after register allocation. This new ExpandPseudos needs to run before register allocation. Consequently, they're not trivially mergeable, at least. But I'm open to suggestions. > > One nitty comment below. Fixed, thanks. Dan From grosbach at apple.com Tue Nov 16 15:40:09 2010 From: grosbach at apple.com (Jim Grosbach) Date: Tue, 16 Nov 2010 13:40:09 -0800 Subject: [llvm-commits] [llvm] r119382 - in /llvm/trunk: include/llvm/CodeGen/Passes.h include/llvm/InitializePasses.h lib/CodeGen/ExpandPseudos.cpp lib/CodeGen/LLVMTargetMachine.cpp lib/CodeGen/SelectionDAG/InstrEmitter.cpp In-Reply-To: <32CAFF1B-5055-4DDE-9703-9493E2EE53FD@apple.com> References: <20101116210238.2AF6F2A6C12C@llvm.org> <799FC90C-ABAD-4DF5-96C0-D9198B5456DB@apple.com> <32CAFF1B-5055-4DDE-9703-9493E2EE53FD@apple.com> Message-ID: <659F544C-8AAE-4DDA-8F8F-5E9B5DAA6272@apple.com> On Nov 16, 2010, at 1:36 PM, Dan Gohman wrote: > On Nov 16, 2010, at 1:14 PM, Jim Grosbach wrote: > >> Hi Dan, >> >> Naming implies redundancy with the ARMExpandPseudos pass for the ARM target. IIRC (vague memories here, so....), these may happen earlier? Would it be reasonable to try to merge those passes? > > It looks like ARMExpandPseudos runs after register allocation. > This new ExpandPseudos needs to run before register allocation. > Consequently, they're not trivially mergeable, at least. But > I'm open to suggestions. > Ah, OK. That makes sense. The ARM pass definitely needs to run post-RA, as how things get expanded there for some NEON instructions depends on the allocations. Perhaps a name change on this one to reduce chances of confusion? PreRAExpandPseudos or something like that? -jim From dalej at apple.com Tue Nov 16 15:55:09 2010 From: dalej at apple.com (Dale Johannesen) Date: Tue, 16 Nov 2010 21:55:09 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r119392 - in /llvm-gcc-4.2/trunk/gcc: config/i386/i386.c llvm-convert.cpp tree.h Message-ID: <20101116215509.B09BD2A6C12C@llvm.org> Author: johannes Date: Tue Nov 16 15:55:09 2010 New Revision: 119392 URL: http://llvm.org/viewvc/llvm-project?rev=119392&view=rev Log: My patch 112674 fixed the use of asm register variables, but broke asm blocks. The fundamental problem is that the asm-block handling code used register variables in ways that are beyond what standard gcc register variables support, such as expecting parameter registers to be defined at the entrance to a function. To fix this, represent the use of registers by asm blocks with a different, marked VAR_DECL than standard gcc register variables, and generate pre-112674 IR (which was correct in this case) for them. MMX register handling has changed in the meantime, and is adjusted. 8482548. Modified: llvm-gcc-4.2/trunk/gcc/config/i386/i386.c llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp llvm-gcc-4.2/trunk/gcc/tree.h Modified: llvm-gcc-4.2/trunk/gcc/config/i386/i386.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/i386/i386.c?rev=119392&r1=119391&r2=119392&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/i386/i386.c (original) +++ llvm-gcc-4.2/trunk/gcc/config/i386/i386.c Tue Nov 16 15:55:09 2010 @@ -22161,7 +22161,7 @@ decl = lookup_name (arg); if (decl == error_mark_node) decl = 0; - if (decl == 0) + if (decl == 0 || !DECL_ASM_BLOCK_REGISTER (decl)) { tree type = iasm_type_for (arg); if (type) @@ -22171,6 +22171,7 @@ DECL_REGISTER (decl) = 1; C_DECL_REGISTER (decl) = 1; DECL_HARD_REGISTER (decl) = 1; + DECL_ASM_BLOCK_REGISTER (decl) = 1; set_user_assembler_name (decl, IDENTIFIER_POINTER (arg)); decl = lang_hooks.decls.pushdecl (decl); } Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=119392&r1=119391&r2=119392&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Tue Nov 16 15:55:09 2010 @@ -2457,6 +2457,10 @@ if (TREE_STATIC(exp) || DECL_EXTERNAL(exp) || TREE_PUBLIC(exp)) return false; + // Asm block register usage is not accepted here. + if (DECL_ASM_BLOCK_REGISTER (exp)) + return false; + // Emit inline asm if this is local variable with assembler name on it. if (DECL_ASSEMBLER_NAME_SET_P(exp)) return true; @@ -2470,6 +2474,10 @@ if (TREE_CODE(exp) != VAR_DECL || !DECL_REGISTER(exp)) return false; + // Treat register usage in asm blocks as global. + if (DECL_ASM_BLOCK_REGISTER (exp)) + return true; + // Local register variables are not accepted here. if (TREE_STATIC(exp) || DECL_EXTERNAL(exp) || TREE_PUBLIC(exp)) return true; @@ -4329,6 +4337,8 @@ Value *TreeToLLVM::EmitReadOfRegisterVariable(tree decl, const MemRef *DestLoc) { const Type *Ty = ConvertType(TREE_TYPE(decl)); + if (LLVM_IS_DECL_MMX_REGISTER(decl)) + Ty = Type::getX86_MMXTy(Context); // If there was an error, return something bogus. if (ValidateRegisterVariable(decl)) { @@ -4394,7 +4404,10 @@ // Turn this into a 'call void asm sideeffect "", "{reg}"(Ty %RHS)'. std::vector ArgTys; - ArgTys.push_back(ConvertType(TREE_TYPE(decl))); + const Type* Ty = ConvertType(TREE_TYPE(decl)); + if (LLVM_IS_DECL_MMX_REGISTER(decl)) + Ty = Type::getX86_MMXTy(Context); + ArgTys.push_back(Ty); FunctionType *FTy = FunctionType::get(Type::getVoidTy(Context), ArgTys, false); const char *Name = extractRegisterName(decl); Modified: llvm-gcc-4.2/trunk/gcc/tree.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/tree.h?rev=119392&r1=119391&r2=119392&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/tree.h (original) +++ llvm-gcc-4.2/trunk/gcc/tree.h Tue Nov 16 15:55:09 2010 @@ -2623,6 +2623,8 @@ In VAR_DECL and PARM_DECL, this is DECL_REGISTER. */ unsigned decl_flag_0 : 1; /* In FIELD_DECL, this is DECL_PACKED. */ + /* LLVM LOCAL */ + /* In VAR_DECL, this is DECL_ASM_BLOCK_REGISTER. */ unsigned decl_flag_1 : 1; /* In FIELD_DECL, this is DECL_BIT_FIELD In VAR_DECL and FUNCTION_DECL, this is DECL_EXTERNAL. @@ -2703,6 +2705,9 @@ /* In VAR_DECL and PARM_DECL nodes, nonzero means declared `register'. */ #define DECL_REGISTER(NODE) (DECL_WRTL_CHECK (NODE)->decl_common.decl_flag_0) +/* In VAR_DECL, nonzero means a register used by asm block code. */ +#define DECL_ASM_BLOCK_REGISTER(NODE) (DECL_WRTL_CHECK (NODE)->decl_common.decl_flag_1) + struct tree_decl_with_rtl GTY(()) { struct tree_decl_common common; From dalej at apple.com Tue Nov 16 15:57:15 2010 From: dalej at apple.com (Dale Johannesen) Date: Tue, 16 Nov 2010 21:57:15 -0000 Subject: [llvm-commits] [llvm] r119393 - /llvm/trunk/test/FrontendC/2010-11-16-asmblock.c Message-ID: <20101116215715.D47FA2A6C12C@llvm.org> Author: johannes Date: Tue Nov 16 15:57:15 2010 New Revision: 119393 URL: http://llvm.org/viewvc/llvm-project?rev=119393&view=rev Log: Test for llvm-gcc patch 119392. Added: llvm/trunk/test/FrontendC/2010-11-16-asmblock.c Added: llvm/trunk/test/FrontendC/2010-11-16-asmblock.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2010-11-16-asmblock.c?rev=119393&view=auto ============================================================================== --- llvm/trunk/test/FrontendC/2010-11-16-asmblock.c (added) +++ llvm/trunk/test/FrontendC/2010-11-16-asmblock.c Tue Nov 16 15:57:15 2010 @@ -0,0 +1,16 @@ +// RUN: %llvmgcc -S %s -fasm-blocks -o - | FileCheck %s +// XFAIL: * +// XTARGET: x86,i386,i686 +// 84282548 + +void foo() +{ +// CHECK: %0 = call i32 asm sideeffect "", "={ecx}"() nounwind +// CHECK: %asmtmp = call i32 asm sideeffect alignstack "sall $$3, $0", "={ecx},{ecx},~{dirflag},~{fpsr},~{flags},~{memory}"(i32 %0) nounwind +// CHECK: store i32 %asmtmp, i32* %"%ecx" + __asm { + sal ecx, 3; + add esi, ecx; + add edi, ecx; + } +} From stoklund at 2pi.dk Tue Nov 16 16:01:32 2010 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Tue, 16 Nov 2010 14:01:32 -0800 Subject: [llvm-commits] [llvm] r119382 - in /llvm/trunk: include/llvm/CodeGen/Passes.h include/llvm/InitializePasses.h lib/CodeGen/ExpandPseudos.cpp lib/CodeGen/LLVMTargetMachine.cpp lib/CodeGen/SelectionDAG/InstrEmitter.cpp In-Reply-To: <659F544C-8AAE-4DDA-8F8F-5E9B5DAA6272@apple.com> References: <20101116210238.2AF6F2A6C12C@llvm.org> <799FC90C-ABAD-4DF5-96C0-D9198B5456DB@apple.com> <32CAFF1B-5055-4DDE-9703-9493E2EE53FD@apple.com> <659F544C-8AAE-4DDA-8F8F-5E9B5DAA6272@apple.com> Message-ID: <538DA80C-2CFA-4F3D-A171-FEFB68452CB9@2pi.dk> On Nov 16, 2010, at 1:40 PM, Jim Grosbach wrote: > > On Nov 16, 2010, at 1:36 PM, Dan Gohman wrote: >> On Nov 16, 2010, at 1:14 PM, Jim Grosbach wrote: >> >>> Hi Dan, >>> >>> Naming implies redundancy with the ARMExpandPseudos pass for the ARM target. IIRC (vague memories here, so....), these may happen earlier? Would it be reasonable to try to merge those passes? >> >> It looks like ARMExpandPseudos runs after register allocation. >> This new ExpandPseudos needs to run before register allocation. >> Consequently, they're not trivially mergeable, at least. But >> I'm open to suggestions. >> > > Ah, OK. That makes sense. The ARM pass definitely needs to run post-RA, as how things get expanded there for some NEON instructions depends on the allocations. Perhaps a name change on this one to reduce chances of confusion? PreRAExpandPseudos or something like that? Actually, LowerSubregs.cpp wants to be ExpandPseudos.cpp as well. It runs post-ra, and there might be an opportunity to merge it with the target-dependent pseudo expansion passes. It sounds like we need an early and a late pseudo expansion pass. One to handle TID.usesCustomInsertionHook() instructions, and one to handle TID->isCodeGenOnly(). From ofv at wanadoo.es Tue Nov 16 16:07:47 2010 From: ofv at wanadoo.es (Oscar Fuentes) Date: Tue, 16 Nov 2010 22:07:47 -0000 Subject: [llvm-commits] [llvm] r119394 - /llvm/trunk/lib/Target/X86/CMakeLists.txt Message-ID: <20101116220747.86ADF2A6C12C@llvm.org> Author: ofv Date: Tue Nov 16 16:07:47 2010 New Revision: 119394 URL: http://llvm.org/viewvc/llvm-project?rev=119394&view=rev Log: Fix assembling X86CompilationCallback_Win64.asm on VS 10. Patch by Louis Zhuang! Modified: llvm/trunk/lib/Target/X86/CMakeLists.txt Modified: llvm/trunk/lib/Target/X86/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/CMakeLists.txt?rev=119394&r1=119393&r2=119394&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/CMakeLists.txt (original) +++ llvm/trunk/lib/Target/X86/CMakeLists.txt Tue Nov 16 16:07:47 2010 @@ -43,10 +43,10 @@ enable_language(ASM_MASM) ADD_CUSTOM_COMMAND( OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/X86CompilationCallback_Win64.obj + MAIN_DEPENDENCY X86CompilationCallback_Win64.asm COMMAND ${CMAKE_ASM_MASM_COMPILER} /Fo ${CMAKE_CURRENT_BINARY_DIR}/X86CompilationCallback_Win64.obj /c ${CMAKE_CURRENT_SOURCE_DIR}/X86CompilationCallback_Win64.asm - DEPENDS ${CMAKE_CURRENT_SOURCE_DIR}/X86CompilationCallback_Win64.asm ) - set(sources ${sources} ${CMAKE_CURRENT_BINARY_DIR}/X86CompilationCallback_Win64.obj) + set(sources ${sources} X86CompilationCallback_Win64.asm) endif() add_llvm_target(X86CodeGen ${sources}) From hhinnant at apple.com Tue Nov 16 16:13:35 2010 From: hhinnant at apple.com (Howard Hinnant) Date: Tue, 16 Nov 2010 22:13:35 -0000 Subject: [llvm-commits] [compiler-rt] r119397 - in /compiler-rt/trunk: ./ lib/ lib/arm/ lib/i386/ lib/ppc/ lib/x86_64/ test/Unit/ Message-ID: <20101116221338.3D5D12A6C12C@llvm.org> Author: hhinnant Date: Tue Nov 16 16:13:33 2010 New Revision: 119397 URL: http://llvm.org/viewvc/llvm-project?rev=119397&view=rev Log: license change Modified: compiler-rt/trunk/CREDITS.TXT compiler-rt/trunk/lib/absvdi2.c compiler-rt/trunk/lib/absvsi2.c compiler-rt/trunk/lib/absvti2.c compiler-rt/trunk/lib/adddf3.c compiler-rt/trunk/lib/addsf3.c compiler-rt/trunk/lib/addvdi3.c compiler-rt/trunk/lib/addvsi3.c compiler-rt/trunk/lib/addvti3.c compiler-rt/trunk/lib/apple_versioning.c compiler-rt/trunk/lib/arm/adddf3vfp.S compiler-rt/trunk/lib/arm/addsf3vfp.S compiler-rt/trunk/lib/arm/bswapdi2.S compiler-rt/trunk/lib/arm/bswapsi2.S compiler-rt/trunk/lib/arm/comparesf2.S compiler-rt/trunk/lib/arm/divdf3vfp.S compiler-rt/trunk/lib/arm/divsf3vfp.S compiler-rt/trunk/lib/arm/eqdf2vfp.S compiler-rt/trunk/lib/arm/eqsf2vfp.S compiler-rt/trunk/lib/arm/extendsfdf2vfp.S compiler-rt/trunk/lib/arm/fixdfsivfp.S compiler-rt/trunk/lib/arm/fixsfsivfp.S compiler-rt/trunk/lib/arm/fixunsdfsivfp.S compiler-rt/trunk/lib/arm/fixunssfsivfp.S compiler-rt/trunk/lib/arm/floatsidfvfp.S compiler-rt/trunk/lib/arm/floatsisfvfp.S compiler-rt/trunk/lib/arm/floatunssidfvfp.S compiler-rt/trunk/lib/arm/floatunssisfvfp.S compiler-rt/trunk/lib/arm/gedf2vfp.S compiler-rt/trunk/lib/arm/gesf2vfp.S compiler-rt/trunk/lib/arm/gtdf2vfp.S compiler-rt/trunk/lib/arm/gtsf2vfp.S compiler-rt/trunk/lib/arm/ledf2vfp.S compiler-rt/trunk/lib/arm/lesf2vfp.S compiler-rt/trunk/lib/arm/ltdf2vfp.S compiler-rt/trunk/lib/arm/ltsf2vfp.S compiler-rt/trunk/lib/arm/modsi3.S compiler-rt/trunk/lib/arm/muldf3vfp.S compiler-rt/trunk/lib/arm/mulsf3vfp.S compiler-rt/trunk/lib/arm/nedf2vfp.S compiler-rt/trunk/lib/arm/negdf2vfp.S compiler-rt/trunk/lib/arm/negsf2vfp.S compiler-rt/trunk/lib/arm/nesf2vfp.S compiler-rt/trunk/lib/arm/restore_vfp_d8_d15_regs.S compiler-rt/trunk/lib/arm/save_vfp_d8_d15_regs.S compiler-rt/trunk/lib/arm/subdf3vfp.S compiler-rt/trunk/lib/arm/subsf3vfp.S compiler-rt/trunk/lib/arm/switch16.S compiler-rt/trunk/lib/arm/switch32.S compiler-rt/trunk/lib/arm/switch8.S compiler-rt/trunk/lib/arm/switchu8.S compiler-rt/trunk/lib/arm/sync_synchronize.S compiler-rt/trunk/lib/arm/truncdfsf2vfp.S compiler-rt/trunk/lib/arm/unorddf2vfp.S compiler-rt/trunk/lib/arm/unordsf2vfp.S compiler-rt/trunk/lib/ashldi3.c compiler-rt/trunk/lib/ashlti3.c compiler-rt/trunk/lib/ashrdi3.c compiler-rt/trunk/lib/ashrti3.c compiler-rt/trunk/lib/assembly.h compiler-rt/trunk/lib/clear_cache.c compiler-rt/trunk/lib/clzdi2.c compiler-rt/trunk/lib/clzsi2.c compiler-rt/trunk/lib/clzti2.c compiler-rt/trunk/lib/cmpdi2.c compiler-rt/trunk/lib/cmpti2.c compiler-rt/trunk/lib/comparedf2.c compiler-rt/trunk/lib/comparesf2.c compiler-rt/trunk/lib/ctzdi2.c compiler-rt/trunk/lib/ctzsi2.c compiler-rt/trunk/lib/ctzti2.c compiler-rt/trunk/lib/divdc3.c compiler-rt/trunk/lib/divdf3.c compiler-rt/trunk/lib/divdi3.c compiler-rt/trunk/lib/divsc3.c compiler-rt/trunk/lib/divsf3.c compiler-rt/trunk/lib/divsi3.c compiler-rt/trunk/lib/divti3.c compiler-rt/trunk/lib/divxc3.c compiler-rt/trunk/lib/enable_execute_stack.c compiler-rt/trunk/lib/endianness.h compiler-rt/trunk/lib/eprintf.c compiler-rt/trunk/lib/extendsfdf2.c compiler-rt/trunk/lib/ffsdi2.c compiler-rt/trunk/lib/ffsti2.c compiler-rt/trunk/lib/fixdfdi.c compiler-rt/trunk/lib/fixdfsi.c compiler-rt/trunk/lib/fixdfti.c compiler-rt/trunk/lib/fixsfdi.c compiler-rt/trunk/lib/fixsfsi.c compiler-rt/trunk/lib/fixsfti.c compiler-rt/trunk/lib/fixunsdfdi.c compiler-rt/trunk/lib/fixunsdfsi.c compiler-rt/trunk/lib/fixunsdfti.c compiler-rt/trunk/lib/fixunssfdi.c compiler-rt/trunk/lib/fixunssfsi.c compiler-rt/trunk/lib/fixunssfti.c compiler-rt/trunk/lib/fixunsxfdi.c compiler-rt/trunk/lib/fixunsxfsi.c compiler-rt/trunk/lib/fixunsxfti.c compiler-rt/trunk/lib/fixxfdi.c compiler-rt/trunk/lib/fixxfti.c compiler-rt/trunk/lib/floatdidf.c compiler-rt/trunk/lib/floatdisf.c compiler-rt/trunk/lib/floatdixf.c compiler-rt/trunk/lib/floatsidf.c compiler-rt/trunk/lib/floatsisf.c compiler-rt/trunk/lib/floattidf.c compiler-rt/trunk/lib/floattisf.c compiler-rt/trunk/lib/floattixf.c compiler-rt/trunk/lib/floatundidf.c compiler-rt/trunk/lib/floatundisf.c compiler-rt/trunk/lib/floatundixf.c compiler-rt/trunk/lib/floatunsidf.c compiler-rt/trunk/lib/floatunsisf.c compiler-rt/trunk/lib/floatuntidf.c compiler-rt/trunk/lib/floatuntisf.c compiler-rt/trunk/lib/floatuntixf.c compiler-rt/trunk/lib/fp_lib.h compiler-rt/trunk/lib/gcc_personality_v0.c compiler-rt/trunk/lib/i386/ashldi3.S compiler-rt/trunk/lib/i386/ashrdi3.S compiler-rt/trunk/lib/i386/divdi3.S compiler-rt/trunk/lib/i386/floatdidf.S compiler-rt/trunk/lib/i386/floatdisf.S compiler-rt/trunk/lib/i386/floatdixf.S compiler-rt/trunk/lib/i386/floatundidf.S compiler-rt/trunk/lib/i386/floatundisf.S compiler-rt/trunk/lib/i386/floatundixf.S compiler-rt/trunk/lib/i386/lshrdi3.S compiler-rt/trunk/lib/i386/moddi3.S compiler-rt/trunk/lib/i386/muldi3.S compiler-rt/trunk/lib/i386/udivdi3.S compiler-rt/trunk/lib/i386/umoddi3.S compiler-rt/trunk/lib/int_lib.h compiler-rt/trunk/lib/lshrdi3.c compiler-rt/trunk/lib/lshrti3.c compiler-rt/trunk/lib/moddi3.c compiler-rt/trunk/lib/modsi3.c compiler-rt/trunk/lib/modti3.c compiler-rt/trunk/lib/muldc3.c compiler-rt/trunk/lib/muldf3.c compiler-rt/trunk/lib/muldi3.c compiler-rt/trunk/lib/mulsc3.c compiler-rt/trunk/lib/mulsf3.c compiler-rt/trunk/lib/multi3.c compiler-rt/trunk/lib/mulvdi3.c compiler-rt/trunk/lib/mulvsi3.c compiler-rt/trunk/lib/mulvti3.c compiler-rt/trunk/lib/mulxc3.c compiler-rt/trunk/lib/negdf2.c compiler-rt/trunk/lib/negdi2.c compiler-rt/trunk/lib/negsf2.c compiler-rt/trunk/lib/negti2.c compiler-rt/trunk/lib/negvdi2.c compiler-rt/trunk/lib/negvsi2.c compiler-rt/trunk/lib/negvti2.c compiler-rt/trunk/lib/paritydi2.c compiler-rt/trunk/lib/paritysi2.c compiler-rt/trunk/lib/parityti2.c compiler-rt/trunk/lib/popcountdi2.c compiler-rt/trunk/lib/popcountsi2.c compiler-rt/trunk/lib/popcountti2.c compiler-rt/trunk/lib/powidf2.c compiler-rt/trunk/lib/powisf2.c compiler-rt/trunk/lib/powitf2.c compiler-rt/trunk/lib/powixf2.c compiler-rt/trunk/lib/ppc/restFP.S compiler-rt/trunk/lib/ppc/saveFP.S compiler-rt/trunk/lib/subvdi3.c compiler-rt/trunk/lib/subvsi3.c compiler-rt/trunk/lib/subvti3.c compiler-rt/trunk/lib/trampoline_setup.c compiler-rt/trunk/lib/truncdfsf2.c compiler-rt/trunk/lib/ucmpdi2.c compiler-rt/trunk/lib/ucmpti2.c compiler-rt/trunk/lib/udivdi3.c compiler-rt/trunk/lib/udivmoddi4.c compiler-rt/trunk/lib/udivmodti4.c compiler-rt/trunk/lib/udivsi3.c compiler-rt/trunk/lib/udivti3.c compiler-rt/trunk/lib/umoddi3.c compiler-rt/trunk/lib/umodsi3.c compiler-rt/trunk/lib/umodti3.c compiler-rt/trunk/lib/x86_64/floatundidf.S compiler-rt/trunk/lib/x86_64/floatundisf.S compiler-rt/trunk/lib/x86_64/floatundixf.S compiler-rt/trunk/test/Unit/absvdi2_test.c compiler-rt/trunk/test/Unit/absvsi2_test.c compiler-rt/trunk/test/Unit/absvti2_test.c compiler-rt/trunk/test/Unit/adddf3vfp_test.c compiler-rt/trunk/test/Unit/addsf3vfp_test.c compiler-rt/trunk/test/Unit/addvdi3_test.c compiler-rt/trunk/test/Unit/addvsi3_test.c compiler-rt/trunk/test/Unit/addvti3_test.c compiler-rt/trunk/test/Unit/ashldi3_test.c compiler-rt/trunk/test/Unit/ashlti3_test.c compiler-rt/trunk/test/Unit/ashrdi3_test.c compiler-rt/trunk/test/Unit/ashrti3_test.c compiler-rt/trunk/test/Unit/bswapdi2_test.c compiler-rt/trunk/test/Unit/bswapsi2_test.c compiler-rt/trunk/test/Unit/clear_cache_test.c compiler-rt/trunk/test/Unit/clzdi2_test.c compiler-rt/trunk/test/Unit/clzsi2_test.c compiler-rt/trunk/test/Unit/clzti2_test.c compiler-rt/trunk/test/Unit/cmpdi2_test.c compiler-rt/trunk/test/Unit/cmpti2_test.c compiler-rt/trunk/test/Unit/comparedf2_test.c compiler-rt/trunk/test/Unit/comparesf2_test.c compiler-rt/trunk/test/Unit/ctzdi2_test.c compiler-rt/trunk/test/Unit/ctzsi2_test.c compiler-rt/trunk/test/Unit/ctzti2_test.c compiler-rt/trunk/test/Unit/divdc3_test.c compiler-rt/trunk/test/Unit/divdf3vfp_test.c compiler-rt/trunk/test/Unit/divdi3_test.c compiler-rt/trunk/test/Unit/divsc3_test.c compiler-rt/trunk/test/Unit/divsf3vfp_test.c compiler-rt/trunk/test/Unit/divsi3_test.c compiler-rt/trunk/test/Unit/divtc3_test.c compiler-rt/trunk/test/Unit/divti3_test.c compiler-rt/trunk/test/Unit/divxc3_test.c compiler-rt/trunk/test/Unit/enable_execute_stack_test.c compiler-rt/trunk/test/Unit/endianness.h compiler-rt/trunk/test/Unit/eqdf2vfp_test.c compiler-rt/trunk/test/Unit/eqsf2vfp_test.c compiler-rt/trunk/test/Unit/extebdsfdf2vfp_test.c compiler-rt/trunk/test/Unit/ffsdi2_test.c compiler-rt/trunk/test/Unit/ffsti2_test.c compiler-rt/trunk/test/Unit/fixdfdi_test.c compiler-rt/trunk/test/Unit/fixdfsivfp_test.c compiler-rt/trunk/test/Unit/fixdfti_test.c compiler-rt/trunk/test/Unit/fixsfdi_test.c compiler-rt/trunk/test/Unit/fixsfsivfp_test.c compiler-rt/trunk/test/Unit/fixsfti_test.c compiler-rt/trunk/test/Unit/fixunsdfdi_test.c compiler-rt/trunk/test/Unit/fixunsdfsi_test.c compiler-rt/trunk/test/Unit/fixunsdfsivfp_test.c compiler-rt/trunk/test/Unit/fixunsdfti_test.c compiler-rt/trunk/test/Unit/fixunssfdi_test.c compiler-rt/trunk/test/Unit/fixunssfsi_test.c compiler-rt/trunk/test/Unit/fixunssfsivfp_test.c compiler-rt/trunk/test/Unit/fixunssfti_test.c compiler-rt/trunk/test/Unit/fixunstfdi_test.c compiler-rt/trunk/test/Unit/fixunsxfdi_test.c compiler-rt/trunk/test/Unit/fixunsxfsi_test.c compiler-rt/trunk/test/Unit/fixunsxfti_test.c compiler-rt/trunk/test/Unit/fixxfdi_test.c compiler-rt/trunk/test/Unit/fixxfti_test.c compiler-rt/trunk/test/Unit/floatdidf_test.c compiler-rt/trunk/test/Unit/floatdisf_test.c compiler-rt/trunk/test/Unit/floatdixf_test.c compiler-rt/trunk/test/Unit/floatsidfvfp_test.c compiler-rt/trunk/test/Unit/floatsisfvfp_test.c compiler-rt/trunk/test/Unit/floattidf_test.c compiler-rt/trunk/test/Unit/floattisf_test.c compiler-rt/trunk/test/Unit/floattixf_test.c compiler-rt/trunk/test/Unit/floatundidf_test.c compiler-rt/trunk/test/Unit/floatundisf_test.c compiler-rt/trunk/test/Unit/floatundixf_test.c compiler-rt/trunk/test/Unit/floatunssidfvfp_test.c compiler-rt/trunk/test/Unit/floatunssisfvfp_test.c compiler-rt/trunk/test/Unit/floatuntidf_test.c compiler-rt/trunk/test/Unit/floatuntisf_test.c compiler-rt/trunk/test/Unit/floatuntixf_test.c compiler-rt/trunk/test/Unit/gcc_personality_test.c compiler-rt/trunk/test/Unit/gcc_personality_test_helper.cxx compiler-rt/trunk/test/Unit/gedf2vfp_test.c compiler-rt/trunk/test/Unit/gesf2vfp_test.c compiler-rt/trunk/test/Unit/gtdf2vfp_test.c compiler-rt/trunk/test/Unit/gtsf2vfp_test.c compiler-rt/trunk/test/Unit/ledf2vfp_test.c compiler-rt/trunk/test/Unit/lesf2vfp_test.c compiler-rt/trunk/test/Unit/lshrdi3_test.c compiler-rt/trunk/test/Unit/lshrti3_test.c compiler-rt/trunk/test/Unit/ltdf2vfp_test.c compiler-rt/trunk/test/Unit/ltsf2vfp_test.c compiler-rt/trunk/test/Unit/moddi3_test.c compiler-rt/trunk/test/Unit/modsi3_test.c compiler-rt/trunk/test/Unit/modti3_test.c compiler-rt/trunk/test/Unit/muldc3_test.c compiler-rt/trunk/test/Unit/muldf3vfp_test.c compiler-rt/trunk/test/Unit/muldi3_test.c compiler-rt/trunk/test/Unit/mulsc3_test.c compiler-rt/trunk/test/Unit/mulsf3vfp_test.c compiler-rt/trunk/test/Unit/multc3_test.c compiler-rt/trunk/test/Unit/multi3_test.c compiler-rt/trunk/test/Unit/mulvdi3_test.c compiler-rt/trunk/test/Unit/mulvsi3_test.c compiler-rt/trunk/test/Unit/mulvti3_test.c compiler-rt/trunk/test/Unit/mulxc3_test.c compiler-rt/trunk/test/Unit/nedf2vfp_test.c compiler-rt/trunk/test/Unit/negdf2vfp_test.c compiler-rt/trunk/test/Unit/negdi2_test.c compiler-rt/trunk/test/Unit/negsf2vfp_test.c compiler-rt/trunk/test/Unit/negti2_test.c compiler-rt/trunk/test/Unit/negvdi2_test.c compiler-rt/trunk/test/Unit/negvsi2_test.c compiler-rt/trunk/test/Unit/negvti2_test.c compiler-rt/trunk/test/Unit/nesf2vfp_test.c compiler-rt/trunk/test/Unit/paritydi2_test.c compiler-rt/trunk/test/Unit/paritysi2_test.c compiler-rt/trunk/test/Unit/parityti2_test.c compiler-rt/trunk/test/Unit/popcountdi2_test.c compiler-rt/trunk/test/Unit/popcountsi2_test.c compiler-rt/trunk/test/Unit/popcountti2_test.c compiler-rt/trunk/test/Unit/powidf2_test.c compiler-rt/trunk/test/Unit/powisf2_test.c compiler-rt/trunk/test/Unit/powitf2_test.c compiler-rt/trunk/test/Unit/powixf2_test.c compiler-rt/trunk/test/Unit/subdf3vfp_test.c compiler-rt/trunk/test/Unit/subsf3vfp_test.c compiler-rt/trunk/test/Unit/subvdi3_test.c compiler-rt/trunk/test/Unit/subvsi3_test.c compiler-rt/trunk/test/Unit/subvti3_test.c compiler-rt/trunk/test/Unit/trampoline_setup_test.c compiler-rt/trunk/test/Unit/truncdfsf2vfp_test.c compiler-rt/trunk/test/Unit/ucmpdi2_test.c compiler-rt/trunk/test/Unit/ucmpti2_test.c compiler-rt/trunk/test/Unit/udivdi3_test.c compiler-rt/trunk/test/Unit/udivmoddi4_test.c compiler-rt/trunk/test/Unit/udivmodti4_test.c compiler-rt/trunk/test/Unit/udivsi3_test.c compiler-rt/trunk/test/Unit/udivti3_test.c compiler-rt/trunk/test/Unit/umoddi3_test.c compiler-rt/trunk/test/Unit/umodsi3_test.c compiler-rt/trunk/test/Unit/umodti3_test.c compiler-rt/trunk/test/Unit/unorddf2vfp_test.c compiler-rt/trunk/test/Unit/unordsf2vfp_test.c Modified: compiler-rt/trunk/CREDITS.TXT URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/CREDITS.TXT?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/CREDITS.TXT (original) +++ compiler-rt/trunk/CREDITS.TXT Tue Nov 16 16:13:33 2010 @@ -19,3 +19,6 @@ D: CMake'ify Compiler-RT build system D: Maintain Solaris & AuroraUX ports of Compiler-RT +N: Howard Hinnant +E: hhinnant at apple.com +D: Architect and primary author of compiler-rt Modified: compiler-rt/trunk/lib/absvdi2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/absvdi2.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/absvdi2.c (original) +++ compiler-rt/trunk/lib/absvdi2.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * *===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/absvsi2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/absvsi2.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/absvsi2.c (original) +++ compiler-rt/trunk/lib/absvsi2.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/absvti2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/absvti2.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/absvti2.c (original) +++ compiler-rt/trunk/lib/absvti2.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/adddf3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/adddf3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/adddf3.c (original) +++ compiler-rt/trunk/lib/adddf3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/lib/addsf3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/addsf3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/addsf3.c (original) +++ compiler-rt/trunk/lib/addsf3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/lib/addvdi3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/addvdi3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/addvdi3.c (original) +++ compiler-rt/trunk/lib/addvdi3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/addvsi3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/addvsi3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/addvsi3.c (original) +++ compiler-rt/trunk/lib/addvsi3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/addvti3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/addvti3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/addvti3.c (original) +++ compiler-rt/trunk/lib/addvti3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/apple_versioning.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/apple_versioning.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/apple_versioning.c (original) +++ compiler-rt/trunk/lib/apple_versioning.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== */ Modified: compiler-rt/trunk/lib/arm/adddf3vfp.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/adddf3vfp.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/adddf3vfp.S (original) +++ compiler-rt/trunk/lib/arm/adddf3vfp.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/addsf3vfp.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/addsf3vfp.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/addsf3vfp.S (original) +++ compiler-rt/trunk/lib/arm/addsf3vfp.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/bswapdi2.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/bswapdi2.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/bswapdi2.S (original) +++ compiler-rt/trunk/lib/arm/bswapdi2.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/bswapsi2.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/bswapsi2.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/bswapsi2.S (original) +++ compiler-rt/trunk/lib/arm/bswapsi2.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/comparesf2.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/comparesf2.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/comparesf2.S (original) +++ compiler-rt/trunk/lib/arm/comparesf2.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/lib/arm/divdf3vfp.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/divdf3vfp.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/divdf3vfp.S (original) +++ compiler-rt/trunk/lib/arm/divdf3vfp.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/divsf3vfp.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/divsf3vfp.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/divsf3vfp.S (original) +++ compiler-rt/trunk/lib/arm/divsf3vfp.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/eqdf2vfp.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/eqdf2vfp.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/eqdf2vfp.S (original) +++ compiler-rt/trunk/lib/arm/eqdf2vfp.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/eqsf2vfp.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/eqsf2vfp.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/eqsf2vfp.S (original) +++ compiler-rt/trunk/lib/arm/eqsf2vfp.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/extendsfdf2vfp.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/extendsfdf2vfp.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/extendsfdf2vfp.S (original) +++ compiler-rt/trunk/lib/arm/extendsfdf2vfp.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/fixdfsivfp.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/fixdfsivfp.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/fixdfsivfp.S (original) +++ compiler-rt/trunk/lib/arm/fixdfsivfp.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/fixsfsivfp.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/fixsfsivfp.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/fixsfsivfp.S (original) +++ compiler-rt/trunk/lib/arm/fixsfsivfp.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/fixunsdfsivfp.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/fixunsdfsivfp.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/fixunsdfsivfp.S (original) +++ compiler-rt/trunk/lib/arm/fixunsdfsivfp.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/fixunssfsivfp.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/fixunssfsivfp.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/fixunssfsivfp.S (original) +++ compiler-rt/trunk/lib/arm/fixunssfsivfp.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/floatsidfvfp.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/floatsidfvfp.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/floatsidfvfp.S (original) +++ compiler-rt/trunk/lib/arm/floatsidfvfp.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/floatsisfvfp.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/floatsisfvfp.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/floatsisfvfp.S (original) +++ compiler-rt/trunk/lib/arm/floatsisfvfp.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/floatunssidfvfp.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/floatunssidfvfp.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/floatunssidfvfp.S (original) +++ compiler-rt/trunk/lib/arm/floatunssidfvfp.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/floatunssisfvfp.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/floatunssisfvfp.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/floatunssisfvfp.S (original) +++ compiler-rt/trunk/lib/arm/floatunssisfvfp.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/gedf2vfp.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/gedf2vfp.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/gedf2vfp.S (original) +++ compiler-rt/trunk/lib/arm/gedf2vfp.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/gesf2vfp.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/gesf2vfp.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/gesf2vfp.S (original) +++ compiler-rt/trunk/lib/arm/gesf2vfp.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/gtdf2vfp.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/gtdf2vfp.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/gtdf2vfp.S (original) +++ compiler-rt/trunk/lib/arm/gtdf2vfp.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/gtsf2vfp.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/gtsf2vfp.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/gtsf2vfp.S (original) +++ compiler-rt/trunk/lib/arm/gtsf2vfp.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/ledf2vfp.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/ledf2vfp.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/ledf2vfp.S (original) +++ compiler-rt/trunk/lib/arm/ledf2vfp.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/lesf2vfp.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/lesf2vfp.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/lesf2vfp.S (original) +++ compiler-rt/trunk/lib/arm/lesf2vfp.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/ltdf2vfp.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/ltdf2vfp.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/ltdf2vfp.S (original) +++ compiler-rt/trunk/lib/arm/ltdf2vfp.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/ltsf2vfp.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/ltsf2vfp.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/ltsf2vfp.S (original) +++ compiler-rt/trunk/lib/arm/ltsf2vfp.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/modsi3.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/modsi3.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/modsi3.S (original) +++ compiler-rt/trunk/lib/arm/modsi3.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/muldf3vfp.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/muldf3vfp.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/muldf3vfp.S (original) +++ compiler-rt/trunk/lib/arm/muldf3vfp.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/mulsf3vfp.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/mulsf3vfp.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/mulsf3vfp.S (original) +++ compiler-rt/trunk/lib/arm/mulsf3vfp.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/nedf2vfp.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/nedf2vfp.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/nedf2vfp.S (original) +++ compiler-rt/trunk/lib/arm/nedf2vfp.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/negdf2vfp.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/negdf2vfp.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/negdf2vfp.S (original) +++ compiler-rt/trunk/lib/arm/negdf2vfp.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/negsf2vfp.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/negsf2vfp.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/negsf2vfp.S (original) +++ compiler-rt/trunk/lib/arm/negsf2vfp.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/nesf2vfp.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/nesf2vfp.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/nesf2vfp.S (original) +++ compiler-rt/trunk/lib/arm/nesf2vfp.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/restore_vfp_d8_d15_regs.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/restore_vfp_d8_d15_regs.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/restore_vfp_d8_d15_regs.S (original) +++ compiler-rt/trunk/lib/arm/restore_vfp_d8_d15_regs.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/save_vfp_d8_d15_regs.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/save_vfp_d8_d15_regs.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/save_vfp_d8_d15_regs.S (original) +++ compiler-rt/trunk/lib/arm/save_vfp_d8_d15_regs.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/subdf3vfp.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/subdf3vfp.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/subdf3vfp.S (original) +++ compiler-rt/trunk/lib/arm/subdf3vfp.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/subsf3vfp.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/subsf3vfp.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/subsf3vfp.S (original) +++ compiler-rt/trunk/lib/arm/subsf3vfp.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/switch16.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/switch16.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/switch16.S (original) +++ compiler-rt/trunk/lib/arm/switch16.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/switch32.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/switch32.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/switch32.S (original) +++ compiler-rt/trunk/lib/arm/switch32.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/switch8.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/switch8.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/switch8.S (original) +++ compiler-rt/trunk/lib/arm/switch8.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/switchu8.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/switchu8.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/switchu8.S (original) +++ compiler-rt/trunk/lib/arm/switchu8.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/sync_synchronize.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/sync_synchronize.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/sync_synchronize.S (original) +++ compiler-rt/trunk/lib/arm/sync_synchronize.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/truncdfsf2vfp.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/truncdfsf2vfp.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/truncdfsf2vfp.S (original) +++ compiler-rt/trunk/lib/arm/truncdfsf2vfp.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/unorddf2vfp.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/unorddf2vfp.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/unorddf2vfp.S (original) +++ compiler-rt/trunk/lib/arm/unorddf2vfp.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/arm/unordsf2vfp.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/arm/unordsf2vfp.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/arm/unordsf2vfp.S (original) +++ compiler-rt/trunk/lib/arm/unordsf2vfp.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/ashldi3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/ashldi3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/ashldi3.c (original) +++ compiler-rt/trunk/lib/ashldi3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/ashlti3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/ashlti3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/ashlti3.c (original) +++ compiler-rt/trunk/lib/ashlti3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/ashrdi3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/ashrdi3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/ashrdi3.c (original) +++ compiler-rt/trunk/lib/ashrdi3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/ashrti3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/ashrti3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/ashrti3.c (original) +++ compiler-rt/trunk/lib/ashrti3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/assembly.h URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/assembly.h?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/assembly.h (original) +++ compiler-rt/trunk/lib/assembly.h Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/clear_cache.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/clear_cache.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/clear_cache.c (original) +++ compiler-rt/trunk/lib/clear_cache.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== */ Modified: compiler-rt/trunk/lib/clzdi2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/clzdi2.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/clzdi2.c (original) +++ compiler-rt/trunk/lib/clzdi2.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/clzsi2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/clzsi2.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/clzsi2.c (original) +++ compiler-rt/trunk/lib/clzsi2.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/clzti2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/clzti2.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/clzti2.c (original) +++ compiler-rt/trunk/lib/clzti2.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/cmpdi2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/cmpdi2.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/cmpdi2.c (original) +++ compiler-rt/trunk/lib/cmpdi2.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/cmpti2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/cmpti2.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/cmpti2.c (original) +++ compiler-rt/trunk/lib/cmpti2.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/comparedf2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/comparedf2.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/comparedf2.c (original) +++ compiler-rt/trunk/lib/comparedf2.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/lib/comparesf2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/comparesf2.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/comparesf2.c (original) +++ compiler-rt/trunk/lib/comparesf2.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/lib/ctzdi2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/ctzdi2.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/ctzdi2.c (original) +++ compiler-rt/trunk/lib/ctzdi2.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/ctzsi2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/ctzsi2.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/ctzsi2.c (original) +++ compiler-rt/trunk/lib/ctzsi2.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/ctzti2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/ctzti2.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/ctzti2.c (original) +++ compiler-rt/trunk/lib/ctzti2.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/divdc3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/divdc3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/divdc3.c (original) +++ compiler-rt/trunk/lib/divdc3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/divdf3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/divdf3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/divdf3.c (original) +++ compiler-rt/trunk/lib/divdf3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/lib/divdi3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/divdi3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/divdi3.c (original) +++ compiler-rt/trunk/lib/divdi3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/divsc3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/divsc3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/divsc3.c (original) +++ compiler-rt/trunk/lib/divsc3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/divsf3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/divsf3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/divsf3.c (original) +++ compiler-rt/trunk/lib/divsf3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/lib/divsi3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/divsi3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/divsi3.c (original) +++ compiler-rt/trunk/lib/divsi3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/divti3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/divti3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/divti3.c (original) +++ compiler-rt/trunk/lib/divti3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/divxc3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/divxc3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/divxc3.c (original) +++ compiler-rt/trunk/lib/divxc3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/enable_execute_stack.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/enable_execute_stack.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/enable_execute_stack.c (original) +++ compiler-rt/trunk/lib/enable_execute_stack.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== */ Modified: compiler-rt/trunk/lib/endianness.h URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/endianness.h?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/endianness.h (original) +++ compiler-rt/trunk/lib/endianness.h Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/eprintf.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/eprintf.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/eprintf.c (original) +++ compiler-rt/trunk/lib/eprintf.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== */ Modified: compiler-rt/trunk/lib/extendsfdf2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/extendsfdf2.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/extendsfdf2.c (original) +++ compiler-rt/trunk/lib/extendsfdf2.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/lib/ffsdi2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/ffsdi2.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/ffsdi2.c (original) +++ compiler-rt/trunk/lib/ffsdi2.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/ffsti2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/ffsti2.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/ffsti2.c (original) +++ compiler-rt/trunk/lib/ffsti2.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/fixdfdi.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/fixdfdi.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/fixdfdi.c (original) +++ compiler-rt/trunk/lib/fixdfdi.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/fixdfsi.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/fixdfsi.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/fixdfsi.c (original) +++ compiler-rt/trunk/lib/fixdfsi.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/lib/fixdfti.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/fixdfti.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/fixdfti.c (original) +++ compiler-rt/trunk/lib/fixdfti.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/fixsfdi.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/fixsfdi.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/fixsfdi.c (original) +++ compiler-rt/trunk/lib/fixsfdi.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/fixsfsi.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/fixsfsi.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/fixsfsi.c (original) +++ compiler-rt/trunk/lib/fixsfsi.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/lib/fixsfti.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/fixsfti.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/fixsfti.c (original) +++ compiler-rt/trunk/lib/fixsfti.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/fixunsdfdi.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/fixunsdfdi.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/fixunsdfdi.c (original) +++ compiler-rt/trunk/lib/fixunsdfdi.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/fixunsdfsi.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/fixunsdfsi.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/fixunsdfsi.c (original) +++ compiler-rt/trunk/lib/fixunsdfsi.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/fixunsdfti.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/fixunsdfti.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/fixunsdfti.c (original) +++ compiler-rt/trunk/lib/fixunsdfti.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/fixunssfdi.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/fixunssfdi.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/fixunssfdi.c (original) +++ compiler-rt/trunk/lib/fixunssfdi.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/fixunssfsi.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/fixunssfsi.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/fixunssfsi.c (original) +++ compiler-rt/trunk/lib/fixunssfsi.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/fixunssfti.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/fixunssfti.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/fixunssfti.c (original) +++ compiler-rt/trunk/lib/fixunssfti.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/fixunsxfdi.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/fixunsxfdi.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/fixunsxfdi.c (original) +++ compiler-rt/trunk/lib/fixunsxfdi.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/fixunsxfsi.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/fixunsxfsi.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/fixunsxfsi.c (original) +++ compiler-rt/trunk/lib/fixunsxfsi.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/fixunsxfti.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/fixunsxfti.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/fixunsxfti.c (original) +++ compiler-rt/trunk/lib/fixunsxfti.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/fixxfdi.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/fixxfdi.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/fixxfdi.c (original) +++ compiler-rt/trunk/lib/fixxfdi.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/fixxfti.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/fixxfti.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/fixxfti.c (original) +++ compiler-rt/trunk/lib/fixxfti.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/floatdidf.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/floatdidf.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/floatdidf.c (original) +++ compiler-rt/trunk/lib/floatdidf.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * *===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/floatdisf.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/floatdisf.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/floatdisf.c (original) +++ compiler-rt/trunk/lib/floatdisf.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * *===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/floatdixf.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/floatdixf.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/floatdixf.c (original) +++ compiler-rt/trunk/lib/floatdixf.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/floatsidf.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/floatsidf.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/floatsidf.c (original) +++ compiler-rt/trunk/lib/floatsidf.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/lib/floatsisf.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/floatsisf.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/floatsisf.c (original) +++ compiler-rt/trunk/lib/floatsisf.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/lib/floattidf.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/floattidf.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/floattidf.c (original) +++ compiler-rt/trunk/lib/floattidf.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/floattisf.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/floattisf.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/floattisf.c (original) +++ compiler-rt/trunk/lib/floattisf.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/floattixf.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/floattixf.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/floattixf.c (original) +++ compiler-rt/trunk/lib/floattixf.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/floatundidf.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/floatundidf.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/floatundidf.c (original) +++ compiler-rt/trunk/lib/floatundidf.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/floatundisf.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/floatundisf.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/floatundisf.c (original) +++ compiler-rt/trunk/lib/floatundisf.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/floatundixf.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/floatundixf.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/floatundixf.c (original) +++ compiler-rt/trunk/lib/floatundixf.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/floatunsidf.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/floatunsidf.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/floatunsidf.c (original) +++ compiler-rt/trunk/lib/floatunsidf.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/lib/floatunsisf.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/floatunsisf.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/floatunsisf.c (original) +++ compiler-rt/trunk/lib/floatunsisf.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/lib/floatuntidf.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/floatuntidf.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/floatuntidf.c (original) +++ compiler-rt/trunk/lib/floatuntidf.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/floatuntisf.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/floatuntisf.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/floatuntisf.c (original) +++ compiler-rt/trunk/lib/floatuntisf.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/floatuntixf.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/floatuntixf.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/floatuntixf.c (original) +++ compiler-rt/trunk/lib/floatuntixf.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/fp_lib.h URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/fp_lib.h?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/fp_lib.h (original) +++ compiler-rt/trunk/lib/fp_lib.h Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/lib/gcc_personality_v0.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/gcc_personality_v0.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/gcc_personality_v0.c (original) +++ compiler-rt/trunk/lib/gcc_personality_v0.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/i386/ashldi3.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/i386/ashldi3.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/i386/ashldi3.S (original) +++ compiler-rt/trunk/lib/i386/ashldi3.S Tue Nov 16 16:13:33 2010 @@ -1,5 +1,5 @@ -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. #include "../assembly.h" Modified: compiler-rt/trunk/lib/i386/ashrdi3.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/i386/ashrdi3.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/i386/ashrdi3.S (original) +++ compiler-rt/trunk/lib/i386/ashrdi3.S Tue Nov 16 16:13:33 2010 @@ -1,5 +1,5 @@ -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. #include "../assembly.h" Modified: compiler-rt/trunk/lib/i386/divdi3.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/i386/divdi3.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/i386/divdi3.S (original) +++ compiler-rt/trunk/lib/i386/divdi3.S Tue Nov 16 16:13:33 2010 @@ -1,5 +1,5 @@ -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. #include "../assembly.h" Modified: compiler-rt/trunk/lib/i386/floatdidf.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/i386/floatdidf.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/i386/floatdidf.S (original) +++ compiler-rt/trunk/lib/i386/floatdidf.S Tue Nov 16 16:13:33 2010 @@ -1,5 +1,5 @@ -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. #include "../assembly.h" Modified: compiler-rt/trunk/lib/i386/floatdisf.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/i386/floatdisf.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/i386/floatdisf.S (original) +++ compiler-rt/trunk/lib/i386/floatdisf.S Tue Nov 16 16:13:33 2010 @@ -1,5 +1,5 @@ -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. #include "../assembly.h" Modified: compiler-rt/trunk/lib/i386/floatdixf.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/i386/floatdixf.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/i386/floatdixf.S (original) +++ compiler-rt/trunk/lib/i386/floatdixf.S Tue Nov 16 16:13:33 2010 @@ -1,5 +1,5 @@ -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. #include "../assembly.h" Modified: compiler-rt/trunk/lib/i386/floatundidf.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/i386/floatundidf.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/i386/floatundidf.S (original) +++ compiler-rt/trunk/lib/i386/floatundidf.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/lib/i386/floatundisf.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/i386/floatundisf.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/i386/floatundisf.S (original) +++ compiler-rt/trunk/lib/i386/floatundisf.S Tue Nov 16 16:13:33 2010 @@ -1,5 +1,5 @@ -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. #include "../assembly.h" Modified: compiler-rt/trunk/lib/i386/floatundixf.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/i386/floatundixf.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/i386/floatundixf.S (original) +++ compiler-rt/trunk/lib/i386/floatundixf.S Tue Nov 16 16:13:33 2010 @@ -1,5 +1,5 @@ -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. #include "../assembly.h" Modified: compiler-rt/trunk/lib/i386/lshrdi3.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/i386/lshrdi3.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/i386/lshrdi3.S (original) +++ compiler-rt/trunk/lib/i386/lshrdi3.S Tue Nov 16 16:13:33 2010 @@ -1,5 +1,5 @@ -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. #include "../assembly.h" Modified: compiler-rt/trunk/lib/i386/moddi3.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/i386/moddi3.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/i386/moddi3.S (original) +++ compiler-rt/trunk/lib/i386/moddi3.S Tue Nov 16 16:13:33 2010 @@ -1,5 +1,5 @@ -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. #include "../assembly.h" Modified: compiler-rt/trunk/lib/i386/muldi3.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/i386/muldi3.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/i386/muldi3.S (original) +++ compiler-rt/trunk/lib/i386/muldi3.S Tue Nov 16 16:13:33 2010 @@ -1,5 +1,5 @@ -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. #include "../assembly.h" Modified: compiler-rt/trunk/lib/i386/udivdi3.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/i386/udivdi3.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/i386/udivdi3.S (original) +++ compiler-rt/trunk/lib/i386/udivdi3.S Tue Nov 16 16:13:33 2010 @@ -1,5 +1,5 @@ -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. #include "../assembly.h" Modified: compiler-rt/trunk/lib/i386/umoddi3.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/i386/umoddi3.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/i386/umoddi3.S (original) +++ compiler-rt/trunk/lib/i386/umoddi3.S Tue Nov 16 16:13:33 2010 @@ -1,5 +1,5 @@ -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. #include "../assembly.h" Modified: compiler-rt/trunk/lib/int_lib.h URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/int_lib.h?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/int_lib.h (original) +++ compiler-rt/trunk/lib/int_lib.h Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/lshrdi3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/lshrdi3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/lshrdi3.c (original) +++ compiler-rt/trunk/lib/lshrdi3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/lshrti3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/lshrti3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/lshrti3.c (original) +++ compiler-rt/trunk/lib/lshrti3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/moddi3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/moddi3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/moddi3.c (original) +++ compiler-rt/trunk/lib/moddi3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/modsi3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/modsi3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/modsi3.c (original) +++ compiler-rt/trunk/lib/modsi3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/modti3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/modti3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/modti3.c (original) +++ compiler-rt/trunk/lib/modti3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/muldc3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/muldc3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/muldc3.c (original) +++ compiler-rt/trunk/lib/muldc3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/muldf3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/muldf3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/muldf3.c (original) +++ compiler-rt/trunk/lib/muldf3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/lib/muldi3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/muldi3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/muldi3.c (original) +++ compiler-rt/trunk/lib/muldi3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/mulsc3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/mulsc3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/mulsc3.c (original) +++ compiler-rt/trunk/lib/mulsc3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/mulsf3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/mulsf3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/mulsf3.c (original) +++ compiler-rt/trunk/lib/mulsf3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/lib/multi3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/multi3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/multi3.c (original) +++ compiler-rt/trunk/lib/multi3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== Modified: compiler-rt/trunk/lib/mulvdi3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/mulvdi3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/mulvdi3.c (original) +++ compiler-rt/trunk/lib/mulvdi3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/mulvsi3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/mulvsi3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/mulvsi3.c (original) +++ compiler-rt/trunk/lib/mulvsi3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/mulvti3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/mulvti3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/mulvti3.c (original) +++ compiler-rt/trunk/lib/mulvti3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/mulxc3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/mulxc3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/mulxc3.c (original) +++ compiler-rt/trunk/lib/mulxc3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/negdf2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/negdf2.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/negdf2.c (original) +++ compiler-rt/trunk/lib/negdf2.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/lib/negdi2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/negdi2.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/negdi2.c (original) +++ compiler-rt/trunk/lib/negdi2.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/negsf2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/negsf2.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/negsf2.c (original) +++ compiler-rt/trunk/lib/negsf2.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/lib/negti2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/negti2.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/negti2.c (original) +++ compiler-rt/trunk/lib/negti2.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/negvdi2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/negvdi2.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/negvdi2.c (original) +++ compiler-rt/trunk/lib/negvdi2.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/negvsi2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/negvsi2.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/negvsi2.c (original) +++ compiler-rt/trunk/lib/negvsi2.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/negvti2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/negvti2.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/negvti2.c (original) +++ compiler-rt/trunk/lib/negvti2.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * *===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/paritydi2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/paritydi2.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/paritydi2.c (original) +++ compiler-rt/trunk/lib/paritydi2.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/paritysi2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/paritysi2.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/paritysi2.c (original) +++ compiler-rt/trunk/lib/paritysi2.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/parityti2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/parityti2.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/parityti2.c (original) +++ compiler-rt/trunk/lib/parityti2.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/popcountdi2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/popcountdi2.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/popcountdi2.c (original) +++ compiler-rt/trunk/lib/popcountdi2.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/popcountsi2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/popcountsi2.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/popcountsi2.c (original) +++ compiler-rt/trunk/lib/popcountsi2.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/popcountti2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/popcountti2.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/popcountti2.c (original) +++ compiler-rt/trunk/lib/popcountti2.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/powidf2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/powidf2.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/powidf2.c (original) +++ compiler-rt/trunk/lib/powidf2.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/powisf2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/powisf2.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/powisf2.c (original) +++ compiler-rt/trunk/lib/powisf2.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/powitf2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/powitf2.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/powitf2.c (original) +++ compiler-rt/trunk/lib/powitf2.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/powixf2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/powixf2.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/powixf2.c (original) +++ compiler-rt/trunk/lib/powixf2.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/ppc/restFP.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/ppc/restFP.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/ppc/restFP.S (original) +++ compiler-rt/trunk/lib/ppc/restFP.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/ppc/saveFP.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/ppc/saveFP.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/ppc/saveFP.S (original) +++ compiler-rt/trunk/lib/ppc/saveFP.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/lib/subvdi3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/subvdi3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/subvdi3.c (original) +++ compiler-rt/trunk/lib/subvdi3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/subvsi3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/subvsi3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/subvsi3.c (original) +++ compiler-rt/trunk/lib/subvsi3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/subvti3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/subvti3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/subvti3.c (original) +++ compiler-rt/trunk/lib/subvti3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/trampoline_setup.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/trampoline_setup.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/trampoline_setup.c (original) +++ compiler-rt/trunk/lib/trampoline_setup.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== */ Modified: compiler-rt/trunk/lib/truncdfsf2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/truncdfsf2.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/truncdfsf2.c (original) +++ compiler-rt/trunk/lib/truncdfsf2.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/lib/ucmpdi2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/ucmpdi2.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/ucmpdi2.c (original) +++ compiler-rt/trunk/lib/ucmpdi2.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/ucmpti2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/ucmpti2.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/ucmpti2.c (original) +++ compiler-rt/trunk/lib/ucmpti2.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/udivdi3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/udivdi3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/udivdi3.c (original) +++ compiler-rt/trunk/lib/udivdi3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/udivmoddi4.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/udivmoddi4.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/udivmoddi4.c (original) +++ compiler-rt/trunk/lib/udivmoddi4.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/udivmodti4.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/udivmodti4.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/udivmodti4.c (original) +++ compiler-rt/trunk/lib/udivmodti4.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/udivsi3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/udivsi3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/udivsi3.c (original) +++ compiler-rt/trunk/lib/udivsi3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/udivti3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/udivti3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/udivti3.c (original) +++ compiler-rt/trunk/lib/udivti3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/umoddi3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/umoddi3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/umoddi3.c (original) +++ compiler-rt/trunk/lib/umoddi3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/umodsi3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/umodsi3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/umodsi3.c (original) +++ compiler-rt/trunk/lib/umodsi3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/umodti3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/umodti3.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/umodti3.c (original) +++ compiler-rt/trunk/lib/umodti3.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/lib/x86_64/floatundidf.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/x86_64/floatundidf.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/x86_64/floatundidf.S (original) +++ compiler-rt/trunk/lib/x86_64/floatundidf.S Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/lib/x86_64/floatundisf.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/x86_64/floatundisf.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/x86_64/floatundisf.S (original) +++ compiler-rt/trunk/lib/x86_64/floatundisf.S Tue Nov 16 16:13:33 2010 @@ -1,5 +1,5 @@ -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. #include "../assembly.h" Modified: compiler-rt/trunk/lib/x86_64/floatundixf.S URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/x86_64/floatundixf.S?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/lib/x86_64/floatundixf.S (original) +++ compiler-rt/trunk/lib/x86_64/floatundixf.S Tue Nov 16 16:13:33 2010 @@ -1,5 +1,5 @@ -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. #include "../assembly.h" Modified: compiler-rt/trunk/test/Unit/absvdi2_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/absvdi2_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/absvdi2_test.c (original) +++ compiler-rt/trunk/test/Unit/absvdi2_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/absvsi2_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/absvsi2_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/absvsi2_test.c (original) +++ compiler-rt/trunk/test/Unit/absvsi2_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/absvti2_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/absvti2_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/absvti2_test.c (original) +++ compiler-rt/trunk/test/Unit/absvti2_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/adddf3vfp_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/adddf3vfp_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/adddf3vfp_test.c (original) +++ compiler-rt/trunk/test/Unit/adddf3vfp_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/addsf3vfp_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/addsf3vfp_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/addsf3vfp_test.c (original) +++ compiler-rt/trunk/test/Unit/addsf3vfp_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/addvdi3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/addvdi3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/addvdi3_test.c (original) +++ compiler-rt/trunk/test/Unit/addvdi3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/addvsi3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/addvsi3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/addvsi3_test.c (original) +++ compiler-rt/trunk/test/Unit/addvsi3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/addvti3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/addvti3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/addvti3_test.c (original) +++ compiler-rt/trunk/test/Unit/addvti3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/ashldi3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/ashldi3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/ashldi3_test.c (original) +++ compiler-rt/trunk/test/Unit/ashldi3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/ashlti3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/ashlti3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/ashlti3_test.c (original) +++ compiler-rt/trunk/test/Unit/ashlti3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/ashrdi3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/ashrdi3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/ashrdi3_test.c (original) +++ compiler-rt/trunk/test/Unit/ashrdi3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/ashrti3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/ashrti3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/ashrti3_test.c (original) +++ compiler-rt/trunk/test/Unit/ashrti3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/bswapdi2_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/bswapdi2_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/bswapdi2_test.c (original) +++ compiler-rt/trunk/test/Unit/bswapdi2_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/bswapsi2_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/bswapsi2_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/bswapsi2_test.c (original) +++ compiler-rt/trunk/test/Unit/bswapsi2_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/clear_cache_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/clear_cache_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/clear_cache_test.c (original) +++ compiler-rt/trunk/test/Unit/clear_cache_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/test/Unit/clzdi2_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/clzdi2_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/clzdi2_test.c (original) +++ compiler-rt/trunk/test/Unit/clzdi2_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/clzsi2_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/clzsi2_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/clzsi2_test.c (original) +++ compiler-rt/trunk/test/Unit/clzsi2_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/clzti2_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/clzti2_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/clzti2_test.c (original) +++ compiler-rt/trunk/test/Unit/clzti2_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/cmpdi2_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/cmpdi2_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/cmpdi2_test.c (original) +++ compiler-rt/trunk/test/Unit/cmpdi2_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/cmpti2_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/cmpti2_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/cmpti2_test.c (original) +++ compiler-rt/trunk/test/Unit/cmpti2_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/comparedf2_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/comparedf2_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/comparedf2_test.c (original) +++ compiler-rt/trunk/test/Unit/comparedf2_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/comparesf2_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/comparesf2_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/comparesf2_test.c (original) +++ compiler-rt/trunk/test/Unit/comparesf2_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/ctzdi2_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/ctzdi2_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/ctzdi2_test.c (original) +++ compiler-rt/trunk/test/Unit/ctzdi2_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/ctzsi2_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/ctzsi2_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/ctzsi2_test.c (original) +++ compiler-rt/trunk/test/Unit/ctzsi2_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/ctzti2_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/ctzti2_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/ctzti2_test.c (original) +++ compiler-rt/trunk/test/Unit/ctzti2_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/divdc3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/divdc3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/divdc3_test.c (original) +++ compiler-rt/trunk/test/Unit/divdc3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/divdf3vfp_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/divdf3vfp_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/divdf3vfp_test.c (original) +++ compiler-rt/trunk/test/Unit/divdf3vfp_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/divdi3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/divdi3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/divdi3_test.c (original) +++ compiler-rt/trunk/test/Unit/divdi3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/divsc3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/divsc3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/divsc3_test.c (original) +++ compiler-rt/trunk/test/Unit/divsc3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/divsf3vfp_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/divsf3vfp_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/divsf3vfp_test.c (original) +++ compiler-rt/trunk/test/Unit/divsf3vfp_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/divsi3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/divsi3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/divsi3_test.c (original) +++ compiler-rt/trunk/test/Unit/divsi3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/divtc3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/divtc3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/divtc3_test.c (original) +++ compiler-rt/trunk/test/Unit/divtc3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/divti3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/divti3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/divti3_test.c (original) +++ compiler-rt/trunk/test/Unit/divti3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/divxc3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/divxc3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/divxc3_test.c (original) +++ compiler-rt/trunk/test/Unit/divxc3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/enable_execute_stack_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/enable_execute_stack_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/enable_execute_stack_test.c (original) +++ compiler-rt/trunk/test/Unit/enable_execute_stack_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/test/Unit/endianness.h URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/endianness.h?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/endianness.h (original) +++ compiler-rt/trunk/test/Unit/endianness.h Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/test/Unit/eqdf2vfp_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/eqdf2vfp_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/eqdf2vfp_test.c (original) +++ compiler-rt/trunk/test/Unit/eqdf2vfp_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/eqsf2vfp_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/eqsf2vfp_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/eqsf2vfp_test.c (original) +++ compiler-rt/trunk/test/Unit/eqsf2vfp_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/extebdsfdf2vfp_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/extebdsfdf2vfp_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/extebdsfdf2vfp_test.c (original) +++ compiler-rt/trunk/test/Unit/extebdsfdf2vfp_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/ffsdi2_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/ffsdi2_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/ffsdi2_test.c (original) +++ compiler-rt/trunk/test/Unit/ffsdi2_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/ffsti2_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/ffsti2_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/ffsti2_test.c (original) +++ compiler-rt/trunk/test/Unit/ffsti2_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/fixdfdi_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/fixdfdi_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/fixdfdi_test.c (original) +++ compiler-rt/trunk/test/Unit/fixdfdi_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/fixdfsivfp_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/fixdfsivfp_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/fixdfsivfp_test.c (original) +++ compiler-rt/trunk/test/Unit/fixdfsivfp_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/fixdfti_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/fixdfti_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/fixdfti_test.c (original) +++ compiler-rt/trunk/test/Unit/fixdfti_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/fixsfdi_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/fixsfdi_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/fixsfdi_test.c (original) +++ compiler-rt/trunk/test/Unit/fixsfdi_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/fixsfsivfp_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/fixsfsivfp_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/fixsfsivfp_test.c (original) +++ compiler-rt/trunk/test/Unit/fixsfsivfp_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/fixsfti_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/fixsfti_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/fixsfti_test.c (original) +++ compiler-rt/trunk/test/Unit/fixsfti_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/fixunsdfdi_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/fixunsdfdi_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/fixunsdfdi_test.c (original) +++ compiler-rt/trunk/test/Unit/fixunsdfdi_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/fixunsdfsi_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/fixunsdfsi_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/fixunsdfsi_test.c (original) +++ compiler-rt/trunk/test/Unit/fixunsdfsi_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/fixunsdfsivfp_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/fixunsdfsivfp_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/fixunsdfsivfp_test.c (original) +++ compiler-rt/trunk/test/Unit/fixunsdfsivfp_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/fixunsdfti_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/fixunsdfti_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/fixunsdfti_test.c (original) +++ compiler-rt/trunk/test/Unit/fixunsdfti_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/fixunssfdi_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/fixunssfdi_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/fixunssfdi_test.c (original) +++ compiler-rt/trunk/test/Unit/fixunssfdi_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/fixunssfsi_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/fixunssfsi_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/fixunssfsi_test.c (original) +++ compiler-rt/trunk/test/Unit/fixunssfsi_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/fixunssfsivfp_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/fixunssfsivfp_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/fixunssfsivfp_test.c (original) +++ compiler-rt/trunk/test/Unit/fixunssfsivfp_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/fixunssfti_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/fixunssfti_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/fixunssfti_test.c (original) +++ compiler-rt/trunk/test/Unit/fixunssfti_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/fixunstfdi_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/fixunstfdi_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/fixunstfdi_test.c (original) +++ compiler-rt/trunk/test/Unit/fixunstfdi_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/fixunsxfdi_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/fixunsxfdi_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/fixunsxfdi_test.c (original) +++ compiler-rt/trunk/test/Unit/fixunsxfdi_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/fixunsxfsi_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/fixunsxfsi_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/fixunsxfsi_test.c (original) +++ compiler-rt/trunk/test/Unit/fixunsxfsi_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/fixunsxfti_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/fixunsxfti_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/fixunsxfti_test.c (original) +++ compiler-rt/trunk/test/Unit/fixunsxfti_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/fixxfdi_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/fixxfdi_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/fixxfdi_test.c (original) +++ compiler-rt/trunk/test/Unit/fixxfdi_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/fixxfti_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/fixxfti_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/fixxfti_test.c (original) +++ compiler-rt/trunk/test/Unit/fixxfti_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/floatdidf_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/floatdidf_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/floatdidf_test.c (original) +++ compiler-rt/trunk/test/Unit/floatdidf_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/floatdisf_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/floatdisf_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/floatdisf_test.c (original) +++ compiler-rt/trunk/test/Unit/floatdisf_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/floatdixf_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/floatdixf_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/floatdixf_test.c (original) +++ compiler-rt/trunk/test/Unit/floatdixf_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/floatsidfvfp_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/floatsidfvfp_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/floatsidfvfp_test.c (original) +++ compiler-rt/trunk/test/Unit/floatsidfvfp_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/floatsisfvfp_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/floatsisfvfp_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/floatsisfvfp_test.c (original) +++ compiler-rt/trunk/test/Unit/floatsisfvfp_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/floattidf_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/floattidf_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/floattidf_test.c (original) +++ compiler-rt/trunk/test/Unit/floattidf_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/floattisf_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/floattisf_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/floattisf_test.c (original) +++ compiler-rt/trunk/test/Unit/floattisf_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/floattixf_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/floattixf_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/floattixf_test.c (original) +++ compiler-rt/trunk/test/Unit/floattixf_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/floatundidf_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/floatundidf_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/floatundidf_test.c (original) +++ compiler-rt/trunk/test/Unit/floatundidf_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/floatundisf_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/floatundisf_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/floatundisf_test.c (original) +++ compiler-rt/trunk/test/Unit/floatundisf_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/floatundixf_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/floatundixf_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/floatundixf_test.c (original) +++ compiler-rt/trunk/test/Unit/floatundixf_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/floatunssidfvfp_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/floatunssidfvfp_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/floatunssidfvfp_test.c (original) +++ compiler-rt/trunk/test/Unit/floatunssidfvfp_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/floatunssisfvfp_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/floatunssisfvfp_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/floatunssisfvfp_test.c (original) +++ compiler-rt/trunk/test/Unit/floatunssisfvfp_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/floatuntidf_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/floatuntidf_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/floatuntidf_test.c (original) +++ compiler-rt/trunk/test/Unit/floatuntidf_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/floatuntisf_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/floatuntisf_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/floatuntisf_test.c (original) +++ compiler-rt/trunk/test/Unit/floatuntisf_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/floatuntixf_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/floatuntixf_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/floatuntixf_test.c (original) +++ compiler-rt/trunk/test/Unit/floatuntixf_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/gcc_personality_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/gcc_personality_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/gcc_personality_test.c (original) +++ compiler-rt/trunk/test/Unit/gcc_personality_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== */ Modified: compiler-rt/trunk/test/Unit/gcc_personality_test_helper.cxx URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/gcc_personality_test_helper.cxx?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/gcc_personality_test_helper.cxx (original) +++ compiler-rt/trunk/test/Unit/gcc_personality_test_helper.cxx Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// Modified: compiler-rt/trunk/test/Unit/gedf2vfp_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/gedf2vfp_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/gedf2vfp_test.c (original) +++ compiler-rt/trunk/test/Unit/gedf2vfp_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/gesf2vfp_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/gesf2vfp_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/gesf2vfp_test.c (original) +++ compiler-rt/trunk/test/Unit/gesf2vfp_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/gtdf2vfp_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/gtdf2vfp_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/gtdf2vfp_test.c (original) +++ compiler-rt/trunk/test/Unit/gtdf2vfp_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/gtsf2vfp_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/gtsf2vfp_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/gtsf2vfp_test.c (original) +++ compiler-rt/trunk/test/Unit/gtsf2vfp_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/ledf2vfp_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/ledf2vfp_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/ledf2vfp_test.c (original) +++ compiler-rt/trunk/test/Unit/ledf2vfp_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/lesf2vfp_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/lesf2vfp_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/lesf2vfp_test.c (original) +++ compiler-rt/trunk/test/Unit/lesf2vfp_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/lshrdi3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/lshrdi3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/lshrdi3_test.c (original) +++ compiler-rt/trunk/test/Unit/lshrdi3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/lshrti3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/lshrti3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/lshrti3_test.c (original) +++ compiler-rt/trunk/test/Unit/lshrti3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/ltdf2vfp_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/ltdf2vfp_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/ltdf2vfp_test.c (original) +++ compiler-rt/trunk/test/Unit/ltdf2vfp_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/ltsf2vfp_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/ltsf2vfp_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/ltsf2vfp_test.c (original) +++ compiler-rt/trunk/test/Unit/ltsf2vfp_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/moddi3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/moddi3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/moddi3_test.c (original) +++ compiler-rt/trunk/test/Unit/moddi3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/modsi3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/modsi3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/modsi3_test.c (original) +++ compiler-rt/trunk/test/Unit/modsi3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== * Modified: compiler-rt/trunk/test/Unit/modti3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/modti3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/modti3_test.c (original) +++ compiler-rt/trunk/test/Unit/modti3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/muldc3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/muldc3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/muldc3_test.c (original) +++ compiler-rt/trunk/test/Unit/muldc3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/muldf3vfp_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/muldf3vfp_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/muldf3vfp_test.c (original) +++ compiler-rt/trunk/test/Unit/muldf3vfp_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/muldi3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/muldi3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/muldi3_test.c (original) +++ compiler-rt/trunk/test/Unit/muldi3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/mulsc3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/mulsc3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/mulsc3_test.c (original) +++ compiler-rt/trunk/test/Unit/mulsc3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/mulsf3vfp_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/mulsf3vfp_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/mulsf3vfp_test.c (original) +++ compiler-rt/trunk/test/Unit/mulsf3vfp_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/multc3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/multc3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/multc3_test.c (original) +++ compiler-rt/trunk/test/Unit/multc3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/multi3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/multi3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/multi3_test.c (original) +++ compiler-rt/trunk/test/Unit/multi3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/mulvdi3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/mulvdi3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/mulvdi3_test.c (original) +++ compiler-rt/trunk/test/Unit/mulvdi3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/mulvsi3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/mulvsi3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/mulvsi3_test.c (original) +++ compiler-rt/trunk/test/Unit/mulvsi3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/mulvti3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/mulvti3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/mulvti3_test.c (original) +++ compiler-rt/trunk/test/Unit/mulvti3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/mulxc3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/mulxc3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/mulxc3_test.c (original) +++ compiler-rt/trunk/test/Unit/mulxc3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/nedf2vfp_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/nedf2vfp_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/nedf2vfp_test.c (original) +++ compiler-rt/trunk/test/Unit/nedf2vfp_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/negdf2vfp_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/negdf2vfp_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/negdf2vfp_test.c (original) +++ compiler-rt/trunk/test/Unit/negdf2vfp_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/negdi2_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/negdi2_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/negdi2_test.c (original) +++ compiler-rt/trunk/test/Unit/negdi2_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/negsf2vfp_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/negsf2vfp_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/negsf2vfp_test.c (original) +++ compiler-rt/trunk/test/Unit/negsf2vfp_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/negti2_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/negti2_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/negti2_test.c (original) +++ compiler-rt/trunk/test/Unit/negti2_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/negvdi2_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/negvdi2_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/negvdi2_test.c (original) +++ compiler-rt/trunk/test/Unit/negvdi2_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/negvsi2_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/negvsi2_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/negvsi2_test.c (original) +++ compiler-rt/trunk/test/Unit/negvsi2_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/negvti2_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/negvti2_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/negvti2_test.c (original) +++ compiler-rt/trunk/test/Unit/negvti2_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/nesf2vfp_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/nesf2vfp_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/nesf2vfp_test.c (original) +++ compiler-rt/trunk/test/Unit/nesf2vfp_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/paritydi2_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/paritydi2_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/paritydi2_test.c (original) +++ compiler-rt/trunk/test/Unit/paritydi2_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/paritysi2_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/paritysi2_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/paritysi2_test.c (original) +++ compiler-rt/trunk/test/Unit/paritysi2_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/parityti2_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/parityti2_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/parityti2_test.c (original) +++ compiler-rt/trunk/test/Unit/parityti2_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/popcountdi2_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/popcountdi2_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/popcountdi2_test.c (original) +++ compiler-rt/trunk/test/Unit/popcountdi2_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/popcountsi2_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/popcountsi2_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/popcountsi2_test.c (original) +++ compiler-rt/trunk/test/Unit/popcountsi2_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/popcountti2_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/popcountti2_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/popcountti2_test.c (original) +++ compiler-rt/trunk/test/Unit/popcountti2_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/powidf2_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/powidf2_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/powidf2_test.c (original) +++ compiler-rt/trunk/test/Unit/powidf2_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/powisf2_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/powisf2_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/powisf2_test.c (original) +++ compiler-rt/trunk/test/Unit/powisf2_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/powitf2_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/powitf2_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/powitf2_test.c (original) +++ compiler-rt/trunk/test/Unit/powitf2_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/powixf2_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/powixf2_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/powixf2_test.c (original) +++ compiler-rt/trunk/test/Unit/powixf2_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/subdf3vfp_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/subdf3vfp_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/subdf3vfp_test.c (original) +++ compiler-rt/trunk/test/Unit/subdf3vfp_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/subsf3vfp_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/subsf3vfp_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/subsf3vfp_test.c (original) +++ compiler-rt/trunk/test/Unit/subsf3vfp_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/subvdi3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/subvdi3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/subvdi3_test.c (original) +++ compiler-rt/trunk/test/Unit/subvdi3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/subvsi3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/subvsi3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/subvsi3_test.c (original) +++ compiler-rt/trunk/test/Unit/subvsi3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/subvti3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/subvti3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/subvti3_test.c (original) +++ compiler-rt/trunk/test/Unit/subvti3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/trampoline_setup_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/trampoline_setup_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/trampoline_setup_test.c (original) +++ compiler-rt/trunk/test/Unit/trampoline_setup_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ * * The LLVM Compiler Infrastructure * - * This file is distributed under the University of Illinois Open Source - * License. See LICENSE.TXT for details. + * This file is dual licensed under the MIT and the University of Illinois Open + * Source Licenses. See LICENSE.TXT for details. * * ===----------------------------------------------------------------------=== */ Modified: compiler-rt/trunk/test/Unit/truncdfsf2vfp_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/truncdfsf2vfp_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/truncdfsf2vfp_test.c (original) +++ compiler-rt/trunk/test/Unit/truncdfsf2vfp_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/ucmpdi2_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/ucmpdi2_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/ucmpdi2_test.c (original) +++ compiler-rt/trunk/test/Unit/ucmpdi2_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/ucmpti2_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/ucmpti2_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/ucmpti2_test.c (original) +++ compiler-rt/trunk/test/Unit/ucmpti2_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/udivdi3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/udivdi3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/udivdi3_test.c (original) +++ compiler-rt/trunk/test/Unit/udivdi3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/udivmoddi4_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/udivmoddi4_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/udivmoddi4_test.c (original) +++ compiler-rt/trunk/test/Unit/udivmoddi4_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/udivmodti4_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/udivmodti4_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/udivmodti4_test.c (original) +++ compiler-rt/trunk/test/Unit/udivmodti4_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/udivsi3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/udivsi3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/udivsi3_test.c (original) +++ compiler-rt/trunk/test/Unit/udivsi3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/udivti3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/udivti3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/udivti3_test.c (original) +++ compiler-rt/trunk/test/Unit/udivti3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/umoddi3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/umoddi3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/umoddi3_test.c (original) +++ compiler-rt/trunk/test/Unit/umoddi3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/umodsi3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/umodsi3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/umodsi3_test.c (original) +++ compiler-rt/trunk/test/Unit/umodsi3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/umodti3_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/umodti3_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/umodti3_test.c (original) +++ compiler-rt/trunk/test/Unit/umodti3_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/unorddf2vfp_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/unorddf2vfp_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/unorddf2vfp_test.c (original) +++ compiler-rt/trunk/test/Unit/unorddf2vfp_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Modified: compiler-rt/trunk/test/Unit/unordsf2vfp_test.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/unordsf2vfp_test.c?rev=119397&r1=119396&r2=119397&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/unordsf2vfp_test.c (original) +++ compiler-rt/trunk/test/Unit/unordsf2vfp_test.c Tue Nov 16 16:13:33 2010 @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // From sabre at nondot.org Tue Nov 16 16:19:06 2010 From: sabre at nondot.org (Chris Lattner) Date: Tue, 16 Nov 2010 22:19:06 -0000 Subject: [llvm-commits] [llvm] r119398 - /llvm/trunk/docs/CodingStandards.html Message-ID: <20101116221906.D6B5E2A6C12C@llvm.org> Author: lattner Date: Tue Nov 16 16:19:06 2010 New Revision: 119398 URL: http://llvm.org/viewvc/llvm-project?rev=119398&view=rev Log: update coding standards. Partial specialization is now ok, though possibly not a good idea. Modified: llvm/trunk/docs/CodingStandards.html Modified: llvm/trunk/docs/CodingStandards.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CodingStandards.html?rev=119398&r1=119397&r2=119398&view=diff ============================================================================== --- llvm/trunk/docs/CodingStandards.html (original) +++ llvm/trunk/docs/CodingStandards.html Tue Nov 16 16:19:06 2010 @@ -397,9 +397,10 @@ code, isolate it behind a well defined (and well documented) interface.

    In practice, this means that you shouldn't assume much about the host -compiler, including its support for "high tech" features like partial -specialization of templates. If these features are used, they should only be -an implementation detail of a library which has a simple exposed API.

    +compiler, and Visual Studio tends to be the lowest common denominator. +If advanced features are used, they should only be an implementation detail of +a library which has a simple exposed API, and preferably be buried in +libSystem.

From pdox at google.com Tue Nov 16 16:24:11 2010 From: pdox at google.com (David Meyer) Date: Tue, 16 Nov 2010 14:24:11 -0800 Subject: [llvm-commits] [PATCH] PERF: Reuse data fragments while lowering Message-ID: Hi Dan & Rafael, This patch makes it possible to re-use existing data fragments when lowering (instead of creating new ones). - David Meyer -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101116/4312a45e/attachment.html -------------- next part -------------- A non-text attachment was scrubbed... Name: instlowering.patch Type: application/octet-stream Size: 5432 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101116/4312a45e/attachment.obj From gohman at apple.com Tue Nov 16 16:43:24 2010 From: gohman at apple.com (Dan Gohman) Date: Tue, 16 Nov 2010 22:43:24 -0000 Subject: [llvm-commits] [llvm] r119400 - /llvm/trunk/lib/Target/X86/X86FastISel.cpp Message-ID: <20101116224324.1D22D2A6C12C@llvm.org> Author: djg Date: Tue Nov 16 16:43:23 2010 New Revision: 119400 URL: http://llvm.org/viewvc/llvm-project?rev=119400&view=rev Log: Reapply r118917. With pseudo-instruction expansion moved to a different pass, the complicated interaction between cmov expansion and fast isel is no longer a concern. Modified: llvm/trunk/lib/Target/X86/X86FastISel.cpp Modified: llvm/trunk/lib/Target/X86/X86FastISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FastISel.cpp?rev=119400&r1=119399&r2=119400&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86FastISel.cpp (original) +++ llvm/trunk/lib/Target/X86/X86FastISel.cpp Tue Nov 16 16:43:23 2010 @@ -320,11 +320,11 @@ // Don't walk into other basic blocks; it's possible we haven't // visited them yet, so the instructions may not yet be assigned // virtual registers. - if (FuncInfo.MBBMap[I->getParent()] != FuncInfo.MBB) - return false; - - Opcode = I->getOpcode(); - U = I; + if (FuncInfo.StaticAllocaMap.count(static_cast(V)) || + FuncInfo.MBBMap[I->getParent()] == FuncInfo.MBB) { + Opcode = I->getOpcode(); + U = I; + } } else if (const ConstantExpr *C = dyn_cast(V)) { Opcode = C->getOpcode(); U = C; From aggarwa4 at illinois.edu Tue Nov 16 16:49:16 2010 From: aggarwa4 at illinois.edu (Arushi Aggarwal) Date: Tue, 16 Nov 2010 22:49:16 -0000 Subject: [llvm-commits] [poolalloc] r119401 - /poolalloc/trunk/lib/DSA/EquivClassGraphs.cpp Message-ID: <20101116224916.9168C2A6C12C@llvm.org> Author: aggarwa4 Date: Tue Nov 16 16:49:16 2010 New Revision: 119401 URL: http://llvm.org/viewvc/llvm-project?rev=119401&view=rev Log: Use a set instead of list to keep track of DSGraphs. Modified: poolalloc/trunk/lib/DSA/EquivClassGraphs.cpp Modified: poolalloc/trunk/lib/DSA/EquivClassGraphs.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/EquivClassGraphs.cpp?rev=119401&r1=119400&r2=119401&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/EquivClassGraphs.cpp (original) +++ poolalloc/trunk/lib/DSA/EquivClassGraphs.cpp Tue Nov 16 16:49:16 2010 @@ -43,11 +43,11 @@ init(&getAnalysis(), false, true, false, true); //make a list of all the DSGraphs - std::listgraphList; + std::setgraphList; for(Module::iterator F = M.begin(); F != M.end(); ++F) { if(!(F->isDeclaration())) - graphList.push_back(getOrCreateGraph(F)); + graphList.insert(getOrCreateGraph(F)); } //update the EQ class from indirect calls @@ -58,10 +58,10 @@ for(Module::iterator F = M.begin(); F != M.end(); ++F) { if(!(F->isDeclaration())) - graphList.remove(getOrCreateGraph(F)); + graphList.erase(getOrCreateGraph(F)); } // free memory for the DSGraphs, no longer in use. - for(std::list::iterator i = graphList.begin(),e = graphList.end(); + for(std::set::iterator i = graphList.begin(),e = graphList.end(); i!=e;i++) { delete (*i); } From isanbard at gmail.com Tue Nov 16 17:44:49 2010 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 16 Nov 2010 23:44:49 -0000 Subject: [llvm-commits] [llvm] r119403 - in /llvm/trunk/lib/Target/ARM: ARMInstrInfo.td ARMInstrThumb2.td Message-ID: <20101116234449.E9E842A6C12C@llvm.org> Author: void Date: Tue Nov 16 17:44:49 2010 New Revision: 119403 URL: http://llvm.org/viewvc/llvm-project?rev=119403&view=rev Log: Use the correct variable names so that the encodings will be correct. Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=119403&r1=119402&r2=119403&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Tue Nov 16 17:44:49 2010 @@ -1870,9 +1870,9 @@ let isReturn = 1, isTerminator = 1, isBarrier = 1, mayLoad = 1, hasExtraDefRegAllocReq = 1, isCodeGenOnly = 1 in def LDMIA_RET : AXI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, - reglist:$dsts, variable_ops), + reglist:$regs, variable_ops), IndexModeUpd, LdStMulFrm, IIC_iLoad_mBr, - "ldmia${p}\t$Rn!, $dsts", + "ldmia${p}\t$Rn!, $regs", "$Rn = $wb", []> { let Inst{24-23} = 0b01; // Increment After let Inst{21} = 1; // Writeback Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=119403&r1=119402&r2=119403&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Tue Nov 16 17:44:49 2010 @@ -2760,9 +2760,9 @@ let isReturn = 1, isTerminator = 1, isBarrier = 1, mayLoad = 1, hasExtraDefRegAllocReq = 1, isCodeGenOnly = 1 in def t2LDMIA_RET: T2XIt<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, - reglist:$dsts, variable_ops), + reglist:$regs, variable_ops), IIC_iLoad_mBr, - "ldmia${p}.w\t$Rn!, $dsts", + "ldmia${p}.w\t$Rn!, $regs", "$Rn = $wb", []> { bits<4> Rn; bits<16> regs; From ofv at wanadoo.es Tue Nov 16 17:57:11 2010 From: ofv at wanadoo.es (=?utf-8?Q?=C3=93scar_Fuentes?=) Date: Wed, 17 Nov 2010 00:57:11 +0100 Subject: [llvm-commits] [Review request] CMake/MSVS: Support for the target "check" References: Message-ID: <87lj4svn3c.fsf@telefonica.net> Hello Takumi. NAKAMURA Takumi writes: > They provide ability to run "check" on Visual Studio IDE with any > configurations. > Please take a look into them. > > * 0001-test-CMakeLists.txt-Apply-multiple-configurations-on.patch > > test/CMakeLists.txt: Apply multiple configurations on Visual Studio > with clang/test's stuff. [snip] > On MSVS8, ${CMAKE_CFG_INTDIR}, aka $(OutDir), has capitalized name(eg. > Debug), although $(OutDir) is made with lower case(eg. debug). I don't know much about the testing framework, but I can comment on some cmake issues: > + # Run-time build mode > + if(MSVC) > + # Expect $(Configuration), $(OutDir), etc. > + set(BUILD_MODE "${CMAKE_CFG_INTDIR}") MSVC is true for nmake builds too (which build type is selected at configure time, as the rest of makefile-based generators) and I think you want to restrict the above to the IDE. So change that to if( MSVC_IDE ) [snip] Please test the patch with the VS IDE, with VS nmake and with unix makefiles (on Linux, OS/X or MSYS). From bob.wilson at apple.com Tue Nov 16 17:57:01 2010 From: bob.wilson at apple.com (Bob Wilson) Date: Tue, 16 Nov 2010 23:57:01 -0000 Subject: [llvm-commits] [llvm] r119404 - /llvm/trunk/utils/TableGen/NeonEmitter.cpp Message-ID: <20101116235701.6F0EA2A6C12C@llvm.org> Author: bwilson Date: Tue Nov 16 17:57:01 2010 New Revision: 119404 URL: http://llvm.org/viewvc/llvm-project?rev=119404&view=rev Log: Refactor to new GetNumElements function. No functional change. Modified: llvm/trunk/utils/TableGen/NeonEmitter.cpp Modified: llvm/trunk/utils/TableGen/NeonEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/NeonEmitter.cpp?rev=119404&r1=119403&r2=119404&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/NeonEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/NeonEmitter.cpp Tue Nov 16 17:57:01 2010 @@ -483,20 +483,31 @@ return s; } -// Generate the definition for this intrinsic, e.g. "a + b" for OpAdd. -static std::string GenOpString(OpKind op, const std::string &proto, - StringRef typestr) { - bool dummy, quad = false; +static unsigned GetNumElements(StringRef typestr, bool &quad) { + quad = false; + bool dummy = false; char type = ClassifyType(typestr, quad, dummy, dummy); unsigned nElts = 0; switch (type) { - case 'c': nElts = 8; break; - case 's': nElts = 4; break; - case 'i': nElts = 2; break; - case 'l': nElts = 1; break; - case 'h': nElts = 4; break; - case 'f': nElts = 2; break; + case 'c': nElts = 8; break; + case 's': nElts = 4; break; + case 'i': nElts = 2; break; + case 'l': nElts = 1; break; + case 'h': nElts = 4; break; + case 'f': nElts = 2; break; + default: + throw "unhandled type!"; + break; } + if (quad) nElts <<= 1; + return nElts; +} + +// Generate the definition for this intrinsic, e.g. "a + b" for OpAdd. +static std::string GenOpString(OpKind op, const std::string &proto, + StringRef typestr) { + bool quad; + unsigned nElts = GetNumElements(typestr, quad); std::string ts = TypeString(proto[0], typestr); std::string s; @@ -516,19 +527,19 @@ s += "a - b"; break; case OpMulN: - s += "a * " + Duplicate(nElts << (int)quad, typestr, "b"); + s += "a * " + Duplicate(nElts, typestr, "b"); break; case OpMul: s += "a * b"; break; case OpMlaN: - s += "a + (b * " + Duplicate(nElts << (int)quad, typestr, "c") + ")"; + s += "a + (b * " + Duplicate(nElts, typestr, "c") + ")"; break; case OpMla: s += "a + (b * c)"; break; case OpMlsN: - s += "a - (b * " + Duplicate(nElts << (int)quad, typestr, "c") + ")"; + s += "a - (b * " + Duplicate(nElts, typestr, "c") + ")"; break; case OpMls: s += "a - (b * c)"; @@ -583,7 +594,7 @@ s += "(((float64x2_t)a)[0])"; break; case OpDup: - s += Duplicate(nElts << (int)quad, typestr, "a"); + s += Duplicate(nElts, typestr, "a"); break; case OpSelect: // ((0 & 1) | (~0 & 2)) @@ -593,26 +604,29 @@ break; case OpRev16: s += "__builtin_shufflevector(a, a"; - for (unsigned i = 2; i <= nElts << (int)quad; i += 2) + for (unsigned i = 2; i <= nElts; i += 2) for (unsigned j = 0; j != 2; ++j) s += ", " + utostr(i - j - 1); s += ")"; break; - case OpRev32: - nElts >>= 1; + case OpRev32: { + unsigned WordElts = nElts >> (1 + (int)quad); s += "__builtin_shufflevector(a, a"; - for (unsigned i = nElts; i <= nElts << (1 + (int)quad); i += nElts) - for (unsigned j = 0; j != nElts; ++j) + for (unsigned i = WordElts; i <= nElts; i += WordElts) + for (unsigned j = 0; j != WordElts; ++j) s += ", " + utostr(i - j - 1); s += ")"; break; - case OpRev64: + } + case OpRev64: { + unsigned DblWordElts = nElts >> (int)quad; s += "__builtin_shufflevector(a, a"; - for (unsigned i = nElts; i <= nElts << (int)quad; i += nElts) - for (unsigned j = 0; j != nElts; ++j) + for (unsigned i = DblWordElts; i <= nElts; i += DblWordElts) + for (unsigned j = 0; j != DblWordElts; ++j) s += ", " + utostr(i - j - 1); s += ")"; break; + } default: throw "unknown OpKind!"; break; @@ -678,19 +692,8 @@ // Generate the definition for this intrinsic, e.g. __builtin_neon_cls(a) static std::string GenBuiltin(const std::string &name, const std::string &proto, StringRef typestr, ClassKind ck) { - bool dummy, quad = false; - char type = ClassifyType(typestr, quad, dummy, dummy); - unsigned nElts = 0; - switch (type) { - case 'c': nElts = 8; break; - case 's': nElts = 4; break; - case 'i': nElts = 2; break; - case 'l': nElts = 1; break; - case 'h': nElts = 4; break; - case 'f': nElts = 2; break; - } - if (quad) nElts <<= 1; - + bool quad; + unsigned nElts = GetNumElements(typestr, quad); char arg = 'a'; std::string s; From bob.wilson at apple.com Tue Nov 16 17:57:03 2010 From: bob.wilson at apple.com (Bob Wilson) Date: Tue, 16 Nov 2010 23:57:03 -0000 Subject: [llvm-commits] [llvm] r119405 - /llvm/trunk/utils/TableGen/NeonEmitter.cpp Message-ID: <20101116235703.A10D12A6C12D@llvm.org> Author: bwilson Date: Tue Nov 16 17:57:03 2010 New Revision: 119405 URL: http://llvm.org/viewvc/llvm-project?rev=119405&view=rev Log: Change Neon polynomial types to be signed to match GCC. Modified: llvm/trunk/utils/TableGen/NeonEmitter.cpp Modified: llvm/trunk/utils/TableGen/NeonEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/NeonEmitter.cpp?rev=119405&r1=119404&r2=119405&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/NeonEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/NeonEmitter.cpp Tue Nov 16 17:57:03 2010 @@ -833,8 +833,8 @@ // Emit NEON-specific scalar typedefs. OS << "typedef float float32_t;\n"; - OS << "typedef uint8_t poly8_t;\n"; - OS << "typedef uint16_t poly16_t;\n"; + OS << "typedef int8_t poly8_t;\n"; + OS << "typedef int16_t poly16_t;\n"; OS << "typedef uint16_t float16_t;\n"; // Emit Neon vector typedefs. From bob.wilson at apple.com Tue Nov 16 17:57:06 2010 From: bob.wilson at apple.com (Bob Wilson) Date: Tue, 16 Nov 2010 23:57:06 -0000 Subject: [llvm-commits] [llvm] r119406 - /llvm/trunk/utils/TableGen/NeonEmitter.cpp Message-ID: <20101116235706.B75BC2A6C12E@llvm.org> Author: bwilson Date: Tue Nov 16 17:57:06 2010 New Revision: 119406 URL: http://llvm.org/viewvc/llvm-project?rev=119406&view=rev Log: Use new neon_vector_type and neon_polyvector_type attributes for Neon vectors. Modified: llvm/trunk/utils/TableGen/NeonEmitter.cpp Modified: llvm/trunk/utils/TableGen/NeonEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/NeonEmitter.cpp?rev=119406&r1=119405&r2=119406&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/NeonEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/NeonEmitter.cpp Tue Nov 16 17:57:06 2010 @@ -844,21 +844,25 @@ // Emit vector typedefs. for (unsigned i = 0, e = TDTypeVec.size(); i != e; ++i) { - bool dummy, quad = false; - (void) ClassifyType(TDTypeVec[i], quad, dummy, dummy); - OS << "typedef __attribute__(( __vector_size__("; - - OS << utostr(8*(quad ? 2 : 1)) << ") )) "; - if (!quad) + bool dummy, quad = false, poly = false; + (void) ClassifyType(TDTypeVec[i], quad, poly, dummy); + if (poly) + OS << "typedef __attribute__((neon_polyvector_type("; + else + OS << "typedef __attribute__((neon_vector_type("; + + unsigned nElts = GetNumElements(TDTypeVec[i], quad); + OS << utostr(nElts) << "))) "; + if (nElts < 10) OS << " "; OS << TypeString('s', TDTypeVec[i]); OS << " " << TypeString('d', TDTypeVec[i]) << ";\n"; } OS << "\n"; - OS << "typedef __attribute__(( __vector_size__(8) )) " + OS << "typedef __attribute__((__vector_size__(8))) " "double float64x1_t;\n"; - OS << "typedef __attribute__(( __vector_size__(16) )) " + OS << "typedef __attribute__((__vector_size__(16))) " "double float64x2_t;\n"; OS << "\n"; From aggarwa4 at illinois.edu Tue Nov 16 18:21:22 2010 From: aggarwa4 at illinois.edu (Arushi Aggarwal) Date: Wed, 17 Nov 2010 00:21:22 -0000 Subject: [llvm-commits] [poolalloc] r119410 - in /poolalloc/trunk/test: TEST.dsgraph.Makefile TEST.dsgraph.report Message-ID: <20101117002122.722A52A6C12C@llvm.org> Author: aggarwa4 Date: Tue Nov 16 18:21:22 2010 New Revision: 119410 URL: http://llvm.org/viewvc/llvm-project?rev=119410&view=rev Log: We dont want to run steens-aa any more Modified: poolalloc/trunk/test/TEST.dsgraph.Makefile poolalloc/trunk/test/TEST.dsgraph.report Modified: poolalloc/trunk/test/TEST.dsgraph.Makefile URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/test/TEST.dsgraph.Makefile?rev=119410&r1=119409&r2=119410&view=diff ============================================================================== --- poolalloc/trunk/test/TEST.dsgraph.Makefile (original) +++ poolalloc/trunk/test/TEST.dsgraph.Makefile Tue Nov 16 18:21:22 2010 @@ -32,8 +32,6 @@ @# Gather data -($(RUNOPT) -analyze -dsa-$(PASS) $(ANALYZE_OPTS) $<)> $@.time.1 2>&1 -($(RUNOPT) -analyze $(MEM) -dsa-$(PASS) -disable-verify $<)> $@.mem.1 2>&1 - -($(RUNOPT) -steens-aa -time-passes -disable-output $<) > $@.time.2 2>&1 - -($(RUNOPT) -steens-aa $(MEM) -disable-output $<) > $@.mem.2 2>&1 @# Emit data. @echo "---------------------------------------------------------------" > $@ @echo ">>> ========= '$(RELDIR)/$*' Program" >> $@ @@ -75,9 +73,6 @@ @/bin/echo -n "TIME: " >> $@ - at grep ' Top-down Data Structure' $@.time.1 >> $@ @echo >> $@ - @/bin/echo -n "TIME: " >> $@ - - at grep ' Steensgaard.s alias analysis' $@.time.2 >> $@ - @echo >> $@ @# Emit space data. @/bin/echo -n "MEM: " >> $@ - at grep ' Local Data Structure' $@.mem.1 >> $@ @@ -87,9 +82,6 @@ @echo >> $@ @/bin/echo -n "MEM: " >> $@ - at grep ' Top-down Data Structure' $@.mem.1 >> $@ - @echo >> $@ - @/bin/echo -n "MEM: " >> $@ - - at grep ' Steensgaard.s alias analysis' $@.mem.2 >> $@ Modified: poolalloc/trunk/test/TEST.dsgraph.report URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/test/TEST.dsgraph.report?rev=119410&r1=119409&r2=119410&view=diff ============================================================================== --- poolalloc/trunk/test/TEST.dsgraph.report (original) +++ poolalloc/trunk/test/TEST.dsgraph.report Tue Nov 16 18:21:22 2010 @@ -142,7 +142,6 @@ ["BUTim:", "${USERSYSTTIME}Bottom"], ["TDTim:", "${USERSYSTTIME}Top"], ["SumTm:", sub { return SumCols(@_, 3); }], - ["SteTm:", "${USERSYSTTIME}Steensgaard"], [], # Sizes ["LcSize:" , '([0-9]+) Local'], From aggarwa4 at illinois.edu Tue Nov 16 18:31:59 2010 From: aggarwa4 at illinois.edu (Arushi Aggarwal) Date: Wed, 17 Nov 2010 00:31:59 -0000 Subject: [llvm-commits] [poolalloc] r119426 - /poolalloc/trunk/lib/DSA/BottomUpClosure.cpp Message-ID: <20101117003200.0911C2A6C12C@llvm.org> Author: aggarwa4 Date: Tue Nov 16 18:31:59 2010 New Revision: 119426 URL: http://llvm.org/viewvc/llvm-project?rev=119426&view=rev Log: Undo change 119291, since it causes an infinte loop in 254.gap. This should be investigated. Modified: poolalloc/trunk/lib/DSA/BottomUpClosure.cpp Modified: poolalloc/trunk/lib/DSA/BottomUpClosure.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/BottomUpClosure.cpp?rev=119426&r1=119425&r2=119426&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/BottomUpClosure.cpp (original) +++ poolalloc/trunk/lib/DSA/BottomUpClosure.cpp Tue Nov 16 18:31:59 2010 @@ -84,8 +84,7 @@ // for (Module::iterator F = M.begin(); F != M.end(); ++F) { if (!(F->isDeclaration())){ - DSGraph *Graph = getOrCreateGraph(F); - cloneGlobalsInto(Graph); + getOrCreateGraph(F); } } From peter at pcc.me.uk Tue Nov 16 18:43:44 2010 From: peter at pcc.me.uk (Peter Collingbourne) Date: Wed, 17 Nov 2010 00:43:44 -0000 Subject: [llvm-commits] [llvm] r119433 - in /llvm/trunk: include/llvm/System/Path.h lib/Object/ObjectFile.cpp lib/System/Path.cpp Message-ID: <20101117004344.1CA8D2A6C12C@llvm.org> Author: pcc Date: Tue Nov 16 18:43:43 2010 New Revision: 119433 URL: http://llvm.org/viewvc/llvm-project?rev=119433&view=rev Log: Fix typo: Exectuable -> Executable Modified: llvm/trunk/include/llvm/System/Path.h llvm/trunk/lib/Object/ObjectFile.cpp llvm/trunk/lib/System/Path.cpp Modified: llvm/trunk/include/llvm/System/Path.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/System/Path.h?rev=119433&r1=119432&r2=119433&view=diff ============================================================================== --- llvm/trunk/include/llvm/System/Path.h (original) +++ llvm/trunk/include/llvm/System/Path.h Tue Nov 16 18:43:43 2010 @@ -710,7 +710,7 @@ Mach_O_Executable_FileType, ///< Mach-O Executable Mach_O_FixedVirtualMemorySharedLib_FileType, ///< Mach-O Shared Lib, FVM Mach_O_Core_FileType, ///< Mach-O Core File - Mach_O_PreloadExectuable_FileType, ///< Mach-O Preloaded Executable + Mach_O_PreloadExecutable_FileType, ///< Mach-O Preloaded Executable Mach_O_DynamicallyLinkedSharedLib_FileType, ///< Mach-O dynlinked shared lib Mach_O_DynamicLinker_FileType, ///< The Mach-O dynamic linker Mach_O_Bundle_FileType, ///< Mach-O Bundle file Modified: llvm/trunk/lib/Object/ObjectFile.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Object/ObjectFile.cpp?rev=119433&r1=119432&r2=119433&view=diff ============================================================================== --- llvm/trunk/lib/Object/ObjectFile.cpp (original) +++ llvm/trunk/lib/Object/ObjectFile.cpp Tue Nov 16 18:43:43 2010 @@ -48,7 +48,7 @@ case sys::Mach_O_Executable_FileType: case sys::Mach_O_FixedVirtualMemorySharedLib_FileType: case sys::Mach_O_Core_FileType: - case sys::Mach_O_PreloadExectuable_FileType: + case sys::Mach_O_PreloadExecutable_FileType: case sys::Mach_O_DynamicallyLinkedSharedLib_FileType: case sys::Mach_O_DynamicLinker_FileType: case sys::Mach_O_Bundle_FileType: Modified: llvm/trunk/lib/System/Path.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Path.cpp?rev=119433&r1=119432&r2=119433&view=diff ============================================================================== --- llvm/trunk/lib/System/Path.cpp (original) +++ llvm/trunk/lib/System/Path.cpp Tue Nov 16 18:43:43 2010 @@ -104,7 +104,7 @@ case 2: return Mach_O_Executable_FileType; case 3: return Mach_O_FixedVirtualMemorySharedLib_FileType; case 4: return Mach_O_Core_FileType; - case 5: return Mach_O_PreloadExectuable_FileType; + case 5: return Mach_O_PreloadExecutable_FileType; case 6: return Mach_O_DynamicallyLinkedSharedLib_FileType; case 7: return Mach_O_DynamicLinker_FileType; case 8: return Mach_O_Bundle_FileType; From isanbard at gmail.com Tue Nov 16 18:45:23 2010 From: isanbard at gmail.com (Bill Wendling) Date: Wed, 17 Nov 2010 00:45:23 -0000 Subject: [llvm-commits] [llvm] r119435 - in /llvm/trunk/lib/Target/ARM: ARMInstrFormats.td ARMMCCodeEmitter.cpp Message-ID: <20101117004523.43D232A6C12C@llvm.org> Author: void Date: Tue Nov 16 18:45:23 2010 New Revision: 119435 URL: http://llvm.org/viewvc/llvm-project?rev=119435&view=rev Log: Add binary emission stuff for VLDM/VSTM. This reuses the "getRegisterListOpValue" logic. If the registers are double or single precision, the value returned is suitable for VLDM/VSTM. Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=119435&r1=119434&r2=119435&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Tue Nov 16 18:45:23 2010 @@ -1125,7 +1125,7 @@ // A6.2.3 Special data instructions and branch and exchange encoding. class T1Special opcode> : Encoding16 { let Inst{15-10} = 0b010001; - let Inst{9-6} = opcode; + let Inst{9-6} = opcode; } // A6.2.4 Load/store single data item encoding. @@ -1321,6 +1321,8 @@ IndexMode im, Format f, InstrItinClass itin, string asm, string cstr, list pattern> : InstARM { + bits<4> p; + let Inst{31-28} = p; let OutOperandList = oops; let InOperandList = iops; let AsmString = asm; @@ -1399,6 +1401,16 @@ string asm, string cstr, list pattern> : VFPXI { + // Instruction operands. + bits<4> Rn; + bits<13> regs; + + // Encode instruction operands. + let Inst{19-16} = Rn; + let Inst{22} = regs{12}; + let Inst{15-12} = regs{11-8}; + let Inst{7-0} = regs{7-0}; + // TODO: Mark the instructions with the appropriate subtarget info. let Inst{27-25} = 0b110; let Inst{11-9} = 0b101; @@ -1412,6 +1424,16 @@ string asm, string cstr, list pattern> : VFPXI { + // Instruction operands. + bits<4> Rn; + bits<13> regs; + + // Encode instruction operands. + let Inst{19-16} = Rn; + let Inst{22} = regs{8}; + let Inst{15-12} = regs{12-9}; + let Inst{7-0} = regs{7-0}; + // TODO: Mark the instructions with the appropriate subtarget info. let Inst{27-25} = 0b110; let Inst{11-9} = 0b101; Modified: llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp?rev=119435&r1=119434&r2=119435&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp Tue Nov 16 18:45:23 2010 @@ -661,13 +661,34 @@ unsigned ARMMCCodeEmitter:: getRegisterListOpValue(const MCInst &MI, unsigned Op, SmallVectorImpl &Fixups) const { - // Convert a list of GPRs into a bitfield (R0 -> bit 0). For each - // register in the list, set the corresponding bit. + // VLDM/VSTM: + // {12-8} = Vd + // {7-0} = Number of registers + // + // LDM/STM: + // {15-0} = Bitfield of GPRs. + unsigned Reg = MI.getOperand(Op).getReg(); + bool SPRRegs = ARM::SPRRegClass.contains(Reg); + bool DPRRegs = ARM::DPRRegClass.contains(Reg); + unsigned Binary = 0; - for (unsigned i = Op, e = MI.getNumOperands(); i < e; ++i) { - unsigned regno = getARMRegisterNumbering(MI.getOperand(i).getReg()); - Binary |= 1 << regno; + + if (SPRRegs || DPRRegs) { + // VLDM/VSTM + unsigned RegNo = getARMRegisterNumbering(Reg); + unsigned NumRegs = (MI.getNumOperands() - Op) & 0xff; + Binary |= (RegNo & 0x1f) << 8; + if (SPRRegs) + Binary |= NumRegs; + else + Binary |= NumRegs * 2; + } else { + for (unsigned I = Op, E = MI.getNumOperands(); I < E; ++I) { + unsigned RegNo = getARMRegisterNumbering(MI.getOperand(I).getReg()); + Binary |= 1 << RegNo; + } } + return Binary; } From echristo at apple.com Tue Nov 16 18:55:37 2010 From: echristo at apple.com (Eric Christopher) Date: Wed, 17 Nov 2010 00:55:37 -0000 Subject: [llvm-commits] [llvm] r119446 - /llvm/trunk/lib/CodeGen/MachineVerifier.cpp Message-ID: <20101117005537.1A5322A6C12C@llvm.org> Author: echristo Date: Tue Nov 16 18:55:36 2010 New Revision: 119446 URL: http://llvm.org/viewvc/llvm-project?rev=119446&view=rev Log: Only avoid the check if we're the last operand before the variable operands in a variadic instruction. Modified: llvm/trunk/lib/CodeGen/MachineVerifier.cpp Modified: llvm/trunk/lib/CodeGen/MachineVerifier.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineVerifier.cpp?rev=119446&r1=119445&r2=119446&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/MachineVerifier.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineVerifier.cpp Tue Nov 16 18:55:36 2010 @@ -558,9 +558,9 @@ else if (MO->isImplicit()) report("Explicit definition marked as implicit", MO, MONum); } else if (MONum < TI.getNumOperands()) { - // Don't check if it's a variadic instruction. See, e.g., LDM_RET in the arm - // back end. - if (MO->isReg() && MONum != TI.getNumOperands()-1) { + // Don't check if it's the last operand in a variadic instruction. See, + // e.g., LDM_RET in the arm back end. + if (MO->isReg() && !(TI.isVariadic() && MONum == TI.getNumOperands()-1)) { if (MO->isDef()) report("Explicit operand marked as def", MO, MONum); if (MO->isImplicit()) From aggarwa4 at illinois.edu Tue Nov 16 19:17:50 2010 From: aggarwa4 at illinois.edu (Arushi Aggarwal) Date: Wed, 17 Nov 2010 01:17:50 -0000 Subject: [llvm-commits] [poolalloc] r119448 - /poolalloc/trunk/lib/DSA/DataStructureStats.cpp Message-ID: <20101117011750.322362A6C12C@llvm.org> Author: aggarwa4 Date: Tue Nov 16 19:17:50 2010 New Revision: 119448 URL: http://llvm.org/viewvc/llvm-project?rev=119448&view=rev Log: Look up values correctly in the DSGraphs, to generate correct statistics. Modified: poolalloc/trunk/lib/DSA/DataStructureStats.cpp Modified: poolalloc/trunk/lib/DSA/DataStructureStats.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/DataStructureStats.cpp?rev=119448&r1=119447&r2=119448&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/DataStructureStats.cpp (original) +++ poolalloc/trunk/lib/DSA/DataStructureStats.cpp Tue Nov 16 19:17:50 2010 @@ -41,8 +41,8 @@ void countCallees(const Function &F); const DSGraph *TDGraph; - DSNode *getNodeForValue(Value *V); - bool isNodeForValueCollapsed(Value *V); + DSNodeHandle getNodeHandleForValue(Value *V); + bool isNodeForValueUntyped(Value *V); public: static char ID; DSGraphStats() : FunctionPass((intptr_t)&ID) {} @@ -117,26 +117,46 @@ } } -DSNode *DSGraphStats::getNodeForValue(Value *V) { +DSNodeHandle DSGraphStats::getNodeHandleForValue(Value *V) { const DSGraph *G = TDGraph; - if (isa(V)) - G = TDGraph->getGlobalsGraph(); - const DSGraph::ScalarMapTy &ScalarMap = G->getScalarMap(); DSGraph::ScalarMapTy::const_iterator I = ScalarMap.find(V); if (I != ScalarMap.end()) - return I->second.getNode(); + return I->second; + + G = TDGraph->getGlobalsGraph(); + const DSGraph::ScalarMapTy &GlobalScalarMap = G->getScalarMap(); + I = GlobalScalarMap.find(V); + if (I != GlobalScalarMap.end()) + return I->second; + return 0; } -bool DSGraphStats::isNodeForValueCollapsed(Value *V) { - if (DSNode *N = getNodeForValue(V)) - return N->isNodeCompletelyFolded() || N->isIncompleteNode(); +bool DSGraphStats::isNodeForValueUntyped(Value *V) { + DSNodeHandle NH = getNodeHandleForValue(V); + if(!NH.getNode()) + return true; + else { + DSNode* N = NH.getNode(); + if (N->isNodeCompletelyFolded() || N->isIncompleteNode()) + return true; + // it is a complete node, now check if it is typesafe + /*if (N->type_begin() != N->type_end()) + for (DSNode::TyMapTy::const_iterator ii = N->type_begin(), + ee = N->type_end(); ii != ee; ++ii) { + if(ii->first != offset) + continue; + count += ii->second->size(); + } + if(count > 1) + return true;*/ + } return false; } void DSGraphStats::visitLoad(LoadInst &LI) { - if (isNodeForValueCollapsed(LI.getOperand(0))) { + if (isNodeForValueUntyped(LI.getOperand(0))) { NumUntypedMemAccesses++; } else { NumTypedMemAccesses++; @@ -144,7 +164,7 @@ } void DSGraphStats::visitStore(StoreInst &SI) { - if (isNodeForValueCollapsed(SI.getOperand(1))) { + if (isNodeForValueUntyped(SI.getOperand(1))) { NumUntypedMemAccesses++; } else { NumTypedMemAccesses++; From aggarwa4 at illinois.edu Tue Nov 16 19:27:44 2010 From: aggarwa4 at illinois.edu (Arushi Aggarwal) Date: Wed, 17 Nov 2010 01:27:44 -0000 Subject: [llvm-commits] [poolalloc] r119449 - /poolalloc/trunk/lib/DSA/DataStructureStats.cpp Message-ID: <20101117012744.40CA72A6C12C@llvm.org> Author: aggarwa4 Date: Tue Nov 16 19:27:44 2010 New Revision: 119449 URL: http://llvm.org/viewvc/llvm-project?rev=119449&view=rev Log: Also keep track of the number of types present at a given offset, now that DSA tracks multiple types. Modified: poolalloc/trunk/lib/DSA/DataStructureStats.cpp Modified: poolalloc/trunk/lib/DSA/DataStructureStats.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/DataStructureStats.cpp?rev=119449&r1=119448&r2=119449&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/DataStructureStats.cpp (original) +++ poolalloc/trunk/lib/DSA/DataStructureStats.cpp Tue Nov 16 19:27:44 2010 @@ -36,6 +36,14 @@ "Number of loads/stores which are fully typed"); STATISTIC (NumUntypedMemAccesses, "Number of loads/stores which are untyped"); + STATISTIC (NumTypeCount1Accesses, + "Number of loads/stores which are access a DSNode with 1 type"); + STATISTIC (NumTypeCount2Accesses, + "Number of loads/stores which are access a DSNode with 2 type"); + STATISTIC (NumTypeCount3Accesses, + "Number of loads/stores which are access a DSNode with 3 type"); + STATISTIC (NumTypeCount4Accesses, + "Number of loads/stores which are access a DSNode with >3 type"); class DSGraphStats : public FunctionPass, public InstVisitor { void countCallees(const Function &F); @@ -141,16 +149,25 @@ DSNode* N = NH.getNode(); if (N->isNodeCompletelyFolded() || N->isIncompleteNode()) return true; - // it is a complete node, now check if it is typesafe - /*if (N->type_begin() != N->type_end()) + // it is a complete node, now check how many types are present + int count = 0; + unsigned offset = NH.getOffset(); + if (N->type_begin() != N->type_end()) for (DSNode::TyMapTy::const_iterator ii = N->type_begin(), ee = N->type_end(); ii != ee; ++ii) { if(ii->first != offset) continue; count += ii->second->size(); } - if(count > 1) - return true;*/ + + if(count == 1) + ++NumTypeCount1Accesses; + else if(count == 2) + ++NumTypeCount2Accesses; + else if(count == 3) + ++NumTypeCount3Accesses; + else + ++NumTypeCount4Accesses; } return false; } From gohman at apple.com Tue Nov 16 20:40:30 2010 From: gohman at apple.com (Dan Gohman) Date: Wed, 17 Nov 2010 02:40:30 -0000 Subject: [llvm-commits] [llvm] r119454 - /llvm/trunk/include/llvm/ADT/ImmutableSet.h Message-ID: <20101117024030.CE1B02A6C12C@llvm.org> Author: djg Date: Tue Nov 16 20:40:30 2010 New Revision: 119454 URL: http://llvm.org/viewvc/llvm-project?rev=119454&view=rev Log: Fix warnings about missing parents between || and &&. Modified: llvm/trunk/include/llvm/ADT/ImmutableSet.h Modified: llvm/trunk/include/llvm/ADT/ImmutableSet.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/ImmutableSet.h?rev=119454&r1=119453&r2=119454&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/ImmutableSet.h (original) +++ llvm/trunk/include/llvm/ADT/ImmutableSet.h Tue Nov 16 20:40:30 2010 @@ -198,16 +198,16 @@ assert((HL > HR ? HL-HR : HR-HL) <= 2 && "Balancing invariant violated"); - assert(!getLeft() - || ImutInfo::isLess(ImutInfo::KeyOfValue(getLeft()->getValue()), - ImutInfo::KeyOfValue(getValue())) - && "Value in left child is not less that current value"); + assert((!getLeft() || + ImutInfo::isLess(ImutInfo::KeyOfValue(getLeft()->getValue()), + ImutInfo::KeyOfValue(getValue()))) && + "Value in left child is not less that current value"); - assert(!getRight() - || ImutInfo::isLess(ImutInfo::KeyOfValue(getValue()), - ImutInfo::KeyOfValue(getRight()->getValue())) - && "Current value is not less that value of right child"); + assert(!(getRight() || + ImutInfo::isLess(ImutInfo::KeyOfValue(getValue()), + ImutInfo::KeyOfValue(getRight()->getValue()))) && + "Current value is not less that value of right child"); return getHeight(); } From gohman at apple.com Tue Nov 16 20:44:44 2010 From: gohman at apple.com (Dan Gohman) Date: Wed, 17 Nov 2010 02:44:44 -0000 Subject: [llvm-commits] [llvm] r119455 - in /llvm/trunk: include/llvm/Analysis/ScalarEvolution.h include/llvm/Support/ConstantRange.h lib/Analysis/ScalarEvolution.cpp Message-ID: <20101117024444.9134E2A6C12C@llvm.org> Author: djg Date: Tue Nov 16 20:44:44 2010 New Revision: 119455 URL: http://llvm.org/viewvc/llvm-project?rev=119455&view=rev Log: Memoize results from ScalarEvolution's getUnsignedRange and getSignedRange. This fixes some extreme compile times on unrolled sha512 code. Modified: llvm/trunk/include/llvm/Analysis/ScalarEvolution.h llvm/trunk/include/llvm/Support/ConstantRange.h llvm/trunk/lib/Analysis/ScalarEvolution.cpp Modified: llvm/trunk/include/llvm/Analysis/ScalarEvolution.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/ScalarEvolution.h?rev=119455&r1=119454&r2=119455&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/ScalarEvolution.h (original) +++ llvm/trunk/include/llvm/Analysis/ScalarEvolution.h Tue Nov 16 20:44:44 2010 @@ -267,6 +267,12 @@ std::map > ValuesAtScopes; + /// UnsignedRanges - Memoized results from getUnsignedRange + DenseMap UnsignedRanges; + + /// SignedRanges - Memoized results from getSignedRange + DenseMap SignedRanges; + /// createSCEV - We know that there is no SCEV for the specified value. /// Analyze the expression. const SCEV *createSCEV(Value *V); Modified: llvm/trunk/include/llvm/Support/ConstantRange.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/ConstantRange.h?rev=119455&r1=119454&r2=119455&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/ConstantRange.h (original) +++ llvm/trunk/include/llvm/Support/ConstantRange.h Tue Nov 16 20:44:44 2010 @@ -47,6 +47,9 @@ /// explicit ConstantRange(uint32_t BitWidth, bool isFullSet = true); + /// Default constructor that creates an uninitialized ConstantRange. + ConstantRange() {} + /// Initialize a range to hold the single specified value. /// ConstantRange(const APInt &Value); Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=119455&r1=119454&r2=119455&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original) +++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Tue Nov 16 20:44:44 2010 @@ -377,8 +377,10 @@ } void SCEVUnknown::deleted() { - // Clear this SCEVUnknown from ValuesAtScopes. + // Clear this SCEVUnknown from various maps. SE->ValuesAtScopes.erase(this); + SE->UnsignedRanges.erase(this); + SE->SignedRanges.erase(this); // Remove this SCEVUnknown from the uniquing map. SE->UniqueSCEVs.RemoveNode(this); @@ -388,8 +390,10 @@ } void SCEVUnknown::allUsesReplacedWith(Value *New) { - // Clear this SCEVUnknown from ValuesAtScopes. + // Clear this SCEVUnknown from various maps. SE->ValuesAtScopes.erase(this); + SE->UnsignedRanges.erase(this); + SE->SignedRanges.erase(this); // Remove this SCEVUnknown from the uniquing map. SE->UniqueSCEVs.RemoveNode(this); @@ -2713,9 +2717,11 @@ ValueExprMapType::iterator It = ValueExprMap.find(static_cast(I)); if (It != ValueExprMap.end()) { + const SCEV *Old = It->second; + // Short-circuit the def-use traversal if the symbolic name // ceases to appear in expressions. - if (It->second != SymName && !It->second->hasOperand(SymName)) + if (Old != SymName && !Old->hasOperand(SymName)) continue; // SCEVUnknown for a PHI either means that it has an unrecognized @@ -2726,9 +2732,11 @@ // updates on its own when it gets to that point. In the third, we do // want to forget the SCEVUnknown. if (!isa(I) || - !isa(It->second) || - (I != PN && It->second == SymName)) { - ValuesAtScopes.erase(It->second); + !isa(Old) || + (I != PN && Old == SymName)) { + ValuesAtScopes.erase(Old); + UnsignedRanges.erase(Old); + SignedRanges.erase(Old); ValueExprMap.erase(It); } } @@ -3018,9 +3026,13 @@ /// ConstantRange ScalarEvolution::getUnsignedRange(const SCEV *S) { + // See if we've computed this range already. + DenseMap::iterator I = UnsignedRanges.find(S); + if (I != UnsignedRanges.end()) + return I->second; if (const SCEVConstant *C = dyn_cast(S)) - return ConstantRange(C->getValue()->getValue()); + return UnsignedRanges[C] = ConstantRange(C->getValue()->getValue()); unsigned BitWidth = getTypeSizeInBits(S->getType()); ConstantRange ConservativeResult(BitWidth, /*isFullSet=*/true); @@ -3037,49 +3049,52 @@ ConstantRange X = getUnsignedRange(Add->getOperand(0)); for (unsigned i = 1, e = Add->getNumOperands(); i != e; ++i) X = X.add(getUnsignedRange(Add->getOperand(i))); - return ConservativeResult.intersectWith(X); + return UnsignedRanges[Add] = ConservativeResult.intersectWith(X); } if (const SCEVMulExpr *Mul = dyn_cast(S)) { ConstantRange X = getUnsignedRange(Mul->getOperand(0)); for (unsigned i = 1, e = Mul->getNumOperands(); i != e; ++i) X = X.multiply(getUnsignedRange(Mul->getOperand(i))); - return ConservativeResult.intersectWith(X); + return UnsignedRanges[Mul] = ConservativeResult.intersectWith(X); } if (const SCEVSMaxExpr *SMax = dyn_cast(S)) { ConstantRange X = getUnsignedRange(SMax->getOperand(0)); for (unsigned i = 1, e = SMax->getNumOperands(); i != e; ++i) X = X.smax(getUnsignedRange(SMax->getOperand(i))); - return ConservativeResult.intersectWith(X); + return UnsignedRanges[SMax] = ConservativeResult.intersectWith(X); } if (const SCEVUMaxExpr *UMax = dyn_cast(S)) { ConstantRange X = getUnsignedRange(UMax->getOperand(0)); for (unsigned i = 1, e = UMax->getNumOperands(); i != e; ++i) X = X.umax(getUnsignedRange(UMax->getOperand(i))); - return ConservativeResult.intersectWith(X); + return UnsignedRanges[UMax] = ConservativeResult.intersectWith(X); } if (const SCEVUDivExpr *UDiv = dyn_cast(S)) { ConstantRange X = getUnsignedRange(UDiv->getLHS()); ConstantRange Y = getUnsignedRange(UDiv->getRHS()); - return ConservativeResult.intersectWith(X.udiv(Y)); + return UnsignedRanges[UDiv] = ConservativeResult.intersectWith(X.udiv(Y)); } if (const SCEVZeroExtendExpr *ZExt = dyn_cast(S)) { ConstantRange X = getUnsignedRange(ZExt->getOperand()); - return ConservativeResult.intersectWith(X.zeroExtend(BitWidth)); + return UnsignedRanges[ZExt] = + ConservativeResult.intersectWith(X.zeroExtend(BitWidth)); } if (const SCEVSignExtendExpr *SExt = dyn_cast(S)) { ConstantRange X = getUnsignedRange(SExt->getOperand()); - return ConservativeResult.intersectWith(X.signExtend(BitWidth)); + return UnsignedRanges[SExt] = + ConservativeResult.intersectWith(X.signExtend(BitWidth)); } if (const SCEVTruncateExpr *Trunc = dyn_cast(S)) { ConstantRange X = getUnsignedRange(Trunc->getOperand()); - return ConservativeResult.intersectWith(X.truncate(BitWidth)); + return UnsignedRanges[Trunc] = + ConservativeResult.intersectWith(X.truncate(BitWidth)); } if (const SCEVAddRecExpr *AddRec = dyn_cast(S)) { @@ -3119,19 +3134,20 @@ ConstantRange ExtEndRange = EndRange.zextOrTrunc(BitWidth*2+1); if (ExtStartRange.add(ExtMaxBECountRange.multiply(ExtStepRange)) != ExtEndRange) - return ConservativeResult; + return UnsignedRanges[AddRec] = ConservativeResult; APInt Min = APIntOps::umin(StartRange.getUnsignedMin(), EndRange.getUnsignedMin()); APInt Max = APIntOps::umax(StartRange.getUnsignedMax(), EndRange.getUnsignedMax()); if (Min.isMinValue() && Max.isMaxValue()) - return ConservativeResult; - return ConservativeResult.intersectWith(ConstantRange(Min, Max+1)); + return UnsignedRanges[AddRec] = ConservativeResult; + return UnsignedRanges[AddRec] = + ConservativeResult.intersectWith(ConstantRange(Min, Max+1)); } } - return ConservativeResult; + return UnsignedRanges[AddRec] = ConservativeResult; } if (const SCEVUnknown *U = dyn_cast(S)) { @@ -3140,20 +3156,25 @@ APInt Zeros(BitWidth, 0), Ones(BitWidth, 0); ComputeMaskedBits(U->getValue(), Mask, Zeros, Ones, TD); if (Ones == ~Zeros + 1) - return ConservativeResult; - return ConservativeResult.intersectWith(ConstantRange(Ones, ~Zeros + 1)); + return UnsignedRanges[U] = ConservativeResult; + return UnsignedRanges[U] = + ConservativeResult.intersectWith(ConstantRange(Ones, ~Zeros + 1)); } - return ConservativeResult; + return UnsignedRanges[S] = ConservativeResult; } /// getSignedRange - Determine the signed range for a particular SCEV. /// ConstantRange ScalarEvolution::getSignedRange(const SCEV *S) { + // See if we've computed this range already. + DenseMap::iterator I = SignedRanges.find(S); + if (I != SignedRanges.end()) + return I->second; if (const SCEVConstant *C = dyn_cast(S)) - return ConstantRange(C->getValue()->getValue()); + return SignedRanges[C] = ConstantRange(C->getValue()->getValue()); unsigned BitWidth = getTypeSizeInBits(S->getType()); ConstantRange ConservativeResult(BitWidth, /*isFullSet=*/true); @@ -3170,49 +3191,52 @@ ConstantRange X = getSignedRange(Add->getOperand(0)); for (unsigned i = 1, e = Add->getNumOperands(); i != e; ++i) X = X.add(getSignedRange(Add->getOperand(i))); - return ConservativeResult.intersectWith(X); + return SignedRanges[Add] = ConservativeResult.intersectWith(X); } if (const SCEVMulExpr *Mul = dyn_cast(S)) { ConstantRange X = getSignedRange(Mul->getOperand(0)); for (unsigned i = 1, e = Mul->getNumOperands(); i != e; ++i) X = X.multiply(getSignedRange(Mul->getOperand(i))); - return ConservativeResult.intersectWith(X); + return SignedRanges[Mul] = ConservativeResult.intersectWith(X); } if (const SCEVSMaxExpr *SMax = dyn_cast(S)) { ConstantRange X = getSignedRange(SMax->getOperand(0)); for (unsigned i = 1, e = SMax->getNumOperands(); i != e; ++i) X = X.smax(getSignedRange(SMax->getOperand(i))); - return ConservativeResult.intersectWith(X); + return SignedRanges[SMax] = ConservativeResult.intersectWith(X); } if (const SCEVUMaxExpr *UMax = dyn_cast(S)) { ConstantRange X = getSignedRange(UMax->getOperand(0)); for (unsigned i = 1, e = UMax->getNumOperands(); i != e; ++i) X = X.umax(getSignedRange(UMax->getOperand(i))); - return ConservativeResult.intersectWith(X); + return SignedRanges[UMax] = ConservativeResult.intersectWith(X); } if (const SCEVUDivExpr *UDiv = dyn_cast(S)) { ConstantRange X = getSignedRange(UDiv->getLHS()); ConstantRange Y = getSignedRange(UDiv->getRHS()); - return ConservativeResult.intersectWith(X.udiv(Y)); + return SignedRanges[UDiv] = ConservativeResult.intersectWith(X.udiv(Y)); } if (const SCEVZeroExtendExpr *ZExt = dyn_cast(S)) { ConstantRange X = getSignedRange(ZExt->getOperand()); - return ConservativeResult.intersectWith(X.zeroExtend(BitWidth)); + return SignedRanges[ZExt] = + ConservativeResult.intersectWith(X.zeroExtend(BitWidth)); } if (const SCEVSignExtendExpr *SExt = dyn_cast(S)) { ConstantRange X = getSignedRange(SExt->getOperand()); - return ConservativeResult.intersectWith(X.signExtend(BitWidth)); + return SignedRanges[SExt] = + ConservativeResult.intersectWith(X.signExtend(BitWidth)); } if (const SCEVTruncateExpr *Trunc = dyn_cast(S)) { ConstantRange X = getSignedRange(Trunc->getOperand()); - return ConservativeResult.intersectWith(X.truncate(BitWidth)); + return SignedRanges[Trunc] = + ConservativeResult.intersectWith(X.truncate(BitWidth)); } if (const SCEVAddRecExpr *AddRec = dyn_cast(S)) { @@ -3262,34 +3286,35 @@ ConstantRange ExtEndRange = EndRange.sextOrTrunc(BitWidth*2+1); if (ExtStartRange.add(ExtMaxBECountRange.multiply(ExtStepRange)) != ExtEndRange) - return ConservativeResult; + return SignedRanges[AddRec] = ConservativeResult; APInt Min = APIntOps::smin(StartRange.getSignedMin(), EndRange.getSignedMin()); APInt Max = APIntOps::smax(StartRange.getSignedMax(), EndRange.getSignedMax()); if (Min.isMinSignedValue() && Max.isMaxSignedValue()) - return ConservativeResult; - return ConservativeResult.intersectWith(ConstantRange(Min, Max+1)); + return SignedRanges[AddRec] = ConservativeResult; + return SignedRanges[AddRec] = + ConservativeResult.intersectWith(ConstantRange(Min, Max+1)); } } - return ConservativeResult; + return SignedRanges[AddRec] = ConservativeResult; } if (const SCEVUnknown *U = dyn_cast(S)) { // For a SCEVUnknown, ask ValueTracking. if (!U->getValue()->getType()->isIntegerTy() && !TD) - return ConservativeResult; + return SignedRanges[U] = ConservativeResult; unsigned NS = ComputeNumSignBits(U->getValue(), TD); if (NS == 1) - return ConservativeResult; - return ConservativeResult.intersectWith( + return SignedRanges[U] = ConservativeResult; + return SignedRanges[U] = ConservativeResult.intersectWith( ConstantRange(APInt::getSignedMinValue(BitWidth).ashr(NS - 1), APInt::getSignedMaxValue(BitWidth).ashr(NS - 1)+1)); } - return ConservativeResult; + return SignedRanges[S] = ConservativeResult; } /// createSCEV - We know that there is no SCEV for the specified value. @@ -3734,14 +3759,18 @@ ValueExprMapType::iterator It = ValueExprMap.find(static_cast(I)); if (It != ValueExprMap.end()) { + const SCEV *Old = It->second; + // SCEVUnknown for a PHI either means that it has an unrecognized // structure, or it's a PHI that's in the progress of being computed // by createNodeForPHI. In the former case, additional loop trip // count information isn't going to change anything. In the later // case, createNodeForPHI will perform the necessary updates on its // own when it gets to that point. - if (!isa(I) || !isa(It->second)) { - ValuesAtScopes.erase(It->second); + if (!isa(I) || !isa(Old)) { + ValuesAtScopes.erase(Old); + UnsignedRanges.erase(Old); + SignedRanges.erase(Old); ValueExprMap.erase(It); } if (PHINode *PN = dyn_cast(I)) @@ -3773,7 +3802,10 @@ ValueExprMapType::iterator It = ValueExprMap.find(static_cast(I)); if (It != ValueExprMap.end()) { - ValuesAtScopes.erase(It->second); + const SCEV *Old = It->second; + ValuesAtScopes.erase(Old); + UnsignedRanges.erase(Old); + SignedRanges.erase(Old); ValueExprMap.erase(It); if (PHINode *PN = dyn_cast(I)) ConstantEvolutionLoopExitValue.erase(PN); @@ -3806,7 +3838,10 @@ ValueExprMapType::iterator It = ValueExprMap.find(static_cast(I)); if (It != ValueExprMap.end()) { - ValuesAtScopes.erase(It->second); + const SCEV *Old = It->second; + ValuesAtScopes.erase(Old); + UnsignedRanges.erase(Old); + SignedRanges.erase(Old); ValueExprMap.erase(It); if (PHINode *PN = dyn_cast(I)) ConstantEvolutionLoopExitValue.erase(PN); @@ -5862,6 +5897,8 @@ BackedgeTakenCounts.clear(); ConstantEvolutionLoopExitValue.clear(); ValuesAtScopes.clear(); + UnsignedRanges.clear(); + SignedRanges.clear(); UniqueSCEVs.clear(); SCEVAllocator.Reset(); } From baldrick at free.fr Tue Nov 16 22:05:21 2010 From: baldrick at free.fr (Duncan Sands) Date: Wed, 17 Nov 2010 04:05:21 -0000 Subject: [llvm-commits] [llvm] r119456 - /llvm/trunk/lib/Transforms/Scalar/GVN.cpp Message-ID: <20101117040521.A2A412A6C12C@llvm.org> Author: baldrick Date: Tue Nov 16 22:05:21 2010 New Revision: 119456 URL: http://llvm.org/viewvc/llvm-project?rev=119456&view=rev Log: Remove dead code in GVN: now that SimplifyInstruction is called systematically, CollapsePhi will always return null here. Note that CollapsePhi did an extra check, isSafeReplacement, which the SimplifyInstruction logic does not do. I think that check was bogus - I guess we will soon find out! (It was originally added in commit 41998 without a testcase). Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=119456&r1=119455&r2=119456&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Tue Nov 16 22:05:21 2010 @@ -701,7 +701,6 @@ bool processBlock(BasicBlock *BB); void dump(DenseMap& d); bool iterateOnFunction(Function &F); - Value *CollapsePhi(PHINode* p); bool performPRE(Function& F); Value *lookupNumber(BasicBlock *BB, uint32_t num); void cleanupGlobalSets(); @@ -733,33 +732,6 @@ errs() << "}\n"; } -static bool isSafeReplacement(PHINode* p, Instruction *inst) { - if (!isa(inst)) - return true; - - for (Instruction::use_iterator UI = p->use_begin(), E = p->use_end(); - UI != E; ++UI) - if (PHINode* use_phi = dyn_cast(*UI)) - if (use_phi->getParent() == inst->getParent()) - return false; - - return true; -} - -Value *GVN::CollapsePhi(PHINode *PN) { - Value *ConstVal = PN->hasConstantValue(DT); - if (!ConstVal) return 0; - - Instruction *Inst = dyn_cast(ConstVal); - if (!Inst) - return ConstVal; - - if (DT->dominates(Inst, PN)) - if (isSafeReplacement(PN, Inst)) - return Inst; - return 0; -} - /// IsValueFullyAvailableInBlock - Return true if we can prove that the value /// we're analyzing is fully available in the specified block. As we go, keep /// track of which blocks we know are fully alive in FullyAvailableBlocks. This @@ -1954,21 +1926,8 @@ return false; } - // Collapse PHI nodes - if (PHINode* p = dyn_cast(I)) { - Value *constVal = CollapsePhi(p); - - if (constVal) { - p->replaceAllUsesWith(constVal); - if (MD && constVal->getType()->isPointerTy()) - MD->invalidateCachedPointerInfo(constVal); - VN.erase(p); - - toErase.push_back(p); - } else { - localAvail[I->getParent()]->table.insert(std::make_pair(Num, I)); - } - + if (isa(I)) { + localAvail[I->getParent()]->table.insert(std::make_pair(Num, I)); // If the number we were assigned was a brand new VN, then we don't // need to do a lookup to see if the number already exists // somewhere in the domtree: it can't! From baldrick at free.fr Tue Nov 16 22:12:05 2010 From: baldrick at free.fr (Duncan Sands) Date: Wed, 17 Nov 2010 04:12:05 -0000 Subject: [llvm-commits] [llvm] r119457 - /llvm/trunk/lib/Transforms/Utils/Local.cpp Message-ID: <20101117041205.D5EF62A6C12C@llvm.org> Author: baldrick Date: Tue Nov 16 22:12:05 2010 New Revision: 119457 URL: http://llvm.org/viewvc/llvm-project?rev=119457&view=rev Log: Have RemovePredecessorAndSimplify you SimplifyInstruction rather than hasConstantValue. Modified: llvm/trunk/lib/Transforms/Utils/Local.cpp Modified: llvm/trunk/lib/Transforms/Utils/Local.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/Local.cpp?rev=119457&r1=119456&r2=119457&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/Local.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/Local.cpp Tue Nov 16 22:12:05 2010 @@ -346,13 +346,13 @@ WeakVH PhiIt = &BB->front(); while (PHINode *PN = dyn_cast(PhiIt)) { PhiIt = &*++BasicBlock::iterator(cast(PhiIt)); - - Value *PNV = PN->hasConstantValue(); + + Value *PNV = SimplifyInstruction(PN, TD); if (PNV == 0) continue; - + // If we're able to simplify the phi to a single value, substitute the new // value into all of its uses. - assert(PNV != PN && "hasConstantValue broken"); + assert(PNV != PN && "SimplifyInstruction broken!"); Value *OldPhiIt = PhiIt; ReplaceAndSimplifyAllUses(PN, PNV, TD); From baldrick at free.fr Tue Nov 16 22:18:45 2010 From: baldrick at free.fr (Duncan Sands) Date: Wed, 17 Nov 2010 04:18:45 -0000 Subject: [llvm-commits] [llvm] r119458 - /llvm/trunk/lib/Analysis/ScalarEvolution.cpp Message-ID: <20101117041845.B81B62A6C12C@llvm.org> Author: baldrick Date: Tue Nov 16 22:18:45 2010 New Revision: 119458 URL: http://llvm.org/viewvc/llvm-project?rev=119458&view=rev Log: Have ScalarEvolution use SimplifyInstruction rather than hasConstantValue. While there, add a note about an inefficiency I noticed. Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=119458&r1=119457&r2=119458&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original) +++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Tue Nov 16 22:18:45 2010 @@ -69,6 +69,7 @@ #include "llvm/Operator.h" #include "llvm/Analysis/ConstantFolding.h" #include "llvm/Analysis/Dominators.h" +#include "llvm/Analysis/InstructionSimplify.h" #include "llvm/Analysis/LoopInfo.h" #include "llvm/Analysis/ValueTracking.h" #include "llvm/Assembly/Writer.h" @@ -2874,7 +2875,10 @@ // PHI's incoming blocks are in a different loop, in which case doing so // risks breaking LCSSA form. Instcombine would normally zap these, but // it doesn't have DominatorTree information, so it may miss cases. - if (Value *V = PN->hasConstantValue(DT)) { + if (Value *V = SimplifyInstruction(PN, TD, DT)) { + // TODO: The following check is suboptimal. For example, it is pointless + // if V is a constant. Since the problematic case is if V is defined inside + // a deeper loop, it would be better to check for that directly. bool AllSameLoop = true; Loop *PNLoop = LI->getLoopFor(PN->getParent()); for (size_t i = 0, e = PN->getNumIncomingValues(); i != e; ++i) From baldrick at free.fr Tue Nov 16 22:30:22 2010 From: baldrick at free.fr (Duncan Sands) Date: Wed, 17 Nov 2010 04:30:22 -0000 Subject: [llvm-commits] [llvm] r119459 - in /llvm/trunk: include/llvm/Instructions.h lib/Analysis/InstructionSimplify.cpp lib/Analysis/Lint.cpp lib/VMCore/Instructions.cpp Message-ID: <20101117043022.6A2852A6C12C@llvm.org> Author: baldrick Date: Tue Nov 16 22:30:22 2010 New Revision: 119459 URL: http://llvm.org/viewvc/llvm-project?rev=119459&view=rev Log: Fix a layering violation: hasConstantValue, which is part of the PHINode class, uses DominatorTree which is an analysis. This change moves all of the tricky hasConstantValue logic to SimplifyInstruction, and replaces it with a very simple literal implementation. I already taught users of hasConstantValue that need tricky stuff to use SimplifyInstruction instead. I didn't update InlineFunction because the IR looks like it might be in a funky state at the point it calls hasConstantValue, which makes calling SimplifyInstruction dangerous since it can in theory do a lot of tricky reasoning. This may be a pessimization, for example in the case where all phi node operands are either undef or a fixed constant. Modified: llvm/trunk/include/llvm/Instructions.h llvm/trunk/lib/Analysis/InstructionSimplify.cpp llvm/trunk/lib/Analysis/Lint.cpp llvm/trunk/lib/VMCore/Instructions.cpp Modified: llvm/trunk/include/llvm/Instructions.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Instructions.h?rev=119459&r1=119458&r2=119459&view=diff ============================================================================== --- llvm/trunk/include/llvm/Instructions.h (original) +++ llvm/trunk/include/llvm/Instructions.h Tue Nov 16 22:30:22 2010 @@ -29,7 +29,6 @@ class ConstantRange; class APInt; class LLVMContext; -class DominatorTree; //===----------------------------------------------------------------------===// // AllocaInst Class @@ -1946,13 +1945,7 @@ /// hasConstantValue - If the specified PHI node always merges together the /// same value, return the value, otherwise return null. - /// - /// If the PHI has undef operands, but all the rest of the operands are - /// some unique value, return that value if it can be proved that the - /// value dominates the PHI. If DT is null, use a conservative check, - /// otherwise use DT to test for dominance. - /// - Value *hasConstantValue(const DominatorTree *DT = 0) const; + Value *hasConstantValue() const; /// Methods for support type inquiry through isa, cast, and dyn_cast: static inline bool classof(const PHINode *) { return true; } Modified: llvm/trunk/lib/Analysis/InstructionSimplify.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/InstructionSimplify.cpp?rev=119459&r1=119458&r2=119459&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/InstructionSimplify.cpp (original) +++ llvm/trunk/lib/Analysis/InstructionSimplify.cpp Tue Nov 16 22:30:22 2010 @@ -173,7 +173,7 @@ Value *CommonValue = 0; for (unsigned i = 0, e = PI->getNumIncomingValues(); i != e; ++i) { Value *Incoming = PI->getIncomingValue(i); - // If the incoming value is the phi node itself, it can be safely skipped. + // If the incoming value is the phi node itself, it can safely be skipped. if (Incoming == PI) continue; Value *V = PI == LHS ? SimplifyBinOp(Opcode, Incoming, RHS, TD, DT, MaxRecurse) : @@ -211,7 +211,7 @@ Value *CommonValue = 0; for (unsigned i = 0, e = PI->getNumIncomingValues(); i != e; ++i) { Value *Incoming = PI->getIncomingValue(i); - // If the incoming value is the phi node itself, it can be safely skipped. + // If the incoming value is the phi node itself, it can safely be skipped. if (Incoming == PI) continue; Value *V = SimplifyCmpInst(Pred, Incoming, RHS, TD, DT, MaxRecurse); // If the operation failed to simplify, or simplified to a different value @@ -663,6 +663,40 @@ (Constant *const*)Ops+1, NumOps-1); } +/// SimplifyPHINode - See if we can fold the given phi. If not, returns null. +static Value *SimplifyPHINode(PHINode *PN, const DominatorTree *DT) { + // If all of the PHI's incoming values are the same then replace the PHI node + // with the common value. + Value *CommonValue = 0; + bool HasUndefInput = false; + for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i) { + Value *Incoming = PN->getIncomingValue(i); + // If the incoming value is the phi node itself, it can safely be skipped. + if (Incoming == PN) continue; + if (isa(Incoming)) { + // Remember that we saw an undef value, but otherwise ignore them. + HasUndefInput = true; + continue; + } + if (CommonValue && Incoming != CommonValue) + return 0; // Not the same, bail out. + CommonValue = Incoming; + } + + // If CommonValue is null then all of the incoming values were either undef or + // equal to the phi node itself. + if (!CommonValue) + return UndefValue::get(PN->getType()); + + // If we have a PHI node like phi(X, undef, X), where X is defined by some + // instruction, we cannot return X as the result of the PHI node unless it + // dominates the PHI block. + if (HasUndefInput) + return ValueDominatesPHI(CommonValue, PN, DT) ? CommonValue : 0; + + return CommonValue; +} + //=== Helper functions for higher up the class hierarchy. @@ -748,7 +782,7 @@ return SimplifyGEPInst(&Ops[0], Ops.size(), TD, DT); } case Instruction::PHI: - return cast(I)->hasConstantValue(DT); + return SimplifyPHINode(cast(I), DT); } } Modified: llvm/trunk/lib/Analysis/Lint.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/Lint.cpp?rev=119459&r1=119458&r2=119459&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/Lint.cpp (original) +++ llvm/trunk/lib/Analysis/Lint.cpp Tue Nov 16 22:30:22 2010 @@ -582,7 +582,7 @@ BBI = BB->end(); } } else if (PHINode *PN = dyn_cast(V)) { - if (Value *W = PN->hasConstantValue(DT)) + if (Value *W = PN->hasConstantValue()) return findValueImpl(W, OffsetOk, Visited); } else if (CastInst *CI = dyn_cast(V)) { if (CI->isNoopCast(TD ? TD->getIntPtrType(V->getContext()) : @@ -615,7 +615,7 @@ // As a last resort, try SimplifyInstruction or constant folding. if (Instruction *Inst = dyn_cast(V)) { - if (Value *W = SimplifyInstruction(Inst, TD)) + if (Value *W = SimplifyInstruction(Inst, TD, DT)) if (W != Inst) return findValueImpl(W, OffsetOk, Visited); } else if (ConstantExpr *CE = dyn_cast(V)) { Modified: llvm/trunk/lib/VMCore/Instructions.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Instructions.cpp?rev=119459&r1=119458&r2=119459&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Instructions.cpp (original) +++ llvm/trunk/lib/VMCore/Instructions.cpp Tue Nov 16 22:30:22 2010 @@ -19,7 +19,6 @@ #include "llvm/Instructions.h" #include "llvm/Module.h" #include "llvm/Operator.h" -#include "llvm/Analysis/Dominators.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/CallSite.h" #include "llvm/Support/ConstantRange.h" @@ -164,61 +163,13 @@ /// hasConstantValue - If the specified PHI node always merges together the same /// value, return the value, otherwise return null. -/// -/// If the PHI has undef operands, but all the rest of the operands are -/// some unique value, return that value if it can be proved that the -/// value dominates the PHI. If DT is null, use a conservative check, -/// otherwise use DT to test for dominance. -/// -Value *PHINode::hasConstantValue(const DominatorTree *DT) const { - // If the PHI node only has one incoming value, eliminate the PHI node. - if (getNumIncomingValues() == 1) { - if (getIncomingValue(0) != this) // not X = phi X - return getIncomingValue(0); - return UndefValue::get(getType()); // Self cycle is dead. - } - - // Otherwise if all of the incoming values are the same for the PHI, replace - // the PHI node with the incoming value. - // - Value *InVal = 0; - bool HasUndefInput = false; - for (unsigned i = 0, e = getNumIncomingValues(); i != e; ++i) - if (isa(getIncomingValue(i))) { - HasUndefInput = true; - } else if (getIncomingValue(i) != this) { // Not the PHI node itself... - if (InVal && getIncomingValue(i) != InVal) - return 0; // Not the same, bail out. - InVal = getIncomingValue(i); - } - - // The only case that could cause InVal to be null is if we have a PHI node - // that only has entries for itself. In this case, there is no entry into the - // loop, so kill the PHI. - // - if (InVal == 0) InVal = UndefValue::get(getType()); - - // If we have a PHI node like phi(X, undef, X), where X is defined by some - // instruction, we cannot always return X as the result of the PHI node. Only - // do this if X is not an instruction (thus it must dominate the PHI block), - // or if the client is prepared to deal with this possibility. - if (!HasUndefInput || !isa(InVal)) - return InVal; - - Instruction *IV = cast(InVal); - if (DT) { - // We have a DominatorTree. Do a precise test. - if (!DT->dominates(IV, this)) - return 0; - } else { - // If it is in the entry block, it obviously dominates everything. - if (IV->getParent() != &IV->getParent()->getParent()->getEntryBlock() || - isa(IV)) - return 0; // Cannot guarantee that InVal dominates this PHINode. - } - - // All of the incoming values are the same, return the value now. - return InVal; +Value *PHINode::hasConstantValue() const { + // Exploit the fact that phi nodes always have at least one entry. + Value *ConstantValue = getIncomingValue(0); + for (unsigned i = 1, e = getNumIncomingValues(); i != e; ++i) + if (getIncomingValue(i) != ConstantValue) + return 0; // Incoming values not all the same. + return ConstantValue; } From isanbard at gmail.com Tue Nov 16 22:32:08 2010 From: isanbard at gmail.com (Bill Wendling) Date: Wed, 17 Nov 2010 04:32:08 -0000 Subject: [llvm-commits] [llvm] r119460 - in /llvm/trunk: lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/ARMInstrVFP.td lib/Target/ARM/AsmParser/ARMAsmParser.cpp test/MC/ARM/simple-fp-encoding.s utils/TableGen/EDEmitter.cpp Message-ID: <20101117043208.935C72A6C12C@llvm.org> Author: void Date: Tue Nov 16 22:32:08 2010 New Revision: 119460 URL: http://llvm.org/viewvc/llvm-project?rev=119460&view=rev Log: Proper encoding for VLDM and VSTM instructions. The register lists for these instructions have to distinguish between lists of single- and double-precision registers in order for the ASM matcher to do a proper job. In all other respects, a list of single- or double-precision registers are the same as a list of GPR registers. Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td llvm/trunk/lib/Target/ARM/ARMInstrVFP.td llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp llvm/trunk/test/MC/ARM/simple-fp-encoding.s llvm/trunk/utils/TableGen/EDEmitter.cpp Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=119460&r1=119459&r2=119460&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Tue Nov 16 22:32:08 2010 @@ -290,12 +290,34 @@ let SuperClasses = []; } +def DPRRegListAsmOperand : AsmOperandClass { + let Name = "DPRRegList"; + let SuperClasses = []; +} + +def SPRRegListAsmOperand : AsmOperandClass { + let Name = "SPRRegList"; + let SuperClasses = []; +} + def reglist : Operand { let EncoderMethod = "getRegisterListOpValue"; let ParserMatchClass = RegListAsmOperand; let PrintMethod = "printRegisterList"; } +def dpr_reglist : Operand { + let EncoderMethod = "getRegisterListOpValue"; + let ParserMatchClass = DPRRegListAsmOperand; + let PrintMethod = "printRegisterList"; +} + +def spr_reglist : Operand { + let EncoderMethod = "getRegisterListOpValue"; + let ParserMatchClass = SPRRegListAsmOperand; + let PrintMethod = "printRegisterList"; +} + // An operand for the CONSTPOOL_ENTRY pseudo-instruction. def cpinst_operand : Operand { let PrintMethod = "printCPInstOperand"; Modified: llvm/trunk/lib/Target/ARM/ARMInstrVFP.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrVFP.td?rev=119460&r1=119459&r2=119460&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrVFP.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrVFP.td Tue Nov 16 22:32:08 2010 @@ -78,7 +78,7 @@ InstrItinClass itin, InstrItinClass itin_upd> { // Double Precision def DIA : - AXDI4<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), + AXDI4<(outs), (ins GPR:$Rn, pred:$p, dpr_reglist:$regs, variable_ops), IndexModeNone, itin, !strconcat(asm, "ia${p}\t$Rn, $regs"), "", []> { let Inst{24-23} = 0b01; // Increment After @@ -86,7 +86,7 @@ let Inst{20} = L_bit; } def DIA_UPD : - AXDI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), + AXDI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, dpr_reglist:$regs, variable_ops), IndexModeUpd, itin_upd, !strconcat(asm, "ia${p}\t$Rn!, $regs"), "$Rn = $wb", []> { let Inst{24-23} = 0b01; // Increment After @@ -94,7 +94,7 @@ let Inst{20} = L_bit; } def DDB : - AXDI4<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), + AXDI4<(outs), (ins GPR:$Rn, pred:$p, dpr_reglist:$regs, variable_ops), IndexModeNone, itin, !strconcat(asm, "db${p}\t$Rn, $regs"), "", []> { let Inst{24-23} = 0b10; // Decrement Before @@ -102,7 +102,7 @@ let Inst{20} = L_bit; } def DDB_UPD : - AXDI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), + AXDI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, dpr_reglist:$regs, variable_ops), IndexModeUpd, itin_upd, !strconcat(asm, "db${p}\t$Rn!, $regs"), "$Rn = $wb", []> { let Inst{24-23} = 0b10; // Decrement Before @@ -112,7 +112,7 @@ // Single Precision def SIA : - AXSI4<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), + AXSI4<(outs), (ins GPR:$Rn, pred:$p, spr_reglist:$regs, variable_ops), IndexModeNone, itin, !strconcat(asm, "ia${p}\t$Rn, $regs"), "", []> { let Inst{24-23} = 0b01; // Increment After @@ -120,7 +120,7 @@ let Inst{20} = L_bit; } def SIA_UPD : - AXSI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), + AXSI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, spr_reglist:$regs, variable_ops), IndexModeUpd, itin_upd, !strconcat(asm, "ia${p}\t$Rn!, $regs"), "$Rn = $wb", []> { let Inst{24-23} = 0b01; // Increment After @@ -128,7 +128,7 @@ let Inst{20} = L_bit; } def SDB : - AXSI4<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), + AXSI4<(outs), (ins GPR:$Rn, pred:$p, spr_reglist:$regs, variable_ops), IndexModeNone, itin, !strconcat(asm, "db${p}\t$Rn, $regs"), "", []> { let Inst{24-23} = 0b10; // Decrement Before @@ -136,7 +136,7 @@ let Inst{20} = L_bit; } def SDB_UPD : - AXSI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), + AXSI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, spr_reglist:$regs, variable_ops), IndexModeUpd, itin_upd, !strconcat(asm, "db${p}\t$Rn!, $regs"), "$Rn = $wb", []> { let Inst{24-23} = 0b10; // Decrement Before Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp?rev=119460&r1=119459&r2=119460&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp (original) +++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Tue Nov 16 22:32:08 2010 @@ -107,6 +107,8 @@ Memory, Register, RegisterList, + DPRRegisterList, + SPRRegisterList, Token } Kind; @@ -168,6 +170,8 @@ Reg = o.Reg; break; case RegisterList: + case DPRRegisterList: + case SPRRegisterList: RegList = o.RegList; break; case Immediate: @@ -204,7 +208,8 @@ } const SmallVectorImpl &getRegList() const { - assert(Kind == RegisterList && "Invalid access!"); + assert((Kind == RegisterList || Kind == DPRRegisterList || + Kind == SPRRegisterList) && "Invalid access!"); return *RegList.Registers; } @@ -217,6 +222,8 @@ bool isImm() const { return Kind == Immediate; } bool isReg() const { return Kind == Register; } bool isRegList() const { return Kind == RegisterList; } + bool isDPRRegList() const { return Kind == DPRRegisterList; } + bool isSPRRegList() const { return Kind == SPRRegisterList; } bool isToken() const { return Kind == Token; } bool isMemory() const { return Kind == Memory; } bool isMemMode5() const { @@ -264,6 +271,14 @@ Inst.addOperand(MCOperand::CreateReg(*I)); } + void addDPRRegListOperands(MCInst &Inst, unsigned N) const { + addRegListOperands(Inst, N); + } + + void addSPRRegListOperands(MCInst &Inst, unsigned N) const { + addRegListOperands(Inst, N); + } + void addImmOperands(MCInst &Inst, unsigned N) const { assert(N == 1 && "Invalid number of operands!"); addExpr(Inst, getImm()); @@ -327,7 +342,14 @@ static ARMOperand * CreateRegList(const SmallVectorImpl > &Regs, SMLoc StartLoc, SMLoc EndLoc) { - ARMOperand *Op = new ARMOperand(RegisterList); + KindTy Kind = RegisterList; + + if (ARM::DPRRegClass.contains(Regs.front().first)) + Kind = DPRRegisterList; + else if (ARM::SPRRegClass.contains(Regs.front().first)) + Kind = SPRRegisterList; + + ARMOperand *Op = new ARMOperand(Kind); Op->RegList.Registers = new SmallVector(); for (SmallVectorImpl >::const_iterator I = Regs.begin(), E = Regs.end(); I != E; ++I) @@ -387,7 +409,9 @@ case Register: OS << "" : "!>"); break; - case RegisterList: { + case RegisterList: + case DPRRegisterList: + case SPRRegisterList: { OS << " &RegList = getRegList(); Modified: llvm/trunk/test/MC/ARM/simple-fp-encoding.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/simple-fp-encoding.s?rev=119460&r1=119459&r2=119460&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/simple-fp-encoding.s (original) +++ llvm/trunk/test/MC/ARM/simple-fp-encoding.s Tue Nov 16 22:32:08 2010 @@ -207,3 +207,13 @@ vstr.32 s4, [r1] vstr.32 s4, [r1, #24] vstr.32 s4, [r1, #-24] + +@ CHECK: vldmia r1, {d2, d3, d4, d5, d6, d7} @ encoding: [0x0c,0x2b,0x91,0xec] +@ CHECK: vldmia r1, {s2, s3, s4, s5, s6, s7} @ encoding: [0x06,0x1a,0x91,0xec] + vldmia r1, {d2,d3-d6,d7} + vldmia r1, {s2,s3-s6,s7} + +@ CHECK: vstmia r1, {d2, d3, d4, d5, d6, d7} @ encoding: [0x0c,0x2b,0x81,0xec] +@ CHECK: vstmia r1, {s2, s3, s4, s5, s6, s7} @ encoding: [0x06,0x1a,0x81,0xec] + vstmia r1, {d2,d3-d6,d7} + vstmia r1, {s2,s3-s6,s7} Modified: llvm/trunk/utils/TableGen/EDEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/EDEmitter.cpp?rev=119460&r1=119459&r2=119460&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/EDEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/EDEmitter.cpp Tue Nov 16 22:32:08 2010 @@ -607,6 +607,8 @@ MISC("am6offset", "kOperandTypeARMAddrMode6Offset"); // R, I, I MISC("addrmodepc", "kOperandTypeARMAddrModePC"); // R, I MISC("reglist", "kOperandTypeARMRegisterList"); // I, R, ... + MISC("dpr_reglist", "kOperandTypeARMDPRRegisterList"); // I, R, ... + MISC("spr_reglist", "kOperandTypeARMSPRRegisterList"); // I, R, ... MISC("it_mask", "kOperandTypeThumbITMask"); // I MISC("t2addrmode_imm8", "kOperandTypeThumb2AddrModeImm8"); // R, I MISC("t2am_imm8_offset", "kOperandTypeThumb2AddrModeImm8Offset");//I @@ -823,6 +825,8 @@ operandTypes.addEntry("kOperandTypeARMAddrMode6Offset"); operandTypes.addEntry("kOperandTypeARMAddrModePC"); operandTypes.addEntry("kOperandTypeARMRegisterList"); + operandTypes.addEntry("kOperandTypeARMDPRRegisterList"); + operandTypes.addEntry("kOperandTypeARMSPRRegisterList"); operandTypes.addEntry("kOperandTypeARMTBAddrMode"); operandTypes.addEntry("kOperandTypeThumbITMask"); operandTypes.addEntry("kOperandTypeThumbAddrModeS1"); From nicholas at mxc.ca Tue Nov 16 23:04:45 2010 From: nicholas at mxc.ca (Nick Lewycky) Date: Tue, 16 Nov 2010 21:04:45 -0800 Subject: [llvm-commits] [llvm] r119455 - in /llvm/trunk: include/llvm/Analysis/ScalarEvolution.h include/llvm/Support/ConstantRange.h lib/Analysis/ScalarEvolution.cpp In-Reply-To: <20101117024444.9134E2A6C12C@llvm.org> References: <20101117024444.9134E2A6C12C@llvm.org> Message-ID: <4CE3626D.3040502@mxc.ca> Dan Gohman wrote: > Modified: llvm/trunk/include/llvm/Support/ConstantRange.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/ConstantRange.h?rev=119455&r1=119454&r2=119455&view=diff > ============================================================================== > --- llvm/trunk/include/llvm/Support/ConstantRange.h (original) > +++ llvm/trunk/include/llvm/Support/ConstantRange.h Tue Nov 16 20:44:44 2010 > @@ -47,6 +47,9 @@ > /// > explicit ConstantRange(uint32_t BitWidth, bool isFullSet = true); > > + /// Default constructor that creates an uninitialized ConstantRange. > + ConstantRange() {} > + Ugh. If you're going to do this, could we make it at least initialize itself to a known "uninitialized" state, even if in DEBUG mode only? Any value where L == U but not full or empty will do. The operations would all then start with a debugInitialized() call whose implementation is #if 0'd to nothing in an optimized build. Does that sound reasonable? Nick > /// Initialize a range to hold the single specified value. > /// > ConstantRange(const APInt&Value); > > Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=119455&r1=119454&r2=119455&view=diff > ============================================================================== > --- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original) > +++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Tue Nov 16 20:44:44 2010 > @@ -377,8 +377,10 @@ > } > > void SCEVUnknown::deleted() { > - // Clear this SCEVUnknown from ValuesAtScopes. > + // Clear this SCEVUnknown from various maps. > SE->ValuesAtScopes.erase(this); > + SE->UnsignedRanges.erase(this); > + SE->SignedRanges.erase(this); > > // Remove this SCEVUnknown from the uniquing map. > SE->UniqueSCEVs.RemoveNode(this); > @@ -388,8 +390,10 @@ > } > > void SCEVUnknown::allUsesReplacedWith(Value *New) { > - // Clear this SCEVUnknown from ValuesAtScopes. > + // Clear this SCEVUnknown from various maps. > SE->ValuesAtScopes.erase(this); > + SE->UnsignedRanges.erase(this); > + SE->SignedRanges.erase(this); > > // Remove this SCEVUnknown from the uniquing map. > SE->UniqueSCEVs.RemoveNode(this); > @@ -2713,9 +2717,11 @@ > ValueExprMapType::iterator It = > ValueExprMap.find(static_cast(I)); > if (It != ValueExprMap.end()) { > + const SCEV *Old = It->second; > + > // Short-circuit the def-use traversal if the symbolic name > // ceases to appear in expressions. > - if (It->second != SymName&& !It->second->hasOperand(SymName)) > + if (Old != SymName&& !Old->hasOperand(SymName)) > continue; > > // SCEVUnknown for a PHI either means that it has an unrecognized > @@ -2726,9 +2732,11 @@ > // updates on its own when it gets to that point. In the third, we do > // want to forget the SCEVUnknown. > if (!isa(I) || > - !isa(It->second) || > - (I != PN&& It->second == SymName)) { > - ValuesAtScopes.erase(It->second); > + !isa(Old) || > + (I != PN&& Old == SymName)) { > + ValuesAtScopes.erase(Old); > + UnsignedRanges.erase(Old); > + SignedRanges.erase(Old); > ValueExprMap.erase(It); > } > } > @@ -3018,9 +3026,13 @@ > /// > ConstantRange > ScalarEvolution::getUnsignedRange(const SCEV *S) { > + // See if we've computed this range already. > + DenseMap::iterator I = UnsignedRanges.find(S); > + if (I != UnsignedRanges.end()) > + return I->second; > > if (const SCEVConstant *C = dyn_cast(S)) > - return ConstantRange(C->getValue()->getValue()); > + return UnsignedRanges[C] = ConstantRange(C->getValue()->getValue()); > > unsigned BitWidth = getTypeSizeInBits(S->getType()); > ConstantRange ConservativeResult(BitWidth, /*isFullSet=*/true); > @@ -3037,49 +3049,52 @@ > ConstantRange X = getUnsignedRange(Add->getOperand(0)); > for (unsigned i = 1, e = Add->getNumOperands(); i != e; ++i) > X = X.add(getUnsignedRange(Add->getOperand(i))); > - return ConservativeResult.intersectWith(X); > + return UnsignedRanges[Add] = ConservativeResult.intersectWith(X); > } > > if (const SCEVMulExpr *Mul = dyn_cast(S)) { > ConstantRange X = getUnsignedRange(Mul->getOperand(0)); > for (unsigned i = 1, e = Mul->getNumOperands(); i != e; ++i) > X = X.multiply(getUnsignedRange(Mul->getOperand(i))); > - return ConservativeResult.intersectWith(X); > + return UnsignedRanges[Mul] = ConservativeResult.intersectWith(X); > } > > if (const SCEVSMaxExpr *SMax = dyn_cast(S)) { > ConstantRange X = getUnsignedRange(SMax->getOperand(0)); > for (unsigned i = 1, e = SMax->getNumOperands(); i != e; ++i) > X = X.smax(getUnsignedRange(SMax->getOperand(i))); > - return ConservativeResult.intersectWith(X); > + return UnsignedRanges[SMax] = ConservativeResult.intersectWith(X); > } > > if (const SCEVUMaxExpr *UMax = dyn_cast(S)) { > ConstantRange X = getUnsignedRange(UMax->getOperand(0)); > for (unsigned i = 1, e = UMax->getNumOperands(); i != e; ++i) > X = X.umax(getUnsignedRange(UMax->getOperand(i))); > - return ConservativeResult.intersectWith(X); > + return UnsignedRanges[UMax] = ConservativeResult.intersectWith(X); > } > > if (const SCEVUDivExpr *UDiv = dyn_cast(S)) { > ConstantRange X = getUnsignedRange(UDiv->getLHS()); > ConstantRange Y = getUnsignedRange(UDiv->getRHS()); > - return ConservativeResult.intersectWith(X.udiv(Y)); > + return UnsignedRanges[UDiv] = ConservativeResult.intersectWith(X.udiv(Y)); > } > > if (const SCEVZeroExtendExpr *ZExt = dyn_cast(S)) { > ConstantRange X = getUnsignedRange(ZExt->getOperand()); > - return ConservativeResult.intersectWith(X.zeroExtend(BitWidth)); > + return UnsignedRanges[ZExt] = > + ConservativeResult.intersectWith(X.zeroExtend(BitWidth)); > } > > if (const SCEVSignExtendExpr *SExt = dyn_cast(S)) { > ConstantRange X = getUnsignedRange(SExt->getOperand()); > - return ConservativeResult.intersectWith(X.signExtend(BitWidth)); > + return UnsignedRanges[SExt] = > + ConservativeResult.intersectWith(X.signExtend(BitWidth)); > } > > if (const SCEVTruncateExpr *Trunc = dyn_cast(S)) { > ConstantRange X = getUnsignedRange(Trunc->getOperand()); > - return ConservativeResult.intersectWith(X.truncate(BitWidth)); > + return UnsignedRanges[Trunc] = > + ConservativeResult.intersectWith(X.truncate(BitWidth)); > } > > if (const SCEVAddRecExpr *AddRec = dyn_cast(S)) { > @@ -3119,19 +3134,20 @@ > ConstantRange ExtEndRange = EndRange.zextOrTrunc(BitWidth*2+1); > if (ExtStartRange.add(ExtMaxBECountRange.multiply(ExtStepRange)) != > ExtEndRange) > - return ConservativeResult; > + return UnsignedRanges[AddRec] = ConservativeResult; > > APInt Min = APIntOps::umin(StartRange.getUnsignedMin(), > EndRange.getUnsignedMin()); > APInt Max = APIntOps::umax(StartRange.getUnsignedMax(), > EndRange.getUnsignedMax()); > if (Min.isMinValue()&& Max.isMaxValue()) > - return ConservativeResult; > - return ConservativeResult.intersectWith(ConstantRange(Min, Max+1)); > + return UnsignedRanges[AddRec] = ConservativeResult; > + return UnsignedRanges[AddRec] = > + ConservativeResult.intersectWith(ConstantRange(Min, Max+1)); > } > } > > - return ConservativeResult; > + return UnsignedRanges[AddRec] = ConservativeResult; > } > > if (const SCEVUnknown *U = dyn_cast(S)) { > @@ -3140,20 +3156,25 @@ > APInt Zeros(BitWidth, 0), Ones(BitWidth, 0); > ComputeMaskedBits(U->getValue(), Mask, Zeros, Ones, TD); > if (Ones == ~Zeros + 1) > - return ConservativeResult; > - return ConservativeResult.intersectWith(ConstantRange(Ones, ~Zeros + 1)); > + return UnsignedRanges[U] = ConservativeResult; > + return UnsignedRanges[U] = > + ConservativeResult.intersectWith(ConstantRange(Ones, ~Zeros + 1)); > } > > - return ConservativeResult; > + return UnsignedRanges[S] = ConservativeResult; > } > > /// getSignedRange - Determine the signed range for a particular SCEV. > /// > ConstantRange > ScalarEvolution::getSignedRange(const SCEV *S) { > + // See if we've computed this range already. > + DenseMap::iterator I = SignedRanges.find(S); > + if (I != SignedRanges.end()) > + return I->second; > > if (const SCEVConstant *C = dyn_cast(S)) > - return ConstantRange(C->getValue()->getValue()); > + return SignedRanges[C] = ConstantRange(C->getValue()->getValue()); > > unsigned BitWidth = getTypeSizeInBits(S->getType()); > ConstantRange ConservativeResult(BitWidth, /*isFullSet=*/true); > @@ -3170,49 +3191,52 @@ > ConstantRange X = getSignedRange(Add->getOperand(0)); > for (unsigned i = 1, e = Add->getNumOperands(); i != e; ++i) > X = X.add(getSignedRange(Add->getOperand(i))); > - return ConservativeResult.intersectWith(X); > + return SignedRanges[Add] = ConservativeResult.intersectWith(X); > } > > if (const SCEVMulExpr *Mul = dyn_cast(S)) { > ConstantRange X = getSignedRange(Mul->getOperand(0)); > for (unsigned i = 1, e = Mul->getNumOperands(); i != e; ++i) > X = X.multiply(getSignedRange(Mul->getOperand(i))); > - return ConservativeResult.intersectWith(X); > + return SignedRanges[Mul] = ConservativeResult.intersectWith(X); > } > > if (const SCEVSMaxExpr *SMax = dyn_cast(S)) { > ConstantRange X = getSignedRange(SMax->getOperand(0)); > for (unsigned i = 1, e = SMax->getNumOperands(); i != e; ++i) > X = X.smax(getSignedRange(SMax->getOperand(i))); > - return ConservativeResult.intersectWith(X); > + return SignedRanges[SMax] = ConservativeResult.intersectWith(X); > } > > if (const SCEVUMaxExpr *UMax = dyn_cast(S)) { > ConstantRange X = getSignedRange(UMax->getOperand(0)); > for (unsigned i = 1, e = UMax->getNumOperands(); i != e; ++i) > X = X.umax(getSignedRange(UMax->getOperand(i))); > - return ConservativeResult.intersectWith(X); > + return SignedRanges[UMax] = ConservativeResult.intersectWith(X); > } > > if (const SCEVUDivExpr *UDiv = dyn_cast(S)) { > ConstantRange X = getSignedRange(UDiv->getLHS()); > ConstantRange Y = getSignedRange(UDiv->getRHS()); > - return ConservativeResult.intersectWith(X.udiv(Y)); > + return SignedRanges[UDiv] = ConservativeResult.intersectWith(X.udiv(Y)); > } > > if (const SCEVZeroExtendExpr *ZExt = dyn_cast(S)) { > ConstantRange X = getSignedRange(ZExt->getOperand()); > - return ConservativeResult.intersectWith(X.zeroExtend(BitWidth)); > + return SignedRanges[ZExt] = > + ConservativeResult.intersectWith(X.zeroExtend(BitWidth)); > } > > if (const SCEVSignExtendExpr *SExt = dyn_cast(S)) { > ConstantRange X = getSignedRange(SExt->getOperand()); > - return ConservativeResult.intersectWith(X.signExtend(BitWidth)); > + return SignedRanges[SExt] = > + ConservativeResult.intersectWith(X.signExtend(BitWidth)); > } > > if (const SCEVTruncateExpr *Trunc = dyn_cast(S)) { > ConstantRange X = getSignedRange(Trunc->getOperand()); > - return ConservativeResult.intersectWith(X.truncate(BitWidth)); > + return SignedRanges[Trunc] = > + ConservativeResult.intersectWith(X.truncate(BitWidth)); > } > > if (const SCEVAddRecExpr *AddRec = dyn_cast(S)) { > @@ -3262,34 +3286,35 @@ > ConstantRange ExtEndRange = EndRange.sextOrTrunc(BitWidth*2+1); > if (ExtStartRange.add(ExtMaxBECountRange.multiply(ExtStepRange)) != > ExtEndRange) > - return ConservativeResult; > + return SignedRanges[AddRec] = ConservativeResult; > > APInt Min = APIntOps::smin(StartRange.getSignedMin(), > EndRange.getSignedMin()); > APInt Max = APIntOps::smax(StartRange.getSignedMax(), > EndRange.getSignedMax()); > if (Min.isMinSignedValue()&& Max.isMaxSignedValue()) > - return ConservativeResult; > - return ConservativeResult.intersectWith(ConstantRange(Min, Max+1)); > + return SignedRanges[AddRec] = ConservativeResult; > + return SignedRanges[AddRec] = > + ConservativeResult.intersectWith(ConstantRange(Min, Max+1)); > } > } > > - return ConservativeResult; > + return SignedRanges[AddRec] = ConservativeResult; > } > > if (const SCEVUnknown *U = dyn_cast(S)) { > // For a SCEVUnknown, ask ValueTracking. > if (!U->getValue()->getType()->isIntegerTy()&& !TD) > - return ConservativeResult; > + return SignedRanges[U] = ConservativeResult; > unsigned NS = ComputeNumSignBits(U->getValue(), TD); > if (NS == 1) > - return ConservativeResult; > - return ConservativeResult.intersectWith( > + return SignedRanges[U] = ConservativeResult; > + return SignedRanges[U] = ConservativeResult.intersectWith( > ConstantRange(APInt::getSignedMinValue(BitWidth).ashr(NS - 1), > APInt::getSignedMaxValue(BitWidth).ashr(NS - 1)+1)); > } > > - return ConservativeResult; > + return SignedRanges[S] = ConservativeResult; > } > > /// createSCEV - We know that there is no SCEV for the specified value. > @@ -3734,14 +3759,18 @@ > ValueExprMapType::iterator It = > ValueExprMap.find(static_cast(I)); > if (It != ValueExprMap.end()) { > + const SCEV *Old = It->second; > + > // SCEVUnknown for a PHI either means that it has an unrecognized > // structure, or it's a PHI that's in the progress of being computed > // by createNodeForPHI. In the former case, additional loop trip > // count information isn't going to change anything. In the later > // case, createNodeForPHI will perform the necessary updates on its > // own when it gets to that point. > - if (!isa(I) || !isa(It->second)) { > - ValuesAtScopes.erase(It->second); > + if (!isa(I) || !isa(Old)) { > + ValuesAtScopes.erase(Old); > + UnsignedRanges.erase(Old); > + SignedRanges.erase(Old); > ValueExprMap.erase(It); > } > if (PHINode *PN = dyn_cast(I)) > @@ -3773,7 +3802,10 @@ > > ValueExprMapType::iterator It = ValueExprMap.find(static_cast(I)); > if (It != ValueExprMap.end()) { > - ValuesAtScopes.erase(It->second); > + const SCEV *Old = It->second; > + ValuesAtScopes.erase(Old); > + UnsignedRanges.erase(Old); > + SignedRanges.erase(Old); > ValueExprMap.erase(It); > if (PHINode *PN = dyn_cast(I)) > ConstantEvolutionLoopExitValue.erase(PN); > @@ -3806,7 +3838,10 @@ > > ValueExprMapType::iterator It = ValueExprMap.find(static_cast(I)); > if (It != ValueExprMap.end()) { > - ValuesAtScopes.erase(It->second); > + const SCEV *Old = It->second; > + ValuesAtScopes.erase(Old); > + UnsignedRanges.erase(Old); > + SignedRanges.erase(Old); > ValueExprMap.erase(It); > if (PHINode *PN = dyn_cast(I)) > ConstantEvolutionLoopExitValue.erase(PN); > @@ -5862,6 +5897,8 @@ > BackedgeTakenCounts.clear(); > ConstantEvolutionLoopExitValue.clear(); > ValuesAtScopes.clear(); > + UnsignedRanges.clear(); > + SignedRanges.clear(); > UniqueSCEVs.clear(); > SCEVAllocator.Reset(); > } > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > From rafael.espindola at gmail.com Tue Nov 16 23:13:17 2010 From: rafael.espindola at gmail.com (=?UTF-8?Q?Rafael_Esp=C3=ADndola?=) Date: Wed, 17 Nov 2010 00:13:17 -0500 Subject: [llvm-commits] [patch] Use .loc in codegen Message-ID: The attached patch changes CodeGen to use .loc directives. This has many advantages. First: 7 files changed, 37 insertions(+), 319 deletions(-) Second, the output is a lot more readable and testing is easier. A good example is the unknown-location.ll test that now can just look for ".loc 1 0 0". And finally, we don't use a DW_LNE_set_address for every address change. I did some basic checking that the debug output is correct. Tomorrow I will try to do a debug bootstrap with this patch. Cheers, Rafael -------------- next part -------------- A non-text attachment was scrubbed... Name: loc.patch Type: text/x-patch Size: 9293 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101117/4443f038/attachment.bin From isanbard at gmail.com Tue Nov 16 23:31:09 2010 From: isanbard at gmail.com (Bill Wendling) Date: Wed, 17 Nov 2010 05:31:09 -0000 Subject: [llvm-commits] [llvm] r119461 - in /llvm/trunk/lib/Target/ARM: ARMAddressingModes.h ARMCodeEmitter.cpp ARMLoadStoreOptimizer.cpp Message-ID: <20101117053109.5A4A22A6C12C@llvm.org> Author: void Date: Tue Nov 16 23:31:09 2010 New Revision: 119461 URL: http://llvm.org/viewvc/llvm-project?rev=119461&view=rev Log: The machine instruction no longer encodes the submode as a separate operand. We should get the submode from the load/store multiple instruction's opcode. Modified: llvm/trunk/lib/Target/ARM/ARMAddressingModes.h llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Modified: llvm/trunk/lib/Target/ARM/ARMAddressingModes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAddressingModes.h?rev=119461&r1=119460&r2=119461&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMAddressingModes.h (original) +++ llvm/trunk/lib/Target/ARM/ARMAddressingModes.h Tue Nov 16 23:31:09 2010 @@ -576,6 +576,8 @@ return Val; } + AMSubMode getLoadStoreMultipleSubMode(int Opcode); + } // end namespace ARM_AM } // end namespace llvm Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp?rev=119461&r1=119460&r2=119461&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Tue Nov 16 23:31:09 2010 @@ -1190,8 +1190,8 @@ Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRnShift; // Set addressing mode by modifying bits U(23) and P(24) - const MachineOperand &MO = MI.getOperand(OpIdx++); - Binary |= getAddrModeUPBits(ARM_AM::getAM4SubMode(MO.getImm())); + ARM_AM::AMSubMode Mode = ARM_AM::getLoadStoreMultipleSubMode(MI.getOpcode()); + Binary |= getAddrModeUPBits(ARM_AM::getAM4SubMode(Mode)); // Set bit W(21) if (IsUpdating) @@ -1638,8 +1638,8 @@ Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRnShift; // Set addressing mode by modifying bits U(23) and P(24) - const MachineOperand &MO = MI.getOperand(OpIdx++); - Binary |= getAddrModeUPBits(ARM_AM::getAM4SubMode(MO.getImm())); + ARM_AM::AMSubMode Mode = ARM_AM::getLoadStoreMultipleSubMode(MI.getOpcode()); + Binary |= getAddrModeUPBits(ARM_AM::getAM4SubMode(Mode)); // Set bit W(21) if (IsUpdating) Modified: llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp?rev=119461&r1=119460&r2=119461&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Tue Nov 16 23:31:09 2010 @@ -206,7 +206,10 @@ return 0; } -static ARM_AM::AMSubMode getLoadStoreMultipleSubMode(int Opcode) { +namespace llvm { + namespace ARM_AM { + +AMSubMode getLoadStoreMultipleSubMode(int Opcode) { switch (Opcode) { default: llvm_unreachable("Unhandled opcode!"); case ARM::LDMIA: @@ -241,6 +244,9 @@ return ARM_AM::bad_am_submode; } + } // end namespace ARM_AM +} // end namespace llvm + static bool isT2i32Load(unsigned Opc) { return Opc == ARM::t2LDRi12 || Opc == ARM::t2LDRi8; } @@ -670,7 +676,7 @@ return false; bool DoMerge = false; - ARM_AM::AMSubMode Mode = getLoadStoreMultipleSubMode(Opcode); + ARM_AM::AMSubMode Mode = ARM_AM::getLoadStoreMultipleSubMode(Opcode); // Try merging with the previous instruction. MachineBasicBlock::iterator BeginMBBI = MBB.begin(); From clattner at apple.com Tue Nov 16 23:42:52 2010 From: clattner at apple.com (Chris Lattner) Date: Tue, 16 Nov 2010 21:42:52 -0800 Subject: [llvm-commits] [llvm] r119455 - in /llvm/trunk: include/llvm/Analysis/ScalarEvolution.h include/llvm/Support/ConstantRange.h lib/Analysis/ScalarEvolution.cpp In-Reply-To: <4CE3626D.3040502@mxc.ca> References: <20101117024444.9134E2A6C12C@llvm.org> <4CE3626D.3040502@mxc.ca> Message-ID: <1F328508-C9F4-4BDF-A4C8-7DD9409DA4F4@apple.com> On Nov 16, 2010, at 9:04 PM, Nick Lewycky wrote: > Dan Gohman wrote: >> Modified: llvm/trunk/include/llvm/Support/ConstantRange.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/ConstantRange.h?rev=119455&r1=119454&r2=119455&view=diff >> ============================================================================== >> --- llvm/trunk/include/llvm/Support/ConstantRange.h (original) >> +++ llvm/trunk/include/llvm/Support/ConstantRange.h Tue Nov 16 20:44:44 2010 >> @@ -47,6 +47,9 @@ >> /// >> explicit ConstantRange(uint32_t BitWidth, bool isFullSet = true); >> >> + /// Default constructor that creates an uninitialized ConstantRange. >> + ConstantRange() {} >> + > > Ugh. > > If you're going to do this, could we make it at least initialize itself > to a known "uninitialized" state, even if in DEBUG mode only? Any value > where L == U but not full or empty will do. The operations would all > then start with a debugInitialized() call whose implementation is #if > 0'd to nothing in an optimized build. Does that sound reasonable? Why not have a static getUninitRange() method or something? Why are uninit ranges useful? -Chris > > Nick > >> /// Initialize a range to hold the single specified value. >> /// >> ConstantRange(const APInt&Value); >> >> Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=119455&r1=119454&r2=119455&view=diff >> ============================================================================== >> --- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original) >> +++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Tue Nov 16 20:44:44 2010 >> @@ -377,8 +377,10 @@ >> } >> >> void SCEVUnknown::deleted() { >> - // Clear this SCEVUnknown from ValuesAtScopes. >> + // Clear this SCEVUnknown from various maps. >> SE->ValuesAtScopes.erase(this); >> + SE->UnsignedRanges.erase(this); >> + SE->SignedRanges.erase(this); >> >> // Remove this SCEVUnknown from the uniquing map. >> SE->UniqueSCEVs.RemoveNode(this); >> @@ -388,8 +390,10 @@ >> } >> >> void SCEVUnknown::allUsesReplacedWith(Value *New) { >> - // Clear this SCEVUnknown from ValuesAtScopes. >> + // Clear this SCEVUnknown from various maps. >> SE->ValuesAtScopes.erase(this); >> + SE->UnsignedRanges.erase(this); >> + SE->SignedRanges.erase(this); >> >> // Remove this SCEVUnknown from the uniquing map. >> SE->UniqueSCEVs.RemoveNode(this); >> @@ -2713,9 +2717,11 @@ >> ValueExprMapType::iterator It = >> ValueExprMap.find(static_cast(I)); >> if (It != ValueExprMap.end()) { >> + const SCEV *Old = It->second; >> + >> // Short-circuit the def-use traversal if the symbolic name >> // ceases to appear in expressions. >> - if (It->second != SymName&& !It->second->hasOperand(SymName)) >> + if (Old != SymName&& !Old->hasOperand(SymName)) >> continue; >> >> // SCEVUnknown for a PHI either means that it has an unrecognized >> @@ -2726,9 +2732,11 @@ >> // updates on its own when it gets to that point. In the third, we do >> // want to forget the SCEVUnknown. >> if (!isa(I) || >> - !isa(It->second) || >> - (I != PN&& It->second == SymName)) { >> - ValuesAtScopes.erase(It->second); >> + !isa(Old) || >> + (I != PN&& Old == SymName)) { >> + ValuesAtScopes.erase(Old); >> + UnsignedRanges.erase(Old); >> + SignedRanges.erase(Old); >> ValueExprMap.erase(It); >> } >> } >> @@ -3018,9 +3026,13 @@ >> /// >> ConstantRange >> ScalarEvolution::getUnsignedRange(const SCEV *S) { >> + // See if we've computed this range already. >> + DenseMap::iterator I = UnsignedRanges.find(S); >> + if (I != UnsignedRanges.end()) >> + return I->second; >> >> if (const SCEVConstant *C = dyn_cast(S)) >> - return ConstantRange(C->getValue()->getValue()); >> + return UnsignedRanges[C] = ConstantRange(C->getValue()->getValue()); >> >> unsigned BitWidth = getTypeSizeInBits(S->getType()); >> ConstantRange ConservativeResult(BitWidth, /*isFullSet=*/true); >> @@ -3037,49 +3049,52 @@ >> ConstantRange X = getUnsignedRange(Add->getOperand(0)); >> for (unsigned i = 1, e = Add->getNumOperands(); i != e; ++i) >> X = X.add(getUnsignedRange(Add->getOperand(i))); >> - return ConservativeResult.intersectWith(X); >> + return UnsignedRanges[Add] = ConservativeResult.intersectWith(X); >> } >> >> if (const SCEVMulExpr *Mul = dyn_cast(S)) { >> ConstantRange X = getUnsignedRange(Mul->getOperand(0)); >> for (unsigned i = 1, e = Mul->getNumOperands(); i != e; ++i) >> X = X.multiply(getUnsignedRange(Mul->getOperand(i))); >> - return ConservativeResult.intersectWith(X); >> + return UnsignedRanges[Mul] = ConservativeResult.intersectWith(X); >> } >> >> if (const SCEVSMaxExpr *SMax = dyn_cast(S)) { >> ConstantRange X = getUnsignedRange(SMax->getOperand(0)); >> for (unsigned i = 1, e = SMax->getNumOperands(); i != e; ++i) >> X = X.smax(getUnsignedRange(SMax->getOperand(i))); >> - return ConservativeResult.intersectWith(X); >> + return UnsignedRanges[SMax] = ConservativeResult.intersectWith(X); >> } >> >> if (const SCEVUMaxExpr *UMax = dyn_cast(S)) { >> ConstantRange X = getUnsignedRange(UMax->getOperand(0)); >> for (unsigned i = 1, e = UMax->getNumOperands(); i != e; ++i) >> X = X.umax(getUnsignedRange(UMax->getOperand(i))); >> - return ConservativeResult.intersectWith(X); >> + return UnsignedRanges[UMax] = ConservativeResult.intersectWith(X); >> } >> >> if (const SCEVUDivExpr *UDiv = dyn_cast(S)) { >> ConstantRange X = getUnsignedRange(UDiv->getLHS()); >> ConstantRange Y = getUnsignedRange(UDiv->getRHS()); >> - return ConservativeResult.intersectWith(X.udiv(Y)); >> + return UnsignedRanges[UDiv] = ConservativeResult.intersectWith(X.udiv(Y)); >> } >> >> if (const SCEVZeroExtendExpr *ZExt = dyn_cast(S)) { >> ConstantRange X = getUnsignedRange(ZExt->getOperand()); >> - return ConservativeResult.intersectWith(X.zeroExtend(BitWidth)); >> + return UnsignedRanges[ZExt] = >> + ConservativeResult.intersectWith(X.zeroExtend(BitWidth)); >> } >> >> if (const SCEVSignExtendExpr *SExt = dyn_cast(S)) { >> ConstantRange X = getUnsignedRange(SExt->getOperand()); >> - return ConservativeResult.intersectWith(X.signExtend(BitWidth)); >> + return UnsignedRanges[SExt] = >> + ConservativeResult.intersectWith(X.signExtend(BitWidth)); >> } >> >> if (const SCEVTruncateExpr *Trunc = dyn_cast(S)) { >> ConstantRange X = getUnsignedRange(Trunc->getOperand()); >> - return ConservativeResult.intersectWith(X.truncate(BitWidth)); >> + return UnsignedRanges[Trunc] = >> + ConservativeResult.intersectWith(X.truncate(BitWidth)); >> } >> >> if (const SCEVAddRecExpr *AddRec = dyn_cast(S)) { >> @@ -3119,19 +3134,20 @@ >> ConstantRange ExtEndRange = EndRange.zextOrTrunc(BitWidth*2+1); >> if (ExtStartRange.add(ExtMaxBECountRange.multiply(ExtStepRange)) != >> ExtEndRange) >> - return ConservativeResult; >> + return UnsignedRanges[AddRec] = ConservativeResult; >> >> APInt Min = APIntOps::umin(StartRange.getUnsignedMin(), >> EndRange.getUnsignedMin()); >> APInt Max = APIntOps::umax(StartRange.getUnsignedMax(), >> EndRange.getUnsignedMax()); >> if (Min.isMinValue()&& Max.isMaxValue()) >> - return ConservativeResult; >> - return ConservativeResult.intersectWith(ConstantRange(Min, Max+1)); >> + return UnsignedRanges[AddRec] = ConservativeResult; >> + return UnsignedRanges[AddRec] = >> + ConservativeResult.intersectWith(ConstantRange(Min, Max+1)); >> } >> } >> >> - return ConservativeResult; >> + return UnsignedRanges[AddRec] = ConservativeResult; >> } >> >> if (const SCEVUnknown *U = dyn_cast(S)) { >> @@ -3140,20 +3156,25 @@ >> APInt Zeros(BitWidth, 0), Ones(BitWidth, 0); >> ComputeMaskedBits(U->getValue(), Mask, Zeros, Ones, TD); >> if (Ones == ~Zeros + 1) >> - return ConservativeResult; >> - return ConservativeResult.intersectWith(ConstantRange(Ones, ~Zeros + 1)); >> + return UnsignedRanges[U] = ConservativeResult; >> + return UnsignedRanges[U] = >> + ConservativeResult.intersectWith(ConstantRange(Ones, ~Zeros + 1)); >> } >> >> - return ConservativeResult; >> + return UnsignedRanges[S] = ConservativeResult; >> } >> >> /// getSignedRange - Determine the signed range for a particular SCEV. >> /// >> ConstantRange >> ScalarEvolution::getSignedRange(const SCEV *S) { >> + // See if we've computed this range already. >> + DenseMap::iterator I = SignedRanges.find(S); >> + if (I != SignedRanges.end()) >> + return I->second; >> >> if (const SCEVConstant *C = dyn_cast(S)) >> - return ConstantRange(C->getValue()->getValue()); >> + return SignedRanges[C] = ConstantRange(C->getValue()->getValue()); >> >> unsigned BitWidth = getTypeSizeInBits(S->getType()); >> ConstantRange ConservativeResult(BitWidth, /*isFullSet=*/true); >> @@ -3170,49 +3191,52 @@ >> ConstantRange X = getSignedRange(Add->getOperand(0)); >> for (unsigned i = 1, e = Add->getNumOperands(); i != e; ++i) >> X = X.add(getSignedRange(Add->getOperand(i))); >> - return ConservativeResult.intersectWith(X); >> + return SignedRanges[Add] = ConservativeResult.intersectWith(X); >> } >> >> if (const SCEVMulExpr *Mul = dyn_cast(S)) { >> ConstantRange X = getSignedRange(Mul->getOperand(0)); >> for (unsigned i = 1, e = Mul->getNumOperands(); i != e; ++i) >> X = X.multiply(getSignedRange(Mul->getOperand(i))); >> - return ConservativeResult.intersectWith(X); >> + return SignedRanges[Mul] = ConservativeResult.intersectWith(X); >> } >> >> if (const SCEVSMaxExpr *SMax = dyn_cast(S)) { >> ConstantRange X = getSignedRange(SMax->getOperand(0)); >> for (unsigned i = 1, e = SMax->getNumOperands(); i != e; ++i) >> X = X.smax(getSignedRange(SMax->getOperand(i))); >> - return ConservativeResult.intersectWith(X); >> + return SignedRanges[SMax] = ConservativeResult.intersectWith(X); >> } >> >> if (const SCEVUMaxExpr *UMax = dyn_cast(S)) { >> ConstantRange X = getSignedRange(UMax->getOperand(0)); >> for (unsigned i = 1, e = UMax->getNumOperands(); i != e; ++i) >> X = X.umax(getSignedRange(UMax->getOperand(i))); >> - return ConservativeResult.intersectWith(X); >> + return SignedRanges[UMax] = ConservativeResult.intersectWith(X); >> } >> >> if (const SCEVUDivExpr *UDiv = dyn_cast(S)) { >> ConstantRange X = getSignedRange(UDiv->getLHS()); >> ConstantRange Y = getSignedRange(UDiv->getRHS()); >> - return ConservativeResult.intersectWith(X.udiv(Y)); >> + return SignedRanges[UDiv] = ConservativeResult.intersectWith(X.udiv(Y)); >> } >> >> if (const SCEVZeroExtendExpr *ZExt = dyn_cast(S)) { >> ConstantRange X = getSignedRange(ZExt->getOperand()); >> - return ConservativeResult.intersectWith(X.zeroExtend(BitWidth)); >> + return SignedRanges[ZExt] = >> + ConservativeResult.intersectWith(X.zeroExtend(BitWidth)); >> } >> >> if (const SCEVSignExtendExpr *SExt = dyn_cast(S)) { >> ConstantRange X = getSignedRange(SExt->getOperand()); >> - return ConservativeResult.intersectWith(X.signExtend(BitWidth)); >> + return SignedRanges[SExt] = >> + ConservativeResult.intersectWith(X.signExtend(BitWidth)); >> } >> >> if (const SCEVTruncateExpr *Trunc = dyn_cast(S)) { >> ConstantRange X = getSignedRange(Trunc->getOperand()); >> - return ConservativeResult.intersectWith(X.truncate(BitWidth)); >> + return SignedRanges[Trunc] = >> + ConservativeResult.intersectWith(X.truncate(BitWidth)); >> } >> >> if (const SCEVAddRecExpr *AddRec = dyn_cast(S)) { >> @@ -3262,34 +3286,35 @@ >> ConstantRange ExtEndRange = EndRange.sextOrTrunc(BitWidth*2+1); >> if (ExtStartRange.add(ExtMaxBECountRange.multiply(ExtStepRange)) != >> ExtEndRange) >> - return ConservativeResult; >> + return SignedRanges[AddRec] = ConservativeResult; >> >> APInt Min = APIntOps::smin(StartRange.getSignedMin(), >> EndRange.getSignedMin()); >> APInt Max = APIntOps::smax(StartRange.getSignedMax(), >> EndRange.getSignedMax()); >> if (Min.isMinSignedValue()&& Max.isMaxSignedValue()) >> - return ConservativeResult; >> - return ConservativeResult.intersectWith(ConstantRange(Min, Max+1)); >> + return SignedRanges[AddRec] = ConservativeResult; >> + return SignedRanges[AddRec] = >> + ConservativeResult.intersectWith(ConstantRange(Min, Max+1)); >> } >> } >> >> - return ConservativeResult; >> + return SignedRanges[AddRec] = ConservativeResult; >> } >> >> if (const SCEVUnknown *U = dyn_cast(S)) { >> // For a SCEVUnknown, ask ValueTracking. >> if (!U->getValue()->getType()->isIntegerTy()&& !TD) >> - return ConservativeResult; >> + return SignedRanges[U] = ConservativeResult; >> unsigned NS = ComputeNumSignBits(U->getValue(), TD); >> if (NS == 1) >> - return ConservativeResult; >> - return ConservativeResult.intersectWith( >> + return SignedRanges[U] = ConservativeResult; >> + return SignedRanges[U] = ConservativeResult.intersectWith( >> ConstantRange(APInt::getSignedMinValue(BitWidth).ashr(NS - 1), >> APInt::getSignedMaxValue(BitWidth).ashr(NS - 1)+1)); >> } >> >> - return ConservativeResult; >> + return SignedRanges[S] = ConservativeResult; >> } >> >> /// createSCEV - We know that there is no SCEV for the specified value. >> @@ -3734,14 +3759,18 @@ >> ValueExprMapType::iterator It = >> ValueExprMap.find(static_cast(I)); >> if (It != ValueExprMap.end()) { >> + const SCEV *Old = It->second; >> + >> // SCEVUnknown for a PHI either means that it has an unrecognized >> // structure, or it's a PHI that's in the progress of being computed >> // by createNodeForPHI. In the former case, additional loop trip >> // count information isn't going to change anything. In the later >> // case, createNodeForPHI will perform the necessary updates on its >> // own when it gets to that point. >> - if (!isa(I) || !isa(It->second)) { >> - ValuesAtScopes.erase(It->second); >> + if (!isa(I) || !isa(Old)) { >> + ValuesAtScopes.erase(Old); >> + UnsignedRanges.erase(Old); >> + SignedRanges.erase(Old); >> ValueExprMap.erase(It); >> } >> if (PHINode *PN = dyn_cast(I)) >> @@ -3773,7 +3802,10 @@ >> >> ValueExprMapType::iterator It = ValueExprMap.find(static_cast(I)); >> if (It != ValueExprMap.end()) { >> - ValuesAtScopes.erase(It->second); >> + const SCEV *Old = It->second; >> + ValuesAtScopes.erase(Old); >> + UnsignedRanges.erase(Old); >> + SignedRanges.erase(Old); >> ValueExprMap.erase(It); >> if (PHINode *PN = dyn_cast(I)) >> ConstantEvolutionLoopExitValue.erase(PN); >> @@ -3806,7 +3838,10 @@ >> >> ValueExprMapType::iterator It = ValueExprMap.find(static_cast(I)); >> if (It != ValueExprMap.end()) { >> - ValuesAtScopes.erase(It->second); >> + const SCEV *Old = It->second; >> + ValuesAtScopes.erase(Old); >> + UnsignedRanges.erase(Old); >> + SignedRanges.erase(Old); >> ValueExprMap.erase(It); >> if (PHINode *PN = dyn_cast(I)) >> ConstantEvolutionLoopExitValue.erase(PN); >> @@ -5862,6 +5897,8 @@ >> BackedgeTakenCounts.clear(); >> ConstantEvolutionLoopExitValue.clear(); >> ValuesAtScopes.clear(); >> + UnsignedRanges.clear(); >> + SignedRanges.clear(); >> UniqueSCEVs.clear(); >> SCEVAllocator.Reset(); >> } >> >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >> > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From sabre at nondot.org Tue Nov 16 23:41:32 2010 From: sabre at nondot.org (Chris Lattner) Date: Wed, 17 Nov 2010 05:41:32 -0000 Subject: [llvm-commits] [llvm] r119462 - in /llvm/trunk/lib/Target/ARM: ARMAsmBackend.cpp ARMTargetMachine.cpp Message-ID: <20101117054132.690812A6C12C@llvm.org> Author: lattner Date: Tue Nov 16 23:41:32 2010 New Revision: 119462 URL: http://llvm.org/viewvc/llvm-project?rev=119462&view=rev Log: tidy up Modified: llvm/trunk/lib/Target/ARM/ARMAsmBackend.cpp llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp Modified: llvm/trunk/lib/Target/ARM/ARMAsmBackend.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAsmBackend.cpp?rev=119462&r1=119461&r2=119462&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMAsmBackend.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMAsmBackend.cpp Tue Nov 16 23:41:32 2010 @@ -22,15 +22,12 @@ #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/raw_ostream.h" #include "llvm/Target/TargetRegistry.h" -#include "llvm/Target/TargetAsmBackend.h" using namespace llvm; namespace { class ARMAsmBackend : public TargetAsmBackend { public: - ARMAsmBackend(const Target &T) - : TargetAsmBackend(T) { - } + ARMAsmBackend(const Target &T) : TargetAsmBackend(T) {} bool MayNeedRelaxation(const MCInst &Inst) const; @@ -42,6 +39,7 @@ return 4; } }; +} // end anonymous namespace bool ARMAsmBackend::MayNeedRelaxation(const MCInst &Inst) const { // FIXME: Thumb targets, different move constant targets.. @@ -64,7 +62,6 @@ OW->Write8(0); return true; } -} // end anonymous namespace namespace { // FIXME: This should be in a separate file. @@ -105,13 +102,12 @@ assert(0 && "ELFARMAsmBackend::ApplyFixup() unimplemented"); } +namespace { // FIXME: This should be in a separate file. class DarwinARMAsmBackend : public ARMAsmBackend { MCMachOObjectFormat Format; - public: - DarwinARMAsmBackend(const Target &T) - : ARMAsmBackend(T) { + DarwinARMAsmBackend(const Target &T) : ARMAsmBackend(T) { HasScatteredSymbols = true; } @@ -140,6 +136,7 @@ return false; } }; +} // end anonymous namespace static unsigned getFixupKindNumBytes(unsigned Kind) { switch (Kind) { Modified: llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp?rev=119462&r1=119461&r2=119462&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp Tue Nov 16 23:41:32 2010 @@ -34,13 +34,12 @@ // This is duplicated code. Refactor this. static MCStreamer *createMCStreamer(const Target &T, const std::string &TT, MCContext &Ctx, TargetAsmBackend &TAB, - raw_ostream &_OS, - MCCodeEmitter *_Emitter, + raw_ostream &OS, + MCCodeEmitter *Emitter, bool RelaxAll) { - Triple TheTriple(TT); - switch (TheTriple.getOS()) { + switch (Triple(TT).getOS()) { case Triple::Darwin: - return createMachOStreamer(Ctx, TAB, _OS, _Emitter, RelaxAll); + return createMachOStreamer(Ctx, TAB, OS, Emitter, RelaxAll); case Triple::MinGW32: case Triple::MinGW64: case Triple::Cygwin: @@ -48,7 +47,7 @@ llvm_unreachable("ARM does not support Windows COFF format"); return NULL; default: - return createELFStreamer(Ctx, TAB, _OS, _Emitter, RelaxAll); + return createELFStreamer(Ctx, TAB, OS, Emitter, RelaxAll); } } @@ -62,22 +61,16 @@ RegisterAsmInfoFn B(TheThumbTarget, createMCAsmInfo); // Register the MC Code Emitter - TargetRegistry::RegisterCodeEmitter(TheARMTarget, - createARMMCCodeEmitter); - TargetRegistry::RegisterCodeEmitter(TheThumbTarget, - createARMMCCodeEmitter); + TargetRegistry::RegisterCodeEmitter(TheARMTarget, createARMMCCodeEmitter); + TargetRegistry::RegisterCodeEmitter(TheThumbTarget, createARMMCCodeEmitter); // Register the asm backend. - TargetRegistry::RegisterAsmBackend(TheARMTarget, - createARMAsmBackend); - TargetRegistry::RegisterAsmBackend(TheThumbTarget, - createARMAsmBackend); + TargetRegistry::RegisterAsmBackend(TheARMTarget, createARMAsmBackend); + TargetRegistry::RegisterAsmBackend(TheThumbTarget, createARMAsmBackend); // Register the object streamer. - TargetRegistry::RegisterObjectStreamer(TheARMTarget, - createMCStreamer); - TargetRegistry::RegisterObjectStreamer(TheThumbTarget, - createMCStreamer); + TargetRegistry::RegisterObjectStreamer(TheARMTarget, createMCStreamer); + TargetRegistry::RegisterObjectStreamer(TheThumbTarget, createMCStreamer); } From sabre at nondot.org Tue Nov 16 23:41:46 2010 From: sabre at nondot.org (Chris Lattner) Date: Wed, 17 Nov 2010 05:41:46 -0000 Subject: [llvm-commits] [llvm] r119463 - in /llvm/trunk: include/llvm/Instructions.h lib/VMCore/Instructions.cpp Message-ID: <20101117054146.457372A6C12C@llvm.org> Author: lattner Date: Tue Nov 16 23:41:46 2010 New Revision: 119463 URL: http://llvm.org/viewvc/llvm-project?rev=119463&view=rev Log: fix PR8613 - Copy constructor of SwitchInst does not call SwitchInst::init Modified: llvm/trunk/include/llvm/Instructions.h llvm/trunk/lib/VMCore/Instructions.cpp Modified: llvm/trunk/include/llvm/Instructions.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Instructions.h?rev=119463&r1=119462&r2=119463&view=diff ============================================================================== --- llvm/trunk/include/llvm/Instructions.h (original) +++ llvm/trunk/include/llvm/Instructions.h Tue Nov 16 23:41:46 2010 @@ -2161,7 +2161,7 @@ // Operand[2n ] = Value to match // Operand[2n+1] = BasicBlock to go to on match SwitchInst(const SwitchInst &SI); - void init(Value *Value, BasicBlock *Default, unsigned NumCases); + void init(Value *Value, BasicBlock *Default, unsigned NumReserved); void resizeOperands(unsigned No); // allocate space for exactly zero operands void *operator new(size_t s) { Modified: llvm/trunk/lib/VMCore/Instructions.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Instructions.cpp?rev=119463&r1=119462&r2=119463&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Instructions.cpp (original) +++ llvm/trunk/lib/VMCore/Instructions.cpp Tue Nov 16 23:41:46 2010 @@ -2939,9 +2939,9 @@ // SwitchInst Implementation //===----------------------------------------------------------------------===// -void SwitchInst::init(Value *Value, BasicBlock *Default, unsigned NumCases) { - assert(Value && Default); - ReservedSpace = 2+NumCases*2; +void SwitchInst::init(Value *Value, BasicBlock *Default, unsigned NumReserved) { + assert(Value && Default && NumReserved); + ReservedSpace = NumReserved; NumOperands = 2; OperandList = allocHungoffUses(ReservedSpace); @@ -2957,7 +2957,7 @@ Instruction *InsertBefore) : TerminatorInst(Type::getVoidTy(Value->getContext()), Instruction::Switch, 0, 0, InsertBefore) { - init(Value, Default, NumCases); + init(Value, Default, 2+NumCases*2); } /// SwitchInst ctor - Create a new switch instruction, specifying a value to @@ -2968,14 +2968,15 @@ BasicBlock *InsertAtEnd) : TerminatorInst(Type::getVoidTy(Value->getContext()), Instruction::Switch, 0, 0, InsertAtEnd) { - init(Value, Default, NumCases); + init(Value, Default, 2+NumCases*2); } SwitchInst::SwitchInst(const SwitchInst &SI) - : TerminatorInst(Type::getVoidTy(SI.getContext()), Instruction::Switch, - allocHungoffUses(SI.getNumOperands()), SI.getNumOperands()) { + : TerminatorInst(SI.getType(), Instruction::Switch, 0, 0) { + init(SI.getCondition(), SI.getDefaultDest(), SI.getNumOperands()); + NumOperands = SI.getNumOperands(); Use *OL = OperandList, *InOL = SI.OperandList; - for (unsigned i = 0, E = SI.getNumOperands(); i != E; i+=2) { + for (unsigned i = 2, E = SI.getNumOperands(); i != E; i += 2) { OL[i] = InOL[i]; OL[i+1] = InOL[i+1]; } From aggarwa4 at illinois.edu Wed Nov 17 00:08:47 2010 From: aggarwa4 at illinois.edu (Arushi Aggarwal) Date: Wed, 17 Nov 2010 06:08:47 -0000 Subject: [llvm-commits] [poolalloc] r119465 - /poolalloc/trunk/lib/DSA/CompleteBottomUp.cpp Message-ID: <20101117060848.06BE62A6C12C@llvm.org> Author: aggarwa4 Date: Wed Nov 17 00:08:47 2010 New Revision: 119465 URL: http://llvm.org/viewvc/llvm-project?rev=119465&view=rev Log: Formatting. No functionality change. Modified: poolalloc/trunk/lib/DSA/CompleteBottomUp.cpp Modified: poolalloc/trunk/lib/DSA/CompleteBottomUp.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/CompleteBottomUp.cpp?rev=119465&r1=119464&r2=119465&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/CompleteBottomUp.cpp (original) +++ poolalloc/trunk/lib/DSA/CompleteBottomUp.cpp Wed Nov 17 00:08:47 2010 @@ -46,9 +46,9 @@ // // Make sure we have a DSGraph for all declared functions in the Module. - // formGlobalECs assumes that DSInfo is populated with a list of - // DSgraphs for all the functions. - + // formGlobalECs assumes that DSInfo is populated with a list of + // DSgraphs for all the functions. + for (Module::iterator F = M.begin(); F != M.end(); ++F) { if (!(F->isDeclaration())) getOrCreateGraph(F); @@ -101,8 +101,8 @@ // we have an entry in the GlobalsGraph // If any function in an SCC is a callee of an indirect function - // call, the DScallgraph contains the leader of the SCC as the - // callee of the indirect call. + // call, the DScallgraph contains the leader of the SCC as the + // callee of the indirect call. // The leasder of the SCC may not have an entry in the Globals // Graph, but at least one of the functions in the SCC // should have an entry in the GlobalsGraph @@ -125,13 +125,12 @@ sccee = callgraph.scc_end(F); bool flag = false; for(; sccii != sccee; ++sccii) { - flag |= SM.count(SM.getLeaderForGlobal(*sccii)); + flag |= SM.count(SM.getLeaderForGlobal(*sccii)); } assert (flag && "Indirect function callee not in globals?"); } } - } #endif @@ -158,20 +157,20 @@ DSCallGraph::callee_iterator csi = callgraph.callee_begin(*ii), cse = callgraph.callee_end(*ii); - - // We get all the callees, and then for all functions in that SCC, find the - // ones that have entries in the GlobalsGraph. + + // We get all the callees, and then for all functions in that SCC, find the + // ones that have entries in the GlobalsGraph. // We merge all the functions in the SCC that have entries, and then move // on to the next callee and repeat. - // If an SCC has functions that have entries in the GlobalsGraph, and are + // If an SCC has functions that have entries in the GlobalsGraph, and are // targets of an indirect function call site, they will be merged. - - // However, if an SCC has functions, that have entries in the GlobalsGraph, - // bur are not the targets of an indirect function call site, they will not + + // However, if an SCC has functions, that have entries in the GlobalsGraph, + // bur are not the targets of an indirect function call site, they will not // be merged by CBU. - + // This NH starts off empty, but ends up merging them all together DSNodeHandle calleesNH; From aggarwa4 at illinois.edu Wed Nov 17 00:09:55 2010 From: aggarwa4 at illinois.edu (Arushi Aggarwal) Date: Wed, 17 Nov 2010 06:09:55 -0000 Subject: [llvm-commits] [poolalloc] r119466 - /poolalloc/trunk/lib/DSA/CompleteBottomUp.cpp Message-ID: <20101117060955.B32F62A6C12C@llvm.org> Author: aggarwa4 Date: Wed Nov 17 00:09:55 2010 New Revision: 119466 URL: http://llvm.org/viewvc/llvm-project?rev=119466&view=rev Log: Clone information from globals back to each graph. formGlobalECs might have changed flags in the globals graph. Modified: poolalloc/trunk/lib/DSA/CompleteBottomUp.cpp Modified: poolalloc/trunk/lib/DSA/CompleteBottomUp.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/CompleteBottomUp.cpp?rev=119466&r1=119465&r2=119466&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/CompleteBottomUp.cpp (original) +++ poolalloc/trunk/lib/DSA/CompleteBottomUp.cpp Wed Nov 17 00:09:55 2010 @@ -68,6 +68,14 @@ } } + for (Module::iterator F = M.begin(); F != M.end(); ++F) { + if (!(F->isDeclaration())) { + if (DSGraph * Graph = getOrCreateGraph(F)) { + cloneGlobalsInto (Graph); + } + } + } + // // Do bottom-up propagation. // From tonic at nondot.org Wed Nov 17 00:55:48 2010 From: tonic at nondot.org (Tanya Lattner) Date: Wed, 17 Nov 2010 06:55:48 -0000 Subject: [llvm-commits] [www] r119473 - in /www/trunk/devmtg/2010-11: Collingbourne-SymbolicCrossChecking.pdf Golin-EDGToLLVM.pdf Gritz-OpenShadingLang.pdf Muller-Crack.pdf Naumann-Cling.pdf Rotem-CToVerilog.pdf Sehr-NativeClient.pdf Silverstein-IncludeWhatYouUse.pdf Villmow-OpenCL.pdf Yang-HardenLLVM.pdf Message-ID: <20101117065549.16F902A6C12C@llvm.org> Author: tbrethou Date: Wed Nov 17 00:55:48 2010 New Revision: 119473 URL: http://llvm.org/viewvc/llvm-project?rev=119473&view=rev Log: Add some developer meeting slides. Added: www/trunk/devmtg/2010-11/Collingbourne-SymbolicCrossChecking.pdf (with props) www/trunk/devmtg/2010-11/Golin-EDGToLLVM.pdf (with props) www/trunk/devmtg/2010-11/Gritz-OpenShadingLang.pdf (with props) www/trunk/devmtg/2010-11/Muller-Crack.pdf (with props) www/trunk/devmtg/2010-11/Naumann-Cling.pdf (with props) www/trunk/devmtg/2010-11/Rotem-CToVerilog.pdf (with props) www/trunk/devmtg/2010-11/Sehr-NativeClient.pdf www/trunk/devmtg/2010-11/Silverstein-IncludeWhatYouUse.pdf (with props) www/trunk/devmtg/2010-11/Villmow-OpenCL.pdf (with props) www/trunk/devmtg/2010-11/Yang-HardenLLVM.pdf Added: www/trunk/devmtg/2010-11/Collingbourne-SymbolicCrossChecking.pdf URL: http://llvm.org/viewvc/llvm-project/www/trunk/devmtg/2010-11/Collingbourne-SymbolicCrossChecking.pdf?rev=119473&view=auto ============================================================================== Binary file - no diff available. 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Propchange: www/trunk/devmtg/2010-11/Rotem-CToVerilog.pdf ------------------------------------------------------------------------------ svn:mime-type = application/octet-stream Added: www/trunk/devmtg/2010-11/Sehr-NativeClient.pdf URL: http://llvm.org/viewvc/llvm-project/www/trunk/devmtg/2010-11/Sehr-NativeClient.pdf?rev=119473&view=auto ============================================================================== Binary files www/trunk/devmtg/2010-11/Sehr-NativeClient.pdf (added) and www/trunk/devmtg/2010-11/Sehr-NativeClient.pdf Wed Nov 17 00:55:48 2010 differ Added: www/trunk/devmtg/2010-11/Silverstein-IncludeWhatYouUse.pdf URL: http://llvm.org/viewvc/llvm-project/www/trunk/devmtg/2010-11/Silverstein-IncludeWhatYouUse.pdf?rev=119473&view=auto ============================================================================== Binary file - no diff available. Propchange: www/trunk/devmtg/2010-11/Silverstein-IncludeWhatYouUse.pdf ------------------------------------------------------------------------------ svn:mime-type = application/octet-stream Added: www/trunk/devmtg/2010-11/Villmow-OpenCL.pdf URL: http://llvm.org/viewvc/llvm-project/www/trunk/devmtg/2010-11/Villmow-OpenCL.pdf?rev=119473&view=auto ============================================================================== Binary file - no diff available. Propchange: www/trunk/devmtg/2010-11/Villmow-OpenCL.pdf ------------------------------------------------------------------------------ svn:mime-type = application/octet-stream Added: www/trunk/devmtg/2010-11/Yang-HardenLLVM.pdf URL: http://llvm.org/viewvc/llvm-project/www/trunk/devmtg/2010-11/Yang-HardenLLVM.pdf?rev=119473&view=auto ============================================================================== Binary files www/trunk/devmtg/2010-11/Yang-HardenLLVM.pdf (added) and www/trunk/devmtg/2010-11/Yang-HardenLLVM.pdf Wed Nov 17 00:55:48 2010 differ From tonic at nondot.org Wed Nov 17 01:25:51 2010 From: tonic at nondot.org (Tanya Lattner) Date: Wed, 17 Nov 2010 07:25:51 -0000 Subject: [llvm-commits] [www] r119478 - /www/trunk/devmtg/2010-11/Spencer-ObjectFiles.pdf Message-ID: <20101117072551.D51A02A6C12C@llvm.org> Author: tbrethou Date: Wed Nov 17 01:25:51 2010 New Revision: 119478 URL: http://llvm.org/viewvc/llvm-project?rev=119478&view=rev Log: Add slides. Added: www/trunk/devmtg/2010-11/Spencer-ObjectFiles.pdf (with props) Added: www/trunk/devmtg/2010-11/Spencer-ObjectFiles.pdf URL: http://llvm.org/viewvc/llvm-project/www/trunk/devmtg/2010-11/Spencer-ObjectFiles.pdf?rev=119478&view=auto ============================================================================== Binary file - no diff available. Propchange: www/trunk/devmtg/2010-11/Spencer-ObjectFiles.pdf ------------------------------------------------------------------------------ svn:mime-type = application/octet-stream From sabre at nondot.org Wed Nov 17 01:53:40 2010 From: sabre at nondot.org (Chris Lattner) Date: Wed, 17 Nov 2010 07:53:40 -0000 Subject: [llvm-commits] [llvm] r119482 - in /llvm/trunk: include/llvm/CodeGen/AsmPrinter.h lib/CodeGen/AsmPrinter/AsmPrinter.cpp lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp Message-ID: <20101117075340.E1FDB2A6C12C@llvm.org> Author: lattner Date: Wed Nov 17 01:53:40 2010 New Revision: 119482 URL: http://llvm.org/viewvc/llvm-project?rev=119482&view=rev Log: refactor the interface to EmitInlineAsm a bit, no functionality change. Modified: llvm/trunk/include/llvm/CodeGen/AsmPrinter.h llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp Modified: llvm/trunk/include/llvm/CodeGen/AsmPrinter.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/AsmPrinter.h?rev=119482&r1=119481&r2=119482&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/AsmPrinter.h (original) +++ llvm/trunk/include/llvm/CodeGen/AsmPrinter.h Wed Nov 17 01:53:40 2010 @@ -49,6 +49,7 @@ class MCSection; class MCStreamer; class MCSymbol; + class MDNode; class DwarfDebug; class DwarfException; class Mangler; @@ -432,7 +433,7 @@ mutable unsigned SetCounter; /// EmitInlineAsm - Emit a blob of inline asm to the output streamer. - void EmitInlineAsm(StringRef Str, unsigned LocCookie) const; + void EmitInlineAsm(StringRef Str, const MDNode *LocMDNode = 0) const; /// EmitInlineAsm - This method formats and emits the specified machine /// instruction that is an inline asm. Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp?rev=119482&r1=119481&r2=119482&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp (original) +++ llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp Wed Nov 17 01:53:40 2010 @@ -178,7 +178,7 @@ if (!M.getModuleInlineAsm().empty()) { OutStreamer.AddComment("Start of file scope inline assembly"); OutStreamer.AddBlankLine(); - EmitInlineAsm(M.getModuleInlineAsm()+"\n", 0/*no loc cookie*/); + EmitInlineAsm(M.getModuleInlineAsm()+"\n"); OutStreamer.AddComment("End of file scope inline assembly"); OutStreamer.AddBlankLine(); } Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp?rev=119482&r1=119481&r2=119482&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp (original) +++ llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp Wed Nov 17 01:53:40 2010 @@ -35,7 +35,7 @@ using namespace llvm; /// EmitInlineAsm - Emit a blob of inline asm to the output streamer. -void AsmPrinter::EmitInlineAsm(StringRef Str, unsigned LocCookie) const { +void AsmPrinter::EmitInlineAsm(StringRef Str, const MDNode *LocMDNode) const { assert(!Str.empty() && "Can't emit empty inline asm block"); // Remember if the buffer is nul terminated or not so we can avoid a copy. @@ -57,6 +57,12 @@ LLVMContext &LLVMCtx = MMI->getModule()->getContext(); bool HasDiagHandler = false; if (void *DiagHandler = LLVMCtx.getInlineAsmDiagnosticHandler()) { + unsigned LocCookie = 0; + if (LocMDNode && LocMDNode->getNumOperands() > 0) + if (const ConstantInt *CI = + dyn_cast(LocMDNode->getOperand(0))) + LocCookie = CI->getZExtValue(); + SrcMgr.setDiagHandler((SourceMgr::DiagHandlerTy)(intptr_t)DiagHandler, LLVMCtx.getInlineAsmDiagnosticContext(), LocCookie); HasDiagHandler = true; @@ -128,15 +134,16 @@ // Get the !srcloc metadata node if we have it, and decode the loc cookie from // it. unsigned LocCookie = 0; + const MDNode *LocMD = 0; for (unsigned i = MI->getNumOperands(); i != 0; --i) { - if (MI->getOperand(i-1).isMetadata()) - if (const MDNode *SrcLoc = MI->getOperand(i-1).getMetadata()) - if (SrcLoc->getNumOperands() != 0) - if (const ConstantInt *CI = - dyn_cast(SrcLoc->getOperand(0))) { - LocCookie = CI->getZExtValue(); - break; - } + if (MI->getOperand(i-1).isMetadata() && + (LocMD = MI->getOperand(i-1).getMetadata()) && + LocMD->getNumOperands() != 0) { + if (const ConstantInt *CI = dyn_cast(LocMD->getOperand(0))) { + LocCookie = CI->getZExtValue(); + break; + } + } } // Emit the inline asm to a temporary string so we can emit it through @@ -310,7 +317,7 @@ } } OS << '\n' << (char)0; // null terminate string. - EmitInlineAsm(OS.str(), LocCookie); + EmitInlineAsm(OS.str(), LocMD); // Emit the #NOAPP end marker. This has to happen even if verbose-asm isn't // enabled, so we use EmitRawText. From sabre at nondot.org Wed Nov 17 02:03:32 2010 From: sabre at nondot.org (Chris Lattner) Date: Wed, 17 Nov 2010 08:03:32 -0000 Subject: [llvm-commits] [llvm] r119483 - /llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp Message-ID: <20101117080332.481E32A6C12C@llvm.org> Author: lattner Date: Wed Nov 17 02:03:32 2010 New Revision: 119483 URL: http://llvm.org/viewvc/llvm-project?rev=119483&view=rev Log: rearrange how the handler in SourceMgr is installed, eliminating the use of the cookie argument to setDiagHandler Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp?rev=119483&r1=119482&r2=119483&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp (original) +++ llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp Wed Nov 17 02:03:32 2010 @@ -34,6 +34,34 @@ #include "llvm/Support/raw_ostream.h" using namespace llvm; +namespace { + struct SrcMgrDiagInfo { + const MDNode *LocInfo; + void *DiagHandler; + void *DiagContext; + }; +} + +/// SrcMgrDiagHandler - This callback is invoked when the SourceMgr for an +/// inline asm has an error in it. diagInfo is a pointer to the SrcMgrDiagInfo +/// struct above. +static void SrcMgrDiagHandler(const SMDiagnostic &Diag, void *diagInfo, + unsigned locCookie) { + SrcMgrDiagInfo *DiagInfo = static_cast(diagInfo); + assert(DiagInfo && "Diagnostic context not passed down?"); + + unsigned LocCookie = 0; + if (const MDNode *LocInfo = DiagInfo->LocInfo) + if (LocInfo->getNumOperands() > 0) + if (const ConstantInt *CI = dyn_cast(LocInfo->getOperand(0))) + LocCookie = CI->getZExtValue(); + + SourceMgr::DiagHandlerTy ChainHandler = + (SourceMgr::DiagHandlerTy)(intptr_t)DiagInfo->DiagHandler; + + ChainHandler(Diag, DiagInfo->DiagContext, LocCookie); +} + /// EmitInlineAsm - Emit a blob of inline asm to the output streamer. void AsmPrinter::EmitInlineAsm(StringRef Str, const MDNode *LocMDNode) const { assert(!Str.empty() && "Can't emit empty inline asm block"); @@ -52,19 +80,18 @@ } SourceMgr SrcMgr; + SrcMgrDiagInfo DiagInfo; // If the current LLVMContext has an inline asm handler, set it in SourceMgr. LLVMContext &LLVMCtx = MMI->getModule()->getContext(); bool HasDiagHandler = false; if (void *DiagHandler = LLVMCtx.getInlineAsmDiagnosticHandler()) { - unsigned LocCookie = 0; - if (LocMDNode && LocMDNode->getNumOperands() > 0) - if (const ConstantInt *CI = - dyn_cast(LocMDNode->getOperand(0))) - LocCookie = CI->getZExtValue(); - - SrcMgr.setDiagHandler((SourceMgr::DiagHandlerTy)(intptr_t)DiagHandler, - LLVMCtx.getInlineAsmDiagnosticContext(), LocCookie); + // If the source manager has an issue, we arrange for SrcMgrDiagHandler + // to be invoked, getting DiagInfo passed into it. + DiagInfo.LocInfo = LocMDNode; + DiagInfo.DiagHandler = DiagHandler; + DiagInfo.DiagContext = LLVMCtx.getInlineAsmDiagnosticContext(); + SrcMgr.setDiagHandler(SrcMgrDiagHandler, &DiagInfo); HasDiagHandler = true; } From evan.cheng at apple.com Wed Nov 17 02:06:50 2010 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 17 Nov 2010 08:06:50 -0000 Subject: [llvm-commits] [llvm] r119484 - /llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Message-ID: <20101117080650.C5B802A6C12C@llvm.org> Author: evancheng Date: Wed Nov 17 02:06:50 2010 New Revision: 119484 URL: http://llvm.org/viewvc/llvm-project?rev=119484&view=rev Log: Simplify code that toggle optional operand to ARM::CPSR. Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=119484&r1=119483&r2=119484&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Wed Nov 17 02:06:50 2010 @@ -1546,9 +1546,9 @@ case ARM::SUBri: case ARM::t2ADDri: case ARM::t2SUBri: - MI->RemoveOperand(5); - MachineInstrBuilder(MI) - .addReg(ARM::CPSR, RegState::Define | RegState::Implicit); + // Toggle the optional operand to CPSR. + MI->getOperand(5).setReg(ARM::CPSR); + MI->getOperand(5).setIsDef(true); CmpInstr->eraseFromParent(); return true; } From evan.cheng at apple.com Wed Nov 17 02:09:05 2010 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 17 Nov 2010 00:09:05 -0800 Subject: [llvm-commits] [PATCH, PING] Peephole Infrastructure improvements and (ARM, T, T2) TSTrr optimizations In-Reply-To: References: Message-ID: <4289D97B-FF9B-4BB3-BCC9-DB692EB35026@apple.com> Hi Gabor, I've made some minor changes in this area. Can you update your patch again? I have some other questions / concerns: 1. I have trouble understanding MaxOpportunity and CmpOpportunity. Can you add more comments? Please try to eliminate the use of template. It feels over-designed and doesn't really fit in TargetInstrInfo. 2. TrackCopyEquivalences is target independent code. Please move it out of ARM. Again, the use of template seems unnecessary. 3. I'm concerned with the compile time impact of FindCorrespondingAnd. Have you measured it? 4. Can you provide more test cases that shows the benefit of your patch? Some questions: 5. Are we missing opportunities? What about xor? One thing I noticed we are always folding (cmp (xor l, r), 0) to teq. That's actually a potential pessimization in case the xor has multiple uses. Instead, isel should leave it as xor + cmp 0 and let the peephole pass away the cmp. Evan On Oct 29, 2010, at 12:59 AM, Gabor Greif wrote: > My response below, forgot to add all recipients :-( > > On 10/29/10, Bill Wendling wrote: >> Sorry about the long response time. A few general comments: >> >> ? Watch out for consistent spacing. >> ? You should use "llvm::next" instead of "next". The latter conflicts with >> an "std" name (if I recall correctly). >> ? You call 'new' on the Opportunity classes in a situation where it expects >> to return a "bool" value. What's going on here? >> >> -bw > > > > Hi Bill, > > thanks for the review! > > Spacing: I am not aware of problems with my recent patch > http://codereview.appspot.com/2781041/ (also attached to the [PING] > mail. I added spaces after 'new' and before '(' in my working copy. > > llvm::next: I never have seen conflicts, Googled and found this: > http://gcc.gnu.org/bugzilla/show_bug.cgi?id=40497. Will change for > reasons of caution. > > Returning 'new (Space) MaskOpporunity..." etc. in bool context. It is > just a shorthand for these two lines: > new (Space) MaskOpporunity...; // fill in closure > return true; // yes we can proceed with the closure > But I can make it explicit if you wish. Do you? Okay to commit? > > Cheers, > > Gabor >> >> On Oct 25, 2010, at 1:28 AM, Gabor Greif wrote: >> >>> Ping! >>> >>> Attached the diff against recent trunk. >>> >>> Cheers, >>> >>> Gabor >>> >>> On 10/21/10, Gabor Greif wrote: >>>> Hi all, >>>> >>>> the last weeks I've been working on a flexible infrastructure for >>>> peephole optimizations, which is potentially target independent and >>>> extensible without needing interface changes. >>>> >>>> The result of my work is attached. It moves all current ARM peepholes >>>> over to the new architecture and adds TSTrr-related optimizations too. >>>> >>>> The ordering and forward referencing of functions is still suboptimal, >>>> but this is only done to keep the patch size manageable. I plan to >>>> reorder in a cleanup commit after this patch has landed. Also some >>>> currently freestanding functions will become methods. >>>> >>>> You can also see the code in its entirety here: >>>> >>>> >>>> Feedback is welcome. >>>> >>>> Cheers, >>>> >>>> Gabor >>>> >>> >> >> > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From clchiou at gmail.com Wed Nov 17 02:08:49 2010 From: clchiou at gmail.com (Che-Liang Chiou) Date: Wed, 17 Nov 2010 08:08:49 -0000 Subject: [llvm-commits] [llvm] r119485 - in /llvm/trunk: lib/Object/ lib/Target/PTX/PTXAsmPrinter.cpp lib/Target/PTX/PTXInstrInfo.td test/CodeGen/PTX/add.ll test/CodeGen/PTX/exit.ll test/CodeGen/PTX/mov.ll test/CodeGen/PTX/ret.ll test/CodeGen/PTX/sub.ll Message-ID: <20101117080849.88E3C2A6C12C@llvm.org> Author: clchiou Date: Wed Nov 17 02:08:49 2010 New Revision: 119485 URL: http://llvm.org/viewvc/llvm-project?rev=119485&view=rev Log: Add simple arithmetics and %type directive for PTX Added: llvm/trunk/test/CodeGen/PTX/add.ll llvm/trunk/test/CodeGen/PTX/sub.ll Modified: llvm/trunk/lib/Object/ (props changed) llvm/trunk/lib/Target/PTX/PTXAsmPrinter.cpp llvm/trunk/lib/Target/PTX/PTXInstrInfo.td llvm/trunk/test/CodeGen/PTX/exit.ll llvm/trunk/test/CodeGen/PTX/mov.ll llvm/trunk/test/CodeGen/PTX/ret.ll Propchange: llvm/trunk/lib/Object/ ------------------------------------------------------------------------------ --- svn:ignore (added) +++ svn:ignore Wed Nov 17 02:08:49 2010 @@ -0,0 +1,9 @@ +Debug +Debug+Checks +Debug+Coverage +Debug+Coverage-Asserts +Release +Release-Asserts +Release+Coverage +Debug+Asserts +Release+Asserts Modified: llvm/trunk/lib/Target/PTX/PTXAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXAsmPrinter.cpp?rev=119485&r1=119484&r2=119485&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/PTX/PTXAsmPrinter.cpp Wed Nov 17 02:08:49 2010 @@ -64,14 +64,26 @@ static const char *getRegisterTypeName(unsigned RegNo){ #define TEST_REGCLS(cls, clsstr) \ if (PTX::cls ## RegisterClass->contains(RegNo)) return # clsstr; - TEST_REGCLS(RRegs32, .s32); - TEST_REGCLS(Preds, .pred); + TEST_REGCLS(RRegs32, s32); + TEST_REGCLS(Preds, pred); #undef TEST_REGCLS llvm_unreachable("Not in any register class!"); return NULL; } +static const char *getInstructionTypeName(const MachineInstr *MI) +{ + for (int i = 0, e = MI->getNumOperands(); i != e; ++i) { + const MachineOperand &MO = MI->getOperand(i); + if (MO.getType() == MachineOperand::MO_Register) + return getRegisterTypeName(MO.getReg()); + } + + llvm_unreachable("No reg operand found in instruction!"); + return NULL; +} + bool PTXAsmPrinter::runOnMachineFunction(MachineFunction &MF) { SetupMachineFunction(MF); EmitFunctionDeclaration(); @@ -89,7 +101,7 @@ i = MFI->localVarRegBegin(), e = MFI->localVarRegEnd(); i != e; ++ i) { unsigned reg = *i; - std::string def = "\t.reg "; + std::string def = "\t.reg ."; def += getRegisterTypeName(reg); def += ' '; def += getRegisterName(reg); @@ -99,11 +111,21 @@ } void PTXAsmPrinter::EmitInstruction(const MachineInstr *MI) { - SmallString<128> str; - raw_svector_ostream OS(str); + SmallString<128> sstr; + raw_svector_ostream OS(sstr); printInstruction(MI, OS); OS << ';'; - OutStreamer.EmitRawText(OS.str()); + + // Replace "%type" if found + StringRef strref = OS.str(); + size_t pos; + if ((pos = strref.find("%type")) == StringRef::npos) { + OutStreamer.EmitRawText(strref); + return; + } + std::string str = strref; + str.replace(pos, /*strlen("%type")==*/5, getInstructionTypeName(MI)); + OutStreamer.EmitRawText(StringRef(str)); } void PTXAsmPrinter::printOperand(const MachineInstr *MI, int opNum, @@ -141,7 +163,7 @@ // Print return register reg = MFI->retReg(); if (!isKernel && reg != PTX::NoRegister) { - decl += " (.reg "; // FIXME: could it return in .param space? + decl += " (.reg ."; // FIXME: could it return in .param space? decl += getRegisterTypeName(reg); decl += " "; decl += getRegisterName(reg); @@ -170,7 +192,7 @@ assert(reg != PTX::NoRegister && "Not a valid register!"); if (i != b) decl += ", "; - decl += ".reg "; + decl += ".reg ."; decl += getRegisterTypeName(reg); decl += " "; decl += getRegisterName(reg); Modified: llvm/trunk/lib/Target/PTX/PTXInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXInstrInfo.td?rev=119485&r1=119484&r2=119485&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXInstrInfo.td (original) +++ llvm/trunk/lib/Target/PTX/PTXInstrInfo.td Wed Nov 17 02:08:49 2010 @@ -27,9 +27,29 @@ : SDNode<"PTXISD::RET", SDTNone, [SDNPHasChain]>; //===----------------------------------------------------------------------===// +// Instruction Class Templates +//===----------------------------------------------------------------------===// + +multiclass INT3 { + def rr : InstPTX<(outs RRegs32:$d), + (ins RRegs32:$a, RRegs32:$b), + !strconcat(opcstr, ".%type\t$d, $a, $b"), + [(set RRegs32:$d, (opnode RRegs32:$a, RRegs32:$b))]>; + def ri : InstPTX<(outs RRegs32:$d), + (ins RRegs32:$a, i32imm:$b), + !strconcat(opcstr, ".%type\t$d, $a, $b"), + [(set RRegs32:$d, (opnode RRegs32:$a, imm:$b))]>; +} + +//===----------------------------------------------------------------------===// // Instructions //===----------------------------------------------------------------------===// +///===- Integer Arithmetic Instructions -----------------------------------===// + +defm ADD : INT3<"add", add>; +defm SUB : INT3<"sub", sub>; + ///===- Data Movement and Conversion Instructions -------------------------===// let neverHasSideEffects = 1 in { @@ -37,7 +57,7 @@ def MOVpp : InstPTX<(outs Preds:$d), (ins Preds:$a), "mov.pred\t$d, $a", []>; def MOVrr - : InstPTX<(outs RRegs32:$d), (ins RRegs32:$a), "mov.s32\t$d, $a", []>; + : InstPTX<(outs RRegs32:$d), (ins RRegs32:$a), "mov.%type\t$d, $a", []>; } let isReMaterializable = 1, isAsCheapAsAMove = 1 in { Added: llvm/trunk/test/CodeGen/PTX/add.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PTX/add.ll?rev=119485&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/PTX/add.ll (added) +++ llvm/trunk/test/CodeGen/PTX/add.ll Wed Nov 17 02:08:49 2010 @@ -0,0 +1,15 @@ +; RUN: llc < %s -march=ptx | FileCheck %s + +define ptx_device i32 @t1(i32 %x, i32 %y) { +; CHECK: add.s32 r0, r1, r2; + %z = add i32 %x, %y +; CHECK: ret; + ret i32 %z +} + +define ptx_device i32 @t2(i32 %x) { +; CHECK: add.s32 r0, r1, 1; + %z = add i32 %x, 1 +; CHECK: ret; + ret i32 %z +} Modified: llvm/trunk/test/CodeGen/PTX/exit.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PTX/exit.ll?rev=119485&r1=119484&r2=119485&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PTX/exit.ll (original) +++ llvm/trunk/test/CodeGen/PTX/exit.ll Wed Nov 17 02:08:49 2010 @@ -1,6 +1,7 @@ ; RUN: llc < %s -march=ptx | FileCheck %s define ptx_kernel void @t1() { -;CHECK: exit; +; CHECK: exit; +; CHECK-NOT: ret; ret void } Modified: llvm/trunk/test/CodeGen/PTX/mov.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PTX/mov.ll?rev=119485&r1=119484&r2=119485&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PTX/mov.ll (original) +++ llvm/trunk/test/CodeGen/PTX/mov.ll Wed Nov 17 02:08:49 2010 @@ -1,13 +1,13 @@ ; RUN: llc < %s -march=ptx | FileCheck %s define ptx_device i32 @t1() { -;CHECK: mov.s32 r0, 0; -;CHECK: ret; +; CHECK: mov.s32 r0, 0; +; CHECK: ret; ret i32 0 } define ptx_device i32 @t2(i32 %x) { -;CHECK: mov.s32 r0, r1; -;CHECK: ret; +; CHECK: mov.s32 r0, r1; +; CHECK: ret; ret i32 %x } Modified: llvm/trunk/test/CodeGen/PTX/ret.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PTX/ret.ll?rev=119485&r1=119484&r2=119485&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PTX/ret.ll (original) +++ llvm/trunk/test/CodeGen/PTX/ret.ll Wed Nov 17 02:08:49 2010 @@ -1,6 +1,7 @@ ; RUN: llc < %s -march=ptx | FileCheck %s define ptx_device void @t1() { -;CHECK: ret; +; CHECK: ret; +; CHECK-NOT: exit; ret void } Added: llvm/trunk/test/CodeGen/PTX/sub.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PTX/sub.ll?rev=119485&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/PTX/sub.ll (added) +++ llvm/trunk/test/CodeGen/PTX/sub.ll Wed Nov 17 02:08:49 2010 @@ -0,0 +1,15 @@ +; RUN: llc < %s -march=ptx | FileCheck %s + +define ptx_device i32 @t1(i32 %x, i32 %y) { +;CHECK: sub.s32 r0, r1, r2; + %z = sub i32 %x, %y +;CHECK: ret; + ret i32 %z +} + +define ptx_device i32 @t2(i32 %x) { +;CHECK: add.s32 r0, r1, -1; + %z = sub i32 %x, 1 +;CHECK: ret; + ret i32 %z +} From sabre at nondot.org Wed Nov 17 02:13:01 2010 From: sabre at nondot.org (Chris Lattner) Date: Wed, 17 Nov 2010 08:13:01 -0000 Subject: [llvm-commits] [llvm] r119486 - in /llvm/trunk: include/llvm/LLVMContext.h include/llvm/Support/SourceMgr.h lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp lib/Support/SourceMgr.cpp lib/VMCore/LLVMContext.cpp lib/VMCore/LLVMContextImpl.h Message-ID: <20101117081301.3F05B2A6C12C@llvm.org> Author: lattner Date: Wed Nov 17 02:13:01 2010 New Revision: 119486 URL: http://llvm.org/viewvc/llvm-project?rev=119486&view=rev Log: now that AsmPrinter::EmitInlineAsm is factored right, we can eliminate the cookie argument to the SourceMgr diagnostic stuff. This cleanly separates LLVMContext's inlineasm handler from the sourcemgr error handling definition, increasing type safety and cleaning things up. Modified: llvm/trunk/include/llvm/LLVMContext.h llvm/trunk/include/llvm/Support/SourceMgr.h llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp llvm/trunk/lib/Support/SourceMgr.cpp llvm/trunk/lib/VMCore/LLVMContext.cpp llvm/trunk/lib/VMCore/LLVMContextImpl.h Modified: llvm/trunk/include/llvm/LLVMContext.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/LLVMContext.h?rev=119486&r1=119485&r2=119486&view=diff ============================================================================== --- llvm/trunk/include/llvm/LLVMContext.h (original) +++ llvm/trunk/include/llvm/LLVMContext.h Wed Nov 17 02:13:01 2010 @@ -21,6 +21,7 @@ class StringRef; class Instruction; class Module; +class SMDiagnostic; template class SmallVectorImpl; /// This is an important class for using LLVM in a threaded context. It @@ -49,18 +50,23 @@ /// custom metadata IDs registered in this LLVMContext. void getMDKindNames(SmallVectorImpl &Result) const; + + typedef void (*InlineAsmDiagHandlerTy)(const SMDiagnostic&, void *Context, + unsigned LocCookie); + /// setInlineAsmDiagnosticHandler - This method sets a handler that is invoked /// when problems with inline asm are detected by the backend. The first - /// argument is a function pointer (of type SourceMgr::DiagHandlerTy) and the - /// second is a context pointer that gets passed into the DiagHandler. + /// argument is a function pointer and the second is a context pointer that + /// gets passed into the DiagHandler. /// - /// LLVMContext doesn't take ownership or interpreter either of these + /// LLVMContext doesn't take ownership or interpret either of these /// pointers. - void setInlineAsmDiagnosticHandler(void *DiagHandler, void *DiagContext = 0); + void setInlineAsmDiagnosticHandler(InlineAsmDiagHandlerTy DiagHandler, + void *DiagContext = 0); /// getInlineAsmDiagnosticHandler - Return the diagnostic handler set by /// setInlineAsmDiagnosticHandler. - void *getInlineAsmDiagnosticHandler() const; + InlineAsmDiagHandlerTy getInlineAsmDiagnosticHandler() const; /// getInlineAsmDiagnosticContext - Return the diagnostic context set by /// setInlineAsmDiagnosticHandler. Modified: llvm/trunk/include/llvm/Support/SourceMgr.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/SourceMgr.h?rev=119486&r1=119485&r2=119486&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/SourceMgr.h (original) +++ llvm/trunk/include/llvm/Support/SourceMgr.h Wed Nov 17 02:13:01 2010 @@ -36,8 +36,7 @@ /// DiagHandlerTy - Clients that want to handle their own diagnostics in a /// custom way can register a function pointer+context as a diagnostic /// handler. It gets called each time PrintMessage is invoked. - typedef void (*DiagHandlerTy)(const SMDiagnostic&, void *Context, - unsigned LocCookie); + typedef void (*DiagHandlerTy)(const SMDiagnostic&, void *Context); private: struct SrcBuffer { /// Buffer - The memory buffer for the file. @@ -61,7 +60,6 @@ DiagHandlerTy DiagHandler; void *DiagContext; - unsigned DiagLocCookie; SourceMgr(const SourceMgr&); // DO NOT IMPLEMENT void operator=(const SourceMgr&); // DO NOT IMPLEMENT @@ -74,12 +72,10 @@ } /// setDiagHandler - Specify a diagnostic handler to be invoked every time - /// PrintMessage is called. Ctx and Cookie are passed into the handler when - /// it is invoked. - void setDiagHandler(DiagHandlerTy DH, void *Ctx = 0, unsigned Cookie = 0) { + /// PrintMessage is called. Ctx is passed into the handler when it is invoked. + void setDiagHandler(DiagHandlerTy DH, void *Ctx = 0) { DiagHandler = DH; DiagContext = Ctx; - DiagLocCookie = Cookie; } const SrcBuffer &getBufferInfo(unsigned i) const { Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp?rev=119486&r1=119485&r2=119486&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp (original) +++ llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp Wed Nov 17 02:13:01 2010 @@ -37,7 +37,7 @@ namespace { struct SrcMgrDiagInfo { const MDNode *LocInfo; - void *DiagHandler; + LLVMContext::InlineAsmDiagHandlerTy DiagHandler; void *DiagContext; }; } @@ -45,8 +45,7 @@ /// SrcMgrDiagHandler - This callback is invoked when the SourceMgr for an /// inline asm has an error in it. diagInfo is a pointer to the SrcMgrDiagInfo /// struct above. -static void SrcMgrDiagHandler(const SMDiagnostic &Diag, void *diagInfo, - unsigned locCookie) { +static void SrcMgrDiagHandler(const SMDiagnostic &Diag, void *diagInfo) { SrcMgrDiagInfo *DiagInfo = static_cast(diagInfo); assert(DiagInfo && "Diagnostic context not passed down?"); @@ -56,10 +55,7 @@ if (const ConstantInt *CI = dyn_cast(LocInfo->getOperand(0))) LocCookie = CI->getZExtValue(); - SourceMgr::DiagHandlerTy ChainHandler = - (SourceMgr::DiagHandlerTy)(intptr_t)DiagInfo->DiagHandler; - - ChainHandler(Diag, DiagInfo->DiagContext, LocCookie); + DiagInfo->DiagHandler(Diag, DiagInfo->DiagContext, LocCookie); } /// EmitInlineAsm - Emit a blob of inline asm to the output streamer. @@ -85,11 +81,11 @@ // If the current LLVMContext has an inline asm handler, set it in SourceMgr. LLVMContext &LLVMCtx = MMI->getModule()->getContext(); bool HasDiagHandler = false; - if (void *DiagHandler = LLVMCtx.getInlineAsmDiagnosticHandler()) { + if (LLVMCtx.getInlineAsmDiagnosticHandler() != 0) { // If the source manager has an issue, we arrange for SrcMgrDiagHandler // to be invoked, getting DiagInfo passed into it. DiagInfo.LocInfo = LocMDNode; - DiagInfo.DiagHandler = DiagHandler; + DiagInfo.DiagHandler = LLVMCtx.getInlineAsmDiagnosticHandler(); DiagInfo.DiagContext = LLVMCtx.getInlineAsmDiagnosticContext(); SrcMgr.setDiagHandler(SrcMgrDiagHandler, &DiagInfo); HasDiagHandler = true; Modified: llvm/trunk/lib/Support/SourceMgr.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/SourceMgr.cpp?rev=119486&r1=119485&r2=119486&view=diff ============================================================================== --- llvm/trunk/lib/Support/SourceMgr.cpp (original) +++ llvm/trunk/lib/Support/SourceMgr.cpp Wed Nov 17 02:13:01 2010 @@ -178,8 +178,7 @@ const char *Type, bool ShowLine) const { // Report the message with the diagnostic handler if present. if (DiagHandler) { - DiagHandler(GetMessage(Loc, Msg, Type, ShowLine), - DiagContext, DiagLocCookie); + DiagHandler(GetMessage(Loc, Msg, Type, ShowLine), DiagContext); return; } Modified: llvm/trunk/lib/VMCore/LLVMContext.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/LLVMContext.cpp?rev=119486&r1=119485&r2=119486&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/LLVMContext.cpp (original) +++ llvm/trunk/lib/VMCore/LLVMContext.cpp Wed Nov 17 02:13:01 2010 @@ -53,15 +53,17 @@ // Recoverable Backend Errors //===----------------------------------------------------------------------===// -void LLVMContext::setInlineAsmDiagnosticHandler(void *DiagHandler, - void *DiagContext) { +void LLVMContext:: +setInlineAsmDiagnosticHandler(InlineAsmDiagHandlerTy DiagHandler, + void *DiagContext) { pImpl->InlineAsmDiagHandler = DiagHandler; pImpl->InlineAsmDiagContext = DiagContext; } /// getInlineAsmDiagnosticHandler - Return the diagnostic handler set by /// setInlineAsmDiagnosticHandler. -void *LLVMContext::getInlineAsmDiagnosticHandler() const { +LLVMContext::InlineAsmDiagHandlerTy +LLVMContext::getInlineAsmDiagnosticHandler() const { return pImpl->InlineAsmDiagHandler; } @@ -95,8 +97,7 @@ // If we do have an error handler, we can report the error and keep going. SMDiagnostic Diag("", "error: " + ErrorStr.str()); - ((SourceMgr::DiagHandlerTy)(intptr_t)pImpl->InlineAsmDiagHandler) - (Diag, pImpl->InlineAsmDiagContext, LocCookie); + pImpl->InlineAsmDiagHandler(Diag, pImpl->InlineAsmDiagContext, LocCookie); } Modified: llvm/trunk/lib/VMCore/LLVMContextImpl.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/LLVMContextImpl.h?rev=119486&r1=119485&r2=119486&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/LLVMContextImpl.h (original) +++ llvm/trunk/lib/VMCore/LLVMContextImpl.h Wed Nov 17 02:13:01 2010 @@ -119,7 +119,8 @@ /// will be automatically deleted if this context is deleted. SmallPtrSet OwnedModules; - void *InlineAsmDiagHandler, *InlineAsmDiagContext; + LLVMContext::InlineAsmDiagHandlerTy InlineAsmDiagHandler; + void *InlineAsmDiagContext; typedef DenseMap IntMapTy; From sabre at nondot.org Wed Nov 17 02:20:42 2010 From: sabre at nondot.org (Chris Lattner) Date: Wed, 17 Nov 2010 08:20:42 -0000 Subject: [llvm-commits] [llvm] r119488 - in /llvm/trunk: docs/LangRef.html lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp Message-ID: <20101117082043.262342A6C12C@llvm.org> Author: lattner Date: Wed Nov 17 02:20:42 2010 New Revision: 119488 URL: http://llvm.org/viewvc/llvm-project?rev=119488&view=rev Log: With the newly simplified SourceMgr interfaces and the generalized SrcMgrDiagHandler, we can improve clang diagnostics for inline asm: instead of reporting them on a source line of the original line, we can report it on the correct line wherever the string literal came from. For something like this: void foo() { asm("push %rax\n" ".code32\n"); } we used to get this: (note that the line in t.c isn't helpful) t.c:4:7: error: warning: ignoring directive for now asm("push %rax\n" ^ :2:1: note: instantiated into assembly here .code32 ^ now we get: t.c:5:8: error: warning: ignoring directive for now ".code32\n" ^ :2:1: note: instantiated into assembly here .code32 ^ Note that we're pointing to line 5 properly now. Modified: llvm/trunk/docs/LangRef.html llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp Modified: llvm/trunk/docs/LangRef.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/LangRef.html?rev=119488&r1=119487&r2=119488&view=diff ============================================================================== --- llvm/trunk/docs/LangRef.html (original) +++ llvm/trunk/docs/LangRef.html Wed Nov 17 02:20:42 2010 @@ -2625,8 +2625,8 @@

The call instructions that wrap inline asm nodes may have a "!srcloc" MDNode - attached to it that contains a constant integer. If present, the code - generator will use the integer as the location cookie value when report + attached to it that contains a list of constant integers. If present, the + code generator will use the integer as the location cookie value when report errors through the LLVMContext error reporting mechanisms. This allows a front-end to correlate backend errors that occur with inline asm back to the source code that produced it. For example:

@@ -2638,7 +2638,8 @@

It is up to the front-end to make sense of the magic numbers it places in the - IR.

+ IR. If the MDNode contains multiple constants, the code generator will use + the one that corresponds to the line of the asm that the error occurs on.

Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp?rev=119488&r1=119487&r2=119488&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp (original) +++ llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp Wed Nov 17 02:20:42 2010 @@ -49,11 +49,19 @@ SrcMgrDiagInfo *DiagInfo = static_cast(diagInfo); assert(DiagInfo && "Diagnostic context not passed down?"); + // If the inline asm had metadata associated with it, pull out a location + // cookie corresponding to which line the error occurred on. unsigned LocCookie = 0; - if (const MDNode *LocInfo = DiagInfo->LocInfo) - if (LocInfo->getNumOperands() > 0) - if (const ConstantInt *CI = dyn_cast(LocInfo->getOperand(0))) + if (const MDNode *LocInfo = DiagInfo->LocInfo) { + unsigned ErrorLine = Diag.getLineNo()-1; + if (ErrorLine >= LocInfo->getNumOperands()) + ErrorLine = 0; + + if (LocInfo->getNumOperands() != 0) + if (const ConstantInt *CI = + dyn_cast(LocInfo->getOperand(ErrorLine))) LocCookie = CI->getZExtValue(); + } DiagInfo->DiagHandler(Diag, DiagInfo->DiagContext, LocCookie); } From baldrick at free.fr Wed Nov 17 02:35:29 2010 From: baldrick at free.fr (Duncan Sands) Date: Wed, 17 Nov 2010 08:35:29 -0000 Subject: [llvm-commits] [llvm] r119490 - in /llvm/trunk: include/llvm/Analysis/InstructionSimplify.h lib/Analysis/InstructionSimplify.cpp lib/Analysis/Lint.cpp Message-ID: <20101117083529.7324F2A6C12E@llvm.org> Author: baldrick Date: Wed Nov 17 02:35:29 2010 New Revision: 119490 URL: http://llvm.org/viewvc/llvm-project?rev=119490&view=rev Log: Previously SimplifyInstruction could report that an instruction simplified to itself (this can only happen in unreachable blocks). Change it to return null instead. Hopefully this will fix some buildbot failures. Modified: llvm/trunk/include/llvm/Analysis/InstructionSimplify.h llvm/trunk/lib/Analysis/InstructionSimplify.cpp llvm/trunk/lib/Analysis/Lint.cpp Modified: llvm/trunk/include/llvm/Analysis/InstructionSimplify.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/InstructionSimplify.h?rev=119490&r1=119489&r2=119490&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/InstructionSimplify.h (original) +++ llvm/trunk/include/llvm/Analysis/InstructionSimplify.h Wed Nov 17 02:35:29 2010 @@ -75,8 +75,6 @@ /// SimplifyInstruction - See if we can compute a simplified version of this /// instruction. If not, this returns null. - /// WARNING: If called on unreachable code, an instruction may be reported - /// to simplify to itself. Value *SimplifyInstruction(Instruction *I, const TargetData *TD = 0, const DominatorTree *DT = 0); Modified: llvm/trunk/lib/Analysis/InstructionSimplify.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/InstructionSimplify.cpp?rev=119490&r1=119489&r2=119490&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/InstructionSimplify.cpp (original) +++ llvm/trunk/lib/Analysis/InstructionSimplify.cpp Wed Nov 17 02:35:29 2010 @@ -756,34 +756,50 @@ /// instruction. If not, this returns null. Value *llvm::SimplifyInstruction(Instruction *I, const TargetData *TD, const DominatorTree *DT) { + Value *Result; + switch (I->getOpcode()) { default: - return ConstantFoldInstruction(I, TD); + Result = ConstantFoldInstruction(I, TD); + break; case Instruction::Add: - return SimplifyAddInst(I->getOperand(0), I->getOperand(1), - cast(I)->hasNoSignedWrap(), - cast(I)->hasNoUnsignedWrap(), - TD, DT); + Result = SimplifyAddInst(I->getOperand(0), I->getOperand(1), + cast(I)->hasNoSignedWrap(), + cast(I)->hasNoUnsignedWrap(), + TD, DT); + break; case Instruction::And: - return SimplifyAndInst(I->getOperand(0), I->getOperand(1), TD, DT); + Result = SimplifyAndInst(I->getOperand(0), I->getOperand(1), TD, DT); + break; case Instruction::Or: - return SimplifyOrInst(I->getOperand(0), I->getOperand(1), TD, DT); + Result = SimplifyOrInst(I->getOperand(0), I->getOperand(1), TD, DT); + break; case Instruction::ICmp: - return SimplifyICmpInst(cast(I)->getPredicate(), - I->getOperand(0), I->getOperand(1), TD, DT); + Result = SimplifyICmpInst(cast(I)->getPredicate(), + I->getOperand(0), I->getOperand(1), TD, DT); + break; case Instruction::FCmp: - return SimplifyFCmpInst(cast(I)->getPredicate(), - I->getOperand(0), I->getOperand(1), TD, DT); + Result = SimplifyFCmpInst(cast(I)->getPredicate(), + I->getOperand(0), I->getOperand(1), TD, DT); + break; case Instruction::Select: - return SimplifySelectInst(I->getOperand(0), I->getOperand(1), - I->getOperand(2), TD, DT); + Result = SimplifySelectInst(I->getOperand(0), I->getOperand(1), + I->getOperand(2), TD, DT); + break; case Instruction::GetElementPtr: { SmallVector Ops(I->op_begin(), I->op_end()); - return SimplifyGEPInst(&Ops[0], Ops.size(), TD, DT); + Result = SimplifyGEPInst(&Ops[0], Ops.size(), TD, DT); + break; } case Instruction::PHI: - return SimplifyPHINode(cast(I), DT); + Result = SimplifyPHINode(cast(I), DT); + break; } + + /// If called on unreachable code, the above logic may report that the + /// instruction simplified to itself. Make life easier for users by + /// detecting that case here, returning null if it occurs. + return Result == I ? 0 : Result; } /// ReplaceAndSimplifyAllUses - Perform From->replaceAllUsesWith(To) and then Modified: llvm/trunk/lib/Analysis/Lint.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/Lint.cpp?rev=119490&r1=119489&r2=119490&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/Lint.cpp (original) +++ llvm/trunk/lib/Analysis/Lint.cpp Wed Nov 17 02:35:29 2010 @@ -616,8 +616,7 @@ // As a last resort, try SimplifyInstruction or constant folding. if (Instruction *Inst = dyn_cast(V)) { if (Value *W = SimplifyInstruction(Inst, TD, DT)) - if (W != Inst) - return findValueImpl(W, OffsetOk, Visited); + return findValueImpl(W, OffsetOk, Visited); } else if (ConstantExpr *CE = dyn_cast(V)) { if (Value *W = ConstantFoldConstantExpression(CE, TD)) if (W != V) From evan.cheng at apple.com Wed Nov 17 03:31:04 2010 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 17 Nov 2010 09:31:04 -0000 Subject: [llvm-commits] [llvm] r119492 - /llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Message-ID: <20101117093104.40A072A6C12C@llvm.org> Author: evancheng Date: Wed Nov 17 03:31:04 2010 New Revision: 119492 URL: http://llvm.org/viewvc/llvm-project?rev=119492&view=rev Log: Revert r119109 for now. It's breaking 176.gcc. Modified: llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Modified: llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp?rev=119492&r1=119491&r2=119492&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Wed Nov 17 03:31:04 2010 @@ -1555,14 +1555,6 @@ return true; } -static MachineMemOperand *CopyMMO(const MachineMemOperand *MMO, - unsigned NewSize, MachineFunction *MF) { - return MF->getMachineMemOperand(MachinePointerInfo(MMO->getValue(), - MMO->getOffset()), - MMO->getFlags(), NewSize, - MMO->getAlignment(), MMO->getTBAAInfo()); -} - bool ARMPreAllocLoadStoreOpt::RescheduleOps(MachineBasicBlock *MBB, SmallVector &Ops, unsigned Base, bool isLd, @@ -1670,11 +1662,6 @@ if (!isT2) MIB.addReg(0); MIB.addImm(Offset).addImm(Pred).addReg(PredReg); - - // Copy memoperands bug change size to 8. - for (MachineInstr::mmo_iterator mmo = Op0->memoperands_begin(); - mmo != Op0->memoperands_end(); ++mmo) - MIB.addMemOperand(CopyMMO(*mmo, 8, MF)); ++NumLDRDFormed; } else { MachineInstrBuilder MIB = BuildMI(*MBB, InsertPos, @@ -1688,10 +1675,6 @@ if (!isT2) MIB.addReg(0); MIB.addImm(Offset).addImm(Pred).addReg(PredReg); - // Copy memoperands bug change size to 8. - for (MachineInstr::mmo_iterator mmo = Op0->memoperands_begin(); - mmo != Op0->memoperands_end(); ++mmo) - MIB.addMemOperand(CopyMMO(*mmo, 8, MF)); ++NumSTRDFormed; } MBB->erase(Op0); From fvbommel at gmail.com Wed Nov 17 04:14:40 2010 From: fvbommel at gmail.com (Frits van Bommel) Date: Wed, 17 Nov 2010 11:14:40 +0100 Subject: [llvm-commits] [www] r119473 - in /www/trunk/devmtg/2010-11: Collingbourne-SymbolicCrossChecking.pdf Golin-EDGToLLVM.pdf Gritz-OpenShadingLang.pdf Muller-Crack.pdf Naumann-Cling.pdf Rotem-CToVerilog.pdf Sehr-NativeClient.pdf Silverstein-IncludeWh Message-ID: On Wed, Nov 17, 2010 at 7:55 AM, Tanya Lattner wrote: > Author: tbrethou > Date: Wed Nov 17 00:55:48 2010 > New Revision: 119473 > > URL: http://llvm.org/viewvc/llvm-project?rev=119473&view=rev > Log: > Add some developer meeting slides. Maybe you should also add links to these from the site? (ditto for r119478) From baldrick at free.fr Wed Nov 17 04:23:23 2010 From: baldrick at free.fr (Duncan Sands) Date: Wed, 17 Nov 2010 10:23:23 -0000 Subject: [llvm-commits] [llvm] r119493 - in /llvm/trunk/lib: Analysis/Lint.cpp VMCore/BasicBlock.cpp Message-ID: <20101117102323.42FDA2A6C12C@llvm.org> Author: baldrick Date: Wed Nov 17 04:23:23 2010 New Revision: 119493 URL: http://llvm.org/viewvc/llvm-project?rev=119493&view=rev Log: Now that hasConstantValue has been made simpler, it may return the phi node itself if it occurs in an unreachable basic block. Protect against this. Hopefully this will fix some more buildbots. Modified: llvm/trunk/lib/Analysis/Lint.cpp llvm/trunk/lib/VMCore/BasicBlock.cpp Modified: llvm/trunk/lib/Analysis/Lint.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/Lint.cpp?rev=119493&r1=119492&r2=119493&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/Lint.cpp (original) +++ llvm/trunk/lib/Analysis/Lint.cpp Wed Nov 17 04:23:23 2010 @@ -583,7 +583,8 @@ } } else if (PHINode *PN = dyn_cast(V)) { if (Value *W = PN->hasConstantValue()) - return findValueImpl(W, OffsetOk, Visited); + if (W != V) + return findValueImpl(W, OffsetOk, Visited); } else if (CastInst *CI = dyn_cast(V)) { if (CI->isNoopCast(TD ? TD->getIntPtrType(V->getContext()) : Type::getInt64Ty(V->getContext()))) Modified: llvm/trunk/lib/VMCore/BasicBlock.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/BasicBlock.cpp?rev=119493&r1=119492&r2=119493&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/BasicBlock.cpp (original) +++ llvm/trunk/lib/VMCore/BasicBlock.cpp Wed Nov 17 04:23:23 2010 @@ -248,10 +248,11 @@ // If all incoming values to the Phi are the same, we can replace the Phi // with that value. Value* PNV = 0; - if (!DontDeleteUselessPHIs && (PNV = PN->hasConstantValue())) { - PN->replaceAllUsesWith(PNV); - PN->eraseFromParent(); - } + if (!DontDeleteUselessPHIs && (PNV = PN->hasConstantValue())) + if (PNV != PN) { + PN->replaceAllUsesWith(PNV); + PN->eraseFromParent(); + } } } } From baldrick at free.fr Wed Nov 17 05:16:23 2010 From: baldrick at free.fr (Duncan Sands) Date: Wed, 17 Nov 2010 11:16:23 -0000 Subject: [llvm-commits] [llvm] r119494 - /llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp Message-ID: <20101117111623.2EC6E2A6C12C@llvm.org> Author: baldrick Date: Wed Nov 17 05:16:23 2010 New Revision: 119494 URL: http://llvm.org/viewvc/llvm-project?rev=119494&view=rev Log: Have InlineFunction use SimplifyInstruction rather than hasConstantValue. I was leery of using SimplifyInstruction while the IR was still in a half-baked state, which is the reason for delaying the simplification until the IR is fully cooked. Modified: llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp Modified: llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp?rev=119494&r1=119493&r2=119494&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp Wed Nov 17 05:16:23 2010 @@ -22,6 +22,7 @@ #include "llvm/Attributes.h" #include "llvm/Analysis/CallGraph.h" #include "llvm/Analysis/DebugInfo.h" +#include "llvm/Analysis/InstructionSimplify.h" #include "llvm/Target/TargetData.h" #include "llvm/ADT/SmallVector.h" #include "llvm/ADT/StringExtras.h" @@ -579,10 +580,10 @@ // any users of the original call/invoke instruction. const Type *RTy = CalledFunc->getReturnType(); + PHINode *PHI = 0; if (Returns.size() > 1) { // The PHI node should go at the front of the new basic block to merge all // possible incoming values. - PHINode *PHI = 0; if (!TheCall->use_empty()) { PHI = PHINode::Create(RTy, TheCall->getName(), AfterCallBB->begin()); @@ -600,14 +601,6 @@ "Ret value not consistent in function!"); PHI->addIncoming(RI->getReturnValue(), RI->getParent()); } - - // Now that we inserted the PHI, check to see if it has a single value - // (e.g. all the entries are the same or undef). If so, remove the PHI so - // it doesn't block other optimizations. - if (Value *V = PHI->hasConstantValue()) { - PHI->replaceAllUsesWith(V); - PHI->eraseFromParent(); - } } @@ -664,5 +657,14 @@ // Now we can remove the CalleeEntry block, which is now empty. Caller->getBasicBlockList().erase(CalleeEntry); + // If we inserted a phi node, check to see if it has a single value (e.g. all + // the entries are the same or undef). If so, remove the PHI so it doesn't + // block other optimizations. + if (PHI) + if (Value *V = SimplifyInstruction(PHI, IFI.TD)) { + PHI->replaceAllUsesWith(V); + PHI->eraseFromParent(); + } + return true; } From rafael.espindola at gmail.com Wed Nov 17 10:00:09 2010 From: rafael.espindola at gmail.com (=?UTF-8?Q?Rafael_Esp=C3=ADndola?=) Date: Wed, 17 Nov 2010 11:00:09 -0500 Subject: [llvm-commits] [PATCH] PERF: Reuse data fragments while lowering In-Reply-To: References: Message-ID: On 16 November 2010 17:24, David Meyer wrote: > Hi Dan & Rafael, > This patch makes it possible to re-use existing data fragments when lowering > (instead of creating new ones). + /// \brief Update the layout to coalesce Src into Dst. + void CoalesceFragments(MCFragment *Src, MCFragment *Dst); Add a note that the actual contents are not copied. + if (isFragmentUpToDate(Src)) { + if (LastValidFragment == Src) + LastValidFragment = Dst; + Dst->EffectiveSize += Src->EffectiveSize; + } else { + // We don't know the effective size of Src, so we have to invalidate Dst. + UpdateForSlide(Dst, 0); + } You have to invalidate Dst in any case, no? Adding something to the fragment will cause the addresses in fragment following it to change. This probably works in the current case since we are scanning the fragments in order. Is it too expensive to just call UpdateForSlide for both cases? + // Since we may have removed fragments, fix the layout order. + it2->setLayoutOrder(FragmentIndex++) merged would probably be a better description. + it2 = CurDF; Setting an iterator in this for loop is a bit strange. Would you mind removing the ++it2 so that we have a if (...) it2 = CurDF; else ++it2; That way all the iterator updates are close to each other. > - David Meyer Thanks a lot for working on this. Hopefully it will close some of the performance gap of "llc -filetype=obj" X "llc && llvm-mc". Cheers, Rafael From daniel at zuster.org Wed Nov 17 10:06:37 2010 From: daniel at zuster.org (Daniel Dunbar) Date: Wed, 17 Nov 2010 16:06:37 -0000 Subject: [llvm-commits] [llvm] r119508 - in /llvm/trunk: include/llvm/ExecutionEngine/ExecutionEngine.h lib/ExecutionEngine/ExecutionEngine.cpp tools/lli/lli.cpp Message-ID: <20101117160637.A214C2A6C12C@llvm.org> Author: ddunbar Date: Wed Nov 17 10:06:37 2010 New Revision: 119508 URL: http://llvm.org/viewvc/llvm-project?rev=119508&view=rev Log: lli: Add stub -use-mcjit option, which doesn't currently do anything. Modified: llvm/trunk/include/llvm/ExecutionEngine/ExecutionEngine.h llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp llvm/trunk/tools/lli/lli.cpp Modified: llvm/trunk/include/llvm/ExecutionEngine/ExecutionEngine.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ExecutionEngine/ExecutionEngine.h?rev=119508&r1=119507&r2=119508&view=diff ============================================================================== --- llvm/trunk/include/llvm/ExecutionEngine/ExecutionEngine.h (original) +++ llvm/trunk/include/llvm/ExecutionEngine/ExecutionEngine.h Wed Nov 17 10:06:37 2010 @@ -126,8 +126,8 @@ virtual char *getMemoryForGV(const GlobalVariable *GV); // To avoid having libexecutionengine depend on the JIT and interpreter - // libraries, the JIT and Interpreter set these functions to ctor pointers at - // startup time if they are linked in. + // libraries, the execution engine implementations set these functions to ctor + // pointers at startup time if they are linked in. static ExecutionEngine *(*JITCtor)( Module *M, std::string *ErrorStr, @@ -138,6 +138,16 @@ StringRef MArch, StringRef MCPU, const SmallVectorImpl& MAttrs); + static ExecutionEngine *(*MCJITCtor)( + Module *M, + std::string *ErrorStr, + JITMemoryManager *JMM, + CodeGenOpt::Level OptLevel, + bool GVsWithCode, + CodeModel::Model CMM, + StringRef MArch, + StringRef MCPU, + const SmallVectorImpl& MAttrs); static ExecutionEngine *(*InterpCtor)(Module *M, std::string *ErrorStr); @@ -447,6 +457,7 @@ std::string MArch; std::string MCPU; SmallVector MAttrs; + bool UseMCJIT; /// InitEngine - Does the common initialization of default options. void InitEngine() { @@ -456,6 +467,7 @@ JMM = NULL; AllocateGVsWithCode = false; CMModel = CodeModel::Default; + UseMCJIT = false; } public: @@ -526,6 +538,12 @@ return *this; } + /// setUseMCJIT - Set whether the MC-JIT implementation should be used + /// (experimental). + void setUseMCJIT(bool Value) { + UseMCJIT = Value; + } + /// setMAttrs - Set cpu-specific attributes. template EngineBuilder &setMAttrs(const StringSequence &mattrs) { Modified: llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp?rev=119508&r1=119507&r2=119508&view=diff ============================================================================== --- llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp (original) +++ llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp Wed Nov 17 10:06:37 2010 @@ -46,6 +46,16 @@ StringRef MArch, StringRef MCPU, const SmallVectorImpl& MAttrs) = 0; +ExecutionEngine *(*ExecutionEngine::MCJITCtor)( + Module *M, + std::string *ErrorStr, + JITMemoryManager *JMM, + CodeGenOpt::Level OptLevel, + bool GVsWithCode, + CodeModel::Model CMM, + StringRef MArch, + StringRef MCPU, + const SmallVectorImpl& MAttrs) = 0; ExecutionEngine *(*ExecutionEngine::InterpCtor)(Module *M, std::string *ErrorStr) = 0; @@ -430,7 +440,13 @@ // Unless the interpreter was explicitly selected or the JIT is not linked, // try making a JIT. if (WhichEngine & EngineKind::JIT) { - if (ExecutionEngine::JITCtor) { + if (UseMCJIT && ExecutionEngine::MCJITCtor) { + ExecutionEngine *EE = + ExecutionEngine::MCJITCtor(M, ErrorStr, JMM, OptLevel, + AllocateGVsWithCode, CMModel, + MArch, MCPU, MAttrs); + if (EE) return EE; + } else if (ExecutionEngine::JITCtor) { ExecutionEngine *EE = ExecutionEngine::JITCtor(M, ErrorStr, JMM, OptLevel, AllocateGVsWithCode, CMModel, Modified: llvm/trunk/tools/lli/lli.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lli/lli.cpp?rev=119508&r1=119507&r2=119508&view=diff ============================================================================== --- llvm/trunk/tools/lli/lli.cpp (original) +++ llvm/trunk/tools/lli/lli.cpp Wed Nov 17 10:06:37 2010 @@ -55,6 +55,10 @@ cl::desc("Force interpretation: disable JIT"), cl::init(false)); + cl::opt UseMCJIT( + "use-mcjit", cl::desc("Enable use of the MC-based JIT (if available)"), + cl::init(false)); + // Determine optimization level. cl::opt OptLevel("O", @@ -167,6 +171,10 @@ if (!TargetTriple.empty()) Mod->setTargetTriple(Triple::normalize(TargetTriple)); + // Enable MCJIT, if desired. + if (UseMCJIT) + builder.setUseMCJIT(true); + CodeGenOpt::Level OLvl = CodeGenOpt::Default; switch (OptLevel) { default: From daniel at zuster.org Wed Nov 17 10:06:43 2010 From: daniel at zuster.org (Daniel Dunbar) Date: Wed, 17 Nov 2010 16:06:43 -0000 Subject: [llvm-commits] [llvm] r119509 - in /llvm/trunk: include/llvm/ExecutionEngine/MCJIT.h lib/ExecutionEngine/MCJIT/ lib/ExecutionEngine/MCJIT/CMakeLists.txt lib/ExecutionEngine/MCJIT/MCJIT.cpp lib/ExecutionEngine/MCJIT/MCJIT.h lib/ExecutionEngine/MCJIT/Makefile lib/ExecutionEngine/MCJIT/TargetSelect.cpp lib/ExecutionEngine/Makefile tools/lli/Makefile tools/lli/lli.cpp Message-ID: <20101117160643.DF4352A6C12D@llvm.org> Author: ddunbar Date: Wed Nov 17 10:06:43 2010 New Revision: 119509 URL: http://llvm.org/viewvc/llvm-project?rev=119509&view=rev Log: MCJIT: Stub out MCJIT implementation, still doesn't do anything useful. Added: llvm/trunk/include/llvm/ExecutionEngine/MCJIT.h llvm/trunk/lib/ExecutionEngine/MCJIT/ llvm/trunk/lib/ExecutionEngine/MCJIT/CMakeLists.txt llvm/trunk/lib/ExecutionEngine/MCJIT/MCJIT.cpp llvm/trunk/lib/ExecutionEngine/MCJIT/MCJIT.h llvm/trunk/lib/ExecutionEngine/MCJIT/Makefile - copied, changed from r119508, llvm/trunk/lib/ExecutionEngine/Makefile llvm/trunk/lib/ExecutionEngine/MCJIT/TargetSelect.cpp Modified: llvm/trunk/lib/ExecutionEngine/Makefile llvm/trunk/tools/lli/Makefile llvm/trunk/tools/lli/lli.cpp Added: llvm/trunk/include/llvm/ExecutionEngine/MCJIT.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ExecutionEngine/MCJIT.h?rev=119509&view=auto ============================================================================== --- llvm/trunk/include/llvm/ExecutionEngine/MCJIT.h (added) +++ llvm/trunk/include/llvm/ExecutionEngine/MCJIT.h Wed Nov 17 10:06:43 2010 @@ -0,0 +1,38 @@ +//===-- MCJIT.h - MC-Based Just-In-Time Execution Engine --------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file forces the MCJIT to link in on certain operating systems. +// (Windows). +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_EXECUTION_ENGINE_MCJIT_H +#define LLVM_EXECUTION_ENGINE_MCJIT_H + +#include "llvm/ExecutionEngine/ExecutionEngine.h" +#include + +extern "C" void LLVMLinkInMCJIT(); + +namespace { + struct ForceMCJITLinking { + ForceMCJITLinking() { + // We must reference the passes in such a way that compilers will not + // delete it all as dead code, even with whole program optimization, + // yet is effectively a NO-OP. As the compiler isn't smart enough + // to know that getenv() never returns -1, this will do the job. + if (std::getenv("bar") != (char*) -1) + return; + + LLVMLinkInMCJIT(); + } + } ForceMCJITLinking; +} + +#endif Added: llvm/trunk/lib/ExecutionEngine/MCJIT/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/MCJIT/CMakeLists.txt?rev=119509&view=auto ============================================================================== --- llvm/trunk/lib/ExecutionEngine/MCJIT/CMakeLists.txt (added) +++ llvm/trunk/lib/ExecutionEngine/MCJIT/CMakeLists.txt Wed Nov 17 10:06:43 2010 @@ -0,0 +1,4 @@ +add_llvm_library(LLVMMCJIT + MCJIT.cpp + TargetSelect.cpp + ) Added: llvm/trunk/lib/ExecutionEngine/MCJIT/MCJIT.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/MCJIT/MCJIT.cpp?rev=119509&view=auto ============================================================================== --- llvm/trunk/lib/ExecutionEngine/MCJIT/MCJIT.cpp (added) +++ llvm/trunk/lib/ExecutionEngine/MCJIT/MCJIT.cpp Wed Nov 17 10:06:43 2010 @@ -0,0 +1,92 @@ +//===-- JIT.cpp - MC-based Just-in-Time Compiler --------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "MCJIT.h" +#include "llvm/ExecutionEngine/GenericValue.h" +#include "llvm/ExecutionEngine/MCJIT.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/System/DynamicLibrary.h" + +using namespace llvm; + +namespace { + +static struct RegisterJIT { + RegisterJIT() { MCJIT::Register(); } +} JITRegistrator; + +} + +extern "C" void LLVMLinkInMCJIT() { +} + +ExecutionEngine *MCJIT::createJIT(Module *M, + std::string *ErrorStr, + JITMemoryManager *JMM, + CodeGenOpt::Level OptLevel, + bool GVsWithCode, + CodeModel::Model CMM, + StringRef MArch, + StringRef MCPU, + const SmallVectorImpl& MAttrs) { + // Try to register the program as a source of symbols to resolve against. + // + // FIXME: Don't do this here. + sys::DynamicLibrary::LoadLibraryPermanently(0, NULL); + + // Pick a target either via -march or by guessing the native arch. + // + // FIXME: This should be lifted out of here, it isn't something which should + // be part of the JIT policy, rather the burden for this selection should be + // pushed to clients. + TargetMachine *TM = MCJIT::selectTarget(M, MArch, MCPU, MAttrs, ErrorStr); + if (!TM || (ErrorStr && ErrorStr->length() > 0)) return 0; + TM->setCodeModel(CMM); + + // If the target supports JIT code generation, create the JIT. + if (TargetJITInfo *TJ = TM->getJITInfo()) + return new MCJIT(M, *TM, *TJ, JMM, OptLevel, GVsWithCode); + + if (ErrorStr) + *ErrorStr = "target does not support JIT code generation"; + return 0; +} + +MCJIT::MCJIT(Module *M, TargetMachine &tm, TargetJITInfo &tji, + JITMemoryManager *JMM, CodeGenOpt::Level OptLevel, + bool AllocateGVsWithCode) + : ExecutionEngine(M) { +} + +MCJIT::~MCJIT() { +} + +void *MCJIT::getPointerToBasicBlock(BasicBlock *BB) { + report_fatal_error("not yet implemented"); + return 0; +} + +void *MCJIT::getPointerToFunction(Function *F) { + report_fatal_error("not yet implemented"); + return 0; +} + +void *MCJIT::recompileAndRelinkFunction(Function *F) { + report_fatal_error("not yet implemented"); +} + +void MCJIT::freeMachineCodeForFunction(Function *F) { + report_fatal_error("not yet implemented"); +} + +GenericValue MCJIT::runFunction(Function *F, + const std::vector &ArgValues) { + report_fatal_error("not yet implemented"); + return GenericValue(); +} Added: llvm/trunk/lib/ExecutionEngine/MCJIT/MCJIT.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/MCJIT/MCJIT.h?rev=119509&view=auto ============================================================================== --- llvm/trunk/lib/ExecutionEngine/MCJIT/MCJIT.h (added) +++ llvm/trunk/lib/ExecutionEngine/MCJIT/MCJIT.h Wed Nov 17 10:06:43 2010 @@ -0,0 +1,68 @@ +//===-- MCJIT.h - Class definition for the MCJIT ----------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LIB_EXECUTIONENGINE_MCJIT_H +#define LLVM_LIB_EXECUTIONENGINE_MCJIT_H + +#include "llvm/ExecutionEngine/ExecutionEngine.h" + +namespace llvm { + +class MCJIT : public ExecutionEngine { + MCJIT(Module *M, TargetMachine &tm, TargetJITInfo &tji, + JITMemoryManager *JMM, CodeGenOpt::Level OptLevel, + bool AllocateGVsWithCode); +public: + ~MCJIT(); + + /// @name ExecutionEngine interface implementation + /// @{ + + virtual void *getPointerToBasicBlock(BasicBlock *BB); + + virtual void *getPointerToFunction(Function *F); + + virtual void *recompileAndRelinkFunction(Function *F); + + virtual void freeMachineCodeForFunction(Function *F); + + virtual GenericValue runFunction(Function *F, + const std::vector &ArgValues); + + /// @} + /// @name (Private) Registration Interfaces + /// @{ + + static void Register() { + MCJITCtor = createJIT; + } + + // FIXME: This routine is scheduled for termination. Do not use it. + static TargetMachine *selectTarget(Module *M, + StringRef MArch, + StringRef MCPU, + const SmallVectorImpl& MAttrs, + std::string *Err); + + static ExecutionEngine *createJIT(Module *M, + std::string *ErrorStr, + JITMemoryManager *JMM, + CodeGenOpt::Level OptLevel, + bool GVsWithCode, + CodeModel::Model CMM, + StringRef MArch, + StringRef MCPU, + const SmallVectorImpl& MAttrs); + + // @} +}; + +} // End llvm namespace + +#endif Copied: llvm/trunk/lib/ExecutionEngine/MCJIT/Makefile (from r119508, llvm/trunk/lib/ExecutionEngine/Makefile) URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/MCJIT/Makefile?p2=llvm/trunk/lib/ExecutionEngine/MCJIT/Makefile&p1=llvm/trunk/lib/ExecutionEngine/Makefile&r1=119508&r2=119509&rev=119509&view=diff ============================================================================== --- llvm/trunk/lib/ExecutionEngine/Makefile (original) +++ llvm/trunk/lib/ExecutionEngine/MCJIT/Makefile Wed Nov 17 10:06:43 2010 @@ -1,4 +1,4 @@ -##===- lib/ExecutionEngine/Makefile ------------------------*- Makefile -*-===## +##===- lib/ExecutionEngine/MCJIT/Makefile ------------------*- Makefile -*-===## # # The LLVM Compiler Infrastructure # @@ -6,8 +6,8 @@ # License. See LICENSE.TXT for details. # ##===----------------------------------------------------------------------===## -LEVEL = ../.. -LIBRARYNAME = LLVMExecutionEngine -PARALLEL_DIRS = Interpreter JIT + +LEVEL = ../../.. +LIBRARYNAME = LLVMMCJIT include $(LEVEL)/Makefile.common Added: llvm/trunk/lib/ExecutionEngine/MCJIT/TargetSelect.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/MCJIT/TargetSelect.cpp?rev=119509&view=auto ============================================================================== --- llvm/trunk/lib/ExecutionEngine/MCJIT/TargetSelect.cpp (added) +++ llvm/trunk/lib/ExecutionEngine/MCJIT/TargetSelect.cpp Wed Nov 17 10:06:43 2010 @@ -0,0 +1,91 @@ +//===-- TargetSelect.cpp - Target Chooser Code ----------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This just asks the TargetRegistry for the appropriate JIT to use, and allows +// the user to specify a specific one on the commandline with -march=x. Clients +// should initialize targets prior to calling createJIT. +// +//===----------------------------------------------------------------------===// + +#include "MCJIT.h" +#include "llvm/Module.h" +#include "llvm/ADT/Triple.h" +#include "llvm/Support/CommandLine.h" +#include "llvm/Support/raw_ostream.h" +#include "llvm/System/Host.h" +#include "llvm/Target/SubtargetFeature.h" +#include "llvm/Target/TargetMachine.h" +#include "llvm/Target/TargetRegistry.h" +using namespace llvm; + +/// selectTarget - Pick a target either via -march or by guessing the native +/// arch. Add any CPU features specified via -mcpu or -mattr. +TargetMachine *MCJIT::selectTarget(Module *Mod, + StringRef MArch, + StringRef MCPU, + const SmallVectorImpl& MAttrs, + std::string *ErrorStr) { + Triple TheTriple(Mod->getTargetTriple()); + if (TheTriple.getTriple().empty()) + TheTriple.setTriple(sys::getHostTriple()); + + // Adjust the triple to match what the user requested. + const Target *TheTarget = 0; + if (!MArch.empty()) { + for (TargetRegistry::iterator it = TargetRegistry::begin(), + ie = TargetRegistry::end(); it != ie; ++it) { + if (MArch == it->getName()) { + TheTarget = &*it; + break; + } + } + + if (!TheTarget) { + *ErrorStr = "No available targets are compatible with this -march, " + "see -version for the available targets.\n"; + return 0; + } + + // Adjust the triple to match (if known), otherwise stick with the + // module/host triple. + Triple::ArchType Type = Triple::getArchTypeForLLVMName(MArch); + if (Type != Triple::UnknownArch) + TheTriple.setArch(Type); + } else { + std::string Error; + TheTarget = TargetRegistry::lookupTarget(TheTriple.getTriple(), Error); + if (TheTarget == 0) { + if (ErrorStr) + *ErrorStr = Error; + return 0; + } + } + + if (!TheTarget->hasJIT()) { + errs() << "WARNING: This target JIT is not designed for the host you are" + << " running. If bad things happen, please choose a different " + << "-march switch.\n"; + } + + // Package up features to be passed to target/subtarget + std::string FeaturesStr; + if (!MCPU.empty() || !MAttrs.empty()) { + SubtargetFeatures Features; + Features.setCPU(MCPU); + for (unsigned i = 0; i != MAttrs.size(); ++i) + Features.AddFeature(MAttrs[i]); + FeaturesStr = Features.getString(); + } + + // Allocate a target... + TargetMachine *Target = + TheTarget->createTargetMachine(TheTriple.getTriple(), FeaturesStr); + assert(Target && "Could not allocate target machine!"); + return Target; +} Modified: llvm/trunk/lib/ExecutionEngine/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/Makefile?rev=119509&r1=119508&r2=119509&view=diff ============================================================================== --- llvm/trunk/lib/ExecutionEngine/Makefile (original) +++ llvm/trunk/lib/ExecutionEngine/Makefile Wed Nov 17 10:06:43 2010 @@ -8,6 +8,6 @@ ##===----------------------------------------------------------------------===## LEVEL = ../.. LIBRARYNAME = LLVMExecutionEngine -PARALLEL_DIRS = Interpreter JIT +PARALLEL_DIRS = Interpreter JIT MCJIT include $(LEVEL)/Makefile.common Modified: llvm/trunk/tools/lli/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lli/Makefile?rev=119509&r1=119508&r2=119509&view=diff ============================================================================== --- llvm/trunk/tools/lli/Makefile (original) +++ llvm/trunk/tools/lli/Makefile Wed Nov 17 10:06:43 2010 @@ -9,7 +9,7 @@ LEVEL := ../.. TOOLNAME := lli -LINK_COMPONENTS := jit interpreter nativecodegen bitreader asmparser selectiondag +LINK_COMPONENTS := mcjit jit interpreter nativecodegen bitreader asmparser selectiondag # Enable JIT support include $(LEVEL)/Makefile.common Modified: llvm/trunk/tools/lli/lli.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lli/lli.cpp?rev=119509&r1=119508&r2=119509&view=diff ============================================================================== --- llvm/trunk/tools/lli/lli.cpp (original) +++ llvm/trunk/tools/lli/lli.cpp Wed Nov 17 10:06:43 2010 @@ -23,6 +23,7 @@ #include "llvm/ExecutionEngine/Interpreter.h" #include "llvm/ExecutionEngine/JIT.h" #include "llvm/ExecutionEngine/JITEventListener.h" +#include "llvm/ExecutionEngine/MCJIT.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/IRReader.h" #include "llvm/Support/ManagedStatic.h" From daniel at zuster.org Wed Nov 17 10:06:47 2010 From: daniel at zuster.org (Daniel Dunbar) Date: Wed, 17 Nov 2010 16:06:47 -0000 Subject: [llvm-commits] [llvm] r119510 - in /llvm/trunk: include/llvm/MC/MCStreamer.h lib/MC/CMakeLists.txt lib/MC/MCPureStreamer.cpp Message-ID: <20101117160647.3D9532A6C12C@llvm.org> Author: ddunbar Date: Wed Nov 17 10:06:47 2010 New Revision: 119510 URL: http://llvm.org/viewvc/llvm-project?rev=119510&view=rev Log: MC-JIT: Stub out "pure" streamer. - No immediate use, but maybe someone feels like hacking on it. Added: llvm/trunk/lib/MC/MCPureStreamer.cpp Modified: llvm/trunk/include/llvm/MC/MCStreamer.h llvm/trunk/lib/MC/CMakeLists.txt Modified: llvm/trunk/include/llvm/MC/MCStreamer.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCStreamer.h?rev=119510&r1=119509&r2=119510&view=diff ============================================================================== --- llvm/trunk/include/llvm/MC/MCStreamer.h (original) +++ llvm/trunk/include/llvm/MC/MCStreamer.h Wed Nov 17 10:06:47 2010 @@ -417,6 +417,13 @@ /// The new streamer takes ownership of the \arg Child. MCStreamer *createLoggingStreamer(MCStreamer *Child, raw_ostream &OS); + /// createPureStreamer - Create a machine code streamer which will generate + /// "pure" MC object files, for use with MC-JIT and testing tools. + /// + /// Takes ownership of \arg TAB and \arg CE. + MCStreamer *createPureStreamer(MCContext &Ctx, TargetAsmBackend &TAB, + raw_ostream &OS, MCCodeEmitter *CE); + } // end namespace llvm #endif Modified: llvm/trunk/lib/MC/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/CMakeLists.txt?rev=119510&r1=119509&r2=119510&view=diff ============================================================================== --- llvm/trunk/lib/MC/CMakeLists.txt (original) +++ llvm/trunk/lib/MC/CMakeLists.txt Wed Nov 17 10:06:47 2010 @@ -20,6 +20,7 @@ MCObjectStreamer.cpp MCObjectFormat.cpp MCObjectWriter.cpp + MCPureStreamer.cpp MCSection.cpp MCSectionCOFF.cpp MCSectionELF.cpp Added: llvm/trunk/lib/MC/MCPureStreamer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCPureStreamer.cpp?rev=119510&view=auto ============================================================================== --- llvm/trunk/lib/MC/MCPureStreamer.cpp (added) +++ llvm/trunk/lib/MC/MCPureStreamer.cpp Wed Nov 17 10:06:47 2010 @@ -0,0 +1,259 @@ +//===- lib/MC/MCPureStreamer.cpp - MC "Pure" Object Output ----------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCStreamer.h" +#include "llvm/MC/MCAssembler.h" +#include "llvm/MC/MCCodeEmitter.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCExpr.h" +#include "llvm/MC/MCObjectStreamer.h" +// FIXME: Remove this. +#include "llvm/MC/MCSectionMachO.h" +#include "llvm/MC/MCSymbol.h" +#include "llvm/Support/ErrorHandling.h" + +using namespace llvm; + +namespace { + +class MCPureStreamer : public MCObjectStreamer { +private: + virtual void EmitInstToFragment(const MCInst &Inst); + virtual void EmitInstToData(const MCInst &Inst); + +public: + MCPureStreamer(MCContext &Context, TargetAsmBackend &TAB, + raw_ostream &OS, MCCodeEmitter *Emitter) + : MCObjectStreamer(Context, TAB, OS, Emitter, + /*PadSectionToAlignment=*/true) {} + + /// @name MCStreamer Interface + /// @{ + + virtual void InitSections(); + virtual void EmitLabel(MCSymbol *Symbol); + virtual void EmitAssignment(MCSymbol *Symbol, const MCExpr *Value); + virtual void EmitZerofill(const MCSection *Section, MCSymbol *Symbol = 0, + unsigned Size = 0, unsigned ByteAlignment = 0); + virtual void EmitBytes(StringRef Data, unsigned AddrSpace); + virtual void EmitValue(const MCExpr *Value, unsigned Size,unsigned AddrSpace); + virtual void EmitValueToAlignment(unsigned ByteAlignment, int64_t Value = 0, + unsigned ValueSize = 1, + unsigned MaxBytesToEmit = 0); + virtual void EmitCodeAlignment(unsigned ByteAlignment, + unsigned MaxBytesToEmit = 0); + virtual void EmitValueToOffset(const MCExpr *Offset, + unsigned char Value = 0); + virtual void Finish(); + + + virtual void EmitSymbolAttribute(MCSymbol *Symbol, MCSymbolAttr Attribute) { + report_fatal_error("unsupported directive in pure streamer"); + } + virtual void EmitAssemblerFlag(MCAssemblerFlag Flag) { + report_fatal_error("unsupported directive in pure streamer"); + } + virtual void EmitTBSSSymbol(const MCSection *Section, MCSymbol *Symbol, + uint64_t Size, unsigned ByteAlignment = 0) { + report_fatal_error("unsupported directive in pure streamer"); + } + virtual void EmitSymbolDesc(MCSymbol *Symbol, unsigned DescValue) { + report_fatal_error("unsupported directive in pure streamer"); + } + virtual void EmitCommonSymbol(MCSymbol *Symbol, uint64_t Size, + unsigned ByteAlignment) { + report_fatal_error("unsupported directive in pure streamer"); + } + virtual void EmitThumbFunc(MCSymbol *Func) { + report_fatal_error("unsupported directive in pure streamer"); + } + virtual void BeginCOFFSymbolDef(const MCSymbol *Symbol) { + report_fatal_error("unsupported directive in pure streamer"); + } + virtual void EmitCOFFSymbolStorageClass(int StorageClass) { + report_fatal_error("unsupported directive in pure streamer"); + } + virtual void EmitCOFFSymbolType(int Type) { + report_fatal_error("unsupported directive in pure streamer"); + } + virtual void EndCOFFSymbolDef() { + report_fatal_error("unsupported directive in pure streamer"); + } + virtual void EmitELFSize(MCSymbol *Symbol, const MCExpr *Value) { + report_fatal_error("unsupported directive in pure streamer"); + } + virtual void EmitLocalCommonSymbol(MCSymbol *Symbol, uint64_t Size) { + report_fatal_error("unsupported directive in pure streamer"); + } + virtual void EmitGPRel32Value(const MCExpr *Value) { + report_fatal_error("unsupported directive in pure streamer"); + } + virtual void EmitFileDirective(StringRef Filename) { + report_fatal_error("unsupported directive in pure streamer"); + } + virtual bool EmitDwarfFileDirective(unsigned FileNo, StringRef Filename) { + report_fatal_error("unsupported directive in pure streamer"); + return false; + } + + /// @} +}; + +} // end anonymous namespace. + +void MCPureStreamer::InitSections() { + // FIMXE: To what!? + SwitchSection(getContext().getMachOSection("__TEXT", "__text", + MCSectionMachO::S_ATTR_PURE_INSTRUCTIONS, + 0, SectionKind::getText())); + +} + +void MCPureStreamer::EmitLabel(MCSymbol *Symbol) { + assert(Symbol->isUndefined() && "Cannot define a symbol twice!"); + assert(!Symbol->isVariable() && "Cannot emit a variable symbol!"); + assert(CurSection && "Cannot emit before setting section!"); + + Symbol->setSection(*CurSection); + + MCSymbolData &SD = getAssembler().getOrCreateSymbolData(*Symbol); + + // We have to create a new fragment if this is an atom defining symbol, + // fragments cannot span atoms. + if (getAssembler().isSymbolLinkerVisible(SD.getSymbol())) + new MCDataFragment(getCurrentSectionData()); + + // FIXME: This is wasteful, we don't necessarily need to create a data + // fragment. Instead, we should mark the symbol as pointing into the data + // fragment if it exists, otherwise we should just queue the label and set its + // fragment pointer when we emit the next fragment. + MCDataFragment *F = getOrCreateDataFragment(); + assert(!SD.getFragment() && "Unexpected fragment on symbol data!"); + SD.setFragment(F); + SD.setOffset(F->getContents().size()); +} + +void MCPureStreamer::EmitAssignment(MCSymbol *Symbol, const MCExpr *Value) { + // TODO: This is exactly the same as WinCOFFStreamer. Consider merging into + // MCObjectStreamer. + // FIXME: Lift context changes into super class. + getAssembler().getOrCreateSymbolData(*Symbol); + Symbol->setVariableValue(AddValueSymbols(Value)); +} + +void MCPureStreamer::EmitZerofill(const MCSection *Section, MCSymbol *Symbol, + unsigned Size, unsigned ByteAlignment) { + report_fatal_error("not yet implemented in pure streamer"); +} + +void MCPureStreamer::EmitBytes(StringRef Data, unsigned AddrSpace) { + // TODO: This is exactly the same as WinCOFFStreamer. Consider merging into + // MCObjectStreamer. + getOrCreateDataFragment()->getContents().append(Data.begin(), Data.end()); +} + +void MCPureStreamer::EmitValue(const MCExpr *Value, unsigned Size, + unsigned AddrSpace) { + // TODO: This is exactly the same as WinCOFFStreamer. Consider merging into + // MCObjectStreamer. + MCDataFragment *DF = getOrCreateDataFragment(); + + // Avoid fixups when possible. + int64_t AbsValue; + if (AddValueSymbols(Value)->EvaluateAsAbsolute(AbsValue)) { + // FIXME: Endianness assumption. + for (unsigned i = 0; i != Size; ++i) + DF->getContents().push_back(uint8_t(AbsValue >> (i * 8))); + } else { + DF->addFixup(MCFixup::Create(DF->getContents().size(), + AddValueSymbols(Value), + MCFixup::getKindForSize(Size))); + DF->getContents().resize(DF->getContents().size() + Size, 0); + } +} + +void MCPureStreamer::EmitValueToAlignment(unsigned ByteAlignment, + int64_t Value, unsigned ValueSize, + unsigned MaxBytesToEmit) { + // TODO: This is exactly the same as WinCOFFStreamer. Consider merging into + // MCObjectStreamer. + if (MaxBytesToEmit == 0) + MaxBytesToEmit = ByteAlignment; + new MCAlignFragment(ByteAlignment, Value, ValueSize, MaxBytesToEmit, + getCurrentSectionData()); + + // Update the maximum alignment on the current section if necessary. + if (ByteAlignment > getCurrentSectionData()->getAlignment()) + getCurrentSectionData()->setAlignment(ByteAlignment); +} + +void MCPureStreamer::EmitCodeAlignment(unsigned ByteAlignment, + unsigned MaxBytesToEmit) { + // TODO: This is exactly the same as WinCOFFStreamer. Consider merging into + // MCObjectStreamer. + if (MaxBytesToEmit == 0) + MaxBytesToEmit = ByteAlignment; + MCAlignFragment *F = new MCAlignFragment(ByteAlignment, 0, 1, MaxBytesToEmit, + getCurrentSectionData()); + F->setEmitNops(true); + + // Update the maximum alignment on the current section if necessary. + if (ByteAlignment > getCurrentSectionData()->getAlignment()) + getCurrentSectionData()->setAlignment(ByteAlignment); +} + +void MCPureStreamer::EmitValueToOffset(const MCExpr *Offset, + unsigned char Value) { + new MCOrgFragment(*Offset, Value, getCurrentSectionData()); +} + +void MCPureStreamer::EmitInstToFragment(const MCInst &Inst) { + MCInstFragment *IF = new MCInstFragment(Inst, getCurrentSectionData()); + + // Add the fixups and data. + // + // FIXME: Revisit this design decision when relaxation is done, we may be + // able to get away with not storing any extra data in the MCInst. + SmallVector Fixups; + SmallString<256> Code; + raw_svector_ostream VecOS(Code); + getAssembler().getEmitter().EncodeInstruction(Inst, VecOS, Fixups); + VecOS.flush(); + + IF->getCode() = Code; + IF->getFixups() = Fixups; +} + +void MCPureStreamer::EmitInstToData(const MCInst &Inst) { + MCDataFragment *DF = getOrCreateDataFragment(); + + SmallVector Fixups; + SmallString<256> Code; + raw_svector_ostream VecOS(Code); + getAssembler().getEmitter().EncodeInstruction(Inst, VecOS, Fixups); + VecOS.flush(); + + // Add the fixups and data. + for (unsigned i = 0, e = Fixups.size(); i != e; ++i) { + Fixups[i].setOffset(Fixups[i].getOffset() + DF->getContents().size()); + DF->addFixup(Fixups[i]); + } + DF->getContents().append(Code.begin(), Code.end()); +} + +void MCPureStreamer::Finish() { + // FIXME: Handle DWARF tables? + + this->MCObjectStreamer::Finish(); +} + +MCStreamer *llvm::createPureStreamer(MCContext &Context, TargetAsmBackend &TAB, + raw_ostream &OS, MCCodeEmitter *CE) { + return new MCPureStreamer(Context, TAB, OS, CE); +} From rafael.espindola at gmail.com Wed Nov 17 10:15:42 2010 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Wed, 17 Nov 2010 16:15:42 -0000 Subject: [llvm-commits] [llvm] r119511 - in /llvm/trunk: lib/MC/MCParser/AsmParser.cpp test/MC/ELF/n_bytes.s Message-ID: <20101117161542.9CD3C2A6C12C@llvm.org> Author: rafael Date: Wed Nov 17 10:15:42 2010 New Revision: 119511 URL: http://llvm.org/viewvc/llvm-project?rev=119511&view=rev Log: Add support for .2byte, .4byte and .8byte. Fixes PR8631. Added: llvm/trunk/test/MC/ELF/n_bytes.s Modified: llvm/trunk/lib/MC/MCParser/AsmParser.cpp Modified: llvm/trunk/lib/MC/MCParser/AsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCParser/AsmParser.cpp?rev=119511&r1=119510&r2=119511&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCParser/AsmParser.cpp (original) +++ llvm/trunk/lib/MC/MCParser/AsmParser.cpp Wed Nov 17 10:15:42 2010 @@ -947,10 +947,16 @@ return ParseDirectiveValue(2); if (IDVal == ".value") return ParseDirectiveValue(2); + if (IDVal == ".2byte") + return ParseDirectiveValue(2); if (IDVal == ".long") return ParseDirectiveValue(4); + if (IDVal == ".4byte") + return ParseDirectiveValue(4); if (IDVal == ".quad") return ParseDirectiveValue(8); + if (IDVal == ".8byte") + return ParseDirectiveValue(8); if (IDVal == ".single") return ParseDirectiveRealValue(APFloat::IEEEsingle); if (IDVal == ".double") Added: llvm/trunk/test/MC/ELF/n_bytes.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/n_bytes.s?rev=119511&view=auto ============================================================================== --- llvm/trunk/test/MC/ELF/n_bytes.s (added) +++ llvm/trunk/test/MC/ELF/n_bytes.s Wed Nov 17 10:15:42 2010 @@ -0,0 +1,20 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + + .2byte 42, 1, 2, 3 + .4byte 42, 1, 2, 3 + .8byte 42, 1, 2, 3 + + +// CHECK: # Section 0x00000001 +// CHECK-NEXT: (('sh_name', 0x00000001) # '.text' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000006) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000040) +// CHECK-NEXT: ('sh_size', 0x00000038) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000004) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ('_section_data', '2a000100 02000300 2a000000 01000000 02000000 03000000 2a000000 00000000 01000000 00000000 02000000 00000000 03000000 00000000') +// CHECK-NEXT: ), From rafael.espindola at gmail.com Wed Nov 17 10:24:40 2010 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Wed, 17 Nov 2010 16:24:40 -0000 Subject: [llvm-commits] [llvm] r119512 - in /llvm/trunk: lib/MC/MCParser/AsmParser.cpp test/MC/ELF/n_bytes.s Message-ID: <20101117162440.900F02A6C12C@llvm.org> Author: rafael Date: Wed Nov 17 10:24:40 2010 New Revision: 119512 URL: http://llvm.org/viewvc/llvm-project?rev=119512&view=rev Log: Add support for .int. Modified: llvm/trunk/lib/MC/MCParser/AsmParser.cpp llvm/trunk/test/MC/ELF/n_bytes.s Modified: llvm/trunk/lib/MC/MCParser/AsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCParser/AsmParser.cpp?rev=119512&r1=119511&r2=119512&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCParser/AsmParser.cpp (original) +++ llvm/trunk/lib/MC/MCParser/AsmParser.cpp Wed Nov 17 10:24:40 2010 @@ -951,6 +951,8 @@ return ParseDirectiveValue(2); if (IDVal == ".long") return ParseDirectiveValue(4); + if (IDVal == ".int") + return ParseDirectiveValue(4); if (IDVal == ".4byte") return ParseDirectiveValue(4); if (IDVal == ".quad") Modified: llvm/trunk/test/MC/ELF/n_bytes.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/n_bytes.s?rev=119512&r1=119511&r2=119512&view=diff ============================================================================== --- llvm/trunk/test/MC/ELF/n_bytes.s (original) +++ llvm/trunk/test/MC/ELF/n_bytes.s Wed Nov 17 10:24:40 2010 @@ -3,7 +3,7 @@ .2byte 42, 1, 2, 3 .4byte 42, 1, 2, 3 .8byte 42, 1, 2, 3 - + .int 42, 1, 2, 3 // CHECK: # Section 0x00000001 // CHECK-NEXT: (('sh_name', 0x00000001) # '.text' @@ -11,10 +11,10 @@ // CHECK-NEXT: ('sh_flags', 0x00000006) // CHECK-NEXT: ('sh_addr', 0x00000000) // CHECK-NEXT: ('sh_offset', 0x00000040) -// CHECK-NEXT: ('sh_size', 0x00000038) +// CHECK-NEXT: ('sh_size', 0x00000048) // CHECK-NEXT: ('sh_link', 0x00000000) // CHECK-NEXT: ('sh_info', 0x00000000) // CHECK-NEXT: ('sh_addralign', 0x00000004) // CHECK-NEXT: ('sh_entsize', 0x00000000) -// CHECK-NEXT: ('_section_data', '2a000100 02000300 2a000000 01000000 02000000 03000000 2a000000 00000000 01000000 00000000 02000000 00000000 03000000 00000000') +// CHECK-NEXT: ('_section_data', '2a000100 02000300 2a000000 01000000 02000000 03000000 2a000000 00000000 01000000 00000000 02000000 00000000 03000000 00000000 2a000000 01000000 02000000 03000000') // CHECK-NEXT: ), From jasonwkim at google.com Wed Nov 17 10:45:19 2010 From: jasonwkim at google.com (Jason Kim) Date: Wed, 17 Nov 2010 08:45:19 -0800 Subject: [llvm-commits] [patch] ARM/MC/ELF add new stub for movt/movw in ARMFixupKinds In-Reply-To: <4BEDF42A-52BD-4EB0-A5B2-174318647BCB@apple.com> References: <8ABAEBC3-996C-4C2E-B799-64222DAAE5C7@apple.com> <4BEDF42A-52BD-4EB0-A5B2-174318647BCB@apple.com> Message-ID: -llvmdev +llvmcommits On Tue, Nov 16, 2010 at 4:27 PM, Jim Grosbach wrote: > > On Nov 16, 2010, at 4:01 PM, Jason Kim wrote: > > +llvmdev > -llvmcommits > > On Fri, Nov 12, 2010 at 8:03 AM, Jim Grosbach wrote: > > Sorta. getBinaryCodeForInst() is auto-generated by tablegen, so shouldn't be > modified directly. The target can register hooks for instruction operands > for any special encoding needs, including registering fixups, using the > EncoderMethod string. For an example, have a look at the LDRi12 instruction > and how it registers a fixup for the addrmode_imm12 operand when it needs > one. > > Hi Jim,. follow up question for ya: > > The current movt/movw pair (as defined in ARMInstrInfo.td) ?does not > use EncoderMethod string to declare ?a special case handler. > > There's two parts to how this works. First, is the handling of the movt/movw > pair for instruction selection, and then the handling of the upper/lower > operand flags for those instructions. > MOVi32imm is expanded as a pseudo instruction in ARMExpandPseudos pass, and > any other patterns that do similar things should also be expanded there. For > a few special cases where we need the post-RA scheduler to handle the > instruction sequences as an atomic unit (PICLDR, PICADD, the > eh.sjlj.setjmp/longjmp patterns, for example), we expand them even later, > during MC lowering in ARMAsmPrinter.cpp. As a result, the movt and movw > instructions should make it into the code emitter as separate entries, not > as a composite pair. > For operands that aren't compile-time constants, the operand flag gets set > in the expansion to the MOVT/MOVW instructions: > ?? ? ?if (MO.isImm()) { > ?? ? ? ?unsigned Imm = MO.getImm(); > ?? ? ? ?unsigned Lo16 = Imm & 0xffff; > ?? ? ? ?unsigned Hi16 = (Imm >> 16) & 0xffff; > ?? ? ? ?LO16 = LO16.addImm(Lo16); > ?? ? ? ?HI16 = HI16.addImm(Hi16); > ?? ? ?} else { > ?? ? ? ?const GlobalValue *GV = MO.getGlobal(); > ?? ? ? ?unsigned TF = MO.getTargetFlags(); > ?? ? ? ?LO16 = LO16.addGlobalAddress(GV, MO.getOffset(), TF | > ARMII::MO_LO16); > ?? ? ? ?HI16 = HI16.addGlobalAddress(GV, MO.getOffset(), TF | > ARMII::MO_HI16); > ?? ? ?} > That's then marked with VK_ARM_LO16/VK_ARM_HI16 by ARMMCInstLower.cpp when > it's looking at symbol reference operands. > > At the current time, for the assembly printing, > MCAsmStreamer::EmitInstruction(const MCInst &Inst) calls out to > ?MCExpr::print(raw_ostream &OS) > ??which then calls out to MCSymbolRefExpr::getVariantKindName() to > print the magic :lower16: and :upper16: asm tags for .s emission > Currently, movt/movw emission works correctly in .s, but not in .o emission > > This lead me to believe that the correct place to put the code to handle > MCSymbolRefExpr::VK_ARM_(HI||LO)16 for the .o path was to place a case > in getMachineOpValue() (i.e. not > ARMMCCodeEmitter::getBinaryCodeForInstr like I mistakenly wrote in my > prior email.) > > Are you implying that the movt/movw instruction definition in the .td > files need to be fixed up instead to declare a new special case for .o > emission via the EncoderMethod string, for the .o emission of > movt/movw to be considered "correct"? > > A custom encoder may be the best way to differentiate the kinds of fixups > we'll need for these operands (e.g., using LO16 may generate different > fixups depending on which instruction it's used for, which implies different > operand node types, and thus different encoder methods). In any case, the > encoder, be it in getMachineOpValue() or a specialized method, will need to > differentiate between an immediate operand and a symbol reference expression > operand. In the latter case, it'll create a fixup for the lo/hi variantkind > if one is present. Got ya. Is this more in tune with what you had in mind? (applies cleanly to -r119149) Thanks! > -Jim > > On Nov 11, 2010, at 7:06 PM, Jason Kim wrote: > > Is getBinaryCodeForInst the best place to place the case for > > supporting movt/movw fixup emission? > > The call stack seems to be: > > #0 ARMMCCodeEmitter::getBinaryCodeForInstr > > #1 ARMMCCodeEmitter::EncodeInstruction > > #2 MCELFStreamer::EmitInstToData > > #3 MCObjectStreamer::EmitInstruction > > #4 ARMAsmPrinter::EmitInstruction > > _______________________________________________ > > llvm-commits mailing list > > llvm-commits at cs.uiuc.edu > > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > > > -------------- next part -------------- A non-text attachment was scrubbed... Name: arm-mc-elf-s09a-movt.patch Type: text/x-patch Size: 5580 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101117/2cfea766/attachment.bin From rafael.espindola at gmail.com Wed Nov 17 11:02:41 2010 From: rafael.espindola at gmail.com (=?UTF-8?Q?Rafael_Esp=C3=ADndola?=) Date: Wed, 17 Nov 2010 12:02:41 -0500 Subject: [llvm-commits] [patch] Use .loc in codegen In-Reply-To: References: Message-ID: Looks like I had attached an incomplete patch. A corrected one is attached. Cheers, Rafael -------------- next part -------------- A non-text attachment was scrubbed... Name: loc.patch Type: text/x-diff Size: 19682 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101117/b7d24ab9/attachment.bin From jasonwkim at google.com Wed Nov 17 11:03:21 2010 From: jasonwkim at google.com (Jason Kim) Date: Wed, 17 Nov 2010 09:03:21 -0800 Subject: [llvm-commits] [patch] ARM/MC/ELF add new stub for movt/movw in ARMFixupKinds In-Reply-To: References: <8ABAEBC3-996C-4C2E-B799-64222DAAE5C7@apple.com> <4BEDF42A-52BD-4EB0-A5B2-174318647BCB@apple.com> Message-ID: On Wed, Nov 17, 2010 at 8:45 AM, Jason Kim wrote: > -llvmdev > +llvmcommits > > On Tue, Nov 16, 2010 at 4:27 PM, Jim Grosbach wrote: >> >> On Nov 16, 2010, at 4:01 PM, Jason Kim wrote: >> >> +llvmdev >> -llvmcommits >> >> On Fri, Nov 12, 2010 at 8:03 AM, Jim Grosbach wrote: >> >> Sorta. getBinaryCodeForInst() is auto-generated by tablegen, so shouldn't be >> modified directly. The target can register hooks for instruction operands >> for any special encoding needs, including registering fixups, using the >> EncoderMethod string. For an example, have a look at the LDRi12 instruction >> and how it registers a fixup for the addrmode_imm12 operand when it needs >> one. >> >> Hi Jim,. follow up question for ya: >> >> The current movt/movw pair (as defined in ARMInstrInfo.td) ?does not >> use EncoderMethod string to declare ?a special case handler. >> >> There's two parts to how this works. First, is the handling of the movt/movw >> pair for instruction selection, and then the handling of the upper/lower >> operand flags for those instructions. >> MOVi32imm is expanded as a pseudo instruction in ARMExpandPseudos pass, and >> any other patterns that do similar things should also be expanded there. For >> a few special cases where we need the post-RA scheduler to handle the >> instruction sequences as an atomic unit (PICLDR, PICADD, the >> eh.sjlj.setjmp/longjmp patterns, for example), we expand them even later, >> during MC lowering in ARMAsmPrinter.cpp. As a result, the movt and movw >> instructions should make it into the code emitter as separate entries, not >> as a composite pair. >> For operands that aren't compile-time constants, the operand flag gets set >> in the expansion to the MOVT/MOVW instructions: >> ?? ? ?if (MO.isImm()) { >> ?? ? ? ?unsigned Imm = MO.getImm(); >> ?? ? ? ?unsigned Lo16 = Imm & 0xffff; >> ?? ? ? ?unsigned Hi16 = (Imm >> 16) & 0xffff; >> ?? ? ? ?LO16 = LO16.addImm(Lo16); >> ?? ? ? ?HI16 = HI16.addImm(Hi16); >> ?? ? ?} else { >> ?? ? ? ?const GlobalValue *GV = MO.getGlobal(); >> ?? ? ? ?unsigned TF = MO.getTargetFlags(); >> ?? ? ? ?LO16 = LO16.addGlobalAddress(GV, MO.getOffset(), TF | >> ARMII::MO_LO16); >> ?? ? ? ?HI16 = HI16.addGlobalAddress(GV, MO.getOffset(), TF | >> ARMII::MO_HI16); >> ?? ? ?} >> That's then marked with VK_ARM_LO16/VK_ARM_HI16 by ARMMCInstLower.cpp when >> it's looking at symbol reference operands. >> >> At the current time, for the assembly printing, >> MCAsmStreamer::EmitInstruction(const MCInst &Inst) calls out to >> ?MCExpr::print(raw_ostream &OS) >> ??which then calls out to MCSymbolRefExpr::getVariantKindName() to >> print the magic :lower16: and :upper16: asm tags for .s emission >> Currently, movt/movw emission works correctly in .s, but not in .o emission >> >> This lead me to believe that the correct place to put the code to handle >> MCSymbolRefExpr::VK_ARM_(HI||LO)16 for the .o path was to place a case >> in getMachineOpValue() (i.e. not >> ARMMCCodeEmitter::getBinaryCodeForInstr like I mistakenly wrote in my >> prior email.) >> >> Are you implying that the movt/movw instruction definition in the .td >> files need to be fixed up instead to declare a new special case for .o >> emission via the EncoderMethod string, for the .o emission of >> movt/movw to be considered "correct"? >> >> A custom encoder may be the best way to differentiate the kinds of fixups >> we'll need for these operands (e.g., using LO16 may generate different >> fixups depending on which instruction it's used for, which implies different >> operand node types, and thus different encoder methods). In any case, the >> encoder, be it in getMachineOpValue() or a specialized method, will need to >> differentiate between an immediate operand and a symbol reference expression >> operand. In the latter case, it'll create a fixup for the lo/hi variantkind >> if one is present. > > Got ya. Is this more in tune with what you had in mind? (applies cleanly to > -r119149) Yikes. As sent, patch is missing two enum definitions The update is here. Sorry for the noise (again ): -jason > > Thanks! > >> -Jim >> >> On Nov 11, 2010, at 7:06 PM, Jason Kim wrote: >> >> Is getBinaryCodeForInst the best place to place the case for >> >> supporting movt/movw fixup emission? >> >> The call stack seems to be: >> >> #0 ARMMCCodeEmitter::getBinaryCodeForInstr >> >> #1 ARMMCCodeEmitter::EncodeInstruction >> >> #2 MCELFStreamer::EmitInstToData >> >> #3 MCObjectStreamer::EmitInstruction >> >> #4 ARMAsmPrinter::EmitInstruction >> >> _______________________________________________ >> >> llvm-commits mailing list >> >> llvm-commits at cs.uiuc.edu >> >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >> >> >> >> > -------------- next part -------------- A non-text attachment was scrubbed... Name: arm-mc-elf-s09b-movt.patch Type: text/x-patch Size: 6209 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101117/cd37ac46/attachment-0001.bin From sabre at nondot.org Wed Nov 17 11:14:55 2010 From: sabre at nondot.org (Chris Lattner) Date: Wed, 17 Nov 2010 17:14:55 -0000 Subject: [llvm-commits] [llvm] r119515 - /llvm/trunk/docs/CodingStandards.html Message-ID: <20101117171455.451E82A6C12C@llvm.org> Author: lattner Date: Wed Nov 17 11:14:55 2010 New Revision: 119515 URL: http://llvm.org/viewvc/llvm-project?rev=119515&view=rev Log: various cleanups and other improvements, patch by Zhanyong Wan! Modified: llvm/trunk/docs/CodingStandards.html Modified: llvm/trunk/docs/CodingStandards.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CodingStandards.html?rev=119515&r1=119514&r2=119515&view=diff ============================================================================== --- llvm/trunk/docs/CodingStandards.html (original) +++ llvm/trunk/docs/CodingStandards.html Wed Nov 17 11:14:55 2010 @@ -34,7 +34,7 @@
  • Style Issues
      -
    1. The High Level Issues +
    2. The High-Level Issues
      1. A Public Header File is a Module
        2. @@ -48,7 +48,7 @@
      2. Turn Predicate Loops into Predicate Functions
      3. -
    3. The Low Level Issues +
    4. The Low-Level Issues
      1. Assert Liberally
      2. Do not use 'using namespace std'
        3. @@ -58,8 +58,8 @@ loop
      3. #include <iostream> is forbidden
        4. -
      4. Avoid std::endl
      5. Use raw_ostream +
      6. Avoid std::endl
    5. Microscopic Details @@ -167,8 +167,8 @@

      A few things to note about this particular format: The "-*- C++ -*-" string on the first line is there to tell Emacs that the source file -is a C++ file, not a C file (Emacs assumes .h files are C files by default). -Note that this tag is not necessary in .cpp files. The name of the file is also +is a C++ file, not a C file (Emacs assumes .h files are C files by default). +Note that this tag is not necessary in .cpp files. The name of the file is also on the first line, along with a very short description of the purpose of the file. This is important when printing out code and flipping though lots of pages.

      @@ -244,7 +244,7 @@ order:

        -
      1. Main Module header
        2. +
      2. Main Module Header
      3. Local/Private Headers
      4. llvm/*
      5. llvm/Analysis/*
        6. @@ -259,13 +259,13 @@

        ... and each category should be sorted by name.

        -

        The "Main Module Header" file applies to .cpp file -which implement an interface defined by a .h file. This #include +

        The "Main Module Header" file applies to .cpp files +which implement an interface defined by a .h file. This #include should always be included first regardless of where it lives on the file -system. By including a header file first in the .cpp files that implement the +system. By including a header file first in the .cpp files that implement the interfaces, we ensure that the header does not have any hidden dependencies which are not explicitly #included in the header, but should be. It is also a -form of documentation in the .cpp file to indicate where the interfaces it +form of documentation in the .cpp file to indicate where the interfaces it implements are defined.

        @@ -323,7 +323,7 @@
        -

        Okay, your first year of programming you were told that indentation is +

        Okay, in your first year of programming you were told that indentation is important. If you didn't believe and internalize this then, now is the time. Just do it.

        @@ -434,7 +434,7 @@
        - The High Level Issues + The High-Level Issues
        @@ -462,7 +462,7 @@

        In general, a module should be implemented with one or more .cpp files. Each of these .cpp files should include the header that defines -their interface first. This ensure that all of the dependences of the module +their interface first. This ensures that all of the dependences of the module header have been properly added to the module header itself, and are not implicit. System headers should be included after user headers for a translation unit.

        @@ -581,7 +581,7 @@
        -

        This fixes these problems. A similar problem frequently happens in for +

        This fixes these problems. A similar problem frequently happens in for loops. A silly example is something like this:

        @@ -616,6 +616,7 @@ Value *LHS = BO->getOperand(0); Value *RHS = BO->getOperand(1); if (LHS == RHS) continue; + ... }
        @@ -778,7 +779,7 @@
        - The Low Level Issues + The Low-Level Issues
        @@ -790,7 +791,7 @@
        -

        Use the "assert" function to its fullest. Check all of your +

        Use the "assert" macro to its fullest. Check all of your preconditions and assumptions, you never know when a bug (not necessarily even yours) might be caught early by an assertion, which reduces debugging time dramatically. The "<cassert>" header file is probably already @@ -799,7 +800,7 @@

        To further assist with debugging, make sure to put some kind of error message in the assertion statement (which is printed if the assertion is tripped). This -helps the poor debugging make sense of why an assertion is being made and +helps the poor debugger make sense of why an assertion is being made and enforced, and hopefully what to do about it. Here is one complete example:

        @@ -900,7 +901,7 @@ the namespace of any source file that #includes the header. This is clearly a bad thing.

        -

        In implementation files (e.g. .cpp files), the rule is more of a stylistic +

        In implementation files (e.g. .cpp files), the rule is more of a stylistic rule, but is still important. Basically, using explicit namespace prefixes makes the code clearer, because it is immediately obvious what facilities are being used and where they are coming from, and more portable, because @@ -913,9 +914,9 @@

        The exception to the general rule (i.e. it's not an exception for the std namespace) is for implementation files. For example, all of the code in the LLVM project implements code that lives in the 'llvm' namespace. -As such, it is ok, and actually clearer, for the .cpp files to have a 'using +As such, it is ok, and actually clearer, for the .cpp files to have a 'using namespace llvm' directive at their top, after the #includes. The -general form of this rule is that any .cpp file that implements code in any +general form of this rule is that any .cpp file that implements code in any namespace may use that namespace (and its parents'), but should not use any others.

        @@ -1024,11 +1025,9 @@

        Note that using the other stream headers (<sstream> for example) is not problematic in this regard (just <iostream>). -However, raw_ostream provides various APIs that are better performing for almost -every use than std::ostream style APIs, so you should just use it for new -code.

        - -

        New code should always +However, raw_ostream provides various APIs that are better performing for almost +every use than std::ostream style APIs. +Therefore new code should always use raw_ostream for writing, or the llvm::MemoryBuffer API for reading files.

        @@ -1037,6 +1036,26 @@
        + Use raw_ostream +
        + +
        + +

        LLVM includes a lightweight, simple, and efficient stream implementation +in llvm/Support/raw_ostream.h which provides all of the common features +of std::ostream. All new code should use raw_ostream instead +of ostream.

        + +

        Unlike std::ostream, raw_ostream is not a template and can +be forward declared as class raw_ostream. Public headers should +generally not include the raw_ostream header, but use forward +declarations and constant references to raw_ostream instances.

        + +
        + + + +
        Avoid std::endl
        @@ -1059,26 +1078,6 @@
        - -
        - Use raw_ostream -
        - -
        - -

        LLVM includes a lightweight, simple, and efficient stream implementation -in llvm/Support/raw_ostream.h which provides all of the common features -of std::ostream. All new code should use raw_ostream instead -of ostream.

        - -

        Unlike std::ostream, raw_ostream is not a template and can -be forward declared as class raw_ostream. Public headers should -generally not include the raw_ostream header, but use forward -declarations and constant references to raw_ostream instances.

        - -
        - -
        Microscopic Details @@ -1095,7 +1094,7 @@
        -

        We prefer to put a space before a parentheses only in control flow +

        We prefer to put a space before an open parenthesis only in control flow statements, but not in normal function call expressions and function-like macros. For example, this is good:

        @@ -1174,7 +1173,7 @@

        -In general, we strive to reduce indentation where ever possible. This is useful +In general, we strive to reduce indentation wherever possible. This is useful because we want code to fit into 80 columns without wrapping horribly, but also because it makes it easier to understand the code. Namespaces are a funny thing: they are often large, and we often desire to put @@ -1219,7 +1218,7 @@

        Since the body is small, indenting adds value because it makes it very clear where the namespace starts and ends, and it is easy to take the whole thing in in one "gulp" when reading the code. If the blob of code in the namespace is -larger (as it typically is in a header in the llvm or clang namespaces), do not +larger (as it typically is in a header in the llvm or clang namespaces), do not indent the code, and add a comment indicating what namespace is being closed. For example:

        From tonic at nondot.org Wed Nov 17 11:34:48 2010 From: tonic at nondot.org (Tanya Lattner) Date: Wed, 17 Nov 2010 17:34:48 -0000 Subject: [llvm-commits] [www] r119519 - /www/trunk/devmtg/2010-11/index.html Message-ID: <20101117173448.E57F82A6C12C@llvm.org> Author: tbrethou Date: Wed Nov 17 11:34:48 2010 New Revision: 119519 URL: http://llvm.org/viewvc/llvm-project?rev=119519&view=rev Log: Add template for video/slides. Modified: www/trunk/devmtg/2010-11/index.html Modified: www/trunk/devmtg/2010-11/index.html URL: http://llvm.org/viewvc/llvm-project/www/trunk/devmtg/2010-11/index.html?rev=119519&r1=119518&r2=119519&view=diff ============================================================================== --- www/trunk/devmtg/2010-11/index.html (original) +++ www/trunk/devmtg/2010-11/index.html Wed Nov 17 11:34:48 2010 @@ -39,35 +39,25 @@
        Agenda

        - + - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + +/tr> + + + + + + + + +
        TimeTalkLocation
        MediaTalk
        8:00 - 8:45BreakfastMarket Room
        8:45 - 9:00Welcome
        Chris Lattner, Apple Inc.        		Almaden Ballroom
        9:00 - 9:40Portable Native Client
        David Sehr, Google        		Almaden Ballroom
        9:40 - 10:20AMD OpenCL Compiler - Using LLVM to produce a cross-platform heterogeneous compiler tool chain
        Micah Villmow, AMD Inc.        		Almaden Ballroom
        Implementing Include-What-You-Use using clang
        Craig Silverstein, Google        		Winchester Room
        Debugging Information BOF
        Devang Patel, Apple Inc.        		Market Room
        10:20 - 10:50BreakMarket Room
        10:50 - 11:30libclang: Thinking Beyond the Compiler
        Doug Gregor, Apple Inc.        		Almaden Ballroom
        Polly - Polyhedral optimizations in LLVM
        Tobias Grosser , University of Passau        		Winchester Room
        11:30 - 12:10libc++: A Standard Library for C++0x
        Howard Hinnant, Apple Inc.        		Almaden Room
        Symbolic Crosschecking of Floating-Point and SIMD Code
        Peter Collingbourne, Imperial College London        		Winchester Room
        12:10 - 1:20LunchMarket Room
        1:20 - 2:00The LLVM Assembler & Machine Code Infrastructure
        Daniel Dunbar, Apple Inc.        		Almaden Ballroom
        Creating cling, an interactive interpreter interface for clang
        Axel Naumann, CERN        		Winchester Room
        OpenCL BOF
        Anton Lokhmotov, ARM        		Market Room
        2:00 - 2:40LLDB: Modular Debugging Infrastructure
        Greg Clayton, Apple Inc.        		Almaden Ballroom
        The Crack Scripting Language
        Michael Muller, Google        		Winchester Room
        ARM-MC and EABI support BOF
        Renato Golin, ARM        		Market Room
        2:40 - 3:20Hardening LLVM With Random Testing
        Xuejun Yang, University of Utah        		Almaden Ballroom
        C-to-Verilog.com : High-level synthesis using LLVM
        Nadav Rotem, Haifa University        		Winchester Room
        3:20 - 3:50BreakMarket Room
        3:50 - 4:30Object Files in LLVM
        Michael Spencer, Gainsville University        		Almaden Ballroom
        Connecting the EDG front-end to LLVM
        Renato Golin, ARM        		Winchester Ballroom
        Building Linux BOF
        Taylor Simpson, QuIC        		Market Room
        4:30 - 5:10LLVM for Open Shading Language
        Larry Gritz, Sony Pictures Imageworks        		Almaden Ballroom
        Experiences on using LLVM to compile Click packet processing code to Stanford NetFPGA hardware
        Erik Rubow, Ericsson Research Silicon Valley        		Winchester Room
        Optimizations BOF
        Taylor Simpson, QuIC        		Market Room
        [Slides]
        [Video] (Computer)
        [Videos] (Mobile)        		Portable Native Client
        David Sehr, Google
        [Slides]
        [Video] (Computer)
        [Videos] (Mobile)        		AMD OpenCL Compiler - Using LLVM to produce a cross-platform heterogeneous compiler tool chain
        Micah Villmow, AMD Inc.
        [Slides]
        [Video] (Computer)
        [Videos] (Mobile)        		Implementing Include-What-You-Use using clang
        Craig Silverstein, Google
        [Slides]
        [Video] (Computer)
        [Videos] (Mobile)        		libclang: Thinking Beyond the Compiler
        Doug Gregor, Apple Inc.
        [Slides]
        [Video] (Computer)
        [Videos] (Mobile)        		Polly - Polyhedral optimizations in LLVM
        Tobias Grosser , University of Passau
        [Slides]
        [Video] (Computer)
        [Videos] (Mobile)        		libc++: A Standard Library for C++0x
        Howard Hinnant, Apple Inc.
        [Slides]
        [Video] (Computer)
        [Videos] (Mobile)        		Symbolic Crosschecking of Floating-Point and SIMD Code
        Peter Collingbourne, Imperial College London
        [Slides]
        [Video] (Computer)
        [Videos] (Mobile)        		The LLVM Assembler & Machine Code Infrastructure
        Daniel Dunbar, Apple Inc.
        [Slides]
        [Video] (Computer)
        [Videos] (Mobile)        		Creating cling, an interactive interpreter interface for clang
        Axel Naumann, CERN
        [Slides]
        [Video] (Computer)
        [Videos] (Mobile)        		LLDB: Modular Debugging Infrastructure
        Greg Clayton, Apple Inc.
        [Slides]
        [Video] (Computer)
        [Videos] (Mobile)        		The Crack Scripting Language
        Michael Muller, Google
        [Slides]
        [Video] (Computer)
        [Videos] (Mobile)        		Hardening LLVM With Random Testing
        Xuejun Yang, University of Utah
        [Slides]
        [Video] (Computer)
        [Videos] (Mobile)        		C-to-Verilog.com : High-level synthesis using LLVM
        Nadav Rotem, Haifa University
        [Slides]
        [Video] (Computer)
        [Videos] (Mobile)        		Object Files in LLVM
        Michael Spencer, Gainsville University
        [Slides]
        [Video] (Computer)
        [Videos] (Mobile)        		Connecting the EDG front-end to LLVM
        Renato Golin, ARM
        [Slides]
        [Video] (Computer)
        [Videos] (Mobile)        		LLVM for Open Shading Language
        Larry Gritz, Sony Pictures Imageworks
        [Slides]
        [Video] (Computer)
        [Videos] (Mobile)        		Experiences on using LLVM to compile Click packet processing code to Stanford NetFPGA hardware
        Erik Rubow, Ericsson Research Silicon Valley

        From sabre at nondot.org Wed Nov 17 11:40:21 2010 From: sabre at nondot.org (Chris Lattner) Date: Wed, 17 Nov 2010 17:40:21 -0000 Subject: [llvm-commits] [www] r119520 - /www/trunk/devmtg/2010-11/index.html Message-ID: <20101117174021.3F3F42A6C12C@llvm.org> Author: lattner Date: Wed Nov 17 11:40:20 2010 New Revision: 119520 URL: http://llvm.org/viewvc/llvm-project?rev=119520&view=rev Log: typo Modified: www/trunk/devmtg/2010-11/index.html Modified: www/trunk/devmtg/2010-11/index.html URL: http://llvm.org/viewvc/llvm-project/www/trunk/devmtg/2010-11/index.html?rev=119520&r1=119519&r2=119520&view=diff ============================================================================== --- www/trunk/devmtg/2010-11/index.html (original) +++ www/trunk/devmtg/2010-11/index.html Wed Nov 17 11:40:20 2010 @@ -48,7 +48,7 @@ [Slides]
        [Video] (Computer)
        [Videos] (Mobile)Polly - Polyhedral optimizations in LLVM
        Tobias Grosser , University of Passau [Slides]
        [Video] (Computer)
        [Videos] (Mobile)libc++: A Standard Library for C++0x
        Howard Hinnant, Apple Inc. [Slides]
        [Video] (Computer)
        [Videos] (Mobile)Symbolic Crosschecking of Floating-Point and SIMD Code
        Peter Collingbourne, Imperial College London -[Slides]
        [Video] (Computer)
        [Videos] (Mobile)The LLVM Assembler & Machine Code Infrastructure
        Daniel Dunbar, Apple Inc./tr> +[Slides]
        [Video] (Computer)
        [Videos] (Mobile)The LLVM Assembler & Machine Code Infrastructure
        Daniel Dunbar, Apple Inc. [Slides]
        [Video] (Computer)
        [Videos] (Mobile)Creating cling, an interactive interpreter interface for clang
        Axel Naumann, CERN [Slides]
        [Video] (Computer)
        [Videos] (Mobile)LLDB: Modular Debugging Infrastructure
        Greg Clayton, Apple Inc. [Slides]
        [Video] (Computer)
        [Videos] (Mobile)The Crack Scripting Language
        Michael Muller, Google From aggarwa4 at illinois.edu Wed Nov 17 11:48:52 2010 From: aggarwa4 at illinois.edu (Arushi Aggarwal) Date: Wed, 17 Nov 2010 17:48:52 -0000 Subject: [llvm-commits] [poolalloc] r119521 - /poolalloc/trunk/include/dsa/DataStructure.h Message-ID: <20101117174852.BFECE2A6C12C@llvm.org> Author: aggarwa4 Date: Wed Nov 17 11:48:52 2010 New Revision: 119521 URL: http://llvm.org/viewvc/llvm-project?rev=119521&view=rev Log: Updated Header file to accomodate yesterday's changes. (Sorry!) Modified: poolalloc/trunk/include/dsa/DataStructure.h Modified: poolalloc/trunk/include/dsa/DataStructure.h URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/dsa/DataStructure.h?rev=119521&r1=119520&r2=119521&view=diff ============================================================================== --- poolalloc/trunk/include/dsa/DataStructure.h (original) +++ poolalloc/trunk/include/dsa/DataStructure.h Wed Nov 17 11:48:52 2010 @@ -220,6 +220,7 @@ EntryPointAnalysis* EP; void cloneIntoGlobals(DSGraph* G); + void cloneGlobalsInto(DSGraph* G); // filterCallees -- Whether or not we filter out illegal callees // from the CallGraph. This is useful while doing original BU, @@ -266,7 +267,6 @@ void calculateGraph(DSGraph* G); void CloneAuxIntoGlobal(DSGraph* G); - void cloneGlobalsInto(DSGraph* G); void finalizeGlobals(void); void getAllCallees(const DSCallSite &CS, From rafael.espindola at gmail.com Wed Nov 17 11:49:01 2010 From: rafael.espindola at gmail.com (=?UTF-8?Q?Rafael_Esp=C3=ADndola?=) Date: Wed, 17 Nov 2010 12:49:01 -0500 Subject: [llvm-commits] [patch] Use .loc in codegen In-Reply-To: References: Message-ID: I did a debug build of clang using clang. That found some simple bugs in the filename handling that I have fixed. A clang built with this patch is 615815105 has bytes, one built without has 630301465. That is, we save 13.8 MB on the line tables! Cheers, Rafael -------------- next part -------------- A non-text attachment was scrubbed... Name: loc.patch Type: text/x-diff Size: 23416 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101117/f30ce1a3/attachment.bin From gohman at apple.com Wed Nov 17 12:02:24 2010 From: gohman at apple.com (Dan Gohman) Date: Wed, 17 Nov 2010 10:02:24 -0800 Subject: [llvm-commits] [llvm] r119455 - in /llvm/trunk: include/llvm/Analysis/ScalarEvolution.h include/llvm/Support/ConstantRange.h lib/Analysis/ScalarEvolution.cpp In-Reply-To: <1F328508-C9F4-4BDF-A4C8-7DD9409DA4F4@apple.com> References: <20101117024444.9134E2A6C12C@llvm.org> <4CE3626D.3040502@mxc.ca> <1F328508-C9F4-4BDF-A4C8-7DD9409DA4F4@apple.com> Message-ID: <792A29BE-EAEE-4D79-9980-F1DF6FD470CF@apple.com> On Nov 16, 2010, at 9:42 PM, Chris Lattner wrote: > > On Nov 16, 2010, at 9:04 PM, Nick Lewycky wrote: > >> Dan Gohman wrote: >>> Modified: llvm/trunk/include/llvm/Support/ConstantRange.h >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/ConstantRange.h?rev=119455&r1=119454&r2=119455&view=diff >>> === >>> === >>> === >>> === >>> ================================================================== >>> --- llvm/trunk/include/llvm/Support/ConstantRange.h (original) >>> +++ llvm/trunk/include/llvm/Support/ConstantRange.h Tue Nov 16 >>> 20:44:44 2010 >>> @@ -47,6 +47,9 @@ >>> /// >>> explicit ConstantRange(uint32_t BitWidth, bool isFullSet = true); >>> >>> + /// Default constructor that creates an uninitialized >>> ConstantRange. >>> + ConstantRange() {} >>> + >> >> Ugh. >> >> If you're going to do this, could we make it at least initialize >> itself >> to a known "uninitialized" state, even if in DEBUG mode only? Any >> value >> where L == U but not full or empty will do. The operations would all >> then start with a debugInitialized() call whose implementation is #if >> 0'd to nothing in an optimized build. Does that sound reasonable? Yes, I'll take a look. > Why not have a static getUninitRange() method or something? Why are > uninit ranges useful? Operator[] on DenseMap, std::map, etc. is convenient, and it requires a default ctor. Perhaps it would be better to avoid this though. Dan From anton at korobeynikov.info Wed Nov 17 12:36:55 2010 From: anton at korobeynikov.info (Anton Korobeynikov) Date: Wed, 17 Nov 2010 21:36:55 +0300 Subject: [llvm-commits] [patch] Use .loc in codegen In-Reply-To: References: Message-ID: Hi Rafael, > I did a debug build of clang using clang. That found some simple bugs > in the filename handling that I have fixed. A clang built with this > patch is 615815105 has bytes, one built without has 630301465. That > is, we save 13.8 MB on the line tables! Is there some way to make sure that nothing was actually lost in these 13 Mb? :) -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University From rafael.espindola at gmail.com Wed Nov 17 12:43:36 2010 From: rafael.espindola at gmail.com (=?UTF-8?Q?Rafael_Esp=C3=ADndola?=) Date: Wed, 17 Nov 2010 13:43:36 -0500 Subject: [llvm-commits] [patch] Use .loc in codegen In-Reply-To: References: Message-ID: > Is there some way to make sure that nothing was actually lost in these 13 Mb? :) I tried the basic: $ gdb Debug+Asserts/bin/clang breakpoints, next and step work as expected. The assembly output also has .loc directives that look correct. Without this patch we use DW_LNE_set_address for every address change, so that is probably when all those 13 MB were going. > -- > With best regards, Anton Korobeynikov > Faculty of Mathematics and Mechanics, Saint Petersburg State University > Cheers, Rafael From fvbommel at gmail.com Wed Nov 17 13:08:48 2010 From: fvbommel at gmail.com (Frits van Bommel) Date: Wed, 17 Nov 2010 20:08:48 +0100 Subject: [llvm-commits] [llvm] r119510 - in /llvm/trunk: include/llvm/MC/MCStreamer.h lib/MC/CMakeLists.txt lib/MC/MCPureStreamer.cpp In-Reply-To: <20101117160647.3D9532A6C12C@llvm.org> References: <20101117160647.3D9532A6C12C@llvm.org> Message-ID: On Wed, Nov 17, 2010 at 5:06 PM, Daniel Dunbar wrote: > +void MCPureStreamer::InitSections() { > + ?// FIMXE: To what!? Your FIXME marker needs fixing :). From benny.kra at googlemail.com Wed Nov 17 13:11:46 2010 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Wed, 17 Nov 2010 19:11:46 -0000 Subject: [llvm-commits] [llvm] r119538 - in /llvm/trunk: lib/Transforms/InstCombine/InstCombineMulDivRem.cpp test/Transforms/InstCombine/rem.ll Message-ID: <20101117191146.B0D862A6C12C@llvm.org> Author: d0k Date: Wed Nov 17 13:11:46 2010 New Revision: 119538 URL: http://llvm.org/viewvc/llvm-project?rev=119538&view=rev Log: InstCombine: Add a missing irem identity (X % X -> 0). Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp llvm/trunk/test/Transforms/InstCombine/rem.ll Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp?rev=119538&r1=119537&r2=119538&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp Wed Nov 17 13:11:46 2010 @@ -551,6 +551,10 @@ if (Instruction *common = commonRemTransforms(I)) return common; + // X % X == 0 + if (Op0 == Op1) + return ReplaceInstUsesWith(I, Constant::getNullValue(I.getType())); + // 0 % X == 0 for integer, we don't need to preserve faults! if (Constant *LHS = dyn_cast(Op0)) if (LHS->isNullValue()) Modified: llvm/trunk/test/Transforms/InstCombine/rem.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/rem.ll?rev=119538&r1=119537&r2=119538&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/rem.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/rem.ll Wed Nov 17 13:11:46 2010 @@ -81,3 +81,8 @@ %tmp.5 = srem i32 %tmp.1, 2 ret i32 %tmp.5 } + +define i32 @test13(i32 %i) { + %x = srem i32 %i, %i + ret i32 %x +} From dpatel at apple.com Wed Nov 17 13:16:02 2010 From: dpatel at apple.com (Devang Patel) Date: Wed, 17 Nov 2010 11:16:02 -0800 Subject: [llvm-commits] [patch] Use .loc in codegen In-Reply-To: References: Message-ID: On Nov 17, 2010, at 10:43 AM, Rafael Esp?ndola wrote: >> Is there some way to make sure that nothing was actually lost in these 13 Mb? :) > > I tried the basic: > > $ gdb Debug+Asserts/bin/clang > > breakpoints, next and step work as expected. The assembly output also > has .loc directives that look correct. > > Without this patch we use DW_LNE_set_address for every address change, > so that is probably when all those 13 MB were going. Note, this patch relies on fresh .loc/.file support by MCStreamer. First, we need gdb testsuite results with and without this patch to ensure correctness of debug info. Can you get numbers for your platform (using clang as the compiler)? - Devang From isanbard at gmail.com Wed Nov 17 13:16:21 2010 From: isanbard at gmail.com (Bill Wendling) Date: Wed, 17 Nov 2010 19:16:21 -0000 Subject: [llvm-commits] [llvm] r119539 - /llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Message-ID: <20101117191621.2648B2A6C12C@llvm.org> Author: void Date: Wed Nov 17 13:16:20 2010 New Revision: 119539 URL: http://llvm.org/viewvc/llvm-project?rev=119539&view=rev Log: Add missing opcodes now that this function's used in more than one place. Modified: llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Modified: llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp?rev=119539&r1=119538&r2=119539&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Wed Nov 17 13:16:20 2010 @@ -213,31 +213,51 @@ switch (Opcode) { default: llvm_unreachable("Unhandled opcode!"); case ARM::LDMIA: + case ARM::LDMIA_UPD: case ARM::STMIA: + case ARM::STMIA_UPD: case ARM::t2LDMIA: + case ARM::t2LDMIA_UPD: case ARM::t2STMIA: + case ARM::t2STMIA_UPD: case ARM::VLDMSIA: + case ARM::VLDMSIA_UPD: case ARM::VSTMSIA: + case ARM::VSTMSIA_UPD: case ARM::VLDMDIA: + case ARM::VLDMDIA_UPD: case ARM::VSTMDIA: + case ARM::VSTMDIA_UPD: return ARM_AM::ia; case ARM::LDMDA: + case ARM::LDMDA_UPD: case ARM::STMDA: + case ARM::STMDA_UPD: return ARM_AM::da; case ARM::LDMDB: + case ARM::LDMDB_UPD: case ARM::STMDB: + case ARM::STMDB_UPD: case ARM::t2LDMDB: + case ARM::t2LDMDB_UPD: case ARM::t2STMDB: + case ARM::t2STMDB_UPD: case ARM::VLDMSDB: + case ARM::VLDMSDB_UPD: case ARM::VSTMSDB: + case ARM::VSTMSDB_UPD: case ARM::VLDMDDB: + case ARM::VLDMDDB_UPD: case ARM::VSTMDDB: + case ARM::VSTMDDB_UPD: return ARM_AM::db; case ARM::LDMIB: + case ARM::LDMIB_UPD: case ARM::STMIB: + case ARM::STMIB_UPD: return ARM_AM::ib; } From grosbach at apple.com Wed Nov 17 13:30:11 2010 From: grosbach at apple.com (Jim Grosbach) Date: Wed, 17 Nov 2010 19:30:11 -0000 Subject: [llvm-commits] [llvm] r119542 - /llvm/trunk/lib/MC/MCExpr.cpp Message-ID: <20101117193011.94FD42A6C12C@llvm.org> Author: grosbach Date: Wed Nov 17 13:30:11 2010 New Revision: 119542 URL: http://llvm.org/viewvc/llvm-project?rev=119542&view=rev Log: Fix typo. Modified: llvm/trunk/lib/MC/MCExpr.cpp Modified: llvm/trunk/lib/MC/MCExpr.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCExpr.cpp?rev=119542&r1=119541&r2=119542&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCExpr.cpp (original) +++ llvm/trunk/lib/MC/MCExpr.cpp Wed Nov 17 13:30:11 2010 @@ -204,7 +204,7 @@ case VK_ARM_GOTOFF: return "(GOTOFF)"; case VK_ARM_TPOFF: return "(tpoff)"; case VK_ARM_GOTTPOFF: return "(gottpoff)"; - case VK_ARM_TLSGD: return "(tldgd)"; + case VK_ARM_TLSGD: return "(tlsgd)"; case VK_PPC_TOC: return "toc"; case VK_PPC_HA16: return "ha16"; case VK_PPC_LO16: return "lo16"; From sabre at nondot.org Wed Nov 17 13:47:21 2010 From: sabre at nondot.org (Chris Lattner) Date: Wed, 17 Nov 2010 19:47:21 -0000 Subject: [llvm-commits] [llvm] r119544 - /llvm/trunk/docs/CodingStandards.html Message-ID: <20101117194721.11FF92A6C12C@llvm.org> Author: lattner Date: Wed Nov 17 13:47:20 2010 New Revision: 119544 URL: http://llvm.org/viewvc/llvm-project?rev=119544&view=rev Log: add some justification for "using namespace llvm;" Modified: llvm/trunk/docs/CodingStandards.html Modified: llvm/trunk/docs/CodingStandards.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CodingStandards.html?rev=119544&r1=119543&r2=119544&view=diff ============================================================================== --- llvm/trunk/docs/CodingStandards.html (original) +++ llvm/trunk/docs/CodingStandards.html Wed Nov 17 13:47:20 2010 @@ -914,11 +914,13 @@

        The exception to the general rule (i.e. it's not an exception for the std namespace) is for implementation files. For example, all of the code in the LLVM project implements code that lives in the 'llvm' namespace. -As such, it is ok, and actually clearer, for the .cpp files to have a 'using -namespace llvm' directive at their top, after the #includes. The -general form of this rule is that any .cpp file that implements code in any -namespace may use that namespace (and its parents'), but should not use any -others.

        +As such, it is ok, and actually clearer, for the .cpp files to have a +'using namespace llvm' directive at their top, after the +#includes. This reduces indentation in the body of the file for source +editors that indent based on braces, and keeps the conceptual context cleaner. +The general form of this rule is that any .cpp file that implements +code in any namespace may use that namespace (and its parents'), but should not +use any others.

        From resistor at mac.com Wed Nov 17 13:57:38 2010 From: resistor at mac.com (Owen Anderson) Date: Wed, 17 Nov 2010 19:57:38 -0000 Subject: [llvm-commits] [llvm] r119546 - in /llvm/trunk: lib/Target/ARM/ARMInstrThumb2.td test/MC/ARM/thumb2.s Message-ID: <20101117195738.8C4E82A6C12C@llvm.org> Author: resistor Date: Wed Nov 17 13:57:38 2010 New Revision: 119546 URL: http://llvm.org/viewvc/llvm-project?rev=119546&view=rev Log: More miscellaneous Thumb2 encodings. Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td llvm/trunk/test/MC/ARM/thumb2.s Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=119546&r1=119545&r2=119546&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Wed Nov 17 13:57:38 2010 @@ -1771,19 +1771,27 @@ // And Miscellaneous operations -- for disassembly only class T2I_pam op22_20, bits<4> op7_4, string opc, list pat = [/* For disassembly only; pattern left blank */]> - : T2I<(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b), NoItinerary, opc, - "\t$dst, $a, $b", pat> { + : T2I<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), NoItinerary, opc, + "\t$Rd, $Rn, $Rm", pat> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0101; let Inst{22-20} = op22_20; let Inst{15-12} = 0b1111; let Inst{7-4} = op7_4; + + bits<4> Rd; + bits<4> Rn; + bits<4> Rm; + + let Inst{11-8} = Rd{3-0}; + let Inst{19-16} = Rn{3-0}; + let Inst{3-0} = Rm{3-0}; } // Saturating add/subtract -- for disassembly only def t2QADD : T2I_pam<0b000, 0b1000, "qadd", - [(set rGPR:$dst, (int_arm_qadd rGPR:$a, rGPR:$b))]>; + [(set rGPR:$Rd, (int_arm_qadd rGPR:$Rn, rGPR:$Rm))]>; def t2QADD16 : T2I_pam<0b001, 0b0001, "qadd16">; def t2QADD8 : T2I_pam<0b000, 0b0001, "qadd8">; def t2QASX : T2I_pam<0b010, 0b0001, "qasx">; @@ -1791,7 +1799,7 @@ def t2QDSUB : T2I_pam<0b000, 0b1011, "qdsub">; def t2QSAX : T2I_pam<0b110, 0b0001, "qsax">; def t2QSUB : T2I_pam<0b000, 0b1010, "qsub", - [(set rGPR:$dst, (int_arm_qsub rGPR:$a, rGPR:$b))]>; + [(set rGPR:$Rd, (int_arm_qsub rGPR:$Rn, rGPR:$Rm))]>; def t2QSUB16 : T2I_pam<0b101, 0b0001, "qsub16">; def t2QSUB8 : T2I_pam<0b100, 0b0001, "qsub8">; def t2UQADD16 : T2I_pam<0b001, 0b0101, "uqadd16">; @@ -1838,14 +1846,33 @@ NoItinerary, "usad8", "\t$dst, $a, $b", []> { let Inst{15-12} = 0b1111; } -def t2USADA8 : T2I_mac<0, 0b111, 0b0000, (outs rGPR:$dst), - (ins rGPR:$a, rGPR:$b, rGPR:$acc), NoItinerary, "usada8", - "\t$dst, $a, $b, $acc", []>; +def t2USADA8 : T2I_mac<0, 0b111, 0b0000, (outs rGPR:$Rd), + (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), NoItinerary, + "usada8", "\t$Rd, $Rn, $Rm, $Ra", []> { + bits<4> Ra; + let Inst{15-12} = Ra{3-0}; +} // Signed/Unsigned saturate -- for disassembly only -def t2SSAT: T2I<(outs rGPR:$dst), (ins i32imm:$bit_pos, rGPR:$a, shift_imm:$sh), - NoItinerary, "ssat", "\t$dst, $bit_pos, $a$sh", +class T2SatI pattern> + : T2I { + bits<4> Rd; + bits<4> Rn; + bits<5> sat_imm; + bits<7> sh; + + let Inst{11-8} = Rd{3-0}; + let Inst{19-16} = Rn{3-0}; + let Inst{4-0} = sat_imm{4-0}; + let Inst{21} = sh{6}; + let Inst{14-12} = sh{4-2}; + let Inst{7-6} = sh{1-0}; +} + +def t2SSAT: T2I<(outs rGPR:$Rd), (ins i32imm:$sat_imm, rGPR:$Rn, shift_imm:$sh), + NoItinerary, "ssat", "\t$Rd, $sat_imm, $Rn$sh", [/* For disassembly only; pattern left blank */]> { let Inst{31-27} = 0b11110; let Inst{25-22} = 0b1100; @@ -1853,8 +1880,8 @@ let Inst{15} = 0; } -def t2SSAT16: T2I<(outs rGPR:$dst), (ins i32imm:$bit_pos, rGPR:$a), NoItinerary, - "ssat16", "\t$dst, $bit_pos, $a", +def t2SSAT16: T2I<(outs rGPR:$Rd), (ins i32imm:$sat_imm, rGPR:$Rn), NoItinerary, + "ssat16", "\t$Rd, $sat_imm, $Rn", [/* For disassembly only; pattern left blank */]> { let Inst{31-27} = 0b11110; let Inst{25-22} = 0b1100; @@ -1899,9 +1926,9 @@ defm t2ROR : T2I_sh_ir<0b11, "ror", BinOpFrag<(rotr node:$LHS, node:$RHS)>>; let Uses = [CPSR] in { -def t2RRX : T2sI<(outs rGPR:$dst), (ins rGPR:$src), IIC_iMOVsi, - "rrx", "\t$dst, $src", - [(set rGPR:$dst, (ARMrrx rGPR:$src))]> { +def t2RRX : T2sTwoReg<(outs rGPR:$Rd), (ins rGPR:$Rm), IIC_iMOVsi, + "rrx", "\t$Rd, $Rm", + [(set rGPR:$Rd, (ARMrrx rGPR:$Rm))]> { let Inst{31-27} = 0b11101; let Inst{26-25} = 0b01; let Inst{24-21} = 0b0010; Modified: llvm/trunk/test/MC/ARM/thumb2.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/thumb2.s?rev=119546&r1=119545&r2=119546&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/thumb2.s (original) +++ llvm/trunk/test/MC/ARM/thumb2.s Wed Nov 17 13:57:38 2010 @@ -48,3 +48,7 @@ movt r1, #4267 @ CHECK: mov.w r0, #66846720 @ encoding: [0x7f,0x70,0x4f,0xf0] mov.w r0, #66846720 + +@ CHECK: rrx r0, r0 @ encoding: [0x30,0x00,0x4f,0xea] + rrx r0, r0 + From rafael.espindola at gmail.com Wed Nov 17 14:03:55 2010 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Wed, 17 Nov 2010 20:03:55 -0000 Subject: [llvm-commits] [llvm] r119547 - in /llvm/trunk: include/llvm/MC/MCSection.h include/llvm/MC/MCSectionCOFF.h include/llvm/MC/MCSectionELF.h include/llvm/MC/MCSectionMachO.h include/llvm/Target/TargetAsmBackend.h lib/MC/MCAssembler.cpp lib/MC/MCSectionCOFF.cpp lib/MC/MCSectionELF.cpp lib/MC/MCSectionMachO.cpp lib/MC/MachObjectWriter.cpp lib/Target/ARM/ARMAsmBackend.cpp lib/Target/MBlaze/MBlazeAsmBackend.cpp lib/Target/PowerPC/PPCAsmBackend.cpp lib/Target/X86/X86AsmBackend.cpp Message-ID: <20101117200355.1C1DE2A6C12C@llvm.org> Author: rafael Date: Wed Nov 17 14:03:54 2010 New Revision: 119547 URL: http://llvm.org/viewvc/llvm-project?rev=119547&view=rev Log: make isVirtualSection a virtual method on MCSection. Chris' suggestion. Modified: llvm/trunk/include/llvm/MC/MCSection.h llvm/trunk/include/llvm/MC/MCSectionCOFF.h llvm/trunk/include/llvm/MC/MCSectionELF.h llvm/trunk/include/llvm/MC/MCSectionMachO.h llvm/trunk/include/llvm/Target/TargetAsmBackend.h llvm/trunk/lib/MC/MCAssembler.cpp llvm/trunk/lib/MC/MCSectionCOFF.cpp llvm/trunk/lib/MC/MCSectionELF.cpp llvm/trunk/lib/MC/MCSectionMachO.cpp llvm/trunk/lib/MC/MachObjectWriter.cpp llvm/trunk/lib/Target/ARM/ARMAsmBackend.cpp llvm/trunk/lib/Target/MBlaze/MBlazeAsmBackend.cpp llvm/trunk/lib/Target/PowerPC/PPCAsmBackend.cpp llvm/trunk/lib/Target/X86/X86AsmBackend.cpp Modified: llvm/trunk/include/llvm/MC/MCSection.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCSection.h?rev=119547&r1=119546&r2=119547&view=diff ============================================================================== --- llvm/trunk/include/llvm/MC/MCSection.h (original) +++ llvm/trunk/include/llvm/MC/MCSection.h Wed Nov 17 14:03:54 2010 @@ -64,6 +64,10 @@ // "optimized nops" to fill instead of 0s. virtual bool UseCodeAlign() const = 0; + /// isVirtualSection - Check whether this section is "virtual", that is + /// has no actual object file contents. + virtual bool isVirtualSection() const = 0; + static bool classof(const MCSection *) { return true; } }; Modified: llvm/trunk/include/llvm/MC/MCSectionCOFF.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCSectionCOFF.h?rev=119547&r1=119546&r2=119547&view=diff ============================================================================== --- llvm/trunk/include/llvm/MC/MCSectionCOFF.h (original) +++ llvm/trunk/include/llvm/MC/MCSectionCOFF.h Wed Nov 17 14:03:54 2010 @@ -56,6 +56,7 @@ virtual void PrintSwitchToSection(const MCAsmInfo &MAI, raw_ostream &OS) const; virtual bool UseCodeAlign() const; + virtual bool isVirtualSection() const; static bool classof(const MCSection *S) { return S->getVariant() == SV_COFF; Modified: llvm/trunk/include/llvm/MC/MCSectionELF.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCSectionELF.h?rev=119547&r1=119546&r2=119547&view=diff ============================================================================== --- llvm/trunk/include/llvm/MC/MCSectionELF.h (original) +++ llvm/trunk/include/llvm/MC/MCSectionELF.h Wed Nov 17 14:03:54 2010 @@ -188,6 +188,7 @@ void PrintSwitchToSection(const MCAsmInfo &MAI, raw_ostream &OS) const; virtual bool UseCodeAlign() const; + virtual bool isVirtualSection() const; /// isBaseAddressKnownZero - We know that non-allocatable sections (like /// debug info) have a base of zero. Modified: llvm/trunk/include/llvm/MC/MCSectionMachO.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCSectionMachO.h?rev=119547&r1=119546&r2=119547&view=diff ============================================================================== --- llvm/trunk/include/llvm/MC/MCSectionMachO.h (original) +++ llvm/trunk/include/llvm/MC/MCSectionMachO.h Wed Nov 17 14:03:54 2010 @@ -166,6 +166,7 @@ virtual void PrintSwitchToSection(const MCAsmInfo &MAI, raw_ostream &OS) const; virtual bool UseCodeAlign() const; + virtual bool isVirtualSection() const; static bool classof(const MCSection *S) { return S->getVariant() == SV_MachO; Modified: llvm/trunk/include/llvm/Target/TargetAsmBackend.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetAsmBackend.h?rev=119547&r1=119546&r2=119547&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetAsmBackend.h (original) +++ llvm/trunk/include/llvm/Target/TargetAsmBackend.h Wed Nov 17 14:03:54 2010 @@ -86,10 +86,6 @@ return true; } - /// isVirtualSection - Check whether the given section is "virtual", that is - /// has no actual object file contents. - virtual bool isVirtualSection(const MCSection &Section) const = 0; - /// getPointerSize - Get the pointer size in bytes. virtual unsigned getPointerSize() const = 0; Modified: llvm/trunk/lib/MC/MCAssembler.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCAssembler.cpp?rev=119547&r1=119546&r2=119547&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCAssembler.cpp (original) +++ llvm/trunk/lib/MC/MCAssembler.cpp Wed Nov 17 14:03:54 2010 @@ -54,10 +54,10 @@ { // Compute the section layout order. Virtual sections must go last. for (MCAssembler::iterator it = Asm.begin(), ie = Asm.end(); it != ie; ++it) - if (!Asm.getBackend().isVirtualSection(it->getSection())) + if (!it->getSection().isVirtualSection()) SectionOrder.push_back(&*it); for (MCAssembler::iterator it = Asm.begin(), ie = Asm.end(); it != ie; ++it) - if (Asm.getBackend().isVirtualSection(it->getSection())) + if (it->getSection().isVirtualSection()) SectionOrder.push_back(&*it); } @@ -157,7 +157,7 @@ uint64_t MCAsmLayout::getSectionFileSize(const MCSectionData *SD) const { // Virtual sections have no file size. - if (getAssembler().getBackend().isVirtualSection(SD->getSection())) + if (SD->getSection().isVirtualSection()) return 0; // Otherwise, the file size is the same as the address space size. @@ -541,7 +541,7 @@ const MCAsmLayout &Layout, MCObjectWriter *OW) const { // Ignore virtual sections. - if (getBackend().isVirtualSection(SD->getSection())) { + if (SD->getSection().isVirtualSection()) { assert(Layout.getSectionFileSize(SD) == 0 && "Invalid size for section!"); // Check that contents are only things legal inside a virtual section. @@ -630,7 +630,7 @@ continue; // Ignore virtual sections, they don't cause file size modifications. - if (getBackend().isVirtualSection(SD->getSection())) + if (SD->getSection().isVirtualSection()) continue; // Otherwise, create a new align fragment at the end of the previous Modified: llvm/trunk/lib/MC/MCSectionCOFF.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCSectionCOFF.cpp?rev=119547&r1=119546&r2=119547&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCSectionCOFF.cpp (original) +++ llvm/trunk/lib/MC/MCSectionCOFF.cpp Wed Nov 17 14:03:54 2010 @@ -78,3 +78,7 @@ bool MCSectionCOFF::UseCodeAlign() const { return getKind().isText(); } + +bool MCSectionCOFF::isVirtualSection() const { + return getCharacteristics() & COFF::IMAGE_SCN_CNT_UNINITIALIZED_DATA; +} Modified: llvm/trunk/lib/MC/MCSectionELF.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCSectionELF.cpp?rev=119547&r1=119546&r2=119547&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCSectionELF.cpp (original) +++ llvm/trunk/lib/MC/MCSectionELF.cpp Wed Nov 17 14:03:54 2010 @@ -107,6 +107,10 @@ return getFlags() & MCSectionELF::SHF_EXECINSTR; } +bool MCSectionELF::isVirtualSection() const { + return getType() == MCSectionELF::SHT_NOBITS; +} + // HasCommonSymbols - True if this section holds common symbols, this is // indicated on the ELF object file by a symbol with SHN_COMMON section // header index. Modified: llvm/trunk/lib/MC/MCSectionMachO.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCSectionMachO.cpp?rev=119547&r1=119546&r2=119547&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCSectionMachO.cpp (original) +++ llvm/trunk/lib/MC/MCSectionMachO.cpp Wed Nov 17 14:03:54 2010 @@ -152,6 +152,12 @@ return hasAttribute(MCSectionMachO::S_ATTR_PURE_INSTRUCTIONS); } +bool MCSectionMachO::isVirtualSection() const { + return (getType() == MCSectionMachO::S_ZEROFILL || + getType() == MCSectionMachO::S_GB_ZEROFILL || + getType() == MCSectionMachO::S_THREAD_LOCAL_ZEROFILL); +} + /// StripSpaces - This removes leading and trailing spaces from the StringRef. static void StripSpaces(StringRef &Str) { while (!Str.empty() && isspace(Str[0])) Modified: llvm/trunk/lib/MC/MachObjectWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MachObjectWriter.cpp?rev=119547&r1=119546&r2=119547&view=diff ============================================================================== --- llvm/trunk/lib/MC/MachObjectWriter.cpp (original) +++ llvm/trunk/lib/MC/MachObjectWriter.cpp Wed Nov 17 14:03:54 2010 @@ -371,7 +371,7 @@ uint64_t SectionSize = Layout.getSectionSize(&SD); // The offset is unused for virtual sections. - if (Asm.getBackend().isVirtualSection(SD.getSection())) { + if (SD.getSection().isVirtualSection()) { assert(Layout.getSectionFileSize(&SD) == 0 && "Invalid file size!"); FileOffset = 0; } @@ -1191,7 +1191,7 @@ VMSize = std::max(VMSize, Address + Size); - if (Asm.getBackend().isVirtualSection(SD.getSection())) + if (SD.getSection().isVirtualSection()) continue; SectionDataSize = std::max(SectionDataSize, Address + Size); Modified: llvm/trunk/lib/Target/ARM/ARMAsmBackend.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAsmBackend.cpp?rev=119547&r1=119546&r2=119547&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMAsmBackend.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMAsmBackend.cpp Wed Nov 17 14:03:54 2010 @@ -83,11 +83,6 @@ void ApplyFixup(const MCFixup &Fixup, MCDataFragment &DF, uint64_t Value) const; - bool isVirtualSection(const MCSection &Section) const { - const MCSectionELF &SE = static_cast(Section); - return SE.getType() == MCSectionELF::SHT_NOBITS; - } - MCObjectWriter *createObjectWriter(raw_ostream &OS) const { return createELFObjectWriter(OS, /*Is64Bit=*/false, OSType, ELF::EM_ARM, @@ -118,13 +113,6 @@ void ApplyFixup(const MCFixup &Fixup, MCDataFragment &DF, uint64_t Value) const; - bool isVirtualSection(const MCSection &Section) const { - const MCSectionMachO &SMO = static_cast(Section); - return (SMO.getType() == MCSectionMachO::S_ZEROFILL || - SMO.getType() == MCSectionMachO::S_GB_ZEROFILL || - SMO.getType() == MCSectionMachO::S_THREAD_LOCAL_ZEROFILL); - } - MCObjectWriter *createObjectWriter(raw_ostream &OS) const { // FIXME: Subtarget info should be derived. Force v7 for now. return createMachObjectWriter(OS, /*Is64Bit=*/false, MachO::CPUTypeARM, Modified: llvm/trunk/lib/Target/MBlaze/MBlazeAsmBackend.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeAsmBackend.cpp?rev=119547&r1=119546&r2=119547&view=diff ============================================================================== --- llvm/trunk/lib/Target/MBlaze/MBlazeAsmBackend.cpp (original) +++ llvm/trunk/lib/Target/MBlaze/MBlazeAsmBackend.cpp Wed Nov 17 14:03:54 2010 @@ -96,11 +96,6 @@ void ApplyFixup(const MCFixup &Fixup, MCDataFragment &DF, uint64_t Value) const; - bool isVirtualSection(const MCSection &Section) const { - const MCSectionELF &SE = static_cast(Section); - return SE.getType() == MCSectionELF::SHT_NOBITS; - } - MCObjectWriter *createObjectWriter(raw_ostream &OS) const { return createELFObjectWriter(OS, /*Is64Bit=*/false, OSType, ELF::EM_MBLAZE, Modified: llvm/trunk/lib/Target/PowerPC/PPCAsmBackend.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCAsmBackend.cpp?rev=119547&r1=119546&r2=119547&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCAsmBackend.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCAsmBackend.cpp Wed Nov 17 14:03:54 2010 @@ -68,13 +68,6 @@ assert(0 && "UNIMP"); } - bool isVirtualSection(const MCSection &Section) const { - const MCSectionMachO &SMO = static_cast(Section); - return (SMO.getType() == MCSectionMachO::S_ZEROFILL || - SMO.getType() == MCSectionMachO::S_GB_ZEROFILL || - SMO.getType() == MCSectionMachO::S_THREAD_LOCAL_ZEROFILL); - } - MCObjectWriter *createObjectWriter(raw_ostream &OS) const { bool is64 = getPointerSize() == 8; return createMachObjectWriter(OS, /*Is64Bit=*/is64, Modified: llvm/trunk/lib/Target/X86/X86AsmBackend.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86AsmBackend.cpp?rev=119547&r1=119546&r2=119547&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86AsmBackend.cpp (original) +++ llvm/trunk/lib/Target/X86/X86AsmBackend.cpp Wed Nov 17 14:03:54 2010 @@ -289,11 +289,6 @@ const MCSectionELF &ES = static_cast(Section); return ES.getFlags() & MCSectionELF::SHF_MERGE; } - - bool isVirtualSection(const MCSection &Section) const { - const MCSectionELF &SE = static_cast(Section); - return SE.getType() == MCSectionELF::SHT_NOBITS; - } }; class ELFX86_32AsmBackend : public ELFX86AsmBackend { @@ -355,11 +350,6 @@ MCObjectWriter *createObjectWriter(raw_ostream &OS) const { return createWinCOFFObjectWriter(OS, Is64Bit); } - - bool isVirtualSection(const MCSection &Section) const { - const MCSectionCOFF &SE = static_cast(Section); - return SE.getCharacteristics() & COFF::IMAGE_SCN_CNT_UNINITIALIZED_DATA; - } }; class DarwinX86AsmBackend : public X86AsmBackend { @@ -374,13 +364,6 @@ virtual const MCObjectFormat &getObjectFormat() const { return Format; } - - bool isVirtualSection(const MCSection &Section) const { - const MCSectionMachO &SMO = static_cast(Section); - return (SMO.getType() == MCSectionMachO::S_ZEROFILL || - SMO.getType() == MCSectionMachO::S_GB_ZEROFILL || - SMO.getType() == MCSectionMachO::S_THREAD_LOCAL_ZEROFILL); - } }; class DarwinX86_32AsmBackend : public DarwinX86AsmBackend { From evan.cheng at apple.com Wed Nov 17 14:13:28 2010 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 17 Nov 2010 20:13:28 -0000 Subject: [llvm-commits] [llvm] r119548 - in /llvm/trunk: include/llvm/Target/ lib/CodeGen/ lib/Target/ARM/ test/CodeGen/ARM/ test/CodeGen/Thumb2/ utils/TableGen/ Message-ID: <20101117201328.881FB2A6C12C@llvm.org> Author: evancheng Date: Wed Nov 17 14:13:28 2010 New Revision: 119548 URL: http://llvm.org/viewvc/llvm-project?rev=119548&view=rev Log: Remove ARM isel hacks that fold large immediates into a pair of add, sub, and, and xor. The 32-bit move immediates can be hoisted out of loops by machine LICM but the isel hacks were preventing them. Instead, let peephole optimization pass recognize registers that are defined by immediates and the ARM target hook will fold the immediates in. Other changes include 1) do not fold and / xor into cmp to isel TST / TEQ instructions if there are multiple uses. This happens when the 'and' is live out, machine sink would have sinked the computation and that ends up pessimizing code. The peephole pass would recognize situations where the 'and' can be toggled to define CPSR and eliminate the comparison anyway. 2) Move peephole pass to after machine LICM, sink, and CSE to avoid blocking important optimizations. rdar://8663787, rdar://8241368 Modified: llvm/trunk/include/llvm/Target/Target.td llvm/trunk/include/llvm/Target/TargetInstrDesc.h llvm/trunk/include/llvm/Target/TargetInstrInfo.h llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h llvm/trunk/lib/Target/ARM/ARMInstrInfo.td llvm/trunk/lib/Target/ARM/ARMInstrThumb.td llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td llvm/trunk/test/CodeGen/ARM/arm-and-tst-peephole.ll llvm/trunk/test/CodeGen/ARM/select_xform.ll llvm/trunk/test/CodeGen/Thumb2/machine-licm.ll llvm/trunk/test/CodeGen/Thumb2/thumb2-mov.ll llvm/trunk/test/CodeGen/Thumb2/thumb2-select_xform.ll llvm/trunk/utils/TableGen/CodeGenInstruction.cpp llvm/trunk/utils/TableGen/CodeGenInstruction.h llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp Modified: llvm/trunk/include/llvm/Target/Target.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/Target.td?rev=119548&r1=119547&r2=119548&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/Target.td (original) +++ llvm/trunk/include/llvm/Target/Target.td Wed Nov 17 14:13:28 2010 @@ -199,6 +199,7 @@ bit isBranch = 0; // Is this instruction a branch instruction? bit isIndirectBranch = 0; // Is this instruction an indirect branch? bit isCompare = 0; // Is this instruction a comparison instruction? + bit isMoveImm = 0; // Is this instruction a move immediate instruction? bit isBarrier = 0; // Can control flow fall through this instruction? bit isCall = 0; // Is this instruction a call instruction? bit canFoldAsLoad = 0; // Can this be folded as a simple memory operand? Modified: llvm/trunk/include/llvm/Target/TargetInstrDesc.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrDesc.h?rev=119548&r1=119547&r2=119548&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetInstrDesc.h (original) +++ llvm/trunk/include/llvm/Target/TargetInstrDesc.h Wed Nov 17 14:13:28 2010 @@ -103,13 +103,14 @@ Terminator, Branch, IndirectBranch, - Predicable, - NotDuplicable, Compare, + MoveImm, DelaySlot, FoldableAsLoad, MayLoad, MayStore, + Predicable, + NotDuplicable, UnmodeledSideEffects, Commutable, ConvertibleTo3Addr, @@ -352,6 +353,12 @@ return Flags & (1 << TID::Compare); } + /// isMoveImmediate - Return true if this instruction is a move immediate + /// (including conditional moves) instruction. + bool isMoveImmediate() const { + return Flags & (1 << TID::MoveImm); + } + /// isNotDuplicable - Return true if this instruction cannot be safely /// duplicated. For example, if the instruction has a unique labels attached /// to it, duplicating it would cause multiple definition errors. Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrInfo.h?rev=119548&r1=119547&r2=119548&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original) +++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Wed Nov 17 14:13:28 2010 @@ -608,6 +608,13 @@ const MachineRegisterInfo *MRI) const { return false; } + + /// FoldImmediate - 'Reg' is known to be defined by a move immediate + /// instruction, try to fold the immediate into the use instruction. + virtual bool FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI, + unsigned Reg, MachineRegisterInfo *MRI) const { + return false; + } /// getNumMicroOps - Return the number of u-operations the given machine /// instruction will be decoded to on the target cpu. Modified: llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp?rev=119548&r1=119547&r2=119548&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp (original) +++ llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp Wed Nov 17 14:13:28 2010 @@ -365,13 +365,15 @@ PM.add(createDeadMachineInstructionElimPass()); printAndVerify(PM, "After codegen DCE pass"); - PM.add(createPeepholeOptimizerPass()); if (!DisableMachineLICM) PM.add(createMachineLICMPass()); PM.add(createMachineCSEPass()); if (!DisableMachineSink) PM.add(createMachineSinkingPass()); printAndVerify(PM, "After Machine LICM, CSE and Sinking passes"); + + PM.add(createPeepholeOptimizerPass()); + printAndVerify(PM, "After codegen peephole optimization pass"); } // Pre-ra tail duplication. Modified: llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp?rev=119548&r1=119547&r2=119548&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp (original) +++ llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp Wed Nov 17 14:13:28 2010 @@ -41,7 +41,9 @@ #include "llvm/Target/TargetInstrInfo.h" #include "llvm/Target/TargetRegisterInfo.h" #include "llvm/Support/CommandLine.h" +#include "llvm/ADT/DenseMap.h" #include "llvm/ADT/SmallPtrSet.h" +#include "llvm/ADT/SmallSet.h" #include "llvm/ADT/Statistic.h" using namespace llvm; @@ -56,6 +58,7 @@ STATISTIC(NumReuse, "Number of extension results reused"); STATISTIC(NumEliminated, "Number of compares eliminated"); +STATISTIC(NumImmFold, "Number of move immediate foled"); namespace { class PeepholeOptimizer : public MachineFunctionPass { @@ -85,6 +88,12 @@ bool OptimizeCmpInstr(MachineInstr *MI, MachineBasicBlock *MBB); bool OptimizeExtInstr(MachineInstr *MI, MachineBasicBlock *MBB, SmallPtrSet &LocalMIs); + bool isMoveImmediate(MachineInstr *MI, + SmallSet &ImmDefRegs, + DenseMap &ImmDefMIs); + bool FoldImmediate(MachineInstr *MI, MachineBasicBlock *MBB, + SmallSet &ImmDefRegs, + DenseMap &ImmDefMIs); }; } @@ -257,6 +266,49 @@ return false; } +bool PeepholeOptimizer::isMoveImmediate(MachineInstr *MI, + SmallSet &ImmDefRegs, + DenseMap &ImmDefMIs) { + const TargetInstrDesc &TID = MI->getDesc(); + if (!TID.isMoveImmediate()) + return false; + if (TID.getNumDefs() != 1) + return false; + unsigned Reg = MI->getOperand(0).getReg(); + if (TargetRegisterInfo::isVirtualRegister(Reg)) { + ImmDefMIs.insert(std::make_pair(Reg, MI)); + ImmDefRegs.insert(Reg); + return true; + } + + return false; +} + +/// FoldImmediate - Try folding register operands that are defined by move +/// immediate instructions, i.e. a trivial constant folding optimization, if +/// and only if the def and use are in the same BB. +bool PeepholeOptimizer::FoldImmediate(MachineInstr *MI, MachineBasicBlock *MBB, + SmallSet &ImmDefRegs, + DenseMap &ImmDefMIs) { + for (unsigned i = 0, e = MI->getDesc().getNumOperands(); i != e; ++i) { + MachineOperand &MO = MI->getOperand(i); + if (!MO.isReg() || MO.isDef()) + continue; + unsigned Reg = MO.getReg(); + if (!Reg || TargetRegisterInfo::isPhysicalRegister(Reg)) + continue; + if (ImmDefRegs.count(Reg) == 0) + continue; + DenseMap::iterator II = ImmDefMIs.find(Reg); + assert(II != ImmDefMIs.end()); + if (TII->FoldImmediate(MI, II->second, Reg, MRI)) { + ++NumImmFold; + return true; + } + } + return false; +} + bool PeepholeOptimizer::runOnMachineFunction(MachineFunction &MF) { if (DisablePeephole) return false; @@ -269,9 +321,15 @@ bool Changed = false; SmallPtrSet LocalMIs; + SmallSet ImmDefRegs; + DenseMap ImmDefMIs; for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) { MachineBasicBlock *MBB = &*I; + + bool SeenMoveImm = false; LocalMIs.clear(); + ImmDefRegs.clear(); + ImmDefMIs.clear(); for (MachineBasicBlock::iterator MII = I->begin(), MIE = I->end(); MII != MIE; ) { @@ -283,8 +341,12 @@ if (MI->getDesc().isCompare()) { Changed |= OptimizeCmpInstr(MI, MBB); + } else if (isMoveImmediate(MI, ImmDefRegs, ImmDefMIs)) { + SeenMoveImm = true; } else { Changed |= OptimizeExtInstr(MI, MBB, LocalMIs); + if (SeenMoveImm) + Changed |= FoldImmediate(MI, MBB, ImmDefRegs, ImmDefMIs); } } } Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=119548&r1=119547&r2=119548&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Wed Nov 17 14:13:28 2010 @@ -1556,6 +1556,103 @@ return false; } +bool ARMBaseInstrInfo::FoldImmediate(MachineInstr *UseMI, + MachineInstr *DefMI, unsigned Reg, + MachineRegisterInfo *MRI) const { + // Fold large immediates into add, sub, or, xor. + unsigned DefOpc = DefMI->getOpcode(); + if (DefOpc != ARM::t2MOVi32imm && DefOpc != ARM::MOVi32imm) + return false; + if (!DefMI->getOperand(1).isImm()) + // Could be t2MOVi32imm + return false; + + if (!MRI->hasOneNonDBGUse(Reg)) + return false; + + unsigned UseOpc = UseMI->getOpcode(); + unsigned NewUseOpc; + uint32_t ImmVal = (uint32_t)DefMI->getOperand(1).getImm(); + uint32_t SOImmValV1, SOImmValV2; + bool Commute = false; + switch (UseOpc) { + default: return false; + case ARM::SUBrr: + case ARM::ADDrr: + case ARM::ORRrr: + case ARM::EORrr: + case ARM::t2SUBrr: + case ARM::t2ADDrr: + case ARM::t2ORRrr: + case ARM::t2EORrr: { + Commute = UseMI->getOperand(2).getReg() != Reg; + switch (UseOpc) { + default: break; + case ARM::SUBrr: { + if (Commute) + return false; + ImmVal = -ImmVal; + NewUseOpc = ARM::SUBri; + // Fallthrough + } + case ARM::ADDrr: + case ARM::ORRrr: + case ARM::EORrr: { + if (!ARM_AM::isSOImmTwoPartVal(ImmVal)) + return false; + SOImmValV1 = (uint32_t)ARM_AM::getSOImmTwoPartFirst(ImmVal); + SOImmValV2 = (uint32_t)ARM_AM::getSOImmTwoPartSecond(ImmVal); + switch (UseOpc) { + default: break; + case ARM::ADDrr: NewUseOpc = ARM::ADDri; break; + case ARM::ORRrr: NewUseOpc = ARM::ORRri; break; + case ARM::EORrr: NewUseOpc = ARM::EORri; break; + } + break; + } + case ARM::t2SUBrr: { + if (Commute) + return false; + ImmVal = -ImmVal; + NewUseOpc = ARM::t2SUBri; + // Fallthrough + } + case ARM::t2ADDrr: + case ARM::t2ORRrr: + case ARM::t2EORrr: { + if (!ARM_AM::isT2SOImmTwoPartVal(ImmVal)) + return false; + SOImmValV1 = (uint32_t)ARM_AM::getT2SOImmTwoPartFirst(ImmVal); + SOImmValV2 = (uint32_t)ARM_AM::getT2SOImmTwoPartSecond(ImmVal); + switch (UseOpc) { + default: break; + case ARM::t2ADDrr: NewUseOpc = ARM::t2ADDri; break; + case ARM::t2ORRrr: NewUseOpc = ARM::t2ORRri; break; + case ARM::t2EORrr: NewUseOpc = ARM::t2EORri; break; + } + break; + } + } + } + } + + unsigned OpIdx = Commute ? 2 : 1; + unsigned Reg1 = UseMI->getOperand(OpIdx).getReg(); + bool isKill = UseMI->getOperand(OpIdx).isKill(); + unsigned NewReg = MRI->createVirtualRegister(MRI->getRegClass(Reg)); + AddDefaultCC(AddDefaultPred(BuildMI(*UseMI->getParent(), + *UseMI, UseMI->getDebugLoc(), + get(NewUseOpc), NewReg) + .addReg(Reg1, getKillRegState(isKill)) + .addImm(SOImmValV1))); + UseMI->setDesc(get(NewUseOpc)); + UseMI->getOperand(1).setReg(NewReg); + UseMI->getOperand(1).setIsKill(); + UseMI->getOperand(2).ChangeToImmediate(SOImmValV2); + DefMI->eraseFromParent(); + return true; +} + unsigned ARMBaseInstrInfo::getNumMicroOps(const InstrItineraryData *ItinData, const MachineInstr *MI) const { Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h?rev=119548&r1=119547&r2=119548&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h (original) +++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h Wed Nov 17 14:13:28 2010 @@ -346,6 +346,11 @@ int CmpMask, int CmpValue, const MachineRegisterInfo *MRI) const; + /// FoldImmediate - 'Reg' is known to be defined by a move immediate + /// instruction, try to fold the immediate into the use instruction. + virtual bool FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI, + unsigned Reg, MachineRegisterInfo *MRI) const; + virtual unsigned getNumMicroOps(const InstrItineraryData *ItinData, const MachineInstr *MI) const; Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=119548&r1=119547&r2=119548&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Wed Nov 17 14:13:28 2010 @@ -269,6 +269,16 @@ PatFrag<(ops node:$LHS, node:$RHS), (sube node:$LHS, node:$RHS), [{return N->hasAnyUseOfValue(1);}]>; +// An 'and' node with a single use. +def and_su : PatFrag<(ops node:$lhs, node:$rhs), (and node:$lhs, node:$rhs), [{ + return N->hasOneUse(); +}]>; + +// An 'xor' node with a single use. +def xor_su : PatFrag<(ops node:$lhs, node:$rhs), (xor node:$lhs, node:$rhs), [{ + return N->hasOneUse(); +}]>; + //===----------------------------------------------------------------------===// // Operand Definitions. // @@ -1941,7 +1951,7 @@ let Inst{25} = 0; } -let isReMaterializable = 1, isAsCheapAsAMove = 1 in +let isReMaterializable = 1, isAsCheapAsAMove = 1, isMoveImm = 1 in def MOVi : AsI1<0b1101, (outs GPR:$Rd), (ins so_imm:$imm), DPFrm, IIC_iMOVi, "mov", "\t$Rd, $imm", [(set GPR:$Rd, so_imm:$imm)]>, UnaryDP { bits<4> Rd; @@ -1952,7 +1962,7 @@ let Inst{11-0} = imm; } -let isReMaterializable = 1, isAsCheapAsAMove = 1 in +let isReMaterializable = 1, isAsCheapAsAMove = 1, isMoveImm = 1 in def MOVi16 : AI1<0b1000, (outs GPR:$Rd), (ins i32imm:$imm), DPFrm, IIC_iMOVi, "movw", "\t$Rd, $imm", @@ -2510,7 +2520,7 @@ let Inst{15-12} = Rd; let Inst{11-0} = shift; } -let isReMaterializable = 1, isAsCheapAsAMove = 1 in +let isReMaterializable = 1, isAsCheapAsAMove = 1, isMoveImm = 1 in def MVNi : AsI1<0b1111, (outs GPR:$Rd), (ins so_imm:$imm), DPFrm, IIC_iMVNi, "mvn", "\t$Rd, $imm", [(set GPR:$Rd, so_imm_not:$imm)]>,UnaryDP { @@ -2972,10 +2982,10 @@ // Note that TST/TEQ don't set all the same flags that CMP does! defm TST : AI1_cmp_irs<0b1000, "tst", IIC_iTSTi, IIC_iTSTr, IIC_iTSTsr, - BinOpFrag<(ARMcmpZ (and node:$LHS, node:$RHS), 0)>, 1>; + BinOpFrag<(ARMcmpZ (and_su node:$LHS, node:$RHS), 0)>, 1>; defm TEQ : AI1_cmp_irs<0b1001, "teq", IIC_iTSTi, IIC_iTSTr, IIC_iTSTsr, - BinOpFrag<(ARMcmpZ (xor node:$LHS, node:$RHS), 0)>, 1>; + BinOpFrag<(ARMcmpZ (xor_su node:$LHS, node:$RHS), 0)>, 1>; defm CMPz : AI1_cmp_irs<0b1010, "cmp", IIC_iCMPi, IIC_iCMPr, IIC_iCMPsr, @@ -3038,6 +3048,7 @@ let Inst{11-0} = shift; } +let isMoveImm = 1 in def MOVCCi16 : AI1<0b1000, (outs GPR:$Rd), (ins GPR:$false, i32imm:$imm), DPFrm, IIC_iMOVi, "movw", "\t$Rd, $imm", @@ -3053,6 +3064,7 @@ let Inst{11-0} = imm{11-0}; } +let isMoveImm = 1 in def MOVCCi : AI1<0b1101, (outs GPR:$Rd), (ins GPR:$false, so_imm:$imm), DPFrm, IIC_iCMOVi, "mov", "\t$Rd, $imm", @@ -3068,10 +3080,12 @@ } // Two instruction predicate mov immediate. +let isMoveImm = 1 in def MOVCCi32imm : PseudoInst<(outs GPR:$Rd), (ins GPR:$false, i32imm:$src, pred:$p), IIC_iCMOVix2, "", []>, RegConstraint<"$false = $Rd">; +let isMoveImm = 1 in def MVNCCi : AI1<0b1111, (outs GPR:$Rd), (ins GPR:$false, so_imm:$imm), DPFrm, IIC_iCMOVi, "mvn", "\t$Rd, $imm", @@ -3337,27 +3351,11 @@ // Large immediate handling. -// FIXME: Folding immediates into these logical operations aren't necessary -// good ideas. If it's in a loop machine licm could have hoisted the immediate -// computation out of the loop. -def : ARMPat<(or GPR:$LHS, so_imm2part:$RHS), - (ORRri (ORRri GPR:$LHS, (so_imm2part_1 imm:$RHS)), - (so_imm2part_2 imm:$RHS))>; -def : ARMPat<(xor GPR:$LHS, so_imm2part:$RHS), - (EORri (EORri GPR:$LHS, (so_imm2part_1 imm:$RHS)), - (so_imm2part_2 imm:$RHS))>; -def : ARMPat<(add GPR:$LHS, so_imm2part:$RHS), - (ADDri (ADDri GPR:$LHS, (so_imm2part_1 imm:$RHS)), - (so_imm2part_2 imm:$RHS))>; -def : ARMPat<(add GPR:$LHS, so_neg_imm2part:$RHS), - (SUBri (SUBri GPR:$LHS, (so_neg_imm2part_1 imm:$RHS)), - (so_neg_imm2part_2 imm:$RHS))>; - // 32-bit immediate using two piece so_imms or movw + movt. // This is a single pseudo instruction, the benefit is that it can be remat'd // as a single unit instead of having to handle reg inputs. // FIXME: Remove this when we can do generalized remat. -let isReMaterializable = 1 in +let isReMaterializable = 1, isMoveImm = 1 in def MOVi32imm : PseudoInst<(outs GPR:$dst), (ins i32imm:$src), IIC_iMOVix2, "", [(set GPR:$dst, (arm_i32imm:$src))]>, Requires<[IsARM]>; Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb.td?rev=119548&r1=119547&r2=119548&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb.td Wed Nov 17 14:13:28 2010 @@ -711,6 +711,7 @@ T1DataProcessing<0b0011>; // move register +let isMoveImm = 1 in def tMOVi8 : T1sI<(outs tGPR:$dst), (ins i32imm:$src), IIC_iMOVi, "mov", "\t$dst, $src", [(set tGPR:$dst, imm0_255:$src)]>, @@ -844,7 +845,7 @@ let isCompare = 1, isCommutable = 1, Defs = [CPSR] in def tTST : T1pI<(outs), (ins tGPR:$lhs, tGPR:$rhs), IIC_iTSTr, "tst", "\t$lhs, $rhs", - [(ARMcmpZ (and tGPR:$lhs, tGPR:$rhs), 0)]>, + [(ARMcmpZ (and_su tGPR:$lhs, tGPR:$rhs), 0)]>, T1DataProcessing<0b1000>; // zero-extend byte @@ -877,6 +878,7 @@ "mov", "\t$dst, $rhs", []>, T1Special<{1,0,?,?}>; +let isMoveImm = 1 in def tMOVCCi : T1pIt<(outs tGPR:$dst), (ins tGPR:$lhs, i32imm:$rhs), IIC_iCMOVi, "mov", "\t$dst, $rhs", []>, T1General<{1,0,0,?,?}>; Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=119548&r1=119547&r2=119548&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Wed Nov 17 14:13:28 2010 @@ -1591,7 +1591,8 @@ } // AddedComplexity to ensure isel tries t2MOVi before t2MOVi16. -let isReMaterializable = 1, isAsCheapAsAMove = 1, AddedComplexity = 1 in +let isReMaterializable = 1, isAsCheapAsAMove = 1, isMoveImm = 1, + AddedComplexity = 1 in def t2MOVi : T2sOneRegImm<(outs rGPR:$Rd), (ins t2_so_imm:$imm), IIC_iMOVi, "mov", ".w\t$Rd, $imm", [(set rGPR:$Rd, t2_so_imm:$imm)]> { @@ -1603,7 +1604,7 @@ let Inst{15} = 0; } -let isReMaterializable = 1, isAsCheapAsAMove = 1 in +let isReMaterializable = 1, isAsCheapAsAMove = 1, isMoveImm = 1 in def t2MOVi16 : T2I<(outs rGPR:$Rd), (ins i32imm:$imm), IIC_iMOVi, "movw", "\t$Rd, $imm", [(set rGPR:$Rd, imm0_65535:$imm)]> { @@ -2519,10 +2520,10 @@ defm t2TST : T2I_cmp_irs<0b0000, "tst", IIC_iTSTi, IIC_iTSTr, IIC_iTSTsi, - BinOpFrag<(ARMcmpZ (and node:$LHS, node:$RHS), 0)>>; + BinOpFrag<(ARMcmpZ (and_su node:$LHS, node:$RHS), 0)>>; defm t2TEQ : T2I_cmp_irs<0b0100, "teq", IIC_iTSTi, IIC_iTSTr, IIC_iTSTsi, - BinOpFrag<(ARMcmpZ (xor node:$LHS, node:$RHS), 0)>>; + BinOpFrag<(ARMcmpZ (xor_su node:$LHS, node:$RHS), 0)>>; // Conditional moves // FIXME: should be able to write a pattern for ARMcmov, but can't use @@ -2541,6 +2542,7 @@ let Inst{7-4} = 0b0000; } +let isMoveImm = 1 in def t2MOVCCi : T2I<(outs rGPR:$dst), (ins rGPR:$false, t2_so_imm:$true), IIC_iCMOVi, "mov", ".w\t$dst, $true", [/*(set rGPR:$dst,(ARMcmov rGPR:$false,t2_so_imm:$true, imm:$cc, CCR:$ccr))*/]>, @@ -2553,6 +2555,7 @@ let Inst{15} = 0; } +let isMoveImm = 1 in def t2MOVCCi16 : T2I<(outs rGPR:$Rd), (ins rGPR:$false, i32imm:$imm), IIC_iCMOVi, "movw", "\t$Rd, $imm", []>, @@ -2573,10 +2576,12 @@ let Inst{7-0} = imm{7-0}; } +let isMoveImm = 1 in def t2MOVCCi32imm : PseudoInst<(outs rGPR:$dst), (ins rGPR:$false, i32imm:$src, pred:$p), IIC_iCMOVix2, "", []>, RegConstraint<"$false = $dst">; +let isMoveImm = 1 in def t2MVNCCi : T2I<(outs rGPR:$dst), (ins rGPR:$false, t2_so_imm:$true), IIC_iCMOVi, "mvn", ".w\t$dst, $true", [/*(set rGPR:$dst,(ARMcmov rGPR:$false,t2_so_imm_not:$true, @@ -3014,24 +3019,10 @@ // Non-Instruction Patterns // -// Two piece so_imms. -def : T2Pat<(or rGPR:$LHS, t2_so_imm2part:$RHS), - (t2ORRri (t2ORRri rGPR:$LHS, (t2_so_imm2part_1 imm:$RHS)), - (t2_so_imm2part_2 imm:$RHS))>; -def : T2Pat<(xor rGPR:$LHS, t2_so_imm2part:$RHS), - (t2EORri (t2EORri rGPR:$LHS, (t2_so_imm2part_1 imm:$RHS)), - (t2_so_imm2part_2 imm:$RHS))>; -def : T2Pat<(add rGPR:$LHS, t2_so_imm2part:$RHS), - (t2ADDri (t2ADDri rGPR:$LHS, (t2_so_imm2part_1 imm:$RHS)), - (t2_so_imm2part_2 imm:$RHS))>; -def : T2Pat<(add rGPR:$LHS, t2_so_neg_imm2part:$RHS), - (t2SUBri (t2SUBri rGPR:$LHS, (t2_so_neg_imm2part_1 imm:$RHS)), - (t2_so_neg_imm2part_2 imm:$RHS))>; - // 32-bit immediate using movw + movt. // This is a single pseudo instruction to make it re-materializable. // FIXME: Remove this when we can do generalized remat. -let isReMaterializable = 1 in +let isReMaterializable = 1, isMoveImm = 1 in def t2MOVi32imm : PseudoInst<(outs rGPR:$dst), (ins i32imm:$src), IIC_iMOVix2, "", [(set rGPR:$dst, (i32 imm:$src))]>, Requires<[IsThumb, HasV6T2]>; Modified: llvm/trunk/test/CodeGen/ARM/arm-and-tst-peephole.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/arm-and-tst-peephole.ll?rev=119548&r1=119547&r2=119548&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/arm-and-tst-peephole.ll (original) +++ llvm/trunk/test/CodeGen/ARM/arm-and-tst-peephole.ll Wed Nov 17 14:13:28 2010 @@ -27,9 +27,8 @@ ; ARM-NEXT: beq ; THUMB: movs r5, #3 -; THUMB-NEXT: mov r6, r4 -; THUMB-NEXT: ands r6, r5 -; THUMB-NEXT: tst r4, r5 +; THUMB-NEXT: ands r5, r4 +; THUMB-NEXT: cmp r5, #0 ; THUMB-NEXT: beq ; T2: ands r12, r12, #3 Modified: llvm/trunk/test/CodeGen/ARM/select_xform.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/select_xform.ll?rev=119548&r1=119547&r2=119548&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/select_xform.ll (original) +++ llvm/trunk/test/CodeGen/ARM/select_xform.ll Wed Nov 17 14:13:28 2010 @@ -8,7 +8,8 @@ ; ARM: movgt r0, r1 ; T2: t1: -; T2: sub.w r0, r1, #-2147483648 +; T2: mvn r0, #-2147483648 +; T2: add r0, r1 ; T2: movgt r0, r1 %tmp1 = icmp sgt i32 %c, 10 %tmp2 = select i1 %tmp1, i32 0, i32 2147483647 Modified: llvm/trunk/test/CodeGen/Thumb2/machine-licm.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/machine-licm.ll?rev=119548&r1=119547&r2=119548&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/machine-licm.ll (original) +++ llvm/trunk/test/CodeGen/Thumb2/machine-licm.ll Wed Nov 17 14:13:28 2010 @@ -77,10 +77,49 @@ } ; CHECK-NOT: LCPI1_0: -; CHECK: .subsections_via_symbols declare <4 x float> @llvm.arm.neon.vld1.v4f32(i8*, i32) nounwind readonly declare void @llvm.arm.neon.vst1.v4f32(i8*, <4 x float>, i32) nounwind declare <4 x float> @llvm.arm.neon.vmaxs.v4f32(<4 x float>, <4 x float>) nounwind readnone + +; rdar://8241368 +; isel should not fold immediate into eor's which would have prevented LICM. +define zeroext i16 @t3(i8 zeroext %data, i16 zeroext %crc) nounwind readnone { +; CHECK: t3: +bb.nph: +; CHECK: bb.nph +; CHECK: movw {{(r[0-9])|(lr)}}, #32768 +; CHECK: movs {{(r[0-9])|(lr)}}, #8 +; CHECK: movw [[REGISTER:(r[0-9])|(lr)]], #16386 +; CHECK: movw {{(r[0-9])|(lr)}}, #65534 +; CHECK: movt {{(r[0-9])|(lr)}}, #65535 + br label %bb + +bb: ; preds = %bb, %bb.nph +; CHECK: bb +; CHECK: eor.w {{(r[0-9])|(lr)}}, {{(r[0-9])|(lr)}}, [[REGISTER]] +; CHECK: eor.w +; CHECK-NOT: eor +; CHECK: and + %data_addr.013 = phi i8 [ %data, %bb.nph ], [ %8, %bb ] ; [#uses=2] + %crc_addr.112 = phi i16 [ %crc, %bb.nph ], [ %crc_addr.2, %bb ] ; [#uses=3] + %i.011 = phi i8 [ 0, %bb.nph ], [ %7, %bb ] ; [#uses=1] + %0 = trunc i16 %crc_addr.112 to i8 ; [#uses=1] + %1 = xor i8 %data_addr.013, %0 ; [#uses=1] + %2 = and i8 %1, 1 ; [#uses=1] + %3 = icmp eq i8 %2, 0 ; [#uses=2] + %4 = xor i16 %crc_addr.112, 16386 ; [#uses=1] + %crc_addr.0 = select i1 %3, i16 %crc_addr.112, i16 %4 ; [#uses=1] + %5 = lshr i16 %crc_addr.0, 1 ; [#uses=2] + %6 = or i16 %5, -32768 ; [#uses=1] + %crc_addr.2 = select i1 %3, i16 %5, i16 %6 ; [#uses=2] + %7 = add i8 %i.011, 1 ; [#uses=2] + %8 = lshr i8 %data_addr.013, 1 ; [#uses=1] + %exitcond = icmp eq i8 %7, 8 ; [#uses=1] + br i1 %exitcond, label %bb8, label %bb + +bb8: ; preds = %bb + ret i16 %crc_addr.2 +} Modified: llvm/trunk/test/CodeGen/Thumb2/thumb2-mov.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-mov.ll?rev=119548&r1=119547&r2=119548&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-mov.ll (original) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-mov.ll Wed Nov 17 14:13:28 2010 @@ -53,7 +53,7 @@ define i32 @t2_const_var2_2_ok_2(i32 %lhs) { ;CHECK: t2_const_var2_2_ok_2: -;CHECK: add.w r0, r0, #-1426063360 +;CHECK: add.w r0, r0, #2868903936 ;CHECK: add.w r0, r0, #47616 %ret = add i32 %lhs, 2868951552 ; 0xab00ba00 ret i32 %ret @@ -61,7 +61,7 @@ define i32 @t2_const_var2_2_ok_3(i32 %lhs) { ;CHECK: t2_const_var2_2_ok_3: -;CHECK: add.w r0, r0, #-1426019584 +;CHECK: add.w r0, r0, #2868947712 ;CHECK: adds r0, #16 %ret = add i32 %lhs, 2868947728 ; 0xab00ab10 ret i32 %ret @@ -69,7 +69,7 @@ define i32 @t2_const_var2_2_ok_4(i32 %lhs) { ;CHECK: t2_const_var2_2_ok_4: -;CHECK: add.w r0, r0, #-1426019584 +;CHECK: add.w r0, r0, #2868947712 ;CHECK: add.w r0, r0, #1048592 %ret = add i32 %lhs, 2869996304 ; 0xab10ab10 ret i32 %ret Modified: llvm/trunk/test/CodeGen/Thumb2/thumb2-select_xform.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-select_xform.ll?rev=119548&r1=119547&r2=119548&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-select_xform.ll (original) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-select_xform.ll Wed Nov 17 14:13:28 2010 @@ -2,8 +2,8 @@ define i32 @t1(i32 %a, i32 %b, i32 %c) nounwind { ; CHECK: t1 -; CHECK: sub.w r0, r1, #-2147483648 -; CHECK: subs r0, #1 +; CHECK: mvn r0, #-2147483648 +; CHECK: add r0, r1 ; CHECK: cmp r2, #10 ; CHECK: it gt ; CHECK: movgt r0, r1 Modified: llvm/trunk/utils/TableGen/CodeGenInstruction.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenInstruction.cpp?rev=119548&r1=119547&r2=119548&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/CodeGenInstruction.cpp (original) +++ llvm/trunk/utils/TableGen/CodeGenInstruction.cpp Wed Nov 17 14:13:28 2010 @@ -286,6 +286,7 @@ isBranch = R->getValueAsBit("isBranch"); isIndirectBranch = R->getValueAsBit("isIndirectBranch"); isCompare = R->getValueAsBit("isCompare"); + isMoveImm = R->getValueAsBit("isMoveImm"); isBarrier = R->getValueAsBit("isBarrier"); isCall = R->getValueAsBit("isCall"); canFoldAsLoad = R->getValueAsBit("canFoldAsLoad"); Modified: llvm/trunk/utils/TableGen/CodeGenInstruction.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenInstruction.h?rev=119548&r1=119547&r2=119548&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/CodeGenInstruction.h (original) +++ llvm/trunk/utils/TableGen/CodeGenInstruction.h Wed Nov 17 14:13:28 2010 @@ -213,6 +213,7 @@ bool isBranch; bool isIndirectBranch; bool isCompare; + bool isMoveImm; bool isBarrier; bool isCall; bool canFoldAsLoad; Modified: llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp?rev=119548&r1=119547&r2=119548&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp Wed Nov 17 14:13:28 2010 @@ -271,6 +271,7 @@ if (Inst.isBranch) OS << "|(1< Author: djg Date: Wed Nov 17 14:23:08 2010 New Revision: 119550 URL: http://llvm.org/viewvc/llvm-project?rev=119550&view=rev Log: Fix ScalarEvolution's range memoization to avoid using a default ctor with ConstantRange. Modified: llvm/trunk/include/llvm/Analysis/ScalarEvolution.h llvm/trunk/include/llvm/Support/ConstantRange.h llvm/trunk/lib/Analysis/ScalarEvolution.cpp Modified: llvm/trunk/include/llvm/Analysis/ScalarEvolution.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/ScalarEvolution.h?rev=119550&r1=119549&r2=119550&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/ScalarEvolution.h (original) +++ llvm/trunk/include/llvm/Analysis/ScalarEvolution.h Wed Nov 17 14:23:08 2010 @@ -273,6 +273,26 @@ /// SignedRanges - Memoized results from getSignedRange DenseMap SignedRanges; + /// setUnsignedRange - Set the memoized unsigned range for the given SCEV. + const ConstantRange &setUnsignedRange(const SCEV *S, + const ConstantRange &CR) { + std::pair::iterator, bool> Pair = + UnsignedRanges.insert(std::make_pair(S, CR)); + if (!Pair.second) + Pair.first->second = CR; + return Pair.first->second; + } + + /// setUnsignedRange - Set the memoized signed range for the given SCEV. + const ConstantRange &setSignedRange(const SCEV *S, + const ConstantRange &CR) { + std::pair::iterator, bool> Pair = + SignedRanges.insert(std::make_pair(S, CR)); + if (!Pair.second) + Pair.first->second = CR; + return Pair.first->second; + } + /// createSCEV - We know that there is no SCEV for the specified value. /// Analyze the expression. const SCEV *createSCEV(Value *V); Modified: llvm/trunk/include/llvm/Support/ConstantRange.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/ConstantRange.h?rev=119550&r1=119549&r2=119550&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/ConstantRange.h (original) +++ llvm/trunk/include/llvm/Support/ConstantRange.h Wed Nov 17 14:23:08 2010 @@ -47,9 +47,6 @@ /// explicit ConstantRange(uint32_t BitWidth, bool isFullSet = true); - /// Default constructor that creates an uninitialized ConstantRange. - ConstantRange() {} - /// Initialize a range to hold the single specified value. /// ConstantRange(const APInt &Value); Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=119550&r1=119549&r2=119550&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original) +++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Wed Nov 17 14:23:08 2010 @@ -3036,7 +3036,7 @@ return I->second; if (const SCEVConstant *C = dyn_cast(S)) - return UnsignedRanges[C] = ConstantRange(C->getValue()->getValue()); + return setUnsignedRange(C, ConstantRange(C->getValue()->getValue())); unsigned BitWidth = getTypeSizeInBits(S->getType()); ConstantRange ConservativeResult(BitWidth, /*isFullSet=*/true); @@ -3053,52 +3053,52 @@ ConstantRange X = getUnsignedRange(Add->getOperand(0)); for (unsigned i = 1, e = Add->getNumOperands(); i != e; ++i) X = X.add(getUnsignedRange(Add->getOperand(i))); - return UnsignedRanges[Add] = ConservativeResult.intersectWith(X); + return setUnsignedRange(Add, ConservativeResult.intersectWith(X)); } if (const SCEVMulExpr *Mul = dyn_cast(S)) { ConstantRange X = getUnsignedRange(Mul->getOperand(0)); for (unsigned i = 1, e = Mul->getNumOperands(); i != e; ++i) X = X.multiply(getUnsignedRange(Mul->getOperand(i))); - return UnsignedRanges[Mul] = ConservativeResult.intersectWith(X); + return setUnsignedRange(Mul, ConservativeResult.intersectWith(X)); } if (const SCEVSMaxExpr *SMax = dyn_cast(S)) { ConstantRange X = getUnsignedRange(SMax->getOperand(0)); for (unsigned i = 1, e = SMax->getNumOperands(); i != e; ++i) X = X.smax(getUnsignedRange(SMax->getOperand(i))); - return UnsignedRanges[SMax] = ConservativeResult.intersectWith(X); + return setUnsignedRange(SMax, ConservativeResult.intersectWith(X)); } if (const SCEVUMaxExpr *UMax = dyn_cast(S)) { ConstantRange X = getUnsignedRange(UMax->getOperand(0)); for (unsigned i = 1, e = UMax->getNumOperands(); i != e; ++i) X = X.umax(getUnsignedRange(UMax->getOperand(i))); - return UnsignedRanges[UMax] = ConservativeResult.intersectWith(X); + return setUnsignedRange(UMax, ConservativeResult.intersectWith(X)); } if (const SCEVUDivExpr *UDiv = dyn_cast(S)) { ConstantRange X = getUnsignedRange(UDiv->getLHS()); ConstantRange Y = getUnsignedRange(UDiv->getRHS()); - return UnsignedRanges[UDiv] = ConservativeResult.intersectWith(X.udiv(Y)); + return setUnsignedRange(UDiv, ConservativeResult.intersectWith(X.udiv(Y))); } if (const SCEVZeroExtendExpr *ZExt = dyn_cast(S)) { ConstantRange X = getUnsignedRange(ZExt->getOperand()); - return UnsignedRanges[ZExt] = - ConservativeResult.intersectWith(X.zeroExtend(BitWidth)); + return setUnsignedRange(ZExt, + ConservativeResult.intersectWith(X.zeroExtend(BitWidth))); } if (const SCEVSignExtendExpr *SExt = dyn_cast(S)) { ConstantRange X = getUnsignedRange(SExt->getOperand()); - return UnsignedRanges[SExt] = - ConservativeResult.intersectWith(X.signExtend(BitWidth)); + return setUnsignedRange(SExt, + ConservativeResult.intersectWith(X.signExtend(BitWidth))); } if (const SCEVTruncateExpr *Trunc = dyn_cast(S)) { ConstantRange X = getUnsignedRange(Trunc->getOperand()); - return UnsignedRanges[Trunc] = - ConservativeResult.intersectWith(X.truncate(BitWidth)); + return setUnsignedRange(Trunc, + ConservativeResult.intersectWith(X.truncate(BitWidth))); } if (const SCEVAddRecExpr *AddRec = dyn_cast(S)) { @@ -3138,20 +3138,20 @@ ConstantRange ExtEndRange = EndRange.zextOrTrunc(BitWidth*2+1); if (ExtStartRange.add(ExtMaxBECountRange.multiply(ExtStepRange)) != ExtEndRange) - return UnsignedRanges[AddRec] = ConservativeResult; + return setUnsignedRange(AddRec, ConservativeResult); APInt Min = APIntOps::umin(StartRange.getUnsignedMin(), EndRange.getUnsignedMin()); APInt Max = APIntOps::umax(StartRange.getUnsignedMax(), EndRange.getUnsignedMax()); if (Min.isMinValue() && Max.isMaxValue()) - return UnsignedRanges[AddRec] = ConservativeResult; - return UnsignedRanges[AddRec] = - ConservativeResult.intersectWith(ConstantRange(Min, Max+1)); + return setUnsignedRange(AddRec, ConservativeResult); + return setUnsignedRange(AddRec, + ConservativeResult.intersectWith(ConstantRange(Min, Max+1))); } } - return UnsignedRanges[AddRec] = ConservativeResult; + return setUnsignedRange(AddRec, ConservativeResult); } if (const SCEVUnknown *U = dyn_cast(S)) { @@ -3160,25 +3160,24 @@ APInt Zeros(BitWidth, 0), Ones(BitWidth, 0); ComputeMaskedBits(U->getValue(), Mask, Zeros, Ones, TD); if (Ones == ~Zeros + 1) - return UnsignedRanges[U] = ConservativeResult; - return UnsignedRanges[U] = - ConservativeResult.intersectWith(ConstantRange(Ones, ~Zeros + 1)); + return setUnsignedRange(U, ConservativeResult); + return setUnsignedRange(U, + ConservativeResult.intersectWith(ConstantRange(Ones, ~Zeros + 1))); } - return UnsignedRanges[S] = ConservativeResult; + return setUnsignedRange(S, ConservativeResult); } /// getSignedRange - Determine the signed range for a particular SCEV. /// ConstantRange ScalarEvolution::getSignedRange(const SCEV *S) { - // See if we've computed this range already. DenseMap::iterator I = SignedRanges.find(S); if (I != SignedRanges.end()) return I->second; if (const SCEVConstant *C = dyn_cast(S)) - return SignedRanges[C] = ConstantRange(C->getValue()->getValue()); + return setSignedRange(C, ConstantRange(C->getValue()->getValue())); unsigned BitWidth = getTypeSizeInBits(S->getType()); ConstantRange ConservativeResult(BitWidth, /*isFullSet=*/true); @@ -3195,52 +3194,52 @@ ConstantRange X = getSignedRange(Add->getOperand(0)); for (unsigned i = 1, e = Add->getNumOperands(); i != e; ++i) X = X.add(getSignedRange(Add->getOperand(i))); - return SignedRanges[Add] = ConservativeResult.intersectWith(X); + return setSignedRange(Add, ConservativeResult.intersectWith(X)); } if (const SCEVMulExpr *Mul = dyn_cast(S)) { ConstantRange X = getSignedRange(Mul->getOperand(0)); for (unsigned i = 1, e = Mul->getNumOperands(); i != e; ++i) X = X.multiply(getSignedRange(Mul->getOperand(i))); - return SignedRanges[Mul] = ConservativeResult.intersectWith(X); + return setSignedRange(Mul, ConservativeResult.intersectWith(X)); } if (const SCEVSMaxExpr *SMax = dyn_cast(S)) { ConstantRange X = getSignedRange(SMax->getOperand(0)); for (unsigned i = 1, e = SMax->getNumOperands(); i != e; ++i) X = X.smax(getSignedRange(SMax->getOperand(i))); - return SignedRanges[SMax] = ConservativeResult.intersectWith(X); + return setSignedRange(SMax, ConservativeResult.intersectWith(X)); } if (const SCEVUMaxExpr *UMax = dyn_cast(S)) { ConstantRange X = getSignedRange(UMax->getOperand(0)); for (unsigned i = 1, e = UMax->getNumOperands(); i != e; ++i) X = X.umax(getSignedRange(UMax->getOperand(i))); - return SignedRanges[UMax] = ConservativeResult.intersectWith(X); + return setSignedRange(UMax, ConservativeResult.intersectWith(X)); } if (const SCEVUDivExpr *UDiv = dyn_cast(S)) { ConstantRange X = getSignedRange(UDiv->getLHS()); ConstantRange Y = getSignedRange(UDiv->getRHS()); - return SignedRanges[UDiv] = ConservativeResult.intersectWith(X.udiv(Y)); + return setSignedRange(UDiv, ConservativeResult.intersectWith(X.udiv(Y))); } if (const SCEVZeroExtendExpr *ZExt = dyn_cast(S)) { ConstantRange X = getSignedRange(ZExt->getOperand()); - return SignedRanges[ZExt] = - ConservativeResult.intersectWith(X.zeroExtend(BitWidth)); + return setSignedRange(ZExt, + ConservativeResult.intersectWith(X.zeroExtend(BitWidth))); } if (const SCEVSignExtendExpr *SExt = dyn_cast(S)) { ConstantRange X = getSignedRange(SExt->getOperand()); - return SignedRanges[SExt] = - ConservativeResult.intersectWith(X.signExtend(BitWidth)); + return setSignedRange(SExt, + ConservativeResult.intersectWith(X.signExtend(BitWidth))); } if (const SCEVTruncateExpr *Trunc = dyn_cast(S)) { ConstantRange X = getSignedRange(Trunc->getOperand()); - return SignedRanges[Trunc] = - ConservativeResult.intersectWith(X.truncate(BitWidth)); + return setSignedRange(Trunc, + ConservativeResult.intersectWith(X.truncate(BitWidth))); } if (const SCEVAddRecExpr *AddRec = dyn_cast(S)) { @@ -3290,35 +3289,35 @@ ConstantRange ExtEndRange = EndRange.sextOrTrunc(BitWidth*2+1); if (ExtStartRange.add(ExtMaxBECountRange.multiply(ExtStepRange)) != ExtEndRange) - return SignedRanges[AddRec] = ConservativeResult; + return setSignedRange(AddRec, ConservativeResult); APInt Min = APIntOps::smin(StartRange.getSignedMin(), EndRange.getSignedMin()); APInt Max = APIntOps::smax(StartRange.getSignedMax(), EndRange.getSignedMax()); if (Min.isMinSignedValue() && Max.isMaxSignedValue()) - return SignedRanges[AddRec] = ConservativeResult; - return SignedRanges[AddRec] = - ConservativeResult.intersectWith(ConstantRange(Min, Max+1)); + return setSignedRange(AddRec, ConservativeResult); + return setSignedRange(AddRec, + ConservativeResult.intersectWith(ConstantRange(Min, Max+1))); } } - return SignedRanges[AddRec] = ConservativeResult; + return setSignedRange(AddRec, ConservativeResult); } if (const SCEVUnknown *U = dyn_cast(S)) { // For a SCEVUnknown, ask ValueTracking. if (!U->getValue()->getType()->isIntegerTy() && !TD) - return SignedRanges[U] = ConservativeResult; + return setSignedRange(U, ConservativeResult); unsigned NS = ComputeNumSignBits(U->getValue(), TD); if (NS == 1) - return SignedRanges[U] = ConservativeResult; - return SignedRanges[U] = ConservativeResult.intersectWith( + return setSignedRange(U, ConservativeResult); + return setSignedRange(U, ConservativeResult.intersectWith( ConstantRange(APInt::getSignedMinValue(BitWidth).ashr(NS - 1), - APInt::getSignedMaxValue(BitWidth).ashr(NS - 1)+1)); + APInt::getSignedMaxValue(BitWidth).ashr(NS - 1)+1))); } - return SignedRanges[S] = ConservativeResult; + return setSignedRange(S, ConservativeResult); } /// createSCEV - We know that there is no SCEV for the specified value. From resistor at mac.com Wed Nov 17 14:35:29 2010 From: resistor at mac.com (Owen Anderson) Date: Wed, 17 Nov 2010 20:35:29 -0000 Subject: [llvm-commits] [llvm] r119551 - in /llvm/trunk: lib/Target/ARM/ARMInstrThumb2.td test/MC/ARM/thumb2.s Message-ID: <20101117203529.F2C5B2A6C12C@llvm.org> Author: resistor Date: Wed Nov 17 14:35:29 2010 New Revision: 119551 URL: http://llvm.org/viewvc/llvm-project?rev=119551&view=rev Log: Provide Thumb2 encodings for bitfield instructions. Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td llvm/trunk/test/MC/ARM/thumb2.s Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=119551&r1=119550&r2=119551&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Wed Nov 17 14:35:29 2010 @@ -1989,10 +1989,30 @@ IIC_iBITi, IIC_iBITr, IIC_iBITsi, BinOpFrag<(and node:$LHS, (not node:$RHS))>>; -let Constraints = "$src = $dst" in -def t2BFC : T2I<(outs rGPR:$dst), (ins rGPR:$src, bf_inv_mask_imm:$imm), - IIC_iUNAsi, "bfc", "\t$dst, $imm", - [(set rGPR:$dst, (and rGPR:$src, bf_inv_mask_imm:$imm))]> { +class T2BitFI pattern> + : T2I { + bits<4> Rd; + bits<10> imm; + + let Inst{11-8} = Rd{3-0}; + let Inst{4-0} = imm{9-5}; + let Inst{14-12} = imm{4-2}; + let Inst{7-6} = imm{1-0}; +} + +class T2TwoRegBitFI pattern> + : T2BitFI { + bits<4> Rn; + + let Inst{3-0} = Rn{3-0}; +} + +let Constraints = "$src = $Rd" in +def t2BFC : T2BitFI<(outs rGPR:$Rd), (ins rGPR:$src, bf_inv_mask_imm:$imm), + IIC_iUNAsi, "bfc", "\t$Rd, $imm", + [(set rGPR:$Rd, (and rGPR:$src, bf_inv_mask_imm:$imm))]> { let Inst{31-27} = 0b11110; let Inst{25} = 1; let Inst{24-20} = 0b10110; @@ -2000,16 +2020,17 @@ let Inst{15} = 0; } -def t2SBFX: T2I<(outs rGPR:$dst), (ins rGPR:$src, imm0_31:$lsb, imm0_31:$width), - IIC_iUNAsi, "sbfx", "\t$dst, $src, $lsb, $width", []> { +def t2SBFX: T2TwoRegBitFI< + (outs rGPR:$Rd), (ins rGPR:$Rn, bf_inv_mask_imm:$imm), + IIC_iUNAsi, "sbfx", "\t$Rd, $Rn, $imm", []> { let Inst{31-27} = 0b11110; let Inst{25} = 1; let Inst{24-20} = 0b10100; let Inst{15} = 0; } -def t2UBFX: T2I<(outs rGPR:$dst), (ins rGPR:$src, imm0_31:$lsb, imm0_31:$width), - IIC_iUNAsi, "ubfx", "\t$dst, $src, $lsb, $width", []> { +def t2UBFX: T2I<(outs rGPR:$Rd), (ins rGPR:$Rn, bf_inv_mask_imm:$imm), + IIC_iUNAsi, "ubfx", "\t$Rd, $Rn, $imm", []> { let Inst{31-27} = 0b11110; let Inst{25} = 1; let Inst{24-20} = 0b11100; @@ -2017,11 +2038,11 @@ } // A8.6.18 BFI - Bitfield insert (Encoding T1) -let Constraints = "$src = $dst" in -def t2BFI : T2I<(outs rGPR:$dst), - (ins rGPR:$src, rGPR:$val, bf_inv_mask_imm:$imm), - IIC_iBITi, "bfi", "\t$dst, $val, $imm", - [(set rGPR:$dst, (ARMbfi rGPR:$src, rGPR:$val, +let Constraints = "$src = $Rd" in +def t2BFI : T2BitFI<(outs rGPR:$Rd), + (ins rGPR:$src, rGPR:$Rn, bf_inv_mask_imm:$imm), + IIC_iBITi, "bfi", "\t$Rd, $Rn, $imm", + [(set rGPR:$Rd, (ARMbfi rGPR:$src, rGPR:$Rn, bf_inv_mask_imm:$imm))]> { let Inst{31-27} = 0b11110; let Inst{25} = 1; Modified: llvm/trunk/test/MC/ARM/thumb2.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/thumb2.s?rev=119551&r1=119550&r2=119551&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/thumb2.s (original) +++ llvm/trunk/test/MC/ARM/thumb2.s Wed Nov 17 14:35:29 2010 @@ -52,3 +52,9 @@ @ CHECK: rrx r0, r0 @ encoding: [0x30,0x00,0x4f,0xea] rrx r0, r0 +@ CHECK: bfc r0, #4, #20 @ encoding: [0x17,0x10,0x6f,0xf3] + bfc r0, #4, #20 +@ CHECK: bfc r0, #0, #23 @ encoding: [0x16,0x00,0x6f,0xf3] + bfc r0, #0, #23 +@ CHECK: bfc r0, #12, #20 @ encoding: [0x1f,0x30,0x6f,0xf3] + bfc r0, #12, #20 From gohman at apple.com Wed Nov 17 14:40:37 2010 From: gohman at apple.com (Dan Gohman) Date: Wed, 17 Nov 2010 12:40:37 -0800 Subject: [llvm-commits] [llvm] r119455 - in /llvm/trunk: include/llvm/Analysis/ScalarEvolution.h include/llvm/Support/ConstantRange.h lib/Analysis/ScalarEvolution.cpp In-Reply-To: <792A29BE-EAEE-4D79-9980-F1DF6FD470CF@apple.com> References: <20101117024444.9134E2A6C12C@llvm.org> <4CE3626D.3040502@mxc.ca> <1F328508-C9F4-4BDF-A4C8-7DD9409DA4F4@apple.com> <792A29BE-EAEE-4D79-9980-F1DF6FD470CF@apple.com> Message-ID: <26A17BBE-426D-4E32-A8EA-BD0A8A4EB726@apple.com> On Nov 17, 2010, at 10:02 AM, Dan Gohman wrote: > > Yes, I'll take a look. I rewrote the ScalarEvolution code to avoid needing a ConstantRange default ctor. Dan From gohman at apple.com Wed Nov 17 14:48:38 2010 From: gohman at apple.com (Dan Gohman) Date: Wed, 17 Nov 2010 20:48:38 -0000 Subject: [llvm-commits] [llvm] r119554 - in /llvm/trunk: include/llvm/Analysis/ScalarEvolutionExpressions.h lib/Analysis/ScalarEvolution.cpp Message-ID: <20101117204838.80EC32A6C12C@llvm.org> Author: djg Date: Wed Nov 17 14:48:38 2010 New Revision: 119554 URL: http://llvm.org/viewvc/llvm-project?rev=119554&view=rev Log: Verify SCEVAddRecExpr's invariant in ScalarEvolution::getAddRecExpr instead of in SCEVAddRecExpr's constructor, in preparation for an upcoming change. Modified: llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h llvm/trunk/lib/Analysis/ScalarEvolution.cpp Modified: llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h?rev=119554&r1=119553&r2=119554&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h (original) +++ llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h Wed Nov 17 14:48:38 2010 @@ -373,11 +373,7 @@ SCEVAddRecExpr(const FoldingSetNodeIDRef ID, const SCEV *const *O, size_t N, const Loop *l) - : SCEVNAryExpr(ID, scAddRecExpr, O, N), L(l) { - for (size_t i = 0, e = NumOperands; i != e; ++i) - assert(Operands[i]->isLoopInvariant(l) && - "Operands of AddRec must be loop-invariant!"); - } + : SCEVNAryExpr(ID, scAddRecExpr, O, N), L(l) {} public: const SCEV *getStart() const { return Operands[0]; } Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=119554&r1=119553&r2=119554&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original) +++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Wed Nov 17 14:48:38 2010 @@ -2073,6 +2073,9 @@ for (unsigned i = 1, e = Operands.size(); i != e; ++i) assert(getEffectiveSCEVType(Operands[i]->getType()) == ETy && "SCEVAddRecExpr operand types don't match!"); + for (unsigned i = 0, e = Operands.size(); i != e; ++i) + assert(Operands[i]->isLoopInvariant(L) && + "SCEVAddRecExpr operand is not loop-invariant!"); #endif if (Operands.back()->isZero()) { From resistor at mac.com Wed Nov 17 14:48:51 2010 From: resistor at mac.com (Owen Anderson) Date: Wed, 17 Nov 2010 20:48:51 -0000 Subject: [llvm-commits] [llvm] r119555 - in /llvm/trunk: lib/Target/ARM/ARMInstrThumb2.td test/MC/ARM/thumb2.s Message-ID: <20101117204851.5886A2A6C12C@llvm.org> Author: resistor Date: Wed Nov 17 14:48:51 2010 New Revision: 119555 URL: http://llvm.org/viewvc/llvm-project?rev=119555&view=rev Log: Revert r119551, which broke buildbots. Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td llvm/trunk/test/MC/ARM/thumb2.s Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=119555&r1=119554&r2=119555&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Wed Nov 17 14:48:51 2010 @@ -1989,30 +1989,10 @@ IIC_iBITi, IIC_iBITr, IIC_iBITsi, BinOpFrag<(and node:$LHS, (not node:$RHS))>>; -class T2BitFI pattern> - : T2I { - bits<4> Rd; - bits<10> imm; - - let Inst{11-8} = Rd{3-0}; - let Inst{4-0} = imm{9-5}; - let Inst{14-12} = imm{4-2}; - let Inst{7-6} = imm{1-0}; -} - -class T2TwoRegBitFI pattern> - : T2BitFI { - bits<4> Rn; - - let Inst{3-0} = Rn{3-0}; -} - -let Constraints = "$src = $Rd" in -def t2BFC : T2BitFI<(outs rGPR:$Rd), (ins rGPR:$src, bf_inv_mask_imm:$imm), - IIC_iUNAsi, "bfc", "\t$Rd, $imm", - [(set rGPR:$Rd, (and rGPR:$src, bf_inv_mask_imm:$imm))]> { +let Constraints = "$src = $dst" in +def t2BFC : T2I<(outs rGPR:$dst), (ins rGPR:$src, bf_inv_mask_imm:$imm), + IIC_iUNAsi, "bfc", "\t$dst, $imm", + [(set rGPR:$dst, (and rGPR:$src, bf_inv_mask_imm:$imm))]> { let Inst{31-27} = 0b11110; let Inst{25} = 1; let Inst{24-20} = 0b10110; @@ -2020,17 +2000,16 @@ let Inst{15} = 0; } -def t2SBFX: T2TwoRegBitFI< - (outs rGPR:$Rd), (ins rGPR:$Rn, bf_inv_mask_imm:$imm), - IIC_iUNAsi, "sbfx", "\t$Rd, $Rn, $imm", []> { +def t2SBFX: T2I<(outs rGPR:$dst), (ins rGPR:$src, imm0_31:$lsb, imm0_31:$width), + IIC_iUNAsi, "sbfx", "\t$dst, $src, $lsb, $width", []> { let Inst{31-27} = 0b11110; let Inst{25} = 1; let Inst{24-20} = 0b10100; let Inst{15} = 0; } -def t2UBFX: T2I<(outs rGPR:$Rd), (ins rGPR:$Rn, bf_inv_mask_imm:$imm), - IIC_iUNAsi, "ubfx", "\t$Rd, $Rn, $imm", []> { +def t2UBFX: T2I<(outs rGPR:$dst), (ins rGPR:$src, imm0_31:$lsb, imm0_31:$width), + IIC_iUNAsi, "ubfx", "\t$dst, $src, $lsb, $width", []> { let Inst{31-27} = 0b11110; let Inst{25} = 1; let Inst{24-20} = 0b11100; @@ -2038,11 +2017,11 @@ } // A8.6.18 BFI - Bitfield insert (Encoding T1) -let Constraints = "$src = $Rd" in -def t2BFI : T2BitFI<(outs rGPR:$Rd), - (ins rGPR:$src, rGPR:$Rn, bf_inv_mask_imm:$imm), - IIC_iBITi, "bfi", "\t$Rd, $Rn, $imm", - [(set rGPR:$Rd, (ARMbfi rGPR:$src, rGPR:$Rn, +let Constraints = "$src = $dst" in +def t2BFI : T2I<(outs rGPR:$dst), + (ins rGPR:$src, rGPR:$val, bf_inv_mask_imm:$imm), + IIC_iBITi, "bfi", "\t$dst, $val, $imm", + [(set rGPR:$dst, (ARMbfi rGPR:$src, rGPR:$val, bf_inv_mask_imm:$imm))]> { let Inst{31-27} = 0b11110; let Inst{25} = 1; Modified: llvm/trunk/test/MC/ARM/thumb2.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/thumb2.s?rev=119555&r1=119554&r2=119555&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/thumb2.s (original) +++ llvm/trunk/test/MC/ARM/thumb2.s Wed Nov 17 14:48:51 2010 @@ -52,9 +52,3 @@ @ CHECK: rrx r0, r0 @ encoding: [0x30,0x00,0x4f,0xea] rrx r0, r0 -@ CHECK: bfc r0, #4, #20 @ encoding: [0x17,0x10,0x6f,0xf3] - bfc r0, #4, #20 -@ CHECK: bfc r0, #0, #23 @ encoding: [0x16,0x00,0x6f,0xf3] - bfc r0, #0, #23 -@ CHECK: bfc r0, #12, #20 @ encoding: [0x1f,0x30,0x6f,0xf3] - bfc r0, #12, #20 From baldrick at free.fr Wed Nov 17 14:49:12 2010 From: baldrick at free.fr (Duncan Sands) Date: Wed, 17 Nov 2010 20:49:12 -0000 Subject: [llvm-commits] [llvm] r119556 - /llvm/trunk/lib/Analysis/ScalarEvolution.cpp Message-ID: <20101117204913.1478C2A6C12C@llvm.org> Author: baldrick Date: Wed Nov 17 14:49:12 2010 New Revision: 119556 URL: http://llvm.org/viewvc/llvm-project?rev=119556&view=rev Log: Before replacing a phi node with a different value, it needs to be checked that this won't break LCSSA form. Change the existing checking method to a more direct one: rather than seeing if all predecessors belong to the loop, check that the replacing value is either not in any loop or is in a loop that contains the phi node. Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=119556&r1=119555&r2=119556&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original) +++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Wed Nov 17 14:49:12 2010 @@ -2879,18 +2879,22 @@ // risks breaking LCSSA form. Instcombine would normally zap these, but // it doesn't have DominatorTree information, so it may miss cases. if (Value *V = SimplifyInstruction(PN, TD, DT)) { - // TODO: The following check is suboptimal. For example, it is pointless - // if V is a constant. Since the problematic case is if V is defined inside - // a deeper loop, it would be better to check for that directly. - bool AllSameLoop = true; - Loop *PNLoop = LI->getLoopFor(PN->getParent()); - for (size_t i = 0, e = PN->getNumIncomingValues(); i != e; ++i) - if (LI->getLoopFor(PN->getIncomingBlock(i)) != PNLoop) { - AllSameLoop = false; - break; - } - if (AllSameLoop) + Instruction *I = dyn_cast(V); + // Only instructions are problematic for preserving LCSSA form. + if (!I) return getSCEV(V); + + // If the instruction is not defined in a loop, then it can be used freely. + Loop *ILoop = LI->getLoopFor(I->getParent()); + if (!ILoop) + return getSCEV(I); + + // If the instruction is defined in the same loop as the phi node, or in a + // loop that contains the phi node loop as an inner loop, then using it as + // a replacement for the phi node will not break LCSSA form. + Loop *PNLoop = LI->getLoopFor(PN->getParent()); + if (ILoop->contains(PNLoop)) + return getSCEV(I); } // If it's not a loop phi, we can't handle it yet. From gohman at apple.com Wed Nov 17 14:50:07 2010 From: gohman at apple.com (Dan Gohman) Date: Wed, 17 Nov 2010 20:50:07 -0000 Subject: [llvm-commits] [llvm] r119557 - /llvm/trunk/lib/Transforms/Scalar/LICM.cpp Message-ID: <20101117205007.367B22A6C12C@llvm.org> Author: djg Date: Wed Nov 17 14:50:07 2010 New Revision: 119557 URL: http://llvm.org/viewvc/llvm-project?rev=119557&view=rev Log: Reference ScalarEvolution by name rather than directly in LICM, to avoid an unneeded dependence. Modified: llvm/trunk/lib/Transforms/Scalar/LICM.cpp Modified: llvm/trunk/lib/Transforms/Scalar/LICM.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LICM.cpp?rev=119557&r1=119556&r2=119557&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LICM.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LICM.cpp Wed Nov 17 14:50:07 2010 @@ -43,7 +43,6 @@ #include "llvm/Analysis/LoopInfo.h" #include "llvm/Analysis/LoopPass.h" #include "llvm/Analysis/Dominators.h" -#include "llvm/Analysis/ScalarEvolution.h" #include "llvm/Transforms/Utils/Local.h" #include "llvm/Transforms/Utils/SSAUpdater.h" #include "llvm/Support/CFG.h" @@ -83,7 +82,7 @@ AU.addRequiredID(LoopSimplifyID); AU.addRequired(); AU.addPreserved(); - AU.addPreserved(); + AU.addPreserved("scalar-evolution"); AU.addPreservedID(LoopSimplifyID); } From evan.cheng at apple.com Wed Nov 17 14:56:31 2010 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 17 Nov 2010 20:56:31 -0000 Subject: [llvm-commits] [llvm] r119558 - /llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp Message-ID: <20101117205631.1A6012A6C12C@llvm.org> Author: evancheng Date: Wed Nov 17 14:56:30 2010 New Revision: 119558 URL: http://llvm.org/viewvc/llvm-project?rev=119558&view=rev Log: Avoid isel movcc of large immediates when the large immediate is available in a register. These immediates aren't free. Modified: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp Modified: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp?rev=119558&r1=119557&r2=119558&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp Wed Nov 17 14:56:30 2010 @@ -1777,20 +1777,21 @@ SDNode *ARMDAGToDAGISel:: SelectT2CMOVImmOp(SDNode *N, SDValue FalseVal, SDValue TrueVal, - ARMCC::CondCodes CCVal, SDValue CCR, SDValue InFlag) { + ARMCC::CondCodes CCVal, SDValue CCR, SDValue InFlag) { ConstantSDNode *T = dyn_cast(TrueVal); - if (!T) + if (!T || !TrueVal.getNode()->hasOneUse()) return 0; unsigned Opc = 0; unsigned TrueImm = T->getZExtValue(); - bool isSoImm = is_t2_so_imm(TrueImm); - if (isSoImm || TrueImm <= 0xffff) { - Opc = isSoImm ? ARM::t2MOVCCi : ARM::t2MOVCCi16; + if (is_t2_so_imm(TrueImm)) { + Opc = ARM::t2MOVCCi; + } else if (TrueImm <= 0xffff) { + Opc = ARM::t2MOVCCi16; } else if (is_t2_so_imm_not(TrueImm)) { TrueImm = ~TrueImm; Opc = ARM::t2MVNCCi; - } else if (Subtarget->hasV6T2Ops()) { + } else if (TrueVal.getNode()->hasOneUse() && Subtarget->hasV6T2Ops()) { // Large immediate. Opc = ARM::t2MOVCCi32imm; } @@ -1807,7 +1808,7 @@ SDNode *ARMDAGToDAGISel:: SelectARMCMOVImmOp(SDNode *N, SDValue FalseVal, SDValue TrueVal, - ARMCC::CondCodes CCVal, SDValue CCR, SDValue InFlag) { + ARMCC::CondCodes CCVal, SDValue CCR, SDValue InFlag) { ConstantSDNode *T = dyn_cast(TrueVal); if (!T) return 0; @@ -1815,12 +1816,15 @@ unsigned Opc = 0; unsigned TrueImm = T->getZExtValue(); bool isSoImm = is_so_imm(TrueImm); - if (isSoImm || (Subtarget->hasV6T2Ops() && TrueImm <= 0xffff)) { - Opc = isSoImm ? ARM::MOVCCi : ARM::MOVCCi16; + if (isSoImm) { + Opc = ARM::MOVCCi; + } else if (Subtarget->hasV6T2Ops() && TrueImm <= 0xffff) { + Opc = ARM::MOVCCi16; } else if (is_so_imm_not(TrueImm)) { TrueImm = ~TrueImm; Opc = ARM::MVNCCi; - } else if (Subtarget->hasV6T2Ops() || ARM_AM::isSOImmTwoPartVal(TrueImm)) { + } else if (TrueVal.getNode()->hasOneUse() && + (Subtarget->hasV6T2Ops() || ARM_AM::isSOImmTwoPartVal(TrueImm))) { // Large immediate. Opc = ARM::MOVCCi32imm; } From grosbach at apple.com Wed Nov 17 15:05:55 2010 From: grosbach at apple.com (Jim Grosbach) Date: Wed, 17 Nov 2010 21:05:55 -0000 Subject: [llvm-commits] [llvm] r119559 - in /llvm/trunk/lib/Target/ARM: ARMAsmPrinter.cpp ARMInstrInfo.td Message-ID: <20101117210555.EED052A6C12C@llvm.org> Author: grosbach Date: Wed Nov 17 15:05:55 2010 New Revision: 119559 URL: http://llvm.org/viewvc/llvm-project?rev=119559&view=rev Log: Make the ARM BR_JTadd instruction an explicit pseudo and lower it properly in the MC lowering process. Modified: llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Modified: llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp?rev=119559&r1=119558&r2=119559&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp Wed Nov 17 15:05:55 2010 @@ -938,8 +938,7 @@ } case ARM::tBR_JTr: case ARM::BR_JTr: - case ARM::BR_JTm: - case ARM::BR_JTadd: { + case ARM::BR_JTm: { // Lower and emit the instruction itself, then the jump table following it. MCInst TmpInst; // FIXME: The branch instruction is really a pseudo. We should xform it @@ -949,6 +948,25 @@ EmitJumpTable(MI); return; } + case ARM::BR_JTadd: { + // Lower and emit the instruction itself, then the jump table following it. + // add pc, target, idx + MCInst AddInst; + AddInst.setOpcode(ARM::ADDrr); + AddInst.addOperand(MCOperand::CreateReg(ARM::PC)); + AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); + AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg())); + // Add predicate operands. + AddInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); + AddInst.addOperand(MCOperand::CreateReg(0)); + // Add 's' bit operand (always reg0 for this) + AddInst.addOperand(MCOperand::CreateReg(0)); + OutStreamer.EmitInstruction(AddInst); + + // Output the data for the jump table itself + EmitJumpTable(MI); + return; + } case ARM::TRAP: { // Non-Darwin binutils don't yet support the "trap" mnemonic. // FIXME: Remove this special case when they do. Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=119559&r1=119558&r2=119559&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Wed Nov 17 15:05:55 2010 @@ -1437,16 +1437,11 @@ let Inst{24} = 1; // P bit let Inst{27-25} = 0b011; } - def BR_JTadd : JTI<(outs), - (ins GPR:$target, GPR:$idx, jtblock_operand:$jt, i32imm:$id), - IIC_Br, "add\tpc, $target, $idx$jt", - [(ARMbrjt (add GPR:$target, GPR:$idx), tjumptable:$jt, - imm:$id)]> { - let Inst{15-12} = 0b1111; - let Inst{20} = 0; // S bit - let Inst{24-21} = 0b0100; - let Inst{27-25} = 0b000; - } + def BR_JTadd : PseudoInst<(outs), + (ins GPR:$target, GPR:$idx, jtblock_operand:$jt, i32imm:$id), + IIC_Br, "", + [(ARMbrjt (add GPR:$target, GPR:$idx), tjumptable:$jt, + imm:$id)]>; } // isNotDuplicable = 1, isIndirectBranch = 1 } // isBarrier = 1 From anton at korobeynikov.info Wed Nov 17 15:12:23 2010 From: anton at korobeynikov.info (Anton Korobeynikov) Date: Thu, 18 Nov 2010 00:12:23 +0300 Subject: [llvm-commits] [llvm] r119548 - in /llvm/trunk: include/llvm/Target/ lib/CodeGen/ lib/Target/ARM/ test/CodeGen/ARM/ test/CodeGen/Thumb2/ utils/TableGen/ In-Reply-To: <20101117201328.881FB2A6C12C@llvm.org> References: <20101117201328.881FB2A6C12C@llvm.org> Message-ID: Hi Evan, > --- llvm/trunk/test/CodeGen/ARM/select_xform.ll (original) > +++ llvm/trunk/test/CodeGen/ARM/select_xform.ll Wed Nov 17 14:13:28 2010 > @@ -8,7 +8,8 @@ > ?; ARM: movgt r0, r1 > > ?; T2: t1: > -; T2: sub.w r0, r1, #-2147483648 > +; T2: mvn r0, #-2147483648 > +; T2: add r0, r1 Isn't this a regression? -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University From tonic at nondot.org Wed Nov 17 15:19:19 2010 From: tonic at nondot.org (Tanya Lattner) Date: Wed, 17 Nov 2010 21:19:19 -0000 Subject: [llvm-commits] [www] r119561 - in /www/trunk/devmtg/2010-11: Grosser-Polly.pdf Rubow-Click.pdf Message-ID: <20101117211920.0BF4D2A6C12C@llvm.org> Author: tbrethou Date: Wed Nov 17 15:19:19 2010 New Revision: 119561 URL: http://llvm.org/viewvc/llvm-project?rev=119561&view=rev Log: Add more slides. Added: www/trunk/devmtg/2010-11/Grosser-Polly.pdf (with props) www/trunk/devmtg/2010-11/Rubow-Click.pdf (with props) Added: www/trunk/devmtg/2010-11/Grosser-Polly.pdf URL: http://llvm.org/viewvc/llvm-project/www/trunk/devmtg/2010-11/Grosser-Polly.pdf?rev=119561&view=auto ============================================================================== Binary file - no diff available. Propchange: www/trunk/devmtg/2010-11/Grosser-Polly.pdf ------------------------------------------------------------------------------ svn:mime-type = application/octet-stream Added: www/trunk/devmtg/2010-11/Rubow-Click.pdf URL: http://llvm.org/viewvc/llvm-project/www/trunk/devmtg/2010-11/Rubow-Click.pdf?rev=119561&view=auto ============================================================================== Binary file - no diff available. Propchange: www/trunk/devmtg/2010-11/Rubow-Click.pdf ------------------------------------------------------------------------------ svn:mime-type = application/octet-stream From gohman at apple.com Wed Nov 17 15:23:15 2010 From: gohman at apple.com (Dan Gohman) Date: Wed, 17 Nov 2010 21:23:15 -0000 Subject: [llvm-commits] [llvm] r119562 - in /llvm/trunk: include/llvm/Analysis/ScalarEvolution.h include/llvm/Analysis/ScalarEvolutionExpressions.h lib/Analysis/LoopDependenceAnalysis.cpp lib/Analysis/ScalarEvolution.cpp lib/Analysis/ScalarEvolutionExpander.cpp lib/Transforms/Scalar/IndVarSimplify.cpp lib/Transforms/Scalar/LoopStrengthReduce.cpp Message-ID: <20101117212315.BAE322A6C12C@llvm.org> Author: djg Date: Wed Nov 17 15:23:15 2010 New Revision: 119562 URL: http://llvm.org/viewvc/llvm-project?rev=119562&view=rev Log: Move SCEV::isLoopInvariant and hasComputableLoopEvolution to be member functions of ScalarEvolution, in preparation for memoization and other optimizations. Modified: llvm/trunk/include/llvm/Analysis/ScalarEvolution.h llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp llvm/trunk/lib/Analysis/ScalarEvolution.cpp llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Modified: llvm/trunk/include/llvm/Analysis/ScalarEvolution.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/ScalarEvolution.h?rev=119562&r1=119561&r2=119562&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/ScalarEvolution.h (original) +++ llvm/trunk/include/llvm/Analysis/ScalarEvolution.h Wed Nov 17 15:23:15 2010 @@ -78,16 +78,6 @@ unsigned getSCEVType() const { return SCEVType; } - /// isLoopInvariant - Return true if the value of this SCEV is unchanging in - /// the specified loop. - virtual bool isLoopInvariant(const Loop *L) const = 0; - - /// hasComputableLoopEvolution - Return true if this SCEV changes value in a - /// known way in the specified loop. This property being true implies that - /// the value is variant in the loop AND that we can emit an expression to - /// compute the value of the expression at any particular loop iteration. - virtual bool hasComputableLoopEvolution(const Loop *L) const = 0; - /// getType - Return the LLVM type of this SCEV expression. /// virtual const Type *getType() const = 0; @@ -156,9 +146,7 @@ SCEVCouldNotCompute(); // None of these methods are valid for this object. - virtual bool isLoopInvariant(const Loop *L) const; virtual const Type *getType() const; - virtual bool hasComputableLoopEvolution(const Loop *L) const; virtual void print(raw_ostream &OS) const; virtual bool hasOperand(const SCEV *Op) const; @@ -701,6 +689,16 @@ const SCEV *&LHS, const SCEV *&RHS); + /// isLoopInvariant - Return true if the value of the given SCEV is + /// unchanging in the specified loop. + bool isLoopInvariant(const SCEV *S, const Loop *L); + + /// hasComputableLoopEvolution - Return true if the given SCEV changes value + /// in a known way in the specified loop. This property being true implies + /// that the value is variant in the loop AND that we can emit an expression + /// to compute the value of the expression at any particular loop iteration. + bool hasComputableLoopEvolution(const SCEV *S, const Loop *L); + virtual bool runOnFunction(Function &F); virtual void releaseMemory(); virtual void getAnalysisUsage(AnalysisUsage &AU) const; Modified: llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h?rev=119562&r1=119561&r2=119562&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h (original) +++ llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h Wed Nov 17 15:23:15 2010 @@ -42,14 +42,6 @@ public: ConstantInt *getValue() const { return V; } - virtual bool isLoopInvariant(const Loop *L) const { - return true; - } - - virtual bool hasComputableLoopEvolution(const Loop *L) const { - return false; // Not loop variant - } - virtual const Type *getType() const; virtual bool hasOperand(const SCEV *) const { @@ -88,14 +80,6 @@ const SCEV *getOperand() const { return Op; } virtual const Type *getType() const { return Ty; } - virtual bool isLoopInvariant(const Loop *L) const { - return Op->isLoopInvariant(L); - } - - virtual bool hasComputableLoopEvolution(const Loop *L) const { - return Op->hasComputableLoopEvolution(L); - } - virtual bool hasOperand(const SCEV *O) const { return Op == O || Op->hasOperand(O); } @@ -202,13 +186,6 @@ op_iterator op_begin() const { return Operands; } op_iterator op_end() const { return Operands + NumOperands; } - virtual bool isLoopInvariant(const Loop *L) const; - - // hasComputableLoopEvolution - N-ary expressions have computable loop - // evolutions iff they have at least one operand that varies with the loop, - // but that all varying operands are computable. - virtual bool hasComputableLoopEvolution(const Loop *L) const; - virtual bool hasOperand(const SCEV *O) const; bool dominates(BasicBlock *BB, DominatorTree *DT) const; @@ -328,15 +305,6 @@ const SCEV *getLHS() const { return LHS; } const SCEV *getRHS() const { return RHS; } - virtual bool isLoopInvariant(const Loop *L) const { - return LHS->isLoopInvariant(L) && RHS->isLoopInvariant(L); - } - - virtual bool hasComputableLoopEvolution(const Loop *L) const { - return LHS->hasComputableLoopEvolution(L) && - RHS->hasComputableLoopEvolution(L); - } - virtual bool hasOperand(const SCEV *O) const { return O == LHS || O == RHS || LHS->hasOperand(O) || RHS->hasOperand(O); } @@ -389,12 +357,6 @@ getLoop()); } - virtual bool hasComputableLoopEvolution(const Loop *QL) const { - return L == QL; - } - - virtual bool isLoopInvariant(const Loop *QueryLoop) const; - bool dominates(BasicBlock *BB, DominatorTree *DT) const; bool properlyDominates(BasicBlock *BB, DominatorTree *DT) const; @@ -530,11 +492,6 @@ bool isAlignOf(const Type *&AllocTy) const; bool isOffsetOf(const Type *&STy, Constant *&FieldNo) const; - virtual bool isLoopInvariant(const Loop *L) const; - virtual bool hasComputableLoopEvolution(const Loop *QL) const { - return false; // not computable - } - virtual bool hasOperand(const SCEV *) const { return false; } Modified: llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp?rev=119562&r1=119561&r2=119562&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp (original) +++ llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp Wed Nov 17 15:23:15 2010 @@ -132,7 +132,7 @@ DenseSet* Loops) const { // Refactor this into an SCEVVisitor, if efficiency becomes a concern. for (const Loop *L = this->L; L != 0; L = L->getParentLoop()) - if (!S->isLoopInvariant(L)) + if (!SE->isLoopInvariant(S, L)) Loops->insert(L); } Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=119562&r1=119561&r2=119562&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original) +++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Wed Nov 17 15:23:15 2010 @@ -148,21 +148,11 @@ SCEVCouldNotCompute::SCEVCouldNotCompute() : SCEV(FoldingSetNodeIDRef(), scCouldNotCompute) {} -bool SCEVCouldNotCompute::isLoopInvariant(const Loop *L) const { - llvm_unreachable("Attempt to use a SCEVCouldNotCompute object!"); - return false; -} - const Type *SCEVCouldNotCompute::getType() const { llvm_unreachable("Attempt to use a SCEVCouldNotCompute object!"); return 0; } -bool SCEVCouldNotCompute::hasComputableLoopEvolution(const Loop *L) const { - llvm_unreachable("Attempt to use a SCEVCouldNotCompute object!"); - return false; -} - bool SCEVCouldNotCompute::hasOperand(const SCEV *) const { llvm_unreachable("Attempt to use a SCEVCouldNotCompute object!"); return false; @@ -276,30 +266,6 @@ return true; } -bool SCEVNAryExpr::isLoopInvariant(const Loop *L) const { - for (op_iterator I = op_begin(), E = op_end(); I != E; ++I) - if (!(*I)->isLoopInvariant(L)) - return false; - return true; -} - -// hasComputableLoopEvolution - N-ary expressions have computable loop -// evolutions iff they have at least one operand that varies with the loop, -// but that all varying operands are computable. -bool SCEVNAryExpr::hasComputableLoopEvolution(const Loop *L) const { - bool HasVarying = false; - for (op_iterator I = op_begin(), E = op_end(); I != E; ++I) { - const SCEV *S = *I; - if (!S->isLoopInvariant(L)) { - if (S->hasComputableLoopEvolution(L)) - HasVarying = true; - else - return false; - } - } - return HasVarying; -} - bool SCEVNAryExpr::hasOperand(const SCEV *O) const { for (op_iterator I = op_begin(), E = op_end(); I != E; ++I) { const SCEV *S = *I; @@ -330,29 +296,6 @@ return RHS->getType(); } -bool SCEVAddRecExpr::isLoopInvariant(const Loop *QueryLoop) const { - // Add recurrences are never invariant in the function-body (null loop). - if (!QueryLoop) - return false; - - // This recurrence is variant w.r.t. QueryLoop if QueryLoop contains L. - if (QueryLoop->contains(L)) - return false; - - // This recurrence is invariant w.r.t. QueryLoop if L contains QueryLoop. - if (L->contains(QueryLoop)) - return true; - - // This recurrence is variant w.r.t. QueryLoop if any of its operands - // are variant. - for (op_iterator I = op_begin(), E = op_end(); I != E; ++I) - if (!(*I)->isLoopInvariant(QueryLoop)) - return false; - - // Otherwise it's loop-invariant. - return true; -} - bool SCEVAddRecExpr::dominates(BasicBlock *BB, DominatorTree *DT) const { return DT->dominates(L->getHeader(), BB) && @@ -405,16 +348,6 @@ setValPtr(New); } -bool SCEVUnknown::isLoopInvariant(const Loop *L) const { - // All non-instruction values are loop invariant. All instructions are loop - // invariant if they are not contained in the specified loop. - // Instructions are never considered invariant in the function body - // (null loop) because they are defined within the "loop". - if (Instruction *I = dyn_cast(getValue())) - return L && !L->contains(I); - return true; -} - bool SCEVUnknown::dominates(BasicBlock *BB, DominatorTree *DT) const { if (Instruction *I = dyn_cast(getValue())) return DT->dominates(I->getParent(), BB); @@ -1648,7 +1581,7 @@ const SCEVAddRecExpr *AddRec = cast(Ops[Idx]); const Loop *AddRecLoop = AddRec->getLoop(); for (unsigned i = 0, e = Ops.size(); i != e; ++i) - if (Ops[i]->isLoopInvariant(AddRecLoop)) { + if (isLoopInvariant(Ops[i], AddRecLoop)) { LIOps.push_back(Ops[i]); Ops.erase(Ops.begin()+i); --i; --e; @@ -1854,7 +1787,7 @@ const SCEVAddRecExpr *AddRec = cast(Ops[Idx]); const Loop *AddRecLoop = AddRec->getLoop(); for (unsigned i = 0, e = Ops.size(); i != e; ++i) - if (Ops[i]->isLoopInvariant(AddRecLoop)) { + if (isLoopInvariant(Ops[i], AddRecLoop)) { LIOps.push_back(Ops[i]); Ops.erase(Ops.begin()+i); --i; --e; @@ -2074,7 +2007,7 @@ assert(getEffectiveSCEVType(Operands[i]->getType()) == ETy && "SCEVAddRecExpr operand types don't match!"); for (unsigned i = 0, e = Operands.size(); i != e; ++i) - assert(Operands[i]->isLoopInvariant(L) && + assert(isLoopInvariant(Operands[i], L) && "SCEVAddRecExpr operand is not loop-invariant!"); #endif @@ -2116,7 +2049,7 @@ // requirement. bool AllInvariant = true; for (unsigned i = 0, e = Operands.size(); i != e; ++i) - if (!Operands[i]->isLoopInvariant(L)) { + if (!isLoopInvariant(Operands[i], L)) { AllInvariant = false; break; } @@ -2124,7 +2057,7 @@ NestedOperands[0] = getAddRecExpr(Operands, L); AllInvariant = true; for (unsigned i = 0, e = NestedOperands.size(); i != e; ++i) - if (!NestedOperands[i]->isLoopInvariant(NestedLoop)) { + if (!isLoopInvariant(NestedOperands[i], NestedLoop)) { AllInvariant = false; break; } @@ -2812,7 +2745,7 @@ // This is not a valid addrec if the step amount is varying each // loop iteration, but is not itself an addrec in this loop. - if (Accum->isLoopInvariant(L) || + if (isLoopInvariant(Accum, L) || (isa(Accum) && cast(Accum)->getLoop() == L)) { bool HasNUW = false; @@ -2833,7 +2766,7 @@ // Since the no-wrap flags are on the increment, they apply to the // post-incremented value as well. - if (Accum->isLoopInvariant(L)) + if (isLoopInvariant(Accum, L)) (void)getAddRecExpr(getAddExpr(StartVal, Accum), Accum, L, HasNUW, HasNSW); @@ -3736,8 +3669,8 @@ if (Pair.second) { BackedgeTakenInfo BECount = ComputeBackedgeTakenCount(L); if (BECount.Exact != getCouldNotCompute()) { - assert(BECount.Exact->isLoopInvariant(L) && - BECount.Max->isLoopInvariant(L) && + assert(isLoopInvariant(BECount.Exact, L) && + isLoopInvariant(BECount.Max, L) && "Computed backedge-taken count isn't loop invariant for loop!"); ++NumTripCountsComputed; @@ -4099,7 +4032,7 @@ // At this point, we would like to compute how many iterations of the // loop the predicate will return true for these inputs. - if (LHS->isLoopInvariant(L) && !RHS->isLoopInvariant(L)) { + if (isLoopInvariant(LHS, L) && !isLoopInvariant(RHS, L)) { // If there is a loop-invariant, force it into the RHS. std::swap(LHS, RHS); Cond = ICmpInst::getSwappedPredicate(Cond); @@ -4261,7 +4194,7 @@ // We can only recognize very limited forms of loop index expressions, in // particular, only affine AddRec's like {C1,+,C2}. const SCEVAddRecExpr *IdxExpr = dyn_cast(Idx); - if (!IdxExpr || !IdxExpr->isAffine() || IdxExpr->isLoopInvariant(L) || + if (!IdxExpr || !IdxExpr->isAffine() || isLoopInvariant(IdxExpr, L) || !isa(IdxExpr->getOperand(0)) || !isa(IdxExpr->getOperand(1))) return getCouldNotCompute(); @@ -4988,7 +4921,7 @@ // as both operands could be addrecs loop-invariant in each other's loop. if (const SCEVAddRecExpr *AR = dyn_cast(RHS)) { const Loop *L = AR->getLoop(); - if (LHS->isLoopInvariant(L) && LHS->properlyDominates(L->getHeader(), DT)) { + if (isLoopInvariant(LHS, L) && LHS->properlyDominates(L->getHeader(), DT)) { std::swap(LHS, RHS); Pred = ICmpInst::getSwappedPredicate(Pred); Changed = true; @@ -5605,7 +5538,7 @@ ScalarEvolution::HowManyLessThans(const SCEV *LHS, const SCEV *RHS, const Loop *L, bool isSigned) { // Only handle: "ADDREC < LoopInvariant". - if (!RHS->isLoopInvariant(L)) return getCouldNotCompute(); + if (!isLoopInvariant(RHS, L)) return getCouldNotCompute(); const SCEVAddRecExpr *AddRec = dyn_cast(LHS); if (!AddRec || AddRec->getLoop() != L) @@ -5988,7 +5921,7 @@ if (L) { OS << "\t\t" "Exits: "; const SCEV *ExitValue = SE.getSCEVAtScope(SV, L->getParentLoop()); - if (!ExitValue->isLoopInvariant(L)) { + if (!SE.isLoopInvariant(ExitValue, L)) { OS << "<>"; } else { OS << *ExitValue; @@ -6005,3 +5938,124 @@ PrintLoopInfo(OS, &SE, *I); } +bool ScalarEvolution::isLoopInvariant(const SCEV *S, const Loop *L) { + switch (S->getSCEVType()) { + case scConstant: + return true; + case scTruncate: + case scZeroExtend: + case scSignExtend: + return isLoopInvariant(cast(S)->getOperand(), L); + case scAddRecExpr: { + const SCEVAddRecExpr *AR = cast(S); + + // Add recurrences are never invariant in the function-body (null loop). + if (!L) + return false; + + // This recurrence is variant w.r.t. L if L contains AR's loop. + if (L->contains(AR->getLoop())) + return false; + + // This recurrence is invariant w.r.t. L if AR's loop contains L. + if (AR->getLoop()->contains(L)) + return true; + + // This recurrence is variant w.r.t. L if any of its operands + // are variant. + for (SCEVAddRecExpr::op_iterator I = AR->op_begin(), E = AR->op_end(); + I != E; ++I) + if (!isLoopInvariant(*I, L)) + return false; + + // Otherwise it's loop-invariant. + return true; + } + case scAddExpr: + case scMulExpr: + case scUMaxExpr: + case scSMaxExpr: { + const SCEVNAryExpr *NAry = cast(S); + for (SCEVNAryExpr::op_iterator I = NAry->op_begin(), E = NAry->op_end(); + I != E; ++I) + if (!isLoopInvariant(*I, L)) + return false; + return true; + } + case scUDivExpr: { + const SCEVUDivExpr *UDiv = cast(S); + return isLoopInvariant(UDiv->getLHS(), L) && + isLoopInvariant(UDiv->getRHS(), L); + } + case scUnknown: + // All non-instruction values are loop invariant. All instructions are loop + // invariant if they are not contained in the specified loop. + // Instructions are never considered invariant in the function body + // (null loop) because they are defined within the "loop". + if (Instruction *I = dyn_cast(cast(S)->getValue())) + return L && !L->contains(I); + return true; + case scCouldNotCompute: + llvm_unreachable("Attempt to use a SCEVCouldNotCompute object!"); + return false; + default: break; + } + llvm_unreachable("Unknown SCEV kind!"); + return false; +} + +bool ScalarEvolution::hasComputableLoopEvolution(const SCEV *S, const Loop *L) { + switch (S->getSCEVType()) { + case scConstant: + return false; + case scTruncate: + case scZeroExtend: + case scSignExtend: + return hasComputableLoopEvolution(cast(S)->getOperand(), L); + case scAddRecExpr: + return cast(S)->getLoop() == L; + case scAddExpr: + case scMulExpr: + case scUMaxExpr: + case scSMaxExpr: { + const SCEVNAryExpr *NAry = cast(S); + bool HasVarying = false; + for (SCEVNAryExpr::op_iterator I = NAry->op_begin(), E = NAry->op_end(); + I != E; ++I) { + const SCEV *Op = *I; + if (!isLoopInvariant(Op, L)) { + if (hasComputableLoopEvolution(Op, L)) + HasVarying = true; + else + return false; + } + } + return HasVarying; + } + case scUDivExpr: { + const SCEVUDivExpr *UDiv = cast(S); + bool HasVarying = false; + if (!isLoopInvariant(UDiv->getLHS(), L)) { + if (hasComputableLoopEvolution(UDiv->getLHS(), L)) + HasVarying = true; + else + return false; + } + if (!isLoopInvariant(UDiv->getRHS(), L)) { + if (hasComputableLoopEvolution(UDiv->getRHS(), L)) + HasVarying = true; + else + return false; + } + return HasVarying; + } + case scUnknown: + return false; + case scCouldNotCompute: + llvm_unreachable("Attempt to use a SCEVCouldNotCompute object!"); + return false; + default: break; + } + llvm_unreachable("Unknown SCEV kind!"); + return false; +} Modified: llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp?rev=119562&r1=119561&r2=119562&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp (original) +++ llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp Wed Nov 17 15:23:15 2010 @@ -1278,7 +1278,7 @@ Instruction *InsertPt = Builder.GetInsertPoint(); for (Loop *L = SE.LI->getLoopFor(Builder.GetInsertBlock()); ; L = L->getParentLoop()) - if (S->isLoopInvariant(L)) { + if (SE.isLoopInvariant(S, L)) { if (!L) break; if (BasicBlock *Preheader = L->getLoopPreheader()) InsertPt = Preheader->getTerminator(); @@ -1286,7 +1286,7 @@ // If the SCEV is computable at this level, insert it into the header // after the PHIs (and after any other instructions that we've inserted // there) so that it is guaranteed to dominate any user inside the loop. - if (L && S->hasComputableLoopEvolution(L) && !PostIncLoops.count(L)) + if (L && SE.hasComputableLoopEvolution(S, L) && !PostIncLoops.count(L)) InsertPt = L->getHeader()->getFirstNonPHI(); while (isInsertedInstruction(InsertPt) || isa(InsertPt)) InsertPt = llvm::next(BasicBlock::iterator(InsertPt)); Modified: llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp?rev=119562&r1=119561&r2=119562&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp Wed Nov 17 15:23:15 2010 @@ -200,7 +200,7 @@ } // Expand the code for the iteration count. - assert(RHS->isLoopInvariant(L) && + assert(SE->isLoopInvariant(RHS, L) && "Computed iteration count is not loop invariant!"); Value *ExitCnt = Rewriter.expandCodeFor(RHS, IndVar->getType(), BI); @@ -302,7 +302,7 @@ // and varies predictably *inside* the loop. Evaluate the value it // contains when the loop exits, if possible. const SCEV *ExitValue = SE->getSCEVAtScope(Inst, L->getParentLoop()); - if (!ExitValue->isLoopInvariant(L)) + if (!SE->isLoopInvariant(ExitValue, L)) continue; Changed = true; @@ -617,9 +617,9 @@ // currently can only reduce affine polynomials. For now just disable // indvar subst on anything more complex than an affine addrec, unless // it can be expanded to a trivial value. -static bool isSafe(const SCEV *S, const Loop *L) { +static bool isSafe(const SCEV *S, const Loop *L, ScalarEvolution *SE) { // Loop-invariant values are safe. - if (S->isLoopInvariant(L)) return true; + if (SE->isLoopInvariant(S, L)) return true; // Affine addrecs are safe. Non-affine are not, because LSR doesn't know how // to transform them into efficient code. @@ -630,18 +630,18 @@ if (const SCEVCommutativeExpr *Commutative = dyn_cast(S)) { for (SCEVCommutativeExpr::op_iterator I = Commutative->op_begin(), E = Commutative->op_end(); I != E; ++I) - if (!isSafe(*I, L)) return false; + if (!isSafe(*I, L, SE)) return false; return true; } // A cast is safe if its operand is. if (const SCEVCastExpr *C = dyn_cast(S)) - return isSafe(C->getOperand(), L); + return isSafe(C->getOperand(), L, SE); // A udiv is safe if its operands are. if (const SCEVUDivExpr *UD = dyn_cast(S)) - return isSafe(UD->getLHS(), L) && - isSafe(UD->getRHS(), L); + return isSafe(UD->getLHS(), L, SE) && + isSafe(UD->getRHS(), L, SE); // SCEVUnknown is always safe. if (isa(S)) @@ -672,7 +672,7 @@ // Evaluate the expression out of the loop, if possible. if (!L->contains(UI->getUser())) { const SCEV *ExitVal = SE->getSCEVAtScope(AR, L->getParentLoop()); - if (ExitVal->isLoopInvariant(L)) + if (SE->isLoopInvariant(ExitVal, L)) AR = ExitVal; } @@ -682,7 +682,7 @@ // currently can only reduce affine polynomials. For now just disable // indvar subst on anything more complex than an affine addrec, unless // it can be expanded to a trivial value. - if (!isSafe(AR, L)) + if (!isSafe(AR, L, SE)) continue; // Determine the insertion point for this user. By default, insert Modified: llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp?rev=119562&r1=119561&r2=119562&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Wed Nov 17 15:23:15 2010 @@ -730,7 +730,7 @@ ++SetupCost; NumIVMuls += isa(Reg) && - Reg->hasComputableLoopEvolution(L); + SE.hasComputableLoopEvolution(Reg, L); } /// RatePrimaryRegister - Record this register in the set. If we haven't seen it @@ -2056,7 +2056,7 @@ // x == y --> x - y == 0 const SCEV *N = SE.getSCEV(NV); - if (N->isLoopInvariant(L)) { + if (SE.isLoopInvariant(N, L)) { Kind = LSRUse::ICmpZero; S = SE.getMinusSCEV(N, S); } @@ -2196,7 +2196,7 @@ if (const ICmpInst *ICI = dyn_cast(UserInst)) { unsigned OtherIdx = !UI.getOperandNo(); Value *OtherOp = const_cast(ICI->getOperand(OtherIdx)); - if (SE.getSCEV(OtherOp)->hasComputableLoopEvolution(L)) + if (SE.hasComputableLoopEvolution(SE.getSCEV(OtherOp), L)) continue; } @@ -2279,7 +2279,7 @@ // Loop-variant "unknown" values are uninteresting; we won't be able to // do anything meaningful with them. - if (isa(*J) && !(*J)->isLoopInvariant(L)) + if (isa(*J) && !SE.isLoopInvariant(*J, L)) continue; // Don't pull a constant into a register if the constant could be folded @@ -2331,7 +2331,7 @@ I = Base.BaseRegs.begin(), E = Base.BaseRegs.end(); I != E; ++I) { const SCEV *BaseReg = *I; if (BaseReg->properlyDominates(L->getHeader(), &DT) && - !BaseReg->hasComputableLoopEvolution(L)) + !SE.hasComputableLoopEvolution(BaseReg, L)) Ops.push_back(BaseReg); else F.BaseRegs.push_back(BaseReg); From bob.wilson at apple.com Wed Nov 17 15:25:27 2010 From: bob.wilson at apple.com (Bob Wilson) Date: Wed, 17 Nov 2010 21:25:27 -0000 Subject: [llvm-commits] [llvm] r119563 - in /llvm/trunk: lib/Target/ARM/ARMGlobalMerge.cpp test/CodeGen/ARM/global-merge.ll Message-ID: <20101117212527.CB7E72A6C12C@llvm.org> Author: bwilson Date: Wed Nov 17 15:25:27 2010 New Revision: 119563 URL: http://llvm.org/viewvc/llvm-project?rev=119563&view=rev Log: Fix the ARMGlobalMerge pass to look at variable sizes instead of pointer sizes. It was mistakenly looking at the pointer type when checking for the size of global variables. This is a partial fix for Radar 8673120. Added: llvm/trunk/test/CodeGen/ARM/global-merge.ll Modified: llvm/trunk/lib/Target/ARM/ARMGlobalMerge.cpp Modified: llvm/trunk/lib/Target/ARM/ARMGlobalMerge.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMGlobalMerge.cpp?rev=119563&r1=119562&r2=119563&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMGlobalMerge.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMGlobalMerge.cpp Wed Nov 17 15:25:27 2010 @@ -179,7 +179,7 @@ I->getName().startswith(".llvm.")) continue; - if (TD->getTypeAllocSize(I->getType()) < MaxOffset) { + if (TD->getTypeAllocSize(I->getType()->getElementType()) < MaxOffset) { if (I->isConstant()) ConstGlobals.push_back(I); else Added: llvm/trunk/test/CodeGen/ARM/global-merge.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/global-merge.ll?rev=119563&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/ARM/global-merge.ll (added) +++ llvm/trunk/test/CodeGen/ARM/global-merge.ll Wed Nov 17 15:25:27 2010 @@ -0,0 +1,11 @@ +; RUN: llc < %s -march=thumb | FileCheck %s +; Test the ARMGlobalMerge pass. Use -march=thumb because it has a small +; value for the maximum offset (127). + +; A local array that exceeds the maximum offset should not be merged. +; CHECK: g0: + at g0 = internal global [32 x i32] [ i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 1, i32 2 ] + +; CHECK: merged: + at g1 = internal global i32 1 + at g2 = internal global i32 2 From bob.wilson at apple.com Wed Nov 17 15:25:33 2010 From: bob.wilson at apple.com (Bob Wilson) Date: Wed, 17 Nov 2010 21:25:33 -0000 Subject: [llvm-commits] [llvm] r119564 - in /llvm/trunk: lib/Target/ARM/ARMGlobalMerge.cpp test/CodeGen/ARM/global-merge.ll Message-ID: <20101117212533.39ECB2A6C12D@llvm.org> Author: bwilson Date: Wed Nov 17 15:25:33 2010 New Revision: 119564 URL: http://llvm.org/viewvc/llvm-project?rev=119564&view=rev Log: Change the symbol for merged globals from "merged" to "_MergedGlobals". This makes it more clear that the symbol is an internal, compiler-generated name and gives a little more description about its contents. Modified: llvm/trunk/lib/Target/ARM/ARMGlobalMerge.cpp llvm/trunk/test/CodeGen/ARM/global-merge.ll Modified: llvm/trunk/lib/Target/ARM/ARMGlobalMerge.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMGlobalMerge.cpp?rev=119564&r1=119563&r2=119564&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMGlobalMerge.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMGlobalMerge.cpp Wed Nov 17 15:25:33 2010 @@ -140,7 +140,7 @@ Constant *MergedInit = ConstantStruct::get(MergedTy, Inits); GlobalVariable *MergedGV = new GlobalVariable(M, MergedTy, isConst, GlobalValue::InternalLinkage, - MergedInit, "merged"); + MergedInit, "_MergedGlobals"); for (size_t k = i; k < j; ++k) { Constant *Idx[2] = { ConstantInt::get(Int32Ty, 0), Modified: llvm/trunk/test/CodeGen/ARM/global-merge.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/global-merge.ll?rev=119564&r1=119563&r2=119564&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/global-merge.ll (original) +++ llvm/trunk/test/CodeGen/ARM/global-merge.ll Wed Nov 17 15:25:33 2010 @@ -6,6 +6,6 @@ ; CHECK: g0: @g0 = internal global [32 x i32] [ i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 1, i32 2 ] -; CHECK: merged: +; CHECK: _MergedGlobals: @g1 = internal global i32 1 @g2 = internal global i32 2 From bob.wilson at apple.com Wed Nov 17 15:25:36 2010 From: bob.wilson at apple.com (Bob Wilson) Date: Wed, 17 Nov 2010 21:25:36 -0000 Subject: [llvm-commits] [llvm] r119565 - in /llvm/trunk: lib/Target/ARM/ARMGlobalMerge.cpp test/CodeGen/ARM/global-merge.ll Message-ID: <20101117212536.706C32A6C12C@llvm.org> Author: bwilson Date: Wed Nov 17 15:25:36 2010 New Revision: 119565 URL: http://llvm.org/viewvc/llvm-project?rev=119565&view=rev Log: Fix ARMGlobalMerge pass to check if globals are entirely within range. It is generally not sufficient to check if the starting offset is in range of the maximum offset that can be efficiently used for the target. Modified: llvm/trunk/lib/Target/ARM/ARMGlobalMerge.cpp llvm/trunk/test/CodeGen/ARM/global-merge.ll Modified: llvm/trunk/lib/Target/ARM/ARMGlobalMerge.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMGlobalMerge.cpp?rev=119565&r1=119564&r2=119565&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMGlobalMerge.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMGlobalMerge.cpp Wed Nov 17 15:25:36 2010 @@ -129,11 +129,14 @@ uint64_t MergedSize = 0; std::vector Tys; std::vector Inits; - for (j = i; MergedSize < MaxOffset && j != e; ++j) { + for (j = i; j != e; ++j) { const Type *Ty = Globals[j]->getType()->getElementType(); + MergedSize += TD->getTypeAllocSize(Ty); + if (MergedSize > MaxOffset) { + break; + } Tys.push_back(Ty); Inits.push_back(Globals[j]->getInitializer()); - MergedSize += TD->getTypeAllocSize(Ty); } StructType *MergedTy = StructType::get(M.getContext(), Tys); Modified: llvm/trunk/test/CodeGen/ARM/global-merge.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/global-merge.ll?rev=119565&r1=119564&r2=119565&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/global-merge.ll (original) +++ llvm/trunk/test/CodeGen/ARM/global-merge.ll Wed Nov 17 15:25:36 2010 @@ -9,3 +9,9 @@ ; CHECK: _MergedGlobals: @g1 = internal global i32 1 @g2 = internal global i32 2 + +; Make sure that the complete variable fits within the range of the maximum +; offset. Having the starting offset in range is not sufficient. +; When this works properly, @g3 is placed in a separate chunk of merged globals. +; CHECK: _MergedGlobals1: + at g3 = internal global [30 x i32] [ i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10 ] From bob.wilson at apple.com Wed Nov 17 15:25:39 2010 From: bob.wilson at apple.com (Bob Wilson) Date: Wed, 17 Nov 2010 21:25:39 -0000 Subject: [llvm-commits] [llvm] r119566 - in /llvm/trunk: lib/Target/ARM/ARMGlobalMerge.cpp test/CodeGen/ARM/global-merge.ll Message-ID: <20101117212539.9EC0C2A6C12E@llvm.org> Author: bwilson Date: Wed Nov 17 15:25:39 2010 New Revision: 119566 URL: http://llvm.org/viewvc/llvm-project?rev=119566&view=rev Log: Change ARMGlobalMerge to keep BSS globals in separate pools. This completes the fixes for Radar 8673120. Modified: llvm/trunk/lib/Target/ARM/ARMGlobalMerge.cpp llvm/trunk/test/CodeGen/ARM/global-merge.ll Modified: llvm/trunk/lib/Target/ARM/ARMGlobalMerge.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMGlobalMerge.cpp?rev=119566&r1=119565&r2=119566&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMGlobalMerge.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMGlobalMerge.cpp Wed Nov 17 15:25:39 2010 @@ -65,6 +65,7 @@ #include "llvm/Pass.h" #include "llvm/Target/TargetData.h" #include "llvm/Target/TargetLowering.h" +#include "llvm/Target/TargetLoweringObjectFile.h" using namespace llvm; namespace { @@ -74,7 +75,7 @@ const TargetLowering *TLI; bool doMerge(SmallVectorImpl &Globals, - Module &M, bool) const; + Module &M, bool isConst) const; public: static char ID; // Pass identification, replacement for typeid. @@ -161,7 +162,7 @@ bool ARMGlobalMerge::doInitialization(Module &M) { - SmallVector Globals, ConstGlobals; + SmallVector Globals, ConstGlobals, BSSGlobals; const TargetData *TD = TLI->getTargetData(); unsigned MaxOffset = TLI->getMaximalGlobalOffset(); bool Changed = false; @@ -183,7 +184,10 @@ continue; if (TD->getTypeAllocSize(I->getType()->getElementType()) < MaxOffset) { - if (I->isConstant()) + const TargetLoweringObjectFile &TLOF = TLI->getObjFileLowering(); + if (TLOF.getKindForGlobal(I, TLI->getTargetMachine()).isBSSLocal()) + BSSGlobals.push_back(I); + else if (I->isConstant()) ConstGlobals.push_back(I); else Globals.push_back(I); @@ -192,10 +196,12 @@ if (Globals.size() > 1) Changed |= doMerge(Globals, M, false); + if (BSSGlobals.size() > 1) + Changed |= doMerge(BSSGlobals, M, false); + // FIXME: This currently breaks the EH processing due to way how the // typeinfo detection works. We might want to detect the TIs and ignore // them in the future. - // if (ConstGlobals.size() > 1) // Changed |= doMerge(ConstGlobals, M, true); Modified: llvm/trunk/test/CodeGen/ARM/global-merge.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/global-merge.ll?rev=119566&r1=119565&r2=119566&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/global-merge.ll (original) +++ llvm/trunk/test/CodeGen/ARM/global-merge.ll Wed Nov 17 15:25:39 2010 @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=thumb | FileCheck %s +; RUN: llc < %s -mtriple=thumb-apple-darwin | FileCheck %s ; Test the ARMGlobalMerge pass. Use -march=thumb because it has a small ; value for the maximum offset (127). @@ -15,3 +15,9 @@ ; When this works properly, @g3 is placed in a separate chunk of merged globals. ; CHECK: _MergedGlobals1: @g3 = internal global [30 x i32] [ i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10 ] + +; Global variables that can be placed in BSS should be kept together in a +; separate pool of merged globals. +; CHECK: _MergedGlobals2 + at g4 = internal global i32 0 + at g5 = internal global i32 0 From aggarwa4 at illinois.edu Wed Nov 17 15:27:57 2010 From: aggarwa4 at illinois.edu (Arushi Aggarwal) Date: Wed, 17 Nov 2010 21:27:57 -0000 Subject: [llvm-commits] [poolalloc] r119568 - /poolalloc/trunk/lib/DSA/BottomUpClosure.cpp Message-ID: <20101117212757.88E422A6C12C@llvm.org> Author: aggarwa4 Date: Wed Nov 17 15:27:57 2010 New Revision: 119568 URL: http://llvm.org/viewvc/llvm-project?rev=119568&view=rev Log: We only inline if we know all the callees.(Also, if we know any callees at this point in BU, it is because the callee node is complete, or it is a direct call site). The check was redundant, and seemed to be an artifact of old partial inlining code. It has been replaced by an assert. Modified: poolalloc/trunk/lib/DSA/BottomUpClosure.cpp Modified: poolalloc/trunk/lib/DSA/BottomUpClosure.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/BottomUpClosure.cpp?rev=119568&r1=119567&r2=119568&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/BottomUpClosure.cpp (original) +++ poolalloc/trunk/lib/DSA/BottomUpClosure.cpp Wed Nov 17 15:27:57 2010 @@ -263,7 +263,7 @@ if (CS.isDirectCall()) { if (!CS.getCalleeFunc()->isDeclaration()) Callees.push_back(CS.getCalleeFunc()); - } else if (!CS.getCalleeNode()->isIncompleteNode()) { + } else if (CS.getCalleeNode()->isCompleteNode()) { // Get all callees. if (!CS.getCalleeNode()->isExternFuncNode()) { // Get all the callees for this callsite @@ -730,7 +730,7 @@ DEBUG(Graph->AssertGraphOK(); Graph->getGlobalsGraph()->AssertGraphOK()); DSCallSite &CS = *TempFCs.begin(); - + // Fast path for noop calls. Note that we don't care about merging globals // in the callee with nodes in the caller here. if (!CS.isIndirectCall() && CS.getRetVal().isNull() && CS.getNumPtrArgs() == 0 && !CS.isVarArg()) { @@ -743,61 +743,23 @@ std::vector CalledFuncs; getAllCallees(CS,CalledFuncs); - if (CalledFuncs.empty()) { ++NumEmptyCalls; + if (CS.isIndirectCall()) + ++NumIndUnresolved; // Remember that we could not resolve this yet! AuxCallsList.splice(AuxCallsList.end(), TempFCs, TempFCs.begin()); continue; } - - // Direct calls are always inlined and removed from AuxCalls - // Indirect calls are removed if the callnode is complete and the callnode's - // functions set is a subset of the Calls from the callgraph - // We only inline from the callgraph (which is immutable during this phase - // of bu) so as to not introduce SCCs and still be able to inline - // aggressively - bool eraseCS = true; + // If we get to this point, we know the callees, and can inline. + // This means, that either it is a direct call site. Or if it is + // an indirect call site, its calleeNode is complete, and we can + // resolve this particular call site. + assert((CS.isDirectCall() || CS.getCalleeNode()->isCompleteNode()) + && "Resolving an indirect incomplete call site"); + if (CS.isIndirectCall()) { - eraseCS = false; - if (CS.getCalleeNode()->isCompleteNode()) { - // - // Get the list of callees associated with the DSNode and remove those - // that are external functions (i.e., have no function body). - // - std::vector NodeCallees; - CS.getCalleeNode()->addFullFunctionList(NodeCallees); - std::vector::iterator ErasePoint = - std::remove_if(NodeCallees.begin(), NodeCallees.end(), - std::mem_fun(&Function::isDeclaration)); - NodeCallees.erase(ErasePoint, NodeCallees.end()); - - // Remove callees that aren't legally called from this callsite. - // We're done with the callsite if all /legal/ callees have been - // taken care of already. We remove them because they won't - // be part of the callgraph (not because of this callsite anyway) - // and so we shouldn't expect them to be. - applyCallsiteFilter(CS,NodeCallees); - - // - // Only erase this call site if there's nothing left to do for it. - // This means that all of the function targets recorded in the DSNode - // have already been incorporated into the call graph that we've been - // constructing. - // - std::sort(CalledFuncs.begin(), CalledFuncs.end()); - std::sort(NodeCallees.begin(), NodeCallees.end()); - eraseCS = std::includes(CalledFuncs.begin(), CalledFuncs.end(), - NodeCallees.begin(), NodeCallees.end()); - } - - // - // Update the statistics on resolved indirect function calls. - // - if (eraseCS) ++NumIndResolved; - else - ++NumIndUnresolved; } DSGraph *GI; @@ -828,10 +790,7 @@ ++NumInlines; DEBUG(Graph->AssertGraphOK();); } - if (eraseCS) - TempFCs.erase(TempFCs.begin()); - else - AuxCallsList.splice(AuxCallsList.end(), TempFCs, TempFCs.begin()); + TempFCs.erase(TempFCs.begin()); } // Recompute the Incomplete markers From gohman at apple.com Wed Nov 17 15:41:58 2010 From: gohman at apple.com (Dan Gohman) Date: Wed, 17 Nov 2010 21:41:58 -0000 Subject: [llvm-commits] [llvm] r119570 - in /llvm/trunk: include/llvm/Analysis/ScalarEvolution.h include/llvm/Analysis/ScalarEvolutionExpressions.h lib/Analysis/ScalarEvolution.cpp lib/Analysis/ScalarEvolutionExpander.cpp lib/Transforms/Scalar/LoopStrengthReduce.cpp Message-ID: <20101117214158.C94822A6C12C@llvm.org> Author: djg Date: Wed Nov 17 15:41:58 2010 New Revision: 119570 URL: http://llvm.org/viewvc/llvm-project?rev=119570&view=rev Log: Move SCEV::dominates and properlyDominates to ScalarEvolution. Modified: llvm/trunk/include/llvm/Analysis/ScalarEvolution.h llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h llvm/trunk/lib/Analysis/ScalarEvolution.cpp llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Modified: llvm/trunk/include/llvm/Analysis/ScalarEvolution.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/ScalarEvolution.h?rev=119570&r1=119569&r2=119570&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/ScalarEvolution.h (original) +++ llvm/trunk/include/llvm/Analysis/ScalarEvolution.h Wed Nov 17 15:41:58 2010 @@ -99,14 +99,6 @@ /// indirect operand. virtual bool hasOperand(const SCEV *Op) const = 0; - /// dominates - Return true if elements that makes up this SCEV dominates - /// the specified basic block. - virtual bool dominates(BasicBlock *BB, DominatorTree *DT) const = 0; - - /// properlyDominates - Return true if elements that makes up this SCEV - /// properly dominate the specified basic block. - virtual bool properlyDominates(BasicBlock *BB, DominatorTree *DT) const = 0; - /// print - Print out the internal representation of this scalar to the /// specified stream. This should really only be used for debugging /// purposes. @@ -150,14 +142,6 @@ virtual void print(raw_ostream &OS) const; virtual bool hasOperand(const SCEV *Op) const; - virtual bool dominates(BasicBlock *BB, DominatorTree *DT) const { - return true; - } - - virtual bool properlyDominates(BasicBlock *BB, DominatorTree *DT) const { - return true; - } - /// Methods for support type inquiry through isa, cast, and dyn_cast: static inline bool classof(const SCEVCouldNotCompute *S) { return true; } static bool classof(const SCEV *S); @@ -699,6 +683,14 @@ /// to compute the value of the expression at any particular loop iteration. bool hasComputableLoopEvolution(const SCEV *S, const Loop *L); + /// dominates - Return true if elements that makes up the given SCEV + /// dominate the specified basic block. + bool dominates(const SCEV *S, BasicBlock *BB) const; + + /// properlyDominates - Return true if elements that makes up the given SCEV + /// properly dominate the specified basic block. + bool properlyDominates(const SCEV *S, BasicBlock *BB) const; + virtual bool runOnFunction(Function &F); virtual void releaseMemory(); virtual void getAnalysisUsage(AnalysisUsage &AU) const; Modified: llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h?rev=119570&r1=119569&r2=119570&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h (original) +++ llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h Wed Nov 17 15:41:58 2010 @@ -48,14 +48,6 @@ return false; } - bool dominates(BasicBlock *BB, DominatorTree *DT) const { - return true; - } - - bool properlyDominates(BasicBlock *BB, DominatorTree *DT) const { - return true; - } - virtual void print(raw_ostream &OS) const; /// Methods for support type inquiry through isa, cast, and dyn_cast: @@ -84,10 +76,6 @@ return Op == O || Op->hasOperand(O); } - virtual bool dominates(BasicBlock *BB, DominatorTree *DT) const; - - virtual bool properlyDominates(BasicBlock *BB, DominatorTree *DT) const; - /// Methods for support type inquiry through isa, cast, and dyn_cast: static inline bool classof(const SCEVCastExpr *S) { return true; } static inline bool classof(const SCEV *S) { @@ -188,10 +176,6 @@ virtual bool hasOperand(const SCEV *O) const; - bool dominates(BasicBlock *BB, DominatorTree *DT) const; - - bool properlyDominates(BasicBlock *BB, DominatorTree *DT) const; - virtual const Type *getType() const { return getOperand(0)->getType(); } bool hasNoUnsignedWrap() const { return SubclassData & (1 << 0); } @@ -309,10 +293,6 @@ return O == LHS || O == RHS || LHS->hasOperand(O) || RHS->hasOperand(O); } - bool dominates(BasicBlock *BB, DominatorTree *DT) const; - - bool properlyDominates(BasicBlock *BB, DominatorTree *DT) const; - virtual const Type *getType() const; void print(raw_ostream &OS) const; @@ -357,10 +337,6 @@ getLoop()); } - bool dominates(BasicBlock *BB, DominatorTree *DT) const; - - bool properlyDominates(BasicBlock *BB, DominatorTree *DT) const; - /// isAffine - Return true if this is an affine AddRec (i.e., it represents /// an expressions A+B*x where A and B are loop invariant values. bool isAffine() const { @@ -496,10 +472,6 @@ return false; } - bool dominates(BasicBlock *BB, DominatorTree *DT) const; - - bool properlyDominates(BasicBlock *BB, DominatorTree *DT) const; - virtual const Type *getType() const; virtual void print(raw_ostream &OS) const; Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=119570&r1=119569&r2=119570&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original) +++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Wed Nov 17 15:41:58 2010 @@ -197,14 +197,6 @@ unsigned SCEVTy, const SCEV *op, const Type *ty) : SCEV(ID, SCEVTy), Op(op), Ty(ty) {} -bool SCEVCastExpr::dominates(BasicBlock *BB, DominatorTree *DT) const { - return Op->dominates(BB, DT); -} - -bool SCEVCastExpr::properlyDominates(BasicBlock *BB, DominatorTree *DT) const { - return Op->properlyDominates(BB, DT); -} - SCEVTruncateExpr::SCEVTruncateExpr(const FoldingSetNodeIDRef ID, const SCEV *op, const Type *ty) : SCEVCastExpr(ID, scTruncate, op, ty) { @@ -252,20 +244,6 @@ OS << ")"; } -bool SCEVNAryExpr::dominates(BasicBlock *BB, DominatorTree *DT) const { - for (op_iterator I = op_begin(), E = op_end(); I != E; ++I) - if (!(*I)->dominates(BB, DT)) - return false; - return true; -} - -bool SCEVNAryExpr::properlyDominates(BasicBlock *BB, DominatorTree *DT) const { - for (op_iterator I = op_begin(), E = op_end(); I != E; ++I) - if (!(*I)->properlyDominates(BB, DT)) - return false; - return true; -} - bool SCEVNAryExpr::hasOperand(const SCEV *O) const { for (op_iterator I = op_begin(), E = op_end(); I != E; ++I) { const SCEV *S = *I; @@ -275,14 +253,6 @@ return false; } -bool SCEVUDivExpr::dominates(BasicBlock *BB, DominatorTree *DT) const { - return LHS->dominates(BB, DT) && RHS->dominates(BB, DT); -} - -bool SCEVUDivExpr::properlyDominates(BasicBlock *BB, DominatorTree *DT) const { - return LHS->properlyDominates(BB, DT) && RHS->properlyDominates(BB, DT); -} - void SCEVUDivExpr::print(raw_ostream &OS) const { OS << "(" << *LHS << " /u " << *RHS << ")"; } @@ -296,21 +266,6 @@ return RHS->getType(); } -bool -SCEVAddRecExpr::dominates(BasicBlock *BB, DominatorTree *DT) const { - return DT->dominates(L->getHeader(), BB) && - SCEVNAryExpr::dominates(BB, DT); -} - -bool -SCEVAddRecExpr::properlyDominates(BasicBlock *BB, DominatorTree *DT) const { - // This uses a "dominates" query instead of "properly dominates" query because - // the instruction which produces the addrec's value is a PHI, and a PHI - // effectively properly dominates its entire containing block. - return DT->dominates(L->getHeader(), BB) && - SCEVNAryExpr::properlyDominates(BB, DT); -} - void SCEVAddRecExpr::print(raw_ostream &OS) const { OS << "{" << *Operands[0]; for (unsigned i = 1, e = NumOperands; i != e; ++i) @@ -348,18 +303,6 @@ setValPtr(New); } -bool SCEVUnknown::dominates(BasicBlock *BB, DominatorTree *DT) const { - if (Instruction *I = dyn_cast(getValue())) - return DT->dominates(I->getParent(), BB); - return true; -} - -bool SCEVUnknown::properlyDominates(BasicBlock *BB, DominatorTree *DT) const { - if (Instruction *I = dyn_cast(getValue())) - return DT->properlyDominates(I->getParent(), BB); - return true; -} - const Type *SCEVUnknown::getType() const { return getValue()->getType(); } @@ -4921,7 +4864,7 @@ // as both operands could be addrecs loop-invariant in each other's loop. if (const SCEVAddRecExpr *AR = dyn_cast(RHS)) { const Loop *L = AR->getLoop(); - if (isLoopInvariant(LHS, L) && LHS->properlyDominates(L->getHeader(), DT)) { + if (isLoopInvariant(LHS, L) && properlyDominates(LHS, L->getHeader())) { std::swap(LHS, RHS); Pred = ICmpInst::getSwappedPredicate(Pred); Changed = true; @@ -6059,3 +6002,93 @@ llvm_unreachable("Unknown SCEV kind!"); return false; } + +bool ScalarEvolution::dominates(const SCEV *S, BasicBlock *BB) const { + switch (S->getSCEVType()) { + case scConstant: + return true; + case scTruncate: + case scZeroExtend: + case scSignExtend: + return dominates(cast(S)->getOperand(), BB); + case scAddRecExpr: { + const SCEVAddRecExpr *AR = cast(S); + if (!DT->dominates(AR->getLoop()->getHeader(), BB)) + return false; + } + // FALL THROUGH into SCEVNAryExpr handling. + case scAddExpr: + case scMulExpr: + case scUMaxExpr: + case scSMaxExpr: { + const SCEVNAryExpr *NAry = cast(S); + for (SCEVNAryExpr::op_iterator I = NAry->op_begin(), E = NAry->op_end(); + I != E; ++I) + if (!dominates(*I, BB)) + return false; + return true; + } + case scUDivExpr: { + const SCEVUDivExpr *UDiv = cast(S); + return dominates(UDiv->getLHS(), BB) && dominates(UDiv->getRHS(), BB); + } + case scUnknown: + if (Instruction *I = + dyn_cast(cast(S)->getValue())) + return DT->dominates(I->getParent(), BB); + return true; + case scCouldNotCompute: + llvm_unreachable("Attempt to use a SCEVCouldNotCompute object!"); + return false; + default: break; + } + llvm_unreachable("Unknown SCEV kind!"); + return false; +} + +bool ScalarEvolution::properlyDominates(const SCEV *S, BasicBlock *BB) const { + switch (S->getSCEVType()) { + case scConstant: + return true; + case scTruncate: + case scZeroExtend: + case scSignExtend: + return properlyDominates(cast(S)->getOperand(), BB); + case scAddRecExpr: { + // This uses a "dominates" query instead of "properly dominates" query + // because the instruction which produces the addrec's value is a PHI, and + // a PHI effectively properly dominates its entire containing block. + const SCEVAddRecExpr *AR = cast(S); + if (!DT->dominates(AR->getLoop()->getHeader(), BB)) + return false; + } + // FALL THROUGH into SCEVNAryExpr handling. + case scAddExpr: + case scMulExpr: + case scUMaxExpr: + case scSMaxExpr: { + const SCEVNAryExpr *NAry = cast(S); + for (SCEVNAryExpr::op_iterator I = NAry->op_begin(), E = NAry->op_end(); + I != E; ++I) + if (!properlyDominates(*I, BB)) + return false; + return true; + } + case scUDivExpr: { + const SCEVUDivExpr *UDiv = cast(S); + return properlyDominates(UDiv->getLHS(), BB) && + properlyDominates(UDiv->getRHS(), BB); + } + case scUnknown: + if (Instruction *I = + dyn_cast(cast(S)->getValue())) + return DT->properlyDominates(I->getParent(), BB); + return true; + case scCouldNotCompute: + llvm_unreachable("Attempt to use a SCEVCouldNotCompute object!"); + return false; + default: break; + } + llvm_unreachable("Unknown SCEV kind!"); + return false; +} Modified: llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp?rev=119570&r1=119569&r2=119570&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp (original) +++ llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp Wed Nov 17 15:41:58 2010 @@ -990,7 +990,7 @@ // Strip off any non-loop-dominating component from the addrec start. const SCEV *Start = Normalized->getStart(); const SCEV *PostLoopOffset = 0; - if (!Start->properlyDominates(L->getHeader(), SE.DT)) { + if (!SE.properlyDominates(Start, L->getHeader())) { PostLoopOffset = Start; Start = SE.getConstant(Normalized->getType(), 0); Normalized = @@ -1002,7 +1002,7 @@ // Strip off any non-loop-dominating component from the addrec step. const SCEV *Step = Normalized->getStepRecurrence(SE); const SCEV *PostLoopScale = 0; - if (!Step->dominates(L->getHeader(), SE.DT)) { + if (!SE.dominates(Step, L->getHeader())) { PostLoopScale = Step; Step = SE.getConstant(Normalized->getType(), 1); Normalized = Modified: llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp?rev=119570&r1=119569&r2=119570&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Wed Nov 17 15:41:58 2010 @@ -210,8 +210,7 @@ Formula() : ScaledReg(0) {} - void InitialMatch(const SCEV *S, Loop *L, - ScalarEvolution &SE, DominatorTree &DT); + void InitialMatch(const SCEV *S, Loop *L, ScalarEvolution &SE); unsigned getNumRegs() const; const Type *getType() const; @@ -232,9 +231,9 @@ static void DoInitialMatch(const SCEV *S, Loop *L, SmallVectorImpl &Good, SmallVectorImpl &Bad, - ScalarEvolution &SE, DominatorTree &DT) { + ScalarEvolution &SE) { // Collect expressions which properly dominate the loop header. - if (S->properlyDominates(L->getHeader(), &DT)) { + if (SE.properlyDominates(S, L->getHeader())) { Good.push_back(S); return; } @@ -243,18 +242,18 @@ if (const SCEVAddExpr *Add = dyn_cast(S)) { for (SCEVAddExpr::op_iterator I = Add->op_begin(), E = Add->op_end(); I != E; ++I) - DoInitialMatch(*I, L, Good, Bad, SE, DT); + DoInitialMatch(*I, L, Good, Bad, SE); return; } // Look at addrec operands. if (const SCEVAddRecExpr *AR = dyn_cast(S)) if (!AR->getStart()->isZero()) { - DoInitialMatch(AR->getStart(), L, Good, Bad, SE, DT); + DoInitialMatch(AR->getStart(), L, Good, Bad, SE); DoInitialMatch(SE.getAddRecExpr(SE.getConstant(AR->getType(), 0), AR->getStepRecurrence(SE), AR->getLoop()), - L, Good, Bad, SE, DT); + L, Good, Bad, SE); return; } @@ -266,7 +265,7 @@ SmallVector MyGood; SmallVector MyBad; - DoInitialMatch(NewMul, L, MyGood, MyBad, SE, DT); + DoInitialMatch(NewMul, L, MyGood, MyBad, SE); const SCEV *NegOne = SE.getSCEV(ConstantInt::getAllOnesValue( SE.getEffectiveSCEVType(NewMul->getType()))); for (SmallVectorImpl::const_iterator I = MyGood.begin(), @@ -286,11 +285,10 @@ /// InitialMatch - Incorporate loop-variant parts of S into this Formula, /// attempting to keep all loop-invariant and loop-computable values in a /// single base register. -void Formula::InitialMatch(const SCEV *S, Loop *L, - ScalarEvolution &SE, DominatorTree &DT) { +void Formula::InitialMatch(const SCEV *S, Loop *L, ScalarEvolution &SE) { SmallVector Good; SmallVector Bad; - DoInitialMatch(S, L, Good, Bad, SE, DT); + DoInitialMatch(S, L, Good, Bad, SE); if (!Good.empty()) { const SCEV *Sum = SE.getAddExpr(Good); if (!Sum->isZero()) @@ -2096,7 +2094,7 @@ void LSRInstance::InsertInitialFormula(const SCEV *S, LSRUse &LU, size_t LUIdx) { Formula F; - F.InitialMatch(S, L, SE, DT); + F.InitialMatch(S, L, SE); bool Inserted = InsertFormula(LU, LUIdx, F); assert(Inserted && "Initial formula already exists!"); (void)Inserted; } @@ -2330,7 +2328,7 @@ for (SmallVectorImpl::const_iterator I = Base.BaseRegs.begin(), E = Base.BaseRegs.end(); I != E; ++I) { const SCEV *BaseReg = *I; - if (BaseReg->properlyDominates(L->getHeader(), &DT) && + if (SE.properlyDominates(BaseReg, L->getHeader()) && !SE.hasComputableLoopEvolution(BaseReg, L)) Ops.push_back(BaseReg); else From dalej at apple.com Wed Nov 17 15:57:32 2010 From: dalej at apple.com (Dale Johannesen) Date: Wed, 17 Nov 2010 21:57:32 -0000 Subject: [llvm-commits] [llvm] r119572 - in /llvm/trunk/test/CodeGen: ARM/div.ll ARM/fpcmp_ueq.ll ARM/fpconv.ll ARM/select.ll Thumb/long.ll Thumb/select.ll Thumb2/div.ll Message-ID: <20101117215732.7489B2A6C12C@llvm.org> Author: johannes Date: Wed Nov 17 15:57:32 2010 New Revision: 119572 URL: http://llvm.org/viewvc/llvm-project?rev=119572&view=rev Log: These tests are looking for library function names that appear to differ on Linux. Try to make them pass on Linux. Would be good for a Linux person to review this. Modified: llvm/trunk/test/CodeGen/ARM/div.ll llvm/trunk/test/CodeGen/ARM/fpcmp_ueq.ll llvm/trunk/test/CodeGen/ARM/fpconv.ll llvm/trunk/test/CodeGen/ARM/select.ll llvm/trunk/test/CodeGen/Thumb/long.ll llvm/trunk/test/CodeGen/Thumb/select.ll llvm/trunk/test/CodeGen/Thumb2/div.ll Modified: llvm/trunk/test/CodeGen/ARM/div.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/div.ll?rev=119572&r1=119571&r2=119572&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/div.ll (original) +++ llvm/trunk/test/CodeGen/ARM/div.ll Wed Nov 17 15:57:32 2010 @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=arm | FileCheck %s -check-prefix=CHECK-ARM +; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s -check-prefix=CHECK-ARM define i32 @f1(i32 %a, i32 %b) { entry: Modified: llvm/trunk/test/CodeGen/ARM/fpcmp_ueq.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fpcmp_ueq.ll?rev=119572&r1=119571&r2=119572&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/fpcmp_ueq.ll (original) +++ llvm/trunk/test/CodeGen/ARM/fpcmp_ueq.ll Wed Nov 17 15:57:32 2010 @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=arm | grep moveq +; RUN: llc < %s -mtriple=arm-apple-darwin | grep moveq ; RUN: llc < %s -mtriple=armv7-apple-darwin -mcpu=cortex-a8 | FileCheck %s define i32 @f7(float %a, float %b) { Modified: llvm/trunk/test/CodeGen/ARM/fpconv.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fpconv.ll?rev=119572&r1=119571&r2=119572&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/fpconv.ll (original) +++ llvm/trunk/test/CodeGen/ARM/fpconv.ll Wed Nov 17 15:57:32 2010 @@ -1,5 +1,5 @@ ; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s --check-prefix=CHECK-VFP -; RUN: llc < %s -march=arm | FileCheck %s +; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s define float @f1(double %x) { ;CHECK-VFP: f1: Modified: llvm/trunk/test/CodeGen/ARM/select.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/select.ll?rev=119572&r1=119571&r2=119572&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/select.ll (original) +++ llvm/trunk/test/CodeGen/ARM/select.ll Wed Nov 17 15:57:32 2010 @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=arm | FileCheck %s +; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s ; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s --check-prefix=CHECK-VFP ; RUN: llc < %s -mattr=+neon,+thumb2 -mtriple=thumbv7-apple-darwin | FileCheck %s --check-prefix=CHECK-NEON Modified: llvm/trunk/test/CodeGen/Thumb/long.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb/long.ll?rev=119572&r1=119571&r2=119572&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb/long.ll (original) +++ llvm/trunk/test/CodeGen/Thumb/long.ll Wed Nov 17 15:57:32 2010 @@ -4,7 +4,7 @@ ; RUN: grep adc | count 1 ; RUN: llc < %s -march=thumb | \ ; RUN: grep sbc | count 1 -; RUN: llc < %s -march=thumb | grep __muldi3 +; RUN: llc < %s -mtriple=thumb-apple-darwin | grep __muldi3 define i64 @f1() { entry: Modified: llvm/trunk/test/CodeGen/Thumb/select.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb/select.ll?rev=119572&r1=119571&r2=119572&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb/select.ll (original) +++ llvm/trunk/test/CodeGen/Thumb/select.ll Wed Nov 17 15:57:32 2010 @@ -4,7 +4,7 @@ ; RUN: llc < %s -march=thumb | grep ble | count 1 ; RUN: llc < %s -march=thumb | grep bls | count 1 ; RUN: llc < %s -march=thumb | grep bhi | count 1 -; RUN: llc < %s -march=thumb | grep __ltdf2 +; RUN: llc < %s -mtriple=thumb-apple-darwin | grep __ltdf2 define i32 @f1(i32 %a.s) { entry: Modified: llvm/trunk/test/CodeGen/Thumb2/div.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/div.ll?rev=119572&r1=119571&r2=119572&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/div.ll (original) +++ llvm/trunk/test/CodeGen/Thumb2/div.ll Wed Nov 17 15:57:32 2010 @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=thumb -mattr=+thumb2 \ +; RUN: llc < %s -mtriple=thumb-apple-darwin -mattr=+thumb2 \ ; RUN: | FileCheck %s -check-prefix=CHECK-THUMB ; RUN: llc < %s -march=thumb -mcpu=cortex-m3 -mattr=+thumb2 \ ; RUN: | FileCheck %s -check-prefix=CHECK-THUMBV7M From grosbach at apple.com Wed Nov 17 15:57:51 2010 From: grosbach at apple.com (Jim Grosbach) Date: Wed, 17 Nov 2010 21:57:51 -0000 Subject: [llvm-commits] [llvm] r119573 - /llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Message-ID: <20101117215751.C6D9D2A6C12C@llvm.org> Author: grosbach Date: Wed Nov 17 15:57:51 2010 New Revision: 119573 URL: http://llvm.org/viewvc/llvm-project?rev=119573&view=rev Log: Fix comment typo. Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp?rev=119573&r1=119572&r2=119573&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Wed Nov 17 15:57:51 2010 @@ -677,7 +677,7 @@ const TargetInstrDesc &TID = MI.getDesc(); // Emit the 'add' instruction. - unsigned Binary = 0x4 << 21; // add: Insts{24-31} = 0b0100 + unsigned Binary = 0x4 << 21; // add: Insts{24-21} = 0b0100 // Set the conditional execution predicate Binary |= II->getPredicate(&MI) << ARMII::CondShift; From resistor at mac.com Wed Nov 17 16:16:31 2010 From: resistor at mac.com (Owen Anderson) Date: Wed, 17 Nov 2010 22:16:31 -0000 Subject: [llvm-commits] [llvm] r119575 - in /llvm/trunk: lib/Target/ARM/ARMInstrThumb2.td test/MC/ARM/thumb2.s Message-ID: <20101117221631.9C2B72A6C12C@llvm.org> Author: resistor Date: Wed Nov 17 16:16:31 2010 New Revision: 119575 URL: http://llvm.org/viewvc/llvm-project?rev=119575&view=rev Log: Second attempt at correct encodings for Thumb2 bitfield instructions. Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td llvm/trunk/test/MC/ARM/thumb2.s Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=119575&r1=119574&r2=119575&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Wed Nov 17 16:16:31 2010 @@ -1989,27 +1989,54 @@ IIC_iBITi, IIC_iBITr, IIC_iBITsi, BinOpFrag<(and node:$LHS, (not node:$RHS))>>; -let Constraints = "$src = $dst" in -def t2BFC : T2I<(outs rGPR:$dst), (ins rGPR:$src, bf_inv_mask_imm:$imm), - IIC_iUNAsi, "bfc", "\t$dst, $imm", - [(set rGPR:$dst, (and rGPR:$src, bf_inv_mask_imm:$imm))]> { +class T2BitFI pattern> + : T2I { + bits<4> Rd; + bits<5> msb; + bits<5> lsb; + + let Inst{11-8} = Rd{3-0}; + let Inst{4-0} = msb{4-0}; + let Inst{14-12} = lsb{4-2}; + let Inst{7-6} = lsb{1-0}; +} + +class T2TwoRegBitFI pattern> + : T2BitFI { + bits<4> Rn; + + let Inst{19-16} = Rn{3-0}; +} + +let Constraints = "$src = $Rd" in +def t2BFC : T2BitFI<(outs rGPR:$Rd), (ins rGPR:$src, bf_inv_mask_imm:$imm), + IIC_iUNAsi, "bfc", "\t$Rd, $imm", + [(set rGPR:$Rd, (and rGPR:$src, bf_inv_mask_imm:$imm))]> { let Inst{31-27} = 0b11110; let Inst{25} = 1; let Inst{24-20} = 0b10110; let Inst{19-16} = 0b1111; // Rn let Inst{15} = 0; + + bits<10> imm; + let msb{4-0} = imm{9-5}; + let lsb{4-0} = imm{4-0}; } -def t2SBFX: T2I<(outs rGPR:$dst), (ins rGPR:$src, imm0_31:$lsb, imm0_31:$width), - IIC_iUNAsi, "sbfx", "\t$dst, $src, $lsb, $width", []> { +def t2SBFX: T2TwoRegBitFI< + (outs rGPR:$Rd), (ins rGPR:$Rn, imm0_31:$lsb, imm0_31_m1:$msb), + IIC_iUNAsi, "sbfx", "\t$Rd, $Rn, $lsb, $msb", []> { let Inst{31-27} = 0b11110; let Inst{25} = 1; let Inst{24-20} = 0b10100; let Inst{15} = 0; } -def t2UBFX: T2I<(outs rGPR:$dst), (ins rGPR:$src, imm0_31:$lsb, imm0_31:$width), - IIC_iUNAsi, "ubfx", "\t$dst, $src, $lsb, $width", []> { +def t2UBFX: T2TwoRegBitFI< + (outs rGPR:$Rd), (ins rGPR:$Rn, imm0_31:$lsb, imm0_31_m1:$msb), + IIC_iUNAsi, "ubfx", "\t$Rd, $Rn, $lsb, $msb", []> { let Inst{31-27} = 0b11110; let Inst{25} = 1; let Inst{24-20} = 0b11100; @@ -2017,16 +2044,20 @@ } // A8.6.18 BFI - Bitfield insert (Encoding T1) -let Constraints = "$src = $dst" in -def t2BFI : T2I<(outs rGPR:$dst), - (ins rGPR:$src, rGPR:$val, bf_inv_mask_imm:$imm), - IIC_iBITi, "bfi", "\t$dst, $val, $imm", - [(set rGPR:$dst, (ARMbfi rGPR:$src, rGPR:$val, +let Constraints = "$src = $Rd" in +def t2BFI : T2TwoRegBitFI<(outs rGPR:$Rd), + (ins rGPR:$src, rGPR:$Rn, bf_inv_mask_imm:$imm), + IIC_iBITi, "bfi", "\t$Rd, $Rn, $imm", + [(set rGPR:$Rd, (ARMbfi rGPR:$src, rGPR:$Rn, bf_inv_mask_imm:$imm))]> { let Inst{31-27} = 0b11110; let Inst{25} = 1; let Inst{24-20} = 0b10110; let Inst{15} = 0; + + bits<10> imm; + let msb{4-0} = imm{9-5}; + let lsb{4-0} = imm{4-0}; } defm t2ORN : T2I_bin_irs<0b0011, "orn", Modified: llvm/trunk/test/MC/ARM/thumb2.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/thumb2.s?rev=119575&r1=119574&r2=119575&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/thumb2.s (original) +++ llvm/trunk/test/MC/ARM/thumb2.s Wed Nov 17 16:16:31 2010 @@ -52,3 +52,14 @@ @ CHECK: rrx r0, r0 @ encoding: [0x30,0x00,0x4f,0xea] rrx r0, r0 +@ CHECK: bfc r0, #4, #20 @ encoding: [0x17,0x10,0x6f,0xf3] + bfc r0, #4, #20 +@ CHECK: bfc r0, #0, #23 @ encoding: [0x16,0x00,0x6f,0xf3] + bfc r0, #0, #23 +@ CHECK: bfc r0, #12, #20 @ encoding: [0x1f,0x30,0x6f,0xf3] + bfc r0, #12, #20 + +@ CHECK: sbfx r0, r0, #7, #11 @ encoding: [0xca,0x10,0x40,0xf3] + sbfx r0, r0, #7, #11 +@ CHECK: ubfx r0, r0, #7, #11 @ encoding: [0xca,0x10,0xc0,0xf3] + ubfx r0, r0, #7, #11 From evan.cheng at apple.com Wed Nov 17 16:25:46 2010 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 17 Nov 2010 14:25:46 -0800 Subject: [llvm-commits] [llvm] r119548 - in /llvm/trunk: include/llvm/Target/ lib/CodeGen/ lib/Target/ARM/ test/CodeGen/ARM/ test/CodeGen/Thumb2/ utils/TableGen/ In-Reply-To: References: <20101117201328.881FB2A6C12C@llvm.org> Message-ID: <17EA1C48-61C7-4FC9-9ADD-EB474E824138@apple.com> On Nov 17, 2010, at 1:12 PM, Anton Korobeynikov wrote: > Hi Evan, > >> --- llvm/trunk/test/CodeGen/ARM/select_xform.ll (original) >> +++ llvm/trunk/test/CodeGen/ARM/select_xform.ll Wed Nov 17 14:13:28 2010 >> @@ -8,7 +8,8 @@ >> ; ARM: movgt r0, r1 >> >> ; T2: t1: >> -; T2: sub.w r0, r1, #-2147483648 >> +; T2: mvn r0, #-2147483648 >> +; T2: add r0, r1 > Isn't this a regression? It's not. Before the patch it uses two sub instructions, with the first one being the .w variant. The test just didn't look for it. Evan > > -- > With best regards, Anton Korobeynikov > Faculty of Mathematics and Mechanics, Saint Petersburg State University -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101117/8decaf38/attachment.html From tonic at nondot.org Wed Nov 17 16:25:23 2010 From: tonic at nondot.org (Tanya Lattner) Date: Wed, 17 Nov 2010 22:25:23 -0000 Subject: [llvm-commits] [www] r119576 - /www/trunk/devmtg/2010-11/index.html Message-ID: <20101117222523.BE6A12A6C12C@llvm.org> Author: tbrethou Date: Wed Nov 17 16:25:23 2010 New Revision: 119576 URL: http://llvm.org/viewvc/llvm-project?rev=119576&view=rev Log: Add links to slides and ideos. More to come. Modified: www/trunk/devmtg/2010-11/index.html Modified: www/trunk/devmtg/2010-11/index.html URL: http://llvm.org/viewvc/llvm-project/www/trunk/devmtg/2010-11/index.html?rev=119576&r1=119575&r2=119576&view=diff ============================================================================== --- www/trunk/devmtg/2010-11/index.html (original) +++ www/trunk/devmtg/2010-11/index.html Wed Nov 17 16:25:23 2010 @@ -41,23 +41,110 @@ - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
        MediaTalk
        [Slides]
        [Video] (Computer)
        [Videos] (Mobile)        		Portable Native Client
        David Sehr, Google
        [Slides]
        [Video] (Computer)
        [Videos] (Mobile)        		AMD OpenCL Compiler - Using LLVM to produce a cross-platform heterogeneous compiler tool chain
        Micah Villmow, AMD Inc.
        [Slides]
        [Video] (Computer)
        [Videos] (Mobile)        		Implementing Include-What-You-Use using clang
        Craig Silverstein, Google
        [Slides]
        [Video] (Computer)
        [Videos] (Mobile)        		libclang: Thinking Beyond the Compiler
        Doug Gregor, Apple Inc.
        [Slides]
        [Video] (Computer)
        [Videos] (Mobile)        		Polly - Polyhedral optimizations in LLVM
        Tobias Grosser , University of Passau
        [Slides]
        [Video] (Computer)
        [Videos] (Mobile)        		libc++: A Standard Library for C++0x
        Howard Hinnant, Apple Inc.
        [Slides]
        [Video] (Computer)
        [Videos] (Mobile)        		Symbolic Crosschecking of Floating-Point and SIMD Code
        Peter Collingbourne, Imperial College London
        [Slides]
        [Video] (Computer)
        [Videos] (Mobile)        		The LLVM Assembler & Machine Code Infrastructure
        Daniel Dunbar, Apple Inc.
        [Slides]
        [Video] (Computer)
        [Videos] (Mobile)        		Creating cling, an interactive interpreter interface for clang
        Axel Naumann, CERN
        [Slides]
        [Video] (Computer)
        [Videos] (Mobile)        		LLDB: Modular Debugging Infrastructure
        Greg Clayton, Apple Inc.
        [Slides]
        [Video] (Computer)
        [Videos] (Mobile)        		The Crack Scripting Language
        Michael Muller, Google
        [Slides]
        [Video] (Computer)
        [Videos] (Mobile)        		Hardening LLVM With Random Testing
        Xuejun Yang, University of Utah
        [Slides]
        [Video] (Computer)
        [Videos] (Mobile)        		C-to-Verilog.com : High-level synthesis using LLVM
        Nadav Rotem, Haifa University
        [Slides]
        [Video] (Computer)
        [Videos] (Mobile)        		Object Files in LLVM
        Michael Spencer, Gainsville University
        [Slides]
        [Video] (Computer)
        [Videos] (Mobile)        		Connecting the EDG front-end to LLVM
        Renato Golin, ARM
        [Slides]
        [Video] (Computer)
        [Videos] (Mobile)        		LLVM for Open Shading Language
        Larry Gritz, Sony Pictures Imageworks
        [Slides]
        [Video] (Computer)
        [Videos] (Mobile)        		Experiences on using LLVM to compile Click packet processing code to Stanford NetFPGA hardware
        Erik Rubow, Ericsson Research Silicon Valley
        +[Slides] +

        [Video] (Computer) +
        [Video] (Mobile)

        +        		Portable Native Client
        David Sehr, Google
        [Slides] +

        [Video] (Computer) +
        [Video] (Mobile)

        +        		AMD OpenCL Compiler - Using LLVM to produce a cross-platform heterogeneous compiler tool chain
        Micah Villmow, AMD Inc.
        [Slides] +

        [Video] (Computer) +
        [Video] (Mobile)

        +        		Implementing Include-What-You-Use using clang
        Craig Silverstein, Google
        [Slides] +

        [Video] (Computer) +
        [Videos] (Mobile)

        		libclang: Thinking Beyond the Compiler
        Doug Gregor, Apple Inc.
        [Slides] +

        [Video] (Computer) +
        [Video] (Mobile)

        		Polly - Polyhedral optimizations in LLVM
        Tobias Grosser , University of Passau
        [Slides] +

        [Video] (Computer) +
        [Videos] (Mobile)

        		libc++: A Standard Library for C++0x
        Howard Hinnant, Apple Inc.
        [Slides] +

        [Video] (Computer) +
        [Video] (Mobile)

        		Symbolic Crosschecking of Floating-Point and SIMD Code
        Peter Collingbourne, Imperial College London
        [Slides] +

        [Video] (Computer) +
        [Video] (Mobile)

        		The LLVM Assembler & Machine Code Infrastructure
        Daniel Dunbar, Apple Inc.
        [Slides] +

        [Video] (Computer) +
        [Video] (Mobile)

        		Creating cling, an interactive interpreter interface for clang
        Axel Naumann, CERN
        [Slides]
        [Video] (Computer)
        [Videos] (Mobile)        		LLDB: Modular Debugging Infrastructure
        Greg Clayton, Apple Inc.
        [Slides] +

        [Video] (Computer) +
        [Video] (Mobile)

        		The Crack Scripting Language
        Michael Muller, Google
        [Slides] +

        [Video] (Computer) +
        [Video] (Mobile)

        		Hardening LLVM With Random Testing
        Xuejun Yang, University of Utah
        [Slides] +

        [Video] (Computer) +
        [Video] (Mobile)

        		C-to-Verilog.com : High-level synthesis using LLVM
        Nadav Rotem, Haifa University
        [Slides] +

        [Video] (Computer) +
        [Video] (Mobile)

        		Object Files in LLVM
        Michael Spencer, Gainsville University
        [Slides] +

        [Video] (Computer) +
        [Video] (Mobile)

        		Connecting the EDG front-end to LLVM
        Renato Golin, ARM
        [Slides] +

        [Video] (Computer) +
        [Video] (Mobile)

        		LLVM for Open Shading Language
        Larry Gritz, Sony Pictures Imageworks
        [Slides] +

        [Video] (Computer) +
        [Video] (Mobile)

        		Experiences on using LLVM to compile Click packet processing code to Stanford NetFPGA hardware
        Erik Rubow, Ericsson Research Silicon Valley

        From gohman at apple.com Wed Nov 17 16:27:42 2010 From: gohman at apple.com (Dan Gohman) Date: Wed, 17 Nov 2010 22:27:42 -0000 Subject: [llvm-commits] [llvm] r119578 - in /llvm/trunk: include/llvm/Analysis/ScalarEvolution.h include/llvm/Analysis/ScalarEvolutionExpressions.h lib/Analysis/ScalarEvolution.cpp Message-ID: <20101117222742.4C2D32A6C12C@llvm.org> Author: djg Date: Wed Nov 17 16:27:42 2010 New Revision: 119578 URL: http://llvm.org/viewvc/llvm-project?rev=119578&view=rev Log: Make SCEV::getType() and SCEV::print non-virtual. Move SCEV::hasOperand to ScalarEvolution. Delete SCEV::~SCEV. SCEV is no longer virtual. Modified: llvm/trunk/include/llvm/Analysis/ScalarEvolution.h llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h llvm/trunk/lib/Analysis/ScalarEvolution.cpp Modified: llvm/trunk/include/llvm/Analysis/ScalarEvolution.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/ScalarEvolution.h?rev=119578&r1=119577&r2=119578&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/ScalarEvolution.h (original) +++ llvm/trunk/include/llvm/Analysis/ScalarEvolution.h Wed Nov 17 16:27:42 2010 @@ -70,8 +70,7 @@ private: SCEV(const SCEV &); // DO NOT IMPLEMENT void operator=(const SCEV &); // DO NOT IMPLEMENT - protected: - virtual ~SCEV(); + public: explicit SCEV(const FoldingSetNodeIDRef ID, unsigned SCEVTy) : FastID(ID), SCEVType(SCEVTy), SubclassData(0) {} @@ -80,7 +79,7 @@ /// getType - Return the LLVM type of this SCEV expression. /// - virtual const Type *getType() const = 0; + const Type *getType() const; /// isZero - Return true if the expression is a constant zero. /// @@ -95,14 +94,10 @@ /// bool isAllOnesValue() const; - /// hasOperand - Test whether this SCEV has Op as a direct or - /// indirect operand. - virtual bool hasOperand(const SCEV *Op) const = 0; - /// print - Print out the internal representation of this scalar to the /// specified stream. This should really only be used for debugging /// purposes. - virtual void print(raw_ostream &OS) const = 0; + void print(raw_ostream &OS) const; /// dump - This method is used for debugging. /// @@ -137,11 +132,6 @@ struct SCEVCouldNotCompute : public SCEV { SCEVCouldNotCompute(); - // None of these methods are valid for this object. - virtual const Type *getType() const; - virtual void print(raw_ostream &OS) const; - virtual bool hasOperand(const SCEV *Op) const; - /// Methods for support type inquiry through isa, cast, and dyn_cast: static inline bool classof(const SCEVCouldNotCompute *S) { return true; } static bool classof(const SCEV *S); @@ -691,6 +681,10 @@ /// properly dominate the specified basic block. bool properlyDominates(const SCEV *S, BasicBlock *BB) const; + /// hasOperand - Test whether the given SCEV has Op as a direct or + /// indirect operand. + bool hasOperand(const SCEV *S, const SCEV *Op) const; + virtual bool runOnFunction(Function &F); virtual void releaseMemory(); virtual void getAnalysisUsage(AnalysisUsage &AU) const; Modified: llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h?rev=119578&r1=119577&r2=119578&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h (original) +++ llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h Wed Nov 17 16:27:42 2010 @@ -42,13 +42,7 @@ public: ConstantInt *getValue() const { return V; } - virtual const Type *getType() const; - - virtual bool hasOperand(const SCEV *) const { - return false; - } - - virtual void print(raw_ostream &OS) const; + const Type *getType() const { return V->getType(); } /// Methods for support type inquiry through isa, cast, and dyn_cast: static inline bool classof(const SCEVConstant *S) { return true; } @@ -70,11 +64,7 @@ public: const SCEV *getOperand() const { return Op; } - virtual const Type *getType() const { return Ty; } - - virtual bool hasOperand(const SCEV *O) const { - return Op == O || Op->hasOperand(O); - } + const Type *getType() const { return Ty; } /// Methods for support type inquiry through isa, cast, and dyn_cast: static inline bool classof(const SCEVCastExpr *S) { return true; } @@ -96,8 +86,6 @@ const SCEV *op, const Type *ty); public: - virtual void print(raw_ostream &OS) const; - /// Methods for support type inquiry through isa, cast, and dyn_cast: static inline bool classof(const SCEVTruncateExpr *S) { return true; } static inline bool classof(const SCEV *S) { @@ -116,8 +104,6 @@ const SCEV *op, const Type *ty); public: - virtual void print(raw_ostream &OS) const; - /// Methods for support type inquiry through isa, cast, and dyn_cast: static inline bool classof(const SCEVZeroExtendExpr *S) { return true; } static inline bool classof(const SCEV *S) { @@ -136,8 +122,6 @@ const SCEV *op, const Type *ty); public: - virtual void print(raw_ostream &OS) const; - /// Methods for support type inquiry through isa, cast, and dyn_cast: static inline bool classof(const SCEVSignExtendExpr *S) { return true; } static inline bool classof(const SCEV *S) { @@ -174,9 +158,7 @@ op_iterator op_begin() const { return Operands; } op_iterator op_end() const { return Operands + NumOperands; } - virtual bool hasOperand(const SCEV *O) const; - - virtual const Type *getType() const { return getOperand(0)->getType(); } + const Type *getType() const { return getOperand(0)->getType(); } bool hasNoUnsignedWrap() const { return SubclassData & (1 << 0); } void setHasNoUnsignedWrap(bool B) { @@ -209,10 +191,6 @@ : SCEVNAryExpr(ID, T, O, N) {} public: - virtual const char *getOperationStr() const = 0; - - virtual void print(raw_ostream &OS) const; - /// Methods for support type inquiry through isa, cast, and dyn_cast: static inline bool classof(const SCEVCommutativeExpr *S) { return true; } static inline bool classof(const SCEV *S) { @@ -236,9 +214,7 @@ } public: - virtual const char *getOperationStr() const { return " + "; } - - virtual const Type *getType() const { + const Type *getType() const { // Use the type of the last operand, which is likely to be a pointer // type, if there is one. This doesn't usually matter, but it can help // reduce casts when the expressions are expanded. @@ -264,8 +240,6 @@ } public: - virtual const char *getOperationStr() const { return " * "; } - /// Methods for support type inquiry through isa, cast, and dyn_cast: static inline bool classof(const SCEVMulExpr *S) { return true; } static inline bool classof(const SCEV *S) { @@ -289,14 +263,15 @@ const SCEV *getLHS() const { return LHS; } const SCEV *getRHS() const { return RHS; } - virtual bool hasOperand(const SCEV *O) const { - return O == LHS || O == RHS || LHS->hasOperand(O) || RHS->hasOperand(O); + const Type *getType() const { + // In most cases the types of LHS and RHS will be the same, but in some + // crazy cases one or the other may be a pointer. ScalarEvolution doesn't + // depend on the type for correctness, but handling types carefully can + // avoid extra casts in the SCEVExpander. The LHS is more likely to be + // a pointer type than the RHS, so use the RHS' type here. + return getRHS()->getType(); } - virtual const Type *getType() const; - - void print(raw_ostream &OS) const; - /// Methods for support type inquiry through isa, cast, and dyn_cast: static inline bool classof(const SCEVUDivExpr *S) { return true; } static inline bool classof(const SCEV *S) { @@ -371,8 +346,6 @@ return cast(SE.getAddExpr(this, getStepRecurrence(SE))); } - virtual void print(raw_ostream &OS) const; - /// Methods for support type inquiry through isa, cast, and dyn_cast: static inline bool classof(const SCEVAddRecExpr *S) { return true; } static inline bool classof(const SCEV *S) { @@ -396,8 +369,6 @@ } public: - virtual const char *getOperationStr() const { return " smax "; } - /// Methods for support type inquiry through isa, cast, and dyn_cast: static inline bool classof(const SCEVSMaxExpr *S) { return true; } static inline bool classof(const SCEV *S) { @@ -421,8 +392,6 @@ } public: - virtual const char *getOperationStr() const { return " umax "; } - /// Methods for support type inquiry through isa, cast, and dyn_cast: static inline bool classof(const SCEVUMaxExpr *S) { return true; } static inline bool classof(const SCEV *S) { @@ -468,13 +437,7 @@ bool isAlignOf(const Type *&AllocTy) const; bool isOffsetOf(const Type *&STy, Constant *&FieldNo) const; - virtual bool hasOperand(const SCEV *) const { - return false; - } - - virtual const Type *getType() const; - - virtual void print(raw_ostream &OS) const; + const Type *getType() const { return getValPtr()->getType(); } /// Methods for support type inquiry through isa, cast, and dyn_cast: static inline bool classof(const SCEVUnknown *S) { return true; } Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=119578&r1=119577&r2=119578&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original) +++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Wed Nov 17 16:27:42 2010 @@ -120,13 +120,135 @@ // Implementation of the SCEV class. // -SCEV::~SCEV() {} - void SCEV::dump() const { print(dbgs()); dbgs() << '\n'; } +void SCEV::print(raw_ostream &OS) const { + switch (getSCEVType()) { + case scConstant: + WriteAsOperand(OS, cast(this)->getValue(), false); + return; + case scTruncate: { + const SCEVTruncateExpr *Trunc = cast(this); + const SCEV *Op = Trunc->getOperand(); + OS << "(trunc " << *Op->getType() << " " << *Op << " to " + << *Trunc->getType() << ")"; + return; + } + case scZeroExtend: { + const SCEVZeroExtendExpr *ZExt = cast(this); + const SCEV *Op = ZExt->getOperand(); + OS << "(zext " << *Op->getType() << " " << *Op << " to " + << *ZExt->getType() << ")"; + return; + } + case scSignExtend: { + const SCEVSignExtendExpr *SExt = cast(this); + const SCEV *Op = SExt->getOperand(); + OS << "(sext " << *Op->getType() << " " << *Op << " to " + << *SExt->getType() << ")"; + return; + } + case scAddRecExpr: { + const SCEVAddRecExpr *AR = cast(this); + OS << "{" << *AR->getOperand(0); + for (unsigned i = 1, e = AR->getNumOperands(); i != e; ++i) + OS << ",+," << *AR->getOperand(i); + OS << "}<"; + WriteAsOperand(OS, AR->getLoop()->getHeader(), /*PrintType=*/false); + OS << ">"; + return; + } + case scAddExpr: + case scMulExpr: + case scUMaxExpr: + case scSMaxExpr: { + const SCEVNAryExpr *NAry = cast(this); + const char *OpStr; + switch (NAry->getSCEVType()) { + case scAddExpr: OpStr = " + "; break; + case scMulExpr: OpStr = " * "; break; + case scUMaxExpr: OpStr = " umax "; break; + case scSMaxExpr: OpStr = " smax "; break; + } + OS << "("; + for (SCEVNAryExpr::op_iterator I = NAry->op_begin(), E = NAry->op_end(); + I != E; ++I) { + OS << **I; + if (llvm::next(I) != E) + OS << OpStr; + } + OS << ")"; + return; + } + case scUDivExpr: { + const SCEVUDivExpr *UDiv = cast(this); + OS << "(" << *UDiv->getLHS() << " /u " << *UDiv->getRHS() << ")"; + return; + } + case scUnknown: { + const SCEVUnknown *U = cast(this); + const Type *AllocTy; + if (U->isSizeOf(AllocTy)) { + OS << "sizeof(" << *AllocTy << ")"; + return; + } + if (U->isAlignOf(AllocTy)) { + OS << "alignof(" << *AllocTy << ")"; + return; + } + + const Type *CTy; + Constant *FieldNo; + if (U->isOffsetOf(CTy, FieldNo)) { + OS << "offsetof(" << *CTy << ", "; + WriteAsOperand(OS, FieldNo, false); + OS << ")"; + return; + } + + // Otherwise just print it normally. + WriteAsOperand(OS, U->getValue(), false); + return; + } + case scCouldNotCompute: + OS << "***COULDNOTCOMPUTE***"; + return; + default: break; + } + llvm_unreachable("Unknown SCEV kind!"); +} + +const Type *SCEV::getType() const { + switch (getSCEVType()) { + case scConstant: + return cast(this)->getType(); + case scTruncate: + case scZeroExtend: + case scSignExtend: + return cast(this)->getType(); + case scAddRecExpr: + case scMulExpr: + case scUMaxExpr: + case scSMaxExpr: + return cast(this)->getType(); + case scAddExpr: + return cast(this)->getType(); + case scUDivExpr: + return cast(this)->getType(); + case scUnknown: + return cast(this)->getType(); + case scCouldNotCompute: + llvm_unreachable("Attempt to use a SCEVCouldNotCompute object!"); + return 0; + default: break; + } + llvm_unreachable("Unknown SCEV kind!"); + return 0; +} + bool SCEV::isZero() const { if (const SCEVConstant *SC = dyn_cast(this)) return SC->getValue()->isZero(); @@ -148,20 +270,6 @@ SCEVCouldNotCompute::SCEVCouldNotCompute() : SCEV(FoldingSetNodeIDRef(), scCouldNotCompute) {} -const Type *SCEVCouldNotCompute::getType() const { - llvm_unreachable("Attempt to use a SCEVCouldNotCompute object!"); - return 0; -} - -bool SCEVCouldNotCompute::hasOperand(const SCEV *) const { - llvm_unreachable("Attempt to use a SCEVCouldNotCompute object!"); - return false; -} - -void SCEVCouldNotCompute::print(raw_ostream &OS) const { - OS << "***COULDNOTCOMPUTE***"; -} - bool SCEVCouldNotCompute::classof(const SCEV *S) { return S->getSCEVType() == scCouldNotCompute; } @@ -187,12 +295,6 @@ return getConstant(ConstantInt::get(ITy, V, isSigned)); } -const Type *SCEVConstant::getType() const { return V->getType(); } - -void SCEVConstant::print(raw_ostream &OS) const { - WriteAsOperand(OS, V, false); -} - SCEVCastExpr::SCEVCastExpr(const FoldingSetNodeIDRef ID, unsigned SCEVTy, const SCEV *op, const Type *ty) : SCEV(ID, SCEVTy), Op(op), Ty(ty) {} @@ -205,10 +307,6 @@ "Cannot truncate non-integer value!"); } -void SCEVTruncateExpr::print(raw_ostream &OS) const { - OS << "(trunc " << *Op->getType() << " " << *Op << " to " << *Ty << ")"; -} - SCEVZeroExtendExpr::SCEVZeroExtendExpr(const FoldingSetNodeIDRef ID, const SCEV *op, const Type *ty) : SCEVCastExpr(ID, scZeroExtend, op, ty) { @@ -217,10 +315,6 @@ "Cannot zero extend non-integer value!"); } -void SCEVZeroExtendExpr::print(raw_ostream &OS) const { - OS << "(zext " << *Op->getType() << " " << *Op << " to " << *Ty << ")"; -} - SCEVSignExtendExpr::SCEVSignExtendExpr(const FoldingSetNodeIDRef ID, const SCEV *op, const Type *ty) : SCEVCastExpr(ID, scSignExtend, op, ty) { @@ -229,52 +323,6 @@ "Cannot sign extend non-integer value!"); } -void SCEVSignExtendExpr::print(raw_ostream &OS) const { - OS << "(sext " << *Op->getType() << " " << *Op << " to " << *Ty << ")"; -} - -void SCEVCommutativeExpr::print(raw_ostream &OS) const { - const char *OpStr = getOperationStr(); - OS << "("; - for (op_iterator I = op_begin(), E = op_end(); I != E; ++I) { - OS << **I; - if (llvm::next(I) != E) - OS << OpStr; - } - OS << ")"; -} - -bool SCEVNAryExpr::hasOperand(const SCEV *O) const { - for (op_iterator I = op_begin(), E = op_end(); I != E; ++I) { - const SCEV *S = *I; - if (O == S || S->hasOperand(O)) - return true; - } - return false; -} - -void SCEVUDivExpr::print(raw_ostream &OS) const { - OS << "(" << *LHS << " /u " << *RHS << ")"; -} - -const Type *SCEVUDivExpr::getType() const { - // In most cases the types of LHS and RHS will be the same, but in some - // crazy cases one or the other may be a pointer. ScalarEvolution doesn't - // depend on the type for correctness, but handling types carefully can - // avoid extra casts in the SCEVExpander. The LHS is more likely to be - // a pointer type than the RHS, so use the RHS' type here. - return RHS->getType(); -} - -void SCEVAddRecExpr::print(raw_ostream &OS) const { - OS << "{" << *Operands[0]; - for (unsigned i = 1, e = NumOperands; i != e; ++i) - OS << ",+," << *Operands[i]; - OS << "}<"; - WriteAsOperand(OS, L->getHeader(), /*PrintType=*/false); - OS << ">"; -} - void SCEVUnknown::deleted() { // Clear this SCEVUnknown from various maps. SE->ValuesAtScopes.erase(this); @@ -303,10 +351,6 @@ setValPtr(New); } -const Type *SCEVUnknown::getType() const { - return getValue()->getType(); -} - bool SCEVUnknown::isSizeOf(const Type *&AllocTy) const { if (ConstantExpr *VCE = dyn_cast(getValue())) if (VCE->getOpcode() == Instruction::PtrToInt) @@ -371,30 +415,6 @@ return false; } -void SCEVUnknown::print(raw_ostream &OS) const { - const Type *AllocTy; - if (isSizeOf(AllocTy)) { - OS << "sizeof(" << *AllocTy << ")"; - return; - } - if (isAlignOf(AllocTy)) { - OS << "alignof(" << *AllocTy << ")"; - return; - } - - const Type *CTy; - Constant *FieldNo; - if (isOffsetOf(CTy, FieldNo)) { - OS << "offsetof(" << *CTy << ", "; - WriteAsOperand(OS, FieldNo, false); - OS << ")"; - return; - } - - // Otherwise just print it normally. - WriteAsOperand(OS, getValue(), false); -} - //===----------------------------------------------------------------------===// // SCEV Utilities //===----------------------------------------------------------------------===// @@ -2601,7 +2621,7 @@ // Short-circuit the def-use traversal if the symbolic name // ceases to appear in expressions. - if (Old != SymName && !Old->hasOperand(SymName)) + if (Old != SymName && !hasOperand(Old, SymName)) continue; // SCEVUnknown for a PHI either means that it has an unrecognized @@ -6092,3 +6112,45 @@ llvm_unreachable("Unknown SCEV kind!"); return false; } + +bool ScalarEvolution::hasOperand(const SCEV *S, const SCEV *Op) const { + switch (S->getSCEVType()) { + case scConstant: + return false; + case scTruncate: + case scZeroExtend: + case scSignExtend: { + const SCEVCastExpr *Cast = cast(S); + const SCEV *CastOp = Cast->getOperand(); + return Op == CastOp || hasOperand(CastOp, Op); + } + case scAddRecExpr: + case scAddExpr: + case scMulExpr: + case scUMaxExpr: + case scSMaxExpr: { + const SCEVNAryExpr *NAry = cast(S); + for (SCEVNAryExpr::op_iterator I = NAry->op_begin(), E = NAry->op_end(); + I != E; ++I) { + const SCEV *NAryOp = *I; + if (NAryOp == Op || hasOperand(NAryOp, Op)) + return true; + } + return false; + } + case scUDivExpr: { + const SCEVUDivExpr *UDiv = cast(S); + const SCEV *LHS = UDiv->getLHS(), *RHS = UDiv->getRHS(); + return LHS == Op || hasOperand(LHS, Op) || + RHS == Op || hasOperand(RHS, Op); + } + case scUnknown: + return false; + case scCouldNotCompute: + llvm_unreachable("Attempt to use a SCEVCouldNotCompute object!"); + return false; + default: break; + } + llvm_unreachable("Unknown SCEV kind!"); + return false; +} From tonic at nondot.org Wed Nov 17 16:29:49 2010 From: tonic at nondot.org (Tanya Lattner) Date: Wed, 17 Nov 2010 22:29:49 -0000 Subject: [llvm-commits] [www] r119579 - /www/trunk/devmtg/2010-11/index.html Message-ID: <20101117222949.1CF362A6C12C@llvm.org> Author: tbrethou Date: Wed Nov 17 16:29:48 2010 New Revision: 119579 URL: http://llvm.org/viewvc/llvm-project?rev=119579&view=rev Log: Fix typos. Modified: www/trunk/devmtg/2010-11/index.html Modified: www/trunk/devmtg/2010-11/index.html URL: http://llvm.org/viewvc/llvm-project/www/trunk/devmtg/2010-11/index.html?rev=119579&r1=119578&r2=119579&view=diff ============================================================================== --- www/trunk/devmtg/2010-11/index.html (original) +++ www/trunk/devmtg/2010-11/index.html Wed Nov 17 16:29:48 2010 @@ -84,7 +84,7 @@ libc++: A Standard Library for C++0x
        Howard Hinnant, Apple Inc. [Slides] -

        [Video] (Computer) +

        [Video] (Computer)
        [Video] (Mobile)

        Symbolic Crosschecking of Floating-Point and SIMD Code
        Peter Collingbourne, Imperial College London @@ -125,7 +125,7 @@ [Slides]

        [Video] (Computer) -
        [Video] (Mobile) +
        [Video] (Mobile) Object Files in LLVM
        Michael Spencer, Gainsville University @@ -143,7 +143,7 @@ [Slides]

        [Video] (Computer) -
        [Video] (Mobile)

        +
        [Video] (Mobile)

        Experiences on using LLVM to compile Click packet processing code to Stanford NetFPGA hardware
        Erik Rubow, Ericsson Research Silicon Valley

        From peckw at wesleypeck.com Wed Nov 17 16:48:18 2010 From: peckw at wesleypeck.com (Wesley Peck) Date: Wed, 17 Nov 2010 16:48:18 -0600 Subject: [llvm-commits] [llvm] r119355 - /llvm/trunk/cmake/modules/LLVMLibDeps.cmake In-Reply-To: <20101116181441.9EF092A6C12C@llvm.org> References: <20101116181441.9EF092A6C12C@llvm.org> Message-ID: <8D66597B-71DC-40AB-88F4-94893E3D885F@wesleypeck.com> Is LLVMLibDeps.cmake something that should not be checked in when changed? I've noticed that it almost always gets changed when I build LLVM but I have been unsure if I should commit this file when it changes. -- Wesley Peck University of Kansas SLDG Laboratory On Nov 16, 2010, at 12:14 PM, Jim Grosbach wrote: > Author: grosbach > Date: Tue Nov 16 12:14:41 2010 > New Revision: 119355 > > URL: http://llvm.org/viewvc/llvm-project?rev=119355&view=rev > Log: > Revert inadvertant checkin of CMake libdeps. > > Modified: > llvm/trunk/cmake/modules/LLVMLibDeps.cmake > > Modified: llvm/trunk/cmake/modules/LLVMLibDeps.cmake > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/cmake/modules/LLVMLibDeps.cmake?rev=119355&r1=119354&r2=119355&view=diff > ============================================================================== > --- llvm/trunk/cmake/modules/LLVMLibDeps.cmake (original) > +++ llvm/trunk/cmake/modules/LLVMLibDeps.cmake Tue Nov 16 12:14:41 2010 > @@ -1,28 +1,28 @@ > -set(MSVC_LIB_DEPS_LLVMARMAsmParser LLVMARMInfo LLVMMC LLVMMCParser LLVMSupport LLVMSystem LLVMTarget) > -set(MSVC_LIB_DEPS_LLVMARMAsmPrinter LLVMMC LLVMSupport LLVMSystem) > +set(MSVC_LIB_DEPS_LLVMARMAsmParser LLVMARMInfo LLVMMC LLVMMCParser LLVMSupport LLVMTarget) > +set(MSVC_LIB_DEPS_LLVMARMAsmPrinter LLVMMC LLVMSupport) > set(MSVC_LIB_DEPS_LLVMARMCodeGen LLVMARMAsmPrinter LLVMARMInfo LLVMAnalysis LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) > -set(MSVC_LIB_DEPS_LLVMARMDisassembler LLVMARMCodeGen LLVMARMInfo LLVMMC LLVMSupport LLVMSystem) > +set(MSVC_LIB_DEPS_LLVMARMDisassembler LLVMARMCodeGen LLVMARMInfo LLVMMC LLVMSupport) > set(MSVC_LIB_DEPS_LLVMARMInfo LLVMMC LLVMSupport) > -set(MSVC_LIB_DEPS_LLVMAlphaAsmPrinter LLVMAlphaInfo LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMTarget) > +set(MSVC_LIB_DEPS_LLVMAlphaAsmPrinter LLVMAlphaInfo LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMTarget) > set(MSVC_LIB_DEPS_LLVMAlphaCodeGen LLVMAlphaInfo LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) > set(MSVC_LIB_DEPS_LLVMAlphaInfo LLVMMC LLVMSupport) > set(MSVC_LIB_DEPS_LLVMAnalysis LLVMCore LLVMSupport LLVMSystem LLVMTarget) > set(MSVC_LIB_DEPS_LLVMArchive LLVMBitReader LLVMCore LLVMSupport LLVMSystem) > -set(MSVC_LIB_DEPS_LLVMAsmParser LLVMCore LLVMSupport LLVMSystem) > +set(MSVC_LIB_DEPS_LLVMAsmParser LLVMCore LLVMSupport) > set(MSVC_LIB_DEPS_LLVMAsmPrinter LLVMAnalysis LLVMCodeGen LLVMCore LLVMMC LLVMMCParser LLVMSupport LLVMSystem LLVMTarget) > -set(MSVC_LIB_DEPS_LLVMBitReader LLVMCore LLVMSupport LLVMSystem) > -set(MSVC_LIB_DEPS_LLVMBitWriter LLVMCore LLVMSupport LLVMSystem) > -set(MSVC_LIB_DEPS_LLVMBlackfinAsmPrinter LLVMAsmPrinter LLVMBlackfinInfo LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMTarget) > -set(MSVC_LIB_DEPS_LLVMBlackfinCodeGen LLVMAsmPrinter LLVMBlackfinInfo LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) > +set(MSVC_LIB_DEPS_LLVMBitReader LLVMCore LLVMSupport) > +set(MSVC_LIB_DEPS_LLVMBitWriter LLVMCore LLVMSupport) > +set(MSVC_LIB_DEPS_LLVMBlackfinAsmPrinter LLVMAsmPrinter LLVMBlackfinInfo LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMTarget) > +set(MSVC_LIB_DEPS_LLVMBlackfinCodeGen LLVMAsmPrinter LLVMBlackfinInfo LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMTarget) > set(MSVC_LIB_DEPS_LLVMBlackfinInfo LLVMMC LLVMSupport) > set(MSVC_LIB_DEPS_LLVMCBackend LLVMAnalysis LLVMCBackendInfo LLVMCodeGen LLVMCore LLVMMC LLVMScalarOpts LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils LLVMipa) > set(MSVC_LIB_DEPS_LLVMCBackendInfo LLVMMC LLVMSupport) > -set(MSVC_LIB_DEPS_LLVMCellSPUAsmPrinter LLVMAsmPrinter LLVMCellSPUInfo LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMTarget) > -set(MSVC_LIB_DEPS_LLVMCellSPUCodeGen LLVMAsmPrinter LLVMCellSPUInfo LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) > +set(MSVC_LIB_DEPS_LLVMCellSPUAsmPrinter LLVMAsmPrinter LLVMCellSPUInfo LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMTarget) > +set(MSVC_LIB_DEPS_LLVMCellSPUCodeGen LLVMAsmPrinter LLVMCellSPUInfo LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMTarget) > set(MSVC_LIB_DEPS_LLVMCellSPUInfo LLVMMC LLVMSupport) > set(MSVC_LIB_DEPS_LLVMCodeGen LLVMAnalysis LLVMCore LLVMMC LLVMScalarOpts LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils) > set(MSVC_LIB_DEPS_LLVMCore LLVMSupport LLVMSystem) > -set(MSVC_LIB_DEPS_LLVMCppBackend LLVMCore LLVMCppBackendInfo LLVMSupport LLVMSystem LLVMTarget) > +set(MSVC_LIB_DEPS_LLVMCppBackend LLVMCore LLVMCppBackendInfo LLVMSupport LLVMTarget) > set(MSVC_LIB_DEPS_LLVMCppBackendInfo LLVMMC LLVMSupport) > set(MSVC_LIB_DEPS_LLVMExecutionEngine LLVMCore LLVMSupport LLVMSystem LLVMTarget) > set(MSVC_LIB_DEPS_LLVMInstCombine LLVMAnalysis LLVMCore LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils) > @@ -30,46 +30,45 @@ > set(MSVC_LIB_DEPS_LLVMInterpreter LLVMCodeGen LLVMCore LLVMExecutionEngine LLVMSupport LLVMSystem LLVMTarget) > set(MSVC_LIB_DEPS_LLVMJIT LLVMCodeGen LLVMCore LLVMExecutionEngine LLVMMC LLVMSupport LLVMSystem LLVMTarget) > set(MSVC_LIB_DEPS_LLVMLinker LLVMArchive LLVMBitReader LLVMCore LLVMSupport LLVMSystem LLVMTransformUtils) > -set(MSVC_LIB_DEPS_LLVMMBlazeAsmParser LLVMMBlazeCodeGen LLVMMBlazeInfo LLVMMC LLVMMCParser LLVMSupport LLVMSystem LLVMTarget) > -set(MSVC_LIB_DEPS_LLVMMBlazeAsmPrinter LLVMMC LLVMSupport LLVMSystem) > +set(MSVC_LIB_DEPS_LLVMMBlazeAsmParser LLVMMBlazeCodeGen LLVMMBlazeInfo LLVMMC LLVMMCParser LLVMSupport LLVMTarget) > +set(MSVC_LIB_DEPS_LLVMMBlazeAsmPrinter LLVMMC LLVMSupport) > set(MSVC_LIB_DEPS_LLVMMBlazeCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMBlazeAsmPrinter LLVMMBlazeInfo LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) > set(MSVC_LIB_DEPS_LLVMMBlazeDisassembler LLVMMBlazeCodeGen LLVMMBlazeInfo LLVMMC LLVMSupport) > set(MSVC_LIB_DEPS_LLVMMBlazeInfo LLVMMC LLVMSupport) > set(MSVC_LIB_DEPS_LLVMMC LLVMSupport LLVMSystem) > set(MSVC_LIB_DEPS_LLVMMCDisassembler LLVMARMAsmParser LLVMARMCodeGen LLVMARMDisassembler LLVMARMInfo LLVMAlphaCodeGen LLVMAlphaInfo LLVMBlackfinCodeGen LLVMBlackfinInfo LLVMCBackend LLVMCBackendInfo LLVMCellSPUCodeGen LLVMCellSPUInfo LLVMCppBackend LLVMCppBackendInfo LLVMMBlazeAsmParser LLVMMBlazeCodeGen LLVMMBlazeDisassembler LLVMMBlazeInfo LLVMMC LLVMMCParser LLVMMSP430CodeGen LLVMMSP430Info LLVMMipsCodeGen LLVMMipsInfo LLVMPTXCodeGen LLVMPTXInfo LLVMPowerPCCodeGen LLVMPowerPCInfo LLVMSparcCodeGen LLVMSparcInfo LLVMSupport LLVMSystem LLVMSystemZCodeGen LLVMSystemZInfo LLVMX86AsmParser LLVMX86CodeGen LLVMX86Disassembler LLVMX86Info LLVMXCoreCodeGen LLVMXCoreInfo) > -set(MSVC_LIB_DEPS_LLVMMCParser LLVMMC LLVMSupport LLVMSystem) > -set(MSVC_LIB_DEPS_LLVMMSP430AsmPrinter LLVMMC LLVMSupport LLVMSystem) > +set(MSVC_LIB_DEPS_LLVMMCParser LLVMMC LLVMSupport) > +set(MSVC_LIB_DEPS_LLVMMSP430AsmPrinter LLVMMC LLVMSupport) > set(MSVC_LIB_DEPS_LLVMMSP430CodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMMSP430AsmPrinter LLVMMSP430Info LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) > set(MSVC_LIB_DEPS_LLVMMSP430Info LLVMMC LLVMSupport) > -set(MSVC_LIB_DEPS_LLVMMipsAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMMipsCodeGen LLVMMipsInfo LLVMSupport LLVMSystem LLVMTarget) > +set(MSVC_LIB_DEPS_LLVMMipsAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMMipsCodeGen LLVMMipsInfo LLVMSupport LLVMTarget) > set(MSVC_LIB_DEPS_LLVMMipsCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMMipsInfo LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) > set(MSVC_LIB_DEPS_LLVMMipsInfo LLVMMC LLVMSupport) > -set(MSVC_LIB_DEPS_LLVMObject LLVMSupport LLVMSystem) > -set(MSVC_LIB_DEPS_LLVMPTXAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMPTXInfo LLVMSupport LLVMSystem) > -set(MSVC_LIB_DEPS_LLVMPTXCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMPTXInfo LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) > +set(MSVC_LIB_DEPS_LLVMPTXAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMPTXInfo LLVMSupport) > +set(MSVC_LIB_DEPS_LLVMPTXCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMPTXInfo LLVMSelectionDAG LLVMSupport LLVMTarget) > set(MSVC_LIB_DEPS_LLVMPTXInfo LLVMMC LLVMSupport) > -set(MSVC_LIB_DEPS_LLVMPowerPCAsmPrinter LLVMMC LLVMSupport LLVMSystem) > +set(MSVC_LIB_DEPS_LLVMPowerPCAsmPrinter LLVMMC LLVMSupport) > set(MSVC_LIB_DEPS_LLVMPowerPCCodeGen LLVMAnalysis LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMPowerPCAsmPrinter LLVMPowerPCInfo LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) > set(MSVC_LIB_DEPS_LLVMPowerPCInfo LLVMMC LLVMSupport) > set(MSVC_LIB_DEPS_LLVMScalarOpts LLVMAnalysis LLVMCore LLVMInstCombine LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils) > set(MSVC_LIB_DEPS_LLVMSelectionDAG LLVMAnalysis LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMTarget) > -set(MSVC_LIB_DEPS_LLVMSparcAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSparcInfo LLVMSupport LLVMSystem LLVMTarget) > +set(MSVC_LIB_DEPS_LLVMSparcAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSparcInfo LLVMSupport LLVMTarget) > set(MSVC_LIB_DEPS_LLVMSparcCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSparcInfo LLVMSupport LLVMSystem LLVMTarget) > set(MSVC_LIB_DEPS_LLVMSparcInfo LLVMMC LLVMSupport) > set(MSVC_LIB_DEPS_LLVMSupport LLVMSystem) > set(MSVC_LIB_DEPS_LLVMSystem ) > -set(MSVC_LIB_DEPS_LLVMSystemZAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMSystemZInfo LLVMTarget) > -set(MSVC_LIB_DEPS_LLVMSystemZCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMSystemZInfo LLVMTarget) > +set(MSVC_LIB_DEPS_LLVMSystemZAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystemZInfo LLVMTarget) > +set(MSVC_LIB_DEPS_LLVMSystemZCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystemZInfo LLVMTarget) > set(MSVC_LIB_DEPS_LLVMSystemZInfo LLVMMC LLVMSupport) > set(MSVC_LIB_DEPS_LLVMTarget LLVMCore LLVMMC LLVMSupport LLVMSystem) > set(MSVC_LIB_DEPS_LLVMTransformUtils LLVMAnalysis LLVMCore LLVMSupport LLVMSystem LLVMTarget LLVMipa) > -set(MSVC_LIB_DEPS_LLVMX86AsmParser LLVMMC LLVMMCParser LLVMSupport LLVMSystem LLVMTarget LLVMX86Info) > -set(MSVC_LIB_DEPS_LLVMX86AsmPrinter LLVMMC LLVMSupport LLVMSystem) > +set(MSVC_LIB_DEPS_LLVMX86AsmParser LLVMMC LLVMMCParser LLVMSupport LLVMTarget LLVMX86Info) > +set(MSVC_LIB_DEPS_LLVMX86AsmPrinter LLVMMC LLVMSupport) > set(MSVC_LIB_DEPS_LLVMX86CodeGen LLVMAnalysis LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget LLVMX86AsmPrinter LLVMX86Info) > set(MSVC_LIB_DEPS_LLVMX86Disassembler LLVMMC LLVMSupport LLVMX86Info) > set(MSVC_LIB_DEPS_LLVMX86Info LLVMMC LLVMSupport) > -set(MSVC_LIB_DEPS_LLVMXCoreAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMTarget LLVMXCoreInfo) > -set(MSVC_LIB_DEPS_LLVMXCoreCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget LLVMXCoreInfo) > +set(MSVC_LIB_DEPS_LLVMXCoreAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMTarget LLVMXCoreInfo) > +set(MSVC_LIB_DEPS_LLVMXCoreCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMTarget LLVMXCoreInfo) > set(MSVC_LIB_DEPS_LLVMXCoreInfo LLVMMC LLVMSupport) > set(MSVC_LIB_DEPS_LLVMipa LLVMAnalysis LLVMCore LLVMSupport LLVMSystem) > set(MSVC_LIB_DEPS_LLVMipo LLVMAnalysis LLVMCore LLVMScalarOpts LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils LLVMipa) > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From peckw at wesleypeck.com Wed Nov 17 16:54:43 2010 From: peckw at wesleypeck.com (Wesley Peck) Date: Wed, 17 Nov 2010 22:54:43 -0000 Subject: [llvm-commits] [llvm] r119580 - in /llvm/trunk/test/MC/Disassembler/MBlaze: mblaze-tests.txt mblaze_branch.txt mblaze_fpu.txt mblaze_fsl.txt mblaze_imm.txt mblaze_memory.txt mblaze_operands.txt mblaze_pattern.txt mblaze_shift.txt mblaze_special.txt mblaze_typea.txt mblaze_typeb.txt Message-ID: <20101117225443.808452A6C12C@llvm.org> Author: peckw Date: Wed Nov 17 16:54:43 2010 New Revision: 119580 URL: http://llvm.org/viewvc/llvm-project?rev=119580&view=rev Log: Now that the MBlaze backend is in its own directory, split the test cases into multiple files for different types of instructions. Added: llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_branch.txt llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_fpu.txt llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_fsl.txt llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_imm.txt llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_memory.txt llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_operands.txt llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_pattern.txt llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_shift.txt llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_special.txt llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_typea.txt llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_typeb.txt Removed: llvm/trunk/test/MC/Disassembler/MBlaze/mblaze-tests.txt Removed: llvm/trunk/test/MC/Disassembler/MBlaze/mblaze-tests.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/MBlaze/mblaze-tests.txt?rev=119579&view=auto ============================================================================== --- llvm/trunk/test/MC/Disassembler/MBlaze/mblaze-tests.txt (original) +++ llvm/trunk/test/MC/Disassembler/MBlaze/mblaze-tests.txt (removed) @@ -1,1079 +0,0 @@ -# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s - -################################################################################ -# Branch instructions -################################################################################ - -# CHECK: beq r2, r3 -0x9c 0x02 0x18 0x00 - -# CHECK: bge r2, r3 -0x9c 0xa2 0x18 0x00 - -# CHECK: bgt r2, r3 -0x9c 0x82 0x18 0x00 - -# CHECK: ble r2, r3 -0x9c 0x62 0x18 0x00 - -# CHECK: blt r2, r3 -0x9c 0x42 0x18 0x00 - -# CHECK: bne r2, r3 -0x9c 0x22 0x18 0x00 - -# CHECK: beqd r2, r3 -0x9e 0x02 0x18 0x00 - -# CHECK: bged r2, r3 -0x9e 0xa2 0x18 0x00 - -# CHECK: bgtd r2, r3 -0x9e 0x82 0x18 0x00 - -# CHECK: bled r2, r3 -0x9e 0x62 0x18 0x00 - -# CHECK: bltd r2, r3 -0x9e 0x42 0x18 0x00 - -# CHECK: bned r2, r3 -0x9e 0x22 0x18 0x00 - -# CHECK: br r3 -0x98 0x00 0x18 0x00 - -# CHECK: bra r3 -0x98 0x08 0x18 0x00 - -# CHECK: brd r3 -0x98 0x10 0x18 0x00 - -# CHECK: brad r3 -0x98 0x18 0x18 0x00 - -# CHECK: brld r15, r3 -0x99 0xf4 0x18 0x00 - -# CHECK: brald r15, r3 -0x99 0xfc 0x18 0x00 - -# CHECK: brk r15, r3 -0x99 0xec 0x18 0x00 - -# CHECK: beqi r2, 0 -0xbc 0x02 0x00 0x00 - -# CHECK: bgei r2, 0 -0xbc 0xa2 0x00 0x00 - -# CHECK: bgti r2, 0 -0xbc 0x82 0x00 0x00 - - # CHECK: blei r2, 0 -0xbc 0x62 0x00 0x00 - -# CHECK: blti r2, 0 -0xbc 0x42 0x00 0x00 - -# CHECK: bnei r2, 0 -0xbc 0x22 0x00 0x00 - -# CHECK: beqid r2, 0 -0xbe 0x02 0x00 0x00 - -# CHECK: bgeid r2, 0 -0xbe 0xa2 0x00 0x00 - -# CHECK: bgtid r2, 0 -0xbe 0x82 0x00 0x00 - -# CHECK: bleid r2, 0 -0xbe 0x62 0x00 0x00 - -# CHECK: bltid r2, 0 -0xbe 0x42 0x00 0x00 - -# CHECK: bneid r2, 0 -0xbe 0x22 0x00 0x00 - -# CHECK: bri 0 -0xb8 0x00 0x00 0x00 - -# CHECK: brai 0 -0xb8 0x08 0x00 0x00 - -# CHECK: brid 0 -0xb8 0x10 0x00 0x00 - -# CHECK: braid 0 -0xb8 0x18 0x00 0x00 - -# CHECK: brlid r15, 0 -0xb9 0xf4 0x00 0x00 - -# CHECK: bralid r15, 0 -0xb9 0xfc 0x00 0x00 - -# CHECK: brki r15, 0 -0xb9 0xec 0x00 0x00 - -################################################################################ -# TYPE A instructions -################################################################################ - -# CHECK: add r1, r2, r3 -0x00 0x22 0x18 0x00 - -# CHECK: addc r1, r2, r3 -0x08 0x22 0x18 0x00 - -# CHECK: addk r1, r2, r3 -0x10 0x22 0x18 0x00 - -# CHECK: addkc r1, r2, r3 -0x18 0x22 0x18 0x00 - -# CHECK: and r1, r2, r3 -0x84 0x22 0x18 0x00 - -# CHECK: andn r1, r2, r3 -0x8c 0x22 0x18 0x00 - -# CHECK: cmp r1, r2, r3 -0x14 0x22 0x18 0x01 - -# CHECK: cmpu r1, r2, r3 -0x14 0x22 0x18 0x03 - -# CHECK: idiv r1, r2, r3 -0x48 0x22 0x18 0x00 - -# CHECK: idivu r1, r2, r3 -0x48 0x22 0x18 0x02 - -# CHECK: mul r1, r2, r3 -0x40 0x22 0x18 0x00 - -# CHECK: mulh r1, r2, r3 -0x40 0x22 0x18 0x01 - -# CHECK: mulhu r1, r2, r3 -0x40 0x22 0x18 0x03 - -# CHECK: mulhsu r1, r2, r3 -0x40 0x22 0x18 0x02 - -# CHECK: or r1, r2, r3 -0x80 0x22 0x18 0x00 - -# CHECK: rsub r1, r2, r3 -0x04 0x22 0x18 0x00 - -# CHECK: rsubc r1, r2, r3 -0x0c 0x22 0x18 0x00 - -# CHECK: rsubk r1, r2, r3 -0x14 0x22 0x18 0x00 - -# CHECK: rsubkc r1, r2, r3 -0x1c 0x22 0x18 0x00 - -# CHECK: sext16 r1, r2 -0x90 0x22 0x00 0x61 - -# CHECK: sext8 r1, r2 -0x90 0x22 0x00 0x60 - -# CHECK: xor r1, r2, r3 -0x88 0x22 0x18 0x00 - -# CHECK: or r0, r0, r0 -0x80 0x00 0x00 0x00 - -################################################################################ -# TYPE B instructions -################################################################################ - -# CHECK: addi r1, r2, 15 -0x20 0x22 0x00 0x0f - -# CHECK: addic r1, r2, 15 -0x28 0x22 0x00 0x0f - -# CHECK: addik r1, r2, 15 -0x30 0x22 0x00 0x0f - -# CHECK: addikc r1, r2, 15 -0x38 0x22 0x00 0x0f - -# CHECK: andi r1, r2, 15 -0xa4 0x22 0x00 0x0f - -# CHECK: andni r1, r2, 15 -0xac 0x22 0x00 0x0f - -# CHECK: muli r1, r2, 15 -0x60 0x22 0x00 0x0f - -# CHECK: ori r1, r2, 15 -0xa0 0x22 0x00 0x0f - -# CHECK: rsubi r1, r2, 15 -0x24 0x22 0x00 0x0f - -# CHECK: rsubic r1, r2, 15 -0x2c 0x22 0x00 0x0f - -# CHECK: rsubik r1, r2, 15 -0x34 0x22 0x00 0x0f - -# CHECK: rsubikc r1, r2, 15 -0x3c 0x22 0x00 0x0f - -# CHECK: rtbd r15, 15 -0xb6 0x4f 0x00 0x0f - -# CHECK: rted r15, 15 -0xb6 0x8f 0x00 0x0f - -# CHECK: rtid r15, 15 -0xb6 0x2f 0x00 0x0f - -# CHECK: rtsd r15, 15 -0xb6 0x0f 0x00 0x0f - -# CHECK: xori r1, r2, 15 -0xa8 0x22 0x00 0x0f - -################################################################################ -# FPU instructions -################################################################################ - -# CHECK: fadd r0, r1, r2 -0x58 0x01 0x10 0x00 - -# CHECK: frsub r0, r1, r2 -0x58 0x01 0x10 0x80 - -# CHECK: fmul r0, r1, r2 -0x58 0x01 0x11 0x00 - -# CHECK: fdiv r0, r1, r2 -0x58 0x01 0x11 0x80 - -# CHECK: fsqrt r0, r1 -0x58 0x01 0x03 0x80 - -# CHECK: fint r0, r1 -0x58 0x01 0x03 0x00 - -# CHECK: flt r0, r1 -0x58 0x01 0x02 0x80 - -# CHECK: fcmp.un r0, r1, r2 -0x58 0x01 0x12 0x00 - -# CHECK: fcmp.lt r0, r1, r2 -0x58 0x01 0x12 0x10 - -# CHECK: fcmp.eq r0, r1, r2 -0x58 0x01 0x12 0x20 - -# CHECK: fcmp.le r0, r1, r2 -0x58 0x01 0x12 0x30 - -# CHECK: fcmp.gt r0, r1, r2 -0x58 0x01 0x12 0x40 - -# CHECK: fcmp.ne r0, r1, r2 -0x58 0x01 0x12 0x50 - -# CHECK: fcmp.ge r0, r1, r2 -0x58 0x01 0x12 0x60 - -################################################################################ -# IMM instruction processing -################################################################################ - -# CHECK: addi r0, r0, 0 -0x20 0x00 0x00 0x00 - -# CHECK: addi r0, r0, 1 -0x20 0x00 0x00 0x01 - -# CHECK: addi r0, r0, 2 -0x20 0x00 0x00 0x02 - -# CHECK: addi r0, r0, 4 -0x20 0x00 0x00 0x04 - -# CHECK: addi r0, r0, 8 -0x20 0x00 0x00 0x08 - -# CHECK: addi r0, r0, 16 -0x20 0x00 0x00 0x10 - -# CHECK: addi r0, r0, 32 -0x20 0x00 0x00 0x20 - -# CHECK: addi r0, r0, 64 -0x20 0x00 0x00 0x40 - -# CHECK: addi r0, r0, 128 -0x20 0x00 0x00 0x80 - -# CHECK: addi r0, r0, 256 -0x20 0x00 0x01 0x00 - -# CHECK: addi r0, r0, 512 -0x20 0x00 0x02 0x00 - -# CHECK: addi r0, r0, 1024 -0x20 0x00 0x04 0x00 - -# CHECK: addi r0, r0, 2048 -0x20 0x00 0x08 0x00 - -# CHECK: addi r0, r0, 4096 -0x20 0x00 0x10 0x00 - -# CHECK: addi r0, r0, 8192 -0x20 0x00 0x20 0x00 - -# CHECK: addi r0, r0, 16384 -0x20 0x00 0x40 0x00 - -# CHECK: imm 0 -# CHECK: addi r0, r0, -32768 -0xb0 0x00 0x00 0x00 0x20 0x00 0x80 0x00 - -# CHECK: imm 1 -# CHECK: addi r0, r0, 0 -0xb0 0x00 0x00 0x01 0x20 0x00 0x00 0x00 - -# CHECK: imm 2 -# CHECK: addi r0, r0, 0 -0xb0 0x00 0x00 0x02 0x20 0x00 0x00 0x00 - -# CHECK: imm 4 -# CHECK: addi r0, r0, 0 -0xb0 0x00 0x00 0x04 0x20 0x00 0x00 0x00 - -# CHECK: imm 8 -# CHECK: addi r0, r0, 0 -0xb0 0x00 0x00 0x08 0x20 0x00 0x00 0x00 - -# CHECK: imm 16 -# CHECK: addi r0, r0, 0 -0xb0 0x00 0x00 0x10 0x20 0x00 0x00 0x00 - -# CHECK: imm 32 -# CHECK: addi r0, r0, 0 -0xb0 0x00 0x00 0x20 0x20 0x00 0x00 0x00 - -# CHECK: imm 64 -# CHECK: addi r0, r0, 0 -0xb0 0x00 0x00 0x40 0x20 0x00 0x00 0x00 - -# CHECK: imm 128 -# CHECK: addi r0, r0, 0 -0xb0 0x00 0x00 0x80 0x20 0x00 0x00 0x00 - -# CHECK: imm 256 -# CHECK: addi r0, r0, 0 -0xb0 0x00 0x01 0x00 0x20 0x00 0x00 0x00 - -# CHECK: imm 512 -# CHECK: addi r0, r0, 0 -0xb0 0x00 0x02 0x00 0x20 0x00 0x00 0x00 - -# CHECK: imm 1024 -# CHECK: addi r0, r0, 0 -0xb0 0x00 0x04 0x00 0x20 0x00 0x00 0x00 - -# CHECK: imm 2048 -# CHECK: addi r0, r0, 0 -0xb0 0x00 0x08 0x00 0x20 0x00 0x00 0x00 - -# CHECK: imm 4096 -# CHECK: addi r0, r0, 0 -0xb0 0x00 0x10 0x00 0x20 0x00 0x00 0x00 - -# CHECK: imm 8192 -# CHECK: addi r0, r0, 0 -0xb0 0x00 0x20 0x00 0x20 0x00 0x00 0x00 - -# CHECK: imm 16384 -# CHECK: addi r0, r0, 0 -0xb0 0x00 0x40 0x00 0x20 0x00 0x00 0x00 - -# CHECK: imm -32768 -# CHECK: addi r0, r0, 0 -0xb0 0x00 0x80 0x00 0x20 0x00 0x00 0x00 - -################################################################################ -# Memory instructions -################################################################################ - -# CHECK: lbu r1, r2, r3 -0xc0 0x22 0x18 0x00 - -# CHECK: lbur r1, r2, r3 -0xc0 0x22 0x1a 0x00 - -# CHECK: lbui r1, r2, 28 -0xe0 0x22 0x00 0x1c - -# CHECK: lhu r1, r2, r3 -0xc4 0x22 0x18 0x00 - -# CHECK: lhur r1, r2, r3 -0xc4 0x22 0x1a 0x00 - -# CHECK: lhui r1, r2, 28 -0xe4 0x22 0x00 0x1c - -# CHECK: lw r1, r2, r3 -0xc8 0x22 0x18 0x00 - -# CHECK: lwr r1, r2, r3 -0xc8 0x22 0x1a 0x00 - -# CHECK: lwi r1, r2, 28 -0xe8 0x22 0x00 0x1c - -# CHECK: lwx r1, r2, r3 -0xc8 0x22 0x1c 0x00 - -# CHECK: sb r1, r2, r3 -0xd0 0x22 0x18 0x00 - -# CHECK: sbr r1, r2, r3 -0xd0 0x22 0x1a 0x00 - -# CHECK: sbi r1, r2, 28 -0xf0 0x22 0x00 0x1c - -# CHECK: sh r1, r2, r3 -0xd4 0x22 0x18 0x00 - -# CHECK: shr r1, r2, r3 -0xd4 0x22 0x1a 0x00 - -# CHECK: shi r1, r2, 28 -0xf4 0x22 0x00 0x1c - -# CHECK: sw r1, r2, r3 -0xd8 0x22 0x18 0x00 - -# CHECK: swr r1, r2, r3 -0xd8 0x22 0x1a 0x00 - -# CHECK: swi r1, r2, 28 -0xf8 0x22 0x00 0x1c - -# CHECK: swx r1, r2, r3 -0xd8 0x22 0x1c 0x00 - -################################################################################ -# Special instructions -################################################################################ - -# CHECK: mfs r0, 0 -0x94 0x00 0x80 0x00 - -# CHECK: msrclr r0, 0 -0x94 0x11 0x00 0x00 - -# CHECK: msrset r0, 0 -0x94 0x10 0x00 0x00 - -# CHECK: mts 0, r0 -0x94 0x00 0xc0 0x00 - -# CHECK: wdc r0, r1 -0x90 0x00 0x08 0x64 - -# CHECK: wdc.clear r0, r1 -0x90 0x00 0x08 0x66 - -# CHECK: wdc.flush r0, r1 -0x90 0x00 0x08 0x74 - -# CHECK: wic r0, r1 -0x90 0x00 0x08 0x68 - -################################################################################ -# Shift instructions -################################################################################ - -# CHECK: bsrl r1, r2, r3 -0x44 0x22 0x18 0x00 - -# CHECK: bsra r1, r2, r3 -0x44 0x22 0x1a 0x00 - -# CHECK: bsll r1, r2, r3 -0x44 0x22 0x1c 0x00 - -# CHECK: bsrli r1, r2, 0 -0x64 0x22 0x00 0x00 - -# CHECK: bsrai r1, r2, 0 -0x64 0x22 0x02 0x00 - -# CHECK: bslli r1, r2, 0 -0x64 0x22 0x04 0x00 - -# CHECK: sra r1, r2 -0x90 0x22 0x00 0x01 - -# CHECK: srl r1, r2 -0x90 0x22 0x00 0x41 - -################################################################################ -# Pattern instructions -################################################################################ - -# CHECK: pcmpbf r0, r1, r2 -0x80 0x01 0x14 0x00 - -# CHECK: pcmpne r0, r1, r2 -0x8c 0x01 0x14 0x00 - -# CHECK: pcmpeq r0, r1, r2 -0x88 0x01 0x14 0x00 - -################################################################################ -# Opcode disassembly -################################################################################ - -# CHECK: add r0, r0, r0 -0x00 0x00 0x00 0x00 - -# CHECK: add r1, r1, r1 -0x00 0x21 0x08 0x00 - -# CHECK: add r2, r2, r2 -0x00 0x42 0x10 0x00 - -# CHECK: add r3, r3, r3 -0x00 0x63 0x18 0x00 - -# CHECK: add r4, r4, r4 -0x00 0x84 0x20 0x00 - -# CHECK: add r5, r5, r5 -0x00 0xa5 0x28 0x00 - -# CHECK: add r6, r6, r6 -0x00 0xc6 0x30 0x00 - -# CHECK: add r7, r7, r7 -0x00 0xe7 0x38 0x00 - -# CHECK: add r8, r8, r8 -0x01 0x08 0x40 0x00 - -# CHECK: add r9, r9, r9 -0x01 0x29 0x48 0x00 - -# CHECK: add r10, r10, r10 -0x01 0x4a 0x50 0x00 - -# CHECK: add r11, r11, r11 -0x01 0x6b 0x58 0x00 - -# CHECK: add r12, r12, r12 -0x01 0x8c 0x60 0x00 - -# CHECK: add r13, r13, r13 -0x01 0xad 0x68 0x00 - -# CHECK: add r14, r14, r14 -0x01 0xce 0x70 0x00 - -# CHECK: add r15, r15, r15 -0x01 0xef 0x78 0x00 - -# CHECK: add r16, r16, r16 -0x02 0x10 0x80 0x00 - -# CHECK: add r17, r17, r17 -0x02 0x31 0x88 0x00 - -# CHECK: add r18, r18, r18 -0x02 0x52 0x90 0x00 - -# CHECK: add r19, r19, r19 -0x02 0x73 0x98 0x00 - -# CHECK: add r20, r20, r20 -0x02 0x94 0xa0 0x00 - -# CHECK: add r21, r21, r21 -0x02 0xb5 0xa8 0x00 - -# CHECK: add r22, r22, r22 -0x02 0xd6 0xb0 0x00 - -# CHECK: add r23, r23, r23 -0x02 0xf7 0xb8 0x00 - -# CHECK: add r24, r24, r24 -0x03 0x18 0xc0 0x00 - -# CHECK: add r25, r25, r25 -0x03 0x39 0xc8 0x00 - -# CHECK: add r26, r26, r26 -0x03 0x5a 0xd0 0x00 - -# CHECK: add r27, r27, r27 -0x03 0x7b 0xd8 0x00 - -# CHECK: add r28, r28, r28 -0x03 0x9c 0xe0 0x00 - -# CHECK: add r29, r29, r29 -0x03 0xbd 0xe8 0x00 - -# CHECK: add r30, r30, r30 -0x03 0xde 0xf0 0x00 - -# CHECK: add r31, r31, r31 -0x03 0xff 0xf8 0x00 - -# CHECK: addi r0, r0, 0 -0x20 0x00 0x00 0x00 - -# CHECK: addi r0, r0, 1 -0x20 0x00 0x00 0x01 - -# CHECK: addi r0, r0, 2 -0x20 0x00 0x00 0x02 - -# CHECK: addi r0, r0, 4 -0x20 0x00 0x00 0x04 - -# CHECK: addi r0, r0, 8 -0x20 0x00 0x00 0x08 - -# CHECK: addi r0, r0, 16 -0x20 0x00 0x00 0x10 - -# CHECK: addi r0, r0, 32 -0x20 0x00 0x00 0x20 - -# CHECK: addi r0, r0, 64 -0x20 0x00 0x00 0x40 - -# CHECK: addi r0, r0, 128 -0x20 0x00 0x00 0x80 - -# CHECK: addi r0, r0, 256 -0x20 0x00 0x01 0x00 - -# CHECK: addi r0, r0, 512 -0x20 0x00 0x02 0x00 - -# CHECK: addi r0, r0, 1024 -0x20 0x00 0x04 0x00 - -# CHECK: addi r0, r0, 2048 -0x20 0x00 0x08 0x00 - -# CHECK: addi r0, r0, 4096 -0x20 0x00 0x10 0x00 - -# CHECK: addi r0, r0, 8192 -0x20 0x00 0x20 0x00 - -# CHECK: addi r0, r0, 16384 -0x20 0x00 0x40 0x00 - -# CHECK: addi r0, r0, -1 -0x20 0x00 0xff 0xff - -# CHECK: addi r0, r0, -2 -0x20 0x00 0xff 0xfe - -# CHECK: addi r0, r0, -4 -0x20 0x00 0xff 0xfc - -# CHECK: addi r0, r0, -8 -0x20 0x00 0xff 0xf8 - -# CHECK: addi r0, r0, -16 -0x20 0x00 0xff 0xf0 - -# CHECK: addi r0, r0, -32 -0x20 0x00 0xff 0xe0 - -# CHECK: addi r0, r0, -64 -0x20 0x00 0xff 0xc0 - -# CHECK: addi r0, r0, -128 -0x20 0x00 0xff 0x80 - -# CHECK: addi r0, r0, -256 -0x20 0x00 0xff 0x00 - -# CHECK: addi r0, r0, -512 -0x20 0x00 0xfe 0x00 - -# CHECK: addi r0, r0, -1024 -0x20 0x00 0xfc 0x00 - -# CHECK: addi r0, r0, -2048 -0x20 0x00 0xf8 0x00 - -# CHECK: addi r0, r0, -4096 -0x20 0x00 0xf0 0x00 - -# CHECK: addi r0, r0, -8192 -0x20 0x00 0xe0 0x00 - -# CHECK: addi r0, r0, -16384 -0x20 0x00 0xc0 0x00 - -# CHECK: addi r0, r0, -32768 -0x20 0x00 0x80 0x00 - -################################################################################ -# FSL instructions -################################################################################ - -# CHECK: get r0, rfsl0 -0x6c 0x00 0x00 0x00 - -# CHECK: nget r0, rfsl0 -0x6c 0x00 0x40 0x00 - -# CHECK: cget r0, rfsl0 -0x6c 0x00 0x20 0x00 - -# CHECK: ncget r0, rfsl0 -0x6c 0x00 0x60 0x00 - -# CHECK: tget r0, rfsl0 -0x6c 0x00 0x10 0x00 - -# CHECK: tnget r0, rfsl0 -0x6c 0x00 0x50 0x00 - -# CHECK: tcget r0, rfsl0 -0x6c 0x00 0x30 0x00 - -# CHECK: tncget r0, rfsl0 -0x6c 0x00 0x70 0x00 - -# CHECK: aget r0, rfsl0 -0x6c 0x00 0x08 0x00 - -# CHECK: naget r0, rfsl0 -0x6c 0x00 0x48 0x00 - -# CHECK: caget r0, rfsl0 -0x6c 0x00 0x28 0x00 - -# CHECK: ncaget r0, rfsl0 -0x6c 0x00 0x68 0x00 - -# CHECK: taget r0, rfsl0 -0x6c 0x00 0x18 0x00 - -# CHECK: tnaget r0, rfsl0 -0x6c 0x00 0x58 0x00 - -# CHECK: tcaget r0, rfsl0 -0x6c 0x00 0x38 0x00 - -# CHECK: tncaget r0, rfsl0 -0x6c 0x00 0x78 0x00 - -# CHECK: eget r0, rfsl0 -0x6c 0x00 0x04 0x00 - -# CHECK: neget r0, rfsl0 -0x6c 0x00 0x44 0x00 - -# CHECK: ecget r0, rfsl0 -0x6c 0x00 0x24 0x00 - -# CHECK: necget r0, rfsl0 -0x6c 0x00 0x64 0x00 - -# CHECK: teget r0, rfsl0 -0x6c 0x00 0x14 0x00 - -# CHECK: tneget r0, rfsl0 -0x6c 0x00 0x54 0x00 - -# CHECK: tecget r0, rfsl0 -0x6c 0x00 0x34 0x00 - -# CHECK: tnecget r0, rfsl0 -0x6c 0x00 0x74 0x00 - -# CHECK: eaget r0, rfsl0 -0x6c 0x00 0x0c 0x00 - -# CHECK: neaget r0, rfsl0 -0x6c 0x00 0x4c 0x00 - -# CHECK: ecaget r0, rfsl0 -0x6c 0x00 0x2c 0x00 - -# CHECK: necaget r0, rfsl0 -0x6c 0x00 0x6c 0x00 - -# CHECK: teaget r0, rfsl0 -0x6c 0x00 0x1c 0x00 - -# CHECK: tneaget r0, rfsl0 -0x6c 0x00 0x5c 0x00 - -# CHECK: tecaget r0, rfsl0 -0x6c 0x00 0x3c 0x00 - -# CHECK: tnecaget r0, rfsl0 -0x6c 0x00 0x7c 0x00 - -# CHECK: getd r0, r1 -0x4c 0x00 0x08 0x00 - -# CHECK: ngetd r0, r1 -0x4c 0x00 0x0a 0x00 - -# CHECK: cgetd r0, r1 -0x4c 0x00 0x09 0x00 - -# CHECK: ncgetd r0, r1 -0x4c 0x00 0x0b 0x00 - -# CHECK: tgetd r0, r1 -0x4c 0x00 0x08 0x80 - -# CHECK: tngetd r0, r1 -0x4c 0x00 0x0a 0x80 - -# CHECK: tcgetd r0, r1 -0x4c 0x00 0x09 0x80 - -# CHECK: tncgetd r0, r1 -0x4c 0x00 0x0b 0x80 - -# CHECK: agetd r0, r1 -0x4c 0x00 0x08 0x40 - -# CHECK: nagetd r0, r1 -0x4c 0x00 0x0a 0x40 - -# CHECK: cagetd r0, r1 -0x4c 0x00 0x09 0x40 - -# CHECK: ncagetd r0, r1 -0x4c 0x00 0x0b 0x40 - -# CHECK: tagetd r0, r1 -0x4c 0x00 0x08 0xc0 - -# CHECK: tnagetd r0, r1 -0x4c 0x00 0x0a 0xc0 - -# CHECK: tcagetd r0, r1 -0x4c 0x00 0x09 0xc0 - -# CHECK: tncagetd r0, r1 -0x4c 0x00 0x0b 0xc0 - -# CHECK: egetd r0, r1 -0x4c 0x00 0x08 0x20 - -# CHECK: negetd r0, r1 -0x4c 0x00 0x0a 0x20 - -# CHECK: ecgetd r0, r1 -0x4c 0x00 0x09 0x20 - -# CHECK: necgetd r0, r1 -0x4c 0x00 0x0b 0x20 - -# CHECK: tegetd r0, r1 -0x4c 0x00 0x08 0xa0 - -# CHECK: tnegetd r0, r1 -0x4c 0x00 0x0a 0xa0 - -# CHECK: tecgetd r0, r1 -0x4c 0x00 0x09 0xa0 - -# CHECK: tnecgetd r0, r1 -0x4c 0x00 0x0b 0xa0 - -# CHECK: eagetd r0, r1 -0x4c 0x00 0x08 0x60 - -# CHECK: neagetd r0, r1 -0x4c 0x00 0x0a 0x60 - -# CHECK: ecagetd r0, r1 -0x4c 0x00 0x09 0x60 - -# CHECK: necagetd r0, r1 -0x4c 0x00 0x0b 0x60 - -# CHECK: teagetd r0, r1 -0x4c 0x00 0x08 0xe0 - -# CHECK: tneagetd r0, r1 -0x4c 0x00 0x0a 0xe0 - -# CHECK: tecagetd r0, r1 -0x4c 0x00 0x09 0xe0 - -# CHECK: tnecagetd r0, r1 -0x4c 0x00 0x0b 0xe0 - -# CHECK: put r0, rfsl0 -0x6c 0x00 0x80 0x00 - -# CHECK: aput r0, rfsl0 -0x6c 0x00 0x88 0x00 - -# CHECK: cput r0, rfsl0 -0x6c 0x00 0xa0 0x00 - -# CHECK: caput r0, rfsl0 -0x6c 0x00 0xa8 0x00 - -# CHECK: nput r0, rfsl0 -0x6c 0x00 0xc0 0x00 - -# CHECK: naput r0, rfsl0 -0x6c 0x00 0xc8 0x00 - -# CHECK: ncput r0, rfsl0 -0x6c 0x00 0xe0 0x00 - -# CHECK: ncaput r0, rfsl0 -0x6c 0x00 0xe8 0x00 - -# CHECK: tput rfsl0 -0x6c 0x00 0x90 0x00 - -# CHECK: taput rfsl0 -0x6c 0x00 0x98 0x00 - -# CHECK: tcput rfsl0 -0x6c 0x00 0xb0 0x00 - -# CHECK: tcaput rfsl0 -0x6c 0x00 0xb8 0x00 - -# CHECK: tnput rfsl0 -0x6c 0x00 0xd0 0x00 - -# CHECK: tnaput rfsl0 -0x6c 0x00 0xd8 0x00 - -# CHECK: tncput rfsl0 -0x6c 0x00 0xf0 0x00 - -# CHECK: tncaput rfsl0 -0x6c 0x00 0xf8 0x00 - -# CHECK: putd r0, r1 -0x4c 0x00 0x0c 0x00 - -# CHECK: aputd r0, r1 -0x4c 0x00 0x0c 0x40 - -# CHECK: cputd r0, r1 -0x4c 0x00 0x0d 0x00 - -# CHECK: caputd r0, r1 -0x4c 0x00 0x0d 0x40 - -# CHECK: nputd r0, r1 -0x4c 0x00 0x0e 0x00 - -# CHECK: naputd r0, r1 -0x4c 0x00 0x0e 0x40 - -# CHECK: ncputd r0, r1 -0x4c 0x00 0x0f 0x00 - -# CHECK: ncaputd r0, r1 -0x4c 0x00 0x0f 0x40 - -# CHECK: tputd r1 -0x4c 0x00 0x0c 0x80 - -# CHECK: taputd r1 -0x4c 0x00 0x0c 0xc0 - -# CHECK: tcputd r1 -0x4c 0x00 0x0d 0x80 - -# CHECK: tcaputd r1 -0x4c 0x00 0x0d 0xc0 - -# CHECK: tnputd r1 -0x4c 0x00 0x0e 0x80 - -# CHECK: tnaputd r1 -0x4c 0x00 0x0e 0xc0 - -# CHECK: tncputd r1 -0x4c 0x00 0x0f 0x80 - -# CHECK: tncaputd r1 -0x4c 0x00 0x0f 0xc0 - -# CHECK: get r0, rfsl1 -0x6c 0x00 0x00 0x01 - -# CHECK: get r0, rfsl2 -0x6c 0x00 0x00 0x02 - -# CHECK: get r0, rfsl3 -0x6c 0x00 0x00 0x03 - -# CHECK: get r0, rfsl4 -0x6c 0x00 0x00 0x04 - -# CHECK: get r0, rfsl5 -0x6c 0x00 0x00 0x05 - -# CHECK: get r0, rfsl6 -0x6c 0x00 0x00 0x06 - -# CHECK: get r0, rfsl7 -0x6c 0x00 0x00 0x07 - -# CHECK: get r0, rfsl8 -0x6c 0x00 0x00 0x08 - -# CHECK: get r0, rfsl9 -0x6c 0x00 0x00 0x09 - -# CHECK: get r0, rfsl10 -0x6c 0x00 0x00 0x0a - -# CHECK: get r0, rfsl11 -0x6c 0x00 0x00 0x0b - -# CHECK: get r0, rfsl12 -0x6c 0x00 0x00 0x0c - -# CHECK: get r0, rfsl13 -0x6c 0x00 0x00 0x0d - -# CHECK: get r0, rfsl14 -0x6c 0x00 0x00 0x0e - -# CHECK: get r0, rfsl15 -0x6c 0x00 0x00 0x0f Added: llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_branch.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_branch.txt?rev=119580&view=auto ============================================================================== --- llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_branch.txt (added) +++ llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_branch.txt Wed Nov 17 16:54:43 2010 @@ -0,0 +1,119 @@ +# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s + +################################################################################ +# Branch instructions +################################################################################ + +# CHECK: beq r2, r3 +0x9c 0x02 0x18 0x00 + +# CHECK: bge r2, r3 +0x9c 0xa2 0x18 0x00 + +# CHECK: bgt r2, r3 +0x9c 0x82 0x18 0x00 + +# CHECK: ble r2, r3 +0x9c 0x62 0x18 0x00 + +# CHECK: blt r2, r3 +0x9c 0x42 0x18 0x00 + +# CHECK: bne r2, r3 +0x9c 0x22 0x18 0x00 + +# CHECK: beqd r2, r3 +0x9e 0x02 0x18 0x00 + +# CHECK: bged r2, r3 +0x9e 0xa2 0x18 0x00 + +# CHECK: bgtd r2, r3 +0x9e 0x82 0x18 0x00 + +# CHECK: bled r2, r3 +0x9e 0x62 0x18 0x00 + +# CHECK: bltd r2, r3 +0x9e 0x42 0x18 0x00 + +# CHECK: bned r2, r3 +0x9e 0x22 0x18 0x00 + +# CHECK: br r3 +0x98 0x00 0x18 0x00 + +# CHECK: bra r3 +0x98 0x08 0x18 0x00 + +# CHECK: brd r3 +0x98 0x10 0x18 0x00 + +# CHECK: brad r3 +0x98 0x18 0x18 0x00 + +# CHECK: brld r15, r3 +0x99 0xf4 0x18 0x00 + +# CHECK: brald r15, r3 +0x99 0xfc 0x18 0x00 + +# CHECK: brk r15, r3 +0x99 0xec 0x18 0x00 + +# CHECK: beqi r2, 0 +0xbc 0x02 0x00 0x00 + +# CHECK: bgei r2, 0 +0xbc 0xa2 0x00 0x00 + +# CHECK: bgti r2, 0 +0xbc 0x82 0x00 0x00 + + # CHECK: blei r2, 0 +0xbc 0x62 0x00 0x00 + +# CHECK: blti r2, 0 +0xbc 0x42 0x00 0x00 + +# CHECK: bnei r2, 0 +0xbc 0x22 0x00 0x00 + +# CHECK: beqid r2, 0 +0xbe 0x02 0x00 0x00 + +# CHECK: bgeid r2, 0 +0xbe 0xa2 0x00 0x00 + +# CHECK: bgtid r2, 0 +0xbe 0x82 0x00 0x00 + +# CHECK: bleid r2, 0 +0xbe 0x62 0x00 0x00 + +# CHECK: bltid r2, 0 +0xbe 0x42 0x00 0x00 + +# CHECK: bneid r2, 0 +0xbe 0x22 0x00 0x00 + +# CHECK: bri 0 +0xb8 0x00 0x00 0x00 + +# CHECK: brai 0 +0xb8 0x08 0x00 0x00 + +# CHECK: brid 0 +0xb8 0x10 0x00 0x00 + +# CHECK: braid 0 +0xb8 0x18 0x00 0x00 + +# CHECK: brlid r15, 0 +0xb9 0xf4 0x00 0x00 + +# CHECK: bralid r15, 0 +0xb9 0xfc 0x00 0x00 + +# CHECK: brki r15, 0 +0xb9 0xec 0x00 0x00 Added: llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_fpu.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_fpu.txt?rev=119580&view=auto ============================================================================== --- llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_fpu.txt (added) +++ llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_fpu.txt Wed Nov 17 16:54:43 2010 @@ -0,0 +1,47 @@ +# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s + +################################################################################ +# FPU instructions +################################################################################ + +# CHECK: fadd r0, r1, r2 +0x58 0x01 0x10 0x00 + +# CHECK: frsub r0, r1, r2 +0x58 0x01 0x10 0x80 + +# CHECK: fmul r0, r1, r2 +0x58 0x01 0x11 0x00 + +# CHECK: fdiv r0, r1, r2 +0x58 0x01 0x11 0x80 + +# CHECK: fsqrt r0, r1 +0x58 0x01 0x03 0x80 + +# CHECK: fint r0, r1 +0x58 0x01 0x03 0x00 + +# CHECK: flt r0, r1 +0x58 0x01 0x02 0x80 + +# CHECK: fcmp.un r0, r1, r2 +0x58 0x01 0x12 0x00 + +# CHECK: fcmp.lt r0, r1, r2 +0x58 0x01 0x12 0x10 + +# CHECK: fcmp.eq r0, r1, r2 +0x58 0x01 0x12 0x20 + +# CHECK: fcmp.le r0, r1, r2 +0x58 0x01 0x12 0x30 + +# CHECK: fcmp.gt r0, r1, r2 +0x58 0x01 0x12 0x40 + +# CHECK: fcmp.ne r0, r1, r2 +0x58 0x01 0x12 0x50 + +# CHECK: fcmp.ge r0, r1, r2 +0x58 0x01 0x12 0x60 Added: llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_fsl.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_fsl.txt?rev=119580&view=auto ============================================================================== --- llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_fsl.txt (added) +++ llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_fsl.txt Wed Nov 17 16:54:43 2010 @@ -0,0 +1,338 @@ +# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s + +################################################################################ +# FSL instructions +################################################################################ + +# CHECK: get r0, rfsl0 +0x6c 0x00 0x00 0x00 + +# CHECK: nget r0, rfsl0 +0x6c 0x00 0x40 0x00 + +# CHECK: cget r0, rfsl0 +0x6c 0x00 0x20 0x00 + +# CHECK: ncget r0, rfsl0 +0x6c 0x00 0x60 0x00 + +# CHECK: tget r0, rfsl0 +0x6c 0x00 0x10 0x00 + +# CHECK: tnget r0, rfsl0 +0x6c 0x00 0x50 0x00 + +# CHECK: tcget r0, rfsl0 +0x6c 0x00 0x30 0x00 + +# CHECK: tncget r0, rfsl0 +0x6c 0x00 0x70 0x00 + +# CHECK: aget r0, rfsl0 +0x6c 0x00 0x08 0x00 + +# CHECK: naget r0, rfsl0 +0x6c 0x00 0x48 0x00 + +# CHECK: caget r0, rfsl0 +0x6c 0x00 0x28 0x00 + +# CHECK: ncaget r0, rfsl0 +0x6c 0x00 0x68 0x00 + +# CHECK: taget r0, rfsl0 +0x6c 0x00 0x18 0x00 + +# CHECK: tnaget r0, rfsl0 +0x6c 0x00 0x58 0x00 + +# CHECK: tcaget r0, rfsl0 +0x6c 0x00 0x38 0x00 + +# CHECK: tncaget r0, rfsl0 +0x6c 0x00 0x78 0x00 + +# CHECK: eget r0, rfsl0 +0x6c 0x00 0x04 0x00 + +# CHECK: neget r0, rfsl0 +0x6c 0x00 0x44 0x00 + +# CHECK: ecget r0, rfsl0 +0x6c 0x00 0x24 0x00 + +# CHECK: necget r0, rfsl0 +0x6c 0x00 0x64 0x00 + +# CHECK: teget r0, rfsl0 +0x6c 0x00 0x14 0x00 + +# CHECK: tneget r0, rfsl0 +0x6c 0x00 0x54 0x00 + +# CHECK: tecget r0, rfsl0 +0x6c 0x00 0x34 0x00 + +# CHECK: tnecget r0, rfsl0 +0x6c 0x00 0x74 0x00 + +# CHECK: eaget r0, rfsl0 +0x6c 0x00 0x0c 0x00 + +# CHECK: neaget r0, rfsl0 +0x6c 0x00 0x4c 0x00 + +# CHECK: ecaget r0, rfsl0 +0x6c 0x00 0x2c 0x00 + +# CHECK: necaget r0, rfsl0 +0x6c 0x00 0x6c 0x00 + +# CHECK: teaget r0, rfsl0 +0x6c 0x00 0x1c 0x00 + +# CHECK: tneaget r0, rfsl0 +0x6c 0x00 0x5c 0x00 + +# CHECK: tecaget r0, rfsl0 +0x6c 0x00 0x3c 0x00 + +# CHECK: tnecaget r0, rfsl0 +0x6c 0x00 0x7c 0x00 + +# CHECK: getd r0, r1 +0x4c 0x00 0x08 0x00 + +# CHECK: ngetd r0, r1 +0x4c 0x00 0x0a 0x00 + +# CHECK: cgetd r0, r1 +0x4c 0x00 0x09 0x00 + +# CHECK: ncgetd r0, r1 +0x4c 0x00 0x0b 0x00 + +# CHECK: tgetd r0, r1 +0x4c 0x00 0x08 0x80 + +# CHECK: tngetd r0, r1 +0x4c 0x00 0x0a 0x80 + +# CHECK: tcgetd r0, r1 +0x4c 0x00 0x09 0x80 + +# CHECK: tncgetd r0, r1 +0x4c 0x00 0x0b 0x80 + +# CHECK: agetd r0, r1 +0x4c 0x00 0x08 0x40 + +# CHECK: nagetd r0, r1 +0x4c 0x00 0x0a 0x40 + +# CHECK: cagetd r0, r1 +0x4c 0x00 0x09 0x40 + +# CHECK: ncagetd r0, r1 +0x4c 0x00 0x0b 0x40 + +# CHECK: tagetd r0, r1 +0x4c 0x00 0x08 0xc0 + +# CHECK: tnagetd r0, r1 +0x4c 0x00 0x0a 0xc0 + +# CHECK: tcagetd r0, r1 +0x4c 0x00 0x09 0xc0 + +# CHECK: tncagetd r0, r1 +0x4c 0x00 0x0b 0xc0 + +# CHECK: egetd r0, r1 +0x4c 0x00 0x08 0x20 + +# CHECK: negetd r0, r1 +0x4c 0x00 0x0a 0x20 + +# CHECK: ecgetd r0, r1 +0x4c 0x00 0x09 0x20 + +# CHECK: necgetd r0, r1 +0x4c 0x00 0x0b 0x20 + +# CHECK: tegetd r0, r1 +0x4c 0x00 0x08 0xa0 + +# CHECK: tnegetd r0, r1 +0x4c 0x00 0x0a 0xa0 + +# CHECK: tecgetd r0, r1 +0x4c 0x00 0x09 0xa0 + +# CHECK: tnecgetd r0, r1 +0x4c 0x00 0x0b 0xa0 + +# CHECK: eagetd r0, r1 +0x4c 0x00 0x08 0x60 + +# CHECK: neagetd r0, r1 +0x4c 0x00 0x0a 0x60 + +# CHECK: ecagetd r0, r1 +0x4c 0x00 0x09 0x60 + +# CHECK: necagetd r0, r1 +0x4c 0x00 0x0b 0x60 + +# CHECK: teagetd r0, r1 +0x4c 0x00 0x08 0xe0 + +# CHECK: tneagetd r0, r1 +0x4c 0x00 0x0a 0xe0 + +# CHECK: tecagetd r0, r1 +0x4c 0x00 0x09 0xe0 + +# CHECK: tnecagetd r0, r1 +0x4c 0x00 0x0b 0xe0 + +# CHECK: put r0, rfsl0 +0x6c 0x00 0x80 0x00 + +# CHECK: aput r0, rfsl0 +0x6c 0x00 0x88 0x00 + +# CHECK: cput r0, rfsl0 +0x6c 0x00 0xa0 0x00 + +# CHECK: caput r0, rfsl0 +0x6c 0x00 0xa8 0x00 + +# CHECK: nput r0, rfsl0 +0x6c 0x00 0xc0 0x00 + +# CHECK: naput r0, rfsl0 +0x6c 0x00 0xc8 0x00 + +# CHECK: ncput r0, rfsl0 +0x6c 0x00 0xe0 0x00 + +# CHECK: ncaput r0, rfsl0 +0x6c 0x00 0xe8 0x00 + +# CHECK: tput rfsl0 +0x6c 0x00 0x90 0x00 + +# CHECK: taput rfsl0 +0x6c 0x00 0x98 0x00 + +# CHECK: tcput rfsl0 +0x6c 0x00 0xb0 0x00 + +# CHECK: tcaput rfsl0 +0x6c 0x00 0xb8 0x00 + +# CHECK: tnput rfsl0 +0x6c 0x00 0xd0 0x00 + +# CHECK: tnaput rfsl0 +0x6c 0x00 0xd8 0x00 + +# CHECK: tncput rfsl0 +0x6c 0x00 0xf0 0x00 + +# CHECK: tncaput rfsl0 +0x6c 0x00 0xf8 0x00 + +# CHECK: putd r0, r1 +0x4c 0x00 0x0c 0x00 + +# CHECK: aputd r0, r1 +0x4c 0x00 0x0c 0x40 + +# CHECK: cputd r0, r1 +0x4c 0x00 0x0d 0x00 + +# CHECK: caputd r0, r1 +0x4c 0x00 0x0d 0x40 + +# CHECK: nputd r0, r1 +0x4c 0x00 0x0e 0x00 + +# CHECK: naputd r0, r1 +0x4c 0x00 0x0e 0x40 + +# CHECK: ncputd r0, r1 +0x4c 0x00 0x0f 0x00 + +# CHECK: ncaputd r0, r1 +0x4c 0x00 0x0f 0x40 + +# CHECK: tputd r1 +0x4c 0x00 0x0c 0x80 + +# CHECK: taputd r1 +0x4c 0x00 0x0c 0xc0 + +# CHECK: tcputd r1 +0x4c 0x00 0x0d 0x80 + +# CHECK: tcaputd r1 +0x4c 0x00 0x0d 0xc0 + +# CHECK: tnputd r1 +0x4c 0x00 0x0e 0x80 + +# CHECK: tnaputd r1 +0x4c 0x00 0x0e 0xc0 + +# CHECK: tncputd r1 +0x4c 0x00 0x0f 0x80 + +# CHECK: tncaputd r1 +0x4c 0x00 0x0f 0xc0 + +# CHECK: get r0, rfsl1 +0x6c 0x00 0x00 0x01 + +# CHECK: get r0, rfsl2 +0x6c 0x00 0x00 0x02 + +# CHECK: get r0, rfsl3 +0x6c 0x00 0x00 0x03 + +# CHECK: get r0, rfsl4 +0x6c 0x00 0x00 0x04 + +# CHECK: get r0, rfsl5 +0x6c 0x00 0x00 0x05 + +# CHECK: get r0, rfsl6 +0x6c 0x00 0x00 0x06 + +# CHECK: get r0, rfsl7 +0x6c 0x00 0x00 0x07 + +# CHECK: get r0, rfsl8 +0x6c 0x00 0x00 0x08 + +# CHECK: get r0, rfsl9 +0x6c 0x00 0x00 0x09 + +# CHECK: get r0, rfsl10 +0x6c 0x00 0x00 0x0a + +# CHECK: get r0, rfsl11 +0x6c 0x00 0x00 0x0b + +# CHECK: get r0, rfsl12 +0x6c 0x00 0x00 0x0c + +# CHECK: get r0, rfsl13 +0x6c 0x00 0x00 0x0d + +# CHECK: get r0, rfsl14 +0x6c 0x00 0x00 0x0e + +# CHECK: get r0, rfsl15 +0x6c 0x00 0x00 0x0f Added: llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_imm.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_imm.txt?rev=119580&view=auto ============================================================================== --- llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_imm.txt (added) +++ llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_imm.txt Wed Nov 17 16:54:43 2010 @@ -0,0 +1,121 @@ +# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s + +################################################################################ +# IMM instruction processing +################################################################################ + +# CHECK: addi r0, r0, 0 +0x20 0x00 0x00 0x00 + +# CHECK: addi r0, r0, 1 +0x20 0x00 0x00 0x01 + +# CHECK: addi r0, r0, 2 +0x20 0x00 0x00 0x02 + +# CHECK: addi r0, r0, 4 +0x20 0x00 0x00 0x04 + +# CHECK: addi r0, r0, 8 +0x20 0x00 0x00 0x08 + +# CHECK: addi r0, r0, 16 +0x20 0x00 0x00 0x10 + +# CHECK: addi r0, r0, 32 +0x20 0x00 0x00 0x20 + +# CHECK: addi r0, r0, 64 +0x20 0x00 0x00 0x40 + +# CHECK: addi r0, r0, 128 +0x20 0x00 0x00 0x80 + +# CHECK: addi r0, r0, 256 +0x20 0x00 0x01 0x00 + +# CHECK: addi r0, r0, 512 +0x20 0x00 0x02 0x00 + +# CHECK: addi r0, r0, 1024 +0x20 0x00 0x04 0x00 + +# CHECK: addi r0, r0, 2048 +0x20 0x00 0x08 0x00 + +# CHECK: addi r0, r0, 4096 +0x20 0x00 0x10 0x00 + +# CHECK: addi r0, r0, 8192 +0x20 0x00 0x20 0x00 + +# CHECK: addi r0, r0, 16384 +0x20 0x00 0x40 0x00 + +# CHECK: imm 0 +# CHECK: addi r0, r0, -32768 +0xb0 0x00 0x00 0x00 0x20 0x00 0x80 0x00 + +# CHECK: imm 1 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x00 0x01 0x20 0x00 0x00 0x00 + +# CHECK: imm 2 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x00 0x02 0x20 0x00 0x00 0x00 + +# CHECK: imm 4 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x00 0x04 0x20 0x00 0x00 0x00 + +# CHECK: imm 8 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x00 0x08 0x20 0x00 0x00 0x00 + +# CHECK: imm 16 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x00 0x10 0x20 0x00 0x00 0x00 + +# CHECK: imm 32 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x00 0x20 0x20 0x00 0x00 0x00 + +# CHECK: imm 64 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x00 0x40 0x20 0x00 0x00 0x00 + +# CHECK: imm 128 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x00 0x80 0x20 0x00 0x00 0x00 + +# CHECK: imm 256 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x01 0x00 0x20 0x00 0x00 0x00 + +# CHECK: imm 512 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x02 0x00 0x20 0x00 0x00 0x00 + +# CHECK: imm 1024 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x04 0x00 0x20 0x00 0x00 0x00 + +# CHECK: imm 2048 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x08 0x00 0x20 0x00 0x00 0x00 + +# CHECK: imm 4096 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x10 0x00 0x20 0x00 0x00 0x00 + +# CHECK: imm 8192 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x20 0x00 0x20 0x00 0x00 0x00 + +# CHECK: imm 16384 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x40 0x00 0x20 0x00 0x00 0x00 + +# CHECK: imm -32768 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x80 0x00 0x20 0x00 0x00 0x00 Added: llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_memory.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_memory.txt?rev=119580&view=auto ============================================================================== --- llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_memory.txt (added) +++ llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_memory.txt Wed Nov 17 16:54:43 2010 @@ -0,0 +1,65 @@ +# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s + +################################################################################ +# Memory instructions +################################################################################ + +# CHECK: lbu r1, r2, r3 +0xc0 0x22 0x18 0x00 + +# CHECK: lbur r1, r2, r3 +0xc0 0x22 0x1a 0x00 + +# CHECK: lbui r1, r2, 28 +0xe0 0x22 0x00 0x1c + +# CHECK: lhu r1, r2, r3 +0xc4 0x22 0x18 0x00 + +# CHECK: lhur r1, r2, r3 +0xc4 0x22 0x1a 0x00 + +# CHECK: lhui r1, r2, 28 +0xe4 0x22 0x00 0x1c + +# CHECK: lw r1, r2, r3 +0xc8 0x22 0x18 0x00 + +# CHECK: lwr r1, r2, r3 +0xc8 0x22 0x1a 0x00 + +# CHECK: lwi r1, r2, 28 +0xe8 0x22 0x00 0x1c + +# CHECK: lwx r1, r2, r3 +0xc8 0x22 0x1c 0x00 + +# CHECK: sb r1, r2, r3 +0xd0 0x22 0x18 0x00 + +# CHECK: sbr r1, r2, r3 +0xd0 0x22 0x1a 0x00 + +# CHECK: sbi r1, r2, 28 +0xf0 0x22 0x00 0x1c + +# CHECK: sh r1, r2, r3 +0xd4 0x22 0x18 0x00 + +# CHECK: shr r1, r2, r3 +0xd4 0x22 0x1a 0x00 + +# CHECK: shi r1, r2, 28 +0xf4 0x22 0x00 0x1c + +# CHECK: sw r1, r2, r3 +0xd8 0x22 0x18 0x00 + +# CHECK: swr r1, r2, r3 +0xd8 0x22 0x1a 0x00 + +# CHECK: swi r1, r2, 28 +0xf8 0x22 0x00 0x1c + +# CHECK: swx r1, r2, r3 +0xd8 0x22 0x1c 0x00 Added: llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_operands.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_operands.txt?rev=119580&view=auto ============================================================================== --- llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_operands.txt (added) +++ llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_operands.txt Wed Nov 17 16:54:43 2010 @@ -0,0 +1,197 @@ +# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s + +################################################################################ +# Operands disassembly +################################################################################ + +# CHECK: add r0, r0, r0 +0x00 0x00 0x00 0x00 + +# CHECK: add r1, r1, r1 +0x00 0x21 0x08 0x00 + +# CHECK: add r2, r2, r2 +0x00 0x42 0x10 0x00 + +# CHECK: add r3, r3, r3 +0x00 0x63 0x18 0x00 + +# CHECK: add r4, r4, r4 +0x00 0x84 0x20 0x00 + +# CHECK: add r5, r5, r5 +0x00 0xa5 0x28 0x00 + +# CHECK: add r6, r6, r6 +0x00 0xc6 0x30 0x00 + +# CHECK: add r7, r7, r7 +0x00 0xe7 0x38 0x00 + +# CHECK: add r8, r8, r8 +0x01 0x08 0x40 0x00 + +# CHECK: add r9, r9, r9 +0x01 0x29 0x48 0x00 + +# CHECK: add r10, r10, r10 +0x01 0x4a 0x50 0x00 + +# CHECK: add r11, r11, r11 +0x01 0x6b 0x58 0x00 + +# CHECK: add r12, r12, r12 +0x01 0x8c 0x60 0x00 + +# CHECK: add r13, r13, r13 +0x01 0xad 0x68 0x00 + +# CHECK: add r14, r14, r14 +0x01 0xce 0x70 0x00 + +# CHECK: add r15, r15, r15 +0x01 0xef 0x78 0x00 + +# CHECK: add r16, r16, r16 +0x02 0x10 0x80 0x00 + +# CHECK: add r17, r17, r17 +0x02 0x31 0x88 0x00 + +# CHECK: add r18, r18, r18 +0x02 0x52 0x90 0x00 + +# CHECK: add r19, r19, r19 +0x02 0x73 0x98 0x00 + +# CHECK: add r20, r20, r20 +0x02 0x94 0xa0 0x00 + +# CHECK: add r21, r21, r21 +0x02 0xb5 0xa8 0x00 + +# CHECK: add r22, r22, r22 +0x02 0xd6 0xb0 0x00 + +# CHECK: add r23, r23, r23 +0x02 0xf7 0xb8 0x00 + +# CHECK: add r24, r24, r24 +0x03 0x18 0xc0 0x00 + +# CHECK: add r25, r25, r25 +0x03 0x39 0xc8 0x00 + +# CHECK: add r26, r26, r26 +0x03 0x5a 0xd0 0x00 + +# CHECK: add r27, r27, r27 +0x03 0x7b 0xd8 0x00 + +# CHECK: add r28, r28, r28 +0x03 0x9c 0xe0 0x00 + +# CHECK: add r29, r29, r29 +0x03 0xbd 0xe8 0x00 + +# CHECK: add r30, r30, r30 +0x03 0xde 0xf0 0x00 + +# CHECK: add r31, r31, r31 +0x03 0xff 0xf8 0x00 + +# CHECK: addi r0, r0, 0 +0x20 0x00 0x00 0x00 + +# CHECK: addi r0, r0, 1 +0x20 0x00 0x00 0x01 + +# CHECK: addi r0, r0, 2 +0x20 0x00 0x00 0x02 + +# CHECK: addi r0, r0, 4 +0x20 0x00 0x00 0x04 + +# CHECK: addi r0, r0, 8 +0x20 0x00 0x00 0x08 + +# CHECK: addi r0, r0, 16 +0x20 0x00 0x00 0x10 + +# CHECK: addi r0, r0, 32 +0x20 0x00 0x00 0x20 + +# CHECK: addi r0, r0, 64 +0x20 0x00 0x00 0x40 + +# CHECK: addi r0, r0, 128 +0x20 0x00 0x00 0x80 + +# CHECK: addi r0, r0, 256 +0x20 0x00 0x01 0x00 + +# CHECK: addi r0, r0, 512 +0x20 0x00 0x02 0x00 + +# CHECK: addi r0, r0, 1024 +0x20 0x00 0x04 0x00 + +# CHECK: addi r0, r0, 2048 +0x20 0x00 0x08 0x00 + +# CHECK: addi r0, r0, 4096 +0x20 0x00 0x10 0x00 + +# CHECK: addi r0, r0, 8192 +0x20 0x00 0x20 0x00 + +# CHECK: addi r0, r0, 16384 +0x20 0x00 0x40 0x00 + +# CHECK: addi r0, r0, -1 +0x20 0x00 0xff 0xff + +# CHECK: addi r0, r0, -2 +0x20 0x00 0xff 0xfe + +# CHECK: addi r0, r0, -4 +0x20 0x00 0xff 0xfc + +# CHECK: addi r0, r0, -8 +0x20 0x00 0xff 0xf8 + +# CHECK: addi r0, r0, -16 +0x20 0x00 0xff 0xf0 + +# CHECK: addi r0, r0, -32 +0x20 0x00 0xff 0xe0 + +# CHECK: addi r0, r0, -64 +0x20 0x00 0xff 0xc0 + +# CHECK: addi r0, r0, -128 +0x20 0x00 0xff 0x80 + +# CHECK: addi r0, r0, -256 +0x20 0x00 0xff 0x00 + +# CHECK: addi r0, r0, -512 +0x20 0x00 0xfe 0x00 + +# CHECK: addi r0, r0, -1024 +0x20 0x00 0xfc 0x00 + +# CHECK: addi r0, r0, -2048 +0x20 0x00 0xf8 0x00 + +# CHECK: addi r0, r0, -4096 +0x20 0x00 0xf0 0x00 + +# CHECK: addi r0, r0, -8192 +0x20 0x00 0xe0 0x00 + +# CHECK: addi r0, r0, -16384 +0x20 0x00 0xc0 0x00 + +# CHECK: addi r0, r0, -32768 +0x20 0x00 0x80 0x00 Added: llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_pattern.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_pattern.txt?rev=119580&view=auto ============================================================================== --- llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_pattern.txt (added) +++ llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_pattern.txt Wed Nov 17 16:54:43 2010 @@ -0,0 +1,14 @@ +# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s + +################################################################################ +# Pattern instructions +################################################################################ + +# CHECK: pcmpbf r0, r1, r2 +0x80 0x01 0x14 0x00 + +# CHECK: pcmpne r0, r1, r2 +0x8c 0x01 0x14 0x00 + +# CHECK: pcmpeq r0, r1, r2 +0x88 0x01 0x14 0x00 Added: llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_shift.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_shift.txt?rev=119580&view=auto ============================================================================== --- llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_shift.txt (added) +++ llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_shift.txt Wed Nov 17 16:54:43 2010 @@ -0,0 +1,29 @@ +# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s + +################################################################################ +# Shift instructions +################################################################################ + +# CHECK: bsrl r1, r2, r3 +0x44 0x22 0x18 0x00 + +# CHECK: bsra r1, r2, r3 +0x44 0x22 0x1a 0x00 + +# CHECK: bsll r1, r2, r3 +0x44 0x22 0x1c 0x00 + +# CHECK: bsrli r1, r2, 0 +0x64 0x22 0x00 0x00 + +# CHECK: bsrai r1, r2, 0 +0x64 0x22 0x02 0x00 + +# CHECK: bslli r1, r2, 0 +0x64 0x22 0x04 0x00 + +# CHECK: sra r1, r2 +0x90 0x22 0x00 0x01 + +# CHECK: srl r1, r2 +0x90 0x22 0x00 0x41 Added: llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_special.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_special.txt?rev=119580&view=auto ============================================================================== --- llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_special.txt (added) +++ llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_special.txt Wed Nov 17 16:54:43 2010 @@ -0,0 +1,29 @@ +# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s + +################################################################################ +# Special instructions +################################################################################ + +# CHECK: mfs r0, 0 +0x94 0x00 0x80 0x00 + +# CHECK: msrclr r0, 0 +0x94 0x11 0x00 0x00 + +# CHECK: msrset r0, 0 +0x94 0x10 0x00 0x00 + +# CHECK: mts 0, r0 +0x94 0x00 0xc0 0x00 + +# CHECK: wdc r0, r1 +0x90 0x00 0x08 0x64 + +# CHECK: wdc.clear r0, r1 +0x90 0x00 0x08 0x66 + +# CHECK: wdc.flush r0, r1 +0x90 0x00 0x08 0x74 + +# CHECK: wic r0, r1 +0x90 0x00 0x08 0x68 Added: llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_typea.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_typea.txt?rev=119580&view=auto ============================================================================== --- llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_typea.txt (added) +++ llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_typea.txt Wed Nov 17 16:54:43 2010 @@ -0,0 +1,74 @@ +# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s + +################################################################################ +# TYPE A instructions +################################################################################ + +# CHECK: add r1, r2, r3 +0x00 0x22 0x18 0x00 + +# CHECK: addc r1, r2, r3 +0x08 0x22 0x18 0x00 + +# CHECK: addk r1, r2, r3 +0x10 0x22 0x18 0x00 + +# CHECK: addkc r1, r2, r3 +0x18 0x22 0x18 0x00 + +# CHECK: and r1, r2, r3 +0x84 0x22 0x18 0x00 + +# CHECK: andn r1, r2, r3 +0x8c 0x22 0x18 0x00 + +# CHECK: cmp r1, r2, r3 +0x14 0x22 0x18 0x01 + +# CHECK: cmpu r1, r2, r3 +0x14 0x22 0x18 0x03 + +# CHECK: idiv r1, r2, r3 +0x48 0x22 0x18 0x00 + +# CHECK: idivu r1, r2, r3 +0x48 0x22 0x18 0x02 + +# CHECK: mul r1, r2, r3 +0x40 0x22 0x18 0x00 + +# CHECK: mulh r1, r2, r3 +0x40 0x22 0x18 0x01 + +# CHECK: mulhu r1, r2, r3 +0x40 0x22 0x18 0x03 + +# CHECK: mulhsu r1, r2, r3 +0x40 0x22 0x18 0x02 + +# CHECK: or r1, r2, r3 +0x80 0x22 0x18 0x00 + +# CHECK: rsub r1, r2, r3 +0x04 0x22 0x18 0x00 + +# CHECK: rsubc r1, r2, r3 +0x0c 0x22 0x18 0x00 + +# CHECK: rsubk r1, r2, r3 +0x14 0x22 0x18 0x00 + +# CHECK: rsubkc r1, r2, r3 +0x1c 0x22 0x18 0x00 + +# CHECK: sext16 r1, r2 +0x90 0x22 0x00 0x61 + +# CHECK: sext8 r1, r2 +0x90 0x22 0x00 0x60 + +# CHECK: xor r1, r2, r3 +0x88 0x22 0x18 0x00 + +# CHECK: or r0, r0, r0 +0x80 0x00 0x00 0x00 Added: llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_typeb.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_typeb.txt?rev=119580&view=auto ============================================================================== --- llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_typeb.txt (added) +++ llvm/trunk/test/MC/Disassembler/MBlaze/mblaze_typeb.txt Wed Nov 17 16:54:43 2010 @@ -0,0 +1,56 @@ +# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s + +################################################################################ +# TYPE B instructions +################################################################################ + +# CHECK: addi r1, r2, 15 +0x20 0x22 0x00 0x0f + +# CHECK: addic r1, r2, 15 +0x28 0x22 0x00 0x0f + +# CHECK: addik r1, r2, 15 +0x30 0x22 0x00 0x0f + +# CHECK: addikc r1, r2, 15 +0x38 0x22 0x00 0x0f + +# CHECK: andi r1, r2, 15 +0xa4 0x22 0x00 0x0f + +# CHECK: andni r1, r2, 15 +0xac 0x22 0x00 0x0f + +# CHECK: muli r1, r2, 15 +0x60 0x22 0x00 0x0f + +# CHECK: ori r1, r2, 15 +0xa0 0x22 0x00 0x0f + +# CHECK: rsubi r1, r2, 15 +0x24 0x22 0x00 0x0f + +# CHECK: rsubic r1, r2, 15 +0x2c 0x22 0x00 0x0f + +# CHECK: rsubik r1, r2, 15 +0x34 0x22 0x00 0x0f + +# CHECK: rsubikc r1, r2, 15 +0x3c 0x22 0x00 0x0f + +# CHECK: rtbd r15, 15 +0xb6 0x4f 0x00 0x0f + +# CHECK: rted r15, 15 +0xb6 0x8f 0x00 0x0f + +# CHECK: rtid r15, 15 +0xb6 0x2f 0x00 0x0f + +# CHECK: rtsd r15, 15 +0xb6 0x0f 0x00 0x0f + +# CHECK: xori r1, r2, 15 +0xa8 0x22 0x00 0x0f From rafael.espindola at gmail.com Wed Nov 17 17:04:42 2010 From: rafael.espindola at gmail.com (=?UTF-8?Q?Rafael_Esp=C3=ADndola?=) Date: Wed, 17 Nov 2010 18:04:42 -0500 Subject: [llvm-commits] [patch] Use .loc in codegen In-Reply-To: References: Message-ID: > Note, this patch relies on fresh .loc/.file support by MCStreamer. That is the idea :-) > First, we need gdb testsuite results with and without this patch to ensure correctness of debug info. Can you get numbers for your platform (using clang as the compiler)? > An initial run found problems with files that use "#line". The attached patch fixes that. Results using 7850396a466baacc66a0bea032a62e3292d1f45c from git://sourceware.org/git/gdb.git and llvm/clang 119577. gcc 4.4.3-4ubuntu5: # of expected passes 16500 # of unexpected failures 21 # of expected failures 90 # of untested testcases 9 # of unsupported tests 74 Without this patch: # of expected passes 14155 # of unexpected failures 1125 # of unexpected successes 4 # of expected failures 58 # of untested testcases 50 # of unresolved testcases 8 # of unsupported tests 78 With this patch: # of expected passes 14161 # of unexpected failures 1119 # of unexpected successes 4 # of expected failures 58 # of untested testcases 50 # of unresolved testcases 8 # of unsupported tests 78 Looks like this patch also gives us more passes :-) I have also attached the test summaries. - > Devang Cheers, Rafael -------------- next part -------------- A non-text attachment was scrubbed... Name: loc.patch Type: text/x-diff Size: 23475 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101117/4c864872/attachment-0001.bin -------------- next part -------------- A non-text attachment was scrubbed... Name: gdb.sum-clang-loc.bz2 Type: application/x-bzip2 Size: 90433 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101117/4c864872/attachment-0002.bz2 -------------- next part -------------- A non-text attachment was scrubbed... Name: gdb.sum-clang-no-loc.bz2 Type: application/x-bzip2 Size: 90278 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101117/4c864872/attachment-0003.bz2 From dpatel at apple.com Wed Nov 17 17:18:02 2010 From: dpatel at apple.com (Devang Patel) Date: Wed, 17 Nov 2010 15:18:02 -0800 Subject: [llvm-commits] [patch] Use .loc in codegen In-Reply-To: References: Message-ID: On Nov 17, 2010, at 3:04 PM, Rafael Esp?ndola wrote: >> Note, this patch relies on fresh .loc/.file support by MCStreamer. > > That is the idea :-) > >> First, we need gdb testsuite results with and without this patch to ensure correctness of debug info. Can you get numbers for your platform (using clang as the compiler)? >> > > An initial run found problems with files that use "#line". The > attached patch fixes that. Results using > 7850396a466baacc66a0bea032a62e3292d1f45c from > git://sourceware.org/git/gdb.git and llvm/clang 119577. > > gcc 4.4.3-4ubuntu5: > # of expected passes 16500 > # of unexpected failures 21 > # of expected failures 90 > # of untested testcases 9 > # of unsupported tests 74 > > Without this patch: > > # of expected passes 14155 > # of unexpected failures 1125 > # of unexpected successes 4 > # of expected failures 58 > # of untested testcases 50 > # of unresolved testcases 8 > # of unsupported tests 78 > > With this patch: > > # of expected passes 14161 > # of unexpected failures 1119 > # of unexpected successes 4 > # of expected failures 58 > # of untested testcases 50 > # of unresolved testcases 8 > # of unsupported tests 78 > > Looks like this patch also gives us more passes :-) > > I have also attached the test summaries. Thanks! Go ahead and please apply your patch. Please make sure that we include this change in next LLVM release note. Here we are assuming that all supported platforms' assembler supports .loc/.file, which is ok. - Devang From fvbommel at gmail.com Wed Nov 17 17:19:09 2010 From: fvbommel at gmail.com (Frits van Bommel) Date: Thu, 18 Nov 2010 00:19:09 +0100 Subject: [llvm-commits] [PATCH] Fix NoFolder support Message-ID: The attached patch fixes IRBuilder and the NoFolder class so that when NoFolder is used the instructions it generates are treated just like the ones IRBuilder creates directly (insert into block, assign them a name and debug info, as applicable). It does this by 1) having NoFolder return Instruction*s instead of Value*s, 2) having IRBuilder call Insert(Value, Name) on values obtained from the folder like it does on instructions it creates directly, and 3) adding an Insert(Constant*, const Twine& = "") overload which just returns the constant so that the other folders shouldn't have any extra overhead as long as inlining is enabled. While I was there, I also added some missing (CreateFNeg and various Create*Cast) methods to NoFolder. -------------- next part -------------- A non-text attachment was scrubbed... Name: fix-nofolder-support.patch Type: text/x-patch Size: 37825 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101118/127ea2a8/attachment.bin From gohman at apple.com Wed Nov 17 17:21:44 2010 From: gohman at apple.com (Dan Gohman) Date: Wed, 17 Nov 2010 23:21:44 -0000 Subject: [llvm-commits] [llvm] r119584 - in /llvm/trunk: include/llvm/Analysis/ScalarEvolution.h lib/Analysis/ScalarEvolution.cpp Message-ID: <20101117232145.12F762A6C12C@llvm.org> Author: djg Date: Wed Nov 17 17:21:44 2010 New Revision: 119584 URL: http://llvm.org/viewvc/llvm-project?rev=119584&view=rev Log: Merge the implementations of isLoopInvariant and hasComputableLoopEvolution, and memoize the results. This improves compile time in code which highly complex expressions which get queried many times. Modified: llvm/trunk/include/llvm/Analysis/ScalarEvolution.h llvm/trunk/lib/Analysis/ScalarEvolution.cpp Modified: llvm/trunk/include/llvm/Analysis/ScalarEvolution.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/ScalarEvolution.h?rev=119584&r1=119583&r2=119584&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/ScalarEvolution.h (original) +++ llvm/trunk/include/llvm/Analysis/ScalarEvolution.h Wed Nov 17 17:21:44 2010 @@ -142,6 +142,16 @@ /// they must ask this class for services. /// class ScalarEvolution : public FunctionPass { + public: + /// LoopDisposition - An enum describing the relationship between a + /// SCEV and a loop. + enum LoopDisposition { + LoopVariant, ///< The SCEV is loop-variant (unknown). + LoopInvariant, ///< The SCEV is loop-invariant. + LoopComputable ///< The SCEV varies predictably with the loop. + }; + + private: /// SCEVCallbackVH - A CallbackVH to arrange for ScalarEvolution to be /// notified whenever a Value is deleted. class SCEVCallbackVH : public CallbackVH { @@ -229,6 +239,13 @@ std::map > ValuesAtScopes; + /// LoopDispositions - Memoized computeLoopDisposition results. + std::map > LoopDispositions; + + /// computeLoopDisposition - Compute a LoopDisposition value. + LoopDisposition computeLoopDisposition(const SCEV *S, const Loop *L); + /// UnsignedRanges - Memoized results from getUnsignedRange DenseMap UnsignedRanges; @@ -663,6 +680,10 @@ const SCEV *&LHS, const SCEV *&RHS); + /// getLoopDisposition - Return the "disposition" of the given SCEV with + /// respect to the given loop. + LoopDisposition getLoopDisposition(const SCEV *S, const Loop *L); + /// isLoopInvariant - Return true if the value of the given SCEV is /// unchanging in the specified loop. bool isLoopInvariant(const SCEV *S, const Loop *L); Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=119584&r1=119583&r2=119584&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original) +++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Wed Nov 17 17:21:44 2010 @@ -326,6 +326,7 @@ void SCEVUnknown::deleted() { // Clear this SCEVUnknown from various maps. SE->ValuesAtScopes.erase(this); + SE->LoopDispositions.erase(this); SE->UnsignedRanges.erase(this); SE->SignedRanges.erase(this); @@ -339,6 +340,7 @@ void SCEVUnknown::allUsesReplacedWith(Value *New) { // Clear this SCEVUnknown from various maps. SE->ValuesAtScopes.erase(this); + SE->LoopDispositions.erase(this); SE->UnsignedRanges.erase(this); SE->SignedRanges.erase(this); @@ -2635,6 +2637,7 @@ !isa(Old) || (I != PN && Old == SymName)) { ValuesAtScopes.erase(Old); + LoopDispositions.erase(Old); UnsignedRanges.erase(Old); SignedRanges.erase(Old); ValueExprMap.erase(It); @@ -3675,6 +3678,7 @@ // own when it gets to that point. if (!isa(I) || !isa(Old)) { ValuesAtScopes.erase(Old); + LoopDispositions.erase(Old); UnsignedRanges.erase(Old); SignedRanges.erase(Old); ValueExprMap.erase(It); @@ -3710,6 +3714,7 @@ if (It != ValueExprMap.end()) { const SCEV *Old = It->second; ValuesAtScopes.erase(Old); + LoopDispositions.erase(Old); UnsignedRanges.erase(Old); SignedRanges.erase(Old); ValueExprMap.erase(It); @@ -3746,6 +3751,7 @@ if (It != ValueExprMap.end()) { const SCEV *Old = It->second; ValuesAtScopes.erase(Old); + LoopDispositions.erase(Old); UnsignedRanges.erase(Old); SignedRanges.erase(Old); ValueExprMap.erase(It); @@ -5803,6 +5809,7 @@ BackedgeTakenCounts.clear(); ConstantEvolutionLoopExitValue.clear(); ValuesAtScopes.clear(); + LoopDispositions.clear(); UnsignedRanges.clear(); SignedRanges.clear(); UniqueSCEVs.clear(); @@ -5901,54 +5908,82 @@ PrintLoopInfo(OS, &SE, *I); } -bool ScalarEvolution::isLoopInvariant(const SCEV *S, const Loop *L) { +ScalarEvolution::LoopDisposition +ScalarEvolution::getLoopDisposition(const SCEV *S, const Loop *L) { + std::map &Values = LoopDispositions[S]; + std::pair::iterator, bool> Pair = + Values.insert(std::make_pair(L, LoopVariant)); + if (!Pair.second) + return Pair.first->second; + + LoopDisposition D = computeLoopDisposition(S, L); + return LoopDispositions[S][L] = D; +} + +ScalarEvolution::LoopDisposition +ScalarEvolution::computeLoopDisposition(const SCEV *S, const Loop *L) { switch (S->getSCEVType()) { case scConstant: - return true; + return LoopInvariant; case scTruncate: case scZeroExtend: case scSignExtend: - return isLoopInvariant(cast(S)->getOperand(), L); + return getLoopDisposition(cast(S)->getOperand(), L); case scAddRecExpr: { const SCEVAddRecExpr *AR = cast(S); + // If L is the addrec's loop, it's computable. + if (AR->getLoop() == L) + return LoopComputable; + // Add recurrences are never invariant in the function-body (null loop). if (!L) - return false; + return LoopVariant; // This recurrence is variant w.r.t. L if L contains AR's loop. if (L->contains(AR->getLoop())) - return false; + return LoopVariant; // This recurrence is invariant w.r.t. L if AR's loop contains L. if (AR->getLoop()->contains(L)) - return true; + return LoopInvariant; // This recurrence is variant w.r.t. L if any of its operands // are variant. for (SCEVAddRecExpr::op_iterator I = AR->op_begin(), E = AR->op_end(); I != E; ++I) if (!isLoopInvariant(*I, L)) - return false; + return LoopVariant; // Otherwise it's loop-invariant. - return true; + return LoopInvariant; } case scAddExpr: case scMulExpr: case scUMaxExpr: case scSMaxExpr: { const SCEVNAryExpr *NAry = cast(S); + bool HasVarying = false; for (SCEVNAryExpr::op_iterator I = NAry->op_begin(), E = NAry->op_end(); - I != E; ++I) - if (!isLoopInvariant(*I, L)) - return false; - return true; + I != E; ++I) { + LoopDisposition D = getLoopDisposition(*I, L); + if (D == LoopVariant) + return LoopVariant; + if (D == LoopComputable) + HasVarying = true; + } + return HasVarying ? LoopComputable : LoopInvariant; } case scUDivExpr: { const SCEVUDivExpr *UDiv = cast(S); - return isLoopInvariant(UDiv->getLHS(), L) && - isLoopInvariant(UDiv->getRHS(), L); + LoopDisposition LD = getLoopDisposition(UDiv->getLHS(), L); + if (LD == LoopVariant) + return LoopVariant; + LoopDisposition RD = getLoopDisposition(UDiv->getRHS(), L); + if (RD == LoopVariant) + return LoopVariant; + return (LD == LoopInvariant && RD == LoopInvariant) ? + LoopInvariant : LoopComputable; } case scUnknown: // All non-instruction values are loop invariant. All instructions are loop @@ -5956,71 +5991,23 @@ // Instructions are never considered invariant in the function body // (null loop) because they are defined within the "loop". if (Instruction *I = dyn_cast(cast(S)->getValue())) - return L && !L->contains(I); - return true; + return (L && !L->contains(I)) ? LoopInvariant : LoopVariant; + return LoopInvariant; case scCouldNotCompute: llvm_unreachable("Attempt to use a SCEVCouldNotCompute object!"); - return false; + return LoopVariant; default: break; } llvm_unreachable("Unknown SCEV kind!"); - return false; + return LoopVariant; +} + +bool ScalarEvolution::isLoopInvariant(const SCEV *S, const Loop *L) { + return getLoopDisposition(S, L) == LoopInvariant; } bool ScalarEvolution::hasComputableLoopEvolution(const SCEV *S, const Loop *L) { - switch (S->getSCEVType()) { - case scConstant: - return false; - case scTruncate: - case scZeroExtend: - case scSignExtend: - return hasComputableLoopEvolution(cast(S)->getOperand(), L); - case scAddRecExpr: - return cast(S)->getLoop() == L; - case scAddExpr: - case scMulExpr: - case scUMaxExpr: - case scSMaxExpr: { - const SCEVNAryExpr *NAry = cast(S); - bool HasVarying = false; - for (SCEVNAryExpr::op_iterator I = NAry->op_begin(), E = NAry->op_end(); - I != E; ++I) { - const SCEV *Op = *I; - if (!isLoopInvariant(Op, L)) { - if (hasComputableLoopEvolution(Op, L)) - HasVarying = true; - else - return false; - } - } - return HasVarying; - } - case scUDivExpr: { - const SCEVUDivExpr *UDiv = cast(S); - bool HasVarying = false; - if (!isLoopInvariant(UDiv->getLHS(), L)) { - if (hasComputableLoopEvolution(UDiv->getLHS(), L)) - HasVarying = true; - else - return false; - } - if (!isLoopInvariant(UDiv->getRHS(), L)) { - if (hasComputableLoopEvolution(UDiv->getRHS(), L)) - HasVarying = true; - else - return false; - } - return HasVarying; - } - case scUnknown: - return false; - case scCouldNotCompute: - llvm_unreachable("Attempt to use a SCEVCouldNotCompute object!"); - return false; - default: break; - } - llvm_unreachable("Unknown SCEV kind!"); - return false; + return getLoopDisposition(S, L) == LoopComputable; } bool ScalarEvolution::dominates(const SCEV *S, BasicBlock *BB) const { From ofv at wanadoo.es Wed Nov 17 17:27:12 2010 From: ofv at wanadoo.es (=?utf-8?Q?=C3=93scar_Fuentes?=) Date: Thu, 18 Nov 2010 00:27:12 +0100 Subject: [llvm-commits] [llvm] r119355 - /llvm/trunk/cmake/modules/LLVMLibDeps.cmake References: <20101116181441.9EF092A6C12C@llvm.org> <8D66597B-71DC-40AB-88F4-94893E3D885F@wesleypeck.com> Message-ID: <878w0rv8dr.fsf@telefonica.net> Wesley Peck writes: > Is LLVMLibDeps.cmake something that should not be checked in when > changed? In theory, yes. > I've noticed that it almost always gets changed when I build > LLVM but I have been unsure if I should commit this file when it > changes. There is some problem with GenLibDeps.pl reporting different dependencies on consecutive builds. It usually affects the asmprinters and asmparsers. Furthermore, sometimes the build fails with error reports about missing vtables. I don't have a clear idea about its origin. It is *really* annoying. For now on, unless the diff of LLVMLibDeps.cmake shows a dependency change related to the code you edited, don't bother committing LLVMLibDeps.cmake. From tonic at nondot.org Wed Nov 17 17:25:51 2010 From: tonic at nondot.org (Tanya Lattner) Date: Wed, 17 Nov 2010 23:25:51 -0000 Subject: [llvm-commits] [www] r119586 - /www/trunk/devmtg/2010-11/index.html Message-ID: <20101117232551.4F1082A6C12C@llvm.org> Author: tbrethou Date: Wed Nov 17 17:25:51 2010 New Revision: 119586 URL: http://llvm.org/viewvc/llvm-project?rev=119586&view=rev Log: Add note in case anyone is wondering. Modified: www/trunk/devmtg/2010-11/index.html Modified: www/trunk/devmtg/2010-11/index.html URL: http://llvm.org/viewvc/llvm-project/www/trunk/devmtg/2010-11/index.html?rev=119586&r1=119585&r2=119586&view=diff ============================================================================== --- www/trunk/devmtg/2010-11/index.html (original) +++ www/trunk/devmtg/2010-11/index.html Wed Nov 17 17:25:51 2010 @@ -33,10 +33,11 @@
      6. Those interested in using compiler and toolchain technology in novel and interesting ways.
        7. - +

        We also invite you to sign up for the official Developer Meeting mailing list to be kept informed of updates concerning the meeting: - +

        Agenda
        +

        More slides/videos coming.

        From john.thompson.jtsoftware at gmail.com Wed Nov 17 17:29:18 2010 From: john.thompson.jtsoftware at gmail.com (John Thompson) Date: Wed, 17 Nov 2010 15:29:18 -0800 Subject: [llvm-commits] [PATCH] - Bug 8621 - inline asm - please review Message-ID: >From my comment to the bug: It looks like a problem with the back end. I reduced the test case to: void func() { unsigned int src = 0, dst = 0; static const unsigned long flagmask = 1; unsigned long flags = 1; unsigned long newflags = ~(0UL); asm ( "pushfq \n" "andq %2, (%%rsp) \n" "orq %3, (%%rsp) \n" "popfq \n" "addb %4, %1 \n" "pushfq \n" "popq %0 \n" : "=&rm" (newflags) , "=&rm" (*(unsigned char *)&dst) : "i" (~flagmask) , "r" (flags & flagmask) , "r" (*(unsigned char *)&src) , "1" (*(unsigned char *)&dst) : "cc"); } The constraints involved in the problem are index 1 and 5, which we see do match types in the above code. This change seems to fix it: Index: lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp =================================================================== --- lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (revision 119175) +++ lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (working copy) @@ -5545,9 +5545,6 @@ // If this is an input or an indirect output, process the call argument. // BasicBlocks are labels, currently appearing only in asm's. if (OpInfo.CallOperandVal) { - // Strip bitcasts, if any. This mostly comes up for functions. - OpInfo.CallOperandVal = OpInfo.CallOperandVal->stripPointerCasts(); - if (const BasicBlock *BB = dyn_cast(OpInfo.CallOperandVal)) { OpInfo.CallOperand = DAG.getBasicBlock(FuncInfo.MBBMap[BB]); } else { The removed code apparently was stripping the pointer cast. I don't know the original reason for it. I ran the LLVM regression tests, test suite, and gcc tests, with no differences. Does this seem like the correct fix? If so, let me know and I'll check this in. Or was there a reason for the cast stripping? It doesn't appear to be related to my inline asm work. -John -- John Thompson John.Thompson.JTSoftware at gmail.com -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101117/fb2a3763/attachment.html From gohman at apple.com Wed Nov 17 17:28:49 2010 From: gohman at apple.com (Dan Gohman) Date: Wed, 17 Nov 2010 23:28:49 -0000 Subject: [llvm-commits] [llvm] r119587 - in /llvm/trunk: include/llvm/Analysis/ScalarEvolution.h lib/Analysis/ScalarEvolution.cpp Message-ID: <20101117232849.2AC452A6C12C@llvm.org> Author: djg Date: Wed Nov 17 17:28:48 2010 New Revision: 119587 URL: http://llvm.org/viewvc/llvm-project?rev=119587&view=rev Log: Factor out the code for purging a SCEV from all the various memoization maps. Some of these maps may merge in the future, but for now it's convenient to have a utility function for them. Modified: llvm/trunk/include/llvm/Analysis/ScalarEvolution.h llvm/trunk/lib/Analysis/ScalarEvolution.cpp Modified: llvm/trunk/include/llvm/Analysis/ScalarEvolution.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/ScalarEvolution.h?rev=119587&r1=119586&r2=119587&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/ScalarEvolution.h (original) +++ llvm/trunk/include/llvm/Analysis/ScalarEvolution.h Wed Nov 17 17:28:48 2010 @@ -413,6 +413,9 @@ bool isKnownPredicateWithRanges(ICmpInst::Predicate Pred, const SCEV *LHS, const SCEV *RHS); + /// forgetMemoizedResults - Drop memoized information computed for S. + void forgetMemoizedResults(const SCEV *S); + public: static char ID; // Pass identification, replacement for typeid ScalarEvolution(); Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=119587&r1=119586&r2=119587&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original) +++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Wed Nov 17 17:28:48 2010 @@ -325,10 +325,7 @@ void SCEVUnknown::deleted() { // Clear this SCEVUnknown from various maps. - SE->ValuesAtScopes.erase(this); - SE->LoopDispositions.erase(this); - SE->UnsignedRanges.erase(this); - SE->SignedRanges.erase(this); + SE->forgetMemoizedResults(this); // Remove this SCEVUnknown from the uniquing map. SE->UniqueSCEVs.RemoveNode(this); @@ -339,10 +336,7 @@ void SCEVUnknown::allUsesReplacedWith(Value *New) { // Clear this SCEVUnknown from various maps. - SE->ValuesAtScopes.erase(this); - SE->LoopDispositions.erase(this); - SE->UnsignedRanges.erase(this); - SE->SignedRanges.erase(this); + SE->forgetMemoizedResults(this); // Remove this SCEVUnknown from the uniquing map. SE->UniqueSCEVs.RemoveNode(this); @@ -2636,10 +2630,7 @@ if (!isa(I) || !isa(Old) || (I != PN && Old == SymName)) { - ValuesAtScopes.erase(Old); - LoopDispositions.erase(Old); - UnsignedRanges.erase(Old); - SignedRanges.erase(Old); + forgetMemoizedResults(Old); ValueExprMap.erase(It); } } @@ -3677,10 +3668,7 @@ // case, createNodeForPHI will perform the necessary updates on its // own when it gets to that point. if (!isa(I) || !isa(Old)) { - ValuesAtScopes.erase(Old); - LoopDispositions.erase(Old); - UnsignedRanges.erase(Old); - SignedRanges.erase(Old); + forgetMemoizedResults(Old); ValueExprMap.erase(It); } if (PHINode *PN = dyn_cast(I)) @@ -3712,11 +3700,7 @@ ValueExprMapType::iterator It = ValueExprMap.find(static_cast(I)); if (It != ValueExprMap.end()) { - const SCEV *Old = It->second; - ValuesAtScopes.erase(Old); - LoopDispositions.erase(Old); - UnsignedRanges.erase(Old); - SignedRanges.erase(Old); + forgetMemoizedResults(It->second); ValueExprMap.erase(It); if (PHINode *PN = dyn_cast(I)) ConstantEvolutionLoopExitValue.erase(PN); @@ -3749,11 +3733,7 @@ ValueExprMapType::iterator It = ValueExprMap.find(static_cast(I)); if (It != ValueExprMap.end()) { - const SCEV *Old = It->second; - ValuesAtScopes.erase(Old); - LoopDispositions.erase(Old); - UnsignedRanges.erase(Old); - SignedRanges.erase(Old); + forgetMemoizedResults(It->second); ValueExprMap.erase(It); if (PHINode *PN = dyn_cast(I)) ConstantEvolutionLoopExitValue.erase(PN); @@ -6141,3 +6121,10 @@ llvm_unreachable("Unknown SCEV kind!"); return false; } + +void ScalarEvolution::forgetMemoizedResults(const SCEV *S) { + ValuesAtScopes.erase(S); + LoopDispositions.erase(S); + UnsignedRanges.erase(S); + SignedRanges.erase(S); +} From john.thompson.jtsoftware at gmail.com Wed Nov 17 17:31:14 2010 From: john.thompson.jtsoftware at gmail.com (John Thompson) Date: Wed, 17 Nov 2010 15:31:14 -0800 Subject: [llvm-commits] [PATCH] - Bug 8621 - inline asm - please review In-Reply-To: References: Message-ID: Chris, you are too quick! Thanks. (Or the response in the bug report.) -John On Wed, Nov 17, 2010 at 3:29 PM, John Thompson < john.thompson.jtsoftware at gmail.com> wrote: > From my comment to the bug: > > It looks like a problem with the back end. > > I reduced the test case to: > > void func() > { > unsigned int src = 0, dst = 0; > static const unsigned long flagmask = 1; > unsigned long flags = 1; > unsigned long newflags = ~(0UL); > asm ( > "pushfq \n" > "andq %2, (%%rsp) \n" > "orq %3, (%%rsp) \n" > "popfq \n" > "addb %4, %1 \n" > "pushfq \n" > "popq %0 \n" > : > "=&rm" (newflags) , > "=&rm" (*(unsigned char *)&dst) > : > "i" (~flagmask) , > "r" (flags & flagmask) , > "r" (*(unsigned char *)&src) , > "1" (*(unsigned char *)&dst) > : "cc"); > } > > The constraints involved in the problem are index 1 and 5, which we see do > match types in the above code. > > This change seems to fix it: > > Index: lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp > =================================================================== > --- lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (revision 119175) > +++ lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (working copy) > @@ -5545,9 +5545,6 @@ > // If this is an input or an indirect output, process the call > argument. > // BasicBlocks are labels, currently appearing only in asm's. > if (OpInfo.CallOperandVal) { > - // Strip bitcasts, if any. This mostly comes up for functions. > - OpInfo.CallOperandVal = OpInfo.CallOperandVal->stripPointerCasts(); > - > if (const BasicBlock *BB = > dyn_cast(OpInfo.CallOperandVal)) { > OpInfo.CallOperand = DAG.getBasicBlock(FuncInfo.MBBMap[BB]); > } else { > > The removed code apparently was stripping the pointer cast. I don't know > the original reason for it. > > I ran the LLVM regression tests, test suite, and gcc tests, with no > differences. Does this seem like the correct fix? If so, let me know and > I'll check this in. Or was there a reason for the cast stripping? > > It doesn't appear to be related to my inline asm work. > > -John > > > -- > John Thompson > John.Thompson.JTSoftware at gmail.com > > -- John Thompson John.Thompson.JTSoftware at gmail.com -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101117/71fe4517/attachment.html From grosbach at apple.com Wed Nov 17 17:33:14 2010 From: grosbach at apple.com (Jim Grosbach) Date: Wed, 17 Nov 2010 23:33:14 -0000 Subject: [llvm-commits] [llvm] r119588 - in /llvm/trunk/lib/Target/ARM: ARMCodeEmitter.cpp ARMInstrInfo.td Message-ID: <20101117233314.E923E2A6C12C@llvm.org> Author: grosbach Date: Wed Nov 17 17:33:14 2010 New Revision: 119588 URL: http://llvm.org/viewvc/llvm-project?rev=119588&view=rev Log: Clean up LEApcrel instuction(s) a bit. It's not really a Pseudo, so don't mark it as such. Add some encoding information. Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp?rev=119588&r1=119587&r2=119588&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Wed Nov 17 17:33:14 2010 @@ -455,6 +455,14 @@ llvm_unreachable("Unhandled instruction encoding format!"); break; } + case ARMII::MiscFrm: + if (MI.getOpcode() == ARM::LEApcrelJT) { + // Materialize jumptable address. + emitLEApcrelJTInstruction(MI); + break; + } + llvm_unreachable("Unhandled instruction encoding!"); + break; case ARMII::Pseudo: emitPseudoInstruction(MI); break; Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=119588&r1=119587&r2=119588&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Wed Nov 17 17:33:14 2010 @@ -1168,21 +1168,27 @@ // LEApcrel - Load a pc-relative address into a register without offending the // assembler. -// FIXME: These are marked as pseudos, but they're really not(?). They're just -// the ADR instruction. Is this the right way to handle that? They need -// encoding information regardless. let neverHasSideEffects = 1 in { let isReMaterializable = 1 in -def LEApcrel : AXI1<0x0, (outs GPR:$dst), (ins i32imm:$label, pred:$p), - Pseudo, IIC_iALUi, - "adr$p\t$dst, #$label", []>; +// FIXME: We want one cannonical LEApcrel instruction and to express one or +// both of these as pseudo-instructions that get expanded to it. +def LEApcrel : AXI1<0, (outs GPR:$Rd), (ins i32imm:$label, pred:$p), + MiscFrm, IIC_iALUi, + "adr$p\t$Rd, #$label", []>; } // neverHasSideEffects -def LEApcrelJT : AXI1<0x0, (outs GPR:$dst), +def LEApcrelJT : AXI1<0b0100, (outs GPR:$Rd), (ins i32imm:$label, nohash_imm:$id, pred:$p), - Pseudo, IIC_iALUi, - "adr$p\t$dst, #${label}_${id}", []> { - let Inst{25} = 1; + MiscFrm, IIC_iALUi, + "adr$p\t$Rd, #${label}_${id}", []> { + bits<4> p; + bits<4> Rd; + let Inst{31-28} = p; + let Inst{27-25} = 0b001; + let Inst{20} = 0; + let Inst{19-16} = 0b1111; + let Inst{15-12} = Rd; + // FIXME: Add label encoding/fixup } //===----------------------------------------------------------------------===// From peckw at wesleypeck.com Wed Nov 17 17:35:07 2010 From: peckw at wesleypeck.com (Wesley Peck) Date: Wed, 17 Nov 2010 23:35:07 -0000 Subject: [llvm-commits] [llvm] r119589 - in /llvm/trunk: CMakeLists.txt tools/lli/CMakeLists.txt Message-ID: <20101117233507.A98B32A6C12C@llvm.org> Author: peckw Date: Wed Nov 17 17:35:07 2010 New Revision: 119589 URL: http://llvm.org/viewvc/llvm-project?rev=119589&view=rev Log: Make MCJIT work with CMake. Modified: llvm/trunk/CMakeLists.txt llvm/trunk/tools/lli/CMakeLists.txt Modified: llvm/trunk/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/CMakeLists.txt?rev=119589&r1=119588&r2=119589&view=diff ============================================================================== --- llvm/trunk/CMakeLists.txt (original) +++ llvm/trunk/CMakeLists.txt Wed Nov 17 17:35:07 2010 @@ -372,6 +372,7 @@ add_subdirectory(lib/ExecutionEngine) add_subdirectory(lib/ExecutionEngine/Interpreter) add_subdirectory(lib/ExecutionEngine/JIT) +add_subdirectory(lib/ExecutionEngine/MCJIT) add_subdirectory(lib/Target) add_subdirectory(lib/AsmParser) add_subdirectory(lib/Archive) Modified: llvm/trunk/tools/lli/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lli/CMakeLists.txt?rev=119589&r1=119588&r2=119589&view=diff ============================================================================== --- llvm/trunk/tools/lli/CMakeLists.txt (original) +++ llvm/trunk/tools/lli/CMakeLists.txt Wed Nov 17 17:35:07 2010 @@ -1,4 +1,4 @@ -set(LLVM_LINK_COMPONENTS jit interpreter nativecodegen bitreader asmparser selectiondag) +set(LLVM_LINK_COMPONENTS mcjit jit interpreter nativecodegen bitreader asmparser selectiondag) add_llvm_tool(lli lli.cpp From John.Thompson.JTSoftware at gmail.com Wed Nov 17 17:58:47 2010 From: John.Thompson.JTSoftware at gmail.com (John Thompson) Date: Wed, 17 Nov 2010 23:58:47 -0000 Subject: [llvm-commits] [llvm] r119590 - in /llvm/trunk: lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp test/CodeGen/X86/inline-asm-ptr-cast.ll Message-ID: <20101117235847.3BA032A6C12C@llvm.org> Author: jtsoftware Date: Wed Nov 17 17:58:47 2010 New Revision: 119590 URL: http://llvm.org/viewvc/llvm-project?rev=119590&view=rev Log: Bug 8621 fix - pointer cast stripped from inline asm constraint argument. Added: llvm/trunk/test/CodeGen/X86/inline-asm-ptr-cast.ll Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=119590&r1=119589&r2=119590&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Wed Nov 17 17:58:47 2010 @@ -5545,9 +5545,6 @@ // If this is an input or an indirect output, process the call argument. // BasicBlocks are labels, currently appearing only in asm's. if (OpInfo.CallOperandVal) { - // Strip bitcasts, if any. This mostly comes up for functions. - OpInfo.CallOperandVal = OpInfo.CallOperandVal->stripPointerCasts(); - if (const BasicBlock *BB = dyn_cast(OpInfo.CallOperandVal)) { OpInfo.CallOperand = DAG.getBasicBlock(FuncInfo.MBBMap[BB]); } else { Added: llvm/trunk/test/CodeGen/X86/inline-asm-ptr-cast.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-ptr-cast.ll?rev=119590&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/inline-asm-ptr-cast.ll (added) +++ llvm/trunk/test/CodeGen/X86/inline-asm-ptr-cast.ll Wed Nov 17 17:58:47 2010 @@ -0,0 +1,27 @@ +; RUN: llc -mtriple=x86_64-unknown-linux-gnu %s +; ModuleID = 'bug.c' +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-unknown-linux-gnu" + + at func.flagmask = internal constant i64 1, align 8 + +define void @func() nounwind { +entry: + %src = alloca i32, align 4 + %dst = alloca i32, align 4 + %flags = alloca i64, align 8 + %newflags = alloca i64, align 8 + store i32 0, i32* %src, align 4 + store i32 0, i32* %dst, align 4 + store i64 1, i64* %flags, align 8 + store i64 -1, i64* %newflags, align 8 + %0 = bitcast i32* %dst to i8* + %tmp = load i64* %flags, align 8 + %and = and i64 %tmp, 1 + %1 = bitcast i32* %src to i8* + %tmp1 = load i8* %1 + %2 = bitcast i32* %dst to i8* + %tmp2 = load i8* %2 + call void asm "pushfq \0Aandq $2, (%rsp) \0Aorq $3, (%rsp) \0Apopfq \0Aaddb $4, $1 \0Apushfq \0Apopq $0 \0A", "=*&rm,=*&rm,i,r,r,1,~{cc},~{dirflag},~{fpsr},~{flags}"(i64* %newflags, i8* %0, i64 -2, i64 %and, i8 %tmp1, i8 %tmp2) nounwind + ret void +} From ofv at wanadoo.es Wed Nov 17 18:12:27 2010 From: ofv at wanadoo.es (Oscar Fuentes) Date: Thu, 18 Nov 2010 00:12:27 -0000 Subject: [llvm-commits] [llvm] r119592 - /llvm/trunk/cmake/modules/LLVMLibDeps.cmake Message-ID: <20101118001227.CB7462A6C12C@llvm.org> Author: ofv Date: Wed Nov 17 18:12:27 2010 New Revision: 119592 URL: http://llvm.org/viewvc/llvm-project?rev=119592&view=rev Log: Updated library dependencies. Modified: llvm/trunk/cmake/modules/LLVMLibDeps.cmake Modified: llvm/trunk/cmake/modules/LLVMLibDeps.cmake URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/cmake/modules/LLVMLibDeps.cmake?rev=119592&r1=119591&r2=119592&view=diff ============================================================================== --- llvm/trunk/cmake/modules/LLVMLibDeps.cmake (original) +++ llvm/trunk/cmake/modules/LLVMLibDeps.cmake Wed Nov 17 18:12:27 2010 @@ -1,9 +1,8 @@ -set(MSVC_LIB_DEPS_LLVMARMAsmParser LLVMARMInfo LLVMMC LLVMMCParser LLVMSupport LLVMTarget) +set(MSVC_LIB_DEPS_LLVMARMAsmParser LLVMARMCodeGen LLVMARMInfo LLVMMC LLVMMCParser LLVMSupport LLVMTarget) set(MSVC_LIB_DEPS_LLVMARMAsmPrinter LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMARMCodeGen LLVMARMAsmPrinter LLVMARMInfo LLVMAnalysis LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) set(MSVC_LIB_DEPS_LLVMARMDisassembler LLVMARMCodeGen LLVMARMInfo LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMARMInfo LLVMMC LLVMSupport) -set(MSVC_LIB_DEPS_LLVMAlphaAsmPrinter LLVMAlphaInfo LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMTarget) set(MSVC_LIB_DEPS_LLVMAlphaCodeGen LLVMAlphaInfo LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) set(MSVC_LIB_DEPS_LLVMAlphaInfo LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMAnalysis LLVMCore LLVMSupport LLVMSystem LLVMTarget) @@ -12,12 +11,10 @@ set(MSVC_LIB_DEPS_LLVMAsmPrinter LLVMAnalysis LLVMCodeGen LLVMCore LLVMMC LLVMMCParser LLVMSupport LLVMSystem LLVMTarget) set(MSVC_LIB_DEPS_LLVMBitReader LLVMCore LLVMSupport) set(MSVC_LIB_DEPS_LLVMBitWriter LLVMCore LLVMSupport) -set(MSVC_LIB_DEPS_LLVMBlackfinAsmPrinter LLVMAsmPrinter LLVMBlackfinInfo LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMTarget) set(MSVC_LIB_DEPS_LLVMBlackfinCodeGen LLVMAsmPrinter LLVMBlackfinInfo LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMTarget) set(MSVC_LIB_DEPS_LLVMBlackfinInfo LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMCBackend LLVMAnalysis LLVMCBackendInfo LLVMCodeGen LLVMCore LLVMMC LLVMScalarOpts LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils LLVMipa) set(MSVC_LIB_DEPS_LLVMCBackendInfo LLVMMC LLVMSupport) -set(MSVC_LIB_DEPS_LLVMCellSPUAsmPrinter LLVMAsmPrinter LLVMCellSPUInfo LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMTarget) set(MSVC_LIB_DEPS_LLVMCellSPUCodeGen LLVMAsmPrinter LLVMCellSPUInfo LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMTarget) set(MSVC_LIB_DEPS_LLVMCellSPUInfo LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMCodeGen LLVMAnalysis LLVMCore LLVMMC LLVMScalarOpts LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils) @@ -37,14 +34,14 @@ set(MSVC_LIB_DEPS_LLVMMBlazeInfo LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMMC LLVMSupport LLVMSystem) set(MSVC_LIB_DEPS_LLVMMCDisassembler LLVMARMAsmParser LLVMARMCodeGen LLVMARMDisassembler LLVMARMInfo LLVMAlphaCodeGen LLVMAlphaInfo LLVMBlackfinCodeGen LLVMBlackfinInfo LLVMCBackend LLVMCBackendInfo LLVMCellSPUCodeGen LLVMCellSPUInfo LLVMCppBackend LLVMCppBackendInfo LLVMMBlazeAsmParser LLVMMBlazeCodeGen LLVMMBlazeDisassembler LLVMMBlazeInfo LLVMMC LLVMMCParser LLVMMSP430CodeGen LLVMMSP430Info LLVMMipsCodeGen LLVMMipsInfo LLVMPTXCodeGen LLVMPTXInfo LLVMPowerPCCodeGen LLVMPowerPCInfo LLVMSparcCodeGen LLVMSparcInfo LLVMSupport LLVMSystem LLVMSystemZCodeGen LLVMSystemZInfo LLVMX86AsmParser LLVMX86CodeGen LLVMX86Disassembler LLVMX86Info LLVMXCoreCodeGen LLVMXCoreInfo) +set(MSVC_LIB_DEPS_LLVMMCJIT LLVMExecutionEngine LLVMSupport LLVMSystem LLVMTarget) set(MSVC_LIB_DEPS_LLVMMCParser LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMMSP430AsmPrinter LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMMSP430CodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMMSP430AsmPrinter LLVMMSP430Info LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) set(MSVC_LIB_DEPS_LLVMMSP430Info LLVMMC LLVMSupport) -set(MSVC_LIB_DEPS_LLVMMipsAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMMipsCodeGen LLVMMipsInfo LLVMSupport LLVMTarget) set(MSVC_LIB_DEPS_LLVMMipsCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMMipsInfo LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) set(MSVC_LIB_DEPS_LLVMMipsInfo LLVMMC LLVMSupport) -set(MSVC_LIB_DEPS_LLVMPTXAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMPTXInfo LLVMSupport) +set(MSVC_LIB_DEPS_LLVMObject LLVMSupport LLVMSystem) set(MSVC_LIB_DEPS_LLVMPTXCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMPTXInfo LLVMSelectionDAG LLVMSupport LLVMTarget) set(MSVC_LIB_DEPS_LLVMPTXInfo LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMPowerPCAsmPrinter LLVMMC LLVMSupport) @@ -52,12 +49,10 @@ set(MSVC_LIB_DEPS_LLVMPowerPCInfo LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMScalarOpts LLVMAnalysis LLVMCore LLVMInstCombine LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils) set(MSVC_LIB_DEPS_LLVMSelectionDAG LLVMAnalysis LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMTarget) -set(MSVC_LIB_DEPS_LLVMSparcAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSparcInfo LLVMSupport LLVMTarget) set(MSVC_LIB_DEPS_LLVMSparcCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSparcInfo LLVMSupport LLVMSystem LLVMTarget) set(MSVC_LIB_DEPS_LLVMSparcInfo LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMSupport LLVMSystem) set(MSVC_LIB_DEPS_LLVMSystem ) -set(MSVC_LIB_DEPS_LLVMSystemZAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystemZInfo LLVMTarget) set(MSVC_LIB_DEPS_LLVMSystemZCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystemZInfo LLVMTarget) set(MSVC_LIB_DEPS_LLVMSystemZInfo LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMTarget LLVMCore LLVMMC LLVMSupport LLVMSystem) @@ -67,7 +62,6 @@ set(MSVC_LIB_DEPS_LLVMX86CodeGen LLVMAnalysis LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget LLVMX86AsmPrinter LLVMX86Info) set(MSVC_LIB_DEPS_LLVMX86Disassembler LLVMMC LLVMSupport LLVMX86Info) set(MSVC_LIB_DEPS_LLVMX86Info LLVMMC LLVMSupport) -set(MSVC_LIB_DEPS_LLVMXCoreAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMTarget LLVMXCoreInfo) set(MSVC_LIB_DEPS_LLVMXCoreCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMTarget LLVMXCoreInfo) set(MSVC_LIB_DEPS_LLVMXCoreInfo LLVMMC LLVMSupport) set(MSVC_LIB_DEPS_LLVMipa LLVMAnalysis LLVMCore LLVMSupport LLVMSystem) From resistor at mac.com Wed Nov 17 18:19:10 2010 From: resistor at mac.com (Owen Anderson) Date: Thu, 18 Nov 2010 00:19:10 -0000 Subject: [llvm-commits] [llvm] r119593 - in /llvm/trunk: lib/Target/ARM/ARMInstrThumb2.td test/MC/ARM/thumb2.s Message-ID: <20101118001910.519582A6C12C@llvm.org> Author: resistor Date: Wed Nov 17 18:19:10 2010 New Revision: 119593 URL: http://llvm.org/viewvc/llvm-project?rev=119593&view=rev Log: Provide correct Thumb2 encodings for basic multiplication operators. Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td llvm/trunk/test/MC/ARM/thumb2.s Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=119593&r1=119592&r2=119593&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Wed Nov 17 18:19:10 2010 @@ -384,6 +384,21 @@ let Inst{7-6} = ShiftedRm{8-7}; } +class T2FourReg pattern> + : T2sI { + bits<4> Rd; + bits<4> Rn; + bits<4> Rm; + bits<4> Ra; + + let Inst{11-8} = Rd{3-0}; + let Inst{19-16} = Rn{3-0}; + let Inst{3-0} = Rm{3-0}; + let Inst{15-12} = Ra{3-0}; +} + + /// T2I_un_irs - Defines a set of (op reg, {so_imm|r|so_reg}) patterns for a /// unary operation that produces a value. These are predicable and can be /// changed to modify CPSR. @@ -2087,9 +2102,9 @@ // Multiply Instructions. // let isCommutable = 1 in -def t2MUL: T2I<(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b), IIC_iMUL32, - "mul", "\t$dst, $a, $b", - [(set rGPR:$dst, (mul rGPR:$a, rGPR:$b))]> { +def t2MUL: T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL32, + "mul", "\t$Rd, $Rn, $Rm", + [(set rGPR:$Rd, (mul rGPR:$Rn, rGPR:$Rm))]> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0110; let Inst{22-20} = 0b000; @@ -2097,41 +2112,43 @@ let Inst{7-4} = 0b0000; // Multiply } -def t2MLA: T2I<(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b, rGPR:$c), IIC_iMAC32, - "mla", "\t$dst, $a, $b, $c", - [(set rGPR:$dst, (add (mul rGPR:$a, rGPR:$b), rGPR:$c))]> { +def t2MLA: T2FourReg< + (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32, + "mla", "\t$Rd, $Rn, $Rm, $Ra", + [(set rGPR:$Rd, (add (mul rGPR:$Rn, rGPR:$Rm), rGPR:$Ra))]> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0110; let Inst{22-20} = 0b000; - let Inst{15-12} = {?, ?, ?, ?}; // Ra let Inst{7-4} = 0b0000; // Multiply } -def t2MLS: T2I<(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b, rGPR:$c), IIC_iMAC32, - "mls", "\t$dst, $a, $b, $c", - [(set rGPR:$dst, (sub rGPR:$c, (mul rGPR:$a, rGPR:$b)))]> { +def t2MLS: T2FourReg< + (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32, + "mls", "\t$Rd, $Rn, $Rm, $Ra", + [(set rGPR:$Rd, (sub rGPR:$Ra, (mul rGPR:$Rn, rGPR:$Rm)))]> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0110; let Inst{22-20} = 0b000; - let Inst{15-12} = {?, ?, ?, ?}; // Ra let Inst{7-4} = 0b0001; // Multiply and Subtract } // Extra precision multiplies with low / high results let neverHasSideEffects = 1 in { let isCommutable = 1 in { -def t2SMULL : T2I<(outs rGPR:$ldst, rGPR:$hdst), - (ins rGPR:$a, rGPR:$b), IIC_iMUL64, - "smull", "\t$ldst, $hdst, $a, $b", []> { +def t2SMULL : T2FourReg< + (outs rGPR:$Rd, rGPR:$Ra), + (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL64, + "smull", "\t$Rd, $Ra, $Rn, $Rm", []> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0111; let Inst{22-20} = 0b000; let Inst{7-4} = 0b0000; } -def t2UMULL : T2I<(outs rGPR:$ldst, rGPR:$hdst), - (ins rGPR:$a, rGPR:$b), IIC_iMUL64, - "umull", "\t$ldst, $hdst, $a, $b", []> { +def t2UMULL : T2FourReg< + (outs rGPR:$Rd, rGPR:$Ra), + (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL64, + "umull", "\t$Rd, $Ra, $Rn, $Rm", []> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0111; let Inst{22-20} = 0b010; @@ -2140,27 +2157,27 @@ } // isCommutable // Multiply + accumulate -def t2SMLAL : T2I<(outs rGPR:$ldst, rGPR:$hdst), - (ins rGPR:$a, rGPR:$b), IIC_iMAC64, - "smlal", "\t$ldst, $hdst, $a, $b", []>{ +def t2SMLAL : T2FourReg<(outs rGPR:$Rd, rGPR:$Ra), + (ins rGPR:$Rn, rGPR:$Rm), IIC_iMAC64, + "smlal", "\t$Rd, $Ra, $Rn, $Rm", []>{ let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0111; let Inst{22-20} = 0b100; let Inst{7-4} = 0b0000; } -def t2UMLAL : T2I<(outs rGPR:$ldst, rGPR:$hdst), - (ins rGPR:$a, rGPR:$b), IIC_iMAC64, - "umlal", "\t$ldst, $hdst, $a, $b", []>{ +def t2UMLAL : T2FourReg<(outs rGPR:$Rd, rGPR:$Ra), + (ins rGPR:$Rn, rGPR:$Rm), IIC_iMAC64, + "umlal", "\t$Rd, $Ra, $Rn, $Rm", []>{ let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0111; let Inst{22-20} = 0b110; let Inst{7-4} = 0b0000; } -def t2UMAAL : T2I<(outs rGPR:$ldst, rGPR:$hdst), - (ins rGPR:$a, rGPR:$b), IIC_iMAC64, - "umaal", "\t$ldst, $hdst, $a, $b", []>{ +def t2UMAAL : T2FourReg<(outs rGPR:$Rd, rGPR:$Ra), + (ins rGPR:$Rn, rGPR:$Rm), IIC_iMAC64, + "umaal", "\t$Rd, $Ra, $Rn, $Rm", []>{ let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0111; let Inst{22-20} = 0b110; Modified: llvm/trunk/test/MC/ARM/thumb2.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/thumb2.s?rev=119593&r1=119592&r2=119593&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/thumb2.s (original) +++ llvm/trunk/test/MC/ARM/thumb2.s Wed Nov 17 18:19:10 2010 @@ -63,3 +63,8 @@ sbfx r0, r0, #7, #11 @ CHECK: ubfx r0, r0, #7, #11 @ encoding: [0xca,0x10,0xc0,0xf3] ubfx r0, r0, #7, #11 + +@ CHECK: mla r0, r0, r1, r2 @ encoding: [0x01,0x20,0x00,0xfb] + mla r0, r0, r1, r2 +@ CHECK: mls r0, r0, r1, r2 @ encoding: [0x11,0x20,0x00,0xfb] + mls r0, r0, r1, r2 From pichet2000 at gmail.com Wed Nov 17 18:32:51 2010 From: pichet2000 at gmail.com (Francois Pichet) Date: Wed, 17 Nov 2010 19:32:51 -0500 Subject: [llvm-commits] [llvm] r119040 - /llvm/trunk/unittests/CMakeLists.txt In-Reply-To: References: <20101114123751.C469B2A6C12C@llvm.org> Message-ID: On Sun, Nov 14, 2010 at 5:34 PM, NAKAMURA Takumi wrote: > Good morning, Francois. > > 2010/11/15 Francois Pichet : >> ValueMapTest.cpp doesn't compile on VS2008 btw.. it generates all kind >> of weird errors about this. > > Indeed, also on vs8, I met many errors. > Fortunately, this issue did not affect to buildbots. I investigated and the problem is clearly a documented MSVC 2008 bug. see: http://connect.microsoft.com/VisualStudio/feedback/details/331418/erroneous-error-c2355-this-can-only-be-referenced-inside-non-static-member-functions The workaround is to remove the keyword "this" from the lines MSVC can't handle. If there is no objection.. i'll make that change. From gohman at apple.com Wed Nov 17 18:34:22 2010 From: gohman at apple.com (Dan Gohman) Date: Thu, 18 Nov 2010 00:34:22 -0000 Subject: [llvm-commits] [llvm] r119595 - in /llvm/trunk: include/llvm/Analysis/ScalarEvolution.h include/llvm/Analysis/ScalarEvolutionExpander.h lib/Analysis/ScalarEvolution.cpp lib/Analysis/ScalarEvolutionExpander.cpp Message-ID: <20101118003422.56AEA2A6C12C@llvm.org> Author: djg Date: Wed Nov 17 18:34:22 2010 New Revision: 119595 URL: http://llvm.org/viewvc/llvm-project?rev=119595&view=rev Log: Introduce memoization for ScalarEvolution dominates and properlyDominates queries, and SCEVExpander getRelevantLoop queries. Modified: llvm/trunk/include/llvm/Analysis/ScalarEvolution.h llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpander.h llvm/trunk/lib/Analysis/ScalarEvolution.cpp llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp Modified: llvm/trunk/include/llvm/Analysis/ScalarEvolution.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/ScalarEvolution.h?rev=119595&r1=119594&r2=119595&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/ScalarEvolution.h (original) +++ llvm/trunk/include/llvm/Analysis/ScalarEvolution.h Wed Nov 17 18:34:22 2010 @@ -151,6 +151,14 @@ LoopComputable ///< The SCEV varies predictably with the loop. }; + /// BlockDisposition - An enum describing the relationship between a + /// SCEV and a basic block. + enum BlockDisposition { + DoesNotDominateBlock, ///< The SCEV does not dominate the block. + DominatesBlock, ///< The SCEV dominates the block. + ProperlyDominatesBlock ///< The SCEV properly dominates the block. + }; + private: /// SCEVCallbackVH - A CallbackVH to arrange for ScalarEvolution to be /// notified whenever a Value is deleted. @@ -246,6 +254,13 @@ /// computeLoopDisposition - Compute a LoopDisposition value. LoopDisposition computeLoopDisposition(const SCEV *S, const Loop *L); + /// BlockDispositions - Memoized computeBlockDisposition results. + std::map > BlockDispositions; + + /// computeBlockDisposition - Compute a BlockDisposition value. + BlockDisposition computeBlockDisposition(const SCEV *S, const BasicBlock *BB); + /// UnsignedRanges - Memoized results from getUnsignedRange DenseMap UnsignedRanges; @@ -697,13 +712,17 @@ /// to compute the value of the expression at any particular loop iteration. bool hasComputableLoopEvolution(const SCEV *S, const Loop *L); + /// getLoopDisposition - Return the "disposition" of the given SCEV with + /// respect to the given block. + BlockDisposition getBlockDisposition(const SCEV *S, const BasicBlock *BB); + /// dominates - Return true if elements that makes up the given SCEV /// dominate the specified basic block. - bool dominates(const SCEV *S, BasicBlock *BB) const; + bool dominates(const SCEV *S, const BasicBlock *BB); /// properlyDominates - Return true if elements that makes up the given SCEV /// properly dominate the specified basic block. - bool properlyDominates(const SCEV *S, BasicBlock *BB) const; + bool properlyDominates(const SCEV *S, const BasicBlock *BB); /// hasOperand - Test whether the given SCEV has Op as a direct or /// indirect operand. Modified: llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpander.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpander.h?rev=119595&r1=119594&r2=119595&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpander.h (original) +++ llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpander.h Wed Nov 17 18:34:22 2010 @@ -35,6 +35,9 @@ std::set > InsertedValues; std::set > InsertedPostIncValues; + /// RelevantLoops - A memoization of the "relevant" loop for a given SCEV. + DenseMap RelevantLoops; + /// PostIncLoops - Addrecs referring to any of the given loops are expanded /// in post-inc mode. For example, expanding {1,+,1} in post-inc mode /// returns the add instruction that adds one to the phi for {0,+,1}, @@ -168,6 +171,9 @@ return InsertedValues.count(I) || InsertedPostIncValues.count(I); } + /// getRelevantLoop - Determine the most "relevant" loop for the given SCEV. + const Loop *getRelevantLoop(const SCEV *); + Value *visitConstant(const SCEVConstant *S) { return S->getValue(); } Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=119595&r1=119594&r2=119595&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original) +++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Wed Nov 17 18:34:22 2010 @@ -5790,6 +5790,7 @@ ConstantEvolutionLoopExitValue.clear(); ValuesAtScopes.clear(); LoopDispositions.clear(); + BlockDispositions.clear(); UnsignedRanges.clear(); SignedRanges.clear(); UniqueSCEVs.clear(); @@ -5990,64 +5991,35 @@ return getLoopDisposition(S, L) == LoopComputable; } -bool ScalarEvolution::dominates(const SCEV *S, BasicBlock *BB) const { - switch (S->getSCEVType()) { - case scConstant: - return true; - case scTruncate: - case scZeroExtend: - case scSignExtend: - return dominates(cast(S)->getOperand(), BB); - case scAddRecExpr: { - const SCEVAddRecExpr *AR = cast(S); - if (!DT->dominates(AR->getLoop()->getHeader(), BB)) - return false; - } - // FALL THROUGH into SCEVNAryExpr handling. - case scAddExpr: - case scMulExpr: - case scUMaxExpr: - case scSMaxExpr: { - const SCEVNAryExpr *NAry = cast(S); - for (SCEVNAryExpr::op_iterator I = NAry->op_begin(), E = NAry->op_end(); - I != E; ++I) - if (!dominates(*I, BB)) - return false; - return true; - } - case scUDivExpr: { - const SCEVUDivExpr *UDiv = cast(S); - return dominates(UDiv->getLHS(), BB) && dominates(UDiv->getRHS(), BB); - } - case scUnknown: - if (Instruction *I = - dyn_cast(cast(S)->getValue())) - return DT->dominates(I->getParent(), BB); - return true; - case scCouldNotCompute: - llvm_unreachable("Attempt to use a SCEVCouldNotCompute object!"); - return false; - default: break; - } - llvm_unreachable("Unknown SCEV kind!"); - return false; +ScalarEvolution::BlockDisposition +ScalarEvolution::getBlockDisposition(const SCEV *S, const BasicBlock *BB) { + std::map &Values = BlockDispositions[S]; + std::pair::iterator, bool> + Pair = Values.insert(std::make_pair(BB, DoesNotDominateBlock)); + if (!Pair.second) + return Pair.first->second; + + BlockDisposition D = computeBlockDisposition(S, BB); + return BlockDispositions[S][BB] = D; } -bool ScalarEvolution::properlyDominates(const SCEV *S, BasicBlock *BB) const { +ScalarEvolution::BlockDisposition +ScalarEvolution::computeBlockDisposition(const SCEV *S, const BasicBlock *BB) { switch (S->getSCEVType()) { case scConstant: - return true; + return ProperlyDominatesBlock; case scTruncate: case scZeroExtend: case scSignExtend: - return properlyDominates(cast(S)->getOperand(), BB); + return getBlockDisposition(cast(S)->getOperand(), BB); case scAddRecExpr: { // This uses a "dominates" query instead of "properly dominates" query - // because the instruction which produces the addrec's value is a PHI, and - // a PHI effectively properly dominates its entire containing block. + // to test for proper dominance too, because the instruction which + // produces the addrec's value is a PHI, and a PHI effectively properly + // dominates its entire containing block. const SCEVAddRecExpr *AR = cast(S); if (!DT->dominates(AR->getLoop()->getHeader(), BB)) - return false; + return DoesNotDominateBlock; } // FALL THROUGH into SCEVNAryExpr handling. case scAddExpr: @@ -6055,29 +6027,54 @@ case scUMaxExpr: case scSMaxExpr: { const SCEVNAryExpr *NAry = cast(S); + bool Proper = true; for (SCEVNAryExpr::op_iterator I = NAry->op_begin(), E = NAry->op_end(); - I != E; ++I) - if (!properlyDominates(*I, BB)) - return false; - return true; + I != E; ++I) { + BlockDisposition D = getBlockDisposition(*I, BB); + if (D == DoesNotDominateBlock) + return DoesNotDominateBlock; + if (D == DominatesBlock) + Proper = false; + } + return Proper ? ProperlyDominatesBlock : DominatesBlock; } case scUDivExpr: { const SCEVUDivExpr *UDiv = cast(S); - return properlyDominates(UDiv->getLHS(), BB) && - properlyDominates(UDiv->getRHS(), BB); + const SCEV *LHS = UDiv->getLHS(), *RHS = UDiv->getRHS(); + BlockDisposition LD = getBlockDisposition(LHS, BB); + if (LD == DoesNotDominateBlock) + return DoesNotDominateBlock; + BlockDisposition RD = getBlockDisposition(RHS, BB); + if (RD == DoesNotDominateBlock) + return DoesNotDominateBlock; + return (LD == ProperlyDominatesBlock && RD == ProperlyDominatesBlock) ? + ProperlyDominatesBlock : DominatesBlock; } case scUnknown: if (Instruction *I = - dyn_cast(cast(S)->getValue())) - return DT->properlyDominates(I->getParent(), BB); - return true; + dyn_cast(cast(S)->getValue())) { + if (I->getParent() == BB) + return DominatesBlock; + if (DT->properlyDominates(I->getParent(), BB)) + return ProperlyDominatesBlock; + return DoesNotDominateBlock; + } + return ProperlyDominatesBlock; case scCouldNotCompute: llvm_unreachable("Attempt to use a SCEVCouldNotCompute object!"); - return false; + return DoesNotDominateBlock; default: break; } llvm_unreachable("Unknown SCEV kind!"); - return false; + return DoesNotDominateBlock; +} + +bool ScalarEvolution::dominates(const SCEV *S, const BasicBlock *BB) { + return getBlockDisposition(S, BB) >= DominatesBlock; +} + +bool ScalarEvolution::properlyDominates(const SCEV *S, const BasicBlock *BB) { + return getBlockDisposition(S, BB) == ProperlyDominatesBlock; } bool ScalarEvolution::hasOperand(const SCEV *S, const SCEV *Op) const { @@ -6125,6 +6122,7 @@ void ScalarEvolution::forgetMemoizedResults(const SCEV *S) { ValuesAtScopes.erase(S); LoopDispositions.erase(S); + BlockDispositions.erase(S); UnsignedRanges.erase(S); SignedRanges.erase(S); } Modified: llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp?rev=119595&r1=119594&r2=119595&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp (original) +++ llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp Wed Nov 17 18:34:22 2010 @@ -608,15 +608,22 @@ return A; // Arbitrarily break the tie. } -/// GetRelevantLoop - Get the most relevant loop associated with the given +/// getRelevantLoop - Get the most relevant loop associated with the given /// expression, according to PickMostRelevantLoop. -static const Loop *GetRelevantLoop(const SCEV *S, LoopInfo &LI, - DominatorTree &DT) { +const Loop *SCEVExpander::getRelevantLoop(const SCEV *S) { + // Test whether we've already computed the most relevant loop for this SCEV. + std::pair::iterator, bool> Pair = + RelevantLoops.insert(std::make_pair(S, static_cast(0))); + if (!Pair.second) + return Pair.first->second; + if (isa(S)) + // A constant has no relevant loops. return 0; if (const SCEVUnknown *U = dyn_cast(S)) { if (const Instruction *I = dyn_cast(U->getValue())) - return LI.getLoopFor(I->getParent()); + return Pair.first->second = SE.LI->getLoopFor(I->getParent()); + // A non-instruction has no relevant loops. return 0; } if (const SCEVNAryExpr *N = dyn_cast(S)) { @@ -625,16 +632,22 @@ L = AR->getLoop(); for (SCEVNAryExpr::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) - L = PickMostRelevantLoop(L, GetRelevantLoop(*I, LI, DT), DT); - return L; + L = PickMostRelevantLoop(L, getRelevantLoop(*I), *SE.DT); + return RelevantLoops[N] = L; + } + if (const SCEVCastExpr *C = dyn_cast(S)) { + const Loop *Result = getRelevantLoop(C->getOperand()); + return RelevantLoops[C] = Result; + } + if (const SCEVUDivExpr *D = dyn_cast(S)) { + const Loop *Result = + PickMostRelevantLoop(getRelevantLoop(D->getLHS()), + getRelevantLoop(D->getRHS()), + *SE.DT); + return RelevantLoops[D] = Result; } - if (const SCEVCastExpr *C = dyn_cast(S)) - return GetRelevantLoop(C->getOperand(), LI, DT); - if (const SCEVUDivExpr *D = dyn_cast(S)) - return PickMostRelevantLoop(GetRelevantLoop(D->getLHS(), LI, DT), - GetRelevantLoop(D->getRHS(), LI, DT), - DT); llvm_unreachable("Unexpected SCEV type!"); + return 0; } namespace { @@ -682,8 +695,7 @@ SmallVector, 8> OpsAndLoops; for (std::reverse_iterator I(S->op_end()), E(S->op_begin()); I != E; ++I) - OpsAndLoops.push_back(std::make_pair(GetRelevantLoop(*I, *SE.LI, *SE.DT), - *I)); + OpsAndLoops.push_back(std::make_pair(getRelevantLoop(*I), *I)); // Sort by loop. Use a stable sort so that constants follow non-constants and // pointer operands precede non-pointer operands. @@ -752,8 +764,7 @@ SmallVector, 8> OpsAndLoops; for (std::reverse_iterator I(S->op_end()), E(S->op_begin()); I != E; ++I) - OpsAndLoops.push_back(std::make_pair(GetRelevantLoop(*I, *SE.LI, *SE.DT), - *I)); + OpsAndLoops.push_back(std::make_pair(getRelevantLoop(*I), *I)); // Sort by loop. Use a stable sort so that constants follow non-constants. std::stable_sort(OpsAndLoops.begin(), OpsAndLoops.end(), LoopCompare(*SE.DT)); From resistor at mac.com Wed Nov 17 18:42:52 2010 From: resistor at mac.com (Owen Anderson) Date: Thu, 18 Nov 2010 00:42:52 -0000 Subject: [llvm-commits] [llvm] r119597 - in /llvm/trunk: lib/Target/ARM/ARMInstrThumb2.td test/MC/ARM/thumb2.s Message-ID: <20101118004252.0F99F2A6C12C@llvm.org> Author: resistor Date: Wed Nov 17 18:42:51 2010 New Revision: 119597 URL: http://llvm.org/viewvc/llvm-project?rev=119597&view=rev Log: Revert r119593 while I figure out my testing disagrees with the buildbot. Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td llvm/trunk/test/MC/ARM/thumb2.s Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=119597&r1=119596&r2=119597&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Wed Nov 17 18:42:51 2010 @@ -384,21 +384,6 @@ let Inst{7-6} = ShiftedRm{8-7}; } -class T2FourReg pattern> - : T2sI { - bits<4> Rd; - bits<4> Rn; - bits<4> Rm; - bits<4> Ra; - - let Inst{11-8} = Rd{3-0}; - let Inst{19-16} = Rn{3-0}; - let Inst{3-0} = Rm{3-0}; - let Inst{15-12} = Ra{3-0}; -} - - /// T2I_un_irs - Defines a set of (op reg, {so_imm|r|so_reg}) patterns for a /// unary operation that produces a value. These are predicable and can be /// changed to modify CPSR. @@ -2102,9 +2087,9 @@ // Multiply Instructions. // let isCommutable = 1 in -def t2MUL: T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL32, - "mul", "\t$Rd, $Rn, $Rm", - [(set rGPR:$Rd, (mul rGPR:$Rn, rGPR:$Rm))]> { +def t2MUL: T2I<(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b), IIC_iMUL32, + "mul", "\t$dst, $a, $b", + [(set rGPR:$dst, (mul rGPR:$a, rGPR:$b))]> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0110; let Inst{22-20} = 0b000; @@ -2112,43 +2097,41 @@ let Inst{7-4} = 0b0000; // Multiply } -def t2MLA: T2FourReg< - (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32, - "mla", "\t$Rd, $Rn, $Rm, $Ra", - [(set rGPR:$Rd, (add (mul rGPR:$Rn, rGPR:$Rm), rGPR:$Ra))]> { +def t2MLA: T2I<(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b, rGPR:$c), IIC_iMAC32, + "mla", "\t$dst, $a, $b, $c", + [(set rGPR:$dst, (add (mul rGPR:$a, rGPR:$b), rGPR:$c))]> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0110; let Inst{22-20} = 0b000; + let Inst{15-12} = {?, ?, ?, ?}; // Ra let Inst{7-4} = 0b0000; // Multiply } -def t2MLS: T2FourReg< - (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32, - "mls", "\t$Rd, $Rn, $Rm, $Ra", - [(set rGPR:$Rd, (sub rGPR:$Ra, (mul rGPR:$Rn, rGPR:$Rm)))]> { +def t2MLS: T2I<(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b, rGPR:$c), IIC_iMAC32, + "mls", "\t$dst, $a, $b, $c", + [(set rGPR:$dst, (sub rGPR:$c, (mul rGPR:$a, rGPR:$b)))]> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0110; let Inst{22-20} = 0b000; + let Inst{15-12} = {?, ?, ?, ?}; // Ra let Inst{7-4} = 0b0001; // Multiply and Subtract } // Extra precision multiplies with low / high results let neverHasSideEffects = 1 in { let isCommutable = 1 in { -def t2SMULL : T2FourReg< - (outs rGPR:$Rd, rGPR:$Ra), - (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL64, - "smull", "\t$Rd, $Ra, $Rn, $Rm", []> { +def t2SMULL : T2I<(outs rGPR:$ldst, rGPR:$hdst), + (ins rGPR:$a, rGPR:$b), IIC_iMUL64, + "smull", "\t$ldst, $hdst, $a, $b", []> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0111; let Inst{22-20} = 0b000; let Inst{7-4} = 0b0000; } -def t2UMULL : T2FourReg< - (outs rGPR:$Rd, rGPR:$Ra), - (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL64, - "umull", "\t$Rd, $Ra, $Rn, $Rm", []> { +def t2UMULL : T2I<(outs rGPR:$ldst, rGPR:$hdst), + (ins rGPR:$a, rGPR:$b), IIC_iMUL64, + "umull", "\t$ldst, $hdst, $a, $b", []> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0111; let Inst{22-20} = 0b010; @@ -2157,27 +2140,27 @@ } // isCommutable // Multiply + accumulate -def t2SMLAL : T2FourReg<(outs rGPR:$Rd, rGPR:$Ra), - (ins rGPR:$Rn, rGPR:$Rm), IIC_iMAC64, - "smlal", "\t$Rd, $Ra, $Rn, $Rm", []>{ +def t2SMLAL : T2I<(outs rGPR:$ldst, rGPR:$hdst), + (ins rGPR:$a, rGPR:$b), IIC_iMAC64, + "smlal", "\t$ldst, $hdst, $a, $b", []>{ let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0111; let Inst{22-20} = 0b100; let Inst{7-4} = 0b0000; } -def t2UMLAL : T2FourReg<(outs rGPR:$Rd, rGPR:$Ra), - (ins rGPR:$Rn, rGPR:$Rm), IIC_iMAC64, - "umlal", "\t$Rd, $Ra, $Rn, $Rm", []>{ +def t2UMLAL : T2I<(outs rGPR:$ldst, rGPR:$hdst), + (ins rGPR:$a, rGPR:$b), IIC_iMAC64, + "umlal", "\t$ldst, $hdst, $a, $b", []>{ let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0111; let Inst{22-20} = 0b110; let Inst{7-4} = 0b0000; } -def t2UMAAL : T2FourReg<(outs rGPR:$Rd, rGPR:$Ra), - (ins rGPR:$Rn, rGPR:$Rm), IIC_iMAC64, - "umaal", "\t$Rd, $Ra, $Rn, $Rm", []>{ +def t2UMAAL : T2I<(outs rGPR:$ldst, rGPR:$hdst), + (ins rGPR:$a, rGPR:$b), IIC_iMAC64, + "umaal", "\t$ldst, $hdst, $a, $b", []>{ let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0111; let Inst{22-20} = 0b110; Modified: llvm/trunk/test/MC/ARM/thumb2.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/thumb2.s?rev=119597&r1=119596&r2=119597&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/thumb2.s (original) +++ llvm/trunk/test/MC/ARM/thumb2.s Wed Nov 17 18:42:51 2010 @@ -63,8 +63,3 @@ sbfx r0, r0, #7, #11 @ CHECK: ubfx r0, r0, #7, #11 @ encoding: [0xca,0x10,0xc0,0xf3] ubfx r0, r0, #7, #11 - -@ CHECK: mla r0, r0, r1, r2 @ encoding: [0x01,0x20,0x00,0xfb] - mla r0, r0, r1, r2 -@ CHECK: mls r0, r0, r1, r2 @ encoding: [0x11,0x20,0x00,0xfb] - mls r0, r0, r1, r2 From grosbach at apple.com Wed Nov 17 18:46:58 2010 From: grosbach at apple.com (Jim Grosbach) Date: Thu, 18 Nov 2010 00:46:58 -0000 Subject: [llvm-commits] [llvm] r119598 - in /llvm/trunk/lib/Target/ARM: ARMInstrFormats.td ARMInstrInfo.td Message-ID: <20101118004658.7D9CE2A6C12C@llvm.org> Author: grosbach Date: Wed Nov 17 18:46:58 2010 New Revision: 119598 URL: http://llvm.org/viewvc/llvm-project?rev=119598&view=rev Log: Refactor a few ARM load instructions to better parameterize things and re-use common encoding information. Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=119598&r1=119597&r2=119598&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Wed Nov 17 18:46:58 2010 @@ -500,45 +500,9 @@ : XI; -// loads -class AI3ldh pattern> - : I { - bits<14> addr; - bits<4> Rt; - let Inst{27-25} = 0b000; - let Inst{24} = 1; // P bit - let Inst{23} = addr{8}; // U bit - let Inst{22} = addr{13}; // 1 == imm8, 0 == Rm - let Inst{21} = 0; // W bit - let Inst{20} = 1; // L bit - let Inst{19-16} = addr{12-9}; // Rn - let Inst{15-12} = Rt; // Rt - let Inst{11-8} = addr{7-4}; // imm7_4/zero - let Inst{7-4} = 0b1011; - let Inst{3-0} = addr{3-0}; // imm3_0/Rm -} -class AXI3ldh pattern> - : XI { - bits<14> addr; - bits<4> Rt; - let Inst{27-25} = 0b000; - let Inst{24} = 1; // P bit - let Inst{23} = addr{8}; // U bit - let Inst{22} = addr{13}; // 1 == imm8, 0 == Rm - let Inst{21} = 0; // W bit - let Inst{20} = 1; // L bit - let Inst{19-16} = addr{12-9}; // Rn - let Inst{15-12} = Rt; // Rt - let Inst{11-8} = addr{7-4}; // imm7_4/zero - let Inst{7-4} = 0b1011; - let Inst{3-0} = addr{3-0}; // imm3_0/Rm -} -class AI3ldsh pattern> + +class AI3ld op, dag oops, dag iops, Format f, InstrItinClass itin, + string opc, string asm, list pattern> : I { bits<14> addr; @@ -552,13 +516,13 @@ let Inst{19-16} = addr{12-9}; // Rn let Inst{15-12} = Rt; // Rt let Inst{11-8} = addr{7-4}; // imm7_4/zero - let Inst{7-4} = 0b1111; + let Inst{7-4} = op; let Inst{3-0} = addr{3-0}; // imm3_0/Rm } -class AXI3ldsh pattern> +class AXI3ld op, dag oops, dag iops, Format f, InstrItinClass itin, + string asm, list pattern> : XI { + asm, "", pattern> { bits<14> addr; bits<4> Rt; let Inst{27-25} = 0b000; @@ -570,39 +534,11 @@ let Inst{19-16} = addr{12-9}; // Rn let Inst{15-12} = Rt; // Rt let Inst{11-8} = addr{7-4}; // imm7_4/zero - let Inst{7-4} = 0b1111; + let Inst{7-4} = op; let Inst{3-0} = addr{3-0}; // imm3_0/Rm } -class AI3ldsb pattern> - : I { - bits<14> addr; - bits<4> Rt; - let Inst{27-25} = 0b000; - let Inst{24} = 1; // P bit - let Inst{23} = addr{8}; // U bit - let Inst{22} = addr{13}; // 1 == imm8, 0 == Rm - let Inst{21} = 0; // W bit - let Inst{20} = 1; // L bit - let Inst{19-16} = addr{12-9}; // Rn - let Inst{15-12} = Rt; // Rt - let Inst{11-8} = addr{7-4}; // imm7_4/zero - let Inst{7-4} = 0b1101; - let Inst{3-0} = addr{3-0}; // imm3_0/Rm -} -class AXI3ldsb pattern> - : XI { - let Inst{4} = 1; - let Inst{5} = 0; // H bit - let Inst{6} = 1; // S bit - let Inst{7} = 1; - let Inst{20} = 1; // L bit - let Inst{21} = 0; // W bit - let Inst{24} = 1; // P bit -} + +// loads class AI3ldd pattern> : I; -def PICLDRH : AXI3ldh<(outs GPR:$dst), (ins addrmodepc:$addr, pred:$p), - Pseudo, IIC_iLoad_bh_r, "", - [(set GPR:$dst, (zextloadi16 addrmodepc:$addr))]>; +def PICLDRH : AXI3ld<0b1011, (outs GPR:$Rt), (ins addrmodepc:$addr, pred:$p), + Pseudo, IIC_iLoad_bh_r, "", + [(set GPR:$Rt, (zextloadi16 addrmodepc:$addr))]>; -def PICLDRB : AXI2ldb<(outs GPR:$dst), (ins addrmodepc:$addr, pred:$p), +def PICLDRB : AXI2ldb<(outs GPR:$Rt), (ins addrmodepc:$addr, pred:$p), Pseudo, IIC_iLoad_bh_r, "", - [(set GPR:$dst, (zextloadi8 addrmodepc:$addr))]>; + [(set GPR:$Rt, (zextloadi8 addrmodepc:$addr))]>; -def PICLDRSH : AXI3ldsh<(outs GPR:$dst), (ins addrmodepc:$addr, pred:$p), +def PICLDRSH : AXI3ld<0b1111, (outs GPR:$Rt), (ins addrmodepc:$addr, pred:$p), Pseudo, IIC_iLoad_bh_r, "", - [(set GPR:$dst, (sextloadi16 addrmodepc:$addr))]>; + [(set GPR:$Rt, (sextloadi16 addrmodepc:$addr))]>; -def PICLDRSB : AXI3ldsb<(outs GPR:$dst), (ins addrmodepc:$addr, pred:$p), +def PICLDRSB : AXI3ld<0b1101, (outs GPR:$Rt), (ins addrmodepc:$addr, pred:$p), Pseudo, IIC_iLoad_bh_r, "", - [(set GPR:$dst, (sextloadi8 addrmodepc:$addr))]>; + [(set GPR:$Rt, (sextloadi8 addrmodepc:$addr))]>; } let AddedComplexity = 10 in { def PICSTR : AXI2stw<(outs), (ins GPR:$src, addrmodepc:$addr, pred:$p), @@ -1549,16 +1549,16 @@ } // Loads with zero extension -def LDRH : AI3ldh<(outs GPR:$Rt), (ins addrmode3:$addr), LdMiscFrm, +def LDRH : AI3ld<0b1011, (outs GPR:$Rt), (ins addrmode3:$addr), LdMiscFrm, IIC_iLoad_bh_r, "ldrh", "\t$Rt, $addr", [(set GPR:$Rt, (zextloadi16 addrmode3:$addr))]>; // Loads with sign extension -def LDRSH : AI3ldsh<(outs GPR:$Rt), (ins addrmode3:$addr), LdMiscFrm, +def LDRSH : AI3ld<0b1111, (outs GPR:$Rt), (ins addrmode3:$addr), LdMiscFrm, IIC_iLoad_bh_r, "ldrsh", "\t$Rt, $addr", [(set GPR:$Rt, (sextloadi16 addrmode3:$addr))]>; -def LDRSB : AI3ldsb<(outs GPR:$Rt), (ins addrmode3:$addr), LdMiscFrm, +def LDRSB : AI3ld<0b1101, (outs GPR:$Rt), (ins addrmode3:$addr), LdMiscFrm, IIC_iLoad_bh_r, "ldrsb", "\t$Rt, $addr", [(set GPR:$Rt, (sextloadi8 addrmode3:$addr))]>; From John.Thompson.JTSoftware at gmail.com Wed Nov 17 18:50:21 2010 From: John.Thompson.JTSoftware at gmail.com (John Thompson) Date: Thu, 18 Nov 2010 00:50:21 -0000 Subject: [llvm-commits] [llvm] r119599 - /llvm/trunk/test/CodeGen/X86/inline-asm-ptr-cast.ll Message-ID: <20101118005021.2C30B2A6C12C@llvm.org> Author: jtsoftware Date: Wed Nov 17 18:50:20 2010 New Revision: 119599 URL: http://llvm.org/viewvc/llvm-project?rev=119599&view=rev Log: Fixed to use input redirection for source - to eliminate .s output. Modified: llvm/trunk/test/CodeGen/X86/inline-asm-ptr-cast.ll Modified: llvm/trunk/test/CodeGen/X86/inline-asm-ptr-cast.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-ptr-cast.ll?rev=119599&r1=119598&r2=119599&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/inline-asm-ptr-cast.ll (original) +++ llvm/trunk/test/CodeGen/X86/inline-asm-ptr-cast.ll Wed Nov 17 18:50:20 2010 @@ -1,4 +1,4 @@ -; RUN: llc -mtriple=x86_64-unknown-linux-gnu %s +; RUN: llc -mtriple=x86_64-unknown-linux-gnu <%s ; ModuleID = 'bug.c' target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" target triple = "x86_64-unknown-linux-gnu" From pichet2000 at gmail.com Wed Nov 17 18:59:50 2010 From: pichet2000 at gmail.com (Francois Pichet) Date: Thu, 18 Nov 2010 00:59:50 -0000 Subject: [llvm-commits] [llvm] r119600 - /llvm/trunk/unittests/VMCore/ValueMapTest.cpp Message-ID: <20101118005950.635A32A6C12C@llvm.org> Author: fpichet Date: Wed Nov 17 18:59:50 2010 New Revision: 119600 URL: http://llvm.org/viewvc/llvm-project?rev=119600&view=rev Log: Appease MSVC 2008: you can't use keyword this inside EXPECT_EQ(). This is because of bug 331418 on Microsoft Connect. Modified: llvm/trunk/unittests/VMCore/ValueMapTest.cpp Modified: llvm/trunk/unittests/VMCore/ValueMapTest.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/VMCore/ValueMapTest.cpp?rev=119600&r1=119599&r2=119600&view=diff ============================================================================== --- llvm/trunk/unittests/VMCore/ValueMapTest.cpp (original) +++ llvm/trunk/unittests/VMCore/ValueMapTest.cpp Wed Nov 17 18:59:50 2010 @@ -72,29 +72,29 @@ typename ValueMap::iterator I = VM.find(this->BitcastV.get()); ASSERT_TRUE(I != VM.end()); - EXPECT_EQ(this->BitcastV.get(), I->first); + EXPECT_EQ(BitcastV.get(), I->first); EXPECT_EQ(7, I->second); - EXPECT_TRUE(VM.find(this->AddV.get()) == VM.end()); + EXPECT_TRUE(VM.find(AddV.get()) == VM.end()); // Const find: const ValueMap &CVM = VM; typename ValueMap::const_iterator CI = CVM.find(this->BitcastV.get()); ASSERT_TRUE(CI != CVM.end()); - EXPECT_EQ(this->BitcastV.get(), CI->first); + EXPECT_EQ(BitcastV.get(), CI->first); EXPECT_EQ(7, CI->second); EXPECT_TRUE(CVM.find(this->AddV.get()) == CVM.end()); // Insert: std::pair::iterator, bool> InsertResult1 = VM.insert(std::make_pair(this->AddV.get(), 3)); - EXPECT_EQ(this->AddV.get(), InsertResult1.first->first); + EXPECT_EQ(/*->this*/AddV.get(), InsertResult1.first->first); EXPECT_EQ(3, InsertResult1.first->second); EXPECT_TRUE(InsertResult1.second); EXPECT_EQ(true, VM.count(this->AddV.get())); std::pair::iterator, bool> InsertResult2 = VM.insert(std::make_pair(this->AddV.get(), 5)); - EXPECT_EQ(this->AddV.get(), InsertResult2.first->first); + EXPECT_EQ(/*this->*/AddV.get(), InsertResult2.first->first); EXPECT_EQ(3, InsertResult2.first->second); EXPECT_FALSE(InsertResult2.second); @@ -131,10 +131,10 @@ std::pair value = *I; (void)value; CompileAssertHasType(I->first); if (I->second == 2) { - EXPECT_EQ(this->BitcastV.get(), I->first); + EXPECT_EQ(/*this->*/BitcastV.get(), I->first); I->second = 5; } else if (I->second == 3) { - EXPECT_EQ(this->AddV.get(), I->first); + EXPECT_EQ(/*this->*/AddV.get(), I->first); I->second = 6; } else { ADD_FAILURE() << "Iterated through an extra value."; @@ -153,9 +153,9 @@ std::pair value = *I; (void)value; CompileAssertHasType(I->first); if (I->second == 5) { - EXPECT_EQ(this->BitcastV.get(), I->first); + EXPECT_EQ(/*this->*/BitcastV.get(), I->first); } else if (I->second == 6) { - EXPECT_EQ(this->AddV.get(), I->first); + EXPECT_EQ(/*this->*/AddV.get(), I->first); } else { ADD_FAILURE() << "Iterated through an extra value."; } From resistor at mac.com Wed Nov 17 19:08:42 2010 From: resistor at mac.com (Owen Anderson) Date: Thu, 18 Nov 2010 01:08:42 -0000 Subject: [llvm-commits] [llvm] r119601 - in /llvm/trunk: lib/Target/ARM/ARMInstrThumb2.td test/MC/ARM/thumb2.s Message-ID: <20101118010842.F0F102A6C12C@llvm.org> Author: resistor Date: Wed Nov 17 19:08:42 2010 New Revision: 119601 URL: http://llvm.org/viewvc/llvm-project?rev=119601&view=rev Log: Try again at providing Thumb2 encodings for basic multiplication operators. Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td llvm/trunk/test/MC/ARM/thumb2.s Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=119601&r1=119600&r2=119601&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Wed Nov 17 19:08:42 2010 @@ -384,6 +384,21 @@ let Inst{7-6} = ShiftedRm{8-7}; } +class T2FourReg pattern> + : T2I { + bits<4> Rd; + bits<4> Rn; + bits<4> Rm; + bits<4> Ra; + + let Inst{11-8} = Rd{3-0}; + let Inst{19-16} = Rn{3-0}; + let Inst{3-0} = Rm{3-0}; + let Inst{15-12} = Ra{3-0}; +} + + /// T2I_un_irs - Defines a set of (op reg, {so_imm|r|so_reg}) patterns for a /// unary operation that produces a value. These are predicable and can be /// changed to modify CPSR. @@ -2087,9 +2102,9 @@ // Multiply Instructions. // let isCommutable = 1 in -def t2MUL: T2I<(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b), IIC_iMUL32, - "mul", "\t$dst, $a, $b", - [(set rGPR:$dst, (mul rGPR:$a, rGPR:$b))]> { +def t2MUL: T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL32, + "mul", "\t$Rd, $Rn, $Rm", + [(set rGPR:$Rd, (mul rGPR:$Rn, rGPR:$Rm))]> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0110; let Inst{22-20} = 0b000; @@ -2097,41 +2112,43 @@ let Inst{7-4} = 0b0000; // Multiply } -def t2MLA: T2I<(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b, rGPR:$c), IIC_iMAC32, - "mla", "\t$dst, $a, $b, $c", - [(set rGPR:$dst, (add (mul rGPR:$a, rGPR:$b), rGPR:$c))]> { +def t2MLA: T2FourReg< + (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32, + "mla", "\t$Rd, $Rn, $Rm, $Ra", + [(set rGPR:$Rd, (add (mul rGPR:$Rn, rGPR:$Rm), rGPR:$Ra))]> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0110; let Inst{22-20} = 0b000; - let Inst{15-12} = {?, ?, ?, ?}; // Ra let Inst{7-4} = 0b0000; // Multiply } -def t2MLS: T2I<(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b, rGPR:$c), IIC_iMAC32, - "mls", "\t$dst, $a, $b, $c", - [(set rGPR:$dst, (sub rGPR:$c, (mul rGPR:$a, rGPR:$b)))]> { +def t2MLS: T2FourReg< + (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32, + "mls", "\t$Rd, $Rn, $Rm, $Ra", + [(set rGPR:$Rd, (sub rGPR:$Ra, (mul rGPR:$Rn, rGPR:$Rm)))]> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0110; let Inst{22-20} = 0b000; - let Inst{15-12} = {?, ?, ?, ?}; // Ra let Inst{7-4} = 0b0001; // Multiply and Subtract } // Extra precision multiplies with low / high results let neverHasSideEffects = 1 in { let isCommutable = 1 in { -def t2SMULL : T2I<(outs rGPR:$ldst, rGPR:$hdst), - (ins rGPR:$a, rGPR:$b), IIC_iMUL64, - "smull", "\t$ldst, $hdst, $a, $b", []> { +def t2SMULL : T2FourReg< + (outs rGPR:$Rd, rGPR:$Ra), + (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL64, + "smull", "\t$Rd, $Ra, $Rn, $Rm", []> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0111; let Inst{22-20} = 0b000; let Inst{7-4} = 0b0000; } -def t2UMULL : T2I<(outs rGPR:$ldst, rGPR:$hdst), - (ins rGPR:$a, rGPR:$b), IIC_iMUL64, - "umull", "\t$ldst, $hdst, $a, $b", []> { +def t2UMULL : T2FourReg< + (outs rGPR:$Rd, rGPR:$Ra), + (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL64, + "umull", "\t$Rd, $Ra, $Rn, $Rm", []> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0111; let Inst{22-20} = 0b010; @@ -2140,27 +2157,27 @@ } // isCommutable // Multiply + accumulate -def t2SMLAL : T2I<(outs rGPR:$ldst, rGPR:$hdst), - (ins rGPR:$a, rGPR:$b), IIC_iMAC64, - "smlal", "\t$ldst, $hdst, $a, $b", []>{ +def t2SMLAL : T2FourReg<(outs rGPR:$Rd, rGPR:$Ra), + (ins rGPR:$Rn, rGPR:$Rm), IIC_iMAC64, + "smlal", "\t$Rd, $Ra, $Rn, $Rm", []>{ let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0111; let Inst{22-20} = 0b100; let Inst{7-4} = 0b0000; } -def t2UMLAL : T2I<(outs rGPR:$ldst, rGPR:$hdst), - (ins rGPR:$a, rGPR:$b), IIC_iMAC64, - "umlal", "\t$ldst, $hdst, $a, $b", []>{ +def t2UMLAL : T2FourReg<(outs rGPR:$Rd, rGPR:$Ra), + (ins rGPR:$Rn, rGPR:$Rm), IIC_iMAC64, + "umlal", "\t$Rd, $Ra, $Rn, $Rm", []>{ let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0111; let Inst{22-20} = 0b110; let Inst{7-4} = 0b0000; } -def t2UMAAL : T2I<(outs rGPR:$ldst, rGPR:$hdst), - (ins rGPR:$a, rGPR:$b), IIC_iMAC64, - "umaal", "\t$ldst, $hdst, $a, $b", []>{ +def t2UMAAL : T2FourReg<(outs rGPR:$Rd, rGPR:$Ra), + (ins rGPR:$Rn, rGPR:$Rm), IIC_iMAC64, + "umaal", "\t$Rd, $Ra, $Rn, $Rm", []>{ let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0111; let Inst{22-20} = 0b110; Modified: llvm/trunk/test/MC/ARM/thumb2.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/thumb2.s?rev=119601&r1=119600&r2=119601&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/thumb2.s (original) +++ llvm/trunk/test/MC/ARM/thumb2.s Wed Nov 17 19:08:42 2010 @@ -63,3 +63,8 @@ sbfx r0, r0, #7, #11 @ CHECK: ubfx r0, r0, #7, #11 @ encoding: [0xca,0x10,0xc0,0xf3] ubfx r0, r0, #7, #11 + +@ CHECK: mla r0, r0, r1, r2 @ encoding: [0x01,0x20,0x00,0xfb] + mla r0, r0, r1, r2 +@ CHECK: mls r0, r0, r1, r2 @ encoding: [0x11,0x20,0x00,0xfb] + mls r0, r0, r1, r2 From grosbach at apple.com Wed Nov 17 19:16:52 2010 From: grosbach at apple.com (Jim Grosbach) Date: Wed, 17 Nov 2010 17:16:52 -0800 Subject: [llvm-commits] [llvm] r119355 - /llvm/trunk/cmake/modules/LLVMLibDeps.cmake In-Reply-To: <8D66597B-71DC-40AB-88F4-94893E3D885F@wesleypeck.com> References: <20101116181441.9EF092A6C12C@llvm.org> <8D66597B-71DC-40AB-88F4-94893E3D885F@wesleypeck.com> Message-ID: Hi Wesley, In my case, CMake isn't part of my normal workflow, so I don't feel confident that any changes to the auto-generated dependencies in that file from my system will be right for others. Secondly, I like to break my commits of unrelated chunks apart, and I had run CMake for a reason unrelated to the initial checkin, so I didn't want those changes going in together. As to whether that file should be checked in on a regular basis during normal CMake usage, someone more expert in CMake than I would be better suited to answer. Regards, Jim On Nov 17, 2010, at 2:48 PM, Wesley Peck wrote: > Is LLVMLibDeps.cmake something that should not be checked in when changed? I've noticed that it almost always gets changed when I build LLVM but I have been unsure if I should commit this file when it changes. > > -- > Wesley Peck > University of Kansas > SLDG Laboratory > > On Nov 16, 2010, at 12:14 PM, Jim Grosbach wrote: > >> Author: grosbach >> Date: Tue Nov 16 12:14:41 2010 >> New Revision: 119355 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=119355&view=rev >> Log: >> Revert inadvertant checkin of CMake libdeps. >> >> Modified: >> llvm/trunk/cmake/modules/LLVMLibDeps.cmake >> >> Modified: llvm/trunk/cmake/modules/LLVMLibDeps.cmake >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/cmake/modules/LLVMLibDeps.cmake?rev=119355&r1=119354&r2=119355&view=diff >> ============================================================================== >> --- llvm/trunk/cmake/modules/LLVMLibDeps.cmake (original) >> +++ llvm/trunk/cmake/modules/LLVMLibDeps.cmake Tue Nov 16 12:14:41 2010 >> @@ -1,28 +1,28 @@ >> -set(MSVC_LIB_DEPS_LLVMARMAsmParser LLVMARMInfo LLVMMC LLVMMCParser LLVMSupport LLVMSystem LLVMTarget) >> -set(MSVC_LIB_DEPS_LLVMARMAsmPrinter LLVMMC LLVMSupport LLVMSystem) >> +set(MSVC_LIB_DEPS_LLVMARMAsmParser LLVMARMInfo LLVMMC LLVMMCParser LLVMSupport LLVMTarget) >> +set(MSVC_LIB_DEPS_LLVMARMAsmPrinter LLVMMC LLVMSupport) >> set(MSVC_LIB_DEPS_LLVMARMCodeGen LLVMARMAsmPrinter LLVMARMInfo LLVMAnalysis LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) >> -set(MSVC_LIB_DEPS_LLVMARMDisassembler LLVMARMCodeGen LLVMARMInfo LLVMMC LLVMSupport LLVMSystem) >> +set(MSVC_LIB_DEPS_LLVMARMDisassembler LLVMARMCodeGen LLVMARMInfo LLVMMC LLVMSupport) >> set(MSVC_LIB_DEPS_LLVMARMInfo LLVMMC LLVMSupport) >> -set(MSVC_LIB_DEPS_LLVMAlphaAsmPrinter LLVMAlphaInfo LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMTarget) >> +set(MSVC_LIB_DEPS_LLVMAlphaAsmPrinter LLVMAlphaInfo LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMTarget) >> set(MSVC_LIB_DEPS_LLVMAlphaCodeGen LLVMAlphaInfo LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) >> set(MSVC_LIB_DEPS_LLVMAlphaInfo LLVMMC LLVMSupport) >> set(MSVC_LIB_DEPS_LLVMAnalysis LLVMCore LLVMSupport LLVMSystem LLVMTarget) >> set(MSVC_LIB_DEPS_LLVMArchive LLVMBitReader LLVMCore LLVMSupport LLVMSystem) >> -set(MSVC_LIB_DEPS_LLVMAsmParser LLVMCore LLVMSupport LLVMSystem) >> +set(MSVC_LIB_DEPS_LLVMAsmParser LLVMCore LLVMSupport) >> set(MSVC_LIB_DEPS_LLVMAsmPrinter LLVMAnalysis LLVMCodeGen LLVMCore LLVMMC LLVMMCParser LLVMSupport LLVMSystem LLVMTarget) >> -set(MSVC_LIB_DEPS_LLVMBitReader LLVMCore LLVMSupport LLVMSystem) >> -set(MSVC_LIB_DEPS_LLVMBitWriter LLVMCore LLVMSupport LLVMSystem) >> -set(MSVC_LIB_DEPS_LLVMBlackfinAsmPrinter LLVMAsmPrinter LLVMBlackfinInfo LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMTarget) >> -set(MSVC_LIB_DEPS_LLVMBlackfinCodeGen LLVMAsmPrinter LLVMBlackfinInfo LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) >> +set(MSVC_LIB_DEPS_LLVMBitReader LLVMCore LLVMSupport) >> +set(MSVC_LIB_DEPS_LLVMBitWriter LLVMCore LLVMSupport) >> +set(MSVC_LIB_DEPS_LLVMBlackfinAsmPrinter LLVMAsmPrinter LLVMBlackfinInfo LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMTarget) >> +set(MSVC_LIB_DEPS_LLVMBlackfinCodeGen LLVMAsmPrinter LLVMBlackfinInfo LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMTarget) >> set(MSVC_LIB_DEPS_LLVMBlackfinInfo LLVMMC LLVMSupport) >> set(MSVC_LIB_DEPS_LLVMCBackend LLVMAnalysis LLVMCBackendInfo LLVMCodeGen LLVMCore LLVMMC LLVMScalarOpts LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils LLVMipa) >> set(MSVC_LIB_DEPS_LLVMCBackendInfo LLVMMC LLVMSupport) >> -set(MSVC_LIB_DEPS_LLVMCellSPUAsmPrinter LLVMAsmPrinter LLVMCellSPUInfo LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMTarget) >> -set(MSVC_LIB_DEPS_LLVMCellSPUCodeGen LLVMAsmPrinter LLVMCellSPUInfo LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) >> +set(MSVC_LIB_DEPS_LLVMCellSPUAsmPrinter LLVMAsmPrinter LLVMCellSPUInfo LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMTarget) >> +set(MSVC_LIB_DEPS_LLVMCellSPUCodeGen LLVMAsmPrinter LLVMCellSPUInfo LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMTarget) >> set(MSVC_LIB_DEPS_LLVMCellSPUInfo LLVMMC LLVMSupport) >> set(MSVC_LIB_DEPS_LLVMCodeGen LLVMAnalysis LLVMCore LLVMMC LLVMScalarOpts LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils) >> set(MSVC_LIB_DEPS_LLVMCore LLVMSupport LLVMSystem) >> -set(MSVC_LIB_DEPS_LLVMCppBackend LLVMCore LLVMCppBackendInfo LLVMSupport LLVMSystem LLVMTarget) >> +set(MSVC_LIB_DEPS_LLVMCppBackend LLVMCore LLVMCppBackendInfo LLVMSupport LLVMTarget) >> set(MSVC_LIB_DEPS_LLVMCppBackendInfo LLVMMC LLVMSupport) >> set(MSVC_LIB_DEPS_LLVMExecutionEngine LLVMCore LLVMSupport LLVMSystem LLVMTarget) >> set(MSVC_LIB_DEPS_LLVMInstCombine LLVMAnalysis LLVMCore LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils) >> @@ -30,46 +30,45 @@ >> set(MSVC_LIB_DEPS_LLVMInterpreter LLVMCodeGen LLVMCore LLVMExecutionEngine LLVMSupport LLVMSystem LLVMTarget) >> set(MSVC_LIB_DEPS_LLVMJIT LLVMCodeGen LLVMCore LLVMExecutionEngine LLVMMC LLVMSupport LLVMSystem LLVMTarget) >> set(MSVC_LIB_DEPS_LLVMLinker LLVMArchive LLVMBitReader LLVMCore LLVMSupport LLVMSystem LLVMTransformUtils) >> -set(MSVC_LIB_DEPS_LLVMMBlazeAsmParser LLVMMBlazeCodeGen LLVMMBlazeInfo LLVMMC LLVMMCParser LLVMSupport LLVMSystem LLVMTarget) >> -set(MSVC_LIB_DEPS_LLVMMBlazeAsmPrinter LLVMMC LLVMSupport LLVMSystem) >> +set(MSVC_LIB_DEPS_LLVMMBlazeAsmParser LLVMMBlazeCodeGen LLVMMBlazeInfo LLVMMC LLVMMCParser LLVMSupport LLVMTarget) >> +set(MSVC_LIB_DEPS_LLVMMBlazeAsmPrinter LLVMMC LLVMSupport) >> set(MSVC_LIB_DEPS_LLVMMBlazeCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMBlazeAsmPrinter LLVMMBlazeInfo LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) >> set(MSVC_LIB_DEPS_LLVMMBlazeDisassembler LLVMMBlazeCodeGen LLVMMBlazeInfo LLVMMC LLVMSupport) >> set(MSVC_LIB_DEPS_LLVMMBlazeInfo LLVMMC LLVMSupport) >> set(MSVC_LIB_DEPS_LLVMMC LLVMSupport LLVMSystem) >> set(MSVC_LIB_DEPS_LLVMMCDisassembler LLVMARMAsmParser LLVMARMCodeGen LLVMARMDisassembler LLVMARMInfo LLVMAlphaCodeGen LLVMAlphaInfo LLVMBlackfinCodeGen LLVMBlackfinInfo LLVMCBackend LLVMCBackendInfo LLVMCellSPUCodeGen LLVMCellSPUInfo LLVMCppBackend LLVMCppBackendInfo LLVMMBlazeAsmParser LLVMMBlazeCodeGen LLVMMBlazeDisassembler LLVMMBlazeInfo LLVMMC LLVMMCParser LLVMMSP430CodeGen LLVMMSP430Info LLVMMipsCodeGen LLVMMipsInfo LLVMPTXCodeGen LLVMPTXInfo LLVMPowerPCCodeGen LLVMPowerPCInfo LLVMSparcCodeGen LLVMSparcInfo LLVMSupport LLVMSystem LLVMSystemZCodeGen LLVMSystemZInfo LLVMX86AsmParser LLVMX86CodeGen LLVMX86Disassembler LLVMX86Info LLVMXCoreCodeGen LLVMXCoreInfo) >> -set(MSVC_LIB_DEPS_LLVMMCParser LLVMMC LLVMSupport LLVMSystem) >> -set(MSVC_LIB_DEPS_LLVMMSP430AsmPrinter LLVMMC LLVMSupport LLVMSystem) >> +set(MSVC_LIB_DEPS_LLVMMCParser LLVMMC LLVMSupport) >> +set(MSVC_LIB_DEPS_LLVMMSP430AsmPrinter LLVMMC LLVMSupport) >> set(MSVC_LIB_DEPS_LLVMMSP430CodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMMSP430AsmPrinter LLVMMSP430Info LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) >> set(MSVC_LIB_DEPS_LLVMMSP430Info LLVMMC LLVMSupport) >> -set(MSVC_LIB_DEPS_LLVMMipsAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMMipsCodeGen LLVMMipsInfo LLVMSupport LLVMSystem LLVMTarget) >> +set(MSVC_LIB_DEPS_LLVMMipsAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMMipsCodeGen LLVMMipsInfo LLVMSupport LLVMTarget) >> set(MSVC_LIB_DEPS_LLVMMipsCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMMipsInfo LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) >> set(MSVC_LIB_DEPS_LLVMMipsInfo LLVMMC LLVMSupport) >> -set(MSVC_LIB_DEPS_LLVMObject LLVMSupport LLVMSystem) >> -set(MSVC_LIB_DEPS_LLVMPTXAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMPTXInfo LLVMSupport LLVMSystem) >> -set(MSVC_LIB_DEPS_LLVMPTXCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMPTXInfo LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) >> +set(MSVC_LIB_DEPS_LLVMPTXAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMPTXInfo LLVMSupport) >> +set(MSVC_LIB_DEPS_LLVMPTXCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMPTXInfo LLVMSelectionDAG LLVMSupport LLVMTarget) >> set(MSVC_LIB_DEPS_LLVMPTXInfo LLVMMC LLVMSupport) >> -set(MSVC_LIB_DEPS_LLVMPowerPCAsmPrinter LLVMMC LLVMSupport LLVMSystem) >> +set(MSVC_LIB_DEPS_LLVMPowerPCAsmPrinter LLVMMC LLVMSupport) >> set(MSVC_LIB_DEPS_LLVMPowerPCCodeGen LLVMAnalysis LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMPowerPCAsmPrinter LLVMPowerPCInfo LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) >> set(MSVC_LIB_DEPS_LLVMPowerPCInfo LLVMMC LLVMSupport) >> set(MSVC_LIB_DEPS_LLVMScalarOpts LLVMAnalysis LLVMCore LLVMInstCombine LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils) >> set(MSVC_LIB_DEPS_LLVMSelectionDAG LLVMAnalysis LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMTarget) >> -set(MSVC_LIB_DEPS_LLVMSparcAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSparcInfo LLVMSupport LLVMSystem LLVMTarget) >> +set(MSVC_LIB_DEPS_LLVMSparcAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSparcInfo LLVMSupport LLVMTarget) >> set(MSVC_LIB_DEPS_LLVMSparcCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSparcInfo LLVMSupport LLVMSystem LLVMTarget) >> set(MSVC_LIB_DEPS_LLVMSparcInfo LLVMMC LLVMSupport) >> set(MSVC_LIB_DEPS_LLVMSupport LLVMSystem) >> set(MSVC_LIB_DEPS_LLVMSystem ) >> -set(MSVC_LIB_DEPS_LLVMSystemZAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMSystemZInfo LLVMTarget) >> -set(MSVC_LIB_DEPS_LLVMSystemZCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMSystemZInfo LLVMTarget) >> +set(MSVC_LIB_DEPS_LLVMSystemZAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystemZInfo LLVMTarget) >> +set(MSVC_LIB_DEPS_LLVMSystemZCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystemZInfo LLVMTarget) >> set(MSVC_LIB_DEPS_LLVMSystemZInfo LLVMMC LLVMSupport) >> set(MSVC_LIB_DEPS_LLVMTarget LLVMCore LLVMMC LLVMSupport LLVMSystem) >> set(MSVC_LIB_DEPS_LLVMTransformUtils LLVMAnalysis LLVMCore LLVMSupport LLVMSystem LLVMTarget LLVMipa) >> -set(MSVC_LIB_DEPS_LLVMX86AsmParser LLVMMC LLVMMCParser LLVMSupport LLVMSystem LLVMTarget LLVMX86Info) >> -set(MSVC_LIB_DEPS_LLVMX86AsmPrinter LLVMMC LLVMSupport LLVMSystem) >> +set(MSVC_LIB_DEPS_LLVMX86AsmParser LLVMMC LLVMMCParser LLVMSupport LLVMTarget LLVMX86Info) >> +set(MSVC_LIB_DEPS_LLVMX86AsmPrinter LLVMMC LLVMSupport) >> set(MSVC_LIB_DEPS_LLVMX86CodeGen LLVMAnalysis LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget LLVMX86AsmPrinter LLVMX86Info) >> set(MSVC_LIB_DEPS_LLVMX86Disassembler LLVMMC LLVMSupport LLVMX86Info) >> set(MSVC_LIB_DEPS_LLVMX86Info LLVMMC LLVMSupport) >> -set(MSVC_LIB_DEPS_LLVMXCoreAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMTarget LLVMXCoreInfo) >> -set(MSVC_LIB_DEPS_LLVMXCoreCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget LLVMXCoreInfo) >> +set(MSVC_LIB_DEPS_LLVMXCoreAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMTarget LLVMXCoreInfo) >> +set(MSVC_LIB_DEPS_LLVMXCoreCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMTarget LLVMXCoreInfo) >> set(MSVC_LIB_DEPS_LLVMXCoreInfo LLVMMC LLVMSupport) >> set(MSVC_LIB_DEPS_LLVMipa LLVMAnalysis LLVMCore LLVMSupport LLVMSystem) >> set(MSVC_LIB_DEPS_LLVMipo LLVMAnalysis LLVMCore LLVMScalarOpts LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils LLVMipa) >> >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > From grosbach at apple.com Wed Nov 17 19:15:56 2010 From: grosbach at apple.com (Jim Grosbach) Date: Thu, 18 Nov 2010 01:15:56 -0000 Subject: [llvm-commits] [llvm] r119602 - in /llvm/trunk/lib/Target/ARM: ARMInstrFormats.td ARMInstrInfo.td Message-ID: <20101118011556.DA7FD2A6C12C@llvm.org> Author: grosbach Date: Wed Nov 17 19:15:56 2010 New Revision: 119602 URL: http://llvm.org/viewvc/llvm-project?rev=119602&view=rev Log: Refactor the ARM PICADD and PICLDR* instructions to really be pseudos and not just pretend to be. Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=119602&r1=119601&r2=119602&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Wed Nov 17 19:15:56 2010 @@ -244,6 +244,14 @@ let Pattern = pattern; } +// PseudoInst that's ARM-mode only. +class ARMPseudoInst pattern> + : PseudoInst { + list Predicates = [IsARM]; +} + + // Almost all ARM instructions are predicable. class I op, dag oops, dag iops, Format f, InstrItinClass itin, - string asm, list pattern> - : XI { - bits<14> addr; - bits<4> Rt; - let Inst{27-25} = 0b000; - let Inst{24} = 1; // P bit - let Inst{23} = addr{8}; // U bit - let Inst{22} = addr{13}; // 1 == imm8, 0 == Rm - let Inst{21} = 0; // W bit - let Inst{20} = 1; // L bit - let Inst{19-16} = addr{12-9}; // Rn - let Inst{15-12} = Rt; // Rt - let Inst{11-8} = addr{7-4}; // imm7_4/zero - let Inst{7-4} = op; - let Inst{3-0} = addr{3-0}; // imm3_0/Rm -} - // loads class AI3ldd pattern> Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=119602&r1=119601&r2=119602&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Wed Nov 17 19:15:56 2010 @@ -1118,37 +1118,31 @@ } // Address computation and loads and stores in PIC mode. -// FIXME: These PIC insn patterns are pseudos, but derive from the normal insn -// classes (AXI1, et.al.) and so have encoding information and such, -// which is suboptimal. Once the rest of the code emitter (including -// JIT) is MC-ized we should look at refactoring these into true -// pseudos. As is, the encoding information ends up being ignored, -// as these instructions are lowered to individual MC-insts. let isNotDuplicable = 1 in { -def PICADD : AXI1<0b0100, (outs GPR:$dst), (ins GPR:$a, pclabel:$cp, pred:$p), - Pseudo, IIC_iALUr, "", - [(set GPR:$dst, (ARMpic_add GPR:$a, imm:$cp))]>; +def PICADD : ARMPseudoInst<(outs GPR:$dst), (ins GPR:$a, pclabel:$cp, pred:$p), + IIC_iALUr, "", + [(set GPR:$dst, (ARMpic_add GPR:$a, imm:$cp))]>; let AddedComplexity = 10 in { -def PICLDR : AXI2ldw<(outs GPR:$dst), (ins addrmodepc:$addr, pred:$p), - Pseudo, IIC_iLoad_r, "", - [(set GPR:$dst, (load addrmodepc:$addr))]>; - -def PICLDRH : AXI3ld<0b1011, (outs GPR:$Rt), (ins addrmodepc:$addr, pred:$p), - Pseudo, IIC_iLoad_bh_r, "", - [(set GPR:$Rt, (zextloadi16 addrmodepc:$addr))]>; - -def PICLDRB : AXI2ldb<(outs GPR:$Rt), (ins addrmodepc:$addr, pred:$p), - Pseudo, IIC_iLoad_bh_r, "", - [(set GPR:$Rt, (zextloadi8 addrmodepc:$addr))]>; - -def PICLDRSH : AXI3ld<0b1111, (outs GPR:$Rt), (ins addrmodepc:$addr, pred:$p), - Pseudo, IIC_iLoad_bh_r, "", - [(set GPR:$Rt, (sextloadi16 addrmodepc:$addr))]>; - -def PICLDRSB : AXI3ld<0b1101, (outs GPR:$Rt), (ins addrmodepc:$addr, pred:$p), - Pseudo, IIC_iLoad_bh_r, "", - [(set GPR:$Rt, (sextloadi8 addrmodepc:$addr))]>; +def PICLDR : ARMPseudoInst<(outs GPR:$dst), (ins addrmodepc:$addr, pred:$p), + IIC_iLoad_r, "", + [(set GPR:$dst, (load addrmodepc:$addr))]>; + +def PICLDRH : ARMPseudoInst<(outs GPR:$Rt), (ins addrmodepc:$addr, pred:$p), + IIC_iLoad_bh_r, "", + [(set GPR:$Rt, (zextloadi16 addrmodepc:$addr))]>; + +def PICLDRB : ARMPseudoInst<(outs GPR:$Rt), (ins addrmodepc:$addr, pred:$p), + IIC_iLoad_bh_r, "", + [(set GPR:$Rt, (zextloadi8 addrmodepc:$addr))]>; + +def PICLDRSH : ARMPseudoInst<(outs GPR:$Rt), (ins addrmodepc:$addr, pred:$p), + IIC_iLoad_bh_r, "", + [(set GPR:$Rt, (sextloadi16 addrmodepc:$addr))]>; + +def PICLDRSB : ARMPseudoInst<(outs GPR:$Rt), (ins addrmodepc:$addr, pred:$p), + IIC_iLoad_bh_r, "", + [(set GPR:$Rt, (sextloadi8 addrmodepc:$addr))]>; } let AddedComplexity = 10 in { def PICSTR : AXI2stw<(outs), (ins GPR:$src, addrmodepc:$addr, pred:$p), From grosbach at apple.com Wed Nov 17 19:20:48 2010 From: grosbach at apple.com (Jim Grosbach) Date: Thu, 18 Nov 2010 01:20:48 -0000 Subject: [llvm-commits] [llvm] r119603 - /llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Message-ID: <20101118012049.02B8F2A6C12C@llvm.org> Author: grosbach Date: Wed Nov 17 19:20:48 2010 New Revision: 119603 URL: http://llvm.org/viewvc/llvm-project?rev=119603&view=rev Log: Add FIXME. Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=119603&r1=119602&r2=119603&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Wed Nov 17 19:20:48 2010 @@ -236,6 +236,9 @@ class PseudoInst pattern> + // FIXME: This really should derive from InstTemplate instead, as pseudos + // don't need encoding information. TableGen doesn't like that + // currently. Need to figure out why and fix it. : InstARM { let OutOperandList = oops; From evan.cheng at apple.com Wed Nov 17 19:28:51 2010 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 18 Nov 2010 01:28:51 -0000 Subject: [llvm-commits] [llvm] r119604 - /llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp Message-ID: <20101118012851.550E92A6C12C@llvm.org> Author: evancheng Date: Wed Nov 17 19:28:51 2010 New Revision: 119604 URL: http://llvm.org/viewvc/llvm-project?rev=119604&view=rev Log: Code clean up. Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp?rev=119604&r1=119603&r2=119604&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp Wed Nov 17 19:28:51 2010 @@ -39,22 +39,18 @@ #include "llvm/ADT/SmallVector.h" #include "llvm/Support/CommandLine.h" -namespace llvm { +using namespace llvm; + static cl::opt ForceAllBaseRegAlloc("arm-force-base-reg-alloc", cl::Hidden, cl::init(false), cl::desc("Force use of virtual base registers for stack load/store")); static cl::opt EnableLocalStackAlloc("enable-local-stack-alloc", cl::init(true), cl::Hidden, cl::desc("Enable pre-regalloc stack frame index allocation")); -} - -using namespace llvm; - static cl::opt EnableBasePointer("arm-use-base-pointer", cl::Hidden, cl::init(true), cl::desc("Enable use of a base pointer for complex stack frames")); - ARMBaseRegisterInfo::ARMBaseRegisterInfo(const ARMBaseInstrInfo &tii, const ARMSubtarget &sti) : ARMGenRegisterInfo(ARM::ADJCALLSTACKDOWN, ARM::ADJCALLSTACKUP), From dalej at apple.com Wed Nov 17 19:35:23 2010 From: dalej at apple.com (Dale Johannesen) Date: Thu, 18 Nov 2010 01:35:23 -0000 Subject: [llvm-commits] [llvm] r119605 - in /llvm/trunk: lib/CodeGen/SelectionDAG/SelectionDAG.cpp test/CodeGen/X86/memset64-on-x86-32.ll test/CodeGen/X86/misaligned-memset.ll Message-ID: <20101118013523.8C50F2A6C12C@llvm.org> Author: johannes Date: Wed Nov 17 19:35:23 2010 New Revision: 119605 URL: http://llvm.org/viewvc/llvm-project?rev=119605&view=rev Log: Do not throw away alignment when generating the DAG for memset; we may need it to decide between MOVAPS and MOVUPS later. Adjust a test that was looking for wrong code. PR 3866 / 8675131. Added: llvm/trunk/test/CodeGen/X86/misaligned-memset.ll Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp llvm/trunk/test/CodeGen/X86/memset64-on-x86-32.ll Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=119605&r1=119604&r2=119605&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Wed Nov 17 19:35:23 2010 @@ -3487,7 +3487,7 @@ SDValue Store = DAG.getStore(Chain, dl, Value, getMemBasePlusOffset(Dst, DstOff, DAG), DstPtrInfo.getWithOffset(DstOff), - isVol, false, 0); + isVol, false, Align); OutChains.push_back(Store); DstOff += VTSize; } Modified: llvm/trunk/test/CodeGen/X86/memset64-on-x86-32.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/memset64-on-x86-32.ll?rev=119605&r1=119604&r2=119605&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/memset64-on-x86-32.ll (original) +++ llvm/trunk/test/CodeGen/X86/memset64-on-x86-32.ll Wed Nov 17 19:35:23 2010 @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=nehalem | grep movaps | count 5 +; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=nehalem | grep movups | count 5 ; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=core2 | grep movl | count 20 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core2 | grep movq | count 10 Added: llvm/trunk/test/CodeGen/X86/misaligned-memset.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/misaligned-memset.ll?rev=119605&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/misaligned-memset.ll (added) +++ llvm/trunk/test/CodeGen/X86/misaligned-memset.ll Wed Nov 17 19:35:23 2010 @@ -0,0 +1,15 @@ +; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=nehalem < %s | FileCheck %s + + at a = common global [3 x i64] zeroinitializer, align 16 + +define i32 @main() nounwind ssp { +; CHECK: movups +entry: + %retval = alloca i32, align 4 + store i32 0, i32* %retval + call void @llvm.memset.p0i8.i64(i8* bitcast (i64* getelementptr inbounds ([3 x i64]* @a, i32 0, i64 1) to i8*), i8 0, i64 16, i32 1, i1 false) + %0 = load i32* %retval + ret i32 %0 +} + +declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind From grosbach at apple.com Wed Nov 17 19:38:07 2010 From: grosbach at apple.com (Jim Grosbach) Date: Thu, 18 Nov 2010 01:38:07 -0000 Subject: [llvm-commits] [llvm] r119606 - /llvm/trunk/unittests/VMCore/ValueMapTest.cpp Message-ID: <20101118013808.028EC2A6C12C@llvm.org> Author: grosbach Date: Wed Nov 17 19:38:07 2010 New Revision: 119606 URL: http://llvm.org/viewvc/llvm-project?rev=119606&view=rev Log: Revert 119600 to unbreak the build. Francois, please investigate. Modified: llvm/trunk/unittests/VMCore/ValueMapTest.cpp Modified: llvm/trunk/unittests/VMCore/ValueMapTest.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/VMCore/ValueMapTest.cpp?rev=119606&r1=119605&r2=119606&view=diff ============================================================================== --- llvm/trunk/unittests/VMCore/ValueMapTest.cpp (original) +++ llvm/trunk/unittests/VMCore/ValueMapTest.cpp Wed Nov 17 19:38:07 2010 @@ -72,29 +72,29 @@ typename ValueMap::iterator I = VM.find(this->BitcastV.get()); ASSERT_TRUE(I != VM.end()); - EXPECT_EQ(BitcastV.get(), I->first); + EXPECT_EQ(this->BitcastV.get(), I->first); EXPECT_EQ(7, I->second); - EXPECT_TRUE(VM.find(AddV.get()) == VM.end()); + EXPECT_TRUE(VM.find(this->AddV.get()) == VM.end()); // Const find: const ValueMap &CVM = VM; typename ValueMap::const_iterator CI = CVM.find(this->BitcastV.get()); ASSERT_TRUE(CI != CVM.end()); - EXPECT_EQ(BitcastV.get(), CI->first); + EXPECT_EQ(this->BitcastV.get(), CI->first); EXPECT_EQ(7, CI->second); EXPECT_TRUE(CVM.find(this->AddV.get()) == CVM.end()); // Insert: std::pair::iterator, bool> InsertResult1 = VM.insert(std::make_pair(this->AddV.get(), 3)); - EXPECT_EQ(/*->this*/AddV.get(), InsertResult1.first->first); + EXPECT_EQ(this->AddV.get(), InsertResult1.first->first); EXPECT_EQ(3, InsertResult1.first->second); EXPECT_TRUE(InsertResult1.second); EXPECT_EQ(true, VM.count(this->AddV.get())); std::pair::iterator, bool> InsertResult2 = VM.insert(std::make_pair(this->AddV.get(), 5)); - EXPECT_EQ(/*this->*/AddV.get(), InsertResult2.first->first); + EXPECT_EQ(this->AddV.get(), InsertResult2.first->first); EXPECT_EQ(3, InsertResult2.first->second); EXPECT_FALSE(InsertResult2.second); @@ -131,10 +131,10 @@ std::pair value = *I; (void)value; CompileAssertHasType(I->first); if (I->second == 2) { - EXPECT_EQ(/*this->*/BitcastV.get(), I->first); + EXPECT_EQ(this->BitcastV.get(), I->first); I->second = 5; } else if (I->second == 3) { - EXPECT_EQ(/*this->*/AddV.get(), I->first); + EXPECT_EQ(this->AddV.get(), I->first); I->second = 6; } else { ADD_FAILURE() << "Iterated through an extra value."; @@ -153,9 +153,9 @@ std::pair value = *I; (void)value; CompileAssertHasType(I->first); if (I->second == 5) { - EXPECT_EQ(/*this->*/BitcastV.get(), I->first); + EXPECT_EQ(this->BitcastV.get(), I->first); } else if (I->second == 6) { - EXPECT_EQ(/*this->*/AddV.get(), I->first); + EXPECT_EQ(this->AddV.get(), I->first); } else { ADD_FAILURE() << "Iterated through an extra value."; } From grosbach at apple.com Wed Nov 17 19:38:26 2010 From: grosbach at apple.com (Jim Grosbach) Date: Thu, 18 Nov 2010 01:38:26 -0000 Subject: [llvm-commits] [llvm] r119607 - in /llvm/trunk/lib/Target/ARM: ARMInstrFormats.td ARMInstrInfo.td ARMInstrNEON.td ARMInstrThumb.td ARMInstrThumb2.td Message-ID: <20101118013826.905042A6C12C@llvm.org> Author: grosbach Date: Wed Nov 17 19:38:26 2010 New Revision: 119607 URL: http://llvm.org/viewvc/llvm-project?rev=119607&view=rev Log: ARM PseudoInst instructions don't need or use an assembler string. Get rid of the operand to the pattern. Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td llvm/trunk/lib/Target/ARM/ARMInstrInfo.td llvm/trunk/lib/Target/ARM/ARMInstrNEON.td llvm/trunk/lib/Target/ARM/ARMInstrThumb.td llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=119607&r1=119606&r2=119607&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Wed Nov 17 19:38:26 2010 @@ -234,8 +234,7 @@ Format f, Domain d, string cstr, InstrItinClass itin> : InstTemplate; -class PseudoInst pattern> +class PseudoInst pattern> // FIXME: This really should derive from InstTemplate instead, as pseudos // don't need encoding information. TableGen doesn't like that // currently. Need to figure out why and fix it. @@ -243,14 +242,13 @@ "", itin> { let OutOperandList = oops; let InOperandList = iops; - let AsmString = asm; let Pattern = pattern; } // PseudoInst that's ARM-mode only. class ARMPseudoInst pattern> - : PseudoInst { + list pattern> + : PseudoInst { list Predicates = [IsARM]; } Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=119607&r1=119606&r2=119607&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Wed Nov 17 19:38:26 2010 @@ -950,18 +950,18 @@ let neverHasSideEffects = 1, isNotDuplicable = 1 in def CONSTPOOL_ENTRY : PseudoInst<(outs), (ins cpinst_operand:$instid, cpinst_operand:$cpidx, - i32imm:$size), NoItinerary, "", []>; + i32imm:$size), NoItinerary, []>; // FIXME: Marking these as hasSideEffects is necessary to prevent machine DCE // from removing one half of the matched pairs. That breaks PEI, which assumes // these will always be in pairs, and asserts if it finds otherwise. Better way? let Defs = [SP], Uses = [SP], hasSideEffects = 1 in { def ADJCALLSTACKUP : -PseudoInst<(outs), (ins i32imm:$amt1, i32imm:$amt2, pred:$p), NoItinerary, "", +PseudoInst<(outs), (ins i32imm:$amt1, i32imm:$amt2, pred:$p), NoItinerary, [(ARMcallseq_end timm:$amt1, timm:$amt2)]>; def ADJCALLSTACKDOWN : -PseudoInst<(outs), (ins i32imm:$amt, pred:$p), NoItinerary, "", +PseudoInst<(outs), (ins i32imm:$amt, pred:$p), NoItinerary, [(ARMcallseq_start timm:$amt)]>; } @@ -1120,28 +1120,28 @@ // Address computation and loads and stores in PIC mode. let isNotDuplicable = 1 in { def PICADD : ARMPseudoInst<(outs GPR:$dst), (ins GPR:$a, pclabel:$cp, pred:$p), - IIC_iALUr, "", + IIC_iALUr, [(set GPR:$dst, (ARMpic_add GPR:$a, imm:$cp))]>; let AddedComplexity = 10 in { def PICLDR : ARMPseudoInst<(outs GPR:$dst), (ins addrmodepc:$addr, pred:$p), - IIC_iLoad_r, "", + IIC_iLoad_r, [(set GPR:$dst, (load addrmodepc:$addr))]>; def PICLDRH : ARMPseudoInst<(outs GPR:$Rt), (ins addrmodepc:$addr, pred:$p), - IIC_iLoad_bh_r, "", + IIC_iLoad_bh_r, [(set GPR:$Rt, (zextloadi16 addrmodepc:$addr))]>; def PICLDRB : ARMPseudoInst<(outs GPR:$Rt), (ins addrmodepc:$addr, pred:$p), - IIC_iLoad_bh_r, "", + IIC_iLoad_bh_r, [(set GPR:$Rt, (zextloadi8 addrmodepc:$addr))]>; def PICLDRSH : ARMPseudoInst<(outs GPR:$Rt), (ins addrmodepc:$addr, pred:$p), - IIC_iLoad_bh_r, "", + IIC_iLoad_bh_r, [(set GPR:$Rt, (sextloadi16 addrmodepc:$addr))]>; def PICLDRSB : ARMPseudoInst<(outs GPR:$Rt), (ins addrmodepc:$addr, pred:$p), - IIC_iLoad_bh_r, "", + IIC_iLoad_bh_r, [(set GPR:$Rt, (sextloadi8 addrmodepc:$addr))]>; } let AddedComplexity = 10 in { @@ -1439,7 +1439,7 @@ } def BR_JTadd : PseudoInst<(outs), (ins GPR:$target, GPR:$idx, jtblock_operand:$jt, i32imm:$id), - IIC_Br, "", + IIC_Br, [(ARMbrjt (add GPR:$target, GPR:$idx), tjumptable:$jt, imm:$id)]>; } // isNotDuplicable = 1, isIndirectBranch = 1 @@ -1993,7 +1993,7 @@ Requires<[IsARM, HasV6T2]>; let Uses = [CPSR] in -def RRX: PseudoInst<(outs GPR:$Rd), (ins GPR:$Rm), IIC_iMOVsi, "", +def RRX: PseudoInst<(outs GPR:$Rd), (ins GPR:$Rm), IIC_iMOVsi, [(set GPR:$Rd, (ARMrrx GPR:$Rm))]>, UnaryDP, Requires<[IsARM]>; @@ -2001,10 +2001,10 @@ // due to flag operands. let Defs = [CPSR] in { -def MOVsrl_flag : PseudoInst<(outs GPR:$dst), (ins GPR:$src), IIC_iMOVsi, "", +def MOVsrl_flag : PseudoInst<(outs GPR:$dst), (ins GPR:$src), IIC_iMOVsi, [(set GPR:$dst, (ARMsrl_flag GPR:$src))]>, UnaryDP, Requires<[IsARM]>; -def MOVsra_flag : PseudoInst<(outs GPR:$dst), (ins GPR:$src), IIC_iMOVsi, "", +def MOVsra_flag : PseudoInst<(outs GPR:$dst), (ins GPR:$src), IIC_iMOVsi, [(set GPR:$dst, (ARMsra_flag GPR:$src))]>, UnaryDP, Requires<[IsARM]>; } @@ -3000,11 +3000,11 @@ Defs = [CPSR] in { def BCCi64 : PseudoInst<(outs), (ins i32imm:$cc, GPR:$lhs1, GPR:$lhs2, GPR:$rhs1, GPR:$rhs2, brtarget:$dst), - IIC_Br, "", + IIC_Br, [(ARMBcci64 imm:$cc, GPR:$lhs1, GPR:$lhs2, GPR:$rhs1, GPR:$rhs2, bb:$dst)]>; def BCCZi64 : PseudoInst<(outs), - (ins i32imm:$cc, GPR:$lhs1, GPR:$lhs2, brtarget:$dst), IIC_Br, "", + (ins i32imm:$cc, GPR:$lhs1, GPR:$lhs2, brtarget:$dst), IIC_Br, [(ARMBcci64 imm:$cc, GPR:$lhs1, GPR:$lhs2, 0, 0, bb:$dst)]>; } // usesCustomInserter @@ -3078,7 +3078,7 @@ let isMoveImm = 1 in def MOVCCi32imm : PseudoInst<(outs GPR:$Rd), (ins GPR:$false, i32imm:$src, pred:$p), - IIC_iCMOVix2, "", []>, RegConstraint<"$false = $Rd">; + IIC_iCMOVix2, []>, RegConstraint<"$false = $Rd">; let isMoveImm = 1 in def MVNCCi : AI1<0b1111, (outs GPR:$Rd), @@ -3141,78 +3141,78 @@ let usesCustomInserter = 1 in { let Uses = [CPSR] in { def ATOMIC_LOAD_ADD_I8 : PseudoInst< - (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary, "", + (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary, [(set GPR:$dst, (atomic_load_add_8 GPR:$ptr, GPR:$incr))]>; def ATOMIC_LOAD_SUB_I8 : PseudoInst< - (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary, "", + (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary, [(set GPR:$dst, (atomic_load_sub_8 GPR:$ptr, GPR:$incr))]>; def ATOMIC_LOAD_AND_I8 : PseudoInst< - (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary, "", + (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary, [(set GPR:$dst, (atomic_load_and_8 GPR:$ptr, GPR:$incr))]>; def ATOMIC_LOAD_OR_I8 : PseudoInst< - (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary, "", + (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary, [(set GPR:$dst, (atomic_load_or_8 GPR:$ptr, GPR:$incr))]>; def ATOMIC_LOAD_XOR_I8 : PseudoInst< - (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary, "", + (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary, [(set GPR:$dst, (atomic_load_xor_8 GPR:$ptr, GPR:$incr))]>; def ATOMIC_LOAD_NAND_I8 : PseudoInst< - (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary, "", + (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary, [(set GPR:$dst, (atomic_load_nand_8 GPR:$ptr, GPR:$incr))]>; def ATOMIC_LOAD_ADD_I16 : PseudoInst< - (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary, "", + (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary, [(set GPR:$dst, (atomic_load_add_16 GPR:$ptr, GPR:$incr))]>; def ATOMIC_LOAD_SUB_I16 : PseudoInst< - (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary, "", + (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary, [(set GPR:$dst, (atomic_load_sub_16 GPR:$ptr, GPR:$incr))]>; def ATOMIC_LOAD_AND_I16 : PseudoInst< - (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary, "", + (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary, [(set GPR:$dst, (atomic_load_and_16 GPR:$ptr, GPR:$incr))]>; def ATOMIC_LOAD_OR_I16 : PseudoInst< - (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary, "", + (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary, [(set GPR:$dst, (atomic_load_or_16 GPR:$ptr, GPR:$incr))]>; def ATOMIC_LOAD_XOR_I16 : PseudoInst< - (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary, "", + (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary, [(set GPR:$dst, (atomic_load_xor_16 GPR:$ptr, GPR:$incr))]>; def ATOMIC_LOAD_NAND_I16 : PseudoInst< - (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary, "", + (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary, [(set GPR:$dst, (atomic_load_nand_16 GPR:$ptr, GPR:$incr))]>; def ATOMIC_LOAD_ADD_I32 : PseudoInst< - (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary, "", + (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary, [(set GPR:$dst, (atomic_load_add_32 GPR:$ptr, GPR:$incr))]>; def ATOMIC_LOAD_SUB_I32 : PseudoInst< - (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary, "", + (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary, [(set GPR:$dst, (atomic_load_sub_32 GPR:$ptr, GPR:$incr))]>; def ATOMIC_LOAD_AND_I32 : PseudoInst< - (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary, "", + (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary, [(set GPR:$dst, (atomic_load_and_32 GPR:$ptr, GPR:$incr))]>; def ATOMIC_LOAD_OR_I32 : PseudoInst< - (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary, "", + (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary, [(set GPR:$dst, (atomic_load_or_32 GPR:$ptr, GPR:$incr))]>; def ATOMIC_LOAD_XOR_I32 : PseudoInst< - (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary, "", + (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary, [(set GPR:$dst, (atomic_load_xor_32 GPR:$ptr, GPR:$incr))]>; def ATOMIC_LOAD_NAND_I32 : PseudoInst< - (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary, "", + (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary, [(set GPR:$dst, (atomic_load_nand_32 GPR:$ptr, GPR:$incr))]>; def ATOMIC_SWAP_I8 : PseudoInst< - (outs GPR:$dst), (ins GPR:$ptr, GPR:$new), NoItinerary, "", + (outs GPR:$dst), (ins GPR:$ptr, GPR:$new), NoItinerary, [(set GPR:$dst, (atomic_swap_8 GPR:$ptr, GPR:$new))]>; def ATOMIC_SWAP_I16 : PseudoInst< - (outs GPR:$dst), (ins GPR:$ptr, GPR:$new), NoItinerary, "", + (outs GPR:$dst), (ins GPR:$ptr, GPR:$new), NoItinerary, [(set GPR:$dst, (atomic_swap_16 GPR:$ptr, GPR:$new))]>; def ATOMIC_SWAP_I32 : PseudoInst< - (outs GPR:$dst), (ins GPR:$ptr, GPR:$new), NoItinerary, "", + (outs GPR:$dst), (ins GPR:$ptr, GPR:$new), NoItinerary, [(set GPR:$dst, (atomic_swap_32 GPR:$ptr, GPR:$new))]>; def ATOMIC_CMP_SWAP_I8 : PseudoInst< - (outs GPR:$dst), (ins GPR:$ptr, GPR:$old, GPR:$new), NoItinerary, "", + (outs GPR:$dst), (ins GPR:$ptr, GPR:$old, GPR:$new), NoItinerary, [(set GPR:$dst, (atomic_cmp_swap_8 GPR:$ptr, GPR:$old, GPR:$new))]>; def ATOMIC_CMP_SWAP_I16 : PseudoInst< - (outs GPR:$dst), (ins GPR:$ptr, GPR:$old, GPR:$new), NoItinerary, "", + (outs GPR:$dst), (ins GPR:$ptr, GPR:$old, GPR:$new), NoItinerary, [(set GPR:$dst, (atomic_cmp_swap_16 GPR:$ptr, GPR:$old, GPR:$new))]>; def ATOMIC_CMP_SWAP_I32 : PseudoInst< - (outs GPR:$dst), (ins GPR:$ptr, GPR:$old, GPR:$new), NoItinerary, "", + (outs GPR:$dst), (ins GPR:$ptr, GPR:$old, GPR:$new), NoItinerary, [(set GPR:$dst, (atomic_cmp_swap_32 GPR:$ptr, GPR:$old, GPR:$new))]>; } } @@ -3336,7 +3336,7 @@ // that need the instruction size). let isBarrier = 1, hasSideEffects = 1 in def Int_eh_sjlj_dispatchsetup : - PseudoInst<(outs), (ins GPR:$src), NoItinerary, "", + PseudoInst<(outs), (ins GPR:$src), NoItinerary, [(ARMeh_sjlj_dispatchsetup GPR:$src)]>, Requires<[IsDarwin]>; @@ -3351,7 +3351,7 @@ // as a single unit instead of having to handle reg inputs. // FIXME: Remove this when we can do generalized remat. let isReMaterializable = 1, isMoveImm = 1 in -def MOVi32imm : PseudoInst<(outs GPR:$dst), (ins i32imm:$src), IIC_iMOVix2, "", +def MOVi32imm : PseudoInst<(outs GPR:$dst), (ins i32imm:$src), IIC_iMOVix2, [(set GPR:$dst, (arm_i32imm:$src))]>, Requires<[IsARM]>; Modified: llvm/trunk/lib/Target/ARM/ARMInstrNEON.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrNEON.td?rev=119607&r1=119606&r2=119607&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrNEON.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrNEON.td Wed Nov 17 19:38:26 2010 @@ -3891,10 +3891,10 @@ // Pseudo vector move instructions for QQ and QQQQ registers. This should // be expanded after register allocation is completed. def VMOVQQ : PseudoInst<(outs QQPR:$dst), (ins QQPR:$src), - NoItinerary, "", []>; + NoItinerary, []>; def VMOVQQQQ : PseudoInst<(outs QQQQPR:$dst), (ins QQQQPR:$src), - NoItinerary, "", []>; + NoItinerary, []>; } // neverHasSideEffects // VMOV : Vector Move (Immediate) Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb.td?rev=119607&r1=119606&r2=119607&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb.td Wed Nov 17 19:38:26 2010 @@ -126,12 +126,12 @@ // these will always be in pairs, and asserts if it finds otherwise. Better way? let Defs = [SP], Uses = [SP], hasSideEffects = 1 in { def tADJCALLSTACKUP : -PseudoInst<(outs), (ins i32imm:$amt1, i32imm:$amt2), NoItinerary, "", +PseudoInst<(outs), (ins i32imm:$amt1, i32imm:$amt2), NoItinerary, [(ARMcallseq_end imm:$amt1, imm:$amt2)]>, Requires<[IsThumb, IsThumb1Only]>; def tADJCALLSTACKDOWN : -PseudoInst<(outs), (ins i32imm:$amt), NoItinerary, "", +PseudoInst<(outs), (ins i32imm:$amt), NoItinerary, [(ARMcallseq_start imm:$amt)]>, Requires<[IsThumb, IsThumb1Only]>; } @@ -868,7 +868,7 @@ let usesCustomInserter = 1 in // Expanded after instruction selection. def tMOVCCr_pseudo : PseudoInst<(outs tGPR:$dst), (ins tGPR:$false, tGPR:$true, pred:$cc), - NoItinerary, "", + NoItinerary, [/*(set tGPR:$dst, (ARMcmov tGPR:$false, tGPR:$true, imm:$cc))*/]>; @@ -1023,7 +1023,7 @@ // scheduling. let isReMaterializable = 1 in def tLDRpci_pic : PseudoInst<(outs GPR:$dst), (ins i32imm:$addr, pclabel:$cp), - NoItinerary, "", + NoItinerary, [(set GPR:$dst, (ARMpic_add (load (ARMWrapper tconstpool:$addr)), imm:$cp))]>, Requires<[IsThumb, IsThumb1Only]>; Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=119607&r1=119606&r2=119607&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Wed Nov 17 19:38:26 2010 @@ -2627,7 +2627,7 @@ let isMoveImm = 1 in def t2MOVCCi32imm : PseudoInst<(outs rGPR:$dst), (ins rGPR:$false, i32imm:$src, pred:$p), - IIC_iCMOVix2, "", []>, RegConstraint<"$false = $dst">; + IIC_iCMOVix2, []>, RegConstraint<"$false = $dst">; let isMoveImm = 1 in def t2MVNCCi : T2I<(outs rGPR:$dst), (ins rGPR:$false, t2_so_imm:$true), @@ -3072,7 +3072,7 @@ // FIXME: Remove this when we can do generalized remat. let isReMaterializable = 1, isMoveImm = 1 in def t2MOVi32imm : PseudoInst<(outs rGPR:$dst), (ins i32imm:$src), IIC_iMOVix2, - "", [(set rGPR:$dst, (i32 imm:$src))]>, + [(set rGPR:$dst, (i32 imm:$src))]>, Requires<[IsThumb, HasV6T2]>; // ConstantPool, GlobalAddress, and JumpTable @@ -3090,7 +3090,7 @@ // scheduling. let canFoldAsLoad = 1, isReMaterializable = 1 in def t2LDRpci_pic : PseudoInst<(outs GPR:$dst), (ins i32imm:$addr, pclabel:$cp), - IIC_iLoadiALU, "", + IIC_iLoadiALU, [(set GPR:$dst, (ARMpic_add (load (ARMWrapper tconstpool:$addr)), imm:$cp))]>, Requires<[IsThumb2]>; From grosbach at apple.com Wed Nov 17 19:39:50 2010 From: grosbach at apple.com (Jim Grosbach) Date: Thu, 18 Nov 2010 01:39:50 -0000 Subject: [llvm-commits] [llvm] r119608 - /llvm/trunk/lib/Target/ARM/ARMInstrNEON.td Message-ID: <20101118013950.CDA7A2A6C12C@llvm.org> Author: grosbach Date: Wed Nov 17 19:39:50 2010 New Revision: 119608 URL: http://llvm.org/viewvc/llvm-project?rev=119608&view=rev Log: Remove trailing whitespace. Modified: llvm/trunk/lib/Target/ARM/ARMInstrNEON.td Modified: llvm/trunk/lib/Target/ARM/ARMInstrNEON.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrNEON.td?rev=119608&r1=119607&r2=119608&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrNEON.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrNEON.td Wed Nov 17 19:39:50 2010 @@ -220,7 +220,7 @@ (ins addrmode6:$Rn, am6offset:$Rm), IIC_VLD1u, "vld1", Dt, "\\{$Vd\\}, $Rn$Rm", "$Rn.addr = $wb", []> { - let Inst{4} = Rn{4}; + let Inst{4} = Rn{4}; } class VLD1QWB op7_4, string Dt> : NLdSt<0,0b10,0b1010,op7_4, (outs DPR:$Vd, DPR:$dst2, GPR:$wb), @@ -1528,7 +1528,7 @@ // 2-register shuffles (VTRN/VZIP/VUZP), both double- and quad-register. class N2VDShuffle op19_18, bits<5> op11_7, string OpcodeStr, string Dt> : N2V<0b11, 0b11, op19_18, 0b10, op11_7, 0, 0, (outs DPR:$dst1, DPR:$dst2), - (ins DPR:$src1, DPR:$src2), IIC_VPERMD, + (ins DPR:$src1, DPR:$src2), IIC_VPERMD, OpcodeStr, Dt, "$dst1, $dst2", "$src1 = $dst1, $src2 = $dst2", []>; class N2VQShuffle op19_18, bits<5> op11_7, @@ -1562,13 +1562,13 @@ ValueType ResTy, ValueType OpTy, SDNode OpNode, bit Commutable> : N3VX{ let isCommutable = Commutable; } -class N3VDSL op21_20, bits<4> op11_8, +class N3VDSL op21_20, bits<4> op11_8, InstrItinClass itin, string OpcodeStr, string Dt, ValueType Ty, SDNode ShOp> : N3V<0, 1, op21_20, op11_8, 1, 0, @@ -1579,7 +1579,7 @@ (Ty (NEONvduplane (Ty DPR_VFP2:$src2),imm:$lane)))))]> { let isCommutable = 0; } -class N3VDSL16 op21_20, bits<4> op11_8, +class N3VDSL16 op21_20, bits<4> op11_8, string OpcodeStr, string Dt, ValueType Ty, SDNode ShOp> : N3V<0, 1, op21_20, op11_8, 1, 0, (outs DPR:$dst), (ins DPR:$src1, DPR_8:$src2, nohash_imm:$lane), @@ -1594,7 +1594,7 @@ InstrItinClass itin, string OpcodeStr, string Dt, ValueType ResTy, ValueType OpTy, SDNode OpNode, bit Commutable> : N3V { let isCommutable = Commutable; @@ -1603,12 +1603,12 @@ InstrItinClass itin, string OpcodeStr, ValueType ResTy, ValueType OpTy, SDNode OpNode, bit Commutable> : N3VX{ let isCommutable = Commutable; } -class N3VQSL op21_20, bits<4> op11_8, +class N3VQSL op21_20, bits<4> op11_8, InstrItinClass itin, string OpcodeStr, string Dt, ValueType ResTy, ValueType OpTy, SDNode ShOp> : N3V<1, 1, op21_20, op11_8, 1, 0, @@ -1642,7 +1642,7 @@ [(set DPR:$Vd, (ResTy (IntOp (OpTy DPR:$Vn), (OpTy DPR:$Vm))))]> { let isCommutable = Commutable; } -class N3VDIntSL op21_20, bits<4> op11_8, InstrItinClass itin, +class N3VDIntSL op21_20, bits<4> op11_8, InstrItinClass itin, string OpcodeStr, string Dt, ValueType Ty, Intrinsic IntOp> : N3V<0, 1, op21_20, op11_8, 1, 0, (outs DPR:$dst), (ins DPR:$src1, DPR_VFP2:$src2, nohash_imm:$lane), @@ -1682,7 +1682,7 @@ [(set QPR:$Vd, (ResTy (IntOp (OpTy QPR:$Vn), (OpTy QPR:$Vm))))]> { let isCommutable = Commutable; } -class N3VQIntSL op21_20, bits<4> op11_8, InstrItinClass itin, +class N3VQIntSL op21_20, bits<4> op11_8, InstrItinClass itin, string OpcodeStr, string Dt, ValueType ResTy, ValueType OpTy, Intrinsic IntOp> : N3V<1, 1, op21_20, op11_8, 1, 0, @@ -1952,7 +1952,7 @@ InstrItinClass itin, string OpcodeStr, string Dt, ValueType TyQ, ValueType TyD, SDNode OpNode> : N3V : N3V { // 64-bit vector types. - def v8i8 : N3VD; def v4i16 : N3VD op24_23, bits<2> op21_20, bits<2> op17_16, - bits<5> op11_7, bit op6, bit op4, + bits<5> op11_7, bit op6, bit op4, InstrItinClass itin, string OpcodeStr, string Dt, SDNode OpNode> { def v8i8 : N2VN op24_23, bits<2> op21_20, bits<2> op17_16, - bits<5> op11_7, bit op6, bit op4, + bits<5> op11_7, bit op6, bit op4, InstrItinClass itin, string OpcodeStr, string Dt, Intrinsic IntOp> { def v8i8 : N2VNInt; } -multiclass N3VIntSL_HS op11_8, +multiclass N3VIntSL_HS op11_8, InstrItinClass itinD16, InstrItinClass itinD32, InstrItinClass itinQ16, InstrItinClass itinQ32, string OpcodeStr, string Dt, Intrinsic IntOp> { @@ -2459,7 +2459,7 @@ def v8i16 : N3VL; - def v4i32 : N3VL; def v2i64 : N3VL; - def v4i32 : N3VLExt; def v2i64 : N3VLExt { - def v4i32 : N3VLInt; def v2i64 : N3VLInt op11_8, InstrItinClass itin, string OpcodeStr, string Dt, Intrinsic IntOp> { - def v4i16 : N3VLIntSL16; def v2i32 : N3VLIntSL; @@ -2534,7 +2534,7 @@ def v8i16 : N3VLIntExt; - def v4i32 : N3VLIntExt; def v2i64 : N3VLIntExt; } -multiclass N3VMulOpSL_HS op11_8, +multiclass N3VMulOpSL_HS op11_8, InstrItinClass itinD16, InstrItinClass itinD32, InstrItinClass itinQ16, InstrItinClass itinQ32, string OpcodeStr, string Dt, SDNode ShOp> { @@ -3030,7 +3030,7 @@ // VQDMULH : Vector Saturating Doubling Multiply Returning High Half defm VQDMULH : N3VInt_HS<0, 0, 0b1011, 0, N3RegFrm, IIC_VMULi16D, IIC_VMULi32D, - IIC_VMULi16Q, IIC_VMULi32Q, + IIC_VMULi16Q, IIC_VMULi32Q, "vqdmulh", "s", int_arm_neon_vqdmulh, 1>; defm VQDMULHsl: N3VIntSL_HS<0b1100, IIC_VMULi16D, IIC_VMULi32D, IIC_VMULi16Q, IIC_VMULi32Q, @@ -3249,7 +3249,7 @@ // VCGE : Vector Compare Greater Than or Equal defm VCGEs : N3V_QHS<0, 0, 0b0011, 1, IIC_VSUBi4D, IIC_VSUBi4D, IIC_VSUBi4Q, IIC_VSUBi4Q, "vcge", "s", NEONvcge, 0>; -defm VCGEu : N3V_QHS<1, 0, 0b0011, 1, IIC_VSUBi4D, IIC_VSUBi4D, IIC_VSUBi4Q, +defm VCGEu : N3V_QHS<1, 0, 0b0011, 1, IIC_VSUBi4D, IIC_VSUBi4D, IIC_VSUBi4Q, IIC_VSUBi4Q, "vcge", "u", NEONvcgeu, 0>; def VCGEfd : N3VD<1,0,0b00,0b1110,0, IIC_VBIND, "vcge", "f32", v2i32, v2f32, NEONvcge, 0>; @@ -3287,7 +3287,7 @@ def VACGTq : N3VQInt<1, 0, 0b10, 0b1110, 1, N3RegFrm, IIC_VBINQ, "vacgt", "f32", v4i32, v4f32, int_arm_neon_vacgtq, 0>; // VTST : Vector Test Bits -defm VTST : N3V_QHS<0, 0, 0b1000, 1, IIC_VBINi4D, IIC_VBINi4D, IIC_VBINi4Q, +defm VTST : N3V_QHS<0, 0, 0b1000, 1, IIC_VBINi4D, IIC_VBINi4D, IIC_VBINi4Q, IIC_VBINi4Q, "vtst", "", NEONvtst, 1>; // Vector Bitwise Operations. @@ -3580,7 +3580,7 @@ def VPADDi32 : N3VDInt<0, 0, 0b10, 0b1011, 1, N3RegFrm, IIC_VSHLiD, "vpadd", "i32", v2i32, v2i32, int_arm_neon_vpadd, 0>; -def VPADDf : N3VDInt<1, 0, 0b00, 0b1101, 0, N3RegFrm, +def VPADDf : N3VDInt<1, 0, 0b00, 0b1101, 0, N3RegFrm, IIC_VPBIND, "vpadd", "f32", v2f32, v2f32, int_arm_neon_vpadd, 0>; @@ -3631,10 +3631,10 @@ // Vector Reciprocal and Reciprocal Square Root Estimate and Step. // VRECPE : Vector Reciprocal Estimate -def VRECPEd : N2VDInt<0b11, 0b11, 0b10, 0b11, 0b01000, 0, +def VRECPEd : N2VDInt<0b11, 0b11, 0b10, 0b11, 0b01000, 0, IIC_VUNAD, "vrecpe", "u32", v2i32, v2i32, int_arm_neon_vrecpe>; -def VRECPEq : N2VQInt<0b11, 0b11, 0b10, 0b11, 0b01000, 0, +def VRECPEq : N2VQInt<0b11, 0b11, 0b10, 0b11, 0b01000, 0, IIC_VUNAQ, "vrecpe", "u32", v4i32, v4i32, int_arm_neon_vrecpe>; def VRECPEfd : N2VDInt<0b11, 0b11, 0b10, 0b11, 0b01010, 0, @@ -3662,7 +3662,7 @@ def VRSQRTEfd : N2VDInt<0b11, 0b11, 0b10, 0b11, 0b01011, 0, IIC_VUNAD, "vrsqrte", "f32", v2f32, v2f32, int_arm_neon_vrsqrte>; -def VRSQRTEfq : N2VQInt<0b11, 0b11, 0b10, 0b11, 0b01011, 0, +def VRSQRTEfq : N2VQInt<0b11, 0b11, 0b10, 0b11, 0b01011, 0, IIC_VUNAQ, "vrsqrte", "f32", v4f32, v4f32, int_arm_neon_vrsqrte>; @@ -3791,7 +3791,7 @@ // Vector Absolute and Saturating Absolute. // VABS : Vector Absolute Value -defm VABS : N2VInt_QHS<0b11, 0b11, 0b01, 0b00110, 0, +defm VABS : N2VInt_QHS<0b11, 0b11, 0b01, 0b00110, 0, IIC_VUNAiD, IIC_VUNAiQ, "vabs", "s", int_arm_neon_vabs>; def VABSfd : N2VDInt<0b11, 0b11, 0b10, 0b01, 0b01110, 0, @@ -3802,7 +3802,7 @@ v4f32, v4f32, int_arm_neon_vabs>; // VQABS : Vector Saturating Absolute Value -defm VQABS : N2VInt_QHS<0b11, 0b11, 0b00, 0b01110, 0, +defm VQABS : N2VInt_QHS<0b11, 0b11, 0b00, 0b01110, 0, IIC_VQUNAiD, IIC_VQUNAiQ, "vqabs", "s", int_arm_neon_vqabs>; @@ -3848,22 +3848,22 @@ def : Pat<(v4i32 (vnegq QPR:$src)), (VNEGs32q QPR:$src)>; // VQNEG : Vector Saturating Negate -defm VQNEG : N2VInt_QHS<0b11, 0b11, 0b00, 0b01111, 0, +defm VQNEG : N2VInt_QHS<0b11, 0b11, 0b00, 0b01111, 0, IIC_VQUNAiD, IIC_VQUNAiQ, "vqneg", "s", int_arm_neon_vqneg>; // Vector Bit Counting Operations. // VCLS : Vector Count Leading Sign Bits -defm VCLS : N2VInt_QHS<0b11, 0b11, 0b00, 0b01000, 0, +defm VCLS : N2VInt_QHS<0b11, 0b11, 0b00, 0b01000, 0, IIC_VCNTiD, IIC_VCNTiQ, "vcls", "s", int_arm_neon_vcls>; // VCLZ : Vector Count Leading Zeros -defm VCLZ : N2VInt_QHS<0b11, 0b11, 0b00, 0b01001, 0, +defm VCLZ : N2VInt_QHS<0b11, 0b11, 0b00, 0b01001, 0, IIC_VCNTiD, IIC_VCNTiQ, "vclz", "i", int_arm_neon_vclz>; // VCNT : Vector Count One Bits -def VCNTd : N2VDInt<0b11, 0b11, 0b00, 0b00, 0b01010, 0, +def VCNTd : N2VDInt<0b11, 0b11, 0b00, 0b00, 0b01010, 0, IIC_VCNTiD, "vcnt", "8", v8i8, v8i8, int_arm_neon_vcnt>; def VCNTq : N2VQInt<0b11, 0b11, 0b00, 0b00, 0b01010, 0, @@ -3913,7 +3913,7 @@ (ins nModImm:$SIMM), IIC_VMOVImm, "vmov", "i16", "$dst, $SIMM", "", [(set DPR:$dst, (v4i16 (NEONvmovImm timm:$SIMM)))]> { - let Inst{9} = SIMM{9}; + let Inst{9} = SIMM{9}; } def VMOVv8i16 : N1ModImm<1, 0b000, {1,0,?,0}, 0, 1, 0, 1, (outs QPR:$dst), @@ -4049,19 +4049,19 @@ } } def : Pat<(vector_insert (v16i8 QPR:$src1), GPR:$src2, imm:$lane), - (v16i8 (INSERT_SUBREG QPR:$src1, + (v16i8 (INSERT_SUBREG QPR:$src1, (v8i8 (VSETLNi8 (v8i8 (EXTRACT_SUBREG QPR:$src1, (DSubReg_i8_reg imm:$lane))), GPR:$src2, (SubReg_i8_lane imm:$lane))), (DSubReg_i8_reg imm:$lane)))>; def : Pat<(vector_insert (v8i16 QPR:$src1), GPR:$src2, imm:$lane), - (v8i16 (INSERT_SUBREG QPR:$src1, + (v8i16 (INSERT_SUBREG QPR:$src1, (v4i16 (VSETLNi16 (v4i16 (EXTRACT_SUBREG QPR:$src1, (DSubReg_i16_reg imm:$lane))), GPR:$src2, (SubReg_i16_lane imm:$lane))), (DSubReg_i16_reg imm:$lane)))>; def : Pat<(insertelt (v4i32 QPR:$src1), GPR:$src2, imm:$lane), - (v4i32 (INSERT_SUBREG QPR:$src1, + (v4i32 (INSERT_SUBREG QPR:$src1, (v2i32 (VSETLNi32 (v2i32 (EXTRACT_SUBREG QPR:$src1, (DSubReg_i32_reg imm:$lane))), GPR:$src2, (SubReg_i32_lane imm:$lane))), @@ -4257,12 +4257,12 @@ class VREV64D op19_18, string OpcodeStr, string Dt, ValueType Ty> : N2V<0b11, 0b11, op19_18, 0b00, 0b00000, 0, 0, (outs DPR:$dst), - (ins DPR:$src), IIC_VMOVD, + (ins DPR:$src), IIC_VMOVD, OpcodeStr, Dt, "$dst, $src", "", [(set DPR:$dst, (Ty (NEONvrev64 (Ty DPR:$src))))]>; class VREV64Q op19_18, string OpcodeStr, string Dt, ValueType Ty> : N2V<0b11, 0b11, op19_18, 0b00, 0b00000, 1, 0, (outs QPR:$dst), - (ins QPR:$src), IIC_VMOVQ, + (ins QPR:$src), IIC_VMOVQ, OpcodeStr, Dt, "$dst, $src", "", [(set QPR:$dst, (Ty (NEONvrev64 (Ty QPR:$src))))]>; @@ -4280,12 +4280,12 @@ class VREV32D op19_18, string OpcodeStr, string Dt, ValueType Ty> : N2V<0b11, 0b11, op19_18, 0b00, 0b00001, 0, 0, (outs DPR:$dst), - (ins DPR:$src), IIC_VMOVD, + (ins DPR:$src), IIC_VMOVD, OpcodeStr, Dt, "$dst, $src", "", [(set DPR:$dst, (Ty (NEONvrev32 (Ty DPR:$src))))]>; class VREV32Q op19_18, string OpcodeStr, string Dt, ValueType Ty> : N2V<0b11, 0b11, op19_18, 0b00, 0b00001, 1, 0, (outs QPR:$dst), - (ins QPR:$src), IIC_VMOVQ, + (ins QPR:$src), IIC_VMOVQ, OpcodeStr, Dt, "$dst, $src", "", [(set QPR:$dst, (Ty (NEONvrev32 (Ty QPR:$src))))]>; @@ -4299,12 +4299,12 @@ class VREV16D op19_18, string OpcodeStr, string Dt, ValueType Ty> : N2V<0b11, 0b11, op19_18, 0b00, 0b00010, 0, 0, (outs DPR:$dst), - (ins DPR:$src), IIC_VMOVD, + (ins DPR:$src), IIC_VMOVD, OpcodeStr, Dt, "$dst, $src", "", [(set DPR:$dst, (Ty (NEONvrev16 (Ty DPR:$src))))]>; class VREV16Q op19_18, string OpcodeStr, string Dt, ValueType Ty> : N2V<0b11, 0b11, op19_18, 0b00, 0b00010, 1, 0, (outs QPR:$dst), - (ins QPR:$src), IIC_VMOVQ, + (ins QPR:$src), IIC_VMOVQ, OpcodeStr, Dt, "$dst, $src", "", [(set QPR:$dst, (Ty (NEONvrev16 (Ty QPR:$src))))]>; From evan.cheng at apple.com Wed Nov 17 19:43:23 2010 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 18 Nov 2010 01:43:23 -0000 Subject: [llvm-commits] [llvm] r119610 - /llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Message-ID: <20101118014323.C5E972A6C12C@llvm.org> Author: evancheng Date: Wed Nov 17 19:43:23 2010 New Revision: 119610 URL: http://llvm.org/viewvc/llvm-project?rev=119610&view=rev Log: Silence compiler warnings. Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=119610&r1=119609&r2=119610&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Wed Nov 17 19:43:23 2010 @@ -1571,9 +1571,9 @@ return false; unsigned UseOpc = UseMI->getOpcode(); - unsigned NewUseOpc; + unsigned NewUseOpc = 0; uint32_t ImmVal = (uint32_t)DefMI->getOperand(1).getImm(); - uint32_t SOImmValV1, SOImmValV2; + uint32_t SOImmValV1 = 0, SOImmValV2 = 0; bool Commute = false; switch (UseOpc) { default: return false; From rafael.espindola at gmail.com Wed Nov 17 20:04:25 2010 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Thu, 18 Nov 2010 02:04:25 -0000 Subject: [llvm-commits] [llvm] r119613 - in /llvm/trunk: include/llvm/MC/MCAsmInfo.h lib/CodeGen/AsmPrinter/DwarfDebug.cpp lib/CodeGen/AsmPrinter/DwarfDebug.h lib/MC/MCAsmInfo.cpp lib/Target/CellSPU/SPUMCAsmInfo.cpp test/CodeGen/X86/unknown-location.ll test/DebugInfo/2010-09-16-EmptyFilename.ll Message-ID: <20101118020425.988862A6C12C@llvm.org> Author: rafael Date: Wed Nov 17 20:04:25 2010 New Revision: 119613 URL: http://llvm.org/viewvc/llvm-project?rev=119613&view=rev Log: Change CodeGen to use .loc directives. This produces a lot more readable output and testing is easier. A good example is the unknown-location.ll test that now can just look for ".loc 1 0 0". We also don't use a DW_LNE_set_address for every address change anymore. Modified: llvm/trunk/include/llvm/MC/MCAsmInfo.h llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h llvm/trunk/lib/MC/MCAsmInfo.cpp llvm/trunk/lib/Target/CellSPU/SPUMCAsmInfo.cpp llvm/trunk/test/CodeGen/X86/unknown-location.ll llvm/trunk/test/DebugInfo/2010-09-16-EmptyFilename.ll Modified: llvm/trunk/include/llvm/MC/MCAsmInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCAsmInfo.h?rev=119613&r1=119612&r2=119613&view=diff ============================================================================== --- llvm/trunk/include/llvm/MC/MCAsmInfo.h (original) +++ llvm/trunk/include/llvm/MC/MCAsmInfo.h Wed Nov 17 20:04:25 2010 @@ -237,10 +237,6 @@ /// HasLEB128 - True if target asm supports leb128 directives. bool HasLEB128; // Defaults to false. - /// hasDotLocAndDotFile - True if target asm supports .loc and .file - /// directives for emitting debugging information. - bool HasDotLocAndDotFile; // Defaults to false. - /// SupportsDebugInformation - True if target supports emission of debugging /// information. bool SupportsDebugInformation; // Defaults to false. @@ -410,9 +406,6 @@ bool hasLEB128() const { return HasLEB128; } - bool hasDotLocAndDotFile() const { - return HasDotLocAndDotFile; - } bool doesSupportDebugInformation() const { return SupportsDebugInformation; } Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp?rev=119613&r1=119612&r2=119613&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp (original) +++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp Wed Nov 17 20:04:25 2010 @@ -514,8 +514,7 @@ unsigned Line = V.getLineNumber(); if (Line == 0) return; - unsigned FileID = GetOrCreateSourceID(V.getContext().getDirectory(), - V.getContext().getFilename()); + unsigned FileID = GetOrCreateSourceID(V.getContext().getFilename()); assert(FileID && "Invalid file id"); addUInt(Die, dwarf::DW_AT_decl_file, 0, FileID); addUInt(Die, dwarf::DW_AT_decl_line, 0, Line); @@ -531,8 +530,7 @@ unsigned Line = G.getLineNumber(); if (Line == 0) return; - unsigned FileID = GetOrCreateSourceID(G.getContext().getDirectory(), - G.getContext().getFilename()); + unsigned FileID = GetOrCreateSourceID(G.getContext().getFilename()); assert(FileID && "Invalid file id"); addUInt(Die, dwarf::DW_AT_decl_file, 0, FileID); addUInt(Die, dwarf::DW_AT_decl_line, 0, Line); @@ -551,8 +549,7 @@ unsigned Line = SP.getLineNumber(); if (!SP.getContext().Verify()) return; - unsigned FileID = GetOrCreateSourceID(SP.getDirectory(), - SP.getFilename()); + unsigned FileID = GetOrCreateSourceID(SP.getFilename()); assert(FileID && "Invalid file id"); addUInt(Die, dwarf::DW_AT_decl_file, 0, FileID); addUInt(Die, dwarf::DW_AT_decl_line, 0, Line); @@ -568,8 +565,7 @@ unsigned Line = Ty.getLineNumber(); if (Line == 0 || !Ty.getContext().Verify()) return; - unsigned FileID = GetOrCreateSourceID(Ty.getDirectory(), - Ty.getFilename()); + unsigned FileID = GetOrCreateSourceID(Ty.getFilename()); assert(FileID && "Invalid file id"); addUInt(Die, dwarf::DW_AT_decl_file, 0, FileID); addUInt(Die, dwarf::DW_AT_decl_line, 0, Line); @@ -586,9 +582,8 @@ if (Line == 0) return; StringRef FN = NS.getFilename(); - StringRef Dir = NS.getDirectory(); - unsigned FileID = GetOrCreateSourceID(Dir, FN); + unsigned FileID = GetOrCreateSourceID(FN); assert(FileID && "Invalid file id"); addUInt(Die, dwarf::DW_AT_decl_file, 0, FileID); addUInt(Die, dwarf::DW_AT_decl_line, 0, Line); @@ -1772,41 +1767,21 @@ /// source file names. If none currently exists, create a new id and insert it /// in the SourceIds map. This can update DirectoryNames and SourceFileNames /// maps as well. -unsigned DwarfDebug::GetOrCreateSourceID(StringRef DirName, StringRef FileName){ - unsigned DId; - assert (DirName.empty() == false && "Invalid directory name!"); +unsigned DwarfDebug::GetOrCreateSourceID(StringRef FileName){ // If FE did not provide a file name, then assume stdin. if (FileName.empty()) - return GetOrCreateSourceID(DirName, ""); + return GetOrCreateSourceID(""); - StringMap::iterator DI = DirectoryIdMap.find(DirName); - if (DI != DirectoryIdMap.end()) { - DId = DI->getValue(); - } else { - DId = DirectoryNames.size() + 1; - DirectoryIdMap[DirName] = DId; - DirectoryNames.push_back(DirName); - } + StringMapEntry &Entry = SourceIdMap.GetOrCreateValue(FileName); + if (Entry.getValue()) + return Entry.getValue(); - unsigned FId; - StringMap::iterator FI = SourceFileIdMap.find(FileName); - if (FI != SourceFileIdMap.end()) { - FId = FI->getValue(); - } else { - FId = SourceFileNames.size() + 1; - SourceFileIdMap[FileName] = FId; - SourceFileNames.push_back(FileName); - } + unsigned SrcId = SourceIdMap.size(); + Entry.setValue(SrcId); - DenseMap, unsigned>::iterator SI = - SourceIdMap.find(std::make_pair(DId, FId)); - if (SI != SourceIdMap.end()) - return SI->second; - - unsigned SrcId = SourceIds.size() + 1; // DW_AT_decl_file cannot be 0. - SourceIdMap[std::make_pair(DId, FId)] = SrcId; - SourceIds.push_back(std::make_pair(DId, FId)); + // Print out a .file directive to specify files for .loc directives. + Asm->OutStreamer.EmitDwarfFileDirective(SrcId, FileName); return SrcId; } @@ -1832,7 +1807,7 @@ DICompileUnit DIUnit(N); StringRef FN = DIUnit.getFilename(); StringRef Dir = DIUnit.getDirectory(); - unsigned ID = GetOrCreateSourceID(Dir, FN); + unsigned ID = GetOrCreateSourceID(FN); DIE *Die = new DIE(dwarf::DW_TAG_compile_unit); addString(Die, dwarf::DW_AT_producer, dwarf::DW_FORM_string, @@ -2079,23 +2054,6 @@ // Prime section data. SectionMap.insert(Asm->getObjFileLowering().getTextSection()); - - // Print out .file directives to specify files for .loc directives. These are - // printed out early so that they precede any .loc directives. - if (Asm->MAI->hasDotLocAndDotFile()) { - for (unsigned i = 1, e = getNumSourceIds()+1; i != e; ++i) { - // Remember source id starts at 1. - std::pair Id = getSourceDirectoryAndFileIds(i); - // FIXME: don't use sys::path for this! This should not depend on the - // host. - sys::Path FullPath(getSourceDirectoryName(Id.first)); - bool AppendOk = - FullPath.appendComponent(getSourceFileName(Id.second)); - assert(AppendOk && "Could not append filename to directory!"); - AppendOk = false; - Asm->OutStreamer.EmitDwarfFileDirective(i, FullPath.str()); - } - } } /// endModule - Emit all Dwarf sections that should come after the content. @@ -2185,9 +2143,6 @@ // Corresponding abbreviations into a abbrev section. emitAbbreviations(); - // Emit source line correspondence into a debug line section. - emitDebugLines(); - // Emit info into a debug pubnames section. emitDebugPubNames(); @@ -2873,17 +2828,6 @@ SmallPtrSet ProcessedVars; collectVariableInfo(MF, ProcessedVars); - // Get function line info. - if (!Lines.empty()) { - // Get section line info. - unsigned ID = SectionMap.insert(Asm->getCurrentSection()); - if (SectionSourceLines.size() < ID) SectionSourceLines.resize(ID); - std::vector &SectionLineInfos = SectionSourceLines[ID-1]; - // Append the function info to section info. - SectionLineInfos.insert(SectionLineInfos.end(), - Lines.begin(), Lines.end()); - } - // Construct abstract scopes. for (SmallVector::iterator AI = AbstractScopesList.begin(), AE = AbstractScopesList.end(); AI != AE; ++AI) { @@ -2934,7 +2878,6 @@ AbstractVariables.clear(); LabelsBeforeInsn.clear(); LabelsAfterInsn.clear(); - Lines.clear(); PrevLabel = NULL; } @@ -2981,7 +2924,6 @@ /// the source line list. MCSymbol *DwarfDebug::recordSourceLine(unsigned Line, unsigned Col, const MDNode *S) { - StringRef Dir; StringRef Fn; unsigned Src = 1; @@ -2990,29 +2932,26 @@ if (Scope.isCompileUnit()) { DICompileUnit CU(S); - Dir = CU.getDirectory(); Fn = CU.getFilename(); } else if (Scope.isFile()) { DIFile F(S); - Dir = F.getDirectory(); Fn = F.getFilename(); } else if (Scope.isSubprogram()) { DISubprogram SP(S); - Dir = SP.getDirectory(); Fn = SP.getFilename(); } else if (Scope.isLexicalBlock()) { DILexicalBlock DB(S); - Dir = DB.getDirectory(); Fn = DB.getFilename(); } else assert(0 && "Unexpected scope info"); - Src = GetOrCreateSourceID(Dir, Fn); + Src = GetOrCreateSourceID(Fn); } - MCSymbol *Label = MMI->getContext().CreateTempSymbol(); - Lines.push_back(SrcLineInfo(Line, Col, Src, Label)); + Asm->OutStreamer.EmitDwarfLocDirective(Src, Line, Col, DWARF2_FLAG_IS_STMT, + 0, 0); + MCSymbol *Label = MMI->getContext().CreateTempSymbol(); Asm->OutStreamer.EmitLabel(Label); return Label; } @@ -3323,185 +3262,6 @@ Asm->EmitInt8(1); } -/// emitDebugLines - Emit source line information. -/// -void DwarfDebug::emitDebugLines() { - // If the target is using .loc/.file, the assembler will be emitting the - // .debug_line table automatically. - if (Asm->MAI->hasDotLocAndDotFile()) - return; - - // Minimum line delta, thus ranging from -10..(255-10). - const int MinLineDelta = -(dwarf::DW_LNS_fixed_advance_pc + 1); - // Maximum line delta, thus ranging from -10..(255-10). - const int MaxLineDelta = 255 + MinLineDelta; - - // Start the dwarf line section. - Asm->OutStreamer.SwitchSection( - Asm->getObjFileLowering().getDwarfLineSection()); - - // Construct the section header. - Asm->OutStreamer.AddComment("Length of Source Line Info"); - Asm->EmitLabelDifference(Asm->GetTempSymbol("line_end"), - Asm->GetTempSymbol("line_begin"), 4); - Asm->OutStreamer.EmitLabel(Asm->GetTempSymbol("line_begin")); - - Asm->OutStreamer.AddComment("DWARF version number"); - Asm->EmitInt16(dwarf::DWARF_VERSION); - - Asm->OutStreamer.AddComment("Prolog Length"); - Asm->EmitLabelDifference(Asm->GetTempSymbol("line_prolog_end"), - Asm->GetTempSymbol("line_prolog_begin"), 4); - Asm->OutStreamer.EmitLabel(Asm->GetTempSymbol("line_prolog_begin")); - - Asm->OutStreamer.AddComment("Minimum Instruction Length"); - Asm->EmitInt8(1); - Asm->OutStreamer.AddComment("Default is_stmt_start flag"); - Asm->EmitInt8(1); - Asm->OutStreamer.AddComment("Line Base Value (Special Opcodes)"); - Asm->EmitInt8(MinLineDelta); - Asm->OutStreamer.AddComment("Line Range Value (Special Opcodes)"); - Asm->EmitInt8(MaxLineDelta); - Asm->OutStreamer.AddComment("Special Opcode Base"); - Asm->EmitInt8(-MinLineDelta); - - // Line number standard opcode encodings argument count - Asm->OutStreamer.AddComment("DW_LNS_copy arg count"); - Asm->EmitInt8(0); - Asm->OutStreamer.AddComment("DW_LNS_advance_pc arg count"); - Asm->EmitInt8(1); - Asm->OutStreamer.AddComment("DW_LNS_advance_line arg count"); - Asm->EmitInt8(1); - Asm->OutStreamer.AddComment("DW_LNS_set_file arg count"); - Asm->EmitInt8(1); - Asm->OutStreamer.AddComment("DW_LNS_set_column arg count"); - Asm->EmitInt8(1); - Asm->OutStreamer.AddComment("DW_LNS_negate_stmt arg count"); - Asm->EmitInt8(0); - Asm->OutStreamer.AddComment("DW_LNS_set_basic_block arg count"); - Asm->EmitInt8(0); - Asm->OutStreamer.AddComment("DW_LNS_const_add_pc arg count"); - Asm->EmitInt8(0); - Asm->OutStreamer.AddComment("DW_LNS_fixed_advance_pc arg count"); - Asm->EmitInt8(1); - - // Emit directories. - for (unsigned DI = 1, DE = getNumSourceDirectories()+1; DI != DE; ++DI) { - const std::string &Dir = getSourceDirectoryName(DI); - if (Asm->isVerbose()) Asm->OutStreamer.AddComment("Directory"); - Asm->OutStreamer.EmitBytes(StringRef(Dir.c_str(), Dir.size()+1), 0); - } - - Asm->OutStreamer.AddComment("End of directories"); - Asm->EmitInt8(0); - - // Emit files. - for (unsigned SI = 1, SE = getNumSourceIds()+1; SI != SE; ++SI) { - // Remember source id starts at 1. - std::pair Id = getSourceDirectoryAndFileIds(SI); - const std::string &FN = getSourceFileName(Id.second); - if (Asm->isVerbose()) Asm->OutStreamer.AddComment("Source"); - Asm->OutStreamer.EmitBytes(StringRef(FN.c_str(), FN.size()+1), 0); - - Asm->EmitULEB128(Id.first, "Directory #"); - Asm->EmitULEB128(0, "Mod date"); - Asm->EmitULEB128(0, "File size"); - } - - Asm->OutStreamer.AddComment("End of files"); - Asm->EmitInt8(0); - - Asm->OutStreamer.EmitLabel(Asm->GetTempSymbol("line_prolog_end")); - - // A sequence for each text section. - unsigned SecSrcLinesSize = SectionSourceLines.size(); - - for (unsigned j = 0; j < SecSrcLinesSize; ++j) { - // Isolate current sections line info. - const std::vector &LineInfos = SectionSourceLines[j]; - - // Dwarf assumes we start with first line of first source file. - unsigned Source = 1; - unsigned Line = 1; - - // Construct rows of the address, source, line, column matrix. - for (unsigned i = 0, N = LineInfos.size(); i < N; ++i) { - const SrcLineInfo &LineInfo = LineInfos[i]; - MCSymbol *Label = LineInfo.getLabel(); - if (!Label->isDefined()) continue; // Not emitted, in dead code. - - if (Asm->isVerbose()) { - std::pair SrcID = - getSourceDirectoryAndFileIds(LineInfo.getSourceID()); - Asm->OutStreamer.AddComment(Twine(getSourceDirectoryName(SrcID.first)) + - "/" + - Twine(getSourceFileName(SrcID.second)) + - ":" + Twine(LineInfo.getLine())); - } - - // Define the line address. - Asm->OutStreamer.AddComment("Extended Op"); - Asm->EmitInt8(0); - Asm->OutStreamer.AddComment("Op size"); - Asm->EmitInt8(Asm->getTargetData().getPointerSize() + 1); - - Asm->OutStreamer.AddComment("DW_LNE_set_address"); - Asm->EmitInt8(dwarf::DW_LNE_set_address); - - Asm->OutStreamer.AddComment("Location label"); - Asm->OutStreamer.EmitSymbolValue(Label, - Asm->getTargetData().getPointerSize(), - 0/*AddrSpace*/); - - // If change of source, then switch to the new source. - if (Source != LineInfo.getSourceID()) { - Source = LineInfo.getSourceID(); - Asm->OutStreamer.AddComment("DW_LNS_set_file"); - Asm->EmitInt8(dwarf::DW_LNS_set_file); - Asm->EmitULEB128(Source, "New Source"); - } - - // If change of line. - if (Line != LineInfo.getLine()) { - // Determine offset. - int Offset = LineInfo.getLine() - Line; - int Delta = Offset - MinLineDelta; - - // Update line. - Line = LineInfo.getLine(); - - // If delta is small enough and in range... - if (Delta >= 0 && Delta < (MaxLineDelta - 1)) { - // ... then use fast opcode. - Asm->OutStreamer.AddComment("Line Delta"); - Asm->EmitInt8(Delta - MinLineDelta); - } else { - // ... otherwise use long hand. - Asm->OutStreamer.AddComment("DW_LNS_advance_line"); - Asm->EmitInt8(dwarf::DW_LNS_advance_line); - Asm->EmitSLEB128(Offset, "Line Offset"); - Asm->OutStreamer.AddComment("DW_LNS_copy"); - Asm->EmitInt8(dwarf::DW_LNS_copy); - } - } else { - // Copy the previous row (different address or source) - Asm->OutStreamer.AddComment("DW_LNS_copy"); - Asm->EmitInt8(dwarf::DW_LNS_copy); - } - } - - emitEndOfLineMatrix(j + 1); - } - - if (SecSrcLinesSize == 0) - // Because we're emitting a debug_line section, we still need a line - // table. The linker and friends expect it to exist. If there's nothing to - // put into it, emit an empty table. - emitEndOfLineMatrix(1); - - Asm->OutStreamer.EmitLabel(Asm->GetTempSymbol("line_end")); -} - /// emitCommonDebugFrame - Emit common frame info into a debug frame section. /// void DwarfDebug::emitCommonDebugFrame() { Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h?rev=119613&r1=119612&r2=119613&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h (original) +++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h Wed Nov 17 20:04:25 2010 @@ -94,30 +94,9 @@ /// std::vector Abbreviations; - /// DirectoryIdMap - Directory name to directory id map. - /// - StringMap DirectoryIdMap; - - /// DirectoryNames - A list of directory names. - SmallVector DirectoryNames; - - /// SourceFileIdMap - Source file name to source file id map. - /// - StringMap SourceFileIdMap; - - /// SourceFileNames - A list of source file names. - SmallVector SourceFileNames; - /// SourceIdMap - Source id map, i.e. pair of directory id and source file /// id mapped to a unique id. - DenseMap, unsigned> SourceIdMap; - - /// SourceIds - Reverse map from source id to directory id + file id pair. - /// - SmallVector, 8> SourceIds; - - /// Lines - List of source line correspondence. - std::vector Lines; + StringMap SourceIdMap; /// DIEBlocks - A list of all the DIEBlocks in use. std::vector DIEBlocks; @@ -136,10 +115,6 @@ /// UniqueVector SectionMap; - /// SectionSourceLines - Tracks line numbers per text section. - /// - std::vector > SectionSourceLines; - // CurrentFnDbgScope - Top level scope for the current function. // DbgScope *CurrentFnDbgScope; @@ -263,35 +238,10 @@ DIEInteger *DIEIntegerOne; private: - - /// getSourceDirectoryAndFileIds - Return the directory and file ids that - /// maps to the source id. Source id starts at 1. - std::pair - getSourceDirectoryAndFileIds(unsigned SId) const { - return SourceIds[SId-1]; - } - - /// getNumSourceDirectories - Return the number of source directories in the - /// debug info. - unsigned getNumSourceDirectories() const { - return DirectoryNames.size(); - } - - /// getSourceDirectoryName - Return the name of the directory corresponding - /// to the id. - const std::string &getSourceDirectoryName(unsigned Id) const { - return DirectoryNames[Id - 1]; - } - - /// getSourceFileName - Return the name of the source file corresponding - /// to the id. - const std::string &getSourceFileName(unsigned Id) const { - return SourceFileNames[Id - 1]; - } /// getNumSourceIds - Return the number of unique source ids. unsigned getNumSourceIds() const { - return SourceIds.size(); + return SourceIdMap.size(); } /// assignAbbrevNumber - Define a unique number for the abbreviation. @@ -479,10 +429,6 @@ /// void emitEndOfLineMatrix(unsigned SectionEnd); - /// emitDebugLines - Emit source line information. - /// - void emitDebugLines(); - /// emitCommonDebugFrame - Emit common frame info into a debug frame section. /// void emitCommonDebugFrame(); @@ -541,9 +487,8 @@ /// GetOrCreateSourceID - Look up the source id with the given directory and /// source file names. If none currently exists, create a new id and insert it - /// in the SourceIds map. This can update DirectoryNames and SourceFileNames - /// maps as well. - unsigned GetOrCreateSourceID(StringRef DirName, StringRef FileName); + /// in the SourceIds map. + unsigned GetOrCreateSourceID(StringRef FullName); /// constructCompileUnit - Create new CompileUnit for the given /// metadata node with tag DW_TAG_compile_unit. @@ -563,12 +508,6 @@ /// the source line list. MCSymbol *recordSourceLine(unsigned Line, unsigned Col, const MDNode *Scope); - /// getSourceLineCount - Return the number of source lines in the debug - /// info. - unsigned getSourceLineCount() const { - return Lines.size(); - } - /// recordVariableFrameIndex - Record a variable's index. void recordVariableFrameIndex(const DbgVariable *V, int Index); Modified: llvm/trunk/lib/MC/MCAsmInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCAsmInfo.cpp?rev=119613&r1=119612&r2=119613&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCAsmInfo.cpp (original) +++ llvm/trunk/lib/MC/MCAsmInfo.cpp Wed Nov 17 20:04:25 2010 @@ -64,7 +64,6 @@ HiddenVisibilityAttr = MCSA_Hidden; ProtectedVisibilityAttr = MCSA_Protected; HasLEB128 = false; - HasDotLocAndDotFile = false; SupportsDebugInformation = false; ExceptionsType = ExceptionHandling::None; DwarfRequiresFrameSection = true; Modified: llvm/trunk/lib/Target/CellSPU/SPUMCAsmInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUMCAsmInfo.cpp?rev=119613&r1=119612&r2=119613&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUMCAsmInfo.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUMCAsmInfo.cpp Wed Nov 17 20:04:25 2010 @@ -24,9 +24,8 @@ GlobalPrefix = ""; PrivateGlobalPrefix = ".L"; - // Has leb128, .loc and .file + // Has leb128 HasLEB128 = true; - HasDotLocAndDotFile = true; SupportsDebugInformation = true; Modified: llvm/trunk/test/CodeGen/X86/unknown-location.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/unknown-location.ll?rev=119613&r1=119612&r2=119613&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/unknown-location.ll (original) +++ llvm/trunk/test/CodeGen/X86/unknown-location.ll Wed Nov 17 20:04:25 2010 @@ -1,15 +1,15 @@ ; RUN: llc < %s -asm-verbose=false -march=x86-64 -use-unknown-locations | FileCheck %s ; The divide instruction does not have a debug location. CodeGen should -; represent this in the debug information. This is checked by a check -; for a label between the code for the add and the code for the divide, -; which indicates that the add's location doesn't spill over unto the -; divide. +; represent this in the debug information. This is done by setting line +; and column to 0 ; CHECK: leal (%rdi,%rsi), %eax +; CHECK-NEXT: .loc 1 0 0 ; CHECK-NEXT: Ltmp ; CHECK-NEXT: cltd ; CHECK-NEXT: idivl %r8d +; CHECK-NEXT: .loc 1 4 3 ; CHECK-NEXT: Ltmp ; CHECK-NEXT: addl %ecx, %eax ; CHECK-NEXT: ret Modified: llvm/trunk/test/DebugInfo/2010-09-16-EmptyFilename.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/2010-09-16-EmptyFilename.ll?rev=119613&r1=119612&r2=119613&view=diff ============================================================================== --- llvm/trunk/test/DebugInfo/2010-09-16-EmptyFilename.ll (original) +++ llvm/trunk/test/DebugInfo/2010-09-16-EmptyFilename.ll Wed Nov 17 20:04:25 2010 @@ -1,8 +1,6 @@ ; RUN: llc -O0 < %s - | FileCheck %s ; Radar 8286101 -; CHECK: File size -; CHECK-NEXT: stdin -; CHECK-NEXT: Directory +; CHECK: .file 2 "" define i32 @foo() nounwind ssp { entry: From echristo at apple.com Wed Nov 17 20:07:34 2010 From: echristo at apple.com (Eric Christopher) Date: Wed, 17 Nov 2010 18:07:34 -0800 Subject: [llvm-commits] [llvm] r119613 - in /llvm/trunk: include/llvm/MC/MCAsmInfo.h lib/CodeGen/AsmPrinter/DwarfDebug.cpp lib/CodeGen/AsmPrinter/DwarfDebug.h lib/MC/MCAsmInfo.cpp lib/Target/CellSPU/SPUMCAsmInfo.cpp test/CodeGen/X86/unknown-location.ll test/DebugInfo/2010-09-16-EmptyFilename.ll In-Reply-To: <20101118020425.988862A6C12C@llvm.org> References: <20101118020425.988862A6C12C@llvm.org> Message-ID: <80356F7A-9227-41D1-9B16-2F63EF65F600@apple.com> On Nov 17, 2010, at 6:04 PM, Rafael Espindola wrote: > Change CodeGen to use .loc directives. This produces a lot more readable output > and testing is easier. A good example is the unknown-location.ll test that > now can just look for ".loc 1 0 0". We also don't use a DW_LNE_set_address for > every address change anymore. Awesome! -eric -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101117/0850ca27/attachment.html From clattner at apple.com Wed Nov 17 20:10:14 2010 From: clattner at apple.com (Chris Lattner) Date: Wed, 17 Nov 2010 18:10:14 -0800 Subject: [llvm-commits] [llvm] r119613 - in /llvm/trunk: include/llvm/MC/MCAsmInfo.h lib/CodeGen/AsmPrinter/DwarfDebug.cpp lib/CodeGen/AsmPrinter/DwarfDebug.h lib/MC/MCAsmInfo.cpp lib/Target/CellSPU/SPUMCAsmInfo.cpp test/CodeGen/X86/unknown-location.ll test/DebugInfo/2010-09-16-EmptyFilename.ll In-Reply-To: <20101118020425.988862A6C12C@llvm.org> References: <20101118020425.988862A6C12C@llvm.org> Message-ID: <7B6ED046-E96B-4C7D-B695-DE509A8DD865@apple.com> On Nov 17, 2010, at 6:04 PM, Rafael Espindola wrote: > Author: rafael > Date: Wed Nov 17 20:04:25 2010 > New Revision: 119613 > > URL: http://llvm.org/viewvc/llvm-project?rev=119613&view=rev > Log: > Change CodeGen to use .loc directives. This produces a lot more readable output > and testing is easier. A good example is the unknown-location.ll test that > now can just look for ".loc 1 0 0". We also don't use a DW_LNE_set_address for > every address change anymore. Yay! So many minuses! :) -Chris From sabre at nondot.org Wed Nov 17 20:15:42 2010 From: sabre at nondot.org (Chris Lattner) Date: Thu, 18 Nov 2010 02:15:42 -0000 Subject: [llvm-commits] [llvm] r119614 - in /llvm/trunk/include/llvm/Support: IRBuilder.h NoFolder.h Message-ID: <20101118021542.5457B2A6C12C@llvm.org> Author: lattner Date: Wed Nov 17 20:15:42 2010 New Revision: 119614 URL: http://llvm.org/viewvc/llvm-project?rev=119614&view=rev Log: patch from Frits van Bommel: The attached patch fixes IRBuilder and the NoFolder class so that when NoFolder is used the instructions it generates are treated just like the ones IRBuilder creates directly (insert into block, assign them a name and debug info, as applicable). It does this by 1) having NoFolder return Instruction*s instead of Value*s, 2) having IRBuilder call Insert(Value, Name) on values obtained from the folder like it does on instructions it creates directly, and 3) adding an Insert(Constant*, const Twine& = "") overload which just returns the constant so that the other folders shouldn't have any extra overhead as long as inlining is enabled. While I was there, I also added some missing (CreateFNeg and various Create*Cast) methods to NoFolder. Modified: llvm/trunk/include/llvm/Support/IRBuilder.h llvm/trunk/include/llvm/Support/NoFolder.h Modified: llvm/trunk/include/llvm/Support/IRBuilder.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/IRBuilder.h?rev=119614&r1=119613&r2=119614&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/IRBuilder.h (original) +++ llvm/trunk/include/llvm/Support/IRBuilder.h Wed Nov 17 20:15:42 2010 @@ -298,6 +298,11 @@ return I; } + /// Insert - No-op overload to handle constants. + Constant *Insert(Constant *C, const Twine& = "") const { + return C; + } + //===--------------------------------------------------------------------===// // Instruction creation methods: Terminators //===--------------------------------------------------------------------===// @@ -400,172 +405,172 @@ Value *CreateAdd(Value *LHS, Value *RHS, const Twine &Name = "") { if (Constant *LC = dyn_cast(LHS)) if (Constant *RC = dyn_cast(RHS)) - return Folder.CreateAdd(LC, RC); + return Insert(Folder.CreateAdd(LC, RC), Name); return Insert(BinaryOperator::CreateAdd(LHS, RHS), Name); } Value *CreateNSWAdd(Value *LHS, Value *RHS, const Twine &Name = "") { if (Constant *LC = dyn_cast(LHS)) if (Constant *RC = dyn_cast(RHS)) - return Folder.CreateNSWAdd(LC, RC); + return Insert(Folder.CreateNSWAdd(LC, RC), Name); return Insert(BinaryOperator::CreateNSWAdd(LHS, RHS), Name); } Value *CreateNUWAdd(Value *LHS, Value *RHS, const Twine &Name = "") { if (Constant *LC = dyn_cast(LHS)) if (Constant *RC = dyn_cast(RHS)) - return Folder.CreateNUWAdd(LC, RC); + return Insert(Folder.CreateNUWAdd(LC, RC), Name); return Insert(BinaryOperator::CreateNUWAdd(LHS, RHS), Name); } Value *CreateFAdd(Value *LHS, Value *RHS, const Twine &Name = "") { if (Constant *LC = dyn_cast(LHS)) if (Constant *RC = dyn_cast(RHS)) - return Folder.CreateFAdd(LC, RC); + return Insert(Folder.CreateFAdd(LC, RC), Name); return Insert(BinaryOperator::CreateFAdd(LHS, RHS), Name); } Value *CreateSub(Value *LHS, Value *RHS, const Twine &Name = "") { if (Constant *LC = dyn_cast(LHS)) if (Constant *RC = dyn_cast(RHS)) - return Folder.CreateSub(LC, RC); + return Insert(Folder.CreateSub(LC, RC), Name); return Insert(BinaryOperator::CreateSub(LHS, RHS), Name); } Value *CreateNSWSub(Value *LHS, Value *RHS, const Twine &Name = "") { if (Constant *LC = dyn_cast(LHS)) if (Constant *RC = dyn_cast(RHS)) - return Folder.CreateNSWSub(LC, RC); + return Insert(Folder.CreateNSWSub(LC, RC), Name); return Insert(BinaryOperator::CreateNSWSub(LHS, RHS), Name); } Value *CreateNUWSub(Value *LHS, Value *RHS, const Twine &Name = "") { if (Constant *LC = dyn_cast(LHS)) if (Constant *RC = dyn_cast(RHS)) - return Folder.CreateNUWSub(LC, RC); + return Insert(Folder.CreateNUWSub(LC, RC), Name); return Insert(BinaryOperator::CreateNUWSub(LHS, RHS), Name); } Value *CreateFSub(Value *LHS, Value *RHS, const Twine &Name = "") { if (Constant *LC = dyn_cast(LHS)) if (Constant *RC = dyn_cast(RHS)) - return Folder.CreateFSub(LC, RC); + return Insert(Folder.CreateFSub(LC, RC), Name); return Insert(BinaryOperator::CreateFSub(LHS, RHS), Name); } Value *CreateMul(Value *LHS, Value *RHS, const Twine &Name = "") { if (Constant *LC = dyn_cast(LHS)) if (Constant *RC = dyn_cast(RHS)) - return Folder.CreateMul(LC, RC); + return Insert(Folder.CreateMul(LC, RC), Name); return Insert(BinaryOperator::CreateMul(LHS, RHS), Name); } Value *CreateNSWMul(Value *LHS, Value *RHS, const Twine &Name = "") { if (Constant *LC = dyn_cast(LHS)) if (Constant *RC = dyn_cast(RHS)) - return Folder.CreateNSWMul(LC, RC); + return Insert(Folder.CreateNSWMul(LC, RC), Name); return Insert(BinaryOperator::CreateNSWMul(LHS, RHS), Name); } Value *CreateNUWMul(Value *LHS, Value *RHS, const Twine &Name = "") { if (Constant *LC = dyn_cast(LHS)) if (Constant *RC = dyn_cast(RHS)) - return Folder.CreateNUWMul(LC, RC); + return Insert(Folder.CreateNUWMul(LC, RC), Name); return Insert(BinaryOperator::CreateNUWMul(LHS, RHS), Name); } Value *CreateFMul(Value *LHS, Value *RHS, const Twine &Name = "") { if (Constant *LC = dyn_cast(LHS)) if (Constant *RC = dyn_cast(RHS)) - return Folder.CreateFMul(LC, RC); + return Insert(Folder.CreateFMul(LC, RC), Name); return Insert(BinaryOperator::CreateFMul(LHS, RHS), Name); } Value *CreateUDiv(Value *LHS, Value *RHS, const Twine &Name = "") { if (Constant *LC = dyn_cast(LHS)) if (Constant *RC = dyn_cast(RHS)) - return Folder.CreateUDiv(LC, RC); + return Insert(Folder.CreateUDiv(LC, RC), Name); return Insert(BinaryOperator::CreateUDiv(LHS, RHS), Name); } Value *CreateSDiv(Value *LHS, Value *RHS, const Twine &Name = "") { if (Constant *LC = dyn_cast(LHS)) if (Constant *RC = dyn_cast(RHS)) - return Folder.CreateSDiv(LC, RC); + return Insert(Folder.CreateSDiv(LC, RC), Name); return Insert(BinaryOperator::CreateSDiv(LHS, RHS), Name); } Value *CreateExactSDiv(Value *LHS, Value *RHS, const Twine &Name = "") { if (Constant *LC = dyn_cast(LHS)) if (Constant *RC = dyn_cast(RHS)) - return Folder.CreateExactSDiv(LC, RC); + return Insert(Folder.CreateExactSDiv(LC, RC), Name); return Insert(BinaryOperator::CreateExactSDiv(LHS, RHS), Name); } Value *CreateFDiv(Value *LHS, Value *RHS, const Twine &Name = "") { if (Constant *LC = dyn_cast(LHS)) if (Constant *RC = dyn_cast(RHS)) - return Folder.CreateFDiv(LC, RC); + return Insert(Folder.CreateFDiv(LC, RC), Name); return Insert(BinaryOperator::CreateFDiv(LHS, RHS), Name); } Value *CreateURem(Value *LHS, Value *RHS, const Twine &Name = "") { if (Constant *LC = dyn_cast(LHS)) if (Constant *RC = dyn_cast(RHS)) - return Folder.CreateURem(LC, RC); + return Insert(Folder.CreateURem(LC, RC), Name); return Insert(BinaryOperator::CreateURem(LHS, RHS), Name); } Value *CreateSRem(Value *LHS, Value *RHS, const Twine &Name = "") { if (Constant *LC = dyn_cast(LHS)) if (Constant *RC = dyn_cast(RHS)) - return Folder.CreateSRem(LC, RC); + return Insert(Folder.CreateSRem(LC, RC), Name); return Insert(BinaryOperator::CreateSRem(LHS, RHS), Name); } Value *CreateFRem(Value *LHS, Value *RHS, const Twine &Name = "") { if (Constant *LC = dyn_cast(LHS)) if (Constant *RC = dyn_cast(RHS)) - return Folder.CreateFRem(LC, RC); + return Insert(Folder.CreateFRem(LC, RC), Name); return Insert(BinaryOperator::CreateFRem(LHS, RHS), Name); } Value *CreateShl(Value *LHS, Value *RHS, const Twine &Name = "") { if (Constant *LC = dyn_cast(LHS)) if (Constant *RC = dyn_cast(RHS)) - return Folder.CreateShl(LC, RC); + return Insert(Folder.CreateShl(LC, RC), Name); return Insert(BinaryOperator::CreateShl(LHS, RHS), Name); } Value *CreateShl(Value *LHS, const APInt &RHS, const Twine &Name = "") { Constant *RHSC = ConstantInt::get(LHS->getType(), RHS); if (Constant *LC = dyn_cast(LHS)) - return Folder.CreateShl(LC, RHSC); + return Insert(Folder.CreateShl(LC, RHSC), Name); return Insert(BinaryOperator::CreateShl(LHS, RHSC), Name); } Value *CreateShl(Value *LHS, uint64_t RHS, const Twine &Name = "") { Constant *RHSC = ConstantInt::get(LHS->getType(), RHS); if (Constant *LC = dyn_cast(LHS)) - return Folder.CreateShl(LC, RHSC); + return Insert(Folder.CreateShl(LC, RHSC), Name); return Insert(BinaryOperator::CreateShl(LHS, RHSC), Name); } Value *CreateLShr(Value *LHS, Value *RHS, const Twine &Name = "") { if (Constant *LC = dyn_cast(LHS)) if (Constant *RC = dyn_cast(RHS)) - return Folder.CreateLShr(LC, RC); + return Insert(Folder.CreateLShr(LC, RC), Name); return Insert(BinaryOperator::CreateLShr(LHS, RHS), Name); } Value *CreateLShr(Value *LHS, const APInt &RHS, const Twine &Name = "") { Constant *RHSC = ConstantInt::get(LHS->getType(), RHS); if (Constant *LC = dyn_cast(LHS)) - return Folder.CreateLShr(LC, RHSC); + return Insert(Folder.CreateLShr(LC, RHSC), Name); return Insert(BinaryOperator::CreateLShr(LHS, RHSC), Name); } Value *CreateLShr(Value *LHS, uint64_t RHS, const Twine &Name = "") { Constant *RHSC = ConstantInt::get(LHS->getType(), RHS); if (Constant *LC = dyn_cast(LHS)) - return Folder.CreateLShr(LC, RHSC); + return Insert(Folder.CreateLShr(LC, RHSC), Name); return Insert(BinaryOperator::CreateLShr(LHS, RHSC), Name); } Value *CreateAShr(Value *LHS, Value *RHS, const Twine &Name = "") { if (Constant *LC = dyn_cast(LHS)) if (Constant *RC = dyn_cast(RHS)) - return Folder.CreateAShr(LC, RC); + return Insert(Folder.CreateAShr(LC, RC), Name); return Insert(BinaryOperator::CreateAShr(LHS, RHS), Name); } Value *CreateAShr(Value *LHS, const APInt &RHS, const Twine &Name = "") { Constant *RHSC = ConstantInt::get(LHS->getType(), RHS); if (Constant *LC = dyn_cast(LHS)) - return Folder.CreateAShr(LC, RHSC); + return Insert(Folder.CreateAShr(LC, RHSC), Name); return Insert(BinaryOperator::CreateAShr(LHS, RHSC), Name); } Value *CreateAShr(Value *LHS, uint64_t RHS, const Twine &Name = "") { Constant *RHSC = ConstantInt::get(LHS->getType(), RHS); if (Constant *LC = dyn_cast(LHS)) - return Folder.CreateAShr(LC, RHSC); + return Insert(Folder.CreateAShr(LC, RHSC), Name); return Insert(BinaryOperator::CreateAShr(LHS, RHSC), Name); } @@ -574,20 +579,20 @@ if (isa(RC) && cast(RC)->isAllOnesValue()) return LHS; // LHS & -1 -> LHS if (Constant *LC = dyn_cast(LHS)) - return Folder.CreateAnd(LC, RC); + return Insert(Folder.CreateAnd(LC, RC), Name); } return Insert(BinaryOperator::CreateAnd(LHS, RHS), Name); } Value *CreateAnd(Value *LHS, const APInt &RHS, const Twine &Name = "") { Constant *RHSC = ConstantInt::get(LHS->getType(), RHS); if (Constant *LC = dyn_cast(LHS)) - return Folder.CreateAnd(LC, RHSC); + return Insert(Folder.CreateAnd(LC, RHSC), Name); return Insert(BinaryOperator::CreateAnd(LHS, RHSC), Name); } Value *CreateAnd(Value *LHS, uint64_t RHS, const Twine &Name = "") { Constant *RHSC = ConstantInt::get(LHS->getType(), RHS); if (Constant *LC = dyn_cast(LHS)) - return Folder.CreateAnd(LC, RHSC); + return Insert(Folder.CreateAnd(LC, RHSC), Name); return Insert(BinaryOperator::CreateAnd(LHS, RHSC), Name); } @@ -596,39 +601,39 @@ if (RC->isNullValue()) return LHS; // LHS | 0 -> LHS if (Constant *LC = dyn_cast(LHS)) - return Folder.CreateOr(LC, RC); + return Insert(Folder.CreateOr(LC, RC), Name); } return Insert(BinaryOperator::CreateOr(LHS, RHS), Name); } Value *CreateOr(Value *LHS, const APInt &RHS, const Twine &Name = "") { Constant *RHSC = ConstantInt::get(LHS->getType(), RHS); if (Constant *LC = dyn_cast(LHS)) - return Folder.CreateOr(LC, RHSC); + return Insert(Folder.CreateOr(LC, RHSC), Name); return Insert(BinaryOperator::CreateOr(LHS, RHSC), Name); } Value *CreateOr(Value *LHS, uint64_t RHS, const Twine &Name = "") { Constant *RHSC = ConstantInt::get(LHS->getType(), RHS); if (Constant *LC = dyn_cast(LHS)) - return Folder.CreateOr(LC, RHSC); + return Insert(Folder.CreateOr(LC, RHSC), Name); return Insert(BinaryOperator::CreateOr(LHS, RHSC), Name); } Value *CreateXor(Value *LHS, Value *RHS, const Twine &Name = "") { if (Constant *LC = dyn_cast(LHS)) if (Constant *RC = dyn_cast(RHS)) - return Folder.CreateXor(LC, RC); + return Insert(Folder.CreateXor(LC, RC), Name); return Insert(BinaryOperator::CreateXor(LHS, RHS), Name); } Value *CreateXor(Value *LHS, const APInt &RHS, const Twine &Name = "") { Constant *RHSC = ConstantInt::get(LHS->getType(), RHS); if (Constant *LC = dyn_cast(LHS)) - return Folder.CreateXor(LC, RHSC); + return Insert(Folder.CreateXor(LC, RHSC), Name); return Insert(BinaryOperator::CreateXor(LHS, RHSC), Name); } Value *CreateXor(Value *LHS, uint64_t RHS, const Twine &Name = "") { Constant *RHSC = ConstantInt::get(LHS->getType(), RHS); if (Constant *LC = dyn_cast(LHS)) - return Folder.CreateXor(LC, RHSC); + return Insert(Folder.CreateXor(LC, RHSC), Name); return Insert(BinaryOperator::CreateXor(LHS, RHSC), Name); } @@ -636,33 +641,33 @@ Value *LHS, Value *RHS, const Twine &Name = "") { if (Constant *LC = dyn_cast(LHS)) if (Constant *RC = dyn_cast(RHS)) - return Folder.CreateBinOp(Opc, LC, RC); + return Insert(Folder.CreateBinOp(Opc, LC, RC), Name); return Insert(BinaryOperator::Create(Opc, LHS, RHS), Name); } Value *CreateNeg(Value *V, const Twine &Name = "") { if (Constant *VC = dyn_cast(V)) - return Folder.CreateNeg(VC); + return Insert(Folder.CreateNeg(VC), Name); return Insert(BinaryOperator::CreateNeg(V), Name); } Value *CreateNSWNeg(Value *V, const Twine &Name = "") { if (Constant *VC = dyn_cast(V)) - return Folder.CreateNSWNeg(VC); + return Insert(Folder.CreateNSWNeg(VC), Name); return Insert(BinaryOperator::CreateNSWNeg(V), Name); } Value *CreateNUWNeg(Value *V, const Twine &Name = "") { if (Constant *VC = dyn_cast(V)) - return Folder.CreateNUWNeg(VC); + return Insert(Folder.CreateNUWNeg(VC), Name); return Insert(BinaryOperator::CreateNUWNeg(V), Name); } Value *CreateFNeg(Value *V, const Twine &Name = "") { if (Constant *VC = dyn_cast(V)) - return Folder.CreateFNeg(VC); + return Insert(Folder.CreateFNeg(VC), Name); return Insert(BinaryOperator::CreateFNeg(V), Name); } Value *CreateNot(Value *V, const Twine &Name = "") { if (Constant *VC = dyn_cast(V)) - return Folder.CreateNot(VC); + return Insert(Folder.CreateNot(VC), Name); return Insert(BinaryOperator::CreateNot(V), Name); } @@ -700,7 +705,9 @@ if (!isa(*i)) break; if (i == IdxEnd) - return Folder.CreateGetElementPtr(PC, &IdxBegin[0], IdxEnd - IdxBegin); + return Insert(Folder.CreateGetElementPtr(PC, &IdxBegin[0], + IdxEnd - IdxBegin), + Name); } return Insert(GetElementPtrInst::Create(Ptr, IdxBegin, IdxEnd), Name); } @@ -715,9 +722,10 @@ if (!isa(*i)) break; if (i == IdxEnd) - return Folder.CreateInBoundsGetElementPtr(PC, - &IdxBegin[0], - IdxEnd - IdxBegin); + return Insert(Folder.CreateInBoundsGetElementPtr(PC, + &IdxBegin[0], + IdxEnd - IdxBegin), + Name); } return Insert(GetElementPtrInst::CreateInBounds(Ptr, IdxBegin, IdxEnd), Name); @@ -725,20 +733,20 @@ Value *CreateGEP(Value *Ptr, Value *Idx, const Twine &Name = "") { if (Constant *PC = dyn_cast(Ptr)) if (Constant *IC = dyn_cast(Idx)) - return Folder.CreateGetElementPtr(PC, &IC, 1); + return Insert(Folder.CreateGetElementPtr(PC, &IC, 1), Name); return Insert(GetElementPtrInst::Create(Ptr, Idx), Name); } Value *CreateInBoundsGEP(Value *Ptr, Value *Idx, const Twine &Name = "") { if (Constant *PC = dyn_cast(Ptr)) if (Constant *IC = dyn_cast(Idx)) - return Folder.CreateInBoundsGetElementPtr(PC, &IC, 1); + return Insert(Folder.CreateInBoundsGetElementPtr(PC, &IC, 1), Name); return Insert(GetElementPtrInst::CreateInBounds(Ptr, Idx), Name); } Value *CreateConstGEP1_32(Value *Ptr, unsigned Idx0, const Twine &Name = "") { Value *Idx = ConstantInt::get(Type::getInt32Ty(Context), Idx0); if (Constant *PC = dyn_cast(Ptr)) - return Folder.CreateGetElementPtr(PC, &Idx, 1); + return Insert(Folder.CreateGetElementPtr(PC, &Idx, 1), Name); return Insert(GetElementPtrInst::Create(Ptr, &Idx, &Idx+1), Name); } @@ -747,7 +755,7 @@ Value *Idx = ConstantInt::get(Type::getInt32Ty(Context), Idx0); if (Constant *PC = dyn_cast(Ptr)) - return Folder.CreateInBoundsGetElementPtr(PC, &Idx, 1); + return Insert(Folder.CreateInBoundsGetElementPtr(PC, &Idx, 1), Name); return Insert(GetElementPtrInst::CreateInBounds(Ptr, &Idx, &Idx+1), Name); } @@ -759,7 +767,7 @@ }; if (Constant *PC = dyn_cast(Ptr)) - return Folder.CreateGetElementPtr(PC, Idxs, 2); + return Insert(Folder.CreateGetElementPtr(PC, Idxs, 2), Name); return Insert(GetElementPtrInst::Create(Ptr, Idxs, Idxs+2), Name); } @@ -771,7 +779,7 @@ }; if (Constant *PC = dyn_cast(Ptr)) - return Folder.CreateInBoundsGetElementPtr(PC, Idxs, 2); + return Insert(Folder.CreateInBoundsGetElementPtr(PC, Idxs, 2), Name); return Insert(GetElementPtrInst::CreateInBounds(Ptr, Idxs, Idxs+2), Name); } @@ -779,7 +787,7 @@ Value *Idx = ConstantInt::get(Type::getInt64Ty(Context), Idx0); if (Constant *PC = dyn_cast(Ptr)) - return Folder.CreateGetElementPtr(PC, &Idx, 1); + return Insert(Folder.CreateGetElementPtr(PC, &Idx, 1), Name); return Insert(GetElementPtrInst::Create(Ptr, &Idx, &Idx+1), Name); } @@ -788,7 +796,7 @@ Value *Idx = ConstantInt::get(Type::getInt64Ty(Context), Idx0); if (Constant *PC = dyn_cast(Ptr)) - return Folder.CreateInBoundsGetElementPtr(PC, &Idx, 1); + return Insert(Folder.CreateInBoundsGetElementPtr(PC, &Idx, 1), Name); return Insert(GetElementPtrInst::CreateInBounds(Ptr, &Idx, &Idx+1), Name); } @@ -800,7 +808,7 @@ }; if (Constant *PC = dyn_cast(Ptr)) - return Folder.CreateGetElementPtr(PC, Idxs, 2); + return Insert(Folder.CreateGetElementPtr(PC, Idxs, 2), Name); return Insert(GetElementPtrInst::Create(Ptr, Idxs, Idxs+2), Name); } @@ -812,7 +820,7 @@ }; if (Constant *PC = dyn_cast(Ptr)) - return Folder.CreateInBoundsGetElementPtr(PC, Idxs, 2); + return Insert(Folder.CreateInBoundsGetElementPtr(PC, Idxs, 2), Name); return Insert(GetElementPtrInst::CreateInBounds(Ptr, Idxs, Idxs+2), Name); } @@ -878,7 +886,7 @@ if (V->getType() == DestTy) return V; if (Constant *VC = dyn_cast(V)) - return Folder.CreateZExtOrBitCast(VC, DestTy); + return Insert(Folder.CreateZExtOrBitCast(VC, DestTy), Name); return Insert(CastInst::CreateZExtOrBitCast(V, DestTy), Name); } Value *CreateSExtOrBitCast(Value *V, const Type *DestTy, @@ -886,7 +894,7 @@ if (V->getType() == DestTy) return V; if (Constant *VC = dyn_cast(V)) - return Folder.CreateSExtOrBitCast(VC, DestTy); + return Insert(Folder.CreateSExtOrBitCast(VC, DestTy), Name); return Insert(CastInst::CreateSExtOrBitCast(V, DestTy), Name); } Value *CreateTruncOrBitCast(Value *V, const Type *DestTy, @@ -894,7 +902,7 @@ if (V->getType() == DestTy) return V; if (Constant *VC = dyn_cast(V)) - return Folder.CreateTruncOrBitCast(VC, DestTy); + return Insert(Folder.CreateTruncOrBitCast(VC, DestTy), Name); return Insert(CastInst::CreateTruncOrBitCast(V, DestTy), Name); } Value *CreateCast(Instruction::CastOps Op, Value *V, const Type *DestTy, @@ -902,7 +910,7 @@ if (V->getType() == DestTy) return V; if (Constant *VC = dyn_cast(V)) - return Folder.CreateCast(Op, VC, DestTy); + return Insert(Folder.CreateCast(Op, VC, DestTy), Name); return Insert(CastInst::Create(Op, V, DestTy), Name); } Value *CreatePointerCast(Value *V, const Type *DestTy, @@ -910,7 +918,7 @@ if (V->getType() == DestTy) return V; if (Constant *VC = dyn_cast(V)) - return Folder.CreatePointerCast(VC, DestTy); + return Insert(Folder.CreatePointerCast(VC, DestTy), Name); return Insert(CastInst::CreatePointerCast(V, DestTy), Name); } Value *CreateIntCast(Value *V, const Type *DestTy, bool isSigned, @@ -918,7 +926,7 @@ if (V->getType() == DestTy) return V; if (Constant *VC = dyn_cast(V)) - return Folder.CreateIntCast(VC, DestTy, isSigned); + return Insert(Folder.CreateIntCast(VC, DestTy, isSigned), Name); return Insert(CastInst::CreateIntegerCast(V, DestTy, isSigned), Name); } private: @@ -930,7 +938,7 @@ if (V->getType() == DestTy) return V; if (Constant *VC = dyn_cast(V)) - return Folder.CreateFPCast(VC, DestTy); + return Insert(Folder.CreateFPCast(VC, DestTy), Name); return Insert(CastInst::CreateFPCast(V, DestTy), Name); } @@ -1016,14 +1024,14 @@ const Twine &Name = "") { if (Constant *LC = dyn_cast(LHS)) if (Constant *RC = dyn_cast(RHS)) - return Folder.CreateICmp(P, LC, RC); + return Insert(Folder.CreateICmp(P, LC, RC), Name); return Insert(new ICmpInst(P, LHS, RHS), Name); } Value *CreateFCmp(CmpInst::Predicate P, Value *LHS, Value *RHS, const Twine &Name = "") { if (Constant *LC = dyn_cast(LHS)) if (Constant *RC = dyn_cast(RHS)) - return Folder.CreateFCmp(P, LC, RC); + return Insert(Folder.CreateFCmp(P, LC, RC), Name); return Insert(new FCmpInst(P, LHS, RHS), Name); } @@ -1073,7 +1081,7 @@ if (Constant *CC = dyn_cast(C)) if (Constant *TC = dyn_cast(True)) if (Constant *FC = dyn_cast(False)) - return Folder.CreateSelect(CC, TC, FC); + return Insert(Folder.CreateSelect(CC, TC, FC), Name); return Insert(SelectInst::Create(C, True, False), Name); } @@ -1085,7 +1093,7 @@ const Twine &Name = "") { if (Constant *VC = dyn_cast(Vec)) if (Constant *IC = dyn_cast(Idx)) - return Folder.CreateExtractElement(VC, IC); + return Insert(Folder.CreateExtractElement(VC, IC), Name); return Insert(ExtractElementInst::Create(Vec, Idx), Name); } @@ -1094,7 +1102,7 @@ if (Constant *VC = dyn_cast(Vec)) if (Constant *NC = dyn_cast(NewElt)) if (Constant *IC = dyn_cast(Idx)) - return Folder.CreateInsertElement(VC, NC, IC); + return Insert(Folder.CreateInsertElement(VC, NC, IC), Name); return Insert(InsertElementInst::Create(Vec, NewElt, Idx), Name); } @@ -1103,14 +1111,14 @@ if (Constant *V1C = dyn_cast(V1)) if (Constant *V2C = dyn_cast(V2)) if (Constant *MC = dyn_cast(Mask)) - return Folder.CreateShuffleVector(V1C, V2C, MC); + return Insert(Folder.CreateShuffleVector(V1C, V2C, MC), Name); return Insert(new ShuffleVectorInst(V1, V2, Mask), Name); } Value *CreateExtractValue(Value *Agg, unsigned Idx, const Twine &Name = "") { if (Constant *AggC = dyn_cast(Agg)) - return Folder.CreateExtractValue(AggC, &Idx, 1); + return Insert(Folder.CreateExtractValue(AggC, &Idx, 1), Name); return Insert(ExtractValueInst::Create(Agg, Idx), Name); } @@ -1120,7 +1128,8 @@ RandomAccessIterator IdxEnd, const Twine &Name = "") { if (Constant *AggC = dyn_cast(Agg)) - return Folder.CreateExtractValue(AggC, IdxBegin, IdxEnd - IdxBegin); + return Insert(Folder.CreateExtractValue(AggC, IdxBegin, IdxEnd-IdxBegin), + Name); return Insert(ExtractValueInst::Create(Agg, IdxBegin, IdxEnd), Name); } @@ -1128,7 +1137,7 @@ const Twine &Name = "") { if (Constant *AggC = dyn_cast(Agg)) if (Constant *ValC = dyn_cast(Val)) - return Folder.CreateInsertValue(AggC, ValC, &Idx, 1); + return Insert(Folder.CreateInsertValue(AggC, ValC, &Idx, 1), Name); return Insert(InsertValueInst::Create(Agg, Val, Idx), Name); } @@ -1139,7 +1148,9 @@ const Twine &Name = "") { if (Constant *AggC = dyn_cast(Agg)) if (Constant *ValC = dyn_cast(Val)) - return Folder.CreateInsertValue(AggC, ValC, IdxBegin, IdxEnd-IdxBegin); + return Insert(Folder.CreateInsertValue(AggC, ValC, IdxBegin, + IdxEnd - IdxBegin), + Name); return Insert(InsertValueInst::Create(Agg, Val, IdxBegin, IdxEnd), Name); } Modified: llvm/trunk/include/llvm/Support/NoFolder.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/NoFolder.h?rev=119614&r1=119613&r2=119614&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/NoFolder.h (original) +++ llvm/trunk/include/llvm/Support/NoFolder.h Wed Nov 17 20:15:42 2010 @@ -15,8 +15,7 @@ // llvm/Analysis/ConstantFolding.h. // // Note: since it is not actually possible to create unfolded constants, this -// class returns values rather than constants. The values do not have names, -// even if names were provided to IRBuilder, which may be confusing. +// class returns instructions rather than constants. // //===----------------------------------------------------------------------===// @@ -30,7 +29,7 @@ class LLVMContext; -/// NoFolder - Create "constants" (actually, values) with no folding. +/// NoFolder - Create "constants" (actually, instructions) with no folding. class NoFolder { public: explicit NoFolder(LLVMContext &) {} @@ -39,84 +38,84 @@ // Binary Operators //===--------------------------------------------------------------------===// - Value *CreateAdd(Constant *LHS, Constant *RHS) const { + Instruction *CreateAdd(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateAdd(LHS, RHS); } - Value *CreateNSWAdd(Constant *LHS, Constant *RHS) const { + Instruction *CreateNSWAdd(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateNSWAdd(LHS, RHS); } - Value *CreateNUWAdd(Constant *LHS, Constant *RHS) const { + Instruction *CreateNUWAdd(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateNUWAdd(LHS, RHS); } - Value *CreateFAdd(Constant *LHS, Constant *RHS) const { + Instruction *CreateFAdd(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateFAdd(LHS, RHS); } - Value *CreateSub(Constant *LHS, Constant *RHS) const { + Instruction *CreateSub(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateSub(LHS, RHS); } - Value *CreateNSWSub(Constant *LHS, Constant *RHS) const { + Instruction *CreateNSWSub(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateNSWSub(LHS, RHS); } - Value *CreateNUWSub(Constant *LHS, Constant *RHS) const { + Instruction *CreateNUWSub(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateNUWSub(LHS, RHS); } - Value *CreateFSub(Constant *LHS, Constant *RHS) const { + Instruction *CreateFSub(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateFSub(LHS, RHS); } - Value *CreateMul(Constant *LHS, Constant *RHS) const { + Instruction *CreateMul(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateMul(LHS, RHS); } - Value *CreateNSWMul(Constant *LHS, Constant *RHS) const { + Instruction *CreateNSWMul(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateNSWMul(LHS, RHS); } - Value *CreateNUWMul(Constant *LHS, Constant *RHS) const { + Instruction *CreateNUWMul(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateNUWMul(LHS, RHS); } - Value *CreateFMul(Constant *LHS, Constant *RHS) const { + Instruction *CreateFMul(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateFMul(LHS, RHS); } - Value *CreateUDiv(Constant *LHS, Constant *RHS) const { + Instruction *CreateUDiv(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateUDiv(LHS, RHS); } - Value *CreateSDiv(Constant *LHS, Constant *RHS) const { + Instruction *CreateSDiv(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateSDiv(LHS, RHS); } - Value *CreateExactSDiv(Constant *LHS, Constant *RHS) const { + Instruction *CreateExactSDiv(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateExactSDiv(LHS, RHS); } - Value *CreateFDiv(Constant *LHS, Constant *RHS) const { + Instruction *CreateFDiv(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateFDiv(LHS, RHS); } - Value *CreateURem(Constant *LHS, Constant *RHS) const { + Instruction *CreateURem(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateURem(LHS, RHS); } - Value *CreateSRem(Constant *LHS, Constant *RHS) const { + Instruction *CreateSRem(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateSRem(LHS, RHS); } - Value *CreateFRem(Constant *LHS, Constant *RHS) const { + Instruction *CreateFRem(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateFRem(LHS, RHS); } - Value *CreateShl(Constant *LHS, Constant *RHS) const { + Instruction *CreateShl(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateShl(LHS, RHS); } - Value *CreateLShr(Constant *LHS, Constant *RHS) const { + Instruction *CreateLShr(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateLShr(LHS, RHS); } - Value *CreateAShr(Constant *LHS, Constant *RHS) const { + Instruction *CreateAShr(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateAShr(LHS, RHS); } - Value *CreateAnd(Constant *LHS, Constant *RHS) const { + Instruction *CreateAnd(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateAnd(LHS, RHS); } - Value *CreateOr(Constant *LHS, Constant *RHS) const { + Instruction *CreateOr(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateOr(LHS, RHS); } - Value *CreateXor(Constant *LHS, Constant *RHS) const { + Instruction *CreateXor(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateXor(LHS, RHS); } - Value *CreateBinOp(Instruction::BinaryOps Opc, - Constant *LHS, Constant *RHS) const { + Instruction *CreateBinOp(Instruction::BinaryOps Opc, + Constant *LHS, Constant *RHS) const { return BinaryOperator::Create(Opc, LHS, RHS); } @@ -124,16 +123,19 @@ // Unary Operators //===--------------------------------------------------------------------===// - Value *CreateNeg(Constant *C) const { + Instruction *CreateNeg(Constant *C) const { return BinaryOperator::CreateNeg(C); } - Value *CreateNSWNeg(Constant *C) const { + Instruction *CreateNSWNeg(Constant *C) const { return BinaryOperator::CreateNSWNeg(C); } - Value *CreateNUWNeg(Constant *C) const { + Instruction *CreateNUWNeg(Constant *C) const { return BinaryOperator::CreateNUWNeg(C); } - Value *CreateNot(Constant *C) const { + Instruction *CreateFNeg(Constant *C) const { + return BinaryOperator::CreateFNeg(C); + } + Instruction *CreateNot(Constant *C) const { return BinaryOperator::CreateNot(C); } @@ -145,8 +147,8 @@ unsigned NumIdx) const { return ConstantExpr::getGetElementPtr(C, IdxList, NumIdx); } - Value *CreateGetElementPtr(Constant *C, Value* const *IdxList, - unsigned NumIdx) const { + Instruction *CreateGetElementPtr(Constant *C, Value* const *IdxList, + unsigned NumIdx) const { return GetElementPtrInst::Create(C, IdxList, IdxList+NumIdx); } @@ -154,8 +156,8 @@ unsigned NumIdx) const { return ConstantExpr::getInBoundsGetElementPtr(C, IdxList, NumIdx); } - Value *CreateInBoundsGetElementPtr(Constant *C, Value* const *IdxList, - unsigned NumIdx) const { + Instruction *CreateInBoundsGetElementPtr(Constant *C, Value* const *IdxList, + unsigned NumIdx) const { return GetElementPtrInst::CreateInBounds(C, IdxList, IdxList+NumIdx); } @@ -163,23 +165,51 @@ // Cast/Conversion Operators //===--------------------------------------------------------------------===// - Value *CreateCast(Instruction::CastOps Op, Constant *C, + Instruction *CreateCast(Instruction::CastOps Op, Constant *C, const Type *DestTy) const { return CastInst::Create(Op, C, DestTy); } - Value *CreateIntCast(Constant *C, const Type *DestTy, + Instruction *CreatePointerCast(Constant *C, const Type *DestTy) const { + return CastInst::CreatePointerCast(C, DestTy); + } + Instruction *CreateIntCast(Constant *C, const Type *DestTy, bool isSigned) const { return CastInst::CreateIntegerCast(C, DestTy, isSigned); } + Instruction *CreateFPCast(Constant *C, const Type *DestTy) const { + return CastInst::CreateFPCast(C, DestTy); + } + + Instruction *CreateBitCast(Constant *C, const Type *DestTy) const { + return CreateCast(Instruction::BitCast, C, DestTy); + } + Instruction *CreateIntToPtr(Constant *C, const Type *DestTy) const { + return CreateCast(Instruction::IntToPtr, C, DestTy); + } + Instruction *CreatePtrToInt(Constant *C, const Type *DestTy) const { + return CreateCast(Instruction::PtrToInt, C, DestTy); + } + Instruction *CreateZExtOrBitCast(Constant *C, const Type *DestTy) const { + return CastInst::CreateZExtOrBitCast(C, DestTy); + } + Instruction *CreateSExtOrBitCast(Constant *C, const Type *DestTy) const { + return CastInst::CreateSExtOrBitCast(C, DestTy); + } + + Instruction *CreateTruncOrBitCast(Constant *C, const Type *DestTy) const { + return CastInst::CreateTruncOrBitCast(C, DestTy); + } //===--------------------------------------------------------------------===// // Compare Instructions //===--------------------------------------------------------------------===// - Value *CreateICmp(CmpInst::Predicate P, Constant *LHS, Constant *RHS) const { + Instruction *CreateICmp(CmpInst::Predicate P, + Constant *LHS, Constant *RHS) const { return new ICmpInst(P, LHS, RHS); } - Value *CreateFCmp(CmpInst::Predicate P, Constant *LHS, Constant *RHS) const { + Instruction *CreateFCmp(CmpInst::Predicate P, + Constant *LHS, Constant *RHS) const { return new FCmpInst(P, LHS, RHS); } @@ -187,30 +217,33 @@ // Other Instructions //===--------------------------------------------------------------------===// - Value *CreateSelect(Constant *C, Constant *True, Constant *False) const { + Instruction *CreateSelect(Constant *C, + Constant *True, Constant *False) const { return SelectInst::Create(C, True, False); } - Value *CreateExtractElement(Constant *Vec, Constant *Idx) const { + Instruction *CreateExtractElement(Constant *Vec, Constant *Idx) const { return ExtractElementInst::Create(Vec, Idx); } - Value *CreateInsertElement(Constant *Vec, Constant *NewElt, - Constant *Idx) const { + Instruction *CreateInsertElement(Constant *Vec, Constant *NewElt, + Constant *Idx) const { return InsertElementInst::Create(Vec, NewElt, Idx); } - Value *CreateShuffleVector(Constant *V1, Constant *V2, Constant *Mask) const { + Instruction *CreateShuffleVector(Constant *V1, Constant *V2, + Constant *Mask) const { return new ShuffleVectorInst(V1, V2, Mask); } - Value *CreateExtractValue(Constant *Agg, const unsigned *IdxList, - unsigned NumIdx) const { + Instruction *CreateExtractValue(Constant *Agg, const unsigned *IdxList, + unsigned NumIdx) const { return ExtractValueInst::Create(Agg, IdxList, IdxList+NumIdx); } - Value *CreateInsertValue(Constant *Agg, Constant *Val, - const unsigned *IdxList, unsigned NumIdx) const { + Instruction *CreateInsertValue(Constant *Agg, Constant *Val, + const unsigned *IdxList, + unsigned NumIdx) const { return InsertValueInst::Create(Agg, Val, IdxList, IdxList+NumIdx); } }; From clattner at apple.com Wed Nov 17 20:17:49 2010 From: clattner at apple.com (Chris Lattner) Date: Wed, 17 Nov 2010 18:17:49 -0800 Subject: [llvm-commits] [PATCH] Fix NoFolder support In-Reply-To: References: Message-ID: Applied in r119614, thanks! On Nov 17, 2010, at 3:19 PM, Frits van Bommel wrote: > The attached patch fixes IRBuilder and the NoFolder class so that when > NoFolder is used the instructions it generates are treated just like > the ones IRBuilder creates directly (insert into block, assign them a > name and debug info, as applicable). > It does this by > 1) having NoFolder return Instruction*s instead of Value*s, > 2) having IRBuilder call Insert(Value, Name) on values obtained from > the folder like it does on instructions it creates directly, and > 3) adding an Insert(Constant*, const Twine& = "") overload which just > returns the constant so that the other folders shouldn't have any > extra overhead as long as inlining is enabled. > > While I was there, I also added some missing (CreateFNeg and various > Create*Cast) methods to NoFolder. > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From clattner at apple.com Wed Nov 17 20:38:24 2010 From: clattner at apple.com (Chris Lattner) Date: Wed, 17 Nov 2010 18:38:24 -0800 Subject: [llvm-commits] [llvm] r118463 - /llvm/trunk/lib/System/DynamicLibrary.cpp In-Reply-To: <58DC2C54-4ACB-434F-BE42-9A677E8BE948@mac.com> References: <20101109003606.EB0F42A6C12C@llvm.org> <5FD84C31-B8FF-4711-87B6-0D870856A018@mac.com> <59821163-9FC5-4806-B93B-B5E1AFFC5CCE@apple.com> <58DC2C54-4ACB-434F-BE42-9A677E8BE948@mac.com> Message-ID: <3C439F13-6333-4908-ABAD-E44EA1E687E3@apple.com> On Nov 17, 2010, at 4:25 PM, Owen Anderson wrote: >> On Nov 9, 2010, at 10:51 AM, Chris Lattner wrote: >> >>> >>> On Nov 9, 2010, at 9:51 AM, Owen Anderson wrote: >>> >>>> >>>> On Nov 8, 2010, at 10:07 PM, Chris Lattner wrote: >>>> >>>>> >>>>> On Nov 8, 2010, at 4:36 PM, Owen Anderson wrote: >>>>> >>>>>> Author: resistor >>>>>> Date: Mon Nov 8 18:36:06 2010 >>>>>> New Revision: 118463 >>>>>> >>>>>> URL: http://llvm.org/viewvc/llvm-project?rev=118463&view=rev >>>>>> Log: >>>>>> Fix PR8441, a thread unsafe static variable in our dynamic library loading facilities. >>>>> >>>>> Hi Owen, >>>>> >>>>> Does SmartMutex cause a static constructor? >>>> >>>> Yes, as does sys::Mutex. Unfortunately, we can't use ManagedStatic here because it would introduce a circular dependency (System --> Support --> System). I feel like we tried to move ManagedStatic to System at some point in the past, and that it didn't work out, but I don't remember why. >>> >>> Why not just depend on threadsafe statics to handle this? Targets that don't support threadsafe statics aren't going to support threads anyway. > > Threadsafe statics won't help here. The mutex needs to be accessible from both LoadLibraryPermanently() and SearchForAddressOfSymbol(), and we can't rely on one of them before called before the other to perform the initialization. static bool DoMyInit() { ... } static void EnsureInitialized() { static bool x = DoMyInit(); } LoadLibraryPermanently() { EnsureInitialized(); ... } SearchForAddressOfSymbol() { EnsureInitialized(); ... } ? -Chris -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101117/4d681587/attachment.html From geek4civic at gmail.com Wed Nov 17 20:50:30 2010 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Thu, 18 Nov 2010 11:50:30 +0900 Subject: [llvm-commits] [llvm-testresults] [llvm] r119600 - /llvm/trunk/unittests/VMCore/ValueMapTest.cpp In-Reply-To: References: <20101118005950.635A32A6C12C@llvm.org> Message-ID: I saw it was reverted in r119606. I have two-way patches. Which(either of two) can we take? Confirmed on CentOS5, VS8 and VS10. * 0001-unittests-CMakeLists.txt-Suppress-building-ValueMapT.patch unittests/CMakeLists.txt: Suppress building ValueMapTest on MSC older than 2010. It seems VS8 and VS9 do not accept *valid* syntax. * 0002-unittests-VMCore-ValueMapTest.cpp-Workaround-It-was-.patch unittests/VMCore/ValueMapTest.cpp: Workaround: It was the cause of syntax error on VS8 and VS9. It seems older MSVCes do not accept the *right* syntax. ...Takumi -------------- next part -------------- A non-text attachment was scrubbed... Name: 0001-unittests-CMakeLists.txt-Suppress-building-ValueMapT.patch Type: application/octet-stream Size: 1073 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101118/c19791b0/attachment.obj -------------- next part -------------- A non-text attachment was scrubbed... Name: 0002-unittests-VMCore-ValueMapTest.cpp-Workaround-It-was-.patch Type: application/octet-stream Size: 10760 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101118/c19791b0/attachment-0001.obj From pichet2000 at gmail.com Wed Nov 17 20:54:58 2010 From: pichet2000 at gmail.com (Francois Pichet) Date: Wed, 17 Nov 2010 21:54:58 -0500 Subject: [llvm-commits] [llvm-testresults] [llvm] r119600 - /llvm/trunk/unittests/VMCore/ValueMapTest.cpp In-Reply-To: References: <20101118005950.635A32A6C12C@llvm.org> Message-ID: On Wed, Nov 17, 2010 at 9:50 PM, NAKAMURA Takumi wrote: > I saw it was reverted in r119606. > > I have two-way patches. Which(either of two) can we take? > Confirmed on CentOS5, VS8 and VS10. > > > * 0001-unittests-CMakeLists.txt-Suppress-building-ValueMapT.patch > > unittests/CMakeLists.txt: Suppress building ValueMapTest on MSC older than 2010. > > It seems VS8 and VS9 do not accept *valid* syntax. ya.. documented bug: http://connect.microsoft.com/VisualStudio/feedback/details/331418/erroneous-error-c2355-this-can-only-be-referenced-inside-non-static-member-functions From sabre at nondot.org Wed Nov 17 20:53:02 2010 From: sabre at nondot.org (Chris Lattner) Date: Thu, 18 Nov 2010 02:53:02 -0000 Subject: [llvm-commits] [llvm] r119676 - /llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp Message-ID: <20101118025302.D653A2A6C12C@llvm.org> Author: lattner Date: Wed Nov 17 20:53:02 2010 New Revision: 119676 URL: http://llvm.org/viewvc/llvm-project?rev=119676&view=rev Log: trivial QoI improvement. On this invalid input: sahf movl 344(%rdi),%r14d we used to produce: t.s:2:1: error: unexpected token in argument list ^ we now produce: t.s:1:11: error: unexpected token in argument list sahf movl 344(%rdi),%r14d ^ rdar://8581401 Modified: llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp Modified: llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp?rev=119676&r1=119675&r2=119676&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp (original) +++ llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp Wed Nov 17 20:53:02 2010 @@ -744,8 +744,9 @@ } if (getLexer().isNot(AsmToken::EndOfStatement)) { + SMLoc Loc = getLexer().getLoc(); Parser.EatToEndOfStatement(); - return TokError("unexpected token in argument list"); + return Error(Loc, "unexpected token in argument list"); } } From clattner at apple.com Wed Nov 17 21:25:40 2010 From: clattner at apple.com (Chris Lattner) Date: Wed, 17 Nov 2010 19:25:40 -0800 Subject: [llvm-commits] [llvm] r116247 - in /llvm/trunk: include/llvm/Support/MathExtras.h include/llvm/System/SwapByteOrder.h unittests/CMakeLists.txt unittests/Support/SwapByteOrderTest.cpp In-Reply-To: <20101011215616.6327D2A6C12E@llvm.org> References: <20101011215616.6327D2A6C12E@llvm.org> Message-ID: <5C9BDA30-F5E9-415B-9D3B-ED72DB610CB2@apple.com> On Oct 11, 2010, at 2:56 PM, Michael J. Spencer wrote: > Author: mspencer > Date: Mon Oct 11 16:56:16 2010 > New Revision: 116247 > > URL: http://llvm.org/viewvc/llvm-project?rev=116247&view=rev > Log: > System: Add SwapByteOrder and update Support/MathExtras.h to use it. Hi Michael, Catching up on back patches here: > + > +template > +inline > +typename enable_if_c + && std::numeric_limits::is_integer, > + value_type>::type > +SwapByteOrder(value_type Value) { > + // No swapping needed. > + return Value; > +} > + > +template > +inline > +typename enable_if_c + && std::numeric_limits::is_integer, > + value_type>::type > +SwapByteOrder(value_type Value) { This seems like *massive* overkill. All the template metaprogramming isn't making the code easier to read and follow, it is making it more verbose and difficult to understand. Instead of defining SwapByteOrder like this, why not just define overloads for signed/unsigned char/short/int/long/long long ? -Chris From lattner at apple.com Wed Nov 17 21:30:20 2010 From: lattner at apple.com (Tanya Lattner) Date: Wed, 17 Nov 2010 19:30:20 -0800 Subject: [llvm-commits] [PATCH] Bug in DAG Combine for ARM shift Message-ID: Attached is a patch and test case for a bug in PerformShiftCombine() when operating on illegal types for shift right/left immediate. Please review and let me know if its ok to commit. Thanks, Tanya -------------- next part -------------- A non-text attachment was scrubbed... Name: shiftCombineBug.patch Type: application/octet-stream Size: 1753 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101117/0e305207/attachment.obj From sabre at nondot.org Thu Nov 18 00:16:44 2010 From: sabre at nondot.org (Chris Lattner) Date: Thu, 18 Nov 2010 06:16:44 -0000 Subject: [llvm-commits] [llvm] r119681 - /llvm/trunk/test/Transforms/ScalarRepl/memcpy-from-global.ll Message-ID: <20101118061644.2346F2A6C12C@llvm.org> Author: lattner Date: Thu Nov 18 00:16:43 2010 New Revision: 119681 URL: http://llvm.org/viewvc/llvm-project?rev=119681&view=rev Log: filecheckize Modified: llvm/trunk/test/Transforms/ScalarRepl/memcpy-from-global.ll Modified: llvm/trunk/test/Transforms/ScalarRepl/memcpy-from-global.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/ScalarRepl/memcpy-from-global.ll?rev=119681&r1=119680&r2=119681&view=diff ============================================================================== --- llvm/trunk/test/Transforms/ScalarRepl/memcpy-from-global.ll (original) +++ llvm/trunk/test/Transforms/ScalarRepl/memcpy-from-global.ll Thu Nov 18 00:16:43 2010 @@ -1,12 +1,19 @@ -; RUN: opt < %s -scalarrepl -S | not grep {call.*memcpy} +; RUN: opt < %s -scalarrepl -S | FileCheck %s target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" @C.0.1248 = internal constant [128 x float] [ float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.00 0000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00 ], align 32 ; <[128 x float]*> [#uses=1] -define float @grad4(i32 %hash, float %x, float %y, float %z, float %w) { +define float @test1(i32 %hash, float %x, float %y, float %z, float %w) { entry: %lookupTable = alloca [128 x float], align 16 ; <[128 x float]*> [#uses=5] %lookupTable1 = bitcast [128 x float]* %lookupTable to i8* ; [#uses=1] call void @llvm.memcpy.i32( i8* %lookupTable1, i8* bitcast ([128 x float]* @C.0.1248 to i8*), i32 512, i32 16 ) + +; CHECK: @test1 +; CHECK-NOT: alloca +; CHECK-NOT: call{{.*}}@llvm.memcpy +; CHECK: %lookupTable1 = bitcast [128 x float]* @C.0.1248 to i8* +; CHECK-NOT: call{{.*}}@llvm.memcpy + %tmp3 = shl i32 %hash, 2 ; [#uses=1] %tmp5 = and i32 %tmp3, 124 ; [#uses=4] %tmp753 = getelementptr [128 x float]* %lookupTable, i32 0, i32 %tmp5 ; [#uses=1] From sabre at nondot.org Thu Nov 18 00:20:47 2010 From: sabre at nondot.org (Chris Lattner) Date: Thu, 18 Nov 2010 06:20:47 -0000 Subject: [llvm-commits] [llvm] r119682 - in /llvm/trunk: lib/Transforms/Scalar/ScalarReplAggregates.cpp test/Transforms/ScalarRepl/memcpy-from-global.ll Message-ID: <20101118062047.CE4E82A6C12C@llvm.org> Author: lattner Date: Thu Nov 18 00:20:47 2010 New Revision: 119682 URL: http://llvm.org/viewvc/llvm-project?rev=119682&view=rev Log: fix a small oversight in the "eliminate memcpy from constant global" optimization. If the alloca that is "memcpy'd from constant" also has a memcpy from *it*, ignore it: it is a load. We now optimize the testcase to: define void @test2() { %B = alloca %T %a = bitcast %T* @G to i8* %b = bitcast %T* %B to i8* call void @llvm.memcpy.p0i8.p0i8.i64(i8* %b, i8* %a, i64 124, i32 4, i1 false) call void @bar(i8* %b) ret void } previously we would generate: define void @test() { %B = alloca %T %b = bitcast %T* %B to i8* %G.0 = getelementptr inbounds %T* @G, i32 0, i32 0 %tmp3 = load i8* %G.0, align 4 %G.1 = getelementptr inbounds %T* @G, i32 0, i32 1 %G.15 = bitcast [123 x i8]* %G.1 to i8* %1 = bitcast [123 x i8]* %G.1 to i984* %srcval = load i984* %1, align 1 %B.0 = getelementptr inbounds %T* %B, i32 0, i32 0 store i8 %tmp3, i8* %B.0, align 4 %B.1 = getelementptr inbounds %T* %B, i32 0, i32 1 %B.12 = bitcast [123 x i8]* %B.1 to i8* %2 = bitcast [123 x i8]* %B.1 to i984* store i984 %srcval, i984* %2, align 1 call void @bar(i8* %b) ret void } Modified: llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp llvm/trunk/test/Transforms/ScalarRepl/memcpy-from-global.ll Modified: llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp?rev=119682&r1=119681&r2=119682&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp Thu Nov 18 00:20:47 2010 @@ -1789,10 +1789,11 @@ for (Value::use_iterator UI = V->use_begin(), E = V->use_end(); UI!=E; ++UI) { User *U = cast(*UI); - if (LoadInst *LI = dyn_cast(U)) + if (LoadInst *LI = dyn_cast(U)) { // Ignore non-volatile loads, they are always ok. - if (!LI->isVolatile()) - continue; + if (LI->isVolatile()) return false; + continue; + } if (BitCastInst *BCI = dyn_cast(U)) { // If uses of the bitcast are ok, we are ok. @@ -1814,6 +1815,13 @@ MemTransferInst *MI = dyn_cast(U); if (MI == 0) return false; + + // If the transfer is using the alloca as a source of the transfer, then + // it (unless the transfer is volatile). + if (UI.getOperandNo() == 1) { + if (MI->isVolatile()) return false; + continue; + } // If we already have seen a copy, reject the second one. if (TheCopy) return false; Modified: llvm/trunk/test/Transforms/ScalarRepl/memcpy-from-global.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/ScalarRepl/memcpy-from-global.ll?rev=119682&r1=119681&r2=119682&view=diff ============================================================================== --- llvm/trunk/test/Transforms/ScalarRepl/memcpy-from-global.ll (original) +++ llvm/trunk/test/Transforms/ScalarRepl/memcpy-from-global.ll Thu Nov 18 00:20:47 2010 @@ -39,3 +39,32 @@ } declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) + + + +declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind + +%T = type { i8, [123 x i8] } + + at G = constant %T {i8 1, [123 x i8] zeroinitializer } + +define void @test2() { + %A = alloca %T + %B = alloca %T + %a = bitcast %T* %A to i8* + %b = bitcast %T* %B to i8* + +; CHECK: @test2 + +; %A alloca is deleted +; CHECK-NEXT: %B = alloca %T + +; use @G instead of %A +; CHECK-NEXT: %a = bitcast %T* @G to i8* + call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a, i8* bitcast (%T* @G to i8*), i64 124, i32 4, i1 false) + call void @llvm.memcpy.p0i8.p0i8.i64(i8* %b, i8* %a, i64 124, i32 4, i1 false) + call void @bar(i8* %b) + ret void +} + +declare void @bar(i8*) From sabre at nondot.org Thu Nov 18 00:26:50 2010 From: sabre at nondot.org (Chris Lattner) Date: Thu, 18 Nov 2010 06:26:50 -0000 Subject: [llvm-commits] [llvm] r119683 - in /llvm/trunk: lib/Transforms/Scalar/ScalarReplAggregates.cpp test/Transforms/ScalarRepl/memcpy-from-global.ll Message-ID: <20101118062650.136072A6C12C@llvm.org> Author: lattner Date: Thu Nov 18 00:26:49 2010 New Revision: 119683 URL: http://llvm.org/viewvc/llvm-project?rev=119683&view=rev Log: enhance the "alloca is just a memcpy from constant global" to ignore calls that obviously can't modify the alloca because they are readonly/readnone. Modified: llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp llvm/trunk/test/Transforms/ScalarRepl/memcpy-from-global.ll Modified: llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp?rev=119683&r1=119682&r2=119683&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp Thu Nov 18 00:26:49 2010 @@ -34,6 +34,7 @@ #include "llvm/Target/TargetData.h" #include "llvm/Transforms/Utils/PromoteMemToReg.h" #include "llvm/Transforms/Utils/Local.h" +#include "llvm/Support/CallSite.h" #include "llvm/Support/Debug.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/GetElementPtrTypeIterator.h" @@ -1810,6 +1811,12 @@ continue; } + // If this is a readonly/readnone call site, then we know it is just a load + // and we can ignore it. + if (CallSite CS = U) + if (CS.onlyReadsMemory()) + continue; + // If this is isn't our memcpy/memmove, reject it as something we can't // handle. MemTransferInst *MI = dyn_cast(U); Modified: llvm/trunk/test/Transforms/ScalarRepl/memcpy-from-global.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/ScalarRepl/memcpy-from-global.ll?rev=119683&r1=119682&r2=119683&view=diff ============================================================================== --- llvm/trunk/test/Transforms/ScalarRepl/memcpy-from-global.ll (original) +++ llvm/trunk/test/Transforms/ScalarRepl/memcpy-from-global.ll Thu Nov 18 00:26:49 2010 @@ -68,3 +68,16 @@ } declare void @bar(i8*) + + +;; Should be able to eliminate the alloca. +define void @test3() { + %A = alloca %T + %a = bitcast %T* %A to i8* + call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a, i8* bitcast (%T* @G to i8*), i64 124, i32 4, i1 false) + call void @bar(i8* %a) readonly +; CHECK: @test3 +; CHECK-NEXT: %a = bitcast %T* @G to i8* +; CHECK-NEXT: call void @bar(i8* %a) + ret void +} From sabre at nondot.org Thu Nov 18 00:41:51 2010 From: sabre at nondot.org (Chris Lattner) Date: Thu, 18 Nov 2010 06:41:51 -0000 Subject: [llvm-commits] [llvm] r119686 - in /llvm/trunk: lib/Transforms/Scalar/ScalarReplAggregates.cpp test/Transforms/ScalarRepl/memcpy-from-global.ll Message-ID: <20101118064151.8EB012A6C12C@llvm.org> Author: lattner Date: Thu Nov 18 00:41:51 2010 New Revision: 119686 URL: http://llvm.org/viewvc/llvm-project?rev=119686&view=rev Log: allow eliminating an alloca that is just copied from an constant global if it is passed as a byval argument. The byval argument will just be a read, so it is safe to read from the original global instead. This allows us to promote away the %agg.tmp alloca in PR8582 Modified: llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp llvm/trunk/test/Transforms/ScalarRepl/memcpy-from-global.ll Modified: llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp?rev=119686&r1=119685&r2=119686&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp Thu Nov 18 00:41:51 2010 @@ -1811,11 +1811,18 @@ continue; } - // If this is a readonly/readnone call site, then we know it is just a load - // and we can ignore it. - if (CallSite CS = U) + if (CallSite CS = U) { + // If this is a readonly/readnone call site, then we know it is just a + // load and we can ignore it. if (CS.onlyReadsMemory()) continue; + + // If this is being passed as a byval argument, the caller is making a + // copy, so it is only a read of the alloca. + unsigned ArgNo = CS.getArgumentNo(UI); + if (CS.paramHasAttr(ArgNo+1, Attribute::ByVal)) + continue; + } // If this is isn't our memcpy/memmove, reject it as something we can't // handle. Modified: llvm/trunk/test/Transforms/ScalarRepl/memcpy-from-global.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/ScalarRepl/memcpy-from-global.ll?rev=119686&r1=119685&r2=119686&view=diff ============================================================================== --- llvm/trunk/test/Transforms/ScalarRepl/memcpy-from-global.ll (original) +++ llvm/trunk/test/Transforms/ScalarRepl/memcpy-from-global.ll Thu Nov 18 00:41:51 2010 @@ -81,3 +81,16 @@ ; CHECK-NEXT: call void @bar(i8* %a) ret void } + +define void @test4() { + %A = alloca %T + %a = bitcast %T* %A to i8* + call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a, i8* bitcast (%T* @G to i8*), i64 124, i32 4, i1 false) + call void @baz(i8* byval %a) +; CHECK: @test4 +; CHECK-NEXT: %a = bitcast %T* @G to i8* +; CHECK-NEXT: call void @baz(i8* byval %a) + ret void +} + +declare void @baz(i8* byval) From bigcheesegs at gmail.com Thu Nov 18 00:59:38 2010 From: bigcheesegs at gmail.com (Michael Spencer) Date: Thu, 18 Nov 2010 01:59:38 -0500 Subject: [llvm-commits] [llvm] r116247 - in /llvm/trunk: include/llvm/Support/MathExtras.h include/llvm/System/SwapByteOrder.h unittests/CMakeLists.txt unittests/Support/SwapByteOrderTest.cpp In-Reply-To: <5C9BDA30-F5E9-415B-9D3B-ED72DB610CB2@apple.com> References: <20101011215616.6327D2A6C12E@llvm.org> <5C9BDA30-F5E9-415B-9D3B-ED72DB610CB2@apple.com> Message-ID: On Wed, Nov 17, 2010 at 10:25 PM, Chris Lattner wrote: > > On Oct 11, 2010, at 2:56 PM, Michael J. Spencer wrote: > >> Author: mspencer >> Date: Mon Oct 11 16:56:16 2010 >> New Revision: 116247 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=116247&view=rev >> Log: >> System: Add SwapByteOrder and update Support/MathExtras.h to use it. > > Hi Michael, > > Catching up on back patches here: > >> + >> +template >> +inline >> +typename enable_if_c> + ? ? ? ? ? ? ? ? ? ? && std::numeric_limits::is_integer, >> + ? ? ? ? ? ? ? ? ? ? value_type>::type >> +SwapByteOrder(value_type Value) { >> + ?// No swapping needed. >> + ?return Value; >> +} >> + >> +template >> +inline >> +typename enable_if_c> + ? ? ? ? ? ? ? ? ? ? && std::numeric_limits::is_integer, >> + ? ? ? ? ? ? ? ? ? ? value_type>::type >> +SwapByteOrder(value_type Value) { > > This seems like *massive* overkill. ?All the template metaprogramming isn't making the code easier to read and follow, it is making it more verbose and difficult to understand. ?Instead of defining SwapByteOrder like this, why not just define overloads for signed/unsigned char/short/int/long/long long ?? > > -Chris These were added due to concerns about which types were accepted. This seemed like the cleanest and most explicit way to say what the intent of each function was. Adding all of those overloads seems more complicated to me than this, but I'm fine either way. As long as there are no surprises to the user. - Michael Spencer From sabre at nondot.org Thu Nov 18 01:02:38 2010 From: sabre at nondot.org (Chris Lattner) Date: Thu, 18 Nov 2010 07:02:38 -0000 Subject: [llvm-commits] [llvm] r119687 - /llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp Message-ID: <20101118070238.0ABB12A6C12C@llvm.org> Author: lattner Date: Thu Nov 18 01:02:37 2010 New Revision: 119687 URL: http://llvm.org/viewvc/llvm-project?rev=119687&view=rev Log: rearrange some code, splitting memcpy/memcpy optimization out of processMemCpy into its own function. Modified: llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp Modified: llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp?rev=119687&r1=119686&r2=119687&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp Thu Nov 18 01:02:37 2010 @@ -325,6 +325,8 @@ bool processMemMove(MemMoveInst *M); bool performCallSlotOptzn(Instruction *cpy, Value *cpyDst, Value *cpySrc, uint64_t cpyLen, CallInst *C); + bool processMemCpyMemCpyDependence(MemCpyInst *M, MemCpyInst *MDep, + uint64_t MSize); bool iterateOnFunction(Function &F); }; @@ -665,61 +667,34 @@ return true; } -/// processMemCpy - perform simplification of memcpy's. If we have memcpy A -/// which copies X to Y, and memcpy B which copies Y to Z, then we can rewrite -/// B to be a memcpy from X to Z (or potentially a memmove, depending on -/// circumstances). This allows later passes to remove the first memcpy -/// altogether. -bool MemCpyOpt::processMemCpy(MemCpyInst *M) { - MemoryDependenceAnalysis &MD = getAnalysis(); - - // We can only optimize statically-sized memcpy's. - ConstantInt *cpyLen = dyn_cast(M->getLength()); - if (!cpyLen) return false; - - // The are two possible optimizations we can do for memcpy: - // a) memcpy-memcpy xform which exposes redundance for DSE. - // b) call-memcpy xform for return slot optimization. - MemDepResult dep = MD.getDependency(M); - if (!dep.isClobber()) - return false; - if (!isa(dep.getInst())) { - if (CallInst *C = dyn_cast(dep.getInst())) { - bool changed = performCallSlotOptzn(M, M->getDest(), M->getSource(), - cpyLen->getZExtValue(), C); - if (changed) M->eraseFromParent(); - return changed; - } - return false; - } - - MemCpyInst *MDep = cast(dep.getInst()); - +/// processMemCpyMemCpyDependence - We've found that the (upward scanning) +/// memory dependence of memcpy 'M' is the memcpy 'MDep'. Try to simplify M to +/// copy from MDep's input if we can. MSize is the size of M's copy. +/// +bool MemCpyOpt::processMemCpyMemCpyDependence(MemCpyInst *M, MemCpyInst *MDep, + uint64_t MSize) { // We can only transforms memcpy's where the dest of one is the source of the - // other + // other. if (M->getSource() != MDep->getDest()) return false; // Second, the length of the memcpy's must be the same, or the preceeding one // must be larger than the following one. ConstantInt *C1 = dyn_cast(MDep->getLength()); - ConstantInt *C2 = dyn_cast(M->getLength()); - if (!C1 || !C2) - return false; + if (!C1) return false; uint64_t DepSize = C1->getValue().getZExtValue(); - uint64_t CpySize = C2->getValue().getZExtValue(); - if (DepSize < CpySize) + if (DepSize < MSize) return false; // Finally, we have to make sure that the dest of the second does not // alias the source of the first AliasAnalysis &AA = getAnalysis(); - if (AA.alias(M->getRawDest(), CpySize, MDep->getRawSource(), DepSize) != + if (AA.alias(M->getRawDest(), MSize, MDep->getRawSource(), DepSize) != AliasAnalysis::NoAlias) return false; - else if (AA.alias(M->getRawDest(), CpySize, M->getRawSource(), CpySize) != + else if (AA.alias(M->getRawDest(), MSize, M->getRawSource(), MSize) != AliasAnalysis::NoAlias) return false; else if (AA.alias(MDep->getRawDest(), DepSize, MDep->getRawSource(), DepSize) @@ -728,12 +703,12 @@ // If all checks passed, then we can transform these memcpy's const Type *ArgTys[3] = { M->getRawDest()->getType(), - MDep->getRawSource()->getType(), - M->getLength()->getType() }; - Function *MemCpyFun = Intrinsic::getDeclaration( - M->getParent()->getParent()->getParent(), - M->getIntrinsicID(), ArgTys, 3); - + MDep->getRawSource()->getType(), + M->getLength()->getType() }; + Function *MemCpyFun = + Intrinsic::getDeclaration(M->getParent()->getParent()->getParent(), + M->getIntrinsicID(), ArgTys, 3); + // Make sure to use the lesser of the alignment of the source and the dest // since we're changing where we're reading from, but don't want to increase // the alignment past what can be read from or written to. @@ -749,9 +724,13 @@ }; CallInst *C = CallInst::Create(MemCpyFun, Args, Args+5, "", M); + + MemoryDependenceAnalysis &MD = getAnalysis(); + // If C and M don't interfere, then this is a valid transformation. If they // did, this would mean that the two sources overlap, which would be bad. - if (MD.getDependency(C) == dep) { + MemDepResult dep = MD.getDependency(C); + if (dep.isClobber() && dep.getInst() == MDep) { MD.removeInstruction(M); M->eraseFromParent(); ++NumMemCpyInstr; @@ -765,6 +744,38 @@ return false; } + +/// processMemCpy - perform simplification of memcpy's. If we have memcpy A +/// which copies X to Y, and memcpy B which copies Y to Z, then we can rewrite +/// B to be a memcpy from X to Z (or potentially a memmove, depending on +/// circumstances). This allows later passes to remove the first memcpy +/// altogether. +bool MemCpyOpt::processMemCpy(MemCpyInst *M) { + MemoryDependenceAnalysis &MD = getAnalysis(); + + // We can only optimize statically-sized memcpy's. + ConstantInt *cpyLen = dyn_cast(M->getLength()); + if (!cpyLen) return false; + + // The are two possible optimizations we can do for memcpy: + // a) memcpy-memcpy xform which exposes redundance for DSE. + // b) call-memcpy xform for return slot optimization. + MemDepResult dep = MD.getDependency(M); + if (!dep.isClobber()) + return false; + + if (MemCpyInst *MDep = dyn_cast(dep.getInst())) + return processMemCpyMemCpyDependence(M, MDep, cpyLen->getZExtValue()); + + if (CallInst *C = dyn_cast(dep.getInst())) { + bool changed = performCallSlotOptzn(M, M->getDest(), M->getSource(), + cpyLen->getZExtValue(), C); + if (changed) M->eraseFromParent(); + return changed; + } + return false; +} + /// processMemMove - Transforms memmove calls to memcpy calls when the src/dst /// are guaranteed not to alias. bool MemCpyOpt::processMemMove(MemMoveInst *M) { From baldrick at free.fr Thu Nov 18 01:09:13 2010 From: baldrick at free.fr (Duncan Sands) Date: Thu, 18 Nov 2010 08:09:13 +0100 Subject: [llvm-commits] [llvm] r119682 - in /llvm/trunk: lib/Transforms/Scalar/ScalarReplAggregates.cpp test/Transforms/ScalarRepl/memcpy-from-global.ll In-Reply-To: <20101118062047.CE4E82A6C12C@llvm.org> References: <20101118062047.CE4E82A6C12C@llvm.org> Message-ID: <4CE4D119.4040600@free.fr> Hi Chris, > --- llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp (original) > +++ llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp Thu Nov 18 00:20:47 2010 > @@ -1814,6 +1815,13 @@ > MemTransferInst *MI = dyn_cast(U); > if (MI == 0) > return false; > + > + // If the transfer is using the alloca as a source of the transfer, then > + // it (unless the transfer is volatile). this comment doesn't parse! Perhaps "then it" -> "then ignore it". Ciao, Duncan. From aggarwa4 at illinois.edu Thu Nov 18 01:13:14 2010 From: aggarwa4 at illinois.edu (Arushi Aggarwal) Date: Thu, 18 Nov 2010 07:13:14 -0000 Subject: [llvm-commits] [poolalloc] r119688 - /poolalloc/trunk/test/dsa/callgraph/scc.ll Message-ID: <20101118071314.C20292A6C12C@llvm.org> Author: aggarwa4 Date: Thu Nov 18 01:13:14 2010 New Revision: 119688 URL: http://llvm.org/viewvc/llvm-project?rev=119688&view=rev Log: To test that the correct call graph is reported for SCCs. The call graph for each call site gives the leader of the SCC that might be callable, and we must then iterate through the SCC to get the actual callees. Also, we must iterate through the SCC for the caller function. Added: poolalloc/trunk/test/dsa/callgraph/scc.ll Added: poolalloc/trunk/test/dsa/callgraph/scc.ll URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/test/dsa/callgraph/scc.ll?rev=119688&view=auto ============================================================================== --- poolalloc/trunk/test/dsa/callgraph/scc.ll (added) +++ poolalloc/trunk/test/dsa/callgraph/scc.ll Thu Nov 18 01:13:14 2010 @@ -0,0 +1,41 @@ +;RUN: dsaopt %s -dsa-cbu -analyze -check-callees=B,A +;RUN: dsaopt %s -dsa-bu -analyze -check-callees=A,B +; ModuleID = 'scc.o' +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-unknown-linux-gnu" + +define void @A() nounwind { +entry: + call void (...)* bitcast (void ()* @B to void (...)*)() nounwind + br label %return + +return: ; preds = %entry + ret void +} + +define void @B() nounwind { +entry: + call void @A() nounwind + br label %return + +return: ; preds = %entry + ret void +} + +define void @D() nounwind { +entry: + call void (...)* bitcast (void ()* @C to void (...)*)() nounwind + br label %return + +return: ; preds = %entry + ret void +} + +define void @C() nounwind { +entry: + call void @D() nounwind + br label %return + +return: ; preds = %entry + ret void +} From aggarwa4 at illinois.edu Thu Nov 18 01:23:12 2010 From: aggarwa4 at illinois.edu (Arushi Aggarwal) Date: Thu, 18 Nov 2010 07:23:12 -0000 Subject: [llvm-commits] [poolalloc] r119689 - in /poolalloc/trunk: include/dsa/DSCallGraph.h lib/DSA/DSTest.cpp test/dsa/callgraph/scc1.ll Message-ID: <20101118072312.86FE02A6C12C@llvm.org> Author: aggarwa4 Date: Thu Nov 18 01:23:12 2010 New Revision: 119689 URL: http://llvm.org/viewvc/llvm-project?rev=119689&view=rev Log: Fix testing for callgraphs with SCCs. Add testcase for the same. Header file change to support getting the leader for the SCC, given a function. Added: poolalloc/trunk/test/dsa/callgraph/scc1.ll Modified: poolalloc/trunk/include/dsa/DSCallGraph.h poolalloc/trunk/lib/DSA/DSTest.cpp Modified: poolalloc/trunk/include/dsa/DSCallGraph.h URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/dsa/DSCallGraph.h?rev=119689&r1=119688&r2=119689&view=diff ============================================================================== --- poolalloc/trunk/include/dsa/DSCallGraph.h (original) +++ poolalloc/trunk/include/dsa/DSCallGraph.h Thu Nov 18 01:23:12 2010 @@ -141,8 +141,10 @@ assert(F == SCCs.getLeaderValue(F) && "Requested non-leader"); return SCCs.member_end(); } - - + + const llvm::Function* sccLeader(llvm::Function*F) const { + return SCCs.getLeaderValue(F); + } unsigned callee_size(llvm::CallSite CS) const { ActualCalleesTy::const_iterator ii = ActualCallees.find(CS); if (ii == ActualCallees.end()) Modified: poolalloc/trunk/lib/DSA/DSTest.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/DSTest.cpp?rev=119689&r1=119688&r2=119689&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/DSTest.cpp (original) +++ poolalloc/trunk/lib/DSA/DSTest.cpp Thu Nov 18 01:23:12 2010 @@ -564,19 +564,24 @@ ++I; while(I != E ){ std::string &func = *(I); - Function *callee = M->getFunction(func); + const Function *callee = M->getFunction(func); bool found = false; - // either the callee is found in the DSGraph - for(DSCallGraph::flat_iterator CI = callgraph.flat_callee_begin(caller); CI != callgraph.flat_callee_end(caller); CI ++) { - if (callee == *CI) - found = true; - //(*CI)->dump(); - } - // or the callee is in the same SCC as the caller, and hence does not show up - for(DSCallGraph::scc_iterator sccii = callgraph.scc_begin(caller), sccee = callgraph.scc_end(caller); sccii != sccee; ++sccii) { + + Function const*leader = callgraph.sccLeader(&*caller); + // either the callee is in the same SCC as the caller, and hence does not show up + for(DSCallGraph::scc_iterator sccii = callgraph.scc_begin(leader), sccee = callgraph.scc_end(leader); sccii != sccee; ++sccii) { if(callee == *sccii) found = true; } + // or the callee is found in the DSCallGraph + for(DSCallGraph::flat_iterator CI = callgraph.flat_callee_begin(caller); CI != callgraph.flat_callee_end(caller); CI ++) { + if (callee == *CI) + found = true; + for(DSCallGraph::scc_iterator sccii = callgraph.scc_begin(*CI), sccee = callgraph.scc_end(*CI); sccii != sccee; ++sccii) { + if(callee == *sccii) + found = true; + } + } assert(found && "callee not in call graph"); ++I; } Added: poolalloc/trunk/test/dsa/callgraph/scc1.ll URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/test/dsa/callgraph/scc1.ll?rev=119689&view=auto ============================================================================== --- poolalloc/trunk/test/dsa/callgraph/scc1.ll (added) +++ poolalloc/trunk/test/dsa/callgraph/scc1.ll Thu Nov 18 01:23:12 2010 @@ -0,0 +1,33 @@ +;RUN: dsaopt %s -dsa-cbu -analyze -check-callees=C,A,B + +; ModuleID = 'scc.o' +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-unknown-linux-gnu" + +define internal void @A() nounwind { +entry: + call void (...)* bitcast (void ()* @B to void (...)*)() nounwind + br label %return + +return: ; preds = %entry + ret void +} + +define internal void @B() nounwind { +entry: + call void @A() nounwind + br label %return + +return: ; preds = %entry + ret void +} + +define internal void @C() nounwind { +entry: + call void @A() nounwind + call void @B() nounwind + br label %return + +return: ; preds = %entry + ret void +} From sabre at nondot.org Thu Nov 18 01:32:33 2010 From: sabre at nondot.org (Chris Lattner) Date: Thu, 18 Nov 2010 07:32:33 -0000 Subject: [llvm-commits] [llvm] r119690 - /llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp Message-ID: <20101118073233.5221B2A6C12C@llvm.org> Author: lattner Date: Thu Nov 18 01:32:33 2010 New Revision: 119690 URL: http://llvm.org/viewvc/llvm-project?rev=119690&view=rev Log: finish a thought. Modified: llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp Modified: llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp?rev=119690&r1=119689&r2=119690&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp Thu Nov 18 01:32:33 2010 @@ -1831,7 +1831,7 @@ return false; // If the transfer is using the alloca as a source of the transfer, then - // it (unless the transfer is volatile). + // ignore it since it is a load (unless the transfer is volatile). if (UI.getOperandNo() == 1) { if (MI->isVolatile()) return false; continue; From sabre at nondot.org Thu Nov 18 01:38:43 2010 From: sabre at nondot.org (Chris Lattner) Date: Thu, 18 Nov 2010 07:38:43 -0000 Subject: [llvm-commits] [llvm] r119691 - /llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp Message-ID: <20101118073843.7B37F2A6C12C@llvm.org> Author: lattner Date: Thu Nov 18 01:38:43 2010 New Revision: 119691 URL: http://llvm.org/viewvc/llvm-project?rev=119691&view=rev Log: use AA::isNoAlias instead of open coding it. Remove an extraneous noalias check: there is no need to check to see if the source and dest of a memcpy are noalias, behavior is undefined if not. Modified: llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp Modified: llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp?rev=119691&r1=119690&r2=119691&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp Thu Nov 18 01:38:43 2010 @@ -689,22 +689,18 @@ return false; // Finally, we have to make sure that the dest of the second does not - // alias the source of the first + // alias the source of the first. AliasAnalysis &AA = getAnalysis(); - if (AA.alias(M->getRawDest(), MSize, MDep->getRawSource(), DepSize) != - AliasAnalysis::NoAlias) - return false; - else if (AA.alias(M->getRawDest(), MSize, M->getRawSource(), MSize) != - AliasAnalysis::NoAlias) - return false; - else if (AA.alias(MDep->getRawDest(), DepSize, MDep->getRawSource(), DepSize) - != AliasAnalysis::NoAlias) + if (!AA.isNoAlias(M->getRawDest(), MSize, MDep->getRawSource(), DepSize) || + !AA.isNoAlias(M->getRawDest(), MSize, M->getRawSource(), MSize)) return false; // If all checks passed, then we can transform these memcpy's - const Type *ArgTys[3] = { M->getRawDest()->getType(), + const Type *ArgTys[3] = { + M->getRawDest()->getType(), MDep->getRawSource()->getType(), - M->getLength()->getType() }; + M->getLength()->getType() + }; Function *MemCpyFun = Intrinsic::getDeclaration(M->getParent()->getParent()->getParent(), M->getIntrinsicID(), ArgTys, 3); From sabre at nondot.org Thu Nov 18 01:39:57 2010 From: sabre at nondot.org (Chris Lattner) Date: Thu, 18 Nov 2010 07:39:57 -0000 Subject: [llvm-commits] [llvm] r119692 - /llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp Message-ID: <20101118073957.5D8FB2A6C12C@llvm.org> Author: lattner Date: Thu Nov 18 01:39:57 2010 New Revision: 119692 URL: http://llvm.org/viewvc/llvm-project?rev=119692&view=rev Log: remove another pointless noalias check: M is a memcpy, so the source and dest are known to not overlap. Modified: llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp Modified: llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp?rev=119692&r1=119691&r2=119692&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp Thu Nov 18 01:39:57 2010 @@ -691,8 +691,7 @@ // Finally, we have to make sure that the dest of the second does not // alias the source of the first. AliasAnalysis &AA = getAnalysis(); - if (!AA.isNoAlias(M->getRawDest(), MSize, MDep->getRawSource(), DepSize) || - !AA.isNoAlias(M->getRawDest(), MSize, M->getRawSource(), MSize)) + if (!AA.isNoAlias(M->getRawDest(), MSize, MDep->getRawSource(), DepSize)) return false; // If all checks passed, then we can transform these memcpy's From sabre at nondot.org Thu Nov 18 01:49:32 2010 From: sabre at nondot.org (Chris Lattner) Date: Thu, 18 Nov 2010 07:49:32 -0000 Subject: [llvm-commits] [llvm] r119693 - /llvm/trunk/test/Transforms/MemCpyOpt/memcpy.ll Message-ID: <20101118074932.7FE292A6C12C@llvm.org> Author: lattner Date: Thu Nov 18 01:49:32 2010 New Revision: 119693 URL: http://llvm.org/viewvc/llvm-project?rev=119693&view=rev Log: filecheckize, this is still not optimal, see PR8643 Modified: llvm/trunk/test/Transforms/MemCpyOpt/memcpy.ll Modified: llvm/trunk/test/Transforms/MemCpyOpt/memcpy.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/MemCpyOpt/memcpy.ll?rev=119693&r1=119692&r2=119693&view=diff ============================================================================== --- llvm/trunk/test/Transforms/MemCpyOpt/memcpy.ll (original) +++ llvm/trunk/test/Transforms/MemCpyOpt/memcpy.ll Thu Nov 18 01:49:32 2010 @@ -3,7 +3,7 @@ target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i686-apple-darwin9" -define void @ccosl({ x86_fp80, x86_fp80 }* sret %agg.result, x86_fp80 %z.0, x86_fp80 %z.1) nounwind { +define void @test1({ x86_fp80, x86_fp80 }* sret %agg.result, x86_fp80 %z.0, x86_fp80 %z.1) nounwind { entry: %tmp2 = alloca { x86_fp80, x86_fp80 } ; <{ x86_fp80, x86_fp80 }*> [#uses=1] %memtmp = alloca { x86_fp80, x86_fp80 }, align 16 ; <{ x86_fp80, x86_fp80 }*> [#uses=2] @@ -14,6 +14,15 @@ call void @llvm.memcpy.i32( i8* %tmp219, i8* %memtmp20, i32 32, i32 16 ) %agg.result21 = bitcast { x86_fp80, x86_fp80 }* %agg.result to i8* ; [#uses=1] call void @llvm.memcpy.i32( i8* %agg.result21, i8* %tmp219, i32 32, i32 16 ) + +; Check that one of the memcpy's are removed. +;; FIXME: PR 8643 We should be able to eliminate the last memcpy here. + +; CHECK: @test1 +; CHECK: call void @ccoshl +; CHECK: call @llvm.memcpy +; CHECK-NOT: llvm.memcpy +; CHECK: ret void ret void } From sabre at nondot.org Thu Nov 18 02:00:57 2010 From: sabre at nondot.org (Chris Lattner) Date: Thu, 18 Nov 2010 08:00:57 -0000 Subject: [llvm-commits] [llvm] r119694 - in /llvm/trunk: lib/Transforms/Scalar/MemCpyOptimizer.cpp test/Transforms/MemCpyOpt/2008-04-29-SRetRemoval.ll test/Transforms/MemCpyOpt/memcpy.ll Message-ID: <20101118080057.8DD472A6C12C@llvm.org> Author: lattner Date: Thu Nov 18 02:00:57 2010 New Revision: 119694 URL: http://llvm.org/viewvc/llvm-project?rev=119694&view=rev Log: remove a pointless restriction from memcpyopt. It was refusing to optimize two memcpy's like this: copy A <- B copy C <- A if it couldn't prove that noalias(B,C). We can eliminate the copy by producing a memmove instead of memcpy. Removed: llvm/trunk/test/Transforms/MemCpyOpt/2008-04-29-SRetRemoval.ll Modified: llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp llvm/trunk/test/Transforms/MemCpyOpt/memcpy.ll Modified: llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp?rev=119694&r1=119693&r2=119694&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp Thu Nov 18 02:00:57 2010 @@ -688,11 +688,14 @@ if (DepSize < MSize) return false; - // Finally, we have to make sure that the dest of the second does not - // alias the source of the first. + Intrinsic::ID ResultFn = Intrinsic::memcpy; + + // If the dest of the second might alias the source of the first, then the + // source and dest might overlap. We still want to eliminate the intermediate + // value, but we have to generate a memmove instead of memcpy. AliasAnalysis &AA = getAnalysis(); if (!AA.isNoAlias(M->getRawDest(), MSize, MDep->getRawSource(), DepSize)) - return false; + ResultFn = Intrinsic::memmove; // If all checks passed, then we can transform these memcpy's const Type *ArgTys[3] = { @@ -702,7 +705,7 @@ }; Function *MemCpyFun = Intrinsic::getDeclaration(M->getParent()->getParent()->getParent(), - M->getIntrinsicID(), ArgTys, 3); + ResultFn, ArgTys, 3); // Make sure to use the lesser of the alignment of the source and the dest // since we're changing where we're reading from, but don't want to increase Removed: llvm/trunk/test/Transforms/MemCpyOpt/2008-04-29-SRetRemoval.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/MemCpyOpt/2008-04-29-SRetRemoval.ll?rev=119693&view=auto ============================================================================== --- llvm/trunk/test/Transforms/MemCpyOpt/2008-04-29-SRetRemoval.ll (original) +++ llvm/trunk/test/Transforms/MemCpyOpt/2008-04-29-SRetRemoval.ll (removed) @@ -1,17 +0,0 @@ -; RUN: opt < %s -memcpyopt -S | grep {call.*memcpy.*agg.result} - -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" -target triple = "i386-apple-darwin8" - at x = external global { x86_fp80, x86_fp80 } ; <{ x86_fp80, x86_fp80 }*> [#uses=1] - -define void @foo({ x86_fp80, x86_fp80 }* noalias sret %agg.result) nounwind { -entry: - %x.0 = alloca { x86_fp80, x86_fp80 } ; <{ x86_fp80, x86_fp80 }*> [#uses=1] - %x.01 = bitcast { x86_fp80, x86_fp80 }* %x.0 to i8* ; [#uses=2] - call void @llvm.memcpy.i32( i8* %x.01, i8* bitcast ({ x86_fp80, x86_fp80 }* @x to i8*), i32 32, i32 16 ) - %agg.result2 = bitcast { x86_fp80, x86_fp80 }* %agg.result to i8* ; [#uses=1] - call void @llvm.memcpy.i32( i8* %agg.result2, i8* %x.01, i32 32, i32 16 ) - ret void -} - -declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) nounwind Modified: llvm/trunk/test/Transforms/MemCpyOpt/memcpy.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/MemCpyOpt/memcpy.ll?rev=119694&r1=119693&r2=119694&view=diff ============================================================================== --- llvm/trunk/test/Transforms/MemCpyOpt/memcpy.ll (original) +++ llvm/trunk/test/Transforms/MemCpyOpt/memcpy.ll Thu Nov 18 02:00:57 2010 @@ -1,4 +1,4 @@ -; RUN: opt < %s -basicaa -memcpyopt -dse -S | grep {call.*memcpy} | count 1 +; RUN: opt < %s -basicaa -memcpyopt -dse -S | FileCheck %s target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i686-apple-darwin9" @@ -20,7 +20,7 @@ ; CHECK: @test1 ; CHECK: call void @ccoshl -; CHECK: call @llvm.memcpy +; CHECK: call void @llvm.memcpy ; CHECK-NOT: llvm.memcpy ; CHECK: ret void ret void @@ -29,3 +29,36 @@ declare void @ccoshl({ x86_fp80, x86_fp80 }* sret , x86_fp80, x86_fp80) nounwind declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) nounwind + + +; The intermediate alloca and one of the memcpy's should be eliminated, the +; other should be related with a memmove. +define void @test2(i8* %P, i8* %Q) nounwind { + %memtmp = alloca { x86_fp80, x86_fp80 }, align 16 + %R = bitcast { x86_fp80, x86_fp80 }* %memtmp to i8* + call void @llvm.memcpy.i32( i8* %R, i8* %P, i32 32, i32 16 ) + call void @llvm.memcpy.i32( i8* %Q, i8* %R, i32 32, i32 16 ) + ret void + +; CHECK: @test2 +; CHECK-NEXT: call void @llvm.memmove{{.*}}(i8* %Q, i8* %P +; CHECK-NEXT: ret void +} + + + + + at x = external global { x86_fp80, x86_fp80 } + +define void @test3({ x86_fp80, x86_fp80 }* noalias sret %agg.result) nounwind { + %x.0 = alloca { x86_fp80, x86_fp80 } + %x.01 = bitcast { x86_fp80, x86_fp80 }* %x.0 to i8* + call void @llvm.memcpy.i32( i8* %x.01, i8* bitcast ({ x86_fp80, x86_fp80 }* @x to i8*), i32 32, i32 16 ) + %agg.result2 = bitcast { x86_fp80, x86_fp80 }* %agg.result to i8* + call void @llvm.memcpy.i32( i8* %agg.result2, i8* %x.01, i32 32, i32 16 ) + ret void +; CHECK: @test3 +; CHECK-NEXT: %agg.result2 = bitcast +; CHECK-NEXT: call void @llvm.memcpy +; CHECK-NEXT: ret void +} From sabre at nondot.org Thu Nov 18 02:07:10 2010 From: sabre at nondot.org (Chris Lattner) Date: Thu, 18 Nov 2010 08:07:10 -0000 Subject: [llvm-commits] [llvm] r119695 - /llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp Message-ID: <20101118080710.100EE2A6C12C@llvm.org> Author: lattner Date: Thu Nov 18 02:07:09 2010 New Revision: 119695 URL: http://llvm.org/viewvc/llvm-project?rev=119695&view=rev Log: slightly simplify code and substantially improve comment. Instead of saying "it would be bad", give an example of what is going on. Modified: llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp Modified: llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp?rev=119695&r1=119694&r2=119695&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp Thu Nov 18 02:07:09 2010 @@ -712,34 +712,37 @@ // the alignment past what can be read from or written to. // TODO: Is this worth it if we're creating a less aligned memcpy? For // example we could be moving from movaps -> movq on x86. - unsigned Align = std::min(MDep->getAlignmentCst()->getZExtValue(), - M->getAlignmentCst()->getZExtValue()); - LLVMContext &Context = M->getContext(); - ConstantInt *AlignCI = ConstantInt::get(Type::getInt32Ty(Context), Align); + unsigned Align = std::min(MDep->getAlignment(), M->getAlignment()); Value *Args[5] = { - M->getRawDest(), MDep->getRawSource(), M->getLength(), - AlignCI, M->getVolatileCst() + M->getRawDest(), + MDep->getRawSource(), + M->getLength(), + ConstantInt::get(Type::getInt32Ty(M->getContext()), Align), + M->getVolatileCst() }; CallInst *C = CallInst::Create(MemCpyFun, Args, Args+5, "", M); MemoryDependenceAnalysis &MD = getAnalysis(); - // If C and M don't interfere, then this is a valid transformation. If they - // did, this would mean that the two sources overlap, which would be bad. - MemDepResult dep = MD.getDependency(C); - if (dep.isClobber() && dep.getInst() == MDep) { - MD.removeInstruction(M); - M->eraseFromParent(); - ++NumMemCpyInstr; - return true; + // Verify that the copied-from memory doesn't change in between the two + // transfers. For example, in: + // memcpy(a <- b) + // *b = 42; + // memcpy(c <- a) + // It would be invalid to transform the second memcpy into memcpy(c <- b). + MemDepResult NewDep = MD.getDependency(C); + if (!NewDep.isClobber() || NewDep.getInst() != MDep) { + MD.removeInstruction(C); + C->eraseFromParent(); + return false; } - - // Otherwise, there was no point in doing this, so we remove the call we - // inserted and act like nothing happened. - MD.removeInstruction(C); - C->eraseFromParent(); - return false; + + // Otherwise we're good! Nuke the instruction we're replacing. + MD.removeInstruction(M); + M->eraseFromParent(); + ++NumMemCpyInstr; + return true; } From aggarwa4 at illinois.edu Thu Nov 18 02:16:39 2010 From: aggarwa4 at illinois.edu (Arushi Aggarwal) Date: Thu, 18 Nov 2010 08:16:39 -0000 Subject: [llvm-commits] [poolalloc] r119696 - /poolalloc/trunk/lib/DSA/DSTest.cpp Message-ID: <20101118081639.937142A6C12C@llvm.org> Author: aggarwa4 Date: Thu Nov 18 02:16:39 2010 New Revision: 119696 URL: http://llvm.org/viewvc/llvm-project?rev=119696&view=rev Log: Formatting clean up. No functionality change. Modified: poolalloc/trunk/lib/DSA/DSTest.cpp Modified: poolalloc/trunk/lib/DSA/DSTest.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/DSTest.cpp?rev=119696&r1=119695&r2=119696&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/DSTest.cpp (original) +++ poolalloc/trunk/lib/DSA/DSTest.cpp Thu Nov 18 02:16:39 2010 @@ -72,7 +72,7 @@ /// NodeValue -- represents a particular node in a DSGraph /// constructed from a serialized string representation of a value -/// +/// /// FIXME: Make this integrated into cl parsing, as mentioned: /// http://llvm.org/docs/CommandLine.html#customparser /// @@ -203,7 +203,7 @@ assert(V && "Parsing value failed!"); } - + /// stripAtIfRequired -- removes the leading '@' character if one exists /// StringRef stripAtIfRequired(StringRef v) { @@ -451,7 +451,7 @@ /// static bool checkTypes(llvm::raw_ostream &O, const Module *M, const DataStructures *DS) { - + // Verify all nodes listed in "CheckType" have the same Type cl::list::iterator I = CheckType.begin(), E = CheckType.end(); @@ -465,9 +465,9 @@ NodeValue NV(*I, M, DS); std::string *type = new std::string(); llvm::raw_string_ostream *test= new llvm::raw_string_ostream(*type); - + printTypesForNode(*test, NV); - + if(test->str()!=typeRef) { errs() << "ERROR: Testing for type : \t" << typeRef << "\n"; @@ -501,7 +501,7 @@ errs() << "No flags given for option \"" << NodeFlagOption << "\"!\n"; assert(0 && "Invalid input!"); } - + // Grab the part before the flag specifiers and parse that as a node std::string NodeString = std::string(I->begin(),I->begin()+FlagPos); NodeValue NV(NodeString, M, DS); @@ -547,10 +547,10 @@ /// checkCallees -- Verify callees for the given functions /// Returns true iff the user specified anything for this option /// -/// checks that the first function calls the rest of the +/// checks that the first function calls the rest of the /// functions in the list static bool checkCallees(llvm::raw_ostream &O, const Module *M, const DataStructures *DS) { - + //Mangled names must be provided for C++ cl::list::iterator I = CheckCallees.begin(), E = CheckCallees.end(); @@ -558,7 +558,7 @@ if (I != E) { std::string &func = *(I); Function *caller = M->getFunction(func); - assert(caller && "Function not found in module"); + assert(caller && "Function not found in module"); const DSCallGraph callgraph = DS->getCallGraph(); //(const_cast(callgraph)).dump(); ++I; @@ -566,22 +566,25 @@ std::string &func = *(I); const Function *callee = M->getFunction(func); bool found = false; - Function const*leader = callgraph.sccLeader(&*caller); + // either the callee is in the same SCC as the caller, and hence does not show up - for(DSCallGraph::scc_iterator sccii = callgraph.scc_begin(leader), sccee = callgraph.scc_end(leader); sccii != sccee; ++sccii) { + for(DSCallGraph::scc_iterator sccii = callgraph.scc_begin(leader), + sccee = callgraph.scc_end(leader); sccii != sccee; ++sccii) { if(callee == *sccii) - found = true; + found = true; } // or the callee is found in the DSCallGraph - for(DSCallGraph::flat_iterator CI = callgraph.flat_callee_begin(caller); CI != callgraph.flat_callee_end(caller); CI ++) { + for(DSCallGraph::flat_iterator CI = callgraph.flat_callee_begin(caller); + CI != callgraph.flat_callee_end(caller); CI ++) { if (callee == *CI) found = true; - for(DSCallGraph::scc_iterator sccii = callgraph.scc_begin(*CI), sccee = callgraph.scc_end(*CI); sccii != sccee; ++sccii) { + for(DSCallGraph::scc_iterator sccii = callgraph.scc_begin(*CI), + sccee = callgraph.scc_end(*CI); sccii != sccee; ++sccii) { if(callee == *sccii) - found = true; + found = true; } - } + } assert(found && "callee not in call graph"); ++I; } From Renato.Golin at arm.com Thu Nov 18 04:36:37 2010 From: Renato.Golin at arm.com (Renato Golin) Date: Thu, 18 Nov 2010 10:36:37 +0000 Subject: [llvm-commits] [PATCH] Bug in DAG Combine for ARM shift In-Reply-To: References: Message-ID: <4CE501B5.5040900@arm.com> On 18/11/10 03:30, Tanya Lattner wrote: > Attached is a patch and test case for a bug in PerformShiftCombine() > when operating on illegal types for shift right/left immediate. > > Please review and let me know if its ok to commit. Hi Tanya, Works for me (on our internal tests). cheers, --renato -- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. From fvbommel at gmail.com Thu Nov 18 06:12:48 2010 From: fvbommel at gmail.com (Frits van Bommel) Date: Thu, 18 Nov 2010 13:12:48 +0100 Subject: [llvm-commits] [PATCH] [PING] PR 8111: "FoldingSetNodeID::AddString and endianness" Message-ID: It's been over 2 months since I submitted PR 8111 ( http://llvm.org/bugs/show_bug.cgi?id=8111 ) and included a patch to fix it. Having heard nothing about it since then, I figure it's about time for a ping. Can someone take a look at it and apply the patch? From aggarwa4 at illinois.edu Thu Nov 18 10:25:46 2010 From: aggarwa4 at illinois.edu (Arushi Aggarwal) Date: Thu, 18 Nov 2010 16:25:46 -0000 Subject: [llvm-commits] [poolalloc] r119700 - in /poolalloc/trunk/lib/DSA: BottomUpClosure.cpp DSCallGraph.cpp DSTest.cpp Message-ID: <20101118162546.EDE892A6C12C@llvm.org> Author: aggarwa4 Date: Thu Nov 18 10:25:46 2010 New Revision: 119700 URL: http://llvm.org/viewvc/llvm-project?rev=119700&view=rev Log: Formatting changes. No functionality change. Modified: poolalloc/trunk/lib/DSA/BottomUpClosure.cpp poolalloc/trunk/lib/DSA/DSCallGraph.cpp poolalloc/trunk/lib/DSA/DSTest.cpp Modified: poolalloc/trunk/lib/DSA/BottomUpClosure.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/BottomUpClosure.cpp?rev=119700&r1=119699&r2=119700&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/BottomUpClosure.cpp (original) +++ poolalloc/trunk/lib/DSA/BottomUpClosure.cpp Thu Nov 18 10:25:46 2010 @@ -733,7 +733,8 @@ // Fast path for noop calls. Note that we don't care about merging globals // in the callee with nodes in the caller here. - if (!CS.isIndirectCall() && CS.getRetVal().isNull() && CS.getNumPtrArgs() == 0 && !CS.isVarArg()) { + if (!CS.isIndirectCall() && CS.getRetVal().isNull() + && CS.getNumPtrArgs() == 0 && !CS.isVarArg()) { TempFCs.erase(TempFCs.begin()); continue; } @@ -755,9 +756,9 @@ // This means, that either it is a direct call site. Or if it is // an indirect call site, its calleeNode is complete, and we can // resolve this particular call site. - assert((CS.isDirectCall() || CS.getCalleeNode()->isCompleteNode()) + assert((CS.isDirectCall() || CS.getCalleeNode()->isCompleteNode()) && "Resolving an indirect incomplete call site"); - + if (CS.isIndirectCall()) { ++NumIndResolved; } @@ -798,13 +799,13 @@ Graph->markIncompleteNodes(DSGraph::MarkFormalArgs); Graph->computeExternalFlags(DSGraph::DontMarkFormalsExternal); Graph->computeIntPtrFlags(); - + // // Update the callgraph with the new information that we have gleaned. // NOTE : This must be called before removeDeadNodes, so that no // information is lost due to deletion of DSCallNodes. Graph->buildCallGraph(callgraph,GlobalFunctionList, filterCallees); - + // Delete dead nodes. Treat globals that are unreachable but that can // reach live nodes as live. Graph->removeDeadNodes(DSGraph::KeepUnreachableGlobals); Modified: poolalloc/trunk/lib/DSA/DSCallGraph.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/DSCallGraph.cpp?rev=119700&r1=119699&r2=119700&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/DSCallGraph.cpp (original) +++ poolalloc/trunk/lib/DSA/DSCallGraph.cpp Thu Nov 18 10:25:46 2010 @@ -114,11 +114,11 @@ ii != ee; ++ii) if (!ValMap.count(*ii)) tarjan_rec(*ii, Stack, NextID, ValMap); - + removeECFunctions(); } -static void removeECs(DSCallGraph::FuncSet& F, +static void removeECs(DSCallGraph::FuncSet& F, llvm::EquivalenceClasses& ECs) { DSCallGraph::FuncSet result; for (DSCallGraph::FuncSet::const_iterator ii = F.begin(), ee = F.end(); Modified: poolalloc/trunk/lib/DSA/DSTest.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/DSTest.cpp?rev=119700&r1=119699&r2=119700&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/DSTest.cpp (original) +++ poolalloc/trunk/lib/DSA/DSTest.cpp Thu Nov 18 10:25:46 2010 @@ -372,7 +372,8 @@ /// See 'printNode' for more details. /// Returns true iff the user specified nodes to print. /// -static bool printNodes(llvm::raw_ostream &O, const Module *M, const DataStructures *DS) { +static bool printNodes(llvm::raw_ostream &O, const Module *M, + const DataStructures *DS) { cl::list::iterator I = PrintNodesForValues.begin(), E = PrintNodesForValues.end(); if (I != E) { @@ -391,7 +392,8 @@ /// should be merged, is in fact merged. /// Returns true iff the user specified any nodes for this option. /// -static bool checkIfNodesAreSame(llvm::raw_ostream &O, const Module *M, const DataStructures *DS) { +static bool checkIfNodesAreSame(llvm::raw_ostream &O, const Module *M, + const DataStructures *DS) { // Verify all nodes listed in "CheckNodesSame" belong to the same node. cl::list::iterator I = CheckNodesSame.begin(), @@ -416,7 +418,8 @@ /// shouldn't be merged, wasn't merged /// Returns true iff the user specified any nodes for this option. /// -static bool checkIfNodesAreNotSame(llvm::raw_ostream &O, const Module *M, const DataStructures *DS) { +static bool checkIfNodesAreNotSame(llvm::raw_ostream &O, const Module *M, + const DataStructures *DS) { // Verify all nodes listed in "CheckNodesNotSame" belong to distinct nodes. cl::list::iterator I = CheckNodesNotSame.begin(), @@ -450,7 +453,8 @@ /// Returns true iff the user specified anything for this option /// -static bool checkTypes(llvm::raw_ostream &O, const Module *M, const DataStructures *DS) { +static bool checkTypes(llvm::raw_ostream &O, const Module *M, + const DataStructures *DS) { // Verify all nodes listed in "CheckType" have the same Type cl::list::iterator I = CheckType.begin(), @@ -490,7 +494,8 @@ /// Where +flags means 'this node should have these flags' /// And -flags means 'this node should NOT have these flags' /// -static bool verifyFlags(llvm::raw_ostream &O, const Module *M, const DataStructures *DS) { +static bool verifyFlags(llvm::raw_ostream &O, const Module *M, + const DataStructures *DS) { cl::list::iterator I = VerifyFlags.begin(), E = VerifyFlags.end(); if (I != E) { @@ -549,7 +554,8 @@ /// /// checks that the first function calls the rest of the /// functions in the list -static bool checkCallees(llvm::raw_ostream &O, const Module *M, const DataStructures *DS) { +static bool checkCallees(llvm::raw_ostream &O, const Module *M, + const DataStructures *DS) { //Mangled names must be provided for C++ cl::list::iterator I = CheckCallees.begin(), From aggarwa4 at illinois.edu Thu Nov 18 10:31:42 2010 From: aggarwa4 at illinois.edu (Arushi Aggarwal) Date: Thu, 18 Nov 2010 16:31:42 -0000 Subject: [llvm-commits] [poolalloc] r119701 - /poolalloc/trunk/test/dsa/callgraph/merge.ll Message-ID: <20101118163143.00A622A6C12C@llvm.org> Author: aggarwa4 Date: Thu Nov 18 10:31:42 2010 New Revision: 119701 URL: http://llvm.org/viewvc/llvm-project?rev=119701&view=rev Log: Callgraph with SCC. Checks that EqBU does the correct merging. Added: poolalloc/trunk/test/dsa/callgraph/merge.ll Added: poolalloc/trunk/test/dsa/callgraph/merge.ll URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/test/dsa/callgraph/merge.ll?rev=119701&view=auto ============================================================================== --- poolalloc/trunk/test/dsa/callgraph/merge.ll (added) +++ poolalloc/trunk/test/dsa/callgraph/merge.ll Thu Nov 18 10:31:42 2010 @@ -0,0 +1,56 @@ +;RUN: dsaopt %s -dsa-cbu -analyze -check-callees=E,B,D +; ModuleID = 'merge.o' +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-unknown-linux-gnu" + +define internal void @A() nounwind { +entry: + call void @B() nounwind + br label %return + +return: ; preds = %entry + ret void +} + +define internal void @B() nounwind { +entry: + call void @A() nounwind + br label %return + +return: ; preds = %entry + ret void +} + +define internal void @C() nounwind { +entry: + call internal void @D() nounwind + br label %return + +return: ; preds = %entry + ret void +} + +define internal void @D() nounwind { +entry: + call void @C() nounwind + br label %return + +return: ; preds = %entry + ret void +} + +define internal void @E() nounwind { +entry: + %fp = alloca void ()* ; [#uses=3] + %fp1 = alloca void ()* ; [#uses=1] + %"alloca point" = bitcast i32 0 to i32 ; [#uses=0] + store void ()* @B, void ()** %fp, align 8 + store void ()* @A, void ()** %fp1, align 8 + store void ()* @D, void ()** %fp, align 8 + %0 = load void ()** %fp, align 8 ; [#uses=1] + call void %0() nounwind + br label %return + +return: ; preds = %entry + ret void +} From aggarwa4 at illinois.edu Thu Nov 18 10:33:50 2010 From: aggarwa4 at illinois.edu (Arushi Aggarwal) Date: Thu, 18 Nov 2010 16:33:50 -0000 Subject: [llvm-commits] [poolalloc] r119702 - /poolalloc/trunk/test/dsa/callgraph/merge.ll Message-ID: <20101118163350.A5F5C2A6C12C@llvm.org> Author: aggarwa4 Date: Thu Nov 18 10:33:50 2010 New Revision: 119702 URL: http://llvm.org/viewvc/llvm-project?rev=119702&view=rev Log: Fixed an error. Modified: poolalloc/trunk/test/dsa/callgraph/merge.ll Modified: poolalloc/trunk/test/dsa/callgraph/merge.ll URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/test/dsa/callgraph/merge.ll?rev=119702&r1=119701&r2=119702&view=diff ============================================================================== --- poolalloc/trunk/test/dsa/callgraph/merge.ll (original) +++ poolalloc/trunk/test/dsa/callgraph/merge.ll Thu Nov 18 10:33:50 2010 @@ -23,7 +23,7 @@ define internal void @C() nounwind { entry: - call internal void @D() nounwind + call void @D() nounwind br label %return return: ; preds = %entry From gohman at apple.com Thu Nov 18 11:05:13 2010 From: gohman at apple.com (Dan Gohman) Date: Thu, 18 Nov 2010 17:05:13 -0000 Subject: [llvm-commits] [llvm] r119704 - in /llvm/trunk: lib/Analysis/PHITransAddr.cpp test/Transforms/GVN/phi-translate.ll Message-ID: <20101118170513.E01FD2A6C12C@llvm.org> Author: djg Date: Thu Nov 18 11:05:13 2010 New Revision: 119704 URL: http://llvm.org/viewvc/llvm-project?rev=119704&view=rev Log: Add support for PHI-translating sext, zext, and trunc instructions, enabling more PRE. PR8586. Added: llvm/trunk/test/Transforms/GVN/phi-translate.ll Modified: llvm/trunk/lib/Analysis/PHITransAddr.cpp Modified: llvm/trunk/lib/Analysis/PHITransAddr.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/PHITransAddr.cpp?rev=119704&r1=119703&r2=119704&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/PHITransAddr.cpp (original) +++ llvm/trunk/lib/Analysis/PHITransAddr.cpp Thu Nov 18 11:05:13 2010 @@ -20,9 +20,12 @@ static bool CanPHITrans(Instruction *Inst) { if (isa(Inst) || - isa(Inst) || isa(Inst)) return true; + + if (isa(Inst) && + Inst->isSafeToSpeculativelyExecute()) + return true; if (Inst->getOpcode() == Instruction::Add && isa(Inst->getOperand(1))) @@ -177,26 +180,29 @@ // or because we just incorporated it into the expression). See if its // operands need to be phi translated, and if so, reconstruct it. - if (BitCastInst *BC = dyn_cast(Inst)) { - Value *PHIIn = PHITranslateSubExpr(BC->getOperand(0), CurBB, PredBB, DT); + if (CastInst *Cast = dyn_cast(Inst)) { + if (!Cast->isSafeToSpeculativelyExecute()) return 0; + Value *PHIIn = PHITranslateSubExpr(Cast->getOperand(0), CurBB, PredBB, DT); if (PHIIn == 0) return 0; - if (PHIIn == BC->getOperand(0)) - return BC; + if (PHIIn == Cast->getOperand(0)) + return Cast; // Find an available version of this cast. // Constants are trivial to find. if (Constant *C = dyn_cast(PHIIn)) - return AddAsInput(ConstantExpr::getBitCast(C, BC->getType())); + return AddAsInput(ConstantExpr::getCast(Cast->getOpcode(), + C, Cast->getType())); - // Otherwise we have to see if a bitcasted version of the incoming pointer + // Otherwise we have to see if a casted version of the incoming pointer // is available. If so, we can use it, otherwise we have to fail. for (Value::use_iterator UI = PHIIn->use_begin(), E = PHIIn->use_end(); UI != E; ++UI) { - if (BitCastInst *BCI = dyn_cast(*UI)) - if (BCI->getType() == BC->getType() && - (!DT || DT->dominates(BCI->getParent(), PredBB))) - return BCI; + if (CastInst *CastI = dyn_cast(*UI)) + if (CastI->getOpcode() == Cast->getOpcode() && + CastI->getType() == Cast->getType() && + (!DT || DT->dominates(CastI->getParent(), PredBB))) + return CastI; } return 0; } @@ -368,16 +374,18 @@ // instruction. Instruction *Inst = cast(InVal); - // Handle bitcast of PHI translatable value. - if (BitCastInst *BC = dyn_cast(Inst)) { - Value *OpVal = InsertPHITranslatedSubExpr(BC->getOperand(0), + // Handle cast of PHI translatable value. + if (CastInst *Cast = dyn_cast(Inst)) { + if (!Cast->isSafeToSpeculativelyExecute()) return 0; + Value *OpVal = InsertPHITranslatedSubExpr(Cast->getOperand(0), CurBB, PredBB, DT, NewInsts); if (OpVal == 0) return 0; - // Otherwise insert a bitcast at the end of PredBB. - BitCastInst *New = new BitCastInst(OpVal, InVal->getType(), - InVal->getName()+".phi.trans.insert", - PredBB->getTerminator()); + // Otherwise insert a cast at the end of PredBB. + CastInst *New = CastInst::Create(Cast->getOpcode(), + OpVal, InVal->getType(), + InVal->getName()+".phi.trans.insert", + PredBB->getTerminator()); NewInsts.push_back(New); return New; } Added: llvm/trunk/test/Transforms/GVN/phi-translate.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/phi-translate.ll?rev=119704&view=auto ============================================================================== --- llvm/trunk/test/Transforms/GVN/phi-translate.ll (added) +++ llvm/trunk/test/Transforms/GVN/phi-translate.ll Thu Nov 18 11:05:13 2010 @@ -0,0 +1,31 @@ +; RUN: opt -basicaa -gvn -S < %s | FileCheck %s + +target datalayout = "e-p:64:64:64" + +; CHECK: @foo +; CHECK: entry.end_crit_edge: +; CHECK: %n.pre = load i32* %q.phi.trans.insert +; CHECK: then: +; CHECK: store i32 %z +; CHECK: end: +; CHECK: %n = phi i32 [ %n.pre, %entry.end_crit_edge ], [ %z, %then ] +; CHECK: ret i32 %n + + at G = external global [100 x i32] +define i32 @foo(i32 %x, i32 %z) { +entry: + %tobool = icmp eq i32 %x, 0 + br i1 %tobool, label %end, label %then + +then: + %i = sext i32 %x to i64 + %p = getelementptr [100 x i32]* @G, i64 0, i64 %i + store i32 %z, i32* %p + br label %end + +end: + %j = sext i32 %x to i64 + %q = getelementptr [100 x i32]* @G, i64 0, i64 %j + %n = load i32* %q + ret i32 %n +} From gohman at apple.com Thu Nov 18 11:05:57 2010 From: gohman at apple.com (Dan Gohman) Date: Thu, 18 Nov 2010 17:05:57 -0000 Subject: [llvm-commits] [llvm] r119705 - /llvm/trunk/lib/Analysis/PHITransAddr.cpp Message-ID: <20101118170557.C87952A6C12C@llvm.org> Author: djg Date: Thu Nov 18 11:05:57 2010 New Revision: 119705 URL: http://llvm.org/viewvc/llvm-project?rev=119705&view=rev Log: Use llvm_unreachable for "impossible" situations. Modified: llvm/trunk/lib/Analysis/PHITransAddr.cpp Modified: llvm/trunk/lib/Analysis/PHITransAddr.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/PHITransAddr.cpp?rev=119705&r1=119704&r2=119705&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/PHITransAddr.cpp (original) +++ llvm/trunk/lib/Analysis/PHITransAddr.cpp Thu Nov 18 11:05:57 2010 @@ -15,6 +15,7 @@ #include "llvm/Analysis/Dominators.h" #include "llvm/Analysis/InstructionSimplify.h" #include "llvm/Support/Debug.h" +#include "llvm/Support/ErrorHandling.h" #include "llvm/Support/raw_ostream.h" using namespace llvm; @@ -66,9 +67,10 @@ // If it isn't in the InstInputs list it is a subexpr incorporated into the // address. Sanity check that it is phi translatable. if (!CanPHITrans(I)) { - errs() << "Non phi translatable instruction found in PHITransAddr, either " - "something is missing from InstInputs or CanPHITrans is wrong:\n"; + errs() << "Non phi translatable instruction found in PHITransAddr:\n"; errs() << *I << '\n'; + llvm_unreachable("Either something is missing from InstInputs or " + "CanPHITrans is wrong."); return false; } @@ -92,9 +94,10 @@ return false; if (!Tmp.empty()) { - errs() << "PHITransAddr inconsistent, contains extra instructions:\n"; + errs() << "PHITransAddr contains extra instructions:\n"; for (unsigned i = 0, e = InstInputs.size(); i != e; ++i) errs() << " InstInput #" << i << " is " << *InstInputs[i] << "\n"; + llvm_unreachable("This is unexpected."); return false; } From gohman at apple.com Thu Nov 18 11:06:32 2010 From: gohman at apple.com (Dan Gohman) Date: Thu, 18 Nov 2010 17:06:32 -0000 Subject: [llvm-commits] [llvm] r119706 - /llvm/trunk/lib/Analysis/PHITransAddr.cpp Message-ID: <20101118170632.140652A6C12C@llvm.org> Author: djg Date: Thu Nov 18 11:06:31 2010 New Revision: 119706 URL: http://llvm.org/viewvc/llvm-project?rev=119706&view=rev Log: Strip trailing whitespace. Modified: llvm/trunk/lib/Analysis/PHITransAddr.cpp Modified: llvm/trunk/lib/Analysis/PHITransAddr.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/PHITransAddr.cpp?rev=119706&r1=119705&r2=119706&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/PHITransAddr.cpp (original) +++ llvm/trunk/lib/Analysis/PHITransAddr.cpp Thu Nov 18 11:06:31 2010 @@ -27,11 +27,11 @@ if (isa(Inst) && Inst->isSafeToSpeculativelyExecute()) return true; - + if (Inst->getOpcode() == Instruction::Add && isa(Inst->getOperand(1))) return true; - + // cerr << "MEMDEP: Could not PHI translate: " << *Pointer; // if (isa(PtrInst) || isa(PtrInst)) // cerr << "OP:\t\t\t\t" << *PtrInst->getOperand(0); @@ -54,7 +54,7 @@ // If this is a non-instruction value, there is nothing to do. Instruction *I = dyn_cast(Expr); if (I == 0) return true; - + // If it's an instruction, it is either in Tmp or its operands recursively // are. SmallVectorImpl::iterator Entry = @@ -63,7 +63,7 @@ InstInputs.erase(Entry); return true; } - + // If it isn't in the InstInputs list it is a subexpr incorporated into the // address. Sanity check that it is phi translatable. if (!CanPHITrans(I)) { @@ -73,7 +73,7 @@ "CanPHITrans is wrong."); return false; } - + // Validate the operands of the instruction. for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) if (!VerifySubExpr(I->getOperand(i), InstInputs)) @@ -87,12 +87,12 @@ /// returns false. bool PHITransAddr::Verify() const { if (Addr == 0) return true; - - SmallVector Tmp(InstInputs.begin(), InstInputs.end()); - + + SmallVector Tmp(InstInputs.begin(), InstInputs.end()); + if (!VerifySubExpr(Addr, Tmp)) return false; - + if (!Tmp.empty()) { errs() << "PHITransAddr contains extra instructions:\n"; for (unsigned i = 0, e = InstInputs.size(); i != e; ++i) @@ -100,7 +100,7 @@ llvm_unreachable("This is unexpected."); return false; } - + // a-ok. return true; } @@ -117,11 +117,11 @@ } -static void RemoveInstInputs(Value *V, +static void RemoveInstInputs(Value *V, SmallVectorImpl &InstInputs) { Instruction *I = dyn_cast(V); if (I == 0) return; - + // If the instruction is in the InstInputs list, remove it. SmallVectorImpl::iterator Entry = std::find(InstInputs.begin(), InstInputs.end(), I); @@ -129,9 +129,9 @@ InstInputs.erase(Entry); return; } - + assert(!isa(I) && "Error, removing something that isn't an input"); - + // Otherwise, it must have instruction inputs itself. Zap them recursively. for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) { if (Instruction *Op = dyn_cast(I->getOperand(i))) @@ -145,7 +145,7 @@ // If this is a non-instruction value, it can't require PHI translation. Instruction *Inst = dyn_cast(V); if (Inst == 0) return V; - + // Determine whether 'Inst' is an input to our PHI translatable expression. bool isInput = std::count(InstInputs.begin(), InstInputs.end(), Inst); @@ -162,16 +162,16 @@ // In either case, the instruction itself isn't an input any longer. InstInputs.erase(std::find(InstInputs.begin(), InstInputs.end(), Inst)); - + // If this is a PHI, go ahead and translate it. if (PHINode *PN = dyn_cast(Inst)) return AddAsInput(PN->getIncomingValueForBlock(PredBB)); - + // If this is a non-phi value, and it is analyzable, we can incorporate it // into the expression by making all instruction operands be inputs. if (!CanPHITrans(Inst)) return 0; - + // All instruction operands are now inputs (and of course, they may also be // defined in this block, so they may need to be phi translated themselves. for (unsigned i = 0, e = Inst->getNumOperands(); i != e; ++i) @@ -182,21 +182,21 @@ // Ok, it must be an intermediate result (either because it started that way // or because we just incorporated it into the expression). See if its // operands need to be phi translated, and if so, reconstruct it. - + if (CastInst *Cast = dyn_cast(Inst)) { if (!Cast->isSafeToSpeculativelyExecute()) return 0; Value *PHIIn = PHITranslateSubExpr(Cast->getOperand(0), CurBB, PredBB, DT); if (PHIIn == 0) return 0; if (PHIIn == Cast->getOperand(0)) return Cast; - + // Find an available version of this cast. - + // Constants are trivial to find. if (Constant *C = dyn_cast(PHIIn)) return AddAsInput(ConstantExpr::getCast(Cast->getOpcode(), C, Cast->getType())); - + // Otherwise we have to see if a casted version of the incoming pointer // is available. If so, we can use it, otherwise we have to fail. for (Value::use_iterator UI = PHIIn->use_begin(), E = PHIIn->use_end(); @@ -209,7 +209,7 @@ } return 0; } - + // Handle getelementptr with at least one PHI translatable operand. if (GetElementPtrInst *GEP = dyn_cast(Inst)) { SmallVector GEPOps; @@ -217,22 +217,22 @@ for (unsigned i = 0, e = GEP->getNumOperands(); i != e; ++i) { Value *GEPOp = PHITranslateSubExpr(GEP->getOperand(i), CurBB, PredBB, DT); if (GEPOp == 0) return 0; - + AnyChanged |= GEPOp != GEP->getOperand(i); GEPOps.push_back(GEPOp); } - + if (!AnyChanged) return GEP; - + // Simplify the GEP to handle 'gep x, 0' -> x etc. if (Value *V = SimplifyGEPInst(&GEPOps[0], GEPOps.size(), TD, DT)) { for (unsigned i = 0, e = GEPOps.size(); i != e; ++i) RemoveInstInputs(GEPOps[i], InstInputs); - + return AddAsInput(V); } - + // Scan to see if we have this GEP available. Value *APHIOp = GEPOps[0]; for (Value::use_iterator UI = APHIOp->use_begin(), E = APHIOp->use_end(); @@ -254,7 +254,7 @@ } return 0; } - + // Handle add with a constant RHS. if (Inst->getOpcode() == Instruction::Add && isa(Inst->getOperand(1))) { @@ -262,10 +262,10 @@ Constant *RHS = cast(Inst->getOperand(1)); bool isNSW = cast(Inst)->hasNoSignedWrap(); bool isNUW = cast(Inst)->hasNoUnsignedWrap(); - + Value *LHS = PHITranslateSubExpr(Inst->getOperand(0), CurBB, PredBB, DT); if (LHS == 0) return 0; - + // If the PHI translated LHS is an add of a constant, fold the immediates. if (BinaryOperator *BOp = dyn_cast(LHS)) if (BOp->getOpcode() == Instruction::Add) @@ -273,14 +273,14 @@ LHS = BOp->getOperand(0); RHS = ConstantExpr::getAdd(RHS, CI); isNSW = isNUW = false; - + // If the old 'LHS' was an input, add the new 'LHS' as an input. if (std::count(InstInputs.begin(), InstInputs.end(), BOp)) { RemoveInstInputs(BOp, InstInputs); AddAsInput(LHS); } } - + // See if the add simplifies away. if (Value *Res = SimplifyAddInst(LHS, RHS, isNSW, isNUW, TD, DT)) { // If we simplified the operands, the LHS is no longer an input, but Res @@ -292,7 +292,7 @@ // If we didn't modify the add, just return it. if (LHS == Inst->getOperand(0) && RHS == Inst->getOperand(1)) return Inst; - + // Otherwise, see if we have this add available somewhere. for (Value::use_iterator UI = LHS->use_begin(), E = LHS->use_end(); UI != E; ++UI) { @@ -303,10 +303,10 @@ (!DT || DT->dominates(BO->getParent(), PredBB))) return BO; } - + return 0; } - + // Otherwise, we failed. return 0; } @@ -344,13 +344,13 @@ const DominatorTree &DT, SmallVectorImpl &NewInsts) { unsigned NISize = NewInsts.size(); - + // Attempt to PHI translate with insertion. Addr = InsertPHITranslatedSubExpr(Addr, CurBB, PredBB, DT, NewInsts); - + // If successful, return the new value. if (Addr) return Addr; - + // If not, destroy any intermediate instructions inserted. while (NewInsts.size() != NISize) NewInsts.pop_back_val()->eraseFromParent(); @@ -376,14 +376,14 @@ // If we don't have an available version of this value, it must be an // instruction. Instruction *Inst = cast(InVal); - + // Handle cast of PHI translatable value. if (CastInst *Cast = dyn_cast(Inst)) { if (!Cast->isSafeToSpeculativelyExecute()) return 0; Value *OpVal = InsertPHITranslatedSubExpr(Cast->getOperand(0), CurBB, PredBB, DT, NewInsts); if (OpVal == 0) return 0; - + // Otherwise insert a cast at the end of PredBB. CastInst *New = CastInst::Create(Cast->getOpcode(), OpVal, InVal->getType(), @@ -392,7 +392,7 @@ NewInsts.push_back(New); return New; } - + // Handle getelementptr with at least one PHI operand. if (GetElementPtrInst *GEP = dyn_cast(Inst)) { SmallVector GEPOps; @@ -403,8 +403,8 @@ if (OpVal == 0) return 0; GEPOps.push_back(OpVal); } - - GetElementPtrInst *Result = + + GetElementPtrInst *Result = GetElementPtrInst::Create(GEPOps[0], GEPOps.begin()+1, GEPOps.end(), InVal->getName()+".phi.trans.insert", PredBB->getTerminator()); @@ -412,12 +412,12 @@ NewInsts.push_back(Result); return Result; } - + #if 0 // FIXME: This code works, but it is unclear that we actually want to insert // a big chain of computation in order to make a value available in a block. // This needs to be evaluated carefully to consider its cost trade offs. - + // Handle add with a constant RHS. if (Inst->getOpcode() == Instruction::Add && isa(Inst->getOperand(1))) { @@ -425,7 +425,7 @@ Value *OpVal = InsertPHITranslatedSubExpr(Inst->getOperand(0), CurBB, PredBB, DT, NewInsts); if (OpVal == 0) return 0; - + BinaryOperator *Res = BinaryOperator::CreateAdd(OpVal, Inst->getOperand(1), InVal->getName()+".phi.trans.insert", PredBB->getTerminator()); @@ -435,6 +435,6 @@ return Res; } #endif - + return 0; } From gohman at apple.com Thu Nov 18 11:14:05 2010 From: gohman at apple.com (Dan Gohman) Date: Thu, 18 Nov 2010 17:14:05 -0000 Subject: [llvm-commits] [llvm] r119707 - /llvm/trunk/lib/CodeGen/ExpandPseudos.cpp Message-ID: <20101118171405.AE9942A6C12C@llvm.org> Author: djg Date: Thu Nov 18 11:14:05 2010 New Revision: 119707 URL: http://llvm.org/viewvc/llvm-project?rev=119707&view=rev Log: ExpandPseudos doesn't have any dependencies, so it can use the simple form of INITIALIZE_PASS. Modified: llvm/trunk/lib/CodeGen/ExpandPseudos.cpp Modified: llvm/trunk/lib/CodeGen/ExpandPseudos.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ExpandPseudos.cpp?rev=119707&r1=119706&r2=119707&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/ExpandPseudos.cpp (original) +++ llvm/trunk/lib/CodeGen/ExpandPseudos.cpp Thu Nov 18 11:14:05 2010 @@ -43,9 +43,7 @@ } // end anonymous namespace char ExpandPseudos::ID = 0; -INITIALIZE_PASS_BEGIN(ExpandPseudos, "expand-pseudos", - "Expand CodeGen Psueod-instructions", false, false) -INITIALIZE_PASS_END(ExpandPseudos, "expand-pseudos", +INITIALIZE_PASS(ExpandPseudos, "expand-pseudos", "Expand CodeGen Psueod-instructions", false, false) FunctionPass *llvm::createExpandPseudosPass() { From gohman at apple.com Thu Nov 18 11:14:56 2010 From: gohman at apple.com (Dan Gohman) Date: Thu, 18 Nov 2010 17:14:56 -0000 Subject: [llvm-commits] [llvm] r119708 - /llvm/trunk/lib/Support/APInt.cpp Message-ID: <20101118171456.DE36D2A6C12C@llvm.org> Author: djg Date: Thu Nov 18 11:14:56 2010 New Revision: 119708 URL: http://llvm.org/viewvc/llvm-project?rev=119708&view=rev Log: Bounds-check APInt's operator[]. Modified: llvm/trunk/lib/Support/APInt.cpp Modified: llvm/trunk/lib/Support/APInt.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/APInt.cpp?rev=119708&r1=119707&r2=119708&view=diff ============================================================================== --- llvm/trunk/lib/Support/APInt.cpp (original) +++ llvm/trunk/lib/Support/APInt.cpp Thu Nov 18 11:14:56 2010 @@ -483,6 +483,7 @@ } bool APInt::operator[](unsigned bitPosition) const { + assert(bitPosition < getBitWidth() && "Bit position out of bounds!"); return (maskBit(bitPosition) & (isSingleWord() ? VAL : pVal[whichWord(bitPosition)])) != 0; } From anton at korobeynikov.info Thu Nov 18 11:22:23 2010 From: anton at korobeynikov.info (Anton Korobeynikov) Date: Thu, 18 Nov 2010 20:22:23 +0300 Subject: [llvm-commits] [llvm] r119707 - /llvm/trunk/lib/CodeGen/ExpandPseudos.cpp In-Reply-To: <20101118171405.AE9942A6C12C@llvm.org> References: <20101118171405.AE9942A6C12C@llvm.org> Message-ID: > +INITIALIZE_PASS(ExpandPseudos, "expand-pseudos", > ? ? ? ? ? ? ? ? "Expand CodeGen Psueod-instructions", false, false) ~~~~~~ ^ Typo :) -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University From gohman at apple.com Thu Nov 18 11:39:02 2010 From: gohman at apple.com (Dan Gohman) Date: Thu, 18 Nov 2010 17:39:02 -0000 Subject: [llvm-commits] [llvm] r119711 - /llvm/trunk/include/llvm/Analysis/AliasAnalysis.h Message-ID: <20101118173902.1E34D2A6C12C@llvm.org> Author: djg Date: Thu Nov 18 11:39:01 2010 New Revision: 119711 URL: http://llvm.org/viewvc/llvm-project?rev=119711&view=rev Log: Document the units for the Size field. Modified: llvm/trunk/include/llvm/Analysis/AliasAnalysis.h Modified: llvm/trunk/include/llvm/Analysis/AliasAnalysis.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/AliasAnalysis.h?rev=119711&r1=119710&r2=119711&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/AliasAnalysis.h (original) +++ llvm/trunk/include/llvm/Analysis/AliasAnalysis.h Thu Nov 18 11:39:01 2010 @@ -96,10 +96,10 @@ struct Location { /// Ptr - The address of the start of the location. const Value *Ptr; - /// Size - The maximum size of the location, or UnknownSize if the size is - /// not known. Note that an unknown size does not mean the pointer aliases - /// the entire virtual address space, because there are restrictions on - /// stepping out of one object and into another. + /// Size - The maximum size of the location, in address-units, or + /// UnknownSize if the size is not known. Note that an unknown size does + /// not mean the pointer aliases the entire virtual address space, because + /// there are restrictions on stepping out of one object and into another. /// See http://llvm.org/docs/LangRef.html#pointeraliasing uint64_t Size; /// TBAATag - The metadata node which describes the TBAA type of From gohman at apple.com Thu Nov 18 11:44:17 2010 From: gohman at apple.com (Dan Gohman) Date: Thu, 18 Nov 2010 17:44:17 -0000 Subject: [llvm-commits] [llvm] r119712 - /llvm/trunk/lib/CodeGen/ExpandPseudos.cpp Message-ID: <20101118174417.AC44F2A6C12C@llvm.org> Author: djg Date: Thu Nov 18 11:44:17 2010 New Revision: 119712 URL: http://llvm.org/viewvc/llvm-project?rev=119712&view=rev Log: Fix typos. Modified: llvm/trunk/lib/CodeGen/ExpandPseudos.cpp Modified: llvm/trunk/lib/CodeGen/ExpandPseudos.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ExpandPseudos.cpp?rev=119712&r1=119711&r2=119712&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/ExpandPseudos.cpp (original) +++ llvm/trunk/lib/CodeGen/ExpandPseudos.cpp Thu Nov 18 11:44:17 2010 @@ -44,7 +44,7 @@ char ExpandPseudos::ID = 0; INITIALIZE_PASS(ExpandPseudos, "expand-pseudos", - "Expand CodeGen Psueod-instructions", false, false) + "Expand CodeGen Pseudo-instructions", false, false) FunctionPass *llvm::createExpandPseudosPass() { return new ExpandPseudos(); From grosbach at apple.com Thu Nov 18 12:01:40 2010 From: grosbach at apple.com (Jim Grosbach) Date: Thu, 18 Nov 2010 18:01:40 -0000 Subject: [llvm-commits] [llvm] r119713 - /llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Message-ID: <20101118180140.E707B2A6C12C@llvm.org> Author: grosbach Date: Thu Nov 18 12:01:40 2010 New Revision: 119713 URL: http://llvm.org/viewvc/llvm-project?rev=119713&view=rev Log: ARMPseudoInst instructions should default to being considered a single 4-byte instruction. Any that may be expanded otherwise by MC lowering should override this value. rdar://8683274 Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=119713&r1=119712&r2=119713&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Thu Nov 18 12:01:40 2010 @@ -249,6 +249,9 @@ class ARMPseudoInst pattern> : PseudoInst { + // Default these to 4byte size, as they're almost always expanded to a + // single instruction. Any exceptions can override the SZ field value. + let SZ = Size4Bytes; list Predicates = [IsARM]; } From resistor at mac.com Thu Nov 18 12:32:40 2010 From: resistor at mac.com (Owen Anderson) Date: Thu, 18 Nov 2010 18:32:40 -0000 Subject: [llvm-commits] [llvm] r119714 - in /llvm/trunk: lib/Transforms/Scalar/GVN.cpp test/Transforms/GVN/condprop.ll Message-ID: <20101118183240.D0D5A2A6C12C@llvm.org> Author: resistor Date: Thu Nov 18 12:32:40 2010 New Revision: 119714 URL: http://llvm.org/viewvc/llvm-project?rev=119714&view=rev Log: Completely rework the datastructure GVN uses to represent the value number to leader mapping. Previously, this was a tree of hashtables, and a query recursed into the table for the immediate dominator ad infinitum if the initial lookup failed. This led to really bad performance on tall, narrow CFGs. We can instead replace it with what is conceptually a multimap of value numbers to leaders (actually represented by a hashtable with a list of Value*'s as the value type), and then determine which leader from that set to use very cheaply thanks to the DFS numberings maintained by DominatorTree. Because there are typically few duplicates of a given value, this scan tends to be quite fast. Additionally, we use a custom linked list and BumpPtr allocation to avoid any unnecessary allocation in representing the value-side of the multimap. This change brings with it a 15% (!) improvement in the total running time of GVN on 403.gcc, which I think is pretty good considering that includes all the "real work" being done by MemDep as well. The one downside to this approach is that we can no longer use GVN to perform simple conditional progation, but that seems like an acceptable loss since we now have LVI and CorrelatedValuePropagation to pick up the slack. If you see conditional propagation that's not happening, please file bugs against LVI or CVP. Removed: llvm/trunk/test/Transforms/GVN/condprop.ll Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=119714&r1=119713&r2=119714&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Thu Nov 18 12:32:40 2010 @@ -40,6 +40,7 @@ #include "llvm/Analysis/MemoryBuiltins.h" #include "llvm/Analysis/MemoryDependenceAnalysis.h" #include "llvm/Analysis/PHITransAddr.h" +#include "llvm/Support/Allocator.h" #include "llvm/Support/CFG.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/Debug.h" @@ -51,6 +52,7 @@ #include "llvm/Transforms/Utils/BasicBlockUtils.h" #include "llvm/Transforms/Utils/Local.h" #include "llvm/Transforms/Utils/SSAUpdater.h" +#include using namespace llvm; STATISTIC(NumGVNInstr, "Number of instructions deleted"); @@ -674,7 +676,45 @@ const TargetData* TD; ValueTable VN; - DenseMap localAvail; + + DenseMap > NumberTable; + BumpPtrAllocator TableAllocator; + void insert_table(uint32_t N, Value *V) { + std::pair& Curr = NumberTable[N]; + if (!Curr.first) { + Curr.first = V; + return; + } + + std::pair* Node = + TableAllocator.Allocate >(); + Node->first = V; + Node->second = Curr.second; + Curr.second = Node; + } + + void erase_table(uint32_t N, Value *V) { + std::pair* Prev = 0; + std::pair* Curr = &NumberTable[N]; + + while (Curr->first != V) { + Prev = Curr; + Curr = static_cast*>(Curr->second); + } + + if (Prev) { + Prev->second = Curr->second; + } else { + if (!Curr->second) { + Curr->first = 0; + } else { + std::pair* Next = + static_cast*>(Curr->second); + Curr->first = Next->first; + Curr->second = Next->second; + } + } + } // List of critical edges to be split between iterations. SmallVector, 4> toSplit; @@ -1847,16 +1887,25 @@ } Value *GVN::lookupNumber(BasicBlock *BB, uint32_t num) { - DenseMap::iterator I = localAvail.find(BB); - if (I == localAvail.end()) - return 0; - - ValueNumberScope *Locals = I->second; - while (Locals) { - DenseMap::iterator I = Locals->table.find(num); - if (I != Locals->table.end()) - return I->second; - Locals = Locals->parent; + std::pair Vals = NumberTable[num]; + if (!Vals.first) return 0; + Instruction *Inst = dyn_cast(Vals.first); + if (!Inst) return Vals.first; + BasicBlock *Parent = Inst->getParent(); + if (DT->dominates(Parent, BB)) + return Inst; + + std::pair* Next = + static_cast*>(Vals.second); + while (Next) { + Instruction *CurrInst = dyn_cast(Next->first); + if (!CurrInst) return Next->first; + + BasicBlock *Parent = CurrInst->getParent(); + if (DT->dominates(Parent, BB)) + return CurrInst; + + Next = static_cast*>(Next->second); } return 0; @@ -1889,7 +1938,7 @@ if (!Changed) { unsigned Num = VN.lookup_or_add(LI); - localAvail[I->getParent()]->table.insert(std::make_pair(Num, LI)); + insert_table(Num, LI); } return Changed; @@ -1898,41 +1947,21 @@ uint32_t NextNum = VN.getNextUnusedValueNumber(); unsigned Num = VN.lookup_or_add(I); - if (BranchInst *BI = dyn_cast(I)) { - localAvail[I->getParent()]->table.insert(std::make_pair(Num, I)); - - if (!BI->isConditional() || isa(BI->getCondition())) - return false; - - Value *BranchCond = BI->getCondition(); - uint32_t CondVN = VN.lookup_or_add(BranchCond); - - BasicBlock *TrueSucc = BI->getSuccessor(0); - BasicBlock *FalseSucc = BI->getSuccessor(1); - - if (TrueSucc->getSinglePredecessor()) - localAvail[TrueSucc]->table[CondVN] = - ConstantInt::getTrue(TrueSucc->getContext()); - if (FalseSucc->getSinglePredecessor()) - localAvail[FalseSucc]->table[CondVN] = - ConstantInt::getFalse(TrueSucc->getContext()); - - return false; - // Allocations are always uniquely numbered, so we can save time and memory // by fast failing them. - } else if (isa(I) || isa(I)) { - localAvail[I->getParent()]->table.insert(std::make_pair(Num, I)); + if (isa(I) || isa(I)) { + insert_table(Num, I); return false; } if (isa(I)) { - localAvail[I->getParent()]->table.insert(std::make_pair(Num, I)); + insert_table(Num, I); + // If the number we were assigned was a brand new VN, then we don't // need to do a lookup to see if the number already exists // somewhere in the domtree: it can't! } else if (Num == NextNum) { - localAvail[I->getParent()]->table.insert(std::make_pair(Num, I)); + insert_table(Num, I); // Perform fast-path value-number based elimination of values inherited from // dominators. @@ -1946,7 +1975,7 @@ return true; } else { - localAvail[I->getParent()]->table.insert(std::make_pair(Num, I)); + insert_table(Num, I); } return false; @@ -2095,20 +2124,19 @@ if (P == CurrentBlock) { NumWithout = 2; break; - } else if (!localAvail.count(P)) { + } else if (!DT->dominates(&F.getEntryBlock(), P)) { NumWithout = 2; break; } - DenseMap::iterator predV = - localAvail[P]->table.find(ValNo); - if (predV == localAvail[P]->table.end()) { + Value* predV = lookupNumber(P, ValNo); + if (predV == 0) { PREPred = P; ++NumWithout; - } else if (predV->second == CurInst) { + } else if (predV == CurInst) { NumWithout = 2; } else { - predMap[P] = predV->second; + predMap[P] = predV; ++NumWith; } } @@ -2167,7 +2195,7 @@ ++NumGVNPRE; // Update the availability map to include the new instruction. - localAvail[PREPred]->table.insert(std::make_pair(ValNo, PREInstr)); + insert_table(ValNo, PREInstr); // Create a PHI to make the value available in this block. PHINode* Phi = PHINode::Create(CurInst->getType(), @@ -2180,12 +2208,13 @@ } VN.add(Phi, ValNo); - localAvail[CurrentBlock]->table[ValNo] = Phi; + insert_table(ValNo, Phi); CurInst->replaceAllUsesWith(Phi); if (MD && Phi->getType()->isPointerTy()) MD->invalidateCachedPointerInfo(Phi); VN.erase(CurInst); + erase_table(ValNo, CurInst); DEBUG(dbgs() << "GVN PRE removed: " << *CurInst << '\n'); if (MD) MD->removeInstruction(CurInst); @@ -2217,16 +2246,7 @@ /// iterateOnFunction - Executes one iteration of GVN bool GVN::iterateOnFunction(Function &F) { cleanupGlobalSets(); - - for (df_iterator DI = df_begin(DT->getRootNode()), - DE = df_end(DT->getRootNode()); DI != DE; ++DI) { - if (DI->getIDom()) - localAvail[DI->getBlock()] = - new ValueNumberScope(localAvail[DI->getIDom()->getBlock()]); - else - localAvail[DI->getBlock()] = new ValueNumberScope(0); - } - + // Top-down walk of the dominator tree bool Changed = false; #if 0 @@ -2246,11 +2266,8 @@ void GVN::cleanupGlobalSets() { VN.clear(); - - for (DenseMap::iterator - I = localAvail.begin(), E = localAvail.end(); I != E; ++I) - delete I->second; - localAvail.clear(); + NumberTable.clear(); + TableAllocator.Reset(); } /// verifyRemoved - Verify that the specified instruction does not occur in our @@ -2260,17 +2277,14 @@ // Walk through the value number scope to make sure the instruction isn't // ferreted away in it. - for (DenseMap::const_iterator - I = localAvail.begin(), E = localAvail.end(); I != E; ++I) { - const ValueNumberScope *VNS = I->second; - - while (VNS) { - for (DenseMap::const_iterator - II = VNS->table.begin(), IE = VNS->table.end(); II != IE; ++II) { - assert(II->second != Inst && "Inst still in value numbering scope!"); - } - - VNS = VNS->parent; + for (DenseMap >::const_iterator + I = NumberTable.begin(), E = NumberTable.end(); I != E; ++I) { + std::pair const * Node = &I->second; + assert(Node->first != Inst && "Inst still in value numbering scope!"); + + while (Node->second) { + Node = static_cast*>(Node->second); + assert(Node->first != Inst && "Inst still in value numbering scope!"); } } } Removed: llvm/trunk/test/Transforms/GVN/condprop.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/condprop.ll?rev=119713&view=auto ============================================================================== --- llvm/trunk/test/Transforms/GVN/condprop.ll (original) +++ llvm/trunk/test/Transforms/GVN/condprop.ll (removed) @@ -1,52 +0,0 @@ -; RUN: opt < %s -basicaa -gvn -S | grep {br i1 false} - - at a = external global i32 ; [#uses=7] - -define i32 @foo() nounwind { -entry: - %0 = load i32* @a, align 4 ; [#uses=1] - %1 = icmp eq i32 %0, 4 ; [#uses=1] - br i1 %1, label %bb, label %bb1 - -bb: ; preds = %entry - br label %bb8 - -bb1: ; preds = %entry - %2 = load i32* @a, align 4 ; [#uses=1] - %3 = icmp eq i32 %2, 5 ; [#uses=1] - br i1 %3, label %bb2, label %bb3 - -bb2: ; preds = %bb1 - br label %bb8 - -bb3: ; preds = %bb1 - %4 = load i32* @a, align 4 ; [#uses=1] - %5 = icmp eq i32 %4, 4 ; [#uses=1] - br i1 %5, label %bb4, label %bb5 - -bb4: ; preds = %bb3 - %6 = load i32* @a, align 4 ; [#uses=1] - %7 = add i32 %6, 5 ; [#uses=1] - br label %bb8 - -bb5: ; preds = %bb3 - %8 = load i32* @a, align 4 ; [#uses=1] - %9 = icmp eq i32 %8, 5 ; [#uses=1] - br i1 %9, label %bb6, label %bb7 - -bb6: ; preds = %bb5 - %10 = load i32* @a, align 4 ; [#uses=1] - %11 = add i32 %10, 4 ; [#uses=1] - br label %bb8 - -bb7: ; preds = %bb5 - %12 = load i32* @a, align 4 ; [#uses=1] - br label %bb8 - -bb8: ; preds = %bb7, %bb6, %bb4, %bb2, %bb - %.0 = phi i32 [ %12, %bb7 ], [ %11, %bb6 ], [ %7, %bb4 ], [ 4, %bb2 ], [ 5, %bb ] ; [#uses=1] - br label %return - -return: ; preds = %bb8 - ret i32 %.0 -} From baldrick at free.fr Thu Nov 18 12:38:35 2010 From: baldrick at free.fr (Duncan Sands) Date: Thu, 18 Nov 2010 19:38:35 +0100 Subject: [llvm-commits] [llvm] r119705 - /llvm/trunk/lib/Analysis/PHITransAddr.cpp In-Reply-To: <20101118170557.C87952A6C12C@llvm.org> References: <20101118170557.C87952A6C12C@llvm.org> Message-ID: <4CE572AB.3040002@free.fr> Hi Dan, > Use llvm_unreachable for "impossible" situations. isn't that what assertions are for? Ciao, Duncan. > > Modified: > llvm/trunk/lib/Analysis/PHITransAddr.cpp > > Modified: llvm/trunk/lib/Analysis/PHITransAddr.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/PHITransAddr.cpp?rev=119705&r1=119704&r2=119705&view=diff > ============================================================================== > --- llvm/trunk/lib/Analysis/PHITransAddr.cpp (original) > +++ llvm/trunk/lib/Analysis/PHITransAddr.cpp Thu Nov 18 11:05:57 2010 > @@ -15,6 +15,7 @@ > #include "llvm/Analysis/Dominators.h" > #include "llvm/Analysis/InstructionSimplify.h" > #include "llvm/Support/Debug.h" > +#include "llvm/Support/ErrorHandling.h" > #include "llvm/Support/raw_ostream.h" > using namespace llvm; > > @@ -66,9 +67,10 @@ > // If it isn't in the InstInputs list it is a subexpr incorporated into the > // address. Sanity check that it is phi translatable. > if (!CanPHITrans(I)) { > - errs()<< "Non phi translatable instruction found in PHITransAddr, either" > - "something is missing from InstInputs or CanPHITrans is wrong:\n"; > + errs()<< "Non phi translatable instruction found in PHITransAddr:\n"; > errs()<< *I<< '\n'; > + llvm_unreachable("Either something is missing from InstInputs or " > + "CanPHITrans is wrong."); > return false; > } > > @@ -92,9 +94,10 @@ > return false; > > if (!Tmp.empty()) { > - errs()<< "PHITransAddr inconsistent, contains extra instructions:\n"; > + errs()<< "PHITransAddr contains extra instructions:\n"; > for (unsigned i = 0, e = InstInputs.size(); i != e; ++i) > errs()<< " InstInput #"<< i<< " is "<< *InstInputs[i]<< "\n"; > + llvm_unreachable("This is unexpected."); > return false; > } > > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From resistor at me.com Thu Nov 18 12:43:21 2010 From: resistor at me.com (Owen Anderson) Date: Thu, 18 Nov 2010 10:43:21 -0800 Subject: [llvm-commits] [llvm] r119714 - in /llvm/trunk: lib/Transforms/Scalar/GVN.cpp test/Transforms/GVN/condprop.ll In-Reply-To: <20101118183240.D0D5A2A6C12C@llvm.org> References: <20101118183240.D0D5A2A6C12C@llvm.org> Message-ID: Extra special credit to Craig Silverstein for coming up with the insight that led to this improvement. I'd been banging my head against this design for a long time! --Owen On Nov 18, 2010, at 10:32 AM, Owen Anderson wrote: > Author: resistor > Date: Thu Nov 18 12:32:40 2010 > New Revision: 119714 > > URL: http://llvm.org/viewvc/llvm-project?rev=119714&view=rev > Log: > Completely rework the datastructure GVN uses to represent the value number to leader mapping. Previously, > this was a tree of hashtables, and a query recursed into the table for the immediate dominator ad infinitum > if the initial lookup failed. This led to really bad performance on tall, narrow CFGs. > > We can instead replace it with what is conceptually a multimap of value numbers to leaders (actually > represented by a hashtable with a list of Value*'s as the value type), and then > determine which leader from that set to use very cheaply thanks to the DFS numberings maintained by > DominatorTree. Because there are typically few duplicates of a given value, this scan tends to be > quite fast. Additionally, we use a custom linked list and BumpPtr allocation to avoid any unnecessary > allocation in representing the value-side of the multimap. > > This change brings with it a 15% (!) improvement in the total running time of GVN on 403.gcc, which I > think is pretty good considering that includes all the "real work" being done by MemDep as well. > > The one downside to this approach is that we can no longer use GVN to perform simple conditional progation, > but that seems like an acceptable loss since we now have LVI and CorrelatedValuePropagation to pick up > the slack. If you see conditional propagation that's not happening, please file bugs against LVI or CVP. > > Removed: > llvm/trunk/test/Transforms/GVN/condprop.ll > Modified: > llvm/trunk/lib/Transforms/Scalar/GVN.cpp > > Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=119714&r1=119713&r2=119714&view=diff > ============================================================================== > --- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original) > +++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Thu Nov 18 12:32:40 2010 > @@ -40,6 +40,7 @@ > #include "llvm/Analysis/MemoryBuiltins.h" > #include "llvm/Analysis/MemoryDependenceAnalysis.h" > #include "llvm/Analysis/PHITransAddr.h" > +#include "llvm/Support/Allocator.h" > #include "llvm/Support/CFG.h" > #include "llvm/Support/CommandLine.h" > #include "llvm/Support/Debug.h" > @@ -51,6 +52,7 @@ > #include "llvm/Transforms/Utils/BasicBlockUtils.h" > #include "llvm/Transforms/Utils/Local.h" > #include "llvm/Transforms/Utils/SSAUpdater.h" > +#include > using namespace llvm; > > STATISTIC(NumGVNInstr, "Number of instructions deleted"); > @@ -674,7 +676,45 @@ > const TargetData* TD; > > ValueTable VN; > - DenseMap localAvail; > + > + DenseMap > NumberTable; > + BumpPtrAllocator TableAllocator; > + void insert_table(uint32_t N, Value *V) { > + std::pair& Curr = NumberTable[N]; > + if (!Curr.first) { > + Curr.first = V; > + return; > + } > + > + std::pair* Node = > + TableAllocator.Allocate >(); > + Node->first = V; > + Node->second = Curr.second; > + Curr.second = Node; > + } > + > + void erase_table(uint32_t N, Value *V) { > + std::pair* Prev = 0; > + std::pair* Curr = &NumberTable[N]; > + > + while (Curr->first != V) { > + Prev = Curr; > + Curr = static_cast*>(Curr->second); > + } > + > + if (Prev) { > + Prev->second = Curr->second; > + } else { > + if (!Curr->second) { > + Curr->first = 0; > + } else { > + std::pair* Next = > + static_cast*>(Curr->second); > + Curr->first = Next->first; > + Curr->second = Next->second; > + } > + } > + } > > // List of critical edges to be split between iterations. > SmallVector, 4> toSplit; > @@ -1847,16 +1887,25 @@ > } > > Value *GVN::lookupNumber(BasicBlock *BB, uint32_t num) { > - DenseMap::iterator I = localAvail.find(BB); > - if (I == localAvail.end()) > - return 0; > - > - ValueNumberScope *Locals = I->second; > - while (Locals) { > - DenseMap::iterator I = Locals->table.find(num); > - if (I != Locals->table.end()) > - return I->second; > - Locals = Locals->parent; > + std::pair Vals = NumberTable[num]; > + if (!Vals.first) return 0; > + Instruction *Inst = dyn_cast(Vals.first); > + if (!Inst) return Vals.first; > + BasicBlock *Parent = Inst->getParent(); > + if (DT->dominates(Parent, BB)) > + return Inst; > + > + std::pair* Next = > + static_cast*>(Vals.second); > + while (Next) { > + Instruction *CurrInst = dyn_cast(Next->first); > + if (!CurrInst) return Next->first; > + > + BasicBlock *Parent = CurrInst->getParent(); > + if (DT->dominates(Parent, BB)) > + return CurrInst; > + > + Next = static_cast*>(Next->second); > } > > return 0; > @@ -1889,7 +1938,7 @@ > > if (!Changed) { > unsigned Num = VN.lookup_or_add(LI); > - localAvail[I->getParent()]->table.insert(std::make_pair(Num, LI)); > + insert_table(Num, LI); > } > > return Changed; > @@ -1898,41 +1947,21 @@ > uint32_t NextNum = VN.getNextUnusedValueNumber(); > unsigned Num = VN.lookup_or_add(I); > > - if (BranchInst *BI = dyn_cast(I)) { > - localAvail[I->getParent()]->table.insert(std::make_pair(Num, I)); > - > - if (!BI->isConditional() || isa(BI->getCondition())) > - return false; > - > - Value *BranchCond = BI->getCondition(); > - uint32_t CondVN = VN.lookup_or_add(BranchCond); > - > - BasicBlock *TrueSucc = BI->getSuccessor(0); > - BasicBlock *FalseSucc = BI->getSuccessor(1); > - > - if (TrueSucc->getSinglePredecessor()) > - localAvail[TrueSucc]->table[CondVN] = > - ConstantInt::getTrue(TrueSucc->getContext()); > - if (FalseSucc->getSinglePredecessor()) > - localAvail[FalseSucc]->table[CondVN] = > - ConstantInt::getFalse(TrueSucc->getContext()); > - > - return false; > - > // Allocations are always uniquely numbered, so we can save time and memory > // by fast failing them. > - } else if (isa(I) || isa(I)) { > - localAvail[I->getParent()]->table.insert(std::make_pair(Num, I)); > + if (isa(I) || isa(I)) { > + insert_table(Num, I); > return false; > } > > if (isa(I)) { > - localAvail[I->getParent()]->table.insert(std::make_pair(Num, I)); > + insert_table(Num, I); > + > // If the number we were assigned was a brand new VN, then we don't > // need to do a lookup to see if the number already exists > // somewhere in the domtree: it can't! > } else if (Num == NextNum) { > - localAvail[I->getParent()]->table.insert(std::make_pair(Num, I)); > + insert_table(Num, I); > > // Perform fast-path value-number based elimination of values inherited from > // dominators. > @@ -1946,7 +1975,7 @@ > return true; > > } else { > - localAvail[I->getParent()]->table.insert(std::make_pair(Num, I)); > + insert_table(Num, I); > } > > return false; > @@ -2095,20 +2124,19 @@ > if (P == CurrentBlock) { > NumWithout = 2; > break; > - } else if (!localAvail.count(P)) { > + } else if (!DT->dominates(&F.getEntryBlock(), P)) { > NumWithout = 2; > break; > } > > - DenseMap::iterator predV = > - localAvail[P]->table.find(ValNo); > - if (predV == localAvail[P]->table.end()) { > + Value* predV = lookupNumber(P, ValNo); > + if (predV == 0) { > PREPred = P; > ++NumWithout; > - } else if (predV->second == CurInst) { > + } else if (predV == CurInst) { > NumWithout = 2; > } else { > - predMap[P] = predV->second; > + predMap[P] = predV; > ++NumWith; > } > } > @@ -2167,7 +2195,7 @@ > ++NumGVNPRE; > > // Update the availability map to include the new instruction. > - localAvail[PREPred]->table.insert(std::make_pair(ValNo, PREInstr)); > + insert_table(ValNo, PREInstr); > > // Create a PHI to make the value available in this block. > PHINode* Phi = PHINode::Create(CurInst->getType(), > @@ -2180,12 +2208,13 @@ > } > > VN.add(Phi, ValNo); > - localAvail[CurrentBlock]->table[ValNo] = Phi; > + insert_table(ValNo, Phi); > > CurInst->replaceAllUsesWith(Phi); > if (MD && Phi->getType()->isPointerTy()) > MD->invalidateCachedPointerInfo(Phi); > VN.erase(CurInst); > + erase_table(ValNo, CurInst); > > DEBUG(dbgs() << "GVN PRE removed: " << *CurInst << '\n'); > if (MD) MD->removeInstruction(CurInst); > @@ -2217,16 +2246,7 @@ > /// iterateOnFunction - Executes one iteration of GVN > bool GVN::iterateOnFunction(Function &F) { > cleanupGlobalSets(); > - > - for (df_iterator DI = df_begin(DT->getRootNode()), > - DE = df_end(DT->getRootNode()); DI != DE; ++DI) { > - if (DI->getIDom()) > - localAvail[DI->getBlock()] = > - new ValueNumberScope(localAvail[DI->getIDom()->getBlock()]); > - else > - localAvail[DI->getBlock()] = new ValueNumberScope(0); > - } > - > + > // Top-down walk of the dominator tree > bool Changed = false; > #if 0 > @@ -2246,11 +2266,8 @@ > > void GVN::cleanupGlobalSets() { > VN.clear(); > - > - for (DenseMap::iterator > - I = localAvail.begin(), E = localAvail.end(); I != E; ++I) > - delete I->second; > - localAvail.clear(); > + NumberTable.clear(); > + TableAllocator.Reset(); > } > > /// verifyRemoved - Verify that the specified instruction does not occur in our > @@ -2260,17 +2277,14 @@ > > // Walk through the value number scope to make sure the instruction isn't > // ferreted away in it. > - for (DenseMap::const_iterator > - I = localAvail.begin(), E = localAvail.end(); I != E; ++I) { > - const ValueNumberScope *VNS = I->second; > - > - while (VNS) { > - for (DenseMap::const_iterator > - II = VNS->table.begin(), IE = VNS->table.end(); II != IE; ++II) { > - assert(II->second != Inst && "Inst still in value numbering scope!"); > - } > - > - VNS = VNS->parent; > + for (DenseMap >::const_iterator > + I = NumberTable.begin(), E = NumberTable.end(); I != E; ++I) { > + std::pair const * Node = &I->second; > + assert(Node->first != Inst && "Inst still in value numbering scope!"); > + > + while (Node->second) { > + Node = static_cast*>(Node->second); > + assert(Node->first != Inst && "Inst still in value numbering scope!"); > } > } > } > > Removed: llvm/trunk/test/Transforms/GVN/condprop.ll > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/condprop.ll?rev=119713&view=auto > ============================================================================== > --- llvm/trunk/test/Transforms/GVN/condprop.ll (original) > +++ llvm/trunk/test/Transforms/GVN/condprop.ll (removed) > @@ -1,52 +0,0 @@ > -; RUN: opt < %s -basicaa -gvn -S | grep {br i1 false} > - > - at a = external global i32 ; [#uses=7] > - > -define i32 @foo() nounwind { > -entry: > - %0 = load i32* @a, align 4 ; [#uses=1] > - %1 = icmp eq i32 %0, 4 ; [#uses=1] > - br i1 %1, label %bb, label %bb1 > - > -bb: ; preds = %entry > - br label %bb8 > - > -bb1: ; preds = %entry > - %2 = load i32* @a, align 4 ; [#uses=1] > - %3 = icmp eq i32 %2, 5 ; [#uses=1] > - br i1 %3, label %bb2, label %bb3 > - > -bb2: ; preds = %bb1 > - br label %bb8 > - > -bb3: ; preds = %bb1 > - %4 = load i32* @a, align 4 ; [#uses=1] > - %5 = icmp eq i32 %4, 4 ; [#uses=1] > - br i1 %5, label %bb4, label %bb5 > - > -bb4: ; preds = %bb3 > - %6 = load i32* @a, align 4 ; [#uses=1] > - %7 = add i32 %6, 5 ; [#uses=1] > - br label %bb8 > - > -bb5: ; preds = %bb3 > - %8 = load i32* @a, align 4 ; [#uses=1] > - %9 = icmp eq i32 %8, 5 ; [#uses=1] > - br i1 %9, label %bb6, label %bb7 > - > -bb6: ; preds = %bb5 > - %10 = load i32* @a, align 4 ; [#uses=1] > - %11 = add i32 %10, 4 ; [#uses=1] > - br label %bb8 > - > -bb7: ; preds = %bb5 > - %12 = load i32* @a, align 4 ; [#uses=1] > - br label %bb8 > - > -bb8: ; preds = %bb7, %bb6, %bb4, %bb2, %bb > - %.0 = phi i32 [ %12, %bb7 ], [ %11, %bb6 ], [ %7, %bb4 ], [ 4, %bb2 ], [ 5, %bb ] ; [#uses=1] > - br label %return > - > -return: ; preds = %bb8 > - ret i32 %.0 > -} > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101118/3e42d94d/attachment.html From pichet2000 at gmail.com Thu Nov 18 12:43:36 2010 From: pichet2000 at gmail.com (Francois Pichet) Date: Thu, 18 Nov 2010 13:43:36 -0500 Subject: [llvm-commits] [llvm-testresults] [llvm] r119600 - /llvm/trunk/unittests/VMCore/ValueMapTest.cpp In-Reply-To: References: <20101118005950.635A32A6C12C@llvm.org> Message-ID: On Wed, Nov 17, 2010 at 9:50 PM, NAKAMURA Takumi wrote: > I saw it was reverted in r119606. > > I have two-way patches. Which(either of two) can we take? > Confirmed on CentOS5, VS8 and VS10. > > > * 0001-unittests-CMakeLists.txt-Suppress-building-ValueMapT.patch > > unittests/CMakeLists.txt: Suppress building ValueMapTest on MSC older than 2010. > > It seems VS8 and VS9 do not accept *valid* syntax. > > > * 0002-unittests-VMCore-ValueMapTest.cpp-Workaround-It-was-.patch > > unittests/VMCore/ValueMapTest.cpp: Workaround: It was the cause of > syntax error on VS8 and VS9. I think it would be better and simpler to stop building ValueMapTest.cpp on MSVC 2008 and lower. +1 for patch 0001. From dalej at apple.com Thu Nov 18 12:41:33 2010 From: dalej at apple.com (Dale Johannesen) Date: Thu, 18 Nov 2010 18:41:33 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r119715 - in /llvm-gcc-4.2/trunk/gcc/testsuite: gcc.apple/6025404.c gcc.apple/default-x86_64-sse3.c gcc.target/i386/20060512-1.c gcc.target/i386/20060512-3.c gcc.target/i386/reload-1.c Message-ID: <20101118184133.D31FB2A6C12C@llvm.org> Author: johannes Date: Thu Nov 18 12:41:33 2010 New Revision: 119715 URL: http://llvm.org/viewvc/llvm-project?rev=119715&view=rev Log: *mmintrin.h no longer brings in stdlib.h. Adjust tests that assume it did. Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/6025404.c llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/default-x86_64-sse3.c llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/20060512-1.c llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/20060512-3.c llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/reload-1.c Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/6025404.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/6025404.c?rev=119715&r1=119714&r2=119715&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/6025404.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/6025404.c Thu Nov 18 12:41:33 2010 @@ -3,6 +3,8 @@ /* { dg-options "-O3 -mssse3" } */ #include #include +/* LLVM LOCAL tmmintrin.h no longer declares abort */ +#include #include "../gcc.dg/i386-cpuid.h" void foo(__m128i *a, __m128i *b, __m128i c, __m128i d, __m128i e) { Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/default-x86_64-sse3.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/default-x86_64-sse3.c?rev=119715&r1=119714&r2=119715&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/default-x86_64-sse3.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/default-x86_64-sse3.c Thu Nov 18 12:41:33 2010 @@ -6,6 +6,8 @@ #error "expected -m64 to enable -msse3 by default" #endif #include +/* LLVM LOCAL pmmintrin no longer declares exit */ +#include main () { static __m128 x, y, z; Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/20060512-1.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/20060512-1.c?rev=119715&r1=119714&r2=119715&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/20060512-1.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/20060512-1.c Thu Nov 18 12:41:33 2010 @@ -2,6 +2,8 @@ /* { dg-require-effective-target ilp32 } */ /* { dg-options "-std=gnu99 -msse2" } */ #include +/* LLVM LOCAL emmintrin no longer defines abort */ +#include __m128i __attribute__ ((__noinline__)) vector_using_function () { Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/20060512-3.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/20060512-3.c?rev=119715&r1=119714&r2=119715&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/20060512-3.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/20060512-3.c Thu Nov 18 12:41:33 2010 @@ -2,6 +2,8 @@ /* { dg-require-effective-target ilp32 } */ /* { dg-options "-std=gnu99 -msse2 -mstackrealign" } */ #include +/* LLVM LOCAL emmintrin no longer defines abort */ +#include __m128i __attribute__ ((__noinline__)) vector_using_function () { Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/reload-1.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/reload-1.c?rev=119715&r1=119714&r2=119715&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/reload-1.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/reload-1.c Thu Nov 18 12:41:33 2010 @@ -6,6 +6,8 @@ /* { dg-require-effective-target ilp32 } */ /* { dg-final { scan-rtl-dump "deleted 5 dead insns" "csa" } }*/ #include +/* LLVM LOCAL emmintrin no longer defines uintptr_t */ +#include typedef __SIZE_TYPE__ size_t; typedef float vFloat __attribute__ ((__vector_size__ (16))); typedef double vDouble __attribute__ ((__vector_size__ (16))); From grosbach at apple.com Thu Nov 18 12:46:31 2010 From: grosbach at apple.com (Jim Grosbach) Date: Thu, 18 Nov 2010 10:46:31 -0800 Subject: [llvm-commits] [patch] ARM/MC/ELF add new stub for movt/movw in ARMFixupKinds In-Reply-To: References: <8ABAEBC3-996C-4C2E-B799-64222DAAE5C7@apple.com> <4BEDF42A-52BD-4EB0-A5B2-174318647BCB@apple.com> Message-ID: <636A1028-47A1-4C00-A938-93275B77E49F@apple.com> Yep, this is definitely the kind of thing I'm thinking. Looking good. Some comments below. Index: lib/Target/ARM/ARMInstrInfo.td =================================================================== --- lib/Target/ARM/ARMInstrInfo.td (revision 119149) +++ lib/Target/ARM/ARMInstrInfo.td (working copy)@@ -425,6 +425,17 @@ let PrintMethod = "printAddrModeImm12Operand"; let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm); } + + +// For movt +// +def addrmode_movt : Operand { + let EncoderMethod = "getAddrModeMovtOpValue"; + // let PrintMethod = ""; + // let MIOperandInfo = (ops i32imm:$imm); +} + + A bit more verbose comment would be good. Also, we already have "lo16AllZero" as a predicate. If it works, it would be good to combine these. For naming, it's not really an addressing mode. Your usage here isn't inconsistent with the rest of the backend, as it's already abused elsewhere, I'd just like to avoid propagating the issue. Something like "movt_imm" perhaps? Trailing whitespace and extraneous vertical whitespace. There are a few other examples in the patch. For brevity, I won't call them out individually. Just do a once-over of the diffs and fix them pre-commit, please. Index: lib/Target/ARM/ARMCodeEmitter.cpp =================================================================== --- lib/Target/ARM/ARMCodeEmitter.cpp (revision 119149) +++ lib/Target/ARM/ARMCodeEmitter.cpp (working copy) @@ -214,6 +214,12 @@ Binary |= (Reg << 13); return Binary; } + + unsigned getAddrModeMovtOpValue(const MachineInstr &MI, unsigned Op) const { + assert(0 && "Unsupported"); + return 0; + } + This can't assert() if we want to even pretend to keep the current JIT working. It doesn't have to do anything since the MOVTi16 operand is already handled in emitDataProcessingInstruction(), so it should just return 0 and be done. The MC based stuff wants to avoid all of the dedicated .cpp code that's part of the current JIT ARMCodeEmitter, so it needs the getOpValue functions to do stuff. uint32_t ARMMCCodeEmitter:: +getAddrModeMovtOpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups) const { + // {20-16} = imm{15-12} + // {11-0} = imm{11-0} + const MCOperand &MO = MI.getOperand(OpIdx); + if (MO.isImm()) { + return static_cast(MO.getImm()); + } else if (MO.isFPImm()) { + return static_cast(APFloat(MO.getFPImm()) + .bitcastToAPInt().getHiBits(32).getLimitedValue()); An FP immediate should never get here. The necessary bitcasting should have taken place at a higher level. + } else if (MO.isExpr()) { + const MCExpr *Expr = MO.getExpr(); + switch (Expr->getKind()) { + case MCExpr::SymbolRef: { + const MCSymbolRefExpr &SRE = cast(*Expr); You can just use a dyn_cast<> here, I believe. if (const MCSymbolRefExpr *Expr = dyn_cast(MO.getExpr())) { MCFixupKind Kind; switch (Expr->getKind()) { return 0; } llvm_unreachable("Unexpected expression type in MOVT operand!"); +#ifndef NDEBUG + errs() << MO; +#endif + llvm_unreachable(0); + return 0; +}; Just put a message in llvm_unreachable() like the above. No need to dump the operand here. + // The next two are for the movt/movw pair (armv7) It's ARMv6T2 constrained, not ARMv7 (i.e., there are pre-v7 chips that have these instructions). + // the 16bit fields are split into a 4HI:xxxx:12LO Using the standard .td file syntax for specifying the bit-range might make this more readable. It took me a moment to realize what this was saying, anyway. Not a huge deal, just something to consider. Also, the bits of the immediate are split up different in T2 than in ARM mode. + // Fixme: do we need new ones for Thumb? If the fixup value implies the bit-layout of the fixup to be done (which I think it does/should(?)), then yes, as the T2 encodings are different. + fixup_arm_movt_hi16, // :upper16: Encoding A1 + fixup_arm_movw_lo16, // :lower16: Encoding A2 If referencing ARM documentation encodings, giving the section number also would help. "A8.6.99 Encoding A1", for example. True completeness would imply a document revision indicator as well, but that might be overkill. -Jim On Nov 17, 2010, at 9:03 AM, Jason Kim wrote: > On Wed, Nov 17, 2010 at 8:45 AM, Jason Kim wrote: >> -llvmdev >> +llvmcommits >> >> On Tue, Nov 16, 2010 at 4:27 PM, Jim Grosbach wrote: >>> >>> On Nov 16, 2010, at 4:01 PM, Jason Kim wrote: >>> >>> +llvmdev >>> -llvmcommits >>> >>> On Fri, Nov 12, 2010 at 8:03 AM, Jim Grosbach wrote: >>> >>> Sorta. getBinaryCodeForInst() is auto-generated by tablegen, so shouldn't be >>> modified directly. The target can register hooks for instruction operands >>> for any special encoding needs, including registering fixups, using the >>> EncoderMethod string. For an example, have a look at the LDRi12 instruction >>> and how it registers a fixup for the addrmode_imm12 operand when it needs >>> one. >>> >>> Hi Jim,. follow up question for ya: >>> >>> The current movt/movw pair (as defined in ARMInstrInfo.td) does not >>> use EncoderMethod string to declare a special case handler. >>> >>> There's two parts to how this works. First, is the handling of the movt/movw >>> pair for instruction selection, and then the handling of the upper/lower >>> operand flags for those instructions. >>> MOVi32imm is expanded as a pseudo instruction in ARMExpandPseudos pass, and >>> any other patterns that do similar things should also be expanded there. For >>> a few special cases where we need the post-RA scheduler to handle the >>> instruction sequences as an atomic unit (PICLDR, PICADD, the >>> eh.sjlj.setjmp/longjmp patterns, for example), we expand them even later, >>> during MC lowering in ARMAsmPrinter.cpp. As a result, the movt and movw >>> instructions should make it into the code emitter as separate entries, not >>> as a composite pair. >>> For operands that aren't compile-time constants, the operand flag gets set >>> in the expansion to the MOVT/MOVW instructions: >>> if (MO.isImm()) { >>> unsigned Imm = MO.getImm(); >>> unsigned Lo16 = Imm & 0xffff; >>> unsigned Hi16 = (Imm >> 16) & 0xffff; >>> LO16 = LO16.addImm(Lo16); >>> HI16 = HI16.addImm(Hi16); >>> } else { >>> const GlobalValue *GV = MO.getGlobal(); >>> unsigned TF = MO.getTargetFlags(); >>> LO16 = LO16.addGlobalAddress(GV, MO.getOffset(), TF | >>> ARMII::MO_LO16); >>> HI16 = HI16.addGlobalAddress(GV, MO.getOffset(), TF | >>> ARMII::MO_HI16); >>> } >>> That's then marked with VK_ARM_LO16/VK_ARM_HI16 by ARMMCInstLower.cpp when >>> it's looking at symbol reference operands. >>> >>> At the current time, for the assembly printing, >>> MCAsmStreamer::EmitInstruction(const MCInst &Inst) calls out to >>> MCExpr::print(raw_ostream &OS) >>> which then calls out to MCSymbolRefExpr::getVariantKindName() to >>> print the magic :lower16: and :upper16: asm tags for .s emission >>> Currently, movt/movw emission works correctly in .s, but not in .o emission >>> >>> This lead me to believe that the correct place to put the code to handle >>> MCSymbolRefExpr::VK_ARM_(HI||LO)16 for the .o path was to place a case >>> in getMachineOpValue() (i.e. not >>> ARMMCCodeEmitter::getBinaryCodeForInstr like I mistakenly wrote in my >>> prior email.) >>> >>> Are you implying that the movt/movw instruction definition in the .td >>> files need to be fixed up instead to declare a new special case for .o >>> emission via the EncoderMethod string, for the .o emission of >>> movt/movw to be considered "correct"? >>> >>> A custom encoder may be the best way to differentiate the kinds of fixups >>> we'll need for these operands (e.g., using LO16 may generate different >>> fixups depending on which instruction it's used for, which implies different >>> operand node types, and thus different encoder methods). In any case, the >>> encoder, be it in getMachineOpValue() or a specialized method, will need to >>> differentiate between an immediate operand and a symbol reference expression >>> operand. In the latter case, it'll create a fixup for the lo/hi variantkind >>> if one is present. >> >> Got ya. Is this more in tune with what you had in mind? (applies cleanly to >> -r119149) > > Yikes. As sent, patch is missing two enum definitions > The update is here. > Sorry for the noise (again ): > -jason > >> >> Thanks! >> >>> -Jim >>> >>> On Nov 11, 2010, at 7:06 PM, Jason Kim wrote: >>> >>> Is getBinaryCodeForInst the best place to place the case for >>> >>> supporting movt/movw fixup emission? >>> >>> The call stack seems to be: >>> >>> #0 ARMMCCodeEmitter::getBinaryCodeForInstr >>> >>> #1 ARMMCCodeEmitter::EncodeInstruction >>> >>> #2 MCELFStreamer::EmitInstToData >>> >>> #3 MCObjectStreamer::EmitInstruction >>> >>> #4 ARMAsmPrinter::EmitInstruction >>> >>> _______________________________________________ >>> >>> llvm-commits mailing list >>> >>> llvm-commits at cs.uiuc.edu >>> >>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >>> >>> >>> >>> >> > From gohman at apple.com Thu Nov 18 12:45:06 2010 From: gohman at apple.com (Dan Gohman) Date: Thu, 18 Nov 2010 18:45:06 -0000 Subject: [llvm-commits] [llvm] r119716 - in /llvm/trunk: include/llvm/CodeGen/Passes.h include/llvm/InitializePasses.h lib/CodeGen/CMakeLists.txt lib/CodeGen/ExpandISelPseudos.cpp lib/CodeGen/ExpandPseudos.cpp Message-ID: <20101118184506.7E4162A6C12C@llvm.org> Author: djg Date: Thu Nov 18 12:45:06 2010 New Revision: 119716 URL: http://llvm.org/viewvc/llvm-project?rev=119716&view=rev Log: Rename ExpandPseudos to ExpandISelPseudos to help clarify its role. Added: llvm/trunk/lib/CodeGen/ExpandISelPseudos.cpp - copied, changed from r119712, llvm/trunk/lib/CodeGen/ExpandPseudos.cpp Removed: llvm/trunk/lib/CodeGen/ExpandPseudos.cpp Modified: llvm/trunk/include/llvm/CodeGen/Passes.h llvm/trunk/include/llvm/InitializePasses.h llvm/trunk/lib/CodeGen/CMakeLists.txt Modified: llvm/trunk/include/llvm/CodeGen/Passes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/Passes.h?rev=119716&r1=119715&r2=119716&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/Passes.h (original) +++ llvm/trunk/include/llvm/CodeGen/Passes.h Thu Nov 18 12:45:06 2010 @@ -213,9 +213,9 @@ /// addressing. FunctionPass *createLocalStackSlotAllocationPass(); - /// createExpandPseudosPass - This pass expands pseudo-instructions. + /// createExpandISelPseudosPass - This pass expands pseudo-instructions. /// - FunctionPass *createExpandPseudosPass(); + FunctionPass *createExpandISelPseudosPass(); } // End llvm namespace Modified: llvm/trunk/include/llvm/InitializePasses.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/InitializePasses.h?rev=119716&r1=119715&r2=119716&view=diff ============================================================================== --- llvm/trunk/include/llvm/InitializePasses.h (original) +++ llvm/trunk/include/llvm/InitializePasses.h Thu Nov 18 12:45:06 2010 @@ -92,7 +92,7 @@ void initializeDominanceFrontierPass(PassRegistry&); void initializeDominatorTreePass(PassRegistry&); void initializeEdgeProfilerPass(PassRegistry&); -void initializeExpandPseudosPass(PassRegistry&); +void initializeExpandISelPseudosPass(PassRegistry&); void initializeFindUsedTypesPass(PassRegistry&); void initializeFunctionAttrsPass(PassRegistry&); void initializeGCModuleInfoPass(PassRegistry&); Modified: llvm/trunk/lib/CodeGen/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/CMakeLists.txt?rev=119716&r1=119715&r2=119716&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/CMakeLists.txt (original) +++ llvm/trunk/lib/CodeGen/CMakeLists.txt Thu Nov 18 12:45:06 2010 @@ -11,7 +11,7 @@ DwarfEHPrepare.cpp ELFCodeEmitter.cpp ELFWriter.cpp - ExpandPseudos.cpp + ExpandISelPseudos.cpp GCMetadata.cpp GCMetadataPrinter.cpp GCStrategy.cpp Copied: llvm/trunk/lib/CodeGen/ExpandISelPseudos.cpp (from r119712, llvm/trunk/lib/CodeGen/ExpandPseudos.cpp) URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ExpandISelPseudos.cpp?p2=llvm/trunk/lib/CodeGen/ExpandISelPseudos.cpp&p1=llvm/trunk/lib/CodeGen/ExpandPseudos.cpp&r1=119712&r2=119716&rev=119716&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/ExpandPseudos.cpp (original) +++ llvm/trunk/lib/CodeGen/ExpandISelPseudos.cpp Thu Nov 18 12:45:06 2010 @@ -1,4 +1,4 @@ -//===-- llvm/CodeGen/ExpandPseudos.cpp --------------------------*- C++ -*-===// +//===-- llvm/CodeGen/ExpandISelPseudos.cpp ----------------------*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -14,7 +14,7 @@ // //===----------------------------------------------------------------------===// -#define DEBUG_TYPE "expand-pseudos" +#define DEBUG_TYPE "expand-isel-pseudos" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/Passes.h" @@ -24,16 +24,16 @@ using namespace llvm; namespace { - class ExpandPseudos : public MachineFunctionPass { + class ExpandISelPseudos : public MachineFunctionPass { public: static char ID; // Pass identification, replacement for typeid - ExpandPseudos() : MachineFunctionPass(ID) {} + ExpandISelPseudos() : MachineFunctionPass(ID) {} private: virtual bool runOnMachineFunction(MachineFunction &MF); const char *getPassName() const { - return "Expand CodeGen Pseudo-instructions"; + return "Expand ISel Pseudo-instructions"; } virtual void getAnalysisUsage(AnalysisUsage &AU) const { @@ -42,15 +42,15 @@ }; } // end anonymous namespace -char ExpandPseudos::ID = 0; -INITIALIZE_PASS(ExpandPseudos, "expand-pseudos", +char ExpandISelPseudos::ID = 0; +INITIALIZE_PASS(ExpandISelPseudos, "expand-isel-pseudos", "Expand CodeGen Pseudo-instructions", false, false) -FunctionPass *llvm::createExpandPseudosPass() { - return new ExpandPseudos(); +FunctionPass *llvm::createExpandISelPseudosPass() { + return new ExpandISelPseudos(); } -bool ExpandPseudos::runOnMachineFunction(MachineFunction &MF) { +bool ExpandISelPseudos::runOnMachineFunction(MachineFunction &MF) { bool Changed = false; const TargetLowering *TLI = MF.getTarget().getTargetLowering(); Removed: llvm/trunk/lib/CodeGen/ExpandPseudos.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ExpandPseudos.cpp?rev=119715&view=auto ============================================================================== --- llvm/trunk/lib/CodeGen/ExpandPseudos.cpp (original) +++ llvm/trunk/lib/CodeGen/ExpandPseudos.cpp (removed) @@ -1,82 +0,0 @@ -//===-- llvm/CodeGen/ExpandPseudos.cpp --------------------------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// Expand Psuedo-instructions produced by ISel. These are usually to allow -// the expansion to contain control flow, such as a conditional move -// implemented with a conditional branch and a phi, or an atomic operation -// implemented with a loop. -// -//===----------------------------------------------------------------------===// - -#define DEBUG_TYPE "expand-pseudos" -#include "llvm/CodeGen/MachineFunction.h" -#include "llvm/CodeGen/MachineFunctionPass.h" -#include "llvm/CodeGen/Passes.h" -#include "llvm/Target/TargetLowering.h" -#include "llvm/Target/TargetMachine.h" -#include "llvm/Support/Debug.h" -using namespace llvm; - -namespace { - class ExpandPseudos : public MachineFunctionPass { - public: - static char ID; // Pass identification, replacement for typeid - ExpandPseudos() : MachineFunctionPass(ID) {} - - private: - virtual bool runOnMachineFunction(MachineFunction &MF); - - const char *getPassName() const { - return "Expand CodeGen Pseudo-instructions"; - } - - virtual void getAnalysisUsage(AnalysisUsage &AU) const { - MachineFunctionPass::getAnalysisUsage(AU); - } - }; -} // end anonymous namespace - -char ExpandPseudos::ID = 0; -INITIALIZE_PASS(ExpandPseudos, "expand-pseudos", - "Expand CodeGen Pseudo-instructions", false, false) - -FunctionPass *llvm::createExpandPseudosPass() { - return new ExpandPseudos(); -} - -bool ExpandPseudos::runOnMachineFunction(MachineFunction &MF) { - bool Changed = false; - const TargetLowering *TLI = MF.getTarget().getTargetLowering(); - - // Iterate through each instruction in the function, looking for pseudos. - for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) { - MachineBasicBlock *MBB = I; - for (MachineBasicBlock::iterator MBBI = MBB->begin(), MBBE = MBB->end(); - MBBI != MBBE; ) { - MachineInstr *MI = MBBI++; - - // If MI is a pseudo, expand it. - const TargetInstrDesc &TID = MI->getDesc(); - if (TID.usesCustomInsertionHook()) { - Changed = true; - MachineBasicBlock *NewMBB = - TLI->EmitInstrWithCustomInserter(MI, MBB); - // The expansion may involve new basic blocks. - if (NewMBB != MBB) { - MBB = NewMBB; - I = NewMBB; - MBBI = NewMBB->begin(); - MBBE = NewMBB->end(); - } - } - } - } - - return Changed; -} From grosbach at apple.com Thu Nov 18 12:49:21 2010 From: grosbach at apple.com (Jim Grosbach) Date: Thu, 18 Nov 2010 10:49:21 -0800 Subject: [llvm-commits] [llvm] r119716 - in /llvm/trunk: include/llvm/CodeGen/Passes.h include/llvm/InitializePasses.h lib/CodeGen/CMakeLists.txt lib/CodeGen/ExpandISelPseudos.cpp lib/CodeGen/ExpandPseudos.cpp In-Reply-To: <20101118184506.7E4162A6C12C@llvm.org> References: <20101118184506.7E4162A6C12C@llvm.org> Message-ID: <509929BA-7794-4AFB-BC1A-8077B78360D5@apple.com> Great! Thanks, Dan. -Jim On Nov 18, 2010, at 10:45 AM, Dan Gohman wrote: > Author: djg > Date: Thu Nov 18 12:45:06 2010 > New Revision: 119716 > > URL: http://llvm.org/viewvc/llvm-project?rev=119716&view=rev > Log: > Rename ExpandPseudos to ExpandISelPseudos to help clarify its role. > > Added: > llvm/trunk/lib/CodeGen/ExpandISelPseudos.cpp > - copied, changed from r119712, llvm/trunk/lib/CodeGen/ExpandPseudos.cpp > Removed: > llvm/trunk/lib/CodeGen/ExpandPseudos.cpp > Modified: > llvm/trunk/include/llvm/CodeGen/Passes.h > llvm/trunk/include/llvm/InitializePasses.h > llvm/trunk/lib/CodeGen/CMakeLists.txt > > Modified: llvm/trunk/include/llvm/CodeGen/Passes.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/Passes.h?rev=119716&r1=119715&r2=119716&view=diff > ============================================================================== > --- llvm/trunk/include/llvm/CodeGen/Passes.h (original) > +++ llvm/trunk/include/llvm/CodeGen/Passes.h Thu Nov 18 12:45:06 2010 > @@ -213,9 +213,9 @@ > /// addressing. > FunctionPass *createLocalStackSlotAllocationPass(); > > - /// createExpandPseudosPass - This pass expands pseudo-instructions. > + /// createExpandISelPseudosPass - This pass expands pseudo-instructions. > /// > - FunctionPass *createExpandPseudosPass(); > + FunctionPass *createExpandISelPseudosPass(); > > } // End llvm namespace > > > Modified: llvm/trunk/include/llvm/InitializePasses.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/InitializePasses.h?rev=119716&r1=119715&r2=119716&view=diff > ============================================================================== > --- llvm/trunk/include/llvm/InitializePasses.h (original) > +++ llvm/trunk/include/llvm/InitializePasses.h Thu Nov 18 12:45:06 2010 > @@ -92,7 +92,7 @@ > void initializeDominanceFrontierPass(PassRegistry&); > void initializeDominatorTreePass(PassRegistry&); > void initializeEdgeProfilerPass(PassRegistry&); > -void initializeExpandPseudosPass(PassRegistry&); > +void initializeExpandISelPseudosPass(PassRegistry&); > void initializeFindUsedTypesPass(PassRegistry&); > void initializeFunctionAttrsPass(PassRegistry&); > void initializeGCModuleInfoPass(PassRegistry&); > > Modified: llvm/trunk/lib/CodeGen/CMakeLists.txt > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/CMakeLists.txt?rev=119716&r1=119715&r2=119716&view=diff > ============================================================================== > --- llvm/trunk/lib/CodeGen/CMakeLists.txt (original) > +++ llvm/trunk/lib/CodeGen/CMakeLists.txt Thu Nov 18 12:45:06 2010 > @@ -11,7 +11,7 @@ > DwarfEHPrepare.cpp > ELFCodeEmitter.cpp > ELFWriter.cpp > - ExpandPseudos.cpp > + ExpandISelPseudos.cpp > GCMetadata.cpp > GCMetadataPrinter.cpp > GCStrategy.cpp > > Copied: llvm/trunk/lib/CodeGen/ExpandISelPseudos.cpp (from r119712, llvm/trunk/lib/CodeGen/ExpandPseudos.cpp) > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ExpandISelPseudos.cpp?p2=llvm/trunk/lib/CodeGen/ExpandISelPseudos.cpp&p1=llvm/trunk/lib/CodeGen/ExpandPseudos.cpp&r1=119712&r2=119716&rev=119716&view=diff > ============================================================================== > --- llvm/trunk/lib/CodeGen/ExpandPseudos.cpp (original) > +++ llvm/trunk/lib/CodeGen/ExpandISelPseudos.cpp Thu Nov 18 12:45:06 2010 > @@ -1,4 +1,4 @@ > -//===-- llvm/CodeGen/ExpandPseudos.cpp --------------------------*- C++ -*-===// > +//===-- llvm/CodeGen/ExpandISelPseudos.cpp ----------------------*- C++ -*-===// > // > // The LLVM Compiler Infrastructure > // > @@ -14,7 +14,7 @@ > // > //===----------------------------------------------------------------------===// > > -#define DEBUG_TYPE "expand-pseudos" > +#define DEBUG_TYPE "expand-isel-pseudos" > #include "llvm/CodeGen/MachineFunction.h" > #include "llvm/CodeGen/MachineFunctionPass.h" > #include "llvm/CodeGen/Passes.h" > @@ -24,16 +24,16 @@ > using namespace llvm; > > namespace { > - class ExpandPseudos : public MachineFunctionPass { > + class ExpandISelPseudos : public MachineFunctionPass { > public: > static char ID; // Pass identification, replacement for typeid > - ExpandPseudos() : MachineFunctionPass(ID) {} > + ExpandISelPseudos() : MachineFunctionPass(ID) {} > > private: > virtual bool runOnMachineFunction(MachineFunction &MF); > > const char *getPassName() const { > - return "Expand CodeGen Pseudo-instructions"; > + return "Expand ISel Pseudo-instructions"; > } > > virtual void getAnalysisUsage(AnalysisUsage &AU) const { > @@ -42,15 +42,15 @@ > }; > } // end anonymous namespace > > -char ExpandPseudos::ID = 0; > -INITIALIZE_PASS(ExpandPseudos, "expand-pseudos", > +char ExpandISelPseudos::ID = 0; > +INITIALIZE_PASS(ExpandISelPseudos, "expand-isel-pseudos", > "Expand CodeGen Pseudo-instructions", false, false) > > -FunctionPass *llvm::createExpandPseudosPass() { > - return new ExpandPseudos(); > +FunctionPass *llvm::createExpandISelPseudosPass() { > + return new ExpandISelPseudos(); > } > > -bool ExpandPseudos::runOnMachineFunction(MachineFunction &MF) { > +bool ExpandISelPseudos::runOnMachineFunction(MachineFunction &MF) { > bool Changed = false; > const TargetLowering *TLI = MF.getTarget().getTargetLowering(); > > > Removed: llvm/trunk/lib/CodeGen/ExpandPseudos.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ExpandPseudos.cpp?rev=119715&view=auto > ============================================================================== > --- llvm/trunk/lib/CodeGen/ExpandPseudos.cpp (original) > +++ llvm/trunk/lib/CodeGen/ExpandPseudos.cpp (removed) > @@ -1,82 +0,0 @@ > -//===-- llvm/CodeGen/ExpandPseudos.cpp --------------------------*- C++ -*-===// > -// > -// The LLVM Compiler Infrastructure > -// > -// This file is distributed under the University of Illinois Open Source > -// License. See LICENSE.TXT for details. > -// > -//===----------------------------------------------------------------------===// > -// > -// Expand Psuedo-instructions produced by ISel. These are usually to allow > -// the expansion to contain control flow, such as a conditional move > -// implemented with a conditional branch and a phi, or an atomic operation > -// implemented with a loop. > -// > -//===----------------------------------------------------------------------===// > - > -#define DEBUG_TYPE "expand-pseudos" > -#include "llvm/CodeGen/MachineFunction.h" > -#include "llvm/CodeGen/MachineFunctionPass.h" > -#include "llvm/CodeGen/Passes.h" > -#include "llvm/Target/TargetLowering.h" > -#include "llvm/Target/TargetMachine.h" > -#include "llvm/Support/Debug.h" > -using namespace llvm; > - > -namespace { > - class ExpandPseudos : public MachineFunctionPass { > - public: > - static char ID; // Pass identification, replacement for typeid > - ExpandPseudos() : MachineFunctionPass(ID) {} > - > - private: > - virtual bool runOnMachineFunction(MachineFunction &MF); > - > - const char *getPassName() const { > - return "Expand CodeGen Pseudo-instructions"; > - } > - > - virtual void getAnalysisUsage(AnalysisUsage &AU) const { > - MachineFunctionPass::getAnalysisUsage(AU); > - } > - }; > -} // end anonymous namespace > - > -char ExpandPseudos::ID = 0; > -INITIALIZE_PASS(ExpandPseudos, "expand-pseudos", > - "Expand CodeGen Pseudo-instructions", false, false) > - > -FunctionPass *llvm::createExpandPseudosPass() { > - return new ExpandPseudos(); > -} > - > -bool ExpandPseudos::runOnMachineFunction(MachineFunction &MF) { > - bool Changed = false; > - const TargetLowering *TLI = MF.getTarget().getTargetLowering(); > - > - // Iterate through each instruction in the function, looking for pseudos. > - for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) { > - MachineBasicBlock *MBB = I; > - for (MachineBasicBlock::iterator MBBI = MBB->begin(), MBBE = MBB->end(); > - MBBI != MBBE; ) { > - MachineInstr *MI = MBBI++; > - > - // If MI is a pseudo, expand it. > - const TargetInstrDesc &TID = MI->getDesc(); > - if (TID.usesCustomInsertionHook()) { > - Changed = true; > - MachineBasicBlock *NewMBB = > - TLI->EmitInstrWithCustomInserter(MI, MBB); > - // The expansion may involve new basic blocks. > - if (NewMBB != MBB) { > - MBB = NewMBB; > - I = NewMBB; > - MBBI = NewMBB->begin(); > - MBBE = NewMBB->end(); > - } > - } > - } > - } > - > - return Changed; > -} > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From gohman at apple.com Thu Nov 18 12:48:28 2010 From: gohman at apple.com (Dan Gohman) Date: Thu, 18 Nov 2010 18:48:28 -0000 Subject: [llvm-commits] [llvm] r119717 - /llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp Message-ID: <20101118184828.DA7582A6C12C@llvm.org> Author: djg Date: Thu Nov 18 12:48:28 2010 New Revision: 119717 URL: http://llvm.org/viewvc/llvm-project?rev=119717&view=rev Log: Oops, missed this file when remaing ExpandPseudos to ExpandISelPseudos. Modified: llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp Modified: llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp?rev=119717&r1=119716&r2=119717&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp (original) +++ llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp Thu Nov 18 12:48:28 2010 @@ -345,8 +345,8 @@ // Print the instruction selected machine code... printAndVerify(PM, "After Instruction Selection"); - // Expand pseudo-instructions emitted by isel. - PM.add(createExpandPseudosPass()); + // Expand pseudo-instructions emitted by ISel. + PM.add(createExpandISelPseudosPass()); // Optimize PHIs before DCE: removing dead PHI cycles may make more // instructions dead. From resistor at mac.com Thu Nov 18 12:49:05 2010 From: resistor at mac.com (Owen Anderson) Date: Thu, 18 Nov 2010 18:49:05 -0000 Subject: [llvm-commits] [llvm] r119718 - /llvm/trunk/lib/System/DynamicLibrary.cpp Message-ID: <20101118184905.CA91A2A6C12C@llvm.org> Author: resistor Date: Thu Nov 18 12:49:05 2010 New Revision: 119718 URL: http://llvm.org/viewvc/llvm-project?rev=119718&view=rev Log: Use thread-safe statics to avoid a static constructor here. This isn't thread-safe on MSVC, but we don't support threaded LLVM there anyways. Modified: llvm/trunk/lib/System/DynamicLibrary.cpp Modified: llvm/trunk/lib/System/DynamicLibrary.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/DynamicLibrary.cpp?rev=119718&r1=119717&r2=119718&view=diff ============================================================================== --- llvm/trunk/lib/System/DynamicLibrary.cpp (original) +++ llvm/trunk/lib/System/DynamicLibrary.cpp Thu Nov 18 12:49:05 2010 @@ -61,9 +61,19 @@ //=== independent code. //===----------------------------------------------------------------------===// -static SmartMutex HandlesMutex; +static SmartMutex* HandlesMutex; static std::vector *OpenedHandles = 0; +static bool InitializeMutex() { + HandlesMutex = new SmartMutex; + return HandlesMutex != 0; +} + +static bool EnsureMutexInitialized() { + static bool result = InitializeMutex(); + return result; +} + bool DynamicLibrary::LoadLibraryPermanently(const char *Filename, std::string *ErrMsg) { @@ -78,7 +88,8 @@ if (Filename == NULL) H = RTLD_DEFAULT; #endif - SmartScopedLock Lock(HandlesMutex); + EnsureMutexInitialized(); + SmartScopedLock Lock(*HandlesMutex); if (OpenedHandles == 0) OpenedHandles = new std::vector(); OpenedHandles->push_back(H); @@ -113,7 +124,8 @@ #if HAVE_DLFCN_H // Now search the libraries. - SmartScopedLock Lock(HandlesMutex); + EnsureMutexInitialized(); + SmartScopedLock Lock(*HandlesMutex); if (OpenedHandles) { for (std::vector::iterator I = OpenedHandles->begin(), E = OpenedHandles->end(); I != E; ++I) { From rafael.espindola at gmail.com Thu Nov 18 12:59:27 2010 From: rafael.espindola at gmail.com (=?UTF-8?Q?Rafael_Esp=C3=ADndola?=) Date: Thu, 18 Nov 2010 13:59:27 -0500 Subject: [llvm-commits] [patch] Add an option for not using dwarf's .loc directive Message-ID: Hello, The attached patches are incomplete, but they should be sufficient to fix the dawin 9 bots and better explain what I am doing. The idea is that clang will continue to use .loc, but llvm-gcc will go back to using a manually crafted .debug_line section. Another option is to do it by target, but I assume you guys also want the benefits of .loc on darwin when possible. The patch is incomplete in that it has only the plumbing, but is enough to disable .loc on llvm-gcc. It is also flexible if we want to enable it in llvm-gcc for some targets but not others in the future. The missing bit that I am working on right now is refactoring the MC code a bit so that it can print the debug_line info a regular streamer, not just an object streamer. If using an asm streamer it will have the same limitation as the old code in CodeGen (using DW_LNE_set_address), but at least there will not be as much code duplication. Are these first 3 patches OK? Cheers, Rafael -------------- next part -------------- A non-text attachment was scrubbed... Name: llvm.patch Type: text/x-diff Size: 10066 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101118/2fc0afe7/attachment.bin -------------- next part -------------- A non-text attachment was scrubbed... Name: clang.patch Type: text/x-diff Size: 752 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101118/2fc0afe7/attachment-0001.bin -------------- next part -------------- A non-text attachment was scrubbed... Name: llvm-gcc.patch Type: text/x-diff Size: 475 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101118/2fc0afe7/attachment-0002.bin From resistor at mac.com Thu Nov 18 12:59:13 2010 From: resistor at mac.com (Owen Anderson) Date: Thu, 18 Nov 2010 18:59:13 -0000 Subject: [llvm-commits] [llvm] r119721 - /llvm/trunk/lib/VMCore/Attributes.cpp Message-ID: <20101118185913.5CD0A2A6C12C@llvm.org> Author: resistor Date: Thu Nov 18 12:59:13 2010 New Revision: 119721 URL: http://llvm.org/viewvc/llvm-project?rev=119721&view=rev Log: Fix an order-of-deallocation issue where the AttrListImpl could be deallocated before the global LLVMContext, causing memory errors. Patch by Peter Collingbourne. Modified: llvm/trunk/lib/VMCore/Attributes.cpp Modified: llvm/trunk/lib/VMCore/Attributes.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Attributes.cpp?rev=119721&r1=119720&r2=119721&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Attributes.cpp (original) +++ llvm/trunk/lib/VMCore/Attributes.cpp Thu Nov 18 12:59:13 2010 @@ -106,6 +106,11 @@ // AttributeListImpl Definition //===----------------------------------------------------------------------===// +namespace llvm { + class AttributeListImpl; +} + +static ManagedStatic > AttributesLists; namespace llvm { static ManagedStatic > ALMutex; @@ -131,6 +136,8 @@ } void DropRef() { sys::SmartScopedLock Lock(*ALMutex); + if (!AttributesLists.isConstructed()) + return; sys::cas_flag new_val = --RefCount; if (new_val == 0) delete this; @@ -147,8 +154,6 @@ }; } -static ManagedStatic > AttributesLists; - AttributeListImpl::~AttributeListImpl() { // NOTE: Lock must be acquired by caller. AttributesLists->RemoveNode(this); From resistor at me.com Thu Nov 18 13:01:31 2010 From: resistor at me.com (Owen Anderson) Date: Thu, 18 Nov 2010 11:01:31 -0800 Subject: [llvm-commits] [PATCH] Do not attempt to destroy AttributesListImpl if already destroyed In-Reply-To: <20101113230112.GA13632@pcc.me.uk> References: <20101113230112.GA13632@pcc.me.uk> Message-ID: Applied in r119721. Thanks! --Owen On Nov 13, 2010, at 3:01 PM, Peter Collingbourne wrote: > Hi, > > During static deinitialization, it is possible for AttributesLists to > be destroyed before GlobalContext. This will cause the AttrListPtrs > held by Function and various Instruction subclasses to be invalidated. > Later when GlobalContext is destroyed the AttributesListImpls referred > to by the AttrListPtrs will be deleted, causing memory errors. > This patch causes AttributesListImpl to skip deinitialization via > DropRef if AttributesLists has been destroyed. > > OK to commit? > > Thanks, > -- > Peter > <0001-Do-not-attempt-to-destroy-AttributesListImpl-if-alre.patch>_______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101118/4a3498d7/attachment.html From fvbommel at gmail.com Thu Nov 18 13:05:53 2010 From: fvbommel at gmail.com (Frits van Bommel) Date: Thu, 18 Nov 2010 20:05:53 +0100 Subject: [llvm-commits] [PATCH] Use-after-free in ParseCommandLineOptions() Message-ID: Near the end of ParseCommandLineOptions() (lib/Support/CommandLine.cpp) there's some debug code that prints out the command line if -debug was specified. Unfortunately, if the ReadResponseFiles parameter is true the expanded command line is stored in memory which has just been free()d a few lines earlier. This patch moves the debug code before the cleanup code, but after all options (most importantly -debug) have been parsed and adds a comment explaining why it's there. -------------- next part -------------- A non-text attachment was scrubbed... Name: commandline-use-after-free.patch Type: text/x-patch Size: 1013 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101118/e28e5023/attachment.bin From echristo at apple.com Thu Nov 18 13:40:06 2010 From: echristo at apple.com (Eric Christopher) Date: Thu, 18 Nov 2010 19:40:06 -0000 Subject: [llvm-commits] [llvm] r119725 - in /llvm/trunk: lib/Target/ARM/ARMBaseInstrInfo.cpp lib/Target/ARM/ARMBaseInstrInfo.h lib/Target/ARM/ARMBaseRegisterInfo.h lib/Target/ARM/ARMFrameInfo.cpp test/CodeGen/ARM/2010-10-25-ifcvt-ldm.ll test/CodeGen/ARM/str_pre-2.ll test/CodeGen/Thumb2/2010-06-21-TailMergeBug.ll Message-ID: <20101118194006.283CA2A6C12C@llvm.org> Author: echristo Date: Thu Nov 18 13:40:05 2010 New Revision: 119725 URL: http://llvm.org/viewvc/llvm-project?rev=119725&view=rev Log: Rewrite stack callee saved spills and restores to use push/pop instructions. Remove movePastCSLoadStoreOps and associated code for simple pointer increments. Update routines that depended upon other opcodes for save/restore. Adjust all testcases accordingly. Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.h llvm/trunk/lib/Target/ARM/ARMFrameInfo.cpp llvm/trunk/test/CodeGen/ARM/2010-10-25-ifcvt-ldm.ll llvm/trunk/test/CodeGen/ARM/str_pre-2.ll llvm/trunk/test/CodeGen/Thumb2/2010-06-21-TailMergeBug.ll Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=119725&r1=119724&r2=119725&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Thu Nov 18 13:40:05 2010 @@ -197,26 +197,29 @@ return NewMIs[0]; } -bool -ARMBaseInstrInfo::spillCalleeSavedRegisters(MachineBasicBlock &MBB, - MachineBasicBlock::iterator MI, - const std::vector &CSI, - const TargetRegisterInfo *TRI) const { - if (CSI.empty()) - return false; - +void +ARMBaseInstrInfo::emitPushInst(MachineBasicBlock &MBB, + MachineBasicBlock::iterator MI, + const std::vector &CSI, unsigned Opc, + bool(*Func)(unsigned, bool)) const { + MachineFunction &MF = *MBB.getParent(); DebugLoc DL; if (MI != MBB.end()) DL = MI->getDebugLoc(); - for (unsigned i = 0, e = CSI.size(); i != e; ++i) { - unsigned Reg = CSI[i].getReg(); - bool isKill = true; - + MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc)); + MIB.addReg(ARM::SP, getDefRegState(true)); + MIB.addReg(ARM::SP); + AddDefaultPred(MIB); + bool NumRegs = false; + for (unsigned i = CSI.size(); i != 0; --i) { + unsigned Reg = CSI[i-1].getReg(); + if (!(Func)(Reg, Subtarget.isTargetDarwin())) continue; + // Add the callee-saved register as live-in unless it's LR and // @llvm.returnaddress is called. If LR is returned for @llvm.returnaddress // then it's already added to the function and entry block live-in sets. + bool isKill = true; if (Reg == ARM::LR) { - MachineFunction &MF = *MBB.getParent(); if (MF.getFrameInfo()->isReturnAddressTaken() && MF.getRegInfo().isLiveIn(Reg)) isKill = false; @@ -224,16 +227,99 @@ if (isKill) MBB.addLiveIn(Reg); + + NumRegs = true; + MIB.addReg(Reg, getKillRegState(isKill)); + } + + // It's illegal to emit push instruction without operands. + if (NumRegs) + MBB.insert(MI, &*MIB); + else + MF.DeleteMachineInstr(MIB); +} + +bool +ARMBaseInstrInfo::spillCalleeSavedRegisters(MachineBasicBlock &MBB, + MachineBasicBlock::iterator MI, + const std::vector &CSI, + const TargetRegisterInfo *TRI) const { + if (CSI.empty()) + return false; + + MachineFunction &MF = *MBB.getParent(); + ARMFunctionInfo *AFI = MF.getInfo(); + DebugLoc DL = MI->getDebugLoc(); + + unsigned PushOpc = AFI->isThumbFunction() ? ARM::t2STMDB_UPD : ARM::STMDB_UPD; + unsigned FltOpc = ARM::VSTMDDB_UPD; + emitPushInst(MBB, MI, CSI, PushOpc, &isARMArea1Register); + emitPushInst(MBB, MI, CSI, PushOpc, &isARMArea2Register); + emitPushInst(MBB, MI, CSI, FltOpc, &isARMArea3Register); + + return true; +} + +void +ARMBaseInstrInfo::emitPopInst(MachineBasicBlock &MBB, + MachineBasicBlock::iterator MI, + const std::vector &CSI, unsigned Opc, + bool isVarArg, bool(*Func)(unsigned, bool)) const { + + MachineFunction &MF = *MBB.getParent(); + ARMFunctionInfo *AFI = MF.getInfo(); + DebugLoc DL = MI->getDebugLoc(); + + MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc)); + MIB.addReg(ARM::SP, getDefRegState(true)); + MIB.addReg(ARM::SP); + AddDefaultPred(MIB); + bool NumRegs = false; + for (unsigned i = CSI.size(); i != 0; --i) { + unsigned Reg = CSI[i-1].getReg(); + if (!(Func)(Reg, Subtarget.isTargetDarwin())) continue; + + if (Reg == ARM::LR && !isVarArg) { + Reg = ARM::PC; + unsigned Opc = AFI->isThumbFunction() ? ARM::t2LDMIA_RET : ARM::LDMIA_RET; + (*MIB).setDesc(get(Opc)); + MI = MBB.erase(MI); + } + + MIB.addReg(Reg, RegState::Define); + NumRegs = true; + } + + // It's illegal to emit pop instruction without operands. + if (NumRegs) + MBB.insert(MI, &*MIB); + else + MF.DeleteMachineInstr(MIB); +} + +bool +ARMBaseInstrInfo::restoreCalleeSavedRegisters(MachineBasicBlock &MBB, + MachineBasicBlock::iterator MI, + const std::vector &CSI, + const TargetRegisterInfo *TRI) const { + if (CSI.empty()) + return false; + + MachineFunction &MF = *MBB.getParent(); + ARMFunctionInfo *AFI = MF.getInfo(); + bool isVarArg = AFI->getVarArgsRegSaveSize() > 0; + DebugLoc DL = MI->getDebugLoc(); + + unsigned PopOpc = AFI->isThumbFunction() ? ARM::t2LDMIA_UPD : ARM::LDMIA_UPD; + unsigned FltOpc = ARM::VLDMDIA_UPD; + emitPopInst(MBB, MI, CSI, FltOpc, isVarArg, &isARMArea3Register); + emitPopInst(MBB, MI, CSI, PopOpc, isVarArg, &isARMArea2Register); + emitPopInst(MBB, MI, CSI, PopOpc, isVarArg, &isARMArea1Register); - // Insert the spill to the stack frame. The register is killed at the spill - // - const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg); - storeRegToStackSlot(MBB, MI, Reg, isKill, - CSI[i].getFrameIdx(), RC, TRI); - } return true; } + // Branch analysis. bool ARMBaseInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, @@ -2195,7 +2281,7 @@ case ARM::VSTMQIA: case ARM::VSTMQDB: return 2; - } + } } bool ARMBaseInstrInfo:: Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h?rev=119725&r1=119724&r2=119725&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h (original) +++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h Thu Nov 18 13:40:05 2010 @@ -211,6 +211,21 @@ const std::vector &CSI, const TargetRegisterInfo *TRI) const; + bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, + MachineBasicBlock::iterator MI, + const std::vector &CSI, + const TargetRegisterInfo *TRI) const; + +private: + void emitPopInst(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, + const std::vector &CSI, unsigned Opc, + bool isVarArg, bool(*Func)(unsigned, bool)) const; + void emitPushInst(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, + const std::vector &CSI, unsigned Opc, + bool(*Func)(unsigned, bool)) const; + + +public: // Branch analysis. virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.h?rev=119725&r1=119724&r2=119725&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.h (original) +++ llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.h Thu Nov 18 13:40:05 2010 @@ -44,6 +44,45 @@ } } +/// isARMArea1Register - Returns true if the register is a low register (r0-r7) +/// or a stack/pc register that we should push/pop. +static inline bool isARMArea1Register(unsigned Reg, bool isDarwin) { + using namespace ARM; + switch (Reg) { + case R0: case R1: case R2: case R3: + case R4: case R5: case R6: case R7: + case LR: case SP: case PC: + return true; + case R8: case R9: case R10: case R11: + // For darwin we want r7 and lr to be next to each other. + return !isDarwin; + default: + return false; + } +} + +static inline bool isARMArea2Register(unsigned Reg, bool isDarwin) { + using namespace ARM; + switch (Reg) { + case R8: case R9: case R10: case R11: + // Darwin has this second area. + return isDarwin; + default: + return false; + } +} + +static inline bool isARMArea3Register(unsigned Reg, bool isDarwin) { + using namespace ARM; + switch (Reg) { + case D15: case D14: case D13: case D12: + case D11: case D10: case D9: case D8: + return true; + default: + return false; + } +} + class ARMBaseRegisterInfo : public ARMGenRegisterInfo { protected: const ARMBaseInstrInfo &TII; Modified: llvm/trunk/lib/Target/ARM/ARMFrameInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFrameInfo.cpp?rev=119725&r1=119724&r2=119725&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMFrameInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMFrameInfo.cpp Thu Nov 18 13:40:05 2010 @@ -20,43 +20,6 @@ using namespace llvm; -/// Move iterator past the next bunch of callee save load / store ops for -/// the particular spill area (1: integer area 1, 2: integer area 2, -/// 3: fp area, 0: don't care). -static void movePastCSLoadStoreOps(MachineBasicBlock &MBB, - MachineBasicBlock::iterator &MBBI, - int Opc1, int Opc2, unsigned Area, - const ARMSubtarget &STI) { - while (MBBI != MBB.end() && - ((MBBI->getOpcode() == Opc1) || (MBBI->getOpcode() == Opc2)) && - MBBI->getOperand(1).isFI()) { - if (Area != 0) { - bool Done = false; - unsigned Category = 0; - switch (MBBI->getOperand(0).getReg()) { - case ARM::R4: case ARM::R5: case ARM::R6: case ARM::R7: - case ARM::LR: - Category = 1; - break; - case ARM::R8: case ARM::R9: case ARM::R10: case ARM::R11: - Category = STI.isTargetDarwin() ? 2 : 1; - break; - case ARM::D8: case ARM::D9: case ARM::D10: case ARM::D11: - case ARM::D12: case ARM::D13: case ARM::D14: case ARM::D15: - Category = 3; - break; - default: - Done = true; - break; - } - if (Done || Category != Area) - break; - } - - ++MBBI; - } -} - static bool isCalleeSavedRegister(unsigned Reg, const unsigned *CSRegs) { for (unsigned i = 0; CSRegs[i]; ++i) if (Reg == CSRegs[i]) @@ -67,11 +30,21 @@ static bool isCSRestore(MachineInstr *MI, const ARMBaseInstrInfo &TII, const unsigned *CSRegs) { - return ((MI->getOpcode() == (int)ARM::VLDRD || - MI->getOpcode() == (int)ARM::LDRi12 || - MI->getOpcode() == (int)ARM::t2LDRi12) && - MI->getOperand(1).isFI() && - isCalleeSavedRegister(MI->getOperand(0).getReg(), CSRegs)); + // Integer spill area is handled with "pop". + if (MI->getOpcode() == ARM::LDMIA_RET || + MI->getOpcode() == ARM::t2LDMIA_RET || + MI->getOpcode() == ARM::LDMIA_UPD || + MI->getOpcode() == ARM::t2LDMIA_UPD || + MI->getOpcode() == ARM::VLDMDIA_UPD) { + // The first two operands are predicates. The last two are + // imp-def and imp-use of SP. Check everything in between. + for (int i = 5, e = MI->getNumOperands(); i != e; ++i) + if (!isCalleeSavedRegister(MI->getOperand(i).getReg(), CSRegs)) + return false; + return true; + } + + return false; } static void @@ -154,11 +127,10 @@ DPRCSSize += 8; } } - - // Build the new SUBri to adjust SP for integer callee-save spill area 1. - emitSPUpdate(isARM, MBB, MBBI, dl, TII, -GPRCS1Size); - movePastCSLoadStoreOps(MBB, MBBI, ARM::STRi12, ARM::t2STRi12, 1, STI); - + + // Move past area 1. + if (GPRCS1Size > 0) MBBI++; + // Set FP to point to the stack slot that contains the previous FP. // For Darwin, FP is R7, which has now been stored in spill area 1. // Otherwise, if this is not Darwin, all the callee-saved registers go @@ -172,14 +144,10 @@ .addFrameIndex(FramePtrSpillFI).addImm(0); AddDefaultCC(AddDefaultPred(MIB)); } - - // Build the new SUBri to adjust SP for integer callee-save spill area 2. - emitSPUpdate(isARM, MBB, MBBI, dl, TII, -GPRCS2Size); - - // Build the new SUBri to adjust SP for FP callee-save spill area. - movePastCSLoadStoreOps(MBB, MBBI, ARM::STRi12, ARM::t2STRi12, 2, STI); - emitSPUpdate(isARM, MBB, MBBI, dl, TII, -DPRCSSize); - + + // Move past area 2. + if (GPRCS2Size > 0) MBBI++; + // Determine starting offsets of spill areas. unsigned DPRCSOffset = NumBytes - (GPRCS1Size + GPRCS2Size + DPRCSSize); unsigned GPRCS2Offset = DPRCSOffset + DPRCSSize; @@ -191,7 +159,9 @@ AFI->setGPRCalleeSavedArea2Offset(GPRCS2Offset); AFI->setDPRCalleeSavedAreaOffset(DPRCSOffset); - movePastCSLoadStoreOps(MBB, MBBI, ARM::VSTRD, 0, 3, STI); + // Move past area 3. + if (DPRCSSize > 0) MBBI++; + NumBytes = DPRCSOffset; if (NumBytes) { // Adjust SP after all the callee-save spills. @@ -325,17 +295,10 @@ } else if (NumBytes) emitSPUpdate(isARM, MBB, MBBI, dl, TII, NumBytes); - // Move SP to start of integer callee save spill area 2. - movePastCSLoadStoreOps(MBB, MBBI, ARM::VLDRD, 0, 3, STI); - emitSPUpdate(isARM, MBB, MBBI, dl, TII, AFI->getDPRCalleeSavedAreaSize()); - - // Move SP to start of integer callee save spill area 1. - movePastCSLoadStoreOps(MBB, MBBI, ARM::LDRi12, ARM::t2LDRi12, 2, STI); - emitSPUpdate(isARM, MBB, MBBI, dl, TII, AFI->getGPRCalleeSavedArea2Size()); - - // Move SP to SP upon entry to the function. - movePastCSLoadStoreOps(MBB, MBBI, ARM::LDRi12, ARM::t2LDRi12, 1, STI); - emitSPUpdate(isARM, MBB, MBBI, dl, TII, AFI->getGPRCalleeSavedArea1Size()); + // Increment past our save areas. + if (AFI->getDPRCalleeSavedAreaSize()) MBBI++; + if (AFI->getGPRCalleeSavedArea2Size()) MBBI++; + if (AFI->getGPRCalleeSavedArea1Size()) MBBI++; } if (RetOpcode == ARM::TCRETURNdi || RetOpcode == ARM::TCRETURNdiND || Modified: llvm/trunk/test/CodeGen/ARM/2010-10-25-ifcvt-ldm.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2010-10-25-ifcvt-ldm.ll?rev=119725&r1=119724&r2=119725&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/2010-10-25-ifcvt-ldm.ll (original) +++ llvm/trunk/test/CodeGen/ARM/2010-10-25-ifcvt-ldm.ll Thu Nov 18 13:40:05 2010 @@ -3,7 +3,7 @@ ; LDM instruction, was causing an assertion failure because the microop count ; was being treated as an instruction count. -; CHECK: ldmia +; CHECK: push ; CHECK: ldmia ; CHECK: ldmia ; CHECK: ldmia Modified: llvm/trunk/test/CodeGen/ARM/str_pre-2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/str_pre-2.ll?rev=119725&r1=119724&r2=119725&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/str_pre-2.ll (original) +++ llvm/trunk/test/CodeGen/ARM/str_pre-2.ll Thu Nov 18 13:40:05 2010 @@ -4,8 +4,8 @@ define i64 @t(i64 %a) nounwind readonly { entry: -; CHECK: str lr, [sp, #-4]! -; CHECK: ldr lr, [sp], #4 +; CHECK: push {lr} +; CHECK: ldmia sp!, {pc} %0 = load i64** @b, align 4 %1 = load i64* %0, align 4 %2 = mul i64 %1, %a Modified: llvm/trunk/test/CodeGen/Thumb2/2010-06-21-TailMergeBug.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/2010-06-21-TailMergeBug.ll?rev=119725&r1=119724&r2=119725&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/2010-06-21-TailMergeBug.ll (original) +++ llvm/trunk/test/CodeGen/Thumb2/2010-06-21-TailMergeBug.ll Thu Nov 18 13:40:05 2010 @@ -39,7 +39,7 @@ ; CHECK: ittt eq ; CHECK: moveq r0 ; CHECK-NOT: LBB0_ -; CHECK: ldreq +; CHECK: popeq ; CHECK: popeq switch i32 undef, label %bb7 [ i32 37, label %bb43 From isanbard at gmail.com Thu Nov 18 13:44:29 2010 From: isanbard at gmail.com (Bill Wendling) Date: Thu, 18 Nov 2010 19:44:29 -0000 Subject: [llvm-commits] [llvm] r119726 - /llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Message-ID: <20101118194429.787D42A6C12C@llvm.org> Author: void Date: Thu Nov 18 13:44:29 2010 New Revision: 119726 URL: http://llvm.org/viewvc/llvm-project?rev=119726&view=rev Log: Missed the _RET versions of LDMIA. Modified: llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Modified: llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp?rev=119726&r1=119725&r2=119726&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Thu Nov 18 13:44:29 2010 @@ -212,10 +212,12 @@ AMSubMode getLoadStoreMultipleSubMode(int Opcode) { switch (Opcode) { default: llvm_unreachable("Unhandled opcode!"); + case ARM::LDMIA_RET: case ARM::LDMIA: case ARM::LDMIA_UPD: case ARM::STMIA: case ARM::STMIA_UPD: + case ARM::t2LDMIA_RET: case ARM::t2LDMIA: case ARM::t2LDMIA_UPD: case ARM::t2STMIA: From echristo at apple.com Thu Nov 18 13:48:46 2010 From: echristo at apple.com (Eric Christopher) Date: Thu, 18 Nov 2010 11:48:46 -0800 Subject: [llvm-commits] [PATCH] Bug in DAG Combine for ARM shift In-Reply-To: References: Message-ID: <65A55DFD-AAE1-47DE-8F10-8F780C388AFB@apple.com> On Nov 17, 2010, at 7:30 PM, Tanya Lattner wrote: > Attached is a patch and test case for a bug in PerformShiftCombine() when operating on illegal types for shift right/left immediate. > > Please review and let me know if its ok to commit. Looks fine to me. -eric From bob.wilson at apple.com Thu Nov 18 13:58:27 2010 From: bob.wilson at apple.com (Bob Wilson) Date: Thu, 18 Nov 2010 11:58:27 -0800 Subject: [llvm-commits] [PATCH] Bug in DAG Combine for ARM shift In-Reply-To: <65A55DFD-AAE1-47DE-8F10-8F780C388AFB@apple.com> References: <65A55DFD-AAE1-47DE-8F10-8F780C388AFB@apple.com> Message-ID: On Nov 18, 2010, at 11:48 AM, Eric Christopher wrote: > > On Nov 17, 2010, at 7:30 PM, Tanya Lattner wrote: > >> Attached is a patch and test case for a bug in PerformShiftCombine() when operating on illegal types for shift right/left immediate. >> >> Please review and let me know if its ok to commit. > > Looks fine to me. I agree, but it would be a little bit simpler to check for legal types earlier. See attached. Either way, whichever you prefer. -------------- next part -------------- A non-text attachment was scrubbed... Name: shiftCombine.patch Type: application/octet-stream Size: 573 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101118/a0ee3e1c/attachment.obj From baldrick at free.fr Thu Nov 18 13:59:41 2010 From: baldrick at free.fr (Duncan Sands) Date: Thu, 18 Nov 2010 19:59:41 -0000 Subject: [llvm-commits] [llvm] r119727 - in /llvm/trunk: include/llvm/Analysis/LoopInfo.h lib/Analysis/ScalarEvolution.cpp lib/Transforms/Scalar/LoopUnswitch.cpp lib/Transforms/Utils/LoopSimplify.cpp test/Transforms/LoopUnswitch/2010-11-18-LCSSA.ll Message-ID: <20101118195942.093CE2A6C12C@llvm.org> Author: baldrick Date: Thu Nov 18 13:59:41 2010 New Revision: 119727 URL: http://llvm.org/viewvc/llvm-project?rev=119727&view=rev Log: Factor code for testing whether replacing one value with another preserves LCSSA form out of ScalarEvolution and into the LoopInfo class. Use it to check that SimplifyInstruction simplifications are not breaking LCSSA form. Fixes PR8622. Added: llvm/trunk/test/Transforms/LoopUnswitch/2010-11-18-LCSSA.ll Modified: llvm/trunk/include/llvm/Analysis/LoopInfo.h llvm/trunk/lib/Analysis/ScalarEvolution.cpp llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp llvm/trunk/lib/Transforms/Utils/LoopSimplify.cpp Modified: llvm/trunk/include/llvm/Analysis/LoopInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/LoopInfo.h?rev=119727&r1=119726&r2=119727&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/LoopInfo.h (original) +++ llvm/trunk/include/llvm/Analysis/LoopInfo.h Thu Nov 18 13:59:41 2010 @@ -1020,6 +1020,25 @@ void removeBlock(BasicBlock *BB) { LI.removeBlock(BB); } + + /// replacementPreservesLCSSAForm - Returns true if replacing From with To + /// everywhere is guaranteed to preserve LCSSA form. + bool replacementPreservesLCSSAForm(Instruction *From, Value *To) { + // Preserving LCSSA form is only problematic if the replacing value is an + // instruction. + Instruction *I = dyn_cast(To); + if (!I) return true; + // If the instruction is not defined in a loop then it can safely replace + // anything. + Loop *ToLoop = getLoopFor(I->getParent()); + if (!ToLoop) return true; + // If the replacing instruction is defined in the same loop as the original + // instruction, or in a loop that contains it as an inner loop, then using + // it as a replacement will not break LCSSA form. + Loop *FromLoop = getLoopFor(From->getParent()); + if (ToLoop->contains(FromLoop)) return true; + return false; + } }; Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=119727&r1=119726&r2=119727&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original) +++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Thu Nov 18 13:59:41 2010 @@ -2768,25 +2768,10 @@ // PHI's incoming blocks are in a different loop, in which case doing so // risks breaking LCSSA form. Instcombine would normally zap these, but // it doesn't have DominatorTree information, so it may miss cases. - if (Value *V = SimplifyInstruction(PN, TD, DT)) { - Instruction *I = dyn_cast(V); - // Only instructions are problematic for preserving LCSSA form. - if (!I) + if (Value *V = SimplifyInstruction(PN, TD, DT)) + if (LI->replacementPreservesLCSSAForm(PN, V)) return getSCEV(V); - // If the instruction is not defined in a loop, then it can be used freely. - Loop *ILoop = LI->getLoopFor(I->getParent()); - if (!ILoop) - return getSCEV(I); - - // If the instruction is defined in the same loop as the phi node, or in a - // loop that contains the phi node loop as an inner loop, then using it as - // a replacement for the phi node will not break LCSSA form. - Loop *PNLoop = LI->getLoopFor(PN->getParent()); - if (ILoop->contains(PNLoop)) - return getSCEV(I); - } - // If it's not a loop phi, we can't handle it yet. return getUnknown(PN); } Modified: llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp?rev=119727&r1=119726&r2=119727&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp Thu Nov 18 13:59:41 2010 @@ -990,15 +990,16 @@ ++NumSimplify; continue; } - + // See if instruction simplification can hack this up. This is common for // things like "select false, X, Y" after unswitching made the condition be // 'false'. - if (Value *V = SimplifyInstruction(I, 0, DT)) { - ReplaceUsesOfWith(I, V, Worklist, L, LPM); - continue; - } - + if (Value *V = SimplifyInstruction(I, 0, DT)) + if (LI->replacementPreservesLCSSAForm(I, V)) { + ReplaceUsesOfWith(I, V, Worklist, L, LPM); + continue; + } + // Special case hacks that appear commonly in unswitched code. if (BranchInst *BI = dyn_cast(I)) { if (BI->isUnconditional()) { Modified: llvm/trunk/lib/Transforms/Utils/LoopSimplify.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/LoopSimplify.cpp?rev=119727&r1=119726&r2=119727&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/LoopSimplify.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/LoopSimplify.cpp Thu Nov 18 13:59:41 2010 @@ -269,11 +269,12 @@ PHINode *PN; for (BasicBlock::iterator I = L->getHeader()->begin(); (PN = dyn_cast(I++)); ) - if (Value *V = SimplifyInstruction(PN, 0, DT)) { - if (AA) AA->deleteValue(PN); - PN->replaceAllUsesWith(V); - PN->eraseFromParent(); - } + if (Value *V = SimplifyInstruction(PN, 0, DT)) + if (LI->replacementPreservesLCSSAForm(PN, V)) { + if (AA) AA->deleteValue(PN); + PN->replaceAllUsesWith(V); + PN->eraseFromParent(); + } // If this loop has multiple exits and the exits all go to the same // block, attempt to merge the exits. This helps several passes, such @@ -445,17 +446,18 @@ /// FindPHIToPartitionLoops - The first part of loop-nestification is to find a /// PHI node that tells us how to partition the loops. static PHINode *FindPHIToPartitionLoops(Loop *L, DominatorTree *DT, - AliasAnalysis *AA) { + AliasAnalysis *AA, LoopInfo *LI) { for (BasicBlock::iterator I = L->getHeader()->begin(); isa(I); ) { PHINode *PN = cast(I); ++I; - if (Value *V = SimplifyInstruction(PN, 0, DT)) { - // This is a degenerate PHI already, don't modify it! - PN->replaceAllUsesWith(V); - if (AA) AA->deleteValue(PN); - PN->eraseFromParent(); - continue; - } + if (Value *V = SimplifyInstruction(PN, 0, DT)) + if (LI->replacementPreservesLCSSAForm(PN, V)) { + // This is a degenerate PHI already, don't modify it! + PN->replaceAllUsesWith(V); + if (AA) AA->deleteValue(PN); + PN->eraseFromParent(); + continue; + } // Scan this PHI node looking for a use of the PHI node by itself. for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i) @@ -523,7 +525,7 @@ /// created. /// Loop *LoopSimplify::SeparateNestedLoop(Loop *L, LPPassManager &LPM) { - PHINode *PN = FindPHIToPartitionLoops(L, DT, AA); + PHINode *PN = FindPHIToPartitionLoops(L, DT, AA, LI); if (PN == 0) return 0; // No known way to partition. // Pull out all predecessors that have varying values in the loop. This Added: llvm/trunk/test/Transforms/LoopUnswitch/2010-11-18-LCSSA.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopUnswitch/2010-11-18-LCSSA.ll?rev=119727&view=auto ============================================================================== --- llvm/trunk/test/Transforms/LoopUnswitch/2010-11-18-LCSSA.ll (added) +++ llvm/trunk/test/Transforms/LoopUnswitch/2010-11-18-LCSSA.ll Thu Nov 18 13:59:41 2010 @@ -0,0 +1,28 @@ +; RUN: opt < %s -loop-unswitch +; PR8622 + at g_38 = external global i32, align 4 + +define void @func_67(i32 %p_68.coerce) nounwind { +entry: + br i1 true, label %for.end12, label %bb.nph + +bb.nph: ; preds = %entry + %g_38.promoted = load i32* @g_38 + br label %for.body + +for.body: ; preds = %for.cond, %bb.nph + %tobool.i = icmp eq i32 %p_68.coerce, 1 + %xor4.i = xor i32 %p_68.coerce, 1 + %call1 = select i1 %tobool.i, i32 0, i32 %xor4.i + br label %for.cond + +for.cond: ; preds = %for.body + br i1 true, label %for.cond.for.end12_crit_edge, label %for.body + +for.cond.for.end12_crit_edge: ; preds = %for.cond + store i32 %call1, i32* @g_38 + br label %for.end12 + +for.end12: ; preds = %for.cond.for.end12_crit_edge, %entry + ret void +} From baldrick at free.fr Thu Nov 18 14:05:18 2010 From: baldrick at free.fr (Duncan Sands) Date: Thu, 18 Nov 2010 20:05:18 -0000 Subject: [llvm-commits] [llvm] r119728 - in /llvm/trunk: lib/CodeGen/SelectionDAG/DAGCombiner.cpp test/CodeGen/X86/2010-11-18-SelectOfExtload.ll Message-ID: <20101118200518.D96E92A6C12C@llvm.org> Author: baldrick Date: Thu Nov 18 14:05:18 2010 New Revision: 119728 URL: http://llvm.org/viewvc/llvm-project?rev=119728&view=rev Log: The DAGCombiner was threading select over pairs of extending loads even if the extension types were not the same. The result was that if you fed a select with sext and zext loads, as in the testcase, then it would get turned into a zext (or sext) of the select, which is wrong in the cases when it should have been an sext (resp. zext). Reported and diagnosed by Sebastien Deldon. Added: llvm/trunk/test/CodeGen/X86/2010-11-18-SelectOfExtload.ll Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=119728&r1=119727&r2=119728&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Thu Nov 18 14:05:18 2010 @@ -6658,6 +6658,11 @@ LLD->isVolatile() || RLD->isVolatile() || // If this is an EXTLOAD, the VT's must match. LLD->getMemoryVT() != RLD->getMemoryVT() || + // If this is an EXTLOAD, the kind of extension must match. + (LLD->getExtensionType() != RLD->getExtensionType() && + // The only exception is if one of the extensions is anyext. + LLD->getExtensionType() != ISD::EXTLOAD && + RLD->getExtensionType() != ISD::EXTLOAD) || // FIXME: this discards src value information. This is // over-conservative. It would be beneficial to be able to remember // both potential memory locations. Since we are discarding Added: llvm/trunk/test/CodeGen/X86/2010-11-18-SelectOfExtload.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-11-18-SelectOfExtload.ll?rev=119728&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/2010-11-18-SelectOfExtload.ll (added) +++ llvm/trunk/test/CodeGen/X86/2010-11-18-SelectOfExtload.ll Thu Nov 18 14:05:18 2010 @@ -0,0 +1,15 @@ +; RUN: llc < %s -march=x86 | FileCheck %s +; Both values were being zero extended. + at u = external global i8 + at s = external global i8 +define i32 @foo(i1 %cond) { +; CHECK: @foo + %u_base = load i8* @u + %u_val = zext i8 %u_base to i32 +; CHECK: movzbl +; CHECK: movsbl + %s_base = load i8* @s + %s_val = sext i8 %s_base to i32 + %val = select i1 %cond, i32 %u_val, i32 %s_val + ret i32 %val +} From resistor at mac.com Thu Nov 18 14:32:18 2010 From: resistor at mac.com (Owen Anderson) Date: Thu, 18 Nov 2010 20:32:18 -0000 Subject: [llvm-commits] [llvm] r119733 - in /llvm/trunk: lib/Target/ARM/ARMInstrFormats.td lib/Target/ARM/ARMInstrThumb2.td test/MC/ARM/thumb2.s Message-ID: <20101118203218.A46BC2A6C12C@llvm.org> Author: resistor Date: Thu Nov 18 14:32:18 2010 New Revision: 119733 URL: http://llvm.org/viewvc/llvm-project?rev=119733&view=rev Log: Fill out the set of Thumb2 multiplication operator encodings. Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td llvm/trunk/test/MC/ARM/thumb2.s Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=119733&r1=119732&r2=119733&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Thu Nov 18 14:32:18 2010 @@ -1214,19 +1214,6 @@ let Inst{8} = 1; // The W bit. } -// Helper class for disassembly only -// A6.3.16 & A6.3.17 -// T2Imac - Thumb2 multiply [accumulate, and absolute difference] instructions. -class T2I_mac op22_20, bits<4> op7_4, dag oops, dag iops, - InstrItinClass itin, string opc, string asm, list pattern> - : T2I { - let Inst{31-27} = 0b11111; - let Inst{26-24} = 0b011; - let Inst{23} = long; - let Inst{22-20} = op22_20; - let Inst{7-4} = op7_4; -} - // Tv5Pat - Same as Pat<>, but requires V5T Thumb mode. class Tv5Pat : Pat { list Predicates = [IsThumb, IsThumb1Only, HasV5T]; Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=119733&r1=119732&r2=119733&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Thu Nov 18 14:32:18 2010 @@ -1855,19 +1855,39 @@ def t2UHSUB16 : T2I_pam<0b101, 0b0110, "uhsub16">; def t2UHSUB8 : T2I_pam<0b100, 0b0110, "uhsub8">; +// Helper class for disassembly only +// A6.3.16 & A6.3.17 +// T2Imac - Thumb2 multiply [accumulate, and absolute difference] instructions. +class T2ThreeReg_mac op22_20, bits<4> op7_4, dag oops, + dag iops, InstrItinClass itin, string opc, string asm, list pattern> + : T2ThreeReg { + let Inst{31-27} = 0b11111; + let Inst{26-24} = 0b011; + let Inst{23} = long; + let Inst{22-20} = op22_20; + let Inst{7-4} = op7_4; +} + +class T2FourReg_mac op22_20, bits<4> op7_4, dag oops, + dag iops, InstrItinClass itin, string opc, string asm, list pattern> + : T2FourReg { + let Inst{31-27} = 0b11111; + let Inst{26-24} = 0b011; + let Inst{23} = long; + let Inst{22-20} = op22_20; + let Inst{7-4} = op7_4; +} + // Unsigned Sum of Absolute Differences [and Accumulate] -- for disassembly only -def t2USAD8 : T2I_mac<0, 0b111, 0b0000, (outs rGPR:$dst), - (ins rGPR:$a, rGPR:$b), - NoItinerary, "usad8", "\t$dst, $a, $b", []> { +def t2USAD8 : T2ThreeReg_mac<0, 0b111, 0b0000, (outs rGPR:$Rd), + (ins rGPR:$Rn, rGPR:$Rm), + NoItinerary, "usad8", "\t$Rd, $Rn, $Rm", []> { let Inst{15-12} = 0b1111; } -def t2USADA8 : T2I_mac<0, 0b111, 0b0000, (outs rGPR:$Rd), +def t2USADA8 : T2FourReg_mac<0, 0b111, 0b0000, (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), NoItinerary, - "usada8", "\t$Rd, $Rn, $Rm, $Ra", []> { - bits<4> Ra; - let Inst{15-12} = Ra{3-0}; -} + "usada8", "\t$Rd, $Rn, $Rm, $Ra", []>; // Signed/Unsigned saturate -- for disassembly only @@ -2157,27 +2177,27 @@ } // isCommutable // Multiply + accumulate -def t2SMLAL : T2FourReg<(outs rGPR:$Rd, rGPR:$Ra), +def t2SMLAL : T2FourReg<(outs rGPR:$Ra, rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMAC64, - "smlal", "\t$Rd, $Ra, $Rn, $Rm", []>{ + "smlal", "\t$Ra, $Rd, $Rn, $Rm", []>{ let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0111; let Inst{22-20} = 0b100; let Inst{7-4} = 0b0000; } -def t2UMLAL : T2FourReg<(outs rGPR:$Rd, rGPR:$Ra), +def t2UMLAL : T2FourReg<(outs rGPR:$Ra, rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMAC64, - "umlal", "\t$Rd, $Ra, $Rn, $Rm", []>{ + "umlal", "\t$Ra, $Rd, $Rn, $Rm", []>{ let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0111; let Inst{22-20} = 0b110; let Inst{7-4} = 0b0000; } -def t2UMAAL : T2FourReg<(outs rGPR:$Rd, rGPR:$Ra), +def t2UMAAL : T2FourReg<(outs rGPR:$Ra, rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMAC64, - "umaal", "\t$Rd, $Ra, $Rn, $Rm", []>{ + "umaal", "\t$Ra, $Rd, $Rn, $Rm", []>{ let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0111; let Inst{22-20} = 0b110; @@ -2188,9 +2208,9 @@ // Rounding variants of the below included for disassembly only // Most significant word multiply -def t2SMMUL : T2I<(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b), IIC_iMUL32, - "smmul", "\t$dst, $a, $b", - [(set rGPR:$dst, (mulhs rGPR:$a, rGPR:$b))]> { +def t2SMMUL : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL32, + "smmul", "\t$Rd, $Rn, $Rm", + [(set rGPR:$Rd, (mulhs rGPR:$Rn, rGPR:$Rm))]> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0110; let Inst{22-20} = 0b101; @@ -2198,8 +2218,8 @@ let Inst{7-4} = 0b0000; // No Rounding (Inst{4} = 0) } -def t2SMMULR : T2I<(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b), IIC_iMUL32, - "smmulr", "\t$dst, $a, $b", []> { +def t2SMMULR : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL32, + "smmulr", "\t$Rd, $Rn, $Rm", []> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0110; let Inst{22-20} = 0b101; @@ -2207,49 +2227,49 @@ let Inst{7-4} = 0b0001; // Rounding (Inst{4} = 1) } -def t2SMMLA : T2I<(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b, rGPR:$c), IIC_iMAC32, - "smmla", "\t$dst, $a, $b, $c", - [(set rGPR:$dst, (add (mulhs rGPR:$a, rGPR:$b), rGPR:$c))]> { +def t2SMMLA : T2FourReg< + (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32, + "smmla", "\t$Rd, $Rn, $Rm, $Ra", + [(set rGPR:$Rd, (add (mulhs rGPR:$Rm, rGPR:$Rn), rGPR:$Ra))]> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0110; let Inst{22-20} = 0b101; - let Inst{15-12} = {?, ?, ?, ?}; // Ra let Inst{7-4} = 0b0000; // No Rounding (Inst{4} = 0) } -def t2SMMLAR: T2I<(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b, rGPR:$c), IIC_iMAC32, - "smmlar", "\t$dst, $a, $b, $c", []> { +def t2SMMLAR: T2FourReg< + (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32, + "smmlar", "\t$Rd, $Rn, $Rm, $Ra", []> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0110; let Inst{22-20} = 0b101; - let Inst{15-12} = {?, ?, ?, ?}; // Ra let Inst{7-4} = 0b0001; // Rounding (Inst{4} = 1) } -def t2SMMLS: T2I <(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b, rGPR:$c), IIC_iMAC32, - "smmls", "\t$dst, $a, $b, $c", - [(set rGPR:$dst, (sub rGPR:$c, (mulhs rGPR:$a, rGPR:$b)))]> { +def t2SMMLS: T2FourReg< + (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32, + "smmls", "\t$Rd, $Rn, $Rm, $Ra", + [(set rGPR:$Rd, (sub rGPR:$Ra, (mulhs rGPR:$Rn, rGPR:$Rm)))]> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0110; let Inst{22-20} = 0b110; - let Inst{15-12} = {?, ?, ?, ?}; // Ra let Inst{7-4} = 0b0000; // No Rounding (Inst{4} = 0) } -def t2SMMLSR:T2I <(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b, rGPR:$c), IIC_iMAC32, - "smmlsr", "\t$dst, $a, $b, $c", []> { +def t2SMMLSR:T2FourReg< + (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32, + "smmlsr", "\t$Rd, $Rn, $Rm, $Ra", []> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0110; let Inst{22-20} = 0b110; - let Inst{15-12} = {?, ?, ?, ?}; // Ra let Inst{7-4} = 0b0001; // Rounding (Inst{4} = 1) } multiclass T2I_smul { - def BB : T2I<(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b), IIC_iMUL16, - !strconcat(opc, "bb"), "\t$dst, $a, $b", - [(set rGPR:$dst, (opnode (sext_inreg rGPR:$a, i16), - (sext_inreg rGPR:$b, i16)))]> { + def BB : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL16, + !strconcat(opc, "bb"), "\t$Rd, $Rn, $Rm", + [(set rGPR:$Rd, (opnode (sext_inreg rGPR:$Rn, i16), + (sext_inreg rGPR:$Rm, i16)))]> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0110; let Inst{22-20} = 0b001; @@ -2258,10 +2278,10 @@ let Inst{5-4} = 0b00; } - def BT : T2I<(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b), IIC_iMUL16, - !strconcat(opc, "bt"), "\t$dst, $a, $b", - [(set rGPR:$dst, (opnode (sext_inreg rGPR:$a, i16), - (sra rGPR:$b, (i32 16))))]> { + def BT : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL16, + !strconcat(opc, "bt"), "\t$Rd, $Rn, $Rm", + [(set rGPR:$Rd, (opnode (sext_inreg rGPR:$Rn, i16), + (sra rGPR:$Rm, (i32 16))))]> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0110; let Inst{22-20} = 0b001; @@ -2270,10 +2290,10 @@ let Inst{5-4} = 0b01; } - def TB : T2I<(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b), IIC_iMUL16, - !strconcat(opc, "tb"), "\t$dst, $a, $b", - [(set rGPR:$dst, (opnode (sra rGPR:$a, (i32 16)), - (sext_inreg rGPR:$b, i16)))]> { + def TB : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL16, + !strconcat(opc, "tb"), "\t$Rd, $Rn, $Rm", + [(set rGPR:$Rd, (opnode (sra rGPR:$Rn, (i32 16)), + (sext_inreg rGPR:$Rm, i16)))]> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0110; let Inst{22-20} = 0b001; @@ -2282,10 +2302,10 @@ let Inst{5-4} = 0b10; } - def TT : T2I<(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b), IIC_iMUL16, - !strconcat(opc, "tt"), "\t$dst, $a, $b", - [(set rGPR:$dst, (opnode (sra rGPR:$a, (i32 16)), - (sra rGPR:$b, (i32 16))))]> { + def TT : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL16, + !strconcat(opc, "tt"), "\t$Rd, $Rn, $Rm", + [(set rGPR:$Rd, (opnode (sra rGPR:$Rn, (i32 16)), + (sra rGPR:$Rm, (i32 16))))]> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0110; let Inst{22-20} = 0b001; @@ -2294,10 +2314,10 @@ let Inst{5-4} = 0b11; } - def WB : T2I<(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b), IIC_iMUL16, - !strconcat(opc, "wb"), "\t$dst, $a, $b", - [(set rGPR:$dst, (sra (opnode rGPR:$a, - (sext_inreg rGPR:$b, i16)), (i32 16)))]> { + def WB : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL16, + !strconcat(opc, "wb"), "\t$Rd, $Rn, $Rm", + [(set rGPR:$Rd, (sra (opnode rGPR:$Rn, + (sext_inreg rGPR:$Rm, i16)), (i32 16)))]> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0110; let Inst{22-20} = 0b011; @@ -2306,10 +2326,10 @@ let Inst{5-4} = 0b00; } - def WT : T2I<(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b), IIC_iMUL16, - !strconcat(opc, "wt"), "\t$dst, $a, $b", - [(set rGPR:$dst, (sra (opnode rGPR:$a, - (sra rGPR:$b, (i32 16))), (i32 16)))]> { + def WT : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL16, + !strconcat(opc, "wt"), "\t$Rd, $Rn, $Rm", + [(set rGPR:$Rd, (sra (opnode rGPR:$Rn, + (sra rGPR:$Rm, (i32 16))), (i32 16)))]> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0110; let Inst{22-20} = 0b011; @@ -2321,75 +2341,75 @@ multiclass T2I_smla { - def BB : T2I<(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b, rGPR:$acc), IIC_iMAC16, - !strconcat(opc, "bb"), "\t$dst, $a, $b, $acc", - [(set rGPR:$dst, (add rGPR:$acc, - (opnode (sext_inreg rGPR:$a, i16), - (sext_inreg rGPR:$b, i16))))]> { + def BB : T2FourReg< + (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC16, + !strconcat(opc, "bb"), "\t$Rd, $Rn, $Rm, $Ra", + [(set rGPR:$Rd, (add rGPR:$Ra, + (opnode (sext_inreg rGPR:$Rn, i16), + (sext_inreg rGPR:$Rm, i16))))]> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0110; let Inst{22-20} = 0b001; - let Inst{15-12} = {?, ?, ?, ?}; // Ra let Inst{7-6} = 0b00; let Inst{5-4} = 0b00; } - def BT : T2I<(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b, rGPR:$acc), IIC_iMAC16, - !strconcat(opc, "bt"), "\t$dst, $a, $b, $acc", - [(set rGPR:$dst, (add rGPR:$acc, (opnode (sext_inreg rGPR:$a, i16), - (sra rGPR:$b, (i32 16)))))]> { + def BT : T2FourReg< + (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC16, + !strconcat(opc, "bt"), "\t$Rd, $Rn, $Rm, $Ra", + [(set rGPR:$Rd, (add rGPR:$Ra, (opnode (sext_inreg rGPR:$Rn, i16), + (sra rGPR:$Rm, (i32 16)))))]> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0110; let Inst{22-20} = 0b001; - let Inst{15-12} = {?, ?, ?, ?}; // Ra let Inst{7-6} = 0b00; let Inst{5-4} = 0b01; } - def TB : T2I<(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b, rGPR:$acc), IIC_iMAC16, - !strconcat(opc, "tb"), "\t$dst, $a, $b, $acc", - [(set rGPR:$dst, (add rGPR:$acc, (opnode (sra rGPR:$a, (i32 16)), - (sext_inreg rGPR:$b, i16))))]> { + def TB : T2FourReg< + (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC16, + !strconcat(opc, "tb"), "\t$Rd, $Rn, $Rm, $Ra", + [(set rGPR:$Rd, (add rGPR:$Ra, (opnode (sra rGPR:$Rn, (i32 16)), + (sext_inreg rGPR:$Rm, i16))))]> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0110; let Inst{22-20} = 0b001; - let Inst{15-12} = {?, ?, ?, ?}; // Ra let Inst{7-6} = 0b00; let Inst{5-4} = 0b10; } - def TT : T2I<(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b, rGPR:$acc), IIC_iMAC16, - !strconcat(opc, "tt"), "\t$dst, $a, $b, $acc", - [(set rGPR:$dst, (add rGPR:$acc, (opnode (sra rGPR:$a, (i32 16)), - (sra rGPR:$b, (i32 16)))))]> { + def TT : T2FourReg< + (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC16, + !strconcat(opc, "tt"), "\t$Rd, $Rn, $Rm, $Ra", + [(set rGPR:$Rd, (add rGPR:$Ra, (opnode (sra rGPR:$Rn, (i32 16)), + (sra rGPR:$Rm, (i32 16)))))]> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0110; let Inst{22-20} = 0b001; - let Inst{15-12} = {?, ?, ?, ?}; // Ra let Inst{7-6} = 0b00; let Inst{5-4} = 0b11; } - def WB : T2I<(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b, rGPR:$acc), IIC_iMAC16, - !strconcat(opc, "wb"), "\t$dst, $a, $b, $acc", - [(set rGPR:$dst, (add rGPR:$acc, (sra (opnode rGPR:$a, - (sext_inreg rGPR:$b, i16)), (i32 16))))]> { + def WB : T2FourReg< + (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC16, + !strconcat(opc, "wb"), "\t$Rd, $Rn, $Rm, $Ra", + [(set rGPR:$Rd, (add rGPR:$Ra, (sra (opnode rGPR:$Rn, + (sext_inreg rGPR:$Rm, i16)), (i32 16))))]> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0110; let Inst{22-20} = 0b011; - let Inst{15-12} = {?, ?, ?, ?}; // Ra let Inst{7-6} = 0b00; let Inst{5-4} = 0b00; } - def WT : T2I<(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b, rGPR:$acc), IIC_iMAC16, - !strconcat(opc, "wt"), "\t$dst, $a, $b, $acc", - [(set rGPR:$dst, (add rGPR:$acc, (sra (opnode rGPR:$a, - (sra rGPR:$b, (i32 16))), (i32 16))))]> { + def WT : T2FourReg< + (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC16, + !strconcat(opc, "wt"), "\t$Rd, $Rn, $Rm, $Ra", + [(set rGPR:$Rd, (add rGPR:$Ra, (sra (opnode rGPR:$Rn, + (sra rGPR:$Rm, (i32 16))), (i32 16))))]> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0110; let Inst{22-20} = 0b011; - let Inst{15-12} = {?, ?, ?, ?}; // Ra let Inst{7-6} = 0b00; let Inst{5-4} = 0b01; } @@ -2399,62 +2419,68 @@ defm t2SMLA : T2I_smla<"smla", BinOpFrag<(mul node:$LHS, node:$RHS)>>; // Halfword multiple accumulate long: SMLAL -- for disassembly only -def t2SMLALBB : T2I_mac<1, 0b100, 0b1000, (outs rGPR:$ldst,rGPR:$hdst), - (ins rGPR:$a,rGPR:$b), IIC_iMAC64, "smlalbb", "\t$ldst, $hdst, $a, $b", +def t2SMLALBB : T2FourReg_mac<1, 0b100, 0b1000, (outs rGPR:$Ra,rGPR:$Rd), + (ins rGPR:$Rn,rGPR:$Rm), IIC_iMAC64, "smlalbb", "\t$Ra, $Rd, $Rn, $Rm", [/* For disassembly only; pattern left blank */]>; -def t2SMLALBT : T2I_mac<1, 0b100, 0b1001, (outs rGPR:$ldst,rGPR:$hdst), - (ins rGPR:$a,rGPR:$b), IIC_iMAC64, "smlalbt", "\t$ldst, $hdst, $a, $b", +def t2SMLALBT : T2FourReg_mac<1, 0b100, 0b1001, (outs rGPR:$Ra,rGPR:$Rd), + (ins rGPR:$Rn,rGPR:$Rm), IIC_iMAC64, "smlalbt", "\t$Ra, $Rd, $Rn, $Rm", [/* For disassembly only; pattern left blank */]>; -def t2SMLALTB : T2I_mac<1, 0b100, 0b1010, (outs rGPR:$ldst,rGPR:$hdst), - (ins rGPR:$a,rGPR:$b), IIC_iMAC64, "smlaltb", "\t$ldst, $hdst, $a, $b", +def t2SMLALTB : T2FourReg_mac<1, 0b100, 0b1010, (outs rGPR:$Ra,rGPR:$Rd), + (ins rGPR:$Rn,rGPR:$Rm), IIC_iMAC64, "smlaltb", "\t$Ra, $Rd, $Rn, $Rm", [/* For disassembly only; pattern left blank */]>; -def t2SMLALTT : T2I_mac<1, 0b100, 0b1011, (outs rGPR:$ldst,rGPR:$hdst), - (ins rGPR:$a,rGPR:$b), IIC_iMAC64, "smlaltt", "\t$ldst, $hdst, $a, $b", +def t2SMLALTT : T2FourReg_mac<1, 0b100, 0b1011, (outs rGPR:$Ra,rGPR:$Rd), + (ins rGPR:$Rn,rGPR:$Rm), IIC_iMAC64, "smlaltt", "\t$Ra, $Rd, $Rn, $Rm", [/* For disassembly only; pattern left blank */]>; // Dual halfword multiple: SMUAD, SMUSD, SMLAD, SMLSD, SMLALD, SMLSLD // These are for disassembly only. - -def t2SMUAD: T2I_mac<0, 0b010, 0b0000, (outs rGPR:$dst), (ins rGPR:$a, rGPR:$b), - IIC_iMAC32, "smuad", "\t$dst, $a, $b", []> { + +def t2SMUAD: T2ThreeReg_mac< + 0, 0b010, 0b0000, (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), + IIC_iMAC32, "smuad", "\t$Rd, $Rn, $Rm", []> { let Inst{15-12} = 0b1111; } -def t2SMUADX:T2I_mac<0, 0b010, 0b0001, (outs rGPR:$dst), (ins rGPR:$a, rGPR:$b), - IIC_iMAC32, "smuadx", "\t$dst, $a, $b", []> { +def t2SMUADX:T2ThreeReg_mac< + 0, 0b010, 0b0001, (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), + IIC_iMAC32, "smuadx", "\t$Rd, $Rn, $Rm", []> { let Inst{15-12} = 0b1111; } -def t2SMUSD: T2I_mac<0, 0b100, 0b0000, (outs rGPR:$dst), (ins rGPR:$a, rGPR:$b), - IIC_iMAC32, "smusd", "\t$dst, $a, $b", []> { +def t2SMUSD: T2ThreeReg_mac< + 0, 0b100, 0b0000, (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), + IIC_iMAC32, "smusd", "\t$Rd, $Rn, $Rm", []> { let Inst{15-12} = 0b1111; } -def t2SMUSDX:T2I_mac<0, 0b100, 0b0001, (outs rGPR:$dst), (ins rGPR:$a, rGPR:$b), - IIC_iMAC32, "smusdx", "\t$dst, $a, $b", []> { +def t2SMUSDX:T2ThreeReg_mac< + 0, 0b100, 0b0001, (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), + IIC_iMAC32, "smusdx", "\t$Rd, $Rn, $Rm", []> { let Inst{15-12} = 0b1111; } -def t2SMLAD : T2I_mac<0, 0b010, 0b0000, (outs rGPR:$dst), - (ins rGPR:$a, rGPR:$b, rGPR:$acc), IIC_iMAC32, "smlad", - "\t$dst, $a, $b, $acc", []>; -def t2SMLADX : T2I_mac<0, 0b010, 0b0001, (outs rGPR:$dst), - (ins rGPR:$a, rGPR:$b, rGPR:$acc), IIC_iMAC32, "smladx", - "\t$dst, $a, $b, $acc", []>; -def t2SMLSD : T2I_mac<0, 0b100, 0b0000, (outs rGPR:$dst), - (ins rGPR:$a, rGPR:$b, rGPR:$acc), IIC_iMAC32, "smlsd", - "\t$dst, $a, $b, $acc", []>; -def t2SMLSDX : T2I_mac<0, 0b100, 0b0001, (outs rGPR:$dst), - (ins rGPR:$a, rGPR:$b, rGPR:$acc), IIC_iMAC32, "smlsdx", - "\t$dst, $a, $b, $acc", []>; -def t2SMLALD : T2I_mac<1, 0b100, 0b1100, (outs rGPR:$ldst,rGPR:$hdst), - (ins rGPR:$a,rGPR:$b), IIC_iMAC64, "smlald", - "\t$ldst, $hdst, $a, $b", []>; -def t2SMLALDX : T2I_mac<1, 0b100, 0b1101, (outs rGPR:$ldst,rGPR:$hdst), - (ins rGPR:$a,rGPR:$b), IIC_iMAC64, "smlaldx", - "\t$ldst, $hdst, $a, $b", []>; -def t2SMLSLD : T2I_mac<1, 0b101, 0b1100, (outs rGPR:$ldst,rGPR:$hdst), - (ins rGPR:$a,rGPR:$b), IIC_iMAC64, "smlsld", - "\t$ldst, $hdst, $a, $b", []>; -def t2SMLSLDX : T2I_mac<1, 0b101, 0b1101, (outs rGPR:$ldst,rGPR:$hdst), - (ins rGPR:$a,rGPR:$b), IIC_iMAC64, "smlsldx", - "\t$ldst, $hdst, $a, $b", []>; +def t2SMLAD : T2ThreeReg_mac< + 0, 0b010, 0b0000, (outs rGPR:$Rd), + (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32, "smlad", + "\t$Rd, $Rn, $Rm, $Ra", []>; +def t2SMLADX : T2FourReg_mac< + 0, 0b010, 0b0001, (outs rGPR:$Rd), + (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32, "smladx", + "\t$Rd, $Rn, $Rm, $Ra", []>; +def t2SMLSD : T2FourReg_mac<0, 0b100, 0b0000, (outs rGPR:$Rd), + (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32, "smlsd", + "\t$Rd, $Rn, $Rm, $Ra", []>; +def t2SMLSDX : T2FourReg_mac<0, 0b100, 0b0001, (outs rGPR:$Rd), + (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32, "smlsdx", + "\t$Rd, $Rn, $Rm, $Ra", []>; +def t2SMLALD : T2FourReg_mac<1, 0b100, 0b1100, (outs rGPR:$Ra,rGPR:$Rd), + (ins rGPR:$Rm, rGPR:$Rn), IIC_iMAC64, "smlald", + "\t$Ra, $Rd, $Rm, $Rn", []>; +def t2SMLALDX : T2FourReg_mac<1, 0b100, 0b1101, (outs rGPR:$Ra,rGPR:$Rd), + (ins rGPR:$Rm,rGPR:$Rn), IIC_iMAC64, "smlaldx", + "\t$Ra, $Rd, $Rm, $Rn", []>; +def t2SMLSLD : T2FourReg_mac<1, 0b101, 0b1100, (outs rGPR:$Ra,rGPR:$Rd), + (ins rGPR:$Rm,rGPR:$Rn), IIC_iMAC64, "smlsld", + "\t$Ra, $Rd, $Rm, $Rn", []>; +def t2SMLSLDX : T2FourReg_mac<1, 0b101, 0b1101, (outs rGPR:$Ra,rGPR:$Rd), + (ins rGPR:$Rm,rGPR:$Rn), IIC_iMAC64, "smlsldx", + "\t$Ra, $Rd, $Rm, $Rn", []>; //===----------------------------------------------------------------------===// // Misc. Arithmetic Instructions. Modified: llvm/trunk/test/MC/ARM/thumb2.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/thumb2.s?rev=119733&r1=119732&r2=119733&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/thumb2.s (original) +++ llvm/trunk/test/MC/ARM/thumb2.s Thu Nov 18 14:32:18 2010 @@ -68,3 +68,6 @@ mla r0, r0, r1, r2 @ CHECK: mls r0, r0, r1, r2 @ encoding: [0x11,0x20,0x00,0xfb] mls r0, r0, r1, r2 + +@ CHECK: smlabt r0, r1, r2, r0 @ encoding: [0xc1,0x02,0x00,0xe1] + smlabt r0, r1, r2, r0 From fvbommel at gmail.com Thu Nov 18 14:41:45 2010 From: fvbommel at gmail.com (Frits van Bommel) Date: Thu, 18 Nov 2010 21:41:45 +0100 Subject: [llvm-commits] [llvm] r119728 - in /llvm/trunk: lib/CodeGen/SelectionDAG/DAGCombiner.cpp test/CodeGen/X86/2010-11-18-SelectOfExtload.ll In-Reply-To: <20101118200518.D96E92A6C12C@llvm.org> References: <20101118200518.D96E92A6C12C@llvm.org> Message-ID: On Thu, Nov 18, 2010 at 9:05 PM, Duncan Sands wrote: > Author: baldrick > Date: Thu Nov 18 14:05:18 2010 > New Revision: 119728 > > URL: http://llvm.org/viewvc/llvm-project?rev=119728&view=rev > Log: > The DAGCombiner was threading select over pairs of extending loads even > if the extension types were not the same. ?The result was that if you > fed a select with sext and zext loads, as in the testcase, then it > would get turned into a zext (or sext) of the select, which is wrong > in the cases when it should have been an sext (resp. zext). ?Reported > and diagnosed by Sebastien Deldon. > + ? ? ? ?// If this is an EXTLOAD, the kind of extension must match. > + ? ? ? ?(LLD->getExtensionType() != RLD->getExtensionType() && > + ? ? ? ? // The only exception is if one of the extensions is anyext. > + ? ? ? ? LLD->getExtensionType() != ISD::EXTLOAD && > + ? ? ? ? RLD->getExtensionType() != ISD::EXTLOAD) || This looked funny to me, so I checked the rest of the function. Later on, there's this code: Load = DAG.getExtLoad(LLD->getExtensionType(), // ... Shouldn't this be changed to something like Load = DAG.getExtLoad((LLD->getExtensionType() != ISD::EXTLOAD ? LLD->getExtensionType() : RLD->getExtensionType()), // ... ? It looks to me like it could now still turn e.g. (select %cond (anyext %a) (sext %b)) into (anyext (select %cond %a %b)) which it probably shouldn't. From evan.cheng at apple.com Thu Nov 18 14:51:12 2010 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 18 Nov 2010 12:51:12 -0800 Subject: [llvm-commits] [llvm] r119725 - in /llvm/trunk: lib/Target/ARM/ARMBaseInstrInfo.cpp lib/Target/ARM/ARMBaseInstrInfo.h lib/Target/ARM/ARMBaseRegisterInfo.h lib/Target/ARM/ARMFrameInfo.cpp test/CodeGen/ARM/2010-10-25-ifcvt-ldm.ll test/CodeGen/ARM/str_pre-2.ll test/CodeGen/Thumb2/2010-06-21-TailMergeBug.ll In-Reply-To: <20101118194006.283CA2A6C12C@llvm.org> References: <20101118194006.283CA2A6C12C@llvm.org> Message-ID: <48A73310-BAF3-42D1-B7A9-EE69A9D8B284@apple.com> On Nov 18, 2010, at 11:40 AM, Eric Christopher wrote: > > + > + // It's illegal to emit pop instruction without operands. > + if (NumRegs) > + MBB.insert(MI, &*MIB); > + else > + MF.DeleteMachineInstr(MIB); Couldn't the code avoid creating the instruction in the first place? Evan > +} > + > +bool > +ARMBaseInstrInfo::restoreCalleeSavedRegisters(MachineBasicBlock &MBB, > + MachineBasicBlock::iterator MI, > + const std::vector &CSI, > + const TargetRegisterInfo *TRI) const { > + if (CSI.empty()) > + return false; > + > + MachineFunction &MF = *MBB.getParent(); > + ARMFunctionInfo *AFI = MF.getInfo(); > + bool isVarArg = AFI->getVarArgsRegSaveSize() > 0; > + DebugLoc DL = MI->getDebugLoc(); > + > + unsigned PopOpc = AFI->isThumbFunction() ? ARM::t2LDMIA_UPD : ARM::LDMIA_UPD; > + unsigned FltOpc = ARM::VLDMDIA_UPD; > + emitPopInst(MBB, MI, CSI, FltOpc, isVarArg, &isARMArea3Register); > + emitPopInst(MBB, MI, CSI, PopOpc, isVarArg, &isARMArea2Register); > + emitPopInst(MBB, MI, CSI, PopOpc, isVarArg, &isARMArea1Register); > > - // Insert the spill to the stack frame. The register is killed at the spill > - // > - const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg); > - storeRegToStackSlot(MBB, MI, Reg, isKill, > - CSI[i].getFrameIdx(), RC, TRI); > - } > return true; > } > > + > // Branch analysis. > bool > ARMBaseInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, > @@ -2195,7 +2281,7 @@ > case ARM::VSTMQIA: > case ARM::VSTMQDB: > return 2; > - } > + } > } > > bool ARMBaseInstrInfo:: > > Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h?rev=119725&r1=119724&r2=119725&view=diff > ============================================================================== > --- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h (original) > +++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h Thu Nov 18 13:40:05 2010 > @@ -211,6 +211,21 @@ > const std::vector &CSI, > const TargetRegisterInfo *TRI) const; > > + bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, > + MachineBasicBlock::iterator MI, > + const std::vector &CSI, > + const TargetRegisterInfo *TRI) const; > + > +private: > + void emitPopInst(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, > + const std::vector &CSI, unsigned Opc, > + bool isVarArg, bool(*Func)(unsigned, bool)) const; > + void emitPushInst(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, > + const std::vector &CSI, unsigned Opc, > + bool(*Func)(unsigned, bool)) const; > + > + > +public: > // Branch analysis. > virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, > MachineBasicBlock *&FBB, > > Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.h?rev=119725&r1=119724&r2=119725&view=diff > ============================================================================== > --- llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.h (original) > +++ llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.h Thu Nov 18 13:40:05 2010 > @@ -44,6 +44,45 @@ > } > } > > +/// isARMArea1Register - Returns true if the register is a low register (r0-r7) > +/// or a stack/pc register that we should push/pop. > +static inline bool isARMArea1Register(unsigned Reg, bool isDarwin) { > + using namespace ARM; > + switch (Reg) { > + case R0: case R1: case R2: case R3: > + case R4: case R5: case R6: case R7: > + case LR: case SP: case PC: > + return true; > + case R8: case R9: case R10: case R11: > + // For darwin we want r7 and lr to be next to each other. > + return !isDarwin; > + default: > + return false; > + } > +} > + > +static inline bool isARMArea2Register(unsigned Reg, bool isDarwin) { > + using namespace ARM; > + switch (Reg) { > + case R8: case R9: case R10: case R11: > + // Darwin has this second area. > + return isDarwin; > + default: > + return false; > + } > +} > + > +static inline bool isARMArea3Register(unsigned Reg, bool isDarwin) { > + using namespace ARM; > + switch (Reg) { > + case D15: case D14: case D13: case D12: > + case D11: case D10: case D9: case D8: > + return true; > + default: > + return false; > + } > +} > + > class ARMBaseRegisterInfo : public ARMGenRegisterInfo { > protected: > const ARMBaseInstrInfo &TII; > > Modified: llvm/trunk/lib/Target/ARM/ARMFrameInfo.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFrameInfo.cpp?rev=119725&r1=119724&r2=119725&view=diff > ============================================================================== > --- llvm/trunk/lib/Target/ARM/ARMFrameInfo.cpp (original) > +++ llvm/trunk/lib/Target/ARM/ARMFrameInfo.cpp Thu Nov 18 13:40:05 2010 > @@ -20,43 +20,6 @@ > > using namespace llvm; > > -/// Move iterator past the next bunch of callee save load / store ops for > -/// the particular spill area (1: integer area 1, 2: integer area 2, > -/// 3: fp area, 0: don't care). > -static void movePastCSLoadStoreOps(MachineBasicBlock &MBB, > - MachineBasicBlock::iterator &MBBI, > - int Opc1, int Opc2, unsigned Area, > - const ARMSubtarget &STI) { > - while (MBBI != MBB.end() && > - ((MBBI->getOpcode() == Opc1) || (MBBI->getOpcode() == Opc2)) && > - MBBI->getOperand(1).isFI()) { > - if (Area != 0) { > - bool Done = false; > - unsigned Category = 0; > - switch (MBBI->getOperand(0).getReg()) { > - case ARM::R4: case ARM::R5: case ARM::R6: case ARM::R7: > - case ARM::LR: > - Category = 1; > - break; > - case ARM::R8: case ARM::R9: case ARM::R10: case ARM::R11: > - Category = STI.isTargetDarwin() ? 2 : 1; > - break; > - case ARM::D8: case ARM::D9: case ARM::D10: case ARM::D11: > - case ARM::D12: case ARM::D13: case ARM::D14: case ARM::D15: > - Category = 3; > - break; > - default: > - Done = true; > - break; > - } > - if (Done || Category != Area) > - break; > - } > - > - ++MBBI; > - } > -} > - > static bool isCalleeSavedRegister(unsigned Reg, const unsigned *CSRegs) { > for (unsigned i = 0; CSRegs[i]; ++i) > if (Reg == CSRegs[i]) > @@ -67,11 +30,21 @@ > static bool isCSRestore(MachineInstr *MI, > const ARMBaseInstrInfo &TII, > const unsigned *CSRegs) { > - return ((MI->getOpcode() == (int)ARM::VLDRD || > - MI->getOpcode() == (int)ARM::LDRi12 || > - MI->getOpcode() == (int)ARM::t2LDRi12) && > - MI->getOperand(1).isFI() && > - isCalleeSavedRegister(MI->getOperand(0).getReg(), CSRegs)); > + // Integer spill area is handled with "pop". > + if (MI->getOpcode() == ARM::LDMIA_RET || > + MI->getOpcode() == ARM::t2LDMIA_RET || > + MI->getOpcode() == ARM::LDMIA_UPD || > + MI->getOpcode() == ARM::t2LDMIA_UPD || > + MI->getOpcode() == ARM::VLDMDIA_UPD) { > + // The first two operands are predicates. The last two are > + // imp-def and imp-use of SP. Check everything in between. > + for (int i = 5, e = MI->getNumOperands(); i != e; ++i) > + if (!isCalleeSavedRegister(MI->getOperand(i).getReg(), CSRegs)) > + return false; > + return true; > + } > + > + return false; > } > > static void > @@ -154,11 +127,10 @@ > DPRCSSize += 8; > } > } > - > - // Build the new SUBri to adjust SP for integer callee-save spill area 1. > - emitSPUpdate(isARM, MBB, MBBI, dl, TII, -GPRCS1Size); > - movePastCSLoadStoreOps(MBB, MBBI, ARM::STRi12, ARM::t2STRi12, 1, STI); > - > + > + // Move past area 1. > + if (GPRCS1Size > 0) MBBI++; > + > // Set FP to point to the stack slot that contains the previous FP. > // For Darwin, FP is R7, which has now been stored in spill area 1. > // Otherwise, if this is not Darwin, all the callee-saved registers go > @@ -172,14 +144,10 @@ > .addFrameIndex(FramePtrSpillFI).addImm(0); > AddDefaultCC(AddDefaultPred(MIB)); > } > - > - // Build the new SUBri to adjust SP for integer callee-save spill area 2. > - emitSPUpdate(isARM, MBB, MBBI, dl, TII, -GPRCS2Size); > - > - // Build the new SUBri to adjust SP for FP callee-save spill area. > - movePastCSLoadStoreOps(MBB, MBBI, ARM::STRi12, ARM::t2STRi12, 2, STI); > - emitSPUpdate(isARM, MBB, MBBI, dl, TII, -DPRCSSize); > - > + > + // Move past area 2. > + if (GPRCS2Size > 0) MBBI++; > + > // Determine starting offsets of spill areas. > unsigned DPRCSOffset = NumBytes - (GPRCS1Size + GPRCS2Size + DPRCSSize); > unsigned GPRCS2Offset = DPRCSOffset + DPRCSSize; > @@ -191,7 +159,9 @@ > AFI->setGPRCalleeSavedArea2Offset(GPRCS2Offset); > AFI->setDPRCalleeSavedAreaOffset(DPRCSOffset); > > - movePastCSLoadStoreOps(MBB, MBBI, ARM::VSTRD, 0, 3, STI); > + // Move past area 3. > + if (DPRCSSize > 0) MBBI++; > + > NumBytes = DPRCSOffset; > if (NumBytes) { > // Adjust SP after all the callee-save spills. > @@ -325,17 +295,10 @@ > } else if (NumBytes) > emitSPUpdate(isARM, MBB, MBBI, dl, TII, NumBytes); > > - // Move SP to start of integer callee save spill area 2. > - movePastCSLoadStoreOps(MBB, MBBI, ARM::VLDRD, 0, 3, STI); > - emitSPUpdate(isARM, MBB, MBBI, dl, TII, AFI->getDPRCalleeSavedAreaSize()); > - > - // Move SP to start of integer callee save spill area 1. > - movePastCSLoadStoreOps(MBB, MBBI, ARM::LDRi12, ARM::t2LDRi12, 2, STI); > - emitSPUpdate(isARM, MBB, MBBI, dl, TII, AFI->getGPRCalleeSavedArea2Size()); > - > - // Move SP to SP upon entry to the function. > - movePastCSLoadStoreOps(MBB, MBBI, ARM::LDRi12, ARM::t2LDRi12, 1, STI); > - emitSPUpdate(isARM, MBB, MBBI, dl, TII, AFI->getGPRCalleeSavedArea1Size()); > + // Increment past our save areas. > + if (AFI->getDPRCalleeSavedAreaSize()) MBBI++; > + if (AFI->getGPRCalleeSavedArea2Size()) MBBI++; > + if (AFI->getGPRCalleeSavedArea1Size()) MBBI++; > } > > if (RetOpcode == ARM::TCRETURNdi || RetOpcode == ARM::TCRETURNdiND || > > Modified: llvm/trunk/test/CodeGen/ARM/2010-10-25-ifcvt-ldm.ll > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2010-10-25-ifcvt-ldm.ll?rev=119725&r1=119724&r2=119725&view=diff > ============================================================================== > --- llvm/trunk/test/CodeGen/ARM/2010-10-25-ifcvt-ldm.ll (original) > +++ llvm/trunk/test/CodeGen/ARM/2010-10-25-ifcvt-ldm.ll Thu Nov 18 13:40:05 2010 > @@ -3,7 +3,7 @@ > ; LDM instruction, was causing an assertion failure because the microop count > ; was being treated as an instruction count. > > -; CHECK: ldmia > +; CHECK: push > ; CHECK: ldmia > ; CHECK: ldmia > ; CHECK: ldmia > > Modified: llvm/trunk/test/CodeGen/ARM/str_pre-2.ll > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/str_pre-2.ll?rev=119725&r1=119724&r2=119725&view=diff > ============================================================================== > --- llvm/trunk/test/CodeGen/ARM/str_pre-2.ll (original) > +++ llvm/trunk/test/CodeGen/ARM/str_pre-2.ll Thu Nov 18 13:40:05 2010 > @@ -4,8 +4,8 @@ > > define i64 @t(i64 %a) nounwind readonly { > entry: > -; CHECK: str lr, [sp, #-4]! > -; CHECK: ldr lr, [sp], #4 > +; CHECK: push {lr} > +; CHECK: ldmia sp!, {pc} > %0 = load i64** @b, align 4 > %1 = load i64* %0, align 4 > %2 = mul i64 %1, %a > > Modified: llvm/trunk/test/CodeGen/Thumb2/2010-06-21-TailMergeBug.ll > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/2010-06-21-TailMergeBug.ll?rev=119725&r1=119724&r2=119725&view=diff > ============================================================================== > --- llvm/trunk/test/CodeGen/Thumb2/2010-06-21-TailMergeBug.ll (original) > +++ llvm/trunk/test/CodeGen/Thumb2/2010-06-21-TailMergeBug.ll Thu Nov 18 13:40:05 2010 > @@ -39,7 +39,7 @@ > ; CHECK: ittt eq > ; CHECK: moveq r0 > ; CHECK-NOT: LBB0_ > -; CHECK: ldreq > +; CHECK: popeq > ; CHECK: popeq > switch i32 undef, label %bb7 [ > i32 37, label %bb43 > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From echristo at apple.com Thu Nov 18 15:04:23 2010 From: echristo at apple.com (Eric Christopher) Date: Thu, 18 Nov 2010 13:04:23 -0800 Subject: [llvm-commits] [llvm] r119725 - in /llvm/trunk: lib/Target/ARM/ARMBaseInstrInfo.cpp lib/Target/ARM/ARMBaseInstrInfo.h lib/Target/ARM/ARMBaseRegisterInfo.h lib/Target/ARM/ARMFrameInfo.cpp test/CodeGen/ARM/2010-10-25-ifcvt-ldm.ll test/CodeGen/ARM/str_pre-2.ll test/CodeGen/Thumb2/2010-06-21-TailMergeBug.ll In-Reply-To: <48A73310-BAF3-42D1-B7A9-EE69A9D8B284@apple.com> References: <20101118194006.283CA2A6C12C@llvm.org> <48A73310-BAF3-42D1-B7A9-EE69A9D8B284@apple.com> Message-ID: On Nov 18, 2010, at 12:51 PM, Evan Cheng wrote: > Couldn't the code avoid creating the instruction in the first place? Could, but I'd have to scan ahead of time to figure out if I want to create the instruction and then create it - it didn't strike me as that heavyweight a solution. -eric -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101118/26d96a91/attachment.html From resistor at mac.com Thu Nov 18 15:15:19 2010 From: resistor at mac.com (Owen Anderson) Date: Thu, 18 Nov 2010 21:15:19 -0000 Subject: [llvm-commits] [llvm] r119737 - in /llvm/trunk: lib/Target/ARM/ARMInstrThumb2.td test/MC/ARM/thumb2.s Message-ID: <20101118211519.E44BF2A6C12C@llvm.org> Author: resistor Date: Thu Nov 18 15:15:19 2010 New Revision: 119737 URL: http://llvm.org/viewvc/llvm-project?rev=119737&view=rev Log: More Thumb2 encodings. Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td llvm/trunk/test/MC/ARM/thumb2.s Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=119737&r1=119736&r2=119737&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Thu Nov 18 15:15:19 2010 @@ -2488,44 +2488,46 @@ class T2I_misc op1, bits<2> op2, dag oops, dag iops, InstrItinClass itin, string opc, string asm, list pattern> - : T2I { + : T2ThreeReg { let Inst{31-27} = 0b11111; let Inst{26-22} = 0b01010; let Inst{21-20} = op1; let Inst{15-12} = 0b1111; let Inst{7-6} = 0b10; let Inst{5-4} = op2; + let Rn{3-0} = Rm{3-0}; } -def t2CLZ : T2I_misc<0b11, 0b00, (outs rGPR:$dst), (ins rGPR:$src), IIC_iUNAr, - "clz", "\t$dst, $src", [(set rGPR:$dst, (ctlz rGPR:$src))]>; +def t2CLZ : T2I_misc<0b11, 0b00, (outs rGPR:$Rd), (ins rGPR:$Rm), IIC_iUNAr, + "clz", "\t$Rd, $Rm", [(set rGPR:$Rd, (ctlz rGPR:$Rm))]>; -def t2RBIT : T2I_misc<0b01, 0b10, (outs rGPR:$dst), (ins rGPR:$src), IIC_iUNAr, - "rbit", "\t$dst, $src", - [(set rGPR:$dst, (ARMrbit rGPR:$src))]>; - -def t2REV : T2I_misc<0b01, 0b00, (outs rGPR:$dst), (ins rGPR:$src), IIC_iUNAr, - "rev", ".w\t$dst, $src", [(set rGPR:$dst, (bswap rGPR:$src))]>; - -def t2REV16 : T2I_misc<0b01, 0b01, (outs rGPR:$dst), (ins rGPR:$src), IIC_iUNAr, - "rev16", ".w\t$dst, $src", - [(set rGPR:$dst, - (or (and (srl rGPR:$src, (i32 8)), 0xFF), - (or (and (shl rGPR:$src, (i32 8)), 0xFF00), - (or (and (srl rGPR:$src, (i32 8)), 0xFF0000), - (and (shl rGPR:$src, (i32 8)), 0xFF000000)))))]>; - -def t2REVSH : T2I_misc<0b01, 0b11, (outs rGPR:$dst), (ins rGPR:$src), IIC_iUNAr, - "revsh", ".w\t$dst, $src", - [(set rGPR:$dst, +def t2RBIT : T2I_misc<0b01, 0b10, (outs rGPR:$Rd), (ins rGPR:$Rm), IIC_iUNAr, + "rbit", "\t$Rd, $Rm", + [(set rGPR:$Rd, (ARMrbit rGPR:$Rm))]>; + +def t2REV : T2I_misc<0b01, 0b00, (outs rGPR:$Rd), (ins rGPR:$Rm), IIC_iUNAr, + "rev", ".w\t$Rd, $Rm", [(set rGPR:$Rd, (bswap rGPR:$Rm))]>; + +def t2REV16 : T2I_misc<0b01, 0b01, (outs rGPR:$Rd), (ins rGPR:$Rm), IIC_iUNAr, + "rev16", ".w\t$Rd, $Rm", + [(set rGPR:$Rd, + (or (and (srl rGPR:$Rm, (i32 8)), 0xFF), + (or (and (shl rGPR:$Rm, (i32 8)), 0xFF00), + (or (and (srl rGPR:$Rm, (i32 8)), 0xFF0000), + (and (shl rGPR:$Rm, (i32 8)), 0xFF000000)))))]>; + +def t2REVSH : T2I_misc<0b01, 0b11, (outs rGPR:$Rd), (ins rGPR:$Rm), IIC_iUNAr, + "revsh", ".w\t$Rd, $Rm", + [(set rGPR:$Rd, (sext_inreg - (or (srl (and rGPR:$src, 0xFF00), (i32 8)), - (shl rGPR:$src, (i32 8))), i16))]>; + (or (srl (and rGPR:$Rm, 0xFF00), (i32 8)), + (shl rGPR:$Rm, (i32 8))), i16))]>; -def t2PKHBT : T2I<(outs rGPR:$dst), (ins rGPR:$src1, rGPR:$src2, shift_imm:$sh), - IIC_iBITsi, "pkhbt", "\t$dst, $src1, $src2$sh", - [(set rGPR:$dst, (or (and rGPR:$src1, 0xFFFF), - (and (shl rGPR:$src2, lsl_amt:$sh), +def t2PKHBT : T2ThreeReg< + (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, shift_imm:$sh), + IIC_iBITsi, "pkhbt", "\t$Rd, $Rn, $Rm$sh", + [(set rGPR:$Rd, (or (and rGPR:$Rn, 0xFFFF), + (and (shl rGPR:$Rm, lsl_amt:$sh), 0xFFFF0000)))]>, Requires<[HasT2ExtractPack, IsThumb2]> { let Inst{31-27} = 0b11101; @@ -2533,6 +2535,10 @@ let Inst{24-20} = 0b01100; let Inst{5} = 0; // BT form let Inst{4} = 0; + + bits<5> sh; + let Inst{14-12} = sh{4-2}; + let Inst{7-6} = sh{1-0}; } // Alternate cases for PKHBT where identities eliminate some nodes. @@ -2545,10 +2551,11 @@ // Note: Shifts of 1-15 bits will be transformed to srl instead of sra and // will match the pattern below. -def t2PKHTB : T2I<(outs rGPR:$dst), (ins rGPR:$src1, rGPR:$src2, shift_imm:$sh), - IIC_iBITsi, "pkhtb", "\t$dst, $src1, $src2$sh", - [(set rGPR:$dst, (or (and rGPR:$src1, 0xFFFF0000), - (and (sra rGPR:$src2, asr_amt:$sh), +def t2PKHTB : T2ThreeReg< + (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, shift_imm:$sh), + IIC_iBITsi, "pkhtb", "\t$Rd, $Rn, $Rm$sh", + [(set rGPR:$Rd, (or (and rGPR:$Rn, 0xFFFF0000), + (and (sra rGPR:$Rm, asr_amt:$sh), 0xFFFF)))]>, Requires<[HasT2ExtractPack, IsThumb2]> { let Inst{31-27} = 0b11101; @@ -2556,6 +2563,10 @@ let Inst{24-20} = 0b01100; let Inst{5} = 1; // TB form let Inst{4} = 0; + + bits<5> sh; + let Inst{14-12} = sh{4-2}; + let Inst{7-6} = sh{1-0}; } // Alternate cases for PKHTB where identities eliminate some nodes. Note that Modified: llvm/trunk/test/MC/ARM/thumb2.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/thumb2.s?rev=119737&r1=119736&r2=119737&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/thumb2.s (original) +++ llvm/trunk/test/MC/ARM/thumb2.s Thu Nov 18 15:15:19 2010 @@ -71,3 +71,27 @@ @ CHECK: smlabt r0, r1, r2, r0 @ encoding: [0xc1,0x02,0x00,0xe1] smlabt r0, r1, r2, r0 + +@ CHECK: clz r0, r0 @ encoding: [0x10,0x0f,0x6f,0xe1] + clz r0, r0 +@ CHECK: rev r0, r0 @ encoding: [0x30,0x0f,0xbf,0xe6] + rev r0, r0 +@ CHECK: revsh r0, r0 @ encoding: [0xb0,0x0f,0xff,0xe6] + revsh r0, r0 + +@ CHECK: pkhbt r0, r0, r1, lsl #16 @ encoding: [0x11,0x08,0x80,0xe6] + pkhbt r0, r0, r1, lsl #16 +@ CHECK: pkhbt r0, r0, r1, lsl #12 @ encoding: [0x11,0x06,0x80,0xe6] + pkhbt r0, r0, r1, lsl #16 +@ CHECK: pkhbt r0, r0, r1, lsl #18 @ encoding: [0x11,0x09,0x80,0xe6] + pkhbt r0, r0, r1, lsl #18 +@ CHECK: pkhbt r0, r0, r1 @ encoding: [0x11,0x00,0x80,0xe6] + pkhbt r0, r0, r1 +@ CHECK: pkhtb r0, r0, r1, asr #16 @ encoding: [0x51,0x08,0x80,0xe6] + pkhtb r0, r0, r1, asr #16 +@ CHECK: pkhtb r0, r0, r1, asr #12 @ encoding: [0x51,0x06,0x80,0xe6] + pkhtb r0, r0, r1, asr #12 +@ CHECK: pkhtb r0, r0, r1, asr #18 @ encoding: [0x51,0x09,0x80,0xe6] + pkhtb r0, r0, r1, asr #18 +@ CHECK: pkhtb r0, r0, r1, asr #22 @ encoding: [0x51,0x0b,0x80,0xe6] + pkhtb r0, r0, r1, asr #22 From bob.wilson at apple.com Thu Nov 18 15:16:28 2010 From: bob.wilson at apple.com (Bob Wilson) Date: Thu, 18 Nov 2010 21:16:28 -0000 Subject: [llvm-commits] [llvm] r119738 - /llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Message-ID: <20101118211628.94CE32A6C12C@llvm.org> Author: bwilson Date: Thu Nov 18 15:16:28 2010 New Revision: 119738 URL: http://llvm.org/viewvc/llvm-project?rev=119738&view=rev Log: Split up ARM LowerShift function. This function was being called from two different places for completely unrelated reasons. During type legalization, it was called to expand 64-bit shift operations. During operation legalization, it was called to handle Neon vector shifts. The vector shift code was not written to check for illegal types, since it was assumed to be only called after type legalization. Fixed this by splitting off the 64-bit shift expansion into a separate function. I don't have a particular testcase for this; I just noticed it by inspection. Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=119738&r1=119737&r2=119738&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Thu Nov 18 15:16:28 2010 @@ -2921,33 +2921,40 @@ EVT VT = N->getValueType(0); DebugLoc dl = N->getDebugLoc(); + if (!VT.isVector()) + return SDValue(); + // Lower vector shifts on NEON to use VSHL. - if (VT.isVector()) { - assert(ST->hasNEON() && "unexpected vector shift"); + assert(ST->hasNEON() && "unexpected vector shift"); - // Left shifts translate directly to the vshiftu intrinsic. - if (N->getOpcode() == ISD::SHL) - return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT, - DAG.getConstant(Intrinsic::arm_neon_vshiftu, MVT::i32), - N->getOperand(0), N->getOperand(1)); - - assert((N->getOpcode() == ISD::SRA || - N->getOpcode() == ISD::SRL) && "unexpected vector shift opcode"); - - // NEON uses the same intrinsics for both left and right shifts. For - // right shifts, the shift amounts are negative, so negate the vector of - // shift amounts. - EVT ShiftVT = N->getOperand(1).getValueType(); - SDValue NegatedCount = DAG.getNode(ISD::SUB, dl, ShiftVT, - getZeroVector(ShiftVT, DAG, dl), - N->getOperand(1)); - Intrinsic::ID vshiftInt = (N->getOpcode() == ISD::SRA ? - Intrinsic::arm_neon_vshifts : - Intrinsic::arm_neon_vshiftu); + // Left shifts translate directly to the vshiftu intrinsic. + if (N->getOpcode() == ISD::SHL) return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT, - DAG.getConstant(vshiftInt, MVT::i32), - N->getOperand(0), NegatedCount); - } + DAG.getConstant(Intrinsic::arm_neon_vshiftu, MVT::i32), + N->getOperand(0), N->getOperand(1)); + + assert((N->getOpcode() == ISD::SRA || + N->getOpcode() == ISD::SRL) && "unexpected vector shift opcode"); + + // NEON uses the same intrinsics for both left and right shifts. For + // right shifts, the shift amounts are negative, so negate the vector of + // shift amounts. + EVT ShiftVT = N->getOperand(1).getValueType(); + SDValue NegatedCount = DAG.getNode(ISD::SUB, dl, ShiftVT, + getZeroVector(ShiftVT, DAG, dl), + N->getOperand(1)); + Intrinsic::ID vshiftInt = (N->getOpcode() == ISD::SRA ? + Intrinsic::arm_neon_vshifts : + Intrinsic::arm_neon_vshiftu); + return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT, + DAG.getConstant(vshiftInt, MVT::i32), + N->getOperand(0), NegatedCount); +} + +static SDValue Expand64BitShift(SDNode *N, SelectionDAG &DAG, + const ARMSubtarget *ST) { + EVT VT = N->getValueType(0); + DebugLoc dl = N->getDebugLoc(); // We can get here for a node like i32 = ISD::SHL i32, i64 if (VT != MVT::i64) @@ -3958,7 +3965,7 @@ break; case ISD::SRL: case ISD::SRA: - Res = LowerShift(N, DAG, Subtarget); + Res = Expand64BitShift(N, DAG, Subtarget); break; } if (Res.getNode()) From baldrick at free.fr Thu Nov 18 15:16:28 2010 From: baldrick at free.fr (Duncan Sands) Date: Thu, 18 Nov 2010 21:16:28 -0000 Subject: [llvm-commits] [llvm] r119739 - /llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Message-ID: <20101118211628.A72222A6C12D@llvm.org> Author: baldrick Date: Thu Nov 18 15:16:28 2010 New Revision: 119739 URL: http://llvm.org/viewvc/llvm-project?rev=119739&view=rev Log: Fix thinko: we must turn select(anyext, sext) into sext(select) not anyext(select). Spotted by Frits van Bommel. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=119739&r1=119738&r2=119739&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Thu Nov 18 15:16:28 2010 @@ -6712,7 +6712,8 @@ LLD->isVolatile(), LLD->isNonTemporal(), LLD->getAlignment()); } else { - Load = DAG.getExtLoad(LLD->getExtensionType(), + Load = DAG.getExtLoad(LLD->getExtensionType() == ISD::EXTLOAD ? + RLD->getExtensionType() : LLD->getExtensionType(), TheSelect->getValueType(0), TheSelect->getDebugLoc(), // FIXME: Discards pointer info. From asl at math.spbu.ru Thu Nov 18 15:19:35 2010 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Thu, 18 Nov 2010 21:19:35 -0000 Subject: [llvm-commits] [llvm] r119740 - in /llvm/trunk: include/llvm/Target/ lib/CodeGen/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/Blackfin/ lib/Target/CellSPU/ lib/Target/MBlaze/ lib/Target/MSP430/ lib/Target/Mips/ lib/Target/PTX/ lib/Target/PowerPC/ lib/Target/Sparc/ lib/Target/SystemZ/ lib/Target/X86/ lib/Target/XCore/ Message-ID: <20101118211936.5CF982A6C12C@llvm.org> Author: asl Date: Thu Nov 18 15:19:35 2010 New Revision: 119740 URL: http://llvm.org/viewvc/llvm-project?rev=119740&view=rev Log: Move hasFP() and few related hooks to TargetFrameInfo. Modified: llvm/trunk/include/llvm/Target/TargetFrameInfo.h llvm/trunk/include/llvm/Target/TargetRegisterInfo.h llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.h llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp llvm/trunk/lib/Target/ARM/ARMFrameInfo.cpp llvm/trunk/lib/Target/ARM/ARMFrameInfo.h llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp llvm/trunk/lib/Target/ARM/Thumb1FrameInfo.cpp llvm/trunk/lib/Target/ARM/Thumb1FrameInfo.h llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.cpp llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.h llvm/trunk/lib/Target/Alpha/AlphaFrameInfo.cpp llvm/trunk/lib/Target/Alpha/AlphaFrameInfo.h llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.h llvm/trunk/lib/Target/Blackfin/BlackfinFrameInfo.cpp llvm/trunk/lib/Target/Blackfin/BlackfinFrameInfo.h llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.cpp llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.h llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.td llvm/trunk/lib/Target/CellSPU/SPUFrameInfo.cpp llvm/trunk/lib/Target/CellSPU/SPUFrameInfo.h llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.h llvm/trunk/lib/Target/MBlaze/MBlazeFrameInfo.cpp llvm/trunk/lib/Target/MBlaze/MBlazeFrameInfo.h llvm/trunk/lib/Target/MBlaze/MBlazeRegisterInfo.cpp llvm/trunk/lib/Target/MBlaze/MBlazeRegisterInfo.h llvm/trunk/lib/Target/MSP430/MSP430FrameInfo.cpp llvm/trunk/lib/Target/MSP430/MSP430FrameInfo.h llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.cpp llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.h llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.td llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp llvm/trunk/lib/Target/Mips/MipsFrameInfo.cpp llvm/trunk/lib/Target/Mips/MipsFrameInfo.h llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp llvm/trunk/lib/Target/Mips/MipsRegisterInfo.h llvm/trunk/lib/Target/PTX/PTXFrameInfo.h llvm/trunk/lib/Target/PTX/PTXRegisterInfo.h llvm/trunk/lib/Target/PowerPC/PPCFrameInfo.cpp llvm/trunk/lib/Target/PowerPC/PPCFrameInfo.h llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.h llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.td llvm/trunk/lib/Target/Sparc/SparcFrameInfo.h llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.cpp llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.h llvm/trunk/lib/Target/SystemZ/SystemZFrameInfo.cpp llvm/trunk/lib/Target/SystemZ/SystemZFrameInfo.h llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.cpp llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.h llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.td llvm/trunk/lib/Target/X86/X86FrameInfo.cpp llvm/trunk/lib/Target/X86/X86FrameInfo.h llvm/trunk/lib/Target/X86/X86ISelLowering.cpp llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp llvm/trunk/lib/Target/X86/X86RegisterInfo.h llvm/trunk/lib/Target/X86/X86RegisterInfo.td llvm/trunk/lib/Target/XCore/XCoreFrameInfo.cpp llvm/trunk/lib/Target/XCore/XCoreFrameInfo.h llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.cpp llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.h llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.td Modified: llvm/trunk/include/llvm/Target/TargetFrameInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetFrameInfo.h?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetFrameInfo.h (original) +++ llvm/trunk/include/llvm/Target/TargetFrameInfo.h Thu Nov 18 15:19:35 2010 @@ -105,6 +105,32 @@ virtual void emitPrologue(MachineFunction &MF) const = 0; virtual void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const = 0; + + /// hasFP - Return true if the specified function should have a dedicated + /// frame pointer register. For most targets this is true only if the function + /// has variable sized allocas or if frame pointer elimination is disabled. + virtual bool hasFP(const MachineFunction &MF) const = 0; + + /// hasReservedCallFrame - Under normal circumstances, when a frame pointer is + /// not required, we reserve argument space for call sites in the function + /// immediately on entry to the current function. This eliminates the need for + /// add/sub sp brackets around call sites. Returns true if the call frame is + /// included as part of the stack frame. + virtual bool hasReservedCallFrame(const MachineFunction &MF) const { + return !hasFP(MF); + } + + /// canSimplifyCallFramePseudos - When possible, it's best to simplify the + /// call frame pseudo ops before doing frame index elimination. This is + /// possible only when frame index references between the pseudos won't + /// need adjusting for the call frame adjustments. Normally, that's true + /// if the function has a reserved call frame or a frame pointer. Some + /// targets (Thumb2, for example) may have more complicated criteria, + /// however, and can override this behavior. + virtual bool canSimplifyCallFramePseudos(const MachineFunction &MF) const { + return hasReservedCallFrame(MF) || hasFP(MF); + } + }; } // End llvm namespace Modified: llvm/trunk/include/llvm/Target/TargetRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetRegisterInfo.h?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetRegisterInfo.h (original) +++ llvm/trunk/include/llvm/Target/TargetRegisterInfo.h Thu Nov 18 15:19:35 2010 @@ -596,31 +596,6 @@ return false; } - /// hasFP - Return true if the specified function should have a dedicated - /// frame pointer register. For most targets this is true only if the function - /// has variable sized allocas or if frame pointer elimination is disabled. - virtual bool hasFP(const MachineFunction &MF) const = 0; - - /// hasReservedCallFrame - Under normal circumstances, when a frame pointer is - /// not required, we reserve argument space for call sites in the function - /// immediately on entry to the current function. This eliminates the need for - /// add/sub sp brackets around call sites. Returns true if the call frame is - /// included as part of the stack frame. - virtual bool hasReservedCallFrame(const MachineFunction &MF) const { - return !hasFP(MF); - } - - /// canSimplifyCallFramePseudos - When possible, it's best to simplify the - /// call frame pseudo ops before doing frame index elimination. This is - /// possible only when frame index references between the pseudos won't - /// need adjusting for the call frame adjustments. Normally, that's true - /// if the function has a reserved call frame or a frame pointer. Some - /// targets (Thumb2, for example) may have more complicated criteria, - /// however, and can override this behavior. - virtual bool canSimplifyCallFramePseudos(const MachineFunction &MF) const { - return hasReservedCallFrame(MF) || hasFP(MF); - } - /// hasReservedSpillSlot - Return true if target has reserved a spill slot in /// the stack frame of the given function for the specified register. e.g. On /// x86, if the frame register is required, the first fixed stack object is Modified: llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp (original) +++ llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp Thu Nov 18 15:19:35 2010 @@ -142,6 +142,7 @@ /// pseudo instructions. void PEI::calculateCallsInformation(MachineFunction &Fn) { const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo(); + const TargetFrameInfo *TFI = Fn.getTarget().getFrameInfo(); MachineFrameInfo *MFI = Fn.getFrameInfo(); unsigned MaxCallFrameSize = 0; @@ -184,7 +185,7 @@ // the target doesn't indicate otherwise, remove the call frame pseudos // here. The sub/add sp instruction pairs are still inserted, but we don't // need to track the SP adjustment for frame index elimination. - if (RegInfo->canSimplifyCallFramePseudos(Fn)) + if (TFI->canSimplifyCallFramePseudos(Fn)) RegInfo->eliminateCallFramePseudoInstr(Fn, *I->getParent(), I); } } @@ -553,7 +554,7 @@ // Make sure the special register scavenging spill slot is closest to the // frame pointer if a frame pointer is required. const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo(); - if (RS && RegInfo->hasFP(Fn) && !RegInfo->needsStackRealignment(Fn)) { + if (RS && TFI.hasFP(Fn) && !RegInfo->needsStackRealignment(Fn)) { int SFI = RS->getScavengingFrameIndex(); if (SFI >= 0) AdjustStackOffset(MFI, SFI, StackGrowsDown, Offset, MaxAlign); @@ -635,7 +636,7 @@ // Make sure the special register scavenging spill slot is closest to the // stack pointer. - if (RS && (!RegInfo->hasFP(Fn) || RegInfo->needsStackRealignment(Fn))) { + if (RS && (!TFI.hasFP(Fn) || RegInfo->needsStackRealignment(Fn))) { int SFI = RS->getScavengingFrameIndex(); if (SFI >= 0) AdjustStackOffset(MFI, SFI, StackGrowsDown, Offset, MaxAlign); @@ -645,7 +646,7 @@ // If we have reserved argument space for call sites in the function // immediately on entry to the current function, count it as part of the // overall stack size. - if (MFI->adjustsStack() && RegInfo->hasReservedCallFrame(Fn)) + if (MFI->adjustsStack() && TFI.hasReservedCallFrame(Fn)) Offset += MFI->getMaxCallFrameSize(); // Round up the size to a multiple of the alignment. If the function has Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp Thu Nov 18 15:19:35 2010 @@ -85,12 +85,14 @@ BitVector ARMBaseRegisterInfo:: getReservedRegs(const MachineFunction &MF) const { + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); + // FIXME: avoid re-calculating this everytime. BitVector Reserved(getNumRegs()); Reserved.set(ARM::SP); Reserved.set(ARM::PC); Reserved.set(ARM::FPSCR); - if (hasFP(MF)) + if (TFI->hasFP(MF)) Reserved.set(FramePtr); if (hasBasePointer(MF)) Reserved.set(BasePtr); @@ -102,6 +104,8 @@ bool ARMBaseRegisterInfo::isReservedReg(const MachineFunction &MF, unsigned Reg) const { + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); + switch (Reg) { default: break; case ARM::SP: @@ -113,7 +117,7 @@ break; case ARM::R7: case ARM::R11: - if (FramePtr == Reg && hasFP(MF)) + if (FramePtr == Reg && TFI->hasFP(MF)) return true; break; case ARM::R9: @@ -349,6 +353,7 @@ ARMBaseRegisterInfo::getAllocationOrder(const TargetRegisterClass *RC, unsigned HintType, unsigned HintReg, const MachineFunction &MF) const { + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); // Alternative register allocation orders when favoring even / odd registers // of register pairs. @@ -430,7 +435,7 @@ return std::make_pair(RC->allocation_order_begin(MF), RC->allocation_order_end(MF)); - if (!hasFP(MF)) { + if (!TFI->hasFP(MF)) { if (!STI.isR9Reserved()) return std::make_pair(GPREven1, GPREven1 + (sizeof(GPREven1)/sizeof(unsigned))); @@ -459,7 +464,7 @@ return std::make_pair(RC->allocation_order_begin(MF), RC->allocation_order_end(MF)); - if (!hasFP(MF)) { + if (!TFI->hasFP(MF)) { if (!STI.isR9Reserved()) return std::make_pair(GPROdd1, GPROdd1 + (sizeof(GPROdd1)/sizeof(unsigned))); @@ -524,23 +529,6 @@ } } -/// hasFP - Return true if the specified function should have a dedicated frame -/// pointer register. This is true if the function has variable sized allocas -/// or if frame pointer elimination is disabled. -/// -bool ARMBaseRegisterInfo::hasFP(const MachineFunction &MF) const { - // Mac OS X requires FP not to be clobbered for backtracing purpose. - if (STI.isTargetDarwin()) - return true; - - const MachineFrameInfo *MFI = MF.getFrameInfo(); - // Always eliminate non-leaf frame pointers. - return ((DisableFramePointerElim(MF) && MFI->hasCalls()) || - needsStackRealignment(MF) || - MFI->hasVarSizedObjects() || - MFI->isFrameAddressTaken()); -} - bool ARMBaseRegisterInfo::hasBasePointer(const MachineFunction &MF) const { const MachineFrameInfo *MFI = MF.getFrameInfo(); const ARMFunctionInfo *AFI = MF.getInfo(); @@ -626,6 +614,7 @@ /// instructions will require a scratch register during their expansion later. unsigned ARMBaseRegisterInfo::estimateRSStackSizeLimit(MachineFunction &MF) const { + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); const ARMFunctionInfo *AFI = MF.getInfo(); unsigned Limit = (1 << 12) - 1; for (MachineFunction::iterator BB = MF.begin(),E = MF.end(); BB != E; ++BB) { @@ -654,7 +643,7 @@ case ARMII::AddrModeT2_i12: // i12 supports only positive offset so these will be converted to // i8 opcodes. See llvm::rewriteT2FrameIndex. - if (hasFP(MF) && AFI->hasStackFrame()) + if (TFI->hasFP(MF) && AFI->hasStackFrame()) Limit = std::min(Limit, (1U << 8) - 1); break; case ARMII::AddrMode4: @@ -699,6 +688,7 @@ unsigned NumGPRSpills = 0; SmallVector UnspilledCS1GPRs; SmallVector UnspilledCS2GPRs; + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); ARMFunctionInfo *AFI = MF.getInfo(); MachineFrameInfo *MFI = MF.getFrameInfo(); @@ -813,10 +803,10 @@ // worth the effort and added fragility? bool BigStack = (RS && - (estimateStackSize(MF) + ((hasFP(MF) && AFI->hasStackFrame()) ? 4:0) >= + (estimateStackSize(MF) + ((TFI->hasFP(MF) && AFI->hasStackFrame()) ? 4:0) >= estimateRSStackSizeLimit(MF))) || MFI->hasVarSizedObjects() - || (MFI->adjustsStack() && !canSimplifyCallFramePseudos(MF)); + || (MFI->adjustsStack() && !TFI->canSimplifyCallFramePseudos(MF)); bool ExtraCSSpill = false; if (BigStack || !CanEliminateFrame || cannotEliminateFrame(MF)) { @@ -834,7 +824,7 @@ ExtraCSSpill = true; } - if (hasFP(MF)) { + if (TFI->hasFP(MF)) { MF.getRegInfo().setPhysRegUsed(FramePtr); NumGPRSpills++; } @@ -927,7 +917,9 @@ unsigned ARMBaseRegisterInfo::getFrameRegister(const MachineFunction &MF) const { - if (hasFP(MF)) + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); + + if (TFI->hasFP(MF)) return FramePtr; return ARM::SP; } @@ -948,6 +940,7 @@ unsigned &FrameReg, int SPAdj) const { const MachineFrameInfo *MFI = MF.getFrameInfo(); + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); const ARMFunctionInfo *AFI = MF.getInfo(); int Offset = MFI->getObjectOffset(FI) + MFI->getStackSize(); int FPOffset = Offset - AFI->getFramePtrSpillOffset(); @@ -965,7 +958,7 @@ // When dynamically realigning the stack, use the frame pointer for // parameters, and the stack/base pointer for locals. if (needsStackRealignment(MF)) { - assert (hasFP(MF) && "dynamic stack realignment without a FP!"); + assert (TFI->hasFP(MF) && "dynamic stack realignment without a FP!"); if (isFixed) { FrameReg = getFrameRegister(MF); Offset = FPOffset; @@ -978,7 +971,7 @@ } // If there is a frame pointer, use it when we can. - if (hasFP(MF) && AFI->hasStackFrame()) { + if (TFI->hasFP(MF) && AFI->hasStackFrame()) { // Use frame pointer to reference fixed objects. Use it for locals if // there are VLAs (and thus the SP isn't reliable as a base). if (isFixed || (MFI->hasVarSizedObjects() && !hasBasePointer(MF))) { @@ -1252,34 +1245,6 @@ return EnableLocalStackAlloc; } -// hasReservedCallFrame - Under normal circumstances, when a frame pointer is -// not required, we reserve argument space for call sites in the function -// immediately on entry to the current function. This eliminates the need for -// add/sub sp brackets around call sites. Returns true if the call frame is -// included as part of the stack frame. -bool ARMBaseRegisterInfo:: -hasReservedCallFrame(const MachineFunction &MF) const { - const MachineFrameInfo *FFI = MF.getFrameInfo(); - unsigned CFSize = FFI->getMaxCallFrameSize(); - // It's not always a good idea to include the call frame as part of the - // stack frame. ARM (especially Thumb) has small immediate offset to - // address the stack frame. So a large call frame can cause poor codegen - // and may even makes it impossible to scavenge a register. - if (CFSize >= ((1 << 12) - 1) / 2) // Half of imm12 - return false; - - return !MF.getFrameInfo()->hasVarSizedObjects(); -} - -// canSimplifyCallFramePseudos - If there is a reserved call frame, the -// call frame pseudos can be simplified. Unlike most targets, having a FP -// is not sufficient here since we still may reference some objects via SP -// even when FP is available in Thumb2 mode. -bool ARMBaseRegisterInfo:: -canSimplifyCallFramePseudos(const MachineFunction &MF) const { - return hasReservedCallFrame(MF) || MF.getFrameInfo()->hasVarSizedObjects(); -} - static void emitSPUpdate(bool isARM, MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, @@ -1298,7 +1263,8 @@ void ARMBaseRegisterInfo:: eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const { - if (!hasReservedCallFrame(MF)) { + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); + if (!TFI->hasReservedCallFrame(MF)) { // If we have alloca, convert as follows: // ADJCALLSTACKDOWN -> sub, sp, sp, amount // ADJCALLSTACKUP -> add, sp, sp, amount @@ -1429,6 +1395,7 @@ // Note that the incoming offset is based on the SP value at function entry, // so it'll be negative. MachineFunction &MF = *MI->getParent()->getParent(); + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); MachineFrameInfo *MFI = MF.getFrameInfo(); ARMFunctionInfo *AFI = MF.getInfo(); @@ -1456,7 +1423,7 @@ // don't know for sure yet whether we'll need that, so we guess based // on whether there are any local variables that would trigger it. unsigned StackAlign = MF.getTarget().getFrameInfo()->getStackAlignment(); - if (hasFP(MF) && + if (TFI->hasFP(MF) && !((MFI->getLocalFrameMaxAlign() > StackAlign) && canRealignStack(MF))) { if (isFrameOffsetLegal(MI, FPOffset)) return false; Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.h?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.h (original) +++ llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.h Thu Nov 18 15:19:35 2010 @@ -139,7 +139,6 @@ void UpdateRegAllocHint(unsigned Reg, unsigned NewReg, MachineFunction &MF) const; - bool hasFP(const MachineFunction &MF) const; bool hasBasePointer(const MachineFunction &MF) const; bool canRealignStack(const MachineFunction &MF) const; @@ -196,9 +195,6 @@ virtual bool requiresVirtualBaseRegisters(const MachineFunction &MF) const; - virtual bool hasReservedCallFrame(const MachineFunction &MF) const; - virtual bool canSimplifyCallFramePseudos(const MachineFunction &MF) const; - virtual void eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const; Modified: llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp Thu Nov 18 15:19:35 2010 @@ -24,6 +24,7 @@ #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineInstrBuilder.h" +#include "llvm/Target/TargetFrameInfo.h" #include "llvm/Target/TargetRegisterInfo.h" #include "llvm/Support/raw_ostream.h" // FIXME: for debug only. remove! using namespace llvm; @@ -600,6 +601,7 @@ case ARM::Int_eh_sjlj_dispatchsetup: { MachineFunction &MF = *MI.getParent()->getParent(); + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); const ARMBaseInstrInfo *AII = static_cast(TII); const ARMBaseRegisterInfo &RI = AII->getRegisterInfo(); @@ -610,7 +612,7 @@ ARMFunctionInfo *AFI = MF.getInfo(); int32_t NumBytes = AFI->getFramePtrSpillOffset(); unsigned FramePtr = RI.getFrameRegister(MF); - assert (RI.hasFP(MF) && "base pointer without frame pointer?"); + assert (TFI->hasFP(MF) && "base pointer without frame pointer?"); if (AFI->isThumb2Function()) { llvm::emitT2RegPlusImmediate(MBB, MBBI, MI.getDebugLoc(), ARM::R6, Modified: llvm/trunk/lib/Target/ARM/ARMFrameInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFrameInfo.cpp?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMFrameInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMFrameInfo.cpp Thu Nov 18 15:19:35 2010 @@ -17,9 +17,55 @@ #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineInstrBuilder.h" +#include "llvm/Target/TargetOptions.h" using namespace llvm; +/// hasFP - Return true if the specified function should have a dedicated frame +/// pointer register. This is true if the function has variable sized allocas +/// or if frame pointer elimination is disabled. +/// +bool ARMFrameInfo::hasFP(const MachineFunction &MF) const { + const TargetRegisterInfo *RegInfo = MF.getTarget().getRegisterInfo(); + + // Mac OS X requires FP not to be clobbered for backtracing purpose. + if (STI.isTargetDarwin()) + return true; + + const MachineFrameInfo *MFI = MF.getFrameInfo(); + // Always eliminate non-leaf frame pointers. + return ((DisableFramePointerElim(MF) && MFI->hasCalls()) || + RegInfo->needsStackRealignment(MF) || + MFI->hasVarSizedObjects() || + MFI->isFrameAddressTaken()); +} + +// hasReservedCallFrame - Under normal circumstances, when a frame pointer is +// not required, we reserve argument space for call sites in the function +// immediately on entry to the current function. This eliminates the need for +// add/sub sp brackets around call sites. Returns true if the call frame is +// included as part of the stack frame. +bool ARMFrameInfo::hasReservedCallFrame(const MachineFunction &MF) const { + const MachineFrameInfo *FFI = MF.getFrameInfo(); + unsigned CFSize = FFI->getMaxCallFrameSize(); + // It's not always a good idea to include the call frame as part of the + // stack frame. ARM (especially Thumb) has small immediate offset to + // address the stack frame. So a large call frame can cause poor codegen + // and may even makes it impossible to scavenge a register. + if (CFSize >= ((1 << 12) - 1) / 2) // Half of imm12 + return false; + + return !MF.getFrameInfo()->hasVarSizedObjects(); +} + +// canSimplifyCallFramePseudos - If there is a reserved call frame, the +// call frame pseudos can be simplified. Unlike most targets, having a FP +// is not sufficient here since we still may reference some objects via SP +// even when FP is available in Thumb2 mode. +bool ARMFrameInfo::canSimplifyCallFramePseudos(const MachineFunction &MF)const { + return hasReservedCallFrame(MF) || MF.getFrameInfo()->hasVarSizedObjects(); +} + static bool isCalleeSavedRegister(unsigned Reg, const unsigned *CSRegs) { for (unsigned i = 0; CSRegs[i]; ++i) if (Reg == CSRegs[i]) @@ -136,7 +182,7 @@ // Otherwise, if this is not Darwin, all the callee-saved registers go // into spill area 1, including the FP in R11. In either case, it is // now safe to emit this assignment. - bool HasFP = RegInfo->hasFP(MF); + bool HasFP = hasFP(MF); if (HasFP) { unsigned ADDriOpc = !AFI->isThumbFunction() ? ARM::ADDri : ARM::t2ADDri; MachineInstrBuilder MIB = @@ -170,7 +216,7 @@ AFI->setShouldRestoreSPFromFP(true); } - if (STI.isTargetELF() && RegInfo->hasFP(MF)) { + if (STI.isTargetELF() && hasFP(MF)) { MFI->setOffsetAdjustment(MFI->getOffsetAdjustment() - AFI->getFramePtrSpillOffset()); AFI->setShouldRestoreSPFromFP(true); Modified: llvm/trunk/lib/Target/ARM/ARMFrameInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFrameInfo.h?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMFrameInfo.h (original) +++ llvm/trunk/lib/Target/ARM/ARMFrameInfo.h Thu Nov 18 15:19:35 2010 @@ -34,6 +34,10 @@ /// the function. void emitPrologue(MachineFunction &MF) const; void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const; + + bool hasFP(const MachineFunction &MF) const; + bool hasReservedCallFrame(const MachineFunction &MF) const; + bool canSimplifyCallFramePseudos(const MachineFunction &MF) const; }; } // End llvm namespace Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Thu Nov 18 15:19:35 2010 @@ -891,13 +891,15 @@ unsigned ARMTargetLowering::getRegPressureLimit(const TargetRegisterClass *RC, MachineFunction &MF) const { + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); + switch (RC->getID()) { default: return 0; case ARM::tGPRRegClassID: - return RegInfo->hasFP(MF) ? 4 : 5; + return TFI->hasFP(MF) ? 4 : 5; case ARM::GPRRegClassID: { - unsigned FP = RegInfo->hasFP(MF) ? 1 : 0; + unsigned FP = TFI->hasFP(MF) ? 1 : 0; return 10 - FP - (Subtarget->isR9Reserved() ? 1 : 0); } case ARM::SPRRegClassID: // Currently not used as 'rep' register class. Modified: llvm/trunk/lib/Target/ARM/Thumb1FrameInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Thumb1FrameInfo.cpp?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/Thumb1FrameInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/Thumb1FrameInfo.cpp Thu Nov 18 15:19:35 2010 @@ -20,6 +20,19 @@ using namespace llvm; +bool Thumb1FrameInfo::hasReservedCallFrame(const MachineFunction &MF) const { + const MachineFrameInfo *FFI = MF.getFrameInfo(); + unsigned CFSize = FFI->getMaxCallFrameSize(); + // It's not always a good idea to include the call frame as part of the + // stack frame. ARM (especially Thumb) has small immediate offset to + // address the stack frame. So a large call frame can cause poor codegen + // and may even makes it impossible to scavenge a register. + if (CFSize >= ((1 << 8) - 1) * 4 / 2) // Half of imm8 * 4 + return false; + + return !MF.getFrameInfo()->hasVarSizedObjects(); +} + static void emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, const TargetInstrInfo &TII, DebugLoc dl, @@ -105,7 +118,7 @@ } // Adjust FP so it point to the stack slot that contains the previous FP. - if (RegInfo->hasFP(MF)) { + if (hasFP(MF)) { BuildMI(MBB, MBBI, dl, TII.get(ARM::tADDrSPi), FramePtr) .addFrameIndex(FramePtrSpillFI).addImm(0); AFI->setShouldRestoreSPFromFP(true); @@ -126,7 +139,7 @@ emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -NumBytes); } - if (STI.isTargetELF() && RegInfo->hasFP(MF)) + if (STI.isTargetELF() && hasFP(MF)) MFI->setOffsetAdjustment(MFI->getOffsetAdjustment() - AFI->getFramePtrSpillOffset()); Modified: llvm/trunk/lib/Target/ARM/Thumb1FrameInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Thumb1FrameInfo.h?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/Thumb1FrameInfo.h (original) +++ llvm/trunk/lib/Target/ARM/Thumb1FrameInfo.h Thu Nov 18 15:19:35 2010 @@ -34,6 +34,8 @@ /// the function. void emitPrologue(MachineFunction &MF) const; void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const; + + bool hasReservedCallFrame(const MachineFunction &MF) const; }; } // End llvm namespace Modified: llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.cpp?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.cpp Thu Nov 18 15:19:35 2010 @@ -68,19 +68,6 @@ .addConstantPoolIndex(Idx).addImm(Pred).addReg(PredReg); } -bool Thumb1RegisterInfo::hasReservedCallFrame(const MachineFunction &MF) const { - const MachineFrameInfo *FFI = MF.getFrameInfo(); - unsigned CFSize = FFI->getMaxCallFrameSize(); - // It's not always a good idea to include the call frame as part of the - // stack frame. ARM (especially Thumb) has small immediate offset to - // address the stack frame. So a large call frame can cause poor codegen - // and may even makes it impossible to scavenge a register. - if (CFSize >= ((1 << 8) - 1) * 4 / 2) // Half of imm8 * 4 - return false; - - return !MF.getFrameInfo()->hasVarSizedObjects(); -} - /// emitThumbRegPlusImmInReg - Emits a series of instructions to materialize /// a destreg = basereg + immediate in Thumb code. Materialize the immediate @@ -303,7 +290,9 @@ void Thumb1RegisterInfo:: eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const { - if (!hasReservedCallFrame(MF)) { + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); + + if (!TFI->hasReservedCallFrame(MF)) { // If we have alloca, convert as follows: // ADJCALLSTACKDOWN -> sub, sp, sp, amount // ADJCALLSTACKUP -> add, sp, sp, amount @@ -583,6 +572,7 @@ MachineInstr &MI = *II; MachineBasicBlock &MBB = *MI.getParent(); MachineFunction &MF = *MBB.getParent(); + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); ARMFunctionInfo *AFI = MF.getInfo(); DebugLoc dl = MI.getDebugLoc(); @@ -601,7 +591,7 @@ else if (AFI->isGPRCalleeSavedArea2Frame(FrameIndex)) Offset -= AFI->getGPRCalleeSavedArea2Offset(); else if (MF.getFrameInfo()->hasVarSizedObjects()) { - assert(SPAdj == 0 && hasFP(MF) && "Unexpected"); + assert(SPAdj == 0 && TFI->hasFP(MF) && "Unexpected"); // There are alloca()'s in this function, must reference off the frame // pointer or base pointer instead. if (!hasBasePointer(MF)) { Modified: llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.h?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.h (original) +++ llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.h Thu Nov 18 15:19:35 2010 @@ -38,8 +38,6 @@ unsigned PredReg = 0) const; /// Code Generation virtual methods... - bool hasReservedCallFrame(const MachineFunction &MF) const; - void eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const; Modified: llvm/trunk/lib/Target/Alpha/AlphaFrameInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaFrameInfo.cpp?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/Alpha/AlphaFrameInfo.cpp (original) +++ llvm/trunk/lib/Target/Alpha/AlphaFrameInfo.cpp Thu Nov 18 15:19:35 2010 @@ -34,17 +34,23 @@ return l - h * Alpha::IMM_MULT; } +// hasFP - Return true if the specified function should have a dedicated frame +// pointer register. This is true if the function has variable sized allocas or +// if frame pointer elimination is disabled. +// +bool AlphaFrameInfo::hasFP(const MachineFunction &MF) const { + const MachineFrameInfo *MFI = MF.getFrameInfo(); + return MFI->hasVarSizedObjects(); +} + void AlphaFrameInfo::emitPrologue(MachineFunction &MF) const { MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB MachineBasicBlock::iterator MBBI = MBB.begin(); MachineFrameInfo *MFI = MF.getFrameInfo(); - const AlphaRegisterInfo *RegInfo = - static_cast(MF.getTarget().getRegisterInfo()); - const AlphaInstrInfo &TII = - *static_cast(MF.getTarget().getInstrInfo()); + const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo(); DebugLoc dl = (MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc()); - bool FP = RegInfo->hasFP(MF); + bool FP = hasFP(MF); // Handle GOP offset BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDAHg), Alpha::R29) @@ -99,17 +105,14 @@ MachineBasicBlock &MBB) const { const MachineFrameInfo *MFI = MF.getFrameInfo(); MachineBasicBlock::iterator MBBI = prior(MBB.end()); - const AlphaRegisterInfo *RegInfo = - static_cast(MF.getTarget().getRegisterInfo()); - const AlphaInstrInfo &TII = - *static_cast(MF.getTarget().getInstrInfo()); + const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo(); assert((MBBI->getOpcode() == Alpha::RETDAG || MBBI->getOpcode() == Alpha::RETDAGp) && "Can only insert epilog into returning blocks"); DebugLoc dl = MBBI->getDebugLoc(); - bool FP = RegInfo->hasFP(MF); + bool FP = hasFP(MF); // Get the number of bytes allocated from the FrameInfo... long NumBytes = MFI->getStackSize(); Modified: llvm/trunk/lib/Target/Alpha/AlphaFrameInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaFrameInfo.h?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/Alpha/AlphaFrameInfo.h (original) +++ llvm/trunk/lib/Target/Alpha/AlphaFrameInfo.h Thu Nov 18 15:19:35 2010 @@ -34,6 +34,8 @@ /// the function. void emitPrologue(MachineFunction &MF) const; void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const; + + bool hasFP(const MachineFunction &MF) const; }; } // End llvm namespace Modified: llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp Thu Nov 18 15:19:35 2010 @@ -78,19 +78,12 @@ // Stack Frame Processing methods //===----------------------------------------------------------------------===// -// hasFP - Return true if the specified function should have a dedicated frame -// pointer register. This is true if the function has variable sized allocas or -// if frame pointer elimination is disabled. -// -bool AlphaRegisterInfo::hasFP(const MachineFunction &MF) const { - const MachineFrameInfo *MFI = MF.getFrameInfo(); - return MFI->hasVarSizedObjects(); -} - void AlphaRegisterInfo:: eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const { - if (hasFP(MF)) { + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); + + if (TFI->hasFP(MF)) { // If we have a frame pointer, turn the adjcallstackup instruction into a // 'sub ESP, ' and the adjcallstackdown instruction into 'add ESP, // ' @@ -138,7 +131,9 @@ MachineInstr &MI = *II; MachineBasicBlock &MBB = *MI.getParent(); MachineFunction &MF = *MBB.getParent(); - bool FP = hasFP(MF); + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); + + bool FP = TFI->hasFP(MF); while (!MI.getOperand(i).isFI()) { ++i; @@ -183,7 +178,9 @@ } unsigned AlphaRegisterInfo::getFrameRegister(const MachineFunction &MF) const { - return hasFP(MF) ? Alpha::R15 : Alpha::R30; + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); + + return TFI->hasFP(MF) ? Alpha::R15 : Alpha::R30; } unsigned AlphaRegisterInfo::getEHExceptionRegister() const { Modified: llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.h?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.h (original) +++ llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.h Thu Nov 18 15:19:35 2010 @@ -32,8 +32,6 @@ BitVector getReservedRegs(const MachineFunction &MF) const; - bool hasFP(const MachineFunction &MF) const; - void eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const; Modified: llvm/trunk/lib/Target/Blackfin/BlackfinFrameInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Blackfin/BlackfinFrameInfo.cpp?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/Blackfin/BlackfinFrameInfo.cpp (original) +++ llvm/trunk/lib/Target/Blackfin/BlackfinFrameInfo.cpp Thu Nov 18 15:19:35 2010 @@ -16,10 +16,20 @@ #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineInstrBuilder.h" +#include "llvm/Target/TargetOptions.h" using namespace llvm; +// hasFP - Return true if the specified function should have a dedicated frame +// pointer register. This is true if the function has variable sized allocas or +// if frame pointer elimination is disabled. +bool BlackfinFrameInfo::hasFP(const MachineFunction &MF) const { + const MachineFrameInfo *MFI = MF.getFrameInfo(); + return DisableFramePointerElim(MF) || + MFI->adjustsStack() || MFI->hasVarSizedObjects(); +} + // Emit a prologue that sets up a stack frame. // On function entry, R0-R2 and P0 may hold arguments. // R3, P1, and P2 may be used as scratch registers @@ -40,7 +50,7 @@ MFI->setStackSize(FrameSize); } - if (!RegInfo->hasFP(MF)) { + if (!hasFP(MF)) { assert(!MFI->adjustsStack() && "FP elimination on a non-leaf function is not supported"); RegInfo->adjustRegister(MBB, MBBI, dl, BF::SP, BF::P1, -FrameSize); @@ -85,7 +95,7 @@ int FrameSize = MFI->getStackSize(); assert(FrameSize%4 == 0 && "Misaligned frame size"); - if (!RegInfo->hasFP(MF)) { + if (!hasFP(MF)) { assert(!MFI->adjustsStack() && "FP elimination on a non-leaf function is not supported"); RegInfo->adjustRegister(MBB, MBBI, dl, BF::SP, BF::P1, FrameSize); Modified: llvm/trunk/lib/Target/Blackfin/BlackfinFrameInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Blackfin/BlackfinFrameInfo.h?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/Blackfin/BlackfinFrameInfo.h (original) +++ llvm/trunk/lib/Target/Blackfin/BlackfinFrameInfo.h Thu Nov 18 15:19:35 2010 @@ -34,6 +34,8 @@ /// the function. void emitPrologue(MachineFunction &MF) const; void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const; + + bool hasFP(const MachineFunction &MF) const; }; } // End llvm namespace Modified: llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.cpp?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.cpp Thu Nov 18 15:19:35 2010 @@ -50,6 +50,8 @@ BitVector BlackfinRegisterInfo::getReservedRegs(const MachineFunction &MF) const { + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); + using namespace BF; BitVector Reserved(getNumRegs()); Reserved.set(AZ); @@ -70,20 +72,11 @@ Reserved.set(L3); Reserved.set(SP); Reserved.set(RETS); - if (hasFP(MF)) + if (TFI->hasFP(MF)) Reserved.set(FP); return Reserved; } -// hasFP - Return true if the specified function should have a dedicated frame -// pointer register. This is true if the function has variable sized allocas or -// if frame pointer elimination is disabled. -bool BlackfinRegisterInfo::hasFP(const MachineFunction &MF) const { - const MachineFrameInfo *MFI = MF.getFrameInfo(); - return DisableFramePointerElim(MF) || - MFI->adjustsStack() || MFI->hasVarSizedObjects(); -} - bool BlackfinRegisterInfo:: requiresRegisterScavenging(const MachineFunction &MF) const { return true; @@ -161,7 +154,9 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const { - if (!hasReservedCallFrame(MF)) { + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); + + if (!TFI->hasReservedCallFrame(MF)) { int64_t Amount = I->getOperand(0).getImm(); if (Amount != 0) { assert(Amount%4 == 0 && "Unaligned call frame size"); @@ -196,6 +191,7 @@ MachineInstr &MI = *II; MachineBasicBlock &MBB = *MI.getParent(); MachineFunction &MF = *MBB.getParent(); + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); DebugLoc DL = MI.getDebugLoc(); unsigned FIPos; @@ -208,7 +204,7 @@ int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex) + MI.getOperand(FIPos+1).getImm(); unsigned BaseReg = BF::FP; - if (hasFP(MF)) { + if (TFI->hasFP(MF)) { assert(SPAdj==0 && "Unexpected SP adjust in function with frame pointer"); } else { BaseReg = BF::SP; @@ -348,7 +344,9 @@ unsigned BlackfinRegisterInfo::getFrameRegister(const MachineFunction &MF) const { - return hasFP(MF) ? BF::FP : BF::SP; + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); + + return TFI->hasFP(MF) ? BF::FP : BF::SP; } unsigned BlackfinRegisterInfo::getEHExceptionRegister() const { Modified: llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.h?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.h (original) +++ llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.h Thu Nov 18 15:19:35 2010 @@ -41,8 +41,6 @@ return &BF::PRegClass; } - bool hasFP(const MachineFunction &MF) const; - // bool hasReservedCallFrame(MachineFunction &MF) const; bool requiresRegisterScavenging(const MachineFunction &MF) const; Modified: llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.td?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.td (original) +++ llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.td Thu Nov 18 15:19:35 2010 @@ -252,9 +252,9 @@ PClass::iterator PClass::allocation_order_end(const MachineFunction &MF) const { const TargetMachine &TM = MF.getTarget(); - const TargetRegisterInfo *RI = TM.getRegisterInfo(); + const TargetFrameInfo *TFI = TM.getFrameInfo(); return allocation_order_begin(MF) - + (RI->hasFP(MF) ? 7 : 6); + + (TFI->hasFP(MF) ? 7 : 6); } }]; } @@ -275,9 +275,9 @@ DPClass::iterator DPClass::allocation_order_end(const MachineFunction &MF) const { const TargetMachine &TM = MF.getTarget(); - const TargetRegisterInfo *RI = TM.getRegisterInfo(); + const TargetFrameInfo *TFI = TM.getFrameInfo(); return allocation_order_begin(MF) - + (RI->hasFP(MF) ? 15 : 14); + + (TFI->hasFP(MF) ? 15 : 14); } }]; } @@ -295,9 +295,9 @@ GRClass::iterator GRClass::allocation_order_end(const MachineFunction &MF) const { const TargetMachine &TM = MF.getTarget(); - const TargetRegisterInfo *RI = TM.getRegisterInfo(); + const TargetFrameInfo *TFI = TM.getFrameInfo(); return allocation_order_begin(MF) - + (RI->hasFP(MF) ? 31 : 30); + + (TFI->hasFP(MF) ? 31 : 30); } }]; } @@ -318,9 +318,9 @@ ALLClass::iterator ALLClass::allocation_order_end(const MachineFunction &MF) const { const TargetMachine &TM = MF.getTarget(); - const TargetRegisterInfo *RI = TM.getRegisterInfo(); + const TargetFrameInfo *TFI = TM.getFrameInfo(); return allocation_order_begin(MF) - + (RI->hasFP(MF) ? 31 : 30); + + (TFI->hasFP(MF) ? 31 : 30); } }]; } @@ -334,9 +334,9 @@ PIClass::iterator PIClass::allocation_order_end(const MachineFunction &MF) const { const TargetMachine &TM = MF.getTarget(); - const TargetRegisterInfo *RI = TM.getRegisterInfo(); + const TargetFrameInfo *TFI = TM.getFrameInfo(); return allocation_order_begin(MF) - + (RI->hasFP(MF) ? 11 : 10); + + (TFI->hasFP(MF) ? 11 : 10); } }]; } Modified: llvm/trunk/lib/Target/CellSPU/SPUFrameInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUFrameInfo.cpp?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUFrameInfo.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUFrameInfo.cpp Thu Nov 18 15:19:35 2010 @@ -39,6 +39,18 @@ } +//-------------------------------------------------------------------------- +// hasFP - Return true if the specified function actually has a dedicated frame +// pointer register. This is true if the function needs a frame pointer and has +// a non-zero stack size. +bool SPUFrameInfo::hasFP(const MachineFunction &MF) const { + const MachineFrameInfo *MFI = MF.getFrameInfo(); + + return MFI->getStackSize() && + (DisableFramePointerElim(MF) || MFI->hasVarSizedObjects()); +} + + /// determineFrameLayout - Determine the size of the frame and maximum call /// frame size. void SPUFrameInfo::determineFrameLayout(MachineFunction &MF) const { Modified: llvm/trunk/lib/Target/CellSPU/SPUFrameInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUFrameInfo.h?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUFrameInfo.h (original) +++ llvm/trunk/lib/Target/CellSPU/SPUFrameInfo.h Thu Nov 18 15:19:35 2010 @@ -37,6 +37,9 @@ void emitPrologue(MachineFunction &MF) const; void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const; + //! Prediate: Target has dedicated frame pointer + bool hasFP(const MachineFunction &MF) const; + //! Return a function's saved spill slots /*! For CellSPU, a function's saved spill slots is just the link register. Modified: llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp Thu Nov 18 15:19:35 2010 @@ -240,25 +240,6 @@ // Stack Frame Processing methods //===----------------------------------------------------------------------===// -// needsFP - Return true if the specified function should have a dedicated frame -// pointer register. This is true if the function has variable sized allocas or -// if frame pointer elimination is disabled. -// -static bool needsFP(const MachineFunction &MF) { - const MachineFrameInfo *MFI = MF.getFrameInfo(); - return DisableFramePointerElim(MF) || MFI->hasVarSizedObjects(); -} - -//-------------------------------------------------------------------------- -// hasFP - Return true if the specified function actually has a dedicated frame -// pointer register. This is true if the function needs a frame pointer and has -// a non-zero stack size. -bool -SPURegisterInfo::hasFP(const MachineFunction &MF) const { - const MachineFrameInfo *MFI = MF.getFrameInfo(); - return MFI->getStackSize() && needsFP(MF); -} - //-------------------------------------------------------------------------- void SPURegisterInfo::eliminateCallFramePseudoInstr(MachineFunction &MF, Modified: llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.h?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.h (original) +++ llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.h Thu Nov 18 15:19:35 2010 @@ -56,8 +56,6 @@ //! Return the reserved registers BitVector getReservedRegs(const MachineFunction &MF) const; - //! Prediate: Target has dedicated frame pointer - bool hasFP(const MachineFunction &MF) const; //! Eliminate the call frame setup pseudo-instructions void eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, Modified: llvm/trunk/lib/Target/MBlaze/MBlazeFrameInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeFrameInfo.cpp?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/MBlaze/MBlazeFrameInfo.cpp (original) +++ llvm/trunk/lib/Target/MBlaze/MBlazeFrameInfo.cpp Thu Nov 18 15:19:35 2010 @@ -40,11 +40,17 @@ // //===----------------------------------------------------------------------===// +// hasFP - Return true if the specified function should have a dedicated frame +// pointer register. This is true if the function has variable sized allocas or +// if frame pointer elimination is disabled. +bool MBlazeFrameInfo::hasFP(const MachineFunction &MF) const { + const MachineFrameInfo *MFI = MF.getFrameInfo(); + return DisableFramePointerElim(MF) || MFI->hasVarSizedObjects(); +} + void MBlazeFrameInfo::adjustMBlazeStackFrame(MachineFunction &MF) const { MachineFrameInfo *MFI = MF.getFrameInfo(); MBlazeFunctionInfo *MBlazeFI = MF.getInfo(); - const MBlazeRegisterInfo *RegInfo = - static_cast(MF.getTarget().getRegisterInfo()); // See the description at MicroBlazeMachineFunction.h int TopCPUSavedRegOff = -1; @@ -61,7 +67,7 @@ MBlazeFI->adjustLoadArgsFI(MFI); MBlazeFI->adjustStoreVarArgsFI(MFI); - if (RegInfo->hasFP(MF)) { + if (hasFP(MF)) { MFI->setObjectOffset(MFI->CreateStackObject(RegSize, RegSize, true), StackOffset); MBlazeFI->setFPStackOffset(StackOffset); @@ -90,8 +96,6 @@ void MBlazeFrameInfo::emitPrologue(MachineFunction &MF) const { MachineBasicBlock &MBB = MF.front(); MachineFrameInfo *MFI = MF.getFrameInfo(); - const MBlazeRegisterInfo *RegInfo = - static_cast(MF.getTarget().getRegisterInfo()); const MBlazeInstrInfo &TII = *static_cast(MF.getTarget().getInstrInfo()); MBlazeFunctionInfo *MBlazeFI = MF.getInfo(); @@ -124,7 +128,7 @@ // if framepointer enabled, save it and set it // to point to the stack pointer - if (RegInfo->hasFP(MF)) { + if (hasFP(MF)) { // swi R19, R1, stack_loc BuildMI(MBB, MBBI, DL, TII.get(MBlaze::SWI)) .addReg(MBlaze::R19).addReg(MBlaze::R1).addImm(FPOffset); @@ -139,9 +143,7 @@ MachineBasicBlock &MBB) const { MachineBasicBlock::iterator MBBI = prior(MBB.end()); MachineFrameInfo *MFI = MF.getFrameInfo(); - MBlazeFunctionInfo *MBlazeFI = MF.getInfo(); - const MBlazeRegisterInfo *RegInfo = - static_cast(MF.getTarget().getRegisterInfo()); + MBlazeFunctionInfo *MBlazeFI = MF.getInfo(); const MBlazeInstrInfo &TII = *static_cast(MF.getTarget().getInstrInfo()); @@ -153,7 +155,7 @@ // if framepointer enabled, restore it and restore the // stack pointer - if (RegInfo->hasFP(MF)) { + if (hasFP(MF)) { // add R1, R19, R0 BuildMI(MBB, MBBI, dl, TII.get(MBlaze::ADD), MBlaze::R1) .addReg(MBlaze::R19).addReg(MBlaze::R0); Modified: llvm/trunk/lib/Target/MBlaze/MBlazeFrameInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeFrameInfo.h?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/MBlaze/MBlazeFrameInfo.h (original) +++ llvm/trunk/lib/Target/MBlaze/MBlazeFrameInfo.h Thu Nov 18 15:19:35 2010 @@ -41,6 +41,8 @@ /// the function. void emitPrologue(MachineFunction &MF) const; void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const; + + bool hasFP(const MachineFunction &MF) const; }; } // End llvm namespace Modified: llvm/trunk/lib/Target/MBlaze/MBlazeRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeRegisterInfo.cpp?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/MBlaze/MBlazeRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/MBlaze/MBlazeRegisterInfo.cpp Thu Nov 18 15:19:35 2010 @@ -164,14 +164,6 @@ return Reserved; } -// hasFP - Return true if the specified function should have a dedicated frame -// pointer register. This is true if the function has variable sized allocas or -// if frame pointer elimination is disabled. -bool MBlazeRegisterInfo::hasFP(const MachineFunction &MF) const { - const MachineFrameInfo *MFI = MF.getFrameInfo(); - return DisableFramePointerElim(MF) || MFI->hasVarSizedObjects(); -} - // This function eliminate ADJCALLSTACKDOWN, // ADJCALLSTACKUP pseudo instructions void MBlazeRegisterInfo:: @@ -235,7 +227,9 @@ } unsigned MBlazeRegisterInfo::getFrameRegister(const MachineFunction &MF) const { - return hasFP(MF) ? MBlaze::R19 : MBlaze::R1; + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); + + return TFI->hasFP(MF) ? MBlaze::R19 : MBlaze::R1; } unsigned MBlazeRegisterInfo::getEHExceptionRegister() const { Modified: llvm/trunk/lib/Target/MBlaze/MBlazeRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeRegisterInfo.h?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/MBlaze/MBlazeRegisterInfo.h (original) +++ llvm/trunk/lib/Target/MBlaze/MBlazeRegisterInfo.h Thu Nov 18 15:19:35 2010 @@ -56,8 +56,6 @@ BitVector getReservedRegs(const MachineFunction &MF) const; - bool hasFP(const MachineFunction &MF) const; - void eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const; Modified: llvm/trunk/lib/Target/MSP430/MSP430FrameInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430FrameInfo.cpp?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/MSP430/MSP430FrameInfo.cpp (original) +++ llvm/trunk/lib/Target/MSP430/MSP430FrameInfo.cpp Thu Nov 18 15:19:35 2010 @@ -26,12 +26,22 @@ using namespace llvm; +bool MSP430FrameInfo::hasFP(const MachineFunction &MF) const { + const MachineFrameInfo *MFI = MF.getFrameInfo(); + + return (DisableFramePointerElim(MF) || + MF.getFrameInfo()->hasVarSizedObjects() || + MFI->isFrameAddressTaken()); +} + +bool MSP430FrameInfo::hasReservedCallFrame(const MachineFunction &MF) const { + return !MF.getFrameInfo()->hasVarSizedObjects(); +} + void MSP430FrameInfo::emitPrologue(MachineFunction &MF) const { MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB MachineFrameInfo *MFI = MF.getFrameInfo(); MSP430MachineFunctionInfo *MSP430FI = MF.getInfo(); - const MSP430RegisterInfo *RegInfo = - static_cast(MF.getTarget().getRegisterInfo()); const MSP430InstrInfo &TII = *static_cast(MF.getTarget().getInstrInfo()); @@ -42,7 +52,7 @@ uint64_t StackSize = MFI->getStackSize(); uint64_t NumBytes = 0; - if (RegInfo->hasFP(MF)) { + if (hasFP(MF)) { // Calculate required stack adjustment uint64_t FrameSize = StackSize - 2; NumBytes = FrameSize - MSP430FI->getCalleeSavedFrameSize(); @@ -97,8 +107,6 @@ MachineBasicBlock &MBB) const { const MachineFrameInfo *MFI = MF.getFrameInfo(); MSP430MachineFunctionInfo *MSP430FI = MF.getInfo(); - const MSP430RegisterInfo *RegInfo = - static_cast(MF.getTarget().getRegisterInfo()); const MSP430InstrInfo &TII = *static_cast(MF.getTarget().getInstrInfo()); @@ -118,7 +126,7 @@ unsigned CSSize = MSP430FI->getCalleeSavedFrameSize(); uint64_t NumBytes = 0; - if (RegInfo->hasFP(MF)) { + if (hasFP(MF)) { // Calculate required stack adjustment uint64_t FrameSize = StackSize - 2; NumBytes = FrameSize - CSSize; Modified: llvm/trunk/lib/Target/MSP430/MSP430FrameInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430FrameInfo.h?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/MSP430/MSP430FrameInfo.h (original) +++ llvm/trunk/lib/Target/MSP430/MSP430FrameInfo.h Thu Nov 18 15:19:35 2010 @@ -34,6 +34,9 @@ /// the function. void emitPrologue(MachineFunction &MF) const; void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const; + + bool hasFP(const MachineFunction &MF) const; + bool hasReservedCallFrame(const MachineFunction &MF) const; }; } // End llvm namespace Modified: llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.cpp?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.cpp Thu Nov 18 15:19:35 2010 @@ -38,6 +38,7 @@ const unsigned* MSP430RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const { + const TargetFrameInfo *TFI = MF->getTarget().getFrameInfo(); const Function* F = MF->getFunction(); static const unsigned CalleeSavedRegs[] = { MSP430::FPW, MSP430::R5W, MSP430::R6W, MSP430::R7W, @@ -62,7 +63,7 @@ 0 }; - if (hasFP(*MF)) + if (TFI->hasFP(*MF)) return (F->getCallingConv() == CallingConv::MSP430_INTR ? CalleeSavedRegsIntrFP : CalleeSavedRegsFP); else @@ -73,6 +74,7 @@ BitVector MSP430RegisterInfo::getReservedRegs(const MachineFunction &MF) const { BitVector Reserved(getNumRegs()); + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); // Mark 4 special registers as reserved. Reserved.set(MSP430::PCW); @@ -81,7 +83,7 @@ Reserved.set(MSP430::CGW); // Mark frame pointer as reserved if needed. - if (hasFP(MF)) + if (TFI->hasFP(MF)) Reserved.set(MSP430::FPW); return Reserved; @@ -92,23 +94,12 @@ return &MSP430::GR16RegClass; } - -bool MSP430RegisterInfo::hasFP(const MachineFunction &MF) const { - const MachineFrameInfo *MFI = MF.getFrameInfo(); - - return (DisableFramePointerElim(MF) || - MF.getFrameInfo()->hasVarSizedObjects() || - MFI->isFrameAddressTaken()); -} - -bool MSP430RegisterInfo::hasReservedCallFrame(const MachineFunction &MF) const { - return !MF.getFrameInfo()->hasVarSizedObjects(); -} - void MSP430RegisterInfo:: eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const { - if (!hasReservedCallFrame(MF)) { + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); + + if (!TFI->hasReservedCallFrame(MF)) { // If the stack pointer can be changed after prologue, turn the // adjcallstackup instruction into a 'sub SPW, ' and the // adjcallstackdown instruction into 'add SPW, ' @@ -172,6 +163,7 @@ MachineInstr &MI = *II; MachineBasicBlock &MBB = *MI.getParent(); MachineFunction &MF = *MBB.getParent(); + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); DebugLoc dl = MI.getDebugLoc(); while (!MI.getOperand(i).isFI()) { ++i; @@ -180,13 +172,13 @@ int FrameIndex = MI.getOperand(i).getIndex(); - unsigned BasePtr = (hasFP(MF) ? MSP430::FPW : MSP430::SPW); + unsigned BasePtr = (TFI->hasFP(MF) ? MSP430::FPW : MSP430::SPW); int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex); // Skip the saved PC Offset += 2; - if (!hasFP(MF)) + if (!TFI->hasFP(MF)) Offset += MF.getFrameInfo()->getStackSize(); else Offset += 2; // Skip the saved FPW @@ -224,8 +216,10 @@ void MSP430RegisterInfo::processFunctionBeforeFrameFinalized(MachineFunction &MF) const { + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); + // Create a frame entry for the FPW register that must be saved. - if (hasFP(MF)) { + if (TFI->hasFP(MF)) { int FrameIdx = MF.getFrameInfo()->CreateFixedObject(2, -4, true); (void)FrameIdx; assert(FrameIdx == MF.getFrameInfo()->getObjectIndexBegin() && @@ -238,7 +232,9 @@ } unsigned MSP430RegisterInfo::getFrameRegister(const MachineFunction &MF) const { - return hasFP(MF) ? MSP430::FPW : MSP430::SPW; + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); + + return TFI->hasFP(MF) ? MSP430::FPW : MSP430::SPW; } int MSP430RegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const { Modified: llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.h?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.h (original) +++ llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.h Thu Nov 18 15:19:35 2010 @@ -39,9 +39,6 @@ BitVector getReservedRegs(const MachineFunction &MF) const; const TargetRegisterClass* getPointerRegClass(unsigned Kind = 0) const; - bool hasFP(const MachineFunction &MF) const; - bool hasReservedCallFrame(const MachineFunction &MF) const; - void eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const; Modified: llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.td?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.td (original) +++ llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.td Thu Nov 18 15:19:35 2010 @@ -79,10 +79,10 @@ GR8Class::iterator GR8Class::allocation_order_end(const MachineFunction &MF) const { const TargetMachine &TM = MF.getTarget(); - const TargetRegisterInfo *RI = TM.getRegisterInfo(); + const TargetFrameInfo *TFI = TM.getFrameInfo(); // Depending on whether the function uses frame pointer or not, last 5 or 4 // registers on the list above are reserved - if (RI->hasFP(MF)) + if (TFI->hasFP(MF)) return end()-5; else return end()-4; @@ -106,10 +106,10 @@ GR16Class::iterator GR16Class::allocation_order_end(const MachineFunction &MF) const { const TargetMachine &TM = MF.getTarget(); - const TargetRegisterInfo *RI = TM.getRegisterInfo(); + const TargetFrameInfo *TFI = TM.getFrameInfo(); // Depending on whether the function uses frame pointer or not, last 5 or 4 // registers on the list above are reserved - if (RI->hasFP(MF)) + if (TFI->hasFP(MF)) return end()-5; else return end()-4; Modified: llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp Thu Nov 18 15:19:35 2010 @@ -125,9 +125,10 @@ // Create a bitmask with all callee saved registers for CPU or Floating Point // registers. For CPU registers consider RA, GP and FP for saving if necessary. void MipsAsmPrinter::printSavedRegsBitmask(raw_ostream &O) { - const TargetRegisterInfo &RI = *TM.getRegisterInfo(); + const TargetFrameInfo *TFI = TM.getFrameInfo(); + const TargetRegisterInfo *RI = TM.getRegisterInfo(); const MipsFunctionInfo *MipsFI = MF->getInfo(); - + // CPU and FPU Saved Registers Bitmasks unsigned int CPUBitmask = 0; unsigned int FPUBitmask = 0; @@ -145,13 +146,13 @@ } // Return Address and Frame registers must also be set in CPUBitmask. - if (RI.hasFP(*MF)) + if (TFI->hasFP(*MF)) CPUBitmask |= (1 << MipsRegisterInfo:: - getRegisterNumbering(RI.getFrameRegister(*MF))); - - if (MFI->adjustsStack()) + getRegisterNumbering(RI->getFrameRegister(*MF))); + + if (MFI->adjustsStack()) CPUBitmask |= (1 << MipsRegisterInfo:: - getRegisterNumbering(RI.getRARegister())); + getRegisterNumbering(RI->getRARegister())); // Print CPUBitmask O << "\t.mask \t"; printHex32(CPUBitmask, O); Modified: llvm/trunk/lib/Target/Mips/MipsFrameInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsFrameInfo.cpp?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsFrameInfo.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsFrameInfo.cpp Thu Nov 18 15:19:35 2010 @@ -79,11 +79,17 @@ // //===----------------------------------------------------------------------===// +// hasFP - Return true if the specified function should have a dedicated frame +// pointer register. This is true if the function has variable sized allocas or +// if frame pointer elimination is disabled. +bool MipsFrameInfo::hasFP(const MachineFunction &MF) const { + const MachineFrameInfo *MFI = MF.getFrameInfo(); + return DisableFramePointerElim(MF) || MFI->hasVarSizedObjects(); +} + void MipsFrameInfo::adjustMipsStackFrame(MachineFunction &MF) const { MachineFrameInfo *MFI = MF.getFrameInfo(); MipsFunctionInfo *MipsFI = MF.getInfo(); - const MipsRegisterInfo *RegInfo = - static_cast(MF.getTarget().getRegisterInfo()); const std::vector &CSI = MFI->getCalleeSavedInfo(); unsigned StackAlign = MF.getTarget().getFrameInfo()->getStackAlignment(); unsigned RegSize = STI.isGP32bit() ? 4 : 8; @@ -152,7 +158,7 @@ // Stack locations for FP and RA. If only one of them is used, // the space must be allocated for both, otherwise no space at all. - if (RegInfo->hasFP(MF) || MFI->adjustsStack()) { + if (hasFP(MF) || MFI->adjustsStack()) { // FP stack location MFI->setObjectOffset(MFI->CreateStackObject(RegSize, RegSize, true), StackOffset); @@ -242,7 +248,7 @@ // if framepointer enabled, save it and set it // to point to the stack pointer - if (RegInfo->hasFP(MF)) { + if (hasFP(MF)) { // sw $fp,stack_loc($sp) BuildMI(MBB, MBBI, dl, TII.get(Mips::SW)) .addReg(Mips::FP).addImm(FPOffset).addReg(Mips::SP); @@ -263,8 +269,6 @@ MachineBasicBlock::iterator MBBI = prior(MBB.end()); MachineFrameInfo *MFI = MF.getFrameInfo(); MipsFunctionInfo *MipsFI = MF.getInfo(); - const MipsRegisterInfo *RegInfo = - static_cast(MF.getTarget().getRegisterInfo()); const MipsInstrInfo &TII = *static_cast(MF.getTarget().getInstrInfo()); DebugLoc dl = MBBI->getDebugLoc(); @@ -278,7 +282,7 @@ // if framepointer enabled, restore it and restore the // stack pointer - if (RegInfo->hasFP(MF)) { + if (hasFP(MF)) { // move $sp, $fp BuildMI(MBB, MBBI, dl, TII.get(Mips::ADDu), Mips::SP) .addReg(Mips::FP).addReg(Mips::ZERO); Modified: llvm/trunk/lib/Target/Mips/MipsFrameInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsFrameInfo.h?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsFrameInfo.h (original) +++ llvm/trunk/lib/Target/Mips/MipsFrameInfo.h Thu Nov 18 15:19:35 2010 @@ -37,6 +37,8 @@ /// the function. void emitPrologue(MachineFunction &MF) const; void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const; + + bool hasFP(const MachineFunction &MF) const; }; } // End llvm namespace Modified: llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp Thu Nov 18 15:19:35 2010 @@ -117,8 +117,7 @@ } BitVector MipsRegisterInfo:: -getReservedRegs(const MachineFunction &MF) const -{ +getReservedRegs(const MachineFunction &MF) const { BitVector Reserved(getNumRegs()); Reserved.set(Mips::ZERO); Reserved.set(Mips::AT); @@ -137,15 +136,6 @@ return Reserved; } -// hasFP - Return true if the specified function should have a dedicated frame -// pointer register. This is true if the function has variable sized allocas or -// if frame pointer elimination is disabled. -bool MipsRegisterInfo:: -hasFP(const MachineFunction &MF) const { - const MachineFrameInfo *MFI = MF.getFrameInfo(); - return DisableFramePointerElim(MF) || MFI->hasVarSizedObjects(); -} - // This function eliminate ADJCALLSTACKDOWN, // ADJCALLSTACKUP pseudo instructions void MipsRegisterInfo:: @@ -209,7 +199,9 @@ unsigned MipsRegisterInfo:: getFrameRegister(const MachineFunction &MF) const { - return hasFP(MF) ? Mips::FP : Mips::SP; + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); + + return TFI->hasFP(MF) ? Mips::FP : Mips::SP; } unsigned MipsRegisterInfo:: Modified: llvm/trunk/lib/Target/Mips/MipsRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsRegisterInfo.h?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsRegisterInfo.h (original) +++ llvm/trunk/lib/Target/Mips/MipsRegisterInfo.h Thu Nov 18 15:19:35 2010 @@ -44,8 +44,6 @@ BitVector getReservedRegs(const MachineFunction &MF) const; - bool hasFP(const MachineFunction &MF) const; - void eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const; Modified: llvm/trunk/lib/Target/PTX/PTXFrameInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXFrameInfo.h?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXFrameInfo.h (original) +++ llvm/trunk/lib/Target/PTX/PTXFrameInfo.h Thu Nov 18 15:19:35 2010 @@ -34,6 +34,8 @@ /// the function. void emitPrologue(MachineFunction &MF) const; void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const; + + bool hasFP(const MachineFunction &MF) const { return false; } }; } // End llvm namespace Modified: llvm/trunk/lib/Target/PTX/PTXRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXRegisterInfo.h?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXRegisterInfo.h (original) +++ llvm/trunk/lib/Target/PTX/PTXRegisterInfo.h Thu Nov 18 15:19:35 2010 @@ -38,8 +38,6 @@ return Reserved; // reserve no regs } - virtual bool hasFP(const MachineFunction &MF) const { return false; } - virtual void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj, RegScavenger *RS = NULL) const { Modified: llvm/trunk/lib/Target/PowerPC/PPCFrameInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCFrameInfo.cpp?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCFrameInfo.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCFrameInfo.cpp Thu Nov 18 15:19:35 2010 @@ -222,12 +222,25 @@ MFI->setStackSize(FrameSize); } +// hasFP - Return true if the specified function actually has a dedicated frame +// pointer register. +bool PPCFrameInfo::hasFP(const MachineFunction &MF) const { + const MachineFrameInfo *MFI = MF.getFrameInfo(); + + // Naked functions have no stack frame pushed, so we don't have a frame + // pointer. + if (MF.getFunction()->hasFnAttr(Attribute::Naked)) + return false; + + return DisableFramePointerElim(MF) || MFI->hasVarSizedObjects() || + (GuaranteedTailCallOpt && MF.getInfo()->hasFastCall()); +} + + void PPCFrameInfo::emitPrologue(MachineFunction &MF) const { MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB MachineBasicBlock::iterator MBBI = MBB.begin(); MachineFrameInfo *MFI = MF.getFrameInfo(); - const PPCRegisterInfo *RegInfo = - static_cast(MF.getTarget().getRegisterInfo()); const PPCInstrInfo &TII = *static_cast(MF.getTarget().getInstrInfo()); @@ -266,7 +279,7 @@ PPCFunctionInfo *FI = MF.getInfo(); bool MustSaveLR = FI->mustSaveLR(); // Do we have a frame pointer for this function? - bool HasFP = RegInfo->hasFP(MF) && FrameSize; + bool HasFP = hasFP(MF) && FrameSize; int LROffset = PPCFrameInfo::getReturnSaveOffset(isPPC64, isDarwinABI); @@ -471,21 +484,19 @@ void PPCFrameInfo::emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const { MachineBasicBlock::iterator MBBI = prior(MBB.end()); - const PPCRegisterInfo *RegInfo = - static_cast(MF.getTarget().getRegisterInfo()); const PPCInstrInfo &TII = *static_cast(MF.getTarget().getInstrInfo()); unsigned RetOpcode = MBBI->getOpcode(); DebugLoc dl; - assert( (RetOpcode == PPC::BLR || - RetOpcode == PPC::TCRETURNri || - RetOpcode == PPC::TCRETURNdi || - RetOpcode == PPC::TCRETURNai || - RetOpcode == PPC::TCRETURNri8 || - RetOpcode == PPC::TCRETURNdi8 || - RetOpcode == PPC::TCRETURNai8) && + assert((RetOpcode == PPC::BLR || + RetOpcode == PPC::TCRETURNri || + RetOpcode == PPC::TCRETURNdi || + RetOpcode == PPC::TCRETURNai || + RetOpcode == PPC::TCRETURNri8 || + RetOpcode == PPC::TCRETURNdi8 || + RetOpcode == PPC::TCRETURNai8) && "Can only insert epilog into returning blocks"); // Get alignment info so we know how to restore r1 @@ -504,7 +515,7 @@ PPCFunctionInfo *FI = MF.getInfo(); bool MustSaveLR = FI->mustSaveLR(); // Do we have a frame pointer for this function? - bool HasFP = RegInfo->hasFP(MF) && FrameSize; + bool HasFP = hasFP(MF) && FrameSize; int LROffset = PPCFrameInfo::getReturnSaveOffset(isPPC64, isDarwinABI); @@ -550,7 +561,7 @@ // call which invalidates the stack pointer value in SP(0). So we use the // value of R31 in this case. if (FI->hasFastCall() && isInt<16>(FrameSize)) { - assert(RegInfo->hasFP(MF) && "Expecting a valid the frame pointer."); + assert(hasFP(MF) && "Expecting a valid the frame pointer."); BuildMI(MBB, MBBI, dl, TII.get(PPC::ADDI), PPC::R1) .addReg(PPC::R31).addImm(FrameSize); } else if(FI->hasFastCall()) { @@ -574,7 +585,7 @@ } } else { if (FI->hasFastCall() && isInt<16>(FrameSize)) { - assert(RegInfo->hasFP(MF) && "Expecting a valid the frame pointer."); + assert(hasFP(MF) && "Expecting a valid the frame pointer."); BuildMI(MBB, MBBI, dl, TII.get(PPC::ADDI8), PPC::X1) .addReg(PPC::X31).addImm(FrameSize); } else if(FI->hasFastCall()) { Modified: llvm/trunk/lib/Target/PowerPC/PPCFrameInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCFrameInfo.h?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCFrameInfo.h (original) +++ llvm/trunk/lib/Target/PowerPC/PPCFrameInfo.h Thu Nov 18 15:19:35 2010 @@ -37,6 +37,8 @@ void emitPrologue(MachineFunction &MF) const; void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const; + bool hasFP(const MachineFunction &MF) const; + /// targetHandlesStackFrameRounding - Returns true if the target is /// responsible for rounding up the stack frame (probably at emitPrologue /// time). Modified: llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp Thu Nov 18 15:19:35 2010 @@ -259,19 +259,6 @@ return Subtarget.isPPC64() ? SVR4_64_CalleeSavedRegs : SVR4_CalleeSavedRegs; } -// needsFP - Return true if the specified function should have a dedicated frame -// pointer register. This is true if the function has variable sized allocas or -// if frame pointer elimination is disabled. -// -static bool needsFP(const MachineFunction &MF) { - const MachineFrameInfo *MFI = MF.getFrameInfo(); - // Naked functions have no stack frame pushed, so we don't have a frame pointer. - if (MF.getFunction()->hasFnAttr(Attribute::Naked)) - return false; - return DisableFramePointerElim(MF) || MFI->hasVarSizedObjects() || - (GuaranteedTailCallOpt && MF.getInfo()->hasFastCall()); -} - static bool spillsCR(const MachineFunction &MF) { const PPCFunctionInfo *FuncInfo = MF.getInfo(); return FuncInfo->isCRSpilled(); @@ -279,6 +266,8 @@ BitVector PPCRegisterInfo::getReservedRegs(const MachineFunction &MF) const { BitVector Reserved(getNumRegs()); + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); + Reserved.set(PPC::R0); Reserved.set(PPC::R1); Reserved.set(PPC::LR); @@ -324,7 +313,7 @@ } } - if (needsFP(MF)) + if (TFI->hasFP(MF)) Reserved.set(PPC::R31); return Reserved; @@ -334,14 +323,6 @@ // Stack Frame Processing methods //===----------------------------------------------------------------------===// -// hasFP - Return true if the specified function actually has a dedicated frame -// pointer register. This is true if the function needs a frame pointer and has -// a non-zero stack size. -bool PPCRegisterInfo::hasFP(const MachineFunction &MF) const { - const MachineFrameInfo *MFI = MF.getFrameInfo(); - return MFI->getStackSize() && needsFP(MF); -} - /// MustSaveLR - Return true if this function requires that we save the LR /// register onto the stack in the prolog and restore it in the epilog of the /// function. @@ -583,6 +564,7 @@ MachineFunction &MF = *MBB.getParent(); // Get the frame info. MachineFrameInfo *MFI = MF.getFrameInfo(); + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); DebugLoc dl = MI.getDebugLoc(); // Find out which operand is the frame index. @@ -622,7 +604,8 @@ } // Replace the FrameIndex with base register with GPR1 (SP) or GPR31 (FP). - MI.getOperand(FIOperandNo).ChangeToRegister(hasFP(MF) ? PPC::R31 : PPC::R1, + MI.getOperand(FIOperandNo).ChangeToRegister(TFI->hasFP(MF) ? + PPC::R31 : PPC::R1, false); // Figure out if the offset in the instruction is shifted right two bits. This @@ -708,6 +691,8 @@ void PPCRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF, RegScavenger *RS) const { + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); + // Save and clear the LR state. PPCFunctionInfo *FI = MF.getInfo(); unsigned LR = getRARegister(); @@ -719,9 +704,9 @@ bool isPPC64 = Subtarget.isPPC64(); bool isDarwinABI = Subtarget.isDarwinABI(); MachineFrameInfo *MFI = MF.getFrameInfo(); - + // If the frame pointer save index hasn't been defined yet. - if (!FPSI && needsFP(MF)) { + if (!FPSI && TFI->hasFP(MF)) { // Find out what the fix offset of the frame pointer save area. int FPOffset = PPCFrameInfo::getFramePointerSaveOffset(isPPC64, isDarwinABI); @@ -736,7 +721,7 @@ if (GuaranteedTailCallOpt && (TCSPDelta = FI->getTailCallSPDelta()) < 0) { MF.getFrameInfo()->CreateFixedObject(-1 * TCSPDelta, TCSPDelta, true); } - + // Reserve a slot closest to SP or frame pointer if we have a dynalloc or // a large stack, which will require scavenging a register to materialize a // large offset. @@ -745,7 +730,7 @@ // r0 for now. if (EnableRegisterScavenging) // FIXME (64-bit): Enable. - if (needsFP(MF) || spillsCR(MF)) { + if (TFI->hasFP(MF) || spillsCR(MF)) { const TargetRegisterClass *GPRC = &PPC::GPRCRegClass; const TargetRegisterClass *G8RC = &PPC::G8RCRegClass; const TargetRegisterClass *RC = isPPC64 ? G8RC : GPRC; @@ -766,12 +751,13 @@ // Get callee saved register information. MachineFrameInfo *FFI = MF.getFrameInfo(); const std::vector &CSI = FFI->getCalleeSavedInfo(); + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); // Early exit if no callee saved registers are modified! - if (CSI.empty() && !needsFP(MF)) { + if (CSI.empty() && !TFI->hasFP(MF)) { return; } - + unsigned MinGPR = PPC::R31; unsigned MinG8R = PPC::X31; unsigned MinFPR = PPC::F31; @@ -858,7 +844,7 @@ // Check whether the frame pointer register is allocated. If so, make sure it // is spilled to the correct offset. - if (needsFP(MF)) { + if (TFI->hasFP(MF)) { HasGPSaveArea = true; int FI = PFI->getFramePointerSaveIndex(); @@ -949,10 +935,12 @@ } unsigned PPCRegisterInfo::getFrameRegister(const MachineFunction &MF) const { + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); + if (!Subtarget.isPPC64()) - return hasFP(MF) ? PPC::R31 : PPC::R1; + return TFI->hasFP(MF) ? PPC::R31 : PPC::R1; else - return hasFP(MF) ? PPC::X31 : PPC::X1; + return TFI->hasFP(MF) ? PPC::X31 : PPC::X1; } void PPCRegisterInfo::getInitialFrameState(std::vector &Moves) Modified: llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.h?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.h (original) +++ llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.h Thu Nov 18 15:19:35 2010 @@ -48,8 +48,6 @@ /// FIXME (64-bit): Should be inlined. bool requiresRegisterScavenging(const MachineFunction &MF) const; - bool hasFP(const MachineFunction &MF) const; - void eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const; @@ -65,9 +63,6 @@ RegScavenger *RS = NULL) const; void processFunctionBeforeFrameFinalized(MachineFunction &MF) const; - void emitPrologue(MachineFunction &MF) const; - void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const; - // Debug information queries. unsigned getRARegister() const; unsigned getFrameRegister(const MachineFunction &MF) const; Modified: llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.td?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.td (original) +++ llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.td Thu Nov 18 15:19:35 2010 @@ -300,13 +300,13 @@ // R31 when the FP is not needed. // When using the 32-bit SVR4 ABI, r13 is reserved for the Small Data Area // pointer. - const PPCSubtarget &Subtarget - = MF.getTarget().getSubtarget(); - + const PPCSubtarget &Subtarget = MF.getTarget().getSubtarget(); + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); + if (Subtarget.isPPC64() || Subtarget.isSVR4ABI()) return end()-5; // don't allocate R13, R31, R0, R1, LR - if (needsFP(MF)) + if (TFI->hasFP(MF)) return end()-4; // don't allocate R31, R0, R1, LR else return end()-3; // don't allocate R0, R1, LR @@ -331,7 +331,8 @@ } G8RCClass::iterator G8RCClass::allocation_order_end(const MachineFunction &MF) const { - if (needsFP(MF)) + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); + if (TFI->hasFP(MF)) return end()-5; else return end()-4; Modified: llvm/trunk/lib/Target/Sparc/SparcFrameInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcFrameInfo.h?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/Sparc/SparcFrameInfo.h (original) +++ llvm/trunk/lib/Target/Sparc/SparcFrameInfo.h Thu Nov 18 15:19:35 2010 @@ -32,6 +32,8 @@ /// the function. void emitPrologue(MachineFunction &MF) const; void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const; + + bool hasFP(const MachineFunction &MF) const { return false; } }; } // End llvm namespace Modified: llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.cpp?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.cpp Thu Nov 18 15:19:35 2010 @@ -52,10 +52,6 @@ return Reserved; } -bool SparcRegisterInfo::hasFP(const MachineFunction &MF) const { - return false; -} - void SparcRegisterInfo:: eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const { Modified: llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.h?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.h (original) +++ llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.h Thu Nov 18 15:19:35 2010 @@ -34,8 +34,6 @@ BitVector getReservedRegs(const MachineFunction &MF) const; - bool hasFP(const MachineFunction &MF) const; - void eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const; Modified: llvm/trunk/lib/Target/SystemZ/SystemZFrameInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZFrameInfo.cpp?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/SystemZ/SystemZFrameInfo.cpp (original) +++ llvm/trunk/lib/Target/SystemZ/SystemZFrameInfo.cpp Thu Nov 18 15:19:35 2010 @@ -27,6 +27,15 @@ using namespace llvm; + +/// needsFP - Return true if the specified function should have a dedicated +/// frame pointer register. This is true if the function has variable sized +/// allocas or if frame pointer elimination is disabled. +bool SystemZFrameInfo::hasFP(const MachineFunction &MF) const { + const MachineFrameInfo *MFI = MF.getFrameInfo(); + return DisableFramePointerElim(MF) || MFI->hasVarSizedObjects(); +} + /// emitSPUpdate - Emit a series of instructions to increment / decrement the /// stack pointer by a constant value. static @@ -61,8 +70,6 @@ MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB const TargetFrameInfo &TFI = *MF.getTarget().getFrameInfo(); MachineFrameInfo *MFI = MF.getFrameInfo(); - const SystemZRegisterInfo *RegInfo = - static_cast(MF.getTarget().getRegisterInfo()); const SystemZInstrInfo &TII = *static_cast(MF.getTarget().getInstrInfo()); SystemZMachineFunctionInfo *SystemZMFI = @@ -94,7 +101,7 @@ emitSPUpdate(MBB, MBBI, -(int64_t)NumBytes, TII); } - if (RegInfo->hasFP(MF)) { + if (hasFP(MF)) { // Update R11 with the new base value... BuildMI(MBB, MBBI, DL, TII.get(SystemZ::MOV64rr), SystemZ::R11D) .addReg(SystemZ::R15D); Modified: llvm/trunk/lib/Target/SystemZ/SystemZFrameInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZFrameInfo.h?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/SystemZ/SystemZFrameInfo.h (original) +++ llvm/trunk/lib/Target/SystemZ/SystemZFrameInfo.h Thu Nov 18 15:19:35 2010 @@ -34,6 +34,9 @@ /// the function. void emitPrologue(MachineFunction &MF) const; void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const; + + bool hasReservedCallFrame(const MachineFunction &MF) const { return true; } + bool hasFP(const MachineFunction &MF) const; }; } // End llvm namespace Modified: llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp (original) +++ llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp Thu Nov 18 15:19:35 2010 @@ -377,8 +377,8 @@ const SmallVectorImpl &Ins, DebugLoc dl, SelectionDAG &DAG, SmallVectorImpl &InVals) const { - MachineFunction &MF = DAG.getMachineFunction(); + const TargetFrameInfo *TFI = TM.getFrameInfo(); // Offset to first argument stack slot. const unsigned FirstArgOffset = 160; @@ -431,7 +431,7 @@ if (StackPtr.getNode() == 0) StackPtr = DAG.getCopyFromReg(Chain, dl, - (RegInfo->hasFP(MF) ? + (TFI->hasFP(MF) ? SystemZ::R11D : SystemZ::R15D), getPointerTy()); Modified: llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp (original) +++ llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp Thu Nov 18 15:19:35 2010 @@ -297,7 +297,7 @@ if (MI != MBB.end()) DL = MI->getDebugLoc(); MachineFunction &MF = *MBB.getParent(); - const TargetRegisterInfo *RegInfo= MF.getTarget().getRegisterInfo(); + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); SystemZMachineFunctionInfo *MFI = MF.getInfo(); // Restore FP registers @@ -323,7 +323,7 @@ if (LowReg != HighReg) MIB.addReg(HighReg, RegState::Define); - MIB.addReg((RegInfo->hasFP(MF) ? SystemZ::R11D : SystemZ::R15D)); + MIB.addReg(TFI->hasFP(MF) ? SystemZ::R11D : SystemZ::R15D); MIB.addImm(StartOffset); if (LowReg == HighReg) MIB.addReg(0); Modified: llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.cpp?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.cpp Thu Nov 18 15:19:35 2010 @@ -49,21 +49,15 @@ BitVector SystemZRegisterInfo::getReservedRegs(const MachineFunction &MF) const { BitVector Reserved(getNumRegs()); - if (hasFP(MF)) + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); + + if (TFI->hasFP(MF)) Reserved.set(SystemZ::R11D); Reserved.set(SystemZ::R14D); Reserved.set(SystemZ::R15D); return Reserved; } -/// needsFP - Return true if the specified function should have a dedicated -/// frame pointer register. This is true if the function has variable sized -/// allocas or if frame pointer elimination is disabled. -bool SystemZRegisterInfo::hasFP(const MachineFunction &MF) const { - const MachineFrameInfo *MFI = MF.getFrameInfo(); - return DisableFramePointerElim(MF) || MFI->hasVarSizedObjects(); -} - void SystemZRegisterInfo:: eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const { @@ -100,6 +94,8 @@ unsigned i = 0; MachineInstr &MI = *II; MachineFunction &MF = *MI.getParent()->getParent(); + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); + while (!MI.getOperand(i).isFI()) { ++i; assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!"); @@ -107,7 +103,7 @@ int FrameIndex = MI.getOperand(i).getIndex(); - unsigned BasePtr = (hasFP(MF) ? SystemZ::R11D : SystemZ::R15D); + unsigned BasePtr = (TFI->hasFP(MF) ? SystemZ::R11D : SystemZ::R15D); // This must be part of a rri or ri operand memory reference. Replace the // FrameIndex with base register with BasePtr. Add an offset to the Modified: llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.h?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.h (original) +++ llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.h Thu Nov 18 15:19:35 2010 @@ -34,9 +34,6 @@ BitVector getReservedRegs(const MachineFunction &MF) const; - bool hasReservedCallFrame(const MachineFunction &MF) const { return true; } - bool hasFP(const MachineFunction &MF) const; - int getFrameIndexOffset(const MachineFunction &MF, int FI) const; void eliminateCallFramePseudoInstr(MachineFunction &MF, Modified: llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.td?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.td (original) +++ llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.td Thu Nov 18 15:19:35 2010 @@ -190,8 +190,8 @@ GR32Class::iterator GR32Class::allocation_order_begin(const MachineFunction &MF) const { const TargetMachine &TM = MF.getTarget(); - const TargetRegisterInfo *RI = TM.getRegisterInfo(); - if (RI->hasFP(MF)) + const TargetFrameInfo *TFI = TM.getFrameInfo(); + if (TFI->hasFP(MF)) return SystemZ_REG32_nofp; else return SystemZ_REG32; @@ -199,8 +199,8 @@ GR32Class::iterator GR32Class::allocation_order_end(const MachineFunction &MF) const { const TargetMachine &TM = MF.getTarget(); - const TargetRegisterInfo *RI = TM.getRegisterInfo(); - if (RI->hasFP(MF)) + const TargetFrameInfo *TFI = TM.getFrameInfo(); + if (TFI->hasFP(MF)) return SystemZ_REG32_nofp + (sizeof(SystemZ_REG32_nofp) / sizeof(unsigned)); else return SystemZ_REG32 + (sizeof(SystemZ_REG32) / sizeof(unsigned)); @@ -237,8 +237,8 @@ ADDR32Class::iterator ADDR32Class::allocation_order_begin(const MachineFunction &MF) const { const TargetMachine &TM = MF.getTarget(); - const TargetRegisterInfo *RI = TM.getRegisterInfo(); - if (RI->hasFP(MF)) + const TargetFrameInfo *TFI = TM.getFrameInfo(); + if (TFI->hasFP(MF)) return SystemZ_ADDR32_nofp; else return SystemZ_ADDR32; @@ -246,8 +246,8 @@ ADDR32Class::iterator ADDR32Class::allocation_order_end(const MachineFunction &MF) const { const TargetMachine &TM = MF.getTarget(); - const TargetRegisterInfo *RI = TM.getRegisterInfo(); - if (RI->hasFP(MF)) + const TargetFrameInfo *TFI = TM.getFrameInfo(); + if (TFI->hasFP(MF)) return SystemZ_ADDR32_nofp + (sizeof(SystemZ_ADDR32_nofp) / sizeof(unsigned)); else return SystemZ_ADDR32 + (sizeof(SystemZ_ADDR32) / sizeof(unsigned)); @@ -284,8 +284,8 @@ GR64Class::iterator GR64Class::allocation_order_begin(const MachineFunction &MF) const { const TargetMachine &TM = MF.getTarget(); - const TargetRegisterInfo *RI = TM.getRegisterInfo(); - if (RI->hasFP(MF)) + const TargetFrameInfo *TFI = TM.getFrameInfo(); + if (TFI->hasFP(MF)) return SystemZ_REG64_nofp; else return SystemZ_REG64; @@ -293,8 +293,8 @@ GR64Class::iterator GR64Class::allocation_order_end(const MachineFunction &MF) const { const TargetMachine &TM = MF.getTarget(); - const TargetRegisterInfo *RI = TM.getRegisterInfo(); - if (RI->hasFP(MF)) + const TargetFrameInfo *TFI = TM.getFrameInfo(); + if (TFI->hasFP(MF)) return SystemZ_REG64_nofp + (sizeof(SystemZ_REG64_nofp) / sizeof(unsigned)); else return SystemZ_REG64 + (sizeof(SystemZ_REG64) / sizeof(unsigned)); @@ -331,8 +331,8 @@ ADDR64Class::iterator ADDR64Class::allocation_order_begin(const MachineFunction &MF) const { const TargetMachine &TM = MF.getTarget(); - const TargetRegisterInfo *RI = TM.getRegisterInfo(); - if (RI->hasFP(MF)) + const TargetFrameInfo *TFI = TM.getFrameInfo(); + if (TFI->hasFP(MF)) return SystemZ_ADDR64_nofp; else return SystemZ_ADDR64; @@ -340,8 +340,8 @@ ADDR64Class::iterator ADDR64Class::allocation_order_end(const MachineFunction &MF) const { const TargetMachine &TM = MF.getTarget(); - const TargetRegisterInfo *RI = TM.getRegisterInfo(); - if (RI->hasFP(MF)) + const TargetFrameInfo *TFI = TM.getFrameInfo(); + if (TFI->hasFP(MF)) return SystemZ_ADDR64_nofp + (sizeof(SystemZ_ADDR64_nofp) / sizeof(unsigned)); else return SystemZ_ADDR64 + (sizeof(SystemZ_ADDR64) / sizeof(unsigned)); @@ -368,8 +368,8 @@ GR64PClass::iterator GR64PClass::allocation_order_begin(const MachineFunction &MF) const { const TargetMachine &TM = MF.getTarget(); - const TargetRegisterInfo *RI = TM.getRegisterInfo(); - if (RI->hasFP(MF)) + const TargetFrameInfo *TFI = TM.getFrameInfo(); + if (TFI->hasFP(MF)) return SystemZ_REG64P_nofp; else return SystemZ_REG64P; @@ -377,8 +377,8 @@ GR64PClass::iterator GR64PClass::allocation_order_end(const MachineFunction &MF) const { const TargetMachine &TM = MF.getTarget(); - const TargetRegisterInfo *RI = TM.getRegisterInfo(); - if (RI->hasFP(MF)) + const TargetFrameInfo *TFI = TM.getFrameInfo(); + if (TFI->hasFP(MF)) return SystemZ_REG64P_nofp + (sizeof(SystemZ_REG64P_nofp) / sizeof(unsigned)); else return SystemZ_REG64P + (sizeof(SystemZ_REG64P) / sizeof(unsigned)); @@ -405,8 +405,8 @@ GR128Class::iterator GR128Class::allocation_order_begin(const MachineFunction &MF) const { const TargetMachine &TM = MF.getTarget(); - const TargetRegisterInfo *RI = TM.getRegisterInfo(); - if (RI->hasFP(MF)) + const TargetFrameInfo *TFI = TM.getFrameInfo(); + if (TFI->hasFP(MF)) return SystemZ_REG128_nofp; else return SystemZ_REG128; @@ -414,8 +414,8 @@ GR128Class::iterator GR128Class::allocation_order_end(const MachineFunction &MF) const { const TargetMachine &TM = MF.getTarget(); - const TargetRegisterInfo *RI = TM.getRegisterInfo(); - if (RI->hasFP(MF)) + const TargetFrameInfo *TFI = TM.getFrameInfo(); + if (TFI->hasFP(MF)) return SystemZ_REG128_nofp + (sizeof(SystemZ_REG128_nofp) / sizeof(unsigned)); else return SystemZ_REG128 + (sizeof(SystemZ_REG128) / sizeof(unsigned)); Modified: llvm/trunk/lib/Target/X86/X86FrameInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FrameInfo.cpp?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86FrameInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86FrameInfo.cpp Thu Nov 18 15:19:35 2010 @@ -30,6 +30,26 @@ // FIXME: completely move here. extern cl::opt ForceStackAlign; +bool X86FrameInfo::hasReservedCallFrame(const MachineFunction &MF) const { + return !MF.getFrameInfo()->hasVarSizedObjects(); +} + +/// hasFP - Return true if the specified function should have a dedicated frame +/// pointer register. This is true if the function has variable sized allocas +/// or if frame pointer elimination is disabled. +bool X86FrameInfo::hasFP(const MachineFunction &MF) const { + const MachineFrameInfo *MFI = MF.getFrameInfo(); + const MachineModuleInfo &MMI = MF.getMMI(); + const TargetRegisterInfo *RI = MF.getTarget().getRegisterInfo(); + + return (DisableFramePointerElim(MF) || + RI->needsStackRealignment(MF) || + MFI->hasVarSizedObjects() || + MFI->isFrameAddressTaken() || + MF.getInfo()->getForceFramePointer() || + MMI.callsUnwindInit()); +} + static unsigned getSUBriOpcode(unsigned is64Bit, int64_t Imm) { if (is64Bit) { if (isInt<8>(Imm)) @@ -184,8 +204,6 @@ MCSymbol *Label, unsigned FramePtr) const { MachineFrameInfo *MFI = MF.getFrameInfo(); - const X86RegisterInfo *RegInfo = - static_cast(MF.getTarget().getRegisterInfo()); MachineModuleInfo &MMI = MF.getMMI(); // Add callee saved registers to move list. @@ -194,7 +212,7 @@ std::vector &Moves = MMI.getFrameMoves(); const TargetData *TD = MF.getTarget().getTargetData(); - bool HasFP = RegInfo->hasFP(MF); + bool HasFP = hasFP(MF); // Calculate amount of bytes used for return address storing. int stackGrowth = @@ -269,7 +287,7 @@ !Fn->doesNotThrow() || UnwindTablesMandatory; uint64_t MaxAlign = MFI->getMaxAlignment(); // Desired stack alignment. uint64_t StackSize = MFI->getStackSize(); // Number of bytes to allocate. - bool HasFP = RegInfo->hasFP(MF); + bool HasFP = hasFP(MF); bool Is64Bit = STI.is64Bit(); bool IsWin64 = STI.isTargetWin64(); unsigned StackAlign = getStackAlignment(); @@ -596,7 +614,7 @@ MaxAlign = MaxAlign ? MaxAlign : 4; } - if (RegInfo->hasFP(MF)) { + if (hasFP(MF)) { // Calculate required stack adjustment. uint64_t FrameSize = StackSize - SlotSize; if (RegInfo->needsStackRealignment(MF)) Modified: llvm/trunk/lib/Target/X86/X86FrameInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FrameInfo.h?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86FrameInfo.h (original) +++ llvm/trunk/lib/Target/X86/X86FrameInfo.h Thu Nov 18 15:19:35 2010 @@ -39,6 +39,10 @@ /// the function. void emitPrologue(MachineFunction &MF) const; void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const; + + bool hasFP(const MachineFunction &MF) const; + bool hasReservedCallFrame(const MachineFunction &MF) const; + }; } // End llvm namespace Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Nov 18 15:19:35 2010 @@ -1172,7 +1172,9 @@ unsigned X86TargetLowering::getRegPressureLimit(const TargetRegisterClass *RC, MachineFunction &MF) const { - unsigned FPDiff = RegInfo->hasFP(MF) ? 1 : 0; + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); + + unsigned FPDiff = TFI->hasFP(MF) ? 1 : 0; switch (RC->getID()) { default: return 0; Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp?rev=119740&r1=119739&r2=119740&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp Thu Nov 18 15:19:35 2010 @@ -388,6 +388,8 @@ BitVector X86RegisterInfo::getReservedRegs(const MachineFunction &MF) const { BitVector Reserved(getNumRegs()); + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); + // Set the stack-pointer register and its aliases as reserved. Reserved.set(X86::RSP); Reserved.set(X86::ESP); @@ -400,7 +402,7 @@ Reserved.set(X86::IP); // Set the frame-pointer register and its aliases as reserved if needed. - if (hasFP(MF)) { + if (TFI->hasFP(MF)) { Reserved.set(X86::RBP); Reserved.set(X86::EBP); Reserved.set(X86::BP); @@ -425,21 +427,6 @@ // Stack Frame Processing methods //===----------------------------------------------------------------------===// -/// hasFP - Return true if the specified function should have a dedicated frame -/// pointer register. This is true if the function has variable sized allocas -/// or if frame pointer elimination is disabled. -bool X86RegisterInfo::hasFP(const MachineFunction &MF) const { - const MachineFrameInfo *MFI = MF.getFrameInfo(); - const MachineModuleInfo &MMI = MF.getMMI(); - - return (DisableFramePointerElim(MF) || - needsStackRealignment(MF) || - MFI->hasVarSizedObjects() || - MFI->isFrameAddressTaken() || - MF.getInfo()->getForceFramePointer() || - MMI.callsUnwindInit()); -} - bool X86RegisterInfo::canRealignStack(const MachineFunction &MF) const { const MachineFrameInfo *MFI = MF.getFrameInfo(); return (RealignStack && @@ -466,13 +453,11 @@ return requiresRealignment && canRealignStack(MF); } -bool X86RegisterInfo::hasReservedCallFrame(const MachineFunction &MF) const { - return !MF.getFrameInfo()->hasVarSizedObjects(); -} - bool X86RegisterInfo::hasReservedSpillSlot(const MachineFunction &MF, unsigned Reg, int &FrameIdx) const { - if (Reg == FramePtr && hasFP(MF)) { + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); + + if (Reg == FramePtr && TFI->hasFP(MF)) { FrameIdx = MF.getFrameInfo()->getObjectIndexBegin(); return true; } @@ -481,9 +466,9 @@ int X86RegisterInfo::getFrameIndexOffset(const MachineFunction &MF, int FI) const { - const TargetFrameInfo &TFI = *MF.getTarget().getFrameInfo(); + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); const MachineFrameInfo *MFI = MF.getFrameInfo(); - int Offset = MFI->getObjectOffset(FI) - TFI.getOffsetOfLocalArea(); + int Offset = MFI->getObjectOffset(FI) - TFI->getOffsetOfLocalArea(); uint64_t StackSize = MFI->getStackSize(); if (needsStackRealignment(MF)) { @@ -498,7 +483,7 @@ } // FIXME: Support tail calls } else { - if (!hasFP(MF)) + if (!TFI->hasFP(MF)) return Offset + StackSize; // Skip the saved EBP. @@ -541,7 +526,9 @@ void X86RegisterInfo:: eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const { - if (!hasReservedCallFrame(MF)) { + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); + + if (!TFI->hasReservedCallFrame(MF)) { // If the stack pointer can be changed after prologue, turn the // adjca
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