From zwarich at apple.com Mon Nov 22 01:34:02 2010 From: zwarich at apple.com (Cameron Zwarich) Date: Mon, 22 Nov 2010 02:34:02 -0500 Subject: [llvm-commits] Review request: remove useless stores from mem2reg Message-ID: There is a set of inserted phis in PromoteMemoryToRegister.cpp that is maintained but never actually used anywhere. Removing it gives me a 1.2% speedup running mem2reg on test-suite, although some of this may just be due to random code motion in memory. -------------- next part -------------- A non-text attachment was scrubbed... Name: phis.patch Type: application/octet-stream Size: 2169 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101122/43a6e2db/attachment.obj -------------- next part -------------- Cameron From nicholas at mxc.ca Mon Nov 22 01:45:00 2010 From: nicholas at mxc.ca (Nick Lewycky) Date: Sun, 21 Nov 2010 23:45:00 -0800 Subject: [llvm-commits] Review request: remove useless stores from mem2reg In-Reply-To: References: Message-ID: <4CEA1F7C.90609@mxc.ca> Cameron Zwarich wrote: > There is a set of inserted phis in PromoteMemoryToRegister.cpp that is maintained but never actually used anywhere. Removing it gives me a 1.2% speedup running mem2reg on test-suite, although some of this may just be due to random code motion in memory. Great catch, please commit! Nick From geek4civic at gmail.com Mon Nov 22 01:49:54 2010 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Mon, 22 Nov 2010 16:49:54 +0900 Subject: [llvm-commits] [Review request] test/CodeGen/X86: Add cases for Win64 to 67 tests Message-ID: Hello guys! llc infers -march=x86-64 as -mtriple=x86_64-(mingw32|win32). Then many tests in CodeGen/X86 would fail due to ABI difference between AMD64 and Win64. (or Win64 codegen's inefficiency) The principle to rewrite tests is as below; - Tests should not hide possible win64's behavior. They could exclude Win64 when they were obviously nonsense. - Tests should not depend on hosts. Win64's failure should be detected also on other platforms. When a test has -mtriple=x86_64-linux, it should have also -mtriple=x86_64-win32. - Some tests might be dubious for Win64. I took two cases. - Mark them as XFAIL: mingw, win32, to detect when they were fixed. - Add *as-is* pattern to tests. You shall know they are really ugly. :D Guys, please, I would like everyone to help me to brush up my patches. Feel free for yourself to commit one when you might be self-approved. * 0001-test-CodeGen-X86-fold-mul-lohi.ll-FileCheck-ize-and-.patch Win64 tends to emit "lea (%rip)". I excluded it from win64 tests. * 0002-test-CodeGen-X86-red-zone.ll-Add-explicit-mtriple-x8.patch Win64 doesn't use redzone stuff. * 0003-test-CodeGen-X86-sse_reload_fold.ll-FileCheck-ize-an.patch I don't understand what it intends. I am happy if someone explain to me. :) * 0004-test-CodeGen-X86-store_op_load_fold2.ll-Add-a-test-f.patch Alignment of 13th member in the struct makes difference. * 0005-test-CodeGen-X86-v2f32.ll-Fix-missing-tests-and-add-.patch I re-enabled 3 tests and added *as-is* Win64's patterns. * 0006-test-CodeGen-X86-Add-the-as-is-pattern-for-Win64.patch I added *as-is* patterns for Win64. I intend for reviewrs to help to reduce their expressions. * 0007-test-CodeGen-X86-Mark-as-XFAIL-mingw-win32.-They-sho.patch I thought they could be fixed in future. When one were fixed, "llc -mtriple=x86_64-win32" should be added. * 0008-test-CodeGen-X86-FileCheck-ize-with-relaxed-expressi.patch Please watch out; - Is my FileCheck-izing reasonable? - Do relaxed patterns have any faults? * 0009-test-CodeGen-X86-FileCheck-ize-and-add-the-case-for-.patch I added "WIN64:"(and similar) expressions to them. I wonder it might be reasonable. * 0010-test-CodeGen-X86-Relax-expressions-for-Win64.patch They are FileCheck-ized on ToT. I tweaked them with relaxation to recognize Win64 ABI. Have a happy testing! ...Takumi test/CodeGen/X86/2007-01-08-X86-64-Pointer.ll | 7 ++- test/CodeGen/X86/2007-07-18-Vector-Extract.ll | 6 +- test/CodeGen/X86/2008-06-13-VolatileLoadStore.ll | 9 ++- test/CodeGen/X86/add.ll | 11 ++-- test/CodeGen/X86/avoid-lea-scale2.ll | 5 +- test/CodeGen/X86/bitcast2.ll | 22 ++++++- test/CodeGen/X86/break-sse-dep.ll | 15 ++-- test/CodeGen/X86/byval.ll | 9 ++- test/CodeGen/X86/byval2.ll | 39 ++++++++++- test/CodeGen/X86/byval3.ll | 42 +++++++++++- test/CodeGen/X86/byval4.ll | 42 +++++++++++- test/CodeGen/X86/byval5.ll | 42 +++++++++++- test/CodeGen/X86/coalescer-commute2.ll | 21 +++++- test/CodeGen/X86/codegen-prepare-extload.ll | 5 +- test/CodeGen/X86/constant-pool-remat-0.ll | 35 +++++++++- test/CodeGen/X86/constant-pool-sharing.ll | 7 +- test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll | 12 +++- test/CodeGen/X86/fast-isel-cmp-branch.ll | 7 +- test/CodeGen/X86/fast-isel-gep.ll | 11 ++-- test/CodeGen/X86/fold-mul-lohi.ll | 5 +- test/CodeGen/X86/gather-addresses.ll | 23 ++++--- test/CodeGen/X86/h-register-store.ll | 32 +++++++-- test/CodeGen/X86/h-registers-0.ll | 24 +++++++- test/CodeGen/X86/i128-ret.ll | 6 +- test/CodeGen/X86/i64-mem-copy.ll | 8 ++- test/CodeGen/X86/iabs.ll | 8 ++- test/CodeGen/X86/lea-3.ll | 15 +++-- test/CodeGen/X86/lea.ll | 9 ++- test/CodeGen/X86/lsr-overflow.ll | 5 +- test/CodeGen/X86/lsr-reuse-trunc.ll | 9 ++- test/CodeGen/X86/masked-iv-safe.ll | 43 ++++++++++--- test/CodeGen/X86/memcmp.ll | 21 +++--- test/CodeGen/X86/mmx-copy-gprs.ll | 10 ++- test/CodeGen/X86/movgs.ll | 7 +- test/CodeGen/X86/optimize-max-3.ll | 11 ++-- test/CodeGen/X86/peep-vector-extract-concat.ll | 11 +++- test/CodeGen/X86/pmulld.ll | 12 +++- test/CodeGen/X86/red-zone.ll | 2 +- test/CodeGen/X86/red-zone2.ll | 11 ++- test/CodeGen/X86/remat-mov-0.ll | 15 ++-- test/CodeGen/X86/scalar-min-max-fill-operand.ll | 34 +++++++++- test/CodeGen/X86/select-aggregate.ll | 7 +- test/CodeGen/X86/sse-align-0.ll | 25 +++++++- test/CodeGen/X86/sse-align-3.ll | 22 ++++++- test/CodeGen/X86/sse-align-7.ll | 8 ++- test/CodeGen/X86/sse-commute.ll | 12 +++- test/CodeGen/X86/sse-minmax.ll | 2 + test/CodeGen/X86/sse_reload_fold.ll | 5 +- test/CodeGen/X86/stdarg.ll | 16 ++++- test/CodeGen/X86/store_op_load_fold2.ll | 9 ++- test/CodeGen/X86/stride-nine-with-base-reg.ll | 34 +++++++++- test/CodeGen/X86/stride-reuse.ll | 33 +++++++++- test/CodeGen/X86/subreg-to-reg-4.ll | 11 +-- test/CodeGen/X86/tailcallbyval64.ll | 62 ++++++++++++++++- test/CodeGen/X86/tailcallstack64.ll | 3 +- test/CodeGen/X86/test-shrink.ll | 21 +++--- test/CodeGen/X86/unknown-location.ll | 5 +- test/CodeGen/X86/use-add-flags.ll | 15 ++-- test/CodeGen/X86/v2f32.ll | 77 ++++++++++++++++++--- test/CodeGen/X86/vec_cast.ll | 3 +- test/CodeGen/X86/vec_set-8.ll | 7 ++- test/CodeGen/X86/vec_set-F.ll | 22 +++++- test/CodeGen/X86/vec_shuffle-17.ll | 7 ++- test/CodeGen/X86/vec_shuffle-37.ll | 5 +- test/CodeGen/X86/widen_load-0.ll | 8 ++- test/CodeGen/X86/x86-64-malloc.ll | 4 +- test/CodeGen/X86/xor.ll | 9 ++- 67 files changed, 884 insertions(+), 216 deletions(-) -------------- next part -------------- A non-text attachment was scrubbed... Name: 0001-test-CodeGen-X86-fold-mul-lohi.ll-FileCheck-ize-and-.patch Type: application/octet-stream Size: 898 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101122/6cdd9070/attachment-0010.obj -------------- next part -------------- A non-text attachment was scrubbed... Name: 0002-test-CodeGen-X86-red-zone.ll-Add-explicit-mtriple-x8.patch Type: application/octet-stream Size: 721 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101122/6cdd9070/attachment-0011.obj -------------- next part -------------- A non-text attachment was scrubbed... Name: 0003-test-CodeGen-X86-sse_reload_fold.ll-FileCheck-ize-an.patch Type: application/octet-stream Size: 976 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101122/6cdd9070/attachment-0012.obj -------------- next part -------------- A non-text attachment was scrubbed... Name: 0004-test-CodeGen-X86-store_op_load_fold2.ll-Add-a-test-f.patch Type: application/octet-stream Size: 1631 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101122/6cdd9070/attachment-0013.obj -------------- next part -------------- A non-text attachment was scrubbed... Name: 0005-test-CodeGen-X86-v2f32.ll-Fix-missing-tests-and-add-.patch Type: application/octet-stream Size: 3610 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101122/6cdd9070/attachment-0014.obj -------------- next part -------------- A non-text attachment was scrubbed... Name: 0006-test-CodeGen-X86-Add-the-as-is-pattern-for-Win64.patch Type: application/octet-stream Size: 24841 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101122/6cdd9070/attachment-0015.obj -------------- next part -------------- A non-text attachment was scrubbed... Name: 0007-test-CodeGen-X86-Mark-as-XFAIL-mingw-win32.-They-sho.patch Type: application/octet-stream Size: 5539 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101122/6cdd9070/attachment-0016.obj -------------- next part -------------- A non-text attachment was scrubbed... Name: 0008-test-CodeGen-X86-FileCheck-ize-with-relaxed-expressi.patch Type: application/octet-stream Size: 9715 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101122/6cdd9070/attachment-0017.obj -------------- next part -------------- A non-text attachment was scrubbed... Name: 0009-test-CodeGen-X86-FileCheck-ize-and-add-the-case-for-.patch Type: application/octet-stream Size: 9122 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101122/6cdd9070/attachment-0018.obj -------------- next part -------------- A non-text attachment was scrubbed... Name: 0010-test-CodeGen-X86-Relax-expressions-for-Win64.patch Type: application/octet-stream Size: 23794 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101122/6cdd9070/attachment-0019.obj From baldrick at free.fr Mon Nov 22 02:23:36 2010 From: baldrick at free.fr (Duncan Sands) Date: Mon, 22 Nov 2010 09:23:36 +0100 Subject: [llvm-commits] [llvm] r119922 - in /llvm/trunk: lib/Target/README.txt lib/Transforms/InstCombine/InstCombineCompares.cpp test/Transforms/InstCombine/icmp.ll In-Reply-To: <2E713725-02A2-4F6C-926C-959AFA706758@apple.com> References: <20101121064442.D67662A6C12C@llvm.org> <4CE922FD.8000108@free.fr> <4CE9512A.8070607@free.fr> <2E713725-02A2-4F6C-926C-959AFA706758@apple.com> Message-ID: <4CEA2888.7010807@free.fr> Hi Chris, > Thanks for the review! now I think about it some more, aren't all the conditions inverted? Consider this: // If the LHS is 1 << x, and we know the result is a power of 2 like 8, // then turn "((1 << x)&8) == 0" into "x == 3". Shouldn't that be "x != 3" not "x == 3"? Likewise for the others. Ciao, Duncan. From baldrick at free.fr Mon Nov 22 02:43:03 2010 From: baldrick at free.fr (Duncan Sands) Date: Mon, 22 Nov 2010 08:43:03 -0000 Subject: [llvm-commits] [dragonegg] r119959 - /dragonegg/trunk/www/index.html Message-ID: <20101122084303.EEF592A6C12D@llvm.org> Author: baldrick Date: Mon Nov 22 02:43:03 2010 New Revision: 119959 URL: http://llvm.org/viewvc/llvm-project?rev=119959&view=rev Log: Add a note about an LLVM-2.8 code generator bug that creates problems for OpenMP programs compiled at -O0. Modified: dragonegg/trunk/www/index.html Modified: dragonegg/trunk/www/index.html URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/www/index.html?rev=119959&r1=119958&r2=119959&view=diff ============================================================================== --- dragonegg/trunk/www/index.html (original) +++ dragonegg/trunk/www/index.html Mon Nov 22 02:43:03 2010 @@ -92,6 +92,9 @@ like floorf. The fix in subversion commit 118499 can be applied to the dragonegg-2.8 source to resolve the problem. +
  • Some OpenMP programs fail to work when compiled without optimization. + This has been fixed in the development version of LLVM. Compile at + -O1 or better to workaround this.

  • DragonEgg-2.7 was the first ever DragonEgg release. It works with LLVM-2.7 and From baldrick at free.fr Mon Nov 22 03:38:00 2010 From: baldrick at free.fr (Duncan Sands) Date: Mon, 22 Nov 2010 09:38:00 -0000 Subject: [llvm-commits] [llvm] r119962 - /llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp Message-ID: <20101122093800.540282A6C12C@llvm.org> Author: baldrick Date: Mon Nov 22 03:38:00 2010 New Revision: 119962 URL: http://llvm.org/viewvc/llvm-project?rev=119962&view=rev Log: Fix a compiler warning about Kind being used uninitialized when assertions are disabled. Modified: llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp Modified: llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp?rev=119962&r1=119961&r2=119962&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp Mon Nov 22 03:38:00 2010 @@ -408,13 +408,13 @@ dyn_cast(MO.getExpr())) { MCFixupKind Kind; switch (Expr->getKind()) { + default: assert(0 && "Unsupported ARMFixup"); case MCSymbolRefExpr::VK_ARM_HI16: Kind = MCFixupKind(ARM::fixup_arm_movt_hi16); break; case MCSymbolRefExpr::VK_ARM_LO16: Kind = MCFixupKind(ARM::fixup_arm_movw_lo16); break; - default: assert(0 && "Unsupported ARMFixup"); break; } Fixups.push_back(MCFixup::Create(0, Expr, Kind)); return 0; From baldrick at free.fr Mon Nov 22 03:41:24 2010 From: baldrick at free.fr (Duncan Sands) Date: Mon, 22 Nov 2010 09:41:24 -0000 Subject: [llvm-commits] [llvm] r119963 - /llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp Message-ID: <20101122094124.79EC92A6C12C@llvm.org> Author: baldrick Date: Mon Nov 22 03:41:24 2010 New Revision: 119963 URL: http://llvm.org/viewvc/llvm-project?rev=119963&view=rev Log: Don't keep track of inserted phis in PromoteMemoryToRegister: the information is never used. Patch by Cameron Zwarich. Modified: llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp Modified: llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp?rev=119963&r1=119962&r2=119963&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp Mon Nov 22 03:41:24 2010 @@ -265,8 +265,7 @@ void RenamePass(BasicBlock *BB, BasicBlock *Pred, RenamePassData::ValVector &IncVals, std::vector &Worklist); - bool QueuePhiNode(BasicBlock *BB, unsigned AllocaIdx, unsigned &Version, - SmallPtrSet &InsertedPHINodes); + bool QueuePhiNode(BasicBlock *BB, unsigned AllocaIdx, unsigned &Version); }; struct AllocaInfo { @@ -677,7 +676,6 @@ // Compute the locations where PhiNodes need to be inserted. Look at the // dominance frontier of EACH basic-block we have a write in. unsigned CurrentVersion = 0; - SmallPtrSet InsertedPHINodes; std::vector > DFBlocks; while (!Info.DefiningBlocks.empty()) { BasicBlock *BB = Info.DefiningBlocks.back(); @@ -710,7 +708,7 @@ for (unsigned i = 0, e = DFBlocks.size(); i != e; ++i) { BasicBlock *BB = DFBlocks[i].second; - if (QueuePhiNode(BB, AllocaNum, CurrentVersion, InsertedPHINodes)) + if (QueuePhiNode(BB, AllocaNum, CurrentVersion)) Info.DefiningBlocks.push_back(BB); } DFBlocks.clear(); @@ -901,8 +899,7 @@ // Alloca returns true if there wasn't already a phi-node for that variable // bool PromoteMem2Reg::QueuePhiNode(BasicBlock *BB, unsigned AllocaNo, - unsigned &Version, - SmallPtrSet &InsertedPHINodes) { + unsigned &Version) { // Look up the basic-block in question. PHINode *&PN = NewPhiNodes[std::make_pair(BB, AllocaNo)]; @@ -917,8 +914,6 @@ ++NumPHIInsert; PhiToAllocaMap[PN] = AllocaNo; PN->reserveOperandSpace(getNumPreds(BB)); - - InsertedPHINodes.insert(PN); if (AST && PN->getType()->isPointerTy()) AST->copyValue(PointerAllocaValues[AllocaNo], PN); From baldrick at free.fr Mon Nov 22 03:43:51 2010 From: baldrick at free.fr (Duncan Sands) Date: Mon, 22 Nov 2010 10:43:51 +0100 Subject: [llvm-commits] Review request: remove useless stores from mem2reg In-Reply-To: References: Message-ID: <4CEA3B57.1070200@free.fr> On 22/11/10 08:34, Cameron Zwarich wrote: > There is a set of inserted phis in PromoteMemoryToRegister.cpp that is maintained but never actually used anywhere. Removing it gives me a 1.2% speedup running mem2reg on test-suite, although some of this may just be due to random code motion in memory. I applied this in commit 119963. Thanks for the patch! Ciao, Duncan. From benny.kra at googlemail.com Mon Nov 22 03:45:39 2010 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Mon, 22 Nov 2010 09:45:39 -0000 Subject: [llvm-commits] [llvm] r119964 - in /llvm/trunk: lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp lib/Target/README.txt test/CodeGen/X86/switch-or.ll Message-ID: <20101122094539.3BCF62A6C12C@llvm.org> Author: d0k Date: Mon Nov 22 03:45:38 2010 New Revision: 119964 URL: http://llvm.org/viewvc/llvm-project?rev=119964&view=rev Log: Implement the "if (X == 6 || X == 4)" -> "if ((X|2) == 6)" optimization. This currently only catches the most basic case, a two-case switch, but can be extended later. Added: llvm/trunk/test/CodeGen/X86/switch-or.ll Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp llvm/trunk/lib/Target/README.txt Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=119964&r1=119963&r2=119964&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Mon Nov 22 03:45:38 2010 @@ -1753,10 +1753,56 @@ if (++BBI != FuncInfo.MF->end()) NextBlock = BBI; - // TODO: If any two of the cases has the same destination, and if one value + // If any two of the cases has the same destination, and if one value // is the same as the other, but has one bit unset that the other has set, // use bit manipulation to do two compares at once. For example: // "if (X == 6 || X == 4)" -> "if ((X|2) == 6)" + // TODO: This could be extended to merge any 2 cases in switches with 3 cases. + // TODO: Handle cases where CR.CaseBB != SwitchBB. + if (Size == 2 && CR.CaseBB == SwitchBB) { + Case &Small = *CR.Range.first; + Case &Big = *(CR.Range.second-1); + + if (Small.Low == Small.High && Big.Low == Big.High && Small.BB == Big.BB) { + const APInt& SmallValue = cast(Small.Low)->getValue(); + const APInt& BigValue = cast(Big.Low)->getValue(); + + // Check that there is only one bit different. + if (BigValue.countPopulation() == SmallValue.countPopulation() + 1 && + (SmallValue | BigValue) == BigValue) { + // Isolate the common bit. + APInt CommonBit = BigValue & ~SmallValue; + assert((SmallValue | CommonBit) == BigValue && + CommonBit.countPopulation() == 1 && "Not a common bit?"); + + SDValue CondLHS = getValue(SV); + EVT VT = CondLHS.getValueType(); + DebugLoc DL = getCurDebugLoc(); + + SDValue Or = DAG.getNode(ISD::OR, DL, VT, CondLHS, + DAG.getConstant(CommonBit, VT)); + SDValue Cond = DAG.getSetCC(DL, MVT::i1, + Or, DAG.getConstant(BigValue, VT), + ISD::SETEQ); + + // Update successor info. + SwitchBB->addSuccessor(Small.BB); + SwitchBB->addSuccessor(Default); + + // Insert the true branch. + SDValue BrCond = DAG.getNode(ISD::BRCOND, DL, MVT::Other, + getControlRoot(), Cond, + DAG.getBasicBlock(Small.BB)); + + // Insert the false branch. + BrCond = DAG.getNode(ISD::BR, DL, MVT::Other, BrCond, + DAG.getBasicBlock(Default)); + + DAG.setRoot(BrCond); + return true; + } + } + } // Rearrange the case blocks so that the last one falls through if possible. if (NextBlock && Default != NextBlock && BackCase.BB != NextBlock) { Modified: llvm/trunk/lib/Target/README.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/README.txt?rev=119964&r1=119963&r2=119964&view=diff ============================================================================== --- llvm/trunk/lib/Target/README.txt (original) +++ llvm/trunk/lib/Target/README.txt Mon Nov 22 03:45:38 2010 @@ -938,16 +938,6 @@ //===---------------------------------------------------------------------===// -void a(int variable) -{ - if (variable == 4 || variable == 6) - bar(); -} -This should optimize to "if ((variable | 2) == 6)". Currently not -optimized with "clang -emit-llvm-bc | opt -std-compile-opts | llc". - -//===---------------------------------------------------------------------===// - unsigned int f(unsigned int i, unsigned int n) {++i; if (i == n) ++i; return i;} unsigned int f2(unsigned int i, unsigned int n) {++i; i += i == n; return i;} Added: llvm/trunk/test/CodeGen/X86/switch-or.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/switch-or.ll?rev=119964&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/switch-or.ll (added) +++ llvm/trunk/test/CodeGen/X86/switch-or.ll Mon Nov 22 03:45:38 2010 @@ -0,0 +1,22 @@ +; RUN: llc -march=x86 -asm-verbose=false < %s | FileCheck %s + +; Check that merging switch cases that differ in one bit works. +; CHECK: orl $2 +; CHECK-NEXT: cmpl $6 + +define void @foo(i32 %variable) nounwind { +entry: + switch i32 %variable, label %if.end [ + i32 4, label %if.then + i32 6, label %if.then + ] + +if.then: + %call = tail call i32 (...)* @bar() nounwind + ret void + +if.end: + ret void +} + +declare i32 @bar(...) nounwind From baldrick at free.fr Mon Nov 22 03:51:08 2010 From: baldrick at free.fr (Duncan Sands) Date: Mon, 22 Nov 2010 10:51:08 +0100 Subject: [llvm-commits] [llvm] r119964 - in /llvm/trunk: lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp lib/Target/README.txt test/CodeGen/X86/switch-or.ll In-Reply-To: <20101122094539.3BCF62A6C12C@llvm.org> References: <20101122094539.3BCF62A6C12C@llvm.org> Message-ID: <4CEA3D0C.30102@free.fr> Hi Benjamin, > Implement the "if (X == 6 || X == 4)" -> "if ((X|2) == 6)" optimization. wouldn't it be better to do this in the IR optimizers? Ciao, Duncan. From zwarich at apple.com Mon Nov 22 03:56:36 2010 From: zwarich at apple.com (Cameron Zwarich) Date: Mon, 22 Nov 2010 04:56:36 -0500 Subject: [llvm-commits] Review request: dominator tree construction speedup Message-ID: <5BAC0948-3163-4C50-9D36-4127BA8A5EDF@apple.com> There is a cheap speedup in the implementation of the Lengauer-Tarjan algorithm. In the main loop, when you are about to add a node to its semidominator's bucket, you first check if the semidominator is the node's parent. If it is, then you know that its immediate dominator will be its parent and there is no need to put it into the bucket for later processing. This is a 9.7% speedup running domtree on test-suite. -------------- next part -------------- A non-text attachment was scrubbed... Name: doms-check.patch Type: application/octet-stream Size: 735 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101122/32931b62/attachment.obj -------------- next part -------------- Cameron From benny.kra at googlemail.com Mon Nov 22 04:18:28 2010 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Mon, 22 Nov 2010 11:18:28 +0100 Subject: [llvm-commits] [llvm] r119964 - in /llvm/trunk: lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp lib/Target/README.txt test/CodeGen/X86/switch-or.ll In-Reply-To: <4CEA3D0C.30102@free.fr> References: <20101122094539.3BCF62A6C12C@llvm.org> <4CEA3D0C.30102@free.fr> Message-ID: <1E291ABF-AFC3-4CB7-8886-5AB2A971463D@gmail.com> On 22.11.2010, at 10:51, Duncan Sands wrote: > Hi Benjamin, > >> Implement the "if (X == 6 || X == 4)" -> "if ((X|2) == 6)" optimization. > > wouldn't it be better to do this in the IR optimizers? Well, the TODO comment was already there ;) I think doing it in CodeGen can also optimize stuff when it decides to lower a big switch as several smaller switches in a binary tree. We don't optimize those cases at the moment though because I'm lazy :( From baldrick at free.fr Mon Nov 22 04:23:45 2010 From: baldrick at free.fr (Duncan Sands) Date: Mon, 22 Nov 2010 11:23:45 +0100 Subject: [llvm-commits] [llvm] r119942 - in /llvm/trunk: lib/Analysis/InstructionSimplify.cpp test/Transforms/InstCombine/2010-11-21-SizeZeroTypeGEP.ll In-Reply-To: References: <20101121135310.259DE2A6C12C@llvm.org> Message-ID: <4CEA44B1.1040700@free.fr> Hi Frits, >> More generally, if a gep index type has size zero, instcombine could replace the >> index with zero, but that is not done here. > > You *could* do that here in certain cases. For instance, if the > pointer operand is constant and all non-constant indices are over > zero-sized types you could fold it to a constexpr gep with those > indices zero (or even a bitcast if all indices are then zero). > > Might not be worth it though, as you'd probably still have to > duplicate pretty much all of that logic in instcombine to handle geps > with non-constant indices over non-zero-sized types. (And how many > non-constant indices over zero-sized types are you likely to encounter > anyway?) yeah, I don't think it is worth it. If instcombine modifies indices for zero sized types, changing them to zero, then if all of the other indices are constant then the GEP will be constant folded using the existing logic. I think this is good enough. Ciao, Duncan. From rafael.espindola at gmail.com Mon Nov 22 05:53:18 2010 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Mon, 22 Nov 2010 11:53:18 -0000 Subject: [llvm-commits] [llvm] r119967 - in /llvm/trunk: include/llvm/MC/MCDwarf.h lib/MC/MCDwarf.cpp Message-ID: <20101122115318.16F572A6C12C@llvm.org> Author: rafael Date: Mon Nov 22 05:53:17 2010 New Revision: 119967 URL: http://llvm.org/viewvc/llvm-project?rev=119967&view=rev Log: Remove some #includes. Modified: llvm/trunk/include/llvm/MC/MCDwarf.h llvm/trunk/lib/MC/MCDwarf.cpp Modified: llvm/trunk/include/llvm/MC/MCDwarf.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCDwarf.h?rev=119967&r1=119966&r2=119967&view=diff ============================================================================== --- llvm/trunk/include/llvm/MC/MCDwarf.h (original) +++ llvm/trunk/include/llvm/MC/MCDwarf.h Mon Nov 22 05:53:17 2010 @@ -16,8 +16,6 @@ #define LLVM_MC_MCDWARF_H #include "llvm/ADT/StringRef.h" -#include "llvm/MC/MCStreamer.h" -#include "llvm/MC/MCObjectStreamer.h" #include "llvm/MC/MCObjectWriter.h" #include "llvm/Support/raw_ostream.h" #include "llvm/Support/Dwarf.h" @@ -26,6 +24,8 @@ namespace llvm { class MCContext; class MCSection; + class MCSectionData; + class MCStreamer; class MCSymbol; class MCObjectStreamer; class raw_ostream; Modified: llvm/trunk/lib/MC/MCDwarf.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCDwarf.cpp?rev=119967&r1=119966&r2=119967&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCDwarf.cpp (original) +++ llvm/trunk/lib/MC/MCDwarf.cpp Mon Nov 22 05:53:17 2010 @@ -9,6 +9,7 @@ #include "llvm/MC/MCDwarf.h" #include "llvm/MC/MCAssembler.h" +#include "llvm/MC/MCStreamer.h" #include "llvm/MC/MCSymbol.h" #include "llvm/MC/MCExpr.h" #include "llvm/MC/MCContext.h" From geek4civic at gmail.com Mon Nov 22 05:56:31 2010 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Mon, 22 Nov 2010 20:56:31 +0900 Subject: [llvm-commits] [Review request] unittests/JITTests on Cygming. Message-ID: unittests/JITTests can run on Cygming. Makefile.rules | 16 +++++++++++----- unittests/CMakeLists.txt | 4 ++++ unittests/Makefile.unittest | 8 +++++--- 3 files changed, 20 insertions(+), 8 deletions(-) GNU ld/PECOFF accepts but ignores them below; --version-script --export-dynamic --rpath Although it would be better to detect them with autoconf, for now, they can be suppressed in Makefile.rules. To link with --export-all-symbols, unittests/JITTests can run. ...Takumi -------------- next part -------------- A non-text attachment was scrubbed... Name: 0001-unittests-JITTests-Don-t-use-export-dynamic-but-expo.patch Type: application/octet-stream Size: 2863 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101122/78f1cb6c/attachment.obj From geek4civic at gmail.com Mon Nov 22 07:02:37 2010 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Mon, 22 Nov 2010 22:02:37 +0900 Subject: [llvm-commits] [Review request] test: Add the new feature "loadable_module" In-Reply-To: References: Message-ID: Good evening. I re-assembled my patches. Excuse me, please take a look, thank you. * 0001-test-Add-the-new-feature-loadable_module.patch (application/octet-stream) 2K Same as the last one. It adds the feature but do nothing. * 0002-test-Use-SharedLibDir-for-loadable-modules.-On-Cygmi.patch (application/octet-stream) 5K It passes $SharedLibDir to lit. * 0003-Makefile-Change-the-order-of-building-lib-Transforms.patch (application/octet-stream) 2K It changes the order of building "LLVMHello" after building tools. On cygming, LLVMHello.dll can be built after LLVM.dll. * 0004-tools-Makefile-Enable-building-lto-edis-and-bugpoint.patch (application/octet-stream) 2K It enables building butpoint-passes, edis and LTO on Cygming. bugpoint-passes can be built with LLVM.dll. * 0005-test-Check-the-feature-loadable_module-with-load-mod.patch (application/octet-stream) 4K It enables tests. ...Takumi -------------- next part -------------- A non-text attachment was scrubbed... Name: 0001-test-Add-the-new-feature-loadable_module.patch Type: application/octet-stream Size: 2030 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101122/7c4f8265/attachment.obj -------------- next part -------------- A non-text attachment was scrubbed... Name: 0002-test-Use-SharedLibDir-for-loadable-modules.-On-Cygmi.patch Type: application/octet-stream Size: 4162 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101122/7c4f8265/attachment-0001.obj -------------- next part -------------- A non-text attachment was scrubbed... Name: 0003-Makefile-Change-the-order-of-building-lib-Transforms.patch Type: application/octet-stream Size: 1739 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101122/7c4f8265/attachment-0002.obj -------------- next part -------------- A non-text attachment was scrubbed... Name: 0004-tools-Makefile-Enable-building-lto-edis-and-bugpoint.patch Type: application/octet-stream Size: 1492 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101122/7c4f8265/attachment-0003.obj -------------- next part -------------- A non-text attachment was scrubbed... Name: 0005-test-Check-the-feature-loadable_module-with-load-mod.patch Type: application/octet-stream Size: 3867 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101122/7c4f8265/attachment-0004.obj From baldrick at free.fr Mon Nov 22 07:42:49 2010 From: baldrick at free.fr (Duncan Sands) Date: Mon, 22 Nov 2010 13:42:49 -0000 Subject: [llvm-commits] [llvm] r119970 - in /llvm/trunk/lib: Analysis/InstructionSimplify.cpp Transforms/InstCombine/InstructionCombining.cpp Message-ID: <20101122134249.84DF22A6C12C@llvm.org> Author: baldrick Date: Mon Nov 22 07:42:49 2010 New Revision: 119970 URL: http://llvm.org/viewvc/llvm-project?rev=119970&view=rev Log: Move the "gep undef" -> "undef" transform from instcombine to InstructionSimplify. Modified: llvm/trunk/lib/Analysis/InstructionSimplify.cpp llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp Modified: llvm/trunk/lib/Analysis/InstructionSimplify.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/InstructionSimplify.cpp?rev=119970&r1=119969&r2=119970&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/InstructionSimplify.cpp (original) +++ llvm/trunk/lib/Analysis/InstructionSimplify.cpp Mon Nov 22 07:42:49 2010 @@ -691,13 +691,20 @@ /// fold the result. If not, this returns null. Value *llvm::SimplifyGEPInst(Value *const *Ops, unsigned NumOps, const TargetData *TD, const DominatorTree *) { + // The type of the GEP pointer operand. + const PointerType *PtrTy = cast(Ops[0]->getType()); + // getelementptr P -> P. if (NumOps == 1) return Ops[0]; - // TODO. - //if (isa(Ops[0])) - // return UndefValue::get(GEP.getType()); + if (isa(Ops[0])) { + // Compute the (pointer) type returned by the GEP instruction. + const Type *LastType = GetElementPtrInst::getIndexedType(PtrTy, &Ops[1], + NumOps-1); + const Type *GEPTy = PointerType::get(LastType, PtrTy->getAddressSpace()); + return UndefValue::get(GEPTy); + } if (NumOps == 2) { // getelementptr P, 0 -> P. @@ -706,7 +713,7 @@ return Ops[0]; // getelementptr P, N -> P if P points to a type of zero size. if (TD) { - const Type *Ty = cast(Ops[0]->getType())->getElementType(); + const Type *Ty = PtrTy->getElementType(); if (Ty->isSized() && !TD->getTypeAllocSize(Ty)) return Ops[0]; } Modified: llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp?rev=119970&r1=119969&r2=119970&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp Mon Nov 22 07:42:49 2010 @@ -523,9 +523,6 @@ Value *PtrOp = GEP.getOperand(0); - if (isa(GEP.getOperand(0))) - return ReplaceInstUsesWith(GEP, UndefValue::get(GEP.getType())); - // Eliminate unneeded casts for indices. if (TD) { bool MadeChange = false; From rafael.espindola at gmail.com Mon Nov 22 08:27:24 2010 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Mon, 22 Nov 2010 14:27:24 -0000 Subject: [llvm-commits] [llvm] r119972 - in /llvm/trunk: include/llvm/MC/MCStreamer.h lib/MC/MCAsmStreamer.cpp lib/MC/MCParser/AsmParser.cpp lib/MC/MCStreamer.cpp Message-ID: <20101122142724.688252A6C12C@llvm.org> Author: rafael Date: Mon Nov 22 08:27:24 2010 New Revision: 119972 URL: http://llvm.org/viewvc/llvm-project?rev=119972&view=rev Log: Add basic CFI methods to the streamer interface. Modified: llvm/trunk/include/llvm/MC/MCStreamer.h llvm/trunk/lib/MC/MCAsmStreamer.cpp llvm/trunk/lib/MC/MCParser/AsmParser.cpp llvm/trunk/lib/MC/MCStreamer.cpp Modified: llvm/trunk/include/llvm/MC/MCStreamer.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCStreamer.h?rev=119972&r1=119971&r2=119972&view=diff ============================================================================== --- llvm/trunk/include/llvm/MC/MCStreamer.h (original) +++ llvm/trunk/include/llvm/MC/MCStreamer.h Mon Nov 22 08:27:24 2010 @@ -352,6 +352,14 @@ unsigned Isa, unsigned Discriminator); + virtual bool EmitCFIStartProc(); + virtual bool EmitCFIEndProc(); + virtual bool EmitCFIDefCfaOffset(int64_t Offset); + virtual bool EmitCFIDefCfaRegister(int64_t Register); + virtual bool EmitCFIOffset(int64_t Register, int64_t Offset); + virtual bool EmitCFIPersonality(const MCSymbol *Sym); + virtual bool EmitCFILsda(const MCSymbol *Sym); + /// EmitInstruction - Emit the given @p Instruction into the current /// section. virtual void EmitInstruction(const MCInst &Inst) = 0; Modified: llvm/trunk/lib/MC/MCAsmStreamer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCAsmStreamer.cpp?rev=119972&r1=119971&r2=119972&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCAsmStreamer.cpp (original) +++ llvm/trunk/lib/MC/MCAsmStreamer.cpp Mon Nov 22 08:27:24 2010 @@ -177,6 +177,14 @@ unsigned Column, unsigned Flags, unsigned Isa, unsigned Discriminator); + virtual bool EmitCFIStartProc(); + virtual bool EmitCFIEndProc(); + virtual bool EmitCFIDefCfaOffset(int64_t Offset); + virtual bool EmitCFIDefCfaRegister(int64_t Register); + virtual bool EmitCFIOffset(int64_t Register, int64_t Offset); + virtual bool EmitCFIPersonality(const MCSymbol *Sym); + virtual bool EmitCFILsda(const MCSymbol *Sym); + virtual void EmitInstruction(const MCInst &Inst); /// EmitRawText - If this file is backed by an assembly streamer, this dumps @@ -702,6 +710,76 @@ EmitEOL(); } +bool MCAsmStreamer::EmitCFIStartProc() { + if (this->MCStreamer::EmitCFIStartProc()) + return true; + + OS << ".cfi_startproc"; + EmitEOL(); + + return false; +} + +bool MCAsmStreamer::EmitCFIEndProc() { + if (this->MCStreamer::EmitCFIEndProc()) + return true; + + OS << ".cfi_endproc"; + EmitEOL(); + + return false; +} + +bool MCAsmStreamer::EmitCFIDefCfaOffset(int64_t Offset) { + if (this->MCStreamer::EmitCFIDefCfaOffset(Offset)) + return true; + + OS << ".cfi_def_cfa_offset " << Offset; + EmitEOL(); + + return false; +} + +bool MCAsmStreamer::EmitCFIDefCfaRegister(int64_t Register) { + if (this->MCStreamer::EmitCFIDefCfaRegister(Register)) + return true; + + OS << ".cfi_def_cfa_register " << Register; + EmitEOL(); + + return false; +} + +bool MCAsmStreamer::EmitCFIOffset(int64_t Register, int64_t Offset) { + if (this->MCStreamer::EmitCFIOffset(Register, Offset)) + return true; + + OS << ".cfi_offset " << Register << ", " << Offset; + EmitEOL(); + + return false; +} + +bool MCAsmStreamer::EmitCFIPersonality(const MCSymbol *Sym) { + if (this->MCStreamer::EmitCFIPersonality(Sym)) + return true; + + OS << ".cfi_personality 0, " << *Sym; + EmitEOL(); + + return false; +} + +bool MCAsmStreamer::EmitCFILsda(const MCSymbol *Sym) { + if (this->MCStreamer::EmitCFILsda(Sym)) + return true; + + OS << ".cfi_lsda 0, " << *Sym; + EmitEOL(); + + return false; +} + void MCAsmStreamer::AddEncodingComment(const MCInst &Inst) { raw_ostream &OS = GetCommentOS(); SmallString<256> Code; Modified: llvm/trunk/lib/MC/MCParser/AsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCParser/AsmParser.cpp?rev=119972&r1=119971&r2=119972&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCParser/AsmParser.cpp (original) +++ llvm/trunk/lib/MC/MCParser/AsmParser.cpp Mon Nov 22 08:27:24 2010 @@ -2151,13 +2151,13 @@ /// ::= .cfi_startproc bool GenericAsmParser::ParseDirectiveCFIStartProc(StringRef, SMLoc DirectiveLoc) { - return false; + return getStreamer().EmitCFIStartProc(); } /// ParseDirectiveCFIEndProc /// ::= .cfi_endproc bool GenericAsmParser::ParseDirectiveCFIEndProc(StringRef, SMLoc DirectiveLoc) { - return false; + return getStreamer().EmitCFIEndProc(); } /// ParseDirectiveCFIDefCfaOffset @@ -2168,7 +2168,7 @@ if (getParser().ParseAbsoluteExpression(Offset)) return true; - return false; + return getStreamer().EmitCFIDefCfaOffset(Offset); } /// ParseDirectiveCFIDefCfaRegister @@ -2178,7 +2178,8 @@ int64_t Register = 0; if (getParser().ParseAbsoluteExpression(Register)) return true; - return false; + + return getStreamer().EmitCFIDefCfaRegister(Register); } /// ParseDirectiveCFIOffset @@ -2196,13 +2197,13 @@ if (getParser().ParseAbsoluteExpression(Offset)) return true; - return false; + return getStreamer().EmitCFIOffset(Register, Offset); } /// ParseDirectiveCFIPersonalityOrLsda /// ::= .cfi_personality encoding, [symbol_name] /// ::= .cfi_lsda encoding, [symbol_name] -bool GenericAsmParser::ParseDirectiveCFIPersonalityOrLsda(StringRef, +bool GenericAsmParser::ParseDirectiveCFIPersonalityOrLsda(StringRef IDVal, SMLoc DirectiveLoc) { int64_t Encoding = 0; if (getParser().ParseAbsoluteExpression(Encoding)) @@ -2210,6 +2211,9 @@ if (Encoding == 255) return false; + if (Encoding != 0) + return TokError("unsupported encoding."); + if (getLexer().isNot(AsmToken::Comma)) return TokError("unexpected token in directive"); Lex(); @@ -2217,7 +2221,15 @@ StringRef Name; if (getParser().ParseIdentifier(Name)) return TokError("expected identifier in directive"); - return false; + + MCSymbol *Sym = getContext().GetOrCreateSymbol(Name); + + if (IDVal == ".cfi_personality") + return getStreamer().EmitCFIPersonality(Sym); + else { + assert(IDVal == ".cfi_lsda"); + return getStreamer().EmitCFILsda(Sym); + } } /// ParseDirectiveMacrosOnOff Modified: llvm/trunk/lib/MC/MCStreamer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCStreamer.cpp?rev=119972&r1=119971&r2=119972&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCStreamer.cpp (original) +++ llvm/trunk/lib/MC/MCStreamer.cpp Mon Nov 22 08:27:24 2010 @@ -77,6 +77,34 @@ Discriminator); } +bool MCStreamer::EmitCFIStartProc() { + return false; +} + +bool MCStreamer::EmitCFIEndProc() { + return false; +} + +bool MCStreamer::EmitCFIDefCfaOffset(int64_t Offset) { + return false; +} + +bool MCStreamer::EmitCFIDefCfaRegister(int64_t Register) { + return false; +} + +bool MCStreamer::EmitCFIOffset(int64_t Register, int64_t Offset) { + return false; +} + +bool MCStreamer::EmitCFIPersonality(const MCSymbol *Sym) { + return false; +} + +bool MCStreamer::EmitCFILsda(const MCSymbol *Sym) { + return false; +} + /// EmitRawText - If this file is backed by an assembly streamer, this dumps /// the specified string in the output .s file. This capability is /// indicated by the hasRawTextSupport() predicate. From kalle.raiskila at nokia.com Mon Nov 22 10:28:26 2010 From: kalle.raiskila at nokia.com (Kalle Raiskila) Date: Mon, 22 Nov 2010 16:28:26 -0000 Subject: [llvm-commits] [llvm] r119973 - in /llvm/trunk: lib/Target/CellSPU/SPUISelLowering.cpp test/CodeGen/CellSPU/rotate_ops.ll Message-ID: <20101122162826.9E0642A6C12C@llvm.org> Author: kraiskil Date: Mon Nov 22 10:28:26 2010 New Revision: 119973 URL: http://llvm.org/viewvc/llvm-project?rev=119973&view=rev Log: Fix a bug with extractelement on SPU. In the attached testcase, the element was never extracted (missing rotate). Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp llvm/trunk/test/CodeGen/CellSPU/rotate_ops.ll Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp?rev=119973&r1=119972&r2=119973&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Mon Nov 22 10:28:26 2010 @@ -1885,13 +1885,13 @@ if (PrevElt > 0 && SrcElt < MaxElts) { if ((PrevElt == SrcElt - 1) || (PrevElt == MaxElts - 1 && SrcElt == 0)) { - rotamt = SrcElt-i; PrevElt = SrcElt; } else { rotate = false; } } else if (i == 0 || (PrevElt==0 && SrcElt==1)) { // First time or after a "wrap around" + rotamt = SrcElt-i; PrevElt = SrcElt; } else { // This isn't a rotation, takes elements from vector 2 Modified: llvm/trunk/test/CodeGen/CellSPU/rotate_ops.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/rotate_ops.ll?rev=119973&r1=119972&r2=119973&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/rotate_ops.ll (original) +++ llvm/trunk/test/CodeGen/CellSPU/rotate_ops.ll Mon Nov 22 10:28:26 2010 @@ -1,5 +1,5 @@ ; RUN: llc < %s -march=cellspu -o %t1.s -; RUN: grep rot %t1.s | count 85 +; RUN: grep rot %t1.s | count 86 ; RUN: grep roth %t1.s | count 8 ; RUN: grep roti.*5 %t1.s | count 1 ; RUN: grep roti.*27 %t1.s | count 1 @@ -8,6 +8,7 @@ ; RUN grep rothi.*,.3 %t1.s | count 1 ; RUN: grep andhi %t1.s | count 4 ; RUN: grep shlhi %t1.s | count 4 +; RUN: cat %t1.s | FileCheck %s target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128" target triple = "spu" @@ -158,3 +159,14 @@ %D = or i8 %B, %C ; [#uses=1] ret i8 %D } + +define <2 x float> @test1(<4 x float> %param ) +{ +; CHECK: test1 +; CHECK: rotqbyi + %el = extractelement <4 x float> %param, i32 1 + %vec1 = insertelement <1 x float> undef, float %el, i32 0 + %rv = shufflevector <1 x float> %vec1, <1 x float> undef, <2 x i32> +; CHECK: bi $lr + ret <2 x float> %rv +} From baldrick at free.fr Mon Nov 22 10:32:50 2010 From: baldrick at free.fr (Duncan Sands) Date: Mon, 22 Nov 2010 16:32:50 -0000 Subject: [llvm-commits] [llvm] r119974 - in /llvm/trunk: lib/Analysis/InstructionSimplify.cpp lib/Transforms/InstCombine/InstructionCombining.cpp test/Transforms/InstCombine/2010-11-21-SizeZeroTypeGEP.ll Message-ID: <20101122163250.5B7662A6C12C@llvm.org> Author: baldrick Date: Mon Nov 22 10:32:50 2010 New Revision: 119974 URL: http://llvm.org/viewvc/llvm-project?rev=119974&view=rev Log: If a GEP index simply advances by multiples of a type of zero size, then replace the index with zero. Modified: llvm/trunk/lib/Analysis/InstructionSimplify.cpp llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp llvm/trunk/test/Transforms/InstCombine/2010-11-21-SizeZeroTypeGEP.ll Modified: llvm/trunk/lib/Analysis/InstructionSimplify.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/InstructionSimplify.cpp?rev=119974&r1=119973&r2=119974&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/InstructionSimplify.cpp (original) +++ llvm/trunk/lib/Analysis/InstructionSimplify.cpp Mon Nov 22 10:32:50 2010 @@ -714,7 +714,7 @@ // getelementptr P, N -> P if P points to a type of zero size. if (TD) { const Type *Ty = PtrTy->getElementType(); - if (Ty->isSized() && !TD->getTypeAllocSize(Ty)) + if (Ty->isSized() && TD->getTypeAllocSize(Ty) == 0) return Ops[0]; } } Modified: llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp?rev=119974&r1=119973&r2=119974&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp Mon Nov 22 10:32:50 2010 @@ -523,25 +523,35 @@ Value *PtrOp = GEP.getOperand(0); - // Eliminate unneeded casts for indices. + // Eliminate unneeded casts for indices, and replace indices which displace + // by multiples of a zero size type with zero. if (TD) { bool MadeChange = false; - unsigned PtrSize = TD->getPointerSizeInBits(); - + const Type *IntPtrTy = TD->getIntPtrType(GEP.getContext()); + gep_type_iterator GTI = gep_type_begin(GEP); for (User::op_iterator I = GEP.op_begin() + 1, E = GEP.op_end(); I != E; ++I, ++GTI) { - if (!isa(*GTI)) continue; - - // If we are using a wider index than needed for this platform, shrink it - // to what we need. If narrower, sign-extend it to what we need. This - // explicit cast can make subsequent optimizations more obvious. - unsigned OpBits = cast((*I)->getType())->getBitWidth(); - if (OpBits == PtrSize) - continue; - - *I = Builder->CreateIntCast(*I, TD->getIntPtrType(GEP.getContext()),true); - MadeChange = true; + // Skip indices into struct types. + const SequentialType *SeqTy = dyn_cast(*GTI); + if (!SeqTy) continue; + + // If the element type has zero size then any index over it is equivalent + // to an index of zero, so replace it with zero if it is not zero already. + if (SeqTy->getElementType()->isSized() && + TD->getTypeAllocSize(SeqTy->getElementType()) == 0) + if (!isa(*I) || !cast(*I)->isNullValue()) { + *I = Constant::getNullValue(IntPtrTy); + MadeChange = true; + } + + if ((*I)->getType() != IntPtrTy) { + // If we are using a wider index than needed for this platform, shrink + // it to what we need. If narrower, sign-extend it to what we need. + // This explicit cast can make subsequent optimizations more obvious. + *I = Builder->CreateIntCast(*I, IntPtrTy, true); + MadeChange = true; + } } if (MadeChange) return &GEP; } Modified: llvm/trunk/test/Transforms/InstCombine/2010-11-21-SizeZeroTypeGEP.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2010-11-21-SizeZeroTypeGEP.ll?rev=119974&r1=119973&r2=119974&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/2010-11-21-SizeZeroTypeGEP.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/2010-11-21-SizeZeroTypeGEP.ll Mon Nov 22 10:32:50 2010 @@ -1,8 +1,17 @@ -; RUN: opt < %s -instcombine -S | not grep getelementptr +; RUN: opt < %s -instcombine -S | FileCheck %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" define {}* @foo({}* %x, i32 %n) { +; CHECK: @foo +; CHECK-NOT: getelementptr %p = getelementptr {}* %x, i32 %n ret {}* %p } + +define i8* @bar(i64 %n, {{}, [0 x {[0 x i8]}]}* %p) { +; CHECK: @bar + %g = getelementptr {{}, [0 x {[0 x i8]}]}* %p, i64 %n, i32 1, i64 %n, i32 0, i64 %n +; CHECK: %p, i64 0, i32 1, i64 0, i32 0, i64 %n + ret i8* %g +} From foldr at codedgers.com Mon Nov 22 11:10:09 2010 From: foldr at codedgers.com (Mikhail Glushenkov) Date: Mon, 22 Nov 2010 17:10:09 -0000 Subject: [llvm-commits] [llvm] r119975 - /llvm/trunk/tools/llvmc/src/Base.td.in Message-ID: <20101122171009.4DA3B2A6C12C@llvm.org> Author: foldr Date: Mon Nov 22 11:10:09 2010 New Revision: 119975 URL: http://llvm.org/viewvc/llvm-project?rev=119975&view=rev Log: llvmc: Make -march/-mcpu/-mtune behaviour more consistent with gcc. Modified: llvm/trunk/tools/llvmc/src/Base.td.in Modified: llvm/trunk/tools/llvmc/src/Base.td.in URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/src/Base.td.in?rev=119975&r1=119974&r2=119975&view=diff ============================================================================== --- llvm/trunk/tools/llvmc/src/Base.td.in (original) +++ llvm/trunk/tools/llvmc/src/Base.td.in Mon Nov 22 11:10:09 2010 @@ -11,7 +11,6 @@ // //===----------------------------------------------------------------------===// - // Options def OptList : OptionList<[ @@ -46,9 +45,9 @@ (parameter_option "linker", (help "Choose linker (possible values: gcc, g++)")), (parameter_option "mtune", - (help "Target a specific CPU type"), (hidden), (forward_not_split)), + (help "Target a specific CPU type"), (forward_not_split)), (parameter_option "march", - (help "A synonym for -mtune"), (hidden), (forward_not_split)), + (help "Architecture to generate code for"), (forward_not_split)), (parameter_option "mcpu", (help "A deprecated synonym for -mtune"), (hidden), (forward_not_split)), (switch_option "mfix-and-continue", @@ -203,8 +202,8 @@ (not_empty "D"), (forward "D"), (not_empty "arch"), (forward "arch"), (not_empty "march"), (forward "march"), - (not_empty "mtune"), (forward "mtune"), (not_empty "mcpu"), (forward "mcpu"), + (not_empty "mtune"), (forward "mtune"), (not_empty "m"), (forward "m"), (switch_on "mfix-and-continue"), (forward "mfix-and-continue"), (switch_on "m32"), (forward "m32"), @@ -296,9 +295,10 @@ (switch_on "fPIC"), (append_cmd "-relocation-model=pic"), (switch_on "mdynamic-no-pic"), (append_cmd "-relocation-model=dynamic-no-pic"), - (not_empty "march"), (forward_as "march", "-mcpu"), - (not_empty "mtune"), (forward_as "mtune", "-mcpu"), + (not_empty "march"), (forward "march"), (not_empty "mcpu"), (forward "mcpu"), + (and (not_empty "mtune"), (empty "mcpu")), + (forward_as "mtune", "-mcpu"), (not_empty "m"), (forward_transformed_value "m", "ConvertToMAttr"), (not_empty "Wllc,"), (forward_value "Wllc,"))) ]>; From foldr at codedgers.com Mon Nov 22 11:10:20 2010 From: foldr at codedgers.com (Mikhail Glushenkov) Date: Mon, 22 Nov 2010 17:10:20 -0000 Subject: [llvm-commits] [llvm] r119976 - /llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst Message-ID: <20101122171020.6C2F72A6C12C@llvm.org> Author: foldr Date: Mon Nov 22 11:10:20 2010 New Revision: 119976 URL: http://llvm.org/viewvc/llvm-project?rev=119976&view=rev Log: Add a newline. Modified: llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst Modified: llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst?rev=119976&r1=119975&r2=119976&view=diff ============================================================================== --- llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst (original) +++ llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst Mon Nov 22 11:10:20 2010 @@ -319,7 +319,8 @@ - ``alias_option`` - a special option type for creating aliases. Unlike other option types, aliases are not allowed to have any properties besides the - aliased option name. Usage example: ``(alias_option "preprocess", "E")`` + aliased option name. + Usage example: ``(alias_option "preprocess", "E")`` - ``switch_list_option`` - like ``switch_option`` with the ``zero_or_more`` property, but remembers how many times the switch was turned on. Useful From evan.cheng at apple.com Mon Nov 22 12:12:04 2010 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 22 Nov 2010 18:12:04 -0000 Subject: [llvm-commits] [llvm] r119977 - in /llvm/trunk: lib/Target/ARM/ARMBaseRegisterInfo.cpp lib/Target/ARM/ARMFrameInfo.cpp lib/Target/ARM/Thumb1FrameInfo.cpp test/CodeGen/ARM/hello.ll test/CodeGen/Thumb/dyn-stackalloc.ll test/CodeGen/Thumb/large-stack.ll test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll test/CodeGen/Thumb2/2010-08-10-VarSizedAllocaBug.ll test/CodeGen/Thumb2/2010-11-22-EpilogueBug.ll Message-ID: <20101122181204.C44682A6C12C@llvm.org> Author: evancheng Date: Mon Nov 22 12:12:04 2010 New Revision: 119977 URL: http://llvm.org/viewvc/llvm-project?rev=119977&view=rev Log: Fix epilogue codegen to avoid leaving the stack pointer in an invalid state. Previously Thumb2 would restore sp from fp like this: mov sp, r7 sub, sp, #4 If an interrupt is taken after the 'mov' but before the 'sub', callee-saved registers might be clobbered by the interrupt handler. Instead, try restoring directly from sp: add sp, #4 Or, if necessary (with VLA, etc.) use a scratch register to compute sp and then restore it: sub.w r4, r7, #8 mov sp, r7 rdar://8465407 Added: llvm/trunk/test/CodeGen/Thumb2/2010-11-22-EpilogueBug.ll Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp llvm/trunk/lib/Target/ARM/ARMFrameInfo.cpp llvm/trunk/lib/Target/ARM/Thumb1FrameInfo.cpp llvm/trunk/test/CodeGen/ARM/hello.ll llvm/trunk/test/CodeGen/Thumb/dyn-stackalloc.ll llvm/trunk/test/CodeGen/Thumb/large-stack.ll llvm/trunk/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll llvm/trunk/test/CodeGen/Thumb2/2010-08-10-VarSizedAllocaBug.ll Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp?rev=119977&r1=119976&r2=119977&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp Mon Nov 22 12:12:04 2010 @@ -694,10 +694,11 @@ MachineFrameInfo *MFI = MF.getFrameInfo(); // Spill R4 if Thumb2 function requires stack realignment - it will be used as - // scratch register. + // scratch register. Also spill R4 if Thumb2 function has varsized objects, + // since it's always posible to restore sp from fp in a single instruction. // FIXME: It will be better just to find spare register here. - if (needsStackRealignment(MF) && - AFI->isThumb2Function()) + if (AFI->isThumb2Function() && + (MFI->hasVarSizedObjects() || needsStackRealignment(MF))) MF.getRegInfo().setPhysRegUsed(ARM::R4); // Spill LR if Thumb1 function uses variable length argument lists. Modified: llvm/trunk/lib/Target/ARM/ARMFrameInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFrameInfo.cpp?rev=119977&r1=119976&r2=119977&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMFrameInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMFrameInfo.cpp Mon Nov 22 12:12:04 2010 @@ -17,6 +17,7 @@ #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineInstrBuilder.h" +#include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/Target/TargetOptions.h" using namespace llvm; @@ -212,15 +213,21 @@ if (NumBytes) { // Adjust SP after all the callee-save spills. emitSPUpdate(isARM, MBB, MBBI, dl, TII, -NumBytes); - if (HasFP) + if (HasFP && isARM) + // Restore from fp only in ARM mode: e.g. sub sp, r7, #24 + // Note it's not safe to do this in Thumb2 mode because it would have + // taken two instructions: + // mov sp, r7 + // sub sp, #24 + // If an interrupt is taken between the two instructions, then sp is in + // an inconsistent state (pointing to the middle of callee-saved area). + // The interrupt handler can end up clobbering the registers. AFI->setShouldRestoreSPFromFP(true); } - if (STI.isTargetELF() && hasFP(MF)) { + if (STI.isTargetELF() && hasFP(MF)) MFI->setOffsetAdjustment(MFI->getOffsetAdjustment() - AFI->getFramePtrSpillOffset()); - AFI->setShouldRestoreSPFromFP(true); - } AFI->setGPRCalleeSavedArea1Size(GPRCS1Size); AFI->setGPRCalleeSavedArea2Size(GPRCS2Size); @@ -275,7 +282,7 @@ // If the frame has variable sized objects then the epilogue must restore // the sp from fp. - if (!AFI->shouldRestoreSPFromFP() && MFI->hasVarSizedObjects()) + if (MFI->hasVarSizedObjects()) AFI->setShouldRestoreSPFromFP(true); } @@ -326,9 +333,21 @@ if (isARM) emitARMRegPlusImmediate(MBB, MBBI, dl, ARM::SP, FramePtr, -NumBytes, ARMCC::AL, 0, TII); - else - emitT2RegPlusImmediate(MBB, MBBI, dl, ARM::SP, FramePtr, -NumBytes, + else { + // It's not possible to restore SP from FP in a single instruction. + // For Darwin, this looks like: + // mov sp, r7 + // sub sp, #24 + // This is bad, if an interrupt is taken after the mov, sp is in an + // inconsistent state. + // Use the first callee-saved register as a scratch register. + assert(MF.getRegInfo().isPhysRegUsed(ARM::R4) && + "No scratch register to restore SP from FP!"); + emitT2RegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes, ARMCC::AL, 0, TII); + BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVgpr2gpr), ARM::SP) + .addReg(ARM::R4); + } } else { // Thumb2 or ARM. if (isARM) Modified: llvm/trunk/lib/Target/ARM/Thumb1FrameInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Thumb1FrameInfo.cpp?rev=119977&r1=119976&r2=119977&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/Thumb1FrameInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/Thumb1FrameInfo.cpp Mon Nov 22 12:12:04 2010 @@ -17,6 +17,7 @@ #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineInstrBuilder.h" +#include "llvm/CodeGen/MachineRegisterInfo.h" using namespace llvm; @@ -117,13 +118,6 @@ dl = MBBI->getDebugLoc(); } - // Adjust FP so it point to the stack slot that contains the previous FP. - if (hasFP(MF)) { - BuildMI(MBB, MBBI, dl, TII.get(ARM::tADDrSPi), FramePtr) - .addFrameIndex(FramePtrSpillFI).addImm(0); - AFI->setShouldRestoreSPFromFP(true); - } - // Determine starting offsets of spill areas. unsigned DPRCSOffset = NumBytes - (GPRCS1Size + GPRCS2Size + DPRCSSize); unsigned GPRCS2Offset = DPRCSOffset + DPRCSSize; @@ -132,12 +126,21 @@ AFI->setGPRCalleeSavedArea1Offset(GPRCS1Offset); AFI->setGPRCalleeSavedArea2Offset(GPRCS2Offset); AFI->setDPRCalleeSavedAreaOffset(DPRCSOffset); - NumBytes = DPRCSOffset; - if (NumBytes) { + + // Adjust FP so it point to the stack slot that contains the previous FP. + if (hasFP(MF)) { + BuildMI(MBB, MBBI, dl, TII.get(ARM::tADDrSPi), FramePtr) + .addFrameIndex(FramePtrSpillFI).addImm(0); + if (NumBytes > 7) + // If offset is > 7 then sp cannot be adjusted in a single instruction, + // try restoring from fp instead. + AFI->setShouldRestoreSPFromFP(true); + } + + if (NumBytes) // Insert it after all the callee-save spills. emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -NumBytes); - } if (STI.isTargetELF() && hasFP(MF)) MFI->setOffsetAdjustment(MFI->getOffsetAdjustment() - @@ -219,10 +222,14 @@ NumBytes = AFI->getFramePtrSpillOffset() - NumBytes; // Reset SP based on frame pointer only if the stack frame extends beyond // frame pointer stack slot or target is ELF and the function has FP. - if (NumBytes) - emitThumbRegPlusImmediate(MBB, MBBI, ARM::SP, FramePtr, -NumBytes, + if (NumBytes) { + assert(MF.getRegInfo().isPhysRegUsed(ARM::R4) && + "No scratch register to restore SP from FP!"); + emitThumbRegPlusImmediate(MBB, MBBI, ARM::R4, FramePtr, -NumBytes, TII, *RegInfo, dl); - else + BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVtgpr2gpr), ARM::SP) + .addReg(ARM::R4); + } else BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVtgpr2gpr), ARM::SP) .addReg(FramePtr); } else { Modified: llvm/trunk/test/CodeGen/ARM/hello.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/hello.ll?rev=119977&r1=119976&r2=119977&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/hello.ll (original) +++ llvm/trunk/test/CodeGen/ARM/hello.ll Mon Nov 22 12:12:04 2010 @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=arm ; RUN: llc < %s -mtriple=arm-linux-gnueabi | grep mov | count 1 ; RUN: llc < %s -mtriple=arm-linux-gnu --disable-fp-elim | \ -; RUN: grep mov | count 3 +; RUN: grep mov | count 2 ; RUN: llc < %s -mtriple=arm-apple-darwin | grep mov | count 2 @str = internal constant [12 x i8] c"Hello World\00" Modified: llvm/trunk/test/CodeGen/Thumb/dyn-stackalloc.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb/dyn-stackalloc.ll?rev=119977&r1=119976&r2=119977&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb/dyn-stackalloc.ll (original) +++ llvm/trunk/test/CodeGen/Thumb/dyn-stackalloc.ll Mon Nov 22 12:12:04 2010 @@ -1,12 +1,15 @@ -; RUN: llc < %s -march=thumb | not grep {ldr sp} -; RUN: llc < %s -mtriple=thumb-apple-darwin | \ -; RUN: not grep {sub.*r7} -; RUN: llc < %s -march=thumb | grep {mov.*r6, sp} +; RUN: llc < %s -mtriple=thumb-apple-darwin | FileCheck %s %struct.state = type { i32, %struct.info*, float**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i8* } %struct.info = type { i32, i32, i32, i32, i32, i32, i32, i8* } define void @t1(%struct.state* %v) { +; CHECK: t1: +; CHECK: push +; CHECK: add r7, sp, #12 +; CHECK: mov r2, sp +; CHECK: subs r4, r2, r1 +; CHECK: mov sp, r4 %tmp6 = load i32* null %tmp8 = alloca float, i32 %tmp6 store i32 1, i32* null @@ -34,6 +37,18 @@ @str215 = external global [2 x i8] define void @t2(%struct.comment* %vc, i8* %tag, i8* %contents) { +; CHECK: t2: +; CHECK: push +; CHECK: add r7, sp, #12 +; CHECK: sub sp, #8 +; CHECK: mov r6, sp +; CHECK: str r2, [r6, #4] +; CHECK: str r0, [r6] +; CHECK-NOT: ldr r0, [sp +; CHECK: ldr r0, [r6, #4] +; CHECK: mov r0, sp +; CHECK: subs r5, r0, r1 +; CHECK: mov sp, r5 %tmp1 = call i32 @strlen( i8* %tag ) %tmp3 = call i32 @strlen( i8* %contents ) %tmp4 = add i32 %tmp1, 2 Modified: llvm/trunk/test/CodeGen/Thumb/large-stack.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb/large-stack.ll?rev=119977&r1=119976&r2=119977&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb/large-stack.ll (original) +++ llvm/trunk/test/CodeGen/Thumb/large-stack.ll Mon Nov 22 12:12:04 2010 @@ -12,8 +12,8 @@ ; CHECK: test2: ; CHECK: ldr r0, LCPI ; CHECK: add sp, r0 -; CHECK: mov sp, r7 -; CHECK: sub sp, #4 +; CHECK: subs r4, r7, #4 +; CHECK: mov sp, r4 %tmp = alloca [ 4168 x i8 ] , align 4 ret void } @@ -24,8 +24,8 @@ ; CHECK: add sp, r2 ; CHECK: ldr r1, LCPI ; CHECK: add r1, sp -; CHECK: mov sp, r7 -; CHECK: sub sp, #4 +; CHECK: subs r4, r7, #4 +; CHECK: mov sp, r4 %retval = alloca i32, align 4 %tmp = alloca i32, align 4 %a = alloca [805306369 x i8], align 16 Modified: llvm/trunk/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll?rev=119977&r1=119976&r2=119977&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll (original) +++ llvm/trunk/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll Mon Nov 22 12:12:04 2010 @@ -5,8 +5,13 @@ define hidden i32 @__gcov_execlp(i8* %path, i8* %arg, ...) nounwind { entry: ; CHECK: __gcov_execlp: -; CHECK: mov sp, r7 -; CHECK: sub sp, #4 +; CHECK: sub sp, #8 +; CHECK: push +; CHECK: add r7, sp, #4 +; CHECK: subs r4, r7, #4 +; CHECK: mov sp, r4 +; CHECK-NOT: mov sp, r7 +; CHECK: add sp, #8 call void @__gcov_flush() nounwind br i1 undef, label %bb5, label %bb Modified: llvm/trunk/test/CodeGen/Thumb2/2010-08-10-VarSizedAllocaBug.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/2010-08-10-VarSizedAllocaBug.ll?rev=119977&r1=119976&r2=119977&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/2010-08-10-VarSizedAllocaBug.ll (original) +++ llvm/trunk/test/CodeGen/Thumb2/2010-08-10-VarSizedAllocaBug.ll Mon Nov 22 12:12:04 2010 @@ -5,6 +5,10 @@ define internal fastcc i32 @Callee(i32 %i) nounwind { entry: ; CHECK: Callee: +; CHECK: push +; CHECK: mov r4, sp +; CHECK: sub.w r12, r4, #1000 +; CHECK: mov sp, r12 %0 = icmp eq i32 %i, 0 ; [#uses=1] br i1 %0, label %bb2, label %bb @@ -17,9 +21,11 @@ ret i32 %4 bb2: ; preds = %entry -; Must restore sp from fp here -; CHECK: mov sp, r7 -; CHECK: sub sp, #8 +; Must restore sp from fp here. Make sure not to leave sp in a temporarily invalid +; state though. rdar://8465407 +; CHECK-NOT: mov sp, r7 +; CHECK: sub.w r4, r7, #8 +; CHECK: mov sp, r4 ; CHECK: pop ret i32 0 } Added: llvm/trunk/test/CodeGen/Thumb2/2010-11-22-EpilogueBug.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/2010-11-22-EpilogueBug.ll?rev=119977&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/2010-11-22-EpilogueBug.ll (added) +++ llvm/trunk/test/CodeGen/Thumb2/2010-11-22-EpilogueBug.ll Mon Nov 22 12:12:04 2010 @@ -0,0 +1,34 @@ +; rdar://8465407 +; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s + +%struct.buf = type opaque + +declare void @bar() nounwind optsize + +define void @foo() nounwind optsize { +; CHECK: foo: +; CHECK: push +; CHECK: add r7, sp, #4 +; CHECK: sub sp, #4 +entry: + %m.i = alloca %struct.buf*, align 4 + br label %bb + +bb: + br i1 undef, label %bb3, label %bb2 + +bb2: + call void @bar() nounwind optsize + br i1 undef, label %bb, label %bb3 + +bb3: + br i1 undef, label %return, label %bb + +return: +; CHECK: %return +; 'mov sp, r7' would have left sp in an invalid state +; CHECK-NOT: mov sp, r7 +; CHECK-NOT: sub, sp, #4 +; CHECK: add sp, #4 + ret void +} From ggreif at gmail.com Mon Nov 22 12:37:35 2010 From: ggreif at gmail.com (Gabor Greif) Date: Mon, 22 Nov 2010 19:37:35 +0100 Subject: [llvm-commits] [PATCH, PING] Peephole Infrastructure improvements and (ARM, T, T2) TSTrr optimizations In-Reply-To: <4289D97B-FF9B-4BB3-BCC9-DB692EB35026@apple.com> References: <4289D97B-FF9B-4BB3-BCC9-DB692EB35026@apple.com> Message-ID: On 11/17/10, Evan Cheng wrote: > Hi Gabor, > > I've made some minor changes in this area. Can you update your patch again? Hi Evan, yes I have updated the patch and uploaded it to . You can get hold of the raw patch by cd llvm curl http://codereview.appspot.com/download/issue2781041_6001.diff | patch Please note that some Thumb1 functionality is lost because of your reordering of passes. The TSTrr is now a CMPri and so it does not get eliminated. I did not try to fix this yet. The Thumb1 tests thus just capture the status quo. > I have some other questions / concerns: > > 1. I have trouble understanding MaxOpportunity and CmpOpportunity. Can you > add more comments? Please try to eliminate the use of template. It feels > over-designed and doesn't really fit in TargetInstrInfo. You seem to agree with Bill here. I think I have a solution that can satisfy us all. Will get to it in the next few days. My design was driven by performance considerations, but I see that currently the cycles are rather burned in other parts, so a more conventional approach is feasible. > 2. TrackCopyEquivalences is target independent code. Please move it out of > ARM. Again, the use of template seems unnecessary. Yeah, constant propagation should do it. I tried to get the semantics right first, I can move it around later. Btw. I am not sure whether the pattern ANDrr...TSTrr still arises on Thumb1. I have to investigate. > 3. I'm concerned with the compile time impact of FindCorrespondingAnd. Have > you measured it? IIRC it has a cutoff after 5 iterations. I did not measure the effect but my gut feeling is that the opportunity itself arises seldom and the algo runs in hot cache, so the impact should be small. But peephole opts are costly and do not run at -O0, right? > 4. Can you provide more test cases that shows the benefit of your patch? It is aimed at untagging operations. Especially with 'switch'-optimization that follows the 'and'. These will definitely occur a gazillion times when LLVM is JITting on ARM :-) Later I hope to extend the mechanisms to all targets. See for all my collected "wisdom". > > Some questions: > 5. Are we missing opportunities? What about xor? One thing I noticed we are > always folding (cmp (xor l, r), 0) to teq. That's actually a potential > pessimization in case the xor has multiple uses. Instead, isel should leave > it as xor + cmp 0 and let the peephole pass away the cmp. I see you have tackled this transform to pessimize less. I am aware of it, but want to get to a solid foundation first. Cheers, Gabor PS: feel free to comment the codereview issue directly, but I'll transfer your comments-so-far too. > > Evan > > > > On Oct 29, 2010, at 12:59 AM, Gabor Greif wrote: > >> My response below, forgot to add all recipients :-( >> >> On 10/29/10, Bill Wendling wrote: >>> Sorry about the long response time. A few general comments: >>> >>> ? Watch out for consistent spacing. >>> ? You should use "llvm::next" instead of "next". The latter conflicts >>> with >>> an "std" name (if I recall correctly). >>> ? You call 'new' on the Opportunity classes in a situation where it >>> expects >>> to return a "bool" value. What's going on here? >>> >>> -bw >> >> >> >> Hi Bill, >> >> thanks for the review! >> >> Spacing: I am not aware of problems with my recent patch >> http://codereview.appspot.com/2781041/ (also attached to the [PING] >> mail. I added spaces after 'new' and before '(' in my working copy. >> >> llvm::next: I never have seen conflicts, Googled and found this: >> http://gcc.gnu.org/bugzilla/show_bug.cgi?id=40497. Will change for >> reasons of caution. >> >> Returning 'new (Space) MaskOpporunity..." etc. in bool context. It is >> just a shorthand for these two lines: >> new (Space) MaskOpporunity...; // fill in closure >> return true; // yes we can proceed with the closure >> But I can make it explicit if you wish. Do you? Okay to commit? >> >> Cheers, >> >> Gabor >>> >>> On Oct 25, 2010, at 1:28 AM, Gabor Greif wrote: >>> >>>> Ping! >>>> >>>> Attached the diff against recent trunk. >>>> >>>> Cheers, >>>> >>>> Gabor >>>> >>>> On 10/21/10, Gabor Greif wrote: >>>>> Hi all, >>>>> >>>>> the last weeks I've been working on a flexible infrastructure for >>>>> peephole optimizations, which is potentially target independent and >>>>> extensible without needing interface changes. >>>>> >>>>> The result of my work is attached. It moves all current ARM peepholes >>>>> over to the new architecture and adds TSTrr-related optimizations too. >>>>> >>>>> The ordering and forward referencing of functions is still suboptimal, >>>>> but this is only done to keep the patch size manageable. I plan to >>>>> reorder in a cleanup commit after this patch has landed. Also some >>>>> currently freestanding functions will become methods. >>>>> >>>>> You can also see the code in its entirety here: >>>>> >>>>> >>>>> Feedback is welcome. >>>>> >>>>> Cheers, >>>>> >>>>> Gabor >>>>> >>>> >>> >>> >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > From jason.w.kim.2009 at gmail.com Mon Nov 22 12:41:13 2010 From: jason.w.kim.2009 at gmail.com (Jason W Kim) Date: Mon, 22 Nov 2010 18:41:13 -0000 Subject: [llvm-commits] [llvm] r119978 - /llvm/trunk/lib/MC/ELFObjectWriter.cpp Message-ID: <20101122184113.58BCD2A6C12C@llvm.org> Author: jasonwkim Date: Mon Nov 22 12:41:13 2010 New Revision: 119978 URL: http://llvm.org/viewvc/llvm-project?rev=119978&view=rev Log: Refactor the ELFRelocationEntry (pull up) and move the arch-specific statics to inside the class where it belongs. Next step is to rationally break apart the RecordRelocation() Probably the step will be to have 1 member function for ech slot of the ELFRelocationEntry() Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/ELFObjectWriter.cpp?rev=119978&r1=119977&r2=119978&view=diff ============================================================================== --- llvm/trunk/lib/MC/ELFObjectWriter.cpp (original) +++ llvm/trunk/lib/MC/ELFObjectWriter.cpp Mon Nov 22 12:41:13 2010 @@ -30,6 +30,7 @@ #include "llvm/Target/TargetAsmBackend.h" #include "../Target/X86/X86FixupKinds.h" +#include "../Target/ARM/ARMFixupKinds.h" #include "../Target/MBlaze/MBlazeFixupKinds.h" #include @@ -66,27 +67,6 @@ return Visibility; } -static bool isFixupKindX86PCRel(unsigned Kind) { - switch (Kind) { - default: - return false; - case X86::reloc_pcrel_1byte: - case X86::reloc_pcrel_4byte: - case X86::reloc_riprel_4byte: - case X86::reloc_riprel_4byte_movq_load: - return true; - } -} - -static bool isFixupKindMBlazePCRel(unsigned Kind) { - switch (Kind) { - default: - return false; - case MBlaze::reloc_pcrel_2byte: - case MBlaze::reloc_pcrel_4byte: - return true; - } -} static bool RelocNeedsGOT(MCSymbolRefExpr::VariantKind Variant) { switch (Variant) { @@ -145,6 +125,15 @@ unsigned Type; const MCSymbol *Symbol; uint64_t r_addend; + + ELFRelocationEntry() + : r_offset(0), Index(0), Type(0), Symbol(0), r_addend(0) {} + + ELFRelocationEntry(uint64_t RelocOffset, int _Index, + unsigned _Type, const MCSymbol *_Symbol, + uint64_t Addend) + : r_offset(RelocOffset), Index(_Index), Type(_Type), + Symbol(_Symbol), r_addend(Addend) {} // Support lexicographic sorting. bool operator<(const ELFRelocationEntry &RE) const { @@ -376,6 +365,18 @@ const MCFragment *Fragment, const MCFixup &Fixup, MCValue Target, uint64_t &FixedValue); + + static bool isFixupKindPCRel(unsigned Kind) { + switch (Kind) { + default: + return false; + case X86::reloc_pcrel_1byte: + case X86::reloc_pcrel_4byte: + case X86::reloc_riprel_4byte: + case X86::reloc_riprel_4byte_movq_load: + return true; + } + } }; @@ -393,6 +394,17 @@ const MCFragment *Fragment, const MCFixup &Fixup, MCValue Target, uint64_t &FixedValue); + + static bool isFixupKindPCRel(unsigned Kind) { + switch (Kind) { + default: + return false; + case MBlaze::reloc_pcrel_2byte: + case MBlaze::reloc_pcrel_4byte: + return true; + } + } + }; //===- MBlazeELFObjectWriter -------------------------------------------===// @@ -409,6 +421,17 @@ const MCFragment *Fragment, const MCFixup &Fixup, MCValue Target, uint64_t &FixedValue); + + static bool isFixupKindPCRel(unsigned Kind) { + switch (Kind) { + default: + return false; + case ARM::fixup_arm_pcrel_12: + case ARM::fixup_arm_vfp_pcrel_12: + case ARM::fixup_arm_branch: + return true; + } + } }; } @@ -1434,7 +1457,7 @@ const MCSymbol &ASymbol = Symbol.AliasedSymbol(); const MCSymbol *RelocSymbol = SymbolToReloc(Asm, Target, *Fragment); - bool IsPCRel = isFixupKindMBlazePCRel(Fixup.getKind()); + bool IsPCRel = isFixupKindPCRel(Fixup.getKind()); if (!Target.isAbsolute()) { if (const MCSymbolRefExpr *RefB = Target.getSymB()) { const MCSymbol &SymbolB = RefB->getSymbol(); @@ -1501,19 +1524,11 @@ if (RelocNeedsGOT(Modifier)) NeedsGOT = true; - ELFRelocationEntry ERE; - - ERE.Index = Index; - ERE.Type = Type; - ERE.Symbol = RelocSymbol; - - ERE.r_offset = Layout.getFragmentOffset(Fragment) + Fixup.getOffset(); - - if (HasRelocationAddend) - ERE.r_addend = Addend; - else - ERE.r_addend = 0; // Silence compiler warning. + uint64_t RelocOffset = Layout.getFragmentOffset(Fragment) + + Fixup.getOffset(); + if (! HasRelocationAddend) Addend = 0; + ELFRelocationEntry ERE(RelocOffset, Index, Type, RelocSymbol, Addend); Relocations[Fragment->getParent()].push_back(ERE); } @@ -1542,7 +1557,7 @@ int64_t Value = Target.getConstant(); const MCSymbol *RelocSymbol = NULL; - bool IsPCRel = isFixupKindX86PCRel(Fixup.getKind()); + bool IsPCRel = isFixupKindPCRel(Fixup.getKind()); if (!Target.isAbsolute()) { const MCSymbol &Symbol = Target.getSymA()->getSymbol(); const MCSymbol &ASymbol = Symbol.AliasedSymbol(); @@ -1720,18 +1735,11 @@ if (RelocNeedsGOT(Modifier)) NeedsGOT = true; - ELFRelocationEntry ERE; - - ERE.Index = Index; - ERE.Type = Type; - ERE.Symbol = RelocSymbol; - ERE.r_offset = Layout.getFragmentOffset(Fragment) + Fixup.getOffset(); - - if (HasRelocationAddend) - ERE.r_addend = Addend; - else - ERE.r_addend = 0; // Silence compiler warning. + uint64_t RelocOffset = Layout.getFragmentOffset(Fragment) + + Fixup.getOffset(); + if (! HasRelocationAddend) Addend = 0; + ELFRelocationEntry ERE(RelocOffset, Index, Type, RelocSymbol, Addend); Relocations[Fragment->getParent()].push_back(ERE); } From jason.w.kim.2009 at gmail.com Mon Nov 22 12:42:07 2010 From: jason.w.kim.2009 at gmail.com (Jason W Kim) Date: Mon, 22 Nov 2010 18:42:07 -0000 Subject: [llvm-commits] [llvm] r119979 - /llvm/trunk/lib/MC/ELFObjectWriter.cpp Message-ID: <20101122184207.CB3DC2A6C12C@llvm.org> Author: jasonwkim Date: Mon Nov 22 12:42:07 2010 New Revision: 119979 URL: http://llvm.org/viewvc/llvm-project?rev=119979&view=rev Log: Kill trailing whitespace Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/ELFObjectWriter.cpp?rev=119979&r1=119978&r2=119979&view=diff ============================================================================== --- llvm/trunk/lib/MC/ELFObjectWriter.cpp (original) +++ llvm/trunk/lib/MC/ELFObjectWriter.cpp Mon Nov 22 12:42:07 2010 @@ -125,7 +125,7 @@ unsigned Type; const MCSymbol *Symbol; uint64_t r_addend; - + ELFRelocationEntry() : r_offset(0), Index(0), Type(0), Symbol(0), r_addend(0) {} @@ -1524,7 +1524,7 @@ if (RelocNeedsGOT(Modifier)) NeedsGOT = true; - uint64_t RelocOffset = Layout.getFragmentOffset(Fragment) + + uint64_t RelocOffset = Layout.getFragmentOffset(Fragment) + Fixup.getOffset(); if (! HasRelocationAddend) Addend = 0; @@ -1736,7 +1736,7 @@ NeedsGOT = true; - uint64_t RelocOffset = Layout.getFragmentOffset(Fragment) + + uint64_t RelocOffset = Layout.getFragmentOffset(Fragment) + Fixup.getOffset(); if (! HasRelocationAddend) Addend = 0; From jason.w.kim.2009 at gmail.com Mon Nov 22 12:47:06 2010 From: jason.w.kim.2009 at gmail.com (Jason W Kim) Date: Mon, 22 Nov 2010 18:47:06 -0000 Subject: [llvm-commits] [llvm] r119981 - /llvm/trunk/lib/MC/ELFObjectWriter.cpp Message-ID: <20101122184706.154902A6C12D@llvm.org> Author: jasonwkim Date: Mon Nov 22 12:47:05 2010 New Revision: 119981 URL: http://llvm.org/viewvc/llvm-project?rev=119981&view=rev Log: Fix misplaced statics. Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/ELFObjectWriter.cpp?rev=119981&r1=119980&r2=119981&view=diff ============================================================================== --- llvm/trunk/lib/MC/ELFObjectWriter.cpp (original) +++ llvm/trunk/lib/MC/ELFObjectWriter.cpp Mon Nov 22 12:47:05 2010 @@ -399,12 +399,12 @@ switch (Kind) { default: return false; - case MBlaze::reloc_pcrel_2byte: - case MBlaze::reloc_pcrel_4byte: + case ARM::fixup_arm_pcrel_12: + case ARM::fixup_arm_vfp_pcrel_12: + case ARM::fixup_arm_branch: return true; } } - }; //===- MBlazeELFObjectWriter -------------------------------------------===// @@ -426,9 +426,8 @@ switch (Kind) { default: return false; - case ARM::fixup_arm_pcrel_12: - case ARM::fixup_arm_vfp_pcrel_12: - case ARM::fixup_arm_branch: + case MBlaze::reloc_pcrel_2byte: + case MBlaze::reloc_pcrel_4byte: return true; } } From jason.w.kim.2009 at gmail.com Mon Nov 22 12:57:00 2010 From: jason.w.kim.2009 at gmail.com (Jason W Kim) Date: Mon, 22 Nov 2010 18:57:00 -0000 Subject: [llvm-commits] [llvm] r119982 - /llvm/trunk/lib/MC/ELFObjectWriter.cpp Message-ID: <20101122185700.689B52A6C12C@llvm.org> Author: jasonwkim Date: Mon Nov 22 12:57:00 2010 New Revision: 119982 URL: http://llvm.org/viewvc/llvm-project?rev=119982&view=rev Log: Make the ELFObjectWriter statics private Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/ELFObjectWriter.cpp?rev=119982&r1=119981&r2=119982&view=diff ============================================================================== --- llvm/trunk/lib/MC/ELFObjectWriter.cpp (original) +++ llvm/trunk/lib/MC/ELFObjectWriter.cpp Mon Nov 22 12:57:00 2010 @@ -366,6 +366,7 @@ const MCFixup &Fixup, MCValue Target, uint64_t &FixedValue); + private: static bool isFixupKindPCRel(unsigned Kind) { switch (Kind) { default: @@ -395,6 +396,7 @@ const MCFixup &Fixup, MCValue Target, uint64_t &FixedValue); + private: static bool isFixupKindPCRel(unsigned Kind) { switch (Kind) { default: @@ -422,6 +424,7 @@ const MCFixup &Fixup, MCValue Target, uint64_t &FixedValue); + private: static bool isFixupKindPCRel(unsigned Kind) { switch (Kind) { default: From bigcheesegs at gmail.com Mon Nov 22 13:23:38 2010 From: bigcheesegs at gmail.com (Michael Spencer) Date: Mon, 22 Nov 2010 14:23:38 -0500 Subject: [llvm-commits] [Review request] test/CodeGen/X86: Add cases for Win64 to 67 tests In-Reply-To: References: Message-ID: On Mon, Nov 22, 2010 at 2:49 AM, NAKAMURA Takumi wrote: > Hello guys! > > llc infers -march=x86-64 as -mtriple=x86_64-(mingw32|win32). > Then many tests in CodeGen/X86 would fail due to ABI difference > between AMD64 and Win64. > (or Win64 codegen's inefficiency) > > The principle to rewrite tests is as below; > > ?- Tests should not hide possible win64's behavior. > ? ?They could exclude Win64 when they were obviously nonsense. > ?- Tests should not depend on hosts. Win64's failure should be > detected also on other platforms. > ? ?When a test has -mtriple=x86_64-linux, it should have also > -mtriple=x86_64-win32. > ?- Some tests might be dubious for Win64. I took two cases. > ? ?- Mark ?them as XFAIL: mingw, win32, to detect when they were fixed. > ? ?- Add *as-is* pattern to tests. You shall know they are really ugly. :D > > Guys, please, I would like everyone to help me to brush up my patches. > Feel free for yourself to commit one when you might be self-approved. > > * 0001-test-CodeGen-X86-fold-mul-lohi.ll-FileCheck-ize-and-.patch > > ?Win64 tends to emit "lea (%rip)". I excluded it from win64 tests. I think this is correct due to how Windows does PIC, but I'm not totally sure, as I'm not sure what code was generated on Linux before r43230. I'll be getting to the other patches later. Thanks for fixing these! - Michael Spencer > * 0002-test-CodeGen-X86-red-zone.ll-Add-explicit-mtriple-x8.patch > > ?Win64 doesn't use redzone stuff. > > * 0003-test-CodeGen-X86-sse_reload_fold.ll-FileCheck-ize-an.patch > > ?I don't understand what it intends. I am happy if someone explain to me. :) > > * 0004-test-CodeGen-X86-store_op_load_fold2.ll-Add-a-test-f.patch > > ?Alignment of 13th member in the struct makes difference. > > * 0005-test-CodeGen-X86-v2f32.ll-Fix-missing-tests-and-add-.patch > > ?I re-enabled 3 tests and added *as-is* Win64's patterns. > > * 0006-test-CodeGen-X86-Add-the-as-is-pattern-for-Win64.patch > > ?I added *as-is* patterns for Win64. I intend for reviewrs to help to > reduce their expressions. > > * 0007-test-CodeGen-X86-Mark-as-XFAIL-mingw-win32.-They-sho.patch > > ?I thought they could be fixed in future. When one were fixed, "llc > -mtriple=x86_64-win32" should be added. > > * 0008-test-CodeGen-X86-FileCheck-ize-with-relaxed-expressi.patch > > ?Please watch out; > ? ?- Is my FileCheck-izing reasonable? > ? ?- Do relaxed patterns have any faults? > > * 0009-test-CodeGen-X86-FileCheck-ize-and-add-the-case-for-.patch > > ?I added "WIN64:"(and similar) expressions to them. > ?I wonder it might be reasonable. > > * 0010-test-CodeGen-X86-Relax-expressions-for-Win64.patch > > ?They are FileCheck-ized on ToT. I tweaked them with relaxation to > recognize Win64 ABI. > > > Have a happy testing! ...Takumi > > > > test/CodeGen/X86/2007-01-08-X86-64-Pointer.ll ? ?| ? ?7 ++- > test/CodeGen/X86/2007-07-18-Vector-Extract.ll ? ?| ? ?6 +- > test/CodeGen/X86/2008-06-13-VolatileLoadStore.ll | ? ?9 ++- > test/CodeGen/X86/add.ll ? ? ? ? ? ? ? ? ? ? ? ? ?| ? 11 ++-- > test/CodeGen/X86/avoid-lea-scale2.ll ? ? ? ? ? ? | ? ?5 +- > test/CodeGen/X86/bitcast2.ll ? ? ? ? ? ? ? ? ? ? | ? 22 ++++++- > test/CodeGen/X86/break-sse-dep.ll ? ? ? ? ? ? ? ?| ? 15 ++-- > test/CodeGen/X86/byval.ll ? ? ? ? ? ? ? ? ? ? ? ?| ? ?9 ++- > test/CodeGen/X86/byval2.ll ? ? ? ? ? ? ? ? ? ? ? | ? 39 ++++++++++- > test/CodeGen/X86/byval3.ll ? ? ? ? ? ? ? ? ? ? ? | ? 42 +++++++++++- > test/CodeGen/X86/byval4.ll ? ? ? ? ? ? ? ? ? ? ? | ? 42 +++++++++++- > test/CodeGen/X86/byval5.ll ? ? ? ? ? ? ? ? ? ? ? | ? 42 +++++++++++- > test/CodeGen/X86/coalescer-commute2.ll ? ? ? ? ? | ? 21 +++++- > test/CodeGen/X86/codegen-prepare-extload.ll ? ? ?| ? ?5 +- > test/CodeGen/X86/constant-pool-remat-0.ll ? ? ? ?| ? 35 +++++++++- > test/CodeGen/X86/constant-pool-sharing.ll ? ? ? ?| ? ?7 +- > test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll ?| ? 12 +++- > test/CodeGen/X86/fast-isel-cmp-branch.ll ? ? ? ? | ? ?7 +- > test/CodeGen/X86/fast-isel-gep.ll ? ? ? ? ? ? ? ?| ? 11 ++-- > test/CodeGen/X86/fold-mul-lohi.ll ? ? ? ? ? ? ? ?| ? ?5 +- > test/CodeGen/X86/gather-addresses.ll ? ? ? ? ? ? | ? 23 ++++--- > test/CodeGen/X86/h-register-store.ll ? ? ? ? ? ? | ? 32 +++++++-- > test/CodeGen/X86/h-registers-0.ll ? ? ? ? ? ? ? ?| ? 24 +++++++- > test/CodeGen/X86/i128-ret.ll ? ? ? ? ? ? ? ? ? ? | ? ?6 +- > test/CodeGen/X86/i64-mem-copy.ll ? ? ? ? ? ? ? ? | ? ?8 ++- > test/CodeGen/X86/iabs.ll ? ? ? ? ? ? ? ? ? ? ? ? | ? ?8 ++- > test/CodeGen/X86/lea-3.ll ? ? ? ? ? ? ? ? ? ? ? ?| ? 15 +++-- > test/CodeGen/X86/lea.ll ? ? ? ? ? ? ? ? ? ? ? ? ?| ? ?9 ++- > test/CodeGen/X86/lsr-overflow.ll ? ? ? ? ? ? ? ? | ? ?5 +- > test/CodeGen/X86/lsr-reuse-trunc.ll ? ? ? ? ? ? ?| ? ?9 ++- > test/CodeGen/X86/masked-iv-safe.ll ? ? ? ? ? ? ? | ? 43 ++++++++++--- > test/CodeGen/X86/memcmp.ll ? ? ? ? ? ? ? ? ? ? ? | ? 21 +++--- > test/CodeGen/X86/mmx-copy-gprs.ll ? ? ? ? ? ? ? ?| ? 10 ++- > test/CodeGen/X86/movgs.ll ? ? ? ? ? ? ? ? ? ? ? ?| ? ?7 +- > test/CodeGen/X86/optimize-max-3.ll ? ? ? ? ? ? ? | ? 11 ++-- > test/CodeGen/X86/peep-vector-extract-concat.ll ? | ? 11 +++- > test/CodeGen/X86/pmulld.ll ? ? ? ? ? ? ? ? ? ? ? | ? 12 +++- > test/CodeGen/X86/red-zone.ll ? ? ? ? ? ? ? ? ? ? | ? ?2 +- > test/CodeGen/X86/red-zone2.ll ? ? ? ? ? ? ? ? ? ?| ? 11 ++- > test/CodeGen/X86/remat-mov-0.ll ? ? ? ? ? ? ? ? ?| ? 15 ++-- > test/CodeGen/X86/scalar-min-max-fill-operand.ll ?| ? 34 +++++++++- > test/CodeGen/X86/select-aggregate.ll ? ? ? ? ? ? | ? ?7 +- > test/CodeGen/X86/sse-align-0.ll ? ? ? ? ? ? ? ? ?| ? 25 +++++++- > test/CodeGen/X86/sse-align-3.ll ? ? ? ? ? ? ? ? ?| ? 22 ++++++- > test/CodeGen/X86/sse-align-7.ll ? ? ? ? ? ? ? ? ?| ? ?8 ++- > test/CodeGen/X86/sse-commute.ll ? ? ? ? ? ? ? ? ?| ? 12 +++- > test/CodeGen/X86/sse-minmax.ll ? ? ? ? ? ? ? ? ? | ? ?2 + > test/CodeGen/X86/sse_reload_fold.ll ? ? ? ? ? ? ?| ? ?5 +- > test/CodeGen/X86/stdarg.ll ? ? ? ? ? ? ? ? ? ? ? | ? 16 ++++- > test/CodeGen/X86/store_op_load_fold2.ll ? ? ? ? ?| ? ?9 ++- > test/CodeGen/X86/stride-nine-with-base-reg.ll ? ?| ? 34 +++++++++- > test/CodeGen/X86/stride-reuse.ll ? ? ? ? ? ? ? ? | ? 33 +++++++++- > test/CodeGen/X86/subreg-to-reg-4.ll ? ? ? ? ? ? ?| ? 11 +-- > test/CodeGen/X86/tailcallbyval64.ll ? ? ? ? ? ? ?| ? 62 ++++++++++++++++- > test/CodeGen/X86/tailcallstack64.ll ? ? ? ? ? ? ?| ? ?3 +- > test/CodeGen/X86/test-shrink.ll ? ? ? ? ? ? ? ? ?| ? 21 +++--- > test/CodeGen/X86/unknown-location.ll ? ? ? ? ? ? | ? ?5 +- > test/CodeGen/X86/use-add-flags.ll ? ? ? ? ? ? ? ?| ? 15 ++-- > test/CodeGen/X86/v2f32.ll ? ? ? ? ? ? ? ? ? ? ? ?| ? 77 ++++++++++++++++++--- > test/CodeGen/X86/vec_cast.ll ? ? ? ? ? ? ? ? ? ? | ? ?3 +- > test/CodeGen/X86/vec_set-8.ll ? ? ? ? ? ? ? ? ? ?| ? ?7 ++- > test/CodeGen/X86/vec_set-F.ll ? ? ? ? ? ? ? ? ? ?| ? 22 +++++- > test/CodeGen/X86/vec_shuffle-17.ll ? ? ? ? ? ? ? | ? ?7 ++- > test/CodeGen/X86/vec_shuffle-37.ll ? ? ? ? ? ? ? | ? ?5 +- > test/CodeGen/X86/widen_load-0.ll ? ? ? ? ? ? ? ? | ? ?8 ++- > test/CodeGen/X86/x86-64-malloc.ll ? ? ? ? ? ? ? ?| ? ?4 +- > test/CodeGen/X86/xor.ll ? ? ? ? ? ? ? ? ? ? ? ? ?| ? ?9 ++- > 67 files changed, 884 insertions(+), 216 deletions(-) > From benny.kra at googlemail.com Mon Nov 22 14:31:28 2010 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Mon, 22 Nov 2010 20:31:28 -0000 Subject: [llvm-commits] [llvm] r119984 - in /llvm/trunk: lib/Target/README.txt lib/Transforms/InstCombine/InstCombineAddSub.cpp test/Transforms/InstCombine/sub.ll Message-ID: <20101122203128.1F4312A6C12C@llvm.org> Author: d0k Date: Mon Nov 22 14:31:27 2010 New Revision: 119984 URL: http://llvm.org/viewvc/llvm-project?rev=119984&view=rev Log: InstCombine: Implement X - A*-B -> X + A*B. Modified: llvm/trunk/lib/Target/README.txt llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp llvm/trunk/test/Transforms/InstCombine/sub.ll Modified: llvm/trunk/lib/Target/README.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/README.txt?rev=119984&r1=119983&r2=119984&view=diff ============================================================================== --- llvm/trunk/lib/Target/README.txt (original) +++ llvm/trunk/lib/Target/README.txt Mon Nov 22 14:31:27 2010 @@ -1736,22 +1736,6 @@ ... %367 = icmp eq i32 %362, 0 ; [#uses=1] - -//===---------------------------------------------------------------------===// - -Missed instcombine/dagcombine transformation: -define i32 @a(i32 %x, i32 %y) nounwind readnone { -entry: - %mul = mul i32 %y, -8 - %sub = sub i32 %x, %mul - ret i32 %sub -} - -Should compile to something like x+y*8, but currently compiles to an -inefficient result. Testcase derived from gcc. C testcase: - -int a(int x, int y) { return y-x*-8; } - //===---------------------------------------------------------------------===// Missed instcombine/dagcombine transformation: Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp?rev=119984&r1=119983&r2=119984&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp Mon Nov 22 14:31:27 2010 @@ -675,6 +675,15 @@ C2); return BinaryOperator::CreateMul(Op0, CP1); } + + // X - A*-B -> X + A*B + // X - -A*B -> X + A*B + Value *A, *B; + if (match(Op1I, m_Mul(m_Value(A), m_Neg(m_Value(B)))) || + match(Op1I, m_Mul(m_Neg(m_Value(A)), m_Value(B)))) { + Value *NewMul = Builder->CreateMul(A, B); + return BinaryOperator::CreateAdd(Op0, NewMul); + } } } Modified: llvm/trunk/test/Transforms/InstCombine/sub.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/sub.ll?rev=119984&r1=119983&r2=119984&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/sub.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/sub.ll Mon Nov 22 14:31:27 2010 @@ -281,3 +281,23 @@ ; CHECK-NEXT: ret i32 } +define i32 @test27(i32 %x, i32 %y) { + %mul = mul i32 %y, -8 + %sub = sub i32 %x, %mul + ret i32 %sub +; CHECK: @test27 +; CHECK-NEXT: shl i32 %y, 3 +; CHECK-NEXT: add i32 +; CHECK-NEXT: ret i32 +} + +define i32 @test28(i32 %x, i32 %y, i32 %z) { + %neg = sub i32 0, %z + %mul = mul i32 %neg, %y + %sub = sub i32 %x, %mul + ret i32 %sub +; CHECK: @test28 +; CHECK-NEXT: mul i32 %z, %y +; CHECK-NEXT: add i32 +; CHECK-NEXT: ret i32 +} From rafael.espindola at gmail.com Mon Nov 22 15:02:10 2010 From: rafael.espindola at gmail.com (=?UTF-8?Q?Rafael_Esp=C3=ADndola?=) Date: Mon, 22 Nov 2010 21:02:10 +0000 Subject: [llvm-commits] [llvm] r119978 - /llvm/trunk/lib/MC/ELFObjectWriter.cpp In-Reply-To: <20101122184113.58BCD2A6C12C@llvm.org> References: <20101122184113.58BCD2A6C12C@llvm.org> Message-ID: > + ? ? ?ELFRelocationEntry(uint64_t RelocOffset, int _Index, > + ? ? ? ? ? ? ? ? ? ? ? ? unsigned _Type, const MCSymbol *_Symbol, > + ? ? ? ? ? ? ? ? ? ? ? ? uint64_t Addend) > + ? ? ? ?: r_offset(RelocOffset), Index(_Index), Type(_Type), > + ? ? ? ? ?Symbol(_Symbol), r_addend(Addend) {} Please don't use names starting with _. I know similar names exist elsewhere, but names starting with _ are reserved. > + ?if (! HasRelocationAddend) Addend = 0; > + ?ELFRelocationEntry ERE(RelocOffset, Index, Type, RelocSymbol, Addend); No space after the ! > + ?if (! HasRelocationAddend) Addend = 0; > + ?ELFRelocationEntry ERE(RelocOffset, Index, Type, RelocSymbol, Addend); Same. Thanks, Rafael From rafael.espindola at gmail.com Mon Nov 22 15:49:06 2010 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Mon, 22 Nov 2010 21:49:06 -0000 Subject: [llvm-commits] [llvm] r119985 - in /llvm/trunk/lib/Target/X86: X86ELFWriterInfo.cpp X86ELFWriterInfo.h Message-ID: <20101122214906.24F092A6C12C@llvm.org> Author: rafael Date: Mon Nov 22 15:49:05 2010 New Revision: 119985 URL: http://llvm.org/viewvc/llvm-project?rev=119985&view=rev Log: Remove duplicated constants. Thanks to Jason for noticing it. Modified: llvm/trunk/lib/Target/X86/X86ELFWriterInfo.cpp llvm/trunk/lib/Target/X86/X86ELFWriterInfo.h Modified: llvm/trunk/lib/Target/X86/X86ELFWriterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ELFWriterInfo.cpp?rev=119985&r1=119984&r2=119985&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ELFWriterInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ELFWriterInfo.cpp Mon Nov 22 15:49:05 2010 @@ -14,6 +14,7 @@ #include "X86ELFWriterInfo.h" #include "X86Relocations.h" #include "llvm/Function.h" +#include "llvm/Support/ELF.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Target/TargetData.h" #include "llvm/Target/TargetMachine.h" @@ -35,13 +36,13 @@ if (is64Bit) { switch(MachineRelTy) { case X86::reloc_pcrel_word: - return R_X86_64_PC32; + return ELF::R_X86_64_PC32; case X86::reloc_absolute_word: - return R_X86_64_32; + return ELF::R_X86_64_32; case X86::reloc_absolute_word_sext: - return R_X86_64_32S; + return ELF::R_X86_64_32S; case X86::reloc_absolute_dword: - return R_X86_64_64; + return ELF::R_X86_64_64; case X86::reloc_picrel_word: default: llvm_unreachable("unknown x86_64 machine relocation type"); @@ -49,9 +50,9 @@ } else { switch(MachineRelTy) { case X86::reloc_pcrel_word: - return R_386_PC32; + return ELF::R_386_PC32; case X86::reloc_absolute_word: - return R_386_32; + return ELF::R_386_32; case X86::reloc_absolute_word_sext: case X86::reloc_absolute_dword: case X86::reloc_picrel_word: @@ -66,18 +67,18 @@ long int Modifier) const { if (is64Bit) { switch(RelTy) { - case R_X86_64_PC32: return Modifier - 4; - case R_X86_64_32: - case R_X86_64_32S: - case R_X86_64_64: + case ELF::R_X86_64_PC32: return Modifier - 4; + case ELF::R_X86_64_32: + case ELF::R_X86_64_32S: + case ELF::R_X86_64_64: return Modifier; default: llvm_unreachable("unknown x86_64 relocation type"); } } else { switch(RelTy) { - case R_386_PC32: return Modifier - 4; - case R_386_32: return Modifier; + case ELF::R_386_PC32: return Modifier - 4; + case ELF::R_386_32: return Modifier; default: llvm_unreachable("unknown x86 relocation type"); } @@ -88,19 +89,19 @@ unsigned X86ELFWriterInfo::getRelocationTySize(unsigned RelTy) const { if (is64Bit) { switch(RelTy) { - case R_X86_64_PC32: - case R_X86_64_32: - case R_X86_64_32S: + case ELF::R_X86_64_PC32: + case ELF::R_X86_64_32: + case ELF::R_X86_64_32S: return 32; - case R_X86_64_64: + case ELF::R_X86_64_64: return 64; default: llvm_unreachable("unknown x86_64 relocation type"); } } else { switch(RelTy) { - case R_386_PC32: - case R_386_32: + case ELF::R_386_PC32: + case ELF::R_386_32: return 32; default: llvm_unreachable("unknown x86 relocation type"); @@ -112,20 +113,20 @@ bool X86ELFWriterInfo::isPCRelativeRel(unsigned RelTy) const { if (is64Bit) { switch(RelTy) { - case R_X86_64_PC32: + case ELF::R_X86_64_PC32: return true; - case R_X86_64_32: - case R_X86_64_32S: - case R_X86_64_64: + case ELF::R_X86_64_32: + case ELF::R_X86_64_32S: + case ELF::R_X86_64_64: return false; default: llvm_unreachable("unknown x86_64 relocation type"); } } else { switch(RelTy) { - case R_386_PC32: + case ELF::R_386_PC32: return true; - case R_386_32: + case ELF::R_386_32: return false; default: llvm_unreachable("unknown x86 relocation type"); @@ -143,7 +144,7 @@ unsigned RelOffset, unsigned RelTy) const { - if (RelTy == R_X86_64_PC32 || RelTy == R_386_PC32) + if (RelTy == ELF::R_X86_64_PC32 || RelTy == ELF::R_386_PC32) return SymOffset - (RelOffset + 4); else assert("computeRelocation unknown for this relocation type"); Modified: llvm/trunk/lib/Target/X86/X86ELFWriterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ELFWriterInfo.h?rev=119985&r1=119984&r2=119985&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ELFWriterInfo.h (original) +++ llvm/trunk/lib/Target/X86/X86ELFWriterInfo.h Mon Nov 22 15:49:05 2010 @@ -20,23 +20,6 @@ class X86ELFWriterInfo : public TargetELFWriterInfo { - // ELF Relocation types for X86 - enum X86RelocationType { - R_386_NONE = 0, - R_386_32 = 1, - R_386_PC32 = 2 - }; - - // ELF Relocation types for X86_64 - enum X86_64RelocationType { - R_X86_64_NONE = 0, - R_X86_64_64 = 1, - R_X86_64_PC32 = 2, - R_X86_64_32 = 10, - R_X86_64_32S = 11, - R_X86_64_PC64 = 24 - }; - public: X86ELFWriterInfo(bool is64Bit_, bool isLittleEndian_); virtual ~X86ELFWriterInfo(); From jason.w.kim.2009 at gmail.com Mon Nov 22 16:05:16 2010 From: jason.w.kim.2009 at gmail.com (Jason W Kim) Date: Mon, 22 Nov 2010 22:05:16 -0000 Subject: [llvm-commits] [llvm] r119986 - /llvm/trunk/lib/MC/ELFObjectWriter.cpp Message-ID: <20101122220516.792F82A6C12C@llvm.org> Author: jasonwkim Date: Mon Nov 22 16:05:16 2010 New Revision: 119986 URL: http://llvm.org/viewvc/llvm-project?rev=119986&view=rev Log: Fixed some style issues (no _, no spc after !) Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/ELFObjectWriter.cpp?rev=119986&r1=119985&r2=119986&view=diff ============================================================================== --- llvm/trunk/lib/MC/ELFObjectWriter.cpp (original) +++ llvm/trunk/lib/MC/ELFObjectWriter.cpp Mon Nov 22 16:05:16 2010 @@ -129,11 +129,11 @@ ELFRelocationEntry() : r_offset(0), Index(0), Type(0), Symbol(0), r_addend(0) {} - ELFRelocationEntry(uint64_t RelocOffset, int _Index, - unsigned _Type, const MCSymbol *_Symbol, + ELFRelocationEntry(uint64_t RelocOffset, int Idx, + unsigned RelType, const MCSymbol *Sym, uint64_t Addend) - : r_offset(RelocOffset), Index(_Index), Type(_Type), - Symbol(_Symbol), r_addend(Addend) {} + : r_offset(RelocOffset), Index(Idx), Type(RelType), + Symbol(Sym), r_addend(Addend) {} // Support lexicographic sorting. bool operator<(const ELFRelocationEntry &RE) const { @@ -1529,7 +1529,7 @@ uint64_t RelocOffset = Layout.getFragmentOffset(Fragment) + Fixup.getOffset(); - if (! HasRelocationAddend) Addend = 0; + if (!HasRelocationAddend) Addend = 0; ELFRelocationEntry ERE(RelocOffset, Index, Type, RelocSymbol, Addend); Relocations[Fragment->getParent()].push_back(ERE); } @@ -1741,7 +1741,7 @@ uint64_t RelocOffset = Layout.getFragmentOffset(Fragment) + Fixup.getOffset(); - if (! HasRelocationAddend) Addend = 0; + if (!HasRelocationAddend) Addend = 0; ELFRelocationEntry ERE(RelocOffset, Index, Type, RelocSymbol, Addend); Relocations[Fragment->getParent()].push_back(ERE); } From jasonwkim at google.com Mon Nov 22 16:21:22 2010 From: jasonwkim at google.com (Jason Kim) Date: Mon, 22 Nov 2010 14:21:22 -0800 Subject: [llvm-commits] [llvm] r119978 - /llvm/trunk/lib/MC/ELFObjectWriter.cpp In-Reply-To: References: <20101122184113.58BCD2A6C12C@llvm.org> Message-ID: On Mon, Nov 22, 2010 at 1:02 PM, Rafael Esp?ndola wrote: >> + ? ? ?ELFRelocationEntry(uint64_t RelocOffset, int _Index, >> + ? ? ? ? ? ? ? ? ? ? ? ? unsigned _Type, const MCSymbol *_Symbol, >> + ? ? ? ? ? ? ? ? ? ? ? ? uint64_t Addend) >> + ? ? ? ?: r_offset(RelocOffset), Index(_Index), Type(_Type), >> + ? ? ? ? ?Symbol(_Symbol), r_addend(Addend) {} > > Please don't use names starting with _. I know similar names exist > elsewhere, but names starting with _ are reserved. > >> + ?if (! HasRelocationAddend) Addend = 0; >> + ?ELFRelocationEntry ERE(RelocOffset, Index, Type, RelocSymbol, Addend); > > No space after the ! > > >> + ?if (! HasRelocationAddend) Addend = 0; >> + ?ELFRelocationEntry ERE(RelocOffset, Index, Type, RelocSymbol, Addend); > > Same. > > Thanks, > Rafael > All fixed. Thanks for catching these. -jason From rafael.espindola at gmail.com Mon Nov 22 17:07:53 2010 From: rafael.espindola at gmail.com (=?UTF-8?Q?Rafael_Esp=C3=ADndola?=) Date: Mon, 22 Nov 2010 23:07:53 +0000 Subject: [llvm-commits] [PATCH] Fix lowering of CALLpcrel32 with absolute address (PR8656) In-Reply-To: References: Message-ID: > Alternatively, I could change X86MCCodeEmitter::EmitImmediate(), so that > immediate operands can generate fixups. (I'd still have to generate an > MCConstantExpr for the value, since fixups track expressions). > Do you think this would be better? There is a FIXME in that code: // FIXME: is this right for pc-rel encoding?? Probably need to emit this as // a fixup if so. Looks like the problem you found. Can you check if the attached patch fixes the problem? > Thanks, > - David Meyer Cheers, Rafael -------------- next part -------------- A non-text attachment was scrubbed... Name: reloc.patch Type: application/octet-stream Size: 2120 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101122/152e26b1/attachment.obj From daniel at zuster.org Mon Nov 22 15:43:22 2010 From: daniel at zuster.org (Daniel Dunbar) Date: Mon, 22 Nov 2010 13:43:22 -0800 Subject: [llvm-commits] [PATCH] Object File Library In-Reply-To: References: Message-ID: On Nov 14, 2010, at 2:23 PM, Chris Lattner wrote: > > On Nov 14, 2010, at 1:51 PM, Rafael Esp?ndola wrote: > >> On 11 November 2010 21:23, Michael Spencer wrote: >>> Attached are updated patches to be reviewed. I've split them up into >>> the generic API, the COFF and ELF implementations, tool changes, and >>> tests. >> >> I hope you don't mind if at some point I move the basic ELF types from >> lib/Object/ELFObjectFile.cpp to a header file. I would *love* to use >> them in ELFObjectWriter.cpp :-) > > These enums should end up in include/llvm/Support, just like Dwarf.h and MachO.h etc. I'm with Michael on this one. I like it much better to put them in a clean layout like llvm/Object. I dislike "kitchen sink" directories like Support/. - Daniel > > -Chris > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From bigcheesegs at gmail.com Mon Nov 22 18:31:15 2010 From: bigcheesegs at gmail.com (Michael Spencer) Date: Mon, 22 Nov 2010 19:31:15 -0500 Subject: [llvm-commits] [Review request] test/CodeGen/X86: Add cases for Win64 to 67 tests In-Reply-To: References: Message-ID: On Mon, Nov 22, 2010 at 2:49 AM, NAKAMURA Takumi wrote: > Hello guys! > > llc infers -march=x86-64 as -mtriple=x86_64-(mingw32|win32). > Then many tests in CodeGen/X86 would fail due to ABI difference > between AMD64 and Win64. > (or Win64 codegen's inefficiency) > > The principle to rewrite tests is as below; > > ?- Tests should not hide possible win64's behavior. > ? ?They could exclude Win64 when they were obviously nonsense. > ?- Tests should not depend on hosts. Win64's failure should be > detected also on other platforms. > ? ?When a test has -mtriple=x86_64-linux, it should have also > -mtriple=x86_64-win32. > ?- Some tests might be dubious for Win64. I took two cases. > ? ?- Mark ?them as XFAIL: mingw, win32, to detect when they were fixed. > ? ?- Add *as-is* pattern to tests. You shall know they are really ugly. :D > > Guys, please, I would like everyone to help me to brush up my patches. > Feel free for yourself to commit one when you might be self-approved. > > * 0001-test-CodeGen-X86-fold-mul-lohi.ll-FileCheck-ize-and-.patch > > ?Win64 tends to emit "lea (%rip)". I excluded it from win64 tests. > > * 0002-test-CodeGen-X86-red-zone.ll-Add-explicit-mtriple-x8.patch > > ?Win64 doesn't use redzone stuff. Looks good to me. > * 0003-test-CodeGen-X86-sse_reload_fold.ll-FileCheck-ize-an.patch > > ?I don't understand what it intends. I am happy if someone explain to me. :) Looks good, except |& can be changed to |. I don't really know what this is testing. > * 0004-test-CodeGen-X86-store_op_load_fold2.ll-Add-a-test-f.patch > > ?Alignment of 13th member in the struct makes difference. I would feel better if I actually knew what was being tested, but if the index is indeed significant, this looks good. > * 0005-test-CodeGen-X86-v2f32.ll-Fix-missing-tests-and-add-.patch > > ?I re-enabled 3 tests and added *as-is* Win64's patterns. This looks correct to me. Stupid Windows x86-64 only using 4 GPRs for argument passing :(. Although I think we can get rid of the shadow stack because this is a leaf function. > * 0006-test-CodeGen-X86-Add-the-as-is-pattern-for-Win64.patch > > ?I added *as-is* patterns for Win64. I intend for reviewrs to help to > reduce their expressions. This one is going to take a while to review :P. > * 0007-test-CodeGen-X86-Mark-as-XFAIL-mingw-win32.-They-sho.patch > > ?I thought they could be fixed in future. When one were fixed, "llc > -mtriple=x86_64-win32" should be added. I noticed you documented some of these. Can you document the rest and please not only reference PR numbers? > * 0008-test-CodeGen-X86-FileCheck-ize-with-relaxed-expressi.patch > > ?Please watch out; > ? ?- Is my FileCheck-izing reasonable? > ? ?- Do relaxed patterns have any faults? diff --git a/test/CodeGen/X86/2007-01-08-X86-64-Pointer.ll b/test/CodeGen/X86/2007-01-08-X86-64-Pointer.ll index de226a1..90e7fab 100644 --- a/test/CodeGen/X86/2007-01-08-X86-64-Pointer.ll +++ b/test/CodeGen/X86/2007-01-08-X86-64-Pointer.ll @@ -1,5 +1,8 @@ -; RUN: llc %s -o - -march=x86-64 | grep {(%rdi,%rax,8)} -; RUN: llc %s -o - -march=x86-64 | not grep {addq.*8} +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s +; CHECK-NOT: {{addq.*8}} +; CHECK: ({{%rdi,%rax|%rcx,%rax}},8) +; CHECK-NOT: {{addq.*8}} The patterns can be changed to. +; CHECK-NOT: addq{{.*}}8 +; CHECK: (%r{{di|cx}},%rax,8) +; CHECK-NOT: addq{{.*}}8 A bunch of others are like this too. Put the minimum amount of text in the brackets. Only Linux and Windows are handled, not Darwin. I agree that all testers should test code gen for more than just the host platform, but we need to not exclude major platforms. Other than that it looks fine, but I'm not sure if they are only testing what the author wanted. I really wish people would document their tests. > * 0009-test-CodeGen-X86-FileCheck-ize-and-add-the-case-for-.patch > > ?I added "WIN64:"(and similar) expressions to them. > ?I wonder it might be reasonable. Adding WIN64 is OK if the test actually relies on how arguments are passed or other ABI issues. Other than that, same comments as above. > * 0010-test-CodeGen-X86-Relax-expressions-for-Win64.patch > > ?They are FileCheck-ized on ToT. I tweaked them with relaxation to > recognize Win64 ABI. Same again. > Have a happy testing! ...Takumi > > > > test/CodeGen/X86/2007-01-08-X86-64-Pointer.ll ? ?| ? ?7 ++- > test/CodeGen/X86/2007-07-18-Vector-Extract.ll ? ?| ? ?6 +- > test/CodeGen/X86/2008-06-13-VolatileLoadStore.ll | ? ?9 ++- > test/CodeGen/X86/add.ll ? ? ? ? ? ? ? ? ? ? ? ? ?| ? 11 ++-- > test/CodeGen/X86/avoid-lea-scale2.ll ? ? ? ? ? ? | ? ?5 +- > test/CodeGen/X86/bitcast2.ll ? ? ? ? ? ? ? ? ? ? | ? 22 ++++++- > test/CodeGen/X86/break-sse-dep.ll ? ? ? ? ? ? ? ?| ? 15 ++-- > test/CodeGen/X86/byval.ll ? ? ? ? ? ? ? ? ? ? ? ?| ? ?9 ++- > test/CodeGen/X86/byval2.ll ? ? ? ? ? ? ? ? ? ? ? | ? 39 ++++++++++- > test/CodeGen/X86/byval3.ll ? ? ? ? ? ? ? ? ? ? ? | ? 42 +++++++++++- > test/CodeGen/X86/byval4.ll ? ? ? ? ? ? ? ? ? ? ? | ? 42 +++++++++++- > test/CodeGen/X86/byval5.ll ? ? ? ? ? ? ? ? ? ? ? | ? 42 +++++++++++- > test/CodeGen/X86/coalescer-commute2.ll ? ? ? ? ? | ? 21 +++++- > test/CodeGen/X86/codegen-prepare-extload.ll ? ? ?| ? ?5 +- > test/CodeGen/X86/constant-pool-remat-0.ll ? ? ? ?| ? 35 +++++++++- > test/CodeGen/X86/constant-pool-sharing.ll ? ? ? ?| ? ?7 +- > test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll ?| ? 12 +++- > test/CodeGen/X86/fast-isel-cmp-branch.ll ? ? ? ? | ? ?7 +- > test/CodeGen/X86/fast-isel-gep.ll ? ? ? ? ? ? ? ?| ? 11 ++-- > test/CodeGen/X86/fold-mul-lohi.ll ? ? ? ? ? ? ? ?| ? ?5 +- > test/CodeGen/X86/gather-addresses.ll ? ? ? ? ? ? | ? 23 ++++--- > test/CodeGen/X86/h-register-store.ll ? ? ? ? ? ? | ? 32 +++++++-- > test/CodeGen/X86/h-registers-0.ll ? ? ? ? ? ? ? ?| ? 24 +++++++- > test/CodeGen/X86/i128-ret.ll ? ? ? ? ? ? ? ? ? ? | ? ?6 +- > test/CodeGen/X86/i64-mem-copy.ll ? ? ? ? ? ? ? ? | ? ?8 ++- > test/CodeGen/X86/iabs.ll ? ? ? ? ? ? ? ? ? ? ? ? | ? ?8 ++- > test/CodeGen/X86/lea-3.ll ? ? ? ? ? ? ? ? ? ? ? ?| ? 15 +++-- > test/CodeGen/X86/lea.ll ? ? ? ? ? ? ? ? ? ? ? ? ?| ? ?9 ++- > test/CodeGen/X86/lsr-overflow.ll ? ? ? ? ? ? ? ? | ? ?5 +- > test/CodeGen/X86/lsr-reuse-trunc.ll ? ? ? ? ? ? ?| ? ?9 ++- > test/CodeGen/X86/masked-iv-safe.ll ? ? ? ? ? ? ? | ? 43 ++++++++++--- > test/CodeGen/X86/memcmp.ll ? ? ? ? ? ? ? ? ? ? ? | ? 21 +++--- > test/CodeGen/X86/mmx-copy-gprs.ll ? ? ? ? ? ? ? ?| ? 10 ++- > test/CodeGen/X86/movgs.ll ? ? ? ? ? ? ? ? ? ? ? ?| ? ?7 +- > test/CodeGen/X86/optimize-max-3.ll ? ? ? ? ? ? ? | ? 11 ++-- > test/CodeGen/X86/peep-vector-extract-concat.ll ? | ? 11 +++- > test/CodeGen/X86/pmulld.ll ? ? ? ? ? ? ? ? ? ? ? | ? 12 +++- > test/CodeGen/X86/red-zone.ll ? ? ? ? ? ? ? ? ? ? | ? ?2 +- > test/CodeGen/X86/red-zone2.ll ? ? ? ? ? ? ? ? ? ?| ? 11 ++- > test/CodeGen/X86/remat-mov-0.ll ? ? ? ? ? ? ? ? ?| ? 15 ++-- > test/CodeGen/X86/scalar-min-max-fill-operand.ll ?| ? 34 +++++++++- > test/CodeGen/X86/select-aggregate.ll ? ? ? ? ? ? | ? ?7 +- > test/CodeGen/X86/sse-align-0.ll ? ? ? ? ? ? ? ? ?| ? 25 +++++++- > test/CodeGen/X86/sse-align-3.ll ? ? ? ? ? ? ? ? ?| ? 22 ++++++- > test/CodeGen/X86/sse-align-7.ll ? ? ? ? ? ? ? ? ?| ? ?8 ++- > test/CodeGen/X86/sse-commute.ll ? ? ? ? ? ? ? ? ?| ? 12 +++- > test/CodeGen/X86/sse-minmax.ll ? ? ? ? ? ? ? ? ? | ? ?2 + > test/CodeGen/X86/sse_reload_fold.ll ? ? ? ? ? ? ?| ? ?5 +- > test/CodeGen/X86/stdarg.ll ? ? ? ? ? ? ? ? ? ? ? | ? 16 ++++- > test/CodeGen/X86/store_op_load_fold2.ll ? ? ? ? ?| ? ?9 ++- > test/CodeGen/X86/stride-nine-with-base-reg.ll ? ?| ? 34 +++++++++- > test/CodeGen/X86/stride-reuse.ll ? ? ? ? ? ? ? ? | ? 33 +++++++++- > test/CodeGen/X86/subreg-to-reg-4.ll ? ? ? ? ? ? ?| ? 11 +-- > test/CodeGen/X86/tailcallbyval64.ll ? ? ? ? ? ? ?| ? 62 ++++++++++++++++- > test/CodeGen/X86/tailcallstack64.ll ? ? ? ? ? ? ?| ? ?3 +- > test/CodeGen/X86/test-shrink.ll ? ? ? ? ? ? ? ? ?| ? 21 +++--- > test/CodeGen/X86/unknown-location.ll ? ? ? ? ? ? | ? ?5 +- > test/CodeGen/X86/use-add-flags.ll ? ? ? ? ? ? ? ?| ? 15 ++-- > test/CodeGen/X86/v2f32.ll ? ? ? ? ? ? ? ? ? ? ? ?| ? 77 ++++++++++++++++++--- > test/CodeGen/X86/vec_cast.ll ? ? ? ? ? ? ? ? ? ? | ? ?3 +- > test/CodeGen/X86/vec_set-8.ll ? ? ? ? ? ? ? ? ? ?| ? ?7 ++- > test/CodeGen/X86/vec_set-F.ll ? ? ? ? ? ? ? ? ? ?| ? 22 +++++- > test/CodeGen/X86/vec_shuffle-17.ll ? ? ? ? ? ? ? | ? ?7 ++- > test/CodeGen/X86/vec_shuffle-37.ll ? ? ? ? ? ? ? | ? ?5 +- > test/CodeGen/X86/widen_load-0.ll ? ? ? ? ? ? ? ? | ? ?8 ++- > test/CodeGen/X86/x86-64-malloc.ll ? ? ? ? ? ? ? ?| ? ?4 +- > test/CodeGen/X86/xor.ll ? ? ? ? ? ? ? ? ? ? ? ? ?| ? ?9 ++- > 67 files changed, 884 insertions(+), 216 deletions(-) > Thanks again for doing this. All these tests now pass for me on MSVC 2010 32bit and MinGW32 on Windows 7 x64. - Michael Spencer From bigcheesegs at gmail.com Mon Nov 22 19:00:13 2010 From: bigcheesegs at gmail.com (Michael Spencer) Date: Mon, 22 Nov 2010 20:00:13 -0500 Subject: [llvm-commits] [PATCH] Object File Library In-Reply-To: References: Message-ID: On Thu, Nov 11, 2010 at 9:23 PM, Michael Spencer wrote: > Attached are updated patches to be reviewed. I've split them up into > the generic API, the COFF and ELF implementations, tool changes, and > tests. > > This does not currently implement the Serialization/Normalization > split that I reference in my talk. I'm going to wait to do that split > until the line is firmly defined, as I still haven't figured out how > exactly to represent relocation data. > > A current major blocker that you can see throughout the ELF > implementation (and ignored in COFF (which I knew much better and > didn't need debugging help)) is how invalid object file errors are > handled. I currently just call report_fatal_error, which is really not > how they should be handled. I've been complaining about the same > problem in the System library on IRC recently too while trying to > clean up the Windows impl. > > What I would like to do is use an error object based on the concept of > std::error_code to report both system (IO, memory, syscall), and > "parsing" errors from invalid object files. This should also include > at least the address in the file at which the error occurred. I don't > feel that we need detailed (clang style :P) diagnostics because tools > generate object files, not people. At the same time I don't want to > just dump "object file invalid at 0xdeadbeef" to the user. Using > 'std::error_category' would allow mixing the two while proving more > detailed info such as "invalid symbol name string index at > 0xblahblah". Also, each object file could use a custom error_category > for special errors. It also allows clients that simply don't care to > just check for success and not pay for message formatting. > > - Michael Spencer > Pinging reviews on the rest of the patches (all but the first). - Michael Spencer From clattner at apple.com Mon Nov 22 20:20:33 2010 From: clattner at apple.com (Chris Lattner) Date: Mon, 22 Nov 2010 18:20:33 -0800 Subject: [llvm-commits] [PATCH] Object File Library In-Reply-To: References: Message-ID: On Nov 22, 2010, at 1:43 PM, Daniel Dunbar wrote: >> These enums should end up in include/llvm/Support, just like Dwarf.h and MachO.h etc. > > I'm with Michael on this one. I like it much better to put them in a clean layout like llvm/Object. I dislike "kitchen sink" directories like Support/. I agree, llvm/Object is a good place for these headers (better than Support) now that it exists. Dwarf.h should also move as well. -Chris From sabre at nondot.org Mon Nov 22 20:26:53 2010 From: sabre at nondot.org (Chris Lattner) Date: Tue, 23 Nov 2010 02:26:53 -0000 Subject: [llvm-commits] [llvm] r119987 - in /llvm/trunk/test/CodeGen/SPARC: basictest.ll xnor.ll Message-ID: <20101123022653.207B92A6C12C@llvm.org> Author: lattner Date: Mon Nov 22 20:26:52 2010 New Revision: 119987 URL: http://llvm.org/viewvc/llvm-project?rev=119987&view=rev Log: filecheckize Removed: llvm/trunk/test/CodeGen/SPARC/xnor.ll Modified: llvm/trunk/test/CodeGen/SPARC/basictest.ll Modified: llvm/trunk/test/CodeGen/SPARC/basictest.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SPARC/basictest.ll?rev=119987&r1=119986&r2=119987&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/SPARC/basictest.ll (original) +++ llvm/trunk/test/CodeGen/SPARC/basictest.ll Mon Nov 22 20:26:52 2010 @@ -1,6 +1,26 @@ -; RUN: llc < %s -march=sparc +; RUN: llc < %s -march=sparc | FileCheck %s -define i32 @test(i32 %X) { +define i32 @test0(i32 %X) { %tmp.1 = add i32 %X, 1 ret i32 %tmp.1 +; CHECK: test0: +; CHECK: add %i0, 1, %i0 +} + + +;; xnor tests. +define i32 @test1(i32 %X, i32 %Y) { + %A = xor i32 %X, %Y + %B = xor i32 %A, -1 + ret i32 %B +; CHECK: test1: +; CHECK: xnor %i0, %i1, %i0 +} + +define i32 @test2(i32 %X, i32 %Y) { + %A = xor i32 %X, -1 + %B = xor i32 %A, %Y + ret i32 %B +; CHECK: test2: +; CHECK: xnor %i0, %i1, %i0 } Removed: llvm/trunk/test/CodeGen/SPARC/xnor.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SPARC/xnor.ll?rev=119986&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/SPARC/xnor.ll (original) +++ llvm/trunk/test/CodeGen/SPARC/xnor.ll (removed) @@ -1,15 +0,0 @@ -; RUN: llc < %s -march=sparc | \ -; RUN: grep xnor | count 2 - -define i32 @test1(i32 %X, i32 %Y) { - %A = xor i32 %X, %Y ; [#uses=1] - %B = xor i32 %A, -1 ; [#uses=1] - ret i32 %B -} - -define i32 @test2(i32 %X, i32 %Y) { - %A = xor i32 %X, -1 ; [#uses=1] - %B = xor i32 %A, %Y ; [#uses=1] - ret i32 %B -} - From clattner at apple.com Mon Nov 22 20:31:50 2010 From: clattner at apple.com (Chris Lattner) Date: Mon, 22 Nov 2010 18:31:50 -0800 Subject: [llvm-commits] Review request: dominator tree construction speedup In-Reply-To: <5BAC0948-3163-4C50-9D36-4127BA8A5EDF@apple.com> References: <5BAC0948-3163-4C50-9D36-4127BA8A5EDF@apple.com> Message-ID: On Nov 22, 2010, at 1:56 AM, Cameron Zwarich wrote: > There is a cheap speedup in the implementation of the Lengauer-Tarjan algorithm. In the main loop, when you are about to add a node to its semidominator's bucket, you first check if the semidominator is the node's parent. If it is, then you know that its immediate dominator will be its parent and there is no need to put it into the bucket for later processing. > > This is a 9.7% speedup running domtree on test-suite. Wow, nice. Please add a comment explaining this, otherwise looks great! Please commit, -Chris From sabre at nondot.org Mon Nov 22 20:42:04 2010 From: sabre at nondot.org (Chris Lattner) Date: Tue, 23 Nov 2010 02:42:04 -0000 Subject: [llvm-commits] [llvm] r119988 - in /llvm/trunk: lib/Transforms/InstCombine/InstCombineCompares.cpp test/Transforms/InstCombine/icmp.ll Message-ID: <20101123024204.53FCB2A6C12C@llvm.org> Author: lattner Date: Mon Nov 22 20:42:04 2010 New Revision: 119988 URL: http://llvm.org/viewvc/llvm-project?rev=119988&view=rev Log: duncan's spider sense was right, I completely reversed the condition on this instcombine xform. This fixes a miscompilation of 403.gcc. Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp llvm/trunk/test/Transforms/InstCombine/icmp.ll Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp?rev=119988&r1=119987&r2=119988&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp Mon Nov 22 20:42:04 2010 @@ -1761,22 +1761,22 @@ LHS = Op0; // If the LHS is 1 << x, and we know the result is a power of 2 like 8, - // then turn "((1 << x)&8) == 0" into "x == 3". + // then turn "((1 << x)&8) == 0" into "x != 3". Value *X = 0; if (match(LHS, m_Shl(m_One(), m_Value(X)))) { unsigned CmpVal = Op0KnownZeroInverted.countTrailingZeros(); - return new ICmpInst(ICmpInst::ICMP_EQ, X, + return new ICmpInst(ICmpInst::ICMP_NE, X, ConstantInt::get(X->getType(), CmpVal)); } // If the LHS is 8 >>u x, and we know the result is a power of 2 like 1, - // then turn "((8 >>u x)&1) == 0" into "x == 3". + // then turn "((8 >>u x)&1) == 0" into "x != 3". ConstantInt *CI = 0; if (Op0KnownZeroInverted == 1 && match(LHS, m_LShr(m_ConstantInt(CI), m_Value(X))) && CI->getValue().isPowerOf2()) { unsigned CmpVal = CI->getValue().countTrailingZeros(); - return new ICmpInst(ICmpInst::ICMP_EQ, X, + return new ICmpInst(ICmpInst::ICMP_NE, X, ConstantInt::get(X->getType(), CmpVal)); } } @@ -1800,22 +1800,22 @@ LHS = Op0; // If the LHS is 1 << x, and we know the result is a power of 2 like 8, - // then turn "((1 << x)&8) != 0" into "x != 3". + // then turn "((1 << x)&8) != 0" into "x == 3". Value *X = 0; if (match(LHS, m_Shl(m_One(), m_Value(X)))) { unsigned CmpVal = Op0KnownZeroInverted.countTrailingZeros(); - return new ICmpInst(ICmpInst::ICMP_NE, X, + return new ICmpInst(ICmpInst::ICMP_EQ, X, ConstantInt::get(X->getType(), CmpVal)); } // If the LHS is 8 >>u x, and we know the result is a power of 2 like 1, - // then turn "((8 >>u x)&1) != 0" into "x != 3". + // then turn "((8 >>u x)&1) != 0" into "x == 3". ConstantInt *CI = 0; if (Op0KnownZeroInverted == 1 && match(LHS, m_LShr(m_ConstantInt(CI), m_Value(X))) && CI->getValue().isPowerOf2()) { unsigned CmpVal = CI->getValue().countTrailingZeros(); - return new ICmpInst(ICmpInst::ICMP_NE, X, + return new ICmpInst(ICmpInst::ICMP_EQ, X, ConstantInt::get(X->getType(), CmpVal)); } } Modified: llvm/trunk/test/Transforms/InstCombine/icmp.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/icmp.ll?rev=119988&r1=119987&r2=119988&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/icmp.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/icmp.ll Mon Nov 22 20:42:04 2010 @@ -161,7 +161,7 @@ %cmp = icmp eq i32 %and, 0 ret i1 %cmp ; CHECK: @test17 -; CHECK-NEXT: %cmp = icmp eq i32 %x, 3 +; CHECK-NEXT: %cmp = icmp ne i32 %x, 3 } @@ -171,7 +171,7 @@ %cmp = icmp eq i32 %and, 0 ret i1 %cmp ; CHECK: @test18 -; CHECK-NEXT: %cmp = icmp eq i32 %x, 3 +; CHECK-NEXT: %cmp = icmp ne i32 %x, 3 } define i1 @test19(i32 %x) nounwind { @@ -180,7 +180,7 @@ %cmp = icmp eq i32 %and, 8 ret i1 %cmp ; CHECK: @test19 -; CHECK-NEXT: %cmp = icmp ne i32 %x, 3 +; CHECK-NEXT: %cmp = icmp eq i32 %x, 3 } define i1 @test20(i32 %x) nounwind { @@ -189,6 +189,6 @@ %cmp = icmp ne i32 %and, 0 ret i1 %cmp ; CHECK: @test20 -; CHECK-NEXT: %cmp = icmp ne i32 %x, 3 +; CHECK-NEXT: %cmp = icmp eq i32 %x, 3 } From clattner at apple.com Mon Nov 22 20:44:46 2010 From: clattner at apple.com (Chris Lattner) Date: Mon, 22 Nov 2010 18:44:46 -0800 Subject: [llvm-commits] [llvm] r119922 - in /llvm/trunk: lib/Target/README.txt lib/Transforms/InstCombine/InstCombineCompares.cpp test/Transforms/InstCombine/icmp.ll In-Reply-To: <4CEA2888.7010807@free.fr> References: <20101121064442.D67662A6C12C@llvm.org> <4CE922FD.8000108@free.fr> <4CE9512A.8070607@free.fr> <2E713725-02A2-4F6C-926C-959AFA706758@apple.com> <4CEA2888.7010807@free.fr> Message-ID: <92FF782B-CBCA-4D3A-BE0A-8E0CAA2A7CC9@apple.com> On Nov 22, 2010, at 12:23 AM, Duncan Sands wrote: > Hi Chris, > >> Thanks for the review! > > now I think about it some more, aren't all the conditions inverted? > Consider this: > > // If the LHS is 1 << x, and we know the result is a power of 2 like 8, > // then turn "((1 << x)&8) == 0" into "x == 3". > > Shouldn't that be "x != 3" not "x == 3"? Likewise for the others. Yeah, you're completely right, fixed in r119988, thanks! -Chris From clattner at apple.com Mon Nov 22 20:48:50 2010 From: clattner at apple.com (Chris Lattner) Date: Mon, 22 Nov 2010 18:48:50 -0800 Subject: [llvm-commits] [PATCH] New Path API design. In-Reply-To: References: <7211435F-635D-4109-A27B-C536D81D0A91@apple.com> Message-ID: On Nov 20, 2010, at 3:06 PM, Michael Spencer wrote: >> +struct file_type { >> + enum _ { >> >> Why _ instead of giving it a name? I'd suggest file_type_kind. We use "kind" for discriminators elsewhere. > > The enums are like this to emulate 'enum class' from C++0x. Users > never directly use the _ name, they use 'file_type::xyz'. Ok. >> + int v_; >> >> Likewise, why v_? Particularly if this is public data it should have a good name and a doxygen comment. > > It should have been private. This is again just a helper to emulate > 'enum class'. Ok. >> +/// file_status - Represents the result of a call to stat and friends. It has >> +/// a platform specific member to store the result. >> +class file_status >> +{ >> >> Seems fine so far. Clang in particular is highly performance sensitive when it comes to stats and wants to reduce them wherever possible. It really wants to do things like use "open + fstat" instead of "stat+open" since fstat is faster than stat. This isn't a problem with your proposal, just pointing it out so that you're aware. > > Interesting. It should be simple enough to add a function that returns > both a raw_ostream and a file_status. Yep, I imagine that you'll find it when stuff starts converting over. Just be conscientious about syscalls in clang :) >> +error_code make_absolute(SmallVectorImpl &path); >> >> Please add doxygen comments to these with an example. Also, what happens if an empty string is passed in? > > I'm going to fully document everything. An empty string would result > in the current directory. Thanks again Michael! -Chris From sabre at nondot.org Mon Nov 22 20:47:22 2010 From: sabre at nondot.org (Chris Lattner) Date: Tue, 23 Nov 2010 02:47:22 -0000 Subject: [llvm-commits] [llvm] r119989 - in /llvm/trunk: include/llvm-c/Core.h lib/VMCore/Core.cpp Message-ID: <20101123024722.4D41E2A6C12C@llvm.org> Author: lattner Date: Mon Nov 22 20:47:22 2010 New Revision: 119989 URL: http://llvm.org/viewvc/llvm-project?rev=119989&view=rev Log: add a 'LLVMConstIntOfArbitraryPrecision' api to the C api, patch by Greg Pfeil! Modified: llvm/trunk/include/llvm-c/Core.h llvm/trunk/lib/VMCore/Core.cpp Modified: llvm/trunk/include/llvm-c/Core.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm-c/Core.h?rev=119989&r1=119988&r2=119989&view=diff ============================================================================== --- llvm/trunk/include/llvm-c/Core.h (original) +++ llvm/trunk/include/llvm-c/Core.h Mon Nov 22 20:47:22 2010 @@ -547,6 +547,9 @@ /* Operations on scalar constants */ LLVMValueRef LLVMConstInt(LLVMTypeRef IntTy, unsigned long long N, LLVMBool SignExtend); +LLVMValueRef LLVMConstIntOfArbitraryPrecision(LLVMTypeRef IntTy, + unsigned NumWords, + const uint64_t Words[]); LLVMValueRef LLVMConstIntOfString(LLVMTypeRef IntTy, const char *Text, uint8_t Radix); LLVMValueRef LLVMConstIntOfStringAndSize(LLVMTypeRef IntTy, const char *Text, Modified: llvm/trunk/lib/VMCore/Core.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Core.cpp?rev=119989&r1=119988&r2=119989&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Core.cpp (original) +++ llvm/trunk/lib/VMCore/Core.cpp Mon Nov 22 20:47:22 2010 @@ -547,6 +547,14 @@ return wrap(ConstantInt::get(unwrap(IntTy), N, SignExtend != 0)); } +LLVMValueRef LLVMConstIntOfArbitraryPrecision(LLVMTypeRef IntTy, + unsigned NumWords, + const uint64_t Words[]) { + IntegerType *Ty = unwrap(IntTy); + return wrap(ConstantInt::get(Ty->getContext(), + APInt(Ty->getBitWidth(), NumWords, Words))); +} + LLVMValueRef LLVMConstIntOfString(LLVMTypeRef IntTy, const char Str[], uint8_t Radix) { return wrap(ConstantInt::get(unwrap(IntTy), StringRef(Str), From clattner at apple.com Mon Nov 22 20:49:36 2010 From: clattner at apple.com (Chris Lattner) Date: Mon, 22 Nov 2010 18:49:36 -0800 Subject: [llvm-commits] [PATCH] add LLVMConstIntOfArbitraryPrecision In-Reply-To: <08DBBD69-8E82-43AE-9D2E-FF3E3BF8C690@technomadic.org> References: <08DBBD69-8E82-43AE-9D2E-FF3E3BF8C690@technomadic.org> Message-ID: Looks great, applied in r119989, thanks! On Nov 20, 2010, at 1:57 PM, Greg Pfeil wrote: > This is a tiny change that adds LLVMConstIntOfArbitraryPrecision (which calls ConstantInt::get(LLVMContext, APInt)) to the C API. > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From clattner at apple.com Mon Nov 22 21:06:37 2010 From: clattner at apple.com (Chris Lattner) Date: Mon, 22 Nov 2010 19:06:37 -0800 Subject: [llvm-commits] [llvm] r119718 - /llvm/trunk/lib/System/DynamicLibrary.cpp In-Reply-To: <20101118184905.CA91A2A6C12C@llvm.org> References: <20101118184905.CA91A2A6C12C@llvm.org> Message-ID: <2B3625C8-0CC4-4DCD-9471-8BA3055865AD@apple.com> On Nov 18, 2010, at 10:49 AM, Owen Anderson wrote: > Author: resistor > Date: Thu Nov 18 12:49:05 2010 > New Revision: 119718 > > URL: http://llvm.org/viewvc/llvm-project?rev=119718&view=rev > Log: > Use thread-safe statics to avoid a static constructor here. This isn't thread-safe on MSVC, but we don't > support threaded LLVM there anyways. Thanks! Not to be a pain, but this will cause a leak of the new'd mutex. Why not just do something like: static SmartMutex &getHandlesMutex() { static SmartMutex R; return R; } ... SmartScopedLock Lock(getHandlesMutex()); ... -Chris > > Modified: > llvm/trunk/lib/System/DynamicLibrary.cpp > > Modified: llvm/trunk/lib/System/DynamicLibrary.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/DynamicLibrary.cpp?rev=119718&r1=119717&r2=119718&view=diff > ============================================================================== > --- llvm/trunk/lib/System/DynamicLibrary.cpp (original) > +++ llvm/trunk/lib/System/DynamicLibrary.cpp Thu Nov 18 12:49:05 2010 > @@ -61,9 +61,19 @@ > //=== independent code. > //===----------------------------------------------------------------------===// > > -static SmartMutex HandlesMutex; > +static SmartMutex* HandlesMutex; > static std::vector *OpenedHandles = 0; > > +static bool InitializeMutex() { > + HandlesMutex = new SmartMutex; > + return HandlesMutex != 0; > +} > + > +static bool EnsureMutexInitialized() { > + static bool result = InitializeMutex(); > + return result; > +} > + > > bool DynamicLibrary::LoadLibraryPermanently(const char *Filename, > std::string *ErrMsg) { > @@ -78,7 +88,8 @@ > if (Filename == NULL) > H = RTLD_DEFAULT; > #endif > - SmartScopedLock Lock(HandlesMutex); > + EnsureMutexInitialized(); > + SmartScopedLock Lock(*HandlesMutex); > if (OpenedHandles == 0) > OpenedHandles = new std::vector(); > OpenedHandles->push_back(H); > @@ -113,7 +124,8 @@ > > #if HAVE_DLFCN_H > // Now search the libraries. > - SmartScopedLock Lock(HandlesMutex); > + EnsureMutexInitialized(); > + SmartScopedLock Lock(*HandlesMutex); > if (OpenedHandles) { > for (std::vector::iterator I = OpenedHandles->begin(), > E = OpenedHandles->end(); I != E; ++I) { > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From kennethuil at gmail.com Mon Nov 22 21:14:17 2010 From: kennethuil at gmail.com (Kenneth Uildriks) Date: Mon, 22 Nov 2010 21:14:17 -0600 Subject: [llvm-commits] [PATCH] Fix llvm.invariant support In-Reply-To: References: Message-ID: Ping. On Sat, Nov 13, 2010 at 7:00 PM, Kenneth Uildriks wrote: > A less drastic attempt to fix issues with support for > llvm.invariant.start and llvm.invariant.end. ?It involves adding > invariant tracking by block to MemoryDependenceAnalysis. ?When a load > is analyzed, the invariant information for that block and its > predecessors is lazily computed and consulted. ?If the load's target > is not invariant anywhere in the block, there is no need to look for > invariant markers during the scan. ?If it is invariant throughout the > block, no def or clobber can be in that block, so we can skip > backwards to the block(s) that began the invariance. ?If it is > invariant through part of the block, we need to continue scanning > backwards past clobbers until we find the def or an invariant marker - > we can't assume that the scan starts after the invariant end, but > instead assume that we *might* have started scanning in the middle of > an invariant region until we can prove otherwise. > -------------- next part -------------- A non-text attachment was scrubbed... Name: MemDep2.patch Type: text/x-patch Size: 16945 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101122/d7109986/attachment.bin From peckw at wesleypeck.com Mon Nov 22 21:31:02 2010 From: peckw at wesleypeck.com (Wesley Peck) Date: Tue, 23 Nov 2010 03:31:02 -0000 Subject: [llvm-commits] [llvm] r119990 - in /llvm/trunk: docs/ include/llvm/CodeGen/ include/llvm/Target/ lib/CodeGen/SelectionDAG/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/CellSPU/ lib/Target/MBlaze/ lib/Target/Mips/ lib/Target/PowerPC/ lib/Target/Sparc/ lib/Target/SystemZ/ lib/Target/X86/ Message-ID: <20101123033103.5978A2A6C12C@llvm.org> Author: peckw Date: Mon Nov 22 21:31:01 2010 New Revision: 119990 URL: http://llvm.org/viewvc/llvm-project?rev=119990&view=rev Log: Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept. Modified: llvm/trunk/docs/WritingAnLLVMBackend.html llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h llvm/trunk/include/llvm/Target/TargetSelectionDAG.td llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp llvm/trunk/lib/Target/ARM/ARMFastISel.cpp llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp llvm/trunk/lib/Target/MBlaze/MBlazeISelLowering.cpp llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp llvm/trunk/lib/Target/PowerPC/README.txt llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp llvm/trunk/lib/Target/X86/X86FastISel.cpp llvm/trunk/lib/Target/X86/X86ISelLowering.cpp llvm/trunk/lib/Target/X86/X86ISelLowering.h Modified: llvm/trunk/docs/WritingAnLLVMBackend.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/WritingAnLLVMBackend.html?rev=119990&r1=119989&r2=119990&view=diff ============================================================================== --- llvm/trunk/docs/WritingAnLLVMBackend.html (original) +++ llvm/trunk/docs/WritingAnLLVMBackend.html Mon Nov 22 21:31:01 2010 @@ -1825,7 +1825,7 @@ static SDValue LowerFP_TO_SINT(SDValue Op, SelectionDAG &DAG) { assert(Op.getValueType() == MVT::i32); Op = DAG.getNode(SPISD::FTOI, MVT::f32, Op.getOperand(0)); - return DAG.getNode(ISD::BIT_CONVERT, MVT::i32, Op); + return DAG.getNode(ISD::BITCAST, MVT::i32, Op); } Modified: llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h?rev=119990&r1=119989&r2=119990&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h (original) +++ llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h Mon Nov 22 21:31:01 2010 @@ -274,11 +274,11 @@ /// IDX, which must be a multiple of the result vector length. EXTRACT_SUBVECTOR, - /// VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as + /// VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as /// VEC1/VEC2. A VECTOR_SHUFFLE node also contains an array of constant int /// values that indicate which value (or undef) each result element will - /// get. These constant ints are accessible through the - /// ShuffleVectorSDNode class. This is quite similar to the Altivec + /// get. These constant ints are accessible through the + /// ShuffleVectorSDNode class. This is quite similar to the Altivec /// 'vperm' instruction, except that the indices must be constants and are /// in terms of the element size of VEC1/VEC2, not in terms of bytes. VECTOR_SHUFFLE, @@ -399,14 +399,14 @@ /// X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type. FP_EXTEND, - // BIT_CONVERT - This operator converts between integer, vector and FP + // BITCAST - This operator converts between integer, vector and FP // values, as if the value was stored to memory with one type and loaded // from the same address with the other type (or equivalently for vector // format conversions, etc). The source and result are required to have // the same bit size (e.g. f32 <-> i32). This can also be used for // int-to-int or fp-to-fp conversions, but that is a noop, deleted by // getNode(). - BIT_CONVERT, + BITCAST, // CONVERT_RNDSAT - This operator is used to support various conversions // between various types (float, signed, unsigned and vectors of those @@ -532,7 +532,7 @@ // SRCVALUE - This is a node type that holds a Value* that is used to // make reference to a value in the LLVM IR. SRCVALUE, - + // MDNODE_SDNODE - This is a node that holdes an MDNode*, which is used to // reference metadata in the IR. MDNODE_SDNODE, Modified: llvm/trunk/include/llvm/Target/TargetSelectionDAG.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetSelectionDAG.td?rev=119990&r1=119989&r2=119990&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetSelectionDAG.td (original) +++ llvm/trunk/include/llvm/Target/TargetSelectionDAG.td Mon Nov 22 21:31:01 2010 @@ -1,10 +1,10 @@ //===- TargetSelectionDAG.td - Common code for DAG isels ---*- tablegen -*-===// -// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file defines the target-independent interfaces used by SelectionDAG @@ -123,10 +123,10 @@ def SDTFPExtendOp : SDTypeProfile<1, 1, [ // fextend SDTCisFP<0>, SDTCisFP<1>, SDTCisOpSmallerThanOp<1, 0> ]>; -def SDTIntToFPOp : SDTypeProfile<1, 1, [ // [su]int_to_fp +def SDTIntToFPOp : SDTypeProfile<1, 1, [ // [su]int_to_fp SDTCisFP<0>, SDTCisInt<1> ]>; -def SDTFPToIntOp : SDTypeProfile<1, 1, [ // fp_to_[su]int +def SDTFPToIntOp : SDTypeProfile<1, 1, [ // fp_to_[su]int SDTCisInt<0>, SDTCisFP<1> ]>; def SDTExtInreg : SDTypeProfile<1, 2, [ // sext_inreg @@ -138,7 +138,7 @@ SDTCisInt<0>, SDTCisSameAs<1, 2>, SDTCisVT<3, OtherVT> ]>; -def SDTSelect : SDTypeProfile<1, 3, [ // select +def SDTSelect : SDTypeProfile<1, 3, [ // select SDTCisInt<1>, SDTCisSameAs<0, 2>, SDTCisSameAs<2, 3> ]>; @@ -162,11 +162,11 @@ def SDTNone : SDTypeProfile<0, 0, []>; // ret, trap def SDTLoad : SDTypeProfile<1, 1, [ // load - SDTCisPtrTy<1> + SDTCisPtrTy<1> ]>; def SDTStore : SDTypeProfile<0, 2, [ // store - SDTCisPtrTy<1> + SDTCisPtrTy<1> ]>; def SDTIStore : SDTypeProfile<1, 3, [ // indexed store @@ -235,7 +235,7 @@ // Selection DAG Node definitions. // class SDNode props = [], string sdclass = "SDNode"> + list props = [], string sdclass = "SDNode"> : SDPatternOperator { string Opcode = opcode; string SDClass = sdclass; @@ -319,7 +319,7 @@ [SDNPOutFlag]>; def sube : SDNode<"ISD::SUBE" , SDTIntBinOp, [SDNPOutFlag, SDNPInFlag]>; - + def sext_inreg : SDNode<"ISD::SIGN_EXTEND_INREG", SDTExtInreg>; def bswap : SDNode<"ISD::BSWAP" , SDTIntUnaryOp>; def ctlz : SDNode<"ISD::CTLZ" , SDTIntUnaryOp>; @@ -329,11 +329,11 @@ def zext : SDNode<"ISD::ZERO_EXTEND", SDTIntExtendOp>; def anyext : SDNode<"ISD::ANY_EXTEND" , SDTIntExtendOp>; def trunc : SDNode<"ISD::TRUNCATE" , SDTIntTruncOp>; -def bitconvert : SDNode<"ISD::BIT_CONVERT", SDTUnaryOp>; +def bitconvert : SDNode<"ISD::BITCAST" , SDTUnaryOp>; def extractelt : SDNode<"ISD::EXTRACT_VECTOR_ELT", SDTVecExtract>; def insertelt : SDNode<"ISD::INSERT_VECTOR_ELT", SDTVecInsert>; - + def fadd : SDNode<"ISD::FADD" , SDTFPBinOp, [SDNPCommutative]>; def fsub : SDNode<"ISD::FSUB" , SDTFPBinOp>; def fmul : SDNode<"ISD::FMUL" , SDTFPBinOp, [SDNPCommutative]>; @@ -423,16 +423,16 @@ SDTypeProfile<1, 2, [SDTCisPtrTy<2>]>, []>; def vector_insert : SDNode<"ISD::INSERT_VECTOR_ELT", SDTypeProfile<1, 3, [SDTCisSameAs<0, 1>, SDTCisPtrTy<3>]>, []>; - + // Nodes for intrinsics, you should use the intrinsic itself and let tblgen use // these internally. Don't reference these directly. -def intrinsic_void : SDNode<"ISD::INTRINSIC_VOID", +def intrinsic_void : SDNode<"ISD::INTRINSIC_VOID", SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>, [SDNPHasChain]>; -def intrinsic_w_chain : SDNode<"ISD::INTRINSIC_W_CHAIN", +def intrinsic_w_chain : SDNode<"ISD::INTRINSIC_W_CHAIN", SDTypeProfile<1, -1, [SDTCisPtrTy<1>]>, [SDNPHasChain]>; -def intrinsic_wo_chain : SDNode<"ISD::INTRINSIC_WO_CHAIN", +def intrinsic_wo_chain : SDNode<"ISD::INTRINSIC_WO_CHAIN", SDTypeProfile<1, -1, [SDTCisPtrTy<1>]>, []>; // Do not use cvt directly. Use cvt forms below Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=119990&r1=119989&r2=119990&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Mon Nov 22 21:31:01 2010 @@ -185,7 +185,7 @@ SDValue visitANY_EXTEND(SDNode *N); SDValue visitSIGN_EXTEND_INREG(SDNode *N); SDValue visitTRUNCATE(SDNode *N); - SDValue visitBIT_CONVERT(SDNode *N); + SDValue visitBITCAST(SDNode *N); SDValue visitBUILD_PAIR(SDNode *N); SDValue visitFADD(SDNode *N); SDValue visitFSUB(SDNode *N); @@ -229,7 +229,7 @@ SDValue SimplifyNodeWithTwoResults(SDNode *N, unsigned LoOp, unsigned HiOp); SDValue CombineConsecutiveLoads(SDNode *N, EVT VT); - SDValue ConstantFoldBIT_CONVERTofBUILD_VECTOR(SDNode *, EVT); + SDValue ConstantFoldBITCASTofBUILD_VECTOR(SDNode *, EVT); SDValue BuildSDIV(SDNode *N); SDValue BuildUDIV(SDNode *N); SDNode *MatchRotate(SDValue LHS, SDValue RHS, DebugLoc DL); @@ -273,15 +273,15 @@ /// Run - runs the dag combiner on all nodes in the work list void Run(CombineLevel AtLevel); - + SelectionDAG &getDAG() const { return DAG; } - + /// getShiftAmountTy - Returns a type large enough to hold any valid /// shift amount - before type legalization these can be huge. EVT getShiftAmountTy() { return LegalTypes ? TLI.getShiftAmountTy() : TLI.getPointerTy(); } - + /// isTypeLegal - This method returns true if we are running before type /// legalization or if the specified VT is legal. bool isTypeLegal(const EVT &VT) { @@ -634,7 +634,7 @@ // Replace the old value with the new one. ++NodesCombined; - DEBUG(dbgs() << "\nReplacing.2 "; + DEBUG(dbgs() << "\nReplacing.2 "; TLO.Old.getNode()->dump(&DAG); dbgs() << "\nWith: "; TLO.New.getNode()->dump(&DAG); @@ -694,7 +694,7 @@ unsigned ExtOpc = Op.getValueType().isByteSized() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; return DAG.getNode(ExtOpc, dl, PVT, Op); - } + } } if (!TLI.isOperationLegal(ISD::ANY_EXTEND, PVT)) @@ -978,7 +978,7 @@ RV.getNode()->getOpcode() != ISD::DELETED_NODE && "Node was deleted but visit returned new node!"); - DEBUG(dbgs() << "\nReplacing.3 "; + DEBUG(dbgs() << "\nReplacing.3 "; N->dump(&DAG); dbgs() << "\nWith: "; RV.getNode()->dump(&DAG); @@ -1057,7 +1057,7 @@ case ISD::ANY_EXTEND: return visitANY_EXTEND(N); case ISD::SIGN_EXTEND_INREG: return visitSIGN_EXTEND_INREG(N); case ISD::TRUNCATE: return visitTRUNCATE(N); - case ISD::BIT_CONVERT: return visitBIT_CONVERT(N); + case ISD::BITCAST: return visitBITCAST(N); case ISD::BUILD_PAIR: return visitBUILD_PAIR(N); case ISD::FADD: return visitFADD(N); case ISD::FSUB: return visitFSUB(N); @@ -1228,7 +1228,7 @@ } } } - + SDValue Result; // If we've change things around then replace token factor. @@ -1429,10 +1429,10 @@ if (N1.getOpcode() == ISD::AND) { SDValue AndOp0 = N1.getOperand(0); - ConstantSDNode *AndOp1 = dyn_cast(N1->getOperand(1)); + ConstantSDNode *AndOp1 = dyn_cast(N1->getOperand(1)); unsigned NumSignBits = DAG.ComputeNumSignBits(AndOp0); unsigned DestBits = VT.getScalarType().getSizeInBits(); - + // (add z, (and (sbbl x, x), 1)) -> (sub z, (sbbl x, x)) // and similar xforms where the inner op is either ~0 or 0. if (NumSignBits == DestBits && AndOp1 && AndOp1->isOne()) { @@ -2269,8 +2269,8 @@ if (ExtVT == LoadedVT && (!LegalOperations || TLI.isLoadExtLegal(ISD::ZEXTLOAD, ExtVT))) { EVT LoadResultTy = HasAnyExt ? LN0->getValueType(0) : VT; - - SDValue NewLoad = + + SDValue NewLoad = DAG.getExtLoad(ISD::ZEXTLOAD, LoadResultTy, LN0->getDebugLoc(), LN0->getChain(), LN0->getBasePtr(), LN0->getPointerInfo(), @@ -2280,7 +2280,7 @@ CombineTo(LN0, NewLoad, NewLoad.getValue(1)); return SDValue(N, 0); // Return N so it doesn't get rechecked! } - + // Do not change the width of a volatile load. // Do not generate loads of non-round integer types since these can // be expensive (and would be wrong if the type is not byte sized). @@ -2304,7 +2304,7 @@ } AddToWorkList(NewPtr.getNode()); - + EVT LoadResultTy = HasAnyExt ? LN0->getValueType(0) : VT; SDValue Load = DAG.getExtLoad(ISD::ZEXTLOAD, LoadResultTy, LN0->getDebugLoc(), @@ -3086,7 +3086,7 @@ return DAG.getNode(ISD::SRL, N->getDebugLoc(), VT, N0.getOperand(0), DAG.getConstant(c1 + c2, N1.getValueType())); } - + // fold (srl (shl x, c), c) -> (and x, cst2) if (N1C && N0.getOpcode() == ISD::SHL && N0.getOperand(1) == N1 && N0.getValueSizeInBits() <= 64) { @@ -3094,7 +3094,7 @@ return DAG.getNode(ISD::AND, N->getDebugLoc(), VT, N0.getOperand(0), DAG.getConstant(~0ULL >> ShAmt, VT)); } - + // fold (srl (anyextend x), c) -> (anyextend (srl x, c)) if (N1C && N0.getOpcode() == ISD::ANY_EXTEND) { @@ -3198,7 +3198,7 @@ // brcond i32 %c ... // // into - // + // // %a = ... // %b = and %a, 2 // %c = setcc eq %b, 0 @@ -3626,7 +3626,7 @@ N0.getOperand(0), N0.getOperand(1), cast(N0.getOperand(2))->get()), NegOne, DAG.getConstant(0, VT)); - } + } // fold (sext x) -> (zext x) if the sign bit is known zero. if ((!LegalOperations || TLI.isOperationLegal(ISD::ZERO_EXTEND, VT)) && @@ -4104,7 +4104,7 @@ if ((N0.getValueType().getSizeInBits() & (EVTBits-1)) != 0) return SDValue(); } - + // If the shift amount is larger than the input type then we're not // accessing any of the loaded bytes. If the load was a zextload/extload // then the result of the shift+trunc is zero/undef (handled elsewhere). @@ -4112,7 +4112,7 @@ // of the extended byte. This is not worth optimizing for. if (ShAmt >= VT.getSizeInBits()) return SDValue(); - + } } @@ -4379,7 +4379,7 @@ return SDValue(); } -SDValue DAGCombiner::visitBIT_CONVERT(SDNode *N) { +SDValue DAGCombiner::visitBITCAST(SDNode *N) { SDValue N0 = N->getOperand(0); EVT VT = N->getValueType(0); @@ -4403,12 +4403,12 @@ assert(!DestEltVT.isVector() && "Element type of vector ValueType must not be vector!"); if (isSimple) - return ConstantFoldBIT_CONVERTofBUILD_VECTOR(N0.getNode(), DestEltVT); + return ConstantFoldBITCASTofBUILD_VECTOR(N0.getNode(), DestEltVT); } // If the input is a constant, let getNode fold it. if (isa(N0) || isa(N0)) { - SDValue Res = DAG.getNode(ISD::BIT_CONVERT, N->getDebugLoc(), VT, N0); + SDValue Res = DAG.getNode(ISD::BITCAST, N->getDebugLoc(), VT, N0); if (Res.getNode() != N) { if (!LegalOperations || TLI.isOperationLegal(Res.getNode()->getOpcode(), VT)) @@ -4424,8 +4424,8 @@ } // (conv (conv x, t1), t2) -> (conv x, t2) - if (N0.getOpcode() == ISD::BIT_CONVERT) - return DAG.getNode(ISD::BIT_CONVERT, N->getDebugLoc(), VT, + if (N0.getOpcode() == ISD::BITCAST) + return DAG.getNode(ISD::BITCAST, N->getDebugLoc(), VT, N0.getOperand(0)); // fold (conv (load x)) -> (load (conv*)x) @@ -4446,7 +4446,7 @@ OrigAlign); AddToWorkList(N); CombineTo(N0.getNode(), - DAG.getNode(ISD::BIT_CONVERT, N0.getDebugLoc(), + DAG.getNode(ISD::BITCAST, N0.getDebugLoc(), N0.getValueType(), Load), Load.getValue(1)); return Load; @@ -4458,7 +4458,7 @@ // This often reduces constant pool loads. if ((N0.getOpcode() == ISD::FNEG || N0.getOpcode() == ISD::FABS) && N0.getNode()->hasOneUse() && VT.isInteger() && !VT.isVector()) { - SDValue NewConv = DAG.getNode(ISD::BIT_CONVERT, N0.getDebugLoc(), VT, + SDValue NewConv = DAG.getNode(ISD::BITCAST, N0.getDebugLoc(), VT, N0.getOperand(0)); AddToWorkList(NewConv.getNode()); @@ -4481,7 +4481,7 @@ unsigned OrigXWidth = N0.getOperand(1).getValueType().getSizeInBits(); EVT IntXVT = EVT::getIntegerVT(*DAG.getContext(), OrigXWidth); if (isTypeLegal(IntXVT)) { - SDValue X = DAG.getNode(ISD::BIT_CONVERT, N0.getDebugLoc(), + SDValue X = DAG.getNode(ISD::BITCAST, N0.getDebugLoc(), IntXVT, N0.getOperand(1)); AddToWorkList(X.getNode()); @@ -4506,7 +4506,7 @@ X, DAG.getConstant(SignBit, VT)); AddToWorkList(X.getNode()); - SDValue Cst = DAG.getNode(ISD::BIT_CONVERT, N0.getDebugLoc(), + SDValue Cst = DAG.getNode(ISD::BITCAST, N0.getDebugLoc(), VT, N0.getOperand(0)); Cst = DAG.getNode(ISD::AND, Cst.getDebugLoc(), VT, Cst, DAG.getConstant(~SignBit, VT)); @@ -4531,11 +4531,11 @@ return CombineConsecutiveLoads(N, VT); } -/// ConstantFoldBIT_CONVERTofBUILD_VECTOR - We know that BV is a build_vector +/// ConstantFoldBITCASTofBUILD_VECTOR - We know that BV is a build_vector /// node with Constant, ConstantFP or Undef operands. DstEltVT indicates the /// destination element value type. SDValue DAGCombiner:: -ConstantFoldBIT_CONVERTofBUILD_VECTOR(SDNode *BV, EVT DstEltVT) { +ConstantFoldBITCASTofBUILD_VECTOR(SDNode *BV, EVT DstEltVT) { EVT SrcEltVT = BV->getValueType(0).getVectorElementType(); // If this is already the right type, we're done. @@ -4553,10 +4553,10 @@ // Due to the FP element handling below calling this routine recursively, // we can end up with a scalar-to-vector node here. if (BV->getOpcode() == ISD::SCALAR_TO_VECTOR) - return DAG.getNode(ISD::SCALAR_TO_VECTOR, BV->getDebugLoc(), VT, - DAG.getNode(ISD::BIT_CONVERT, BV->getDebugLoc(), + return DAG.getNode(ISD::SCALAR_TO_VECTOR, BV->getDebugLoc(), VT, + DAG.getNode(ISD::BITCAST, BV->getDebugLoc(), DstEltVT, BV->getOperand(0))); - + SmallVector Ops; for (unsigned i = 0, e = BV->getNumOperands(); i != e; ++i) { SDValue Op = BV->getOperand(i); @@ -4564,7 +4564,7 @@ // are promoted and implicitly truncated. Make that explicit here. if (Op.getValueType() != SrcEltVT) Op = DAG.getNode(ISD::TRUNCATE, BV->getDebugLoc(), SrcEltVT, Op); - Ops.push_back(DAG.getNode(ISD::BIT_CONVERT, BV->getDebugLoc(), + Ops.push_back(DAG.getNode(ISD::BITCAST, BV->getDebugLoc(), DstEltVT, Op)); AddToWorkList(Ops.back().getNode()); } @@ -4580,7 +4580,7 @@ // same sizes. assert((SrcEltVT == MVT::f32 || SrcEltVT == MVT::f64) && "Unknown FP VT!"); EVT IntVT = EVT::getIntegerVT(*DAG.getContext(), SrcEltVT.getSizeInBits()); - BV = ConstantFoldBIT_CONVERTofBUILD_VECTOR(BV, IntVT).getNode(); + BV = ConstantFoldBITCASTofBUILD_VECTOR(BV, IntVT).getNode(); SrcEltVT = IntVT; } @@ -4589,10 +4589,10 @@ if (DstEltVT.isFloatingPoint()) { assert((DstEltVT == MVT::f32 || DstEltVT == MVT::f64) && "Unknown FP VT!"); EVT TmpVT = EVT::getIntegerVT(*DAG.getContext(), DstEltVT.getSizeInBits()); - SDNode *Tmp = ConstantFoldBIT_CONVERTofBUILD_VECTOR(BV, TmpVT).getNode(); + SDNode *Tmp = ConstantFoldBITCASTofBUILD_VECTOR(BV, TmpVT).getNode(); // Next, convert to FP elements of the same size. - return ConstantFoldBIT_CONVERTofBUILD_VECTOR(Tmp, DstEltVT); + return ConstantFoldBITCASTofBUILD_VECTOR(Tmp, DstEltVT); } // Okay, we know the src/dst types are both integers of differing types. @@ -5068,7 +5068,7 @@ // Transform fneg(bitconvert(x)) -> bitconvert(x^sign) to avoid loading // constant pool values. - if (N0.getOpcode() == ISD::BIT_CONVERT && + if (N0.getOpcode() == ISD::BITCAST && !VT.isVector() && N0.getNode()->hasOneUse() && N0.getOperand(0).getValueType().isInteger()) { @@ -5078,7 +5078,7 @@ Int = DAG.getNode(ISD::XOR, N0.getDebugLoc(), IntVT, Int, DAG.getConstant(APInt::getSignBit(IntVT.getSizeInBits()), IntVT)); AddToWorkList(Int.getNode()); - return DAG.getNode(ISD::BIT_CONVERT, N->getDebugLoc(), + return DAG.getNode(ISD::BITCAST, N->getDebugLoc(), VT, Int); } } @@ -5104,7 +5104,7 @@ // Transform fabs(bitconvert(x)) -> bitconvert(x&~sign) to avoid loading // constant pool values. - if (N0.getOpcode() == ISD::BIT_CONVERT && N0.getNode()->hasOneUse() && + if (N0.getOpcode() == ISD::BITCAST && N0.getNode()->hasOneUse() && N0.getOperand(0).getValueType().isInteger() && !N0.getOperand(0).getValueType().isVector()) { SDValue Int = N0.getOperand(0); @@ -5113,7 +5113,7 @@ Int = DAG.getNode(ISD::AND, N0.getDebugLoc(), IntVT, Int, DAG.getConstant(~APInt::getSignBit(IntVT.getSizeInBits()), IntVT)); AddToWorkList(Int.getNode()); - return DAG.getNode(ISD::BIT_CONVERT, N->getDebugLoc(), + return DAG.getNode(ISD::BITCAST, N->getDebugLoc(), N->getValueType(0), Int); } } @@ -5160,7 +5160,7 @@ // brcond i32 %c ... // // into - // + // // %a = ... // %b = and i32 %a, 2 // %c = setcc eq %b, 0 @@ -5211,7 +5211,7 @@ // Restore N1 if the above transformation doesn't match. N1 = N->getOperand(1); } - + // Transform br(xor(x, y)) -> br(x != y) // Transform br(xor(xor(x,y), 1)) -> br (x == y) if (N1.hasOneUse() && N1.getOpcode() == ISD::XOR) { @@ -5665,10 +5665,10 @@ // Create token factor to keep old chain connected. SDValue Token = DAG.getNode(ISD::TokenFactor, N->getDebugLoc(), MVT::Other, Chain, ReplLoad.getValue(1)); - + // Make sure the new and old chains are cleaned up. AddToWorkList(Token.getNode()); - + // Replace uses with load result and token factor. Don't add users // to work list. return CombineTo(N, ReplLoad.getValue(0), Token, false); @@ -5688,17 +5688,17 @@ static std::pair CheckForMaskedLoad(SDValue V, SDValue Ptr, SDValue Chain) { std::pair Result(0, 0); - + // Check for the structure we're looking for. if (V->getOpcode() != ISD::AND || !isa(V->getOperand(1)) || !ISD::isNormalLoad(V->getOperand(0).getNode())) return Result; - + // Check the chain and pointer. LoadSDNode *LD = cast(V->getOperand(0)); if (LD->getBasePtr() != Ptr) return Result; // Not from same pointer. - + // The store should be chained directly to the load or be an operand of a // tokenfactor. if (LD == Chain.getNode()) @@ -5714,7 +5714,7 @@ } if (!isOk) return Result; } - + // This only handles simple types. if (V.getValueType() != MVT::i16 && V.getValueType() != MVT::i32 && @@ -5730,7 +5730,7 @@ unsigned NotMaskTZ = CountTrailingZeros_64(NotMask); if (NotMaskTZ & 7) return Result; // Must be multiple of a byte. if (NotMaskLZ == 64) return Result; // All zero mask. - + // See if we have a continuous run of bits. If so, we have 0*1+0* if (CountTrailingOnes_64(NotMask >> NotMaskTZ)+NotMaskTZ+NotMaskLZ != 64) return Result; @@ -5738,19 +5738,19 @@ // Adjust NotMaskLZ down to be from the actual size of the int instead of i64. if (V.getValueType() != MVT::i64 && NotMaskLZ) NotMaskLZ -= 64-V.getValueSizeInBits(); - + unsigned MaskedBytes = (V.getValueSizeInBits()-NotMaskLZ-NotMaskTZ)/8; switch (MaskedBytes) { - case 1: - case 2: + case 1: + case 2: case 4: break; default: return Result; // All one mask, or 5-byte mask. } - + // Verify that the first bit starts at a multiple of mask so that the access // is aligned the same as the access width. if (NotMaskTZ && NotMaskTZ/8 % MaskedBytes) return Result; - + Result.first = MaskedBytes; Result.second = NotMaskTZ/8; return Result; @@ -5767,20 +5767,20 @@ unsigned NumBytes = MaskInfo.first; unsigned ByteShift = MaskInfo.second; SelectionDAG &DAG = DC->getDAG(); - + // Check to see if IVal is all zeros in the part being masked in by the 'or' // that uses this. If not, this is not a replacement. APInt Mask = ~APInt::getBitsSet(IVal.getValueSizeInBits(), ByteShift*8, (ByteShift+NumBytes)*8); if (!DAG.MaskedValueIsZero(IVal, Mask)) return 0; - + // Check that it is legal on the target to do this. It is legal if the new // VT we're shrinking to (i8/i16/i32) is legal or we're still before type // legalization. MVT VT = MVT::getIntegerVT(NumBytes*8); if (!DC->isTypeLegal(VT)) return 0; - + // Okay, we can do this! Replace the 'St' store with a store of IVal that is // shifted by ByteShift and truncated down to NumBytes. if (ByteShift) @@ -5795,19 +5795,19 @@ StOffset = ByteShift; else StOffset = IVal.getValueType().getStoreSize() - ByteShift - NumBytes; - + SDValue Ptr = St->getBasePtr(); if (StOffset) { Ptr = DAG.getNode(ISD::ADD, IVal->getDebugLoc(), Ptr.getValueType(), Ptr, DAG.getConstant(StOffset, Ptr.getValueType())); NewAlign = MinAlign(NewAlign, StOffset); } - + // Truncate down to the new size. IVal = DAG.getNode(ISD::TRUNCATE, IVal->getDebugLoc(), VT, IVal); - + ++OpsNarrowed; - return DAG.getStore(St->getChain(), St->getDebugLoc(), IVal, Ptr, + return DAG.getStore(St->getChain(), St->getDebugLoc(), IVal, Ptr, St->getPointerInfo().getWithOffset(StOffset), false, false, NewAlign).getNode(); } @@ -5831,7 +5831,7 @@ return SDValue(); unsigned Opc = Value.getOpcode(); - + // If this is "store (or X, Y), P" and X is "(and (load P), cst)", where cst // is a byte mask indicating a consecutive number of bytes, check to see if // Y is known to provide just those bytes. If so, we try to replace the @@ -5844,7 +5844,7 @@ if (SDNode *NewST = ShrinkLoadReplaceStoreWithStore(MaskedLoad, Value.getOperand(1), ST,this)) return SDValue(NewST, 0); - + // Or is commutative, so try swapping X and Y. MaskedLoad = CheckForMaskedLoad(Value.getOperand(1), Ptr, Chain); if (MaskedLoad.first) @@ -5852,7 +5852,7 @@ Value.getOperand(0), ST,this)) return SDValue(NewST, 0); } - + if ((Opc != ISD::OR && Opc != ISD::XOR && Opc != ISD::AND) || Value.getOperand(1).getOpcode() != ISD::Constant) return SDValue(); @@ -5944,7 +5944,7 @@ // If this is a store of a bit convert, store the input value if the // resultant store does not need a higher alignment than the original. - if (Value.getOpcode() == ISD::BIT_CONVERT && !ST->isTruncatingStore() && + if (Value.getOpcode() == ISD::BITCAST && !ST->isTruncatingStore() && ST->isUnindexed()) { unsigned OrigAlign = ST->getAlignment(); EVT SVT = Value.getOperand(0).getValueType(); @@ -6146,9 +6146,9 @@ return DAG.getNode(ISD::BUILD_VECTOR, N->getDebugLoc(), InVec.getValueType(), &Ops[0], Ops.size()); } - // If the invec is an UNDEF and if EltNo is a constant, create a new + // If the invec is an UNDEF and if EltNo is a constant, create a new // BUILD_VECTOR with undef elements and the inserted element. - if (!LegalOperations && InVec.getOpcode() == ISD::UNDEF && + if (!LegalOperations && InVec.getOpcode() == ISD::UNDEF && isa(EltNo)) { EVT VT = InVec.getValueType(); EVT EltVT = VT.getVectorElementType(); @@ -6198,7 +6198,7 @@ EVT ExtVT = VT.getVectorElementType(); EVT LVT = ExtVT; - if (InVec.getOpcode() == ISD::BIT_CONVERT) { + if (InVec.getOpcode() == ISD::BITCAST) { EVT BCVT = InVec.getOperand(0).getValueType(); if (!BCVT.isVector() || ExtVT.bitsGT(BCVT.getVectorElementType())) return SDValue(); @@ -6232,7 +6232,7 @@ int Idx = (Elt > (int)NumElems) ? -1 : SVN->getMaskElt(Elt); InVec = (Idx < (int)NumElems) ? InVec.getOperand(0) : InVec.getOperand(1); - if (InVec.getOpcode() == ISD::BIT_CONVERT) + if (InVec.getOpcode() == ISD::BITCAST) InVec = InVec.getOperand(0); if (ISD::isNormalLoad(InVec.getNode())) { LN0 = cast(InVec); @@ -6262,7 +6262,7 @@ SDValue NewPtr = LN0->getBasePtr(); unsigned PtrOff = 0; - + if (Elt) { PtrOff = LVT.getSizeInBits() * Elt / 8; EVT PtrType = NewPtr.getValueType(); @@ -6339,7 +6339,7 @@ unsigned ExtIndex = cast(ExtVal)->getZExtValue(); if (ExtIndex > VT.getVectorNumElements()) return SDValue(); - + Mask.push_back(ExtIndex); continue; } @@ -6396,7 +6396,7 @@ // If this is a bit convert that changes the element type of the vector but // not the number of vector elements, look through it. Be careful not to // look though conversions that change things like v4f32 to v2f64. - if (V->getOpcode() == ISD::BIT_CONVERT) { + if (V->getOpcode() == ISD::BITCAST) { SDValue ConvInput = V->getOperand(0); if (ConvInput.getValueType().isVector() && ConvInput.getValueType().getVectorNumElements() == NumElts) @@ -6494,7 +6494,7 @@ SDValue LHS = N->getOperand(0); SDValue RHS = N->getOperand(1); if (N->getOpcode() == ISD::AND) { - if (RHS.getOpcode() == ISD::BIT_CONVERT) + if (RHS.getOpcode() == ISD::BITCAST) RHS = RHS.getOperand(0); if (RHS.getOpcode() == ISD::BUILD_VECTOR) { SmallVector Indices; @@ -6522,9 +6522,9 @@ DAG.getConstant(0, EltVT)); SDValue Zero = DAG.getNode(ISD::BUILD_VECTOR, N->getDebugLoc(), RVT, &ZeroOps[0], ZeroOps.size()); - LHS = DAG.getNode(ISD::BIT_CONVERT, dl, RVT, LHS); + LHS = DAG.getNode(ISD::BITCAST, dl, RVT, LHS); SDValue Shuf = DAG.getVectorShuffle(RVT, dl, LHS, Zero, &Indices[0]); - return DAG.getNode(ISD::BIT_CONVERT, dl, VT, Shuf); + return DAG.getNode(ISD::BITCAST, dl, VT, Shuf); } } @@ -6643,7 +6643,7 @@ if (LHS.getOpcode() != RHS.getOpcode() || !LHS.hasOneUse() || !RHS.hasOneUse()) return false; - + // If this is a load and the token chain is identical, replace the select // of two loads with a load through a select of the address to load from. // This triggers in things like "select bool X, 10.0, 123.0" after the FP @@ -6651,7 +6651,7 @@ if (LHS.getOpcode() == ISD::LOAD) { LoadSDNode *LLD = cast(LHS); LoadSDNode *RLD = cast(RHS); - + // Token chains must be identical. if (LHS.getOperand(0) != RHS.getOperand(0) || // Do not let this transformation reduce the number of volatile loads. @@ -6671,7 +6671,7 @@ LLD->getPointerInfo().getAddrSpace() != 0 || RLD->getPointerInfo().getAddrSpace() != 0) return false; - + // Check that the select condition doesn't reach either load. If so, // folding this will induce a cycle into the DAG. If not, this is safe to // xform, so create a select of the addresses. @@ -6694,7 +6694,7 @@ (LLD->hasAnyUseOfValue(1) && (LLD->isPredecessorOf(CondLHS) || LLD->isPredecessorOf(CondRHS)))) return false; - + Addr = DAG.getNode(ISD::SELECT_CC, TheSelect->getDebugLoc(), LLD->getBasePtr().getValueType(), TheSelect->getOperand(0), @@ -6742,7 +6742,7 @@ ISD::CondCode CC, bool NotExtCompare) { // (x ? y : y) -> y. if (N2 == N3) return N2; - + EVT VT = N2.getValueType(); ConstantSDNode *N1C = dyn_cast(N1.getNode()); ConstantSDNode *N2C = dyn_cast(N2.getNode()); @@ -6778,7 +6778,7 @@ return DAG.getNode(ISD::FABS, DL, VT, N3); } } - + // Turn "(a cond b) ? 1.0f : 2.0f" into "load (tmp + ((a cond b) ? 0 : 4)" // where "tmp" is a constant pool entry containing an array with 1.0 and 2.0 // in it. This is a win when the constant is not otherwise available because @@ -6801,7 +6801,7 @@ }; const Type *FPTy = Elts[0]->getType(); const TargetData &TD = *TLI.getTargetData(); - + // Create a ConstantArray of the two constants. Constant *CA = ConstantArray::get(ArrayType::get(FPTy, 2), Elts, 2); SDValue CPIdx = DAG.getConstantPool(CA, TLI.getPointerTy(), @@ -6813,7 +6813,7 @@ SDValue Zero = DAG.getIntPtrConstant(0); unsigned EltSize = (unsigned)TD.getTypeAllocSize(Elts[0]->getType()); SDValue One = DAG.getIntPtrConstant(EltSize); - + SDValue Cond = DAG.getSetCC(DL, TLI.getSetCCResultType(N0.getValueType()), N0, N1, CC); @@ -6826,7 +6826,7 @@ false, Alignment); } - } + } // Check to see if we can perform the "gzip trick", transforming // (select_cc setlt X, 0, A, 0) -> (and (sra X, (sub size(X), 1), A) @@ -6879,7 +6879,7 @@ // shift-left and shift-right-arith. if (CC == ISD::SETEQ && N0->getOpcode() == ISD::AND && N0->getValueType(0) == VT && - N1C && N1C->isNullValue() && + N1C && N1C->isNullValue() && N2C && N2C->isNullValue()) { SDValue AndLHS = N0->getOperand(0); ConstantSDNode *ConstAndRHS = dyn_cast(N0->getOperand(1)); @@ -6889,13 +6889,13 @@ SDValue ShlAmt = DAG.getConstant(AndMask.countLeadingZeros(), getShiftAmountTy()); SDValue Shl = DAG.getNode(ISD::SHL, N0.getDebugLoc(), VT, AndLHS, ShlAmt); - + // Now arithmetic right shift it all the way over, so the result is either // all-ones, or zero. SDValue ShrAmt = DAG.getConstant(AndMask.getBitWidth()-1, getShiftAmountTy()); SDValue Shr = DAG.getNode(ISD::SRA, N0.getDebugLoc(), VT, Shl, ShrAmt); - + return DAG.getNode(ISD::AND, DL, VT, Shr, N3); } } @@ -7066,7 +7066,7 @@ Offset += C->getZExtValue(); } } - + // Return the underlying GlobalValue, and update the Offset. Return false // for GlobalAddressSDNode since the same GlobalAddress may be represented // by multiple nodes with different offsets. @@ -7125,7 +7125,7 @@ return !((Offset1 + Size1) <= Offset2 || (Offset2 + Size2) <= Offset1); } - // Otherwise, if we know what the bases are, and they aren't identical, then + // Otherwise, if we know what the bases are, and they aren't identical, then // we know they cannot alias. if ((isFrameIndex1 || CV1 || GV1) && (isFrameIndex2 || CV2 || GV2)) return false; @@ -7139,13 +7139,13 @@ (Size1 == Size2) && (SrcValueAlign1 > Size1)) { int64_t OffAlign1 = SrcValueOffset1 % SrcValueAlign1; int64_t OffAlign2 = SrcValueOffset2 % SrcValueAlign1; - + // There is no overlap between these relatively aligned accesses of similar // size, return no alias. if ((OffAlign1 + Size1) <= OffAlign2 || (OffAlign2 + Size2) <= OffAlign1) return false; } - + if (CombinerGlobalAA) { // Use alias analysis information. int64_t MinOffset = std::min(SrcValueOffset1, SrcValueOffset2); @@ -7166,7 +7166,7 @@ /// node. Returns true if the operand was a load. bool DAGCombiner::FindAliasInfo(SDNode *N, SDValue &Ptr, int64_t &Size, - const Value *&SrcValue, + const Value *&SrcValue, int &SrcValueOffset, unsigned &SrcValueAlign, const MDNode *&TBAAInfo) const { @@ -7206,26 +7206,26 @@ int SrcValueOffset; unsigned SrcValueAlign; const MDNode *SrcTBAAInfo; - bool IsLoad = FindAliasInfo(N, Ptr, Size, SrcValue, SrcValueOffset, + bool IsLoad = FindAliasInfo(N, Ptr, Size, SrcValue, SrcValueOffset, SrcValueAlign, SrcTBAAInfo); // Starting off. Chains.push_back(OriginalChain); unsigned Depth = 0; - + // Look at each chain and determine if it is an alias. If so, add it to the // aliases list. If not, then continue up the chain looking for the next // candidate. while (!Chains.empty()) { SDValue Chain = Chains.back(); Chains.pop_back(); - - // For TokenFactor nodes, look at each operand and only continue up the - // chain until we find two aliases. If we've seen two aliases, assume we'll + + // For TokenFactor nodes, look at each operand and only continue up the + // chain until we find two aliases. If we've seen two aliases, assume we'll // find more and revert to original chain since the xform is unlikely to be // profitable. - // - // FIXME: The depth check could be made to return the last non-aliasing + // + // FIXME: The depth check could be made to return the last non-aliasing // chain we found before we hit a tokenfactor rather than the original // chain. if (Depth > 6 || Aliases.size() == 2) { @@ -7309,9 +7309,9 @@ // If a single operand then chain to it. We don't need to revisit it. return Aliases[0]; } - + // Construct a custom tailored token factor. - return DAG.getNode(ISD::TokenFactor, N->getDebugLoc(), MVT::Other, + return DAG.getNode(ISD::TokenFactor, N->getDebugLoc(), MVT::Other, &Aliases[0], Aliases.size()); } Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp?rev=119990&r1=119989&r2=119990&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp Mon Nov 22 21:31:01 2010 @@ -197,12 +197,12 @@ BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(TargetOpcode::IMPLICIT_DEF), Reg); } - + // If target-independent code couldn't handle the value, give target-specific // code a try. if (!Reg && isa(V)) Reg = TargetMaterializeConstant(cast(V)); - + // Don't cache constant materializations in the general ValueMap. // To do so would require tracking what uses they dominate. if (Reg != 0) { @@ -234,7 +234,7 @@ LocalValueMap[I] = Reg; return Reg; } - + unsigned &AssignedReg = FuncInfo.ValueMap[I]; if (AssignedReg == 0) // Use the new register. @@ -414,7 +414,7 @@ // If this is a constant subscript, handle it quickly. if (const ConstantInt *CI = dyn_cast(Idx)) { if (CI->isZero()) continue; - uint64_t Offs = + uint64_t Offs = TD.getTypeAllocSize(Ty)*cast(CI)->getSExtValue(); N = FastEmit_ri_(VT, ISD::ADD, N, NIsKill, Offs, VT); if (N == 0) @@ -423,7 +423,7 @@ NIsKill = true; continue; } - + // N = N + Idx * ElementSize; uint64_t ElementSize = TD.getTypeAllocSize(Ty); std::pair Pair = getRegForGEPIndex(Idx); @@ -479,13 +479,13 @@ Offset = FuncInfo.getByValArgumentFrameIndex(Arg); if (Offset) Reg = TRI.getFrameRegister(*FuncInfo.MF); - } + } } if (!Reg) Reg = getRegForValue(Address); - + if (Reg) - BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, + BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(TargetOpcode::DBG_VALUE)) .addReg(Reg, RegState::Debug).addImm(Offset) .addMetadata(DI->getVariable()); @@ -521,7 +521,7 @@ BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II) .addReg(0U).addImm(DI->getOffset()) .addMetadata(DI->getVariable()); - } + } return true; } case Intrinsic::eh_exception: { @@ -594,12 +594,12 @@ bool FastISel::SelectCast(const User *I, unsigned Opcode) { EVT SrcVT = TLI.getValueType(I->getOperand(0)->getType()); EVT DstVT = TLI.getValueType(I->getType()); - + if (SrcVT == MVT::Other || !SrcVT.isSimple() || DstVT == MVT::Other || !DstVT.isSimple()) // Unhandled type. Halt "fast" selection and bail. return false; - + // Check if the destination type is legal. Or as a special case, // it may be i1 if we're doing a truncate because that's // easy and somewhat common. @@ -641,7 +641,7 @@ InputReg, InputRegIsKill); if (!ResultReg) return false; - + UpdateValueMap(I, ResultReg); return true; } @@ -656,23 +656,23 @@ return true; } - // Bitcasts of other values become reg-reg copies or BIT_CONVERT operators. + // Bitcasts of other values become reg-reg copies or BITCAST operators. EVT SrcVT = TLI.getValueType(I->getOperand(0)->getType()); EVT DstVT = TLI.getValueType(I->getType()); - + if (SrcVT == MVT::Other || !SrcVT.isSimple() || DstVT == MVT::Other || !DstVT.isSimple() || !TLI.isTypeLegal(SrcVT) || !TLI.isTypeLegal(DstVT)) // Unhandled type. Halt "fast" selection and bail. return false; - + unsigned Op0 = getRegForValue(I->getOperand(0)); if (Op0 == 0) // Unhandled operand. Halt "fast" selection and bail. return false; bool Op0IsKill = hasTrivialKill(I->getOperand(0)); - + // First, try to perform the bitcast by inserting a reg-reg copy. unsigned ResultReg = 0; if (SrcVT.getSimpleVT() == DstVT.getSimpleVT()) { @@ -685,15 +685,15 @@ ResultReg).addReg(Op0); } } - - // If the reg-reg copy failed, select a BIT_CONVERT opcode. + + // If the reg-reg copy failed, select a BITCAST opcode. if (!ResultReg) ResultReg = FastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), - ISD::BIT_CONVERT, Op0, Op0IsKill); - + ISD::BITCAST, Op0, Op0IsKill); + if (!ResultReg) return false; - + UpdateValueMap(I, ResultReg); return true; } @@ -765,7 +765,7 @@ return false; unsigned IntReg = FastEmit_r(VT.getSimpleVT(), IntVT.getSimpleVT(), - ISD::BIT_CONVERT, OpReg, OpRegIsKill); + ISD::BITCAST, OpReg, OpRegIsKill); if (IntReg == 0) return false; @@ -777,7 +777,7 @@ return false; ResultReg = FastEmit_r(IntVT.getSimpleVT(), VT.getSimpleVT(), - ISD::BIT_CONVERT, IntResultReg, /*Kill=*/true); + ISD::BITCAST, IntResultReg, /*Kill=*/true); if (ResultReg == 0) return false; @@ -857,10 +857,10 @@ // Dynamic-sized alloca is not handled yet. return false; - + case Instruction::Call: return SelectCall(I); - + case Instruction::BitCast: return SelectBitCast(I); @@ -923,7 +923,7 @@ return 0; } -unsigned FastISel::FastEmit_rr(MVT, MVT, +unsigned FastISel::FastEmit_rr(MVT, MVT, unsigned, unsigned /*Op0*/, bool /*Op0IsKill*/, unsigned /*Op1*/, bool /*Op1IsKill*/) { @@ -1151,7 +1151,7 @@ uint64_t Imm) { unsigned ResultReg = createResultReg(RC); const TargetInstrDesc &II = TII.get(MachineInstOpcode); - + if (II.getNumDefs() >= 1) BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II, ResultReg).addImm(Imm); else { Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=119990&r1=119989&r2=119990&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Mon Nov 22 21:31:01 2010 @@ -403,7 +403,7 @@ // Expand to a bitconvert of the value to the integer type of the // same size, then a (misaligned) int store. // FIXME: Does not handle truncating floating point stores! - SDValue Result = DAG.getNode(ISD::BIT_CONVERT, dl, intVT, Val); + SDValue Result = DAG.getNode(ISD::BITCAST, dl, intVT, Val); return DAG.getStore(Chain, dl, Result, Ptr, ST->getPointerInfo(), ST->isVolatile(), ST->isNonTemporal(), Alignment); } else { @@ -515,14 +515,14 @@ SDValue newLoad = DAG.getLoad(intVT, dl, Chain, Ptr, LD->getPointerInfo(), LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment()); - SDValue Result = DAG.getNode(ISD::BIT_CONVERT, dl, LoadedVT, newLoad); + SDValue Result = DAG.getNode(ISD::BITCAST, dl, LoadedVT, newLoad); if (VT.isFloatingPoint() && LoadedVT != VT) Result = DAG.getNode(ISD::FP_EXTEND, dl, VT, Result); SDValue Ops[] = { Result, Chain }; return DAG.getMergeValues(Ops, 2, dl); } - + // Copy the value to a (aligned) stack slot using (unaligned) integer // loads and stores, then do a (aligned) load from the stack slot. EVT RegVT = TLI.getRegisterType(*DAG.getContext(), intVT); @@ -733,7 +733,7 @@ return DAG.getStore(Tmp1, dl, Tmp3, Tmp2, ST->getPointerInfo(), isVolatile, isNonTemporal, Alignment); } - + if (CFP->getValueType(0) == MVT::f64) { // If this target supports 64-bit registers, do a single 64-bit store. if (getTypeAction(MVT::i64) == Legal) { @@ -742,7 +742,7 @@ return DAG.getStore(Tmp1, dl, Tmp3, Tmp2, ST->getPointerInfo(), isVolatile, isNonTemporal, Alignment); } - + if (getTypeAction(MVT::i32) == Legal && !ST->isVolatile()) { // Otherwise, if the target supports 32-bit registers, use 2 32-bit // stores. If the target supports neither 32- nor 64-bits, this @@ -1145,7 +1145,7 @@ Tmp1 = DAG.getLoad(NVT, dl, Tmp1, Tmp2, LD->getPointerInfo(), LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment()); - Tmp3 = LegalizeOp(DAG.getNode(ISD::BIT_CONVERT, dl, VT, Tmp1)); + Tmp3 = LegalizeOp(DAG.getNode(ISD::BITCAST, dl, VT, Tmp1)); Tmp4 = LegalizeOp(Tmp1.getValue(1)); break; } @@ -1156,7 +1156,7 @@ AddLegalizedOperand(SDValue(Node, 1), Tmp4); return Op.getResNo() ? Tmp4 : Tmp3; } - + EVT SrcVT = LD->getMemoryVT(); unsigned SrcWidth = SrcVT.getSizeInBits(); unsigned Alignment = LD->getAlignment(); @@ -1410,7 +1410,7 @@ break; case TargetLowering::Promote: assert(VT.isVector() && "Unknown legal promote case!"); - Tmp3 = DAG.getNode(ISD::BIT_CONVERT, dl, + Tmp3 = DAG.getNode(ISD::BITCAST, dl, TLI.getTypeToPromoteTo(ISD::STORE, VT), Tmp3); Result = DAG.getStore(Tmp1, dl, Tmp3, Tmp2, ST->getPointerInfo(), isVolatile, @@ -1629,7 +1629,7 @@ EVT IVT = EVT::getIntegerVT(*DAG.getContext(), FloatVT.getSizeInBits()); if (isTypeLegal(IVT)) { // Convert to an integer with the same sign bit. - SignBit = DAG.getNode(ISD::BIT_CONVERT, dl, IVT, Tmp2); + SignBit = DAG.getNode(ISD::BITCAST, dl, IVT, Tmp2); } else { // Store the float to memory, then load the sign part out as an integer. MVT LoadTy = TLI.getPointerTy(); @@ -2120,8 +2120,8 @@ DAG.getConstant(32, MVT::i64)); SDValue LoOr = DAG.getNode(ISD::OR, dl, MVT::i64, Lo, TwoP52); SDValue HiOr = DAG.getNode(ISD::OR, dl, MVT::i64, Hi, TwoP84); - SDValue LoFlt = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f64, LoOr); - SDValue HiFlt = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f64, HiOr); + SDValue LoFlt = DAG.getNode(ISD::BITCAST, dl, MVT::f64, LoOr); + SDValue HiFlt = DAG.getNode(ISD::BITCAST, dl, MVT::f64, HiOr); SDValue HiSub = DAG.getNode(ISD::FSUB, dl, MVT::f64, HiFlt, TwoP84PlusTwoP52); return DAG.getNode(ISD::FADD, dl, MVT::f64, LoFlt, HiSub); @@ -2134,28 +2134,28 @@ // algorithm from the x86_64 __floatundidf in compiler_rt. if (!isSigned) { SDValue Fast = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::f32, Op0); - + SDValue ShiftConst = DAG.getConstant(1, TLI.getShiftAmountTy()); SDValue Shr = DAG.getNode(ISD::SRL, dl, MVT::i64, Op0, ShiftConst); SDValue AndConst = DAG.getConstant(1, MVT::i64); SDValue And = DAG.getNode(ISD::AND, dl, MVT::i64, Op0, AndConst); SDValue Or = DAG.getNode(ISD::OR, dl, MVT::i64, And, Shr); - + SDValue SignCvt = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::f32, Or); SDValue Slow = DAG.getNode(ISD::FADD, dl, MVT::f32, SignCvt, SignCvt); - + // TODO: This really should be implemented using a branch rather than a - // select. We happen to get lucky and machinesink does the right - // thing most of the time. This would be a good candidate for a + // select. We happen to get lucky and machinesink does the right + // thing most of the time. This would be a good candidate for a //pseudo-op, or, even better, for whole-function isel. - SDValue SignBitTest = DAG.getSetCC(dl, TLI.getSetCCResultType(MVT::i64), + SDValue SignBitTest = DAG.getSetCC(dl, TLI.getSetCCResultType(MVT::i64), Op0, DAG.getConstant(0, MVT::i64), ISD::SETLT); return DAG.getNode(ISD::SELECT, dl, MVT::f32, SignBitTest, Slow, Fast); } - + // Otherwise, implement the fully general conversion. EVT SHVT = TLI.getShiftAmountTy(); - + SDValue And = DAG.getNode(ISD::AND, dl, MVT::i64, Op0, DAG.getConstant(UINT64_C(0xfffffffffffff800), MVT::i64)); SDValue Or = DAG.getNode(ISD::OR, dl, MVT::i64, And, @@ -2169,7 +2169,7 @@ Op0, DAG.getConstant(UINT64_C(0x0020000000000000), MVT::i64), ISD::SETUGE); SDValue Sel2 = DAG.getNode(ISD::SELECT, dl, MVT::i64, Ge, Sel, Op0); - + SDValue Sh = DAG.getNode(ISD::SRL, dl, MVT::i64, Sel2, DAG.getConstant(32, SHVT)); SDValue Trunc = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, Sh); @@ -2617,7 +2617,7 @@ break; } case ISD::FP_ROUND: - case ISD::BIT_CONVERT: + case ISD::BITCAST: Tmp1 = EmitStackConvert(Node->getOperand(0), Node->getValueType(0), Node->getValueType(0), dl); Results.push_back(Tmp1); @@ -2739,7 +2739,7 @@ case ISD::EXTRACT_VECTOR_ELT: if (Node->getOperand(0).getValueType().getVectorNumElements() == 1) // This must be an access of the only element. Return it. - Tmp1 = DAG.getNode(ISD::BIT_CONVERT, dl, Node->getValueType(0), + Tmp1 = DAG.getNode(ISD::BITCAST, dl, Node->getValueType(0), Node->getOperand(0)); else Tmp1 = ExpandExtractFromVectorThroughStack(SDValue(Node, 0)); @@ -3361,8 +3361,8 @@ case ISD::XOR: { unsigned ExtOp, TruncOp; if (OVT.isVector()) { - ExtOp = ISD::BIT_CONVERT; - TruncOp = ISD::BIT_CONVERT; + ExtOp = ISD::BITCAST; + TruncOp = ISD::BITCAST; } else { assert(OVT.isInteger() && "Cannot promote logic operation"); ExtOp = ISD::ANY_EXTEND; @@ -3379,8 +3379,8 @@ case ISD::SELECT: { unsigned ExtOp, TruncOp; if (Node->getValueType(0).isVector()) { - ExtOp = ISD::BIT_CONVERT; - TruncOp = ISD::BIT_CONVERT; + ExtOp = ISD::BITCAST; + TruncOp = ISD::BITCAST; } else if (Node->getValueType(0).isInteger()) { ExtOp = ISD::ANY_EXTEND; TruncOp = ISD::TRUNCATE; @@ -3407,12 +3407,12 @@ cast(Node)->getMask(Mask); // Cast the two input vectors. - Tmp1 = DAG.getNode(ISD::BIT_CONVERT, dl, NVT, Node->getOperand(0)); - Tmp2 = DAG.getNode(ISD::BIT_CONVERT, dl, NVT, Node->getOperand(1)); + Tmp1 = DAG.getNode(ISD::BITCAST, dl, NVT, Node->getOperand(0)); + Tmp2 = DAG.getNode(ISD::BITCAST, dl, NVT, Node->getOperand(1)); // Convert the shuffle mask to the right # elements. Tmp1 = ShuffleWithNarrowerEltType(NVT, OVT, dl, Tmp1, Tmp2, Mask); - Tmp1 = DAG.getNode(ISD::BIT_CONVERT, dl, OVT, Tmp1); + Tmp1 = DAG.getNode(ISD::BITCAST, dl, OVT, Tmp1); Results.push_back(Tmp1); break; } Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp?rev=119990&r1=119989&r2=119990&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp Mon Nov 22 21:31:01 2010 @@ -55,7 +55,7 @@ #endif llvm_unreachable("Do not know how to soften the result of this operator!"); - case ISD::BIT_CONVERT: R = SoftenFloatRes_BIT_CONVERT(N); break; + case ISD::BITCAST: R = SoftenFloatRes_BITCAST(N); break; case ISD::BUILD_PAIR: R = SoftenFloatRes_BUILD_PAIR(N); break; case ISD::ConstantFP: R = SoftenFloatRes_ConstantFP(cast(N)); @@ -102,7 +102,7 @@ SetSoftenedFloat(SDValue(N, ResNo), R); } -SDValue DAGTypeLegalizer::SoftenFloatRes_BIT_CONVERT(SDNode *N) { +SDValue DAGTypeLegalizer::SoftenFloatRes_BITCAST(SDNode *N) { return BitConvertToInteger(N->getOperand(0)); } @@ -557,7 +557,7 @@ #endif llvm_unreachable("Do not know how to soften this operator's operand!"); - case ISD::BIT_CONVERT: Res = SoftenFloatOp_BIT_CONVERT(N); break; + case ISD::BITCAST: Res = SoftenFloatOp_BITCAST(N); break; case ISD::BR_CC: Res = SoftenFloatOp_BR_CC(N); break; case ISD::FP_ROUND: Res = SoftenFloatOp_FP_ROUND(N); break; case ISD::FP_TO_SINT: Res = SoftenFloatOp_FP_TO_SINT(N); break; @@ -669,8 +669,8 @@ } } -SDValue DAGTypeLegalizer::SoftenFloatOp_BIT_CONVERT(SDNode *N) { - return DAG.getNode(ISD::BIT_CONVERT, N->getDebugLoc(), N->getValueType(0), +SDValue DAGTypeLegalizer::SoftenFloatOp_BITCAST(SDNode *N) { + return DAG.getNode(ISD::BITCAST, N->getDebugLoc(), N->getValueType(0), GetSoftenedFloat(N->getOperand(0))); } @@ -815,7 +815,7 @@ case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break; case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break; - case ISD::BIT_CONVERT: ExpandRes_BIT_CONVERT(N, Lo, Hi); break; + case ISD::BITCAST: ExpandRes_BITCAST(N, Lo, Hi); break; case ISD::BUILD_PAIR: ExpandRes_BUILD_PAIR(N, Lo, Hi); break; case ISD::EXTRACT_ELEMENT: ExpandRes_EXTRACT_ELEMENT(N, Lo, Hi); break; case ISD::EXTRACT_VECTOR_ELT: ExpandRes_EXTRACT_VECTOR_ELT(N, Lo, Hi); break; @@ -1220,7 +1220,7 @@ #endif llvm_unreachable("Do not know how to expand this operator's operand!"); - case ISD::BIT_CONVERT: Res = ExpandOp_BIT_CONVERT(N); break; + case ISD::BITCAST: Res = ExpandOp_BITCAST(N); break; case ISD::BUILD_VECTOR: Res = ExpandOp_BUILD_VECTOR(N); break; case ISD::EXTRACT_ELEMENT: Res = ExpandOp_EXTRACT_ELEMENT(N); break; Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp?rev=119990&r1=119989&r2=119990&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Mon Nov 22 21:31:01 2010 @@ -49,7 +49,7 @@ llvm_unreachable("Do not know how to promote this operator!"); case ISD::AssertSext: Res = PromoteIntRes_AssertSext(N); break; case ISD::AssertZext: Res = PromoteIntRes_AssertZext(N); break; - case ISD::BIT_CONVERT: Res = PromoteIntRes_BIT_CONVERT(N); break; + case ISD::BITCAST: Res = PromoteIntRes_BITCAST(N); break; case ISD::BSWAP: Res = PromoteIntRes_BSWAP(N); break; case ISD::BUILD_PAIR: Res = PromoteIntRes_BUILD_PAIR(N); break; case ISD::Constant: Res = PromoteIntRes_Constant(N); break; @@ -162,7 +162,7 @@ return Res; } -SDValue DAGTypeLegalizer::PromoteIntRes_BIT_CONVERT(SDNode *N) { +SDValue DAGTypeLegalizer::PromoteIntRes_BITCAST(SDNode *N) { SDValue InOp = N->getOperand(0); EVT InVT = InOp.getValueType(); EVT NInVT = TLI.getTypeToTransformTo(*DAG.getContext(), InVT); @@ -179,8 +179,7 @@ case PromoteInteger: if (NOutVT.bitsEq(NInVT)) // The input promotes to the same size. Convert the promoted value. - return DAG.getNode(ISD::BIT_CONVERT, dl, - NOutVT, GetPromotedInteger(InOp)); + return DAG.getNode(ISD::BITCAST, dl, NOutVT, GetPromotedInteger(InOp)); break; case SoftenFloat: // Promote the integer operand by hand. @@ -193,7 +192,7 @@ return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, BitConvertToInteger(GetScalarizedVector(InOp))); case SplitVector: { - // For example, i32 = BIT_CONVERT v2i16 on alpha. Convert the split + // For example, i32 = BITCAST v2i16 on alpha. Convert the split // pieces of the input into integers and reassemble in the final type. SDValue Lo, Hi; GetSplitVector(N->getOperand(0), Lo, Hi); @@ -207,12 +206,12 @@ EVT::getIntegerVT(*DAG.getContext(), NOutVT.getSizeInBits()), JoinIntegers(Lo, Hi)); - return DAG.getNode(ISD::BIT_CONVERT, dl, NOutVT, InOp); + return DAG.getNode(ISD::BITCAST, dl, NOutVT, InOp); } case WidenVector: if (OutVT.bitsEq(NInVT)) // The input is widened to the same size. Convert to the widened value. - return DAG.getNode(ISD::BIT_CONVERT, dl, OutVT, GetWidenedVector(InOp)); + return DAG.getNode(ISD::BITCAST, dl, OutVT, GetWidenedVector(InOp)); } return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, @@ -631,7 +630,7 @@ llvm_unreachable("Do not know how to promote this operator's operand!"); case ISD::ANY_EXTEND: Res = PromoteIntOp_ANY_EXTEND(N); break; - case ISD::BIT_CONVERT: Res = PromoteIntOp_BIT_CONVERT(N); break; + case ISD::BITCAST: Res = PromoteIntOp_BITCAST(N); break; case ISD::BR_CC: Res = PromoteIntOp_BR_CC(N, OpNo); break; case ISD::BRCOND: Res = PromoteIntOp_BRCOND(N, OpNo); break; case ISD::BUILD_PAIR: Res = PromoteIntOp_BUILD_PAIR(N); break; @@ -713,7 +712,7 @@ return DAG.getNode(ISD::ANY_EXTEND, N->getDebugLoc(), N->getValueType(0), Op); } -SDValue DAGTypeLegalizer::PromoteIntOp_BIT_CONVERT(SDNode *N) { +SDValue DAGTypeLegalizer::PromoteIntOp_BITCAST(SDNode *N) { // This should only occur in unusual situations like bitcasting to an // x86_fp80, so just turn it into a store+load return CreateStackStoreLoad(N->getOperand(0), N->getValueType(0)); @@ -950,7 +949,7 @@ case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break; case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break; - case ISD::BIT_CONVERT: ExpandRes_BIT_CONVERT(N, Lo, Hi); break; + case ISD::BITCAST: ExpandRes_BITCAST(N, Lo, Hi); break; case ISD::BUILD_PAIR: ExpandRes_BUILD_PAIR(N, Lo, Hi); break; case ISD::EXTRACT_ELEMENT: ExpandRes_EXTRACT_ELEMENT(N, Lo, Hi); break; case ISD::EXTRACT_VECTOR_ELT: ExpandRes_EXTRACT_VECTOR_ELT(N, Lo, Hi); break; @@ -2076,7 +2075,7 @@ #endif llvm_unreachable("Do not know how to expand this operator's operand!"); - case ISD::BIT_CONVERT: Res = ExpandOp_BIT_CONVERT(N); break; + case ISD::BITCAST: Res = ExpandOp_BITCAST(N); break; case ISD::BR_CC: Res = ExpandIntOp_BR_CC(N); break; case ISD::BUILD_VECTOR: Res = ExpandOp_BUILD_VECTOR(N); break; case ISD::EXTRACT_ELEMENT: Res = ExpandOp_EXTRACT_ELEMENT(N); break; @@ -2320,7 +2319,7 @@ N->getMemoryVT(), isVolatile, isNonTemporal, Alignment); } - + if (TLI.isLittleEndian()) { // Little-endian - low bits are at low addresses. GetExpandedInteger(N->getValue(), Lo, Hi); Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp?rev=119990&r1=119989&r2=119990&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp Mon Nov 22 21:31:01 2010 @@ -858,7 +858,7 @@ /// BitConvertToInteger - Convert to an integer of the same size. SDValue DAGTypeLegalizer::BitConvertToInteger(SDValue Op) { unsigned BitWidth = Op.getValueType().getSizeInBits(); - return DAG.getNode(ISD::BIT_CONVERT, Op.getDebugLoc(), + return DAG.getNode(ISD::BITCAST, Op.getDebugLoc(), EVT::getIntegerVT(*DAG.getContext(), BitWidth), Op); } @@ -869,7 +869,7 @@ unsigned EltWidth = Op.getValueType().getVectorElementType().getSizeInBits(); EVT EltNVT = EVT::getIntegerVT(*DAG.getContext(), EltWidth); unsigned NumElts = Op.getValueType().getVectorNumElements(); - return DAG.getNode(ISD::BIT_CONVERT, Op.getDebugLoc(), + return DAG.getNode(ISD::BITCAST, Op.getDebugLoc(), EVT::getVectorVT(*DAG.getContext(), EltNVT, NumElts), Op); } Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h?rev=119990&r1=119989&r2=119990&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h Mon Nov 22 21:31:01 2010 @@ -99,7 +99,7 @@ return SoftenFloat; return ExpandFloat; } - + if (VT.getVectorNumElements() == 1) return ScalarizeVector; return SplitVector; @@ -244,7 +244,7 @@ SDValue PromoteIntRes_AssertZext(SDNode *N); SDValue PromoteIntRes_Atomic1(AtomicSDNode *N); SDValue PromoteIntRes_Atomic2(AtomicSDNode *N); - SDValue PromoteIntRes_BIT_CONVERT(SDNode *N); + SDValue PromoteIntRes_BITCAST(SDNode *N); SDValue PromoteIntRes_BSWAP(SDNode *N); SDValue PromoteIntRes_BUILD_PAIR(SDNode *N); SDValue PromoteIntRes_Constant(SDNode *N); @@ -278,7 +278,7 @@ // Integer Operand Promotion. bool PromoteIntegerOperand(SDNode *N, unsigned OperandNo); SDValue PromoteIntOp_ANY_EXTEND(SDNode *N); - SDValue PromoteIntOp_BIT_CONVERT(SDNode *N); + SDValue PromoteIntOp_BITCAST(SDNode *N); SDValue PromoteIntOp_BUILD_PAIR(SDNode *N); SDValue PromoteIntOp_BR_CC(SDNode *N, unsigned OpNo); SDValue PromoteIntOp_BRCOND(SDNode *N, unsigned OpNo); @@ -352,7 +352,7 @@ // Integer Operand Expansion. bool ExpandIntegerOperand(SDNode *N, unsigned OperandNo); - SDValue ExpandIntOp_BIT_CONVERT(SDNode *N); + SDValue ExpandIntOp_BITCAST(SDNode *N); SDValue ExpandIntOp_BR_CC(SDNode *N); SDValue ExpandIntOp_BUILD_VECTOR(SDNode *N); SDValue ExpandIntOp_EXTRACT_ELEMENT(SDNode *N); @@ -387,7 +387,7 @@ // Result Float to Integer Conversion. void SoftenFloatResult(SDNode *N, unsigned OpNo); - SDValue SoftenFloatRes_BIT_CONVERT(SDNode *N); + SDValue SoftenFloatRes_BITCAST(SDNode *N); SDValue SoftenFloatRes_BUILD_PAIR(SDNode *N); SDValue SoftenFloatRes_ConstantFP(ConstantFPSDNode *N); SDValue SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N); @@ -426,7 +426,7 @@ // Operand Float to Integer Conversion. bool SoftenFloatOperand(SDNode *N, unsigned OpNo); - SDValue SoftenFloatOp_BIT_CONVERT(SDNode *N); + SDValue SoftenFloatOp_BITCAST(SDNode *N); SDValue SoftenFloatOp_BR_CC(SDNode *N); SDValue SoftenFloatOp_FP_ROUND(SDNode *N); SDValue SoftenFloatOp_FP_TO_SINT(SDNode *N); @@ -515,7 +515,7 @@ SDValue ScalarizeVecRes_UnaryOp(SDNode *N); SDValue ScalarizeVecRes_InregOp(SDNode *N); - SDValue ScalarizeVecRes_BIT_CONVERT(SDNode *N); + SDValue ScalarizeVecRes_BITCAST(SDNode *N); SDValue ScalarizeVecRes_CONVERT_RNDSAT(SDNode *N); SDValue ScalarizeVecRes_EXTRACT_SUBVECTOR(SDNode *N); SDValue ScalarizeVecRes_FPOWI(SDNode *N); @@ -532,7 +532,7 @@ // Vector Operand Scalarization: <1 x ty> -> ty. bool ScalarizeVectorOperand(SDNode *N, unsigned OpNo); - SDValue ScalarizeVecOp_BIT_CONVERT(SDNode *N); + SDValue ScalarizeVecOp_BITCAST(SDNode *N); SDValue ScalarizeVecOp_CONCAT_VECTORS(SDNode *N); SDValue ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode *N); SDValue ScalarizeVecOp_STORE(StoreSDNode *N, unsigned OpNo); @@ -557,7 +557,7 @@ void SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo, SDValue &Hi); void SplitVecRes_InregOp(SDNode *N, SDValue &Lo, SDValue &Hi); - void SplitVecRes_BIT_CONVERT(SDNode *N, SDValue &Lo, SDValue &Hi); + void SplitVecRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi); void SplitVecRes_BUILD_PAIR(SDNode *N, SDValue &Lo, SDValue &Hi); void SplitVecRes_BUILD_VECTOR(SDNode *N, SDValue &Lo, SDValue &Hi); void SplitVecRes_CONCAT_VECTORS(SDNode *N, SDValue &Lo, SDValue &Hi); @@ -577,7 +577,7 @@ bool SplitVectorOperand(SDNode *N, unsigned OpNo); SDValue SplitVecOp_UnaryOp(SDNode *N); - SDValue SplitVecOp_BIT_CONVERT(SDNode *N); + SDValue SplitVecOp_BITCAST(SDNode *N); SDValue SplitVecOp_EXTRACT_SUBVECTOR(SDNode *N); SDValue SplitVecOp_EXTRACT_VECTOR_ELT(SDNode *N); SDValue SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo); @@ -603,7 +603,7 @@ // Widen Vector Result Promotion. void WidenVectorResult(SDNode *N, unsigned ResNo); - SDValue WidenVecRes_BIT_CONVERT(SDNode* N); + SDValue WidenVecRes_BITCAST(SDNode* N); SDValue WidenVecRes_BUILD_VECTOR(SDNode* N); SDValue WidenVecRes_CONCAT_VECTORS(SDNode* N); SDValue WidenVecRes_CONVERT_RNDSAT(SDNode* N); @@ -628,7 +628,7 @@ // Widen Vector Operand. bool WidenVectorOperand(SDNode *N, unsigned ResNo); - SDValue WidenVecOp_BIT_CONVERT(SDNode *N); + SDValue WidenVecOp_BITCAST(SDNode *N); SDValue WidenVecOp_CONCAT_VECTORS(SDNode *N); SDValue WidenVecOp_EXTRACT_VECTOR_ELT(SDNode *N); SDValue WidenVecOp_EXTRACT_SUBVECTOR(SDNode *N); @@ -721,7 +721,7 @@ } // Generic Result Expansion. - void ExpandRes_BIT_CONVERT (SDNode *N, SDValue &Lo, SDValue &Hi); + void ExpandRes_BITCAST (SDNode *N, SDValue &Lo, SDValue &Hi); void ExpandRes_BUILD_PAIR (SDNode *N, SDValue &Lo, SDValue &Hi); void ExpandRes_EXTRACT_ELEMENT (SDNode *N, SDValue &Lo, SDValue &Hi); void ExpandRes_EXTRACT_VECTOR_ELT(SDNode *N, SDValue &Lo, SDValue &Hi); @@ -729,7 +729,7 @@ void ExpandRes_VAARG (SDNode *N, SDValue &Lo, SDValue &Hi); // Generic Operand Expansion. - SDValue ExpandOp_BIT_CONVERT (SDNode *N); + SDValue ExpandOp_BITCAST (SDNode *N); SDValue ExpandOp_BUILD_VECTOR (SDNode *N); SDValue ExpandOp_EXTRACT_ELEMENT (SDNode *N); SDValue ExpandOp_INSERT_VECTOR_ELT(SDNode *N); Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp?rev=119990&r1=119989&r2=119990&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp Mon Nov 22 21:31:01 2010 @@ -32,8 +32,7 @@ // little/big-endian machines, followed by the Hi/Lo part. This means that // they cannot be used as is on vectors, for which Lo is always stored first. -void DAGTypeLegalizer::ExpandRes_BIT_CONVERT(SDNode *N, SDValue &Lo, - SDValue &Hi) { +void DAGTypeLegalizer::ExpandRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi) { EVT OutVT = N->getValueType(0); EVT NOutVT = TLI.getTypeToTransformTo(*DAG.getContext(), OutVT); SDValue InOp = N->getOperand(0); @@ -50,31 +49,31 @@ case SoftenFloat: // Convert the integer operand instead. SplitInteger(GetSoftenedFloat(InOp), Lo, Hi); - Lo = DAG.getNode(ISD::BIT_CONVERT, dl, NOutVT, Lo); - Hi = DAG.getNode(ISD::BIT_CONVERT, dl, NOutVT, Hi); + Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); + Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); return; case ExpandInteger: case ExpandFloat: // Convert the expanded pieces of the input. GetExpandedOp(InOp, Lo, Hi); - Lo = DAG.getNode(ISD::BIT_CONVERT, dl, NOutVT, Lo); - Hi = DAG.getNode(ISD::BIT_CONVERT, dl, NOutVT, Hi); + Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); + Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); return; case SplitVector: GetSplitVector(InOp, Lo, Hi); if (TLI.isBigEndian()) std::swap(Lo, Hi); - Lo = DAG.getNode(ISD::BIT_CONVERT, dl, NOutVT, Lo); - Hi = DAG.getNode(ISD::BIT_CONVERT, dl, NOutVT, Hi); + Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); + Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); return; case ScalarizeVector: // Convert the element instead. SplitInteger(BitConvertToInteger(GetScalarizedVector(InOp)), Lo, Hi); - Lo = DAG.getNode(ISD::BIT_CONVERT, dl, NOutVT, Lo); - Hi = DAG.getNode(ISD::BIT_CONVERT, dl, NOutVT, Hi); + Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); + Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); return; case WidenVector: { - assert(!(InVT.getVectorNumElements() & 1) && "Unsupported BIT_CONVERT"); + assert(!(InVT.getVectorNumElements() & 1) && "Unsupported BITCAST"); InOp = GetWidenedVector(InOp); EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(), InVT.getVectorNumElements()/2); @@ -84,19 +83,19 @@ DAG.getIntPtrConstant(InNVT.getVectorNumElements())); if (TLI.isBigEndian()) std::swap(Lo, Hi); - Lo = DAG.getNode(ISD::BIT_CONVERT, dl, NOutVT, Lo); - Hi = DAG.getNode(ISD::BIT_CONVERT, dl, NOutVT, Hi); + Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); + Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); return; } } if (InVT.isVector() && OutVT.isInteger()) { - // Handle cases like i64 = BIT_CONVERT v1i64 on x86, where the operand + // Handle cases like i64 = BITCAST v1i64 on x86, where the operand // is legal but the result is not. EVT NVT = EVT::getVectorVT(*DAG.getContext(), NOutVT, 2); if (isTypeLegal(NVT)) { - SDValue CastInOp = DAG.getNode(ISD::BIT_CONVERT, dl, NVT, InOp); + SDValue CastInOp = DAG.getNode(ISD::BITCAST, dl, NVT, InOp); Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NOutVT, CastInOp, DAG.getIntPtrConstant(0)); Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NOutVT, CastInOp, @@ -173,7 +172,7 @@ EVT OldVT = N->getValueType(0); EVT NewVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldVT); - SDValue NewVec = DAG.getNode(ISD::BIT_CONVERT, dl, + SDValue NewVec = DAG.getNode(ISD::BITCAST, dl, EVT::getVectorVT(*DAG.getContext(), NewVT, 2*OldElts), OldVec); @@ -262,14 +261,14 @@ // Generic Operand Expansion. //===--------------------------------------------------------------------===// -SDValue DAGTypeLegalizer::ExpandOp_BIT_CONVERT(SDNode *N) { +SDValue DAGTypeLegalizer::ExpandOp_BITCAST(SDNode *N) { DebugLoc dl = N->getDebugLoc(); if (N->getValueType(0).isVector()) { // An illegal expanding type is being converted to a legal vector type. // Make a two element vector out of the expanded parts and convert that // instead, but only if the new vector type is legal (otherwise there // is no point, and it might create expansion loops). For example, on - // x86 this turns v1i64 = BIT_CONVERT i64 into v1i64 = BIT_CONVERT v2i32. + // x86 this turns v1i64 = BITCAST i64 into v1i64 = BITCAST v2i32. EVT OVT = N->getOperand(0).getValueType(); EVT NVT = EVT::getVectorVT(*DAG.getContext(), TLI.getTypeToTransformTo(*DAG.getContext(), OVT), @@ -283,7 +282,7 @@ std::swap(Parts[0], Parts[1]); SDValue Vec = DAG.getNode(ISD::BUILD_VECTOR, dl, NVT, Parts, 2); - return DAG.getNode(ISD::BIT_CONVERT, dl, N->getValueType(0), Vec); + return DAG.getNode(ISD::BITCAST, dl, N->getValueType(0), Vec); } } @@ -322,7 +321,7 @@ &NewElts[0], NewElts.size()); // Convert the new vector to the old vector type. - return DAG.getNode(ISD::BIT_CONVERT, dl, VecVT, NewVec); + return DAG.getNode(ISD::BITCAST, dl, VecVT, NewVec); } SDValue DAGTypeLegalizer::ExpandOp_EXTRACT_ELEMENT(SDNode *N) { @@ -347,7 +346,7 @@ // Bitconvert to a vector of twice the length with elements of the expanded // type, insert the expanded vector elements, and then convert back. EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewEVT, NumElts*2); - SDValue NewVec = DAG.getNode(ISD::BIT_CONVERT, dl, + SDValue NewVec = DAG.getNode(ISD::BITCAST, dl, NewVecVT, N->getOperand(0)); SDValue Lo, Hi; @@ -363,7 +362,7 @@ NewVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, NewVec, Hi, Idx); // Convert the new vector to the old vector type. - return DAG.getNode(ISD::BIT_CONVERT, dl, VecVT, NewVec); + return DAG.getNode(ISD::BITCAST, dl, VecVT, NewVec); } SDValue DAGTypeLegalizer::ExpandOp_SCALAR_TO_VECTOR(SDNode *N) { Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp?rev=119990&r1=119989&r2=119990&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp Mon Nov 22 21:31:01 2010 @@ -241,14 +241,14 @@ for (unsigned j = 0; j != Op.getNumOperands(); ++j) { if (Op.getOperand(j).getValueType().isVector()) - Operands[j] = DAG.getNode(ISD::BIT_CONVERT, dl, NVT, Op.getOperand(j)); + Operands[j] = DAG.getNode(ISD::BITCAST, dl, NVT, Op.getOperand(j)); else Operands[j] = Op.getOperand(j); } Op = DAG.getNode(Op.getOpcode(), dl, NVT, &Operands[0], Operands.size()); - return DAG.getNode(ISD::BIT_CONVERT, dl, VT, Op); + return DAG.getNode(ISD::BITCAST, dl, VT, Op); } SDValue VectorLegalizer::ExpandFNEG(SDValue Op) { Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp?rev=119990&r1=119989&r2=119990&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp Mon Nov 22 21:31:01 2010 @@ -46,7 +46,7 @@ #endif llvm_unreachable("Do not know how to scalarize the result of this operator!"); - case ISD::BIT_CONVERT: R = ScalarizeVecRes_BIT_CONVERT(N); break; + case ISD::BITCAST: R = ScalarizeVecRes_BITCAST(N); break; case ISD::BUILD_VECTOR: R = N->getOperand(0); break; case ISD::CONVERT_RNDSAT: R = ScalarizeVecRes_CONVERT_RNDSAT(N); break; case ISD::EXTRACT_SUBVECTOR: R = ScalarizeVecRes_EXTRACT_SUBVECTOR(N); break; @@ -122,9 +122,9 @@ LHS.getValueType(), LHS, RHS); } -SDValue DAGTypeLegalizer::ScalarizeVecRes_BIT_CONVERT(SDNode *N) { +SDValue DAGTypeLegalizer::ScalarizeVecRes_BITCAST(SDNode *N) { EVT NewVT = N->getValueType(0).getVectorElementType(); - return DAG.getNode(ISD::BIT_CONVERT, N->getDebugLoc(), + return DAG.getNode(ISD::BITCAST, N->getDebugLoc(), NewVT, N->getOperand(0)); } @@ -296,8 +296,8 @@ dbgs() << "\n"; #endif llvm_unreachable("Do not know how to scalarize this operator's operand!"); - case ISD::BIT_CONVERT: - Res = ScalarizeVecOp_BIT_CONVERT(N); + case ISD::BITCAST: + Res = ScalarizeVecOp_BITCAST(N); break; case ISD::CONCAT_VECTORS: Res = ScalarizeVecOp_CONCAT_VECTORS(N); @@ -326,11 +326,11 @@ return false; } -/// ScalarizeVecOp_BIT_CONVERT - If the value to convert is a vector that needs +/// ScalarizeVecOp_BITCAST - If the value to convert is a vector that needs /// to be scalarized, it must be <1 x ty>. Convert the element instead. -SDValue DAGTypeLegalizer::ScalarizeVecOp_BIT_CONVERT(SDNode *N) { +SDValue DAGTypeLegalizer::ScalarizeVecOp_BITCAST(SDNode *N) { SDValue Elt = GetScalarizedVector(N->getOperand(0)); - return DAG.getNode(ISD::BIT_CONVERT, N->getDebugLoc(), + return DAG.getNode(ISD::BITCAST, N->getDebugLoc(), N->getValueType(0), Elt); } @@ -406,7 +406,7 @@ case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break; case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break; - case ISD::BIT_CONVERT: SplitVecRes_BIT_CONVERT(N, Lo, Hi); break; + case ISD::BITCAST: SplitVecRes_BITCAST(N, Lo, Hi); break; case ISD::BUILD_VECTOR: SplitVecRes_BUILD_VECTOR(N, Lo, Hi); break; case ISD::CONCAT_VECTORS: SplitVecRes_CONCAT_VECTORS(N, Lo, Hi); break; case ISD::CONVERT_RNDSAT: SplitVecRes_CONVERT_RNDSAT(N, Lo, Hi); break; @@ -496,8 +496,8 @@ Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi, RHSHi); } -void DAGTypeLegalizer::SplitVecRes_BIT_CONVERT(SDNode *N, SDValue &Lo, - SDValue &Hi) { +void DAGTypeLegalizer::SplitVecRes_BITCAST(SDNode *N, SDValue &Lo, + SDValue &Hi) { // We know the result is a vector. The input may be either a vector or a // scalar value. EVT LoVT, HiVT; @@ -525,8 +525,8 @@ GetExpandedOp(InOp, Lo, Hi); if (TLI.isBigEndian()) std::swap(Lo, Hi); - Lo = DAG.getNode(ISD::BIT_CONVERT, dl, LoVT, Lo); - Hi = DAG.getNode(ISD::BIT_CONVERT, dl, HiVT, Hi); + Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo); + Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi); return; } break; @@ -534,8 +534,8 @@ // If the input is a vector that needs to be split, convert each split // piece of the input now. GetSplitVector(InOp, Lo, Hi); - Lo = DAG.getNode(ISD::BIT_CONVERT, dl, LoVT, Lo); - Hi = DAG.getNode(ISD::BIT_CONVERT, dl, HiVT, Hi); + Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo); + Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi); return; } @@ -549,8 +549,8 @@ if (TLI.isBigEndian()) std::swap(Lo, Hi); - Lo = DAG.getNode(ISD::BIT_CONVERT, dl, LoVT, Lo); - Hi = DAG.getNode(ISD::BIT_CONVERT, dl, HiVT, Hi); + Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo); + Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi); } void DAGTypeLegalizer::SplitVecRes_BUILD_VECTOR(SDNode *N, SDValue &Lo, @@ -978,7 +978,7 @@ #endif llvm_unreachable("Do not know how to split this operator's operand!"); - case ISD::BIT_CONVERT: Res = SplitVecOp_BIT_CONVERT(N); break; + case ISD::BITCAST: Res = SplitVecOp_BITCAST(N); break; case ISD::EXTRACT_SUBVECTOR: Res = SplitVecOp_EXTRACT_SUBVECTOR(N); break; case ISD::EXTRACT_VECTOR_ELT:Res = SplitVecOp_EXTRACT_VECTOR_ELT(N); break; case ISD::CONCAT_VECTORS: Res = SplitVecOp_CONCAT_VECTORS(N); break; @@ -1034,8 +1034,8 @@ return DAG.getNode(ISD::CONCAT_VECTORS, dl, ResVT, Lo, Hi); } -SDValue DAGTypeLegalizer::SplitVecOp_BIT_CONVERT(SDNode *N) { - // For example, i64 = BIT_CONVERT v4i16 on alpha. Typically the vector will +SDValue DAGTypeLegalizer::SplitVecOp_BITCAST(SDNode *N) { + // For example, i64 = BITCAST v4i16 on alpha. Typically the vector will // end up being split all the way down to individual components. Convert the // split pieces into integers and reassemble. SDValue Lo, Hi; @@ -1046,7 +1046,7 @@ if (TLI.isBigEndian()) std::swap(Lo, Hi); - return DAG.getNode(ISD::BIT_CONVERT, N->getDebugLoc(), N->getValueType(0), + return DAG.getNode(ISD::BITCAST, N->getDebugLoc(), N->getValueType(0), JoinIntegers(Lo, Hi)); } @@ -1151,7 +1151,7 @@ SDValue DAGTypeLegalizer::SplitVecOp_CONCAT_VECTORS(SDNode *N) { DebugLoc DL = N->getDebugLoc(); - + // The input operands all must have the same type, and we know the result the // result type is valid. Convert this to a buildvector which extracts all the // input elements. @@ -1168,7 +1168,7 @@ } } - + return DAG.getNode(ISD::BUILD_VECTOR, DL, N->getValueType(0), &Elts[0], Elts.size()); } @@ -1197,7 +1197,7 @@ #endif llvm_unreachable("Do not know how to widen the result of this operator!"); - case ISD::BIT_CONVERT: Res = WidenVecRes_BIT_CONVERT(N); break; + case ISD::BITCAST: Res = WidenVecRes_BITCAST(N); break; case ISD::BUILD_VECTOR: Res = WidenVecRes_BUILD_VECTOR(N); break; case ISD::CONCAT_VECTORS: Res = WidenVecRes_CONCAT_VECTORS(N); break; case ISD::CONVERT_RNDSAT: Res = WidenVecRes_CONVERT_RNDSAT(N); break; @@ -1304,11 +1304,11 @@ SDValue InOp2 = GetWidenedVector(N->getOperand(1)); return DAG.getNode(N->getOpcode(), dl, WidenVT, InOp1, InOp2); } - + // No legal vector version so unroll the vector operation and then widen. if (NumElts == 1) return DAG.UnrollVectorOp(N, WidenVT.getVectorNumElements()); - + // Since the operation can trap, apply operation on the original vector. EVT MaxVT = VT; SDValue InOp1 = GetWidenedVector(N->getOperand(0)); @@ -1341,9 +1341,9 @@ if (NumElts == 1) { for (unsigned i = 0; i != CurNumElts; ++i, ++Idx) { - SDValue EOp1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT, + SDValue EOp1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT, InOp1, DAG.getIntPtrConstant(Idx)); - SDValue EOp2 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT, + SDValue EOp2 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT, InOp2, DAG.getIntPtrConstant(Idx)); ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, WidenEltVT, EOp1, EOp2); @@ -1411,7 +1411,7 @@ if (VT == WidenVT) return ConcatOps[0]; } - + // add undefs of size MaxVT until ConcatOps grows to length of WidenVT unsigned NumOps = WidenVT.getVectorNumElements()/MaxVT.getVectorNumElements(); if (NumOps != ConcatEnd ) { @@ -1532,7 +1532,7 @@ WidenVT, WidenLHS, DAG.getValueType(ExtVT)); } -SDValue DAGTypeLegalizer::WidenVecRes_BIT_CONVERT(SDNode *N) { +SDValue DAGTypeLegalizer::WidenVecRes_BITCAST(SDNode *N) { SDValue InOp = N->getOperand(0); EVT InVT = InOp.getValueType(); EVT VT = N->getValueType(0); @@ -1551,7 +1551,7 @@ InOp = GetPromotedInteger(InOp); InVT = InOp.getValueType(); if (WidenVT.bitsEq(InVT)) - return DAG.getNode(ISD::BIT_CONVERT, dl, WidenVT, InOp); + return DAG.getNode(ISD::BITCAST, dl, WidenVT, InOp); break; case SoftenFloat: case ExpandInteger: @@ -1566,7 +1566,7 @@ InVT = InOp.getValueType(); if (WidenVT.bitsEq(InVT)) // The input widens to the same size. Convert to the widen value. - return DAG.getNode(ISD::BIT_CONVERT, dl, WidenVT, InOp); + return DAG.getNode(ISD::BITCAST, dl, WidenVT, InOp); break; } @@ -1606,7 +1606,7 @@ else NewVec = DAG.getNode(ISD::BUILD_VECTOR, dl, NewInVT, &Ops[0], NewNumElts); - return DAG.getNode(ISD::BIT_CONVERT, dl, WidenVT, NewVec); + return DAG.getNode(ISD::BITCAST, dl, WidenVT, NewVec); } } @@ -1982,7 +1982,7 @@ #endif llvm_unreachable("Do not know how to widen this operator's operand!"); - case ISD::BIT_CONVERT: Res = WidenVecOp_BIT_CONVERT(N); break; + case ISD::BITCAST: Res = WidenVecOp_BITCAST(N); break; case ISD::CONCAT_VECTORS: Res = WidenVecOp_CONCAT_VECTORS(N); break; case ISD::EXTRACT_SUBVECTOR: Res = WidenVecOp_EXTRACT_SUBVECTOR(N); break; case ISD::EXTRACT_VECTOR_ELT: Res = WidenVecOp_EXTRACT_VECTOR_ELT(N); break; @@ -2041,7 +2041,7 @@ return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts); } -SDValue DAGTypeLegalizer::WidenVecOp_BIT_CONVERT(SDNode *N) { +SDValue DAGTypeLegalizer::WidenVecOp_BITCAST(SDNode *N) { EVT VT = N->getValueType(0); SDValue InOp = GetWidenedVector(N->getOperand(0)); EVT InWidenVT = InOp.getValueType(); @@ -2055,7 +2055,7 @@ unsigned NewNumElts = InWidenSize / Size; EVT NewVT = EVT::getVectorVT(*DAG.getContext(), VT, NewNumElts); if (TLI.isTypeLegal(NewVT)) { - SDValue BitOp = DAG.getNode(ISD::BIT_CONVERT, dl, NewVT, InOp); + SDValue BitOp = DAG.getNode(ISD::BITCAST, dl, NewVT, InOp); return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, VT, BitOp, DAG.getIntPtrConstant(0)); } @@ -2144,7 +2144,7 @@ if (Width == WidenEltWidth) return RetVT; - // See if there is larger legal integer than the element type to load/store + // See if there is larger legal integer than the element type to load/store unsigned VT; for (VT = (unsigned)MVT::LAST_INTEGER_VALUETYPE; VT >= (unsigned)MVT::FIRST_INTEGER_VALUETYPE; --VT) { @@ -2199,7 +2199,7 @@ if (NewLdTy != LdTy) { NumElts = Width / NewLdTy.getSizeInBits(); NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewLdTy, NumElts); - VecOp = DAG.getNode(ISD::BIT_CONVERT, dl, NewVecVT, VecOp); + VecOp = DAG.getNode(ISD::BITCAST, dl, NewVecVT, VecOp); // Readjust position and vector position based on new load type Idx = Idx * LdTy.getSizeInBits() / NewLdTy.getSizeInBits(); LdTy = NewLdTy; @@ -2207,7 +2207,7 @@ VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, VecOp, LdOps[i], DAG.getIntPtrConstant(Idx++)); } - return DAG.getNode(ISD::BIT_CONVERT, dl, VecTy, VecOp); + return DAG.getNode(ISD::BITCAST, dl, VecTy, VecOp); } SDValue DAGTypeLegalizer::GenWidenVectorLoads(SmallVector &LdChain, @@ -2247,7 +2247,7 @@ unsigned NumElts = WidenWidth / NewVTWidth; EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts); SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT, LdOp); - return DAG.getNode(ISD::BIT_CONVERT, dl, WidenVT, VecOp); + return DAG.getNode(ISD::BITCAST, dl, WidenVT, VecOp); } if (NewVT == WidenVT) return LdOp; @@ -2297,7 +2297,7 @@ if (!LdOps[0].getValueType().isVector()) // All the loads are scalar loads. return BuildVectorFromScalar(DAG, WidenVT, LdOps, 0, End); - + // If the load contains vectors, build the vector using concat vector. // All of the vectors used to loads are power of 2 and the scalars load // can be combined to make a power of 2 vector. @@ -2441,7 +2441,7 @@ // Cast the vector to the scalar type we can store unsigned NumElts = ValWidth / NewVTWidth; EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts); - SDValue VecOp = DAG.getNode(ISD::BIT_CONVERT, dl, NewVecVT, ValOp); + SDValue VecOp = DAG.getNode(ISD::BITCAST, dl, NewVecVT, ValOp); // Readjust index position based on new vector type Idx = Idx * ValEltWidth / NewVTWidth; do { @@ -2474,7 +2474,7 @@ bool isNonTemporal = ST->isNonTemporal(); SDValue ValOp = GetWidenedVector(ST->getValue()); DebugLoc dl = ST->getDebugLoc(); - + EVT StVT = ST->getMemoryVT(); EVT ValVT = ValOp.getValueType(); Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=119990&r1=119989&r2=119990&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Mon Nov 22 21:31:01 2010 @@ -111,7 +111,7 @@ /// BUILD_VECTOR where all of the elements are ~0 or undef. bool ISD::isBuildVectorAllOnes(const SDNode *N) { // Look through a bit convert. - if (N->getOpcode() == ISD::BIT_CONVERT) + if (N->getOpcode() == ISD::BITCAST) N = N->getOperand(0).getNode(); if (N->getOpcode() != ISD::BUILD_VECTOR) return false; @@ -152,7 +152,7 @@ /// BUILD_VECTOR where all of the elements are 0 or undef. bool ISD::isBuildVectorAllZeros(const SDNode *N) { // Look through a bit convert. - if (N->getOpcode() == ISD::BIT_CONVERT) + if (N->getOpcode() == ISD::BITCAST) N = N->getOperand(0).getNode(); if (N->getOpcode() != ISD::BUILD_VECTOR) return false; @@ -1356,7 +1356,7 @@ void *IP = 0; if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) return SDValue(E, 0); - + SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label); CSEMap.InsertNode(N, IP); AllNodes.push_back(N); @@ -1406,11 +1406,11 @@ FoldingSetNodeID ID; AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0); ID.AddPointer(MD); - + void *IP = 0; if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) return SDValue(E, 0); - + SDNode *N = new (NodeAllocator) MDNodeSDNode(MD); CSEMap.InsertNode(N, IP); AllNodes.push_back(N); @@ -2365,7 +2365,7 @@ APFloat::rmNearestTiesToEven); return getConstantFP(apf, VT); } - case ISD::BIT_CONVERT: + case ISD::BITCAST: if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) return getConstantFP(Val.bitsToFloat(), VT); else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) @@ -2416,7 +2416,7 @@ APInt api(VT.getSizeInBits(), 2, x); return getConstant(api, VT); } - case ISD::BIT_CONVERT: + case ISD::BITCAST: if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) @@ -2518,13 +2518,13 @@ return Operand.getNode()->getOperand(0); } break; - case ISD::BIT_CONVERT: + case ISD::BITCAST: // Basic sanity checking. assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() - && "Cannot BIT_CONVERT between types of different sizes!"); + && "Cannot BITCAST between types of different sizes!"); if (VT == Operand.getValueType()) return Operand; // noop conversion. - if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) - return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0)); + if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x) + return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0)); if (OpOpcode == ISD::UNDEF) return getUNDEF(VT); break; @@ -3060,7 +3060,7 @@ case ISD::VECTOR_SHUFFLE: llvm_unreachable("should use getVectorShuffle constructor!"); break; - case ISD::BIT_CONVERT: + case ISD::BITCAST: // Fold bit_convert nodes from a type to themselves. if (N1.getValueType() == VT) return N1; @@ -3177,7 +3177,7 @@ else if (VT.isVector()) { unsigned NumElts = VT.getVectorNumElements(); MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; - return DAG.getNode(ISD::BIT_CONVERT, dl, VT, + return DAG.getNode(ISD::BITCAST, dl, VT, DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(), EltVT, NumElts))); } else @@ -3274,7 +3274,7 @@ if (VT.bitsGT(LVT)) VT = LVT; } - + // If we're optimizing for size, and there is a limit, bump the maximum number // of operations inserted down to 4. This is a wild guess that approximates // the size of a call to memcpy or memset (3 arguments + call). @@ -3340,7 +3340,7 @@ bool CopyFromStr = isMemSrcFromString(Src, Str); bool isZeroStr = CopyFromStr && Str.empty(); unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(); - + if (!FindOptimalMemOpLowering(MemOps, Limit, Size, (DstAlignCanChange ? 0 : Align), (isZeroStr ? 0 : SrcAlign), @@ -3682,7 +3682,7 @@ if (Result.getNode()) return Result; - // Emit a library call. + // Emit a library call. const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext()); TargetLowering::ArgListTy Args; TargetLowering::ArgListEntry Entry; @@ -3912,7 +3912,7 @@ !isa(Ptr.getOperand(1)) || !isa(Ptr.getOperand(0))) return MachinePointerInfo(); - + int FI = cast(Ptr.getOperand(0))->getIndex(); return MachinePointerInfo::getFixedStack(FI, Offset+ cast(Ptr.getOperand(1))->getSExtValue()); @@ -3930,7 +3930,7 @@ return InferPointerInfo(Ptr); return MachinePointerInfo(); } - + SDValue SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, @@ -3947,12 +3947,12 @@ Flags |= MachineMemOperand::MOVolatile; if (isNonTemporal) Flags |= MachineMemOperand::MONonTemporal; - + // If we don't have a PtrInfo, infer the trivial frame index case to simplify // clients. if (PtrInfo.V == 0) PtrInfo = InferPointerInfo(Ptr, Offset); - + MachineFunction &MF = getMachineFunction(); MachineMemOperand *MMO = MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment, @@ -3961,7 +3961,7 @@ } SDValue -SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, +SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, DebugLoc dl, SDValue Chain, SDValue Ptr, SDValue Offset, EVT MemVT, MachineMemOperand *MMO) { @@ -4052,7 +4052,7 @@ Flags |= MachineMemOperand::MOVolatile; if (isNonTemporal) Flags |= MachineMemOperand::MONonTemporal; - + if (PtrInfo.V == 0) PtrInfo = InferPointerInfo(Ptr); @@ -4101,7 +4101,7 @@ Flags |= MachineMemOperand::MOVolatile; if (isNonTemporal) Flags |= MachineMemOperand::MONonTemporal; - + if (PtrInfo.V == 0) PtrInfo = InferPointerInfo(Ptr); @@ -5431,7 +5431,7 @@ } MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, - const SDValue *Ops, unsigned NumOps, EVT memvt, + const SDValue *Ops, unsigned NumOps, EVT memvt, MachineMemOperand *mmo) : SDNode(Opc, dl, VTs, Ops, NumOps), MemoryVT(memvt), MMO(mmo) { @@ -5450,7 +5450,7 @@ namespace { struct EVTArray { std::vector VTs; - + EVTArray() { VTs.reserve(MVT::LAST_VALUETYPE); for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) @@ -5542,8 +5542,8 @@ /// reachesChainWithoutSideEffects - Return true if this operand (which must /// be a chain) reaches the specified operand without crossing any -/// side-effecting instructions on any chain path. In practice, this looks -/// through token factors and non-volatile loads. In order to remain efficient, +/// side-effecting instructions on any chain path. In practice, this looks +/// through token factors and non-volatile loads. In order to remain efficient, /// this only looks a couple of nodes in, it does not do an exhaustive search. bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, unsigned Depth) const { @@ -5788,7 +5788,7 @@ case ISD::UINT_TO_FP: return "uint_to_fp"; case ISD::FP_TO_SINT: return "fp_to_sint"; case ISD::FP_TO_UINT: return "fp_to_uint"; - case ISD::BIT_CONVERT: return "bit_convert"; + case ISD::BITCAST: return "bit_convert"; case ISD::FP16_TO_FP32: return "fp16_to_fp32"; case ISD::FP32_TO_FP16: return "fp32_to_fp16"; @@ -6051,7 +6051,7 @@ const char *AM = getIndexedModeName(ST->getAddressingMode()); if (*AM) OS << ", " << AM; - + OS << ">"; } else if (const MemSDNode* M = dyn_cast(this)) { OS << "<" << *M->getMemOperand() << ">"; @@ -6102,7 +6102,7 @@ static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, const SelectionDAG *G, unsigned depth, - unsigned indent) + unsigned indent) { if (depth == 0) return; @@ -6123,7 +6123,7 @@ void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G, unsigned depth) const { printrWithDepthHelper(OS, this, G, depth, 0); -} +} void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { // Don't print impossibly deep things. @@ -6137,7 +6137,7 @@ void SDNode::dumprFull(const SelectionDAG *G) const { // Don't print impossibly deep things. dumprWithDepth(G, 100); -} +} static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) @@ -6221,10 +6221,10 @@ } -/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a -/// location that is 'Dist' units away from the location that the 'Base' load +/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a +/// location that is 'Dist' units away from the location that the 'Base' load /// is loading from. -bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, +bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, unsigned Bytes, int Dist) const { if (LD->getChain() != Base->getChain()) return false; @@ -6477,7 +6477,7 @@ // If this node has already been checked, don't check it again. if (Checked.count(N)) return; - + // If a node has already been visited on this depth-first walk, reject it as // a cycle. if (!Visited.insert(N)) { @@ -6486,10 +6486,10 @@ errs() << "Detected cycle in SelectionDAG\n"; abort(); } - + for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); - + Checked.insert(N); Visited.erase(N); } Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=119990&r1=119989&r2=119990&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Mon Nov 22 21:31:01 2010 @@ -131,8 +131,8 @@ Hi = getCopyFromParts(DAG, DL, Parts + RoundParts / 2, RoundParts / 2, PartVT, HalfVT); } else { - Lo = DAG.getNode(ISD::BIT_CONVERT, DL, HalfVT, Parts[0]); - Hi = DAG.getNode(ISD::BIT_CONVERT, DL, HalfVT, Parts[1]); + Lo = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[0]); + Hi = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[1]); } if (TLI.isBigEndian()) @@ -164,8 +164,8 @@ assert(ValueVT == EVT(MVT::ppcf128) && PartVT == EVT(MVT::f64) && "Unexpected split"); SDValue Lo, Hi; - Lo = DAG.getNode(ISD::BIT_CONVERT, DL, EVT(MVT::f64), Parts[0]); - Hi = DAG.getNode(ISD::BIT_CONVERT, DL, EVT(MVT::f64), Parts[1]); + Lo = DAG.getNode(ISD::BITCAST, DL, EVT(MVT::f64), Parts[0]); + Hi = DAG.getNode(ISD::BITCAST, DL, EVT(MVT::f64), Parts[1]); if (TLI.isBigEndian()) std::swap(Lo, Hi); Val = DAG.getNode(ISD::BUILD_PAIR, DL, ValueVT, Lo, Hi); @@ -207,7 +207,7 @@ } if (PartVT.getSizeInBits() == ValueVT.getSizeInBits()) - return DAG.getNode(ISD::BIT_CONVERT, DL, ValueVT, Val); + return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val); llvm_unreachable("Unknown mismatch!"); return SDValue(); @@ -284,7 +284,7 @@ } // Vector/Vector bitcast. - return DAG.getNode(ISD::BIT_CONVERT, DL, ValueVT, Val); + return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val); } assert(ValueVT.getVectorElementType() == PartVT && @@ -342,7 +342,7 @@ } else if (PartBits == ValueVT.getSizeInBits()) { // Different types of the same size. assert(NumParts == 1 && PartVT != ValueVT); - Val = DAG.getNode(ISD::BIT_CONVERT, DL, PartVT, Val); + Val = DAG.getNode(ISD::BITCAST, DL, PartVT, Val); } else if (NumParts * PartBits < ValueVT.getSizeInBits()) { // If the parts cover less bits than value has, truncate the value. assert(PartVT.isInteger() && ValueVT.isInteger() && @@ -385,7 +385,7 @@ // The number of parts is a power of 2. Repeatedly bisect the value using // EXTRACT_ELEMENT. - Parts[0] = DAG.getNode(ISD::BIT_CONVERT, DL, + Parts[0] = DAG.getNode(ISD::BITCAST, DL, EVT::getIntegerVT(*DAG.getContext(), ValueVT.getSizeInBits()), Val); @@ -403,8 +403,8 @@ ThisVT, Part0, DAG.getIntPtrConstant(0)); if (ThisBits == PartBits && ThisVT != PartVT) { - Part0 = DAG.getNode(ISD::BIT_CONVERT, DL, PartVT, Part0); - Part1 = DAG.getNode(ISD::BIT_CONVERT, DL, PartVT, Part1); + Part0 = DAG.getNode(ISD::BITCAST, DL, PartVT, Part0); + Part1 = DAG.getNode(ISD::BITCAST, DL, PartVT, Part1); } } } @@ -428,7 +428,7 @@ // Nothing to do. } else if (PartVT.getSizeInBits() == ValueVT.getSizeInBits()) { // Bitconvert vector->vector case. - Val = DAG.getNode(ISD::BIT_CONVERT, DL, PartVT, Val); + Val = DAG.getNode(ISD::BITCAST, DL, PartVT, Val); } else if (PartVT.isVector() && PartVT.getVectorElementType() == ValueVT.getVectorElementType()&& PartVT.getVectorNumElements() > ValueVT.getVectorNumElements()) { @@ -2579,9 +2579,9 @@ EVT DestVT = TLI.getValueType(I.getType()); // BitCast assures us that source and destination are the same size so this is - // either a BIT_CONVERT or a no-op. + // either a BITCAST or a no-op. if (DestVT != N.getValueType()) - setValue(&I, DAG.getNode(ISD::BIT_CONVERT, getCurDebugLoc(), + setValue(&I, DAG.getNode(ISD::BITCAST, getCurDebugLoc(), DestVT, N)); // convert types. else setValue(&I, N); // noop cast. @@ -3021,7 +3021,7 @@ // Do not serialize non-volatile loads against each other. Root = DAG.getRoot(); } - + SmallVector Values(NumValues); SmallVector Chains(std::min(unsigned(MaxParallelChains), NumValues)); @@ -3198,7 +3198,7 @@ if (!I.getType()->isVoidTy()) { if (const VectorType *PTy = dyn_cast(I.getType())) { EVT VT = TLI.getValueType(PTy); - Result = DAG.getNode(ISD::BIT_CONVERT, getCurDebugLoc(), VT, Result); + Result = DAG.getNode(ISD::BITCAST, getCurDebugLoc(), VT, Result); } setValue(&I, Result); @@ -3217,7 +3217,7 @@ DAG.getConstant(0x007fffff, MVT::i32)); SDValue t2 = DAG.getNode(ISD::OR, dl, MVT::i32, t1, DAG.getConstant(0x3f800000, MVT::i32)); - return DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f32, t2); + return DAG.getNode(ISD::BITCAST, dl, MVT::f32, t2); } /// GetExponent - Get the exponent: @@ -3316,13 +3316,13 @@ SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X); SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4, getF32Constant(DAG, 0x3f7f5e7e)); - SDValue TwoToFracPartOfX = DAG.getNode(ISD::BIT_CONVERT, dl,MVT::i32, t5); + SDValue TwoToFracPartOfX = DAG.getNode(ISD::BITCAST, dl,MVT::i32, t5); // Add the exponent into the result in integer domain. SDValue t6 = DAG.getNode(ISD::ADD, dl, MVT::i32, TwoToFracPartOfX, IntegerPartOfX); - result = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f32, t6); + result = DAG.getNode(ISD::BITCAST, dl, MVT::f32, t6); } else if (LimitFloatPrecision > 6 && LimitFloatPrecision <= 12) { // For floating-point precision of 12: // @@ -3342,13 +3342,13 @@ SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X); SDValue t7 = DAG.getNode(ISD::FADD, dl, MVT::f32, t6, getF32Constant(DAG, 0x3f7ff8fd)); - SDValue TwoToFracPartOfX = DAG.getNode(ISD::BIT_CONVERT, dl,MVT::i32, t7); + SDValue TwoToFracPartOfX = DAG.getNode(ISD::BITCAST, dl,MVT::i32, t7); // Add the exponent into the result in integer domain. SDValue t8 = DAG.getNode(ISD::ADD, dl, MVT::i32, TwoToFracPartOfX, IntegerPartOfX); - result = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f32, t8); + result = DAG.getNode(ISD::BITCAST, dl, MVT::f32, t8); } else { // LimitFloatPrecision > 12 && LimitFloatPrecision <= 18 // For floating-point precision of 18: // @@ -3380,14 +3380,14 @@ SDValue t12 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t11, X); SDValue t13 = DAG.getNode(ISD::FADD, dl, MVT::f32, t12, getF32Constant(DAG, 0x3f800000)); - SDValue TwoToFracPartOfX = DAG.getNode(ISD::BIT_CONVERT, dl, + SDValue TwoToFracPartOfX = DAG.getNode(ISD::BITCAST, dl, MVT::i32, t13); // Add the exponent into the result in integer domain. SDValue t14 = DAG.getNode(ISD::ADD, dl, MVT::i32, TwoToFracPartOfX, IntegerPartOfX); - result = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f32, t14); + result = DAG.getNode(ISD::BITCAST, dl, MVT::f32, t14); } } else { // No special expansion. @@ -3409,7 +3409,7 @@ if (getValue(I.getArgOperand(0)).getValueType() == MVT::f32 && LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) { SDValue Op = getValue(I.getArgOperand(0)); - SDValue Op1 = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i32, Op); + SDValue Op1 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, Op); // Scale the exponent by log(2) [0.69314718f]. SDValue Exp = GetExponent(DAG, Op1, TLI, dl); @@ -3519,7 +3519,7 @@ if (getValue(I.getArgOperand(0)).getValueType() == MVT::f32 && LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) { SDValue Op = getValue(I.getArgOperand(0)); - SDValue Op1 = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i32, Op); + SDValue Op1 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, Op); // Get the exponent. SDValue LogOfExponent = GetExponent(DAG, Op1, TLI, dl); @@ -3628,7 +3628,7 @@ if (getValue(I.getArgOperand(0)).getValueType() == MVT::f32 && LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) { SDValue Op = getValue(I.getArgOperand(0)); - SDValue Op1 = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i32, Op); + SDValue Op1 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, Op); // Scale the exponent by log10(2) [0.30102999f]. SDValue Exp = GetExponent(DAG, Op1, TLI, dl); @@ -3756,11 +3756,11 @@ SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X); SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4, getF32Constant(DAG, 0x3f7f5e7e)); - SDValue t6 = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i32, t5); + SDValue t6 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, t5); SDValue TwoToFractionalPartOfX = DAG.getNode(ISD::ADD, dl, MVT::i32, t6, IntegerPartOfX); - result = DAG.getNode(ISD::BIT_CONVERT, dl, + result = DAG.getNode(ISD::BITCAST, dl, MVT::f32, TwoToFractionalPartOfX); } else if (LimitFloatPrecision > 6 && LimitFloatPrecision <= 12) { // For floating-point precision of 12: @@ -3781,11 +3781,11 @@ SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X); SDValue t7 = DAG.getNode(ISD::FADD, dl, MVT::f32, t6, getF32Constant(DAG, 0x3f7ff8fd)); - SDValue t8 = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i32, t7); + SDValue t8 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, t7); SDValue TwoToFractionalPartOfX = DAG.getNode(ISD::ADD, dl, MVT::i32, t8, IntegerPartOfX); - result = DAG.getNode(ISD::BIT_CONVERT, dl, + result = DAG.getNode(ISD::BITCAST, dl, MVT::f32, TwoToFractionalPartOfX); } else { // LimitFloatPrecision > 12 && LimitFloatPrecision <= 18 // For floating-point precision of 18: @@ -3817,11 +3817,11 @@ SDValue t12 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t11, X); SDValue t13 = DAG.getNode(ISD::FADD, dl, MVT::f32, t12, getF32Constant(DAG, 0x3f800000)); - SDValue t14 = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i32, t13); + SDValue t14 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, t13); SDValue TwoToFractionalPartOfX = DAG.getNode(ISD::ADD, dl, MVT::i32, t14, IntegerPartOfX); - result = DAG.getNode(ISD::BIT_CONVERT, dl, + result = DAG.getNode(ISD::BITCAST, dl, MVT::f32, TwoToFractionalPartOfX); } } else { @@ -3889,11 +3889,11 @@ SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X); SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4, getF32Constant(DAG, 0x3f7f5e7e)); - SDValue t6 = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i32, t5); + SDValue t6 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, t5); SDValue TwoToFractionalPartOfX = DAG.getNode(ISD::ADD, dl, MVT::i32, t6, IntegerPartOfX); - result = DAG.getNode(ISD::BIT_CONVERT, dl, + result = DAG.getNode(ISD::BITCAST, dl, MVT::f32, TwoToFractionalPartOfX); } else if (LimitFloatPrecision > 6 && LimitFloatPrecision <= 12) { // For floating-point precision of 12: @@ -3914,11 +3914,11 @@ SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X); SDValue t7 = DAG.getNode(ISD::FADD, dl, MVT::f32, t6, getF32Constant(DAG, 0x3f7ff8fd)); - SDValue t8 = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i32, t7); + SDValue t8 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, t7); SDValue TwoToFractionalPartOfX = DAG.getNode(ISD::ADD, dl, MVT::i32, t8, IntegerPartOfX); - result = DAG.getNode(ISD::BIT_CONVERT, dl, + result = DAG.getNode(ISD::BITCAST, dl, MVT::f32, TwoToFractionalPartOfX); } else { // LimitFloatPrecision > 12 && LimitFloatPrecision <= 18 // For floating-point precision of 18: @@ -3950,11 +3950,11 @@ SDValue t12 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t11, X); SDValue t13 = DAG.getNode(ISD::FADD, dl, MVT::f32, t12, getF32Constant(DAG, 0x3f800000)); - SDValue t14 = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i32, t13); + SDValue t14 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, t13); SDValue TwoToFractionalPartOfX = DAG.getNode(ISD::ADD, dl, MVT::i32, t14, IntegerPartOfX); - result = DAG.getNode(ISD::BIT_CONVERT, dl, + result = DAG.getNode(ISD::BITCAST, dl, MVT::f32, TwoToFractionalPartOfX); } } else { @@ -4072,11 +4072,11 @@ if (VMI != FuncInfo.ValueMap.end()) Reg = VMI->second; } - + if (!Reg && N.getNode()) { // Check if frame index is available. if (LoadSDNode *LNode = dyn_cast(N.getNode())) - if (FrameIndexSDNode *FINode = + if (FrameIndexSDNode *FINode = dyn_cast(LNode->getBasePtr().getNode())) { Reg = TRI->getFrameRegister(MF); Offset = FINode->getIndex(); @@ -4476,7 +4476,7 @@ ShOps[1] = DAG.getConstant(0, MVT::i32); ShAmt = DAG.getNode(ISD::BUILD_VECTOR, dl, ShAmtVT, &ShOps[0], 2); EVT DestVT = TLI.getValueType(I.getType()); - ShAmt = DAG.getNode(ISD::BIT_CONVERT, dl, DestVT, ShAmt); + ShAmt = DAG.getNode(ISD::BITCAST, dl, DestVT, ShAmt); Res = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, DestVT, DAG.getConstant(NewIntrinsic, MVT::i32), getValue(I.getArgOperand(0)), ShAmt); @@ -4713,7 +4713,7 @@ Ops[3] = getValue(I.getArgOperand(2)); DAG.setRoot(DAG.getMemIntrinsicNode(ISD::PREFETCH, dl, DAG.getVTList(MVT::Other), - &Ops[0], 4, + &Ops[0], 4, EVT::getIntegerVT(*Context, 8), MachinePointerInfo(I.getArgOperand(0)), 0, /* align */ @@ -5119,7 +5119,7 @@ !MMI.callsExternalVAFunctionWithFloatingPointArguments()) { for (unsigned i = 0, e = I.getNumArgOperands(); i != e; ++i) { const Type* T = I.getArgOperand(i)->getType(); - for (po_iterator i = po_begin(T), e = po_end(T); + for (po_iterator i = po_begin(T), e = po_end(T); i != e; ++i) { if (!i->isFloatingPointTy()) continue; MMI.setCallsExternalVAFunctionWithFloatingPointArguments(true); @@ -5419,7 +5419,7 @@ // vector types). EVT RegVT = *PhysReg.second->vt_begin(); if (RegVT.getSizeInBits() == OpInfo.ConstraintVT.getSizeInBits()) { - OpInfo.CallOperand = DAG.getNode(ISD::BIT_CONVERT, getCurDebugLoc(), + OpInfo.CallOperand = DAG.getNode(ISD::BITCAST, getCurDebugLoc(), RegVT, OpInfo.CallOperand); OpInfo.ConstraintVT = RegVT; } else if (RegVT.isInteger() && OpInfo.ConstraintVT.isFloatingPoint()) { @@ -5429,7 +5429,7 @@ // machine. RegVT = EVT::getIntegerVT(Context, OpInfo.ConstraintVT.getSizeInBits()); - OpInfo.CallOperand = DAG.getNode(ISD::BIT_CONVERT, getCurDebugLoc(), + OpInfo.CallOperand = DAG.getNode(ISD::BITCAST, getCurDebugLoc(), RegVT, OpInfo.CallOperand); OpInfo.ConstraintVT = RegVT; } @@ -5945,7 +5945,7 @@ // not have the same VT as was expected. Convert it to the right type // with bit_convert. if (ResultType != Val.getValueType() && Val.getValueType().isVector()) { - Val = DAG.getNode(ISD::BIT_CONVERT, getCurDebugLoc(), + Val = DAG.getNode(ISD::BITCAST, getCurDebugLoc(), ResultType, Val); } else if (ResultType != Val.getValueType() && Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=119990&r1=119989&r2=119990&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Mon Nov 22 21:31:01 2010 @@ -530,7 +530,7 @@ setIndexedLoadAction(IM, (MVT::SimpleValueType)VT, Expand); setIndexedStoreAction(IM, (MVT::SimpleValueType)VT, Expand); } - + // These operations default to expand. setOperationAction(ISD::FGETSIGN, (MVT::SimpleValueType)VT, Expand); setOperationAction(ISD::CONCAT_VECTORS, (MVT::SimpleValueType)VT, Expand); @@ -538,8 +538,8 @@ // Most targets ignore the @llvm.prefetch intrinsic. setOperationAction(ISD::PREFETCH, MVT::Other, Expand); - - // ConstantFP nodes default to expand. Targets can either change this to + + // ConstantFP nodes default to expand. Targets can either change this to // Legal, in which case all fp constants are legal, or use isFPImmLegal() // to optimize expansions for certain constants. setOperationAction(ISD::ConstantFP, MVT::f32, Expand); @@ -560,7 +560,7 @@ // Default ISD::TRAP to expand (which turns it into abort). setOperationAction(ISD::TRAP, MVT::Other, Expand); - + IsLittleEndian = TD->isLittleEndian(); ShiftAmountTy = PointerTy = MVT::getIntegerVT(8*TD->getPointerSize()); memset(RegClassForVT, 0,MVT::LAST_VALUETYPE*sizeof(TargetRegisterClass*)); @@ -617,16 +617,16 @@ // Figure out the right, legal destination reg to copy into. unsigned NumElts = VT.getVectorNumElements(); MVT EltTy = VT.getVectorElementType(); - + unsigned NumVectorRegs = 1; - - // FIXME: We don't support non-power-of-2-sized vectors for now. Ideally we + + // FIXME: We don't support non-power-of-2-sized vectors for now. Ideally we // could break down into LHS/RHS like LegalizeDAG does. if (!isPowerOf2_32(NumElts)) { NumVectorRegs = NumElts; NumElts = 1; } - + // Divide the input until we get to a supported size. This will always // end with a scalar if the target doesn't support vectors. while (NumElts > 1 && !TLI->isTypeLegal(MVT::getVectorVT(EltTy, NumElts))) { @@ -635,7 +635,7 @@ } NumIntermediates = NumVectorRegs; - + MVT NewVT = MVT::getVectorVT(EltTy, NumElts); if (!TLI->isTypeLegal(NewVT)) NewVT = EltTy; @@ -645,7 +645,7 @@ RegisterVT = DestVT; if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16. return NumVectorRegs*(NewVT.getSizeInBits()/DestVT.getSizeInBits()); - + // Otherwise, promotion or legal types use the same number of registers as // the vector decimated to the appropriate level. return NumVectorRegs; @@ -750,7 +750,7 @@ RegisterTypeForVT[MVT::ppcf128] = MVT::f64; TransformToType[MVT::ppcf128] = MVT::f64; ValueTypeActions.setTypeAction(MVT::ppcf128, Expand); - } + } // Decide how to handle f64. If the target does not have native f64 support, // expand it to i64 and we will be generating soft float library calls. @@ -776,13 +776,13 @@ ValueTypeActions.setTypeAction(MVT::f32, Expand); } } - + // Loop over all of the vector value types to see which need transformations. for (unsigned i = MVT::FIRST_VECTOR_VALUETYPE; i <= (unsigned)MVT::LAST_VECTOR_VALUETYPE; ++i) { MVT VT = (MVT::SimpleValueType)i; if (isTypeLegal(VT)) continue; - + // Determine if there is a legal wider type. If so, we should promote to // that wider vector type. EVT EltVT = VT.getVectorElementType(); @@ -792,7 +792,7 @@ for (unsigned nVT = i+1; nVT <= MVT::LAST_VECTOR_VALUETYPE; ++nVT) { EVT SVT = (MVT::SimpleValueType)nVT; if (SVT.getVectorElementType() == EltVT && - SVT.getVectorNumElements() > NElts && + SVT.getVectorNumElements() > NElts && isTypeLegal(SVT)) { TransformToType[i] = SVT; RegisterTypeForVT[i] = SVT; @@ -804,7 +804,7 @@ } if (IsLegalWiderType) continue; } - + MVT IntermediateVT; EVT RegisterVT; unsigned NumIntermediates; @@ -812,7 +812,7 @@ getVectorTypeBreakdownMVT(VT, IntermediateVT, NumIntermediates, RegisterVT, this); RegisterTypeForVT[i] = RegisterVT; - + EVT NVT = VT.getPow2VectorType(); if (NVT == VT) { // Type is already a power of 2. The default action is to split. @@ -865,7 +865,7 @@ unsigned &NumIntermediates, EVT &RegisterVT) const { unsigned NumElts = VT.getVectorNumElements(); - + // If there is a wider vector type with the same element type as this one, // we should widen to that legal vector type. This handles things like // <2 x float> -> <4 x float>. @@ -877,19 +877,19 @@ return 1; } } - + // Figure out the right, legal destination reg to copy into. EVT EltTy = VT.getVectorElementType(); - + unsigned NumVectorRegs = 1; - - // FIXME: We don't support non-power-of-2-sized vectors for now. Ideally we + + // FIXME: We don't support non-power-of-2-sized vectors for now. Ideally we // could break down into LHS/RHS like LegalizeDAG does. if (!isPowerOf2_32(NumElts)) { NumVectorRegs = NumElts; NumElts = 1; } - + // Divide the input until we get to a supported size. This will always // end with a scalar if the target doesn't support vectors. while (NumElts > 1 && !isTypeLegal( @@ -899,7 +899,7 @@ } NumIntermediates = NumVectorRegs; - + EVT NewVT = EVT::getVectorVT(Context, EltTy, NumElts); if (!isTypeLegal(NewVT)) NewVT = EltTy; @@ -909,13 +909,13 @@ RegisterVT = DestVT; if (DestVT.bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16. return NumVectorRegs*(NewVT.getSizeInBits()/DestVT.getSizeInBits()); - + // Otherwise, promotion or legal types use the same number of registers as // the vector decimated to the appropriate level. return NumVectorRegs; } -/// Get the EVTs and ArgFlags collections that represent the legalized return +/// Get the EVTs and ArgFlags collections that represent the legalized return /// type of the given function. This does not require a DAG or a return value, /// and is suitable for use before any DAGs for the function are constructed. /// TODO: Move this out of TargetLowering.cpp. @@ -988,11 +988,11 @@ // In non-pic modes, just use the address of a block. if (getTargetMachine().getRelocationModel() != Reloc::PIC_) return MachineJumpTableInfo::EK_BlockAddress; - + // In PIC mode, if the target supports a GPRel32 directive, use it. if (getTargetMachine().getMCAsmInfo()->getGPRel32Directive() != 0) return MachineJumpTableInfo::EK_GPRel32BlockAddress; - + // Otherwise, use a label difference. return MachineJumpTableInfo::EK_LabelDifference32; } @@ -1036,11 +1036,11 @@ // Optimization Methods //===----------------------------------------------------------------------===// -/// ShrinkDemandedConstant - Check to see if the specified operand of the +/// ShrinkDemandedConstant - Check to see if the specified operand of the /// specified instruction is a constant integer. If so, check to see if there /// are any bits set in the constant that are not demanded. If so, shrink the /// constant and return true. -bool TargetLowering::TargetLoweringOpt::ShrinkDemandedConstant(SDValue Op, +bool TargetLowering::TargetLoweringOpt::ShrinkDemandedConstant(SDValue Op, const APInt &Demanded) { DebugLoc dl = Op.getDebugLoc(); @@ -1062,7 +1062,7 @@ EVT VT = Op.getValueType(); SDValue New = DAG.getNode(Op.getOpcode(), dl, VT, Op.getOperand(0), DAG.getConstant(Demanded & - C->getAPIntValue(), + C->getAPIntValue(), VT)); return CombineTo(Op, New); } @@ -1139,9 +1139,9 @@ KnownZero = KnownOne = APInt(BitWidth, 0); // Other users may use these bits. - if (!Op.getNode()->hasOneUse()) { + if (!Op.getNode()->hasOneUse()) { if (Depth != 0) { - // If not at the root, Just compute the KnownZero/KnownOne bits to + // If not at the root, Just compute the KnownZero/KnownOne bits to // simplify things downstream. TLO.DAG.ComputeMaskedBits(Op, DemandedMask, KnownZero, KnownOne, Depth); return false; @@ -1149,7 +1149,7 @@ // If this is the root being simplified, allow it to have multiple uses, // just set the NewMask to all bits. NewMask = APInt::getAllOnesValue(BitWidth); - } else if (DemandedMask == 0) { + } else if (DemandedMask == 0) { // Not demanding any bits from Op. if (Op.getOpcode() != ISD::UNDEF) return TLO.CombineTo(Op, TLO.DAG.getUNDEF(Op.getValueType())); @@ -1182,16 +1182,16 @@ if (TLO.ShrinkDemandedConstant(Op, ~LHSZero & NewMask)) return true; } - + if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero, KnownOne, TLO, Depth+1)) return true; - assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); + assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); if (SimplifyDemandedBits(Op.getOperand(0), ~KnownZero & NewMask, KnownZero2, KnownOne2, TLO, Depth+1)) return true; - assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); - + assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); + // If all of the demanded bits are known one on one side, return the other. // These bits cannot contribute to the result of the 'and'. if ((NewMask & ~KnownZero2 & KnownOne) == (~KnownZero2 & NewMask)) @@ -1214,15 +1214,15 @@ KnownZero |= KnownZero2; break; case ISD::OR: - if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero, + if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero, KnownOne, TLO, Depth+1)) return true; - assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); + assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); if (SimplifyDemandedBits(Op.getOperand(0), ~KnownOne & NewMask, KnownZero2, KnownOne2, TLO, Depth+1)) return true; - assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); - + assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); + // If all of the demanded bits are known zero on one side, return the other. // These bits cannot contribute to the result of the 'or'. if ((NewMask & ~KnownOne2 & KnownZero) == (~KnownOne2 & NewMask)) @@ -1248,15 +1248,15 @@ KnownOne |= KnownOne2; break; case ISD::XOR: - if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero, + if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero, KnownOne, TLO, Depth+1)) return true; - assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); + assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); if (SimplifyDemandedBits(Op.getOperand(0), NewMask, KnownZero2, KnownOne2, TLO, Depth+1)) return true; - assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); - + assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); + // If all of the demanded bits are known zero on one side, return the other. // These bits cannot contribute to the result of the 'xor'. if ((KnownZero & NewMask) == NewMask) @@ -1274,12 +1274,12 @@ return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::OR, dl, Op.getValueType(), Op.getOperand(0), Op.getOperand(1))); - + // Output known-0 bits are known if clear or set in both the LHS & RHS. KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); // Output known-1 are known to be set if set in only one of the LHS, RHS. KnownOneOut = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); - + // If all of the demanded bits on one side are known, and all of the set // bits on that side are also known to be set on the other side, turn this // into an AND, as we know the bits will be cleared. @@ -1288,11 +1288,11 @@ if ((KnownOne & KnownOne2) == KnownOne) { EVT VT = Op.getValueType(); SDValue ANDC = TLO.DAG.getConstant(~KnownOne & NewMask, VT); - return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::AND, dl, VT, + return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::AND, dl, VT, Op.getOperand(0), ANDC)); } } - + // If the RHS is a constant, see if we can simplify it. // for XOR, we prefer to force bits to 1 if they will make a -1. // if we can't force bits, try to shrink constant @@ -1317,37 +1317,37 @@ KnownOne = KnownOneOut; break; case ISD::SELECT: - if (SimplifyDemandedBits(Op.getOperand(2), NewMask, KnownZero, + if (SimplifyDemandedBits(Op.getOperand(2), NewMask, KnownZero, KnownOne, TLO, Depth+1)) return true; if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero2, KnownOne2, TLO, Depth+1)) return true; - assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); - assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); - + assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); + assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); + // If the operands are constants, see if we can simplify them. if (TLO.ShrinkDemandedConstant(Op, NewMask)) return true; - + // Only known if known in both the LHS and RHS. KnownOne &= KnownOne2; KnownZero &= KnownZero2; break; case ISD::SELECT_CC: - if (SimplifyDemandedBits(Op.getOperand(3), NewMask, KnownZero, + if (SimplifyDemandedBits(Op.getOperand(3), NewMask, KnownZero, KnownOne, TLO, Depth+1)) return true; if (SimplifyDemandedBits(Op.getOperand(2), NewMask, KnownZero2, KnownOne2, TLO, Depth+1)) return true; - assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); - assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); - + assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); + assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); + // If the operands are constants, see if we can simplify them. if (TLO.ShrinkDemandedConstant(Op, NewMask)) return true; - + // Only known if known in both the LHS and RHS. KnownOne &= KnownOne2; KnownZero &= KnownZero2; @@ -1373,16 +1373,16 @@ if (Diff < 0) { Diff = -Diff; Opc = ISD::SRL; - } - - SDValue NewSA = + } + + SDValue NewSA = TLO.DAG.getConstant(Diff, Op.getOperand(1).getValueType()); EVT VT = Op.getValueType(); return TLO.CombineTo(Op, TLO.DAG.getNode(Opc, dl, VT, InOp.getOperand(0), NewSA)); } - } - + } + if (SimplifyDemandedBits(InOp, NewMask.lshr(ShAmt), KnownZero, KnownOne, TLO, Depth+1)) return true; @@ -1421,7 +1421,7 @@ unsigned ShAmt = SA->getZExtValue(); unsigned VTSize = VT.getSizeInBits(); SDValue InOp = Op.getOperand(0); - + // If the shift count is an invalid immediate, don't do anything. if (ShAmt >= BitWidth) break; @@ -1438,20 +1438,20 @@ if (Diff < 0) { Diff = -Diff; Opc = ISD::SHL; - } - + } + SDValue NewSA = TLO.DAG.getConstant(Diff, Op.getOperand(1).getValueType()); return TLO.CombineTo(Op, TLO.DAG.getNode(Opc, dl, VT, InOp.getOperand(0), NewSA)); } - } - + } + // Compute the new bits that are at the top now. if (SimplifyDemandedBits(InOp, (NewMask << ShAmt), KnownZero, KnownOne, TLO, Depth+1)) return true; - assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); + assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); KnownZero = KnownZero.lshr(ShAmt); KnownOne = KnownOne.lshr(ShAmt); @@ -1472,7 +1472,7 @@ if (ConstantSDNode *SA = dyn_cast(Op.getOperand(1))) { EVT VT = Op.getValueType(); unsigned ShAmt = SA->getZExtValue(); - + // If the shift count is an invalid immediate, don't do anything. if (ShAmt >= BitWidth) break; @@ -1484,21 +1484,21 @@ APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt); if (HighBits.intersects(NewMask)) InDemandedMask |= APInt::getSignBit(VT.getScalarType().getSizeInBits()); - + if (SimplifyDemandedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, TLO, Depth+1)) return true; - assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); + assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); KnownZero = KnownZero.lshr(ShAmt); KnownOne = KnownOne.lshr(ShAmt); - + // Handle the sign bit, adjusted to where it is now in the mask. APInt SignBit = APInt::getSignBit(BitWidth).lshr(ShAmt); - + // If the input sign bit is known to be zero, or if none of the top bits // are demanded, turn this into an unsigned shift right. if (KnownZero.intersects(SignBit) || (HighBits & ~NewMask) == HighBits) { - return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SRL, dl, VT, + return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SRL, dl, VT, Op.getOperand(0), Op.getOperand(1))); } else if (KnownOne.intersects(SignBit)) { // New bits are known one. @@ -1509,12 +1509,12 @@ case ISD::SIGN_EXTEND_INREG: { EVT EVT = cast(Op.getOperand(1))->getVT(); - // Sign extension. Compute the demanded bits in the result that are not + // Sign extension. Compute the demanded bits in the result that are not // present in the input. APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EVT.getScalarType().getSizeInBits()); - + // If none of the extended bits are demanded, eliminate the sextinreg. if ((NewBits & NewMask) == 0) return TLO.CombineTo(Op, Op.getOperand(0)); @@ -1525,7 +1525,7 @@ APInt::getLowBitsSet(BitWidth, EVT.getScalarType().getSizeInBits()) & NewMask; - + // Since the sign extended bits are demanded, we know that the sign // bit is demanded. InputDemandedBits |= InSignBit; @@ -1533,16 +1533,16 @@ if (SimplifyDemandedBits(Op.getOperand(0), InputDemandedBits, KnownZero, KnownOne, TLO, Depth+1)) return true; - assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); + assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); // If the sign bit of the input is known set or clear, then we know the // top bits of the result. - + // If the input sign bit is known zero, convert this into a zero extension. if (KnownZero.intersects(InSignBit)) - return TLO.CombineTo(Op, + return TLO.CombineTo(Op, TLO.DAG.getZeroExtendInReg(Op.getOperand(0),dl,EVT)); - + if (KnownOne.intersects(InSignBit)) { // Input sign bit known set KnownOne |= NewBits; KnownZero &= ~NewBits; @@ -1557,19 +1557,19 @@ Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); APInt InMask = NewMask; InMask.trunc(OperandBitWidth); - + // If none of the top bits are demanded, convert this into an any_extend. APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - OperandBitWidth) & NewMask; if (!NewBits.intersects(NewMask)) return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::ANY_EXTEND, dl, - Op.getValueType(), + Op.getValueType(), Op.getOperand(0))); - + if (SimplifyDemandedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, TLO, Depth+1)) return true; - assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); + assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); KnownZero.zext(BitWidth); KnownOne.zext(BitWidth); KnownZero |= NewBits; @@ -1581,31 +1581,31 @@ APInt InMask = APInt::getLowBitsSet(BitWidth, InBits); APInt InSignBit = APInt::getBitsSet(BitWidth, InBits - 1, InBits); APInt NewBits = ~InMask & NewMask; - + // If none of the top bits are demanded, convert this into an any_extend. if (NewBits == 0) return TLO.CombineTo(Op,TLO.DAG.getNode(ISD::ANY_EXTEND, dl, Op.getValueType(), Op.getOperand(0))); - + // Since some of the sign extended bits are demanded, we know that the sign // bit is demanded. APInt InDemandedBits = InMask & NewMask; InDemandedBits |= InSignBit; InDemandedBits.trunc(InBits); - - if (SimplifyDemandedBits(Op.getOperand(0), InDemandedBits, KnownZero, + + if (SimplifyDemandedBits(Op.getOperand(0), InDemandedBits, KnownZero, KnownOne, TLO, Depth+1)) return true; KnownZero.zext(BitWidth); KnownOne.zext(BitWidth); - + // If the sign bit is known zero, convert this to a zero extend. if (KnownZero.intersects(InSignBit)) return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::ZERO_EXTEND, dl, - Op.getValueType(), + Op.getValueType(), Op.getOperand(0))); - + // If the sign bit is known one, the top bits match. if (KnownOne.intersects(InSignBit)) { KnownOne |= NewBits; @@ -1624,7 +1624,7 @@ if (SimplifyDemandedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, TLO, Depth+1)) return true; - assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); + assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); KnownZero.zext(BitWidth); KnownOne.zext(BitWidth); break; @@ -1641,7 +1641,7 @@ return true; KnownZero.trunc(BitWidth); KnownOne.trunc(BitWidth); - + // If the input is only used by this truncate, see if we can shrink it based // on the known demanded bits. if (Op.getOperand(0).getNode()->hasOneUse()) { @@ -1668,18 +1668,18 @@ // None of the shifted in bits are needed. Add a truncate of the // shift input, then shift it. SDValue NewTrunc = TLO.DAG.getNode(ISD::TRUNCATE, dl, - Op.getValueType(), + Op.getValueType(), In.getOperand(0)); return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SRL, dl, Op.getValueType(), - NewTrunc, + NewTrunc, In.getOperand(1))); } break; } } - - assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); + + assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); break; } case ISD::AssertZext: { @@ -1689,7 +1689,7 @@ if (SimplifyDemandedBits(Op.getOperand(0), NewMask, KnownZero, KnownOne, TLO, Depth+1)) return true; - assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); + assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); EVT VT = cast(Op.getOperand(1))->getVT(); APInt InMask = APInt::getLowBitsSet(BitWidth, @@ -1697,7 +1697,7 @@ KnownZero |= ~InMask & NewMask; break; } - case ISD::BIT_CONVERT: + case ISD::BITCAST: #if 0 // If this is an FP->Int bitcast and if the sign bit is the only thing that // is demanded, turn this into a FGETSIGN. @@ -1709,7 +1709,7 @@ isOperationLegal(ISD::FGETSIGN, Op.getValueType())) { // Make a FGETSIGN + SHL to move the sign bit into the appropriate // place. We expect the SHL to be eliminated by other optimizations. - SDValue Sign = TLO.DAG.getNode(ISD::FGETSIGN, Op.getValueType(), + SDValue Sign = TLO.DAG.getNode(ISD::FGETSIGN, Op.getValueType(), Op.getOperand(0)); unsigned ShVal = Op.getValueType().getSizeInBits()-1; SDValue ShAmt = TLO.DAG.getConstant(ShVal, getShiftAmountTy()); @@ -1742,21 +1742,21 @@ TLO.DAG.ComputeMaskedBits(Op, NewMask, KnownZero, KnownOne, Depth); break; } - + // If we know the value of all of the demanded bits, return this as a // constant. if ((NewMask & (KnownZero|KnownOne)) == NewMask) return TLO.CombineTo(Op, TLO.DAG.getConstant(KnownOne, Op.getValueType())); - + return false; } -/// computeMaskedBitsForTargetNode - Determine which of the bits specified -/// in Mask are known to be either zero or one and return them in the +/// computeMaskedBitsForTargetNode - Determine which of the bits specified +/// in Mask are known to be either zero or one and return them in the /// KnownZero/KnownOne bitsets. -void TargetLowering::computeMaskedBitsForTargetNode(const SDValue Op, +void TargetLowering::computeMaskedBitsForTargetNode(const SDValue Op, const APInt &Mask, - APInt &KnownZero, + APInt &KnownZero, APInt &KnownOne, const SelectionDAG &DAG, unsigned Depth) const { @@ -1817,7 +1817,7 @@ (KnownOne.countPopulation() == 1); } -/// SimplifySetCC - Try to simplify a setcc built with the specified operands +/// SimplifySetCC - Try to simplify a setcc built with the specified operands /// and cc. If it is unable to simplify it, return a null SDValue. SDValue TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1, @@ -1884,7 +1884,7 @@ if (!Lod->isVolatile() && Lod->isUnindexed()) { unsigned origWidth = N0.getValueType().getSizeInBits(); unsigned maskWidth = origWidth; - // We can narrow (e.g.) 16-bit extending loads on 32-bit target to + // We can narrow (e.g.) 16-bit extending loads on 32-bit target to // 8 bits, but have to be careful... if (Lod->getExtensionType() != ISD::NON_EXTLOAD) origWidth = Lod->getMemoryVT().getSizeInBits(); @@ -1918,7 +1918,7 @@ SDValue NewLoad = DAG.getLoad(newVT, dl, Lod->getChain(), Ptr, Lod->getPointerInfo().getWithOffset(bestOffset), false, false, NewAlign); - return DAG.getSetCC(dl, VT, + return DAG.getSetCC(dl, VT, DAG.getNode(ISD::AND, dl, newVT, NewLoad, DAG.getConstant(bestMask.trunc(bestWidth), newVT)), @@ -1986,7 +1986,7 @@ // the sign extension, it is impossible for both sides to be equal. if (C1.getMinSignedBits() > ExtSrcTyBits) return DAG.getConstant(Cond == ISD::SETNE, VT); - + SDValue ZextOp; EVT Op0Ty = N0.getOperand(0).getValueType(); if (Op0Ty == ExtSrcTy) { @@ -1999,10 +1999,10 @@ if (!DCI.isCalledByLegalizer()) DCI.AddToWorklist(ZextOp.getNode()); // Otherwise, make this a use of a zext. - return DAG.getSetCC(dl, VT, ZextOp, + return DAG.getSetCC(dl, VT, ZextOp, DAG.getConstant(C1 & APInt::getLowBitsSet( ExtDstTyBits, - ExtSrcTyBits), + ExtSrcTyBits), ExtDstTy), Cond); } else if ((N1C->isNullValue() || N1C->getAPIntValue() == 1) && @@ -2012,16 +2012,16 @@ isTypeLegal(VT) && VT.bitsLE(N0.getValueType())) { bool TrueWhenTrue = (Cond == ISD::SETEQ) ^ (N1C->getAPIntValue() != 1); if (TrueWhenTrue) - return DAG.getNode(ISD::TRUNCATE, dl, VT, N0); + return DAG.getNode(ISD::TRUNCATE, dl, VT, N0); // Invert the condition. ISD::CondCode CC = cast(N0.getOperand(2))->get(); - CC = ISD::getSetCCInverse(CC, + CC = ISD::getSetCCInverse(CC, N0.getOperand(0).getValueType().isInteger()); return DAG.getSetCC(dl, VT, N0.getOperand(0), N0.getOperand(1), CC); } if ((N0.getOpcode() == ISD::XOR || - (N0.getOpcode() == ISD::AND && + (N0.getOpcode() == ISD::AND && N0.getOperand(0).getOpcode() == ISD::XOR && N0.getOperand(1) == N0.getOperand(0).getOperand(1))) && isa(N0.getOperand(1)) && @@ -2037,7 +2037,7 @@ if (N0.getOpcode() == ISD::XOR) Val = N0.getOperand(0); else { - assert(N0.getOpcode() == ISD::AND && + assert(N0.getOpcode() == ISD::AND && N0.getOperand(0).getOpcode() == ISD::XOR); // ((X^1)&1)^1 -> X & 1 Val = DAG.getNode(ISD::AND, dl, N0.getValueType(), @@ -2081,7 +2081,7 @@ } } } - + APInt MinVal, MaxVal; unsigned OperandBitSize = N1C->getValueType(0).getSizeInBits(); if (ISD::isSignedIntSetCC(Cond)) { @@ -2096,7 +2096,7 @@ if (Cond == ISD::SETGE || Cond == ISD::SETUGE) { if (C1 == MinVal) return DAG.getConstant(1, VT); // X >= MIN --> true // X >= C0 --> X > (C0-1) - return DAG.getSetCC(dl, VT, N0, + return DAG.getSetCC(dl, VT, N0, DAG.getConstant(C1-1, N1.getValueType()), (Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT); } @@ -2104,7 +2104,7 @@ if (Cond == ISD::SETLE || Cond == ISD::SETULE) { if (C1 == MaxVal) return DAG.getConstant(1, VT); // X <= MAX --> true // X <= C0 --> X < (C0+1) - return DAG.getSetCC(dl, VT, N0, + return DAG.getSetCC(dl, VT, N0, DAG.getConstant(C1+1, N1.getValueType()), (Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT); } @@ -2127,12 +2127,12 @@ // If we have setult X, 1, turn it into seteq X, 0 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C1 == MinVal+1) - return DAG.getSetCC(dl, VT, N0, - DAG.getConstant(MinVal, N0.getValueType()), + return DAG.getSetCC(dl, VT, N0, + DAG.getConstant(MinVal, N0.getValueType()), ISD::SETEQ); // If we have setugt X, Max-1, turn it into seteq X, Max else if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C1 == MaxVal-1) - return DAG.getSetCC(dl, VT, N0, + return DAG.getSetCC(dl, VT, N0, DAG.getConstant(MaxVal, N0.getValueType()), ISD::SETEQ); @@ -2140,9 +2140,9 @@ // by changing cc. // SETUGT X, SINTMAX -> SETLT X, 0 - if (Cond == ISD::SETUGT && + if (Cond == ISD::SETUGT && C1 == APInt::getSignedMaxValue(OperandBitSize)) - return DAG.getSetCC(dl, VT, N0, + return DAG.getSetCC(dl, VT, N0, DAG.getConstant(0, N1.getValueType()), ISD::SETLT); @@ -2202,7 +2202,7 @@ return DAG.getUNDEF(VT); } } - + // Otherwise, we know the RHS is not a NaN. Simplify the node to drop the // constant if knowing that the operand is non-nan is enough. We prefer to // have SETO(x,x) instead of SETO(x, 0.0) because this avoids having to @@ -2277,14 +2277,14 @@ if (DAG.isCommutativeBinOp(N0.getOpcode())) { // If X op Y == Y op X, try other combinations. if (N0.getOperand(0) == N1.getOperand(1)) - return DAG.getSetCC(dl, VT, N0.getOperand(1), N1.getOperand(0), + return DAG.getSetCC(dl, VT, N0.getOperand(1), N1.getOperand(0), Cond); if (N0.getOperand(1) == N1.getOperand(0)) - return DAG.getSetCC(dl, VT, N0.getOperand(0), N1.getOperand(1), + return DAG.getSetCC(dl, VT, N0.getOperand(0), N1.getOperand(1), Cond); } } - + if (ConstantSDNode *RHSC = dyn_cast(N1)) { if (ConstantSDNode *LHSR = dyn_cast(N0.getOperand(1))) { // Turn (X+C1) == C2 --> X == C2-C1 @@ -2294,7 +2294,7 @@ LHSR->getAPIntValue(), N0.getValueType()), Cond); } - + // Turn (X^C1) == C2 into X == C1^C2 iff X&~C1 = 0. if (N0.getOpcode() == ISD::XOR) // If we know that all of the inverted bits are zero, don't bother @@ -2307,7 +2307,7 @@ N0.getValueType()), Cond); } - + // Turn (C1-X) == C2 --> X == C1-C2 if (ConstantSDNode *SUBC = dyn_cast(N0.getOperand(0))) { if (N0.getOpcode() == ISD::SUB && N0.getNode()->hasOneUse()) { @@ -2318,7 +2318,7 @@ N0.getValueType()), Cond); } - } + } } // Simplify (X+Z) == X --> Z == 0 @@ -2333,7 +2333,7 @@ assert(N0.getOpcode() == ISD::SUB && "Unexpected operation!"); // (Z-X) == X --> Z == X<<1 SDValue SH = DAG.getNode(ISD::SHL, dl, N1.getValueType(), - N1, + N1, DAG.getConstant(1, getShiftAmountTy())); if (!DCI.isCalledByLegalizer()) DCI.AddToWorklist(SH.getNode()); @@ -2355,7 +2355,7 @@ } else if (N1.getNode()->hasOneUse()) { assert(N1.getOpcode() == ISD::SUB && "Unexpected operation!"); // X == (Z-X) --> X<<1 == Z - SDValue SH = DAG.getNode(ISD::SHL, dl, N1.getValueType(), N0, + SDValue SH = DAG.getNode(ISD::SHL, dl, N1.getValueType(), N0, DAG.getConstant(1, getShiftAmountTy())); if (!DCI.isCalledByLegalizer()) DCI.AddToWorklist(SH.getNode()); @@ -2514,8 +2514,8 @@ return C_Other; } } - - if (Constraint.size() > 1 && Constraint[0] == '{' && + + if (Constraint.size() > 1 && Constraint[0] == '{' && Constraint[Constraint.size()-1] == '}') return C_Register; return C_Unknown; @@ -2554,7 +2554,7 @@ // is possible and fine if either GV or C are missing. ConstantSDNode *C = dyn_cast(Op); GlobalAddressSDNode *GA = dyn_cast(Op); - + // If we have "(add GV, C)", pull out GV/C if (Op.getOpcode() == ISD::ADD) { C = dyn_cast(Op.getOperand(1)); @@ -2566,14 +2566,14 @@ if (C == 0 || GA == 0) C = 0, GA = 0; } - + // If we find a valid operand, map to the TargetXXX version so that the // value itself doesn't get selected. if (GA) { // Either &GV or &GV+C if (ConstraintLetter != 'n') { int64_t Offs = GA->getOffset(); if (C) Offs += C->getZExtValue(); - Ops.push_back(DAG.getTargetGlobalAddress(GA->getGlobal(), + Ops.push_back(DAG.getTargetGlobalAddress(GA->getGlobal(), C ? C->getDebugLoc() : DebugLoc(), Op.getValueType(), Offs)); return; @@ -2617,8 +2617,8 @@ for (TargetRegisterInfo::regclass_iterator RCI = RI->regclass_begin(), E = RI->regclass_end(); RCI != E; ++RCI) { const TargetRegisterClass *RC = *RCI; - - // If none of the value types for this register class are valid, we + + // If none of the value types for this register class are valid, we // can't use it. For example, 64-bit reg classes on 32-bit targets. bool isLegal = false; for (TargetRegisterClass::vt_iterator I = RC->vt_begin(), E = RC->vt_end(); @@ -2628,16 +2628,16 @@ break; } } - + if (!isLegal) continue; - - for (TargetRegisterClass::iterator I = RC->begin(), E = RC->end(); + + for (TargetRegisterClass::iterator I = RC->begin(), E = RC->end(); I != E; ++I) { if (RegName.equals_lower(RI->getName(*I))) return std::make_pair(*I, RC); } } - + return std::make_pair(0u, static_cast(0)); } @@ -2658,7 +2658,7 @@ return atoi(ConstraintCode.c_str()); } - + /// ParseConstraints - Split up the constraint string from the inline /// assembly value into the specific constraints and their prefixes, /// and also tie in the associated operand values. @@ -2675,7 +2675,7 @@ // ConstraintOperands list. InlineAsm::ConstraintInfoVector ConstraintInfos = IA->ParseConstraints(); - + unsigned ArgNo = 0; // ArgNo - The argument of the CallInst. unsigned ResNo = 0; // ResNo - The result number of the next output. @@ -2717,7 +2717,7 @@ // Nothing to do. break; } - + if (OpInfo.CallOperandVal) { const llvm::Type *OpTy = OpInfo.CallOperandVal->getType(); if (OpInfo.isIndirect) { @@ -2813,7 +2813,7 @@ for (unsigned cIndex = 0, eIndex = ConstraintOperands.size(); cIndex != eIndex; ++cIndex) { AsmOperandInfo& OpInfo = ConstraintOperands[cIndex]; - + // If this is an output operand with a matching input operand, look up the // matching input. If their types mismatch, e.g. one is an integer, the // other is floating point, or their sizes are different, flag it as an @@ -2978,12 +2978,12 @@ break; } } - + // Things with matching constraints can only be registers, per gcc // documentation. This mainly affects "g" constraints. if (CType == TargetLowering::C_Memory && OpInfo.hasMatchingInput()) continue; - + // This constraint letter is more general than the previous one, use it. int Generality = getConstraintGenerality(CType); if (Generality > BestGenerality) { @@ -2992,7 +2992,7 @@ BestGenerality = Generality; } } - + OpInfo.ConstraintCode = OpInfo.Codes[BestIdx]; OpInfo.ConstraintType = BestType; } @@ -3001,10 +3001,10 @@ /// type to use for the specific AsmOperandInfo, setting /// OpInfo.ConstraintCode and OpInfo.ConstraintType. void TargetLowering::ComputeConstraintToUse(AsmOperandInfo &OpInfo, - SDValue Op, + SDValue Op, SelectionDAG *DAG) const { assert(!OpInfo.Codes.empty() && "Must have at least one constraint"); - + // Single-letter constraints ('r') are very common. if (OpInfo.Codes.size() == 1) { OpInfo.ConstraintCode = OpInfo.Codes[0]; @@ -3012,7 +3012,7 @@ } else { ChooseConstraint(OpInfo, *this, Op, DAG); } - + // 'X' matches anything. if (OpInfo.ConstraintCode == "X" && OpInfo.CallOperandVal) { // Labels and constants are handled elsewhere ('X' is the only thing @@ -3023,7 +3023,7 @@ OpInfo.CallOperandVal = v; return; } - + // Otherwise, try to resolve it to something we know about by looking at // the actual operand type. if (const char *Repl = LowerXConstraint(OpInfo.ConstraintVT)) { @@ -3039,7 +3039,7 @@ /// isLegalAddressingMode - Return true if the addressing mode represented /// by AM is legal for this target, for a load/store of the specified type. -bool TargetLowering::isLegalAddressingMode(const AddrMode &AM, +bool TargetLowering::isLegalAddressingMode(const AddrMode &AM, const Type *Ty) const { // The default implementation of this implements a conservative RISCy, r+r and // r+i addr mode. @@ -3047,12 +3047,12 @@ // Allows a sign-extended 16-bit immediate field. if (AM.BaseOffs <= -(1LL << 16) || AM.BaseOffs >= (1LL << 16)-1) return false; - + // No global is ever allowed as a base. if (AM.BaseGV) return false; - - // Only support r+r, + + // Only support r+r, switch (AM.Scale) { case 0: // "r+i" or just "i", depending on HasBaseReg. break; @@ -3067,7 +3067,7 @@ // Allow 2*r as r+r. break; } - + return true; } @@ -3075,19 +3075,19 @@ /// return a DAG expression to select that will generate the same value by /// multiplying by a magic number. See: /// -SDValue TargetLowering::BuildSDIV(SDNode *N, SelectionDAG &DAG, +SDValue TargetLowering::BuildSDIV(SDNode *N, SelectionDAG &DAG, std::vector* Created) const { EVT VT = N->getValueType(0); DebugLoc dl= N->getDebugLoc(); - + // Check to see if we can do this. // FIXME: We should be more aggressive here. if (!isTypeLegal(VT)) return SDValue(); - + APInt d = cast(N->getOperand(1))->getAPIntValue(); APInt::ms magics = d.magic(); - + // Multiply the numerator (operand 0) by the magic value // FIXME: We should support doing a MUL in a wider type SDValue Q; @@ -3101,7 +3101,7 @@ else return SDValue(); // No mulhs or equvialent // If d > 0 and m < 0, add the numerator - if (d.isStrictlyPositive() && magics.m.isNegative()) { + if (d.isStrictlyPositive() && magics.m.isNegative()) { Q = DAG.getNode(ISD::ADD, dl, VT, Q, N->getOperand(0)); if (Created) Created->push_back(Q.getNode()); @@ -3114,7 +3114,7 @@ } // Shift right algebraic if shift value is nonzero if (magics.s > 0) { - Q = DAG.getNode(ISD::SRA, dl, VT, Q, + Q = DAG.getNode(ISD::SRA, dl, VT, Q, DAG.getConstant(magics.s, getShiftAmountTy())); if (Created) Created->push_back(Q.getNode()); @@ -3165,20 +3165,20 @@ if (magics.a == 0) { assert(magics.s < N1C->getAPIntValue().getBitWidth() && "We shouldn't generate an undefined shift!"); - return DAG.getNode(ISD::SRL, dl, VT, Q, + return DAG.getNode(ISD::SRL, dl, VT, Q, DAG.getConstant(magics.s, getShiftAmountTy())); } else { SDValue NPQ = DAG.getNode(ISD::SUB, dl, VT, N->getOperand(0), Q); if (Created) Created->push_back(NPQ.getNode()); - NPQ = DAG.getNode(ISD::SRL, dl, VT, NPQ, + NPQ = DAG.getNode(ISD::SRL, dl, VT, NPQ, DAG.getConstant(1, getShiftAmountTy())); if (Created) Created->push_back(NPQ.getNode()); NPQ = DAG.getNode(ISD::ADD, dl, VT, NPQ, Q); if (Created) Created->push_back(NPQ.getNode()); - return DAG.getNode(ISD::SRL, dl, VT, NPQ, + return DAG.getNode(ISD::SRL, dl, VT, NPQ, DAG.getConstant(magics.s-1, getShiftAmountTy())); } } Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp?rev=119990&r1=119989&r2=119990&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMFastISel.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Mon Nov 22 21:31:01 2010 @@ -1519,7 +1519,7 @@ break; } case CCValAssign::BCvt: { - unsigned BC = FastEmit_r(ArgVT, VA.getLocVT(), ISD::BIT_CONVERT, Arg, + unsigned BC = FastEmit_r(ArgVT, VA.getLocVT(), ISD::BITCAST, Arg, /*TODO: Kill=*/false); assert(BC != 0 && "Failed to emit a bitcast!"); Arg = BC; Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=119990&r1=119989&r2=119990&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Mon Nov 22 21:31:01 2010 @@ -238,7 +238,7 @@ setLibcallName(RTLIB::SRA_I128, 0); if (Subtarget->isAAPCS_ABI()) { - // Double-precision floating-point arithmetic helper functions + // Double-precision floating-point arithmetic helper functions // RTABI chapter 4.1.2, Table 2 setLibcallName(RTLIB::ADD_F64, "__aeabi_dadd"); setLibcallName(RTLIB::DIV_F64, "__aeabi_ddiv"); @@ -338,7 +338,7 @@ setLibcallName(RTLIB::FPROUND_F64_F32, "__aeabi_d2f"); setLibcallName(RTLIB::FPEXT_F32_F64, "__aeabi_f2d"); setLibcallCallingConv(RTLIB::FPROUND_F64_F32, CallingConv::ARM_AAPCS); - setLibcallCallingConv(RTLIB::FPEXT_F32_F64, CallingConv::ARM_AAPCS); + setLibcallCallingConv(RTLIB::FPEXT_F32_F64, CallingConv::ARM_AAPCS); // Integer to floating-point conversions. // RTABI chapter 4.1.2, Table 8 @@ -387,7 +387,7 @@ setLibcallCallingConv(RTLIB::SDIV_I32, CallingConv::ARM_AAPCS); setLibcallCallingConv(RTLIB::UDIV_I8, CallingConv::ARM_AAPCS); setLibcallCallingConv(RTLIB::UDIV_I16, CallingConv::ARM_AAPCS); - setLibcallCallingConv(RTLIB::UDIV_I32, CallingConv::ARM_AAPCS); + setLibcallCallingConv(RTLIB::UDIV_I32, CallingConv::ARM_AAPCS); } if (Subtarget->isThumb1Only()) @@ -609,7 +609,7 @@ if (!UseSoftFloat && Subtarget->hasVFP2() && !Subtarget->isThumb1Only()) { // Turn f64->i64 into VMOVRRD, i64 -> f64 to VMOVDRR // iff target supports vfp2. - setOperationAction(ISD::BIT_CONVERT, MVT::i64, Custom); + setOperationAction(ISD::BITCAST, MVT::i64, Custom); setOperationAction(ISD::FLT_ROUNDS_, MVT::i32, Custom); } @@ -1061,7 +1061,7 @@ default: llvm_unreachable("Unknown loc info!"); case CCValAssign::Full: break; case CCValAssign::BCvt: - Val = DAG.getNode(ISD::BIT_CONVERT, dl, VA.getValVT(), Val); + Val = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), Val); break; } @@ -1209,7 +1209,7 @@ Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); break; case CCValAssign::BCvt: - Arg = DAG.getNode(ISD::BIT_CONVERT, dl, VA.getLocVT(), Arg); + Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); break; } @@ -1666,7 +1666,7 @@ default: llvm_unreachable("Unknown loc info!"); case CCValAssign::Full: break; case CCValAssign::BCvt: - Arg = DAG.getNode(ISD::BIT_CONVERT, dl, VA.getLocVT(), Arg); + Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); break; } @@ -2223,7 +2223,7 @@ default: llvm_unreachable("Unknown loc info!"); case CCValAssign::Full: break; case CCValAssign::BCvt: - ArgValue = DAG.getNode(ISD::BIT_CONVERT, dl, VA.getValVT(), ArgValue); + ArgValue = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), ArgValue); break; case CCValAssign::SExt: ArgValue = DAG.getNode(ISD::AssertSext, dl, RegVT, ArgValue, @@ -2689,7 +2689,7 @@ break; } Op = DAG.getNode(Opc, dl, MVT::f32, Op.getOperand(0)); - return DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i32, Op); + return DAG.getNode(ISD::BITCAST, dl, MVT::i32, Op); } static SDValue LowerINT_TO_FP(SDValue Op, SelectionDAG &DAG) { @@ -2708,7 +2708,7 @@ break; } - Op = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f32, Op.getOperand(0)); + Op = DAG.getNode(ISD::BITCAST, dl, MVT::f32, Op.getOperand(0)); return DAG.getNode(Opc, dl, VT, Op); } @@ -2765,12 +2765,12 @@ return FrameAddr; } -/// ExpandBIT_CONVERT - If the target supports VFP, this function is called to +/// ExpandBITCAST - If the target supports VFP, this function is called to /// expand a bit convert where either the source or destination type is i64 to /// use a VMOVDRR or VMOVRRD node. This should not be done when the non-i64 /// operand type is illegal (e.g., v2f32 for a target that doesn't support /// vectors), since the legalizer won't know what to do with that. -static SDValue ExpandBIT_CONVERT(SDNode *N, SelectionDAG &DAG) { +static SDValue ExpandBITCAST(SDNode *N, SelectionDAG &DAG) { const TargetLowering &TLI = DAG.getTargetLoweringInfo(); DebugLoc dl = N->getDebugLoc(); SDValue Op = N->getOperand(0); @@ -2780,7 +2780,7 @@ EVT SrcVT = Op.getValueType(); EVT DstVT = N->getValueType(0); assert((SrcVT == MVT::i64 || DstVT == MVT::i64) && - "ExpandBIT_CONVERT called for non-i64 type"); + "ExpandBITCAST called for non-i64 type"); // Turn i64->f64 into VMOVDRR. if (SrcVT == MVT::i64 && TLI.isTypeLegal(DstVT)) { @@ -2788,7 +2788,7 @@ DAG.getConstant(0, MVT::i32)); SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Op, DAG.getConstant(1, MVT::i32)); - return DAG.getNode(ISD::BIT_CONVERT, dl, DstVT, + return DAG.getNode(ISD::BITCAST, dl, DstVT, DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi)); } @@ -2815,7 +2815,7 @@ SDValue EncodedVal = DAG.getTargetConstant(0, MVT::i32); EVT VmovVT = VT.is128BitVector() ? MVT::v4i32 : MVT::v2i32; SDValue Vmov = DAG.getNode(ARMISD::VMOVIMM, dl, VmovVT, EncodedVal); - return DAG.getNode(ISD::BIT_CONVERT, dl, VT, Vmov); + return DAG.getNode(ISD::BITCAST, dl, VT, Vmov); } /// LowerShiftRightParts - Lower SRA_PARTS, which returns two @@ -3068,13 +3068,13 @@ AndOp = Op1; // Ignore bitconvert. - if (AndOp.getNode() && AndOp.getOpcode() == ISD::BIT_CONVERT) + if (AndOp.getNode() && AndOp.getOpcode() == ISD::BITCAST) AndOp = AndOp.getOperand(0); if (AndOp.getNode() && AndOp.getOpcode() == ISD::AND) { Opc = ARMISD::VTST; - Op0 = DAG.getNode(ISD::BIT_CONVERT, dl, VT, AndOp.getOperand(0)); - Op1 = DAG.getNode(ISD::BIT_CONVERT, dl, VT, AndOp.getOperand(1)); + Op0 = DAG.getNode(ISD::BITCAST, dl, VT, AndOp.getOperand(0)); + Op1 = DAG.getNode(ISD::BITCAST, dl, VT, AndOp.getOperand(1)); Invert = !Invert; } } @@ -3095,7 +3095,7 @@ Opc = ARMISD::VCLTZ; SingleOp = Op1; } - + SDValue Result; if (SingleOp.getNode()) { switch (Opc) { @@ -3499,7 +3499,7 @@ VMOVModImm); if (Val.getNode()) { SDValue Vmov = DAG.getNode(ARMISD::VMOVIMM, dl, VmovVT, Val); - return DAG.getNode(ISD::BIT_CONVERT, dl, VT, Vmov); + return DAG.getNode(ISD::BITCAST, dl, VT, Vmov); } // Try an immediate VMVN. @@ -3507,11 +3507,11 @@ ((1LL << SplatBitSize) - 1)); Val = isNEONModifiedImm(NegatedImm, SplatUndef.getZExtValue(), SplatBitSize, - DAG, VmovVT, VT.is128BitVector(), + DAG, VmovVT, VT.is128BitVector(), VMVNModImm); if (Val.getNode()) { SDValue Vmov = DAG.getNode(ARMISD::VMVNIMM, dl, VmovVT, Val); - return DAG.getNode(ISD::BIT_CONVERT, dl, VT, Vmov); + return DAG.getNode(ISD::BITCAST, dl, VT, Vmov); } } } @@ -3553,13 +3553,13 @@ if (VT.getVectorElementType().isFloatingPoint()) { SmallVector Ops; for (unsigned i = 0; i < NumElts; ++i) - Ops.push_back(DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i32, + Ops.push_back(DAG.getNode(ISD::BITCAST, dl, MVT::i32, Op.getOperand(i))); EVT VecVT = EVT::getVectorVT(*DAG.getContext(), MVT::i32, NumElts); SDValue Val = DAG.getNode(ISD::BUILD_VECTOR, dl, VecVT, &Ops[0], NumElts); Val = LowerBUILD_VECTOR(Val, DAG, ST); if (Val.getNode()) - return DAG.getNode(ISD::BIT_CONVERT, dl, VT, Val); + return DAG.getNode(ISD::BITCAST, dl, VT, Val); } SDValue Val = IsSingleInstrConstant(Value, DAG, ST, dl); if (Val.getNode()) @@ -3582,9 +3582,9 @@ EVT VecVT = EVT::getVectorVT(*DAG.getContext(), EltVT, NumElts); SmallVector Ops; for (unsigned i = 0; i < NumElts; ++i) - Ops.push_back(DAG.getNode(ISD::BIT_CONVERT, dl, EltVT, Op.getOperand(i))); + Ops.push_back(DAG.getNode(ISD::BITCAST, dl, EltVT, Op.getOperand(i))); SDValue Val = DAG.getNode(ARMISD::BUILD_VECTOR, dl, VecVT, &Ops[0],NumElts); - return DAG.getNode(ISD::BIT_CONVERT, dl, VT, Val); + return DAG.getNode(ISD::BITCAST, dl, VT, Val); } return SDValue(); @@ -3805,8 +3805,8 @@ // registers are defined to use, and since i64 is not legal. EVT EltVT = EVT::getFloatingPointVT(EltSize); EVT VecVT = EVT::getVectorVT(*DAG.getContext(), EltVT, NumElts); - V1 = DAG.getNode(ISD::BIT_CONVERT, dl, VecVT, V1); - V2 = DAG.getNode(ISD::BIT_CONVERT, dl, VecVT, V2); + V1 = DAG.getNode(ISD::BITCAST, dl, VecVT, V1); + V2 = DAG.getNode(ISD::BITCAST, dl, VecVT, V2); SmallVector Ops; for (unsigned i = 0; i < NumElts; ++i) { if (ShuffleMask[i] < 0) @@ -3818,7 +3818,7 @@ MVT::i32))); } SDValue Val = DAG.getNode(ARMISD::BUILD_VECTOR, dl, VecVT, &Ops[0],NumElts); - return DAG.getNode(ISD::BIT_CONVERT, dl, VT, Val); + return DAG.getNode(ISD::BITCAST, dl, VT, Val); } return SDValue(); @@ -3851,13 +3851,13 @@ SDValue Op1 = Op.getOperand(1); if (Op0.getOpcode() != ISD::UNDEF) Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Val, - DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f64, Op0), + DAG.getNode(ISD::BITCAST, dl, MVT::f64, Op0), DAG.getIntPtrConstant(0)); if (Op1.getOpcode() != ISD::UNDEF) Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Val, - DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f64, Op1), + DAG.getNode(ISD::BITCAST, dl, MVT::f64, Op1), DAG.getIntPtrConstant(1)); - return DAG.getNode(ISD::BIT_CONVERT, dl, Op.getValueType(), Val); + return DAG.getNode(ISD::BITCAST, dl, Op.getValueType(), Val); } /// SkipExtension - For a node that is either a SIGN_EXTEND, ZERO_EXTEND, or @@ -3933,7 +3933,7 @@ case ISD::EH_SJLJ_DISPATCHSETUP: return LowerEH_SJLJ_DISPATCHSETUP(Op, DAG); case ISD::INTRINSIC_WO_CHAIN: return LowerINTRINSIC_WO_CHAIN(Op, DAG, Subtarget); - case ISD::BIT_CONVERT: return ExpandBIT_CONVERT(Op.getNode(), DAG); + case ISD::BITCAST: return ExpandBITCAST(Op.getNode(), DAG); case ISD::SHL: case ISD::SRL: case ISD::SRA: return LowerShift(Op.getNode(), DAG, Subtarget); @@ -3962,8 +3962,8 @@ default: llvm_unreachable("Don't know how to custom expand this!"); break; - case ISD::BIT_CONVERT: - Res = ExpandBIT_CONVERT(N, DAG); + case ISD::BITCAST: + Res = ExpandBITCAST(N, DAG); break; case ISD::SRL: case ISD::SRA: @@ -4497,7 +4497,7 @@ DebugLoc dl = N->getDebugLoc(); EVT VT = N->getValueType(0); SelectionDAG &DAG = DCI.DAG; - + APInt SplatBits, SplatUndef; unsigned SplatBitSize; bool HasAnyUndefs; @@ -4507,17 +4507,17 @@ EVT VbicVT; SDValue Val = isNEONModifiedImm((~SplatBits).getZExtValue(), SplatUndef.getZExtValue(), SplatBitSize, - DAG, VbicVT, VT.is128BitVector(), + DAG, VbicVT, VT.is128BitVector(), OtherModImm); if (Val.getNode()) { SDValue Input = - DAG.getNode(ISD::BIT_CONVERT, dl, VbicVT, N->getOperand(0)); + DAG.getNode(ISD::BITCAST, dl, VbicVT, N->getOperand(0)); SDValue Vbic = DAG.getNode(ARMISD::VBICIMM, dl, VbicVT, Input, Val); - return DAG.getNode(ISD::BIT_CONVERT, dl, VT, Vbic); + return DAG.getNode(ISD::BITCAST, dl, VT, Vbic); } } } - + return SDValue(); } @@ -4530,7 +4530,7 @@ DebugLoc dl = N->getDebugLoc(); EVT VT = N->getValueType(0); SelectionDAG &DAG = DCI.DAG; - + APInt SplatBits, SplatUndef; unsigned SplatBitSize; bool HasAnyUndefs; @@ -4544,9 +4544,9 @@ OtherModImm); if (Val.getNode()) { SDValue Input = - DAG.getNode(ISD::BIT_CONVERT, dl, VorrVT, N->getOperand(0)); + DAG.getNode(ISD::BITCAST, dl, VorrVT, N->getOperand(0)); SDValue Vorr = DAG.getNode(ARMISD::VORRIMM, dl, VorrVT, Input, Val); - return DAG.getNode(ISD::BIT_CONVERT, dl, VT, Vorr); + return DAG.getNode(ISD::BITCAST, dl, VT, Vorr); } } } @@ -4640,7 +4640,7 @@ DCI.CombineTo(N, Res, false); } } - + return SDValue(); } @@ -4661,14 +4661,14 @@ // N=vmovrrd(X); vmovdrr(N:0, N:1) -> bit_convert(X) SDValue Op0 = N->getOperand(0); SDValue Op1 = N->getOperand(1); - if (Op0.getOpcode() == ISD::BIT_CONVERT) + if (Op0.getOpcode() == ISD::BITCAST) Op0 = Op0.getOperand(0); - if (Op1.getOpcode() == ISD::BIT_CONVERT) + if (Op1.getOpcode() == ISD::BITCAST) Op1 = Op1.getOperand(0); if (Op0.getOpcode() == ARMISD::VMOVRRD && Op0.getNode() == Op1.getNode() && Op0.getResNo() == 0 && Op1.getResNo() == 1) - return DAG.getNode(ISD::BIT_CONVERT, N->getDebugLoc(), + return DAG.getNode(ISD::BITCAST, N->getDebugLoc(), N->getValueType(0), Op0.getOperand(0)); return SDValue(); } @@ -4748,7 +4748,7 @@ EVT VT = N->getValueType(0); // Ignore bit_converts. - while (Op.getOpcode() == ISD::BIT_CONVERT) + while (Op.getOpcode() == ISD::BITCAST) Op = Op.getOperand(0); if (Op.getOpcode() != ARMISD::VMOVIMM && Op.getOpcode() != ARMISD::VMVNIMM) return SDValue(); @@ -4763,7 +4763,7 @@ if (EltSize > VT.getVectorElementType().getSizeInBits()) return SDValue(); - return DAG.getNode(ISD::BIT_CONVERT, N->getDebugLoc(), VT, Op); + return DAG.getNode(ISD::BITCAST, N->getDebugLoc(), VT, Op); } /// getVShiftImm - Check if this is a valid build_vector for the immediate @@ -4771,7 +4771,7 @@ /// build_vector must have the same constant integer value. static bool getVShiftImm(SDValue Op, unsigned ElementBits, int64_t &Cnt) { // Ignore bit_converts. - while (Op.getOpcode() == ISD::BIT_CONVERT) + while (Op.getOpcode() == ISD::BITCAST) Op = Op.getOperand(0); BuildVectorSDNode *BVN = dyn_cast(Op.getNode()); APInt SplatBits, SplatUndef; @@ -5935,7 +5935,7 @@ return false; } -/// getTgtMemIntrinsic - Represent NEON load and store intrinsics as +/// getTgtMemIntrinsic - Represent NEON load and store intrinsics as /// MemIntrinsicNodes. The associated MachineMemOperands record the alignment /// specified in the intrinsic calls. bool ARMTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info, Modified: llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp?rev=119990&r1=119989&r2=119990&view=diff ============================================================================== --- llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp (original) +++ llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp Mon Nov 22 21:31:01 2010 @@ -125,7 +125,7 @@ setOperationAction(ISD::SETCC, MVT::f32, Promote); - setOperationAction(ISD::BIT_CONVERT, MVT::f32, Promote); + setOperationAction(ISD::BITCAST, MVT::f32, Promote); setOperationAction(ISD::EH_LABEL, MVT::Other, Expand); @@ -616,7 +616,7 @@ "Unhandled SINT_TO_FP type in custom expander!"); SDValue LD; bool isDouble = Op.getValueType() == MVT::f64; - LD = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f64, Op.getOperand(0)); + LD = DAG.getNode(ISD::BITCAST, dl, MVT::f64, Op.getOperand(0)); SDValue FP = DAG.getNode(isDouble?AlphaISD::CVTQT_:AlphaISD::CVTQS_, dl, isDouble?MVT::f64:MVT::f32, LD); return FP; @@ -630,7 +630,7 @@ src = DAG.getNode(AlphaISD::CVTTQ_, dl, MVT::f64, src); - return DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i64, src); + return DAG.getNode(ISD::BITCAST, dl, MVT::i64, src); } case ISD::ConstantPool: { ConstantPoolSDNode *CP = cast(Op); @@ -648,11 +648,11 @@ case ISD::GlobalAddress: { GlobalAddressSDNode *GSDN = cast(Op); const GlobalValue *GV = GSDN->getGlobal(); - SDValue GA = DAG.getTargetGlobalAddress(GV, dl, MVT::i64, + SDValue GA = DAG.getTargetGlobalAddress(GV, dl, MVT::i64, GSDN->getOffset()); // FIXME there isn't really any debug info here - // if (!GV->hasWeakLinkage() && !GV->isDeclaration() + // if (!GV->hasWeakLinkage() && !GV->isDeclaration() // && !GV->hasLinkOnceLinkage()) { if (GV->hasLocalLinkage()) { SDValue Hi = DAG.getNode(AlphaISD::GPRelHi, dl, MVT::i64, GA, @@ -727,7 +727,7 @@ SDValue Val = DAG.getLoad(getPointerTy(), dl, Chain, SrcP, MachinePointerInfo(SrcS), false, false, 0); - SDValue Result = DAG.getStore(Val.getValue(1), dl, Val, DestP, + SDValue Result = DAG.getStore(Val.getValue(1), dl, Val, DestP, MachinePointerInfo(DestS), false, false, 0); SDValue NP = DAG.getNode(ISD::ADD, dl, MVT::i64, SrcP, @@ -779,7 +779,7 @@ SDValue Chain, DataPtr; LowerVAARG(N, Chain, DataPtr, DAG); - SDValue Res = DAG.getLoad(N->getValueType(0), dl, Chain, DataPtr, + SDValue Res = DAG.getLoad(N->getValueType(0), dl, Chain, DataPtr, MachinePointerInfo(), false, false, 0); Results.push_back(Res); Modified: llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp?rev=119990&r1=119989&r2=119990&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp Mon Nov 22 21:31:01 2010 @@ -213,7 +213,7 @@ unsigned Alignment = cast(CPIdx)->getAlignment(); SDValue CGPoolOffset = SPU::LowerConstantPool(CPIdx, *CurDAG, TM); - + HandleSDNode Dummy(CurDAG->getLoad(vecVT, dl, CurDAG->getEntryNode(), CGPoolOffset, MachinePointerInfo::getConstantPool(), @@ -308,9 +308,9 @@ assert(II && "No InstrInfo?"); return new SPUHazardRecognizer(*II); } - + private: - SDValue getRC( MVT ); + SDValue getRC( MVT ); // Include the pieces autogenerated from the target description. #include "SPUGenDAGISel.inc" @@ -512,8 +512,8 @@ Base = CurDAG->getTargetConstant(0, N.getValueType()); Index = N; return true; - } else if (Opc == ISD::Register - ||Opc == ISD::CopyFromReg + } else if (Opc == ISD::Register + ||Opc == ISD::CopyFromReg ||Opc == ISD::UNDEF ||Opc == ISD::Constant) { unsigned OpOpc = Op->getOpcode(); @@ -574,7 +574,7 @@ } /*! - Utility function to use with COPY_TO_REGCLASS instructions. Returns a SDValue + Utility function to use with COPY_TO_REGCLASS instructions. Returns a SDValue to be used as the last parameter of a CurDAG->getMachineNode(COPY_TO_REGCLASS,..., ) function call \arg VT the value type for which we want a register class @@ -582,19 +582,19 @@ SDValue SPUDAGToDAGISel::getRC( MVT VT ) { switch( VT.SimpleTy ) { case MVT::i8: - return CurDAG->getTargetConstant(SPU::R8CRegClass.getID(), MVT::i32); - break; + return CurDAG->getTargetConstant(SPU::R8CRegClass.getID(), MVT::i32); + break; case MVT::i16: - return CurDAG->getTargetConstant(SPU::R16CRegClass.getID(), MVT::i32); - break; + return CurDAG->getTargetConstant(SPU::R16CRegClass.getID(), MVT::i32); + break; case MVT::i32: - return CurDAG->getTargetConstant(SPU::R32CRegClass.getID(), MVT::i32); - break; + return CurDAG->getTargetConstant(SPU::R32CRegClass.getID(), MVT::i32); + break; case MVT::f32: - return CurDAG->getTargetConstant(SPU::R32FPRegClass.getID(), MVT::i32); - break; + return CurDAG->getTargetConstant(SPU::R32FPRegClass.getID(), MVT::i32); + break; case MVT::i64: - return CurDAG->getTargetConstant(SPU::R64CRegClass.getID(), MVT::i32); + return CurDAG->getTargetConstant(SPU::R64CRegClass.getID(), MVT::i32); break; case MVT::v16i8: case MVT::v8i16: @@ -602,7 +602,7 @@ case MVT::v4f32: case MVT::v2i64: case MVT::v2f64: - return CurDAG->getTargetConstant(SPU::VECREGRegClass.getID(), MVT::i32); + return CurDAG->getTargetConstant(SPU::VECREGRegClass.getID(), MVT::i32); break; default: assert( false && "add a new case here" ); @@ -654,7 +654,7 @@ EVT Op0VT = Op0.getValueType(); EVT Op0VecVT = EVT::getVectorVT(*CurDAG->getContext(), Op0VT, (128 / Op0VT.getSizeInBits())); - EVT OpVecVT = EVT::getVectorVT(*CurDAG->getContext(), + EVT OpVecVT = EVT::getVectorVT(*CurDAG->getContext(), OpVT, (128 / OpVT.getSizeInBits())); SDValue shufMask; @@ -688,19 +688,19 @@ } SDNode *shufMaskLoad = emitBuildVector(shufMask.getNode()); - + HandleSDNode PromoteScalar(CurDAG->getNode(SPUISD::PREFSLOT2VEC, dl, Op0VecVT, Op0)); - + SDValue PromScalar; if (SDNode *N = SelectCode(PromoteScalar.getValue().getNode())) PromScalar = SDValue(N, 0); else PromScalar = PromoteScalar.getValue(); - + SDValue zextShuffle = CurDAG->getNode(SPUISD::SHUFB, dl, OpVecVT, - PromScalar, PromScalar, + PromScalar, PromScalar, SDValue(shufMaskLoad, 0)); HandleSDNode Dummy2(zextShuffle); @@ -710,7 +710,7 @@ zextShuffle = Dummy2.getValue(); HandleSDNode Dummy(CurDAG->getNode(SPUISD::VEC2PREFSLOT, dl, OpVT, zextShuffle)); - + CurDAG->ReplaceAllUsesWith(N, Dummy.getValue().getNode()); SelectCode(Dummy.getValue().getNode()); return Dummy.getValue().getNode(); @@ -721,7 +721,7 @@ HandleSDNode Dummy(CurDAG->getNode(SPUISD::ADD64_MARKER, dl, OpVT, N->getOperand(0), N->getOperand(1), SDValue(CGLoad, 0))); - + CurDAG->ReplaceAllUsesWith(N, Dummy.getValue().getNode()); if (SDNode *N = SelectCode(Dummy.getValue().getNode())) return N; @@ -733,7 +733,7 @@ HandleSDNode Dummy(CurDAG->getNode(SPUISD::SUB64_MARKER, dl, OpVT, N->getOperand(0), N->getOperand(1), SDValue(CGLoad, 0))); - + CurDAG->ReplaceAllUsesWith(N, Dummy.getValue().getNode()); if (SDNode *N = SelectCode(Dummy.getValue().getNode())) return N; @@ -847,12 +847,12 @@ SDValue Arg = N->getOperand(0); SDValue Chain = N->getOperand(1); SDNode *Result; - + Result = CurDAG->getMachineNode(TargetOpcode::COPY_TO_REGCLASS, dl, VT, MVT::Other, Arg, getRC( VT.getSimpleVT()), Chain); return Result; - + } else if (Opc == SPUISD::IndirectAddr) { // Look at the operands: SelectCode() will catch the cases that aren't // specifically handled here. @@ -878,10 +878,10 @@ NewOpc = SPU::AIr32; Ops[1] = Op1; } else { - Ops[1] = SDValue(CurDAG->getMachineNode(SPU::ILr32, dl, - N->getValueType(0), + Ops[1] = SDValue(CurDAG->getMachineNode(SPU::ILr32, dl, + N->getValueType(0), Op1), - 0); + 0); } } Ops[0] = Op0; @@ -913,7 +913,7 @@ SDNode * SPUDAGToDAGISel::SelectSHLi64(SDNode *N, EVT OpVT) { SDValue Op0 = N->getOperand(0); - EVT VecVT = EVT::getVectorVT(*CurDAG->getContext(), + EVT VecVT = EVT::getVectorVT(*CurDAG->getContext(), OpVT, (128 / OpVT.getSizeInBits())); SDValue ShiftAmt = N->getOperand(1); EVT ShiftAmtVT = ShiftAmt.getValueType(); @@ -966,7 +966,7 @@ SDValue(Shift, 0), SDValue(Bits, 0)); } - return CurDAG->getMachineNode(TargetOpcode::COPY_TO_REGCLASS, dl, + return CurDAG->getMachineNode(TargetOpcode::COPY_TO_REGCLASS, dl, OpVT, SDValue(Shift, 0), getRC(MVT::i64)); } @@ -1035,7 +1035,7 @@ SDValue(Shift, 0), SDValue(Bits, 0)); } - return CurDAG->getMachineNode(TargetOpcode::COPY_TO_REGCLASS, dl, + return CurDAG->getMachineNode(TargetOpcode::COPY_TO_REGCLASS, dl, OpVT, SDValue(Shift, 0), getRC(MVT::i64)); } @@ -1050,14 +1050,14 @@ SDNode * SPUDAGToDAGISel::SelectSRAi64(SDNode *N, EVT OpVT) { // Promote Op0 to vector - EVT VecVT = EVT::getVectorVT(*CurDAG->getContext(), + EVT VecVT = EVT::getVectorVT(*CurDAG->getContext(), OpVT, (128 / OpVT.getSizeInBits())); SDValue ShiftAmt = N->getOperand(1); EVT ShiftAmtVT = ShiftAmt.getValueType(); DebugLoc dl = N->getDebugLoc(); SDNode *VecOp0 = - CurDAG->getMachineNode(TargetOpcode::COPY_TO_REGCLASS, dl, + CurDAG->getMachineNode(TargetOpcode::COPY_TO_REGCLASS, dl, VecVT, N->getOperand(0), getRC(MVT::v2i64)); SDValue SignRotAmt = CurDAG->getTargetConstant(31, ShiftAmtVT); @@ -1065,7 +1065,7 @@ CurDAG->getMachineNode(SPU::ROTMAIv2i64_i32, dl, MVT::v2i64, SDValue(VecOp0, 0), SignRotAmt); SDNode *UpperHalfSign = - CurDAG->getMachineNode(TargetOpcode::COPY_TO_REGCLASS, dl, + CurDAG->getMachineNode(TargetOpcode::COPY_TO_REGCLASS, dl, MVT::i32, SDValue(SignRot, 0), getRC(MVT::i32)); SDNode *UpperHalfSignMask = @@ -1113,7 +1113,7 @@ SDValue(Shift, 0), SDValue(NegShift, 0)); } - return CurDAG->getMachineNode(TargetOpcode::COPY_TO_REGCLASS, dl, + return CurDAG->getMachineNode(TargetOpcode::COPY_TO_REGCLASS, dl, OpVT, SDValue(Shift, 0), getRC(MVT::i64)); } @@ -1135,7 +1135,7 @@ // Here's where it gets interesting, because we have to parse out the // subtree handed back in i64vec: - if (i64vec.getOpcode() == ISD::BIT_CONVERT) { + if (i64vec.getOpcode() == ISD::BITCAST) { // The degenerate case where the upper and lower bits in the splat are // identical: SDValue Op0 = i64vec.getOperand(0); @@ -1149,7 +1149,7 @@ SDValue rhs = i64vec.getOperand(1); SDValue shufmask = i64vec.getOperand(2); - if (lhs.getOpcode() == ISD::BIT_CONVERT) { + if (lhs.getOpcode() == ISD::BITCAST) { ReplaceUses(lhs, lhs.getOperand(0)); lhs = lhs.getOperand(0); } @@ -1158,7 +1158,7 @@ ? lhs.getNode() : emitBuildVector(lhs.getNode())); - if (rhs.getOpcode() == ISD::BIT_CONVERT) { + if (rhs.getOpcode() == ISD::BITCAST) { ReplaceUses(rhs, rhs.getOperand(0)); rhs = rhs.getOperand(0); } @@ -1167,7 +1167,7 @@ ? rhs.getNode() : emitBuildVector(rhs.getNode())); - if (shufmask.getOpcode() == ISD::BIT_CONVERT) { + if (shufmask.getOpcode() == ISD::BITCAST) { ReplaceUses(shufmask, shufmask.getOperand(0)); shufmask = shufmask.getOperand(0); } @@ -1183,8 +1183,8 @@ HandleSDNode Dummy(shufNode); SDNode *SN = SelectCode(Dummy.getValue().getNode()); if (SN == 0) SN = Dummy.getValue().getNode(); - - return CurDAG->getMachineNode(TargetOpcode::COPY_TO_REGCLASS, dl, + + return CurDAG->getMachineNode(TargetOpcode::COPY_TO_REGCLASS, dl, OpVT, SDValue(SN, 0), getRC(MVT::i64)); } else if (i64vec.getOpcode() == ISD::BUILD_VECTOR) { return CurDAG->getMachineNode(TargetOpcode::COPY_TO_REGCLASS, dl, OpVT, Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp?rev=119990&r1=119989&r2=119990&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Mon Nov 22 21:31:01 2010 @@ -45,9 +45,9 @@ // Byte offset of the preferred slot (counted from the MSB) int prefslotOffset(EVT VT) { int retval=0; - if (VT==MVT::i1) retval=3; - if (VT==MVT::i8) retval=3; - if (VT==MVT::i16) retval=2; + if (VT==MVT::i1) retval=3; + if (VT==MVT::i8) retval=3; + if (VT==MVT::i16) retval=2; return retval; } @@ -348,10 +348,10 @@ setOperationAction(ISD::SINT_TO_FP, MVT::i64, Custom); setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom); - setOperationAction(ISD::BIT_CONVERT, MVT::i32, Legal); - setOperationAction(ISD::BIT_CONVERT, MVT::f32, Legal); - setOperationAction(ISD::BIT_CONVERT, MVT::i64, Legal); - setOperationAction(ISD::BIT_CONVERT, MVT::f64, Legal); + setOperationAction(ISD::BITCAST, MVT::i32, Legal); + setOperationAction(ISD::BITCAST, MVT::f32, Legal); + setOperationAction(ISD::BITCAST, MVT::i64, Legal); + setOperationAction(ISD::BITCAST, MVT::f64, Legal); // We cannot sextinreg(i1). Expand to shifts. setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand); @@ -550,13 +550,13 @@ (128 / InVT.getSizeInBits())); // two sanity checks - assert( LN->getAddressingMode() == ISD::UNINDEXED + assert( LN->getAddressingMode() == ISD::UNINDEXED && "we should get only UNINDEXED adresses"); // clean aligned loads can be selected as-is if (InVT.getSizeInBits() == 128 && alignment == 16) return SDValue(); - // Get pointerinfos to the memory chunk(s) that contain the data to load + // Get pointerinfos to the memory chunk(s) that contain the data to load uint64_t mpi_offset = LN->getPointerInfo().Offset; mpi_offset -= mpi_offset%16; MachinePointerInfo lowMemPtr(LN->getPointerInfo().V, mpi_offset); @@ -649,7 +649,7 @@ SDValue low = DAG.getLoad(MVT::i128, dl, the_chain, basePtr, lowMemPtr, LN->isVolatile(), LN->isNonTemporal(), 16); - + // When the size is not greater than alignment we get all data with just // one load if (alignment >= InVT.getSizeInBits()/8) { @@ -662,30 +662,30 @@ // Convert the loaded v16i8 vector to the appropriate vector type // specified by the operand: - EVT vecVT = EVT::getVectorVT(*DAG.getContext(), + EVT vecVT = EVT::getVectorVT(*DAG.getContext(), InVT, (128 / InVT.getSizeInBits())); result = DAG.getNode(SPUISD::VEC2PREFSLOT, dl, InVT, - DAG.getNode(ISD::BIT_CONVERT, dl, vecVT, result)); + DAG.getNode(ISD::BITCAST, dl, vecVT, result)); } // When alignment is less than the size, we might need (known only at // run-time) two loads - // TODO: if the memory address is composed only from constants, we have + // TODO: if the memory address is composed only from constants, we have // extra kowledge, and might avoid the second load else { // storage position offset from lower 16 byte aligned memory chunk - SDValue offset = DAG.getNode(ISD::AND, dl, MVT::i32, + SDValue offset = DAG.getNode(ISD::AND, dl, MVT::i32, basePtr, DAG.getConstant( 0xf, MVT::i32 ) ); // 16 - offset - SDValue offset_compl = DAG.getNode(ISD::SUB, dl, MVT::i32, + SDValue offset_compl = DAG.getNode(ISD::SUB, dl, MVT::i32, DAG.getConstant( 16, MVT::i32), offset ); - // get a registerfull of ones. (this implementation is a workaround: LLVM + // get a registerfull of ones. (this implementation is a workaround: LLVM // cannot handle 128 bit signed int constants) SDValue ones = DAG.getConstant(-1, MVT::v4i32 ); - ones = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i128, ones); + ones = DAG.getNode(ISD::BITCAST, dl, MVT::i128, ones); SDValue high = DAG.getLoad(MVT::i128, dl, the_chain, - DAG.getNode(ISD::ADD, dl, PtrVT, + DAG.getNode(ISD::ADD, dl, PtrVT, basePtr, DAG.getConstant(16, PtrVT)), highMemPtr, @@ -695,20 +695,20 @@ high.getValue(1)); // Shift the (possible) high part right to compensate the misalignemnt. - // if there is no highpart (i.e. value is i64 and offset is 4), this + // if there is no highpart (i.e. value is i64 and offset is 4), this // will zero out the high value. - high = DAG.getNode(SPUISD::SRL_BYTES, dl, MVT::i128, high, + high = DAG.getNode(SPUISD::SRL_BYTES, dl, MVT::i128, high, DAG.getNode(ISD::SUB, dl, MVT::i32, DAG.getConstant( 16, MVT::i32), offset )); - + // Shift the low similarily // TODO: add SPUISD::SHL_BYTES low = DAG.getNode(SPUISD::SHL_BYTES, dl, MVT::i128, low, offset ); // Merge the two parts - result = DAG.getNode(ISD::BIT_CONVERT, dl, vecVT, + result = DAG.getNode(ISD::BITCAST, dl, vecVT, DAG.getNode(ISD::OR, dl, MVT::i128, low, high)); if (!InVT.isVector()) { @@ -759,7 +759,7 @@ SDValue result; EVT vecVT = StVT.isVector()? StVT: EVT::getVectorVT(*DAG.getContext(), StVT, (128 / StVT.getSizeInBits())); - // Get pointerinfos to the memory chunk(s) that contain the data to load + // Get pointerinfos to the memory chunk(s) that contain the data to load uint64_t mpi_offset = SN->getPointerInfo().Offset; mpi_offset -= mpi_offset%16; MachinePointerInfo lowMemPtr(SN->getPointerInfo().V, mpi_offset); @@ -767,7 +767,7 @@ // two sanity checks - assert( SN->getAddressingMode() == ISD::UNINDEXED + assert( SN->getAddressingMode() == ISD::UNINDEXED && "we should get only UNINDEXED adresses"); // clean aligned loads can be selected as-is if (StVT.getSizeInBits() == 128 && alignment == 16) @@ -876,12 +876,12 @@ SDValue insertEltOp = DAG.getNode(SPUISD::SHUFFLE_MASK, dl, vecVT, insertEltOffs); - SDValue vectorizeOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, vecVT, + SDValue vectorizeOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, vecVT, theValue); result = DAG.getNode(SPUISD::SHUFB, dl, vecVT, vectorizeOp, low, - DAG.getNode(ISD::BIT_CONVERT, dl, + DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, insertEltOp)); result = DAG.getStore(the_chain, dl, result, basePtr, @@ -892,59 +892,59 @@ } // do the store when it might cross the 16 byte memory access boundary. else { - // TODO issue a warning if SN->isVolatile()== true? This is likely not + // TODO issue a warning if SN->isVolatile()== true? This is likely not // what the user wanted. - + // address offset from nearest lower 16byte alinged address - SDValue offset = DAG.getNode(ISD::AND, dl, MVT::i32, - SN->getBasePtr(), + SDValue offset = DAG.getNode(ISD::AND, dl, MVT::i32, + SN->getBasePtr(), DAG.getConstant(0xf, MVT::i32)); // 16 - offset - SDValue offset_compl = DAG.getNode(ISD::SUB, dl, MVT::i32, + SDValue offset_compl = DAG.getNode(ISD::SUB, dl, MVT::i32, DAG.getConstant( 16, MVT::i32), offset); - SDValue hi_shift = DAG.getNode(ISD::SUB, dl, MVT::i32, + SDValue hi_shift = DAG.getNode(ISD::SUB, dl, MVT::i32, DAG.getConstant( VT.getSizeInBits()/8, MVT::i32), offset_compl); // 16 - sizeof(Value) - SDValue surplus = DAG.getNode(ISD::SUB, dl, MVT::i32, + SDValue surplus = DAG.getNode(ISD::SUB, dl, MVT::i32, DAG.getConstant( 16, MVT::i32), DAG.getConstant( VT.getSizeInBits()/8, MVT::i32)); - // get a registerfull of ones + // get a registerfull of ones SDValue ones = DAG.getConstant(-1, MVT::v4i32); - ones = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i128, ones); + ones = DAG.getNode(ISD::BITCAST, dl, MVT::i128, ones); // Create the 128 bit masks that have ones where the data to store is // located. - SDValue lowmask, himask; - // if the value to store don't fill up the an entire 128 bits, zero + SDValue lowmask, himask; + // if the value to store don't fill up the an entire 128 bits, zero // out the last bits of the mask so that only the value we want to store - // is masked. + // is masked. // this is e.g. in the case of store i32, align 2 if (!VT.isVector()){ Value = DAG.getNode(SPUISD::PREFSLOT2VEC, dl, vecVT, Value); lowmask = DAG.getNode(SPUISD::SRL_BYTES, dl, MVT::i128, ones, surplus); - lowmask = DAG.getNode(SPUISD::SHL_BYTES, dl, MVT::i128, lowmask, + lowmask = DAG.getNode(SPUISD::SHL_BYTES, dl, MVT::i128, lowmask, surplus); - Value = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i128, Value); + Value = DAG.getNode(ISD::BITCAST, dl, MVT::i128, Value); Value = DAG.getNode(ISD::AND, dl, MVT::i128, Value, lowmask); - + } else { lowmask = ones; - Value = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i128, Value); + Value = DAG.getNode(ISD::BITCAST, dl, MVT::i128, Value); } - // this will zero, if there are no data that goes to the high quad - himask = DAG.getNode(SPUISD::SHL_BYTES, dl, MVT::i128, lowmask, + // this will zero, if there are no data that goes to the high quad + himask = DAG.getNode(SPUISD::SHL_BYTES, dl, MVT::i128, lowmask, offset_compl); - lowmask = DAG.getNode(SPUISD::SRL_BYTES, dl, MVT::i128, lowmask, + lowmask = DAG.getNode(SPUISD::SRL_BYTES, dl, MVT::i128, lowmask, offset); - + // Load in the old data and zero out the parts that will be overwritten with // the new data to store. - SDValue hi = DAG.getLoad(MVT::i128, dl, the_chain, + SDValue hi = DAG.getLoad(MVT::i128, dl, the_chain, DAG.getNode(ISD::ADD, dl, PtrVT, basePtr, DAG.getConstant( 16, PtrVT)), highMemPtr, @@ -952,40 +952,40 @@ the_chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, low.getValue(1), hi.getValue(1)); - low = DAG.getNode(ISD::AND, dl, MVT::i128, - DAG.getNode( ISD::BIT_CONVERT, dl, MVT::i128, low), + low = DAG.getNode(ISD::AND, dl, MVT::i128, + DAG.getNode( ISD::BITCAST, dl, MVT::i128, low), DAG.getNode( ISD::XOR, dl, MVT::i128, lowmask, ones)); - hi = DAG.getNode(ISD::AND, dl, MVT::i128, - DAG.getNode( ISD::BIT_CONVERT, dl, MVT::i128, hi), + hi = DAG.getNode(ISD::AND, dl, MVT::i128, + DAG.getNode( ISD::BITCAST, dl, MVT::i128, hi), DAG.getNode( ISD::XOR, dl, MVT::i128, himask, ones)); // Shift the Value to store into place. rlow contains the parts that go to - // the lower memory chunk, rhi has the parts that go to the upper one. + // the lower memory chunk, rhi has the parts that go to the upper one. SDValue rlow = DAG.getNode(SPUISD::SRL_BYTES, dl, MVT::i128, Value, offset); rlow = DAG.getNode(ISD::AND, dl, MVT::i128, rlow, lowmask); - SDValue rhi = DAG.getNode(SPUISD::SHL_BYTES, dl, MVT::i128, Value, + SDValue rhi = DAG.getNode(SPUISD::SHL_BYTES, dl, MVT::i128, Value, offset_compl); // Merge the old data and the new data and store the results - // Need to convert vectors here to integer as 'OR'ing floats assert - rlow = DAG.getNode(ISD::OR, dl, MVT::i128, - DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i128, low), - DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i128, rlow)); - rhi = DAG.getNode(ISD::OR, dl, MVT::i128, - DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i128, hi), - DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i128, rhi)); + // Need to convert vectors here to integer as 'OR'ing floats assert + rlow = DAG.getNode(ISD::OR, dl, MVT::i128, + DAG.getNode(ISD::BITCAST, dl, MVT::i128, low), + DAG.getNode(ISD::BITCAST, dl, MVT::i128, rlow)); + rhi = DAG.getNode(ISD::OR, dl, MVT::i128, + DAG.getNode(ISD::BITCAST, dl, MVT::i128, hi), + DAG.getNode(ISD::BITCAST, dl, MVT::i128, rhi)); low = DAG.getStore(the_chain, dl, rlow, basePtr, lowMemPtr, SN->isVolatile(), SN->isNonTemporal(), 16); - hi = DAG.getStore(the_chain, dl, rhi, + hi = DAG.getStore(the_chain, dl, rhi, DAG.getNode(ISD::ADD, dl, PtrVT, basePtr, DAG.getConstant( 16, PtrVT)), highMemPtr, SN->isVolatile(), SN->isNonTemporal(), 16); result = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, low.getValue(0), hi.getValue(0)); - } + } return result; } @@ -1095,7 +1095,7 @@ SDValue T = DAG.getConstant(dbits, MVT::i64); SDValue Tvec = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v2i64, T, T); return DAG.getNode(SPUISD::VEC2PREFSLOT, dl, VT, - DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v2f64, Tvec)); + DAG.getNode(ISD::BITCAST, dl, MVT::v2f64, Tvec)); } return SDValue(); @@ -1194,8 +1194,8 @@ // vararg handling: if (isVarArg) { - // FIXME: we should be able to query the argument registers from - // tablegen generated code. + // FIXME: we should be able to query the argument registers from + // tablegen generated code. static const unsigned ArgRegs[] = { SPU::R3, SPU::R4, SPU::R5, SPU::R6, SPU::R7, SPU::R8, SPU::R9, SPU::R10, SPU::R11, SPU::R12, SPU::R13, SPU::R14, SPU::R15, SPU::R16, @@ -1270,10 +1270,10 @@ SmallVector ArgLocs; CCState CCInfo(CallConv, isVarArg, getTargetMachine(), ArgLocs, - *DAG.getContext()); + *DAG.getContext()); // FIXME: allow for other calling conventions CCInfo.AnalyzeCallOperands(Outs, CCC_SPU); - + const unsigned NumArgRegs = ArgLocs.size(); @@ -1438,7 +1438,7 @@ // If the call has results, copy the values out of the ret val registers. for (unsigned i = 0; i != RVLocs.size(); ++i) { CCValAssign VA = RVLocs[i]; - + SDValue Val = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), VA.getLocVT(), InFlag); Chain = Val.getValue(1); @@ -1671,7 +1671,7 @@ && "LowerBUILD_VECTOR: Unexpected floating point vector element."); // NOTE: pretend the constant is an integer. LLVM won't load FP constants SDValue T = DAG.getConstant(Value32, MVT::i32); - return DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v4f32, + return DAG.getNode(ISD::BITCAST, dl, MVT::v4f32, DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32, T,T,T,T)); break; } @@ -1681,7 +1681,7 @@ && "LowerBUILD_VECTOR: 64-bit float vector size > 8 bytes."); // NOTE: pretend the constant is an integer. LLVM won't load FP constants SDValue T = DAG.getConstant(f64val, MVT::i64); - return DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v2f64, + return DAG.getNode(ISD::BITCAST, dl, MVT::v2f64, DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v2i64, T, T)); break; } @@ -1691,7 +1691,7 @@ SmallVector Ops; Ops.assign(8, DAG.getConstant(Value16, MVT::i16)); - return DAG.getNode(ISD::BIT_CONVERT, dl, VT, + return DAG.getNode(ISD::BITCAST, dl, VT, DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v8i16, &Ops[0], Ops.size())); } case MVT::v8i16: { @@ -1725,7 +1725,7 @@ if (upper == lower) { // Magic constant that can be matched by IL, ILA, et. al. SDValue Val = DAG.getTargetConstant(upper, MVT::i32); - return DAG.getNode(ISD::BIT_CONVERT, dl, OpVT, + return DAG.getNode(ISD::BITCAST, dl, OpVT, DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32, Val, Val, Val, Val)); } else { @@ -1754,7 +1754,7 @@ // Create lower vector if not a special pattern if (!lower_special) { SDValue LO32C = DAG.getConstant(lower, MVT::i32); - LO32 = DAG.getNode(ISD::BIT_CONVERT, dl, OpVT, + LO32 = DAG.getNode(ISD::BITCAST, dl, OpVT, DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32, LO32C, LO32C, LO32C, LO32C)); } @@ -1762,7 +1762,7 @@ // Create upper vector if not a special pattern if (!upper_special) { SDValue HI32C = DAG.getConstant(upper, MVT::i32); - HI32 = DAG.getNode(ISD::BIT_CONVERT, dl, OpVT, + HI32 = DAG.getNode(ISD::BITCAST, dl, OpVT, DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32, HI32C, HI32C, HI32C, HI32C)); } @@ -1846,7 +1846,7 @@ if (EltVT == MVT::i8) { V2EltIdx0 = 16; - maskVT = MVT::v16i8; + maskVT = MVT::v16i8; } else if (EltVT == MVT::i16) { V2EltIdx0 = 8; maskVT = MVT::v8i16; @@ -1862,7 +1862,7 @@ for (unsigned i = 0; i != MaxElts; ++i) { if (SVN->getMaskElt(i) < 0) continue; - + unsigned SrcElt = SVN->getMaskElt(i); if (monotonic) { @@ -1909,7 +1909,7 @@ SDValue Pointer = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, DAG.getRegister(SPU::R1, PtrVT), DAG.getConstant(V2EltOffset, MVT::i32)); - SDValue ShufMaskOp = DAG.getNode(SPUISD::SHUFFLE_MASK, dl, + SDValue ShufMaskOp = DAG.getNode(SPUISD::SHUFFLE_MASK, dl, maskVT, Pointer); // Use shuffle mask in SHUFB synthetic instruction: @@ -2173,7 +2173,7 @@ DAG.getRegister(SPU::R1, PtrVT), DAG.getConstant(Offset, PtrVT)); // widen the mask when dealing with half vectors - EVT maskVT = EVT::getVectorVT(*(DAG.getContext()), VT.getVectorElementType(), + EVT maskVT = EVT::getVectorVT(*(DAG.getContext()), VT.getVectorElementType(), 128/ VT.getVectorElementType().getSizeInBits()); SDValue ShufMask = DAG.getNode(SPUISD::SHUFFLE_MASK, dl, maskVT, Pointer); @@ -2181,7 +2181,7 @@ DAG.getNode(SPUISD::SHUFB, dl, VT, DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, ValOp), VecOp, - DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v4i32, ShufMask)); + DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, ShufMask)); return result; } @@ -2301,12 +2301,12 @@ ConstVec = Op.getOperand(0); Arg = Op.getOperand(1); if (ConstVec.getNode()->getOpcode() != ISD::BUILD_VECTOR) { - if (ConstVec.getNode()->getOpcode() == ISD::BIT_CONVERT) { + if (ConstVec.getNode()->getOpcode() == ISD::BITCAST) { ConstVec = ConstVec.getOperand(0); } else { ConstVec = Op.getOperand(1); Arg = Op.getOperand(0); - if (ConstVec.getNode()->getOpcode() == ISD::BIT_CONVERT) { + if (ConstVec.getNode()->getOpcode() == ISD::BITCAST) { ConstVec = ConstVec.getOperand(0); } } @@ -2347,7 +2347,7 @@ */ static SDValue LowerCTPOP(SDValue Op, SelectionDAG &DAG) { EVT VT = Op.getValueType(); - EVT vecVT = EVT::getVectorVT(*DAG.getContext(), + EVT vecVT = EVT::getVectorVT(*DAG.getContext(), VT, (128 / VT.getSizeInBits())); DebugLoc dl = Op.getDebugLoc(); @@ -2523,7 +2523,7 @@ // Take advantage of the fact that (truncate (sra arg, 32)) is efficiently // selected to a NOP: - SDValue i64lhs = DAG.getNode(ISD::BIT_CONVERT, dl, IntVT, lhs); + SDValue i64lhs = DAG.getNode(ISD::BITCAST, dl, IntVT, lhs); SDValue lhsHi32 = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, DAG.getNode(ISD::SRL, dl, IntVT, @@ -2557,7 +2557,7 @@ ISD::SETGT)); } - SDValue i64rhs = DAG.getNode(ISD::BIT_CONVERT, dl, IntVT, rhs); + SDValue i64rhs = DAG.getNode(ISD::BITCAST, dl, IntVT, rhs); SDValue rhsHi32 = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, DAG.getNode(ISD::SRL, dl, IntVT, @@ -2671,7 +2671,7 @@ // Type to truncate to EVT VT = Op.getValueType(); MVT simpleVT = VT.getSimpleVT(); - EVT VecVT = EVT::getVectorVT(*DAG.getContext(), + EVT VecVT = EVT::getVectorVT(*DAG.getContext(), VT, (128 / VT.getSizeInBits())); DebugLoc dl = Op.getDebugLoc(); @@ -2745,16 +2745,16 @@ DAG.getConstant(31, MVT::i32)); // reinterpret as a i128 (SHUFB requires it). This gets lowered away. - SDValue extended = SDValue(DAG.getMachineNode(TargetOpcode::COPY_TO_REGCLASS, + SDValue extended = SDValue(DAG.getMachineNode(TargetOpcode::COPY_TO_REGCLASS, dl, Op0VT, Op0, DAG.getTargetConstant( - SPU::GPRCRegClass.getID(), + SPU::GPRCRegClass.getID(), MVT::i32)), 0); // Shuffle bytes - Copy the sign bits into the upper 64 bits // and the input value into the lower 64 bits. SDValue extShuffle = DAG.getNode(SPUISD::SHUFB, dl, mvt, extended, sraVal, shufMask); - return DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i128, extShuffle); + return DAG.getNode(ISD::BITCAST, dl, MVT::i128, extShuffle); } //! Custom (target-specific) lowering entry point @@ -3234,14 +3234,14 @@ return isInt<10>(Imm); } -bool -SPUTargetLowering::isLegalAddressingMode(const AddrMode &AM, +bool +SPUTargetLowering::isLegalAddressingMode(const AddrMode &AM, const Type * ) const{ - // A-form: 18bit absolute address. + // A-form: 18bit absolute address. if (AM.BaseGV && !AM.HasBaseReg && AM.Scale == 0 && AM.BaseOffs == 0) return true; - + // D-form: reg + 14bit offset if (AM.BaseGV ==0 && AM.HasBaseReg && AM.Scale == 0 && isInt<14>(AM.BaseOffs)) return true; Modified: llvm/trunk/lib/Target/MBlaze/MBlazeISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeISelLowering.cpp?rev=119990&r1=119989&r2=119990&view=diff ============================================================================== --- llvm/trunk/lib/Target/MBlaze/MBlazeISelLowering.cpp (original) +++ llvm/trunk/lib/Target/MBlaze/MBlazeISelLowering.cpp Mon Nov 22 21:31:01 2010 @@ -116,8 +116,8 @@ } // Expand unsupported conversions - setOperationAction(ISD::BIT_CONVERT, MVT::f32, Expand); - setOperationAction(ISD::BIT_CONVERT, MVT::i32, Expand); + setOperationAction(ISD::BITCAST, MVT::f32, Expand); + setOperationAction(ISD::BITCAST, MVT::i32, Expand); // Expand SELECT_CC setOperationAction(ISD::SELECT_CC, MVT::Other, Expand); @@ -926,8 +926,8 @@ default: weight = TargetLowering::getSingleConstraintMatchWeight(info, constraint); break; - case 'd': - case 'y': + case 'd': + case 'y': if (type->isIntegerTy()) weight = CW_Register; break; Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=119990&r1=119989&r2=119990&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Mon Nov 22 21:31:01 2010 @@ -57,7 +57,7 @@ Subtarget = &TM.getSubtarget(); // Mips does not have i1 type, so use i32 for - // setcc operations results (slt, sgt, ...). + // setcc operations results (slt, sgt, ...). setBooleanContents(ZeroOrOneBooleanContent); // Set up the register classes @@ -69,7 +69,7 @@ if (!Subtarget->isFP64bit()) addRegisterClass(MVT::f64, Mips::AFGR64RegisterClass); - // Load extented operations for i1 types must be promoted + // Load extented operations for i1 types must be promoted setLoadExtAction(ISD::EXTLOAD, MVT::i1, Promote); setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote); setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote); @@ -78,9 +78,9 @@ setLoadExtAction(ISD::EXTLOAD, MVT::f32, Expand); setTruncStoreAction(MVT::f64, MVT::f32, Expand); - // Used by legalize types to correctly generate the setcc result. - // Without this, every float setcc comes with a AND/OR with the result, - // we don't want this, since the fpcmp result goes to a flag register, + // Used by legalize types to correctly generate the setcc result. + // Without this, every float setcc comes with a AND/OR with the result, + // we don't want this, since the fpcmp result goes to a flag register, // which is used implicitly by brcond and select operations. AddPromotedToType(ISD::SETCC, MVT::i1, MVT::i32); @@ -100,8 +100,8 @@ setOperationAction(ISD::VASTART, MVT::Other, Custom); - // We custom lower AND/OR to handle the case where the DAG contain 'ands/ors' - // with operands comming from setcc fp comparions. This is necessary since + // We custom lower AND/OR to handle the case where the DAG contain 'ands/ors' + // with operands comming from setcc fp comparions. This is necessary since // the result from these setcc are in a flag registers (FCR31). setOperationAction(ISD::AND, MVT::i32, Custom); setOperationAction(ISD::OR, MVT::i32, Custom); @@ -168,7 +168,7 @@ SDValue MipsTargetLowering:: LowerOperation(SDValue Op, SelectionDAG &DAG) const { - switch (Op.getOpcode()) + switch (Op.getOpcode()) { case ISD::AND: return LowerANDOR(Op, DAG); case ISD::BRCOND: return LowerBRCOND(Op, DAG); @@ -194,7 +194,7 @@ // MachineFunction as a live in value. It also creates a corresponding // virtual register for it. static unsigned -AddLiveIn(MachineFunction &MF, unsigned PReg, TargetRegisterClass *RC) +AddLiveIn(MachineFunction &MF, unsigned PReg, TargetRegisterClass *RC) { assert(RC->contains(PReg) && "Not the correct regclass!"); unsigned VReg = MF.getRegInfo().createVirtualRegister(RC); @@ -212,7 +212,7 @@ return Mips::BRANCH_INVALID; } - + static unsigned FPBranchCodeToOpc(Mips::FPBranchCode BC) { switch(BC) { default: @@ -227,24 +227,24 @@ static Mips::CondCode FPCondCCodeToFCC(ISD::CondCode CC) { switch (CC) { default: llvm_unreachable("Unknown fp condition code!"); - case ISD::SETEQ: + case ISD::SETEQ: case ISD::SETOEQ: return Mips::FCOND_EQ; case ISD::SETUNE: return Mips::FCOND_OGL; - case ISD::SETLT: + case ISD::SETLT: case ISD::SETOLT: return Mips::FCOND_OLT; - case ISD::SETGT: + case ISD::SETGT: case ISD::SETOGT: return Mips::FCOND_OGT; - case ISD::SETLE: - case ISD::SETOLE: return Mips::FCOND_OLE; + case ISD::SETLE: + case ISD::SETOLE: return Mips::FCOND_OLE; case ISD::SETGE: case ISD::SETOGE: return Mips::FCOND_OGE; case ISD::SETULT: return Mips::FCOND_ULT; - case ISD::SETULE: return Mips::FCOND_ULE; + case ISD::SETULE: return Mips::FCOND_ULE; case ISD::SETUGT: return Mips::FCOND_UGT; case ISD::SETUGE: return Mips::FCOND_UGE; - case ISD::SETUO: return Mips::FCOND_UN; + case ISD::SETUO: return Mips::FCOND_UN; case ISD::SETO: return Mips::FCOND_OR; - case ISD::SETNE: + case ISD::SETNE: case ISD::SETONE: return Mips::FCOND_NEQ; case ISD::SETUEQ: return Mips::FCOND_UEQ; } @@ -364,7 +364,7 @@ // Emit the round instruction and bit convert to integer SDValue Trunc = DAG.getNode(MipsISD::FPRound, dl, MVT::f32, Src, CondReg.getValue(1)); - SDValue BitCvt = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i32, Trunc); + SDValue BitCvt = DAG.getNode(ISD::BITCAST, dl, MVT::i32, Trunc); return BitCvt; } @@ -382,11 +382,11 @@ // obtain the new stack size. SDValue Sub = DAG.getNode(ISD::SUB, dl, MVT::i32, StackPointer, Size); - // The Sub result contains the new stack start address, so it + // The Sub result contains the new stack start address, so it // must be placed in the stack pointer register. Chain = DAG.getCopyToReg(StackPointer.getValue(1), dl, Mips::SP, Sub); - - // This node always has two return values: a new stack pointer + + // This node always has two return values: a new stack pointer // value and a chain SDValue Ops[2] = { Sub, Chain }; return DAG.getMergeValues(Ops, 2, dl); @@ -405,9 +405,9 @@ SDValue True = DAG.getConstant(1, MVT::i32); SDValue False = DAG.getConstant(0, MVT::i32); - SDValue LSEL = DAG.getNode(MipsISD::FPSelectCC, dl, True.getValueType(), + SDValue LSEL = DAG.getNode(MipsISD::FPSelectCC, dl, True.getValueType(), LHS, True, False, LHS.getOperand(2)); - SDValue RSEL = DAG.getNode(MipsISD::FPSelectCC, dl, True.getValueType(), + SDValue RSEL = DAG.getNode(MipsISD::FPSelectCC, dl, True.getValueType(), RHS, True, False, RHS.getOperand(2)); return DAG.getNode(Op.getOpcode(), dl, MVT::i32, LSEL, RSEL); @@ -416,7 +416,7 @@ SDValue MipsTargetLowering:: LowerBRCOND(SDValue Op, SelectionDAG &DAG) const { - // The first operand is the chain, the second is the condition, the third is + // The first operand is the chain, the second is the condition, the third is // the block to branch to if the condition is true. SDValue Chain = Op.getOperand(0); SDValue Dest = Op.getOperand(2); @@ -424,55 +424,55 @@ if (Op.getOperand(1).getOpcode() != MipsISD::FPCmp) return Op; - + SDValue CondRes = Op.getOperand(1); SDValue CCNode = CondRes.getOperand(2); Mips::CondCode CC = (Mips::CondCode)cast(CCNode)->getZExtValue(); - SDValue BrCode = DAG.getConstant(GetFPBranchCodeFromCond(CC), MVT::i32); + SDValue BrCode = DAG.getConstant(GetFPBranchCodeFromCond(CC), MVT::i32); - return DAG.getNode(MipsISD::FPBrcond, dl, Op.getValueType(), Chain, BrCode, + return DAG.getNode(MipsISD::FPBrcond, dl, Op.getValueType(), Chain, BrCode, Dest, CondRes); } SDValue MipsTargetLowering:: LowerSETCC(SDValue Op, SelectionDAG &DAG) const { - // The operands to this are the left and right operands to compare (ops #0, - // and #1) and the condition code to compare them with (op #2) as a + // The operands to this are the left and right operands to compare (ops #0, + // and #1) and the condition code to compare them with (op #2) as a // CondCodeSDNode. - SDValue LHS = Op.getOperand(0); + SDValue LHS = Op.getOperand(0); SDValue RHS = Op.getOperand(1); DebugLoc dl = Op.getDebugLoc(); ISD::CondCode CC = cast(Op.getOperand(2))->get(); - - return DAG.getNode(MipsISD::FPCmp, dl, Op.getValueType(), LHS, RHS, + + return DAG.getNode(MipsISD::FPCmp, dl, Op.getValueType(), LHS, RHS, DAG.getConstant(FPCondCCodeToFCC(CC), MVT::i32)); } SDValue MipsTargetLowering:: LowerSELECT(SDValue Op, SelectionDAG &DAG) const { - SDValue Cond = Op.getOperand(0); + SDValue Cond = Op.getOperand(0); SDValue True = Op.getOperand(1); SDValue False = Op.getOperand(2); DebugLoc dl = Op.getDebugLoc(); - // if the incomming condition comes from a integer compare, the select - // operation must be SelectCC or a conditional move if the subtarget + // if the incomming condition comes from a integer compare, the select + // operation must be SelectCC or a conditional move if the subtarget // supports it. if (Cond.getOpcode() != MipsISD::FPCmp) { if (Subtarget->hasCondMov() && !True.getValueType().isFloatingPoint()) return Op; - return DAG.getNode(MipsISD::SelectCC, dl, True.getValueType(), + return DAG.getNode(MipsISD::SelectCC, dl, True.getValueType(), Cond, True, False); } // if the incomming condition comes from fpcmp, the select // operation must use FPSelectCC. SDValue CCNode = Cond.getOperand(2); - return DAG.getNode(MipsISD::FPSelectCC, dl, True.getValueType(), + return DAG.getNode(MipsISD::FPSelectCC, dl, True.getValueType(), Cond, True, False, CCNode); } @@ -484,16 +484,16 @@ if (getTargetMachine().getRelocationModel() != Reloc::PIC_) { SDVTList VTs = DAG.getVTList(MVT::i32); - + MipsTargetObjectFile &TLOF = (MipsTargetObjectFile&)getObjFileLowering(); - + // %gp_rel relocation - if (TLOF.IsGlobalInSmallSection(GV, getTargetMachine())) { - SDValue GA = DAG.getTargetGlobalAddress(GV, dl, MVT::i32, 0, + if (TLOF.IsGlobalInSmallSection(GV, getTargetMachine())) { + SDValue GA = DAG.getTargetGlobalAddress(GV, dl, MVT::i32, 0, MipsII::MO_GPREL); SDValue GPRelNode = DAG.getNode(MipsISD::GPRel, dl, VTs, &GA, 1); SDValue GOT = DAG.getGLOBAL_OFFSET_TABLE(MVT::i32); - return DAG.getNode(ISD::ADD, dl, MVT::i32, GOT, GPRelNode); + return DAG.getNode(ISD::ADD, dl, MVT::i32, GOT, GPRelNode); } // %hi/%lo relocation SDValue GA = DAG.getTargetGlobalAddress(GV, dl, MVT::i32, 0, @@ -505,7 +505,7 @@ } else { SDValue GA = DAG.getTargetGlobalAddress(GV, dl, MVT::i32, 0, MipsII::MO_GOT); - SDValue ResNode = DAG.getLoad(MVT::i32, dl, + SDValue ResNode = DAG.getLoad(MVT::i32, dl, DAG.getEntryNode(), GA, MachinePointerInfo(), false, false, 0); // On functions and global targets not internal linked only @@ -531,7 +531,7 @@ LowerJumpTable(SDValue Op, SelectionDAG &DAG) const { SDValue ResNode; - SDValue HiPart; + SDValue HiPart; // FIXME there isn't actually debug info here DebugLoc dl = Op.getDebugLoc(); bool IsPIC = getTargetMachine().getRelocationModel() == Reloc::PIC_; @@ -566,25 +566,25 @@ DebugLoc dl = Op.getDebugLoc(); // gp_rel relocation - // FIXME: we should reference the constant pool using small data sections, + // FIXME: we should reference the constant pool using small data sections, // but the asm printer currently doens't support this feature without - // hacking it. This feature should come soon so we can uncomment the + // hacking it. This feature should come soon so we can uncomment the // stuff below. //if (IsInSmallSection(C->getType())) { // SDValue GPRelNode = DAG.getNode(MipsISD::GPRel, MVT::i32, CP); // SDValue GOT = DAG.getGLOBAL_OFFSET_TABLE(MVT::i32); - // ResNode = DAG.getNode(ISD::ADD, MVT::i32, GOT, GPRelNode); + // ResNode = DAG.getNode(ISD::ADD, MVT::i32, GOT, GPRelNode); if (getTargetMachine().getRelocationModel() != Reloc::PIC_) { - SDValue CP = DAG.getTargetConstantPool(C, MVT::i32, N->getAlignment(), + SDValue CP = DAG.getTargetConstantPool(C, MVT::i32, N->getAlignment(), N->getOffset(), MipsII::MO_ABS_HILO); SDValue HiPart = DAG.getNode(MipsISD::Hi, dl, MVT::i32, CP); SDValue Lo = DAG.getNode(MipsISD::Lo, dl, MVT::i32, CP); ResNode = DAG.getNode(ISD::ADD, dl, MVT::i32, HiPart, Lo); } else { - SDValue CP = DAG.getTargetConstantPool(C, MVT::i32, N->getAlignment(), + SDValue CP = DAG.getTargetConstantPool(C, MVT::i32, N->getAlignment(), N->getOffset(), MipsII::MO_GOT); - SDValue Load = DAG.getLoad(MVT::i32, dl, DAG.getEntryNode(), + SDValue Load = DAG.getLoad(MVT::i32, dl, DAG.getEntryNode(), CP, MachinePointerInfo::getConstantPool(), false, false, 0); SDValue Lo = DAG.getNode(MipsISD::Lo, dl, MVT::i32, CP); @@ -617,14 +617,14 @@ #include "MipsGenCallingConv.inc" //===----------------------------------------------------------------------===// -// TODO: Implement a generic logic using tblgen that can support this. +// TODO: Implement a generic logic using tblgen that can support this. // Mips O32 ABI rules: // --- // i32 - Passed in A0, A1, A2, A3 and stack -// f32 - Only passed in f32 registers if no int reg has been used yet to hold +// f32 - Only passed in f32 registers if no int reg has been used yet to hold // an argument. Otherwise, passed in A1, A2, A3 and stack. -// f64 - Only passed in two aliased f32 registers if no int reg has been used -// yet to hold an argument. Otherwise, use A2, A3 and stack. If A1 is +// f64 - Only passed in two aliased f32 registers if no int reg has been used +// yet to hold an argument. Otherwise, use A2, A3 and stack. If A1 is // not used, it must be shadowed. If only A3 is avaiable, shadow it and // go to stack. //===----------------------------------------------------------------------===// @@ -633,7 +633,7 @@ MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State) { - static const unsigned IntRegsSize=4, FloatRegsSize=2; + static const unsigned IntRegsSize=4, FloatRegsSize=2; static const unsigned IntRegs[] = { Mips::A0, Mips::A1, Mips::A2, Mips::A3 @@ -681,7 +681,7 @@ Reg = Mips::A2; for (;UnallocIntReg < IntRegsSize; ++UnallocIntReg) State.AllocateReg(UnallocIntReg); - } + } LocVT = MVT::i32; } @@ -739,7 +739,7 @@ IntRegs[UnallocIntReg] == (unsigned (Mips::A2))) { unsigned Reg = State.AllocateReg(IntRegs, IntRegsSize); State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, MVT::i32, LocInfo)); - // Shadow the next register so it can be used + // Shadow the next register so it can be used // later to get the other 32bit part. State.AllocateReg(IntRegs, IntRegsSize); return false; @@ -791,11 +791,11 @@ if (Subtarget->isABI_O32()) { int VTsize = MVT(MVT::i32).getSizeInBits()/8; MFI->CreateFixedObject(VTsize, (VTsize*3), true); - CCInfo.AnalyzeCallOperands(Outs, + CCInfo.AnalyzeCallOperands(Outs, isVarArg ? CC_MipsO32_VarArgs : CC_MipsO32); } else CCInfo.AnalyzeCallOperands(Outs, CC_Mips); - + // Get a count of how many bytes are to be pushed on the stack. unsigned NumBytes = CCInfo.getNextStackOffset(); Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(NumBytes, true)); @@ -804,7 +804,7 @@ SmallVector, 16> RegsToPass; SmallVector MemOpChains; - // First/LastArgStackLoc contains the first/last + // First/LastArgStackLoc contains the first/last // "at stack" argument location. int LastArgStackLoc = 0; unsigned FirstStackArgLoc = (Subtarget->isABI_EABI() ? 0 : 16); @@ -817,12 +817,12 @@ // Promote the value if needed. switch (VA.getLocInfo()) { default: llvm_unreachable("Unknown loc info!"); - case CCValAssign::Full: + case CCValAssign::Full: if (Subtarget->isABI_O32() && VA.isRegLoc()) { if (VA.getValVT() == MVT::f32 && VA.getLocVT() == MVT::i32) - Arg = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i32, Arg); + Arg = DAG.getNode(ISD::BITCAST, dl, MVT::i32, Arg); if (VA.getValVT() == MVT::f64 && VA.getLocVT() == MVT::i32) { - Arg = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i64, Arg); + Arg = DAG.getNode(ISD::BITCAST, dl, MVT::i64, Arg); SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Arg, DAG.getConstant(0, getPointerTy())); SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Arg, @@ -830,7 +830,7 @@ RegsToPass.push_back(std::make_pair(VA.getLocReg(), Lo)); RegsToPass.push_back(std::make_pair(VA.getLocReg()+1, Hi)); continue; - } + } } break; case CCValAssign::SExt: @@ -843,17 +843,17 @@ Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); break; } - - // Arguments that can be passed on register must be kept at + + // Arguments that can be passed on register must be kept at // RegsToPass vector if (VA.isRegLoc()) { RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); continue; } - + // Register can't get to this point... assert(VA.isMemLoc()); - + // Create the frame index object for this incoming parameter // This guarantees that when allocating Local Area the firsts // 16 bytes which are alwayes reserved won't be overwritten @@ -864,7 +864,7 @@ SDValue PtrOff = DAG.getFrameIndex(FI,getPointerTy()); - // emit ISD::STORE whichs stores the + // emit ISD::STORE whichs stores the // parameter value to a stack Location MemOpChains.push_back(DAG.getStore(Chain, dl, Arg, PtrOff, MachinePointerInfo(), @@ -873,34 +873,34 @@ // Transform all store nodes into one single node because all store // nodes are independent of each other. - if (!MemOpChains.empty()) - Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, + if (!MemOpChains.empty()) + Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &MemOpChains[0], MemOpChains.size()); - // Build a sequence of copy-to-reg nodes chained together with token + // Build a sequence of copy-to-reg nodes chained together with token // chain and flag operands which copy the outgoing args into registers. // The InFlag in necessary since all emited instructions must be // stuck together. SDValue InFlag; for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { - Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, + Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, RegsToPass[i].second, InFlag); InFlag = Chain.getValue(1); } // If the callee is a GlobalAddress/ExternalSymbol node (quite common, every - // direct call is) turn it into a TargetGlobalAddress/TargetExternalSymbol - // node so that legalize doesn't hack it. + // direct call is) turn it into a TargetGlobalAddress/TargetExternalSymbol + // node so that legalize doesn't hack it. unsigned char OpFlag = IsPIC ? MipsII::MO_GOT_CALL : MipsII::MO_NO_FLAG; - if (GlobalAddressSDNode *G = dyn_cast(Callee)) - Callee = DAG.getTargetGlobalAddress(G->getGlobal(), dl, + if (GlobalAddressSDNode *G = dyn_cast(Callee)) + Callee = DAG.getTargetGlobalAddress(G->getGlobal(), dl, getPointerTy(), 0, OpFlag); else if (ExternalSymbolSDNode *S = dyn_cast(Callee)) - Callee = DAG.getTargetExternalSymbol(S->getSymbol(), + Callee = DAG.getTargetExternalSymbol(S->getSymbol(), getPointerTy(), OpFlag); // MipsJmpLink = #chain, #target_address, #opt_in_flags... - // = Chain, Callee, Reg#1, Reg#2, ... + // = Chain, Callee, Reg#1, Reg#2, ... // // Returns a chain & a flag for retval copy to use. SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Flag); @@ -908,7 +908,7 @@ Ops.push_back(Chain); Ops.push_back(Callee); - // Add argument registers to the end of the list so that they are + // Add argument registers to the end of the list so that they are // known live into the call. for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) Ops.push_back(DAG.getRegister(RegsToPass[i].first, @@ -920,17 +920,17 @@ Chain = DAG.getNode(MipsISD::JmpLink, dl, NodeTys, &Ops[0], Ops.size()); InFlag = Chain.getValue(1); - // Create a stack location to hold GP when PIC is used. This stack - // location is used on function prologue to save GP and also after all - // emited CALL's to restore GP. + // Create a stack location to hold GP when PIC is used. This stack + // location is used on function prologue to save GP and also after all + // emited CALL's to restore GP. if (IsPIC) { - // Function can have an arbitrary number of calls, so + // Function can have an arbitrary number of calls, so // hold the LastArgStackLoc with the biggest offset. int FI; MipsFunctionInfo *MipsFI = MF.getInfo(); if (LastArgStackLoc >= MipsFI->getGPStackOffset()) { LastArgStackLoc = (!LastArgStackLoc) ? (16) : (LastArgStackLoc+4); - // Create the frame index only once. SPOffset here can be anything + // Create the frame index only once. SPOffset here can be anything // (this will be fixed on processFunctionBeforeFrameFinalized) if (MipsFI->getGPStackOffset() == -1) { FI = MFI->CreateFixedObject(4, 0, true); @@ -946,10 +946,10 @@ MachinePointerInfo::getFixedStack(FI), false, false, 0); Chain = GPLoad.getValue(1); - Chain = DAG.getCopyToReg(Chain, dl, DAG.getRegister(Mips::GP, MVT::i32), + Chain = DAG.getCopyToReg(Chain, dl, DAG.getRegister(Mips::GP, MVT::i32), GPLoad, SDValue(0,0)); InFlag = Chain.getValue(1); - } + } // Create the CALLSEQ_END node. Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(NumBytes, true), @@ -993,7 +993,7 @@ // Formal Arguments Calling Convention Implementation //===----------------------------------------------------------------------===// -/// LowerFormalArguments - transform physical registers into virtual registers +/// LowerFormalArguments - transform physical registers into virtual registers /// and generate load operations for arguments places on the stack. SDValue MipsTargetLowering::LowerFormalArguments(SDValue Chain, @@ -1023,7 +1023,7 @@ ArgLocs, *DAG.getContext()); if (Subtarget->isABI_O32()) - CCInfo.AnalyzeFormalArguments(Ins, + CCInfo.AnalyzeFormalArguments(Ins, isVarArg ? CC_MipsO32_VarArgs : CC_MipsO32); else CCInfo.AnalyzeFormalArguments(Ins, CC_Mips); @@ -1042,22 +1042,22 @@ TargetRegisterClass *RC = 0; if (RegVT == MVT::i32) - RC = Mips::CPURegsRegisterClass; - else if (RegVT == MVT::f32) + RC = Mips::CPURegsRegisterClass; + else if (RegVT == MVT::f32) RC = Mips::FGR32RegisterClass; else if (RegVT == MVT::f64) { - if (!Subtarget->isSingleFloat()) + if (!Subtarget->isSingleFloat()) RC = Mips::AFGR64RegisterClass; - } else + } else llvm_unreachable("RegVT not supported by FormalArguments Lowering"); - // Transform the arguments stored on + // Transform the arguments stored on // physical registers into virtual ones unsigned Reg = AddLiveIn(DAG.getMachineFunction(), ArgRegEnd, RC); SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, RegVT); - - // If this is an 8 or 16-bit value, it has been passed promoted - // to 32 bits. Insert an assert[sz]ext to capture this, then + + // If this is an 8 or 16-bit value, it has been passed promoted + // to 32 bits. Insert an assert[sz]ext to capture this, then // truncate to the right size. if (VA.getLocInfo() != CCValAssign::Full) { unsigned Opcode = 0; @@ -1066,21 +1066,21 @@ else if (VA.getLocInfo() == CCValAssign::ZExt) Opcode = ISD::AssertZext; if (Opcode) - ArgValue = DAG.getNode(Opcode, dl, RegVT, ArgValue, + ArgValue = DAG.getNode(Opcode, dl, RegVT, ArgValue, DAG.getValueType(VA.getValVT())); ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); } - // Handle O32 ABI cases: i32->f32 and (i32,i32)->f64 + // Handle O32 ABI cases: i32->f32 and (i32,i32)->f64 if (Subtarget->isABI_O32()) { - if (RegVT == MVT::i32 && VA.getValVT() == MVT::f32) - ArgValue = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f32, ArgValue); + if (RegVT == MVT::i32 && VA.getValVT() == MVT::f32) + ArgValue = DAG.getNode(ISD::BITCAST, dl, MVT::f32, ArgValue); if (RegVT == MVT::i32 && VA.getValVT() == MVT::f64) { - unsigned Reg2 = AddLiveIn(DAG.getMachineFunction(), + unsigned Reg2 = AddLiveIn(DAG.getMachineFunction(), VA.getLocReg()+1, RC); SDValue ArgValue2 = DAG.getCopyFromReg(Chain, dl, Reg2, RegVT); - SDValue Hi = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f32, ArgValue); - SDValue Lo = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f32, ArgValue2); + SDValue Hi = DAG.getNode(ISD::BITCAST, dl, MVT::f32, ArgValue); + SDValue Lo = DAG.getNode(ISD::BITCAST, dl, MVT::f32, ArgValue2); ArgValue = DAG.getNode(ISD::BUILD_PAIR, dl, MVT::f64, Lo, Hi); } } @@ -1093,13 +1093,13 @@ // The last argument is not a register anymore ArgRegEnd = 0; - - // The stack pointer offset is relative to the caller stack frame. - // Since the real stack size is unknown here, a negative SPOffset + + // The stack pointer offset is relative to the caller stack frame. + // Since the real stack size is unknown here, a negative SPOffset // is used so there's a way to adjust these offsets when the stack - // size get known (on EliminateFrameIndex). A dummy SPOffset is + // size get known (on EliminateFrameIndex). A dummy SPOffset is // used instead of a direct negative address (which is recorded to - // be used on emitPrologue) to avoid mis-calc of the first stack + // be used on emitPrologue) to avoid mis-calc of the first stack // offset on PEI::calculateFrameObjectOffsets. // Arguments are always 32-bit. unsigned ArgSize = VA.getLocVT().getSizeInBits()/8; @@ -1130,11 +1130,11 @@ // To meet ABI, when VARARGS are passed on registers, the registers // must have their values written to the caller stack frame. If the last - // argument was placed in the stack, there's no need to save any register. + // argument was placed in the stack, there's no need to save any register. if ((isVarArg) && (Subtarget->isABI_O32() && ArgRegEnd)) { if (StackPtr.getNode() == 0) StackPtr = DAG.getRegister(StackReg, getPointerTy()); - + // The last register argument that must be saved is Mips::A3 TargetRegisterClass *RC = Mips::CPURegsRegisterClass; unsigned StackLoc = ArgLocs.size()-1; @@ -1157,7 +1157,7 @@ } } - // All stores are grouped in one node to allow the matching between + // All stores are grouped in one node to allow the matching between // the size of Ins and InVals. This only happens when on varg functions if (!OutChains.empty()) { OutChains.push_back(Chain); @@ -1190,7 +1190,7 @@ // Analize return values. CCInfo.AnalyzeReturn(Outs, RetCC_Mips); - // If this is the first return lowered for this function, add + // If this is the first return lowered for this function, add // the regs to the liveout set for the function. if (DAG.getMachineFunction().getRegInfo().liveout_empty()) { for (unsigned i = 0; i != RVLocs.size(); ++i) @@ -1205,7 +1205,7 @@ CCValAssign &VA = RVLocs[i]; assert(VA.isRegLoc() && "Can only return in registers!"); - Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), + Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), OutVals[i], Flag); // guarantee that all emitted copies are @@ -1222,7 +1222,7 @@ MipsFunctionInfo *MipsFI = MF.getInfo(); unsigned Reg = MipsFI->getSRetReturnReg(); - if (!Reg) + if (!Reg) llvm_unreachable("sret virtual register not created in the entry block"); SDValue Val = DAG.getCopyFromReg(Chain, dl, Reg, getPointerTy()); @@ -1232,10 +1232,10 @@ // Return on Mips is always a "jr $ra" if (Flag.getNode()) - return DAG.getNode(MipsISD::Ret, dl, MVT::Other, + return DAG.getNode(MipsISD::Ret, dl, MVT::Other, Chain, DAG.getRegister(Mips::RA, MVT::i32), Flag); else // Return Void - return DAG.getNode(MipsISD::Ret, dl, MVT::Other, + return DAG.getNode(MipsISD::Ret, dl, MVT::Other, Chain, DAG.getRegister(Mips::RA, MVT::i32)); } @@ -1246,21 +1246,21 @@ /// getConstraintType - Given a constraint letter, return the type of /// constraint it is for this target. MipsTargetLowering::ConstraintType MipsTargetLowering:: -getConstraintType(const std::string &Constraint) const +getConstraintType(const std::string &Constraint) const { - // Mips specific constrainy + // Mips specific constrainy // GCC config/mips/constraints.md // - // 'd' : An address register. Equivalent to r - // unless generating MIPS16 code. - // 'y' : Equivalent to r; retained for - // backwards compatibility. - // 'f' : Floating Point registers. + // 'd' : An address register. Equivalent to r + // unless generating MIPS16 code. + // 'y' : Equivalent to r; retained for + // backwards compatibility. + // 'f' : Floating Point registers. if (Constraint.size() == 1) { switch (Constraint[0]) { default : break; - case 'd': - case 'y': + case 'd': + case 'y': case 'f': return C_RegisterClass; break; @@ -1287,8 +1287,8 @@ default: weight = TargetLowering::getSingleConstraintMatchWeight(info, constraint); break; - case 'd': - case 'y': + case 'd': + case 'y': if (type->isIntegerTy()) weight = CW_Register; break; @@ -1313,7 +1313,7 @@ case 'f': if (VT == MVT::f32) return std::make_pair(0U, Mips::FGR32RegisterClass); - if (VT == MVT::f64) + if (VT == MVT::f64) if ((!Subtarget->isSingleFloat()) && (!Subtarget->isFP64bit())) return std::make_pair(0U, Mips::AFGR64RegisterClass); } @@ -1331,15 +1331,15 @@ if (Constraint.size() != 1) return std::vector(); - switch (Constraint[0]) { + switch (Constraint[0]) { default : break; case 'r': // GCC Mips Constraint Letters - case 'd': - case 'y': - return make_vector(Mips::T0, Mips::T1, Mips::T2, Mips::T3, - Mips::T4, Mips::T5, Mips::T6, Mips::T7, Mips::S0, Mips::S1, - Mips::S2, Mips::S3, Mips::S4, Mips::S5, Mips::S6, Mips::S7, + case 'd': + case 'y': + return make_vector(Mips::T0, Mips::T1, Mips::T2, Mips::T3, + Mips::T4, Mips::T5, Mips::T6, Mips::T7, Mips::S0, Mips::S1, + Mips::S2, Mips::S3, Mips::S4, Mips::S5, Mips::S6, Mips::S7, Mips::T8, 0); case 'f': @@ -1351,15 +1351,15 @@ Mips::F25, Mips::F26, Mips::F27, Mips::F28, Mips::F29, Mips::F30, Mips::F31, 0); else - return make_vector(Mips::F2, Mips::F4, Mips::F6, Mips::F8, - Mips::F10, Mips::F20, Mips::F22, Mips::F24, Mips::F26, + return make_vector(Mips::F2, Mips::F4, Mips::F6, Mips::F8, + Mips::F10, Mips::F20, Mips::F22, Mips::F24, Mips::F26, Mips::F28, Mips::F30, 0); } - if (VT == MVT::f64) + if (VT == MVT::f64) if ((!Subtarget->isSingleFloat()) && (!Subtarget->isFP64bit())) - return make_vector(Mips::D1, Mips::D2, Mips::D3, Mips::D4, - Mips::D5, Mips::D10, Mips::D11, Mips::D12, Mips::D13, + return make_vector(Mips::D1, Mips::D2, Mips::D3, Mips::D4, + Mips::D5, Mips::D10, Mips::D11, Mips::D12, Mips::D13, Mips::D14, Mips::D15, 0); } return std::vector(); Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=119990&r1=119989&r2=119990&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Mon Nov 22 21:31:01 2010 @@ -76,7 +76,7 @@ // On PPC32/64, arguments smaller than 4/8 bytes are extended, so all // arguments are at least 4/8 bytes aligned. setMinStackArgumentAlignment(TM.getSubtarget().isPPC64() ? 8:4); - + // Set up the register classes. addRegisterClass(MVT::i32, PPC::GPRCRegisterClass); addRegisterClass(MVT::f32, PPC::F4RCRegisterClass); @@ -178,10 +178,10 @@ setOperationAction(ISD::SINT_TO_FP, MVT::i32, Expand); setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand); - setOperationAction(ISD::BIT_CONVERT, MVT::f32, Expand); - setOperationAction(ISD::BIT_CONVERT, MVT::i32, Expand); - setOperationAction(ISD::BIT_CONVERT, MVT::i64, Expand); - setOperationAction(ISD::BIT_CONVERT, MVT::f64, Expand); + setOperationAction(ISD::BITCAST, MVT::f32, Expand); + setOperationAction(ISD::BITCAST, MVT::i32, Expand); + setOperationAction(ISD::BITCAST, MVT::i64, Expand); + setOperationAction(ISD::BITCAST, MVT::f64, Expand); // We cannot sextinreg(i1). Expand to shifts. setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand); @@ -549,7 +549,7 @@ /// isVMRGLShuffleMask - Return true if this is a shuffle mask suitable for /// a VRGL* instruction with the specified unit size (1,2 or 4 bytes). -bool PPC::isVMRGLShuffleMask(ShuffleVectorSDNode *N, unsigned UnitSize, +bool PPC::isVMRGLShuffleMask(ShuffleVectorSDNode *N, unsigned UnitSize, bool isUnary) { if (!isUnary) return isVMerge(N, UnitSize, 8, 24); @@ -558,7 +558,7 @@ /// isVMRGHShuffleMask - Return true if this is a shuffle mask suitable for /// a VRGH* instruction with the specified unit size (1,2 or 4 bytes). -bool PPC::isVMRGHShuffleMask(ShuffleVectorSDNode *N, unsigned UnitSize, +bool PPC::isVMRGHShuffleMask(ShuffleVectorSDNode *N, unsigned UnitSize, bool isUnary) { if (!isUnary) return isVMerge(N, UnitSize, 0, 16); @@ -573,7 +573,7 @@ "PPC only supports shuffles by bytes!"); ShuffleVectorSDNode *SVOp = cast(N); - + // Find the first non-undef value in the shuffle mask. unsigned i; for (i = 0; i != 16 && SVOp->getMaskElt(i) < 0; ++i) @@ -611,7 +611,7 @@ // This is a splat operation if each element of the permute is the same, and // if the value doesn't reference the second vector. unsigned ElementBase = N->getMaskElt(0); - + // FIXME: Handle UNDEF elements too! if (ElementBase >= 16) return false; @@ -639,7 +639,7 @@ APInt APVal, APUndef; unsigned BitSize; bool HasAnyUndefs; - + if (BV->isConstantSplat(APVal, APUndef, BitSize, HasAnyUndefs, 32, true)) if (ConstantFPSDNode *CFP = dyn_cast(N->getOperand(0))) return CFP->getValueAPF().isNegZero(); @@ -1104,10 +1104,10 @@ unsigned &LoOpFlags, const GlobalValue *GV = 0) { HiOpFlags = PPCII::MO_HA16; LoOpFlags = PPCII::MO_LO16; - + // Don't use the pic base if not in PIC relocation model. Or if we are on a // non-darwin platform. We don't support PIC on other platforms yet. - bool isPIC = TM.getRelocationModel() == Reloc::PIC_ && + bool isPIC = TM.getRelocationModel() == Reloc::PIC_ && TM.getSubtarget().isDarwin(); if (isPIC) { HiOpFlags |= PPCII::MO_PIC_FLAG; @@ -1119,13 +1119,13 @@ if (GV && TM.getSubtarget().hasLazyResolverStub(GV, TM)) { HiOpFlags |= PPCII::MO_NLP_FLAG; LoOpFlags |= PPCII::MO_NLP_FLAG; - + if (GV->hasHiddenVisibility()) { HiOpFlags |= PPCII::MO_NLP_HIDDEN_FLAG; LoOpFlags |= PPCII::MO_NLP_HIDDEN_FLAG; } } - + return isPIC; } @@ -1137,12 +1137,12 @@ SDValue Hi = DAG.getNode(PPCISD::Hi, DL, PtrVT, HiPart, Zero); SDValue Lo = DAG.getNode(PPCISD::Lo, DL, PtrVT, LoPart, Zero); - + // With PIC, the first instruction is actually "GR+hi(&G)". if (isPIC) Hi = DAG.getNode(ISD::ADD, DL, PtrVT, DAG.getNode(PPCISD::GlobalBaseReg, DL, PtrVT), Hi); - + // Generate non-pic code that has direct accesses to the constant pool. // The address of the global is just (hi(&g)+lo(&g)). return DAG.getNode(ISD::ADD, DL, PtrVT, Hi, Lo); @@ -1166,7 +1166,7 @@ SDValue PPCTargetLowering::LowerJumpTable(SDValue Op, SelectionDAG &DAG) const { EVT PtrVT = Op.getValueType(); JumpTableSDNode *JT = cast(Op); - + unsigned MOHiFlag, MOLoFlag; bool isPIC = GetLabelAccessInfo(DAG.getTarget(), MOHiFlag, MOLoFlag); SDValue JTIHi = DAG.getTargetJumpTable(JT->getIndex(), PtrVT, MOHiFlag); @@ -1180,7 +1180,7 @@ DebugLoc DL = Op.getDebugLoc(); const BlockAddress *BA = cast(Op)->getBlockAddress(); - + unsigned MOHiFlag, MOLoFlag; bool isPIC = GetLabelAccessInfo(DAG.getTarget(), MOHiFlag, MOLoFlag); SDValue TgtBAHi = DAG.getBlockAddress(BA, PtrVT, /*isTarget=*/true, MOHiFlag); @@ -1210,7 +1210,7 @@ DAG.getTargetGlobalAddress(GV, DL, PtrVT, GSDN->getOffset(), MOHiFlag); SDValue GALo = DAG.getTargetGlobalAddress(GV, DL, PtrVT, GSDN->getOffset(), MOLoFlag); - + SDValue Ptr = LowerLabelRef(GAHi, GALo, isPIC, DAG); // If the global reference is actually to a non-lazy-pointer, we have to do an @@ -1429,7 +1429,7 @@ PPC::R7, PPC::R8, PPC::R9, PPC::R10, }; const unsigned NumArgRegs = array_lengthof(ArgRegs); - + unsigned RegNum = State.getFirstUnallocated(ArgRegs, NumArgRegs); // Skip one register if the first unallocated register has an even register @@ -1439,7 +1439,7 @@ if (RegNum != NumArgRegs && RegNum % 2 == 1) { State.AllocateReg(ArgRegs[RegNum]); } - + // Always return false here, as this function only makes sure that the first // unallocated register has an odd register number and does not actually // allocate a register for the current argument. @@ -1457,7 +1457,7 @@ }; const unsigned NumArgRegs = array_lengthof(ArgRegs); - + unsigned RegNum = State.getFirstUnallocated(ArgRegs, NumArgRegs); // If there is only one Floating-point register left we need to put both f64 @@ -1465,7 +1465,7 @@ if (RegNum != NumArgRegs && ArgRegs[RegNum] == PPC::F8) { State.AllocateReg(ArgRegs[RegNum]); } - + // Always return false here, as this function only makes sure that the two f64 // values a ppc_fp128 value is split into are both passed in registers or both // passed on the stack and does not actually allocate a register for the @@ -1550,7 +1550,7 @@ // Specifications: // System V Application Binary Interface PowerPC Processor Supplement // AltiVec Technology Programming Interface Manual - + MachineFunction &MF = DAG.getMachineFunction(); MachineFrameInfo *MFI = MF.getFrameInfo(); PPCFunctionInfo *FuncInfo = MF.getInfo(); @@ -1569,15 +1569,15 @@ CCInfo.AllocateStack(PPCFrameInfo::getLinkageSize(false, false), PtrByteSize); CCInfo.AnalyzeFormalArguments(Ins, CC_PPC_SVR4); - + for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { CCValAssign &VA = ArgLocs[i]; - + // Arguments stored in registers. if (VA.isRegLoc()) { TargetRegisterClass *RC; EVT ValVT = VA.getValVT(); - + switch (ValVT.getSimpleVT().SimpleTy) { default: llvm_unreachable("ValVT not supported by formal arguments Lowering"); @@ -1597,7 +1597,7 @@ RC = PPC::VRRCRegisterClass; break; } - + // Transform the arguments stored in physical registers into virtual ones. unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC); SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, ValVT); @@ -1633,7 +1633,7 @@ // Area that is at least reserved in the caller of this function. unsigned MinReservedArea = CCByValInfo.getNextStackOffset(); - + // Set the size that is at least reserved in caller of this function. Tail // call optimized function's reserved stack space needs to be aligned so that // taking the difference between two stack areas will result in an aligned @@ -1643,16 +1643,16 @@ MinReservedArea = std::max(MinReservedArea, PPCFrameInfo::getMinCallFrameSize(false, false)); - + unsigned TargetAlign = DAG.getMachineFunction().getTarget().getFrameInfo()-> getStackAlignment(); unsigned AlignMask = TargetAlign-1; MinReservedArea = (MinReservedArea + AlignMask) & ~AlignMask; - + FI->setMinReservedArea(MinReservedArea); SmallVector MemOps; - + // If the function takes variable number of arguments, make a frame index for // the start of the first vararg value... for expansion of llvm.va_start. if (isVarArg) { @@ -1883,9 +1883,9 @@ MemOps.push_back(Store); ++GPR_idx; } - + ArgOffset += PtrByteSize; - + continue; } for (unsigned j = 0; j < ArgSize; j += PtrByteSize) { @@ -2064,7 +2064,7 @@ // result of va_next. for (; GPR_idx != Num_GPR_Regs; ++GPR_idx) { unsigned VReg; - + if (isPPC64) VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::G8RCRegClass); else @@ -2331,7 +2331,7 @@ LROpOut = DAG.getLoad(VT, dl, Chain, LROpOut, MachinePointerInfo(), false, false, 0); Chain = SDValue(LROpOut.getNode(), 1); - + // When using the 32/64-bit SVR4 ABI there is no need to load the FP stack // slot as the FP is never overwritten. if (isDarwinABI) { @@ -2421,7 +2421,7 @@ SmallVector, 8> &RegsToPass, SmallVector &Ops, std::vector &NodeTys, const PPCSubtarget &PPCSubTarget) { - + bool isPPC64 = PPCSubTarget.isPPC64(); bool isSVR4ABI = PPCSubTarget.isSVR4ABI(); @@ -2437,7 +2437,7 @@ Callee = SDValue(Dest, 0); needIndirectCall = false; } - + if (GlobalAddressSDNode *G = dyn_cast(Callee)) { // XXX Work around for http://llvm.org/bugs/show_bug.cgi?id=5201 // Use indirect calls for ALL functions calls in JIT mode, since the @@ -2453,7 +2453,7 @@ // automatically synthesizes these stubs. OpFlags = PPCII::MO_DARWIN_STUB; } - + // If the callee is a GlobalAddress/ExternalSymbol node (quite common, // every direct call is) turn it into a TargetGlobalAddress / // TargetExternalSymbol node so that legalize doesn't hack it. @@ -2461,12 +2461,12 @@ Callee.getValueType(), 0, OpFlags); needIndirectCall = false; - } + } } - + if (ExternalSymbolSDNode *S = dyn_cast(Callee)) { unsigned char OpFlags = 0; - + if (DAG.getTarget().getRelocationModel() != Reloc::Static && PPCSubTarget.getDarwinVers() < 9) { // PC-relative references to external symbols should go through $stub, @@ -2474,12 +2474,12 @@ // automatically synthesizes these stubs. OpFlags = PPCII::MO_DARWIN_STUB; } - + Callee = DAG.getTargetExternalSymbol(S->getSymbol(), Callee.getValueType(), OpFlags); needIndirectCall = false; } - + if (needIndirectCall) { // Otherwise, this is an indirect call. We have to use a MTCTR/BCTRL pair // to do the call, we can't use PPCISD::CALL. @@ -2750,7 +2750,7 @@ // in this function's (MF) stack pointer stack slot 0(SP). if (GuaranteedTailCallOpt && CallConv==CallingConv::Fast) MF.getInfo()->setHasFastCall(); - + // Count how many bytes are to be pushed on the stack, including the linkage // area, parameter list area and the part of the local variable space which // contains copies of aggregates which are passed by value. @@ -2768,12 +2768,12 @@ // Fixed vector arguments go into registers as long as registers are // available. Variable vector arguments always go into memory. unsigned NumArgs = Outs.size(); - + for (unsigned i = 0; i != NumArgs; ++i) { MVT ArgVT = Outs[i].VT; ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; bool Result; - + if (Outs[i].IsFixed) { Result = CC_PPC_SVR4(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, CCInfo); @@ -2781,7 +2781,7 @@ Result = CC_PPC_SVR4_VarArg(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, CCInfo); } - + if (Result) { #ifndef NDEBUG errs() << "Call operand #" << i << " has unhandled type " @@ -2794,7 +2794,7 @@ // All arguments are treated the same. CCInfo.AnalyzeCallOperands(Outs, CC_PPC_SVR4); } - + // Assign locations to all of the outgoing aggregate by value arguments. SmallVector ByValArgLocs; CCState CCByValInfo(CallConv, isVarArg, getTargetMachine(), ByValArgLocs, @@ -2809,7 +2809,7 @@ // space variable where copies of aggregates which are passed by value are // stored. unsigned NumBytes = CCByValInfo.getNextStackOffset(); - + // Calculate by how many bytes the stack has to be adjusted in case of tail // call optimization. int SPDiff = CalculateTailCallSPDiff(DAG, isTailCall, NumBytes); @@ -2829,7 +2829,7 @@ // arguments that may not fit in the registers available for argument // passing. SDValue StackPtr = DAG.getRegister(PPC::R1, MVT::i32); - + SmallVector, 8> RegsToPass; SmallVector TailCallArguments; SmallVector MemOpChains; @@ -2841,7 +2841,7 @@ CCValAssign &VA = ArgLocs[i]; SDValue Arg = OutVals[i]; ISD::ArgFlagsTy Flags = Outs[i].Flags; - + if (Flags.isByVal()) { // Argument is an aggregate which is passed by value, thus we need to // create a copy of it in the local variable space of the current stack @@ -2850,33 +2850,33 @@ assert((j < ByValArgLocs.size()) && "Index out of bounds!"); CCValAssign &ByValVA = ByValArgLocs[j++]; assert((VA.getValNo() == ByValVA.getValNo()) && "ValNo mismatch!"); - + // Memory reserved in the local variable space of the callers stack frame. unsigned LocMemOffset = ByValVA.getLocMemOffset(); - + SDValue PtrOff = DAG.getIntPtrConstant(LocMemOffset); PtrOff = DAG.getNode(ISD::ADD, dl, getPointerTy(), StackPtr, PtrOff); - + // Create a copy of the argument in the local area of the current // stack frame. SDValue MemcpyCall = CreateCopyOfByValArgument(Arg, PtrOff, CallSeqStart.getNode()->getOperand(0), Flags, DAG, dl); - + // This must go outside the CALLSEQ_START..END. SDValue NewCallSeqStart = DAG.getCALLSEQ_START(MemcpyCall, CallSeqStart.getNode()->getOperand(1)); DAG.ReplaceAllUsesWith(CallSeqStart.getNode(), NewCallSeqStart.getNode()); Chain = CallSeqStart = NewCallSeqStart; - + // Pass the address of the aggregate copy on the stack either in a // physical register or in the parameter list area of the current stack // frame to the callee. Arg = PtrOff; } - + if (VA.isRegLoc()) { // Put argument in a physical register. RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); @@ -2899,11 +2899,11 @@ } } } - + if (!MemOpChains.empty()) Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &MemOpChains[0], MemOpChains.size()); - + // Build a sequence of copy-to-reg nodes chained together with token chain // and flag operands which copy the outgoing args into the appropriate regs. SDValue InFlag; @@ -2912,7 +2912,7 @@ RegsToPass[i].second, InFlag); InFlag = Chain.getValue(1); } - + // Set CR6 to true if this is a vararg call. if (isVarArg) { SDValue SetCR(DAG.getMachineNode(PPC::CRSET, dl, MVT::i32), 0); @@ -3187,7 +3187,7 @@ MachinePointerInfo(), false, false, 0); MemOpChains.push_back(Store); if (VR_idx != NumVRs) { - SDValue Load = DAG.getLoad(MVT::v4f32, dl, Store, PtrOff, + SDValue Load = DAG.getLoad(MVT::v4f32, dl, Store, PtrOff, MachinePointerInfo(), false, false, 0); MemOpChains.push_back(Load.getValue(1)); @@ -3272,7 +3272,7 @@ // On Darwin, R12 must contain the address of an indirect callee. This does // not mean the MTCTR instruction must use R12; it's easier to model this as // an extra parameter, so do that. - if (!isTailCall && + if (!isTailCall && !dyn_cast(Callee) && !dyn_cast(Callee) && !isBLACompatibleAddress(Callee, DAG)) @@ -3523,7 +3523,7 @@ default: llvm_unreachable("Unhandled FP_TO_INT type in custom expander!"); case MVT::i32: Tmp = DAG.getNode(Op.getOpcode()==ISD::FP_TO_SINT ? PPCISD::FCTIWZ : - PPCISD::FCTIDZ, + PPCISD::FCTIDZ, dl, MVT::f64, Src); break; case MVT::i64: @@ -3555,8 +3555,7 @@ return SDValue(); if (Op.getOperand(0).getValueType() == MVT::i64) { - SDValue Bits = DAG.getNode(ISD::BIT_CONVERT, dl, - MVT::f64, Op.getOperand(0)); + SDValue Bits = DAG.getNode(ISD::BITCAST, dl, MVT::f64, Op.getOperand(0)); SDValue FP = DAG.getNode(PPCISD::FCFID, dl, MVT::f64, Bits); if (Op.getValueType() == MVT::f32) FP = DAG.getNode(ISD::FP_ROUND, dl, @@ -3777,7 +3776,7 @@ Ops.assign(CanonicalVT.getVectorNumElements(), Elt); SDValue Res = DAG.getNode(ISD::BUILD_VECTOR, dl, CanonicalVT, &Ops[0], Ops.size()); - return DAG.getNode(ISD::BIT_CONVERT, dl, ReqVT, Res); + return DAG.getNode(ISD::BITCAST, dl, ReqVT, Res); } /// BuildIntrinsicOp - Return a binary operator intrinsic node with the @@ -3806,14 +3805,14 @@ static SDValue BuildVSLDOI(SDValue LHS, SDValue RHS, unsigned Amt, EVT VT, SelectionDAG &DAG, DebugLoc dl) { // Force LHS/RHS to be the right type. - LHS = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v16i8, LHS); - RHS = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v16i8, RHS); + LHS = DAG.getNode(ISD::BITCAST, dl, MVT::v16i8, LHS); + RHS = DAG.getNode(ISD::BITCAST, dl, MVT::v16i8, RHS); int Ops[16]; for (unsigned i = 0; i != 16; ++i) Ops[i] = i + Amt; SDValue T = DAG.getVectorShuffle(MVT::v16i8, dl, LHS, RHS, Ops); - return DAG.getNode(ISD::BIT_CONVERT, dl, VT, T); + return DAG.getNode(ISD::BITCAST, dl, VT, T); } // If this is a case we can't handle, return null and let the default @@ -3847,7 +3846,7 @@ if (Op.getValueType() != MVT::v4i32 || HasAnyUndefs) { SDValue Z = DAG.getConstant(0, MVT::i32); Z = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32, Z, Z, Z, Z); - Op = DAG.getNode(ISD::BIT_CONVERT, dl, Op.getValueType(), Z); + Op = DAG.getNode(ISD::BITCAST, dl, Op.getValueType(), Z); } return Op; } @@ -3866,7 +3865,7 @@ if (SextVal >= -32 && SextVal <= 30 && (SextVal & 1) == 0) { SDValue Res = BuildSplatI(SextVal >> 1, SplatSize, MVT::Other, DAG, dl); Res = DAG.getNode(ISD::ADD, dl, Res.getValueType(), Res, Res); - return DAG.getNode(ISD::BIT_CONVERT, dl, Op.getValueType(), Res); + return DAG.getNode(ISD::BITCAST, dl, Op.getValueType(), Res); } // If this is 0x8000_0000 x 4, turn into vspltisw + vslw. If it is @@ -3882,7 +3881,7 @@ // xor by OnesV to invert it. Res = DAG.getNode(ISD::XOR, dl, MVT::v4i32, Res, OnesV); - return DAG.getNode(ISD::BIT_CONVERT, dl, Op.getValueType(), Res); + return DAG.getNode(ISD::BITCAST, dl, Op.getValueType(), Res); } // Check to see if this is a wide variety of vsplti*, binop self cases. @@ -3908,7 +3907,7 @@ Intrinsic::ppc_altivec_vslw }; Res = BuildIntrinsicOp(IIDs[SplatSize-1], Res, Res, DAG, dl); - return DAG.getNode(ISD::BIT_CONVERT, dl, Op.getValueType(), Res); + return DAG.getNode(ISD::BITCAST, dl, Op.getValueType(), Res); } // vsplti + srl self. @@ -3919,7 +3918,7 @@ Intrinsic::ppc_altivec_vsrw }; Res = BuildIntrinsicOp(IIDs[SplatSize-1], Res, Res, DAG, dl); - return DAG.getNode(ISD::BIT_CONVERT, dl, Op.getValueType(), Res); + return DAG.getNode(ISD::BITCAST, dl, Op.getValueType(), Res); } // vsplti + sra self. @@ -3930,7 +3929,7 @@ Intrinsic::ppc_altivec_vsraw }; Res = BuildIntrinsicOp(IIDs[SplatSize-1], Res, Res, DAG, dl); - return DAG.getNode(ISD::BIT_CONVERT, dl, Op.getValueType(), Res); + return DAG.getNode(ISD::BITCAST, dl, Op.getValueType(), Res); } // vsplti + rol self. @@ -3942,7 +3941,7 @@ Intrinsic::ppc_altivec_vrlw }; Res = BuildIntrinsicOp(IIDs[SplatSize-1], Res, Res, DAG, dl); - return DAG.getNode(ISD::BIT_CONVERT, dl, Op.getValueType(), Res); + return DAG.getNode(ISD::BITCAST, dl, Op.getValueType(), Res); } // t = vsplti c, result = vsldoi t, t, 1 @@ -3969,14 +3968,14 @@ SDValue LHS = BuildSplatI(SextVal-16, SplatSize, MVT::Other, DAG, dl); SDValue RHS = BuildSplatI(-16, SplatSize, MVT::Other, DAG, dl); LHS = DAG.getNode(ISD::SUB, dl, LHS.getValueType(), LHS, RHS); - return DAG.getNode(ISD::BIT_CONVERT, dl, Op.getValueType(), LHS); + return DAG.getNode(ISD::BITCAST, dl, Op.getValueType(), LHS); } // Odd, in range [-31,-17]: (vsplti C)+(vsplti -16). if (SextVal >= -31 && SextVal <= 0) { SDValue LHS = BuildSplatI(SextVal+16, SplatSize, MVT::Other, DAG, dl); SDValue RHS = BuildSplatI(-16, SplatSize, MVT::Other, DAG, dl); LHS = DAG.getNode(ISD::ADD, dl, LHS.getValueType(), LHS, RHS); - return DAG.getNode(ISD::BIT_CONVERT, dl, Op.getValueType(), LHS); + return DAG.getNode(ISD::BITCAST, dl, Op.getValueType(), LHS); } return SDValue(); @@ -4053,10 +4052,10 @@ return BuildVSLDOI(OpLHS, OpRHS, 12, OpLHS.getValueType(), DAG, dl); } EVT VT = OpLHS.getValueType(); - OpLHS = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v16i8, OpLHS); - OpRHS = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v16i8, OpRHS); + OpLHS = DAG.getNode(ISD::BITCAST, dl, MVT::v16i8, OpLHS); + OpRHS = DAG.getNode(ISD::BITCAST, dl, MVT::v16i8, OpRHS); SDValue T = DAG.getVectorShuffle(MVT::v16i8, dl, OpLHS, OpRHS, ShufIdxs); - return DAG.getNode(ISD::BIT_CONVERT, dl, VT, T); + return DAG.getNode(ISD::BITCAST, dl, VT, T); } /// LowerVECTOR_SHUFFLE - Return the code we lower for VECTOR_SHUFFLE. If this @@ -4109,7 +4108,7 @@ // perfect shuffle table to emit an optimal matching sequence. SmallVector PermMask; SVOp->getMask(PermMask); - + unsigned PFIndexes[4]; bool isFourElementShuffle = true; for (unsigned i = 0; i != 4 && isFourElementShuffle; ++i) { // Element number @@ -4244,7 +4243,7 @@ SDValue Tmp = DAG.getNode(PPCISD::VCMP, dl, Op.getOperand(2).getValueType(), Op.getOperand(1), Op.getOperand(2), DAG.getConstant(CompareOpc, MVT::i32)); - return DAG.getNode(ISD::BIT_CONVERT, dl, Op.getValueType(), Tmp); + return DAG.getNode(ISD::BITCAST, dl, Op.getValueType(), Tmp); } // Create the PPCISD altivec 'dot' comparison node. @@ -4327,9 +4326,9 @@ BuildIntrinsicOp(Intrinsic::ppc_altivec_vrlw, RHS, Neg16, DAG, dl); // Shrinkify inputs to v8i16. - LHS = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v8i16, LHS); - RHS = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v8i16, RHS); - RHSSwap = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v8i16, RHSSwap); + LHS = DAG.getNode(ISD::BITCAST, dl, MVT::v8i16, LHS); + RHS = DAG.getNode(ISD::BITCAST, dl, MVT::v8i16, RHS); + RHSSwap = DAG.getNode(ISD::BITCAST, dl, MVT::v8i16, RHSSwap); // Low parts multiplied together, generating 32-bit results (we ignore the // top parts). @@ -4355,12 +4354,12 @@ // Multiply the even 8-bit parts, producing 16-bit sums. SDValue EvenParts = BuildIntrinsicOp(Intrinsic::ppc_altivec_vmuleub, LHS, RHS, DAG, dl, MVT::v8i16); - EvenParts = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v16i8, EvenParts); + EvenParts = DAG.getNode(ISD::BITCAST, dl, MVT::v16i8, EvenParts); // Multiply the odd 8-bit parts, producing 16-bit sums. SDValue OddParts = BuildIntrinsicOp(Intrinsic::ppc_altivec_vmuloub, LHS, RHS, DAG, dl, MVT::v8i16); - OddParts = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v16i8, OddParts); + OddParts = DAG.getNode(ISD::BITCAST, dl, MVT::v16i8, OddParts); // Merge the results together. int Ops[16]; @@ -5568,7 +5567,7 @@ if (Depth > 0) { SDValue FrameAddr = LowerFRAMEADDR(Op, DAG); SDValue Offset = - + DAG.getConstant(PPCFrameInfo::getReturnSaveOffset(isPPC64, isDarwinABI), isPPC64? MVT::i64 : MVT::i32); return DAG.getLoad(getPointerTy(), dl, DAG.getEntryNode(), Modified: llvm/trunk/lib/Target/PowerPC/README.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/README.txt?rev=119990&r1=119989&r2=119990&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/README.txt (original) +++ llvm/trunk/lib/Target/PowerPC/README.txt Mon Nov 22 21:31:01 2010 @@ -285,8 +285,8 @@ Fix Darwin FP-In-Integer Registers ABI Darwin passes doubles in structures in integer registers, which is very very -bad. Add something like a BIT_CONVERT to LLVM, then do an i-p transformation -that percolates these things out of functions. +bad. Add something like a BITCAST to LLVM, then do an i-p transformation that +percolates these things out of functions. Check out how horrible this is: http://gcc.gnu.org/ml/gcc/2005-10/msg01036.html Modified: llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp?rev=119990&r1=119989&r2=119990&view=diff ============================================================================== --- llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp (original) +++ llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp Mon Nov 22 21:31:01 2010 @@ -66,7 +66,7 @@ CCValAssign &VA = RVLocs[i]; assert(VA.isRegLoc() && "Can only return in registers!"); - Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), + Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), OutVals[i], Flag); // Guarantee that all emitted copies are stuck together with flags. @@ -166,7 +166,7 @@ MF.getRegInfo().addLiveIn(*CurArgReg++, VReg); SDValue Arg = DAG.getCopyFromReg(Chain, dl, VReg, MVT::i32); - Arg = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f32, Arg); + Arg = DAG.getNode(ISD::BITCAST, dl, MVT::f32, Arg); InVals.push_back(Arg); } else { int FrameIdx = MF.getFrameInfo()->CreateFixedObject(4, ArgOffset, @@ -219,7 +219,7 @@ // If we want a double, do a bit convert. if (ObjectVT == MVT::f64) - WholeValue = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f64, WholeValue); + WholeValue = DAG.getNode(ISD::BITCAST, dl, MVT::f64, WholeValue); InVals.push_back(WholeValue); } @@ -383,7 +383,7 @@ ValToStore = Val; } else { // Convert this to a FP value in an int reg. - Val = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i32, Val); + Val = DAG.getNode(ISD::BITCAST, dl, MVT::i32, Val); RegsToPass.push_back(std::make_pair(ArgRegs[RegsToPass.size()], Val)); } break; @@ -397,7 +397,7 @@ // Break into top and bottom parts by storing to the stack and loading // out the parts as integers. Top part goes in a reg. SDValue StackPtr = DAG.CreateStackTemporary(MVT::f64, MVT::i32); - SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, + SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Val, StackPtr, MachinePointerInfo(), false, false, 0); // Sparc is big-endian, so the high part comes first. @@ -450,7 +450,7 @@ SDValue StackPtr = DAG.getRegister(SP::O6, MVT::i32); SDValue PtrOff = DAG.getConstant(ArgOffset, MVT::i32); PtrOff = DAG.getNode(ISD::ADD, dl, MVT::i32, StackPtr, PtrOff); - MemOpChains.push_back(DAG.getStore(Chain, dl, ValToStore, + MemOpChains.push_back(DAG.getStore(Chain, dl, ValToStore, PtrOff, MachinePointerInfo(), false, false, 0)); } @@ -612,8 +612,8 @@ setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand); setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand); - setOperationAction(ISD::BIT_CONVERT, MVT::f32, Expand); - setOperationAction(ISD::BIT_CONVERT, MVT::i32, Expand); + setOperationAction(ISD::BITCAST, MVT::f32, Expand); + setOperationAction(ISD::BITCAST, MVT::i32, Expand); // Sparc has no select or setcc: expand to SELECT_CC. setOperationAction(ISD::SELECT, MVT::i32, Expand); @@ -758,7 +758,7 @@ } } -SDValue SparcTargetLowering::LowerGlobalAddress(SDValue Op, +SDValue SparcTargetLowering::LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const { const GlobalValue *GV = cast(Op)->getGlobal(); // FIXME there isn't really any debug info here @@ -767,15 +767,15 @@ SDValue Hi = DAG.getNode(SPISD::Hi, dl, MVT::i32, GA); SDValue Lo = DAG.getNode(SPISD::Lo, dl, MVT::i32, GA); - if (getTargetMachine().getRelocationModel() != Reloc::PIC_) + if (getTargetMachine().getRelocationModel() != Reloc::PIC_) return DAG.getNode(ISD::ADD, dl, MVT::i32, Lo, Hi); - + SDValue GlobalBase = DAG.getNode(SPISD::GLOBAL_BASE_REG, dl, getPointerTy()); SDValue RelAddr = DAG.getNode(ISD::ADD, dl, MVT::i32, Lo, Hi); - SDValue AbsAddr = DAG.getNode(ISD::ADD, dl, MVT::i32, + SDValue AbsAddr = DAG.getNode(ISD::ADD, dl, MVT::i32, GlobalBase, RelAddr); - return DAG.getLoad(getPointerTy(), dl, DAG.getEntryNode(), + return DAG.getLoad(getPointerTy(), dl, DAG.getEntryNode(), AbsAddr, MachinePointerInfo(), false, false, 0); } @@ -788,15 +788,15 @@ SDValue CP = DAG.getTargetConstantPool(C, MVT::i32, N->getAlignment()); SDValue Hi = DAG.getNode(SPISD::Hi, dl, MVT::i32, CP); SDValue Lo = DAG.getNode(SPISD::Lo, dl, MVT::i32, CP); - if (getTargetMachine().getRelocationModel() != Reloc::PIC_) + if (getTargetMachine().getRelocationModel() != Reloc::PIC_) return DAG.getNode(ISD::ADD, dl, MVT::i32, Lo, Hi); - SDValue GlobalBase = DAG.getNode(SPISD::GLOBAL_BASE_REG, dl, + SDValue GlobalBase = DAG.getNode(SPISD::GLOBAL_BASE_REG, dl, getPointerTy()); SDValue RelAddr = DAG.getNode(ISD::ADD, dl, MVT::i32, Lo, Hi); SDValue AbsAddr = DAG.getNode(ISD::ADD, dl, MVT::i32, GlobalBase, RelAddr); - return DAG.getLoad(getPointerTy(), dl, DAG.getEntryNode(), + return DAG.getLoad(getPointerTy(), dl, DAG.getEntryNode(), AbsAddr, MachinePointerInfo(), false, false, 0); } @@ -805,13 +805,13 @@ // Convert the fp value to integer in an FP register. assert(Op.getValueType() == MVT::i32); Op = DAG.getNode(SPISD::FTOI, dl, MVT::f32, Op.getOperand(0)); - return DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i32, Op); + return DAG.getNode(ISD::BITCAST, dl, MVT::i32, Op); } static SDValue LowerSINT_TO_FP(SDValue Op, SelectionDAG &DAG) { DebugLoc dl = Op.getDebugLoc(); assert(Op.getOperand(0).getValueType() == MVT::i32); - SDValue Tmp = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f32, Op.getOperand(0)); + SDValue Tmp = DAG.getNode(ISD::BITCAST, dl, MVT::f32, Op.getOperand(0)); // Convert the int value to FP in an FP register. return DAG.getNode(SPISD::ITOF, dl, Op.getValueType(), Tmp); } @@ -925,7 +925,7 @@ // Bit-Convert the value to f64. SDValue Ops[2] = { - DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f64, V), + DAG.getNode(ISD::BITCAST, dl, MVT::f64, V), V.getValue(1) }; return DAG.getMergeValues(Ops, 2, dl); Modified: llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp?rev=119990&r1=119989&r2=119990&view=diff ============================================================================== --- llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp (original) +++ llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp Mon Nov 22 21:31:01 2010 @@ -147,8 +147,8 @@ setOperationAction(ISD::FREM, MVT::f64, Expand); // We have only 64-bit bitconverts - setOperationAction(ISD::BIT_CONVERT, MVT::f32, Expand); - setOperationAction(ISD::BIT_CONVERT, MVT::i32, Expand); + setOperationAction(ISD::BITCAST, MVT::f32, Expand); + setOperationAction(ISD::BITCAST, MVT::i32, Expand); setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand); setOperationAction(ISD::UINT_TO_FP, MVT::i64, Expand); Modified: llvm/trunk/lib/Target/X86/X86FastISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FastISel.cpp?rev=119990&r1=119989&r2=119990&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86FastISel.cpp (original) +++ llvm/trunk/lib/Target/X86/X86FastISel.cpp Mon Nov 22 21:31:01 2010 @@ -36,7 +36,7 @@ using namespace llvm; namespace { - + class X86FastISel : public FastISel { /// Subtarget - Keep a pointer to the X86Subtarget around so that we can /// make the right decision when generating code for different targets. @@ -46,7 +46,7 @@ /// unsigned StackPtr; - /// X86ScalarSSEf32, X86ScalarSSEf64 - Select between SSE or x87 + /// X86ScalarSSEf32, X86ScalarSSEf64 - Select between SSE or x87 /// floating point ops. /// When SSE is available, use it for f32 operations. /// When SSE2 is available, use it for f64 operations. @@ -69,12 +69,12 @@ /// possible. virtual bool TryToFoldLoad(MachineInstr *MI, unsigned OpNo, const LoadInst *LI); - + #include "X86GenFastISel.inc" private: bool X86FastEmitCompare(const Value *LHS, const Value *RHS, EVT VT); - + bool X86FastEmitLoad(EVT VT, const X86AddressMode &AM, unsigned &RR); bool X86FastEmitStore(EVT VT, const Value *Val, @@ -84,12 +84,12 @@ bool X86FastEmitExtend(ISD::NodeType Opc, EVT DstVT, unsigned Src, EVT SrcVT, unsigned &ResultReg); - + bool X86SelectAddress(const Value *V, X86AddressMode &AM); bool X86SelectCallAddress(const Value *V, X86AddressMode &AM); bool X86SelectLoad(const Instruction *I); - + bool X86SelectStore(const Instruction *I); bool X86SelectRet(const Instruction *I); @@ -105,7 +105,7 @@ bool X86SelectSelect(const Instruction *I); bool X86SelectTrunc(const Instruction *I); - + bool X86SelectFPExt(const Instruction *I); bool X86SelectFPTrunc(const Instruction *I); @@ -134,7 +134,7 @@ bool isTypeLegal(const Type *Ty, MVT &VT, bool AllowI1 = false); }; - + } // end anonymous namespace. bool X86FastISel::isTypeLegal(const Type *Ty, MVT &VT, bool AllowI1) { @@ -250,7 +250,7 @@ Opc = Subtarget->hasSSE2() ? X86::MOVSDmr : X86::ST_Fp64m; break; } - + addFullAddress(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc)), AM).addReg(Val); return true; @@ -261,7 +261,7 @@ // Handle 'null' like i32/i64 0. if (isa(Val)) Val = Constant::getNullValue(TD.getIntPtrType(Val->getContext())); - + // If this is a store of a simple constant, fold the constant into the store. if (const ConstantInt *CI = dyn_cast(Val)) { unsigned Opc = 0; @@ -278,7 +278,7 @@ Opc = X86::MOV64mi32; break; } - + if (Opc) { addFullAddress(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc)), AM) @@ -287,11 +287,11 @@ return true; } } - + unsigned ValReg = getRegForValue(Val); if (ValReg == 0) - return false; - + return false; + return X86FastEmitStore(VT, ValReg, AM); } @@ -303,7 +303,7 @@ unsigned &ResultReg) { unsigned RR = FastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), Opc, Src, /*TODO: Kill=*/false); - + if (RR != 0) { ResultReg = RR; return true; @@ -438,7 +438,7 @@ AM.Disp = (uint32_t)Disp; if (X86SelectAddress(U->getOperand(0), AM)) return true; - + // If we couldn't merge the sub value into this addr mode, revert back to // our address and just match the value instead of completely failing. AM = SavedAM; @@ -467,7 +467,7 @@ // Okay, we've committed to selecting this global. Set up the basic address. AM.GV = GV; - + // Allow the subtarget to classify the global. unsigned char GVFlags = Subtarget->ClassifyGlobalReference(GV, TM); @@ -476,7 +476,7 @@ // FIXME: How do we know Base.Reg is free?? AM.Base.Reg = getInstrInfo()->getGlobalBaseReg(FuncInfo.MF); } - + // Unless the ABI requires an extra load, return a direct reference to // the global. if (!isGlobalStubReference(GVFlags)) { @@ -489,7 +489,7 @@ AM.GVOpFlags = GVFlags; return true; } - + // Ok, we need to do a load from a stub. If we've already loaded from this // stub, reuse the loaded pointer, otherwise emit the load now. DenseMap::iterator I = LocalValueMap.find(V); @@ -511,14 +511,14 @@ if (TLI.getPointerTy() == MVT::i64) { Opc = X86::MOV64rm; RC = X86::GR64RegisterClass; - + if (Subtarget->isPICStyleRIPRel()) StubAM.Base.Reg = X86::RIP; } else { Opc = X86::MOV32rm; RC = X86::GR32RegisterClass; } - + LoadReg = createResultReg(RC); MachineInstrBuilder LoadMI = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc), LoadReg); @@ -530,7 +530,7 @@ // Prevent loading GV stub multiple times in same MBB. LocalValueMap[V] = LoadReg; } - + // Now construct the final address. Note that the Disp, Scale, // and Index values may already be set here. AM.Base.Reg = LoadReg; @@ -604,7 +604,7 @@ // Okay, we've committed to selecting this global. Set up the basic address. AM.GV = GV; - + // No ABI requires an extra load for anything other than DLLImport, which // we rejected above. Return a direct reference to the global. if (Subtarget->isPICStyleRIPRel()) { @@ -617,7 +617,7 @@ } else if (Subtarget->isPICStyleGOT()) { AM.GVOpFlags = X86II::MO_GOTOFF; } - + return true; } @@ -702,7 +702,7 @@ return false; CCValAssign &VA = ValLocs[0]; - + // Don't bother handling odd stuff for now. if (VA.getLocInfo() != CCValAssign::Full) return false; @@ -792,11 +792,11 @@ EVT VT) { unsigned Op0Reg = getRegForValue(Op0); if (Op0Reg == 0) return false; - + // Handle 'null' like i32/i64 0. if (isa(Op1)) Op1 = Constant::getNullValue(TD.getIntPtrType(Op0->getContext())); - + // We have two options: compare with register or immediate. If the RHS of // the compare is an immediate that we can fold into this compare, use // CMPri, otherwise use CMPrr. @@ -808,16 +808,16 @@ return true; } } - + unsigned CompareOpc = X86ChooseCmpOpcode(VT, Subtarget); if (CompareOpc == 0) return false; - + unsigned Op1Reg = getRegForValue(Op1); if (Op1Reg == 0) return false; BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(CompareOpc)) .addReg(Op0Reg) .addReg(Op1Reg); - + return true; } @@ -835,13 +835,13 @@ case CmpInst::FCMP_OEQ: { if (!X86FastEmitCompare(CI->getOperand(0), CI->getOperand(1), VT)) return false; - + unsigned EReg = createResultReg(&X86::GR8RegClass); unsigned NPReg = createResultReg(&X86::GR8RegClass); BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(X86::SETEr), EReg); BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(X86::SETNPr), NPReg); - BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, + BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(X86::AND8rr), ResultReg).addReg(NPReg).addReg(EReg); UpdateValueMap(I, ResultReg); return true; @@ -874,7 +874,7 @@ case CmpInst::FCMP_UGE: SwapArgs = true; SetCCOpc = X86::SETBEr; break; case CmpInst::FCMP_ULT: SwapArgs = false; SetCCOpc = X86::SETBr; break; case CmpInst::FCMP_ULE: SwapArgs = false; SetCCOpc = X86::SETBEr; break; - + case CmpInst::ICMP_EQ: SwapArgs = false; SetCCOpc = X86::SETEr; break; case CmpInst::ICMP_NE: SwapArgs = false; SetCCOpc = X86::SETNEr; break; case CmpInst::ICMP_UGT: SwapArgs = false; SetCCOpc = X86::SETAr; break; @@ -896,7 +896,7 @@ // Emit a compare of Op0/Op1. if (!X86FastEmitCompare(Op0, Op1, VT)) return false; - + BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(SetCCOpc), ResultReg); UpdateValueMap(I, ResultReg); return true; @@ -961,7 +961,7 @@ case CmpInst::FCMP_UGE: SwapArgs = true; BranchOpc = X86::JBE_4; break; case CmpInst::FCMP_ULT: SwapArgs = false; BranchOpc = X86::JB_4; break; case CmpInst::FCMP_ULE: SwapArgs = false; BranchOpc = X86::JBE_4; break; - + case CmpInst::ICMP_EQ: SwapArgs = false; BranchOpc = X86::JE_4; break; case CmpInst::ICMP_NE: SwapArgs = false; BranchOpc = X86::JNE_4; break; case CmpInst::ICMP_UGT: SwapArgs = false; BranchOpc = X86::JA_4; break; @@ -975,7 +975,7 @@ default: return false; } - + const Value *Op0 = CI->getOperand(0), *Op1 = CI->getOperand(1); if (SwapArgs) std::swap(Op0, Op1); @@ -983,7 +983,7 @@ // Emit a compare of the LHS and RHS, setting the flags. if (!X86FastEmitCompare(Op0, Op1, VT)) return false; - + BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(BranchOpc)) .addMBB(TrueMBB); @@ -1119,16 +1119,16 @@ unsigned Op0Reg = getRegForValue(I->getOperand(0)); if (Op0Reg == 0) return false; - + // Fold immediate in shl(x,3). if (const ConstantInt *CI = dyn_cast(I->getOperand(1))) { unsigned ResultReg = createResultReg(RC); - BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(OpImm), + BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(OpImm), ResultReg).addReg(Op0Reg).addImm(CI->getZExtValue() & 0xff); UpdateValueMap(I, ResultReg); return true; } - + unsigned Op1Reg = getRegForValue(I->getOperand(1)); if (Op1Reg == 0) return false; BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(TargetOpcode::COPY), @@ -1152,10 +1152,10 @@ MVT VT; if (!isTypeLegal(I->getType(), VT)) return false; - + // We only use cmov here, if we don't have a cmov instruction bail. if (!Subtarget->hasCMov()) return false; - + unsigned Opc = 0; const TargetRegisterClass *RC = NULL; if (VT == MVT::i16) { @@ -1168,7 +1168,7 @@ Opc = X86::CMOVE64rr; RC = &X86::GR64RegClass; } else { - return false; + return false; } unsigned Op0Reg = getRegForValue(I->getOperand(0)); @@ -1233,7 +1233,7 @@ return false; EVT SrcVT = TLI.getValueType(I->getOperand(0)->getType()); EVT DstVT = TLI.getValueType(I->getType()); - + // This code only handles truncation to byte right now. if (DstVT != MVT::i8 && DstVT != MVT::i1) // All other cases should be handled by the tblgen generated code. @@ -1304,21 +1304,21 @@ // Grab the frame index. X86AddressMode AM; if (!X86SelectAddress(Slot, AM)) return false; - + if (!X86FastEmitStore(PtrTy, Op1, AM)) return false; - + return true; } case Intrinsic::objectsize: { ConstantInt *CI = dyn_cast(I.getArgOperand(1)); const Type *Ty = I.getCalledFunction()->getReturnType(); - + assert(CI && "Non-constant type in Intrinsic::objectsize?"); - + MVT VT; if (!isTypeLegal(Ty, VT)) return false; - + unsigned OpC = 0; if (VT == MVT::i32) OpC = X86::MOV32ri; @@ -1326,7 +1326,7 @@ OpC = X86::MOV64ri; else return false; - + unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT)); BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(OpC), ResultReg). addImm(CI->isZero() ? -1ULL : 0); @@ -1398,7 +1398,7 @@ ResultReg = DestReg1+1; else ResultReg = createResultReg(TLI.getRegClassFor(MVT::i8)); - + unsigned Opc = X86::SETBr; if (I.getIntrinsicID() == Intrinsic::sadd_with_overflow) Opc = X86::SETOr; @@ -1516,10 +1516,10 @@ // Analyze operands of the call, assigning locations to each operand. SmallVector ArgLocs; CCState CCInfo(CC, false, TM, ArgLocs, I->getParent()->getContext()); - + // Allocate shadow area for Win64 - if (Subtarget->isTargetWin64()) { - CCInfo.AllocateStack(32, 8); + if (Subtarget->isTargetWin64()) { + CCInfo.AllocateStack(32, 8); } CCInfo.AnalyzeCallOperands(ArgVTs, ArgFlags, CC_X86); @@ -1539,7 +1539,7 @@ CCValAssign &VA = ArgLocs[i]; unsigned Arg = Args[VA.getValNo()]; EVT ArgVT = ArgVTs[VA.getValNo()]; - + // Promote the value if needed. switch (VA.getLocInfo()) { default: llvm_unreachable("Unknown loc info!"); @@ -1572,21 +1572,21 @@ if (!Emitted) Emitted = X86FastEmitExtend(ISD::SIGN_EXTEND, VA.getLocVT(), Arg, ArgVT, Arg); - + assert(Emitted && "Failed to emit a aext!"); Emitted=Emitted; ArgVT = VA.getLocVT(); break; } case CCValAssign::BCvt: { unsigned BC = FastEmit_r(ArgVT.getSimpleVT(), VA.getLocVT(), - ISD::BIT_CONVERT, Arg, /*TODO: Kill=*/false); + ISD::BITCAST, Arg, /*TODO: Kill=*/false); assert(BC != 0 && "Failed to emit a bitcast!"); Arg = BC; ArgVT = VA.getLocVT(); break; } } - + if (VA.isRegLoc()) { BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(TargetOpcode::COPY), VA.getLocReg()).addReg(Arg); @@ -1597,7 +1597,7 @@ AM.Base.Reg = StackPtr; AM.Disp = LocMemOffset; const Value *ArgVal = ArgVals[VA.getValNo()]; - + // If this is a really simple value, emit this with the Value* version of // X86FastEmitStore. If it isn't simple, we don't want to do this, as it // can cause us to reevaluate the argument. @@ -1609,13 +1609,13 @@ } // ELF / PIC requires GOT in the EBX register before function calls via PLT - // GOT pointer. + // GOT pointer. if (Subtarget->isPICStyleGOT()) { unsigned Base = getInstrInfo()->getGlobalBaseReg(FuncInfo.MF); BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(TargetOpcode::COPY), X86::EBX).addReg(Base); } - + // Issue the call. MachineInstrBuilder MIB; if (CalleeOp) { @@ -1629,7 +1629,7 @@ CallOpc = X86::CALL32r; MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(CallOpc)) .addReg(CalleeOp); - + } else { // Direct call. assert(GV && "Not a direct call"); @@ -1640,10 +1640,10 @@ CallOpc = X86::CALL64pcrel32; else CallOpc = X86::CALLpcrel32; - + // See if we need any target-specific flags on the GV operand. unsigned char OpFlags = 0; - + // On ELF targets, in both X86-64 and X86-32 mode, direct calls to // external symbols most go through the PLT in PIC mode. If the symbol // has hidden or protected visibility, or if it is static or local, then @@ -1660,8 +1660,8 @@ // automatically synthesizes these stubs. OpFlags = X86II::MO_DARWIN_STUB; } - - + + MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(CallOpc)) .addGlobalAddress(GV, 0, OpFlags); } @@ -1690,7 +1690,7 @@ assert(RVLocs.size() == 1 && "Can't handle multi-value calls!"); EVT CopyVT = RVLocs[0].getValVT(); TargetRegisterClass* DstRC = TLI.getRegClassFor(CopyVT); - + // If this is a call to a function that returns an fp value on the x87 fp // stack, but where we prefer to use the value in xmm registers, copy it // out as F80 and use a truncate to move it from fp stack reg to xmm reg. @@ -1728,7 +1728,7 @@ if (AndToI1) { // Mask out all but lowest bit for some call which produces an i1. unsigned AndResult = createResultReg(X86::GR8RegisterClass); - BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, + BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(X86::AND8ri), AndResult).addReg(ResultReg).addImm(1); ResultReg = AndResult; } @@ -1798,7 +1798,7 @@ MVT VT; if (!isTypeLegal(C->getType(), VT)) return false; - + // Get opcode and regclass of the output for the given load instruction. unsigned Opc = 0; const TargetRegisterClass *RC = NULL; @@ -1843,7 +1843,7 @@ // No f80 support yet. return false; } - + // Materialize addresses with LEA instructions. if (isa(C)) { X86AddressMode AM; @@ -1859,14 +1859,14 @@ } return 0; } - + // MachineConstantPool wants an explicit alignment. unsigned Align = TD.getPrefTypeAlignment(C->getType()); if (Align == 0) { // Alignment of vector types. FIXME! Align = TD.getTypeAllocSize(C->getType()); } - + // x86-32 PIC requires a PIC base register for constant pools. unsigned PICBase = 0; unsigned char OpFlag = 0; @@ -1922,19 +1922,19 @@ X86AddressMode AM; if (!X86SelectAddress(LI->getOperand(0), AM)) return false; - + X86InstrInfo &XII = (X86InstrInfo&)TII; - + unsigned Size = TD.getTypeAllocSize(LI->getType()); unsigned Alignment = LI->getAlignment(); SmallVector AddrOps; AM.getFullAddress(AddrOps); - + MachineInstr *Result = XII.foldMemoryOperandImpl(*FuncInfo.MF, MI, OpNo, AddrOps, Size, Alignment); if (Result == 0) return false; - + MI->getParent()->insert(MI, Result); MI->eraseFromParent(); return true; Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=119990&r1=119989&r2=119990&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Nov 22 21:31:01 2010 @@ -226,12 +226,12 @@ // TODO: when we have SSE, these could be more efficient, by using movd/movq. if (!X86ScalarSSEf64) { - setOperationAction(ISD::BIT_CONVERT , MVT::f32 , Expand); - setOperationAction(ISD::BIT_CONVERT , MVT::i32 , Expand); + setOperationAction(ISD::BITCAST , MVT::f32 , Expand); + setOperationAction(ISD::BITCAST , MVT::i32 , Expand); if (Subtarget->is64Bit()) { - setOperationAction(ISD::BIT_CONVERT , MVT::f64 , Expand); + setOperationAction(ISD::BITCAST , MVT::f64 , Expand); // Without SSE, i64->f64 goes through memory. - setOperationAction(ISD::BIT_CONVERT , MVT::i64 , Expand); + setOperationAction(ISD::BITCAST , MVT::i64 , Expand); } } @@ -654,10 +654,10 @@ setOperationAction(ISD::SELECT, MVT::v4i16, Expand); setOperationAction(ISD::SELECT, MVT::v2i32, Expand); setOperationAction(ISD::SELECT, MVT::v1i64, Expand); - setOperationAction(ISD::BIT_CONVERT, MVT::v8i8, Expand); - setOperationAction(ISD::BIT_CONVERT, MVT::v4i16, Expand); - setOperationAction(ISD::BIT_CONVERT, MVT::v2i32, Expand); - setOperationAction(ISD::BIT_CONVERT, MVT::v1i64, Expand); + setOperationAction(ISD::BITCAST, MVT::v8i8, Expand); + setOperationAction(ISD::BITCAST, MVT::v4i16, Expand); + setOperationAction(ISD::BITCAST, MVT::v2i32, Expand); + setOperationAction(ISD::BITCAST, MVT::v1i64, Expand); if (!UseSoftFloat && Subtarget->hasSSE1()) { addRegisterClass(MVT::v4f32, X86::VR128RegisterClass); @@ -1293,13 +1293,13 @@ if (Subtarget->is64Bit()) { if (ValVT == MVT::x86mmx) { if (VA.getLocReg() == X86::XMM0 || VA.getLocReg() == X86::XMM1) { - ValToCopy = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i64, ValToCopy); + ValToCopy = DAG.getNode(ISD::BITCAST, dl, MVT::i64, ValToCopy); ValToCopy = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2i64, ValToCopy); // If we don't have SSE2 available, convert to v4f32 so the generated // register is legal. if (!Subtarget->hasSSE2()) - ValToCopy = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v4f32,ValToCopy); + ValToCopy = DAG.getNode(ISD::BITCAST, dl, MVT::v4f32,ValToCopy); } } } @@ -1406,7 +1406,7 @@ MVT::i64, InFlag).getValue(1); Val = Chain.getValue(0); } - Val = DAG.getNode(ISD::BIT_CONVERT, dl, CopyVT, Val); + Val = DAG.getNode(ISD::BITCAST, dl, CopyVT, Val); } else { Chain = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), CopyVT, InFlag).getValue(1); @@ -1589,7 +1589,7 @@ ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue, DAG.getValueType(VA.getValVT())); else if (VA.getLocInfo() == CCValAssign::BCvt) - ArgValue = DAG.getNode(ISD::BIT_CONVERT, dl, VA.getValVT(), ArgValue); + ArgValue = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), ArgValue); if (VA.isExtInLoc()) { // Handle MMX values passed in XMM regs. @@ -1922,14 +1922,14 @@ case CCValAssign::AExt: if (RegVT.isVector() && RegVT.getSizeInBits() == 128) { // Special case: passing MMX values in XMM registers. - Arg = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i64, Arg); + Arg = DAG.getNode(ISD::BITCAST, dl, MVT::i64, Arg); Arg = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2i64, Arg); Arg = getMOVL(DAG, dl, MVT::v2i64, DAG.getUNDEF(MVT::v2i64), Arg); } else Arg = DAG.getNode(ISD::ANY_EXTEND, dl, RegVT, Arg); break; case CCValAssign::BCvt: - Arg = DAG.getNode(ISD::BIT_CONVERT, dl, RegVT, Arg); + Arg = DAG.getNode(ISD::BITCAST, dl, RegVT, Arg); break; case CCValAssign::Indirect: { // Store the argument. @@ -3501,7 +3501,7 @@ SDValue Ops[] = { Cst, Cst, Cst, Cst, Cst, Cst, Cst, Cst }; Vec = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v8f32, Ops, 8); } - return DAG.getNode(ISD::BIT_CONVERT, dl, VT, Vec); + return DAG.getNode(ISD::BITCAST, dl, VT, Vec); } /// getOnesVector - Returns a vector of specified type with all bits set. @@ -3514,7 +3514,7 @@ SDValue Cst = DAG.getTargetConstant(~0U, MVT::i32); SDValue Vec; Vec = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32, Cst, Cst, Cst, Cst); - return DAG.getNode(ISD::BIT_CONVERT, dl, VT, Vec); + return DAG.getNode(ISD::BITCAST, dl, VT, Vec); } @@ -3599,9 +3599,9 @@ // Perform the splat. int SplatMask[4] = { EltNo, EltNo, EltNo, EltNo }; - V1 = DAG.getNode(ISD::BIT_CONVERT, dl, PVT, V1); + V1 = DAG.getNode(ISD::BITCAST, dl, PVT, V1); V1 = DAG.getVectorShuffle(PVT, dl, V1, DAG.getUNDEF(PVT), &SplatMask[0]); - return DAG.getNode(ISD::BIT_CONVERT, dl, VT, V1); + return DAG.getNode(ISD::BITCAST, dl, VT, V1); } /// getShuffleVectorZeroOrUndef - Return a vector_shuffle of the specified @@ -3725,7 +3725,7 @@ } // Actual nodes that may contain scalar elements - if (Opcode == ISD::BIT_CONVERT) { + if (Opcode == ISD::BITCAST) { V = V.getOperand(0); EVT SrcVT = V.getValueType(); unsigned NumElems = VT.getVectorNumElements(); @@ -3914,7 +3914,7 @@ } } - return DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v16i8, V); + return DAG.getNode(ISD::BITCAST, dl, MVT::v16i8, V); } /// LowerBuildVectorv8i16 - Custom lower build_vector of v8i16. @@ -3955,8 +3955,8 @@ const TargetLowering &TLI, DebugLoc dl) { EVT ShVT = MVT::v2i64; unsigned Opc = isLeft ? X86ISD::VSHL : X86ISD::VSRL; - SrcOp = DAG.getNode(ISD::BIT_CONVERT, dl, ShVT, SrcOp); - return DAG.getNode(ISD::BIT_CONVERT, dl, VT, + SrcOp = DAG.getNode(ISD::BITCAST, dl, ShVT, SrcOp); + return DAG.getNode(ISD::BITCAST, dl, VT, DAG.getNode(Opc, dl, ShVT, SrcOp, DAG.getConstant(NumBits, TLI.getShiftAmountTy()))); } @@ -4023,8 +4023,8 @@ LD->getPointerInfo().getWithOffset(StartOffset), false, false, 0); // Canonicalize it to a v4i32 shuffle. - V1 = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v4i32, V1); - return DAG.getNode(ISD::BIT_CONVERT, dl, VT, + V1 = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, V1); + return DAG.getNode(ISD::BITCAST, dl, VT, DAG.getVectorShuffle(MVT::v4i32, dl, V1, DAG.getUNDEF(MVT::v4i32),&Mask[0])); } @@ -4092,7 +4092,7 @@ SDValue ResNode = DAG.getMemIntrinsicNode(X86ISD::VZEXT_LOAD, DL, Tys, Ops, 2, MVT::i32, LDBase->getMemOperand()); - return DAG.getNode(ISD::BIT_CONVERT, DL, VT, ResNode); + return DAG.getNode(ISD::BITCAST, DL, VT, ResNode); } return SDValue(); } @@ -4184,7 +4184,7 @@ DAG.getUNDEF(Item.getValueType()), &Mask[0]); } - return DAG.getNode(ISD::BIT_CONVERT, dl, Op.getValueType(), Item); + return DAG.getNode(ISD::BITCAST, dl, Op.getValueType(), Item); } } @@ -4208,7 +4208,7 @@ Item = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MiddleVT, Item); Item = getShuffleVectorZeroOrUndef(Item, 0, true, Subtarget->hasSSE2(), DAG); - return DAG.getNode(ISD::BIT_CONVERT, dl, VT, Item); + return DAG.getNode(ISD::BITCAST, dl, VT, Item); } } @@ -4401,21 +4401,21 @@ assert(ResVT == MVT::v2i64 || ResVT == MVT::v4i32 || ResVT == MVT::v8i16 || ResVT == MVT::v16i8); int Mask[2]; - SDValue InVec = DAG.getNode(ISD::BIT_CONVERT,dl, MVT::v1i64, Op.getOperand(0)); + SDValue InVec = DAG.getNode(ISD::BITCAST,dl, MVT::v1i64, Op.getOperand(0)); SDValue VecOp = DAG.getNode(X86ISD::MOVQ2DQ, dl, MVT::v2i64, InVec); InVec = Op.getOperand(1); if (InVec.getOpcode() == ISD::SCALAR_TO_VECTOR) { unsigned NumElts = ResVT.getVectorNumElements(); - VecOp = DAG.getNode(ISD::BIT_CONVERT, dl, ResVT, VecOp); + VecOp = DAG.getNode(ISD::BITCAST, dl, ResVT, VecOp); VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, ResVT, VecOp, InVec.getOperand(0), DAG.getIntPtrConstant(NumElts/2+1)); } else { - InVec = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v1i64, InVec); + InVec = DAG.getNode(ISD::BITCAST, dl, MVT::v1i64, InVec); SDValue VecOp2 = DAG.getNode(X86ISD::MOVQ2DQ, dl, MVT::v2i64, InVec); Mask[0] = 0; Mask[1] = 2; VecOp = DAG.getVectorShuffle(MVT::v2i64, dl, VecOp, VecOp2, Mask); } - return DAG.getNode(ISD::BIT_CONVERT, dl, ResVT, VecOp); + return DAG.getNode(ISD::BITCAST, dl, ResVT, VecOp); } // v8i16 shuffles - Prefer shuffles in the following order: @@ -4497,9 +4497,9 @@ MaskV.push_back(BestLoQuad < 0 ? 0 : BestLoQuad); MaskV.push_back(BestHiQuad < 0 ? 1 : BestHiQuad); NewV = DAG.getVectorShuffle(MVT::v2i64, dl, - DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v2i64, V1), - DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v2i64, V2), &MaskV[0]); - NewV = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v8i16, NewV); + DAG.getNode(ISD::BITCAST, dl, MVT::v2i64, V1), + DAG.getNode(ISD::BITCAST, dl, MVT::v2i64, V2), &MaskV[0]); + NewV = DAG.getNode(ISD::BITCAST, dl, MVT::v8i16, NewV); // Rewrite the MaskVals and assign NewV to V1 if NewV now contains all the // source words for the shuffle, to aid later transformations. @@ -4568,12 +4568,12 @@ pshufbMask.push_back(DAG.getConstant(EltIdx, MVT::i8)); pshufbMask.push_back(DAG.getConstant(EltIdx+1, MVT::i8)); } - V1 = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v16i8, V1); + V1 = DAG.getNode(ISD::BITCAST, dl, MVT::v16i8, V1); V1 = DAG.getNode(X86ISD::PSHUFB, dl, MVT::v16i8, V1, DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v16i8, &pshufbMask[0], 16)); if (!TwoInputs) - return DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v8i16, V1); + return DAG.getNode(ISD::BITCAST, dl, MVT::v8i16, V1); // Calculate the shuffle mask for the second input, shuffle it, and // OR it with the first shuffled input. @@ -4588,12 +4588,12 @@ pshufbMask.push_back(DAG.getConstant(EltIdx - 16, MVT::i8)); pshufbMask.push_back(DAG.getConstant(EltIdx - 15, MVT::i8)); } - V2 = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v16i8, V2); + V2 = DAG.getNode(ISD::BITCAST, dl, MVT::v16i8, V2); V2 = DAG.getNode(X86ISD::PSHUFB, dl, MVT::v16i8, V2, DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v16i8, &pshufbMask[0], 16)); V1 = DAG.getNode(ISD::OR, dl, MVT::v16i8, V1, V2); - return DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v8i16, V1); + return DAG.getNode(ISD::BITCAST, dl, MVT::v8i16, V1); } // If BestLoQuad >= 0, generate a pshuflw to put the low elements in order, @@ -4760,8 +4760,8 @@ // No SSSE3 - Calculate in place words and then fix all out of place words // With 0-16 extracts & inserts. Worst case is 16 bytes out of order from // the 16 different words that comprise the two doublequadword input vectors. - V1 = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v8i16, V1); - V2 = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v8i16, V2); + V1 = DAG.getNode(ISD::BITCAST, dl, MVT::v8i16, V1); + V2 = DAG.getNode(ISD::BITCAST, dl, MVT::v8i16, V2); SDValue NewV = V2Only ? V2 : V1; for (int i = 0; i != 8; ++i) { int Elt0 = MaskVals[i*2]; @@ -4823,7 +4823,7 @@ NewV = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v8i16, NewV, InsElt, DAG.getIntPtrConstant(i)); } - return DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v16i8, NewV); + return DAG.getNode(ISD::BITCAST, dl, MVT::v16i8, NewV); } /// RewriteAsNarrowerShuffle - Try rewriting v8i16 and v16i8 shuffles as 4 wide @@ -4867,8 +4867,8 @@ MaskVec.push_back(StartIdx / Scale); } - V1 = DAG.getNode(ISD::BIT_CONVERT, dl, NewVT, V1); - V2 = DAG.getNode(ISD::BIT_CONVERT, dl, NewVT, V2); + V1 = DAG.getNode(ISD::BITCAST, dl, NewVT, V1); + V2 = DAG.getNode(ISD::BITCAST, dl, NewVT, V2); return DAG.getVectorShuffle(NewVT, dl, V1, V2, &MaskVec[0]); } @@ -4887,11 +4887,11 @@ MVT ExtVT = (OpVT == MVT::v2f64) ? MVT::i64 : MVT::i32; if ((ExtVT != MVT::i64 || Subtarget->is64Bit()) && SrcOp.getOpcode() == ISD::SCALAR_TO_VECTOR && - SrcOp.getOperand(0).getOpcode() == ISD::BIT_CONVERT && + SrcOp.getOperand(0).getOpcode() == ISD::BITCAST && SrcOp.getOperand(0).getOperand(0).getValueType() == ExtVT) { // PR2108 OpVT = (OpVT == MVT::v2f64) ? MVT::v2i64 : MVT::v4i32; - return DAG.getNode(ISD::BIT_CONVERT, dl, VT, + return DAG.getNode(ISD::BITCAST, dl, VT, DAG.getNode(X86ISD::VZEXT_MOVL, dl, OpVT, DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, OpVT, @@ -4901,9 +4901,9 @@ } } - return DAG.getNode(ISD::BIT_CONVERT, dl, VT, + return DAG.getNode(ISD::BITCAST, dl, VT, DAG.getNode(X86ISD::VZEXT_MOVL, dl, OpVT, - DAG.getNode(ISD::BIT_CONVERT, dl, + DAG.getNode(ISD::BITCAST, dl, OpVT, SrcOp))); } @@ -5057,7 +5057,7 @@ } static bool MayFoldVectorLoad(SDValue V) { - if (V.hasOneUse() && V.getOpcode() == ISD::BIT_CONVERT) + if (V.hasOneUse() && V.getOpcode() == ISD::BITCAST) V = V.getOperand(0); if (V.hasOneUse() && V.getOpcode() == ISD::SCALAR_TO_VECTOR) V = V.getOperand(0); @@ -5074,7 +5074,7 @@ // one use. Remove this version after this bug get fixed. // rdar://8434668, PR8156 static bool RelaxedMayFoldVectorLoad(SDValue V) { - if (V.hasOneUse() && V.getOpcode() == ISD::BIT_CONVERT) + if (V.hasOneUse() && V.getOpcode() == ISD::BITCAST) V = V.getOperand(0); if (V.hasOneUse() && V.getOpcode() == ISD::SCALAR_TO_VECTOR) V = V.getOperand(0); @@ -5112,7 +5112,7 @@ // If the bit convert changed the number of elements, it is unsafe // to examine the mask. bool HasShuffleIntoBitcast = false; - if (V.getOpcode() == ISD::BIT_CONVERT) { + if (V.getOpcode() == ISD::BITCAST) { EVT SrcVT = V.getOperand(0).getValueType(); if (SrcVT.getVectorNumElements() != VT.getVectorNumElements()) return false; @@ -5127,7 +5127,7 @@ V = (Idx < (int)NumElems) ? V.getOperand(0) : V.getOperand(1); // Skip one more bit_convert if necessary - if (V.getOpcode() == ISD::BIT_CONVERT) + if (V.getOpcode() == ISD::BITCAST) V = V.getOperand(0); if (ISD::isNormalLoad(V.getNode())) { @@ -5164,8 +5164,8 @@ EVT VT = Op.getValueType(); // Canonizalize to v2f64. - V1 = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v2f64, V1); - return DAG.getNode(ISD::BIT_CONVERT, dl, VT, + V1 = DAG.getNode(ISD::BITCAST, dl, MVT::v2f64, V1); + return DAG.getNode(ISD::BITCAST, dl, VT, getTargetShuffleNode(X86ISD::MOVDDUP, dl, MVT::v2f64, V1, DAG)); } @@ -5319,7 +5319,7 @@ if (VT == MVT::v8i16 || VT == MVT::v16i8) { SDValue NewOp = RewriteAsNarrowerShuffle(SVOp, DAG, dl); if (NewOp.getNode()) - return DAG.getNode(ISD::BIT_CONVERT, dl, VT, NewOp); + return DAG.getNode(ISD::BITCAST, dl, VT, NewOp); } else if ((VT == MVT::v4i32 || (VT == MVT::v4f32 && Subtarget->hasSSE2()))) { // FIXME: Figure out a cleaner way to do this. // Try to make use of movq to zero out the top part. @@ -5629,7 +5629,7 @@ if (Idx == 0) return DAG.getNode(ISD::TRUNCATE, dl, MVT::i16, DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i32, - DAG.getNode(ISD::BIT_CONVERT, dl, + DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, Op.getOperand(0)), Op.getOperand(1))); @@ -5650,14 +5650,14 @@ if ((User->getOpcode() != ISD::STORE || (isa(Op.getOperand(1)) && cast(Op.getOperand(1))->isNullValue())) && - (User->getOpcode() != ISD::BIT_CONVERT || + (User->getOpcode() != ISD::BITCAST || User->getValueType(0) != MVT::i32)) return SDValue(); SDValue Extract = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i32, - DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v4i32, + DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, Op.getOperand(0)), Op.getOperand(1)); - return DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f32, Extract); + return DAG.getNode(ISD::BITCAST, dl, MVT::f32, Extract); } else if (VT == MVT::i32) { // ExtractPS works with constant index. if (isa(Op.getOperand(1))) @@ -5688,7 +5688,7 @@ if (Idx == 0) return DAG.getNode(ISD::TRUNCATE, dl, MVT::i16, DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i32, - DAG.getNode(ISD::BIT_CONVERT, dl, + DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, Vec), Op.getOperand(1))); // Transform it so it match pextrw which produces a 32-bit result. @@ -5819,7 +5819,7 @@ SDValue AnyExt = DAG.getNode(ISD::ANY_EXTEND, dl, MVT::i32, Op.getOperand(0)); assert(Op.getValueType().getSimpleVT().getSizeInBits() == 128 && "Expected an SSE type!"); - return DAG.getNode(ISD::BIT_CONVERT, dl, Op.getValueType(), + return DAG.getNode(ISD::BITCAST, dl, Op.getValueType(), DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v4i32,AnyExt)); } @@ -6390,7 +6390,7 @@ MachinePointerInfo::getConstantPool(), false, false, 16); SDValue Unpck2 = getUnpackl(DAG, dl, MVT::v4i32, Unpck1, CLod0); - SDValue XR2F = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v2f64, Unpck2); + SDValue XR2F = DAG.getNode(ISD::BITCAST, dl, MVT::v2f64, Unpck2); SDValue CLod1 = DAG.getLoad(MVT::v2f64, dl, CLod0.getValue(1), CPIdx1, MachinePointerInfo::getConstantPool(), false, false, 16); @@ -6420,19 +6420,19 @@ DAG.getIntPtrConstant(0))); Load = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, - DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v2f64, Load), + DAG.getNode(ISD::BITCAST, dl, MVT::v2f64, Load), DAG.getIntPtrConstant(0)); // Or the load with the bias. SDValue Or = DAG.getNode(ISD::OR, dl, MVT::v2i64, - DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v2i64, + DAG.getNode(ISD::BITCAST, dl, MVT::v2i64, DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2f64, Load)), - DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v2i64, + DAG.getNode(ISD::BITCAST, dl, MVT::v2i64, DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2f64, Bias))); Or = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, - DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v2f64, Or), + DAG.getNode(ISD::BITCAST, dl, MVT::v2f64, Or), DAG.getIntPtrConstant(0)); // Subtract the bias. @@ -6690,11 +6690,11 @@ MachinePointerInfo::getConstantPool(), false, false, 16); if (VT.isVector()) { - return DAG.getNode(ISD::BIT_CONVERT, dl, VT, + return DAG.getNode(ISD::BITCAST, dl, VT, DAG.getNode(ISD::XOR, dl, MVT::v2i64, - DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v2i64, + DAG.getNode(ISD::BITCAST, dl, MVT::v2i64, Op.getOperand(0)), - DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v2i64, Mask))); + DAG.getNode(ISD::BITCAST, dl, MVT::v2i64, Mask))); } else { return DAG.getNode(X86ISD::FXOR, dl, VT, Op.getOperand(0), Mask); } @@ -6746,7 +6746,7 @@ SignBit = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2f64, SignBit); SignBit = DAG.getNode(X86ISD::FSRL, dl, MVT::v2f64, SignBit, DAG.getConstant(32, MVT::i32)); - SignBit = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v4f32, SignBit); + SignBit = DAG.getNode(ISD::BITCAST, dl, MVT::v4f32, SignBit); SignBit = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f32, SignBit, DAG.getIntPtrConstant(0)); } @@ -7895,7 +7895,7 @@ } EVT VT = Op.getValueType(); - ShAmt = DAG.getNode(ISD::BIT_CONVERT, dl, VT, ShAmt); + ShAmt = DAG.getNode(ISD::BITCAST, dl, VT, ShAmt); return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT, DAG.getConstant(NewIntNo, MVT::i32), Op.getOperand(1), ShAmt); @@ -8329,7 +8329,7 @@ false, false, 16); Op = DAG.getNode(ISD::ADD, dl, VT, Op, Addend); - Op = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v4f32, Op); + Op = DAG.getNode(ISD::BITCAST, dl, MVT::v4f32, Op); Op = DAG.getNode(ISD::FP_TO_SINT, dl, VT, Op); return DAG.getNode(ISD::MUL, dl, VT, Op, R); } @@ -8550,16 +8550,16 @@ return DAG.getMergeValues(Ops, 2, dl); } -SDValue X86TargetLowering::LowerBIT_CONVERT(SDValue Op, +SDValue X86TargetLowering::LowerBITCAST(SDValue Op, SelectionDAG &DAG) const { EVT SrcVT = Op.getOperand(0).getValueType(); EVT DstVT = Op.getValueType(); assert((Subtarget->is64Bit() && !Subtarget->hasSSE2() && Subtarget->hasMMX() && !DisableMMX) && - "Unexpected custom BIT_CONVERT"); + "Unexpected custom BITCAST"); assert((DstVT == MVT::i64 || (DstVT.isVector() && DstVT.getSizeInBits()==64)) && - "Unexpected custom BIT_CONVERT"); + "Unexpected custom BITCAST"); // i64 <=> MMX conversions are Legal. if (SrcVT==MVT::i64 && DstVT.isVector()) return Op; @@ -8642,7 +8642,7 @@ case ISD::SMULO: case ISD::UMULO: return LowerXALUO(Op, DAG); case ISD::READCYCLECOUNTER: return LowerREADCYCLECOUNTER(Op, DAG); - case ISD::BIT_CONVERT: return LowerBIT_CONVERT(Op, DAG); + case ISD::BITCAST: return LowerBITCAST(Op, DAG); } } @@ -11177,13 +11177,13 @@ static SDValue PerformVZEXT_MOVLCombine(SDNode *N, SelectionDAG &DAG) { SDValue Op = N->getOperand(0); - if (Op.getOpcode() == ISD::BIT_CONVERT) + if (Op.getOpcode() == ISD::BITCAST) Op = Op.getOperand(0); EVT VT = N->getValueType(0), OpVT = Op.getValueType(); if (Op.getOpcode() == X86ISD::VZEXT_LOAD && VT.getVectorElementType().getSizeInBits() == OpVT.getVectorElementType().getSizeInBits()) { - return DAG.getNode(ISD::BIT_CONVERT, N->getDebugLoc(), VT, Op); + return DAG.getNode(ISD::BITCAST, N->getDebugLoc(), VT, Op); } return SDValue(); } Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=119990&r1=119989&r2=119990&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Mon Nov 22 21:31:01 2010 @@ -740,7 +740,7 @@ SDValue LowerShift(SDValue Op, SelectionDAG &DAG) const; SDValue BuildFILD(SDValue Op, EVT SrcVT, SDValue Chain, SDValue StackSlot, SelectionDAG &DAG) const; - SDValue LowerBIT_CONVERT(SDValue op, SelectionDAG &DAG) const; + SDValue LowerBITCAST(SDValue op, SelectionDAG &DAG) const; SDValue LowerSINT_TO_FP(SDValue Op, SelectionDAG &DAG) const; SDValue LowerUINT_TO_FP(SDValue Op, SelectionDAG &DAG) const; SDValue LowerUINT_TO_FP_i64(SDValue Op, SelectionDAG &DAG) const; From peckw at wesleypeck.com Mon Nov 22 21:31:16 2010 From: peckw at wesleypeck.com (Wesley Peck) Date: Tue, 23 Nov 2010 03:31:16 -0000 Subject: [llvm-commits] [www] r119991 - /www/trunk/OpenProjects.html Message-ID: <20101123033116.E39B42A6C12C@llvm.org> Author: peckw Date: Mon Nov 22 21:31:16 2010 New Revision: 119991 URL: http://llvm.org/viewvc/llvm-project?rev=119991&view=rev Log: Removing open project completed in 119990. Modified: www/trunk/OpenProjects.html Modified: www/trunk/OpenProjects.html URL: http://llvm.org/viewvc/llvm-project/www/trunk/OpenProjects.html?rev=119991&r1=119990&r2=119991&view=diff ============================================================================== --- www/trunk/OpenProjects.html (original) +++ www/trunk/OpenProjects.html Mon Nov 22 21:31:16 2010 @@ -424,7 +424,6 @@ epilog. However, some paths through a function (e.g. an early exit) may not use all regs. Sinking the save down the CFG avoids useless work on these paths. Work has started on this, please inquire on llvmdev.

    • -
  • Rename ISD::BIT_CONVERT to ISD::BITCAST to match the llvm ir concept
  • Finish adapting existing targets to use the calling convention description mechanism (see lib/Target/X86/X86CallingConv.td for an example).
  • Implement interprocedural register allocation. The CallGraphSCCPass can be From sabre at nondot.org Mon Nov 22 22:04:25 2010 From: sabre at nondot.org (Chris Lattner) Date: Tue, 23 Nov 2010 04:04:25 -0000 Subject: [llvm-commits] [llvm] r119992 - in /llvm/trunk: include/llvm/Support/MathExtras.h include/llvm/System/SwapByteOrder.h unittests/Support/SwapByteOrderTest.cpp Message-ID: <20101123040425.D557D2A6C12C@llvm.org> Author: lattner Date: Mon Nov 22 22:04:25 2010 New Revision: 119992 URL: http://llvm.org/viewvc/llvm-project?rev=119992&view=rev Log: reimplement SwapByteOrder.h in terms of overloading instead of being in terms of excessively complex template logic. Modified: llvm/trunk/include/llvm/Support/MathExtras.h llvm/trunk/include/llvm/System/SwapByteOrder.h llvm/trunk/unittests/Support/SwapByteOrderTest.cpp Modified: llvm/trunk/include/llvm/Support/MathExtras.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/MathExtras.h?rev=119992&r1=119991&r2=119992&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/MathExtras.h (original) +++ llvm/trunk/include/llvm/Support/MathExtras.h Mon Nov 22 22:04:25 2010 @@ -14,7 +14,6 @@ #ifndef LLVM_SUPPORT_MATHEXTRAS_H #define LLVM_SUPPORT_MATHEXTRAS_H -#include "llvm/System/DataTypes.h" #include "llvm/System/SwapByteOrder.h" namespace llvm { @@ -119,19 +118,19 @@ /// ByteSwap_16 - This function returns a byte-swapped representation of the /// 16-bit argument, Value. inline uint16_t ByteSwap_16(uint16_t Value) { - return sys::SwapByteOrder(Value); + return sys::SwapByteOrder_16(Value); } /// ByteSwap_32 - This function returns a byte-swapped representation of the /// 32-bit argument, Value. inline uint32_t ByteSwap_32(uint32_t Value) { - return sys::SwapByteOrder(Value); + return sys::SwapByteOrder_32(Value); } /// ByteSwap_64 - This function returns a byte-swapped representation of the /// 64-bit argument, Value. inline uint64_t ByteSwap_64(uint64_t Value) { - return sys::SwapByteOrder(Value); + return sys::SwapByteOrder_64(Value); } /// CountLeadingZeros_32 - this function performs the platform optimal form of Modified: llvm/trunk/include/llvm/System/SwapByteOrder.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/System/SwapByteOrder.h?rev=119992&r1=119991&r2=119992&view=diff ============================================================================== --- llvm/trunk/include/llvm/System/SwapByteOrder.h (original) +++ llvm/trunk/include/llvm/System/SwapByteOrder.h Mon Nov 22 22:04:25 2010 @@ -15,7 +15,6 @@ #ifndef LLVM_SYSTEM_SWAP_BYTE_ORDER_H #define LLVM_SYSTEM_SWAP_BYTE_ORDER_H -#include "llvm/Support/type_traits.h" #include "llvm/System/DataTypes.h" #include #include @@ -23,24 +22,9 @@ namespace llvm { namespace sys { -template -inline -typename enable_if_c::is_integer, - value_type>::type -SwapByteOrder(value_type Value) { - // No swapping needed. - return Value; -} - -template -inline -typename enable_if_c::is_integer, - value_type>::type -SwapByteOrder(value_type Value) { - // Cast signed types to unsigned before swapping. - uint16_t value = static_cast(Value); +/// SwapByteOrder_16 - This function returns a byte-swapped representation of +/// the 16-bit argument. +inline uint16_t SwapByteOrder_16(uint16_t value) { #if defined(_MSC_VER) && !defined(_DEBUG) // The DLL version of the runtime lacks these functions (bug!?), but in a // release build they're replaced with BSWAP instructions anyway. @@ -48,20 +32,15 @@ #else uint16_t Hi = value << 8; uint16_t Lo = value >> 8; - return value_type(Hi | Lo); + return Hi | Lo; #endif } -template -inline -typename enable_if_c::is_integer, - value_type>::type -SwapByteOrder(value_type Value) { - // Cast signed types to unsigned before swapping. - uint32_t value = static_cast(Value); +/// SwapByteOrder_32 - This function returns a byte-swapped representation of +/// the 32-bit argument. +inline uint32_t SwapByteOrder_32(uint32_t value) { #if defined(__llvm__) || \ - (__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 3)) && !defined(__ICC) +(__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 3)) && !defined(__ICC) return __builtin_bswap32(value); #elif defined(_MSC_VER) && !defined(_DEBUG) return _byteswap_ulong(value); @@ -70,31 +49,52 @@ uint32_t Byte1 = value & 0x0000FF00; uint32_t Byte2 = value & 0x00FF0000; uint32_t Byte3 = value & 0xFF000000; - return value_type( - (Byte0 << 24) | (Byte1 << 8) | (Byte2 >> 8) | (Byte3 >> 24)); + return (Byte0 << 24) | (Byte1 << 8) | (Byte2 >> 8) | (Byte3 >> 24); #endif } -template -inline -typename enable_if_c::is_integer, - value_type>::type -SwapByteOrder(value_type Value) { - // Cast signed types to unsigned before swapping. - uint64_t value = static_cast(Value); +/// SwapByteOrder_64 - This function returns a byte-swapped representation of +/// the 64-bit argument. +inline uint64_t SwapByteOrder_64(uint64_t value) { #if defined(__llvm__) || \ - (__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 3)) && !defined(__ICC) +(__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 3)) && !defined(__ICC) return __builtin_bswap64(value); #elif defined(_MSC_VER) && !defined(_DEBUG) return _byteswap_uint64(value); #else uint64_t Hi = SwapByteOrder(uint32_t(value)); uint32_t Lo = SwapByteOrder(uint32_t(value >> 32)); - return value_type((Hi << 32) | Lo); + return (Hi << 32) | Lo; #endif } +inline unsigned char SwapByteOrder(unsigned char C) { return C; } +inline signed char SwapByteOrder(signed char C) { return C; } +inline char SwapByteOrder(char C) { return C; } + +inline unsigned short SwapByteOrder(unsigned short C) { return SwapByteOrder_16(C); } +inline signed short SwapByteOrder( signed short C) { return SwapByteOrder_16(C); } + +inline unsigned int SwapByteOrder(unsigned int C) { return SwapByteOrder_32(C); } +inline signed int SwapByteOrder( signed int C) { return SwapByteOrder_32(C); } + +#if __LONG_MAX__ == __INT_MAX__ +inline unsigned long SwapByteOrder(unsigned long C) { return SwapByteOrder_32(C); } +inline signed long SwapByteOrder( signed long C) { return SwapByteOrder_32(C); } +#elif __LONG_MAX__ == __LONG_LONG_MAX__ +inline unsigned long SwapByteOrder(unsigned long C) { return SwapByteOrder_64(C); } +inline signed long SwapByteOrder( signed long C) { return SwapByteOrder_64(C); } +#else +#error "Unknown long size!" +#endif + +inline unsigned long long SwapByteOrder(unsigned long long C) { + return SwapByteOrder_64(C); +} +inline signed long long SwapByteOrder(signed long long C) { + return SwapByteOrder_64(C); +} + } // end namespace sys } // end namespace llvm Modified: llvm/trunk/unittests/Support/SwapByteOrderTest.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/Support/SwapByteOrderTest.cpp?rev=119992&r1=119991&r2=119992&view=diff ============================================================================== --- llvm/trunk/unittests/Support/SwapByteOrderTest.cpp (original) +++ llvm/trunk/unittests/Support/SwapByteOrderTest.cpp Mon Nov 22 22:04:25 2010 @@ -92,37 +92,37 @@ } TEST(SwapByteOrder, uint8_t) { - EXPECT_EQ(uint8_t(0x11), sys::SwapByteOrder(0x11)); + EXPECT_EQ(uint8_t(0x11), sys::SwapByteOrder(uint8_t(0x11))); } TEST(SwapByteOrder, uint16_t) { - EXPECT_EQ(uint16_t(0x1122), sys::SwapByteOrder(0x2211)); + EXPECT_EQ(uint16_t(0x1122), sys::SwapByteOrder(uint16_t(0x2211))); } TEST(SwapByteOrder, uint32_t) { - EXPECT_EQ(uint32_t(0x11223344), sys::SwapByteOrder(0x44332211)); + EXPECT_EQ(uint32_t(0x11223344), sys::SwapByteOrder(uint32_t(0x44332211))); } TEST(SwapByteOrder, uint64_t) { EXPECT_EQ(uint64_t(0x1122334455667788ULL), - sys::SwapByteOrder(0x8877665544332211ULL)); + sys::SwapByteOrder(uint64_t(0x8877665544332211ULL))); } TEST(SwapByteOrder, int8_t) { - EXPECT_EQ(int8_t(0x11), sys::SwapByteOrder(0x11)); + EXPECT_EQ(int8_t(0x11), sys::SwapByteOrder(int8_t(0x11))); } TEST(SwapByteOrder, int16_t) { - EXPECT_EQ(int16_t(0x1122), sys::SwapByteOrder(0x2211)); + EXPECT_EQ(int16_t(0x1122), sys::SwapByteOrder(int16_t(0x2211))); } TEST(SwapByteOrder, int32_t) { - EXPECT_EQ(int32_t(0x11223344), sys::SwapByteOrder(0x44332211)); + EXPECT_EQ(int32_t(0x11223344), sys::SwapByteOrder(int32_t(0x44332211))); } TEST(SwapByteOrder, int64_t) { EXPECT_EQ(int64_t(0x1122334455667788LL), - sys::SwapByteOrder(0x8877665544332211LL)); + sys::SwapByteOrder(int64_t(0x8877665544332211LL))); } } From clattner at apple.com Mon Nov 22 22:06:57 2010 From: clattner at apple.com (Chris Lattner) Date: Mon, 22 Nov 2010 20:06:57 -0800 Subject: [llvm-commits] [llvm] r116247 - in /llvm/trunk: include/llvm/Support/MathExtras.h include/llvm/System/SwapByteOrder.h unittests/CMakeLists.txt unittests/Support/SwapByteOrderTest.cpp In-Reply-To: References: <20101011215616.6327D2A6C12E@llvm.org> <5C9BDA30-F5E9-415B-9D3B-ED72DB610CB2@apple.com> Message-ID: On Nov 17, 2010, at 10:59 PM, Michael Spencer wrote: >> >> This seems like *massive* overkill. All the template metaprogramming isn't making the code easier to read and follow, it is making it more verbose and difficult to understand. Instead of defining SwapByteOrder like this, why not just define overloads for signed/unsigned char/short/int/long/long long ? >> >> -Chris > > These were added due to concerns about which types were accepted. This > seemed like the cleanest and most explicit way to say what the intent > of each function was. > > Adding all of those overloads seems more complicated to me than this, > but I'm fine either way. As long as there are no surprises to the > user. Ok, done in r119992, thanks. -Chris From sabre at nondot.org Mon Nov 22 22:19:56 2010 From: sabre at nondot.org (Chris Lattner) Date: Tue, 23 Nov 2010 04:19:56 -0000 Subject: [llvm-commits] [llvm] r119993 - /llvm/trunk/include/llvm/System/SwapByteOrder.h Message-ID: <20101123041956.9AF362A6C12C@llvm.org> Author: lattner Date: Mon Nov 22 22:19:56 2010 New Revision: 119993 URL: http://llvm.org/viewvc/llvm-project?rev=119993&view=rev Log: fix a bug I introduced on the other side of the #ifdef Modified: llvm/trunk/include/llvm/System/SwapByteOrder.h Modified: llvm/trunk/include/llvm/System/SwapByteOrder.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/System/SwapByteOrder.h?rev=119993&r1=119992&r2=119993&view=diff ============================================================================== --- llvm/trunk/include/llvm/System/SwapByteOrder.h (original) +++ llvm/trunk/include/llvm/System/SwapByteOrder.h Mon Nov 22 22:19:56 2010 @@ -62,8 +62,8 @@ #elif defined(_MSC_VER) && !defined(_DEBUG) return _byteswap_uint64(value); #else - uint64_t Hi = SwapByteOrder(uint32_t(value)); - uint32_t Lo = SwapByteOrder(uint32_t(value >> 32)); + uint64_t Hi = SwapByteOrder(uint32_t(value)); + uint32_t Lo = SwapByteOrder(uint32_t(value >> 32)); return (Hi << 32) | Lo; #endif } From sabre at nondot.org Mon Nov 22 22:26:12 2010 From: sabre at nondot.org (Chris Lattner) Date: Tue, 23 Nov 2010 04:26:12 -0000 Subject: [llvm-commits] [llvm] r119994 - /llvm/trunk/include/llvm/System/SwapByteOrder.h Message-ID: <20101123042612.6C80F2A6C12C@llvm.org> Author: lattner Date: Mon Nov 22 22:26:12 2010 New Revision: 119994 URL: http://llvm.org/viewvc/llvm-project?rev=119994&view=rev Log: fix this harder. Modified: llvm/trunk/include/llvm/System/SwapByteOrder.h Modified: llvm/trunk/include/llvm/System/SwapByteOrder.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/System/SwapByteOrder.h?rev=119994&r1=119993&r2=119994&view=diff ============================================================================== --- llvm/trunk/include/llvm/System/SwapByteOrder.h (original) +++ llvm/trunk/include/llvm/System/SwapByteOrder.h Mon Nov 22 22:26:12 2010 @@ -62,8 +62,8 @@ #elif defined(_MSC_VER) && !defined(_DEBUG) return _byteswap_uint64(value); #else - uint64_t Hi = SwapByteOrder(uint32_t(value)); - uint32_t Lo = SwapByteOrder(uint32_t(value >> 32)); + uint64_t Hi = SwapByteOrder_32(uint32_t(value)); + uint32_t Lo = SwapByteOrder_32(uint32_t(value >> 32)); return (Hi << 32) | Lo; #endif } From wan at google.com Mon Nov 22 23:03:07 2010 From: wan at google.com (Zhanyong Wan) Date: Tue, 23 Nov 2010 05:03:07 -0000 Subject: [llvm-commits] [llvm] r119998 - /llvm/trunk/docs/CodingStandards.html Message-ID: <20101123050307.88B112A6C12C@llvm.org> Author: wan Date: Mon Nov 22 23:03:07 2010 New Revision: 119998 URL: http://llvm.org/viewvc/llvm-project?rev=119998&view=rev Log: Fix formatting nits in the coding standards. Reviewed by clattner. Modified: llvm/trunk/docs/CodingStandards.html Modified: llvm/trunk/docs/CodingStandards.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CodingStandards.html?rev=119998&r1=119997&r2=119998&view=diff ============================================================================== --- llvm/trunk/docs/CodingStandards.html (original) +++ llvm/trunk/docs/CodingStandards.html Mon Nov 22 23:03:07 2010 @@ -29,7 +29,7 @@
  • Treat Compiler Warnings Like Errors
  • Write Portable Code
    • -
  • Use of class/struct Keywords
    • +
  • Use of class/struct Keywords
  • Style Issues @@ -38,23 +38,23 @@
    1. A Public Header File is a Module
      2. -
    2. #include as Little as Possible
      3. +
    3. #include as Little as Possible
    4. Keep "internal" Headers Private
      5. -
    5. Use Early Exits and 'continue' to Simplify +
    6. Use Early Exits and continue to Simplify Code
      7. -
    7. Don't use "else" after a - return
      8. +
    8. Don't use else after a + return
    9. Turn Predicate Loops into Predicate Functions
  • The Low-Level Issues
    1. Assert Liberally
      2. -
    2. Do not use 'using namespace std'
      3. +
    3. Do not use 'using namespace std'
    4. Provide a virtual method anchor for classes in headers
      5. -
    5. Don't evaluate end() every time through a +
    6. Don't evaluate end() every time through a loop
    7. #include <iostream> is forbidden
      8. @@ -522,7 +522,7 @@
      - Use Early Exits and 'continue' to Simplify Code + Use Early Exits and continue to Simplify Code
      @@ -531,7 +531,7 @@ decisions have to be remembered by the reader to understand a block of code. Aim to reduce indentation where possible when it doesn't make it more difficult to understand the code. One great way to do this is by making use of early -exits and the 'continue' keyword in long loops. As an example of using an early +exits and the continue keyword in long loops. As an example of using an early exit from a function, consider this "bad" code:

      @@ -623,7 +623,7 @@

      This has all the benefits of using early exits from functions: it reduces nesting of the loop, it makes it easier to describe why the conditions are true, -and it makes it obvious to the reader that there is no "else" coming up that +and it makes it obvious to the reader that there is no else coming up that they have to push context into their brain for. If a loop is large, this can be a big understandability win.

      @@ -631,14 +631,14 @@
      - Don't use "else" after a return + Don't use else after a return

      For similar reasons above (reduction of indentation and easier reading), - please do not use "else" or "else if" after something that interrupts - control flow like return, break, continue, goto, etc. For example, this is + please do not use else or 'else if' after something that interrupts + control flow like return, break, continue, goto, etc. For example, this is "bad":

      @@ -943,7 +943,7 @@
      - Don't evaluate end() every time through a loop + Don't evaluate end() every time through a loop
      From rafael.espindola at gmail.com Mon Nov 22 23:28:13 2010 From: rafael.espindola at gmail.com (=?UTF-8?Q?Rafael_Esp=C3=ADndola?=) Date: Tue, 23 Nov 2010 05:28:13 +0000 Subject: [llvm-commits] [llvm] r119992 - in /llvm/trunk: include/llvm/Support/MathExtras.h include/llvm/System/SwapByteOrder.h unittests/Support/SwapByteOrderTest.cpp In-Reply-To: <20101123040425.D557D2A6C12C@llvm.org> References: <20101123040425.D557D2A6C12C@llvm.org> Message-ID: > + ?return sys::SwapByteOrder_16(Value); Should this be SwapByteOrder16? Cheers, Rafael From sabre at nondot.org Mon Nov 22 23:39:43 2010 From: sabre at nondot.org (Chris Lattner) Date: Mon, 22 Nov 2010 21:39:43 -0800 Subject: [llvm-commits] [llvm] r119992 - in /llvm/trunk: include/llvm/Support/MathExtras.h include/llvm/System/SwapByteOrder.h unittests/Support/SwapByteOrderTest.cpp In-Reply-To: References: <20101123040425.D557D2A6C12C@llvm.org> Message-ID: <3D0A4B72-2A58-4775-BDB3-16DEA5CF5CBD@nondot.org> On Nov 22, 2010, at 9:28 PM, Rafael Esp?ndola wrote: >> + return sys::SwapByteOrder_16(Value); > > Should this be SwapByteOrder16? This is following the style of the functions in llvm/Support/MathExtras.h. It is expected that clients will just use SwapByteOrder(x) -Chris From rafael.espindola at gmail.com Mon Nov 22 23:49:36 2010 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Tue, 23 Nov 2010 05:49:36 -0000 Subject: [llvm-commits] [llvm] r119999 - in /llvm/trunk: include/llvm/MC/MCAsmLayout.h lib/MC/MCAssembler.cpp Message-ID: <20101123054936.275892A6C12C@llvm.org> Author: rafael Date: Mon Nov 22 23:49:35 2010 New Revision: 119999 URL: http://llvm.org/viewvc/llvm-project?rev=119999&view=rev Log: Reuse data fragments while lowering. Patch by David Meyer. Modified: llvm/trunk/include/llvm/MC/MCAsmLayout.h llvm/trunk/lib/MC/MCAssembler.cpp Modified: llvm/trunk/include/llvm/MC/MCAsmLayout.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCAsmLayout.h?rev=119999&r1=119998&r2=119999&view=diff ============================================================================== --- llvm/trunk/include/llvm/MC/MCAsmLayout.h (original) +++ llvm/trunk/include/llvm/MC/MCAsmLayout.h Mon Nov 22 23:49:35 2010 @@ -59,8 +59,15 @@ /// the delta from the old size. void UpdateForSlide(MCFragment *F, int SlideAmount); - /// \brief Update the layout because a fragment has been replaced. - void FragmentReplaced(MCFragment *Src, MCFragment *Dst); + /// \brief Update the layout, replacing Src with Dst. The contents + /// of Src and Dst are not modified, and must be copied by the caller. + /// Src will be removed from the layout, but not deleted. + void ReplaceFragment(MCFragment *Src, MCFragment *Dst); + + /// \brief Update the layout to coalesce Src into Dst. The contents + /// of Src and Dst are not modified, and must be coalesced by the caller. + /// Src will be removed from the layout, but not deleted. + void CoalesceFragments(MCFragment *Src, MCFragment *Dst); /// \brief Perform a full layout. void LayoutFile(); Modified: llvm/trunk/lib/MC/MCAssembler.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCAssembler.cpp?rev=119999&r1=119998&r2=119999&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCAssembler.cpp (original) +++ llvm/trunk/lib/MC/MCAssembler.cpp Mon Nov 22 23:49:35 2010 @@ -113,12 +113,40 @@ } } -void MCAsmLayout::FragmentReplaced(MCFragment *Src, MCFragment *Dst) { +void MCAsmLayout::ReplaceFragment(MCFragment *Src, MCFragment *Dst) { + MCSectionData *SD = Src->getParent(); + + // Insert Dst immediately before Src + SD->getFragmentList().insert(Src, Dst); + + // Set the data fragment's layout data. + Dst->setParent(Src->getParent()); + Dst->setAtom(Src->getAtom()); + Dst->setLayoutOrder(Src->getLayoutOrder()); + if (LastValidFragment == Src) LastValidFragment = Dst; Dst->Offset = Src->Offset; Dst->EffectiveSize = Src->EffectiveSize; + + // Remove Src, but don't delete it yet. + SD->getFragmentList().remove(Src); +} + +void MCAsmLayout::CoalesceFragments(MCFragment *Src, MCFragment *Dst) { + assert(Src->getPrevNode() == Dst); + + if (isFragmentUpToDate(Src)) { + if (LastValidFragment == Src) + LastValidFragment = Dst; + Dst->EffectiveSize += Src->EffectiveSize; + } else { + // We don't know the effective size of Src, so we have to invalidate Dst. + UpdateForSlide(Dst, 0); + } + // Remove Src, but don't delete it yet. + Src->getParent()->getFragmentList().remove(Src); } uint64_t MCAsmLayout::getFragmentAddress(const MCFragment *F) const { @@ -890,6 +918,22 @@ return WasRelaxed; } +static void LowerInstFragment(MCInstFragment *IF, + MCDataFragment *DF) { + + uint64_t DataOffset = DF->getContents().size(); + + // Copy in the data + DF->getContents().append(IF->getCode().begin(), IF->getCode().end()); + + // Adjust the fixup offsets and add them to the data fragment. + for (unsigned i = 0, e = IF->getFixups().size(); i != e; ++i) { + MCFixup &F = IF->getFixups()[i]; + F.setOffset(DataOffset + F.getOffset()); + DF->getFixups().push_back(F); + } +} + void MCAssembler::FinishLayout(MCAsmLayout &Layout) { // Lower out any instruction fragments, to simplify the fixup application and // output. @@ -898,35 +942,42 @@ // cheap (we will mostly end up eliminating fragments and appending on to data // fragments), so the extra complexity downstream isn't worth it. Evaluate // this assumption. - for (iterator it = begin(), ie = end(); it != ie; ++it) { - MCSectionData &SD = *it; + unsigned FragmentIndex = 0; + for (unsigned i = 0, e = Layout.getSectionOrder().size(); i != e; ++i) { + MCSectionData &SD = *Layout.getSectionOrder()[i]; + MCDataFragment *CurDF = NULL; for (MCSectionData::iterator it2 = SD.begin(), ie2 = SD.end(); it2 != ie2; ++it2) { - MCInstFragment *IF = dyn_cast(it2); - if (!IF) - continue; + switch (it2->getKind()) { + default: + CurDF = NULL; + break; + case MCFragment::FT_Data: + CurDF = cast(it2); + break; + case MCFragment::FT_Inst: { + MCInstFragment *IF = cast(it2); + // Use the existing data fragment if possible. + if (CurDF && CurDF->getAtom() == IF->getAtom()) { + Layout.CoalesceFragments(IF, CurDF); + } else { + // Otherwise, create a new data fragment. + CurDF = new MCDataFragment(); + Layout.ReplaceFragment(IF, CurDF); + } - // Create a new data fragment for the instruction. - // - // FIXME-PERF: Reuse previous data fragment if possible. - MCDataFragment *DF = new MCDataFragment(); - SD.getFragmentList().insert(it2, DF); - - // Update the data fragments layout data. - DF->setParent(IF->getParent()); - DF->setAtom(IF->getAtom()); - DF->setLayoutOrder(IF->getLayoutOrder()); - Layout.FragmentReplaced(IF, DF); - - // Copy in the data and the fixups. - DF->getContents().append(IF->getCode().begin(), IF->getCode().end()); - for (unsigned i = 0, e = IF->getFixups().size(); i != e; ++i) - DF->getFixups().push_back(IF->getFixups()[i]); - - // Delete the instruction fragment and update the iterator. - SD.getFragmentList().erase(IF); - it2 = DF; + // Lower the Instruction Fragment + LowerInstFragment(IF, CurDF); + + // Delete the instruction fragment and update the iterator. + delete IF; + it2 = CurDF; + break; + } + } + // Since we may have merged fragments, fix the layout order. + it2->setLayoutOrder(FragmentIndex++); } } } From sabre at nondot.org Tue Nov 23 00:09:52 2010 From: sabre at nondot.org (Chris Lattner) Date: Tue, 23 Nov 2010 06:09:52 -0000 Subject: [llvm-commits] [llvm] r120002 - in /llvm/trunk: include/llvm/Support/MemoryBuffer.h lib/Support/MemoryBuffer.cpp Message-ID: <20101123060952.2A1212A6C12C@llvm.org> Author: lattner Date: Tue Nov 23 00:09:51 2010 New Revision: 120002 URL: http://llvm.org/viewvc/llvm-project?rev=120002&view=rev Log: Revert functionality doug added in r98575 that was never documented and only used by some clang stuff I just removed. Modified: llvm/trunk/include/llvm/Support/MemoryBuffer.h llvm/trunk/lib/Support/MemoryBuffer.cpp Modified: llvm/trunk/include/llvm/Support/MemoryBuffer.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/MemoryBuffer.h?rev=120002&r1=120001&r2=120002&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/MemoryBuffer.h (original) +++ llvm/trunk/include/llvm/Support/MemoryBuffer.h Tue Nov 23 00:09:51 2010 @@ -17,7 +17,6 @@ #include "llvm/ADT/StringRef.h" #include "llvm/System/DataTypes.h" #include -#include namespace llvm { @@ -63,12 +62,10 @@ /// it has the specified size. static MemoryBuffer *getFile(StringRef Filename, std::string *ErrStr = 0, - int64_t FileSize = -1, - struct stat *FileInfo = 0); + int64_t FileSize = -1); static MemoryBuffer *getFile(const char *Filename, std::string *ErrStr = 0, - int64_t FileSize = -1, - struct stat *FileInfo = 0); + int64_t FileSize = -1); /// getMemBuffer - Open the specified memory range as a MemoryBuffer. Note /// that InputData must be null terminated. @@ -104,12 +101,10 @@ /// in *ErrStr with a reason. static MemoryBuffer *getFileOrSTDIN(StringRef Filename, std::string *ErrStr = 0, - int64_t FileSize = -1, - struct stat *FileInfo = 0); + int64_t FileSize = -1); static MemoryBuffer *getFileOrSTDIN(const char *Filename, std::string *ErrStr = 0, - int64_t FileSize = -1, - struct stat *FileInfo = 0); + int64_t FileSize = -1); }; } // end namespace llvm Modified: llvm/trunk/lib/Support/MemoryBuffer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/MemoryBuffer.cpp?rev=120002&r1=120001&r2=120002&view=diff ============================================================================== --- llvm/trunk/lib/Support/MemoryBuffer.cpp (original) +++ llvm/trunk/lib/Support/MemoryBuffer.cpp Tue Nov 23 00:09:51 2010 @@ -144,20 +144,18 @@ /// returns an empty buffer. MemoryBuffer *MemoryBuffer::getFileOrSTDIN(StringRef Filename, std::string *ErrStr, - int64_t FileSize, - struct stat *FileInfo) { + int64_t FileSize) { if (Filename == "-") return getSTDIN(ErrStr); - return getFile(Filename, ErrStr, FileSize, FileInfo); + return getFile(Filename, ErrStr, FileSize); } MemoryBuffer *MemoryBuffer::getFileOrSTDIN(const char *Filename, std::string *ErrStr, - int64_t FileSize, - struct stat *FileInfo) { + int64_t FileSize) { if (strcmp(Filename, "-") == 0) return getSTDIN(ErrStr); - return getFile(Filename, ErrStr, FileSize, FileInfo); + return getFile(Filename, ErrStr, FileSize); } //===----------------------------------------------------------------------===// @@ -188,13 +186,13 @@ } MemoryBuffer *MemoryBuffer::getFile(StringRef Filename, std::string *ErrStr, - int64_t FileSize, struct stat *FileInfo) { + int64_t FileSize) { SmallString<256> PathBuf(Filename.begin(), Filename.end()); - return MemoryBuffer::getFile(PathBuf.c_str(), ErrStr, FileSize, FileInfo); + return MemoryBuffer::getFile(PathBuf.c_str(), ErrStr, FileSize); } MemoryBuffer *MemoryBuffer::getFile(const char *Filename, std::string *ErrStr, - int64_t FileSize, struct stat *FileInfo) { + int64_t FileSize) { int OpenFlags = O_RDONLY; #ifdef O_BINARY OpenFlags |= O_BINARY; // Open input file in binary mode on win32. @@ -208,16 +206,14 @@ // If we don't know the file size, use fstat to find out. fstat on an open // file descriptor is cheaper than stat on a random path. - if (FileSize == -1 || FileInfo) { - struct stat MyFileInfo; - struct stat *FileInfoPtr = FileInfo? FileInfo : &MyFileInfo; - + if (FileSize == -1) { + struct stat FileInfo; // TODO: This should use fstat64 when available. - if (fstat(FD, FileInfoPtr) == -1) { + if (fstat(FD, &FileInfo) == -1) { if (ErrStr) *ErrStr = sys::StrError(); return 0; } - FileSize = FileInfoPtr->st_size; + FileSize = FileInfo.st_size; } From zwarich at apple.com Tue Nov 23 00:32:37 2010 From: zwarich at apple.com (Cameron Zwarich) Date: Tue, 23 Nov 2010 06:32:37 -0000 Subject: [llvm-commits] [llvm] r120003 - /llvm/trunk/include/llvm/Analysis/DominatorInternals.h Message-ID: <20101123063237.4339B2A6C12C@llvm.org> Author: zwarich Date: Tue Nov 23 00:32:37 2010 New Revision: 120003 URL: http://llvm.org/viewvc/llvm-project?rev=120003&view=rev Log: Optimize a common case in the Lengauer-Tarjan dominators algorithm. This gives a 9.7% speedup running domtree on test-suite. Reviewed by Chris Lattner. Modified: llvm/trunk/include/llvm/Analysis/DominatorInternals.h Modified: llvm/trunk/include/llvm/Analysis/DominatorInternals.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/DominatorInternals.h?rev=120003&r1=120002&r2=120003&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/DominatorInternals.h (original) +++ llvm/trunk/include/llvm/Analysis/DominatorInternals.h Tue Nov 23 00:32:37 2010 @@ -278,9 +278,16 @@ } } - DT.Info[DT.Vertex[WInfo.Semi]].Bucket.push_back(W); - typename GraphT::NodeType* WParent = DT.Vertex[WInfo.Parent]; + + // If V is a non-root vertex and sdom(V) = parent(V), then idom(V) is + // necessarily parent(V). In this case, set idom(V) here and avoid placing + // V into a bucket. + if (WInfo.Semi == WInfo.Parent) + DT.IDoms[W] = WParent; + else + DT.Info[DT.Vertex[WInfo.Semi]].Bucket.push_back(W); + Link(DT, WInfo.Parent, W, WInfo); // Step #3: Implicitly define the immediate dominator of vertices From rafael.espindola at gmail.com Tue Nov 23 01:20:12 2010 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Tue, 23 Nov 2010 07:20:12 -0000 Subject: [llvm-commits] [llvm] r120006 - in /llvm/trunk: lib/Target/X86/X86MCCodeEmitter.cpp test/MC/ELF/call-abs.ll Message-ID: <20101123072012.A9B612A6C12C@llvm.org> Author: rafael Date: Tue Nov 23 01:20:12 2010 New Revision: 120006 URL: http://llvm.org/viewvc/llvm-project?rev=120006&view=rev Log: Produce a relocation for pcrel absolute values. Based on a patch by David Meyer. Added: llvm/trunk/test/MC/ELF/call-abs.ll Modified: llvm/trunk/lib/Target/X86/X86MCCodeEmitter.cpp Modified: llvm/trunk/lib/Target/X86/X86MCCodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86MCCodeEmitter.cpp?rev=120006&r1=120005&r2=120006&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86MCCodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/X86/X86MCCodeEmitter.cpp Tue Nov 23 01:20:12 2010 @@ -218,18 +218,22 @@ EmitImmediate(const MCOperand &DispOp, unsigned Size, MCFixupKind FixupKind, unsigned &CurByte, raw_ostream &OS, SmallVectorImpl &Fixups, int ImmOffset) const { - // If this is a simple integer displacement that doesn't require a relocation, - // emit it now. + const MCExpr *Expr = NULL; if (DispOp.isImm()) { - // FIXME: is this right for pc-rel encoding?? Probably need to emit this as - // a fixup if so. - EmitConstant(DispOp.getImm()+ImmOffset, Size, CurByte, OS); - return; + // If this is a simple integer displacement that doesn't require a relocation, + // emit it now. + if (FixupKind != MCFixupKind(X86::reloc_pcrel_1byte) && + FixupKind != MCFixupKind(X86::reloc_pcrel_2byte) && + FixupKind != MCFixupKind(X86::reloc_pcrel_4byte)) { + EmitConstant(DispOp.getImm()+ImmOffset, Size, CurByte, OS); + return; + } + Expr = MCConstantExpr::Create(DispOp.getImm(), Ctx); + } else { + Expr = DispOp.getExpr(); } // If we have an immoffset, add it to the expression. - const MCExpr *Expr = DispOp.getExpr(); - if (FixupKind == FK_Data_4 && StartsWithGlobalOffsetTable(Expr)) { assert(ImmOffset == 0); Added: llvm/trunk/test/MC/ELF/call-abs.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/call-abs.ll?rev=120006&view=auto ============================================================================== --- llvm/trunk/test/MC/ELF/call-abs.ll (added) +++ llvm/trunk/test/MC/ELF/call-abs.ll Tue Nov 23 01:20:12 2010 @@ -0,0 +1,16 @@ +; RUN: llc -filetype=obj -mtriple i686-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +define i32 @f() nounwind optsize ssp { +entry: + %call = tail call i32 inttoptr (i64 42 to i32 ()*)() nounwind optsize + %add = add nsw i32 %call, 1 + ret i32 %add +} + +; CHECK: ('_relocations', [ +; CHECK-NEXT: # Relocation 0x00000000 +; CHECK-NEXT: (('r_offset', 0x00000004) +; CHECK-NEXT: ('r_sym', 0x00000000) +; CHECK-NEXT: ('r_type', 0x00000002) +; CHECK-NEXT: ), +; CHECK-NEXT: ]) From rafael.espindola at gmail.com Tue Nov 23 02:08:33 2010 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Tue, 23 Nov 2010 08:08:33 -0000 Subject: [llvm-commits] [llvm] r120009 - in /llvm/trunk: include/llvm/MC/MCAsmLayout.h lib/MC/MCAssembler.cpp Message-ID: <20101123080833.6A4BA2A6C12C@llvm.org> Author: rafael Date: Tue Nov 23 02:08:33 2010 New Revision: 120009 URL: http://llvm.org/viewvc/llvm-project?rev=120009&view=rev Log: Invalidate the layout on any relaxation, not just Instructions. Bug found by David Meyer. While here, remove unused argument and rename UpdateForSlide to Invalidate. Modified: llvm/trunk/include/llvm/MC/MCAsmLayout.h llvm/trunk/lib/MC/MCAssembler.cpp Modified: llvm/trunk/include/llvm/MC/MCAsmLayout.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCAsmLayout.h?rev=120009&r1=120008&r2=120009&view=diff ============================================================================== --- llvm/trunk/include/llvm/MC/MCAsmLayout.h (original) +++ llvm/trunk/include/llvm/MC/MCAsmLayout.h Tue Nov 23 02:08:33 2010 @@ -54,10 +54,9 @@ /// Get the assembler object this is a layout for. MCAssembler &getAssembler() const { return Assembler; } - /// \brief Update the layout because a fragment has been resized. The - /// fragments size should have already been updated, the \arg SlideAmount is - /// the delta from the old size. - void UpdateForSlide(MCFragment *F, int SlideAmount); + /// \brief Invalidate all following fragments because a fragment has been resized. The + /// fragments size should have already been updated. + void Invalidate(MCFragment *F); /// \brief Update the layout, replacing Src with Dst. The contents /// of Src and Dst are not modified, and must be copied by the caller. Modified: llvm/trunk/lib/MC/MCAssembler.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCAssembler.cpp?rev=120009&r1=120008&r2=120009&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCAssembler.cpp (original) +++ llvm/trunk/lib/MC/MCAssembler.cpp Tue Nov 23 02:08:33 2010 @@ -78,7 +78,7 @@ F->getLayoutOrder() <= LastValidFragment->getLayoutOrder()); } -void MCAsmLayout::UpdateForSlide(MCFragment *F, int SlideAmount) { +void MCAsmLayout::Invalidate(MCFragment *F) { // If this fragment wasn't already up-to-date, we don't need to do anything. if (!isFragmentUpToDate(F)) return; @@ -143,7 +143,7 @@ Dst->EffectiveSize += Src->EffectiveSize; } else { // We don't know the effective size of Src, so we have to invalidate Dst. - UpdateForSlide(Dst, 0); + Invalidate(Dst); } // Remove Src, but don't delete it yet. Src->getParent()->getFragmentList().remove(Src); @@ -819,7 +819,6 @@ VecOS.flush(); // Update the instruction fragment. - int SlideAmount = Code.size() - IF.getInstSize(); IF.setInst(Relaxed); IF.getCode() = Code; IF.getFixups().clear(); @@ -827,8 +826,6 @@ for (unsigned i = 0, e = Fixups.size(); i != e; ++i) IF.getFixups().push_back(Fixups[i]); - // Update the layout, and remember that we relaxed. - Layout.UpdateForSlide(&IF, SlideAmount); return true; } @@ -894,24 +891,29 @@ for (MCSectionData::iterator it2 = SD.begin(), ie2 = SD.end(); it2 != ie2; ++it2) { // Check if this is an fragment that needs relaxation. + bool relaxedFrag = false; switch(it2->getKind()) { default: break; case MCFragment::FT_Inst: - WasRelaxed |= RelaxInstruction(Writer, Layout, + relaxedFrag = RelaxInstruction(Writer, Layout, *cast(it2)); break; case MCFragment::FT_Org: - WasRelaxed |= RelaxOrg(Writer, Layout, *cast(it2)); + relaxedFrag = RelaxOrg(Writer, Layout, *cast(it2)); break; case MCFragment::FT_Dwarf: - WasRelaxed |= RelaxDwarfLineAddr(Writer, Layout, + relaxedFrag = RelaxDwarfLineAddr(Writer, Layout, *cast(it2)); break; case MCFragment::FT_LEB: - WasRelaxed |= RelaxLEB(Writer, Layout, *cast(it2)); + relaxedFrag = RelaxLEB(Writer, Layout, *cast(it2)); break; } + // Update the layout, and remember that we relaxed. + if (relaxedFrag) + Layout.Invalidate(it2); + WasRelaxed |= relaxedFrag; } } From baldrick at free.fr Tue Nov 23 04:16:18 2010 From: baldrick at free.fr (Duncan Sands) Date: Tue, 23 Nov 2010 10:16:18 -0000 Subject: [llvm-commits] [llvm] r120015 - in /llvm/trunk: include/llvm/Analysis/ConstantFolding.h lib/Analysis/ConstantFolding.cpp Message-ID: <20101123101618.6A0B32A6C12C@llvm.org> Author: baldrick Date: Tue Nov 23 04:16:18 2010 New Revision: 120015 URL: http://llvm.org/viewvc/llvm-project?rev=120015&view=rev Log: Clarify that constant folding of instructions applies when all operands are constant. There was in fact one exception to this (phi nodes) - so remove that exception (InstructionSimplify handles this so there should be no loss). Modified: llvm/trunk/include/llvm/Analysis/ConstantFolding.h llvm/trunk/lib/Analysis/ConstantFolding.cpp Modified: llvm/trunk/include/llvm/Analysis/ConstantFolding.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/ConstantFolding.h?rev=120015&r1=120014&r2=120015&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/ConstantFolding.h (original) +++ llvm/trunk/include/llvm/Analysis/ConstantFolding.h Tue Nov 23 04:16:18 2010 @@ -7,7 +7,8 @@ // //===----------------------------------------------------------------------===// // -// This file declares routines for folding instructions into constants. +// This file declares routines for folding instructions into constants when all +// operands are constants, for example "sub i32 1, 0" -> "1". // // Also, to supplement the basic VMCore ConstantExpr simplifications, // this file declares some additional folding routines that can make use of @@ -27,11 +28,11 @@ class Function; class Type; -/// ConstantFoldInstruction - Attempt to constant fold the specified -/// instruction. If successful, the constant result is returned, if not, null -/// is returned. Note that this function can only fail when attempting to fold -/// instructions like loads and stores, which have no constant expression form. -/// +/// ConstantFoldInstruction - Try to constant fold the specified instruction. +/// If successful, the constant result is returned, if not, null is returned. +/// Note that this fails if not all of the operands are constant. Otherwise, +/// this function can only fail when attempting to fold instructions like loads +/// and stores, which have no constant expression form. Constant *ConstantFoldInstruction(Instruction *I, const TargetData *TD = 0); /// ConstantFoldConstantExpression - Attempt to fold the constant expression Modified: llvm/trunk/lib/Analysis/ConstantFolding.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ConstantFolding.cpp?rev=120015&r1=120014&r2=120015&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ConstantFolding.cpp (original) +++ llvm/trunk/lib/Analysis/ConstantFolding.cpp Tue Nov 23 04:16:18 2010 @@ -695,22 +695,23 @@ // Constant Folding public APIs //===----------------------------------------------------------------------===// - -/// ConstantFoldInstruction - Attempt to constant fold the specified -/// instruction. If successful, the constant result is returned, if not, null -/// is returned. Note that this function can only fail when attempting to fold -/// instructions like loads and stores, which have no constant expression form. -/// +/// ConstantFoldInstruction - Try to constant fold the specified instruction. +/// If successful, the constant result is returned, if not, null is returned. +/// Note that this fails if not all of the operands are constant. Otherwise, +/// this function can only fail when attempting to fold instructions like loads +/// and stores, which have no constant expression form. Constant *llvm::ConstantFoldInstruction(Instruction *I, const TargetData *TD) { - // Handle PHI nodes specially here... + // Handle PHI nodes quickly here... if (PHINode *PN = dyn_cast(I)) { Constant *CommonValue = 0; for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i) { Value *Incoming = PN->getIncomingValue(i); - // If the incoming value is equal to the phi node itself or is undef then - // skip it. - if (Incoming == PN || isa(Incoming)) + // If the incoming value is undef then skip it. Note that while we could + // skip the value if it is equal to the phi node itself we choose not to + // because that would break the rule that constant folding only applies if + // all operands are constants. + if (isa(Incoming)) continue; // If the incoming value is not a constant, or is a different constant to // the one we saw previously, then give up. From foldr at codedgers.com Tue Nov 23 04:19:10 2010 From: foldr at codedgers.com (Mikhail Glushenkov) Date: Tue, 23 Nov 2010 10:19:10 +0000 (UTC) Subject: [llvm-commits] [PATCH] New Path API design. References: Message-ID: Michael Spencer writes: > * Remove the actual path class. Instead Twine, StringRef, and SmallString are > used depending on the argument. This makes the main part of the path API > stateless, and removes all that std::string allocation and copying we had > before. Very cool, I hope this goes in. From baldrick at free.fr Tue Nov 23 04:50:08 2010 From: baldrick at free.fr (Duncan Sands) Date: Tue, 23 Nov 2010 10:50:08 -0000 Subject: [llvm-commits] [llvm] r120016 - in /llvm/trunk: include/llvm/Analysis/InstructionSimplify.h lib/Analysis/InstructionSimplify.cpp Message-ID: <20101123105009.090002A6C12C@llvm.org> Author: baldrick Date: Tue Nov 23 04:50:08 2010 New Revision: 120016 URL: http://llvm.org/viewvc/llvm-project?rev=120016&view=rev Log: Expand a little on the description of what InstructionSimplify does. Modified: llvm/trunk/include/llvm/Analysis/InstructionSimplify.h llvm/trunk/lib/Analysis/InstructionSimplify.cpp Modified: llvm/trunk/include/llvm/Analysis/InstructionSimplify.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/InstructionSimplify.h?rev=120016&r1=120015&r2=120016&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/InstructionSimplify.h (original) +++ llvm/trunk/include/llvm/Analysis/InstructionSimplify.h Tue Nov 23 04:50:08 2010 @@ -7,9 +7,11 @@ // //===----------------------------------------------------------------------===// // -// This file declares routines for folding instructions into simpler forms that -// do not require creating new instructions. For example, this does constant -// folding, and can handle identities like (X&0)->0. +// This file declares routines for folding instructions into simpler forms +// that do not require creating new instructions. This does constant folding +// ("add i32 1, 1" -> "2") but can also handle non-constant operands, either +// returning a constant ("and i32 %x, 0" -> "0") or an already existing value +// ("and i32 %x, %x" -> "%x"). // //===----------------------------------------------------------------------===// Modified: llvm/trunk/lib/Analysis/InstructionSimplify.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/InstructionSimplify.cpp?rev=120016&r1=120015&r2=120016&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/InstructionSimplify.cpp (original) +++ llvm/trunk/lib/Analysis/InstructionSimplify.cpp Tue Nov 23 04:50:08 2010 @@ -8,8 +8,10 @@ //===----------------------------------------------------------------------===// // // This file implements routines for folding instructions into simpler forms -// that do not require creating new instructions. For example, this does -// constant folding, and can handle identities like (X&0)->0. +// that do not require creating new instructions. This does constant folding +// ("add i32 1, 1" -> "2") but can also handle non-constant operands, either +// returning a constant ("and i32 %x, 0" -> "0") or an already existing value +// ("and i32 %x, %x" -> "%x"). // //===----------------------------------------------------------------------===// From rafael.espindola at gmail.com Tue Nov 23 05:23:24 2010 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Tue, 23 Nov 2010 11:23:24 -0000 Subject: [llvm-commits] [llvm] r120017 - in /llvm/trunk/lib/Target/X86: AsmParser/X86AsmParser.cpp X86InstrInfo.td Message-ID: <20101123112324.569BC2A6C12C@llvm.org> Author: rafael Date: Tue Nov 23 05:23:24 2010 New Revision: 120017 URL: http://llvm.org/viewvc/llvm-project?rev=120017&view=rev Log: Implement the rex64 prefix. Modified: llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp llvm/trunk/lib/Target/X86/X86InstrInfo.td Modified: llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp?rev=120017&r1=120016&r2=120017&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp (original) +++ llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp Tue Nov 23 05:23:24 2010 @@ -707,7 +707,8 @@ bool isPrefix = Name == "lock" || Name == "rep" || Name == "repe" || Name == "repz" || - Name == "repne" || Name == "repnz"; + Name == "repne" || Name == "repnz" || + Name == "rex64"; // This does the actual operand parsing. Don't parse any more if we have a Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=120017&r1=120016&r2=120017&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Tue Nov 23 05:23:24 2010 @@ -1144,6 +1144,9 @@ // Lock instruction prefix def LOCK_PREFIX : I<0xF0, RawFrm, (outs), (ins), "lock", []>; +// Rex64 instruction prefix +def REX64_PREFIX : I<0x48, RawFrm, (outs), (ins), "rex64", []>; + // Repeat string operation instruction prefixes // These uses the DF flag in the EFLAGS register to inc or dec ECX let Defs = [ECX], Uses = [ECX,EFLAGS] in { From kalle.raiskila at nokia.com Tue Nov 23 07:27:59 2010 From: kalle.raiskila at nokia.com (Kalle Raiskila) Date: Tue, 23 Nov 2010 13:27:59 -0000 Subject: [llvm-commits] [llvm] r120022 - in /llvm/trunk: lib/Target/CellSPU/SPUISelLowering.cpp test/CodeGen/CellSPU/div_ops.ll Message-ID: <20101123132759.E0F8D2A6C12C@llvm.org> Author: kraiskil Date: Tue Nov 23 07:27:59 2010 New Revision: 120022 URL: http://llvm.org/viewvc/llvm-project?rev=120022&view=rev Log: Division by pow-of-2 is not cheap on SPU, do it with shifts. Added: llvm/trunk/test/CodeGen/CellSPU/div_ops.ll Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp?rev=120022&r1=120021&r2=120022&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Tue Nov 23 07:27:59 2010 @@ -97,8 +97,6 @@ SPUTargetLowering::SPUTargetLowering(SPUTargetMachine &TM) : TargetLowering(TM, new TargetLoweringObjectFileELF()), SPUTM(TM) { - // Fold away setcc operations if possible. - setPow2DivIsCheap(); // Use _setjmp/_longjmp instead of setjmp/longjmp. setUseUnderscoreSetJmp(true); Added: llvm/trunk/test/CodeGen/CellSPU/div_ops.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/div_ops.ll?rev=120022&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/div_ops.ll (added) +++ llvm/trunk/test/CodeGen/CellSPU/div_ops.ll Tue Nov 23 07:27:59 2010 @@ -0,0 +1,22 @@ +; RUN: llc --march=cellspu %s -o - | FileCheck %s + +; signed division rounds towards zero, rotma don't. +define i32 @sdivide (i32 %val ) +{ +; CHECK: rotmai +; CHECK: rotmi +; CHECK: a +; CHECK: rotmai +; CHECK: bi $lr + %rv = sdiv i32 %val, 4 + ret i32 %rv +} + +define i32 @udivide (i32 %val ) +{ +; CHECK: rotmi +; CHECK: bi $lr + %rv = udiv i32 %val, 4 + ret i32 %rv +} + From baldrick at free.fr Tue Nov 23 08:23:47 2010 From: baldrick at free.fr (Duncan Sands) Date: Tue, 23 Nov 2010 14:23:47 -0000 Subject: [llvm-commits] [llvm] r120024 - in /llvm/trunk: lib/Transforms/InstCombine/InstCombine.h lib/Transforms/InstCombine/InstCombineAddSub.cpp lib/Transforms/InstCombine/InstCombineAndOrXor.cpp lib/Transforms/InstCombine/InstructionCombining.cpp test/Transforms/InstCombine/2010-11-23-Distributed.ll Message-ID: <20101123142347.825A32A6C12D@llvm.org> Author: baldrick Date: Tue Nov 23 08:23:47 2010 New Revision: 120024 URL: http://llvm.org/viewvc/llvm-project?rev=120024&view=rev Log: Exploit distributive laws (eg: And distributes over Or, Mul over Add, etc) in a fairly systematic way in instcombine. Some of these cases were already dealt with, in which case I removed the existing code. The case of Add has a bunch of funky logic which covers some of this plus a few variants (considers shifts to be a form of multiplication), which I didn't touch. The simplification performed is: A*B+A*C -> A*(B+C). The improvement is to do this in cases that were not already handled [such as A*B-A*C -> A*(B-C), which was reported on the mailing list], and also to do it more often by not checking for "only one use" if "B+C" simplifies. Added: llvm/trunk/test/Transforms/InstCombine/2010-11-23-Distributed.ll Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombine.h llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombine.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombine.h?rev=120024&r1=120023&r2=120024&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombine.h (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombine.h Tue Nov 23 08:23:47 2010 @@ -290,6 +290,12 @@ /// operators which are associative or commutative. bool SimplifyAssociativeOrCommutative(BinaryOperator &I); + /// SimplifyDistributed - This tries to simplify binary operations which some + /// other binary operation distributes over (eg "A*B+A*C" -> "A*(B+C)" since + /// addition is distributed over by multiplication). Returns the result of + /// the simplification, or null if no simplification was performed. + Instruction *SimplifyDistributed(BinaryOperator &I); + /// SimplifyDemandedUseBits - Attempts to replace V with a simpler value /// based on the demanded bits. Value *SimplifyDemandedUseBits(Value *V, APInt DemandedMask, Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp?rev=120024&r1=120023&r2=120024&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp Tue Nov 23 08:23:47 2010 @@ -91,6 +91,8 @@ I.hasNoUnsignedWrap(), TD)) return ReplaceInstUsesWith(I, V); + if (Instruction *NV = SimplifyDistributed(I)) // (A*B)+(A*C) -> A*(B+C) + return NV; if (Constant *RHSC = dyn_cast(RHS)) { if (ConstantInt *CI = dyn_cast(RHSC)) { @@ -548,6 +550,9 @@ if (Op0 == Op1) // sub X, X -> 0 return ReplaceInstUsesWith(I, Constant::getNullValue(I.getType())); + if (Instruction *NV = SimplifyDistributed(I)) // (A*B)-(A*C) -> A*(B-C) + return NV; + // If this is a 'B = x-(-A)', change to B = x+A. This preserves NSW/NUW. if (Value *V = dyn_castNegVal(Op1)) { BinaryOperator *Res = BinaryOperator::CreateAdd(Op0, V); Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp?rev=120024&r1=120023&r2=120024&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp Tue Nov 23 08:23:47 2010 @@ -984,6 +984,9 @@ if (Value *V = SimplifyAndInst(Op0, Op1, TD)) return ReplaceInstUsesWith(I, V); + if (Instruction *NV = SimplifyDistributed(I)) // (A|B)&(A|C) -> A|(B&C) + return NV; + // See if we can simplify any instructions used by the instruction whose sole // purpose is to compute bits we don't care about. if (SimplifyDemandedInstructionBits(I)) @@ -1692,6 +1695,9 @@ if (Value *V = SimplifyOrInst(Op0, Op1, TD)) return ReplaceInstUsesWith(I, V); + if (Instruction *NV = SimplifyDistributed(I)) // (A&B)|(A&C) -> A&(B|C) + return NV; + // See if we can simplify any instructions used by the instruction whose sole // purpose is to compute bits we don't care about. if (SimplifyDemandedInstructionBits(I)) @@ -1766,7 +1772,7 @@ Value *C = 0, *D = 0; if (match(Op0, m_And(m_Value(A), m_Value(C))) && match(Op1, m_And(m_Value(B), m_Value(D)))) { - Value *V1 = 0, *V2 = 0, *V3 = 0; + Value *V1 = 0, *V2 = 0; C1 = dyn_cast(C); C2 = dyn_cast(D); if (C1 && C2) { // (A & C1)|(B & C2) @@ -1824,25 +1830,6 @@ } } } - - // Check to see if we have any common things being and'ed. If so, find the - // terms for V1 & (V2|V3). - if (Op0->hasOneUse() || Op1->hasOneUse()) { - V1 = 0; - if (A == B) // (A & C)|(A & D) == A & (C|D) - V1 = A, V2 = C, V3 = D; - else if (A == D) // (A & C)|(B & A) == A & (B|C) - V1 = A, V2 = B, V3 = C; - else if (C == B) // (A & C)|(C & D) == C & (A|D) - V1 = C, V2 = A, V3 = D; - else if (C == D) // (A & C)|(B & C) == C & (A|B) - V1 = C, V2 = A, V3 = B; - - if (V1) { - Value *Or = Builder->CreateOr(V2, V3, "tmp"); - return BinaryOperator::CreateAnd(V1, Or); - } - } // (A & (C0?-1:0)) | (B & ~(C0?-1:0)) -> C0 ? A : B, and commuted variants. // Don't do this for vector select idioms, the code generator doesn't handle @@ -1979,6 +1966,9 @@ if (Value *V = SimplifyXorInst(Op0, Op1, TD)) return ReplaceInstUsesWith(I, V); + if (Instruction *NV = SimplifyDistributed(I)) // (A&B)^(A&C) -> A&(B^C) + return NV; + // See if we can simplify any instructions used by the instruction whose sole // purpose is to compute bits we don't care about. if (SimplifyDemandedInstructionBits(I)) @@ -2172,29 +2162,8 @@ if ((A == C && B == D) || (A == D && B == C)) return BinaryOperator::CreateXor(A, B); } - - // (A & B)^(C & D) - if ((Op0I->hasOneUse() || Op1I->hasOneUse()) && - match(Op0I, m_And(m_Value(A), m_Value(B))) && - match(Op1I, m_And(m_Value(C), m_Value(D)))) { - // (X & Y)^(X & Y) -> (Y^Z) & X - Value *X = 0, *Y = 0, *Z = 0; - if (A == C) - X = A, Y = B, Z = D; - else if (A == D) - X = A, Y = B, Z = C; - else if (B == C) - X = B, Y = A, Z = D; - else if (B == D) - X = B, Y = A, Z = C; - - if (X) { - Value *NewOp = Builder->CreateXor(Y, Z, Op0->getName()); - return BinaryOperator::CreateAnd(NewOp, X); - } - } } - + // (icmp1 A, B) ^ (icmp2 A, B) --> (icmp3 A, B) if (ICmpInst *RHS = dyn_cast(I.getOperand(1))) if (ICmpInst *LHS = dyn_cast(I.getOperand(0))) Modified: llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp?rev=120024&r1=120023&r2=120024&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp Tue Nov 23 08:23:47 2010 @@ -237,6 +237,117 @@ } while (1); } +/// LeftDistributesOverRight - Whether "X LOp (Y ROp Z)" is always equal to +/// "(X LOp Y) ROp (Z LOp Z)". +static bool LeftDistributesOverRight(Instruction::BinaryOps LOp, + Instruction::BinaryOps ROp) { + switch (LOp) { + default: + return false; + + case Instruction::And: + // And distributes over Or and Xor. + switch (ROp) { + default: + return false; + case Instruction::Or: + case Instruction::Xor: + return true; + } + + case Instruction::Mul: + // Multiplication distributes over addition and subtraction. + switch (ROp) { + default: + return false; + case Instruction::Add: + case Instruction::Sub: + return true; + } + + case Instruction::Or: + // Or distributes over And. + switch (ROp) { + default: + return false; + case Instruction::And: + return true; + } + } +} + +/// RightDistributesOverLeft - Whether "(X LOp Y) ROp Z" is always equal to +/// "(X ROp Z) LOp (Y ROp Z)". +static bool RightDistributesOverLeft(Instruction::BinaryOps LOp, + Instruction::BinaryOps ROp) { + if (Instruction::isCommutative(ROp)) + return LeftDistributesOverRight(ROp, LOp); + // TODO: It would be nice to handle division, aka "(X + Y)/Z = X/Z + Y/Z", + // but this requires knowing that the addition does not overflow and other + // such subtleties. + return false; +} + +/// SimplifyDistributed - This tries to simplify binary operations which some +/// other binary operation distributes over (eg "A*B+A*C" -> "A*(B+C)" since +/// addition is distributed over by multiplication). Returns the result of +/// the simplification, or null if no simplification was performed. +Instruction *InstCombiner::SimplifyDistributed(BinaryOperator &I) { + BinaryOperator *Op0 = dyn_cast(I.getOperand(0)); + BinaryOperator *Op1 = dyn_cast(I.getOperand(1)); + if (!Op0 || !Op1 || Op0->getOpcode() != Op1->getOpcode()) + return 0; + + // The instruction has the form "(A op' B) op (C op' D)". + Value *A = Op0->getOperand(0); Value *B = Op0->getOperand(1); + Value *C = Op1->getOperand(0); Value *D = Op1->getOperand(1); + Instruction::BinaryOps OuterOpcode = I.getOpcode(); // op + Instruction::BinaryOps InnerOpcode = Op0->getOpcode(); // op' + + // Does "X op' (Y op Z)" always equal "(X op' Y) op (X op' Z)"? + bool LeftDistributes = LeftDistributesOverRight(InnerOpcode, OuterOpcode); + // Does "(X op Y) op' Z" always equal "(X op' Z) op (Y op' Z)"? + bool RightDistributes = RightDistributesOverLeft(OuterOpcode, InnerOpcode); + // Does "X op' Y" always equal "Y op' X"? + bool InnerCommutative = Instruction::isCommutative(InnerOpcode); + + if (LeftDistributes) + // Does the instruction have the form "(A op' B) op (A op' D)" or, in the + // commutative case, "(A op' B) op (C op' A)"? + if (A == C || (InnerCommutative && A == D)) { + if (A != C) + std::swap(C, D); + // Consider forming "A op' (B op D)". + // If "B op D" simplifies then it can be formed with no cost. + Value *RHS = SimplifyBinOp(OuterOpcode, B, D, TD); + // If "B op D" doesn't simplify then only proceed if both of the existing + // operations "A op' B" and "C op' D" will be zapped since no longer used. + if (!RHS && Op0->hasOneUse() && Op1->hasOneUse()) + RHS = Builder->CreateBinOp(OuterOpcode, B, D, Op1->getName()); + if (RHS) + return BinaryOperator::Create(InnerOpcode, A, RHS); + } + + if (RightDistributes) + // Does the instruction have the form "(A op' B) op (C op' B)" or, in the + // commutative case, "(A op' B) op (B op' D)"? + if (B == D || (InnerCommutative && B == C)) { + if (B != D) + std::swap(C, D); + // Consider forming "(A op C) op' B". + // If "A op C" simplifies then it can be formed with no cost. + Value *LHS = SimplifyBinOp(OuterOpcode, A, C, TD); + // If "A op C" doesn't simplify then only proceed if both of the existing + // operations "A op' B" and "C op' D" will be zapped since no longer used. + if (!LHS && Op0->hasOneUse() && Op1->hasOneUse()) + LHS = Builder->CreateBinOp(OuterOpcode, A, C, Op0->getName()); + if (LHS) + return BinaryOperator::Create(InnerOpcode, LHS, B); + } + + return 0; +} + // dyn_castNegVal - Given a 'sub' instruction, return the RHS of the instruction // if the LHS is a constant zero (which is the 'negate' form). // Added: llvm/trunk/test/Transforms/InstCombine/2010-11-23-Distributed.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2010-11-23-Distributed.ll?rev=120024&view=auto ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/2010-11-23-Distributed.ll (added) +++ llvm/trunk/test/Transforms/InstCombine/2010-11-23-Distributed.ll Tue Nov 23 08:23:47 2010 @@ -0,0 +1,11 @@ +; RUN: opt < %s -instcombine -S | FileCheck %s +define i32 @foo(i32 %x, i32 %y) { +; CHECK: @foo + %add = add nsw i32 %y, %x + %mul = mul nsw i32 %add, %y + %square = mul nsw i32 %y, %y + %res = sub i32 %mul, %square +; CHECK: %res = mul i32 %x, %y + ret i32 %res +; CHECK: ret i32 %res +} From geek4civic at gmail.com Tue Nov 23 08:51:16 2010 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Tue, 23 Nov 2010 23:51:16 +0900 Subject: [llvm-commits] [Review request] test/CodeGen/X86: Add cases for Win64 to 67 tests In-Reply-To: References: Message-ID: Good midnight. Michael, thank you to comment. >> * 0001-test-CodeGen-X86-fold-mul-lohi.ll-FileCheck-ize-and-.patch >> >> Win64 tends to emit "lea (%rip)". I excluded it from win64 tests. > > I think this is correct due to how Windows does PIC, but I'm not > totally sure, as I'm not sure what code was generated on Linux before > r43230. I could make this win64-aware, to detect only lea (%rip), though, I thought it might not be a test for win64. >> * 0002-test-CodeGen-X86-red-zone.ll-Add-explicit-mtriple-x8.patch >> >> ?Win64 doesn't use redzone stuff. > > Looks good to me. When win64 codegen would become more efficiently, I could add a pattern "w/o noredzone, similar sequences would be emitted on win64". >> * 0003-test-CodeGen-X86-sse_reload_fold.ll-FileCheck-ize-an.patch >> >> ?I don't understand what it intends. I am happy if someone explain to me. :) > > Looks good, except |& can be changed to |. I don't really know what > this is testing. It catches llc's diagnostic messages to stderr. The original test does, too. >> * 0004-test-CodeGen-X86-store_op_load_fold2.ll-Add-a-test-f.patch >> >> ?Alignment of 13th member in the struct makes difference. > > I would feel better if I actually knew what was being tested, but if > the index is indeed significant, this looks good. I will wait for 3rd opinion. >> * 0005-test-CodeGen-X86-v2f32.ll-Fix-missing-tests-and-add-.patch >> >> ?I re-enabled 3 tests and added *as-is* Win64's patterns. > > This looks correct to me. Stupid Windows x86-64 only using 4 GPRs for > argument passing :(. Although I think we can get rid of the shadow > stack because this is a leaf function. In general, ToT win64 codegen tends to emit redundant stack operations even for leaf functions. I think it would not be needed. Please tell me its background, anyone. >> * 0006-test-CodeGen-X86-Add-the-as-is-pattern-for-Win64.patch >> >> ?I added *as-is* patterns for Win64. I intend for reviewrs to help to >> reduce their expressions. > > This one is going to take a while to review :P. Please try to rewrite and post them! :p Or improve win64 codegen! >> * 0007-test-CodeGen-X86-Mark-as-XFAIL-mingw-win32.-They-sho.patch >> >> ?I thought they could be fixed in future. When one were fixed, "llc >> -mtriple=x86_64-win32" should be added. > > I noticed you documented some of these. Can you document the rest and > please not only reference PR numbers? I will do and I will file a few related issues. >> * 0008-test-CodeGen-X86-FileCheck-ize-with-relaxed-expressi.patch >> >> ?Please watch out; >> ? ?- Is my FileCheck-izing reasonable? >> ? ?- Do relaxed patterns have any faults? > > diff --git a/test/CodeGen/X86/2007-01-08-X86-64-Pointer.ll > b/test/CodeGen/X86/2007-01-08-X86-64-Pointer.ll > index de226a1..90e7fab 100644 > --- a/test/CodeGen/X86/2007-01-08-X86-64-Pointer.ll > +++ b/test/CodeGen/X86/2007-01-08-X86-64-Pointer.ll > @@ -1,5 +1,8 @@ > -; RUN: llc %s -o - -march=x86-64 | grep {(%rdi,%rax,8)} > -; RUN: llc %s -o - -march=x86-64 | not grep {addq.*8} > +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s > +; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s > +; CHECK-NOT: {{addq.*8}} > +; CHECK: ? ? ({{%rdi,%rax|%rcx,%rax}},8) > +; CHECK-NOT: {{addq.*8}} > > The patterns can be changed to. > > +; CHECK-NOT: addq{{.*}}8 > +; CHECK: ? ? (%r{{di|cx}},%rax,8) > +; CHECK-NOT: addq{{.*}}8 > > A bunch of others are like this too. Put the minimum amount of text in > the brackets. I think it might be one's preference in style. For human's readability, I took; - {{regex}} may be widened if can. - If a pattern contains metachars for regex, it might be tightened. chapuni> +; CHECK: ? ? ({{%rdi,%rax|%rcx,%rax}},8) Anyway, this would be overkill. I prefer; chapuni> +; CHECK: ? ? ({{%rdi|%rcx}},%rax,8) I feel your suggestion would be overkill, too. bigcheese> +; CHECK: ? ? (%r{{di|cx}},%rax,8) > Only Linux and Windows are handled, not Darwin. I agree that all > testers should test code gen for more than just the host platform, but > we need to not exclude major platforms. I suppose x86_64-darwin uses AMD64 ABI. May I add 3rd action "llc -mtriple=x86_64(-apple)-darwin"? I doubt it would be redundant in most cases. > Other than that it looks fine, but I'm not sure if they are only > testing what the author wanted. I really wish people would document > their tests. Me too, sometimes I would like to know what each test intends. I expect every developer can improve tests occasionally. >> * 0009-test-CodeGen-X86-FileCheck-ize-and-add-the-case-for-.patch >> >> ?I added "WIN64:"(and similar) expressions to them. >> ?I wonder it might be reasonable. > > Adding WIN64 is OK if the test actually relies on how arguments are > passed or other ABI issues. Other than that, same comments as above. I added "WIN64" pattern when relaxed expressions would not match to one. Most of them must be due to ABI difference. > Thanks again for doing this. All these tests now pass for me on MSVC > 2010 32bit and MinGW32 on Windows 7 x64. I believe I could silence all test/CodeGen/X86 :) Thank you, ...Takumi From fvbommel at gmail.com Tue Nov 23 08:56:25 2010 From: fvbommel at gmail.com (Frits van Bommel) Date: Tue, 23 Nov 2010 15:56:25 +0100 Subject: [llvm-commits] [llvm] r120024 - in /llvm/trunk: lib/Transforms/InstCombine/InstCombine.h lib/Transforms/InstCombine/InstCombineAddSub.cpp lib/Transforms/InstCombine/InstCombineAndOrXor.cpp lib/Transforms/InstCombine/InstructionCombining.cpp test/ Message-ID: On Tue, Nov 23, 2010 at 3:23 PM, Duncan Sands wrote: > +/// LeftDistributesOverRight - Whether "X LOp (Y ROp Z)" is always equal to > +/// "(X LOp Y) ROp (Z LOp Z)". I believe you typo'd "(X LOp Y) ROp (X LOp Z)" here. > +static bool LeftDistributesOverRight(Instruction::BinaryOps LOp, > + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? Instruction::BinaryOps ROp) { [snip] > + ?// Does "X op' (Y op Z)" always equal "(X op' Y) op (X op' Z)"? > + ?bool LeftDistributes = LeftDistributesOverRight(InnerOpcode, OuterOpcode); > + ?// Does "(X op Y) op' Z" always equal "(X op' Z) op (Y op' Z)"? > + ?bool RightDistributes = RightDistributesOverLeft(OuterOpcode, InnerOpcode); Why are these two here instead of in the if() where they're tested? They don't seem to be reused... > + ?// Does "X op' Y" always equal "Y op' X"? > + ?bool InnerCommutative = Instruction::isCommutative(InnerOpcode); > + > + ?if (LeftDistributes) > + ? ?// Does the instruction have the form "(A op' B) op (A op' D)" or, in the > + ? ?// commutative case, "(A op' B) op (C op' A)"? > + ? ?if (A == C || (InnerCommutative && A == D)) { > + ? ? ?if (A != C) > + ? ? ? ?std::swap(C, D); > + ? ? ?// Consider forming "A op' (B op D)". > + ? ? ?// If "B op D" simplifies then it can be formed with no cost. > + ? ? ?Value *RHS = SimplifyBinOp(OuterOpcode, B, D, TD); > + ? ? ?// If "B op D" doesn't simplify then only proceed if both of the existing > + ? ? ?// operations "A op' B" and "C op' D" will be zapped since no longer used. You typo'd "since /they're/ no longer used" here. > + ? ? ?if (!RHS && Op0->hasOneUse() && Op1->hasOneUse()) > + ? ? ? ?RHS = Builder->CreateBinOp(OuterOpcode, B, D, Op1->getName()); > + ? ? ?if (RHS) > + ? ? ? ?return BinaryOperator::Create(InnerOpcode, A, RHS); > + ? ?} > + > + ?if (RightDistributes) > + ? ?// Does the instruction have the form "(A op' B) op (C op' B)" or, in the > + ? ?// commutative case, "(A op' B) op (B op' D)"? > + ? ?if (B == D || (InnerCommutative && B == C)) { > + ? ? ?if (B != D) > + ? ? ? ?std::swap(C, D); > + ? ? ?// Consider forming "(A op C) op' B". > + ? ? ?// If "A op C" simplifies then it can be formed with no cost. > + ? ? ?Value *LHS = SimplifyBinOp(OuterOpcode, A, C, TD); > + ? ? ?// If "A op C" doesn't simplify then only proceed if both of the existing > + ? ? ?// operations "A op' B" and "C op' D" will be zapped since no longer used. And here too. > + ? ? ?if (!LHS && Op0->hasOneUse() && Op1->hasOneUse()) > + ? ? ? ?LHS = Builder->CreateBinOp(OuterOpcode, A, C, Op0->getName()); > + ? ? ?if (LHS) > + ? ? ? ?return BinaryOperator::Create(InnerOpcode, LHS, B); > + ? ?} > + > + ?return 0; > +} From undingen at gmail.com Tue Nov 23 09:01:48 2010 From: undingen at gmail.com (Marius Wachtler) Date: Tue, 23 Nov 2010 16:01:48 +0100 Subject: [llvm-commits] [llvm] r120024 - in /llvm/trunk: lib/Transforms/InstCombine/InstCombine.h lib/Transforms/InstCombine/InstCombineAddSub.cpp lib/Transforms/InstCombine/InstCombineAndOrXor.cpp lib/Transforms/InstCombine/InstructionCombining.cpp test/ Message-ID: On Tue, Nov 23, 2010 at 3:23 PM, Duncan Sands wrote: > Author: baldrick > Date: Tue Nov 23 08:23:47 2010 > New Revision: 120024 > > URL: http://llvm.org/viewvc/llvm-project?rev=120024&view=rev > Log: > Exploit distributive laws (eg: And distributes over Or, Mul over Add, etc) in a > fairly systematic way in instcombine. ?Some of these cases were already dealt > with, in which case I removed the existing code. ?The case of Add has a bunch of > funky logic which covers some of this plus a few variants (considers shifts to be > a form of multiplication), which I didn't touch. ?The simplification performed is: > A*B+A*C -> A*(B+C). ?The improvement is to do this in cases that were not already > handled [such as A*B-A*C -> A*(B-C), which was reported on the mailing list], and > also to do it more often by not checking for "only one use" if "B+C" simplifies. > > Added: > ? ?llvm/trunk/test/Transforms/InstCombine/2010-11-23-Distributed.ll > Modified: > ? ?llvm/trunk/lib/Transforms/InstCombine/InstCombine.h > ? ?llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp > ? ?llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp > ? ?llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp > > Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombine.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombine.h?rev=120024&r1=120023&r2=120024&view=diff > ============================================================================== > --- llvm/trunk/lib/Transforms/InstCombine/InstCombine.h (original) > +++ llvm/trunk/lib/Transforms/InstCombine/InstCombine.h Tue Nov 23 08:23:47 2010 > @@ -290,6 +290,12 @@ > ? /// operators which are associative or commutative. > ? bool SimplifyAssociativeOrCommutative(BinaryOperator &I); > > + ?/// SimplifyDistributed - This tries to simplify binary operations which some > + ?/// other binary operation distributes over (eg "A*B+A*C" -> "A*(B+C)" since > + ?/// addition is distributed over by multiplication). ?Returns the result of > + ?/// the simplification, or null if no simplification was performed. > + ?Instruction *SimplifyDistributed(BinaryOperator &I); > + > ? /// SimplifyDemandedUseBits - Attempts to replace V with a simpler value > ? /// based on the demanded bits. > ? Value *SimplifyDemandedUseBits(Value *V, APInt DemandedMask, > > Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp?rev=120024&r1=120023&r2=120024&view=diff > ============================================================================== > --- llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp (original) > +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp Tue Nov 23 08:23:47 2010 > @@ -91,6 +91,8 @@ > ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?I.hasNoUnsignedWrap(), TD)) > ? ? return ReplaceInstUsesWith(I, V); > > + ?if (Instruction *NV = SimplifyDistributed(I)) // (A*B)+(A*C) -> A*(B+C) > + ? ?return NV; > > ? if (Constant *RHSC = dyn_cast(RHS)) { > ? ? if (ConstantInt *CI = dyn_cast(RHSC)) { > @@ -548,6 +550,9 @@ > ? if (Op0 == Op1) ? ? ? ? ? ? ? ? ? ? ? ?// sub X, X ?-> 0 > ? ? return ReplaceInstUsesWith(I, Constant::getNullValue(I.getType())); > > + ?if (Instruction *NV = SimplifyDistributed(I)) // (A*B)-(A*C) -> A*(B-C) > + ? ?return NV; > + > ? // If this is a 'B = x-(-A)', change to B = x+A. ?This preserves NSW/NUW. > ? if (Value *V = dyn_castNegVal(Op1)) { > ? ? BinaryOperator *Res = BinaryOperator::CreateAdd(Op0, V); > > Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp?rev=120024&r1=120023&r2=120024&view=diff > ============================================================================== > --- llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp (original) > +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp Tue Nov 23 08:23:47 2010 > @@ -984,6 +984,9 @@ > ? if (Value *V = SimplifyAndInst(Op0, Op1, TD)) > ? ? return ReplaceInstUsesWith(I, V); > > + ?if (Instruction *NV = SimplifyDistributed(I)) // (A|B)&(A|C) -> A|(B&C) > + ? ?return NV; > + > ? // See if we can simplify any instructions used by the instruction whose sole > ? // purpose is to compute bits we don't care about. > ? if (SimplifyDemandedInstructionBits(I)) > @@ -1692,6 +1695,9 @@ > ? if (Value *V = SimplifyOrInst(Op0, Op1, TD)) > ? ? return ReplaceInstUsesWith(I, V); > > + ?if (Instruction *NV = SimplifyDistributed(I)) // (A&B)|(A&C) -> A&(B|C) > + ? ?return NV; > + > ? // See if we can simplify any instructions used by the instruction whose sole > ? // purpose is to compute bits we don't care about. > ? if (SimplifyDemandedInstructionBits(I)) > @@ -1766,7 +1772,7 @@ > ? Value *C = 0, *D = 0; > ? if (match(Op0, m_And(m_Value(A), m_Value(C))) && > ? ? ? match(Op1, m_And(m_Value(B), m_Value(D)))) { > - ? ?Value *V1 = 0, *V2 = 0, *V3 = 0; > + ? ?Value *V1 = 0, *V2 = 0; > ? ? C1 = dyn_cast(C); > ? ? C2 = dyn_cast(D); > ? ? if (C1 && C2) { ?// (A & C1)|(B & C2) > @@ -1824,25 +1830,6 @@ > ? ? ? ? } > ? ? ? } > ? ? } > - > - ? ?// Check to see if we have any common things being and'ed. ?If so, find the > - ? ?// terms for V1 & (V2|V3). > - ? ?if (Op0->hasOneUse() || Op1->hasOneUse()) { > - ? ? ?V1 = 0; > - ? ? ?if (A == B) ? ? ?// (A & C)|(A & D) == A & (C|D) > - ? ? ? ?V1 = A, V2 = C, V3 = D; > - ? ? ?else if (A == D) // (A & C)|(B & A) == A & (B|C) > - ? ? ? ?V1 = A, V2 = B, V3 = C; > - ? ? ?else if (C == B) // (A & C)|(C & D) == C & (A|D) > - ? ? ? ?V1 = C, V2 = A, V3 = D; > - ? ? ?else if (C == D) // (A & C)|(B & C) == C & (A|B) > - ? ? ? ?V1 = C, V2 = A, V3 = B; > - > - ? ? ?if (V1) { > - ? ? ? ?Value *Or = Builder->CreateOr(V2, V3, "tmp"); > - ? ? ? ?return BinaryOperator::CreateAnd(V1, Or); > - ? ? ?} > - ? ?} > > ? ? // (A & (C0?-1:0)) | (B & ~(C0?-1:0)) -> ?C0 ? A : B, and commuted variants. > ? ? // Don't do this for vector select idioms, the code generator doesn't handle > @@ -1979,6 +1966,9 @@ > ? if (Value *V = SimplifyXorInst(Op0, Op1, TD)) > ? ? return ReplaceInstUsesWith(I, V); > > + ?if (Instruction *NV = SimplifyDistributed(I)) // (A&B)^(A&C) -> A&(B^C) > + ? ?return NV; > + > ? // See if we can simplify any instructions used by the instruction whose sole > ? // purpose is to compute bits we don't care about. > ? if (SimplifyDemandedInstructionBits(I)) > @@ -2172,29 +2162,8 @@ > ? ? ? if ((A == C && B == D) || (A == D && B == C)) > ? ? ? ? return BinaryOperator::CreateXor(A, B); > ? ? } > - > - ? ?// (A & B)^(C & D) > - ? ?if ((Op0I->hasOneUse() || Op1I->hasOneUse()) && > - ? ? ? ?match(Op0I, m_And(m_Value(A), m_Value(B))) && > - ? ? ? ?match(Op1I, m_And(m_Value(C), m_Value(D)))) { > - ? ? ?// (X & Y)^(X & Y) -> (Y^Z) & X > - ? ? ?Value *X = 0, *Y = 0, *Z = 0; > - ? ? ?if (A == C) > - ? ? ? ?X = A, Y = B, Z = D; > - ? ? ?else if (A == D) > - ? ? ? ?X = A, Y = B, Z = C; > - ? ? ?else if (B == C) > - ? ? ? ?X = B, Y = A, Z = D; > - ? ? ?else if (B == D) > - ? ? ? ?X = B, Y = A, Z = C; > - > - ? ? ?if (X) { > - ? ? ? ?Value *NewOp = Builder->CreateXor(Y, Z, Op0->getName()); > - ? ? ? ?return BinaryOperator::CreateAnd(NewOp, X); > - ? ? ?} > - ? ?} > ? } > - > + > ? // (icmp1 A, B) ^ (icmp2 A, B) --> (icmp3 A, B) > ? if (ICmpInst *RHS = dyn_cast(I.getOperand(1))) > ? ? if (ICmpInst *LHS = dyn_cast(I.getOperand(0))) > > Modified: llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp?rev=120024&r1=120023&r2=120024&view=diff > ============================================================================== > --- llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp (original) > +++ llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp Tue Nov 23 08:23:47 2010 > @@ -237,6 +237,117 @@ > ? } while (1); > ?} > > +/// LeftDistributesOverRight - Whether "X LOp (Y ROp Z)" is always equal to > +/// "(X LOp Y) ROp (Z LOp Z)". > +static bool LeftDistributesOverRight(Instruction::BinaryOps LOp, > + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? Instruction::BinaryOps ROp) { > + ?switch (LOp) { > + ?default: > + ? ?return false; > + > + ?case Instruction::And: > + ? ?// And distributes over Or and Xor. > + ? ?switch (ROp) { > + ? ?default: > + ? ? ?return false; > + ? ?case Instruction::Or: > + ? ?case Instruction::Xor: > + ? ? ?return true; > + ? ?} > + > + ?case Instruction::Mul: > + ? ?// Multiplication distributes over addition and subtraction. > + ? ?switch (ROp) { > + ? ?default: > + ? ? ?return false; > + ? ?case Instruction::Add: > + ? ?case Instruction::Sub: > + ? ? ?return true; > + ? ?} > + > + ?case Instruction::Or: > + ? ?// Or distributes over And. > + ? ?switch (ROp) { > + ? ?default: > + ? ? ?return false; > + ? ?case Instruction::And: > + ? ? ?return true; > + ? ?} > + ?} > +} > + > +/// RightDistributesOverLeft - Whether "(X LOp Y) ROp Z" is always equal to > +/// "(X ROp Z) LOp (Y ROp Z)". > +static bool RightDistributesOverLeft(Instruction::BinaryOps LOp, > + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? Instruction::BinaryOps ROp) { > + ?if (Instruction::isCommutative(ROp)) > + ? ?return LeftDistributesOverRight(ROp, LOp); > + ?// TODO: It would be nice to handle division, aka "(X + Y)/Z = X/Z + Y/Z", > + ?// but this requires knowing that the addition does not overflow and other > + ?// such subtleties. > + ?return false; > +} > + > +/// SimplifyDistributed - This tries to simplify binary operations which some > +/// other binary operation distributes over (eg "A*B+A*C" -> "A*(B+C)" since > +/// addition is distributed over by multiplication). ?Returns the result of > +/// the simplification, or null if no simplification was performed. > +Instruction *InstCombiner::SimplifyDistributed(BinaryOperator &I) { > + ?BinaryOperator *Op0 = dyn_cast(I.getOperand(0)); > + ?BinaryOperator *Op1 = dyn_cast(I.getOperand(1)); > + ?if (!Op0 || !Op1 || Op0->getOpcode() != Op1->getOpcode()) > + ? ?return 0; > + > + ?// The instruction has the form "(A op' B) op (C op' D)". > + ?Value *A = Op0->getOperand(0); Value *B = Op0->getOperand(1); > + ?Value *C = Op1->getOperand(0); Value *D = Op1->getOperand(1); > + ?Instruction::BinaryOps OuterOpcode = I.getOpcode(); // op > + ?Instruction::BinaryOps InnerOpcode = Op0->getOpcode(); // op' > + > + ?// Does "X op' (Y op Z)" always equal "(X op' Y) op (X op' Z)"? > + ?bool LeftDistributes = LeftDistributesOverRight(InnerOpcode, OuterOpcode); > + ?// Does "(X op Y) op' Z" always equal "(X op' Z) op (Y op' Z)"? > + ?bool RightDistributes = RightDistributesOverLeft(OuterOpcode, InnerOpcode); > + ?// Does "X op' Y" always equal "Y op' X"? > + ?bool InnerCommutative = Instruction::isCommutative(InnerOpcode); > + > + ?if (LeftDistributes) > + ? ?// Does the instruction have the form "(A op' B) op (A op' D)" or, in the > + ? ?// commutative case, "(A op' B) op (C op' A)"? > + ? ?if (A == C || (InnerCommutative && A == D)) { > + ? ? ?if (A != C) > + ? ? ? ?std::swap(C, D); > + ? ? ?// Consider forming "A op' (B op D)". > + ? ? ?// If "B op D" simplifies then it can be formed with no cost. > + ? ? ?Value *RHS = SimplifyBinOp(OuterOpcode, B, D, TD); > + ? ? ?// If "B op D" doesn't simplify then only proceed if both of the existing > + ? ? ?// operations "A op' B" and "C op' D" will be zapped since no longer used. > + ? ? ?if (!RHS && Op0->hasOneUse() && Op1->hasOneUse()) > + ? ? ? ?RHS = Builder->CreateBinOp(OuterOpcode, B, D, Op1->getName()); > + ? ? ?if (RHS) > + ? ? ? ?return BinaryOperator::Create(InnerOpcode, A, RHS); > + ? ?} > + > + ?if (RightDistributes) > + ? ?// Does the instruction have the form "(A op' B) op (C op' B)" or, in the > + ? ?// commutative case, "(A op' B) op (B op' D)"? > + ? ?if (B == D || (InnerCommutative && B == C)) { > + ? ? ?if (B != D) > + ? ? ? ?std::swap(C, D); > + ? ? ?// Consider forming "(A op C) op' B". > + ? ? ?// If "A op C" simplifies then it can be formed with no cost. > + ? ? ?Value *LHS = SimplifyBinOp(OuterOpcode, A, C, TD); > + ? ? ?// If "A op C" doesn't simplify then only proceed if both of the existing > + ? ? ?// operations "A op' B" and "C op' D" will be zapped since no longer used. > + ? ? ?if (!LHS && Op0->hasOneUse() && Op1->hasOneUse()) > + ? ? ? ?LHS = Builder->CreateBinOp(OuterOpcode, A, C, Op0->getName()); > + ? ? ?if (LHS) > + ? ? ? ?return BinaryOperator::Create(InnerOpcode, LHS, B); > + ? ?} > + > + ?return 0; > +} > + > ?// dyn_castNegVal - Given a 'sub' instruction, return the RHS of the instruction > ?// if the LHS is a constant zero (which is the 'negate' form). > ?// > > Added: llvm/trunk/test/Transforms/InstCombine/2010-11-23-Distributed.ll > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2010-11-23-Distributed.ll?rev=120024&view=auto > ============================================================================== > --- llvm/trunk/test/Transforms/InstCombine/2010-11-23-Distributed.ll (added) > +++ llvm/trunk/test/Transforms/InstCombine/2010-11-23-Distributed.ll Tue Nov 23 08:23:47 2010 > @@ -0,0 +1,11 @@ > +; RUN: opt < %s -instcombine -S | FileCheck %s > +define i32 @foo(i32 %x, i32 %y) { > +; CHECK: @foo > + ?%add = add nsw i32 %y, %x > + ?%mul = mul nsw i32 %add, %y > + ?%square = mul nsw i32 %y, %y > + ?%res = sub i32 %mul, %square > +; CHECK: %res = mul i32 %x, %y > + ?ret i32 %res > +; CHECK: ret i32 %res > +} > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > Hello I think you have a small error in the comment. +/// LeftDistributesOverRight - Whether "X LOp (Y ROp Z)" is always equal to +/// "(X LOp Y) ROp (Z LOp Z)". --> (X LOp Y) ROp (X LOp Z) From baldrick at free.fr Tue Nov 23 09:25:34 2010 From: baldrick at free.fr (Duncan Sands) Date: Tue, 23 Nov 2010 15:25:34 -0000 Subject: [llvm-commits] [llvm] r120025 - /llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp Message-ID: <20101123152534.DDC842A6C12C@llvm.org> Author: baldrick Date: Tue Nov 23 09:25:34 2010 New Revision: 120025 URL: http://llvm.org/viewvc/llvm-project?rev=120025&view=rev Log: Fix typo pointed out by Frits van Bommel and Marius Wachtler. Modified: llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp Modified: llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp?rev=120025&r1=120024&r2=120025&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp Tue Nov 23 09:25:34 2010 @@ -238,7 +238,7 @@ } /// LeftDistributesOverRight - Whether "X LOp (Y ROp Z)" is always equal to -/// "(X LOp Y) ROp (Z LOp Z)". +/// "(X LOp Y) ROp (X LOp Z)". static bool LeftDistributesOverRight(Instruction::BinaryOps LOp, Instruction::BinaryOps ROp) { switch (LOp) { From baldrick at free.fr Tue Nov 23 09:28:14 2010 From: baldrick at free.fr (Duncan Sands) Date: Tue, 23 Nov 2010 15:28:14 -0000 Subject: [llvm-commits] [llvm] r120026 - /llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp Message-ID: <20101123152814.BD0D02A6C12C@llvm.org> Author: baldrick Date: Tue Nov 23 09:28:14 2010 New Revision: 120026 URL: http://llvm.org/viewvc/llvm-project?rev=120026&view=rev Log: Propagate LeftDistributes and RightDistributes into their only uses. Stylistic improvement suggested by Frits van Bommel. Modified: llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp Modified: llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp?rev=120026&r1=120025&r2=120026&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp Tue Nov 23 09:28:14 2010 @@ -304,14 +304,11 @@ Instruction::BinaryOps OuterOpcode = I.getOpcode(); // op Instruction::BinaryOps InnerOpcode = Op0->getOpcode(); // op' - // Does "X op' (Y op Z)" always equal "(X op' Y) op (X op' Z)"? - bool LeftDistributes = LeftDistributesOverRight(InnerOpcode, OuterOpcode); - // Does "(X op Y) op' Z" always equal "(X op' Z) op (Y op' Z)"? - bool RightDistributes = RightDistributesOverLeft(OuterOpcode, InnerOpcode); // Does "X op' Y" always equal "Y op' X"? bool InnerCommutative = Instruction::isCommutative(InnerOpcode); - if (LeftDistributes) + // Does "X op' (Y op Z)" always equal "(X op' Y) op (X op' Z)"? + if (LeftDistributesOverRight(InnerOpcode, OuterOpcode)) // Does the instruction have the form "(A op' B) op (A op' D)" or, in the // commutative case, "(A op' B) op (C op' A)"? if (A == C || (InnerCommutative && A == D)) { @@ -328,7 +325,8 @@ return BinaryOperator::Create(InnerOpcode, A, RHS); } - if (RightDistributes) + // Does "(X op Y) op' Z" always equal "(X op' Z) op (Y op' Z)"? + if (RightDistributesOverLeft(OuterOpcode, InnerOpcode)) // Does the instruction have the form "(A op' B) op (C op' B)" or, in the // commutative case, "(A op' B) op (B op' D)"? if (B == D || (InnerCommutative && B == C)) { From fvbommel at gmail.com Tue Nov 23 09:31:40 2010 From: fvbommel at gmail.com (Frits van Bommel) Date: Tue, 23 Nov 2010 16:31:40 +0100 Subject: [llvm-commits] [llvm] r120025 - /llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp In-Reply-To: <20101123152534.DDC842A6C12C@llvm.org> References: <20101123152534.DDC842A6C12C@llvm.org> Message-ID: On Tue, Nov 23, 2010 at 4:25 PM, Duncan Sands wrote: > Author: baldrick > Date: Tue Nov 23 09:25:34 2010 > New Revision: 120025 > > URL: http://llvm.org/viewvc/llvm-project?rev=120025&view=rev > Log: > Fix typo pointed out by Frits van Bommel and Marius Wachtler. I pointed out some other things too... From baldrick at free.fr Tue Nov 23 09:34:34 2010 From: baldrick at free.fr (Duncan Sands) Date: Tue, 23 Nov 2010 16:34:34 +0100 Subject: [llvm-commits] [llvm] r120024 - in /llvm/trunk: lib/Transforms/InstCombine/InstCombine.h lib/Transforms/InstCombine/InstCombineAddSub.cpp lib/Transforms/InstCombine/InstCombineAndOrXor.cpp lib/Transforms/InstCombine/InstructionCombining.cpp test/ In-Reply-To: References: Message-ID: <4CEBDF0A.5040409@free.fr> Hi Frits, > I believe you typo'd "(X LOp Y) ROp (X LOp Z)" here. yup - fixed. >> + // Does "X op' (Y op Z)" always equal "(X op' Y) op (X op' Z)"? >> + bool LeftDistributes = LeftDistributesOverRight(InnerOpcode, OuterOpcode); >> + // Does "(X op Y) op' Z" always equal "(X op' Z) op (Y op' Z)"? >> + bool RightDistributes = RightDistributesOverLeft(OuterOpcode, InnerOpcode); > > Why are these two here instead of in the if() where they're tested? > They don't seem to be reused... Just trying to prime peoples brains with all the essential information before getting into the guts of it. But I agree that it reads better the way you suggest, so I've changed it. >> + // If "B op D" doesn't simplify then only proceed if both of the existing >> + // operations "A op' B" and "C op' D" will be zapped since no longer used. > > You typo'd "since /they're/ no longer used" here. It might be grammatically a little naughty, but I think it is OK. The advantage is that this way the comment fits onto two lines nicely formatted :) >> + // If "A op C" doesn't simplify then only proceed if both of the existing >> + // operations "A op' B" and "C op' D" will be zapped since no longer used. Likewise. Ciao, Duncan. From baldrick at free.fr Tue Nov 23 09:35:34 2010 From: baldrick at free.fr (Duncan Sands) Date: Tue, 23 Nov 2010 16:35:34 +0100 Subject: [llvm-commits] [llvm] r120024 - in /llvm/trunk: lib/Transforms/InstCombine/InstCombine.h lib/Transforms/InstCombine/InstCombineAddSub.cpp lib/Transforms/InstCombine/InstCombineAndOrXor.cpp lib/Transforms/InstCombine/InstructionCombining.cpp test/ In-Reply-To: References: Message-ID: <4CEBDF46.8060809@free.fr> Hi Marius, > I think you have a small error in the comment. > > +/// LeftDistributesOverRight - Whether "X LOp (Y ROp Z)" is always equal to > +/// "(X LOp Y) ROp (Z LOp Z)". > > --> (X LOp Y) ROp (X LOp Z) you are correct - thanks. Now fixed. Ciao, Duncan. From ofv at wanadoo.es Tue Nov 23 09:59:54 2010 From: ofv at wanadoo.es (=?utf-8?Q?=C3=93scar?= Fuentes) Date: Tue, 23 Nov 2010 16:59:54 +0100 Subject: [llvm-commits] [Review request] CMake/MSVS: Support for the target "check" In-Reply-To: (NAKAMURA Takumi's message of "Wed, 24 Nov 2010 00:17:07 +0900") References: <87lj4svn3c.fsf@telefonica.net> Message-ID: <87eiact4hx.fsf@telefonica.net> Hello Takumi. NAKAMURA Takumi writes: > Good midnight, Oscar. > Your message is not posted to -commits, is it your intention? It was posted to -commits: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20101115/111925.html > I have not tried "MSVC_IDE" yet. > > I tried on nmake, but weird nmake doesn't launch tests. > I won't investigate anything on nmake, it must not be my task! :p > I would like to give someone tasks for nmake. :) I use nmake (and JOM, an nmake clone) but don't do testing. The support for testing on the cmake build was implemented by somebody else. I know almost nothing about it. > # imfo: who uses nmake for clang/llvm! I do. It is really useful. And JOM supports parallel builds on a similar way that gmake does. When you are working with cmake, for most ordinary applications you can assume that nmake is just another `make'. Actually, you need to worry about this two cases when writing cmake scripts that have to know the exact place where build products are placed: make-based build systems (build type is known when cmake is invoked) and ide-based build-systems (build type is selected by the user when the he starts the build and the output directory depend on that selection). > I assume; > > - ${CMAKE_BUILD_TYPE} should be empty on msvs/vcbuild/msbuild. > - ${CMAKE_CFG_INTDIR} might be "." on others. > > I will rewrite my patch as below similar; > > if CMAKE_BUILD_TYPE is not empty > BUILD_MODE obeys it. > elsif CMAKE_CFG_INTDIR is not "." > BUILD_MODE obeys it. (it might be "$(...)") > else > warn "Unittests cannot be executed" > endif Don't assume that CMAKE_BUILD_TYPE will be empty or not depending on the tool used for the build (IDE/make). Testing CMAKE_CFG_INTDIR is safer. So do this: if( CMAKE_CFG_INTDIR STREQUAL "." ) ... Use CMAKE_CFG_INTDIR else() ... CMAKE_CFG_INTDIR is not required endif() Please note that CMAKE_BUILD_TYPE is not needed for knowing the directory where build products are placed when using make-based build systems. Always using CMAKE_CFG_INTDIR should be safe, as tests/CMakeLists.txt already does: set(LLVM_TOOLS_DIR "${LLVM_TOOLS_BINARY_DIR}/${CMAKE_CFG_INTDIR}") That expands to the correct directory when you are using an IDE or a `make'. > (excuse me, I cannot refer to cmake reference manual now) > > > ps. I have no darwin hosts. :) From clattner at apple.com Tue Nov 23 12:10:23 2010 From: clattner at apple.com (Chris Lattner) Date: Tue, 23 Nov 2010 10:10:23 -0800 Subject: [llvm-commits] [llvm] r120017 - in /llvm/trunk/lib/Target/X86: AsmParser/X86AsmParser.cpp X86InstrInfo.td In-Reply-To: <20101123112324.569BC2A6C12C@llvm.org> References: <20101123112324.569BC2A6C12C@llvm.org> Message-ID: <3BB940FC-E6B9-4AA1-A12D-650879943CBC@apple.com> On Nov 23, 2010, at 3:23 AM, Rafael Espindola wrote: > Author: rafael > Date: Tue Nov 23 05:23:24 2010 > New Revision: 120017 > > URL: http://llvm.org/viewvc/llvm-project?rev=120017&view=rev > Log: > Implement the rex64 prefix. Nice! Testcase please, -Chris > > Modified: > llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp > llvm/trunk/lib/Target/X86/X86InstrInfo.td > > Modified: llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp?rev=120017&r1=120016&r2=120017&view=diff > ============================================================================== > --- llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp (original) > +++ llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp Tue Nov 23 05:23:24 2010 > @@ -707,7 +707,8 @@ > bool isPrefix = > Name == "lock" || Name == "rep" || > Name == "repe" || Name == "repz" || > - Name == "repne" || Name == "repnz"; > + Name == "repne" || Name == "repnz" || > + Name == "rex64"; > > > // This does the actual operand parsing. Don't parse any more if we have a > > Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=120017&r1=120016&r2=120017&view=diff > ============================================================================== > --- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original) > +++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Tue Nov 23 05:23:24 2010 > @@ -1144,6 +1144,9 @@ > // Lock instruction prefix > def LOCK_PREFIX : I<0xF0, RawFrm, (outs), (ins), "lock", []>; > > +// Rex64 instruction prefix > +def REX64_PREFIX : I<0x48, RawFrm, (outs), (ins), "rex64", []>; > + > // Repeat string operation instruction prefixes > // These uses the DF flag in the EFLAGS register to inc or dec ECX > let Defs = [ECX], Uses = [ECX,EFLAGS] in { > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From benny.kra at googlemail.com Tue Nov 23 12:52:42 2010 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Tue, 23 Nov 2010 18:52:42 -0000 Subject: [llvm-commits] [llvm] r120028 - in /llvm/trunk: lib/Target/README.txt lib/Transforms/InstCombine/InstCombineShifts.cpp test/Transforms/InstCombine/shift.ll Message-ID: <20101123185242.B5BE92A6C12C@llvm.org> Author: d0k Date: Tue Nov 23 12:52:42 2010 New Revision: 120028 URL: http://llvm.org/viewvc/llvm-project?rev=120028&view=rev Log: InstCombine: Reduce "X shift (A srem B)" to "X shift (A urem B)" iff B is positive. This allows to transform the rem in "1 << ((int)x % 8);" to an and. Modified: llvm/trunk/lib/Target/README.txt llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp llvm/trunk/test/Transforms/InstCombine/shift.ll Modified: llvm/trunk/lib/Target/README.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/README.txt?rev=120028&r1=120027&r2=120028&view=diff ============================================================================== --- llvm/trunk/lib/Target/README.txt (original) +++ llvm/trunk/lib/Target/README.txt Tue Nov 23 12:52:42 2010 @@ -1698,22 +1698,14 @@ //===---------------------------------------------------------------------===// Missed instcombine transformation: -define i32 @a(i32 %x) nounwind readnone { -entry: - %rem = srem i32 %x, 32 - %shl = shl i32 1, %rem - ret i32 %shl -} - -The srem can be transformed to an and because if x is negative, the shift is -undefined. Here's a more general case that occurs on 64-bit targets: %382 = srem i32 %tmp14.i, 64 ; [#uses=1] %383 = zext i32 %382 to i64 ; [#uses=1] %384 = shl i64 %381, %383 ; [#uses=1] %385 = icmp slt i32 %tmp14.i, 64 ; [#uses=1] -Testcase derived from 403.gcc. +The srem can be transformed to an and because if x is negative, the shift is +undefined. Testcase derived from 403.gcc. //===---------------------------------------------------------------------===// Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp?rev=120028&r1=120027&r2=120028&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp Tue Nov 23 12:52:42 2010 @@ -53,6 +53,21 @@ if (ConstantInt *CUI = dyn_cast(Op1)) if (Instruction *Res = FoldShiftByConstant(Op0, CUI, I)) return Res; + + // X shift (A srem B) -> X shift (A urem B) iff B is positive. + // Because shifts by negative values are undefined. + if (BinaryOperator *BO = dyn_cast(Op1)) + if (BO->getOpcode() == Instruction::SRem && BO->getType()->isIntegerTy()) { + // Make sure the divisor's sign bit is zero. + APInt Mask = APInt::getSignBit(BO->getType()->getPrimitiveSizeInBits()); + if (MaskedValueIsZero(BO->getOperand(1), Mask)) { + Value *URem = Builder->CreateURem(BO->getOperand(0), BO->getOperand(1), + BO->getName()); + I.setOperand(1, URem); + return &I; + } + } + return 0; } Modified: llvm/trunk/test/Transforms/InstCombine/shift.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/shift.ll?rev=120028&r1=120027&r2=120028&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/shift.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/shift.ll Tue Nov 23 12:52:42 2010 @@ -441,3 +441,14 @@ ; CHECK: %ins = or i128 %tmp23, %A ; CHECK: %tmp46 = trunc i128 %ins to i64 } + +define i32 @test38(i32 %x) nounwind readnone { +entry: + %rem = srem i32 %x, 32 + %shl = shl i32 1, %rem + ret i32 %shl +; CHECK: @test38 +; CHECK-NOT: srem +; CHECK: ret i32 +} + From clattner at apple.com Tue Nov 23 13:20:46 2010 From: clattner at apple.com (Chris Lattner) Date: Tue, 23 Nov 2010 11:20:46 -0800 Subject: [llvm-commits] [llvm] r120028 - in /llvm/trunk: lib/Target/README.txt lib/Transforms/InstCombine/InstCombineShifts.cpp test/Transforms/InstCombine/shift.ll In-Reply-To: <20101123185242.B5BE92A6C12C@llvm.org> References: <20101123185242.B5BE92A6C12C@llvm.org> Message-ID: <3833F5C8-3241-45C8-BDE9-5785F95E3E79@apple.com> On Nov 23, 2010, at 10:52 AM, Benjamin Kramer wrote: > Author: d0k > Date: Tue Nov 23 12:52:42 2010 > New Revision: 120028 > > URL: http://llvm.org/viewvc/llvm-project?rev=120028&view=rev > Log: > InstCombine: Reduce "X shift (A srem B)" to "X shift (A urem B)" iff B is positive. > > This allows to transform the rem in "1 << ((int)x % 8);" to an and. Nifty. Could this be generalized into SimplifyDemandedBits? It seems that the srem simplifies because the shift doesn't need all the result bits of it. -Chris > > Modified: > llvm/trunk/lib/Target/README.txt > llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp > llvm/trunk/test/Transforms/InstCombine/shift.ll > > Modified: llvm/trunk/lib/Target/README.txt > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/README.txt?rev=120028&r1=120027&r2=120028&view=diff > ============================================================================== > --- llvm/trunk/lib/Target/README.txt (original) > +++ llvm/trunk/lib/Target/README.txt Tue Nov 23 12:52:42 2010 > @@ -1698,22 +1698,14 @@ > //===---------------------------------------------------------------------===// > > Missed instcombine transformation: > -define i32 @a(i32 %x) nounwind readnone { > -entry: > - %rem = srem i32 %x, 32 > - %shl = shl i32 1, %rem > - ret i32 %shl > -} > - > -The srem can be transformed to an and because if x is negative, the shift is > -undefined. Here's a more general case that occurs on 64-bit targets: > > %382 = srem i32 %tmp14.i, 64 ; [#uses=1] > %383 = zext i32 %382 to i64 ; [#uses=1] > %384 = shl i64 %381, %383 ; [#uses=1] > %385 = icmp slt i32 %tmp14.i, 64 ; [#uses=1] > > -Testcase derived from 403.gcc. > +The srem can be transformed to an and because if x is negative, the shift is > +undefined. Testcase derived from 403.gcc. > > //===---------------------------------------------------------------------===// > > > Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp?rev=120028&r1=120027&r2=120028&view=diff > ============================================================================== > --- llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp (original) > +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp Tue Nov 23 12:52:42 2010 > @@ -53,6 +53,21 @@ > if (ConstantInt *CUI = dyn_cast(Op1)) > if (Instruction *Res = FoldShiftByConstant(Op0, CUI, I)) > return Res; > + > + // X shift (A srem B) -> X shift (A urem B) iff B is positive. > + // Because shifts by negative values are undefined. > + if (BinaryOperator *BO = dyn_cast(Op1)) > + if (BO->getOpcode() == Instruction::SRem && BO->getType()->isIntegerTy()) { > + // Make sure the divisor's sign bit is zero. > + APInt Mask = APInt::getSignBit(BO->getType()->getPrimitiveSizeInBits()); > + if (MaskedValueIsZero(BO->getOperand(1), Mask)) { > + Value *URem = Builder->CreateURem(BO->getOperand(0), BO->getOperand(1), > + BO->getName()); > + I.setOperand(1, URem); > + return &I; > + } > + } > + > return 0; > } > > > Modified: llvm/trunk/test/Transforms/InstCombine/shift.ll > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/shift.ll?rev=120028&r1=120027&r2=120028&view=diff > ============================================================================== > --- llvm/trunk/test/Transforms/InstCombine/shift.ll (original) > +++ llvm/trunk/test/Transforms/InstCombine/shift.ll Tue Nov 23 12:52:42 2010 > @@ -441,3 +441,14 @@ > ; CHECK: %ins = or i128 %tmp23, %A > ; CHECK: %tmp46 = trunc i128 %ins to i64 > } > + > +define i32 @test38(i32 %x) nounwind readnone { > +entry: > + %rem = srem i32 %x, 32 > + %shl = shl i32 1, %rem > + ret i32 %shl > +; CHECK: @test38 > +; CHECK-NOT: srem > +; CHECK: ret i32 > +} > + > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From bob.wilson at apple.com Tue Nov 23 13:38:34 2010 From: bob.wilson at apple.com (Bob Wilson) Date: Tue, 23 Nov 2010 19:38:34 -0000 Subject: [llvm-commits] [llvm] r120033 - /llvm/trunk/utils/TableGen/NeonEmitter.cpp Message-ID: <20101123193834.CDAFC2A6C12C@llvm.org> Author: bwilson Date: Tue Nov 23 13:38:34 2010 New Revision: 120033 URL: http://llvm.org/viewvc/llvm-project?rev=120033&view=rev Log: Fix copy-and-paste error in exception message. Modified: llvm/trunk/utils/TableGen/NeonEmitter.cpp Modified: llvm/trunk/utils/TableGen/NeonEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/NeonEmitter.cpp?rev=120033&r1=120032&r2=120033&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/NeonEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/NeonEmitter.cpp Tue Nov 23 13:38:34 2010 @@ -89,7 +89,7 @@ return 'i'; case 'f': return 'h'; - default: throw "unhandled type in widen!"; + default: throw "unhandled type in narrow!"; } return '\0'; } From bob.wilson at apple.com Tue Nov 23 13:38:38 2010 From: bob.wilson at apple.com (Bob Wilson) Date: Tue, 23 Nov 2010 19:38:38 -0000 Subject: [llvm-commits] [llvm] r120034 - in /llvm/trunk: lib/Target/ARM/ARMISelLowering.cpp test/CodeGen/ARM/vmul.ll Message-ID: <20101123193838.50BB72A6C12D@llvm.org> Author: bwilson Date: Tue Nov 23 13:38:38 2010 New Revision: 120034 URL: http://llvm.org/viewvc/llvm-project?rev=120034&view=rev Log: Recognize sign/zero-extended constant BUILD_VECTORs for VMULL operations. We need to check if the individual vector elements are sign/zero-extended values. For now this only handles constants values. Radar 8687140. Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp llvm/trunk/test/CodeGen/ARM/vmul.ll Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=120034&r1=120033&r2=120034&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Tue Nov 23 13:38:38 2010 @@ -3860,15 +3860,114 @@ return DAG.getNode(ISD::BITCAST, dl, Op.getValueType(), Val); } -/// SkipExtension - For a node that is either a SIGN_EXTEND, ZERO_EXTEND, or -/// an extending load, return the unextended value. +/// isExtendedBUILD_VECTOR - Check if N is a constant BUILD_VECTOR where each +/// element has been zero/sign-extended, depending on the isSigned parameter, +/// from an integer type half its size. +static bool isExtendedBUILD_VECTOR(SDNode *N, SelectionDAG &DAG, + bool isSigned) { + // A v2i64 BUILD_VECTOR will have been legalized to a BITCAST from v4i32. + EVT VT = N->getValueType(0); + if (VT == MVT::v2i64 && N->getOpcode() == ISD::BITCAST) { + SDNode *BVN = N->getOperand(0).getNode(); + if (BVN->getValueType(0) != MVT::v4i32 || + BVN->getOpcode() != ISD::BUILD_VECTOR) + return false; + unsigned LoElt = DAG.getTargetLoweringInfo().isBigEndian() ? 1 : 0; + unsigned HiElt = 1 - LoElt; + ConstantSDNode *Lo0 = dyn_cast(BVN->getOperand(LoElt)); + ConstantSDNode *Hi0 = dyn_cast(BVN->getOperand(HiElt)); + ConstantSDNode *Lo1 = dyn_cast(BVN->getOperand(LoElt+2)); + ConstantSDNode *Hi1 = dyn_cast(BVN->getOperand(HiElt+2)); + if (!Lo0 || !Hi0 || !Lo1 || !Hi1) + return false; + if (isSigned) { + if (Hi0->getSExtValue() == Lo0->getSExtValue() >> 32 && + Hi1->getSExtValue() == Lo1->getSExtValue() >> 32) + return true; + } else { + if (Hi0->isNullValue() && Hi1->isNullValue()) + return true; + } + return false; + } + + if (N->getOpcode() != ISD::BUILD_VECTOR) + return false; + + for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { + SDNode *Elt = N->getOperand(i).getNode(); + if (ConstantSDNode *C = dyn_cast(Elt)) { + unsigned EltSize = VT.getVectorElementType().getSizeInBits(); + unsigned HalfSize = EltSize / 2; + if (isSigned) { + int64_t SExtVal = C->getSExtValue(); + if ((SExtVal >> HalfSize) != (SExtVal >> EltSize)) + return false; + } else { + if ((C->getZExtValue() >> HalfSize) != 0) + return false; + } + continue; + } + return false; + } + + return true; +} + +/// isSignExtended - Check if a node is a vector value that is sign-extended +/// or a constant BUILD_VECTOR with sign-extended elements. +static bool isSignExtended(SDNode *N, SelectionDAG &DAG) { + if (N->getOpcode() == ISD::SIGN_EXTEND || ISD::isSEXTLoad(N)) + return true; + if (isExtendedBUILD_VECTOR(N, DAG, true)) + return true; + return false; +} + +/// isZeroExtended - Check if a node is a vector value that is zero-extended +/// or a constant BUILD_VECTOR with zero-extended elements. +static bool isZeroExtended(SDNode *N, SelectionDAG &DAG) { + if (N->getOpcode() == ISD::ZERO_EXTEND || ISD::isZEXTLoad(N)) + return true; + if (isExtendedBUILD_VECTOR(N, DAG, false)) + return true; + return false; +} + +/// SkipExtension - For a node that is a SIGN_EXTEND, ZERO_EXTEND, extending +/// load, or BUILD_VECTOR with extended elements, return the unextended value. static SDValue SkipExtension(SDNode *N, SelectionDAG &DAG) { if (N->getOpcode() == ISD::SIGN_EXTEND || N->getOpcode() == ISD::ZERO_EXTEND) return N->getOperand(0); - LoadSDNode *LD = cast(N); - return DAG.getLoad(LD->getMemoryVT(), N->getDebugLoc(), LD->getChain(), - LD->getBasePtr(), LD->getPointerInfo(), LD->isVolatile(), - LD->isNonTemporal(), LD->getAlignment()); + if (LoadSDNode *LD = dyn_cast(N)) + return DAG.getLoad(LD->getMemoryVT(), N->getDebugLoc(), LD->getChain(), + LD->getBasePtr(), LD->getPointerInfo(), LD->isVolatile(), + LD->isNonTemporal(), LD->getAlignment()); + // Otherwise, the value must be a BUILD_VECTOR. For v2i64, it will + // have been legalized as a BITCAST from v4i32. + if (N->getOpcode() == ISD::BITCAST) { + SDNode *BVN = N->getOperand(0).getNode(); + assert(BVN->getOpcode() == ISD::BUILD_VECTOR && + BVN->getValueType(0) == MVT::v4i32 && "expected v4i32 BUILD_VECTOR"); + unsigned LowElt = DAG.getTargetLoweringInfo().isBigEndian() ? 1 : 0; + return DAG.getNode(ISD::BUILD_VECTOR, N->getDebugLoc(), MVT::v2i32, + BVN->getOperand(LowElt), BVN->getOperand(LowElt+2)); + } + // Construct a new BUILD_VECTOR with elements truncated to half the size. + assert(N->getOpcode() == ISD::BUILD_VECTOR && "expected BUILD_VECTOR"); + EVT VT = N->getValueType(0); + unsigned EltSize = VT.getVectorElementType().getSizeInBits() / 2; + unsigned NumElts = VT.getVectorNumElements(); + MVT TruncVT = MVT::getIntegerVT(EltSize); + SmallVector Ops; + for (unsigned i = 0; i != NumElts; ++i) { + ConstantSDNode *C = cast(N->getOperand(i)); + const APInt &CInt = C->getAPIntValue(); + Ops.push_back(DAG.getConstant(APInt(CInt).trunc(EltSize), TruncVT)); + } + return DAG.getNode(ISD::BUILD_VECTOR, N->getDebugLoc(), + MVT::getVectorVT(TruncVT, NumElts), Ops.data(), NumElts); } static SDValue LowerMUL(SDValue Op, SelectionDAG &DAG) { @@ -3879,19 +3978,16 @@ SDNode *N0 = Op.getOperand(0).getNode(); SDNode *N1 = Op.getOperand(1).getNode(); unsigned NewOpc = 0; - if ((N0->getOpcode() == ISD::SIGN_EXTEND || ISD::isSEXTLoad(N0)) && - (N1->getOpcode() == ISD::SIGN_EXTEND || ISD::isSEXTLoad(N1))) { + if (isSignExtended(N0, DAG) && isSignExtended(N1, DAG)) NewOpc = ARMISD::VMULLs; - } else if ((N0->getOpcode() == ISD::ZERO_EXTEND || ISD::isZEXTLoad(N0)) && - (N1->getOpcode() == ISD::ZERO_EXTEND || ISD::isZEXTLoad(N1))) { + else if (isZeroExtended(N0, DAG) && isZeroExtended(N1, DAG)) NewOpc = ARMISD::VMULLu; - } else if (VT == MVT::v2i64) { + else if (VT == MVT::v2i64) // Fall through to expand this. It is not legal. return SDValue(); - } else { + else // Other vector multiplications are legal. return Op; - } // Legalize to a VMULL instruction. DebugLoc DL = Op.getDebugLoc(); Modified: llvm/trunk/test/CodeGen/ARM/vmul.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vmul.ll?rev=120034&r1=120033&r2=120034&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/vmul.ll (original) +++ llvm/trunk/test/CodeGen/ARM/vmul.ll Tue Nov 23 13:38:38 2010 @@ -267,3 +267,75 @@ } declare <8 x i16> @llvm.arm.neon.vmullp.v8i16(<8 x i8>, <8 x i8>) nounwind readnone + + +; Radar 8687140 +; VMULL needs to recognize BUILD_VECTORs with sign/zero-extended elements. + +define <8 x i16> @vmull_extvec_s8(<8 x i8> %arg) nounwind { +; CHECK: vmull_extvec_s8 +; CHECK: vmull.s8 + %tmp3 = sext <8 x i8> %arg to <8 x i16> + %tmp4 = mul <8 x i16> %tmp3, + ret <8 x i16> %tmp4 +} + +define <8 x i16> @vmull_extvec_u8(<8 x i8> %arg) nounwind { +; CHECK: vmull_extvec_u8 +; CHECK: vmull.u8 + %tmp3 = zext <8 x i8> %arg to <8 x i16> + %tmp4 = mul <8 x i16> %tmp3, + ret <8 x i16> %tmp4 +} + +define <8 x i16> @vmull_noextvec_s8(<8 x i8> %arg) nounwind { +; Do not use VMULL if the BUILD_VECTOR element values are too big. +; CHECK: vmull_noextvec_s8 +; CHECK: vmovl.s8 +; CHECK: vmul.i16 + %tmp3 = sext <8 x i8> %arg to <8 x i16> + %tmp4 = mul <8 x i16> %tmp3, + ret <8 x i16> %tmp4 +} + +define <8 x i16> @vmull_noextvec_u8(<8 x i8> %arg) nounwind { +; Do not use VMULL if the BUILD_VECTOR element values are too big. +; CHECK: vmull_noextvec_u8 +; CHECK: vmovl.u8 +; CHECK: vmul.i16 + %tmp3 = zext <8 x i8> %arg to <8 x i16> + %tmp4 = mul <8 x i16> %tmp3, + ret <8 x i16> %tmp4 +} + +define <4 x i32> @vmull_extvec_s16(<4 x i16> %arg) nounwind { +; CHECK: vmull_extvec_s16 +; CHECK: vmull.s16 + %tmp3 = sext <4 x i16> %arg to <4 x i32> + %tmp4 = mul <4 x i32> %tmp3, + ret <4 x i32> %tmp4 +} + +define <4 x i32> @vmull_extvec_u16(<4 x i16> %arg) nounwind { +; CHECK: vmull_extvec_u16 +; CHECK: vmull.u16 + %tmp3 = zext <4 x i16> %arg to <4 x i32> + %tmp4 = mul <4 x i32> %tmp3, + ret <4 x i32> %tmp4 +} + +define <2 x i64> @vmull_extvec_s32(<2 x i32> %arg) nounwind { +; CHECK: vmull_extvec_s32 +; CHECK: vmull.s32 + %tmp3 = sext <2 x i32> %arg to <2 x i64> + %tmp4 = mul <2 x i64> %tmp3, + ret <2 x i64> %tmp4 +} + +define <2 x i64> @vmull_extvec_u32(<2 x i32> %arg) nounwind { +; CHECK: vmull_extvec_u32 +; CHECK: vmull.u32 + %tmp3 = zext <2 x i32> %arg to <2 x i64> + %tmp4 = mul <2 x i64> %tmp3, + ret <2 x i64> %tmp4 +} From jason.w.kim.2009 at gmail.com Tue Nov 23 13:40:37 2010 From: jason.w.kim.2009 at gmail.com (Jason W Kim) Date: Tue, 23 Nov 2010 19:40:37 -0000 Subject: [llvm-commits] [llvm] r120035 - in /llvm/trunk: include/llvm/Support/ELF.h lib/Target/ARM/ARMELFWriterInfo.cpp lib/Target/ARM/ARMELFWriterInfo.h Message-ID: <20101123194037.15BDC2A6C12C@llvm.org> Author: jasonwkim Date: Tue Nov 23 13:40:36 2010 New Revision: 120035 URL: http://llvm.org/viewvc/llvm-project?rev=120035&view=rev Log: Move the ARM reloc constants to Support/ELF.h Modified: llvm/trunk/include/llvm/Support/ELF.h llvm/trunk/lib/Target/ARM/ARMELFWriterInfo.cpp llvm/trunk/lib/Target/ARM/ARMELFWriterInfo.h Modified: llvm/trunk/include/llvm/Support/ELF.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/ELF.h?rev=120035&r1=120034&r2=120035&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/ELF.h (original) +++ llvm/trunk/include/llvm/Support/ELF.h Tue Nov 23 13:40:36 2010 @@ -289,6 +289,144 @@ R_MICROBLAZE_COPY = 21 }; +// ELF Relocation types for ARM +// Meets 2.08 ABI Specs. + +enum { + R_ARM_NONE = 0x00, + R_ARM_PC24 = 0x01, + R_ARM_ABS32 = 0x02, + R_ARM_REL32 = 0x03, + R_ARM_LDR_PC_G0 = 0x04, + R_ARM_ABS16 = 0x05, + R_ARM_ABS12 = 0x06, + R_ARM_THM_ABS5 = 0x07, + R_ARM_ABS8 = 0x08, + R_ARM_SBREL32 = 0x09, + R_ARM_THM_CALL = 0x0a, + R_ARM_THM_PC8 = 0x0b, + R_ARM_BREL_ADJ = 0x0c, + R_ARM_TLS_DESC = 0x0d, + R_ARM_THM_SWI8 = 0x0e, + R_ARM_XPC25 = 0x0f, + R_ARM_THM_XPC22 = 0x10, + R_ARM_TLS_DTPMOD32 = 0x11, + R_ARM_TLS_DTPOFF32 = 0x12, + R_ARM_TLS_TPOFF32 = 0x13, + R_ARM_COPY = 0x14, + R_ARM_GLOB_DAT = 0x15, + R_ARM_JUMP_SLOT = 0x16, + R_ARM_RELATIVE = 0x17, + R_ARM_GOTOFF32 = 0x18, + R_ARM_BASE_PREL = 0x19, + R_ARM_GOT_BREL = 0x1a, + R_ARM_PLT32 = 0x1b, + R_ARM_CALL = 0x1c, + R_ARM_JUMP24 = 0x1d, + R_ARM_THM_JUMP24 = 0x1e, + R_ARM_BASE_ABS = 0x1f, + R_ARM_ALU_PCREL_7_0 = 0x20, + R_ARM_ALU_PCREL_15_8 = 0x21, + R_ARM_ALU_PCREL_23_15 = 0x22, + R_ARM_LDR_SBREL_11_0_NC = 0x23, + R_ARM_ALU_SBREL_19_12_NC = 0x24, + R_ARM_ALU_SBREL_27_20_CK = 0x25, + R_ARM_TARGET1 = 0x26, + R_ARM_SBREL31 = 0x27, + R_ARM_V4BX = 0x28, + R_ARM_TARGET2 = 0x29, + R_ARM_PREL31 = 0x2a, + R_ARM_MOVW_ABS_NC = 0x2b, + R_ARM_MOVT_ABS = 0x2c, + R_ARM_MOVW_PREL_NC = 0x2d, + R_ARM_MOVT_PREL = 0x2e, + R_ARM_THM_MOVW_ABS_NC = 0x2f, + R_ARM_THM_MOVT_ABS = 0x30, + R_ARM_THM_MOVW_PREL_NC = 0x31, + R_ARM_THM_MOVT_PREL = 0x32, + R_ARM_THM_JUMP19 = 0x33, + R_ARM_THM_JUMP6 = 0x34, + R_ARM_THM_ALU_PREL_11_0 = 0x35, + R_ARM_THM_PC12 = 0x36, + R_ARM_ABS32_NOI = 0x37, + R_ARM_REL32_NOI = 0x38, + R_ARM_ALU_PC_G0_NC = 0x39, + R_ARM_ALU_PC_G0 = 0x3a, + R_ARM_ALU_PC_G1_NC = 0x3b, + R_ARM_ALU_PC_G1 = 0x3c, + R_ARM_ALU_PC_G2 = 0x3d, + R_ARM_LDR_PC_G1 = 0x3e, + R_ARM_LDR_PC_G2 = 0x3f, + R_ARM_LDRS_PC_G0 = 0x40, + R_ARM_LDRS_PC_G1 = 0x41, + R_ARM_LDRS_PC_G2 = 0x42, + R_ARM_LDC_PC_G0 = 0x43, + R_ARM_LDC_PC_G1 = 0x44, + R_ARM_LDC_PC_G2 = 0x45, + R_ARM_ALU_SB_G0_NC = 0x46, + R_ARM_ALU_SB_G0 = 0x47, + R_ARM_ALU_SB_G1_NC = 0x48, + R_ARM_ALU_SB_G1 = 0x49, + R_ARM_ALU_SB_G2 = 0x4a, + R_ARM_LDR_SB_G0 = 0x4b, + R_ARM_LDR_SB_G1 = 0x4c, + R_ARM_LDR_SB_G2 = 0x4d, + R_ARM_LDRS_SB_G0 = 0x4e, + R_ARM_LDRS_SB_G1 = 0x4f, + R_ARM_LDRS_SB_G2 = 0x50, + R_ARM_LDC_SB_G0 = 0x51, + R_ARM_LDC_SB_G1 = 0x52, + R_ARM_LDC_SB_G2 = 0x53, + R_ARM_MOVW_BREL_NC = 0x54, + R_ARM_MOVT_BREL = 0x55, + R_ARM_MOVW_BREL = 0x56, + R_ARM_THM_MOVW_BREL_NC = 0x57, + R_ARM_THM_MOVT_BREL = 0x58, + R_ARM_THM_MOVW_BREL = 0x59, + R_ARM_TLS_GOTDESC = 0x5a, + R_ARM_TLS_CALL = 0x5b, + R_ARM_TLS_DESCSEQ = 0x5c, + R_ARM_THM_TLS_CALL = 0x5d, + R_ARM_PLT32_ABS = 0x5e, + R_ARM_GOT_ABS = 0x5f, + R_ARM_GOT_PREL = 0x60, + R_ARM_GOT_BREL12 = 0x61, + R_ARM_GOTOFF12 = 0x62, + R_ARM_GOTRELAX = 0x63, + R_ARM_GNU_VTENTRY = 0x64, + R_ARM_GNU_VTINHERIT = 0x65, + R_ARM_THM_JUMP11 = 0x66, + R_ARM_THM_JUMP8 = 0x67, + R_ARM_TLS_GD32 = 0x68, + R_ARM_TLS_LDM32 = 0x69, + R_ARM_TLS_LDO32 = 0x6a, + R_ARM_TLS_IE32 = 0x6b, + R_ARM_TLS_LE32 = 0x6c, + R_ARM_TLS_LDO12 = 0x6d, + R_ARM_TLS_LE12 = 0x6e, + R_ARM_TLS_IE12GP = 0x6f, + R_ARM_PRIVATE_0 = 0x70, + R_ARM_PRIVATE_1 = 0x71, + R_ARM_PRIVATE_2 = 0x72, + R_ARM_PRIVATE_3 = 0x73, + R_ARM_PRIVATE_4 = 0x74, + R_ARM_PRIVATE_5 = 0x75, + R_ARM_PRIVATE_6 = 0x76, + R_ARM_PRIVATE_7 = 0x77, + R_ARM_PRIVATE_8 = 0x78, + R_ARM_PRIVATE_9 = 0x79, + R_ARM_PRIVATE_10 = 0x7a, + R_ARM_PRIVATE_11 = 0x7b, + R_ARM_PRIVATE_12 = 0x7c, + R_ARM_PRIVATE_13 = 0x7d, + R_ARM_PRIVATE_14 = 0x7e, + R_ARM_PRIVATE_15 = 0x7f, + R_ARM_ME_TOO = 0x80, + R_ARM_THM_TLS_DESCSEQ16 = 0x81, + R_ARM_THM_TLS_DESCSEQ32 = 0x82 +}; + + // Section header. struct Elf32_Shdr { Modified: llvm/trunk/lib/Target/ARM/ARMELFWriterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMELFWriterInfo.cpp?rev=120035&r1=120034&r2=120035&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMELFWriterInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMELFWriterInfo.cpp Tue Nov 23 13:40:36 2010 @@ -17,6 +17,7 @@ #include "llvm/Support/ErrorHandling.h" #include "llvm/Target/TargetData.h" #include "llvm/Target/TargetMachine.h" +#include "llvm/Support/ELF.h" using namespace llvm; @@ -42,9 +43,9 @@ case ARM::reloc_arm_pic_jt: assert(0 && "unsupported ARM relocation type"); break; - case ARM::reloc_arm_branch: return R_ARM_CALL; break; - case ARM::reloc_arm_movt: return R_ARM_MOVT_ABS; break; - case ARM::reloc_arm_movw: return R_ARM_MOVW_ABS_NC; break; + case ARM::reloc_arm_branch: return ELF::R_ARM_CALL; break; + case ARM::reloc_arm_movt: return ELF::R_ARM_MOVT_ABS; break; + case ARM::reloc_arm_movw: return ELF::R_ARM_MOVW_ABS_NC; break; default: llvm_unreachable("unknown ARM relocation type"); break; } Modified: llvm/trunk/lib/Target/ARM/ARMELFWriterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMELFWriterInfo.h?rev=120035&r1=120034&r2=120035&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMELFWriterInfo.h (original) +++ llvm/trunk/lib/Target/ARM/ARMELFWriterInfo.h Tue Nov 23 13:40:36 2010 @@ -19,145 +19,6 @@ namespace llvm { class ARMELFWriterInfo : public TargetELFWriterInfo { - - // ELF Relocation types for ARM - // Meets 2.08 ABI Specs. Most of these are not used by the assembler. - // They are here for completeness's sake - - enum ARMRelocationType { - R_ARM_NONE = 0x00, - R_ARM_PC24 = 0x01, - R_ARM_ABS32 = 0x02, - R_ARM_REL32 = 0x03, - R_ARM_LDR_PC_G0 = 0x04, - R_ARM_ABS16 = 0x05, - R_ARM_ABS12 = 0x06, - R_ARM_THM_ABS5 = 0x07, - R_ARM_ABS8 = 0x08, - R_ARM_SBREL32 = 0x09, - R_ARM_THM_CALL = 0x0a, - R_ARM_THM_PC8 = 0x0b, - R_ARM_BREL_ADJ = 0x0c, - R_ARM_TLS_DESC = 0x0d, - R_ARM_THM_SWI8 = 0x0e, - R_ARM_XPC25 = 0x0f, - R_ARM_THM_XPC22 = 0x10, - R_ARM_TLS_DTPMOD32 = 0x11, - R_ARM_TLS_DTPOFF32 = 0x12, - R_ARM_TLS_TPOFF32 = 0x13, - R_ARM_COPY = 0x14, - R_ARM_GLOB_DAT = 0x15, - R_ARM_JUMP_SLOT = 0x16, - R_ARM_RELATIVE = 0x17, - R_ARM_GOTOFF32 = 0x18, - R_ARM_BASE_PREL = 0x19, - R_ARM_GOT_BREL = 0x1a, - R_ARM_PLT32 = 0x1b, - R_ARM_CALL = 0x1c, - R_ARM_JUMP24 = 0x1d, - R_ARM_THM_JUMP24 = 0x1e, - R_ARM_BASE_ABS = 0x1f, - R_ARM_ALU_PCREL_7_0 = 0x20, - R_ARM_ALU_PCREL_15_8 = 0x21, - R_ARM_ALU_PCREL_23_15 = 0x22, - R_ARM_LDR_SBREL_11_0_NC = 0x23, - R_ARM_ALU_SBREL_19_12_NC = 0x24, - R_ARM_ALU_SBREL_27_20_CK = 0x25, - R_ARM_TARGET1 = 0x26, - R_ARM_SBREL31 = 0x27, - R_ARM_V4BX = 0x28, - R_ARM_TARGET2 = 0x29, - R_ARM_PREL31 = 0x2a, - R_ARM_MOVW_ABS_NC = 0x2b, - R_ARM_MOVT_ABS = 0x2c, - R_ARM_MOVW_PREL_NC = 0x2d, - R_ARM_MOVT_PREL = 0x2e, - R_ARM_THM_MOVW_ABS_NC = 0x2f, - R_ARM_THM_MOVT_ABS = 0x30, - R_ARM_THM_MOVW_PREL_NC = 0x31, - R_ARM_THM_MOVT_PREL = 0x32, - R_ARM_THM_JUMP19 = 0x33, - R_ARM_THM_JUMP6 = 0x34, - R_ARM_THM_ALU_PREL_11_0 = 0x35, - R_ARM_THM_PC12 = 0x36, - R_ARM_ABS32_NOI = 0x37, - R_ARM_REL32_NOI = 0x38, - R_ARM_ALU_PC_G0_NC = 0x39, - R_ARM_ALU_PC_G0 = 0x3a, - R_ARM_ALU_PC_G1_NC = 0x3b, - R_ARM_ALU_PC_G1 = 0x3c, - R_ARM_ALU_PC_G2 = 0x3d, - R_ARM_LDR_PC_G1 = 0x3e, - R_ARM_LDR_PC_G2 = 0x3f, - R_ARM_LDRS_PC_G0 = 0x40, - R_ARM_LDRS_PC_G1 = 0x41, - R_ARM_LDRS_PC_G2 = 0x42, - R_ARM_LDC_PC_G0 = 0x43, - R_ARM_LDC_PC_G1 = 0x44, - R_ARM_LDC_PC_G2 = 0x45, - R_ARM_ALU_SB_G0_NC = 0x46, - R_ARM_ALU_SB_G0 = 0x47, - R_ARM_ALU_SB_G1_NC = 0x48, - R_ARM_ALU_SB_G1 = 0x49, - R_ARM_ALU_SB_G2 = 0x4a, - R_ARM_LDR_SB_G0 = 0x4b, - R_ARM_LDR_SB_G1 = 0x4c, - R_ARM_LDR_SB_G2 = 0x4d, - R_ARM_LDRS_SB_G0 = 0x4e, - R_ARM_LDRS_SB_G1 = 0x4f, - R_ARM_LDRS_SB_G2 = 0x50, - R_ARM_LDC_SB_G0 = 0x51, - R_ARM_LDC_SB_G1 = 0x52, - R_ARM_LDC_SB_G2 = 0x53, - R_ARM_MOVW_BREL_NC = 0x54, - R_ARM_MOVT_BREL = 0x55, - R_ARM_MOVW_BREL = 0x56, - R_ARM_THM_MOVW_BREL_NC = 0x57, - R_ARM_THM_MOVT_BREL = 0x58, - R_ARM_THM_MOVW_BREL = 0x59, - R_ARM_TLS_GOTDESC = 0x5a, - R_ARM_TLS_CALL = 0x5b, - R_ARM_TLS_DESCSEQ = 0x5c, - R_ARM_THM_TLS_CALL = 0x5d, - R_ARM_PLT32_ABS = 0x5e, - R_ARM_GOT_ABS = 0x5f, - R_ARM_GOT_PREL = 0x60, - R_ARM_GOT_BREL12 = 0x61, - R_ARM_GOTOFF12 = 0x62, - R_ARM_GOTRELAX = 0x63, - R_ARM_GNU_VTENTRY = 0x64, - R_ARM_GNU_VTINHERIT = 0x65, - R_ARM_THM_JUMP11 = 0x66, - R_ARM_THM_JUMP8 = 0x67, - R_ARM_TLS_GD32 = 0x68, - R_ARM_TLS_LDM32 = 0x69, - R_ARM_TLS_LDO32 = 0x6a, - R_ARM_TLS_IE32 = 0x6b, - R_ARM_TLS_LE32 = 0x6c, - R_ARM_TLS_LDO12 = 0x6d, - R_ARM_TLS_LE12 = 0x6e, - R_ARM_TLS_IE12GP = 0x6f, - R_ARM_PRIVATE_0 = 0x70, - R_ARM_PRIVATE_1 = 0x71, - R_ARM_PRIVATE_2 = 0x72, - R_ARM_PRIVATE_3 = 0x73, - R_ARM_PRIVATE_4 = 0x74, - R_ARM_PRIVATE_5 = 0x75, - R_ARM_PRIVATE_6 = 0x76, - R_ARM_PRIVATE_7 = 0x77, - R_ARM_PRIVATE_8 = 0x78, - R_ARM_PRIVATE_9 = 0x79, - R_ARM_PRIVATE_10 = 0x7a, - R_ARM_PRIVATE_11 = 0x7b, - R_ARM_PRIVATE_12 = 0x7c, - R_ARM_PRIVATE_13 = 0x7d, - R_ARM_PRIVATE_14 = 0x7e, - R_ARM_PRIVATE_15 = 0x7f, - R_ARM_ME_TOO = 0x80, - R_ARM_THM_TLS_DESCSEQ16 = 0x81, - R_ARM_THM_TLS_DESCSEQ32 = 0x82 - }; - public: ARMELFWriterInfo(TargetMachine &TM); virtual ~ARMELFWriterInfo(); From fvbommel at gmail.com Tue Nov 23 13:56:11 2010 From: fvbommel at gmail.com (Frits van Bommel) Date: Tue, 23 Nov 2010 20:56:11 +0100 Subject: [llvm-commits] [llvm] r120028 - in /llvm/trunk: lib/Target/README.txt lib/Transforms/InstCombine/InstCombineShifts.cpp test/Transforms/InstCombine/shift.ll In-Reply-To: <20101123185242.B5BE92A6C12C@llvm.org> References: <20101123185242.B5BE92A6C12C@llvm.org> Message-ID: On Tue, Nov 23, 2010 at 7:52 PM, Benjamin Kramer wrote: > Author: d0k > Date: Tue Nov 23 12:52:42 2010 > New Revision: 120028 > > URL: http://llvm.org/viewvc/llvm-project?rev=120028&view=rev > Log: > InstCombine: Reduce "X shift (A srem B)" to "X shift (A urem B)" iff B is positive. > > This allows to transform the rem in "1 << ((int)x % 8);" to an and. Is this still worth it if the srem has multiple uses? If the srem isn't optimized out completely you'd end up doing extra work here. > --- llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp (original) > +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp Tue Nov 23 12:52:42 2010 > @@ -53,6 +53,21 @@ > ? if (ConstantInt *CUI = dyn_cast(Op1)) > ? ? if (Instruction *Res = FoldShiftByConstant(Op0, CUI, I)) > ? ? ? return Res; > + > + ?// X shift (A srem B) -> X shift (A urem B) iff B is positive. > + ?// Because shifts by negative values are undefined. > + ?if (BinaryOperator *BO = dyn_cast(Op1)) > + ? ?if (BO->getOpcode() == Instruction::SRem && BO->getType()->isIntegerTy()) { Maybe add a "&& BO->hasOneUse()" test here? > + ? ? ?// Make sure the divisor's sign bit is zero. > + ? ? ?APInt Mask = APInt::getSignBit(BO->getType()->getPrimitiveSizeInBits()); > + ? ? ?if (MaskedValueIsZero(BO->getOperand(1), Mask)) { > + ? ? ? ?Value *URem = Builder->CreateURem(BO->getOperand(0), BO->getOperand(1), > + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?BO->getName()); > + ? ? ? ?I.setOperand(1, URem); > + ? ? ? ?return &I; > + ? ? ?} > + ? ?} > + > ? return 0; > ?} From fvbommel at gmail.com Tue Nov 23 13:56:11 2010 From: fvbommel at gmail.com (Frits van Bommel) Date: Tue, 23 Nov 2010 20:56:11 +0100 Subject: [llvm-commits] [llvm] r120028 - in /llvm/trunk: lib/Target/README.txt lib/Transforms/InstCombine/InstCombineShifts.cpp test/Transforms/InstCombine/shift.ll In-Reply-To: <20101123185242.B5BE92A6C12C@llvm.org> References: <20101123185242.B5BE92A6C12C@llvm.org> Message-ID: On Tue, Nov 23, 2010 at 7:52 PM, Benjamin Kramer wrote: > Author: d0k > Date: Tue Nov 23 12:52:42 2010 > New Revision: 120028 > > URL: http://llvm.org/viewvc/llvm-project?rev=120028&view=rev > Log: > InstCombine: Reduce "X shift (A srem B)" to "X shift (A urem B)" iff B is positive. > > This allows to transform the rem in "1 << ((int)x % 8);" to an and. Is this still worth it if the srem has multiple uses? If the srem isn't optimized out completely you'd end up doing extra work here. > --- llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp (original) > +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp Tue Nov 23 12:52:42 2010 > @@ -53,6 +53,21 @@ > ? if (ConstantInt *CUI = dyn_cast(Op1)) > ? ? if (Instruction *Res = FoldShiftByConstant(Op0, CUI, I)) > ? ? ? return Res; > + > + ?// X shift (A srem B) -> X shift (A urem B) iff B is positive. > + ?// Because shifts by negative values are undefined. > + ?if (BinaryOperator *BO = dyn_cast(Op1)) > + ? ?if (BO->getOpcode() == Instruction::SRem && BO->getType()->isIntegerTy()) { Maybe add a "&& BO->hasOneUse()" test here? > + ? ? ?// Make sure the divisor's sign bit is zero. > + ? ? ?APInt Mask = APInt::getSignBit(BO->getType()->getPrimitiveSizeInBits()); > + ? ? ?if (MaskedValueIsZero(BO->getOperand(1), Mask)) { > + ? ? ? ?Value *URem = Builder->CreateURem(BO->getOperand(0), BO->getOperand(1), > + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?BO->getName()); > + ? ? ? ?I.setOperand(1, URem); > + ? ? ? ?return &I; > + ? ? ?} > + ? ?} > + > ? return 0; > ?} From fvbommel at gmail.com Tue Nov 23 13:58:57 2010 From: fvbommel at gmail.com (Frits van Bommel) Date: Tue, 23 Nov 2010 20:58:57 +0100 Subject: [llvm-commits] [llvm] r120028 - in /llvm/trunk: lib/Target/README.txt lib/Transforms/InstCombine/InstCombineShifts.cpp test/Transforms/InstCombine/shift.ll In-Reply-To: <20101123185242.B5BE92A6C12C@llvm.org> References: <20101123185242.B5BE92A6C12C@llvm.org> Message-ID: On Tue, Nov 23, 2010 at 7:52 PM, Benjamin Kramer wrote: > ?Missed instcombine transformation: > -define i32 @a(i32 %x) nounwind readnone { > -entry: > - ?%rem = srem i32 %x, 32 > - ?%shl = shl i32 1, %rem > - ?ret i32 %shl > -} > - > -The srem can be transformed to an and because if x is negative, the shift is > -undefined. ?Here's a more general case that occurs on 64-bit targets: > > ? %382 = srem i32 %tmp14.i, 64 ? ? ? ? ? ? ? ? ? ?; [#uses=1] > ? %383 = zext i32 %382 to i64 ? ? ? ? ? ? ? ? ? ? ; [#uses=1] > ? %384 = shl i64 %381, %383 ? ? ? ? ? ? ? ? ? ? ? ; [#uses=1] > ? %385 = icmp slt i32 %tmp14.i, 64 ? ? ? ? ? ? ? ?; [#uses=1] > > -Testcase derived from 403.gcc. > +The srem can be transformed to an and because if x is negative, the shift is > +undefined. ?Testcase derived from 403.gcc. Also, this code sample doesn't have a value named '%x', so you might want to update that text. From benny.kra at googlemail.com Tue Nov 23 14:05:31 2010 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Tue, 23 Nov 2010 21:05:31 +0100 Subject: [llvm-commits] [llvm] r120028 - in /llvm/trunk: lib/Target/README.txt lib/Transforms/InstCombine/InstCombineShifts.cpp test/Transforms/InstCombine/shift.ll In-Reply-To: <3833F5C8-3241-45C8-BDE9-5785F95E3E79@apple.com> References: <20101123185242.B5BE92A6C12C@llvm.org> <3833F5C8-3241-45C8-BDE9-5785F95E3E79@apple.com> Message-ID: On 23.11.2010, at 20:20, Chris Lattner wrote: > > On Nov 23, 2010, at 10:52 AM, Benjamin Kramer wrote: > >> Author: d0k >> Date: Tue Nov 23 12:52:42 2010 >> New Revision: 120028 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=120028&view=rev >> Log: >> InstCombine: Reduce "X shift (A srem B)" to "X shift (A urem B)" iff B is positive. >> >> This allows to transform the rem in "1 << ((int)x % 8);" to an and. > > Nifty. Could this be generalized into SimplifyDemandedBits? It seems that the srem simplifies because the shift doesn't need all the result bits of it. I'm not sure that's safe, this optimization relies on the fact that any shift by an amount <= 0 is undefined, I don't think SimplifyDemandedBits can model that. While "(negative value) srem (positive value)" always returns a negative number or zero, "(negative value) urem (positive value)" will just return nonsense rather than a truncated value. From endobson at mac.com Tue Nov 23 13:58:46 2010 From: endobson at mac.com (Eric Dobson) Date: Tue, 23 Nov 2010 14:58:46 -0500 Subject: [llvm-commits] Patch for LLVMGetModuleContext Message-ID: <042CB5EB-8F61-4462-9BFB-865FE55B26AF@mac.com> Currently the C api does not have a wrapper for getting a context object out of anything besides a type, even though the C++ api has this. I have attached a patch which adds a wrapper function around Module::getContext, as there already is provided functions for getting the module out of other objects. -Eric -------------- next part -------------- A non-text attachment was scrubbed... Name: LLVMGetModuleContext.patch Type: application/octet-stream Size: 1088 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101123/b08445e6/attachment.obj From baldrick at free.fr Tue Nov 23 14:24:22 2010 From: baldrick at free.fr (Duncan Sands) Date: Tue, 23 Nov 2010 20:24:22 -0000 Subject: [llvm-commits] [llvm] r120042 - /llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp Message-ID: <20101123202422.086102A6C12C@llvm.org> Author: baldrick Date: Tue Nov 23 14:24:21 2010 New Revision: 120042 URL: http://llvm.org/viewvc/llvm-project?rev=120042&view=rev Log: Constant folding here is pointless, because InstructionSimplify (which does constant folding and more) is called a few lines later. Modified: llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp Modified: llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp?rev=120042&r1=120041&r2=120042&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp Tue Nov 23 14:24:21 2010 @@ -32,7 +32,6 @@ #include "llvm/DerivedTypes.h" #include "llvm/Function.h" #include "llvm/Instructions.h" -#include "llvm/Analysis/ConstantFolding.h" #include "llvm/Analysis/InlineCost.h" #include "llvm/Analysis/InstructionSimplify.h" #include "llvm/Analysis/LoopInfo.h" @@ -969,13 +968,7 @@ while (!Worklist.empty()) { Instruction *I = Worklist.back(); Worklist.pop_back(); - - // Simple constant folding. - if (Constant *C = ConstantFoldInstruction(I)) { - ReplaceUsesOfWith(I, C, Worklist, L, LPM); - continue; - } - + // Simple DCE. if (isInstructionTriviallyDead(I)) { DEBUG(dbgs() << "Remove dead instruction '" << *I); From baldrick at free.fr Tue Nov 23 14:26:33 2010 From: baldrick at free.fr (Duncan Sands) Date: Tue, 23 Nov 2010 20:26:33 -0000 Subject: [llvm-commits] [llvm] r120044 - in /llvm/trunk/lib/Transforms: Scalar/TailDuplication.cpp Utils/LoopUnroll.cpp Message-ID: <20101123202633.514772A6C12C@llvm.org> Author: baldrick Date: Tue Nov 23 14:26:33 2010 New Revision: 120044 URL: http://llvm.org/viewvc/llvm-project?rev=120044&view=rev Log: Replace calls to ConstantFoldInstruction with calls to SimplifyInstruction in two places that are really interested in simplified instructions, not constants. Modified: llvm/trunk/lib/Transforms/Scalar/TailDuplication.cpp llvm/trunk/lib/Transforms/Utils/LoopUnroll.cpp Modified: llvm/trunk/lib/Transforms/Scalar/TailDuplication.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/TailDuplication.cpp?rev=120044&r1=120043&r2=120044&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/TailDuplication.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/TailDuplication.cpp Tue Nov 23 14:26:33 2010 @@ -26,14 +26,14 @@ #include "llvm/IntrinsicInst.h" #include "llvm/Pass.h" #include "llvm/Type.h" +#include "llvm/ADT/Statistic.h" +#include "llvm/ADT/SmallPtrSet.h" +#include "llvm/Analysis/InstructionSimplify.h" #include "llvm/Support/CFG.h" -#include "llvm/Analysis/ConstantFolding.h" -#include "llvm/Transforms/Utils/Local.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/Debug.h" #include "llvm/Support/raw_ostream.h" -#include "llvm/ADT/Statistic.h" -#include "llvm/ADT/SmallPtrSet.h" +#include "llvm/Transforms/Utils/Local.h" #include using namespace llvm; @@ -362,8 +362,8 @@ Instruction *Inst = BI++; if (isInstructionTriviallyDead(Inst)) Inst->eraseFromParent(); - else if (Constant *C = ConstantFoldInstruction(Inst)) { - Inst->replaceAllUsesWith(C); + else if (Value *V = SimplifyInstruction(Inst)) { + Inst->replaceAllUsesWith(V); Inst->eraseFromParent(); } } Modified: llvm/trunk/lib/Transforms/Utils/LoopUnroll.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/LoopUnroll.cpp?rev=120044&r1=120043&r2=120044&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/LoopUnroll.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/LoopUnroll.cpp Tue Nov 23 14:26:33 2010 @@ -22,7 +22,7 @@ #include "llvm/Transforms/Utils/UnrollLoop.h" #include "llvm/BasicBlock.h" #include "llvm/ADT/Statistic.h" -#include "llvm/Analysis/ConstantFolding.h" +#include "llvm/Analysis/InstructionSimplify.h" #include "llvm/Analysis/LoopPass.h" #include "llvm/Analysis/ScalarEvolution.h" #include "llvm/Support/Debug.h" @@ -361,10 +361,11 @@ if (isInstructionTriviallyDead(Inst)) (*BB)->getInstList().erase(Inst); - else if (Constant *C = ConstantFoldInstruction(Inst)) { - Inst->replaceAllUsesWith(C); - (*BB)->getInstList().erase(Inst); - } + else if (Value *V = SimplifyInstruction(Inst)) + if (LI->replacementPreservesLCSSAForm(Inst, V)) { + Inst->replaceAllUsesWith(V); + (*BB)->getInstList().erase(Inst); + } } NumCompletelyUnrolled += CompletelyUnroll; From benny.kra at googlemail.com Tue Nov 23 14:29:25 2010 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Tue, 23 Nov 2010 21:29:25 +0100 Subject: [llvm-commits] [llvm] r120028 - in /llvm/trunk: lib/Target/README.txt lib/Transforms/InstCombine/InstCombineShifts.cpp test/Transforms/InstCombine/shift.ll In-Reply-To: References: <20101123185242.B5BE92A6C12C@llvm.org> <3833F5C8-3241-45C8-BDE9-5785F95E3E79@apple.com> Message-ID: On 23.11.2010, at 21:05, Benjamin Kramer wrote: > > On 23.11.2010, at 20:20, Chris Lattner wrote: > >> >> On Nov 23, 2010, at 10:52 AM, Benjamin Kramer wrote: >> >>> Author: d0k >>> Date: Tue Nov 23 12:52:42 2010 >>> New Revision: 120028 >>> >>> URL: http://llvm.org/viewvc/llvm-project?rev=120028&view=rev >>> Log: >>> InstCombine: Reduce "X shift (A srem B)" to "X shift (A urem B)" iff B is positive. >>> >>> This allows to transform the rem in "1 << ((int)x % 8);" to an and. >> >> Nifty. Could this be generalized into SimplifyDemandedBits? It seems that the srem simplifies because the shift doesn't need all the result bits of it. > > I'm not sure that's safe, this optimization relies on the fact that any shift by an amount <= 0 is undefined. Urgh, shifts by 0 _are_ well defined, so this transform is unsafe for everything that's not a power of two. Will fix :( From benny.kra at googlemail.com Tue Nov 23 14:33:57 2010 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Tue, 23 Nov 2010 20:33:57 -0000 Subject: [llvm-commits] [llvm] r120049 - in /llvm/trunk: lib/Target/README.txt lib/Transforms/InstCombine/InstCombineShifts.cpp test/Transforms/InstCombine/shift.ll Message-ID: <20101123203357.5EA1E2A6C12C@llvm.org> Author: d0k Date: Tue Nov 23 14:33:57 2010 New Revision: 120049 URL: http://llvm.org/viewvc/llvm-project?rev=120049&view=rev Log: The srem -> urem transform is not safe for any divisor that's not a power of two. E.g. -5 % 5 is 0 with srem and 1 with urem. Also addresses Frits van Bommel's comments. Modified: llvm/trunk/lib/Target/README.txt llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp llvm/trunk/test/Transforms/InstCombine/shift.ll Modified: llvm/trunk/lib/Target/README.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/README.txt?rev=120049&r1=120048&r2=120049&view=diff ============================================================================== --- llvm/trunk/lib/Target/README.txt (original) +++ llvm/trunk/lib/Target/README.txt Tue Nov 23 14:33:57 2010 @@ -1704,8 +1704,8 @@ %384 = shl i64 %381, %383 ; [#uses=1] %385 = icmp slt i32 %tmp14.i, 64 ; [#uses=1] -The srem can be transformed to an and because if x is negative, the shift is -undefined. Testcase derived from 403.gcc. +The srem can be transformed to an and because if %tmp14.i is negative, the +shift is undefined. Testcase derived from 403.gcc. //===---------------------------------------------------------------------===// Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp?rev=120049&r1=120048&r2=120049&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp Tue Nov 23 14:33:57 2010 @@ -54,19 +54,17 @@ if (Instruction *Res = FoldShiftByConstant(Op0, CUI, I)) return Res; - // X shift (A srem B) -> X shift (A urem B) iff B is positive. + // X shift (A srem B) -> X shift (A and B-1) iff B is a power of 2. // Because shifts by negative values are undefined. if (BinaryOperator *BO = dyn_cast(Op1)) - if (BO->getOpcode() == Instruction::SRem && BO->getType()->isIntegerTy()) { - // Make sure the divisor's sign bit is zero. - APInt Mask = APInt::getSignBit(BO->getType()->getPrimitiveSizeInBits()); - if (MaskedValueIsZero(BO->getOperand(1), Mask)) { - Value *URem = Builder->CreateURem(BO->getOperand(0), BO->getOperand(1), - BO->getName()); - I.setOperand(1, URem); - return &I; - } - } + if (BO->hasOneUse() && BO->getOpcode() == Instruction::SRem) + if (ConstantInt *CI = dyn_cast(BO->getOperand(1))) + if (CI->getValue().isPowerOf2()) { + Constant *C = ConstantInt::get(BO->getType(), CI->getValue()-1); + Value *Rem = Builder->CreateAnd(BO->getOperand(0), C, BO->getName()); + I.setOperand(1, Rem); + return &I; + } return 0; } Modified: llvm/trunk/test/Transforms/InstCombine/shift.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/shift.ll?rev=120049&r1=120048&r2=120049&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/shift.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/shift.ll Tue Nov 23 14:33:57 2010 @@ -443,12 +443,12 @@ } define i32 @test38(i32 %x) nounwind readnone { -entry: %rem = srem i32 %x, 32 %shl = shl i32 1, %rem ret i32 %shl ; CHECK: @test38 -; CHECK-NOT: srem -; CHECK: ret i32 +; CHECK-NEXT: and i32 %x, 31 +; CHECK-NEXT: shl i32 1 +; CHECK-NEXT: ret i32 } From benny.kra at googlemail.com Tue Nov 23 14:36:53 2010 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Tue, 23 Nov 2010 21:36:53 +0100 Subject: [llvm-commits] [llvm] r120028 - in /llvm/trunk: lib/Target/README.txt lib/Transforms/InstCombine/InstCombineShifts.cpp test/Transforms/InstCombine/shift.ll In-Reply-To: References: <20101123185242.B5BE92A6C12C@llvm.org> Message-ID: On 23.11.2010, at 20:56, Frits van Bommel wrote: > On Tue, Nov 23, 2010 at 7:52 PM, Benjamin Kramer > wrote: >> Author: d0k >> Date: Tue Nov 23 12:52:42 2010 >> New Revision: 120028 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=120028&view=rev >> Log: >> InstCombine: Reduce "X shift (A srem B)" to "X shift (A urem B)" iff B is positive. >> >> This allows to transform the rem in "1 << ((int)x % 8);" to an and. > > Is this still worth it if the srem has multiple uses? > If the srem isn't optimized out completely you'd end up doing extra work here. > >> --- llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp (original) >> +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp Tue Nov 23 12:52:42 2010 >> @@ -53,6 +53,21 @@ >> if (ConstantInt *CUI = dyn_cast(Op1)) >> if (Instruction *Res = FoldShiftByConstant(Op0, CUI, I)) >> return Res; >> + >> + // X shift (A srem B) -> X shift (A urem B) iff B is positive. >> + // Because shifts by negative values are undefined. >> + if (BinaryOperator *BO = dyn_cast(Op1)) >> + if (BO->getOpcode() == Instruction::SRem && BO->getType()->isIntegerTy()) { > > Maybe add a "&& BO->hasOneUse()" test here? Yup, fixed in r120049. Thanks for the review. From clattner at apple.com Tue Nov 23 14:42:51 2010 From: clattner at apple.com (Chris Lattner) Date: Tue, 23 Nov 2010 12:42:51 -0800 Subject: [llvm-commits] [llvm] r120028 - in /llvm/trunk: lib/Target/README.txt lib/Transforms/InstCombine/InstCombineShifts.cpp test/Transforms/InstCombine/shift.ll In-Reply-To: References: <20101123185242.B5BE92A6C12C@llvm.org> <3833F5C8-3241-45C8-BDE9-5785F95E3E79@apple.com> Message-ID: <295FD3BE-18F9-434C-AD0F-4B9528AF69F0@apple.com> On Nov 23, 2010, at 12:29 PM, Benjamin Kramer wrote: >>>> InstCombine: Reduce "X shift (A srem B)" to "X shift (A urem B)" iff B is positive. >>>> >>>> This allows to transform the rem in "1 << ((int)x % 8);" to an and. >>> >>> Nifty. Could this be generalized into SimplifyDemandedBits? It seems that the srem simplifies because the shift doesn't need all the result bits of it. >> >> I'm not sure that's safe, this optimization relies on the fact that any shift by an amount <= 0 is undefined. > > Urgh, shifts by 0 _are_ well defined, so this transform is unsafe for everything that's not a power of two. Will fix :( Ok, does that mean it can be moved to simplify demanded bits too? :) -Chris From baldrick at free.fr Tue Nov 23 14:42:39 2010 From: baldrick at free.fr (Duncan Sands) Date: Tue, 23 Nov 2010 20:42:39 -0000 Subject: [llvm-commits] [llvm] r120051 - in /llvm/trunk/lib/Transforms/InstCombine: InstCombine.h InstCombineAddSub.cpp InstCombineAndOrXor.cpp InstructionCombining.cpp Message-ID: <20101123204239.9EA812A6C12C@llvm.org> Author: baldrick Date: Tue Nov 23 14:42:39 2010 New Revision: 120051 URL: http://llvm.org/viewvc/llvm-project?rev=120051&view=rev Log: Rename SimplifyDistributed to the more meaningfull name SimplifyByFactorizing. Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombine.h llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombine.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombine.h?rev=120051&r1=120050&r2=120051&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombine.h (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombine.h Tue Nov 23 14:42:39 2010 @@ -290,11 +290,11 @@ /// operators which are associative or commutative. bool SimplifyAssociativeOrCommutative(BinaryOperator &I); - /// SimplifyDistributed - This tries to simplify binary operations which some - /// other binary operation distributes over (eg "A*B+A*C" -> "A*(B+C)" since - /// addition is distributed over by multiplication). Returns the result of - /// the simplification, or null if no simplification was performed. - Instruction *SimplifyDistributed(BinaryOperator &I); + /// SimplifyByFactorizing - This tries to simplify binary operations which + /// some other binary operation distributes over by factorizing out a common + /// term (eg "(A*B)+(A*C)" -> "A*(B+C)"). Returns the simplified value, or + /// null if no simplification was performed. + Instruction *SimplifyByFactorizing(BinaryOperator &I); /// SimplifyDemandedUseBits - Attempts to replace V with a simpler value /// based on the demanded bits. Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp?rev=120051&r1=120050&r2=120051&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp Tue Nov 23 14:42:39 2010 @@ -91,7 +91,7 @@ I.hasNoUnsignedWrap(), TD)) return ReplaceInstUsesWith(I, V); - if (Instruction *NV = SimplifyDistributed(I)) // (A*B)+(A*C) -> A*(B+C) + if (Instruction *NV = SimplifyByFactorizing(I)) // (A*B)+(A*C) -> A*(B+C) return NV; if (Constant *RHSC = dyn_cast(RHS)) { @@ -550,7 +550,7 @@ if (Op0 == Op1) // sub X, X -> 0 return ReplaceInstUsesWith(I, Constant::getNullValue(I.getType())); - if (Instruction *NV = SimplifyDistributed(I)) // (A*B)-(A*C) -> A*(B-C) + if (Instruction *NV = SimplifyByFactorizing(I)) // (A*B)-(A*C) -> A*(B-C) return NV; // If this is a 'B = x-(-A)', change to B = x+A. This preserves NSW/NUW. Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp?rev=120051&r1=120050&r2=120051&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp Tue Nov 23 14:42:39 2010 @@ -984,7 +984,7 @@ if (Value *V = SimplifyAndInst(Op0, Op1, TD)) return ReplaceInstUsesWith(I, V); - if (Instruction *NV = SimplifyDistributed(I)) // (A|B)&(A|C) -> A|(B&C) + if (Instruction *NV = SimplifyByFactorizing(I)) // (A|B)&(A|C) -> A|(B&C) return NV; // See if we can simplify any instructions used by the instruction whose sole @@ -1695,7 +1695,7 @@ if (Value *V = SimplifyOrInst(Op0, Op1, TD)) return ReplaceInstUsesWith(I, V); - if (Instruction *NV = SimplifyDistributed(I)) // (A&B)|(A&C) -> A&(B|C) + if (Instruction *NV = SimplifyByFactorizing(I)) // (A&B)|(A&C) -> A&(B|C) return NV; // See if we can simplify any instructions used by the instruction whose sole @@ -1966,7 +1966,7 @@ if (Value *V = SimplifyXorInst(Op0, Op1, TD)) return ReplaceInstUsesWith(I, V); - if (Instruction *NV = SimplifyDistributed(I)) // (A&B)^(A&C) -> A&(B^C) + if (Instruction *NV = SimplifyByFactorizing(I)) // (A&B)^(A&C) -> A&(B^C) return NV; // See if we can simplify any instructions used by the instruction whose sole Modified: llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp?rev=120051&r1=120050&r2=120051&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp Tue Nov 23 14:42:39 2010 @@ -288,11 +288,11 @@ return false; } -/// SimplifyDistributed - This tries to simplify binary operations which some -/// other binary operation distributes over (eg "A*B+A*C" -> "A*(B+C)" since -/// addition is distributed over by multiplication). Returns the result of -/// the simplification, or null if no simplification was performed. -Instruction *InstCombiner::SimplifyDistributed(BinaryOperator &I) { +/// SimplifyByFactorizing - This tries to simplify binary operations which +/// some other binary operation distributes over by factorizing out a common +/// term (eg "(A*B)+(A*C)" -> "A*(B+C)"). Returns the simplified value, or +/// null if no simplification was performed. +Instruction *InstCombiner::SimplifyByFactorizing(BinaryOperator &I) { BinaryOperator *Op0 = dyn_cast(I.getOperand(0)); BinaryOperator *Op1 = dyn_cast(I.getOperand(1)); if (!Op0 || !Op1 || Op0->getOpcode() != Op1->getOpcode()) From bigcheesegs at gmail.com Tue Nov 23 15:09:11 2010 From: bigcheesegs at gmail.com (Michael J. Spencer) Date: Tue, 23 Nov 2010 21:09:11 -0000 Subject: [llvm-commits] [llvm] r120059 - /llvm/trunk/include/llvm/System/system_error.h Message-ID: <20101123210911.9C92F2A6C12C@llvm.org> Author: mspencer Date: Tue Nov 23 15:09:11 2010 New Revision: 120059 URL: http://llvm.org/viewvc/llvm-project?rev=120059&view=rev Log: system_error: Add fixme. Modified: llvm/trunk/include/llvm/System/system_error.h Modified: llvm/trunk/include/llvm/System/system_error.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/System/system_error.h?rev=120059&r1=120058&r2=120059&view=diff ============================================================================== --- llvm/trunk/include/llvm/System/system_error.h (original) +++ llvm/trunk/include/llvm/System/system_error.h Tue Nov 23 15:09:11 2010 @@ -805,6 +805,9 @@ // This needs to stay here for KillTheDoctor. #ifdef LLVM_ON_WIN32 +// FIXME: These two headers really really really need to be removed from here. +// Not only is it a violation of System, they define the stupid min and +// max macros :(. #include #include From bigcheesegs at gmail.com Tue Nov 23 15:18:31 2010 From: bigcheesegs at gmail.com (Michael Spencer) Date: Tue, 23 Nov 2010 16:18:31 -0500 Subject: [llvm-commits] [PATCH] New Path API design. In-Reply-To: References: <7211435F-635D-4109-A27B-C536D81D0A91@apple.com> Message-ID: On Mon, Nov 22, 2010 at 9:48 PM, Chris Lattner wrote: > > On Nov 20, 2010, at 3:06 PM, Michael Spencer wrote: > >>> +struct file_type { >>> + ?enum _ { >>> >>> Why _ instead of giving it a name? ?I'd suggest file_type_kind. ?We use "kind" for discriminators elsewhere. >> >> The enums are like this to emulate 'enum class' from C++0x. Users >> never directly use the _ name, they use 'file_type::xyz'. > > Ok. > >>> + ?int v_; >>> >>> Likewise, why v_? Particularly if this is public data it should have a good name and a doxygen comment. >> >> It should have been private. This is again just a helper to emulate >> 'enum class'. > > Ok. > >>> +/// file_status - Represents the result of a call to stat and friends. It has >>> +/// ? ? ? ? ? ? ? a platform specific member to store the result. >>> +class file_status >>> +{ >>> >>> Seems fine so far. ?Clang in particular is highly performance sensitive when it comes to stats and wants to reduce them wherever possible. ?It really wants to do things like use "open + fstat" instead of "stat+open" since fstat is faster than stat. ?This isn't a problem with your proposal, just pointing it out so that you're aware. >> >> Interesting. It should be simple enough to add a function that returns >> both a raw_ostream and a file_status. > > Yep, I imagine that you'll find it when stuff starts converting over. ?Just be conscientious about syscalls in clang :) > > >>> +error_code make_absolute(SmallVectorImpl &path); >>> >>> Please add doxygen comments to these with an example. ?Also, what happens if an empty string is passed in? >> >> I'm going to fully document everything. An empty string would result >> in the current directory. > > Thanks again Michael! > > -Chris Attached are two patches. The first adds a new unit-test SystemTests which has the TimeValue test and a new (empty) path test. The second adds include/llvm/System/PathV2.h with documentation and the modifications you mentioned. - Michael Spencer -------------- next part -------------- A non-text attachment was scrubbed... Name: path-v2.patch Type: application/octet-stream Size: 34609 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101123/5ea1eee8/attachment.obj -------------- next part -------------- A non-text attachment was scrubbed... Name: SystemTests.patch Type: application/octet-stream Size: 4233 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101123/5ea1eee8/attachment-0001.obj From Micah.Villmow at amd.com Tue Nov 23 15:39:20 2010 From: Micah.Villmow at amd.com (Villmow, Micah) Date: Tue, 23 Nov 2010 15:39:20 -0600 Subject: [llvm-commits] Patch for Bug7696 Message-ID: Reposting bug report here, any chance that it can get reviewed? Patch that adds a boolean where a backend can specify whether to disable certain optimizations because jumps are expensive. The selection dag builder has an 'optimization' added into the visitBr function which makes assumptions that are not valid on all architectures. The problem is this. The following function kernel void cf_test(global int* a, int b, int c, int e) { int d = 0; if (!b && c < e) { d = a + b; } *a = d; } Is transformed into something equivalent to this: Kernel void cf_test(global int* a, int b, int c, int e) { Int d; If (b) { d = 0; } else { if (c < e) { d = a + b; } else { d = 0; } } *a = d; } by the visitBr code found in SelectionDAGBuilder::visitBr():1188. However, if jumps are expensive or jumps are not supported and high level flow control needs to be reconstructed. This is extremely inefficient. For example on AMD GPU's, a single flow control instruction can take 40 cycles to execute, but an bit instruction, can be executed every cycle. So obviously the assumptions made by this block of code are inefficient on AMD hardware. Increasing control flow has a direct impact on performance and removing the extra 'and' or 'or' in order to short circuit the conditional evaluation does not work for our target. So in order to make this type of instruction rely more on target specific information. I've added a new Boolean to the TargetLoweringInfo class called JumpIsExpensive along with accessor functions. Please review the patch and apply if acceptable. -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101123/ebf56ca0/attachment.html -------------- next part -------------- A non-text attachment was scrubbed... Name: jump_boolean.patch Type: application/octet-stream Size: 3333 bytes Desc: jump_boolean.patch Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101123/ebf56ca0/attachment.obj From clattner at apple.com Tue Nov 23 15:46:13 2010 From: clattner at apple.com (Chris Lattner) Date: Tue, 23 Nov 2010 13:46:13 -0800 Subject: [llvm-commits] [PATCH] New Path API design. In-Reply-To: References: <7211435F-635D-4109-A27B-C536D81D0A91@apple.com> Message-ID: On Nov 23, 2010, at 1:18 PM, Michael Spencer wrote: > Attached are two patches. The first adds a new unit-test SystemTests > which has the TimeValue test and a new (empty) path test. The second > adds include/llvm/System/PathV2.h with documentation and the > modifications you mentioned. Looking great. Some comments: +class file_status +{ ... + file_type type() const; + void type(file_type v); Please use get_/set_ prefixes. Naming getters and setters the same thing leads to confusing client code IMO. +error_code remove_filename(SmallVectorImpl &path); I see this as getting confused with 'remove'. Maybe 'remove' should be named remove_from_disk or something? I think it would be good to pick some sort of uniform suffix and put them on everything that modifies the file system, e.g. copy_files_on_disk, create_directories_on_disk, exists_on_disk etc. Another way to handle this would be to put all the path manipulation stuff in sys::path, but put all the file system manipulation stuff in sys::fs. sys::fs::remove() would be very clear to me. +error_code native(const Twine &path, SmallVectorImpl &result); native isn't a verb, how about 'canonicalize'? +error_code current_path(SmallVectorImpl &result); likewise, how about get_current_path? similarly with the root_ names as well as filename, stem, parent_path etc. +error_code is_valid(const Twine &path, bool &result); how about "is_valid_name" to make it clear that it isn't going to disk to see if the file is valid. +/// @brief Get relative path. +/// +/// @param path Input path. +/// @param result Set to the path starting after root_path if one exists, +/// otherwise "". +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code relative_path(const Twine &path, StringRef &result); I don't understand this operation, an example would be great :) It would be great to get examples for stem and extension as well. +error_code set_read(const Twine &path, bool value); +error_code set_write(const Twine &path, bool value); +error_code set_execute(const Twine &path, bool value); Is the only way to set a mode to do: setRead(X, true); setWrite(X, true); If that turns into two syscalls, that seems wasteful. Likewise with can_read/can_write. +error_code is_empty(const Twine &path, bool &result); How about is_empty_file to make it obvious that this only applies to files, not directories? +error_code space(const Twine &path, space_info &result); This could use a better name, get_disk_space would be better at least. +error_code unique_path(const Twine &model, SmallVectorImpl &result); This API is inherently racy unless it returns a newly created file. I don't think we should have it. +class directory_entry { + SmallString<128> Path; I'm leery of directory_entry being this large. While I don't know how it will be used from the API so far, I imagine that some clients will want to have vectors of these. Given that, and that being so large will punish move construction, I'd suggest just making this contain an std::string. However, that really depends on how you see it being used. What do you think? Overall, looks great, -Chris From benny.kra at googlemail.com Tue Nov 23 15:55:21 2010 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Tue, 23 Nov 2010 22:55:21 +0100 Subject: [llvm-commits] [PATCH] New Path API design. In-Reply-To: References: <7211435F-635D-4109-A27B-C536D81D0A91@apple.com> Message-ID: On 23.11.2010, at 22:18, Michael Spencer wrote: > Attached are two patches. The first adds a new unit-test SystemTests > which has the TimeValue test and a new (empty) path test. The second > adds include/llvm/System/PathV2.h with documentation and the > modifications you mentioned. > error_code root_name(const Twine &path, StringRef &result); To get the contents of a Twine it has to be rendered to a buffer. Unless we have a global buffer (and a lot of thread safety issues) we can't return a StringRef to that buffer. From sabre at nondot.org Tue Nov 23 16:20:27 2010 From: sabre at nondot.org (Chris Lattner) Date: Tue, 23 Nov 2010 22:20:27 -0000 Subject: [llvm-commits] [llvm] r120065 - in /llvm/trunk: include/llvm/Support/MemoryBuffer.h lib/Support/MemoryBuffer.cpp Message-ID: <20101123222028.0F0D72A6C12C@llvm.org> Author: lattner Date: Tue Nov 23 16:20:27 2010 New Revision: 120065 URL: http://llvm.org/viewvc/llvm-project?rev=120065&view=rev Log: add a MemoryBuffer::getOpenFile method, which turns an open file descriptor into a MemoryBuffer (and closes the FD). Modified: llvm/trunk/include/llvm/Support/MemoryBuffer.h llvm/trunk/lib/Support/MemoryBuffer.cpp Modified: llvm/trunk/include/llvm/Support/MemoryBuffer.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/MemoryBuffer.h?rev=120065&r1=120064&r2=120065&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/MemoryBuffer.h (original) +++ llvm/trunk/include/llvm/Support/MemoryBuffer.h Tue Nov 23 16:20:27 2010 @@ -60,13 +60,18 @@ /// MemoryBuffer if successful, otherwise returning null. If FileSize is /// specified, this means that the client knows that the file exists and that /// it has the specified size. - static MemoryBuffer *getFile(StringRef Filename, - std::string *ErrStr = 0, + static MemoryBuffer *getFile(StringRef Filename, std::string *ErrStr = 0, int64_t FileSize = -1); - static MemoryBuffer *getFile(const char *Filename, - std::string *ErrStr = 0, + static MemoryBuffer *getFile(const char *Filename, std::string *ErrStr = 0, int64_t FileSize = -1); + /// getOpenFile - Given an already-open file descriptor, read the file and + /// return a MemoryBuffer. This takes ownership of the descriptor, + /// immediately closing it after reading the file. + static MemoryBuffer *getOpenFile(int FD, const char *Filename, + std::string *ErrStr = 0, + int64_t FileSize = -1); + /// getMemBuffer - Open the specified memory range as a MemoryBuffer. Note /// that InputData must be null terminated. static MemoryBuffer *getMemBuffer(StringRef InputData, Modified: llvm/trunk/lib/Support/MemoryBuffer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/MemoryBuffer.cpp?rev=120065&r1=120064&r2=120065&view=diff ============================================================================== --- llvm/trunk/lib/Support/MemoryBuffer.cpp (original) +++ llvm/trunk/lib/Support/MemoryBuffer.cpp Tue Nov 23 16:20:27 2010 @@ -187,6 +187,7 @@ MemoryBuffer *MemoryBuffer::getFile(StringRef Filename, std::string *ErrStr, int64_t FileSize) { + // Ensure the path is null terminated. SmallString<256> PathBuf(Filename.begin(), Filename.end()); return MemoryBuffer::getFile(PathBuf.c_str(), ErrStr, FileSize); } @@ -202,6 +203,12 @@ if (ErrStr) *ErrStr = sys::StrError(); return 0; } + + return getOpenFile(FD, Filename, ErrStr, FileSize); +} + +MemoryBuffer *MemoryBuffer::getOpenFile(int FD, const char *Filename, + std::string *ErrStr, int64_t FileSize) { FileCloser FC(FD); // Close FD on return. // If we don't know the file size, use fstat to find out. fstat on an open From bigcheesegs at gmail.com Tue Nov 23 16:56:30 2010 From: bigcheesegs at gmail.com (Michael Spencer) Date: Tue, 23 Nov 2010 17:56:30 -0500 Subject: [llvm-commits] [PATCH] New Path API design. In-Reply-To: References: <7211435F-635D-4109-A27B-C536D81D0A91@apple.com> Message-ID: On Tue, Nov 23, 2010 at 4:55 PM, Benjamin Kramer wrote: > > On 23.11.2010, at 22:18, Michael Spencer wrote: > >> Attached are two patches. The first adds a new unit-test SystemTests >> which has the TimeValue test and a new (empty) path test. The second >> adds include/llvm/System/PathV2.h with documentation and the >> modifications you mentioned. > >> error_code root_name(const Twine &path, StringRef &result); > > To get the contents of a Twine it has to be rendered to a buffer. Unless we have a global buffer > (and a lot of thread safety issues) we can't return a StringRef to that buffer. Hmm, you're right. That was originally a StringRef, but I did a search and replace with Twine. I think I'll change the functions with StringRef &result to take StringRef path. The other option is to use even more memory, when the common case would allow returning a StringRef into path. - Michael Spencer From clattner at apple.com Tue Nov 23 17:24:48 2010 From: clattner at apple.com (Chris Lattner) Date: Tue, 23 Nov 2010 15:24:48 -0800 Subject: [llvm-commits] [PATCH] New Path API design. In-Reply-To: References: <7211435F-635D-4109-A27B-C536D81D0A91@apple.com> Message-ID: <0D3553ED-9D39-49C9-82E1-CE1B8035A473@apple.com> On Nov 23, 2010, at 2:56 PM, Michael Spencer wrote: >> To get the contents of a Twine it has to be rendered to a buffer. Unless we have a global buffer >> (and a lot of thread safety issues) we can't return a StringRef to that buffer. > > Hmm, you're right. That was originally a StringRef, but I did a search > and replace with Twine. I think I'll change the functions with > StringRef &result to take StringRef path. The other option is to use > even more memory, when the common case would allow returning a > StringRef into path. Taking a StringRef instead of a twine makes sense! -Chris From stoklund at 2pi.dk Tue Nov 23 18:03:32 2010 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Wed, 24 Nov 2010 00:03:32 -0000 Subject: [llvm-commits] [llvm] r120068 - /llvm/trunk/include/llvm/ADT/IntervalMap.h Message-ID: <20101124000332.545852A6C12C@llvm.org> Author: stoklund Date: Tue Nov 23 18:03:32 2010 New Revision: 120068 URL: http://llvm.org/viewvc/llvm-project?rev=120068&view=rev Log: Generalize overflowLeaf to also handle overflows in branch nodes. This doesn't quite work yet because the calls to treeDecrement and treeIncrement operate at the leaf level, not on pathNode(Level) as required. Modified: llvm/trunk/include/llvm/ADT/IntervalMap.h Modified: llvm/trunk/include/llvm/ADT/IntervalMap.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/IntervalMap.h?rev=120068&r1=120067&r2=120068&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/IntervalMap.h (original) +++ llvm/trunk/include/llvm/ADT/IntervalMap.h Tue Nov 23 18:03:32 2010 @@ -1020,6 +1020,7 @@ rootBranch().subtree(n) = Node[n]; } rootSize = Nodes; + ++height; return NewOffset; } @@ -1489,8 +1490,8 @@ void setNodeSize(unsigned Level, unsigned Size); void setNodeStop(unsigned Level, KeyT Stop); - void insertNode(unsigned Level, IntervalMapImpl::NodeRef Node, KeyT Stop); - void overflowLeaf(); + bool insertNode(unsigned Level, IntervalMapImpl::NodeRef Node, KeyT Stop); + template bool overflow(unsigned Level); void treeInsert(KeyT a, KeyT b, ValT y); public: @@ -1528,19 +1529,26 @@ /// insertNode - insert a node before the current path at level. /// Leave the current path pointing at the new node. +/// @param Level path index of the node to be inserted. +/// @param Node The node to be inserted. +/// @param Stop The last index in the new node. +/// @return True if the tree height was increased. template -void IntervalMap:: +bool IntervalMap:: iterator::insertNode(unsigned Level, IntervalMapImpl::NodeRef Node, KeyT Stop) { + bool SplitRoot = false; + if (!Level) { // Insert into the root branch node. IntervalMap &IM = *this->map; if (IM.rootSize < RootBranch::Capacity) { IM.rootBranch().insert(this->rootOffset, IM.rootSize, Node, Stop); ++IM.rootSize; - return; + return SplitRoot; } // We need to split the root while keeping our position. + SplitRoot = true; IdxPair Offset = IM.splitRoot(this->rootOffset); this->rootOffset = Offset.first; this->path.insert(this->path.begin(),std::make_pair( @@ -1555,11 +1563,16 @@ } // Insert into the branch node at level-1. + if (this->pathNode(Level-1).size() == Branch::Capacity) { + assert(!SplitRoot && "Cannot overflow after splitting the root"); + SplitRoot = overflow(Level - 1); + Level += SplitRoot; + } IntervalMapImpl::NodeRef NR = this->pathNode(Level-1); unsigned Offset = this->pathOffset(Level-1); - assert(NR.size() < Branch::Capacity && "Branch overflow"); NR.get().insert(Offset, NR.size(), Node, Stop); setNodeSize(Level - 1, NR.size() + 1); + return SplitRoot; } // insert @@ -1603,7 +1616,7 @@ return; } // Leaf node has no space. - overflowLeaf(); + overflow(this->map->height - 1); IP = this->treeLeaf().insertFrom(this->treeLeafOffset(), this->treeLeafSize(), a, b, y); this->treeLeafOffset() = IP.first; @@ -1614,52 +1627,57 @@ // FIXME: Handle cross-node coalescing. } -// overflowLeaf - Distribute entries of the current leaf node evenly among -// its siblings and ensure that the current node is not full. -// This may require allocating a new node. -template -void IntervalMap:: -iterator::overflowLeaf() { +/// overflow - Distribute entries of the current node evenly among +/// its siblings and ensure that the current node is not full. +/// This may require allocating a new node. +/// @param NodeT The type of node at Level (Leaf or Branch). +/// @param Level path index of the overflowing node. +/// @return True when the tree height was changed. +template +template +bool IntervalMap:: +iterator::overflow(unsigned Level) { using namespace IntervalMapImpl; unsigned CurSize[4]; - Leaf *Node[4]; + NodeT *Node[4]; unsigned Nodes = 0; unsigned Elements = 0; - unsigned Offset = this->treeLeafOffset(); + unsigned Offset = this->pathOffset(Level); // Do we have a left sibling? - NodeRef LeftSib = this->leftSibling(this->map->height-1); + NodeRef LeftSib = this->leftSibling(Level); if (LeftSib) { Offset += Elements = CurSize[Nodes] = LeftSib.size(); - Node[Nodes++] = &LeftSib.get(); + Node[Nodes++] = &LeftSib.get(); } - // Current leaf node. - Elements += CurSize[Nodes] = this->treeLeafSize(); - Node[Nodes++] = &this->treeLeaf(); + // Current node. + NodeRef CurNode = this->pathNode(Level); + Elements += CurSize[Nodes] = CurNode.size(); + Node[Nodes++] = &CurNode.get(); // Do we have a right sibling? - NodeRef RightSib = this->rightSibling(this->map->height-1); + NodeRef RightSib = this->rightSibling(Level); if (RightSib) { Offset += Elements = CurSize[Nodes] = RightSib.size(); - Node[Nodes++] = &RightSib.get(); + Node[Nodes++] = &RightSib.get(); } // Do we need to allocate a new node? unsigned NewNode = 0; - if (Elements + 1 > Nodes * Leaf::Capacity) { + if (Elements + 1 > Nodes * NodeT::Capacity) { // Insert NewNode at the penultimate position, or after a single node. NewNode = Nodes == 1 ? 1 : Nodes - 1; CurSize[Nodes] = CurSize[NewNode]; Node[Nodes] = Node[NewNode]; CurSize[NewNode] = 0; - Node[NewNode] = this->map->allocLeaf(); + Node[NewNode] = new(this->map->allocator.template Allocate())NodeT(); ++Nodes; } // Compute the new element distribution. unsigned NewSize[4]; - IdxPair NewOffset = distribute(Nodes, Elements, Leaf::Capacity, + IdxPair NewOffset = distribute(Nodes, Elements, NodeT::Capacity, CurSize, NewSize, Offset, true); // Move current location to the leftmost node. @@ -1702,14 +1720,16 @@ #endif // Elements have been rearranged, now update node sizes and stops. + bool SplitRoot = false; unsigned Pos = 0; for (;;) { KeyT Stop = Node[Pos]->stop(NewSize[Pos]-1); - if (NewNode && Pos == NewNode) - insertNode(this->map->height - 1, NodeRef(Node[Pos], NewSize[Pos]), Stop); - else { - setNodeSize(this->map->height - 1, NewSize[Pos]); - setNodeStop(this->map->height - 1, Stop); + if (NewNode && Pos == NewNode) { + SplitRoot = insertNode(Level, NodeRef(Node[Pos], NewSize[Pos]), Stop); + Level += SplitRoot; + } else { + setNodeSize(Level, NewSize[Pos]); + setNodeStop(Level, Stop); } if (Pos + 1 == Nodes) break; @@ -1722,7 +1742,8 @@ this->treeDecrement(); --Pos; } - this->treeLeafOffset() = NewOffset.second; + this->pathOffset(Level) = NewOffset.second; + return SplitRoot; } } // namespace llvm From bigcheesegs at gmail.com Tue Nov 23 18:08:19 2010 From: bigcheesegs at gmail.com (Michael Spencer) Date: Tue, 23 Nov 2010 19:08:19 -0500 Subject: [llvm-commits] [PATCH] New Path API design. In-Reply-To: References: <7211435F-635D-4109-A27B-C536D81D0A91@apple.com> Message-ID: On Tue, Nov 23, 2010 at 4:46 PM, Chris Lattner wrote: > On Nov 23, 2010, at 1:18 PM, Michael Spencer wrote: >> Attached are two patches. The first adds a new unit-test SystemTests >> which has the TimeValue test and a new (empty) path test. The second >> adds include/llvm/System/PathV2.h with documentation and the >> modifications you mentioned. > > Looking great. ?Some comments: > > > +class file_status > +{ > ... > + ?file_type type() const; > + ?void type(file_type v); > > Please use get_/set_ prefixes. ?Naming getters and setters the same thing leads to confusing client code IMO. OK. > +error_code remove_filename(SmallVectorImpl &path); > > I see this as getting confused with 'remove'. ?Maybe 'remove' should be named remove_from_disk or something? ?I think it would be good to pick some sort of uniform suffix and put them on everything that modifies the file system, e.g. copy_files_on_disk, create_directories_on_disk, exists_on_disk etc. > > Another way to handle this would be to put all the path manipulation stuff in sys::path, but put all the file system manipulation stuff in sys::fs. ?sys::fs::remove() would be very clear to me. OK. > +error_code native(const Twine &path, SmallVectorImpl &result); > > native isn't a verb, how about 'canonicalize'? canonicalize exists. And the difference between the two is that 'native' is lexical, while 'canonicalize' acts on the file system. They are now path::native and fs::canonicalize. > +error_code current_path(SmallVectorImpl &result); > > likewise, how about get_current_path? ?similarly with the root_ names as well as filename, stem, parent_path etc. Seems redundant and verbose to me. It also makes some names slightly different from TR2/boost, which I think would be confusing. Obviously different isn't a problem. > +error_code is_valid(const Twine &path, bool &result); > > how about "is_valid_name" to make it clear that it isn't going to disk to see if the file is valid. Uses path::is_valid. > +/// @brief Get relative path. > +/// > +/// @param path Input path. > +/// @param result Set to the path starting after root_path if one exists, > +/// ? ? ? ? ? ? ? otherwise "". > +/// @results errc::success if result has been successfully set, otherwise a > +/// ? ? ? ? ?platform specific error_code. > +error_code relative_path(const Twine &path, StringRef &result); > > I don't understand this operation, an example would be great :) ?It would be great to get examples for stem and extension as well. I'll add more docs. In this case: C:\hello\world => hello\world foo/bar => foo/bar /foo/bar => foo/bar > +error_code set_read(const Twine &path, bool value); > +error_code set_write(const Twine &path, bool value); > +error_code set_execute(const Twine &path, bool value); > > Is the only way to set a mode to do: > ?setRead(X, true); > ?setWrite(X, true); > > If that turns into two syscalls, that seems wasteful. ?Likewise with can_read/can_write. These were in the set of functions directly copied over from the sys::Path class. I (and the people working on filesystem) agree that this isn't the best way to do it. I'm tempted to design a permissions API, but LLVM has no need for that beyond RWX. However, for the sake of syscalls, I could make the API flag based. > +error_code is_empty(const Twine &path, bool &result); > > How about is_empty_file to make it obvious that this only applies to files, not directories? Now fs::is_empty. > +error_code space(const Twine &path, space_info &result); > > This could use a better name, get_disk_space would be better at least. I agree with this. Changed. > +error_code unique_path(const Twine &model, SmallVectorImpl &result); > > This API is inherently racy unless it returns a newly created file. ?I don't think we should have it. I agree. I'll remove this and temp_directory_path and add a more family friendly unique_file function (or some such name). > +class directory_entry { > + ?SmallString<128> Path; > > I'm leery of directory_entry being this large. ?While I don't know how it will be used from the API so far, I imagine that some clients will want to have vectors of these. ?Given that, and that being so large will punish move construction, I'd suggest just making this contain an std::string. ?However, that really depends on how you see it being used. ?What do you think? These are constructed once per iterator and reused for each iteration, so std::string should be fine. > Overall, looks great, > > -Chris Thanks for all the comments. I'll make the changes you mentioned and commit as per IRC and continue development in tree. - Michael Spencer From eli.friedman at gmail.com Tue Nov 23 18:37:04 2010 From: eli.friedman at gmail.com (Eli Friedman) Date: Tue, 23 Nov 2010 16:37:04 -0800 Subject: [llvm-commits] [llvm] r120049 - in /llvm/trunk: lib/Target/README.txt lib/Transforms/InstCombine/InstCombineShifts.cpp test/Transforms/InstCombine/shift.ll In-Reply-To: <20101123203357.5EA1E2A6C12C@llvm.org> References: <20101123203357.5EA1E2A6C12C@llvm.org> Message-ID: On Tue, Nov 23, 2010 at 12:33 PM, Benjamin Kramer wrote: > Author: d0k > Date: Tue Nov 23 14:33:57 2010 > New Revision: 120049 > > URL: http://llvm.org/viewvc/llvm-project?rev=120049&view=rev > Log: > The srem -> urem transform is not safe for any divisor that's not a power of two. > E.g. -5 % 5 is 0 with srem and 1 with urem. > > Also addresses Frits van Bommel's comments. > > Modified: > ? ?llvm/trunk/lib/Target/README.txt > ? ?llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp > ? ?llvm/trunk/test/Transforms/InstCombine/shift.ll > > Modified: llvm/trunk/lib/Target/README.txt > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/README.txt?rev=120049&r1=120048&r2=120049&view=diff > ============================================================================== > --- llvm/trunk/lib/Target/README.txt (original) > +++ llvm/trunk/lib/Target/README.txt Tue Nov 23 14:33:57 2010 > @@ -1704,8 +1704,8 @@ > ? %384 = shl i64 %381, %383 ? ? ? ? ? ? ? ? ? ? ? ; [#uses=1] > ? %385 = icmp slt i32 %tmp14.i, 64 ? ? ? ? ? ? ? ?; [#uses=1] > > -The srem can be transformed to an and because if x is negative, the shift is > -undefined. ?Testcase derived from 403.gcc. > +The srem can be transformed to an and because if %tmp14.i is negative, the > +shift is undefined. ?Testcase derived from 403.gcc. > > ?//===---------------------------------------------------------------------===// > > > Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp?rev=120049&r1=120048&r2=120049&view=diff > ============================================================================== > --- llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp (original) > +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp Tue Nov 23 14:33:57 2010 > @@ -54,19 +54,17 @@ > ? ? if (Instruction *Res = FoldShiftByConstant(Op0, CUI, I)) > ? ? ? return Res; > > - ?// X shift (A srem B) -> X shift (A urem B) iff B is positive. > + ?// X shift (A srem B) -> X shift (A and B-1) iff B is a power of 2. > ? // Because shifts by negative values are undefined. > ? if (BinaryOperator *BO = dyn_cast(Op1)) > - ? ?if (BO->getOpcode() == Instruction::SRem && BO->getType()->isIntegerTy()) { > - ? ? ?// Make sure the divisor's sign bit is zero. > - ? ? ?APInt Mask = APInt::getSignBit(BO->getType()->getPrimitiveSizeInBits()); > - ? ? ?if (MaskedValueIsZero(BO->getOperand(1), Mask)) { > - ? ? ? ?Value *URem = Builder->CreateURem(BO->getOperand(0), BO->getOperand(1), > - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?BO->getName()); > - ? ? ? ?I.setOperand(1, URem); > - ? ? ? ?return &I; > - ? ? ?} > - ? ?} > + ? ?if (BO->hasOneUse() && BO->getOpcode() == Instruction::SRem) > + ? ? ?if (ConstantInt *CI = dyn_cast(BO->getOperand(1))) > + ? ? ? ?if (CI->getValue().isPowerOf2()) { > + ? ? ? ? ?Constant *C = ConstantInt::get(BO->getType(), CI->getValue()-1); > + ? ? ? ? ?Value *Rem = Builder->CreateAnd(BO->getOperand(0), C, BO->getName()); > + ? ? ? ? ?I.setOperand(1, Rem); > + ? ? ? ? ?return &I; > + ? ? ? ?} Is this check correct for "X << (A % INT_MIN)"? -Eli From kremenek at apple.com Tue Nov 23 18:54:28 2010 From: kremenek at apple.com (Ted Kremenek) Date: Wed, 24 Nov 2010 00:54:28 -0000 Subject: [llvm-commits] [llvm] r120070 - in /llvm/trunk: include/llvm/ADT/ImmutableIntervalMap.h include/llvm/ADT/ImmutableList.h include/llvm/ADT/ImmutableMap.h include/llvm/ADT/ImmutableSet.h unittests/ADT/ImmutableSetTest.cpp Message-ID: <20101124005428.D8E852A6C12C@llvm.org> Author: kremenek Date: Tue Nov 23 18:54:28 2010 New Revision: 120070 URL: http://llvm.org/viewvc/llvm-project?rev=120070&view=rev Log: Tweak ImmutableMap/ImmutableSet/ImmutableList APIs to use lowercase letters for the start of most method names and to replace some method names with more descriptive names (e.g., "getLeft()" instead of "Left()"). No real functionality change. Modified: llvm/trunk/include/llvm/ADT/ImmutableIntervalMap.h llvm/trunk/include/llvm/ADT/ImmutableList.h llvm/trunk/include/llvm/ADT/ImmutableMap.h llvm/trunk/include/llvm/ADT/ImmutableSet.h llvm/trunk/unittests/ADT/ImmutableSetTest.cpp Modified: llvm/trunk/include/llvm/ADT/ImmutableIntervalMap.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/ImmutableIntervalMap.h?rev=120070&r1=120069&r2=120070&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/ImmutableIntervalMap.h (original) +++ llvm/trunk/include/llvm/ADT/ImmutableIntervalMap.h Tue Nov 23 18:54:28 2010 @@ -94,7 +94,7 @@ : ImutAVLFactory(Alloc) {} TreeTy *Add(TreeTy *T, value_type_ref V) { - T = Add_internal(V,T); + T = add_internal(V,T); this->MarkImmutable(T); return T; } @@ -103,20 +103,20 @@ if (!T) return NULL; - key_type_ref CurrentKey = ImutInfo::KeyOfValue(this->Value(T)); + key_type_ref CurrentKey = ImutInfo::KeyOfValue(this->getValue(T)); if (ImutInfo::isContainedIn(K, CurrentKey)) return T; else if (ImutInfo::isLess(K, CurrentKey)) - return Find(this->Left(T), K); + return Find(this->getLeft(T), K); else - return Find(this->Right(T), K); + return Find(this->getRight(T), K); } private: - TreeTy *Add_internal(value_type_ref V, TreeTy *T) { + TreeTy *add_internal(value_type_ref V, TreeTy *T) { key_type_ref K = ImutInfo::KeyOfValue(V); - T = RemoveAllOverlaps(T, K); + T = removeAllOverlaps(T, K); if (this->isEmpty(T)) return this->CreateNode(NULL, V, NULL); @@ -125,38 +125,38 @@ key_type_ref KCurrent = ImutInfo::KeyOfValue(this->Value(T)); if (ImutInfo::isLess(K, KCurrent)) - return this->Balance(Add_internal(V, this->Left(T)), this->Value(T), + return this->Balance(add_internal(V, this->Left(T)), this->Value(T), this->Right(T)); else return this->Balance(this->Left(T), this->Value(T), - Add_internal(V, this->Right(T))); + add_internal(V, this->Right(T))); } // Remove all overlaps from T. - TreeTy *RemoveAllOverlaps(TreeTy *T, key_type_ref K) { + TreeTy *removeAllOverlaps(TreeTy *T, key_type_ref K) { bool Changed; do { Changed = false; - T = RemoveOverlap(T, K, Changed); - this->MarkImmutable(T); + T = removeOverlap(T, K, Changed); + this->markImmutable(T); } while (Changed); return T; } // Remove one overlap from T. - TreeTy *RemoveOverlap(TreeTy *T, key_type_ref K, bool &Changed) { + TreeTy *removeOverlap(TreeTy *T, key_type_ref K, bool &Changed) { if (!T) return NULL; Interval CurrentK = ImutInfo::KeyOfValue(this->Value(T)); // If current key does not overlap the inserted key. if (CurrentK.getStart() > K.getEnd()) - return this->Balance(RemoveOverlap(this->Left(T), K, Changed), + return this->Balance(removeOverlap(this->Left(T), K, Changed), this->Value(T), this->Right(T)); else if (CurrentK.getEnd() < K.getStart()) return this->Balance(this->Left(T), this->Value(T), - RemoveOverlap(this->Right(T), K, Changed)); + removeOverlap(this->Right(T), K, Changed)); // Current key overlaps with the inserted key. // Remove the current key. @@ -167,18 +167,18 @@ if (CurrentK.getStart() < K.getStart()) { if (CurrentK.getEnd() <= K.getEnd()) { Interval NewK(CurrentK.getStart(), K.getStart()-1); - return Add_internal(std::make_pair(NewK, OldData), T); + return add_internal(std::make_pair(NewK, OldData), T); } else { Interval NewK1(CurrentK.getStart(), K.getStart()-1); - T = Add_internal(std::make_pair(NewK1, OldData), T); + T = add_internal(std::make_pair(NewK1, OldData), T); Interval NewK2(K.getEnd()+1, CurrentK.getEnd()); - return Add_internal(std::make_pair(NewK2, OldData), T); + return add_internal(std::make_pair(NewK2, OldData), T); } } else { if (CurrentK.getEnd() > K.getEnd()) { Interval NewK(K.getEnd()+1, CurrentK.getEnd()); - return Add_internal(std::make_pair(NewK, OldData), T); + return add_internal(std::make_pair(NewK, OldData), T); } else return T; } @@ -209,22 +209,22 @@ public: Factory(BumpPtrAllocator& Alloc) : F(Alloc) {} - ImmutableIntervalMap GetEmptyMap() { - return ImmutableIntervalMap(F.GetEmptyTree()); + ImmutableIntervalMap getEmptyMap() { + return ImmutableIntervalMap(F.getEmptyTree()); } - ImmutableIntervalMap Add(ImmutableIntervalMap Old, + ImmutableIntervalMap add(ImmutableIntervalMap Old, key_type_ref K, data_type_ref D) { - TreeTy *T = F.Add(Old.Root, std::make_pair(K, D)); - return ImmutableIntervalMap(F.GetCanonicalTree(T)); + TreeTy *T = F.add(Old.Root, std::make_pair(K, D)); + return ImmutableIntervalMap(F.getCanonicalTree(T)); } - ImmutableIntervalMap Remove(ImmutableIntervalMap Old, key_type_ref K) { - TreeTy *T = F.Remove(Old.Root, K); - return ImmutableIntervalMap(F.GetCanonicalTree(T)); + ImmutableIntervalMap remove(ImmutableIntervalMap Old, key_type_ref K) { + TreeTy *T = F.remove(Old.Root, K); + return ImmutableIntervalMap(F.getCanonicalTree(T)); } - data_type *Lookup(ImmutableIntervalMap M, key_type_ref K) { + data_type *lookup(ImmutableIntervalMap M, key_type_ref K) { TreeTy *T = F.Find(M.getRoot(), K); if (T) return &T->getValue().second; Modified: llvm/trunk/include/llvm/ADT/ImmutableList.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/ImmutableList.h?rev=120070&r1=120069&r2=120070&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/ImmutableList.h (original) +++ llvm/trunk/include/llvm/ADT/ImmutableList.h Tue Nov 23 18:54:28 2010 @@ -156,7 +156,7 @@ if (ownsAllocator()) delete &getAllocator(); } - ImmutableList Concat(const T& Head, ImmutableList Tail) { + ImmutableList concat(const T& Head, ImmutableList Tail) { // Profile the new list to see if it already exists in our cache. FoldingSetNodeID ID; void* InsertPos; @@ -178,16 +178,16 @@ return L; } - ImmutableList Add(const T& D, ImmutableList L) { - return Concat(D, L); + ImmutableList add(const T& D, ImmutableList L) { + return concat(D, L); } - ImmutableList GetEmptyList() const { + ImmutableList getEmptyList() const { return ImmutableList(0); } - ImmutableList Create(const T& X) { - return Concat(X, GetEmptyList()); + ImmutableList create(const T& X) { + return Concat(X, getEmptyList()); } }; Modified: llvm/trunk/include/llvm/ADT/ImmutableMap.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/ImmutableMap.h?rev=120070&r1=120069&r2=120070&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/ImmutableMap.h (original) +++ llvm/trunk/include/llvm/ADT/ImmutableMap.h Tue Nov 23 18:54:28 2010 @@ -89,16 +89,16 @@ Factory(BumpPtrAllocator& Alloc, bool canonicalize = true) : F(Alloc), Canonicalize(canonicalize) {} - ImmutableMap GetEmptyMap() { return ImmutableMap(F.GetEmptyTree()); } + ImmutableMap getEmptyMap() { return ImmutableMap(F.getEmptyTree()); } - ImmutableMap Add(ImmutableMap Old, key_type_ref K, data_type_ref D) { - TreeTy *T = F.Add(Old.Root, std::make_pair(K,D)); - return ImmutableMap(Canonicalize ? F.GetCanonicalTree(T): T); + ImmutableMap add(ImmutableMap Old, key_type_ref K, data_type_ref D) { + TreeTy *T = F.add(Old.Root, std::make_pair(K,D)); + return ImmutableMap(Canonicalize ? F.getCanonicalTree(T): T); } - ImmutableMap Remove(ImmutableMap Old, key_type_ref K) { - TreeTy *T = F.Remove(Old.Root,K); - return ImmutableMap(Canonicalize ? F.GetCanonicalTree(T): T); + ImmutableMap remove(ImmutableMap Old, key_type_ref K) { + TreeTy *T = F.remove(Old.Root,K); + return ImmutableMap(Canonicalize ? F.getCanonicalTree(T): T); } private: Modified: llvm/trunk/include/llvm/ADT/ImmutableSet.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/ImmutableSet.h?rev=120070&r1=120069&r2=120070&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/ImmutableSet.h (original) +++ llvm/trunk/include/llvm/ADT/ImmutableSet.h Tue Nov 23 18:54:28 2010 @@ -53,27 +53,25 @@ /// getLeft - Returns a pointer to the left subtree. This value /// is NULL if there is no left subtree. - ImutAVLTree *getLeft() const { return Left; } + ImutAVLTree *getLeft() const { return left; } /// getRight - Returns a pointer to the right subtree. This value is /// NULL if there is no right subtree. - ImutAVLTree *getRight() const { return Right; } + ImutAVLTree *getRight() const { return right; } /// getHeight - Returns the height of the tree. A tree with no subtrees /// has a height of 1. - unsigned getHeight() const { return Height; } + unsigned getHeight() const { return height; } /// getValue - Returns the data value associated with the tree node. - const value_type& getValue() const { return Value; } + const value_type& getValue() const { return value; } /// find - Finds the subtree associated with the specified key value. /// This method returns NULL if no matching subtree is found. ImutAVLTree* find(key_type_ref K) { ImutAVLTree *T = this; - while (T) { key_type_ref CurrentKey = ImutInfo::KeyOfValue(T->getValue()); - if (ImutInfo::isEqual(K,CurrentKey)) return T; else if (ImutInfo::isLess(K,CurrentKey)) @@ -81,7 +79,6 @@ else T = T->getRight(); } - return NULL; } @@ -90,7 +87,7 @@ ImutAVLTree* getMaxElement() { ImutAVLTree *T = this; ImutAVLTree *Right = T->getRight(); - while (Right) { T = Right; Right = T->getRight(); } + while (Right) { T = right; right = T->getRight(); } return T; } @@ -98,10 +95,10 @@ /// both leaves and non-leaf nodes. unsigned size() const { unsigned n = 1; - - if (const ImutAVLTree* L = getLeft()) n += L->size(); - if (const ImutAVLTree* R = getRight()) n += R->size(); - + if (const ImutAVLTree* L = getLeft()) + n += L->size(); + if (const ImutAVLTree* R = getRight()) + n += R->size(); return n; } @@ -114,7 +111,7 @@ /// inorder traversal. iterator end() const { return iterator(); } - bool ElementEqual(value_type_ref V) const { + bool isElementEqual(value_type_ref V) const { // Compare the keys. if (!ImutInfo::isEqual(ImutInfo::KeyOfValue(getValue()), ImutInfo::KeyOfValue(V))) @@ -128,8 +125,8 @@ return true; } - bool ElementEqual(const ImutAVLTree* RHS) const { - return ElementEqual(RHS->getValue()); + bool isElementEqual(const ImutAVLTree* RHS) const { + return isElementEqual(RHS->getValue()); } /// isEqual - Compares two trees for structural equality and returns true @@ -144,12 +141,12 @@ while (LItr != LEnd && RItr != REnd) { if (*LItr == *RItr) { - LItr.SkipSubTree(); - RItr.SkipSubTree(); + LItr.skipSubTree(); + RItr.skipSubTree(); continue; } - if (!LItr->ElementEqual(*RItr)) + if (!LItr->isElementEqual(*RItr)) return false; ++LItr; @@ -173,22 +170,24 @@ /// Nodes are visited using an inorder traversal. template void foreach(Callback& C) { - if (ImutAVLTree* L = getLeft()) L->foreach(C); + if (ImutAVLTree* L = getLeft()) + L->foreach(C); - C(Value); + C(value); - if (ImutAVLTree* R = getRight()) R->foreach(C); + if (ImutAVLTree* R = getRight()) + R->foreach(C); } - /// verify - A utility method that checks that the balancing and + /// validateTree - A utility method that checks that the balancing and /// ordering invariants of the tree are satisifed. It is a recursive /// method that returns the height of the tree, which is then consumed - /// by the enclosing verify call. External callers should ignore the + /// by the enclosing validateTree call. External callers should ignore the /// return value. An invalid tree will cause an assertion to fire in /// a debug build. - unsigned verify() const { - unsigned HL = getLeft() ? getLeft()->verify() : 0; - unsigned HR = getRight() ? getRight()->verify() : 0; + unsigned validateTree() const { + unsigned HL = getLeft() ? getLeft()->validateTree() : 0; + unsigned HR = getRight() ? getRight()->validateTree() : 0; (void) HL; (void) HR; @@ -214,21 +213,21 @@ /// Profile - Profiling for ImutAVLTree. void Profile(llvm::FoldingSetNodeID& ID) { - ID.AddInteger(ComputeDigest()); + ID.AddInteger(computeDigest()); } //===----------------------------------------------------===// - // Internal Values. + // Internal values. //===----------------------------------------------------===// private: - ImutAVLTree* Left; - ImutAVLTree* Right; - unsigned Height : 28; - unsigned Mutable : 1; - unsigned CachedDigest : 1; - value_type Value; - uint32_t Digest; + ImutAVLTree* left; + ImutAVLTree* right; + unsigned height : 28; + unsigned IsMutable : 1; + unsigned IsDigestCached : 1; + value_type value; + uint32_t digest; //===----------------------------------------------------===// // Internal methods (node manipulation; used by Factory). @@ -239,8 +238,8 @@ /// ImutAVLFactory. ImutAVLTree(ImutAVLTree* l, ImutAVLTree* r, value_type_ref v, unsigned height) - : Left(l), Right(r), Height(height), Mutable(true), CachedDigest(false), - Value(v), Digest(0) {} + : left(l), right(r), height(height), IsMutable(true), + IsDigestCached(false), value(v), digest(0) {} /// isMutable - Returns true if the left and right subtree references /// (as well as height) can be changed. If this method returns false, @@ -248,11 +247,11 @@ /// object should always have this method return true. Further, if this /// method returns false for an instance of ImutAVLTree, all subtrees /// will also have this method return false. The converse is not true. - bool isMutable() const { return Mutable; } + bool isMutable() const { return IsMutable; } /// hasCachedDigest - Returns true if the digest for this tree is cached. /// This can only be true if the tree is immutable. - bool hasCachedDigest() const { return CachedDigest; } + bool hasCachedDigest() const { return IsDigestCached; } //===----------------------------------------------------===// // Mutating operations. A tree root can be manipulated as @@ -265,17 +264,17 @@ // immutable. //===----------------------------------------------------===// - /// MarkImmutable - Clears the mutable flag for a tree. After this happens, + /// markImmutable - Clears the mutable flag for a tree. After this happens, /// it is an error to call setLeft(), setRight(), and setHeight(). - void MarkImmutable() { + void markImmutable() { assert(isMutable() && "Mutable flag already removed."); - Mutable = false; + IsMutable = false; } - /// MarkedCachedDigest - Clears the NoCachedDigest flag for a tree. - void MarkedCachedDigest() { + /// markedCachedDigest - Clears the NoCachedDigest flag for a tree. + void markedCachedDigest() { assert(!hasCachedDigest() && "NoCachedDigest flag already removed."); - CachedDigest = true; + IsDigestCached = true; } /// setLeft - Changes the reference of the left subtree. Used internally @@ -283,33 +282,33 @@ void setLeft(ImutAVLTree* NewLeft) { assert(isMutable() && "Only a mutable tree can have its left subtree changed."); - Left = NewLeft; - CachedDigest = false; + left = NewLeft; + IsDigestCached = false; } /// setRight - Changes the reference of the right subtree. Used internally /// by ImutAVLFactory. - void setRight(ImutAVLTree* NewRight) { + void setRight(ImutAVLTree* newRight) { assert(isMutable() && "Only a mutable tree can have its right subtree changed."); - Right = NewRight; - CachedDigest = false; + right = newRight; + IsDigestCached = false; } /// setHeight - Changes the height of the tree. Used internally by /// ImutAVLFactory. void setHeight(unsigned h) { assert(isMutable() && "Only a mutable tree can have its height changed."); - Height = h; + height = h; } static inline - uint32_t ComputeDigest(ImutAVLTree* L, ImutAVLTree* R, value_type_ref V) { + uint32_t computeDigest(ImutAVLTree* L, ImutAVLTree* R, value_type_ref V) { uint32_t digest = 0; if (L) - digest += L->ComputeDigest(); + digest += L->computeDigest(); // Compute digest of stored data. FoldingSetNodeID ID; @@ -317,20 +316,20 @@ digest += ID.ComputeHash(); if (R) - digest += R->ComputeDigest(); + digest += R->computeDigest(); return digest; } - inline uint32_t ComputeDigest() { + inline uint32_t computeDigest() { // Check the lowest bit to determine if digest has actually been // pre-computed. if (hasCachedDigest()) - return Digest; + return digest; - uint32_t X = ComputeDigest(getLeft(), getRight(), getValue()); - Digest = X; - MarkedCachedDigest(); + uint32_t X = computeDigest(getLeft(), getRight(), getValue()); + digest = X; + markedCachedDigest(); return X; } }; @@ -373,55 +372,54 @@ if (ownsAllocator()) delete &getAllocator(); } - TreeTy* Add(TreeTy* T, value_type_ref V) { - T = Add_internal(V,T); - MarkImmutable(T); + TreeTy* add(TreeTy* T, value_type_ref V) { + T = add_internal(V,T); + markImmutable(T); return T; } - TreeTy* Remove(TreeTy* T, key_type_ref V) { - T = Remove_internal(V,T); - MarkImmutable(T); + TreeTy* remove(TreeTy* T, key_type_ref V) { + T = remove_internal(V,T); + markImmutable(T); return T; } - TreeTy* GetEmptyTree() const { return NULL; } + TreeTy* getEmptyTree() const { return NULL; } +protected: + //===--------------------------------------------------===// // A bunch of quick helper functions used for reasoning // about the properties of trees and their children. // These have succinct names so that the balancing code // is as terse (and readable) as possible. //===--------------------------------------------------===// -protected: - bool isEmpty(TreeTy* T) const { return !T; } - unsigned Height(TreeTy* T) const { return T ? T->getHeight() : 0; } - TreeTy* Left(TreeTy* T) const { return T->getLeft(); } - TreeTy* Right(TreeTy* T) const { return T->getRight(); } - value_type_ref Value(TreeTy* T) const { return T->Value; } - - unsigned IncrementHeight(TreeTy* L, TreeTy* R) const { - unsigned hl = Height(L); - unsigned hr = Height(R); + bool isEmpty(TreeTy* T) const { return !T; } + unsigned getHeight(TreeTy* T) const { return T ? T->getHeight() : 0; } + TreeTy* getLeft(TreeTy* T) const { return T->getLeft(); } + TreeTy* getRight(TreeTy* T) const { return T->getRight(); } + value_type_ref getValue(TreeTy* T) const { return T->value; } + + unsigned incrementHeight(TreeTy* L, TreeTy* R) const { + unsigned hl = getHeight(L); + unsigned hr = getHeight(R); return (hl > hr ? hl : hr) + 1; } - static bool CompareTreeWithSection(TreeTy* T, + static bool compareTreeWithSection(TreeTy* T, typename TreeTy::iterator& TI, typename TreeTy::iterator& TE) { - typename TreeTy::iterator I = T->begin(), E = T->end(); - - for ( ; I!=E ; ++I, ++TI) - if (TI == TE || !I->ElementEqual(*TI)) + for ( ; I!=E ; ++I, ++TI) { + if (TI == TE || !I->isElementEqual(*TI)) return false; - + } return true; } //===--------------------------------------------------===// - // "CreateNode" is used to generate new tree roots that link + // "createNode" is used to generate new tree roots that link // to other trees. The functon may also simply move links // in an existing root if that root is still marked mutable. // This is necessary because otherwise our balancing code @@ -430,148 +428,147 @@ // returned to the caller. //===--------------------------------------------------===// - TreeTy* CreateNode(TreeTy* L, value_type_ref V, TreeTy* R) { + TreeTy* createNode(TreeTy* L, value_type_ref V, TreeTy* R) { BumpPtrAllocator& A = getAllocator(); TreeTy* T = (TreeTy*) A.Allocate(); - new (T) TreeTy(L, R, V, IncrementHeight(L,R)); + new (T) TreeTy(L, R, V, incrementHeight(L,R)); return T; } - TreeTy* CreateNode(TreeTy* L, TreeTy* OldTree, TreeTy* R) { - assert(!isEmpty(OldTree)); - - if (OldTree->isMutable()) { - OldTree->setLeft(L); - OldTree->setRight(R); - OldTree->setHeight(IncrementHeight(L, R)); - return OldTree; + TreeTy* createNode(TreeTy* newLeft, TreeTy* oldTree, TreeTy* newRight) { + assert(!isEmpty(oldTree)); + if (oldTree->isMutable()) { + oldTree->setLeft(newLeft); + oldTree->setRight(newRight); + oldTree->setHeight(incrementHeight(newLeft, newRight)); + return oldTree; } else - return CreateNode(L, Value(OldTree), R); + return createNode(newLeft, getValue(oldTree), newRight); } - /// Balance - Used by Add_internal and Remove_internal to + /// balanceTree - Used by add_internal and remove_internal to /// balance a newly created tree. - TreeTy* Balance(TreeTy* L, value_type_ref V, TreeTy* R) { - - unsigned hl = Height(L); - unsigned hr = Height(R); + TreeTy* balanceTree(TreeTy* L, value_type_ref V, TreeTy* R) { + unsigned hl = getHeight(L); + unsigned hr = getHeight(R); if (hl > hr + 2) { assert(!isEmpty(L) && "Left tree cannot be empty to have a height >= 2"); - TreeTy* LL = Left(L); - TreeTy* LR = Right(L); + TreeTy *LL = getLeft(L); + TreeTy *LR = getRight(L); - if (Height(LL) >= Height(LR)) - return CreateNode(LL, L, CreateNode(LR,V,R)); + if (getHeight(LL) >= getHeight(LR)) + return createNode(LL, L, createNode(LR,V,R)); assert(!isEmpty(LR) && "LR cannot be empty because it has a height >= 1"); - TreeTy* LRL = Left(LR); - TreeTy* LRR = Right(LR); + TreeTy *LRL = getLeft(LR); + TreeTy *LRR = getRight(LR); - return CreateNode(CreateNode(LL,L,LRL), LR, CreateNode(LRR,V,R)); + return createNode(createNode(LL,L,LRL), LR, createNode(LRR,V,R)); } else if (hr > hl + 2) { assert(!isEmpty(R) && "Right tree cannot be empty to have a height >= 2"); - TreeTy* RL = Left(R); - TreeTy* RR = Right(R); + TreeTy *RL = getLeft(R); + TreeTy *RR = getRight(R); - if (Height(RR) >= Height(RL)) - return CreateNode(CreateNode(L,V,RL), R, RR); + if (getHeight(RR) >= getHeight(RL)) + return createNode(createNode(L,V,RL), R, RR); assert(!isEmpty(RL) && "RL cannot be empty because it has a height >= 1"); - TreeTy* RLL = Left(RL); - TreeTy* RLR = Right(RL); + TreeTy *RLL = getLeft(RL); + TreeTy *RLR = getRight(RL); - return CreateNode(CreateNode(L,V,RLL), RL, CreateNode(RLR,R,RR)); + return createNode(createNode(L,V,RLL), RL, createNode(RLR,R,RR)); } else - return CreateNode(L,V,R); + return createNode(L,V,R); } - /// Add_internal - Creates a new tree that includes the specified + /// add_internal - Creates a new tree that includes the specified /// data and the data from the original tree. If the original tree /// already contained the data item, the original tree is returned. - TreeTy* Add_internal(value_type_ref V, TreeTy* T) { + TreeTy* add_internal(value_type_ref V, TreeTy* T) { if (isEmpty(T)) - return CreateNode(T, V, T); - + return createNode(T, V, T); assert(!T->isMutable()); key_type_ref K = ImutInfo::KeyOfValue(V); - key_type_ref KCurrent = ImutInfo::KeyOfValue(Value(T)); + key_type_ref KCurrent = ImutInfo::KeyOfValue(getValue(T)); if (ImutInfo::isEqual(K,KCurrent)) - return CreateNode(Left(T), V, Right(T)); + return createNode(getLeft(T), V, getRight(T)); else if (ImutInfo::isLess(K,KCurrent)) - return Balance(Add_internal(V,Left(T)), Value(T), Right(T)); + return balanceTree(add_internal(V, getLeft(T)), getValue(T), getRight(T)); else - return Balance(Left(T), Value(T), Add_internal(V,Right(T))); + return balanceTree(getLeft(T), getValue(T), add_internal(V, getRight(T))); } - /// Remove_internal - Creates a new tree that includes all the data + /// remove_internal - Creates a new tree that includes all the data /// from the original tree except the specified data. If the /// specified data did not exist in the original tree, the original /// tree is returned. - TreeTy* Remove_internal(key_type_ref K, TreeTy* T) { + TreeTy* remove_internal(key_type_ref K, TreeTy* T) { if (isEmpty(T)) return T; assert(!T->isMutable()); - key_type_ref KCurrent = ImutInfo::KeyOfValue(Value(T)); + key_type_ref KCurrent = ImutInfo::KeyOfValue(getValue(T)); - if (ImutInfo::isEqual(K,KCurrent)) - return CombineLeftRightTrees(Left(T),Right(T)); - else if (ImutInfo::isLess(K,KCurrent)) - return Balance(Remove_internal(K,Left(T)), Value(T), Right(T)); - else - return Balance(Left(T), Value(T), Remove_internal(K,Right(T))); + if (ImutInfo::isEqual(K,KCurrent)) { + return combineTrees(getLeft(T), getRight(T)); + } else if (ImutInfo::isLess(K,KCurrent)) { + return balanceTree(remove_internal(K, getLeft(T)), + getValue(T), getRight(T)); + } else { + return balanceTree(getLeft(T), getValue(T), + remove_internal(K, getRight(T))); + } } - TreeTy* CombineLeftRightTrees(TreeTy* L, TreeTy* R) { - if (isEmpty(L)) return R; - if (isEmpty(R)) return L; - + TreeTy* combineTrees(TreeTy* L, TreeTy* R) { + if (isEmpty(L)) + return R; + if (isEmpty(R)) + return L; TreeTy* OldNode; - TreeTy* NewRight = RemoveMinBinding(R,OldNode); - return Balance(L,Value(OldNode),NewRight); + TreeTy* newRight = removeMinBinding(R,OldNode); + return balanceTree(L, getValue(OldNode), newRight); } - TreeTy* RemoveMinBinding(TreeTy* T, TreeTy*& NodeRemoved) { + TreeTy* removeMinBinding(TreeTy* T, TreeTy*& Noderemoved) { assert(!isEmpty(T)); - - if (isEmpty(Left(T))) { - NodeRemoved = T; - return Right(T); + if (isEmpty(getLeft(T))) { + Noderemoved = T; + return getRight(T); } - - return Balance(RemoveMinBinding(Left(T),NodeRemoved),Value(T),Right(T)); + return balanceTree(removeMinBinding(getLeft(T), Noderemoved), + getValue(T), getRight(T)); } - /// MarkImmutable - Clears the mutable bits of a root and all of its + /// markImmutable - Clears the mutable bits of a root and all of its /// descendants. - void MarkImmutable(TreeTy* T) { + void markImmutable(TreeTy* T) { if (!T || !T->isMutable()) return; - - T->MarkImmutable(); - MarkImmutable(Left(T)); - MarkImmutable(Right(T)); + T->markImmutable(); + markImmutable(getLeft(T)); + markImmutable(getRight(T)); } public: - TreeTy *GetCanonicalTree(TreeTy *TNew) { + TreeTy *getCanonicalTree(TreeTy *TNew) { if (!TNew) return NULL; // Search the FoldingSet bucket for a Tree with the same digest. FoldingSetNodeID ID; - unsigned digest = TNew->ComputeDigest(); + unsigned digest = TNew->computeDigest(); ID.AddInteger(digest); unsigned hash = ID.ComputeHash(); @@ -581,14 +578,14 @@ for (; I != E; ++I) { TreeTy *T = &*I; - if (T->ComputeDigest() != digest) + if (T->computeDigest() != digest) continue; // We found a collision. Perform a comparison of Contents('T') // with Contents('TNew') typename TreeTy::iterator TI = T->begin(), TE = T->end(); - if (!CompareTreeWithSection(TNew, TI, TE)) + if (!compareTreeWithSection(TNew, TI, TE)) continue; if (TI != TE) @@ -635,19 +632,17 @@ } - bool AtEnd() const { return stack.empty(); } + bool atEnd() const { return stack.empty(); } - bool AtBeginning() const { + bool atBeginning() const { return stack.size() == 1 && getVisitState() == VisitedNone; } - void SkipToParent() { + void skipToParent() { assert(!stack.empty()); stack.pop_back(); - if (stack.empty()) return; - switch (getVisitState()) { case VisitedNone: stack.back() |= VisitedLeft; @@ -663,11 +658,9 @@ inline bool operator==(const _Self& x) const { if (stack.size() != x.stack.size()) return false; - for (unsigned i = 0 ; i < stack.size(); i++) if (stack[i] != x.stack[i]) return false; - return true; } @@ -675,70 +668,52 @@ _Self& operator++() { assert(!stack.empty()); - TreeTy* Current = reinterpret_cast(stack.back() & ~Flags); assert(Current); - switch (getVisitState()) { case VisitedNone: if (TreeTy* L = Current->getLeft()) stack.push_back(reinterpret_cast(L)); else stack.back() |= VisitedLeft; - break; - case VisitedLeft: if (TreeTy* R = Current->getRight()) stack.push_back(reinterpret_cast(R)); else stack.back() |= VisitedRight; - break; - case VisitedRight: - SkipToParent(); + skipToParent(); break; - default: assert(false && "Unreachable."); } - return *this; } _Self& operator--() { assert(!stack.empty()); - TreeTy* Current = reinterpret_cast(stack.back() & ~Flags); assert(Current); - switch (getVisitState()) { case VisitedNone: stack.pop_back(); break; - case VisitedLeft: stack.back() &= ~Flags; // Set state to "VisitedNone." - if (TreeTy* L = Current->getLeft()) stack.push_back(reinterpret_cast(L) | VisitedRight); - break; - case VisitedRight: stack.back() &= ~Flags; stack.back() |= VisitedLeft; - if (TreeTy* R = Current->getRight()) stack.push_back(reinterpret_cast(R) | VisitedRight); - break; - default: assert(false && "Unreachable."); } - return *this; } }; @@ -769,7 +744,7 @@ inline _Self& operator++() { do ++InternalItr; - while (!InternalItr.AtEnd() && + while (!InternalItr.atEnd() && InternalItr.getVisitState() != InternalIteratorTy::VisitedLeft); return *this; @@ -777,16 +752,16 @@ inline _Self& operator--() { do --InternalItr; - while (!InternalItr.AtBeginning() && + while (!InternalItr.atBeginning() && InternalItr.getVisitState() != InternalIteratorTy::VisitedLeft); return *this; } - inline void SkipSubTree() { - InternalItr.SkipToParent(); + inline void skipSubTree() { + InternalItr.skipToParent(); - while (!InternalItr.AtEnd() && + while (!InternalItr.atEnd() && InternalItr.getVisitState() != InternalIteratorTy::VisitedLeft) ++InternalItr; } @@ -940,33 +915,33 @@ Factory(BumpPtrAllocator& Alloc, bool canonicalize = true) : F(Alloc), Canonicalize(canonicalize) {} - /// GetEmptySet - Returns an immutable set that contains no elements. - ImmutableSet GetEmptySet() { - return ImmutableSet(F.GetEmptyTree()); + /// getEmptySet - Returns an immutable set that contains no elements. + ImmutableSet getEmptySet() { + return ImmutableSet(F.getEmptyTree()); } - /// Add - Creates a new immutable set that contains all of the values + /// add - Creates a new immutable set that contains all of the values /// of the original set with the addition of the specified value. If /// the original set already included the value, then the original set is /// returned and no memory is allocated. The time and space complexity /// of this operation is logarithmic in the size of the original set. /// The memory allocated to represent the set is released when the /// factory object that created the set is destroyed. - ImmutableSet Add(ImmutableSet Old, value_type_ref V) { - TreeTy *NewT = F.Add(Old.Root, V); - return ImmutableSet(Canonicalize ? F.GetCanonicalTree(NewT) : NewT); + ImmutableSet add(ImmutableSet Old, value_type_ref V) { + TreeTy *NewT = F.add(Old.Root, V); + return ImmutableSet(Canonicalize ? F.getCanonicalTree(NewT) : NewT); } - /// Remove - Creates a new immutable set that contains all of the values + /// remove - Creates a new immutable set that contains all of the values /// of the original set with the exception of the specified value. If /// the original set did not contain the value, the original set is /// returned and no memory is allocated. The time and space complexity /// of this operation is logarithmic in the size of the original set. /// The memory allocated to represent the set is released when the /// factory object that created the set is destroyed. - ImmutableSet Remove(ImmutableSet Old, value_type_ref V) { - TreeTy *NewT = F.Remove(Old.Root, V); - return ImmutableSet(Canonicalize ? F.GetCanonicalTree(NewT) : NewT); + ImmutableSet remove(ImmutableSet Old, value_type_ref V) { + TreeTy *NewT = F.remove(Old.Root, V); + return ImmutableSet(Canonicalize ? F.getCanonicalTree(NewT) : NewT); } BumpPtrAllocator& getAllocator() { return F.getAllocator(); } @@ -1049,7 +1024,7 @@ // For testing. //===--------------------------------------------------===// - void verify() const { if (Root) Root->verify(); } + void validateTree() const { if (Root) Root->validateTree(); } }; } // end namespace llvm Modified: llvm/trunk/unittests/ADT/ImmutableSetTest.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/ADT/ImmutableSetTest.cpp?rev=120070&r1=120069&r2=120070&view=diff ============================================================================== --- llvm/trunk/unittests/ADT/ImmutableSetTest.cpp (original) +++ llvm/trunk/unittests/ADT/ImmutableSetTest.cpp Tue Nov 23 18:54:28 2010 @@ -37,11 +37,11 @@ TEST_F(ImmutableSetTest, EmptyIntSetTest) { ImmutableSet::Factory f; - EXPECT_TRUE(f.GetEmptySet() == f.GetEmptySet()); - EXPECT_FALSE(f.GetEmptySet() != f.GetEmptySet()); - EXPECT_TRUE(f.GetEmptySet().isEmpty()); + EXPECT_TRUE(f.getEmptySet() == f.getEmptySet()); + EXPECT_FALSE(f.getEmptySet() != f.getEmptySet()); + EXPECT_TRUE(f.getEmptySet().isEmpty()); - ImmutableSet S = f.GetEmptySet(); + ImmutableSet S = f.getEmptySet(); EXPECT_EQ(0u, S.getHeight()); EXPECT_TRUE(S.begin() == S.end()); EXPECT_FALSE(S.begin() != S.end()); @@ -50,9 +50,9 @@ TEST_F(ImmutableSetTest, OneElemIntSetTest) { ImmutableSet::Factory f; - ImmutableSet S = f.GetEmptySet(); + ImmutableSet S = f.getEmptySet(); - ImmutableSet S2 = f.Add(S, 3); + ImmutableSet S2 = f.add(S, 3); EXPECT_TRUE(S.isEmpty()); EXPECT_FALSE(S2.isEmpty()); EXPECT_FALSE(S == S2); @@ -62,7 +62,7 @@ EXPECT_FALSE(S2.begin() == S2.end()); EXPECT_TRUE(S2.begin() != S2.end()); - ImmutableSet S3 = f.Add(S, 2); + ImmutableSet S3 = f.add(S, 2); EXPECT_TRUE(S.isEmpty()); EXPECT_FALSE(S3.isEmpty()); EXPECT_FALSE(S == S3); @@ -78,11 +78,11 @@ TEST_F(ImmutableSetTest, MultiElemIntSetTest) { ImmutableSet::Factory f; - ImmutableSet S = f.GetEmptySet(); + ImmutableSet S = f.getEmptySet(); - ImmutableSet S2 = f.Add(f.Add(f.Add(S, 3), 4), 5); - ImmutableSet S3 = f.Add(f.Add(f.Add(S2, 9), 20), 43); - ImmutableSet S4 = f.Add(S2, 9); + ImmutableSet S2 = f.add(f.add(f.add(S, 3), 4), 5); + ImmutableSet S3 = f.add(f.add(f.add(S2, 9), 20), 43); + ImmutableSet S4 = f.add(S2, 9); EXPECT_TRUE(S.isEmpty()); EXPECT_FALSE(S2.isEmpty()); @@ -116,11 +116,11 @@ TEST_F(ImmutableSetTest, RemoveIntSetTest) { ImmutableSet::Factory f; - ImmutableSet S = f.GetEmptySet(); + ImmutableSet S = f.getEmptySet(); - ImmutableSet S2 = f.Add(f.Add(S, 4), 5); - ImmutableSet S3 = f.Add(S2, 3); - ImmutableSet S4 = f.Remove(S3, 3); + ImmutableSet S2 = f.add(f.add(S, 4), 5); + ImmutableSet S3 = f.add(S2, 3); + ImmutableSet S4 = f.remove(S3, 3); EXPECT_TRUE(S3.contains(3)); EXPECT_FALSE(S2.contains(3)); @@ -139,10 +139,10 @@ TEST_F(ImmutableSetTest, CallbackCharSetTest) { ImmutableSet::Factory f; - ImmutableSet S = f.GetEmptySet(); + ImmutableSet S = f.getEmptySet(); - ImmutableSet S2 = f.Add(f.Add(f.Add(S, 'a'), 'e'), 'i'); - ImmutableSet S3 = f.Add(f.Add(S2, 'o'), 'u'); + ImmutableSet S2 = f.add(f.add(f.add(S, 'a'), 'e'), 'i'); + ImmutableSet S3 = f.add(f.add(S2, 'o'), 'u'); S3.foreach(); @@ -151,10 +151,10 @@ TEST_F(ImmutableSetTest, Callback2CharSetTest) { ImmutableSet::Factory f; - ImmutableSet S = f.GetEmptySet(); + ImmutableSet S = f.getEmptySet(); - ImmutableSet S2 = f.Add(f.Add(f.Add(S, 'b'), 'c'), 'd'); - ImmutableSet S3 = f.Add(f.Add(f.Add(S2, 'f'), 'g'), 'h'); + ImmutableSet S2 = f.add(f.add(f.add(S, 'b'), 'c'), 'd'); + ImmutableSet S3 = f.add(f.add(f.add(S2, 'f'), 'g'), 'h'); MyIter obj; S3.foreach(obj); @@ -174,10 +174,10 @@ TEST_F(ImmutableSetTest, IterLongSetTest) { ImmutableSet::Factory f; - ImmutableSet S = f.GetEmptySet(); + ImmutableSet S = f.getEmptySet(); - ImmutableSet S2 = f.Add(f.Add(f.Add(S, 0), 1), 2); - ImmutableSet S3 = f.Add(f.Add(f.Add(S2, 3), 4), 5); + ImmutableSet S2 = f.add(f.add(f.add(S, 0), 1), 2); + ImmutableSet S3 = f.add(f.add(f.add(S2, 3), 4), 5); int i = 0; for (ImmutableSet::iterator I = S.begin(), E = S.end(); I != E; ++I) { From geek4civic at gmail.com Tue Nov 23 19:29:45 2010 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Wed, 24 Nov 2010 01:29:45 -0000 Subject: [llvm-commits] [llvm] r120072 - /llvm/trunk/include/llvm/System/system_error.h Message-ID: <20101124012946.040322A6C12C@llvm.org> Author: chapuni Date: Tue Nov 23 19:29:45 2010 New Revision: 120072 URL: http://llvm.org/viewvc/llvm-project?rev=120072&view=rev Log: include/llvm/System/system_error.h: ECANCELED is undefined on Cygwin-1.5. Modified: llvm/trunk/include/llvm/System/system_error.h Modified: llvm/trunk/include/llvm/System/system_error.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/System/system_error.h?rev=120072&r1=120071&r2=120072&view=diff ============================================================================== --- llvm/trunk/include/llvm/System/system_error.h (original) +++ llvm/trunk/include/llvm/System/system_error.h Tue Nov 23 19:29:45 2010 @@ -565,7 +565,11 @@ not_connected = ENOTCONN, not_enough_memory = ENOMEM, not_supported = ENOTSUP, +#ifdef ECANCELED operation_canceled = ECANCELED, +#else + operation_canceled = EINVAL, +#endif operation_in_progress = EINPROGRESS, operation_not_permitted = EPERM, operation_not_supported = EOPNOTSUPP, From aggarwa4 at illinois.edu Tue Nov 23 20:12:45 2010 From: aggarwa4 at illinois.edu (Arushi Aggarwal) Date: Wed, 24 Nov 2010 02:12:45 -0000 Subject: [llvm-commits] [poolalloc] r120074 - /poolalloc/trunk/lib/DSA/StdLibPass.cpp Message-ID: <20101124021245.80EFD2A6C12C@llvm.org> Author: aggarwa4 Date: Tue Nov 23 20:12:45 2010 New Revision: 120074 URL: http://llvm.org/viewvc/llvm-project?rev=120074&view=rev Log: fprintf was repeated. Remove one entry strcpy was repeated, changed to strncpy Allow, StdLib to handle cases like call (bitcast F to ...) when F is when of the stdlib functions. Modified: poolalloc/trunk/lib/DSA/StdLibPass.cpp Modified: poolalloc/trunk/lib/DSA/StdLibPass.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/StdLibPass.cpp?rev=120074&r1=120073&r2=120074&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/StdLibPass.cpp (original) +++ poolalloc/trunk/lib/DSA/StdLibPass.cpp Tue Nov 23 20:12:45 2010 @@ -86,7 +86,6 @@ {"fprintf", {NRET_YARGS, NRET_YNARGS, NRET_NARGS, false, false, false}}, {"sprintf", {NRET_YARGS, NRET_YNARGS, NRET_NARGS, false, false, false}}, {"snprintf", {NRET_YARGS, NRET_YNARGS, NRET_NARGS, false, false, false}}, - {"fprintf", {NRET_YARGS, NRET_YNARGS, NRET_NARGS, false, false, false}}, {"puts", {NRET_YARGS, NRET_NARGS, NRET_NARGS, false, false, false}}, {"putc", {NRET_NARGS, NRET_NARGS, NRET_NARGS, false, false, false}}, {"putchar", {NRET_NARGS, NRET_NARGS, NRET_NARGS, false, false, false}}, @@ -135,7 +134,7 @@ {"strcpy", {YRET_YARGS, YRET_YARGS, NRET_NARGS, true, true, true}}, {"wcscpy", {YRET_YARGS, YRET_YARGS, NRET_NARGS, true, true, true}}, - {"strcpy", {YRET_YARGS, YRET_YARGS, NRET_NARGS, true, true, true}}, + {"strncpy", {YRET_YARGS, YRET_YARGS, NRET_NARGS, true, true, true}}, {"wcsncpy", {YRET_YARGS, YRET_YARGS, NRET_NARGS, true, true, true}}, @@ -222,7 +221,7 @@ StdLibDataStructures::eraseCallsTo(Function* F) { for (Value::use_iterator ii = F->use_begin(), ee = F->use_end(); ii != ee; ++ii) - if (CallInst* CI = dyn_cast(ii)) + if (CallInst* CI = dyn_cast(ii)){ if (CI->getOperand(0) == F) { DSGraph* Graph = getDSGraph(*CI->getParent()->getParent()); //delete the call @@ -230,6 +229,22 @@ << CI->getParent()->getParent()->getNameStr() << "\n"); Graph->removeFunctionCalls(*F); } + } else if(ConstantExpr *CE = dyn_cast(ii)) { + if(CE->isCast()) { + for (Value::use_iterator ci = CE->use_begin(), ce = CE->use_end(); + ci != ce; ++ci) { + if (CallInst* CI = dyn_cast(ci)){ + if(CI->getOperand(0) == CE) { + DSGraph* Graph = getDSGraph(*CI->getParent()->getParent()); + //delete the call + DEBUG(errs() << "Removing " << F->getNameStr() << " from " + << CI->getParent()->getParent()->getNameStr() << "\n"); + Graph->removeFunctionCalls(*F); + } + } + } + } + } } // @@ -334,7 +349,7 @@ if (F->isDeclaration()) { for (Value::use_iterator ii = F->use_begin(), ee = F->use_end(); ii != ee; ++ii) - if (CallInst* CI = dyn_cast(ii)) + if (CallInst* CI = dyn_cast(ii)){ if (CI->getOperand(0) == F) { DSGraph* Graph = getDSGraph(*CI->getParent()->getParent()); @@ -396,6 +411,75 @@ Node->foldNodeCompletely(); } } + } else if(ConstantExpr *CE = dyn_cast(ii)) { + if(CE->isCast()) + for (Value::use_iterator ci = CE->use_begin(), ce = CE->use_end(); + ci != ce; ++ci) { + if (CallInst* CI = dyn_cast(ci)){ + if (CI->getOperand(0) == CE) { + DSGraph* Graph = getDSGraph(*CI->getParent()->getParent()); + + // + // Set the read, write, and heap markers on the return value + // as appropriate. + // + if (recFuncs[x].action.read[0]) + Graph->getNodeForValue(CI).getNode()->setReadMarker(); + if (recFuncs[x].action.write[0]) + Graph->getNodeForValue(CI).getNode()->setModifiedMarker(); + if (recFuncs[x].action.heap[0]) + Graph->getNodeForValue(CI).getNode()->setHeapMarker(); + + // + // Set the read, write, and heap markers on the actual arguments + // as appropriate. + // + for (unsigned y = 1; y < CI->getNumOperands(); ++y) + if (recFuncs[x].action.read[y]) + if (isa(CI->getOperand(y)->getType())) + if (DSNode * Node=Graph->getNodeForValue(CI->getOperand(y)).getNode()) + Node->setReadMarker(); + for (unsigned y = 1; y < CI->getNumOperands(); ++y) + if (recFuncs[x].action.write[y]) + if (isa(CI->getOperand(y)->getType())) + if (DSNode * Node=Graph->getNodeForValue(CI->getOperand(y)).getNode()) + Node->setModifiedMarker(); + for (unsigned y = 1; y < CI->getNumOperands(); ++y) + if (recFuncs[x].action.heap[y]) + if (isa(CI->getOperand(y)->getType())) + if (DSNode * Node=Graph->getNodeForValue(CI->getOperand(y)).getNode()) + Node->setHeapMarker(); + + // + // Merge the DSNoes for return values and parameters as + // appropriate. + // + std::vector toMerge; + if (recFuncs[x].action.mergeWithRet) + toMerge.push_back(Graph->getNodeForValue(CI)); + if (recFuncs[x].action.mergeAllArgs || recFuncs[x].action.mergeWithRet) + for (unsigned y = 1; y < CI->getNumOperands(); ++y) + if (isa(CI->getOperand(y)->getType())) + toMerge.push_back(Graph->getNodeForValue(CI->getOperand(y))); + for (unsigned y = 1; y < toMerge.size(); ++y) + toMerge[0].mergeWith(toMerge[y]); + + // + // Collapse (fold) the DSNode of the return value and the actual + // arguments if directed to do so. + // + if (recFuncs[x].action.collapse) { + if (isa(CI->getType())) + Graph->getNodeForValue(CI).getNode()->foldNodeCompletely(); + for (unsigned y = 1; y < CI->getNumOperands(); ++y) + if (isa(CI->getOperand(y)->getType())) + if (DSNode * Node=Graph->getNodeForValue(CI->getOperand(y)).getNode()) + Node->foldNodeCompletely(); + } + } + } + } + } // // Pretend that this call site does not call this function anymore. From aggarwa4 at illinois.edu Tue Nov 23 20:13:59 2010 From: aggarwa4 at illinois.edu (Arushi Aggarwal) Date: Wed, 24 Nov 2010 02:13:59 -0000 Subject: [llvm-commits] [poolalloc] r120075 - /poolalloc/trunk/lib/DSA/DataStructureStats.cpp Message-ID: <20101124021359.165EA2A6C12C@llvm.org> Author: aggarwa4 Date: Tue Nov 23 20:13:58 2010 New Revision: 120075 URL: http://llvm.org/viewvc/llvm-project?rev=120075&view=rev Log: Separately count access to incomplete nodes, to distinguish the reasons for Type-unknownness. Modified: poolalloc/trunk/lib/DSA/DataStructureStats.cpp Modified: poolalloc/trunk/lib/DSA/DataStructureStats.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/DataStructureStats.cpp?rev=120075&r1=120074&r2=120075&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/DataStructureStats.cpp (original) +++ poolalloc/trunk/lib/DSA/DataStructureStats.cpp Tue Nov 23 20:13:58 2010 @@ -44,6 +44,8 @@ "Number of loads/stores which are access a DSNode with 3 type"); STATISTIC (NumTypeCount4Accesses, "Number of loads/stores which are access a DSNode with >3 type"); + STATISTIC (NumIncompleteAccesses, + "Number of loads/stores which are on incomplete nodes"); class DSGraphStats : public FunctionPass, public InstVisitor { void countCallees(const Function &F); @@ -147,8 +149,12 @@ return true; else { DSNode* N = NH.getNode(); - if (N->isNodeCompletelyFolded() || N->isIncompleteNode()) + if (N->isNodeCompletelyFolded()) return true; + if ( N->isIncompleteNode()){ + ++NumIncompleteAccesses; + return true; + } // it is a complete node, now check how many types are present int count = 0; unsigned offset = NH.getOffset(); From rafael.espindola at gmail.com Tue Nov 23 20:19:40 2010 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Wed, 24 Nov 2010 02:19:40 -0000 Subject: [llvm-commits] [llvm] r120076 - in /llvm/trunk: lib/MC/MCELFStreamer.cpp test/MC/ELF/tls.s Message-ID: <20101124021941.026B02A6C12C@llvm.org> Author: rafael Date: Tue Nov 23 20:19:40 2010 New Revision: 120076 URL: http://llvm.org/viewvc/llvm-project?rev=120076&view=rev Log: If a symbol is used as tls, mark it as tls even if not declare as so. Probably fixes PR8659. Modified: llvm/trunk/lib/MC/MCELFStreamer.cpp llvm/trunk/test/MC/ELF/tls.s Modified: llvm/trunk/lib/MC/MCELFStreamer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCELFStreamer.cpp?rev=120076&r1=120075&r2=120076&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCELFStreamer.cpp (original) +++ llvm/trunk/lib/MC/MCELFStreamer.cpp Tue Nov 23 20:19:40 2010 @@ -144,6 +144,8 @@ virtual void EmitInstToFragment(const MCInst &Inst); virtual void EmitInstToData(const MCInst &Inst); + void fixSymbolsInTLSFixups(const MCExpr *expr); + struct LocalCommon { MCSymbolData *SD; uint64_t Size; @@ -450,6 +452,38 @@ SD.setFlags(ELF_STT_File | ELF_STB_Local | ELF_STV_Default); } +void MCELFStreamer::fixSymbolsInTLSFixups(const MCExpr *expr) { + switch (expr->getKind()) { + case MCExpr::Target: llvm_unreachable("Can't handle target exprs yet!"); + case MCExpr::Constant: + break; + + case MCExpr::Binary: { + const MCBinaryExpr *be = cast(expr); + fixSymbolsInTLSFixups(be->getLHS()); + fixSymbolsInTLSFixups(be->getRHS()); + break; + } + + case MCExpr::SymbolRef: { + const MCSymbolRefExpr &symRef = *cast(expr); + MCSymbolRefExpr::VariantKind kind = symRef.getKind(); + if (kind != MCSymbolRefExpr::VK_TLSGD && + kind != MCSymbolRefExpr::VK_TLSLD && + kind != MCSymbolRefExpr::VK_TLSLDM && + kind != MCSymbolRefExpr::VK_ARM_TLSGD) + return; + MCSymbolData &SD = getAssembler().getOrCreateSymbolData(symRef.getSymbol()); + SetType(SD, ELF::STT_TLS); + break; + } + + case MCExpr::Unary: + fixSymbolsInTLSFixups(cast(expr)->getSubExpr()); + break; + } +} + void MCELFStreamer::EmitInstToFragment(const MCInst &Inst) { MCInstFragment *IF = new MCInstFragment(Inst, getCurrentSectionData()); @@ -463,6 +497,9 @@ getAssembler().getEmitter().EncodeInstruction(Inst, VecOS, Fixups); VecOS.flush(); + for (unsigned i = 0, e = Fixups.size(); i != e; ++i) + fixSymbolsInTLSFixups(Fixups[i].getValue()); + IF->getCode() = Code; IF->getFixups() = Fixups; } @@ -476,6 +513,9 @@ getAssembler().getEmitter().EncodeInstruction(Inst, VecOS, Fixups); VecOS.flush(); + for (unsigned i = 0, e = Fixups.size(); i != e; ++i) + fixSymbolsInTLSFixups(Fixups[i].getValue()); + // Add the fixups and data. for (unsigned i = 0, e = Fixups.size(); i != e; ++i) { Fixups[i].setOffset(Fixups[i].getOffset() + DF->getContents().size()); Modified: llvm/trunk/test/MC/ELF/tls.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/tls.s?rev=120076&r1=120075&r2=120076&view=diff ============================================================================== --- llvm/trunk/test/MC/ELF/tls.s (original) +++ llvm/trunk/test/MC/ELF/tls.s Tue Nov 23 20:19:40 2010 @@ -1,15 +1,27 @@ // RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s -// Test that foobar is of type STT_TLS. +// Test that foo and foobar is of type STT_TLS. + + leaq foo at TLSGD(%rip), %rdi .section .zed,"awT", at progbits foobar: .long 43 -// CHECK: (('st_name', 0x00000001) # 'foobar' +// CHECK: (('st_name', 0x00000005) # 'foobar' // CHECK-NEXT: ('st_bind', 0x00000000) // CHECK-NEXT: ('st_type', 0x00000006) // CHECK-NEXT: ('st_other', 0x00000000) // CHECK-NEXT: ('st_shndx', 0x00000004) // CHECK-NEXT: ('st_value', 0x00000000) // CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ), + +// CHECK: (('st_name', 0x00000001) # 'foo' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000006) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ('st_value', 0x00000000) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ), From aggarwa4 at illinois.edu Tue Nov 23 20:38:46 2010 From: aggarwa4 at illinois.edu (Arushi Aggarwal) Date: Wed, 24 Nov 2010 02:38:46 -0000 Subject: [llvm-commits] [poolalloc] r120077 - /poolalloc/trunk/lib/DSA/StdLibPass.cpp Message-ID: <20101124023846.62FF02A6C12C@llvm.org> Author: aggarwa4 Date: Tue Nov 23 20:38:46 2010 New Revision: 120077 URL: http://llvm.org/viewvc/llvm-project?rev=120077&view=rev Log: Check graph after the StdLib pass. Modified: poolalloc/trunk/lib/DSA/StdLibPass.cpp Modified: poolalloc/trunk/lib/DSA/StdLibPass.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/StdLibPass.cpp?rev=120077&r1=120076&r2=120077&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/StdLibPass.cpp (original) +++ poolalloc/trunk/lib/DSA/StdLibPass.cpp Tue Nov 23 20:38:46 2010 @@ -510,8 +510,10 @@ | DSGraph::DontMarkFormalsExternal | DSGraph::ProcessCallSites; G->computeExternalFlags(EFlags); + DEBUG(G->AssertGraphOK()); } GlobalsGraph->computeExternalFlags(DSGraph::ProcessCallSites); + DEBUG(GlobalsGraph->AssertGraphOK()); return false; } From aggarwa4 at illinois.edu Tue Nov 23 20:53:19 2010 From: aggarwa4 at illinois.edu (Arushi Aggarwal) Date: Wed, 24 Nov 2010 02:53:19 -0000 Subject: [llvm-commits] [poolalloc] r120078 - /poolalloc/trunk/lib/DSA/Local.cpp Message-ID: <20101124025319.F0EF62A6C12C@llvm.org> Author: aggarwa4 Date: Tue Nov 23 20:53:19 2010 New Revision: 120078 URL: http://llvm.org/viewvc/llvm-project?rev=120078&view=rev Log: Check graph after local. This checking could be more robust in the future. Modified: poolalloc/trunk/lib/DSA/Local.cpp Modified: poolalloc/trunk/lib/DSA/Local.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/Local.cpp?rev=120078&r1=120077&r2=120078&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/Local.cpp (original) +++ poolalloc/trunk/lib/DSA/Local.cpp Tue Nov 23 20:53:19 2010 @@ -1261,6 +1261,7 @@ propagateUnknownFlag(G); callgraph.insureEntry(I); G->buildCallGraph(callgraph, GlobalFunctionList, true); + DEBUG(G->AssertGraphOK()); } GlobalsGraph->removeTriviallyDeadNodes(); From aggarwa4 at illinois.edu Tue Nov 23 21:51:13 2010 From: aggarwa4 at illinois.edu (Arushi Aggarwal) Date: Wed, 24 Nov 2010 03:51:13 -0000 Subject: [llvm-commits] [poolalloc] r120082 - /poolalloc/trunk/lib/DSA/DataStructure.cpp Message-ID: <20101124035113.C52A92A6C12C@llvm.org> Author: aggarwa4 Date: Tue Nov 23 21:51:13 2010 New Revision: 120082 URL: http://llvm.org/viewvc/llvm-project?rev=120082&view=rev Log: Check that Type entry actually exists. Modified: poolalloc/trunk/lib/DSA/DataStructure.cpp Modified: poolalloc/trunk/lib/DSA/DataStructure.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/DataStructure.cpp?rev=120082&r1=120081&r2=120082&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/DataStructure.cpp (original) +++ poolalloc/trunk/lib/DSA/DataStructure.cpp Tue Nov 23 21:51:13 2010 @@ -328,10 +328,12 @@ const TargetData &TD = getParentGraph()->getTargetData(); // check all offsets for that node. for(unsigned offset = 0; offset < getSize() ; offset++) { - // if that Node has no Type information, skip - if(TyMap.find(offset) == TyMap.end()) + // if that Node has no Type information, skip + if(TyMap.find(offset) == TyMap.end()) continue; - + if(!TyMap[offset]) + continue; + bool pointerTy = false; bool integerTy = false; unsigned intSize = 0; From aggarwa4 at illinois.edu Tue Nov 23 22:55:57 2010 From: aggarwa4 at illinois.edu (Arushi Aggarwal) Date: Wed, 24 Nov 2010 04:55:57 -0000 Subject: [llvm-commits] [poolalloc] r120083 - in /poolalloc/trunk/lib/DSA: DataStructure.cpp Local.cpp Message-ID: <20101124045557.A726F2A6C12C@llvm.org> Author: aggarwa4 Date: Tue Nov 23 22:55:57 2010 New Revision: 120083 URL: http://llvm.org/viewvc/llvm-project?rev=120083&view=rev Log: Minor Formatting. Allow merging of 2 array nodes, if one is of a size that is multiple of the other. Modified: poolalloc/trunk/lib/DSA/DataStructure.cpp poolalloc/trunk/lib/DSA/Local.cpp Modified: poolalloc/trunk/lib/DSA/DataStructure.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/DataStructure.cpp?rev=120083&r1=120082&r2=120083&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/DataStructure.cpp (original) +++ poolalloc/trunk/lib/DSA/DataStructure.cpp Tue Nov 23 22:55:57 2010 @@ -410,8 +410,8 @@ Offset %= getSize(); } const TargetData &TD = getParentGraph()->getTargetData(); - if (Offset +TD.getTypeAllocSize(NewTy) >= getSize()) - growSize(Offset+TD.getTypeAllocSize(NewTy)); + if (Offset + TD.getTypeAllocSize(NewTy) >= getSize()) + growSize(Offset + TD.getTypeAllocSize(NewTy)); TyMap[Offset] = getParentGraph()->getTypeSS().getOrCreate(TyMap[Offset], NewTy); @@ -428,7 +428,7 @@ for (svset::const_iterator ni = TyMap[Offset]->begin(), ne = TyMap[Offset]->end(); ni != ne; ++ni) { if (Offset + TD.getTypeAllocSize(*ni) >= getSize()) - growSize(Offset+TD.getTypeAllocSize(*ni)); + growSize(Offset + TD.getTypeAllocSize(*ni)); } } else if (TyIt) { svset S(*TyMap[Offset]); @@ -541,7 +541,7 @@ if(NH.getNode()->getSize() != 0 && CurNodeH.getNode()->getSize() != 0) { if((NH.getNode()->getSize() != CurNodeH.getNode()->getSize() && (NH.getOffset() != 0 || CurNodeH.getOffset() != 0) - && NH.getNode()->getSize() < CurNodeH.getNode()->getSize())) { + && NH.getNode()->getSize() <= CurNodeH.getNode()->getSize())) { CurNodeH.getNode()->foldNodeCompletely(); NH.getNode()->foldNodeCompletely(); NSize = NH.getNode()->getSize(); @@ -565,11 +565,13 @@ if (CurNodeH.getNode()->isArrayNode() && NH.getNode()->isArrayNode()) { if(NH.getNode()->getSize() != 0 && CurNodeH.getNode()->getSize() != 0 && (NH.getNode()->getSize() != CurNodeH.getNode()->getSize())){ - CurNodeH.getNode()->foldNodeCompletely(); - NH.getNode()->foldNodeCompletely(); - NSize = NH.getNode()->getSize(); - // N = NH.getNode(); - NOffset = NH.getOffset(); + if(((NH.getNode()->getSize() % CurNodeH.getNode()->getSize()) != 0 ) + && ((CurNodeH.getNode()->getSize() % NH.getNode()->getSize()) != 0)){ + CurNodeH.getNode()->foldNodeCompletely(); + NH.getNode()->foldNodeCompletely(); + NSize = NH.getNode()->getSize(); + NOffset = NH.getOffset(); + } } } @@ -852,8 +854,11 @@ if (SN->isArrayNode() && DN->isArrayNode()) { if((SN->getSize() != DN->getSize()) && (SN->getSize() != 0) && DN->getSize() != 0) { - DN->foldNodeCompletely(); - DN = NH.getNode(); + if(((SN->getSize() % DN->getSize()) != 0) && + ((DN->getSize() % SN->getSize()) != 0)){ + DN->foldNodeCompletely(); + DN = NH.getNode(); + } } } if (!DN->isNodeCompletelyFolded() && DN->getSize() < SN->getSize()) Modified: poolalloc/trunk/lib/DSA/Local.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/Local.cpp?rev=120083&r1=120082&r2=120083&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/Local.cpp (original) +++ poolalloc/trunk/lib/DSA/Local.cpp Tue Nov 23 22:55:57 2010 @@ -1160,7 +1160,6 @@ // // Do the actual merging in of the constant initializer. // -// MergeConstantInitIntoNode(NH, ElementType, GV->getInitializer()); MergeConstantInitIntoNode(NH, GV->getType()->getElementType(), GV->getInitializer()); } From aggarwa4 at illinois.edu Tue Nov 23 23:13:48 2010 From: aggarwa4 at illinois.edu (Arushi Aggarwal) Date: Wed, 24 Nov 2010 05:13:48 -0000 Subject: [llvm-commits] [poolalloc] r120085 - /poolalloc/trunk/lib/DSA/Local.cpp Message-ID: <20101124051348.BA30D2A6C12C@llvm.org> Author: aggarwa4 Date: Tue Nov 23 23:13:48 2010 New Revision: 120085 URL: http://llvm.org/viewvc/llvm-project?rev=120085&view=rev Log: Allow for correct growing of size for Struct Type nodes. Modified: poolalloc/trunk/lib/DSA/Local.cpp Modified: poolalloc/trunk/lib/DSA/Local.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/Local.cpp?rev=120085&r1=120084&r2=120085&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/Local.cpp (original) +++ poolalloc/trunk/lib/DSA/Local.cpp Tue Nov 23 23:13:48 2010 @@ -565,12 +565,18 @@ const ConstantInt* CUI = cast(I.getOperand()); int FieldNo = CUI->getSExtValue(); // increment the offset by the actual byte offset being accessed - Offset += (unsigned)TD.getStructLayout(STy)->getElementOffset(FieldNo); + unsigned requiredSize = TD.getTypeAllocSize(STy) + Value.getOffset() + Offset; if(!Value.getNode()->isArrayNode() || Value.getNode()->getSize() <= 0){ - if (TD.getTypeAllocSize(STy) + Value.getOffset() > Value.getNode()->getSize()) - Value.getNode()->growSize(TD.getTypeAllocSize(STy) + Value.getOffset()); + if (requiredSize > Value.getNode()->getSize()) + Value.getNode()->growSize(requiredSize); + } else { + if (((Offset + Value.getOffset()) % Value.getNode()->getSize()) == 0 + && (TD.getTypeAllocSize(STy) % Value.getNode()->getSize() == 0)) + Value.getNode()->growSize(requiredSize); } + + Offset += (unsigned)TD.getStructLayout(STy)->getElementOffset(FieldNo); } else if(const ArrayType *ATy = dyn_cast(*I)) { // indexing into an array. From zwarich at apple.com Tue Nov 23 23:27:49 2010 From: zwarich at apple.com (Cameron Zwarich) Date: Wed, 24 Nov 2010 00:27:49 -0500 Subject: [llvm-commits] Review request: dominance frontier computation speedup Message-ID: <6AB43A0F-285B-4592-BBCB-9EA7061BD105@apple.com> There aren't very many good use cases for std::set. Most dominance frontiers are small, so a SmallPtrSet seemed like a good choice. I experimented with different small values of the inline capacity and found that 2 was best for performance. This is an 18% speedup running domfrontier on test-suite + SPEC2000. -------------- next part -------------- A non-text attachment was scrubbed... Name: domfrontier-set.patch Type: application/octet-stream Size: 1820 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101124/c479e75f/attachment-0001.obj -------------- next part -------------- Cameron From stoklund at 2pi.dk Wed Nov 24 01:16:35 2010 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Tue, 23 Nov 2010 23:16:35 -0800 Subject: [llvm-commits] Review request: dominance frontier computation speedup In-Reply-To: <6AB43A0F-285B-4592-BBCB-9EA7061BD105@apple.com> References: <6AB43A0F-285B-4592-BBCB-9EA7061BD105@apple.com> Message-ID: <5B462C62-0B5C-4F13-8DDA-DC10D2BA0B4F@2pi.dk> On Nov 23, 2010, at 9:27 PM, Cameron Zwarich wrote: > There aren't very many good use cases for std::set. Most dominance frontiers are small, so a SmallPtrSet seemed like a good choice. I experimented with different small values of the inline capacity and found that 2 was best for performance. Does the majority of sets really have only 2 or less members? Otherwise, a DenseSet might be better. > This is an 18% speedup running domfrontier on test-suite + SPEC2000. > > Looks good to me. Are you going to replace std::map with DenseMap as well? -------------- next part -------------- A non-text attachment was scrubbed... Name: smime.p7s Type: application/pkcs7-signature Size: 1929 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101123/fd4f4172/attachment.bin From zwarich at apple.com Wed Nov 24 01:34:13 2010 From: zwarich at apple.com (Cameron Zwarich) Date: Tue, 23 Nov 2010 23:34:13 -0800 Subject: [llvm-commits] Review request: dominance frontier computation speedup In-Reply-To: <5B462C62-0B5C-4F13-8DDA-DC10D2BA0B4F@2pi.dk> References: <6AB43A0F-285B-4592-BBCB-9EA7061BD105@apple.com> <5B462C62-0B5C-4F13-8DDA-DC10D2BA0B4F@2pi.dk> Message-ID: <13C5FDF0-97C1-48A0-B38A-E8F9A47ED0EF@apple.com> On 2010-11-23, at 11:16 PM, Jakob Stoklund Olesen wrote: > On Nov 23, 2010, at 9:27 PM, Cameron Zwarich wrote: > >> There aren't very many good use cases for std::set. Most dominance frontiers are small, so a SmallPtrSet seemed like a good choice. I experimented with different small values of the inline capacity and found that 2 was best for performance. > > Does the majority of sets really have only 2 or less members? Otherwise, a DenseSet might be better. I didn't take any stats, but on the same benchmark using DenseSet is more than 2x slower. >> This is an 18% speedup running domfrontier on test-suite + SPEC2000. >> >> > > Looks good to me. Are you going to replace std::map with DenseMap as well? I was considering it, but I wasn't sure about the memory footprint of a DenseMap with SmallPtrSet elements. I guess they could all be allocated with a PtrBumpAllocator if it is a performance issue, but it is still wasted memory. Cameron From zwarich at apple.com Wed Nov 24 01:40:34 2010 From: zwarich at apple.com (Cameron Zwarich) Date: Tue, 23 Nov 2010 23:40:34 -0800 Subject: [llvm-commits] Review request: dominance frontier computation speedup In-Reply-To: <13C5FDF0-97C1-48A0-B38A-E8F9A47ED0EF@apple.com> References: <6AB43A0F-285B-4592-BBCB-9EA7061BD105@apple.com> <5B462C62-0B5C-4F13-8DDA-DC10D2BA0B4F@2pi.dk> <13C5FDF0-97C1-48A0-B38A-E8F9A47ED0EF@apple.com> Message-ID: On 2010-11-23, at 11:34 PM, Cameron Zwarich wrote: >> Looks good to me. Are you going to replace std::map with DenseMap as well? > > I was considering it, but I wasn't sure about the memory footprint of a DenseMap with SmallPtrSet elements. I guess they could all be allocated with a PtrBumpAllocator if it is a performance issue, but it is still wasted memory. Oops. That last sentence doesn't make sense. If a PtrBumpAllocator is used, then the unused slots won't waste memory. Cameron From geek4civic at gmail.com Wed Nov 24 03:39:19 2010 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Wed, 24 Nov 2010 18:39:19 +0900 Subject: [llvm-commits] [Review request] CMake/MSVS: Support for the target "check" In-Reply-To: <87eiact4hx.fsf@telefonica.net> References: <87lj4svn3c.fsf@telefonica.net> <87eiact4hx.fsf@telefonica.net> Message-ID: Hello, Oscar. I apologize to you, I supposed you sent the last mail directly to me by mistake. (The message does not have "To/Cc: llvm-commits", but I found later "Newsgroup: gmane.comp.compilers.llvm.cvs") Here is 2nd patch. Please take a look. - Define "RUNTIME_BUILD_MODE" in /CMakeLists.txt. (To integrate to clang/test/CMakeLists.txt) - Respect MSVC_IDE. 2010/11/24 ?scar Fuentes : >> I tried on nmake, but weird nmake doesn't launch tests. >> I won't investigate anything on nmake, it must not be my task! :p >> I would like to give someone tasks for nmake. :) > > I use nmake (and JOM, an nmake clone) but don't do testing. The support > for testing on the cmake build was implemented by somebody else. I know > almost nothing about it. > >> # imfo: who uses nmake for clang/llvm! > > I do. It is really useful. And JOM supports parallel builds on a similar > way that gmake does. When you are working with cmake, for most ordinary > applications you can assume that nmake is just another `make'. Actually, > you need to worry about this two cases when writing cmake scripts that > have to know the exact place where build products are placed: make-based > build systems (build type is known when cmake is invoked) and ide-based > build-systems (build type is selected by the user when the he starts the > build and the output directory depend on that selection). I supposed "JOM" might be a wrapper or something and I did not know. I will try JOM in near future, thank you. In fact, I was tired to build cmake/llvm with MS nmake. :( I will report nmake issue later. Or, Oscar, would you like to join tweaking tests on cmake? ;) >> I assume; >> >> ? - ${CMAKE_BUILD_TYPE} should be empty on msvs/vcbuild/msbuild. >> ? - ${CMAKE_CFG_INTDIR} might be "." on others. >> >> I will rewrite my patch as below similar; >> >> if CMAKE_BUILD_TYPE is not empty >> ? BUILD_MODE obeys it. >> elsif CMAKE_CFG_INTDIR is not "." >> ? BUILD_MODE obeys it. (it might be "$(...)") >> else >> ? warn "Unittests cannot be executed" >> endif > > Don't assume that CMAKE_BUILD_TYPE will be empty or not depending on the > tool used for the build (IDE/make). Testing CMAKE_CFG_INTDIR is > safer. So do this: > > if( CMAKE_CFG_INTDIR STREQUAL "." ) > ?... Use CMAKE_CFG_INTDIR > else() > ?... CMAKE_CFG_INTDIR is not required > endif() > > Please note that CMAKE_BUILD_TYPE is not needed for knowing the > directory where build products are placed when using make-based build > systems. Always using CMAKE_CFG_INTDIR should be safe, as > tests/CMakeLists.txt already does: > > set(LLVM_TOOLS_DIR "${LLVM_TOOLS_BINARY_DIR}/${CMAKE_CFG_INTDIR}") > > That expands to the correct directory when you are using an IDE or a > `make'. Note that BUILD_MODE is required by Unittests. This is the reason why I have been tweaking BUILD_MODE. I don't forget PR8438. ...Takumi -------------- next part -------------- A non-text attachment was scrubbed... Name: 0001-CMake-lit-can-run-with-multiple-configuration-on-Vis.patch Type: application/octet-stream Size: 4513 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101124/b1d72267/attachment.obj From kalle.raiskila at nokia.com Wed Nov 24 05:42:17 2010 From: kalle.raiskila at nokia.com (Kalle Raiskila) Date: Wed, 24 Nov 2010 11:42:17 -0000 Subject: [llvm-commits] [llvm] r120090 - in /llvm/trunk: lib/Target/CellSPU/SPUInstrInfo.td test/CodeGen/CellSPU/fcmp32.ll Message-ID: <20101124114217.65F772A6C12C@llvm.org> Author: kraiskil Date: Wed Nov 24 05:42:17 2010 New Revision: 120090 URL: http://llvm.org/viewvc/llvm-project?rev=120090&view=rev Log: Allow for 'fcmp ogt' in SPU. Fix by Visa Putkinen! Modified: llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td llvm/trunk/test/CodeGen/CellSPU/fcmp32.ll Modified: llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td?rev=120090&r1=120089&r2=120090&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td (original) +++ llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td Wed Nov 24 05:42:17 2010 @@ -3903,7 +3903,7 @@ "fcgt\t$rT, $rA, $rB", SPrecFP, [(set R32C:$rT, (setugt R32FP:$rA, R32FP:$rB))]>; -def : Pat<(setugt R32FP:$rA, R32FP:$rB), +def : Pat<(setogt R32FP:$rA, R32FP:$rB), (FCGTf32 R32FP:$rA, R32FP:$rB)>; def FCMGTf32 : @@ -3911,7 +3911,7 @@ "fcmgt\t$rT, $rA, $rB", SPrecFP, [(set R32C:$rT, (setugt (fabs R32FP:$rA), (fabs R32FP:$rB)))]>; -def : Pat<(setugt (fabs R32FP:$rA), (fabs R32FP:$rB)), +def : Pat<(setogt (fabs R32FP:$rA), (fabs R32FP:$rB)), (FCMGTf32 R32FP:$rA, R32FP:$rB)>; //-------------------------------------------------------------------------- Modified: llvm/trunk/test/CodeGen/CellSPU/fcmp32.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/fcmp32.ll?rev=120090&r1=120089&r2=120090&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/fcmp32.ll (original) +++ llvm/trunk/test/CodeGen/CellSPU/fcmp32.ll Wed Nov 24 05:42:17 2010 @@ -1,9 +1,4 @@ -; RUN: llc < %s -march=cellspu > %t1.s -; RUN: grep fceq %t1.s | count 1 -; RUN: grep fcmeq %t1.s | count 1 - -target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128" -target triple = "spu" +; RUN: llc --march=cellspu %s -o - | FileCheck %s ; Exercise the floating point comparison operators for f32: @@ -11,13 +6,31 @@ declare float @fabsf(float) define i1 @fcmp_eq(float %arg1, float %arg2) { +; CHECK: fceq +; CHECK: bi $lr %A = fcmp oeq float %arg1, %arg2 ret i1 %A } define i1 @fcmp_mag_eq(float %arg1, float %arg2) { +; CHECK: fcmeq +; CHECK: bi $lr %1 = call float @fabsf(float %arg1) %2 = call float @fabsf(float %arg2) %3 = fcmp oeq float %1, %2 ret i1 %3 } + +define i1 @test_ogt(float %a, float %b) { +; CHECK: fcgt +; CHECK: bi $lr + %cmp = fcmp ogt float %a, %b + ret i1 %cmp +} + +define i1 @test_ugt(float %a, float %b) { +; CHECK: fcgt +; CHECK: bi $lr + %cmp = fcmp ugt float %a, %b + ret i1 %cmp +} From kalle.raiskila at nokia.com Wed Nov 24 06:59:16 2010 From: kalle.raiskila at nokia.com (Kalle Raiskila) Date: Wed, 24 Nov 2010 12:59:16 -0000 Subject: [llvm-commits] [llvm] r120092 - /llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Message-ID: <20101124125916.604F62A6C12C@llvm.org> Author: kraiskil Date: Wed Nov 24 06:59:16 2010 New Revision: 120092 URL: http://llvm.org/viewvc/llvm-project?rev=120092&view=rev Log: Use i8 as SETCC result type for i1 in SPU. Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp?rev=120092&r1=120091&r2=120092&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Wed Nov 24 06:59:16 2010 @@ -501,10 +501,20 @@ //===----------------------------------------------------------------------===// MVT::SimpleValueType SPUTargetLowering::getSetCCResultType(EVT VT) const { - // i16 and i32 are valid SETCC result types - return ((VT == MVT::i8 || VT == MVT::i16 || VT == MVT::i32) ? - VT.getSimpleVT().SimpleTy : - MVT::i32); + // i8, i16 and i32 are valid SETCC result types + MVT::SimpleValueType retval; + + switch(VT.getSimpleVT().SimpleTy){ + case MVT::i1: + case MVT::i8: + retval = MVT::i8; break; + case MVT::i16: + retval = MVT::i16; break; + case MVT::i32: + default: + retval = MVT::i32; + } + return retval; } //===----------------------------------------------------------------------===// From peckw at wesleypeck.com Wed Nov 24 09:39:32 2010 From: peckw at wesleypeck.com (Wesley Peck) Date: Wed, 24 Nov 2010 15:39:32 -0000 Subject: [llvm-commits] [llvm] r120095 - in /llvm/trunk/lib/Target/MBlaze: MBlazeAsmPrinter.cpp MBlazeMCAsmInfo.cpp MBlazeMCInstLower.cpp MBlazeRegisterInfo.cpp MBlazeTargetMachine.cpp Message-ID: <20101124153932.9FE2C2A6C12C@llvm.org> Author: peckw Date: Wed Nov 24 09:39:32 2010 New Revision: 120095 URL: http://llvm.org/viewvc/llvm-project?rev=120095&view=rev Log: 1. Fixing error where basic block labels were not being printed out when they need to be for the MBlaze backend because AsmPrinter::isBlockOnlyReachableByFallthrough does not take into account delay slots. 2. Re-adding .mask and .frame directives in printed assembly. 3. Adding .ent and .end directives in printed assembly. 4. Minor cleanups to MBlaze backend. Modified: llvm/trunk/lib/Target/MBlaze/MBlazeAsmPrinter.cpp llvm/trunk/lib/Target/MBlaze/MBlazeMCAsmInfo.cpp llvm/trunk/lib/Target/MBlaze/MBlazeMCInstLower.cpp llvm/trunk/lib/Target/MBlaze/MBlazeRegisterInfo.cpp llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.cpp Modified: llvm/trunk/lib/Target/MBlaze/MBlazeAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeAsmPrinter.cpp?rev=120095&r1=120094&r2=120095&view=diff ============================================================================== --- llvm/trunk/lib/Target/MBlaze/MBlazeAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/MBlaze/MBlazeAsmPrinter.cpp Wed Nov 24 09:39:32 2010 @@ -60,6 +60,15 @@ return "MBlaze Assembly Printer"; } + void printSavedRegsBitmask(raw_ostream &O); + void emitFrameDirective(); + virtual void EmitFunctionBodyStart(); + virtual void EmitFunctionBodyEnd(); + virtual void EmitFunctionEntryLabel(); + + virtual bool isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB) + const; + bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, unsigned AsmVariant, const char *ExtraCode, raw_ostream &O); @@ -106,6 +115,79 @@ // //===----------------------------------------------------------------------===// +// Print a 32 bit hex number with all numbers. +static void printHex32(unsigned int Value, raw_ostream &O) { + O << "0x"; + for (int i = 7; i >= 0; i--) + O << utohexstr((Value & (0xF << (i*4))) >> (i*4)); +} + +// Create a bitmask with all callee saved registers for CPU or Floating Point +// registers. For CPU registers consider RA, GP and FP for saving if necessary. +void MBlazeAsmPrinter::printSavedRegsBitmask(raw_ostream &O) { + const TargetFrameInfo *TFI = TM.getFrameInfo(); + const TargetRegisterInfo &RI = *TM.getRegisterInfo(); + const MBlazeFunctionInfo *MBlazeFI = MF->getInfo(); + + // CPU Saved Registers Bitmasks + unsigned int CPUBitmask = 0; + + // Set the CPU Bitmasks + const MachineFrameInfo *MFI = MF->getFrameInfo(); + const std::vector &CSI = MFI->getCalleeSavedInfo(); + for (unsigned i = 0, e = CSI.size(); i != e; ++i) { + unsigned Reg = CSI[i].getReg(); + unsigned RegNum = MBlazeRegisterInfo::getRegisterNumbering(Reg); + if (MBlaze::GPRRegisterClass->contains(Reg)) + CPUBitmask |= (1 << RegNum); + } + + // Return Address and Frame registers must also be set in CPUBitmask. + if (TFI->hasFP(*MF)) + CPUBitmask |= (1 << MBlazeRegisterInfo:: + getRegisterNumbering(RI.getFrameRegister(*MF))); + + if (MFI->adjustsStack()) + CPUBitmask |= (1 << MBlazeRegisterInfo:: + getRegisterNumbering(RI.getRARegister())); + + // Print CPUBitmask + O << "\t.mask \t"; printHex32(CPUBitmask, O); O << ',' + << MBlazeFI->getCPUTopSavedRegOff() << '\n'; +} + +/// Frame Directive +void MBlazeAsmPrinter::emitFrameDirective() { + const TargetRegisterInfo &RI = *TM.getRegisterInfo(); + + unsigned stkReg = RI.getFrameRegister(*MF); + unsigned retReg = RI.getRARegister(); + unsigned stkSze = MF->getFrameInfo()->getStackSize(); + + OutStreamer.EmitRawText("\t.frame\t" + + Twine(MBlazeInstPrinter::getRegisterName(stkReg)) + + "," + Twine(stkSze) + "," + + Twine(MBlazeInstPrinter::getRegisterName(retReg))); +} + +void MBlazeAsmPrinter::EmitFunctionEntryLabel() { + OutStreamer.EmitRawText("\t.ent\t" + Twine(CurrentFnSym->getName())); + AsmPrinter::EmitFunctionEntryLabel(); +} + +void MBlazeAsmPrinter::EmitFunctionBodyStart() { + emitFrameDirective(); + + SmallString<128> Str; + raw_svector_ostream OS(Str); + printSavedRegsBitmask(OS); + OutStreamer.EmitRawText(OS.str()); +} + +void MBlazeAsmPrinter::EmitFunctionBodyEnd() { + OutStreamer.EmitRawText("\t.end\t" + Twine(CurrentFnSym->getName())); +} + //===----------------------------------------------------------------------===// void MBlazeAsmPrinter::EmitInstruction(const MachineInstr *MI) { MBlazeMCInstLower MCInstLowering(OutContext, *Mang, *this); @@ -115,14 +197,6 @@ OutStreamer.EmitInstruction(TmpInst); } -// Print a 32 bit hex number with all numbers. -static void printHex32(unsigned int Value, raw_ostream &O) { - O << "0x"; - for (int i = 7; i >= 0; i--) - O << utohexstr((Value & (0xF << (i*4))) >> (i*4)); -} - - // Print out an operand for an inline asm expression. bool MBlazeAsmPrinter:: PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, @@ -210,6 +284,39 @@ printOperand(MI, opNum+1, O); } +/// isBlockOnlyReachableByFallthough - Return true if the basic block has +/// exactly one predecessor and the control transfer mechanism between +/// the predecessor and this block is a fall-through. +bool MBlazeAsmPrinter:: +isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB) const { + // If this is a landing pad, it isn't a fall through. If it has no preds, + // then nothing falls through to it. + if (MBB->isLandingPad() || MBB->pred_empty()) + return false; + + // If there isn't exactly one predecessor, it can't be a fall through. + MachineBasicBlock::const_pred_iterator PI = MBB->pred_begin(), PI2 = PI; + ++PI2; + if (PI2 != MBB->pred_end()) + return false; + + // The predecessor has to be immediately before this block. + const MachineBasicBlock *Pred = *PI; + + if (!Pred->isLayoutSuccessor(MBB)) + return false; + + // If the block is completely empty, then it definitely does fall through. + if (Pred->empty()) + return true; + + // Check if the last terminator is an unconditional branch. + MachineBasicBlock::const_iterator I = Pred->end(); + while (I != Pred->begin() && !(--I)->getDesc().isTerminator()) + ; // Noop + return I == Pred->end() || !I->getDesc().isBarrier(); +} + static MCInstPrinter *createMBlazeMCInstPrinter(const Target &T, unsigned SyntaxVariant, const MCAsmInfo &MAI) { Modified: llvm/trunk/lib/Target/MBlaze/MBlazeMCAsmInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeMCAsmInfo.cpp?rev=120095&r1=120094&r2=120095&view=diff ============================================================================== --- llvm/trunk/lib/Target/MBlaze/MBlazeMCAsmInfo.cpp (original) +++ llvm/trunk/lib/Target/MBlaze/MBlazeMCAsmInfo.cpp Wed Nov 24 09:39:32 2010 @@ -15,13 +15,8 @@ using namespace llvm; MBlazeMCAsmInfo::MBlazeMCAsmInfo() { + SupportsDebugInformation = true; AlignmentIsInBytes = false; - Data16bitsDirective = "\t.half\t"; - Data32bitsDirective = "\t.word\t"; - Data64bitsDirective = 0; PrivateGlobalPrefix = "$"; - CommentString = "#"; - ZeroDirective = "\t.space\t"; GPRel32Directive = "\t.gpword\t"; - HasSetDirective = false; } Modified: llvm/trunk/lib/Target/MBlaze/MBlazeMCInstLower.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeMCInstLower.cpp?rev=120095&r1=120094&r2=120095&view=diff ============================================================================== --- llvm/trunk/lib/Target/MBlaze/MBlazeMCInstLower.cpp (original) +++ llvm/trunk/lib/Target/MBlaze/MBlazeMCInstLower.cpp Wed Nov 24 09:39:32 2010 @@ -32,10 +32,8 @@ MCSymbol *MBlazeMCInstLower:: GetGlobalAddressSymbol(const MachineOperand &MO) const { switch (MO.getTargetFlags()) { - default: - llvm_unreachable("Unknown target flag on GV operand"); - - case 0: break; + default: llvm_unreachable("Unknown target flag on GV operand"); + case 0: break; } return Printer.Mang->getSymbol(MO.getGlobal()); @@ -44,10 +42,8 @@ MCSymbol *MBlazeMCInstLower:: GetExternalSymbolSymbol(const MachineOperand &MO) const { switch (MO.getTargetFlags()) { - default: - assert(0 && "Unknown target flag on GV operand"); - - case 0: break; + default: llvm_unreachable("Unknown target flag on GV operand"); + case 0: break; } return Printer.GetExternalSymbolSymbol(MO.getSymbolName()); @@ -59,12 +55,9 @@ raw_svector_ostream(Name) << Printer.MAI->getPrivateGlobalPrefix() << "JTI" << Printer.getFunctionNumber() << '_' << MO.getIndex(); - switch (MO.getTargetFlags()) { - default: - llvm_unreachable("Unknown target flag on GV operand"); - - case 0: break; + default: llvm_unreachable("Unknown target flag on GV operand"); + case 0: break; } // Create a symbol for the name. @@ -129,8 +122,7 @@ MCOperand MCOp; switch (MO.getType()) { - default: - assert(0 && "unknown operand type"); + default: llvm_unreachable("unknown operand type"); case MachineOperand::MO_Register: // Ignore all implicit register operands. if (MO.isImplicit()) continue; Modified: llvm/trunk/lib/Target/MBlaze/MBlazeRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeRegisterInfo.cpp?rev=120095&r1=120094&r2=120095&view=diff ============================================================================== --- llvm/trunk/lib/Target/MBlaze/MBlazeRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/MBlaze/MBlazeRegisterInfo.cpp Wed Nov 24 09:39:32 2010 @@ -242,9 +242,8 @@ return 0; } -int MBlazeRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const { - llvm_unreachable("What is the dwarf register number"); - return -1; +int MBlazeRegisterInfo::getDwarfRegNum(unsigned RegNo, bool isEH) const { + return MBlazeGenRegisterInfo::getDwarfRegNumFull(RegNo,0); } #include "MBlazeGenRegisterInfo.inc" Modified: llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.cpp?rev=120095&r1=120094&r2=120095&view=diff ============================================================================== --- llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.cpp (original) +++ llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.cpp Wed Nov 24 09:39:32 2010 @@ -43,7 +43,7 @@ case Triple::MinGW64: case Triple::Cygwin: case Triple::Win32: - llvm_unreachable("ARM does not support Windows COFF format"); + llvm_unreachable("MBlaze does not support Windows COFF format"); return NULL; default: return createELFStreamer(Ctx, TAB, _OS, _Emitter, RelaxAll); From baldrick at free.fr Wed Nov 24 10:17:52 2010 From: baldrick at free.fr (Duncan Sands) Date: Wed, 24 Nov 2010 16:17:52 -0000 Subject: [llvm-commits] [dragonegg] r120096 - /dragonegg/trunk/llvm-convert.cpp Message-ID: <20101124161752.DCBF62A6C12C@llvm.org> Author: baldrick Date: Wed Nov 24 10:17:52 2010 New Revision: 120096 URL: http://llvm.org/viewvc/llvm-project?rev=120096&view=rev Log: Copy llvm-gcc's handling of cleanups (aka "Bill's 'orrible hack"). It may be 'orrible, but it does seem to fix programs that throw an uncaught exception when there are cleanups: now it aborts, while before execution would continue after the end of the first cleanup, executing whatever random bytes happened to be there. Modified: dragonegg/trunk/llvm-convert.cpp Modified: dragonegg/trunk/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/llvm-convert.cpp?rev=120096&r1=120095&r2=120096&view=diff ============================================================================== --- dragonegg/trunk/llvm-convert.cpp (original) +++ dragonegg/trunk/llvm-convert.cpp Wed Nov 24 10:17:52 2010 @@ -2050,25 +2050,33 @@ Args.push_back(Builder.CreateBitCast(DECL_LLVM(personality), Type::getInt8PtrTy(Context))); - // The representation of a catch-all is language specific. - // TODO: Remove this hack. - Constant *CatchAll; - StringRef LanguageName = lang_hooks.name; - if (LanguageName == "GNU Ada") { - StringRef Name = "__gnat_all_others_value"; - CatchAll = TheModule->getGlobalVariable(Name); - if (!CatchAll) - CatchAll = new GlobalVariable(*TheModule, - ConvertType(integer_type_node), - /*isConstant*/true, - GlobalValue::ExternalLinkage, - /*Initializer*/NULL, Name); - } else { - // Other languages use a null pointer. - CatchAll = Constant::getNullValue(Type::getInt8PtrTy(Context)); + Constant *CatchAll = TheModule->getGlobalVariable("llvm.eh.catch.all.value"); + if (!CatchAll) { + // The representation of a catch-all is language specific. + // TODO: Remove this hack. + Constant *Init = 0; + StringRef LanguageName = lang_hooks.name; + if (LanguageName == "GNU Ada") { + StringRef Name = "__gnat_all_others_value"; + Init = TheModule->getGlobalVariable(Name); + if (!Init) + Init = new GlobalVariable(*TheModule, ConvertType(integer_type_node), + /*isConstant*/true, + GlobalValue::ExternalLinkage, + /*Initializer*/NULL, Name); + } else { + // Other languages use a null pointer. + Init = Constant::getNullValue(Type::getInt8PtrTy(Context)); + } + CatchAll = new GlobalVariable(*TheModule, Init->getType(), true, + GlobalVariable::LinkOnceAnyLinkage, + Init, "llvm.eh.catch.all.value"); + cast(CatchAll)->setSection("llvm.metadata"); + AttributeUsedGlobals.insert(CatchAll); } bool AllCaught = false; // Did we saw a catch-all or no-throw? + bool HasCleanup = false; // Did we see a cleanup? SmallSet AlreadyCaught; // Typeinfos known caught already. for (; region && !AllCaught; region = region->outer) switch (region->type) { @@ -2100,6 +2108,7 @@ break; } case ERT_CLEANUP: + HasCleanup = true; break; case ERT_MUST_NOT_THROW: // Same as a zero-length filter. @@ -2130,13 +2139,18 @@ break; } - if (!AllCaught) - // Some exceptions from this region may not be caught by any handler. - // Since invokes are required to branch to the unwind label no matter - // what exception is being unwound, append a catch-all. I have a plan - // that will make all such horrible hacks unnecessary, but unfortunately - // this comment is too short to explain it. - Args.push_back(CatchAll); + if (HasCleanup) { + if (Args.size() == 2) + // Insert a sentinel indicating that this is a cleanup-only selector. + Args.push_back(ConstantInt::get(Type::getInt32Ty(Context), 0)); + else if (!AllCaught) + // Some exceptions from this region may not be caught by any handler. + // Since invokes are required to branch to the unwind label no matter + // what exception is being unwound, append a catch-all. I have a plan + // that will make all such horrible hacks unnecessary, but unfortunately + // this comment is too short to explain it. + Args.push_back(CatchAll); + } // Emit the selector call. Value *Filter = Builder.CreateCall(SlctrIntr, Args.begin(), Args.end(), From peckw at wesleypeck.com Wed Nov 24 10:32:35 2010 From: peckw at wesleypeck.com (Wesley Peck) Date: Wed, 24 Nov 2010 16:32:35 -0000 Subject: [llvm-commits] [llvm] r120097 - /llvm/trunk/lib/Target/MBlaze/MBlazeAsmPrinter.cpp Message-ID: <20101124163235.6DAC72A6C12C@llvm.org> Author: peckw Date: Wed Nov 24 10:32:35 2010 New Revision: 120097 URL: http://llvm.org/viewvc/llvm-project?rev=120097&view=rev Log: Updating MBlaze .mask and .frame directives to match GCC's output and fixing regression introduced in 120095 by checking MCStreamer::hasRawTextSupport. Modified: llvm/trunk/lib/Target/MBlaze/MBlazeAsmPrinter.cpp Modified: llvm/trunk/lib/Target/MBlaze/MBlazeAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeAsmPrinter.cpp?rev=120097&r1=120096&r2=120097&view=diff ============================================================================== --- llvm/trunk/lib/Target/MBlaze/MBlazeAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/MBlaze/MBlazeAsmPrinter.cpp Wed Nov 24 10:32:35 2010 @@ -60,7 +60,7 @@ return "MBlaze Assembly Printer"; } - void printSavedRegsBitmask(raw_ostream &O); + void printSavedRegsBitmask(); void emitFrameDirective(); virtual void EmitFunctionBodyStart(); virtual void EmitFunctionBodyEnd(); @@ -124,10 +124,9 @@ // Create a bitmask with all callee saved registers for CPU or Floating Point // registers. For CPU registers consider RA, GP and FP for saving if necessary. -void MBlazeAsmPrinter::printSavedRegsBitmask(raw_ostream &O) { +void MBlazeAsmPrinter::printSavedRegsBitmask() { const TargetFrameInfo *TFI = TM.getFrameInfo(); const TargetRegisterInfo &RI = *TM.getRegisterInfo(); - const MBlazeFunctionInfo *MBlazeFI = MF->getInfo(); // CPU Saved Registers Bitmasks unsigned int CPUBitmask = 0; @@ -152,17 +151,19 @@ getRegisterNumbering(RI.getRARegister())); // Print CPUBitmask - O << "\t.mask \t"; printHex32(CPUBitmask, O); O << ',' - << MBlazeFI->getCPUTopSavedRegOff() << '\n'; + OutStreamer.EmitRawText("\t.mask\t0x" + Twine::utohexstr(CPUBitmask)); } /// Frame Directive void MBlazeAsmPrinter::emitFrameDirective() { - const TargetRegisterInfo &RI = *TM.getRegisterInfo(); + if (!OutStreamer.hasRawTextSupport()) + return; + const TargetRegisterInfo &RI = *TM.getRegisterInfo(); unsigned stkReg = RI.getFrameRegister(*MF); unsigned retReg = RI.getRARegister(); unsigned stkSze = MF->getFrameInfo()->getStackSize(); + if (stkSze < 28 && MF->getFrameInfo()->adjustsStack()) stkSze = 28; OutStreamer.EmitRawText("\t.frame\t" + Twine(MBlazeInstPrinter::getRegisterName(stkReg)) + @@ -171,21 +172,27 @@ } void MBlazeAsmPrinter::EmitFunctionEntryLabel() { - OutStreamer.EmitRawText("\t.ent\t" + Twine(CurrentFnSym->getName())); + if (OutStreamer.hasRawTextSupport()) + OutStreamer.EmitRawText("\t.ent\t" + Twine(CurrentFnSym->getName())); AsmPrinter::EmitFunctionEntryLabel(); } void MBlazeAsmPrinter::EmitFunctionBodyStart() { + if (!OutStreamer.hasRawTextSupport()) + return; + emitFrameDirective(); + printSavedRegsBitmask(); - SmallString<128> Str; - raw_svector_ostream OS(Str); - printSavedRegsBitmask(OS); - OutStreamer.EmitRawText(OS.str()); + // SmallString<128> Str; + // raw_svector_ostream OS(Str); + // printSavedRegsBitmask(OS); + // OutStreamer.EmitRawText(OS.str()); } void MBlazeAsmPrinter::EmitFunctionBodyEnd() { - OutStreamer.EmitRawText("\t.end\t" + Twine(CurrentFnSym->getName())); + if (OutStreamer.hasRawTextSupport()) + OutStreamer.EmitRawText("\t.end\t" + Twine(CurrentFnSym->getName())); } //===----------------------------------------------------------------------===// From benny.kra at googlemail.com Wed Nov 24 10:59:04 2010 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Wed, 24 Nov 2010 17:59:04 +0100 Subject: [llvm-commits] [llvm] r120049 - in /llvm/trunk: lib/Target/README.txt lib/Transforms/InstCombine/InstCombineShifts.cpp test/Transforms/InstCombine/shift.ll In-Reply-To: References: <20101123203357.5EA1E2A6C12C@llvm.org> Message-ID: <3B1A59B3-1336-4FE6-A32D-E48B66FFCB51@gmail.com> On 24.11.2010, at 01:37, Eli Friedman wrote: > On Tue, Nov 23, 2010 at 12:33 PM, Benjamin Kramer > wrote: >> Author: d0k >> Date: Tue Nov 23 14:33:57 2010 >> New Revision: 120049 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=120049&view=rev >> Log: >> The srem -> urem transform is not safe for any divisor that's not a power of two. >> E.g. -5 % 5 is 0 with srem and 1 with urem. >> >> Also addresses Frits van Bommel's comments. >> >> Modified: >> llvm/trunk/lib/Target/README.txt >> llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp >> llvm/trunk/test/Transforms/InstCombine/shift.ll >> >> Modified: llvm/trunk/lib/Target/README.txt >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/README.txt?rev=120049&r1=120048&r2=120049&view=diff >> ============================================================================== >> --- llvm/trunk/lib/Target/README.txt (original) >> +++ llvm/trunk/lib/Target/README.txt Tue Nov 23 14:33:57 2010 >> @@ -1704,8 +1704,8 @@ >> %384 = shl i64 %381, %383 ; [#uses=1] >> %385 = icmp slt i32 %tmp14.i, 64 ; [#uses=1] >> >> -The srem can be transformed to an and because if x is negative, the shift is >> -undefined. Testcase derived from 403.gcc. >> +The srem can be transformed to an and because if %tmp14.i is negative, the >> +shift is undefined. Testcase derived from 403.gcc. >> >> //===---------------------------------------------------------------------===// >> >> >> Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp?rev=120049&r1=120048&r2=120049&view=diff >> ============================================================================== >> --- llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp (original) >> +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp Tue Nov 23 14:33:57 2010 >> @@ -54,19 +54,17 @@ >> if (Instruction *Res = FoldShiftByConstant(Op0, CUI, I)) >> return Res; >> >> - // X shift (A srem B) -> X shift (A urem B) iff B is positive. >> + // X shift (A srem B) -> X shift (A and B-1) iff B is a power of 2. >> // Because shifts by negative values are undefined. >> if (BinaryOperator *BO = dyn_cast(Op1)) >> - if (BO->getOpcode() == Instruction::SRem && BO->getType()->isIntegerTy()) { >> - // Make sure the divisor's sign bit is zero. >> - APInt Mask = APInt::getSignBit(BO->getType()->getPrimitiveSizeInBits()); >> - if (MaskedValueIsZero(BO->getOperand(1), Mask)) { >> - Value *URem = Builder->CreateURem(BO->getOperand(0), BO->getOperand(1), >> - BO->getName()); >> - I.setOperand(1, URem); >> - return &I; >> - } >> - } >> + if (BO->hasOneUse() && BO->getOpcode() == Instruction::SRem) >> + if (ConstantInt *CI = dyn_cast(BO->getOperand(1))) >> + if (CI->getValue().isPowerOf2()) { >> + Constant *C = ConstantInt::get(BO->getType(), CI->getValue()-1); >> + Value *Rem = Builder->CreateAnd(BO->getOperand(0), C, BO->getName()); >> + I.setOperand(1, Rem); >> + return &I; >> + } > > Is this check correct for "X << (A % INT_MIN)"? I don't see why INT_MIN should be handled differently here, can you elaborate? From stoklund at 2pi.dk Wed Nov 24 11:44:50 2010 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Wed, 24 Nov 2010 09:44:50 -0800 Subject: [llvm-commits] Review request: dominance frontier computation speedup In-Reply-To: <13C5FDF0-97C1-48A0-B38A-E8F9A47ED0EF@apple.com> References: <6AB43A0F-285B-4592-BBCB-9EA7061BD105@apple.com> <5B462C62-0B5C-4F13-8DDA-DC10D2BA0B4F@2pi.dk> <13C5FDF0-97C1-48A0-B38A-E8F9A47ED0EF@apple.com> Message-ID: <687E61DC-1376-4B6C-BA15-BCB4CC97D116@2pi.dk> On Nov 23, 2010, at 11:34 PM, Cameron Zwarich wrote: > On 2010-11-23, at 11:16 PM, Jakob Stoklund Olesen wrote: > >> On Nov 23, 2010, at 9:27 PM, Cameron Zwarich wrote: >> >>> There aren't very many good use cases for std::set. Most dominance frontiers are small, so a SmallPtrSet seemed like a good choice. I experimented with different small values of the inline capacity and found that 2 was best for performance. >> >> Does the majority of sets really have only 2 or less members? Otherwise, a DenseSet might be better. > > I didn't take any stats, but on the same benchmark using DenseSet is more than 2x slower. Probably because each set mallocs. On second thought, I am not so sure it is a good idea to replace std::set here. The dominance frontier data structure has quadratic size, and this change could blow up the constant factor. When a SmallPtrSet overflows its 'small' size, it allocates space for 128 pointers. That uses more memory than a std::set for up to 32 entries which is probably most cases. Actually, I think Chris wants to get rid of dominance frontiers entirely because of the memory requirements. /jakob -------------- next part -------------- A non-text attachment was scrubbed... Name: smime.p7s Type: application/pkcs7-signature Size: 1929 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101124/bcc0be43/attachment.bin From rafael.espindola at gmail.com Wed Nov 24 12:03:57 2010 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Wed, 24 Nov 2010 18:03:57 -0000 Subject: [llvm-commits] [llvm] r120099 - /llvm/trunk/test/MC/X86/x86-64.s Message-ID: <20101124180357.A03E32A6C12C@llvm.org> Author: rafael Date: Wed Nov 24 12:03:57 2010 New Revision: 120099 URL: http://llvm.org/viewvc/llvm-project?rev=120099&view=rev Log: Testcase for r120017. Modified: llvm/trunk/test/MC/X86/x86-64.s Modified: llvm/trunk/test/MC/X86/x86-64.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86-64.s?rev=120099&r1=120098&r2=120099&view=diff ============================================================================== --- llvm/trunk/test/MC/X86/x86-64.s (original) +++ llvm/trunk/test/MC/X86/x86-64.s Wed Nov 24 12:03:57 2010 @@ -909,3 +909,4 @@ movq %rax, %mm5 // CHECK: movd %rax, %mm5 # encoding: [0x48,0x0f,0x6e,0xe8] movq %mm5, %rbx // CHECK: movd %mm5, %rbx # encoding: [0x48,0x0f,0x7e,0xeb] +rex64 // CHECK: rex64 # encoding: [0x48] From rafael.espindola at gmail.com Wed Nov 24 12:51:21 2010 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Wed, 24 Nov 2010 18:51:21 -0000 Subject: [llvm-commits] [llvm] r120100 - in /llvm/trunk: lib/MC/MCELFStreamer.cpp test/MC/ELF/tls-i386.s test/MC/ELF/tls.s Message-ID: <20101124185121.6DCFB2A6C12C@llvm.org> Author: rafael Date: Wed Nov 24 12:51:21 2010 New Revision: 120100 URL: http://llvm.org/viewvc/llvm-project?rev=120100&view=rev Log: Fix and add tests for all cases in x86 and x86_64 where gnu as implicitly sets the type of a symbol to STT_TLS. Added: llvm/trunk/test/MC/ELF/tls-i386.s Modified: llvm/trunk/lib/MC/MCELFStreamer.cpp llvm/trunk/test/MC/ELF/tls.s Modified: llvm/trunk/lib/MC/MCELFStreamer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCELFStreamer.cpp?rev=120100&r1=120099&r2=120100&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCELFStreamer.cpp (original) +++ llvm/trunk/lib/MC/MCELFStreamer.cpp Wed Nov 24 12:51:21 2010 @@ -467,12 +467,20 @@ case MCExpr::SymbolRef: { const MCSymbolRefExpr &symRef = *cast(expr); - MCSymbolRefExpr::VariantKind kind = symRef.getKind(); - if (kind != MCSymbolRefExpr::VK_TLSGD && - kind != MCSymbolRefExpr::VK_TLSLD && - kind != MCSymbolRefExpr::VK_TLSLDM && - kind != MCSymbolRefExpr::VK_ARM_TLSGD) + switch (symRef.getKind()) { + default: return; + case MCSymbolRefExpr::VK_NTPOFF: + case MCSymbolRefExpr::VK_GOTNTPOFF: + case MCSymbolRefExpr::VK_TLSGD: + case MCSymbolRefExpr::VK_TLSLDM: + case MCSymbolRefExpr::VK_TPOFF: + case MCSymbolRefExpr::VK_DTPOFF: + case MCSymbolRefExpr::VK_GOTTPOFF: + case MCSymbolRefExpr::VK_TLSLD: + case MCSymbolRefExpr::VK_ARM_TLSGD: + break; + } MCSymbolData &SD = getAssembler().getOrCreateSymbolData(symRef.getSymbol()); SetType(SD, ELF::STT_TLS); break; Added: llvm/trunk/test/MC/ELF/tls-i386.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/tls-i386.s?rev=120100&view=auto ============================================================================== --- llvm/trunk/test/MC/ELF/tls-i386.s (added) +++ llvm/trunk/test/MC/ELF/tls-i386.s Wed Nov 24 12:51:21 2010 @@ -0,0 +1,64 @@ +// RUN: llvm-mc -filetype=obj -triple i386-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +// Test that all symbols are of type STT_TLS. + + movl foo1 at NTPOFF(%eax), %eax + movl foo2 at GOTNTPOFF(%eax), %eax + movl foo3 at TLSGD(%eax), %eax + movl foo4 at TLSLDM(%eax), %eax + movl foo5 at TPOFF(%eax), %eax + movl foo6 at DTPOFF(%eax), %eax + +// CHECK: (('st_name', 0x00000001) # 'foo1' +// CHECK-NEXT: ('st_value', 0x00000000) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000006) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000006 +// CHECK-NEXT: (('st_name', 0x00000006) # 'foo2' +// CHECK-NEXT: ('st_value', 0x00000000) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000006) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000007 +// CHECK-NEXT: (('st_name', 0x0000000b) # 'foo3' +// CHECK-NEXT: ('st_value', 0x00000000) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000006) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000008 +// CHECK-NEXT: (('st_name', 0x00000010) # 'foo4' +// CHECK-NEXT: ('st_value', 0x00000000) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000006) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000009 +// CHECK-NEXT: (('st_name', 0x00000015) # 'foo5' +// CHECK-NEXT: ('st_value', 0x00000000) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000006) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x0000000a +// CHECK-NEXT: (('st_name', 0x0000001a) # 'foo6' +// CHECK-NEXT: ('st_value', 0x00000000) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000006) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ), Modified: llvm/trunk/test/MC/ELF/tls.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/tls.s?rev=120100&r1=120099&r2=120100&view=diff ============================================================================== --- llvm/trunk/test/MC/ELF/tls.s (original) +++ llvm/trunk/test/MC/ELF/tls.s Wed Nov 24 12:51:21 2010 @@ -1,14 +1,16 @@ // RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s -// Test that foo and foobar is of type STT_TLS. +// Test that all symbols are of type STT_TLS. - leaq foo at TLSGD(%rip), %rdi + leaq foo1 at TLSGD(%rip), %rdi + leaq foo2 at GOTTPOFF(%rip), %rdi + leaq foo3 at TLSLD(%rip), %rdi .section .zed,"awT", at progbits foobar: .long 43 -// CHECK: (('st_name', 0x00000005) # 'foobar' +// CHECK: (('st_name', 0x00000010) # 'foobar' // CHECK-NEXT: ('st_bind', 0x00000000) // CHECK-NEXT: ('st_type', 0x00000006) // CHECK-NEXT: ('st_other', 0x00000000) @@ -17,11 +19,30 @@ // CHECK-NEXT: ('st_size', 0x00000000) // CHECK-NEXT: ), -// CHECK: (('st_name', 0x00000001) # 'foo' -// CHECK-NEXT: ('st_bind', 0x00000001) -// CHECK-NEXT: ('st_type', 0x00000006) -// CHECK-NEXT: ('st_other', 0x00000000) -// CHECK-NEXT: ('st_shndx', 0x00000000) -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) -// CHECK-NEXT: ), +// CHECK: # Symbol 0x00000007 +// CHECK-NEXT: (('st_name', 0x00000001) # 'foo1' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000006) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ('st_value', 0x00000000) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000008 +// CHECK-NEXT: (('st_name', 0x00000006) # 'foo2' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000006) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ('st_value', 0x00000000) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000009 +// CHECK-NEXT: (('st_name', 0x0000000b) # 'foo3' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000006) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ('st_value', 0x00000000) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ), From bigcheesegs at gmail.com Wed Nov 24 13:20:05 2010 From: bigcheesegs at gmail.com (Michael J. Spencer) Date: Wed, 24 Nov 2010 19:20:05 -0000 Subject: [llvm-commits] [llvm] r120101 - in /llvm/trunk/unittests: CMakeLists.txt Makefile Support/System.cpp System/ System/Makefile System/Path.cpp System/TimeValue.cpp Message-ID: <20101124192005.C949E2A6C12C@llvm.org> Author: mspencer Date: Wed Nov 24 13:20:05 2010 New Revision: 120101 URL: http://llvm.org/viewvc/llvm-project?rev=120101&view=rev Log: unittests: Add SystemTests. Added: llvm/trunk/unittests/System/ llvm/trunk/unittests/System/Makefile - copied, changed from r120099, llvm/trunk/unittests/Makefile llvm/trunk/unittests/System/Path.cpp llvm/trunk/unittests/System/TimeValue.cpp Removed: llvm/trunk/unittests/Support/System.cpp Modified: llvm/trunk/unittests/CMakeLists.txt llvm/trunk/unittests/Makefile Modified: llvm/trunk/unittests/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/CMakeLists.txt?rev=120101&r1=120100&r2=120101&view=diff ============================================================================== --- llvm/trunk/unittests/CMakeLists.txt (original) +++ llvm/trunk/unittests/CMakeLists.txt Wed Nov 24 13:20:05 2010 @@ -17,6 +17,9 @@ include_directories(${LLVM_MAIN_SRC_DIR}/utils/unittest/googletest/include) add_definitions(-DGTEST_HAS_RTTI=0) +if (NOT LLVM_ENABLE_THREADS) + add_definitions(-DGTEST_HAS_PTHREAD=0) +endif() set(LLVM_LINK_COMPONENTS jit @@ -33,6 +36,7 @@ set(LLVM_USED_LIBS gtest gtest_main + LLVMSupport # gtest needs it for raw_ostream. ) add_llvm_unittest(ADT @@ -117,7 +121,15 @@ Support/raw_ostream_test.cpp Support/RegexTest.cpp Support/SwapByteOrderTest.cpp - Support/System.cpp Support/TypeBuilderTest.cpp Support/ValueHandleTest.cpp ) + +set(LLVM_LINK_COMPONENTS + System + ) + +add_llvm_unittest(System + System/Path.cpp + System/TimeValue.cpp + ) Modified: llvm/trunk/unittests/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/Makefile?rev=120101&r1=120100&r2=120101&view=diff ============================================================================== --- llvm/trunk/unittests/Makefile (original) +++ llvm/trunk/unittests/Makefile Wed Nov 24 13:20:05 2010 @@ -9,7 +9,7 @@ LEVEL = .. -PARALLEL_DIRS = ADT ExecutionEngine Support Transforms VMCore Analysis +PARALLEL_DIRS = ADT ExecutionEngine Support System Transforms VMCore Analysis include $(LEVEL)/Makefile.common Removed: llvm/trunk/unittests/Support/System.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/Support/System.cpp?rev=120100&view=auto ============================================================================== --- llvm/trunk/unittests/Support/System.cpp (original) +++ llvm/trunk/unittests/Support/System.cpp (removed) @@ -1,16 +0,0 @@ -//===- llvm/unittest/Support/System.cpp - System tests --===// -#include "gtest/gtest.h" -#include "llvm/System/TimeValue.h" -#include - -using namespace llvm; -namespace { -class SystemTest : public ::testing::Test { -}; - -TEST_F(SystemTest, TimeValue) { - sys::TimeValue now = sys::TimeValue::now(); - time_t now_t = time(NULL); - EXPECT_TRUE(abs(static_cast(now_t - now.toEpochTime())) < 2); -} -} Copied: llvm/trunk/unittests/System/Makefile (from r120099, llvm/trunk/unittests/Makefile) URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/System/Makefile?p2=llvm/trunk/unittests/System/Makefile&p1=llvm/trunk/unittests/Makefile&r1=120099&r2=120101&rev=120101&view=diff ============================================================================== --- llvm/trunk/unittests/Makefile (original) +++ llvm/trunk/unittests/System/Makefile Wed Nov 24 13:20:05 2010 @@ -1,4 +1,4 @@ -##===- unittests/Makefile ----------------------------------*- Makefile -*-===## +##===- unittests/System/Makefile ---------------------------*- Makefile -*-===## # # The LLVM Compiler Infrastructure # @@ -7,11 +7,9 @@ # ##===----------------------------------------------------------------------===## -LEVEL = .. +LEVEL = ../.. +TESTNAME = System +LINK_COMPONENTS := system -PARALLEL_DIRS = ADT ExecutionEngine Support Transforms VMCore Analysis - -include $(LEVEL)/Makefile.common - -clean:: - $(Verb) $(RM) -f *Tests +include $(LEVEL)/Makefile.config +include $(LLVM_SRC_ROOT)/unittests/Makefile.unittest Added: llvm/trunk/unittests/System/Path.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/System/Path.cpp?rev=120101&view=auto ============================================================================== --- llvm/trunk/unittests/System/Path.cpp (added) +++ llvm/trunk/unittests/System/Path.cpp Wed Nov 24 13:20:05 2010 @@ -0,0 +1,18 @@ +//===- llvm/unittest/System/Path.cpp - Path tests -------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "gtest/gtest.h" + +namespace { + +TEST(System, Path) { + // TODO: Add tests! +} + +} // anonymous namespace Added: llvm/trunk/unittests/System/TimeValue.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/System/TimeValue.cpp?rev=120101&view=auto ============================================================================== --- llvm/trunk/unittests/System/TimeValue.cpp (added) +++ llvm/trunk/unittests/System/TimeValue.cpp Wed Nov 24 13:20:05 2010 @@ -0,0 +1,23 @@ +//===- llvm/unittest/System/TimeValue.cpp - Time Vlaue tests --------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "gtest/gtest.h" +#include "llvm/System/TimeValue.h" +#include + +using namespace llvm; +namespace { + +TEST(System, TimeValue) { + sys::TimeValue now = sys::TimeValue::now(); + time_t now_t = time(NULL); + EXPECT_TRUE(abs(static_cast(now_t - now.toEpochTime())) < 2); +} + +} From bigcheesegs at gmail.com Wed Nov 24 13:20:19 2010 From: bigcheesegs at gmail.com (Michael J. Spencer) Date: Wed, 24 Nov 2010 19:20:19 -0000 Subject: [llvm-commits] [llvm] r120102 - /llvm/trunk/include/llvm/System/PathV2.h Message-ID: <20101124192020.035062A6C12C@llvm.org> Author: mspencer Date: Wed Nov 24 13:20:19 2010 New Revision: 120102 URL: http://llvm.org/viewvc/llvm-project?rev=120102&view=rev Log: Path Version 2. Based on TR2/boost filesystem (v3) API, but modified to remove exceptions. Do not include this file directly, when it is ready, it will be included by include/llvm/System/Path.h. Added: llvm/trunk/include/llvm/System/PathV2.h Added: llvm/trunk/include/llvm/System/PathV2.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/System/PathV2.h?rev=120102&view=auto ============================================================================== --- llvm/trunk/include/llvm/System/PathV2.h (added) +++ llvm/trunk/include/llvm/System/PathV2.h Wed Nov 24 13:20:19 2010 @@ -0,0 +1,977 @@ +//===- llvm/System/PathV2.h - Path Operating System Concept -----*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file declares the llvm::sys::path namespace. It is designed after +// TR2/boost filesystem (v3), but modified to remove exception handling and the +// path class. +// +// All functions return an error_code and their actual work via the last out +// argument. The out argument is defined if and only if errc::success is +// returned. A function may return any error code in the generic or system +// category. However, they shall be equivalent to any error conditions listed +// in each functions respective documentation if the condition applies. [ note: +// this does not guarantee that error_code will be in the set of explicitly +// listed codes, but it does guarantee that if any of the explicitly listed +// errors occur, the correct error_code will be used ]. All functions may +// return errc::not_enough_memory if there is not enough memory to complete the +// operation. +// +//===----------------------------------------------------------------------===// + +#include "llvm/ADT/SmallString.h" +#include "llvm/System/DataTypes.h" +#include "llvm/System/system_error.h" +#include +#include +#include + +namespace llvm { + +// Forward decls. +class StringRef; +class Twine; + +namespace sys { +namespace path { + +/// @name Lexical Component Iterator +/// @{ + +/// @brief Path iterator. +/// +/// This is a bidirectional iterator that iterates over the individual +/// components in \a path. The forward traversal order is as follows: +/// * The root-name element, if present. +/// * The root-directory element, if present. +/// * Each successive filename element, if present. +/// * Dot, if one or more trailing non-root slash characters are present. +/// The backwards traversal order is the reverse of forward traversal. +/// +/// Iteration examples. Each component is separated by ',': +/// / => / +/// /foo => /,foo +/// foo/ => foo,. +/// /foo/bar => /,foo,bar +/// ../ => ..,. +/// C:\foo\bar => C:,/,foo,bar +/// +class const_iterator { + StringRef Path; //< The entire path. + StringRef Component; //< The current component. + +public: + typedef const StringRef value_type; + typedef value_type &reference; + typedef value_type *pointer; + typedef std::bidirectional_iterator_tag iterator_category; + reference operator*() const; + pointer operator->() const; + const_iterator &operator++(); // preincrement + const_iterator &operator++(int); // postincrement + const_iterator &operator--(); // predecrement + const_iterator &operator--(int); // postdecrement + bool operator==(const const_iterator &RHS) const; + bool operator!=(const const_iterator &RHS) const; + + const_iterator(); //< Default construct end iterator. + const_iterator(const StringRef &path); +}; + +/// @} +/// @name Lexical Modifiers +/// @{ + +/// @brief Make \a path an absolute path. +/// +/// Makes \a path absolute using the current directory if it is not already. An +/// empty \a path will result in the current directory. +/// +/// /absolute/path => /absolute/path +/// relative/../path => /path +/// +/// @param path A path that is modified to be an absolute path. +/// @returns errc::success if \a path has been made absolute, otherwise a +/// platform specific error_code. +error_code make_absolute(SmallVectorImpl &path); + +/// @brief Remove the last component from \a path if it exists. +/// +/// directory/filename.cpp => directory/ +/// directory/ => directory/ +/// +/// @param path A path that is modified to not have a file component. +/// @returns errc::success if \a path's file name has been removed (or there was +/// not one to begin with), otherwise a platform specific error_code. +error_code remove_filename(SmallVectorImpl &path); + +/// @brief Replace the file extension of \a path with \a extension. +/// +/// ./filename.cpp => ./filename.extension +/// ./filename => ./filename.extension +/// ./ => ? TODO: decide what semantics this has. +/// +/// @param path A path that has its extension replaced with \a extension. +/// @param extension The extension to be added. It may be empty. It may also +/// optionally start with a '.', if it does not, one will be +/// prepended. +/// @returns errc::success if \a path's extension has been replaced, otherwise a +/// platform specific error_code. +error_code replace_extension(SmallVectorImpl &path, const Twine &extension); + +/// @brief Append to path. +/// +/// /foo + bar/f => /foo/bar/f +/// /foo/ + bar/f => /foo/bar/f +/// foo + bar/f => foo/bar/f +/// +/// @param path Set to \a path + \a component. +/// @param component The component to be appended to \a path. +/// @returns errc::success if \a component has been appended to \a path, +/// otherwise a platform specific error_code. +error_code append(SmallVectorImpl &path, const Twine &component); + +/// @brief Append to path. +/// +/// /foo + [bar,f] => /foo/bar/f +/// /foo/ + [bar,f] => /foo/bar/f +/// foo + [bar,f] => foo/bar/f +/// +/// @param path Set to \a path + [\a begin, \a end). +/// @param begin Start of components to append. +/// @param end One past the end of components to append. +/// @returns errc::success if [\a begin, \a end) has been appended to \a path, +/// otherwise a platform specific error_code. +error_code append(SmallVectorImpl &path, + const_iterator begin, const_iterator end); + +/// @} +/// @name Transforms (or some other better name) +/// @{ + +/// Convert path to the native form. This is used to give paths to users and +/// operating system calls in the platform's normal way. For example, on Windows +/// all '/' are converted to '\'. +/// +/// @param path A path that is transformed to native format. +/// @param result Holds the result of the transformation. +/// @returns errc::success if \a path has been transformed and stored in result, +/// otherwise a platform specific error_code. +error_code native(const Twine &path, SmallVectorImpl &result); + +/// @} +/// @name Lexical Observers +/// @{ + +/// @brief Get the current path. +/// +/// @param result Holds the current path on return. +/// @results errc::success if the current path has been stored in result, +/// otherwise a platform specific error_code. +error_code current_path(SmallVectorImpl &result); + +// The following are purely lexical. + +/// @brief Is the current path valid? +/// +/// @param path Input path. +/// @param result Set to true if the path is valid, false if it is not. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code is_valid(const Twine &path, bool &result); + +/// @brief Get root name. +/// +/// //net/hello => //net +/// c:/hello => c: (on Windows, on other platforms nothing) +/// /hello => +/// +/// @param path Input path. +/// @param result Set to the root name of \a path if it has one, otherwise "". +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code root_name(const StringRef &path, StringRef &result); + +/// @brief Get root directory. +/// +/// /goo/hello => / +/// c:/hello => / +/// d/file.txt => +/// +/// @param path Input path. +/// @param result Set to the root directory of \a path if it has one, otherwise +/// "". +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code root_directory(const StringRef &path, StringRef &result); + +/// @brief Get root path. +/// +/// Equivalent to root_name + root_directory. +/// +/// @param path Input path. +/// @param result Set to the root path of \a path if it has one, otherwise "". +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code root_path(const StringRef &path, StringRef &result); + +/// @brief Get relative path. +/// +/// C:\hello\world => hello\world +/// foo/bar => foo/bar +/// /foo/bar => foo/bar +/// +/// @param path Input path. +/// @param result Set to the path starting after root_path if one exists, +/// otherwise "". +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code relative_path(const StringRef &path, StringRef &result); + +/// @brief Get parent path. +/// +/// / => +/// /foo => / +/// foo/../bar => foo/.. +/// +/// @param path Input path. +/// @param result Set to the parent path of \a path if one exists, otherwise "". +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code parent_path(const StringRef &path, StringRef &result); + +/// @brief Get filename. +/// +/// /foo.txt => foo.txt +/// . => . +/// .. => .. +/// / => / +/// +/// @param path Input path. +/// @param result Set to the filename part of \a path. This is defined as the +/// last component of \a path. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code filename(const StringRef &path, StringRef &result); + +/// @brief Get stem. +/// +/// If filename contains a dot but not solely one or two dots, result is the +/// substring of filename ending at (but not including) the last dot. Otherwise +/// it is filename. +/// +/// /foo/bar.txt => bar +/// /foo/bar => bar +/// /foo/.txt => +/// /foo/. => . +/// /foo/.. => .. +/// +/// @param path Input path. +/// @param result Set to the stem of \a path. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code stem(const StringRef &path, StringRef &result); + +/// @brief Get extension. +/// +/// If filename contains a dot but not solely one or two dots, result is the +/// substring of filename starting at (and including) the last dot, and ending +/// at the end of \a path. Otherwise "". +/// +/// /foo/bar.txt => .txt +/// /foo/bar => +/// /foo/.txt => .txt +/// +/// @param path Input path. +/// @param result Set to the extension of \a path. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code extension(const StringRef &path, StringRef &result); + +/// @brief Has root name? +/// +/// root_name != "" +/// +/// @param path Input path. +/// @param result Set to true if the path has a root name, false otherwise. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code has_root_name(const Twine &path, bool &result); + +/// @brief Has root directory? +/// +/// root_directory != "" +/// +/// @param path Input path. +/// @param result Set to true if the path has a root directory, false otherwise. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code has_root_directory(const Twine &path, bool &result); + +/// @brief Has root path? +/// +/// root_path != "" +/// +/// @param path Input path. +/// @param result Set to true if the path has a root path, false otherwise. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code has_root_path(const Twine &path, bool &result); + +/// @brief Has relative path? +/// +/// relative_path != "" +/// +/// @param path Input path. +/// @param result Set to true if the path has a relative path, false otherwise. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code has_relative_path(const Twine &path, bool &result); + +/// @brief Has parent path? +/// +/// parent_path != "" +/// +/// @param path Input path. +/// @param result Set to true if the path has a parent path, false otherwise. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code has_parent_path(const Twine &path, bool &result); + +/// @brief Has filename? +/// +/// filename != "" +/// +/// @param path Input path. +/// @param result Set to true if the path has a filename, false otherwise. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code has_filename(const Twine &path, bool &result); + +/// @brief Has stem? +/// +/// stem != "" +/// +/// @param path Input path. +/// @param result Set to true if the path has a stem, false otherwise. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code has_stem(const Twine &path, bool &result); + +/// @brief Has extension? +/// +/// extension != "" +/// +/// @param path Input path. +/// @param result Set to true if the path has a extension, false otherwise. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code has_extension(const Twine &path, bool &result); + +/// @brief Is path absolute? +/// +/// @param path Input path. +/// @param result Set to true if the path is absolute, false if it is not. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code is_absolute(const Twine &path, bool &result); + +/// @brief Is path relative? +/// +/// @param path Input path. +/// @param result Set to true if the path is relative, false if it is not. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code is_relative(const Twine &path, bool &result); +// end purely lexical. + +} // end namespace path + +namespace fs { + +/// file_type - An "enum class" enumeration for the file system's view of the +/// type. +struct file_type { + enum _ { + status_error, + file_not_found, + regular_file, + directory_file, + symlink_file, + block_file, + character_file, + fifo_file, + socket_file, + type_unknown + }; + + file_type(_ v) : v_(v) {} + explicit file_type(int v) : v_(_(v)) {} + operator int() const {return v_;} + +private: + int v_; +}; + +/// copy_option - An "enum class" enumeration of copy semantics for copy +/// operations. +struct copy_option { + enum _ { + fail_if_exists, + overwrite_if_exists + }; + + copy_option(_ v) : v_(v) {} + explicit copy_option(int v) : v_(_(v)) {} + operator int() const {return v_;} + +private: + int v_; +}; + +/// space_info - Self explanatory. +struct space_info { + uint64_t capacity; + uint64_t free; + uint64_t available; +}; + +/// file_status - Represents the result of a call to stat and friends. It has +/// a platform specific member to store the result. +class file_status +{ + // implementation defined status field. +public: + explicit file_status(file_type v=file_type::status_error); + + file_type type() const; + void type(file_type v); +}; + +/// @} +/// @name Physical Operators +/// @{ + +/// @brief Copy the file at \a from to the path \a to. +/// +/// @param from The path to copy the file from. +/// @param to The path to copy the file to. +/// @param copt Behavior if \a to already exists. +/// @returns errc::success if the file has been successfully copied. +/// errc::file_exists if \a to already exists and \a copt == +/// copy_option::fail_if_exists. Otherwise a platform specific +/// error_code. +error_code copy_file(const Twine &from, const Twine &to, + copy_option copt = copy_option::fail_if_exists); + +/// @brief Create all the non-existent directories in path. +/// +/// @param path Directories to create. +/// @param existed Set to true if \a path already existed, false otherwise. +/// @returns errc::success if is_directory(path) and existed have been set, +/// otherwise a platform specific error_code. +error_code create_directories(const Twine &path, bool &existed); + +/// @brief Create the directory in path. +/// +/// @param path Directory to create. +/// @param existed Set to true if \a path already existed, false otherwise. +/// @returns errc::success if is_directory(path) and existed have been set, +/// otherwise a platform specific error_code. +error_code create_directory(const Twine &path, bool &existed); + +/// @brief Create a hard link from \a from to \a to. +/// +/// @param to The path to hard link to. +/// @param from The path to hard link from. This is created. +/// @returns errc::success if exists(to) && exists(from) && equivalent(to, from) +/// , otherwise a platform specific error_code. +error_code create_hard_link(const Twine &to, const Twine &from); + +/// @brief Create a symbolic link from \a from to \a to. +/// +/// @param to The path to symbolically link to. +/// @param from The path to symbolically link from. This is created. +/// @returns errc::success if exists(to) && exists(from) && is_symlink(from), +/// otherwise a platform specific error_code. +error_code create_symlink(const Twine &to, const Twine &from); + +/// @brief Remove path. Equivalent to POSIX remove(). +/// +/// @param path Input path. +/// @param existed Set to true if \a path existed, false if it did not. +/// undefined otherwise. +/// @results errc::success if path has been removed and existed has been +/// successfully set, otherwise a platform specific error_code. +error_code remove(const Twine &path, bool &existed); + +/// @brief Recursively remove all files below \a path, then \a path. Files are +/// removed as if by POSIX remove(). +/// +/// @param path Input path. +/// @param num_removed Number of files removed. +/// @results errc::success if path has been removed and num_removed has been +/// successfully set, otherwise a platform specific error_code. +error_code remove_all(const Twine &path, uint32_t &num_removed); + +/// @brief Rename \a from to \a to. Files are renamed as if by POSIX rename(). +/// +/// @param from The path to rename from. +/// @param to The path to rename to. This is created. +error_code rename(const Twine &from, const Twine &to); + +/// @brief Resize path to size. File is resized as if by POSIX truncate(). +/// +/// @param path Input path. +/// @param size Size to resize to. +/// @returns errc::success if \a path has been resized to \a size, otherwise a +/// platform specific error_code. +error_code resize_file(const Twine &path, uint64_t size); + +/// @brief Make file readable. +/// +/// @param path Input path. +/// @param value If true, make readable, else, make unreadable. +/// @results errc::success if readability has been successfully set, otherwise a +/// platform specific error_code. +error_code set_read(const Twine &path, bool value); + +/// @brief Make file writeable. +/// +/// @param path Input path. +/// @param value If true, make writeable, else, make unwriteable. +/// @results errc::success if writeability has been successfully set, otherwise +/// a platform specific error_code. +error_code set_write(const Twine &path, bool value); + +/// @brief Make file executable. +/// +/// @param path Input path. +/// @param value If true, make executable, else, make unexecutable. +/// @results errc::success if executability has been successfully set, otherwise +/// a platform specific error_code. +error_code set_execute(const Twine &path, bool value); + +/// @} +/// @name Physical Observers +/// @{ + +/// @brief Does file exist? +/// +/// @param status A file_status previously returned from stat. +/// @param result Set to true if the file represented by status exists, false if +/// it does not. Undefined otherwise. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code exists(file_status status, bool &result); + +/// @brief Does file exist? +/// +/// @param path Input path. +/// @param result Set to true if the file represented by status exists, false if +/// it does not. Undefined otherwise. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code exists(const Twine &path, bool &result); + +/// @brief Do paths represent the same thing? +/// +/// @param A Input path A. +/// @param B Input path B. +/// @param result Set to true if stat(A) and stat(B) have the same device and +/// inode (or equivalent). +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code equivalent(const Twine &A, const Twine &B, bool &result); + +/// @brief Get file size. +/// +/// @param path Input path. +/// @param result Set to the size of the file in \a path. +/// @returns errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code file_size(const Twine &path, uint64_t &result); + +/// @brief Does status represent a directory? +/// +/// @param status A file_status previously returned from stat. +/// @param result Set to true if the file represented by status is a directory, +/// false if it is not. Undefined otherwise. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code is_directory(file_status status, bool &result); + +/// @brief Is path a directory? +/// +/// @param path Input path. +/// @param result Set to true if \a path is a directory, false if it is not. +/// Undefined otherwise. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code is_directory(const Twine &path, bool &result); + +/// @brief Is path an empty file? +/// +/// @param path Input path. +/// @param result Set to true if \a path is a an empty file, false if it is not. +/// Undefined otherwise. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code is_empty(const Twine &path, bool &result); + +/// @brief Does status represent a regular file? +/// +/// @param status A file_status previously returned from stat. +/// @param result Set to true if the file represented by status is a regular +/// file, false if it is not. Undefined otherwise. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code is_regular_file(file_status status, bool &result); + +/// @brief Is path a regular file? +/// +/// @param path Input path. +/// @param result Set to true if \a path is a regular file, false if it is not. +/// Undefined otherwise. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code is_regular_file(const Twine &path, bool &result); + +/// @brief Does status represent something that exists but is not a directory, +/// regular file, or symlink? +/// +/// @param status A file_status previously returned from stat. +/// @param result Set to true if the file represented by status exists, but is +/// not a directory, regular file, or a symlink, false if it does +/// not. Undefined otherwise. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code is_other(file_status status, bool &result); + +/// @brief Is path something that exists but is not a directory, +/// regular file, or symlink? +/// +/// @param path Input path. +/// @param result Set to true if \a path exists, but is not a directory, regular +/// file, or a symlink, false if it does not. Undefined otherwise. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code is_other(const Twine &path, bool &result); + +/// @brief Does status represent a symlink? +/// +/// @param status A file_status previously returned from stat. +/// @param result Set to true if the file represented by status is a symlink, +/// false if it is not. Undefined otherwise. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code is_symlink(file_status status, bool &result); + +/// @brief Is path a symlink? +/// +/// @param path Input path. +/// @param result Set to true if \a path is a symlink, false if it is not. +/// Undefined otherwise. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code is_symlink(const Twine &path, bool &result); + +/// @brief Get last write time without changing it. +/// +/// @param path Input path. +/// @param result Set to the last write time (UNIX time) of \a path if it +/// exists. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code last_write_time(const Twine &path, std::time_t &result); + +/// @brief Set last write time. +/// +/// @param path Input path. +/// @param value Time to set (UNIX time) \a path's last write time to. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code set_last_write_time(const Twine &path, std::time_t value); + +/// @brief Read a symlink's value. +/// +/// @param path Input path. +/// @param result Set to the value of the symbolic link \a path. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code read_symlink(const Twine &path, SmallVectorImpl &result); + +/// @brief Get disk space usage information. +/// +/// @param path Input path. +/// @param result Set to the capacity, free, and available space on the device +/// \a path is on. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code disk_space(const Twine &path, space_info &result); + +/// @brief Get file status as if by POSIX stat(). +/// +/// @param path Input path. +/// @param result Set to the file status. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code status(const Twine &path, file_status &result); + +/// @brief Is status available? +/// +/// @param path Input path. +/// @param result Set to true if status() != status_error. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code status_known(const Twine &path, bool &result); + +/// @brief Get file status as if by POSIX lstat(). +/// +/// Does not resolve symlinks. +/// +/// @param path Input path. +/// @param result Set to the file status. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code symlink_status(const Twine &path, file_status &result); + +/// @brief Get the temporary directory. +/// +/// @param result Set to the temporary directory. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +/// @see unique_file +error_code temp_directory_path(SmallVectorImpl &result); + +/// @brief Generate a unique path and open it as a file. +/// +/// Generates a unique path suitable for a temporary file and then opens it as a +/// file. The name is based on \a model with '%' replaced by a random char in +/// [0-9a-f]. +/// +/// This is an atomic operation. Either the file is created and opened, or the +/// file system is left untouched. +/// +/// clang-%%-%%-%%-%%-%%.s => /clang-a0-b1-c2-d3-e4.s +/// +/// @param model Name to base unique path off of. +/// @param result Set to the opened file. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +/// @see temp_directory_path +error_code unique_file(const Twine &model, void* i_have_not_decided_the_ty_yet); + +/// @brief Canonicalize path. +/// +/// Sets result to the file system's idea of what path is. The result is always +/// absolute and has the same capitalization as the file system. +/// +/// @param path Input path. +/// @param result Set to the canonicalized version of \a path. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code canonicalize(const Twine &path, SmallVectorImpl &result); + +/// @brief Are \a path's first bytes \a magic? +/// +/// @param path Input path. +/// @param magic Byte sequence to compare \a path's first len(magic) bytes to. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code has_magic(const Twine &path, const Twine &magic); + +/// @brief Get \a path's first \a len bytes. +/// +/// @param path Input path. +/// @param len Number of magic bytes to get. +/// @param result Set to the first \a len bytes in the file pointed to by +/// \a path. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code get_magic(const Twine &path, uint32_t len, SmallVectorImpl &result); + +/// @brief Is file bitcode? +/// +/// @param path Input path. +/// @param result Set to true if \a path is a bitcode file, false if it is not, +/// undefined otherwise. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code is_bitcode(const Twine &path, bool &result); + +/// @brief Is file a dynamic library? +/// +/// @param path Input path. +/// @param result Set to true if \a path is a dynamic library, false if it is +/// not, undefined otherwise. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code is_dynamic_library(const Twine &path, bool &result); + +/// @brief Is an object file? +/// +/// @param path Input path. +/// @param result Set to true if \a path is an object file, false if it is not, +/// undefined otherwise. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code is_object_file(const Twine &path, bool &result); + +/// @brief Can file be read? +/// +/// @param path Input path. +/// @param result Set to true if \a path is readable, false it it is not, +/// undefined otherwise. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code can_read(const Twine &path, bool &result); + +/// @brief Can file be written? +/// +/// @param path Input path. +/// @param result Set to true if \a path is writeable, false it it is not, +/// undefined otherwise. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code can_write(const Twine &path, bool &result); + +/// @brief Can file be executed? +/// +/// @param path Input path. +/// @param result Set to true if \a path is executable, false it it is not, +/// undefined otherwise. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code can_execute(const Twine &path, bool &result); + +/// @brief Get library paths the system linker uses. +/// +/// @param result Set to the list of system library paths. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code GetSystemLibraryPaths(SmallVectorImpl &result); + +/// @brief Get bitcode library paths the system linker uses +/// + LLVM_LIB_SEARCH_PATH + LLVM_LIBDIR. +/// +/// @param result Set to the list of bitcode library paths. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code GetBitcodeLibraryPaths(SmallVectorImpl &result); + +/// @brief Find a library. +/// +/// Find the path to a library using its short name. Use the system +/// dependent library paths to locate the library. +/// +/// c => /usr/lib/libc.so +/// +/// @param short_name Library name one would give to the system linker. +/// @param result Set to the absolute path \a short_name represents. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code FindLibrary(const Twine &short_name, SmallVectorImpl &result); + +/// @brief Get absolute path of main executable. +/// +/// @param argv0 The program name as it was spelled on the command line. +/// @param MainAddr Address of some symbol in the executable (not in a library). +/// @param result Set to the absolute path of the current executable. +/// @results errc::success if result has been successfully set, otherwise a +/// platform specific error_code. +error_code GetMainExecutable(const char *argv0, void *MainAddr, + SmallVectorImpl &result); + +/// @} +/// @name Iterators +/// @{ + +/// directory_entry - A single entry in a directory. Caches the status either +/// from the result of the iteration syscall, or the first time status or +/// symlink_status is called. +class directory_entry { + std::string Path; + mutable file_status Status; + mutable file_status SymlinkStatus; + +public: + explicit directory_entry(const Twine &path, file_status st = file_status(), + file_status symlink_st = file_status()); + + void assign(const Twine &path, file_status st = file_status(), + file_status symlink_st = file_status()); + void replace_filename(const Twine &filename, file_status st = file_status(), + file_status symlink_st = file_status()); + + const SmallVectorImpl &path() const; + error_code status(file_status &result) const; + error_code symlink_status(file_status &result) const; + + bool operator==(const directory_entry& rhs) const; + bool operator!=(const directory_entry& rhs) const; + bool operator< (const directory_entry& rhs) const; + bool operator<=(const directory_entry& rhs) const; + bool operator> (const directory_entry& rhs) const; + bool operator>=(const directory_entry& rhs) const; +}; + +/// directory_iterator - Iterates through the entries in path. There is no +/// operator++ because we need an error_code. If it's really needed we can make +/// it call report_fatal_error on error. +class directory_iterator { + // implementation directory iterator status + +public: + explicit directory_iterator(const Twine &path, error_code &ec); + // No operator++ because we need error_code. + directory_iterator &increment(error_code &ec); + + const directory_entry &operator*() const; + const directory_entry *operator->() const; + + // Other members as required by + // C++ Std, 24.1.1 Input iterators [input.iterators] +}; + +/// recursive_directory_iterator - Same as directory_iterator except for it +/// recurses down into child directories. +class recursive_directory_iterator { + uint16_t Level; + bool HasNoPushRequest; + // implementation directory iterator status + +public: + explicit recursive_directory_iterator(const Twine &path, error_code &ec); + // No operator++ because we need error_code. + directory_iterator &increment(error_code &ec); + + const directory_entry &operator*() const; + const directory_entry *operator->() const; + + // observers + /// Gets the current level. path is at level 0. + int level() const; + /// Returns true if no_push has been called for this directory_entry. + bool no_push_request() const; + + // modifiers + /// Goes up one level if Level > 0. + void pop(); + /// Does not go down into the current directory_entry. + void no_push(); + + // Other members as required by + // C++ Std, 24.1.1 Input iterators [input.iterators] +}; + +/// @} + +} // end namespace fs +} // end namespace sys +} // end namespace llvm From bigcheesegs at gmail.com Wed Nov 24 13:20:28 2010 From: bigcheesegs at gmail.com (Michael J. Spencer) Date: Wed, 24 Nov 2010 19:20:28 -0000 Subject: [llvm-commits] [llvm] r120103 - /llvm/trunk/unittests/System/Path.cpp Message-ID: <20101124192028.F20B02A6C12C@llvm.org> Author: mspencer Date: Wed Nov 24 13:20:28 2010 New Revision: 120103 URL: http://llvm.org/viewvc/llvm-project?rev=120103&view=rev Log: unittests: Add initial Path-V2 test. Modified: llvm/trunk/unittests/System/Path.cpp Modified: llvm/trunk/unittests/System/Path.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/System/Path.cpp?rev=120103&r1=120102&r2=120103&view=diff ============================================================================== --- llvm/trunk/unittests/System/Path.cpp (original) +++ llvm/trunk/unittests/System/Path.cpp Wed Nov 24 13:20:28 2010 @@ -7,6 +7,9 @@ // //===----------------------------------------------------------------------===// +// For now, just test that the header file parses. +#include "llvm/System/PathV2.h" + #include "gtest/gtest.h" namespace { From rafael.espindola at gmail.com Wed Nov 24 13:23:51 2010 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Wed, 24 Nov 2010 19:23:51 -0000 Subject: [llvm-commits] [llvm] r120104 - in /llvm/trunk: lib/MC/ELFObjectWriter.cpp test/MC/ELF/relocation-386.s Message-ID: <20101124192351.2A99C2A6C12C@llvm.org> Author: rafael Date: Wed Nov 24 13:23:50 2010 New Revision: 120104 URL: http://llvm.org/viewvc/llvm-project?rev=120104&view=rev Log: Relocate with the symbol if the relocation is of kind NTPOFF. Patch by David Meyer, I added the test. Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp llvm/trunk/test/MC/ELF/relocation-386.s Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/ELFObjectWriter.cpp?rev=120104&r1=120103&r2=120104&view=diff ============================================================================== --- llvm/trunk/lib/MC/ELFObjectWriter.cpp (original) +++ llvm/trunk/lib/MC/ELFObjectWriter.cpp Wed Nov 24 13:23:50 2010 @@ -729,7 +729,8 @@ if (&Sec2 != &Section && (Kind == MCSymbolRefExpr::VK_PLT || Kind == MCSymbolRefExpr::VK_GOTPCREL || - Kind == MCSymbolRefExpr::VK_GOTOFF)) { + Kind == MCSymbolRefExpr::VK_GOTOFF || + Kind == MCSymbolRefExpr::VK_NTPOFF)) { if (Renamed) return Renamed; return &Symbol; Modified: llvm/trunk/test/MC/ELF/relocation-386.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/relocation-386.s?rev=120104&r1=120103&r2=120104&view=diff ============================================================================== --- llvm/trunk/test/MC/ELF/relocation-386.s (original) +++ llvm/trunk/test/MC/ELF/relocation-386.s Wed Nov 24 13:23:50 2010 @@ -1,7 +1,7 @@ // RUN: llvm-mc -filetype=obj -triple i386-pc-linux-gnu %s -o - | elf-dump | FileCheck %s -// Test that we produce the correct relocation types and that the relocation -// to .Lfoo uses the symbol and not the section. +// Test that we produce the correct relocation types and that the relocations +// correctly point to the section or the symbol. // Section 3 is bss // CHECK: # Section 0x00000003 @@ -10,8 +10,18 @@ // CHECK: # Symbol 0x00000001 // CHECK-NEXT: (('st_name', 0x00000005) # '.Lfoo' -// Symbol 6 is section 3 -// CHECK: # Symbol 0x00000006 +// Symbol 4 is zed +// CHECK: # Symbol 0x00000004 +// CHECK-NEXT: (('st_name', 0x00000035) # 'zed' +// CHECK-NEXT: ('st_value', 0x00000000) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000006) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000004) + +// Symbol 7 is section 3 +// CHECK: # Symbol 0x00000007 // CHECK-NEXT: (('st_name', 0x00000000) # '' // CHECK-NEXT: ('st_value', 0x00000000) // CHECK-NEXT: ('st_size', 0x00000000) @@ -36,10 +46,10 @@ // CHECK-NEXT: ('r_type', 0x0000000a) // CHECK-NEXT: ), -// Relocation 3 (bar3 at GOTOFF) is done with symbol 6 (bss) +// Relocation 3 (bar3 at GOTOFF) is done with symbol 7 (bss) // CHECK-NEXT: # Relocation 0x00000003 // CHECK-NEXT: (('r_offset', -// CHECK-NEXT: ('r_sym', 0x00000006 +// CHECK-NEXT: ('r_sym', 0x00000007 // CHECK-NEXT: ('r_type', // CHECK-NEXT: ), @@ -53,49 +63,49 @@ // Relocation 5 (foo at TLSGD) is of type R_386_TLS_GD // CHECK-NEXT: # Relocation 0x00000005 // CHECK-NEXT: (('r_offset', 0x00000020) -// CHECK-NEXT: ('r_sym', 0x0000000b) +// CHECK-NEXT: ('r_sym', 0x0000000d) // CHECK-NEXT: ('r_type', 0x00000012) // CHECK-NEXT: ), // Relocation 6 ($foo at TPOFF) is of type R_386_TLS_LE_32 // CHECK-NEXT: # Relocation 0x00000006 // CHECK-NEXT: (('r_offset', 0x00000025) -// CHECK-NEXT: ('r_sym', 0x0000000b) +// CHECK-NEXT: ('r_sym', 0x0000000d) // CHECK-NEXT: ('r_type', 0x00000022) // CHECK-NEXT: ), // Relocation 7 (foo at INDNTPOFF) is of type R_386_TLS_IE // CHECK-NEXT: # Relocation 0x00000007 // CHECK-NEXT: (('r_offset', 0x0000002b) -// CHECK-NEXT: ('r_sym', 0x0000000b) +// CHECK-NEXT: ('r_sym', 0x0000000d) // CHECK-NEXT: ('r_type', 0x0000000f) // CHECK-NEXT: ), // Relocation 8 (foo at NTPOFF) is of type R_386_TLS_LE // CHECK-NEXT: # Relocation 0x00000008 // CHECK-NEXT: (('r_offset', 0x00000031) -// CHECK-NEXT: ('r_sym', 0x0000000b) +// CHECK-NEXT: ('r_sym', 0x0000000d) // CHECK-NEXT: ('r_type', 0x00000011) // CHECK-NEXT: ), // Relocation 9 (foo at GOTNTPOFF) is of type R_386_TLS_GOTIE // CHECK-NEXT: # Relocation 0x00000009 // CHECK-NEXT: (('r_offset', 0x00000037) -// CHECK-NEXT: ('r_sym', 0x0000000b) +// CHECK-NEXT: ('r_sym', 0x0000000d) // CHECK-NEXT: ('r_type', 0x00000010) // CHECK-NEXT: ), // Relocation 10 (foo at TLSLDM) is of type R_386_TLS_LDM // CHECK-NEXT: # Relocation 0x0000000a // CHECK-NEXT: (('r_offset', 0x0000003d) -// CHECK-NEXT: ('r_sym', 0x0000000b) +// CHECK-NEXT: ('r_sym', 0x0000000d) // CHECK-NEXT: ('r_type', 0x00000013) // CHECK-NEXT: ), // Relocation 11 (foo at DTPOFF) is of type R_386_TLS_LDO_32 // CHECK-NEXT: # Relocation 0x0000000b // CHECK-NEXT: (('r_offset', 0x00000043) -// CHECK-NEXT: ('r_sym', 0x0000000b) +// CHECK-NEXT: ('r_sym', 0x0000000d) // CHECK-NEXT: ('r_type', 0x00000020) // CHECK-NEXT: ), // Relocation 12 (calll 4096) is of type R_386_PC32 @@ -104,6 +114,12 @@ // CHECK-NEXT: ('r_sym', 0x00000000) // CHECK-NEXT: ('r_type', 0x00000002) // CHECK-NEXT: ), +// Relocation 13 (zed at NTPOFF) is of type R_386_TLS_LE and uses the symbol +// CHECK-NEXT: # Relocation 0x0000000d +// CHECK-NEXT: (('r_offset', 0x0000004e) +// CHECK-NEXT: ('r_sym', 0x00000004) +// CHECK-NEXT: ('r_type', 0x00000011) +// CHECK-NEXT: ), .text bar: @@ -129,6 +145,11 @@ leal foo at TLSLDM(%ebx), %eax leal foo at DTPOFF(%eax), %edx calll 4096 + movl zed at NTPOFF(%eax), %eax + + .section zedsec,"awT", at progbits +zed: + .long 0 .section .rodata.str1.16,"aMS", at progbits,1 .Lfoo: From zwarich at apple.com Wed Nov 24 13:37:21 2010 From: zwarich at apple.com (Cameron Zwarich) Date: Wed, 24 Nov 2010 14:37:21 -0500 Subject: [llvm-commits] Review request: dominance frontier computation speedup In-Reply-To: <687E61DC-1376-4B6C-BA15-BCB4CC97D116@2pi.dk> References: <6AB43A0F-285B-4592-BBCB-9EA7061BD105@apple.com> <5B462C62-0B5C-4F13-8DDA-DC10D2BA0B4F@2pi.dk> <13C5FDF0-97C1-48A0-B38A-E8F9A47ED0EF@apple.com> <687E61DC-1376-4B6C-BA15-BCB4CC97D116@2pi.dk> Message-ID: <18FA21BD-2B0C-4987-98AC-22A565DE1A13@apple.com> On Nov 24, 2010, at 12:44 PM, Jakob Stoklund Olesen wrote: > On Nov 23, 2010, at 11:34 PM, Cameron Zwarich wrote: > >> On 2010-11-23, at 11:16 PM, Jakob Stoklund Olesen wrote: >> >>> On Nov 23, 2010, at 9:27 PM, Cameron Zwarich wrote: >>> >>>> There aren't very many good use cases for std::set. Most dominance frontiers are small, so a SmallPtrSet seemed like a good choice. I experimented with different small values of the inline capacity and found that 2 was best for performance. >>> >>> Does the majority of sets really have only 2 or less members? Otherwise, a DenseSet might be better. >> >> I didn't take any stats, but on the same benchmark using DenseSet is more than 2x slower. > > Probably because each set mallocs. > > On second thought, I am not so sure it is a good idea to replace std::set here. The dominance frontier data structure has quadratic size, and this change could blow up the constant factor. > > When a SmallPtrSet overflows its 'small' size, it allocates space for 128 pointers. That uses more memory than a std::set for up to 32 entries which is probably most cases. I wouldn't have guessed that the jump was so drastic. Could it be controlled with a template parameter? I can run some stats to guess a good value. I also noticed that there is an extra pointer wasted for SmallStorage: /// SmallStorage - Fixed size storage used in 'small mode'. The extra element /// ensures that the end iterator actually points to valid memory. const void *SmallStorage[SmallSizePowTwo+1]; Isn't a pointer to 1 past valid memory valid for comparisons in C++? Nothing should be dereferencing it. > Actually, I think Chris wants to get rid of dominance frontiers entirely because of the memory requirements. Yeah, Chris mentioned this and I have started looking at some other phi placement algorithms, at least for cases other than the first SRoA / mem2reg. I just want a fair comparison so I am speeding up dominance frontiers first. Cameron From bigcheesegs at gmail.com Wed Nov 24 13:35:15 2010 From: bigcheesegs at gmail.com (Michael J. Spencer) Date: Wed, 24 Nov 2010 19:35:15 -0000 Subject: [llvm-commits] [llvm] r120105 - /llvm/trunk/unittests/System/Makefile Message-ID: <20101124193515.D0E0A2A6C12C@llvm.org> Author: mspencer Date: Wed Nov 24 13:35:15 2010 New Revision: 120105 URL: http://llvm.org/viewvc/llvm-project?rev=120105&view=rev Log: google test depends on Support. Modified: llvm/trunk/unittests/System/Makefile Modified: llvm/trunk/unittests/System/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/System/Makefile?rev=120105&r1=120104&r2=120105&view=diff ============================================================================== --- llvm/trunk/unittests/System/Makefile (original) +++ llvm/trunk/unittests/System/Makefile Wed Nov 24 13:35:15 2010 @@ -9,7 +9,7 @@ LEVEL = ../.. TESTNAME = System -LINK_COMPONENTS := system +LINK_COMPONENTS := system support include $(LEVEL)/Makefile.config include $(LLVM_SRC_ROOT)/unittests/Makefile.unittest From bigcheesegs at gmail.com Wed Nov 24 14:07:14 2010 From: bigcheesegs at gmail.com (Michael J. Spencer) Date: Wed, 24 Nov 2010 20:07:14 -0000 Subject: [llvm-commits] [llvm] r120111 - /llvm/trunk/include/llvm/System/PathV2.h Message-ID: <20101124200714.E798C2A6C12C@llvm.org> Author: mspencer Date: Wed Nov 24 14:07:14 2010 New Revision: 120111 URL: http://llvm.org/viewvc/llvm-project?rev=120111&view=rev Log: 80 col. Modified: llvm/trunk/include/llvm/System/PathV2.h Modified: llvm/trunk/include/llvm/System/PathV2.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/System/PathV2.h?rev=120111&r1=120110&r2=120111&view=diff ============================================================================== --- llvm/trunk/include/llvm/System/PathV2.h (original) +++ llvm/trunk/include/llvm/System/PathV2.h Wed Nov 24 14:07:14 2010 @@ -122,7 +122,8 @@ /// prepended. /// @returns errc::success if \a path's extension has been replaced, otherwise a /// platform specific error_code. -error_code replace_extension(SmallVectorImpl &path, const Twine &extension); +error_code replace_extension(SmallVectorImpl &path, + const Twine &extension); /// @brief Append to path. /// @@ -794,7 +795,8 @@ /// \a path. /// @results errc::success if result has been successfully set, otherwise a /// platform specific error_code. -error_code get_magic(const Twine &path, uint32_t len, SmallVectorImpl &result); +error_code get_magic(const Twine &path, uint32_t len, + SmallVectorImpl &result); /// @brief Is file bitcode? /// From stoklund at 2pi.dk Wed Nov 24 14:21:35 2010 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Wed, 24 Nov 2010 12:21:35 -0800 Subject: [llvm-commits] Review request: dominance frontier computation speedup In-Reply-To: <18FA21BD-2B0C-4987-98AC-22A565DE1A13@apple.com> References: <6AB43A0F-285B-4592-BBCB-9EA7061BD105@apple.com> <5B462C62-0B5C-4F13-8DDA-DC10D2BA0B4F@2pi.dk> <13C5FDF0-97C1-48A0-B38A-E8F9A47ED0EF@apple.com> <687E61DC-1376-4B6C-BA15-BCB4CC97D116@2pi.dk> <18FA21BD-2B0C-4987-98AC-22A565DE1A13@apple.com> Message-ID: <7E13A27D-DB01-446C-A716-CA92F31E9D2B@2pi.dk> On Nov 24, 2010, at 11:37 AM, Cameron Zwarich wrote: > On Nov 24, 2010, at 12:44 PM, Jakob Stoklund Olesen wrote: > >> When a SmallPtrSet overflows its 'small' size, it allocates space for 128 pointers. That uses more memory than a std::set for up to 32 entries which is probably most cases. > > I wouldn't have guessed that the jump was so drastic. Could it be controlled with a template parameter? I can run some stats to guess a good value. This is actually in the non-templated SmallPtrSetImpl::Grow function. I don't know which method was used to arrive at the number 128. The Small* classes are actually not designed to be compact despite the name. They are designed to work well as stack objects, avoiding malloc for typical loads. Presumably, the large initial size was chosen to avoid multiple reallocations and re-hashings as the set grows. When a SmallPtrSet is used as a one-off stack object, that is the right thing to do. A further concern is that the dominance frontier algorithm erases elements from the sets, so they are likely to be over-allocated anyway. Perhaps there exists a third data structure that would be both compact and fast? Is it necessary to be able to enumerate a node's dominance frontier? Is it enough to be able to answer "Is A in the dominance frontier of B?" > I also noticed that there is an extra pointer wasted for SmallStorage: > > /// SmallStorage - Fixed size storage used in 'small mode'. The extra element > /// ensures that the end iterator actually points to valid memory. > const void *SmallStorage[SmallSizePowTwo+1]; > > Isn't a pointer to 1 past valid memory valid for comparisons in C++? Nothing should be dereferencing it. Author: Duncan Sands Date: Tue Jun 29 13:12:02 2010 Fix a buffer overflow noticed by gcc-4.6: zero is written into SmallArray[SmallSize] in the SmallPtrSetIteratorImpl, and this is one off the end of the array. For those who care, right now gcc warns about writing off the end because it is confused about the declaration of SmallArray as having length 1 in the parent class SmallPtrSetIteratorImpl. However if you tweak code to unconfuse it, then it still warns about writing off the end of the array, because of this buffer overflow. In short, even with this fix gcc-4.6 will warn about writing off the end of the array, but now that is only because it is confused. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk at 107200 91177308-0d34-0410-b5e6-96231b3b80d8 diff --git a/include/llvm/ADT/SmallPtrSet.h b/include/llvm/ADT/SmallPtrSet.h index 48637f3..f1405fa 100644 --- a/include/llvm/ADT/SmallPtrSet.h +++ b/include/llvm/ADT/SmallPtrSet.h @@ -233,7 +233,7 @@ template class SmallPtrSet : public SmallPtrSetImpl { // Make sure that SmallSize is a power of two, round up if not. enum { SmallSizePowTwo = NextPowerOfTwo::Val }; - void *SmallArray[SmallSizePowTwo]; + void *SmallArray[SmallSizePowTwo+1]; typedef PointerLikeTypeTraits PtrTraits; public: SmallPtrSet() : SmallPtrSetImpl(SmallSizePowTwo) {} > >> Actually, I think Chris wants to get rid of dominance frontiers entirely because of the memory requirements. > > Yeah, Chris mentioned this and I have started looking at some other phi placement algorithms, at least for cases other than the first SRoA / mem2reg. I just want a fair comparison so I am speeding up dominance frontiers first. > > Cameron -------------- next part -------------- A non-text attachment was scrubbed... Name: smime.p7s Type: application/pkcs7-signature Size: 1929 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101124/7a739d4e/attachment.bin From zwarich at apple.com Wed Nov 24 15:21:09 2010 From: zwarich at apple.com (Cameron Zwarich) Date: Wed, 24 Nov 2010 16:21:09 -0500 Subject: [llvm-commits] Review request: dominance frontier computation speedup In-Reply-To: <7E13A27D-DB01-446C-A716-CA92F31E9D2B@2pi.dk> References: <6AB43A0F-285B-4592-BBCB-9EA7061BD105@apple.com> <5B462C62-0B5C-4F13-8DDA-DC10D2BA0B4F@2pi.dk> <13C5FDF0-97C1-48A0-B38A-E8F9A47ED0EF@apple.com> <687E61DC-1376-4B6C-BA15-BCB4CC97D116@2pi.dk> <18FA21BD-2B0C-4987-98AC-22A565DE1A13@apple.com> <7E13A27D-DB01-446C-A716-CA92F31E9D2B@2pi.dk> Message-ID: <8767AA9A-97F8-464E-9B3E-2FAB0310E58F@apple.com> On Nov 24, 2010, at 3:21 PM, Jakob Stoklund Olesen wrote: > This is actually in the non-templated SmallPtrSetImpl::Grow function. > > I don't know which method was used to arrive at the number 128. The Small* classes are actually not designed to be compact despite the name. They are designed to work well as stack objects, avoiding malloc for typical loads. > > Presumably, the large initial size was chosen to avoid multiple reallocations and re-hashings as the set grows. When a SmallPtrSet is used as a one-off stack object, that is the right thing to do. We could template it to add this parameter, so the common case can be shared, but that's probably not a great idea. > A further concern is that the dominance frontier algorithm erases elements from the sets, so they are likely to be over-allocated anyway. It's only DominanceFrontier::splitBlock() that erases elements from sets. The actual DF computation doesn't erase any elements. > Perhaps there exists a third data structure that would be both compact and fast? Is it necessary to be able to enumerate a node's dominance frontier? Is it enough to be able to answer "Is A in the dominance frontier of B?" Both the IDF algorithm and RegionInfo need to iterate over the elements of DFs. It would be nice to use SmallSet instead, though. >> I also noticed that there is an extra pointer wasted for SmallStorage: >> >> /// SmallStorage - Fixed size storage used in 'small mode'. The extra element >> /// ensures that the end iterator actually points to valid memory. >> const void *SmallStorage[SmallSizePowTwo+1]; >> >> Isn't a pointer to 1 past valid memory valid for comparisons in C++? Nothing should be dereferencing it. > > Author: Duncan Sands > Date: Tue Jun 29 13:12:02 2010 > > Fix a buffer overflow noticed by gcc-4.6: zero is written into > SmallArray[SmallSize] in the SmallPtrSetIteratorImpl, and this is > one off the end of the array. For those who care, right now gcc > warns about writing off the end because it is confused about the > declaration of SmallArray as having length 1 in the parent class > SmallPtrSetIteratorImpl. However if you tweak code to unconfuse > it, then it still warns about writing off the end of the array, > because of this buffer overflow. In short, even with this fix > gcc-4.6 will warn about writing off the end of the array, but now > that is only because it is confused. I see. I guess it's probably not worth eliminating that. Cameron From rafael.espindola at gmail.com Wed Nov 24 15:57:39 2010 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Wed, 24 Nov 2010 21:57:39 -0000 Subject: [llvm-commits] [llvm] r120121 - in /llvm/trunk: lib/MC/ELFObjectWriter.cpp lib/MC/MCParser/ELFAsmParser.cpp test/MC/ELF/relocation-386.s Message-ID: <20101124215739.7B5822A6C12C@llvm.org> Author: rafael Date: Wed Nov 24 15:57:39 2010 New Revision: 120121 URL: http://llvm.org/viewvc/llvm-project?rev=120121&view=rev Log: Behave a bit more like gnu as and use the symbol (instead of the section) for any relocation to a symbol defined in a tls section. Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp llvm/trunk/lib/MC/MCParser/ELFAsmParser.cpp llvm/trunk/test/MC/ELF/relocation-386.s Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/ELFObjectWriter.cpp?rev=120121&r1=120120&r2=120121&view=diff ============================================================================== --- llvm/trunk/lib/MC/ELFObjectWriter.cpp (original) +++ llvm/trunk/lib/MC/ELFObjectWriter.cpp Wed Nov 24 15:57:39 2010 @@ -718,10 +718,17 @@ const MCSectionELF &Section = static_cast(ASymbol.getSection()); + const SectionKind secKind = Section.getKind(); - if (Section.getKind().isBSS()) + if (secKind.isBSS()) return NULL; + if (secKind.isThreadLocal()) { + if (Renamed) + return Renamed; + return &Symbol; + } + MCSymbolRefExpr::VariantKind Kind = Target.getSymA()->getKind(); const MCSectionELF &Sec2 = static_cast(F.getParent()->getSection()); @@ -729,8 +736,7 @@ if (&Sec2 != &Section && (Kind == MCSymbolRefExpr::VK_PLT || Kind == MCSymbolRefExpr::VK_GOTPCREL || - Kind == MCSymbolRefExpr::VK_GOTOFF || - Kind == MCSymbolRefExpr::VK_NTPOFF)) { + Kind == MCSymbolRefExpr::VK_GOTOFF)) { if (Renamed) return Renamed; return &Symbol; Modified: llvm/trunk/lib/MC/MCParser/ELFAsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCParser/ELFAsmParser.cpp?rev=120121&r1=120120&r2=120121&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCParser/ELFAsmParser.cpp (original) +++ llvm/trunk/lib/MC/MCParser/ELFAsmParser.cpp Wed Nov 24 15:57:39 2010 @@ -193,6 +193,14 @@ return false; } +static SectionKind computeSectionKind(unsigned Flags) { + if (Flags & MCSectionELF::SHF_EXECINSTR) + return SectionKind::getText(); + if (Flags & MCSectionELF::SHF_TLS) + return SectionKind::getThreadData(); + return SectionKind::getDataRel(); +} + // FIXME: This is a work in progress. bool ELFAsmParser::ParseDirectiveSection(StringRef, SMLoc) { StringRef SectionName; @@ -322,9 +330,7 @@ return TokError("unknown section type"); } - SectionKind Kind = (Flags & MCSectionELF::SHF_EXECINSTR) - ? SectionKind::getText() - : SectionKind::getDataRel(); + SectionKind Kind = computeSectionKind(Flags); getStreamer().SwitchSection(getContext().getELFSection(SectionName, Type, Flags, Kind, Size, GroupName)); Modified: llvm/trunk/test/MC/ELF/relocation-386.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/relocation-386.s?rev=120121&r1=120120&r2=120121&view=diff ============================================================================== --- llvm/trunk/test/MC/ELF/relocation-386.s (original) +++ llvm/trunk/test/MC/ELF/relocation-386.s Wed Nov 24 15:57:39 2010 @@ -114,12 +114,66 @@ // CHECK-NEXT: ('r_sym', 0x00000000) // CHECK-NEXT: ('r_type', 0x00000002) // CHECK-NEXT: ), -// Relocation 13 (zed at NTPOFF) is of type R_386_TLS_LE and uses the symbol +// Relocation 13 (zed at GOT) is of type R_386_GOT32 and uses the symbol // CHECK-NEXT: # Relocation 0x0000000d // CHECK-NEXT: (('r_offset', 0x0000004e) // CHECK-NEXT: ('r_sym', 0x00000004) +// CHECK-NEXT: ('r_type', 0x00000003) +// CHECK-NEXT: ), +// Relocation 14 (zed at GOTOFF) is of type R_386_GOTOFF and uses the symbol +// CHECK-NEXT: # Relocation 0x0000000e +// CHECK-NEXT: (('r_offset', 0x00000054) +// CHECK-NEXT: ('r_sym', 0x00000004) +// CHECK-NEXT: ('r_type', 0x00000009) +// CHECK-NEXT: ), +// Relocation 15 (zed at INDNTPOFF) is of type R_386_TLS_IE and uses the symbol +// CHECK-NEXT: # Relocation 0x0000000f +// CHECK-NEXT: (('r_offset', 0x0000005a) +// CHECK-NEXT: ('r_sym', 0x00000004) +// CHECK-NEXT: ('r_type', 0x0000000f) +// CHECK-NEXT: ), +// Relocation 16 (zed at NTPOFF) is of type R_386_TLS_LE and uses the symbol +// CHECK-NEXT: # Relocation 0x00000010 +// CHECK-NEXT: (('r_offset', 0x00000060) +// CHECK-NEXT: ('r_sym', 0x00000004) // CHECK-NEXT: ('r_type', 0x00000011) // CHECK-NEXT: ), +// Relocation 17 (zed at GOTNTPOFF) is of type R_386_TLS_GOTIE and uses the symbol +// CHECK-NEXT: # Relocation 0x00000011 +// CHECK-NEXT: (('r_offset', 0x00000066) +// CHECK-NEXT: ('r_sym', 0x00000004) +// CHECK-NEXT: ('r_type', 0x00000010) +// CHECK-NEXT: ), +// Relocation 18 (zed at PLT) is of type R_386_PLT32 and uses the symbol +// CHECK-NEXT: # Relocation 0x00000012 +// CHECK-NEXT: (('r_offset', 0x0000006b) +// CHECK-NEXT: ('r_sym', 0x00000004) +// CHECK-NEXT: ('r_type', 0x00000004) +// CHECK-NEXT: ), +// Relocation 19 (zed at TLSGD) is of type R_386_TLS_GD and uses the symbol +// CHECK-NEXT: # Relocation 0x00000013 +// CHECK-NEXT: (('r_offset', 0x00000071) +// CHECK-NEXT: ('r_sym', 0x00000004) +// CHECK-NEXT: ('r_type', 0x00000012) +// CHECK-NEXT: ), +// Relocation 20 (zed at TLSLDM) is of type R_386_TLS_LDM and uses the symbol +// CHECK-NEXT: # Relocation 0x00000014 +// CHECK-NEXT: (('r_offset', 0x00000077) +// CHECK-NEXT: ('r_sym', 0x00000004) +// CHECK-NEXT: ('r_type', 0x00000013) +// CHECK-NEXT: ), +// Relocation 21 (zed at TPOFF) is of type R_386_TLS_LE_32 and uses the symbol +// CHECK-NEXT:# Relocation 0x00000015 +// CHECK-NEXT: (('r_offset', 0x0000007d) +// CHECK-NEXT: ('r_sym', 0x00000004) +// CHECK-NEXT: ('r_type', 0x00000022) +// CHECK-NEXT: ), +// Relocation 22 (zed at DTPOFF) is of type R_386_TLS_LDO_32 and uses the symbol +// CHECK-NEXT: Relocation 0x00000016 +// CHECK-NEXT: (('r_offset', 0x00000083) +// CHECK-NEXT: ('r_sym', 0x00000004) +// CHECK-NEXT: ('r_type', 0x00000020) +// CHECK-NEXT: ), .text bar: @@ -145,7 +199,16 @@ leal foo at TLSLDM(%ebx), %eax leal foo at DTPOFF(%eax), %edx calll 4096 + movl zed at GOT(%eax), %eax + movl zed at GOTOFF(%eax), %eax + movl zed at INDNTPOFF(%eax), %eax movl zed at NTPOFF(%eax), %eax + movl zed at GOTNTPOFF(%eax), %eax + call zed at PLT + movl zed at TLSGD(%eax), %eax + movl zed at TLSLDM(%eax), %eax + movl zed at TPOFF(%eax), %eax + movl zed at DTPOFF(%eax), %eax .section zedsec,"awT", at progbits zed: From nicholas at mxc.ca Wed Nov 24 16:04:20 2010 From: nicholas at mxc.ca (Nick Lewycky) Date: Wed, 24 Nov 2010 22:04:20 -0000 Subject: [llvm-commits] [llvm] r120126 - in /llvm/trunk: lib/Transforms/Scalar/ScalarReplAggregates.cpp test/Transforms/ScalarRepl/2010-11-24-IndirectVoid.ll Message-ID: <20101124220420.C8DDA2A6C12C@llvm.org> Author: nicholas Date: Wed Nov 24 16:04:20 2010 New Revision: 120126 URL: http://llvm.org/viewvc/llvm-project?rev=120126&view=rev Log: Treat a call of function pointer like a load of the pointer when considering whether the pointer can be replaced with the global variable it is a copy of. Fixes PR8680. Added: llvm/trunk/test/Transforms/ScalarRepl/2010-11-24-IndirectVoid.ll Modified: llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp Modified: llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp?rev=120126&r1=120125&r2=120126&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp Wed Nov 24 16:04:20 2010 @@ -1783,7 +1783,7 @@ /// see any stores or other unknown uses. If we see pointer arithmetic, keep /// track of whether it moves the pointer (with isOffset) but otherwise traverse /// the uses. If we see a memcpy/memmove that targets an unoffseted pointer to -/// the alloca, and if the source pointer is a pointer to a constant global, we +/// the alloca, and if the source pointer is a pointer to a constant global, we /// can optimize this. static bool isOnlyCopiedFromConstantGlobal(Value *V, MemTransferInst *&TheCopy, bool isOffset) { @@ -1816,6 +1816,11 @@ // load and we can ignore it. if (CS.onlyReadsMemory()) continue; + + // If this is the function being called then we treat it like a load and + // ignore it. + if (CS.isCallee(UI)) + continue; // If this is being passed as a byval argument, the caller is making a // copy, so it is only a read of the alloca. Added: llvm/trunk/test/Transforms/ScalarRepl/2010-11-24-IndirectVoid.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/ScalarRepl/2010-11-24-IndirectVoid.ll?rev=120126&view=auto ============================================================================== --- llvm/trunk/test/Transforms/ScalarRepl/2010-11-24-IndirectVoid.ll (added) +++ llvm/trunk/test/Transforms/ScalarRepl/2010-11-24-IndirectVoid.ll Wed Nov 24 16:04:20 2010 @@ -0,0 +1,13 @@ +; RUN: opt -scalarrepl -disable-output %s +; PR8680 + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" + +define void @main() nounwind { +entry: + %memtmp = alloca i32, align 4 + %0 = bitcast i32* %memtmp to void ()* + call void %0() nounwind + ret void +} + From bigcheesegs at gmail.com Wed Nov 24 19:54:00 2010 From: bigcheesegs at gmail.com (Michael J. Spencer) Date: Thu, 25 Nov 2010 01:54:00 -0000 Subject: [llvm-commits] [llvm] r120139 - /llvm/trunk/include/llvm/System/system_error.h Message-ID: <20101125015400.1F87D2A6C12C@llvm.org> Author: mspencer Date: Wed Nov 24 19:53:59 2010 New Revision: 120139 URL: http://llvm.org/viewvc/llvm-project?rev=120139&view=rev Log: system_error: Even more unsupported error numbers :(. Modified: llvm/trunk/include/llvm/System/system_error.h Modified: llvm/trunk/include/llvm/System/system_error.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/System/system_error.h?rev=120139&r1=120138&r2=120139&view=diff ============================================================================== --- llvm/trunk/include/llvm/System/system_error.h (original) +++ llvm/trunk/include/llvm/System/system_error.h Wed Nov 24 19:53:59 2010 @@ -506,7 +506,11 @@ argument_out_of_domain = EDOM, bad_address = EFAULT, bad_file_descriptor = EBADF, +#ifdef EBADMSG bad_message = EBADMSG, +#else + bad_message = EINVAL, +#endif broken_pipe = EPIPE, connection_aborted = ECONNABORTED, connection_already_in_progress = EALREADY, @@ -536,7 +540,11 @@ network_unreachable = ENETUNREACH, no_buffer_space = ENOBUFS, no_child_process = ECHILD, +#ifdef ENOLINK no_link = ENOLINK, +#else + no_link = EINVAL, +#endif no_lock_available = ENOLCK, #ifdef ENODATA no_message_available = ENODATA, @@ -580,7 +588,11 @@ owner_dead = EINVAL, #endif permission_denied = EACCES, +#ifdef EPROTO protocol_error = EPROTO, +#else + protocol_error = EINVAL, +#endif protocol_not_supported = EPROTONOSUPPORT, read_only_file_system = EROFS, resource_deadlock_would_occur = EDEADLK, From dberlin at dberlin.org Wed Nov 24 22:04:49 2010 From: dberlin at dberlin.org (Daniel Berlin) Date: Wed, 24 Nov 2010 23:04:49 -0500 Subject: [llvm-commits] Review request: dominance frontier computation speedup In-Reply-To: <5B462C62-0B5C-4F13-8DDA-DC10D2BA0B4F@2pi.dk> References: <6AB43A0F-285B-4592-BBCB-9EA7061BD105@apple.com> <5B462C62-0B5C-4F13-8DDA-DC10D2BA0B4F@2pi.dk> Message-ID: On Wed, Nov 24, 2010 at 2:16 AM, Jakob Stoklund Olesen wrote: > > On Nov 23, 2010, at 9:27 PM, Cameron Zwarich wrote: > > > There aren't very many good use cases for std::set. Most dominance > frontiers are small, so a SmallPtrSet seemed like a good choice. I > experimented with different small values of the inline capacity and found > that 2 was best for performance. > > Does the majority of sets really have only 2 or less members? Otherwise, a > DenseSet might be better. > Dominance frontiers for each CFG node tend to be quite small in most CFG's. Remember that the the dominance frontier of node N is the set of nodes that n dominates an immediate predecessor of, but not that node itself. IE the set of nodes where n's dominance stops. The common case of this is a merge point in the CFG. Most merge points only have two predecessors, and thus, the max set size of the dominance frontier is usually 2. You can probably get a good guess at max size by using the maximum number of incoming edges any node has, though in theory the dominance frontier for a given CFG node could contain every other CFG node minus some constant factor (Without thinking too hard, i believe you can achieve this with a really large switch statement being the only thing in the function). --Dan -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101124/7409c62a/attachment.html From rafael.espindola at gmail.com Thu Nov 25 09:32:57 2010 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Thu, 25 Nov 2010 15:32:57 -0000 Subject: [llvm-commits] [llvm] r120145 - in /llvm/trunk: lib/MC/MCParser/ELFAsmParser.cpp test/MC/ELF/section.s Message-ID: <20101125153257.23AA72A6C12C@llvm.org> Author: rafael Date: Thu Nov 25 09:32:56 2010 New Revision: 120145 URL: http://llvm.org/viewvc/llvm-project?rev=120145&view=rev Log: Factor some code to parseSectionFlags and fix the default type of a section. Modified: llvm/trunk/lib/MC/MCParser/ELFAsmParser.cpp llvm/trunk/test/MC/ELF/section.s Modified: llvm/trunk/lib/MC/MCParser/ELFAsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCParser/ELFAsmParser.cpp?rev=120145&r1=120144&r2=120145&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCParser/ELFAsmParser.cpp (original) +++ llvm/trunk/lib/MC/MCParser/ELFAsmParser.cpp Thu Nov 25 09:32:56 2010 @@ -201,6 +201,46 @@ return SectionKind::getDataRel(); } +static int parseSectionFlags(StringRef flagsStr) { + int flags = 0; + + for (unsigned i = 0; i < flagsStr.size(); i++) { + switch (flagsStr[i]) { + case 'a': + flags |= MCSectionELF::SHF_ALLOC; + break; + case 'x': + flags |= MCSectionELF::SHF_EXECINSTR; + break; + case 'w': + flags |= MCSectionELF::SHF_WRITE; + break; + case 'M': + flags |= MCSectionELF::SHF_MERGE; + break; + case 'S': + flags |= MCSectionELF::SHF_STRINGS; + break; + case 'T': + flags |= MCSectionELF::SHF_TLS; + break; + case 'c': + flags |= MCSectionELF::XCORE_SHF_CP_SECTION; + break; + case 'd': + flags |= MCSectionELF::XCORE_SHF_DP_SECTION; + break; + case 'G': + flags |= MCSectionELF::SHF_GROUP; + break; + default: + return -1; + } + } + + return flags; +} + // FIXME: This is a work in progress. bool ELFAsmParser::ParseDirectiveSection(StringRef, SMLoc) { StringRef SectionName; @@ -208,21 +248,34 @@ if (ParseSectionName(SectionName)) return TokError("expected identifier in directive"); - StringRef FlagsStr; StringRef TypeName; int64_t Size = 0; StringRef GroupName; + unsigned Flags = 0; + + // Set the defaults first. + if (SectionName == ".fini" || SectionName == ".init" || + SectionName == ".rodata") + Flags |= MCSectionELF::SHF_ALLOC; + if (SectionName == ".fini" || SectionName == ".init") + Flags |= MCSectionELF::SHF_EXECINSTR; + if (getLexer().is(AsmToken::Comma)) { Lex(); if (getLexer().isNot(AsmToken::String)) return TokError("expected string in directive"); - FlagsStr = getTok().getStringContents(); + StringRef FlagsStr = getTok().getStringContents(); Lex(); - bool Mergeable = FlagsStr.find('M') != StringRef::npos; - bool Group = FlagsStr.find('G') != StringRef::npos; + int extraFlags = parseSectionFlags(FlagsStr); + if (extraFlags < 0) + return TokError("unknown flag"); + Flags |= extraFlags; + + bool Mergeable = Flags & MCSectionELF::SHF_MERGE; + bool Group = Flags & MCSectionELF::SHF_GROUP; if (getLexer().isNot(AsmToken::Comma)) { if (Mergeable) @@ -269,51 +322,7 @@ if (getLexer().isNot(AsmToken::EndOfStatement)) return TokError("unexpected token in directive"); - unsigned Flags = 0; - unsigned Type = MCSectionELF::SHT_NULL; - - // Set the defaults first. - if (SectionName == ".fini" || SectionName == ".init" || SectionName == ".rodata") { - Type = MCSectionELF::SHT_PROGBITS; - Flags |= MCSectionELF::SHF_ALLOC; - } - if (SectionName == ".fini" || SectionName == ".init") { - Flags |= MCSectionELF::SHF_EXECINSTR; - } - - for (unsigned i = 0; i < FlagsStr.size(); i++) { - switch (FlagsStr[i]) { - case 'a': - Flags |= MCSectionELF::SHF_ALLOC; - break; - case 'x': - Flags |= MCSectionELF::SHF_EXECINSTR; - break; - case 'w': - Flags |= MCSectionELF::SHF_WRITE; - break; - case 'M': - Flags |= MCSectionELF::SHF_MERGE; - break; - case 'S': - Flags |= MCSectionELF::SHF_STRINGS; - break; - case 'T': - Flags |= MCSectionELF::SHF_TLS; - break; - case 'c': - Flags |= MCSectionELF::XCORE_SHF_CP_SECTION; - break; - case 'd': - Flags |= MCSectionELF::XCORE_SHF_DP_SECTION; - break; - case 'G': - Flags |= MCSectionELF::SHF_GROUP; - break; - default: - return TokError("unknown flag"); - } - } + unsigned Type = MCSectionELF::SHT_PROGBITS; if (!TypeName.empty()) { if (TypeName == "init_array") Modified: llvm/trunk/test/MC/ELF/section.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/section.s?rev=120145&r1=120144&r2=120145&view=diff ============================================================================== --- llvm/trunk/test/MC/ELF/section.s (original) +++ llvm/trunk/test/MC/ELF/section.s Thu Nov 25 09:32:56 2010 @@ -17,6 +17,7 @@ .section .init .section .fini .section .rodata +.section zed, "" // CHECK: (('sh_name', 0x00000049) # '.init' // CHECK-NEXT: ('sh_type', 0x00000001) @@ -53,6 +54,18 @@ // CHECK-NEXT: ('sh_addralign', 0x00000001) // CHECK-NEXT: ('sh_entsize', 0x00000000) // CHECK-NEXT: ), +// CHECK-NEXT: # Section 0x0000000d +// CHECK-NEXT: (('sh_name', 0x0000005d) # 'zed' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000000) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000050) +// CHECK-NEXT: ('sh_size', 0x00000000) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000001) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ), // Test that we can parse these foo: From daniel at zuster.org Thu Nov 25 09:53:11 2010 From: daniel at zuster.org (Daniel Dunbar) Date: Thu, 25 Nov 2010 07:53:11 -0800 Subject: [llvm-commits] [PATCH] Object File Library In-Reply-To: References: Message-ID: I have no comments on the patches because I am too self centered to want to review them on vacation. :) However, I am going to be pushing in a bunch of libObject related stuff soonish, so it would be great if the stuff could land in TOT so that I can tie my stuff together with it. Even if you want review on some of the specific pieces, I would like it if you pushed in at least the stub structure for things like llvm-objdump so I can hang stuff on to them. - Daniel On Mon, Nov 22, 2010 at 5:00 PM, Michael Spencer wrote: > On Thu, Nov 11, 2010 at 9:23 PM, Michael Spencer wrote: >> Attached are updated patches to be reviewed. I've split them up into >> the generic API, the COFF and ELF implementations, tool changes, and >> tests. >> >> This does not currently implement the Serialization/Normalization >> split that I reference in my talk. I'm going to wait to do that split >> until the line is firmly defined, as I still haven't figured out how >> exactly to represent relocation data. >> >> A current major blocker that you can see throughout the ELF >> implementation (and ignored in COFF (which I knew much better and >> didn't need debugging help)) is how invalid object file errors are >> handled. I currently just call report_fatal_error, which is really not >> how they should be handled. I've been complaining about the same >> problem in the System library on IRC recently too while trying to >> clean up the Windows impl. >> >> What I would like to do is use an error object based on the concept of >> std::error_code to report both system (IO, memory, syscall), and >> "parsing" errors from invalid object files. This should also include >> at least the address in the file at which the error occurred. I don't >> feel that we need detailed (clang style :P) diagnostics because tools >> generate object files, not people. At the same time I don't want to >> just dump "object file invalid at 0xdeadbeef" to the user. Using >> 'std::error_category' would allow mixing the two while proving more >> detailed info such as "invalid symbol name string index at >> 0xblahblah". Also, each object file could use a custom error_category >> for special errors. It also allows clients that simply don't care to >> just check for success and not pay for message formatting. >> >> - Michael Spencer >> > > Pinging reviews on the rest of the patches (all but the first). > > - Michael Spencer > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > From benny.kra at googlemail.com Thu Nov 25 10:42:51 2010 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Thu, 25 Nov 2010 16:42:51 -0000 Subject: [llvm-commits] [llvm] r120146 - in /llvm/trunk/lib: CodeGen/RegAllocBasic.cpp Target/PowerPC/InstPrinter/PPCInstPrinter.cpp Message-ID: <20101125164251.C6D412A6C12C@llvm.org> Author: d0k Date: Thu Nov 25 10:42:51 2010 New Revision: 120146 URL: http://llvm.org/viewvc/llvm-project?rev=120146&view=rev Log: Namespacify. Modified: llvm/trunk/lib/CodeGen/RegAllocBasic.cpp llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp Modified: llvm/trunk/lib/CodeGen/RegAllocBasic.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocBasic.cpp?rev=120146&r1=120145&r2=120146&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/RegAllocBasic.cpp (original) +++ llvm/trunk/lib/CodeGen/RegAllocBasic.cpp Thu Nov 25 10:42:51 2010 @@ -56,6 +56,8 @@ VerifyRegAlloc("verify-regalloc", cl::desc("Verify live intervals before renaming")); +namespace { + class PhysicalRegisterDescription : public AbstractRegisterDescription { const TargetRegisterInfo *tri_; public: @@ -63,8 +65,6 @@ virtual const char *getName(unsigned reg) const { return tri_->getName(reg); } }; -namespace { - /// RABasic provides a minimal implementation of the basic register allocation /// algorithm. It prioritizes live virtual registers by spill weight and spills /// whenever a register is unavailable. This is not practical in production but Modified: llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp?rev=120146&r1=120145&r2=120146&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp Thu Nov 25 10:42:51 2010 @@ -222,7 +222,7 @@ /// stripRegisterPrefix - This method strips the character prefix from a /// register name so that only the number is left. Used by for linux asm. -const char *stripRegisterPrefix(const char *RegName) { +static const char *stripRegisterPrefix(const char *RegName) { switch (RegName[0]) { case 'r': case 'f': From rafael.espindola at gmail.com Thu Nov 25 11:14:16 2010 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Thu, 25 Nov 2010 17:14:16 -0000 Subject: [llvm-commits] [llvm] r120147 - in /llvm/trunk: lib/Target/X86/X86AsmBackend.cpp test/MC/MachO/x86_32-optimal_nop.s Message-ID: <20101125171416.39CB62A6C12E@llvm.org> Author: rafael Date: Thu Nov 25 11:14:16 2010 New Revision: 120147 URL: http://llvm.org/viewvc/llvm-project?rev=120147&view=rev Log: Use multiple 0x66 prefixes so that all nops up to 15 bytes are a single instruction. Modified: llvm/trunk/lib/Target/X86/X86AsmBackend.cpp llvm/trunk/test/MC/MachO/x86_32-optimal_nop.s Modified: llvm/trunk/lib/Target/X86/X86AsmBackend.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86AsmBackend.cpp?rev=120147&r1=120146&r2=120147&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86AsmBackend.cpp (original) +++ llvm/trunk/lib/Target/X86/X86AsmBackend.cpp Thu Nov 25 11:14:16 2010 @@ -211,10 +211,8 @@ /// WriteNopData - Write optimal nops to the output file for the \arg Count /// bytes. This returns the number of bytes written. It may return 0 if /// the \arg Count is more than the maximum optimal nops. -/// -/// FIXME this is X86 32-bit specific and should move to a better place. bool X86AsmBackend::WriteNopData(uint64_t Count, MCObjectWriter *OW) const { - static const uint8_t Nops[16][16] = { + static const uint8_t Nops[10][10] = { // nop {0x90}, // xchg %ax,%ax @@ -235,30 +233,16 @@ {0x66, 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00}, // nopw %cs:0L(%[re]ax,%[re]ax,1) {0x66, 0x2e, 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00}, - // nopw %cs:0L(%[re]ax,%[re]ax,1) - {0x66, 0x66, 0x2e, 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00}, - // nopw 0(%[re]ax,%[re]ax,1) - // nopw 0(%[re]ax,%[re]ax,1) - {0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00, - 0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00}, - // nopw 0(%[re]ax,%[re]ax,1) - // nopl 0L(%[re]ax) */ - {0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00, - 0x0f, 0x1f, 0x80, 0x00, 0x00, 0x00, 0x00}, - // nopl 0L(%[re]ax) - // nopl 0L(%[re]ax) - {0x0f, 0x1f, 0x80, 0x00, 0x00, 0x00, 0x00, - 0x0f, 0x1f, 0x80, 0x00, 0x00, 0x00, 0x00}, - // nopl 0L(%[re]ax) - // nopl 0L(%[re]ax,%[re]ax,1) - {0x0f, 0x1f, 0x80, 0x00, 0x00, 0x00, 0x00, - 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00} }; // Write an optimal sequence for the first 15 bytes. - uint64_t OptimalCount = (Count < 16) ? Count : 15; - for (uint64_t i = 0, e = OptimalCount; i != e; i++) - OW->Write8(Nops[OptimalCount - 1][i]); + const uint64_t OptimalCount = (Count < 16) ? Count : 15; + const uint64_t Prefixes = OptimalCount <= 10 ? 0 : OptimalCount - 10; + for (uint64_t i = 0, e = Prefixes; i != e; i++) + OW->Write8(0x66); + const uint64_t Rest = OptimalCount - Prefixes; + for (uint64_t i = 0, e = Rest; i != e; i++) + OW->Write8(Nops[Rest - 1][i]); // Finish with single byte nops. for (uint64_t i = OptimalCount, e = Count; i != e; ++i) Modified: llvm/trunk/test/MC/MachO/x86_32-optimal_nop.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/MachO/x86_32-optimal_nop.s?rev=120147&r1=120146&r2=120147&view=diff ============================================================================== --- llvm/trunk/test/MC/MachO/x86_32-optimal_nop.s (original) +++ llvm/trunk/test/MC/MachO/x86_32-optimal_nop.s Thu Nov 25 11:14:16 2010 @@ -192,7 +192,7 @@ // CHECK: ), // CHECK: ('_relocations', [ // CHECK: ]) -// CHECK: ('_section_data', 'c390c300 00000000 00000000 00000000 c3c36690 c3000000 00000000 00000000 c30f1f00 c3000000 00000000 00000000 c3c3c3c3 0f1f4000 c3000000 00000000 c3c3c30f 1f440000 c3000000 00000000 c3c3660f 1f440000 c3000000 00000000 c30f1f80 00000000 c3000000 00000000 c3c3c3c3 c3c3c3c3 c3000000 00000000 c3c3c3c3 c3c3c366 0f1f8400 00000000 c3000000 00000000 00000000 00000000 c3c3c3c3 c3c3c366 0f1f8400 00000000 c3000000 00000000 00000000 00000000 c3c3c3c3 c366662e 0f1f8400 00000000 c3000000 00000000 00000000 00000000 c3c3c3c3 660f1f44 0000660f 1f440000 c3000000 00000000 00000000 00000000 c3c3c366 0f1f4400 000f1f80 00000000 c3000000 00000000 00000000 00000000 c3c30f1f 80000000 000f1f80 00000000 c3000000 00000000 00000000 00000000 c30f1f80 00000000 0f1f8400 00000000 c3') +// CHECK: ('_section_data', 'c390c300 00000000 00000000 00000000 c3c36690 c3000000 00000000 00000000 c30f1f00 c3000000 00000000 00000000 c3c3c3c3 0f1f4000 c3000000 00000000 c3c3c30f 1f440000 c3000000 00000000 c3c3660f 1f440000 c3000000 00000000 c30f1f80 00000000 c3000000 00000000 c3c3c3c3 c3c3c3c3 c3000000 00000000 c3c3c3c3 c3c3c366 0f1f8400 00000000 c3000000 00000000 00000000 00000000 c3c3c3c3 c3c3c366 0f1f8400 00000000 c3000000 00000000 00000000 00000000 c3c3c3c3 c366662e 0f1f8400 00000000 c3000000 00000000 00000000 00000000 c3c3c3c3 6666662e 0f1f8400 00000000 c3000000 00000000 00000000 00000000 c3c3c366 6666662e 0f1f8400 00000000 c3000000 00000000 00000000 00000000 c3c36666 6666662e 0f1f8400 00000000 c3000000 00000000 00000000 00000000 c3666666 6666662e 0f1f8400 00000000 c3') // CHECK: # Section 1 // CHECK: (('section_name', '__const\x00\x00\x00\x00\x00\x00\x00\x00\x00') // CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') From baldrick at free.fr Thu Nov 25 11:47:42 2010 From: baldrick at free.fr (Duncan Sands) Date: Thu, 25 Nov 2010 17:47:42 -0000 Subject: [llvm-commits] [llvm] r120149 - in /llvm/trunk: autoconf/configure.ac configure Message-ID: <20101125174742.CE2C82A6C12C@llvm.org> Author: baldrick Date: Thu Nov 25 11:47:42 2010 New Revision: 120149 URL: http://llvm.org/viewvc/llvm-project?rev=120149&view=rev Log: Initial support for being able to specify the llvm-gcc to use like this: --with-llvmgcc="gcc-4.5 -fplugin=dragonegg.so" Modified: llvm/trunk/autoconf/configure.ac llvm/trunk/configure Modified: llvm/trunk/autoconf/configure.ac URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/autoconf/configure.ac?rev=120149&r1=120148&r2=120149&view=diff ============================================================================== --- llvm/trunk/autoconf/configure.ac (original) +++ llvm/trunk/autoconf/configure.ac Thu Nov 25 11:47:42 2010 @@ -1425,10 +1425,9 @@ dnl Check wether llvm-gcc is based on dragonegg AC_CACHE_CHECK([whether llvm-gcc is dragonegg],[llvm_cv_llvmgcc_dragonegg], [llvm_cv_llvmgcc_dragonegg="no" -if test -x "$LLVMGCC" ; then +if test -n "$LLVMGCC" ; then cp /dev/null conftest.c - "$LLVMGCC" -fplugin-arg-dragonegg-emit-ir -S -o - conftest.c | \ - grep 'target datalayout =' > /dev/null 2>&1 + $LLVMGCC -fplugin-arg-dragonegg-emit-ir -S -o - conftest.c > /dev/null 2>&1 if test $? -eq 0 ; then llvm_cv_llvmgcc_dragonegg="yes" fi @@ -1450,9 +1449,9 @@ dnl See if the llvm-gcc executable can compile to LLVM assembly AC_CACHE_CHECK([whether llvm-gcc is sane],[llvm_cv_llvmgcc_sanity], [llvm_cv_llvmgcc_sanity="no" -if test -x "$LLVMGCC" ; then +if test -n "$LLVMGCC" ; then cp /dev/null conftest.c - "$LLVMGCC" "$LLVMCC_EMITIR_FLAG" -S -o - conftest.c | \ + $LLVMGCC "$LLVMCC_EMITIR_FLAG" -S -o - conftest.c | \ grep 'target datalayout =' > /dev/null 2>&1 if test $? -eq 0 ; then llvm_cv_llvmgcc_sanity="yes" @@ -1464,13 +1463,13 @@ dnl Furthermore, add some information about the tools if test "$llvm_cv_llvmgcc_sanity" = "yes" ; then AC_MSG_CHECKING([llvm-gcc component support]) - llvmcc1path=`"$LLVMGCC" --print-prog-name=cc1` + llvmcc1path=`$LLVMGCC --print-prog-name=cc1` AC_SUBST(LLVMCC1,$llvmcc1path) - llvmcc1pluspath=`"$LLVMGCC" --print-prog-name=cc1plus` + llvmcc1pluspath=`$LLVMGCC --print-prog-name=cc1plus` AC_SUBST(LLVMCC1PLUS,$llvmcc1pluspath) llvmgccdir=`echo "$llvmcc1path" | sed 's,/libexec/.*,,'` AC_SUBST(LLVMGCCDIR,$llvmgccdir) - llvmgcclangs=[`"$LLVMGCC" -v --help 2>&1 | grep '^Configured with:' | sed 's/^.*--enable-languages=\([^ ]*\).*/\1/'`] + llvmgcclangs=[`$LLVMGCC -v --help 2>&1 | grep '^Configured with:' | sed 's/^.*--enable-languages=\([^ ]*\).*/\1/'`] AC_SUBST(LLVMGCC_LANGS,$llvmgcclangs) AC_SUBST(LLVMGCC_DRAGONEGG,$llvm_cv_llvmgcc_dragonegg) AC_SUBST(LLVMGCC_DISABLEOPT_FLAGS) Modified: llvm/trunk/configure URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/configure?rev=120149&r1=120148&r2=120149&view=diff ============================================================================== --- llvm/trunk/configure (original) +++ llvm/trunk/configure Thu Nov 25 11:47:42 2010 @@ -20586,10 +20586,9 @@ echo $ECHO_N "(cached) $ECHO_C" >&6 else llvm_cv_llvmgcc_dragonegg="no" -if test -x "$LLVMGCC" ; then +if test -n "$LLVMGCC" ; then cp /dev/null conftest.c - "$LLVMGCC" -fplugin-arg-dragonegg-emit-ir -S -o - conftest.c | \ - grep 'target datalayout =' > /dev/null 2>&1 + $LLVMGCC -fplugin-arg-dragonegg-emit-ir -S -o - conftest.c > /dev/null 2>&1 if test $? -eq 0 ; then llvm_cv_llvmgcc_dragonegg="yes" fi @@ -20615,9 +20614,9 @@ echo $ECHO_N "(cached) $ECHO_C" >&6 else llvm_cv_llvmgcc_sanity="no" -if test -x "$LLVMGCC" ; then +if test -n "$LLVMGCC" ; then cp /dev/null conftest.c - "$LLVMGCC" "$LLVMCC_EMITIR_FLAG" -S -o - conftest.c | \ + $LLVMGCC "$LLVMCC_EMITIR_FLAG" -S -o - conftest.c | \ grep 'target datalayout =' > /dev/null 2>&1 if test $? -eq 0 ; then llvm_cv_llvmgcc_sanity="yes" @@ -20631,16 +20630,16 @@ if test "$llvm_cv_llvmgcc_sanity" = "yes" ; then { echo "$as_me:$LINENO: checking llvm-gcc component support" >&5 echo $ECHO_N "checking llvm-gcc component support... $ECHO_C" >&6; } - llvmcc1path=`"$LLVMGCC" --print-prog-name=cc1` + llvmcc1path=`$LLVMGCC --print-prog-name=cc1` LLVMCC1=$llvmcc1path - llvmcc1pluspath=`"$LLVMGCC" --print-prog-name=cc1plus` + llvmcc1pluspath=`$LLVMGCC --print-prog-name=cc1plus` LLVMCC1PLUS=$llvmcc1pluspath llvmgccdir=`echo "$llvmcc1path" | sed 's,/libexec/.*,,'` LLVMGCCDIR=$llvmgccdir - llvmgcclangs=`"$LLVMGCC" -v --help 2>&1 | grep '^Configured with:' | sed 's/^.*--enable-languages=\([^ ]*\).*/\1/'` + llvmgcclangs=`$LLVMGCC -v --help 2>&1 | grep '^Configured with:' | sed 's/^.*--enable-languages=\([^ ]*\).*/\1/'` LLVMGCC_LANGS=$llvmgcclangs LLVMGCC_DRAGONEGG=$llvm_cv_llvmgcc_dragonegg From benny.kra at googlemail.com Thu Nov 25 11:50:19 2010 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Thu, 25 Nov 2010 17:50:19 -0000 Subject: [llvm-commits] [llvm] r120150 - /llvm/trunk/include/llvm/CodeGen/ScheduleDAG.h Message-ID: <20101125175019.F41872A6C12C@llvm.org> Author: d0k Date: Thu Nov 25 11:50:19 2010 New Revision: 120150 URL: http://llvm.org/viewvc/llvm-project?rev=120150&view=rev Log: SDep is POD-like. Shave off a few bytes from SUnit by moving a member around. Modified: llvm/trunk/include/llvm/CodeGen/ScheduleDAG.h Modified: llvm/trunk/include/llvm/CodeGen/ScheduleDAG.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ScheduleDAG.h?rev=120150&r1=120149&r2=120150&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/ScheduleDAG.h (original) +++ llvm/trunk/include/llvm/CodeGen/ScheduleDAG.h Thu Nov 25 11:50:19 2010 @@ -221,6 +221,9 @@ } }; + template <> + struct isPodLike { static const bool value = true; }; + /// SUnit - Scheduling unit. This is a node in the scheduling DAG. class SUnit { private: @@ -242,11 +245,11 @@ unsigned NodeNum; // Entry # of node in the node vector. unsigned NodeQueueId; // Queue id of node. - unsigned short Latency; // Node latency. unsigned NumPreds; // # of SDep::Data preds. unsigned NumSuccs; // # of SDep::Data sucss. unsigned NumPredsLeft; // # of preds not scheduled. unsigned NumSuccsLeft; // # of succs not scheduled. + unsigned short Latency; // Node latency. bool isCall : 1; // Is a function call. bool isTwoAddress : 1; // Is a two-address instruction. bool isCommutable : 1; // Is a commutable instruction. @@ -273,8 +276,8 @@ /// an SDNode and any nodes flagged to it. SUnit(SDNode *node, unsigned nodenum) : Node(node), Instr(0), OrigNode(0), NodeNum(nodenum), - NodeQueueId(0), Latency(0), NumPreds(0), NumSuccs(0), NumPredsLeft(0), - NumSuccsLeft(0), + NodeQueueId(0), NumPreds(0), NumSuccs(0), NumPredsLeft(0), + NumSuccsLeft(0), Latency(0), isCall(false), isTwoAddress(false), isCommutable(false), hasPhysRegDefs(false), hasPhysRegClobbers(false), isPending(false), isAvailable(false), isScheduled(false), @@ -287,8 +290,8 @@ /// a MachineInstr. SUnit(MachineInstr *instr, unsigned nodenum) : Node(0), Instr(instr), OrigNode(0), NodeNum(nodenum), - NodeQueueId(0), Latency(0), NumPreds(0), NumSuccs(0), NumPredsLeft(0), - NumSuccsLeft(0), + NodeQueueId(0), NumPreds(0), NumSuccs(0), NumPredsLeft(0), + NumSuccsLeft(0), Latency(0), isCall(false), isTwoAddress(false), isCommutable(false), hasPhysRegDefs(false), hasPhysRegClobbers(false), isPending(false), isAvailable(false), isScheduled(false), @@ -300,8 +303,8 @@ /// SUnit - Construct a placeholder SUnit. SUnit() : Node(0), Instr(0), OrigNode(0), NodeNum(~0u), - NodeQueueId(0), Latency(0), NumPreds(0), NumSuccs(0), NumPredsLeft(0), - NumSuccsLeft(0), + NodeQueueId(0), NumPreds(0), NumSuccs(0), NumPredsLeft(0), + NumSuccsLeft(0), Latency(0), isCall(false), isTwoAddress(false), isCommutable(false), hasPhysRegDefs(false), hasPhysRegClobbers(false), isPending(false), isAvailable(false), isScheduled(false), From baldrick at free.fr Thu Nov 25 11:57:43 2010 From: baldrick at free.fr (Duncan Sands) Date: Thu, 25 Nov 2010 17:57:43 -0000 Subject: [llvm-commits] [llvm] r120151 - in /llvm/trunk: Makefile.config.in autoconf/configure.ac configure Message-ID: <20101125175743.C1D762A6C12C@llvm.org> Author: baldrick Date: Thu Nov 25 11:57:43 2010 New Revision: 120151 URL: http://llvm.org/viewvc/llvm-project?rev=120151&view=rev Log: It seems inconsistent to have LLVMCC_EMITIR_FLAG and LLVMGCC_DISABLEOPT_FLAGS, one with CC in it, the other with GCC. Rename LLVMGCC_DISABLEOPT_FLAGS to LLVMCC_DISABLEOPT_FLAGS. Modified: llvm/trunk/Makefile.config.in llvm/trunk/autoconf/configure.ac llvm/trunk/configure Modified: llvm/trunk/Makefile.config.in URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/Makefile.config.in?rev=120151&r1=120150&r2=120151&view=diff ============================================================================== --- llvm/trunk/Makefile.config.in (original) +++ llvm/trunk/Makefile.config.in Thu Nov 25 11:57:43 2010 @@ -196,7 +196,6 @@ LLVMCC1PLUS := @LLVMCC1PLUS@ LLVMGCC_LANGS := @LLVMGCC_LANGS@ LLVMGCC_DRAGONEGG := @LLVMGCC_DRAGONEGG@ -LLVMGCC_DISABLEOPT_FLAGS := @LLVMGCC_DISABLEOPT_FLAGS@ # Information on Clang, if configured. CLANGPATH := @CLANGPATH@ @@ -208,6 +207,7 @@ # The flag used to emit LLVM IR. LLVMCC_EMITIR_FLAG = @LLVMCC_EMITIR_FLAG@ +LLVMCC_DISABLEOPT_FLAGS := @LLVMCC_DISABLEOPT_FLAGS@ # Path to directory where object files should be stored during a build. # Set OBJ_ROOT to "." if you do not want to use a separate place for Modified: llvm/trunk/autoconf/configure.ac URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/autoconf/configure.ac?rev=120151&r1=120150&r2=120151&view=diff ============================================================================== --- llvm/trunk/autoconf/configure.ac (original) +++ llvm/trunk/autoconf/configure.ac Thu Nov 25 11:57:43 2010 @@ -1438,10 +1438,10 @@ dnl in llvmgcc if test "$llvm_cv_llvmgcc_dragonegg" = "yes" ; then LLVMCC_EMITIR_FLAG="-fplugin-arg-dragonegg-emit-ir" - LLVMGCC_DISABLEOPT_FLAGS="-fplugin-arg-dragonegg-disable-llvm-optzns" + LLVMCC_DISABLEOPT_FLAGS="-fplugin-arg-dragonegg-disable-llvm-optzns" else LLVMCC_EMITIR_FLAG="-emit-llvm" - LLVMGCC_DISABLEOPT_FLAGS="-mllvm -disable-llvm-optzns" + LLVMCC_DISABLEOPT_FLAGS="-mllvm -disable-llvm-optzns" fi AC_SUBST(LLVMCC_EMITIR_FLAG) @@ -1472,7 +1472,7 @@ llvmgcclangs=[`$LLVMGCC -v --help 2>&1 | grep '^Configured with:' | sed 's/^.*--enable-languages=\([^ ]*\).*/\1/'`] AC_SUBST(LLVMGCC_LANGS,$llvmgcclangs) AC_SUBST(LLVMGCC_DRAGONEGG,$llvm_cv_llvmgcc_dragonegg) - AC_SUBST(LLVMGCC_DISABLEOPT_FLAGS) + AC_SUBST(LLVMCC_DISABLEOPT_FLAGS) AC_MSG_RESULT([ok]) fi Modified: llvm/trunk/configure URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/configure?rev=120151&r1=120150&r2=120151&view=diff ============================================================================== --- llvm/trunk/configure (original) +++ llvm/trunk/configure Thu Nov 25 11:57:43 2010 @@ -773,12 +773,12 @@ HUGE_VAL_SANITY MMAP_FILE LLVMCC_EMITIR_FLAG +LLVMCC_DISABLEOPT_FLAGS LLVMCC1 LLVMCC1PLUS LLVMGCCDIR LLVMGCC_LANGS LLVMGCC_DRAGONEGG -LLVMGCC_DISABLEOPT_FLAGS SHLIBEXT SHLIBPATH_VAR LLVM_PREFIX @@ -20600,10 +20600,10 @@ if test "$llvm_cv_llvmgcc_dragonegg" = "yes" ; then LLVMCC_EMITIR_FLAG="-fplugin-arg-dragonegg-emit-ir" - LLVMGCC_DISABLEOPT_FLAGS="-fplugin-arg-dragonegg-disable-llvm-optzns" + LLVMCC_DISABLEOPT_FLAGS="-fplugin-arg-dragonegg-disable-llvm-optzns" else LLVMCC_EMITIR_FLAG="-emit-llvm" - LLVMGCC_DISABLEOPT_FLAGS="-mllvm -disable-llvm-optzns" + LLVMCC_DISABLEOPT_FLAGS="-mllvm -disable-llvm-optzns" fi @@ -21839,12 +21839,12 @@ HUGE_VAL_SANITY!$HUGE_VAL_SANITY$ac_delim MMAP_FILE!$MMAP_FILE$ac_delim LLVMCC_EMITIR_FLAG!$LLVMCC_EMITIR_FLAG$ac_delim +LLVMCC_DISABLEOPT_FLAGS!$LLVMCC_DISABLEOPT_FLAGS$ac_delim LLVMCC1!$LLVMCC1$ac_delim LLVMCC1PLUS!$LLVMCC1PLUS$ac_delim LLVMGCCDIR!$LLVMGCCDIR$ac_delim LLVMGCC_LANGS!$LLVMGCC_LANGS$ac_delim LLVMGCC_DRAGONEGG!$LLVMGCC_DRAGONEGG$ac_delim -LLVMGCC_DISABLEOPT_FLAGS!$LLVMGCC_DISABLEOPT_FLAGS$ac_delim SHLIBEXT!$SHLIBEXT$ac_delim SHLIBPATH_VAR!$SHLIBPATH_VAR$ac_delim LLVM_PREFIX!$LLVM_PREFIX$ac_delim From baldrick at free.fr Thu Nov 25 11:58:14 2010 From: baldrick at free.fr (Duncan Sands) Date: Thu, 25 Nov 2010 17:58:14 -0000 Subject: [llvm-commits] [test-suite] r120152 - /test-suite/trunk/Makefile.rules Message-ID: <20101125175814.F338C2A6C12C@llvm.org> Author: baldrick Date: Thu Nov 25 11:58:14 2010 New Revision: 120152 URL: http://llvm.org/viewvc/llvm-project?rev=120152&view=rev Log: Rename LLVMGCC_DISABLEOPT_FLAGS to LLVMCC_DISABLEOPT_FLAGS. Modified: test-suite/trunk/Makefile.rules Modified: test-suite/trunk/Makefile.rules URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Makefile.rules?rev=120152&r1=120151&r2=120152&view=diff ============================================================================== --- test-suite/trunk/Makefile.rules (original) +++ test-suite/trunk/Makefile.rules Thu Nov 25 11:58:14 2010 @@ -368,7 +368,7 @@ ifdef DISABLE_LTO LOPTFLAGS := $(OPTFLAGS) else -LOPTFLAGS := $(OPTFLAGS) $(LLVMGCC_DISABLEOPT_FLAGS) +LOPTFLAGS := $(OPTFLAGS) $(LLVMCC_DISABLEOPT_FLAGS) endif # Explicitly specify -m32 / -m64 so there is no mismatch between llvm-gcc From grosser at fim.uni-passau.de Thu Nov 25 12:31:29 2010 From: grosser at fim.uni-passau.de (Tobias Grosser) Date: Thu, 25 Nov 2010 13:31:29 -0500 Subject: [llvm-commits] [llvm] r120151 - in /llvm/trunk: Makefile.config.in autoconf/configure.ac configure In-Reply-To: <20101125175743.C1D762A6C12C@llvm.org> References: <20101125175743.C1D762A6C12C@llvm.org> Message-ID: <4CEEAB81.2050801@fim.uni-passau.de> On 11/25/2010 12:57 PM, Duncan Sands wrote: > Author: baldrick > Date: Thu Nov 25 11:57:43 2010 > New Revision: 120151 > > URL: http://llvm.org/viewvc/llvm-project?rev=120151&view=rev > Log: > It seems inconsistent to have LLVMCC_EMITIR_FLAG and > LLVMGCC_DISABLEOPT_FLAGS, one with CC in it, the other > with GCC. Rename LLVMGCC_DISABLEOPT_FLAGS to > LLVMCC_DISABLEOPT_FLAGS. The reason i called this LLVMGCC_DISABLE_OPT flags was that I was not sure if "-mllvm -disable-llvm-optzns" will work for clang. So I thought I keep it better in the LLVMGCC land, as I believe it was ment for llvm-gcc to disable optimizations. Cheers Tobi > Modified: > llvm/trunk/Makefile.config.in > llvm/trunk/autoconf/configure.ac > llvm/trunk/configure > > Modified: llvm/trunk/Makefile.config.in > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/Makefile.config.in?rev=120151&r1=120150&r2=120151&view=diff > ============================================================================== > --- llvm/trunk/Makefile.config.in (original) > +++ llvm/trunk/Makefile.config.in Thu Nov 25 11:57:43 2010 > @@ -196,7 +196,6 @@ > LLVMCC1PLUS := @LLVMCC1PLUS@ > LLVMGCC_LANGS := @LLVMGCC_LANGS@ > LLVMGCC_DRAGONEGG := @LLVMGCC_DRAGONEGG@ > -LLVMGCC_DISABLEOPT_FLAGS := @LLVMGCC_DISABLEOPT_FLAGS@ > > # Information on Clang, if configured. > CLANGPATH := @CLANGPATH@ > @@ -208,6 +207,7 @@ > > # The flag used to emit LLVM IR. > LLVMCC_EMITIR_FLAG = @LLVMCC_EMITIR_FLAG@ > +LLVMCC_DISABLEOPT_FLAGS := @LLVMCC_DISABLEOPT_FLAGS@ > > # Path to directory where object files should be stored during a build. > # Set OBJ_ROOT to "." if you do not want to use a separate place for > > Modified: llvm/trunk/autoconf/configure.ac > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/autoconf/configure.ac?rev=120151&r1=120150&r2=120151&view=diff > ============================================================================== > --- llvm/trunk/autoconf/configure.ac (original) > +++ llvm/trunk/autoconf/configure.ac Thu Nov 25 11:57:43 2010 > @@ -1438,10 +1438,10 @@ > dnl in llvmgcc > if test "$llvm_cv_llvmgcc_dragonegg" = "yes" ; then > LLVMCC_EMITIR_FLAG="-fplugin-arg-dragonegg-emit-ir" > - LLVMGCC_DISABLEOPT_FLAGS="-fplugin-arg-dragonegg-disable-llvm-optzns" > + LLVMCC_DISABLEOPT_FLAGS="-fplugin-arg-dragonegg-disable-llvm-optzns" > else > LLVMCC_EMITIR_FLAG="-emit-llvm" > - LLVMGCC_DISABLEOPT_FLAGS="-mllvm -disable-llvm-optzns" > + LLVMCC_DISABLEOPT_FLAGS="-mllvm -disable-llvm-optzns" > fi > > AC_SUBST(LLVMCC_EMITIR_FLAG) > @@ -1472,7 +1472,7 @@ > llvmgcclangs=[`$LLVMGCC -v --help 2>&1 | grep '^Configured with:' | sed 's/^.*--enable-languages=\([^ ]*\).*/\1/'`] > AC_SUBST(LLVMGCC_LANGS,$llvmgcclangs) > AC_SUBST(LLVMGCC_DRAGONEGG,$llvm_cv_llvmgcc_dragonegg) > - AC_SUBST(LLVMGCC_DISABLEOPT_FLAGS) > + AC_SUBST(LLVMCC_DISABLEOPT_FLAGS) > AC_MSG_RESULT([ok]) > fi > > > Modified: llvm/trunk/configure > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/configure?rev=120151&r1=120150&r2=120151&view=diff > ============================================================================== > --- llvm/trunk/configure (original) > +++ llvm/trunk/configure Thu Nov 25 11:57:43 2010 > @@ -773,12 +773,12 @@ > HUGE_VAL_SANITY > MMAP_FILE > LLVMCC_EMITIR_FLAG > +LLVMCC_DISABLEOPT_FLAGS > LLVMCC1 > LLVMCC1PLUS > LLVMGCCDIR > LLVMGCC_LANGS > LLVMGCC_DRAGONEGG > -LLVMGCC_DISABLEOPT_FLAGS > SHLIBEXT > SHLIBPATH_VAR > LLVM_PREFIX > @@ -20600,10 +20600,10 @@ > > if test "$llvm_cv_llvmgcc_dragonegg" = "yes" ; then > LLVMCC_EMITIR_FLAG="-fplugin-arg-dragonegg-emit-ir" > - LLVMGCC_DISABLEOPT_FLAGS="-fplugin-arg-dragonegg-disable-llvm-optzns" > + LLVMCC_DISABLEOPT_FLAGS="-fplugin-arg-dragonegg-disable-llvm-optzns" > else > LLVMCC_EMITIR_FLAG="-emit-llvm" > - LLVMGCC_DISABLEOPT_FLAGS="-mllvm -disable-llvm-optzns" > + LLVMCC_DISABLEOPT_FLAGS="-mllvm -disable-llvm-optzns" > fi > > > @@ -21839,12 +21839,12 @@ > HUGE_VAL_SANITY!$HUGE_VAL_SANITY$ac_delim > MMAP_FILE!$MMAP_FILE$ac_delim > LLVMCC_EMITIR_FLAG!$LLVMCC_EMITIR_FLAG$ac_delim > +LLVMCC_DISABLEOPT_FLAGS!$LLVMCC_DISABLEOPT_FLAGS$ac_delim > LLVMCC1!$LLVMCC1$ac_delim > LLVMCC1PLUS!$LLVMCC1PLUS$ac_delim > LLVMGCCDIR!$LLVMGCCDIR$ac_delim > LLVMGCC_LANGS!$LLVMGCC_LANGS$ac_delim > LLVMGCC_DRAGONEGG!$LLVMGCC_DRAGONEGG$ac_delim > -LLVMGCC_DISABLEOPT_FLAGS!$LLVMGCC_DISABLEOPT_FLAGS$ac_delim > SHLIBEXT!$SHLIBEXT$ac_delim > SHLIBPATH_VAR!$SHLIBPATH_VAR$ac_delim > LLVM_PREFIX!$LLVM_PREFIX$ac_delim > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From rafael.espindola at gmail.com Thu Nov 25 12:41:02 2010 From: rafael.espindola at gmail.com (=?UTF-8?Q?Rafael_Esp=C3=ADndola?=) Date: Thu, 25 Nov 2010 13:41:02 -0500 Subject: [llvm-commits] [patch] Fix the operand order of the test instruction Message-ID: I noticed that assembling "testq %rbx, %rax" and then disassembling it with objdump would print "testq %rax, %rbx". The attached patch fixes it, but I wonder if there is any reason why the arguments were placed in this order. Is this how the darwin assembler handles them? Cheers, Rafael -------------- next part -------------- A non-text attachment was scrubbed... Name: test.patch Type: text/x-diff Size: 1877 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101125/8fcf0800/attachment.bin From baldrick at free.fr Thu Nov 25 13:34:46 2010 From: baldrick at free.fr (Duncan Sands) Date: Thu, 25 Nov 2010 20:34:46 +0100 Subject: [llvm-commits] [llvm] r120151 - in /llvm/trunk: Makefile.config.in autoconf/configure.ac configure In-Reply-To: <4CEEAB81.2050801@fim.uni-passau.de> References: <20101125175743.C1D762A6C12C@llvm.org> <4CEEAB81.2050801@fim.uni-passau.de> Message-ID: <4CEEBA56.2030102@free.fr> Hi Tobias, >> It seems inconsistent to have LLVMCC_EMITIR_FLAG and >> LLVMGCC_DISABLEOPT_FLAGS, one with CC in it, the other >> with GCC. Rename LLVMGCC_DISABLEOPT_FLAGS to >> LLVMCC_DISABLEOPT_FLAGS. > > > The reason i called this LLVMGCC_DISABLE_OPT flags was that I was not > sure if "-mllvm -disable-llvm-optzns" will work for clang. So I thought I keep > it better in the LLVMGCC land, as I believe it was ment for llvm-gcc to disable > optimizations. it works with clang too. Ciao, Duncan. From rafael.espindola at gmail.com Thu Nov 25 14:48:10 2010 From: rafael.espindola at gmail.com (=?UTF-8?Q?Rafael_Esp=C3=ADndola?=) Date: Thu, 25 Nov 2010 15:48:10 -0500 Subject: [llvm-commits] [Review request] test: Add the new feature "loadable_module" In-Reply-To: References: Message-ID: 2010/11/22 NAKAMURA Takumi : > Good evening. > > I re-assembled my patches. > Excuse me, please take a look, thank you. > > * 0001-test-Add-the-new-feature-loadable_module.patch > (application/octet-stream) 2K +# Loadable module +# FIXME: This should be supplied by Makefile or autoconf. +if sys.platform in ['win32', 'cygwin']: + loadable_module = (config.enable_shared == 1) Why can't you use config.enable_shared in every platform? > ?Same as the last one. It adds the feature but do nothing. > > * 0002-test-Use-SharedLibDir-for-loadable-modules.-On-Cygmi.patch > (application/octet-stream) 5K > > ?It passes $SharedLibDir to lit. - 'link', 'shlibext', 'ocamlopt', 'llvmdsymutil', 'llvmlibsdir', + 'link', 'ocamlopt', 'llvmdsymutil', 'llvmlibsdir', + 'llvmshlibdir', 'shlibext', 'bugpoint_topts']: Why the reordering? > * 0003-Makefile-Change-the-order-of-building-lib-Transforms.patch > (application/octet-stream) 2K > > ?It changes the order of building "LLVMHello" after building tools. > ?On cygming, LLVMHello.dll can be built after LLVM.dll. OK > * 0004-tools-Makefile-Enable-building-lto-edis-and-bugpoint.patch > (application/octet-stream) 2K > > ?It enables building butpoint-passes, edis and LTO on Cygming. > ?bugpoint-passes can be built with LLVM.dll. OK, but please reindent the code in the ifdef. > * 0005-test-Check-the-feature-loadable_module-with-load-mod.patch > (application/octet-stream) 4K > > ?It enables tests. > > > ...Takumi > Cheers, Rafael From rafael.espindola at gmail.com Thu Nov 25 14:51:59 2010 From: rafael.espindola at gmail.com (=?UTF-8?Q?Rafael_Esp=C3=ADndola?=) Date: Thu, 25 Nov 2010 15:51:59 -0500 Subject: [llvm-commits] [Review request] unittests/JITTests on Cygming. In-Reply-To: References: Message-ID: LGTM On 22 November 2010 06:56, NAKAMURA Takumi wrote: > unittests/JITTests can run on Cygming. > > Makefile.rules ? ? ? ? ? ? ?| ? 16 +++++++++++----- > unittests/CMakeLists.txt ? ?| ? ?4 ++++ > unittests/Makefile.unittest | ? ?8 +++++--- > 3 files changed, 20 insertions(+), 8 deletions(-) > > GNU ld/PECOFF accepts but ignores them below; > ?--version-script > ?--export-dynamic > ?--rpath > > Although it would be better to detect them with autoconf, > for now, they can be suppressed in Makefile.rules. > > To link with --export-all-symbols, unittests/JITTests can run. > > ...Takumi > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > From baldrick at free.fr Thu Nov 25 15:14:55 2010 From: baldrick at free.fr (Duncan Sands) Date: Thu, 25 Nov 2010 21:14:55 -0000 Subject: [llvm-commits] [llvm] r120155 - /llvm/trunk/Makefile.rules Message-ID: <20101125211455.8EEC32A6C12C@llvm.org> Author: baldrick Date: Thu Nov 25 15:14:55 2010 New Revision: 120155 URL: http://llvm.org/viewvc/llvm-project?rev=120155&view=rev Log: Using LLVMCC_EMITIR_FLAG rather than hard-coding -emit-llvm (dragonegg cannot use -emit-llvm so needs a different flag to everyone else). Modified: llvm/trunk/Makefile.rules Modified: llvm/trunk/Makefile.rules URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/Makefile.rules?rev=120155&r1=120154&r2=120155&view=diff ============================================================================== --- llvm/trunk/Makefile.rules (original) +++ llvm/trunk/Makefile.rules Thu Nov 25 15:14:55 2010 @@ -1501,31 +1501,31 @@ $(ObjDir)/%.ll: %.cpp $(ObjDir)/.dir $(BUILT_SOURCES) $(LLVMCXX) $(Echo) "Compiling $*.cpp for $(BuildMode) build (bytecode)" $(Verb) if $(BCCompile.CXX) $(BC_DEPEND_OPTIONS) \ - $< -o $(ObjDir)/$*.ll -S -emit-llvm ; \ + $< -o $(ObjDir)/$*.ll -S -$(LLVMCC_EMITIR_FLAG) ; \ $(BC_DEPEND_MOVEFILE) $(ObjDir)/%.ll: %.mm $(ObjDir)/.dir $(BUILT_SOURCES) $(LLVMCXX) $(Echo) "Compiling $*.mm for $(BuildMode) build (bytecode)" $(Verb) if $(BCCompile.CXX) $(BC_DEPEND_OPTIONS) \ - $< -o $(ObjDir)/$*.ll -S -emit-llvm ; \ + $< -o $(ObjDir)/$*.ll -S -$(LLVMCC_EMITIR_FLAG) ; \ $(BC_DEPEND_MOVEFILE) $(ObjDir)/%.ll: %.cc $(ObjDir)/.dir $(BUILT_SOURCES) $(LLVMCXX) $(Echo) "Compiling $*.cc for $(BuildMode) build (bytecode)" $(Verb) if $(BCCompile.CXX) $(BC_DEPEND_OPTIONS) \ - $< -o $(ObjDir)/$*.ll -S -emit-llvm ; \ + $< -o $(ObjDir)/$*.ll -S -$(LLVMCC_EMITIR_FLAG) ; \ $(BC_DEPEND_MOVEFILE) $(ObjDir)/%.ll: %.c $(ObjDir)/.dir $(BUILT_SOURCES) $(LLVMCC) $(Echo) "Compiling $*.c for $(BuildMode) build (bytecode)" $(Verb) if $(BCCompile.C) $(BC_DEPEND_OPTIONS) \ - $< -o $(ObjDir)/$*.ll -S -emit-llvm ; \ + $< -o $(ObjDir)/$*.ll -S -$(LLVMCC_EMITIR_FLAG) ; \ $(BC_DEPEND_MOVEFILE) $(ObjDir)/%.ll: %.m $(ObjDir)/.dir $(BUILT_SOURCES) $(LLVMCC) $(Echo) "Compiling $*.m for $(BuildMode) build (bytecode)" $(Verb) if $(BCCompile.C) $(BC_DEPEND_OPTIONS) \ - $< -o $(ObjDir)/$*.ll -S -emit-llvm ; \ + $< -o $(ObjDir)/$*.ll -S -$(LLVMCC_EMITIR_FLAG) ; \ $(BC_DEPEND_MOVEFILE) # Provide alternate rule sets if dependencies are disabled @@ -1553,23 +1553,23 @@ $(ObjDir)/%.ll: %.cpp $(ObjDir)/.dir $(BUILT_SOURCES) $(LLVMCXX) $(Echo) "Compiling $*.cpp for $(BuildMode) build (bytecode)" - $(BCCompile.CXX) $< -o $@ -S -emit-llvm + $(BCCompile.CXX) $< -o $@ -S -$(LLVMCC_EMITIR_FLAG) $(ObjDir)/%.ll: %.mm $(ObjDir)/.dir $(BUILT_SOURCES) $(LLVMCXX) $(Echo) "Compiling $*.mm for $(BuildMode) build (bytecode)" - $(BCCompile.CXX) $< -o $@ -S -emit-llvm + $(BCCompile.CXX) $< -o $@ -S -$(LLVMCC_EMITIR_FLAG) $(ObjDir)/%.ll: %.cc $(ObjDir)/.dir $(BUILT_SOURCES) $(LLVMCXX) $(Echo) "Compiling $*.cc for $(BuildMode) build (bytecode)" - $(BCCompile.CXX) $< -o $@ -S -emit-llvm + $(BCCompile.CXX) $< -o $@ -S -$(LLVMCC_EMITIR_FLAG) $(ObjDir)/%.ll: %.c $(ObjDir)/.dir $(BUILT_SOURCES) $(LLVMCC) $(Echo) "Compiling $*.c for $(BuildMode) build (bytecode)" - $(BCCompile.C) $< -o $@ -S -emit-llvm + $(BCCompile.C) $< -o $@ -S -$(LLVMCC_EMITIR_FLAG) $(ObjDir)/%.ll: %.m $(ObjDir)/.dir $(BUILT_SOURCES) $(LLVMCC) $(Echo) "Compiling $*.m for $(BuildMode) build (bytecode)" - $(BCCompile.C) $< -o $@ -S -emit-llvm + $(BCCompile.C) $< -o $@ -S -$(LLVMCC_EMITIR_FLAG) endif From baldrick at free.fr Thu Nov 25 15:19:52 2010 From: baldrick at free.fr (Duncan Sands) Date: Thu, 25 Nov 2010 21:19:52 -0000 Subject: [llvm-commits] [llvm] r120156 - in /llvm/trunk/test: Makefile lib/llvm.exp lit.cfg Message-ID: <20101125211952.BF99C2A6C12E@llvm.org> Author: baldrick Date: Thu Nov 25 15:19:52 2010 New Revision: 120156 URL: http://llvm.org/viewvc/llvm-project?rev=120156&view=rev Log: Use LLVMCC_EMITIR_FLAG rather than hard-coding "-emit-llvm". Modified: llvm/trunk/test/Makefile llvm/trunk/test/lib/llvm.exp llvm/trunk/test/lit.cfg Modified: llvm/trunk/test/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Makefile?rev=120156&r1=120155&r2=120156&view=diff ============================================================================== --- llvm/trunk/test/Makefile (original) +++ llvm/trunk/test/Makefile Thu Nov 25 15:19:52 2010 @@ -162,6 +162,7 @@ @echo 'set grep "$(GREP)"' >>site.tmp @echo 'set gas "$(GAS)"' >>site.tmp @echo 'set llvmdsymutil "$(DSYMUTIL)"' >>site.tmp + @echo 'set emitir "$(LLVMCC_EMITIR_FLAG)"' >>site.tmp @echo '## All variables above are generated by configure. Do Not Edit ## ' >>site.tmp @test ! -f site.exp || \ sed '1,/^## All variables above are.*##/ d' site.exp >> site.tmp Modified: llvm/trunk/test/lib/llvm.exp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/lib/llvm.exp?rev=120156&r1=120155&r2=120156&view=diff ============================================================================== --- llvm/trunk/test/lib/llvm.exp (original) +++ llvm/trunk/test/lib/llvm.exp Thu Nov 25 15:19:52 2010 @@ -47,7 +47,7 @@ # cases. proc substitute { line test tmpFile } { global srcroot objroot srcdir objdir subdir target_triplet - global llvmgcc llvmgxx ocamlopt + global llvmgcc llvmgxx emitir ocamlopt global gccpath gxxpath compile_c compile_cxx link shlibext llvmlibsdir global llvmdsymutil valgrind grep gas bugpoint_topts set path [file join $srcdir $subdir] @@ -60,9 +60,9 @@ #replace %llvmgcc_only with actual path to llvmgcc regsub -all {%llvmgcc_only} $new_line "$llvmgcc" new_line #replace %llvmgcc with actual path to llvmgcc - regsub -all {%llvmgcc} $new_line "$llvmgcc -emit-llvm -w" new_line + regsub -all {%llvmgcc} $new_line "$llvmgcc $emitir -w" new_line #replace %llvmgxx with actual path to llvmg++ - regsub -all {%llvmgxx} $new_line "$llvmgxx -emit-llvm -w" new_line + regsub -all {%llvmgxx} $new_line "$llvmgxx $emitir -w" new_line #replace %compile_cxx with C++ compilation command regsub -all {%compile_cxx} $new_line "$compile_cxx" new_line #replace %compile_c with C compilation command Modified: llvm/trunk/test/lit.cfg URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/lit.cfg?rev=120156&r1=120155&r2=120156&view=diff ============================================================================== --- llvm/trunk/test/lit.cfg (original) +++ llvm/trunk/test/lit.cfg Thu Nov 25 15:19:52 2010 @@ -125,12 +125,12 @@ # Add substitutions. config.substitutions.append(('%llvmgcc_only', site_exp['llvmgcc'])) -for sub in ['llvmgcc', 'llvmgxx', 'compile_cxx', 'compile_c', +for sub in ['llvmgcc', 'llvmgxx', 'emitir', 'compile_cxx', 'compile_c', 'link', 'shlibext', 'ocamlopt', 'llvmdsymutil', 'llvmlibsdir', 'bugpoint_topts']: if sub in ('llvmgcc', 'llvmgxx'): config.substitutions.append(('%' + sub, - site_exp[sub] + ' -emit-llvm -w')) + site_exp[sub] + ' %emitir -w')) # FIXME: This is a hack to avoid LLVMC tests failing due to a clang driver # warning when passing in "-fexceptions -fno-exceptions". elif sub == 'compile_cxx': From baldrick at free.fr Thu Nov 25 15:21:59 2010 From: baldrick at free.fr (Duncan Sands) Date: Thu, 25 Nov 2010 21:21:59 -0000 Subject: [llvm-commits] [llvm] r120157 - in /llvm/trunk/test/FrontendAda: array_constructor.adb array_range_ref.adb array_ref.adb array_size.adb asm.adb debug_var_size.ads emit_var.ads fat_fields.adb field_order.ads global_constant.adb init_size.ads negative_field_offset.adb non_bitfield.ads non_lvalue.adb placeholder.adb switch.adb unc_constructor.adb var_offset.adb var_size.adb vce.adb vce_lv.adb Message-ID: <20101125212159.67E092A6C12E@llvm.org> Author: baldrick Date: Thu Nov 25 15:21:59 2010 New Revision: 120157 URL: http://llvm.org/viewvc/llvm-project?rev=120157&view=rev Log: Dragonegg cannot output bitcode, only human readable IR, so use -S rather than -c. Modified: llvm/trunk/test/FrontendAda/array_constructor.adb llvm/trunk/test/FrontendAda/array_range_ref.adb llvm/trunk/test/FrontendAda/array_ref.adb llvm/trunk/test/FrontendAda/array_size.adb llvm/trunk/test/FrontendAda/asm.adb llvm/trunk/test/FrontendAda/debug_var_size.ads llvm/trunk/test/FrontendAda/emit_var.ads llvm/trunk/test/FrontendAda/fat_fields.adb llvm/trunk/test/FrontendAda/field_order.ads llvm/trunk/test/FrontendAda/global_constant.adb llvm/trunk/test/FrontendAda/init_size.ads llvm/trunk/test/FrontendAda/negative_field_offset.adb llvm/trunk/test/FrontendAda/non_bitfield.ads llvm/trunk/test/FrontendAda/non_lvalue.adb llvm/trunk/test/FrontendAda/placeholder.adb llvm/trunk/test/FrontendAda/switch.adb llvm/trunk/test/FrontendAda/unc_constructor.adb llvm/trunk/test/FrontendAda/var_offset.adb llvm/trunk/test/FrontendAda/var_size.adb llvm/trunk/test/FrontendAda/vce.adb llvm/trunk/test/FrontendAda/vce_lv.adb Modified: llvm/trunk/test/FrontendAda/array_constructor.adb URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendAda/array_constructor.adb?rev=120157&r1=120156&r2=120157&view=diff ============================================================================== --- llvm/trunk/test/FrontendAda/array_constructor.adb (original) +++ llvm/trunk/test/FrontendAda/array_constructor.adb Thu Nov 25 15:21:59 2010 @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s procedure Array_Constructor is A : array (Integer range <>) of Boolean := (True, False); begin Modified: llvm/trunk/test/FrontendAda/array_range_ref.adb URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendAda/array_range_ref.adb?rev=120157&r1=120156&r2=120157&view=diff ============================================================================== --- llvm/trunk/test/FrontendAda/array_range_ref.adb (original) +++ llvm/trunk/test/FrontendAda/array_range_ref.adb Thu Nov 25 15:21:59 2010 @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s procedure Array_Range_Ref is A : String (1 .. 3); B : String := A (A'RANGE)(1 .. 3); Modified: llvm/trunk/test/FrontendAda/array_ref.adb URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendAda/array_ref.adb?rev=120157&r1=120156&r2=120157&view=diff ============================================================================== --- llvm/trunk/test/FrontendAda/array_ref.adb (original) +++ llvm/trunk/test/FrontendAda/array_ref.adb Thu Nov 25 15:21:59 2010 @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s procedure Array_Ref is type A is array (Natural range <>, Natural range <>) of Boolean; type A_Access is access A; Modified: llvm/trunk/test/FrontendAda/array_size.adb URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendAda/array_size.adb?rev=120157&r1=120156&r2=120157&view=diff ============================================================================== --- llvm/trunk/test/FrontendAda/array_size.adb (original) +++ llvm/trunk/test/FrontendAda/array_size.adb Thu Nov 25 15:21:59 2010 @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s procedure Array_Size is subtype S is String (1 .. 2); type R is record Modified: llvm/trunk/test/FrontendAda/asm.adb URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendAda/asm.adb?rev=120157&r1=120156&r2=120157&view=diff ============================================================================== --- llvm/trunk/test/FrontendAda/asm.adb (original) +++ llvm/trunk/test/FrontendAda/asm.adb Thu Nov 25 15:21:59 2010 @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s with System.Machine_Code; procedure Asm is begin Modified: llvm/trunk/test/FrontendAda/debug_var_size.ads URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendAda/debug_var_size.ads?rev=120157&r1=120156&r2=120157&view=diff ============================================================================== --- llvm/trunk/test/FrontendAda/debug_var_size.ads (original) +++ llvm/trunk/test/FrontendAda/debug_var_size.ads Thu Nov 25 15:21:59 2010 @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c -g %s +-- RUN: %llvmgcc -S -g %s package Debug_Var_Size is subtype Length_Type is Positive range 1 .. 64; type T (Length : Length_Type := 1) is record Modified: llvm/trunk/test/FrontendAda/emit_var.ads URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendAda/emit_var.ads?rev=120157&r1=120156&r2=120157&view=diff ============================================================================== --- llvm/trunk/test/FrontendAda/emit_var.ads (original) +++ llvm/trunk/test/FrontendAda/emit_var.ads Thu Nov 25 15:21:59 2010 @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s with Ada.Finalization; package Emit_Var is type Search_Type is new Ada.Finalization.Controlled with null record; Modified: llvm/trunk/test/FrontendAda/fat_fields.adb URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendAda/fat_fields.adb?rev=120157&r1=120156&r2=120157&view=diff ============================================================================== --- llvm/trunk/test/FrontendAda/fat_fields.adb (original) +++ llvm/trunk/test/FrontendAda/fat_fields.adb Thu Nov 25 15:21:59 2010 @@ -1,5 +1,5 @@ --- RUN: %llvmgcc -c %s -I%p/Support --- RUN: %llvmgcc -c %s -I%p/Support -O2 +-- RUN: %llvmgcc -S %s -I%p/Support +-- RUN: %llvmgcc -S %s -I%p/Support -O2 package body Fat_Fields is procedure Proc is begin Modified: llvm/trunk/test/FrontendAda/field_order.ads URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendAda/field_order.ads?rev=120157&r1=120156&r2=120157&view=diff ============================================================================== --- llvm/trunk/test/FrontendAda/field_order.ads (original) +++ llvm/trunk/test/FrontendAda/field_order.ads Thu Nov 25 15:21:59 2010 @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s package Field_Order is type Tagged_Type is abstract tagged null record; type With_Discriminant (L : Positive) is new Tagged_Type with record Modified: llvm/trunk/test/FrontendAda/global_constant.adb URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendAda/global_constant.adb?rev=120157&r1=120156&r2=120157&view=diff ============================================================================== --- llvm/trunk/test/FrontendAda/global_constant.adb (original) +++ llvm/trunk/test/FrontendAda/global_constant.adb Thu Nov 25 15:21:59 2010 @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s -I%p/Support +-- RUN: %llvmgcc -S %s -I%p/Support package body Global_Constant is begin raise An_Error; Modified: llvm/trunk/test/FrontendAda/init_size.ads URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendAda/init_size.ads?rev=120157&r1=120156&r2=120157&view=diff ============================================================================== --- llvm/trunk/test/FrontendAda/init_size.ads (original) +++ llvm/trunk/test/FrontendAda/init_size.ads Thu Nov 25 15:21:59 2010 @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s package Init_Size is type T (B : Boolean := False) is record case B is Modified: llvm/trunk/test/FrontendAda/negative_field_offset.adb URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendAda/negative_field_offset.adb?rev=120157&r1=120156&r2=120157&view=diff ============================================================================== --- llvm/trunk/test/FrontendAda/negative_field_offset.adb (original) +++ llvm/trunk/test/FrontendAda/negative_field_offset.adb Thu Nov 25 15:21:59 2010 @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s with System; procedure Negative_Field_Offset (N : Integer) is type String_Pointer is access String; Modified: llvm/trunk/test/FrontendAda/non_bitfield.ads URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendAda/non_bitfield.ads?rev=120157&r1=120156&r2=120157&view=diff ============================================================================== --- llvm/trunk/test/FrontendAda/non_bitfield.ads (original) +++ llvm/trunk/test/FrontendAda/non_bitfield.ads Thu Nov 25 15:21:59 2010 @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s package Non_Bitfield is type SP is access String; type E is (A, B, C); Modified: llvm/trunk/test/FrontendAda/non_lvalue.adb URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendAda/non_lvalue.adb?rev=120157&r1=120156&r2=120157&view=diff ============================================================================== --- llvm/trunk/test/FrontendAda/non_lvalue.adb (original) +++ llvm/trunk/test/FrontendAda/non_lvalue.adb Thu Nov 25 15:21:59 2010 @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s -I%p/Support +-- RUN: %llvmgcc -S %s -I%p/Support package body Non_LValue is function A (Y : U) return String is begin Modified: llvm/trunk/test/FrontendAda/placeholder.adb URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendAda/placeholder.adb?rev=120157&r1=120156&r2=120157&view=diff ============================================================================== --- llvm/trunk/test/FrontendAda/placeholder.adb (original) +++ llvm/trunk/test/FrontendAda/placeholder.adb Thu Nov 25 15:21:59 2010 @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s procedure Placeholder is subtype Bounded is Integer range 1 .. 5; type Vector is array (Bounded range <>) of Integer; Modified: llvm/trunk/test/FrontendAda/switch.adb URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendAda/switch.adb?rev=120157&r1=120156&r2=120157&view=diff ============================================================================== --- llvm/trunk/test/FrontendAda/switch.adb (original) +++ llvm/trunk/test/FrontendAda/switch.adb Thu Nov 25 15:21:59 2010 @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s function Switch (N : Integer) return Integer is begin case N is Modified: llvm/trunk/test/FrontendAda/unc_constructor.adb URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendAda/unc_constructor.adb?rev=120157&r1=120156&r2=120157&view=diff ============================================================================== --- llvm/trunk/test/FrontendAda/unc_constructor.adb (original) +++ llvm/trunk/test/FrontendAda/unc_constructor.adb Thu Nov 25 15:21:59 2010 @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s -I%p/Support +-- RUN: %llvmgcc -S %s -I%p/Support package body Unc_Constructor is procedure P (X : A) is begin Modified: llvm/trunk/test/FrontendAda/var_offset.adb URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendAda/var_offset.adb?rev=120157&r1=120156&r2=120157&view=diff ============================================================================== --- llvm/trunk/test/FrontendAda/var_offset.adb (original) +++ llvm/trunk/test/FrontendAda/var_offset.adb Thu Nov 25 15:21:59 2010 @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s -I%p/Support +-- RUN: %llvmgcc -S %s -I%p/Support package body Var_Offset is function F (X : T) return Character is begin Modified: llvm/trunk/test/FrontendAda/var_size.adb URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendAda/var_size.adb?rev=120157&r1=120156&r2=120157&view=diff ============================================================================== --- llvm/trunk/test/FrontendAda/var_size.adb (original) +++ llvm/trunk/test/FrontendAda/var_size.adb Thu Nov 25 15:21:59 2010 @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s -I%p/Support +-- RUN: %llvmgcc -S %s -I%p/Support package body Var_Size is function A (X : T) return String is begin Modified: llvm/trunk/test/FrontendAda/vce.adb URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendAda/vce.adb?rev=120157&r1=120156&r2=120157&view=diff ============================================================================== --- llvm/trunk/test/FrontendAda/vce.adb (original) +++ llvm/trunk/test/FrontendAda/vce.adb Thu Nov 25 15:21:59 2010 @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s procedure VCE is S : String (1 .. 2); B : Character := 'B'; Modified: llvm/trunk/test/FrontendAda/vce_lv.adb URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendAda/vce_lv.adb?rev=120157&r1=120156&r2=120157&view=diff ============================================================================== --- llvm/trunk/test/FrontendAda/vce_lv.adb (original) +++ llvm/trunk/test/FrontendAda/vce_lv.adb Thu Nov 25 15:21:59 2010 @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s procedure VCE_LV is type P is access String ; type T is new P (5 .. 7); From baldrick at free.fr Thu Nov 25 15:24:36 2010 From: baldrick at free.fr (Duncan Sands) Date: Thu, 25 Nov 2010 21:24:36 -0000 Subject: [llvm-commits] [llvm] r120158 - /llvm/trunk/test/FrontendC/ Message-ID: <20101125212436.D88BF2A6C12E@llvm.org> Author: baldrick Date: Thu Nov 25 15:24:35 2010 New Revision: 120158 URL: http://llvm.org/viewvc/llvm-project?rev=120158&view=rev Log: Remove explicit uses of -emit-llvm, the test infrastructure adds it automatically. Use -S with llvm-gcc rather than -c, so tests can work when llvm-gcc is really dragonegg (which can output IR with -S but not -c). Modified: llvm/trunk/test/FrontendC/2003-08-06-BuiltinSetjmpLongjmp.c llvm/trunk/test/FrontendC/2003-08-17-DeadCodeShortCircuit.c llvm/trunk/test/FrontendC/2003-11-03-AddrArrayElement.c llvm/trunk/test/FrontendC/2003-11-08-PointerSubNotGetelementptr.c llvm/trunk/test/FrontendC/2003-11-13-TypeSafety.c llvm/trunk/test/FrontendC/2003-12-14-ExternInlineSupport.c llvm/trunk/test/FrontendC/2004-02-12-LargeAggregateCopy.c llvm/trunk/test/FrontendC/2004-02-13-BuiltinFrameReturnAddress.c llvm/trunk/test/FrontendC/2004-02-13-IllegalVararg.c llvm/trunk/test/FrontendC/2004-02-13-Memset.c llvm/trunk/test/FrontendC/2004-02-20-Builtins.c llvm/trunk/test/FrontendC/2004-03-07-ExternalConstant.c llvm/trunk/test/FrontendC/2004-06-17-UnorderedCompares.c llvm/trunk/test/FrontendC/2004-11-27-StaticFunctionRedeclare.c llvm/trunk/test/FrontendC/2005-01-02-PointerDifference.c llvm/trunk/test/FrontendC/2005-12-04-AttributeUsed.c llvm/trunk/test/FrontendC/2007-01-06-KNR-Proto.c llvm/trunk/test/FrontendC/2007-02-04-AddrLValue-2.c llvm/trunk/test/FrontendC/2007-02-04-AddrLValue.c llvm/trunk/test/FrontendC/2007-02-04-EmptyStruct.c llvm/trunk/test/FrontendC/2007-02-04-WITH_SIZE_EXPR.c llvm/trunk/test/FrontendC/2007-02-05-nested.c llvm/trunk/test/FrontendC/2007-02-07-AddrLabel.c llvm/trunk/test/FrontendC/2007-02-16-VoidPtrDiff.c llvm/trunk/test/FrontendC/2007-02-16-WritableStrings.c llvm/trunk/test/FrontendC/2007-02-25-C-DotDotDot.c llvm/trunk/test/FrontendC/2007-03-01-VarSizeArrayIdx.c llvm/trunk/test/FrontendC/2007-04-11-InlineAsmStruct.c llvm/trunk/test/FrontendC/2007-04-11-InlineAsmUnion.c llvm/trunk/test/FrontendC/2007-04-11-InlineStorageClassC89.c llvm/trunk/test/FrontendC/2007-04-11-InlineStorageClassC99.c llvm/trunk/test/FrontendC/2007-04-13-InlineAsmStruct2.c llvm/trunk/test/FrontendC/2007-04-13-InlineAsmUnion2.c llvm/trunk/test/FrontendC/2007-04-24-VolatileStructCopy.c llvm/trunk/test/FrontendC/2007-04-24-bit-not-expr.c llvm/trunk/test/FrontendC/2007-04-24-str-const.c llvm/trunk/test/FrontendC/2007-05-07-PaddingElements.c llvm/trunk/test/FrontendC/2007-05-11-str-const.c llvm/trunk/test/FrontendC/2007-05-15-PaddingElement.c llvm/trunk/test/FrontendC/2007-05-16-EmptyStruct.c llvm/trunk/test/FrontendC/2007-05-29-UnionCopy.c llvm/trunk/test/FrontendC/2007-06-05-NoInlineAttribute.c llvm/trunk/test/FrontendC/2007-06-15-AnnotateAttribute.c llvm/trunk/test/FrontendC/2007-06-18-SextAttrAggregate.c llvm/trunk/test/FrontendC/2007-07-29-RestrictPtrArg.c llvm/trunk/test/FrontendC/2007-08-01-LoadStoreAlign.c llvm/trunk/test/FrontendC/2007-08-21-ComplexCst.c llvm/trunk/test/FrontendC/2007-09-05-ConstCtor.c llvm/trunk/test/FrontendC/2007-09-20-GcrootAttribute.c llvm/trunk/test/FrontendC/2007-11-07-AlignedMemcpy.c llvm/trunk/test/FrontendC/2007-11-27-SExtZExt.c llvm/trunk/test/FrontendC/2008-01-25-ByValReadNone.c llvm/trunk/test/FrontendC/2008-01-28-PragmaMark.c llvm/trunk/test/FrontendC/2008-03-03-CtorAttrType.c llvm/trunk/test/FrontendC/2008-03-05-syncPtr.c llvm/trunk/test/FrontendC/2008-05-19-AlwaysInline.c llvm/trunk/test/FrontendC/2008-08-07-AlignPadding1.c llvm/trunk/test/FrontendC/2008-08-07-AlignPadding2.c llvm/trunk/test/FrontendC/2008-10-30-ZeroPlacement.c llvm/trunk/test/FrontendC/2008-11-02-WeakAlias.c llvm/trunk/test/FrontendC/2008-11-08-InstCombineSelect.c llvm/trunk/test/FrontendC/2008-11-11-AnnotateStructFieldAttribute.c llvm/trunk/test/FrontendC/2008-12-23-AsmIntPointerTie.c llvm/trunk/test/FrontendC/2009-01-05-BlockInlining.c llvm/trunk/test/FrontendC/2009-03-13-dbg.c llvm/trunk/test/FrontendC/2009-05-04-EnumInreg.c llvm/trunk/test/FrontendC/2010-01-13-MemBarrier.c llvm/trunk/test/FrontendC/2010-05-18-asmsched.c llvm/trunk/test/FrontendC/2010-05-26-AsmSideEffect.c llvm/trunk/test/FrontendC/2010-06-28-nowarn.c llvm/trunk/test/FrontendC/2010-07-14-overconservative-align.c llvm/trunk/test/FrontendC/attribute_constructor.c llvm/trunk/test/FrontendC/block-copy.c llvm/trunk/test/FrontendC/cstring-align.c llvm/trunk/test/FrontendC/extern-weak.c llvm/trunk/test/FrontendC/func-aligned.c llvm/trunk/test/FrontendC/hidden-visibility.c llvm/trunk/test/FrontendC/implicit-arg.c llvm/trunk/test/FrontendC/libcalls-d.c llvm/trunk/test/FrontendC/libcalls-ld.c llvm/trunk/test/FrontendC/libcalls.c llvm/trunk/test/FrontendC/pr3518.c llvm/trunk/test/FrontendC/pr4349.c llvm/trunk/test/FrontendC/pr5406.c llvm/trunk/test/FrontendC/ptr-rotate.c llvm/trunk/test/FrontendC/sret.c llvm/trunk/test/FrontendC/sret2.c llvm/trunk/test/FrontendC/unaligned-memcpy.c Modified: llvm/trunk/test/FrontendC/2003-08-06-BuiltinSetjmpLongjmp.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2003-08-06-BuiltinSetjmpLongjmp.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2003-08-06-BuiltinSetjmpLongjmp.c (original) +++ llvm/trunk/test/FrontendC/2003-08-06-BuiltinSetjmpLongjmp.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -/* RUN: %llvmgcc -xc %s -c -o - | llvm-dis | not grep __builtin_ +/* RUN: %llvmgcc -xc %s -S -o - | not grep __builtin_ * * __builtin_longjmp/setjmp should get transformed into llvm.setjmp/longjmp * just like explicit setjmp/longjmp calls are. Modified: llvm/trunk/test/FrontendC/2003-08-17-DeadCodeShortCircuit.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2003-08-17-DeadCodeShortCircuit.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2003-08-17-DeadCodeShortCircuit.c (original) +++ llvm/trunk/test/FrontendC/2003-08-17-DeadCodeShortCircuit.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc %s -c -o %t.o +// RUN: %llvmgcc -xc %s -S -o %t.o int test(_Bool pos, _Bool color) { return 0; Modified: llvm/trunk/test/FrontendC/2003-11-03-AddrArrayElement.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2003-11-03-AddrArrayElement.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2003-11-03-AddrArrayElement.c (original) +++ llvm/trunk/test/FrontendC/2003-11-03-AddrArrayElement.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep getelementptr +// RUN: %llvmgcc -xc %s -S -o - | grep getelementptr // This should be turned into a tasty getelementptr instruction, not a nasty // series of casts and address arithmetic. Modified: llvm/trunk/test/FrontendC/2003-11-08-PointerSubNotGetelementptr.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2003-11-08-PointerSubNotGetelementptr.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2003-11-08-PointerSubNotGetelementptr.c (original) +++ llvm/trunk/test/FrontendC/2003-11-08-PointerSubNotGetelementptr.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep getelementptr +// RUN: %llvmgcc -xc %s -S -o - | grep getelementptr char *test(char* C) { return C-1; // Should turn into a GEP Modified: llvm/trunk/test/FrontendC/2003-11-13-TypeSafety.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2003-11-13-TypeSafety.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2003-11-13-TypeSafety.c (original) +++ llvm/trunk/test/FrontendC/2003-11-13-TypeSafety.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep getelementptr +// RUN: %llvmgcc -xc %s -S -o - | grep getelementptr int *test(int *X, int Y) { return X + Y; Modified: llvm/trunk/test/FrontendC/2003-12-14-ExternInlineSupport.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2003-12-14-ExternInlineSupport.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2003-12-14-ExternInlineSupport.c (original) +++ llvm/trunk/test/FrontendC/2003-12-14-ExternInlineSupport.c Thu Nov 25 15:24:35 2010 @@ -1,3 +1,3 @@ -// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | not grep dead_function +// RUN: %llvmgcc -xc %s -S -o - | not grep dead_function extern __inline__ void dead_function() {} Modified: llvm/trunk/test/FrontendC/2004-02-12-LargeAggregateCopy.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2004-02-12-LargeAggregateCopy.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2004-02-12-LargeAggregateCopy.c (original) +++ llvm/trunk/test/FrontendC/2004-02-12-LargeAggregateCopy.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep llvm.memcpy +// RUN: %llvmgcc -xc %s -S -o - | grep llvm.memcpy struct X { int V[10000]; }; struct X Global1, Global2; Modified: llvm/trunk/test/FrontendC/2004-02-13-BuiltinFrameReturnAddress.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2004-02-13-BuiltinFrameReturnAddress.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2004-02-13-BuiltinFrameReturnAddress.c (original) +++ llvm/trunk/test/FrontendC/2004-02-13-BuiltinFrameReturnAddress.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep llvm.*address | count 4 +// RUN: %llvmgcc -xc %s -S -o - | grep llvm.*address | count 4 void *test1() { return __builtin_return_address(1); Modified: llvm/trunk/test/FrontendC/2004-02-13-IllegalVararg.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2004-02-13-IllegalVararg.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2004-02-13-IllegalVararg.c (original) +++ llvm/trunk/test/FrontendC/2004-02-13-IllegalVararg.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc %s -w -c -o - | llc +// RUN: %llvmgcc -xc %s -w -S -o - | llc // XFAIL: * // See PR2452 Modified: llvm/trunk/test/FrontendC/2004-02-13-Memset.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2004-02-13-Memset.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2004-02-13-Memset.c (original) +++ llvm/trunk/test/FrontendC/2004-02-13-Memset.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep llvm.memset | count 3 +// RUN: %llvmgcc -xc %s -S -o - | grep llvm.memset | count 3 void *memset(void*, int, long); void bzero(void*, long); Modified: llvm/trunk/test/FrontendC/2004-02-20-Builtins.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2004-02-20-Builtins.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2004-02-20-Builtins.c (original) +++ llvm/trunk/test/FrontendC/2004-02-20-Builtins.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -O3 -xc %s -c -o - | llvm-dis | not grep builtin +// RUN: %llvmgcc -O3 -xc %s -S -o - | not grep builtin #include Modified: llvm/trunk/test/FrontendC/2004-03-07-ExternalConstant.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2004-03-07-ExternalConstant.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2004-03-07-ExternalConstant.c (original) +++ llvm/trunk/test/FrontendC/2004-03-07-ExternalConstant.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep constant +// RUN: %llvmgcc -xc %s -S -o - | grep constant extern const int a[]; // 'a' should be marked constant even though it's external! int foo () { Modified: llvm/trunk/test/FrontendC/2004-06-17-UnorderedCompares.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2004-06-17-UnorderedCompares.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2004-06-17-UnorderedCompares.c (original) +++ llvm/trunk/test/FrontendC/2004-06-17-UnorderedCompares.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc -std=c99 %s -c -o - | llvm-dis | grep -v llvm.isunordered | not grep call +// RUN: %llvmgcc -xc -std=c99 %s -S -o - | grep -v llvm.isunordered | not grep call #include Modified: llvm/trunk/test/FrontendC/2004-11-27-StaticFunctionRedeclare.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2004-11-27-StaticFunctionRedeclare.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2004-11-27-StaticFunctionRedeclare.c (original) +++ llvm/trunk/test/FrontendC/2004-11-27-StaticFunctionRedeclare.c Thu Nov 25 15:24:35 2010 @@ -1,5 +1,5 @@ -// RUN: %llvmgcc -c -emit-llvm %s -o - | \ -// RUN: opt -std-compile-opts | llvm-dis | not grep {declare i32.*func} +// RUN: %llvmgcc -S %s -o - | \ +// RUN: opt -std-compile-opts -S | not grep {declare i32.*func} // There should not be an unresolved reference to func here. Believe it or not, // the "expected result" is a function named 'func' which is internal and Modified: llvm/trunk/test/FrontendC/2005-01-02-PointerDifference.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2005-01-02-PointerDifference.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2005-01-02-PointerDifference.c (original) +++ llvm/trunk/test/FrontendC/2005-01-02-PointerDifference.c Thu Nov 25 15:24:35 2010 @@ -1,3 +1,3 @@ -// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep -v div +// RUN: %llvmgcc -xc %s -S -o - | grep -v div int Diff(int *P, int *Q) { return P-Q; } Modified: llvm/trunk/test/FrontendC/2005-12-04-AttributeUsed.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2005-12-04-AttributeUsed.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2005-12-04-AttributeUsed.c (original) +++ llvm/trunk/test/FrontendC/2005-12-04-AttributeUsed.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -o - | llvm-as | llvm-dis | \ +// RUN: %llvmgcc %s -S -o - | llvm-as | llvm-dis | \ // RUN: grep llvm.used | grep foo | grep X int X __attribute__((used)); Modified: llvm/trunk/test/FrontendC/2007-01-06-KNR-Proto.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2007-01-06-KNR-Proto.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2007-01-06-KNR-Proto.c (original) +++ llvm/trunk/test/FrontendC/2007-01-06-KNR-Proto.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -S -o - -emit-llvm %s +// RUN: %llvmgcc -S -o - %s // PR1083 int svc_register (void (*dispatch) (int)); Modified: llvm/trunk/test/FrontendC/2007-02-04-AddrLValue-2.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2007-02-04-AddrLValue-2.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2007-02-04-AddrLValue-2.c (original) +++ llvm/trunk/test/FrontendC/2007-02-04-AddrLValue-2.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -O3 -S -o - -emit-llvm +// RUN: %llvmgcc %s -O3 -S -o - // PR1173 struct S { char s; }; Modified: llvm/trunk/test/FrontendC/2007-02-04-AddrLValue.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2007-02-04-AddrLValue.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2007-02-04-AddrLValue.c (original) +++ llvm/trunk/test/FrontendC/2007-02-04-AddrLValue.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -O3 -S -o - -emit-llvm +// RUN: %llvmgcc %s -O3 -S -o - // PR1176 typedef struct Modified: llvm/trunk/test/FrontendC/2007-02-04-EmptyStruct.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2007-02-04-EmptyStruct.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2007-02-04-EmptyStruct.c (original) +++ llvm/trunk/test/FrontendC/2007-02-04-EmptyStruct.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -O3 -S -o - -emit-llvm +// RUN: %llvmgcc %s -O3 -S -o - // PR1175 struct empty { }; Modified: llvm/trunk/test/FrontendC/2007-02-04-WITH_SIZE_EXPR.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2007-02-04-WITH_SIZE_EXPR.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2007-02-04-WITH_SIZE_EXPR.c (original) +++ llvm/trunk/test/FrontendC/2007-02-04-WITH_SIZE_EXPR.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -O3 -S -o - -emit-llvm +// RUN: %llvmgcc %s -O3 -S -o - // PR1174 void zzz (char *s1, char *s2, int len, int *q) Modified: llvm/trunk/test/FrontendC/2007-02-05-nested.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2007-02-05-nested.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2007-02-05-nested.c (original) +++ llvm/trunk/test/FrontendC/2007-02-05-nested.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -S -fnested-functions -O0 -o - -emit-llvm %s +// RUN: %llvmgcc -S -fnested-functions -O0 -o - %s // PR915 extern void abort(void); Modified: llvm/trunk/test/FrontendC/2007-02-07-AddrLabel.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2007-02-07-AddrLabel.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2007-02-07-AddrLabel.c (original) +++ llvm/trunk/test/FrontendC/2007-02-07-AddrLabel.c Thu Nov 25 15:24:35 2010 @@ -1,5 +1,5 @@ // PR947 -// RUN: %llvmgcc %s -c -o - +// RUN: %llvmgcc %s -S -o - void foo() { void *ptr; Modified: llvm/trunk/test/FrontendC/2007-02-16-VoidPtrDiff.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2007-02-16-VoidPtrDiff.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2007-02-16-VoidPtrDiff.c (original) +++ llvm/trunk/test/FrontendC/2007-02-16-VoidPtrDiff.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -o - -emit-llvm +// RUN: %llvmgcc %s -S -o - void foo(void *ptr, int test) { (ptr - ((void *) test + 0x2000)); Modified: llvm/trunk/test/FrontendC/2007-02-16-WritableStrings.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2007-02-16-WritableStrings.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2007-02-16-WritableStrings.c (original) +++ llvm/trunk/test/FrontendC/2007-02-16-WritableStrings.c Thu Nov 25 15:24:35 2010 @@ -1,7 +1,7 @@ // Test the -fwritable-strings option. -// RUN: %llvmgcc -O3 -S -o - -emit-llvm -fwritable-strings %s | \ +// RUN: %llvmgcc -O3 -S -o - -fwritable-strings %s | \ // RUN: grep {internal global} -// RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | grep {private constant} +// RUN: %llvmgcc -O3 -S -o - %s | grep {private constant} char *X = "foo"; Modified: llvm/trunk/test/FrontendC/2007-02-25-C-DotDotDot.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2007-02-25-C-DotDotDot.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2007-02-25-C-DotDotDot.c (original) +++ llvm/trunk/test/FrontendC/2007-02-25-C-DotDotDot.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -O0 -S -o - -emit-llvm -fno-inline -fno-unit-at-a-time %s | \ +// RUN: %llvmgcc -O0 -S -o - -fno-inline -fno-unit-at-a-time %s | \ // RUN: grep {call float @foo} // Make sure the call to foo is compiled as: Modified: llvm/trunk/test/FrontendC/2007-03-01-VarSizeArrayIdx.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2007-03-01-VarSizeArrayIdx.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2007-03-01-VarSizeArrayIdx.c (original) +++ llvm/trunk/test/FrontendC/2007-03-01-VarSizeArrayIdx.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -O3 -S -o - -emit-llvm | grep mul +// RUN: %llvmgcc %s -O3 -S -o - | grep mul // PR1233 float foo(int w, float A[][w], int g, int h) { Modified: llvm/trunk/test/FrontendC/2007-04-11-InlineAsmStruct.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2007-04-11-InlineAsmStruct.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2007-04-11-InlineAsmStruct.c (original) +++ llvm/trunk/test/FrontendC/2007-04-11-InlineAsmStruct.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -o - | llc +// RUN: %llvmgcc %s -S -o - | llc struct V { short X, Y; }; int bar() { Modified: llvm/trunk/test/FrontendC/2007-04-11-InlineAsmUnion.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2007-04-11-InlineAsmUnion.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2007-04-11-InlineAsmUnion.c (original) +++ llvm/trunk/test/FrontendC/2007-04-11-InlineAsmUnion.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -o - | llc +// RUN: %llvmgcc %s -S -o - | llc union U { int x; float p; }; void foo() { Modified: llvm/trunk/test/FrontendC/2007-04-11-InlineStorageClassC89.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2007-04-11-InlineStorageClassC89.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2007-04-11-InlineStorageClassC89.c (original) +++ llvm/trunk/test/FrontendC/2007-04-11-InlineStorageClassC89.c Thu Nov 25 15:24:35 2010 @@ -1,17 +1,17 @@ -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep define | grep xglobWeak | \ +// RUN: %llvmgcc %s -S -O0 -o - | grep define | grep xglobWeak | \ // RUN: grep weak | count 1 -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep define | grep xextWeak | \ +// RUN: %llvmgcc %s -S -O0 -o - | grep define | grep xextWeak | \ // RUN: grep weak | count 1 -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgcc %s -S -O0 -o - | grep define | \ // RUN: grep xWeaknoinline | grep weak | count 1 -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgcc %s -S -O0 -o - | grep define | \ // RUN: grep xWeakextnoinline | grep weak | count 1 -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgcc %s -S -O0 -o - | grep define | \ // RUN: grep xglobnoWeak | grep -v internal | grep -v weak | \ // RUN: grep -v linkonce | count 1 -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgcc %s -S -O0 -o - | grep define | \ // RUN: grep xstatnoWeak | grep internal | count 1 -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgcc %s -S -O0 -o - | grep define | \ // RUN: grep xextnoWeak | grep available_externally | grep -v weak | \ // RUN: grep -v linkonce | count 1 inline int xglobWeak(int) __attribute__((weak)); Modified: llvm/trunk/test/FrontendC/2007-04-11-InlineStorageClassC99.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2007-04-11-InlineStorageClassC99.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2007-04-11-InlineStorageClassC99.c (original) +++ llvm/trunk/test/FrontendC/2007-04-11-InlineStorageClassC99.c Thu Nov 25 15:24:35 2010 @@ -1,17 +1,17 @@ -// RUN: %llvmgcc -std=c99 %s -S -emit-llvm -O0 -o - | grep declare | \ +// RUN: %llvmgcc -std=c99 %s -S -O0 -o - | grep declare | \ // RUN: grep xglobWeak | grep extern_weak | count 1 -// RUN: %llvmgcc -std=c99 %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgcc -std=c99 %s -S -O0 -o - | grep define | \ // RUN: grep xextWeak | grep weak | count 1 -// RUN: %llvmgcc -std=c99 %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgcc -std=c99 %s -S -O0 -o - | grep define | \ // RUN: grep xWeaknoinline | grep weak | count 1 -// RUN: %llvmgcc -std=c99 %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgcc -std=c99 %s -S -O0 -o - | grep define | \ // RUN: grep xWeakextnoinline | grep weak | count 1 -// RUN: %llvmgcc -std=c99 %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgcc -std=c99 %s -S -O0 -o - | grep define | \ // RUN: grep xglobnoWeak | grep available_externally | grep -v weak | \ // RUN: grep -v linkonce | count 1 -// RUN: %llvmgcc -std=c99 %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgcc -std=c99 %s -S -O0 -o - | grep define | \ // RUN: grep xstatnoWeak | grep internal | count 1 -// RUN: %llvmgcc -std=c99 %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgcc -std=c99 %s -S -O0 -o - | grep define | \ // RUN: grep xextnoWeak | grep -v available_externally | grep -v weak | \ // RUN: grep -v linkonce | count 1 inline int xglobWeak(int) __attribute__((weak)); Modified: llvm/trunk/test/FrontendC/2007-04-13-InlineAsmStruct2.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2007-04-13-InlineAsmStruct2.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2007-04-13-InlineAsmStruct2.c (original) +++ llvm/trunk/test/FrontendC/2007-04-13-InlineAsmStruct2.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -o - | grep {call void asm} +// RUN: %llvmgcc %s -S -o - | grep {call void asm} struct V { short X, Y; }; int bar() { Modified: llvm/trunk/test/FrontendC/2007-04-13-InlineAsmUnion2.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2007-04-13-InlineAsmUnion2.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2007-04-13-InlineAsmUnion2.c (original) +++ llvm/trunk/test/FrontendC/2007-04-13-InlineAsmUnion2.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -o - | grep {call void asm} +// RUN: %llvmgcc %s -S -o - | grep {call void asm} union U { int x; char* p; }; void foo() { Modified: llvm/trunk/test/FrontendC/2007-04-24-VolatileStructCopy.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2007-04-24-VolatileStructCopy.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2007-04-24-VolatileStructCopy.c (original) +++ llvm/trunk/test/FrontendC/2007-04-24-VolatileStructCopy.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | grep {volatile store} +// RUN: %llvmgcc -O3 -S -o - %s | grep {volatile store} // PR1352 struct foo { Modified: llvm/trunk/test/FrontendC/2007-04-24-bit-not-expr.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2007-04-24-bit-not-expr.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2007-04-24-bit-not-expr.c (original) +++ llvm/trunk/test/FrontendC/2007-04-24-bit-not-expr.c Thu Nov 25 15:24:35 2010 @@ -1,5 +1,5 @@ // PR 1346 -// RUN: %llvmgcc -c %s -o /dev/null +// RUN: %llvmgcc -S %s -o /dev/null extern bar(void *); void f(void *cd) { Modified: llvm/trunk/test/FrontendC/2007-04-24-str-const.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2007-04-24-str-const.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2007-04-24-str-const.c (original) +++ llvm/trunk/test/FrontendC/2007-04-24-str-const.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -c %s -o /dev/null +// RUN: %llvmgcc -S %s -o /dev/null static char *str; static const struct { Modified: llvm/trunk/test/FrontendC/2007-05-07-PaddingElements.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2007-05-07-PaddingElements.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2007-05-07-PaddingElements.c (original) +++ llvm/trunk/test/FrontendC/2007-05-07-PaddingElements.c Thu Nov 25 15:24:35 2010 @@ -1,6 +1,6 @@ // PR 1278 -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep {struct.s} | not grep "4 x i8] zeroinitializer" -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | not grep "i32 0, i32 2" +// RUN: %llvmgcc %s -S -O0 -o - | grep {struct.s} | not grep "4 x i8] zeroinitializer" +// RUN: %llvmgcc %s -S -O0 -o - | not grep "i32 0, i32 2" struct s { double d1; int s1; Modified: llvm/trunk/test/FrontendC/2007-05-11-str-const.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2007-05-11-str-const.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2007-05-11-str-const.c (original) +++ llvm/trunk/test/FrontendC/2007-05-11-str-const.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -c -g %s -o /dev/null +// RUN: %llvmgcc -S -g %s -o /dev/null static unsigned char out[]={0,1}; static const unsigned char str1[]="1"; Modified: llvm/trunk/test/FrontendC/2007-05-15-PaddingElement.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2007-05-15-PaddingElement.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2007-05-15-PaddingElement.c (original) +++ llvm/trunk/test/FrontendC/2007-05-15-PaddingElement.c Thu Nov 25 15:24:35 2010 @@ -1,6 +1,6 @@ // PR 1419 -// RUN: %llvmgcc -xc -O2 %s -c -o - | llvm-dis | grep "ret i32 1" +// RUN: %llvmgcc -xc -O2 %s -S -o - | grep "ret i32 1" struct A { short x; long long :0; Modified: llvm/trunk/test/FrontendC/2007-05-16-EmptyStruct.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2007-05-16-EmptyStruct.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2007-05-16-EmptyStruct.c (original) +++ llvm/trunk/test/FrontendC/2007-05-16-EmptyStruct.c Thu Nov 25 15:24:35 2010 @@ -1,5 +1,5 @@ // PR 1417 -// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep "struct.anon = type \{\}" +// RUN: %llvmgcc -xc %s -S -o - | grep "struct.anon = type \{\}" struct { } *X; Modified: llvm/trunk/test/FrontendC/2007-05-29-UnionCopy.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2007-05-29-UnionCopy.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2007-05-29-UnionCopy.c (original) +++ llvm/trunk/test/FrontendC/2007-05-29-UnionCopy.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -S -o - -emit-llvm %s | grep memcpy +// RUN: %llvmgcc -S -o - %s | grep memcpy // PR1421 struct A { Modified: llvm/trunk/test/FrontendC/2007-06-05-NoInlineAttribute.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2007-06-05-NoInlineAttribute.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2007-06-05-NoInlineAttribute.c (original) +++ llvm/trunk/test/FrontendC/2007-06-05-NoInlineAttribute.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -O2 -c -emit-llvm %s -o - | llvm-dis | grep call +// RUN: %llvmgcc -O2 -S %s -o - | grep call static int bar(int x, int y) __attribute__((noinline)); Modified: llvm/trunk/test/FrontendC/2007-06-15-AnnotateAttribute.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2007-06-15-AnnotateAttribute.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2007-06-15-AnnotateAttribute.c (original) +++ llvm/trunk/test/FrontendC/2007-06-15-AnnotateAttribute.c Thu Nov 25 15:24:35 2010 @@ -1,5 +1,5 @@ -// RUN: %llvmgcc -c -emit-llvm %s -o - | llvm-dis | grep llvm.global.annotations -// RUN: %llvmgcc -c -emit-llvm %s -o - | llvm-dis | grep llvm.var.annotation | count 3 +// RUN: %llvmgcc -S %s -o - | grep llvm.global.annotations +// RUN: %llvmgcc -S %s -o - | grep llvm.var.annotation | count 3 #include Modified: llvm/trunk/test/FrontendC/2007-06-18-SextAttrAggregate.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2007-06-18-SextAttrAggregate.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2007-06-18-SextAttrAggregate.c (original) +++ llvm/trunk/test/FrontendC/2007-06-18-SextAttrAggregate.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -o - -S -emit-llvm -O3 | grep {i8 signext} +// RUN: %llvmgcc %s -o - -S -O3 | grep {i8 signext} // PR1513 struct s{ Modified: llvm/trunk/test/FrontendC/2007-07-29-RestrictPtrArg.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2007-07-29-RestrictPtrArg.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2007-07-29-RestrictPtrArg.c (original) +++ llvm/trunk/test/FrontendC/2007-07-29-RestrictPtrArg.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -c -emit-llvm %s -o - | llvm-dis | grep noalias +// RUN: %llvmgcc -S %s -o - | grep noalias void foo(int * __restrict myptr1, int * myptr2) { myptr1[0] = 0; Modified: llvm/trunk/test/FrontendC/2007-08-01-LoadStoreAlign.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2007-08-01-LoadStoreAlign.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2007-08-01-LoadStoreAlign.c (original) +++ llvm/trunk/test/FrontendC/2007-08-01-LoadStoreAlign.c Thu Nov 25 15:24:35 2010 @@ -1,5 +1,5 @@ -// RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | grep {align 1} | count 2 -// RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | llc +// RUN: %llvmgcc -O3 -S -o - %s | grep {align 1} | count 2 +// RUN: %llvmgcc -O3 -S -o - %s | llc struct p { char a; Modified: llvm/trunk/test/FrontendC/2007-08-21-ComplexCst.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2007-08-21-ComplexCst.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2007-08-21-ComplexCst.c (original) +++ llvm/trunk/test/FrontendC/2007-08-21-ComplexCst.c Thu Nov 25 15:24:35 2010 @@ -1,3 +1,3 @@ -// RUN: %llvmgcc -O2 -c %s -o /dev/null +// RUN: %llvmgcc -O2 -S %s -o /dev/null void f(_Complex float z); void g() { f(1.0i); } Modified: llvm/trunk/test/FrontendC/2007-09-05-ConstCtor.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2007-09-05-ConstCtor.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2007-09-05-ConstCtor.c (original) +++ llvm/trunk/test/FrontendC/2007-09-05-ConstCtor.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc -Os -c %s -o /dev/null +// RUN: %llvmgcc -xc -Os -S %s -o /dev/null // PR1641 struct A { Modified: llvm/trunk/test/FrontendC/2007-09-20-GcrootAttribute.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2007-09-20-GcrootAttribute.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2007-09-20-GcrootAttribute.c (original) +++ llvm/trunk/test/FrontendC/2007-09-20-GcrootAttribute.c Thu Nov 25 15:24:35 2010 @@ -1,6 +1,6 @@ -// RUN: %llvmgcc -S -emit-llvm %s -o - | grep llvm.gcroot -// RUN: %llvmgcc -S -emit-llvm %s -o - | grep llvm.gcroot | count 6 -// RUN: %llvmgcc -S -emit-llvm %s -o - | llvm-as +// RUN: %llvmgcc -S %s -o - | grep llvm.gcroot +// RUN: %llvmgcc -S %s -o - | grep llvm.gcroot | count 6 +// RUN: %llvmgcc -S %s -o - | llvm-as typedef struct foo_s { Modified: llvm/trunk/test/FrontendC/2007-11-07-AlignedMemcpy.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2007-11-07-AlignedMemcpy.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2007-11-07-AlignedMemcpy.c (original) +++ llvm/trunk/test/FrontendC/2007-11-07-AlignedMemcpy.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -c %s -o /dev/null +// RUN: %llvmgcc -S %s -o /dev/null void bork() { int Qux[33] = {0}; } Modified: llvm/trunk/test/FrontendC/2007-11-27-SExtZExt.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2007-11-27-SExtZExt.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2007-11-27-SExtZExt.c (original) +++ llvm/trunk/test/FrontendC/2007-11-27-SExtZExt.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -S %s -emit-llvm -o - | grep "signext" | count 4 +// RUN: %llvmgcc -S %s -o - | grep "signext" | count 4 signed char foo1() { return 1; } Modified: llvm/trunk/test/FrontendC/2008-01-25-ByValReadNone.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2008-01-25-ByValReadNone.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2008-01-25-ByValReadNone.c (original) +++ llvm/trunk/test/FrontendC/2008-01-25-ByValReadNone.c Thu Nov 25 15:24:35 2010 @@ -1,5 +1,5 @@ -// RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | not grep readonly -// RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | not grep readnone +// RUN: %llvmgcc -O3 -S -o - %s | not grep readonly +// RUN: %llvmgcc -O3 -S -o - %s | not grep readnone // The struct being passed byval means that we cannot mark the Modified: llvm/trunk/test/FrontendC/2008-01-28-PragmaMark.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2008-01-28-PragmaMark.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2008-01-28-PragmaMark.c (original) +++ llvm/trunk/test/FrontendC/2008-01-28-PragmaMark.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -Werror -c %s -o /dev/null +// RUN: %llvmgcc -Werror -S %s -o /dev/null #pragma mark LLVM's world #ifdef DO_ERROR #error LLVM's world Modified: llvm/trunk/test/FrontendC/2008-03-03-CtorAttrType.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2008-03-03-CtorAttrType.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2008-03-03-CtorAttrType.c (original) +++ llvm/trunk/test/FrontendC/2008-03-03-CtorAttrType.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -o - | grep llvm.global_ctors +// RUN: %llvmgcc %s -S -o - | grep llvm.global_ctors int __attribute__((constructor)) foo(void) { return 0; } Modified: llvm/trunk/test/FrontendC/2008-03-05-syncPtr.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2008-03-05-syncPtr.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2008-03-05-syncPtr.c (original) +++ llvm/trunk/test/FrontendC/2008-03-05-syncPtr.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -o - | grep llvm.atomic +// RUN: %llvmgcc %s -S -o - | grep llvm.atomic // XFAIL: sparc-sun-solaris2|arm // Feature currently implemented only for x86, alpha, powerpc. Modified: llvm/trunk/test/FrontendC/2008-05-19-AlwaysInline.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2008-05-19-AlwaysInline.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2008-05-19-AlwaysInline.c (original) +++ llvm/trunk/test/FrontendC/2008-05-19-AlwaysInline.c Thu Nov 25 15:24:35 2010 @@ -1,5 +1,5 @@ -// RUN: %llvmgcc %s -S -fno-unit-at-a-time -emit-llvm -O0 -o - | not grep sabrina -// RUN: %llvmgcc %s -S -funit-at-a-time -emit-llvm -O0 -o - | not grep sabrina +// RUN: %llvmgcc %s -S -fno-unit-at-a-time -O0 -o - | not grep sabrina +// RUN: %llvmgcc %s -S -funit-at-a-time -O0 -o - | not grep sabrina static inline int sabrina (void) __attribute__((always_inline)); static inline int sabrina (void) Modified: llvm/trunk/test/FrontendC/2008-08-07-AlignPadding1.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2008-08-07-AlignPadding1.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2008-08-07-AlignPadding1.c (original) +++ llvm/trunk/test/FrontendC/2008-08-07-AlignPadding1.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -/* RUN: %llvmgcc %s -S -o - -emit-llvm -O0 | grep {zeroinitializer.*zeroinitializer.*zeroinitializer.*zeroinitializer.*zeroinitializer.*zeroinitializer} +/* RUN: %llvmgcc %s -S -o - -O0 | grep {zeroinitializer.*zeroinitializer.*zeroinitializer.*zeroinitializer.*zeroinitializer.*zeroinitializer} The FE must generate padding here both at the end of each PyG_Head and between array elements. Reduced from Python. */ Modified: llvm/trunk/test/FrontendC/2008-08-07-AlignPadding2.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2008-08-07-AlignPadding2.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2008-08-07-AlignPadding2.c (original) +++ llvm/trunk/test/FrontendC/2008-08-07-AlignPadding2.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -/* RUN: %llvmgcc %s -S -o - -emit-llvm -O0 | grep zeroinitializer | count 1 +/* RUN: %llvmgcc %s -S -o - -O0 | grep zeroinitializer | count 1 The FE must not generate padding here between array elements. PR 2533. */ Modified: llvm/trunk/test/FrontendC/2008-10-30-ZeroPlacement.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2008-10-30-ZeroPlacement.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2008-10-30-ZeroPlacement.c (original) +++ llvm/trunk/test/FrontendC/2008-10-30-ZeroPlacement.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -c %s +// RUN: %llvmgcc -S %s // PR2987 struct S2045 { Modified: llvm/trunk/test/FrontendC/2008-11-02-WeakAlias.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2008-11-02-WeakAlias.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2008-11-02-WeakAlias.c (original) +++ llvm/trunk/test/FrontendC/2008-11-02-WeakAlias.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -S -emit-llvm -o - %s | grep weak +// RUN: %llvmgcc -S -o - %s | grep weak // PR2691 void init_IRQ(void) __attribute__((weak, alias("native_init_IRQ"))); Modified: llvm/trunk/test/FrontendC/2008-11-08-InstCombineSelect.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2008-11-08-InstCombineSelect.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2008-11-08-InstCombineSelect.c (original) +++ llvm/trunk/test/FrontendC/2008-11-08-InstCombineSelect.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -O2 -o - +// RUN: %llvmgcc %s -S -O2 -o - // PR3028 int g_187; Modified: llvm/trunk/test/FrontendC/2008-11-11-AnnotateStructFieldAttribute.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2008-11-11-AnnotateStructFieldAttribute.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2008-11-11-AnnotateStructFieldAttribute.c (original) +++ llvm/trunk/test/FrontendC/2008-11-11-AnnotateStructFieldAttribute.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -c -emit-llvm %s -o - | llvm-dis | grep llvm.ptr.annotation | count 3 +// RUN: %llvmgcc -S %s -o - | grep llvm.ptr.annotation | count 3 #include Modified: llvm/trunk/test/FrontendC/2008-12-23-AsmIntPointerTie.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2008-12-23-AsmIntPointerTie.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2008-12-23-AsmIntPointerTie.c (original) +++ llvm/trunk/test/FrontendC/2008-12-23-AsmIntPointerTie.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -O1 -o - +// RUN: %llvmgcc %s -S -O1 -o - #include Modified: llvm/trunk/test/FrontendC/2009-01-05-BlockInlining.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2009-01-05-BlockInlining.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2009-01-05-BlockInlining.c (original) +++ llvm/trunk/test/FrontendC/2009-01-05-BlockInlining.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -O2 -o %t.s +// RUN: %llvmgcc %s -S -O2 -o %t.s // RUN: grep {call i32 .*printf.*argc} %t.s | count 3 // RUN: not grep __block_holder_tmp %t.s // rdar://5865221 Modified: llvm/trunk/test/FrontendC/2009-03-13-dbg.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2009-03-13-dbg.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2009-03-13-dbg.c (original) +++ llvm/trunk/test/FrontendC/2009-03-13-dbg.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -c -g -o /dev/null +// RUN: %llvmgcc %s -S -g -o /dev/null // XTARGET: darwin,linux // XFAIL: * void foo() {} Modified: llvm/trunk/test/FrontendC/2009-05-04-EnumInreg.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2009-05-04-EnumInreg.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2009-05-04-EnumInreg.c (original) +++ llvm/trunk/test/FrontendC/2009-05-04-EnumInreg.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -S -m32 -mregparm=3 %s -emit-llvm -o - | grep {inreg %action} +// RUN: %llvmgcc -S -m32 -mregparm=3 %s -o - | grep {inreg %action} // XFAIL: * // XTARGET: x86,i386,i686 // PR3967 Modified: llvm/trunk/test/FrontendC/2010-01-13-MemBarrier.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2010-01-13-MemBarrier.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2010-01-13-MemBarrier.c (original) +++ llvm/trunk/test/FrontendC/2010-01-13-MemBarrier.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -o - | FileCheck %s +// RUN: %llvmgcc %s -S -o - | FileCheck %s // XFAIL: sparc // rdar://7536390 Modified: llvm/trunk/test/FrontendC/2010-05-18-asmsched.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2010-05-18-asmsched.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2010-05-18-asmsched.c (original) +++ llvm/trunk/test/FrontendC/2010-05-18-asmsched.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -c -O3 -emit-llvm -o - | llc -march=x86-64 -mtriple=x86_64-apple-darwin | FileCheck %s +// RUN: %llvmgcc %s -S -O3 -o - | llc -march=x86-64 -mtriple=x86_64-apple-darwin | FileCheck %s // r9 used to be clobbered before its value was moved to r10. 7993104. void foo(int x, int y) { Modified: llvm/trunk/test/FrontendC/2010-05-26-AsmSideEffect.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2010-05-26-AsmSideEffect.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2010-05-26-AsmSideEffect.c (original) +++ llvm/trunk/test/FrontendC/2010-05-26-AsmSideEffect.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -o - | FileCheck %s +// RUN: %llvmgcc %s -S -o - | FileCheck %s // Radar 8026855 int test (void *src) { Modified: llvm/trunk/test/FrontendC/2010-06-28-nowarn.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2010-06-28-nowarn.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2010-06-28-nowarn.c (original) +++ llvm/trunk/test/FrontendC/2010-06-28-nowarn.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -c -m32 -fasm-blocks -o /dev/null +// RUN: %llvmgcc %s -S -m32 -fasm-blocks -o /dev/null // This should not warn about unreferenced label. 7729514. // XFAIL: * // XTARGET: x86,i386,i686 Modified: llvm/trunk/test/FrontendC/2010-07-14-overconservative-align.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2010-07-14-overconservative-align.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2010-07-14-overconservative-align.c (original) +++ llvm/trunk/test/FrontendC/2010-07-14-overconservative-align.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -emit-llvm -S -o - | FileCheck %s +// RUN: %llvmgcc %s -S -o - | FileCheck %s // PR 5995 struct s { int word; Modified: llvm/trunk/test/FrontendC/attribute_constructor.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/attribute_constructor.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/attribute_constructor.c (original) +++ llvm/trunk/test/FrontendC/attribute_constructor.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -c -o - | llvm-dis | grep llvm.global_ctors +// RUN: %llvmgcc %s -S -o - | grep llvm.global_ctors void foo() __attribute__((constructor)); void foo() { Modified: llvm/trunk/test/FrontendC/block-copy.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/block-copy.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/block-copy.c (original) +++ llvm/trunk/test/FrontendC/block-copy.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -/* RUN: %llvmgcc %s -S -o - -emit-llvm -O3 | grep {call.*memcpy} +/* RUN: %llvmgcc %s -S -o - -O3 | grep {call.*memcpy} This should compile into a memcpy from a global, not 128 stores. */ Modified: llvm/trunk/test/FrontendC/cstring-align.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/cstring-align.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/cstring-align.c (original) +++ llvm/trunk/test/FrontendC/cstring-align.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -c -Os -emit-llvm -o - | llc -march=x86 -mtriple=i386-apple-darwin10 | FileCheck %s +// RUN: %llvmgcc %s -S -Os -o - | llc -march=x86 -mtriple=i386-apple-darwin10 | FileCheck %s extern void func(const char *, const char *); Modified: llvm/trunk/test/FrontendC/extern-weak.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/extern-weak.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/extern-weak.c (original) +++ llvm/trunk/test/FrontendC/extern-weak.c Thu Nov 25 15:24:35 2010 @@ -1,5 +1,5 @@ -// RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | grep extern_weak -// RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | llc +// RUN: %llvmgcc -O3 -S -o - %s | grep extern_weak +// RUN: %llvmgcc -O3 -S -o - %s | llc #if !defined(__linux__) && !defined(__FreeBSD__) && \ !defined(__OpenBSD__) && !defined(__CYGWIN__) && !defined(__DragonFly__) Modified: llvm/trunk/test/FrontendC/func-aligned.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/func-aligned.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/func-aligned.c (original) +++ llvm/trunk/test/FrontendC/func-aligned.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -o - | FileCheck %s +// RUN: %llvmgcc %s -S -o - | FileCheck %s // rdar://7270273 void foo() __attribute__((aligned (64))); Modified: llvm/trunk/test/FrontendC/hidden-visibility.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/hidden-visibility.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/hidden-visibility.c (original) +++ llvm/trunk/test/FrontendC/hidden-visibility.c Thu Nov 25 15:24:35 2010 @@ -1,3 +1,3 @@ -// RUN: %llvmgcc %s -emit-llvm -S -o - | grep {hidden global} +// RUN: %llvmgcc %s -S -o - | grep {hidden global} int X __attribute__ ((__visibility__ ("hidden"))) = 123; Modified: llvm/trunk/test/FrontendC/implicit-arg.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/implicit-arg.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/implicit-arg.c (original) +++ llvm/trunk/test/FrontendC/implicit-arg.c Thu Nov 25 15:24:35 2010 @@ -1,5 +1,5 @@ -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - -// RUN: %llvmgcc %s -S -emit-llvm -O1 -o - +// RUN: %llvmgcc %s -S -O0 -o - +// RUN: %llvmgcc %s -S -O1 -o - // rdar://6518089 static int bar(); Modified: llvm/trunk/test/FrontendC/libcalls-d.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/libcalls-d.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/libcalls-d.c (original) +++ llvm/trunk/test/FrontendC/libcalls-d.c Thu Nov 25 15:24:35 2010 @@ -1,10 +1,10 @@ // llvm-gcc -O1+ should run simplify libcalls, O0 shouldn't // and -fno-builtins shouldn't. // -fno-math-errno should emit an llvm intrinsic, -fmath-errno should not. -// RUN: %llvmgcc %s -S -fno-math-errno -emit-llvm -O0 -o - | grep {call.*exp2\\.f64} -// RUN: %llvmgcc %s -S -fmath-errno -emit-llvm -O0 -o - | grep {call.*exp2} -// RUN: %llvmgcc %s -S -emit-llvm -O1 -o - | grep {call.*ldexp} -// RUN: %llvmgcc %s -S -emit-llvm -O3 -fno-builtin -o - | grep {call.*exp2} +// RUN: %llvmgcc %s -S -fno-math-errno -O0 -o - | grep {call.*exp2\\.f64} +// RUN: %llvmgcc %s -S -fmath-errno -O0 -o - | grep {call.*exp2} +// RUN: %llvmgcc %s -S -O1 -o - | grep {call.*ldexp} +// RUN: %llvmgcc %s -S -O3 -fno-builtin -o - | grep {call.*exp2} double exp2(double); Modified: llvm/trunk/test/FrontendC/libcalls-ld.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/libcalls-ld.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/libcalls-ld.c (original) +++ llvm/trunk/test/FrontendC/libcalls-ld.c Thu Nov 25 15:24:35 2010 @@ -1,10 +1,10 @@ // llvm-gcc -O1+ should run simplify libcalls, O0 shouldn't // and -fno-builtins shouldn't. // -fno-math-errno should emit an llvm intrinsic, -fmath-errno should not. -// RUN: %llvmgcc %s -S -fno-math-errno -emit-llvm -O0 -o - | grep {call.*exp2\\..*f} -// RUN: %llvmgcc %s -S -fmath-errno -emit-llvm -O0 -o - | grep {call.*exp2l} -// RUN: %llvmgcc %s -S -emit-llvm -O1 -o - | grep {call.*ldexp} -// RUN: %llvmgcc %s -S -emit-llvm -O3 -fno-builtin -o - | grep {call.*exp2l} +// RUN: %llvmgcc %s -S -fno-math-errno -O0 -o - | grep {call.*exp2\\..*f} +// RUN: %llvmgcc %s -S -fmath-errno -O0 -o - | grep {call.*exp2l} +// RUN: %llvmgcc %s -S -O1 -o - | grep {call.*ldexp} +// RUN: %llvmgcc %s -S -O3 -fno-builtin -o - | grep {call.*exp2l} // If this fails for you because your target doesn't support long double, // please xfail the test. Modified: llvm/trunk/test/FrontendC/libcalls.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/libcalls.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/libcalls.c (original) +++ llvm/trunk/test/FrontendC/libcalls.c Thu Nov 25 15:24:35 2010 @@ -1,10 +1,10 @@ // llvm-gcc -O1+ should run simplify libcalls, O0 shouldn't // and -fno-builtins shouldn't. // -fno-math-errno should emit an llvm intrinsic, -fmath-errno should not. -// RUN: %llvmgcc %s -S -emit-llvm -fno-math-errno -O0 -o - | grep {call.*exp2\\.f32} -// RUN: %llvmgcc %s -S -emit-llvm -fmath-errno -O0 -o - | grep {call.*exp2f} -// RUN: %llvmgcc %s -S -emit-llvm -O1 -o - | grep {call.*ldexp} -// RUN: %llvmgcc %s -S -emit-llvm -O3 -fno-builtin -o - | grep {call.*exp2f} +// RUN: %llvmgcc %s -S -fno-math-errno -O0 -o - | grep {call.*exp2\\.f32} +// RUN: %llvmgcc %s -S -fmath-errno -O0 -o - | grep {call.*exp2f} +// RUN: %llvmgcc %s -S -O1 -o - | grep {call.*ldexp} +// RUN: %llvmgcc %s -S -O3 -fno-builtin -o - | grep {call.*exp2f} float exp2f(float); Modified: llvm/trunk/test/FrontendC/pr3518.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/pr3518.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/pr3518.c (original) +++ llvm/trunk/test/FrontendC/pr3518.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep {= internal global} | count 4 +// RUN: %llvmgcc %s -S -O0 -o - | grep {= internal global} | count 4 // PR 3518 // Some of the objects were coming out as unintialized (external) before 3518 // was fixed. Internal names are different between llvm-gcc and clang so they Modified: llvm/trunk/test/FrontendC/pr4349.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/pr4349.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/pr4349.c (original) +++ llvm/trunk/test/FrontendC/pr4349.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | FileCheck %s +// RUN: %llvmgcc %s -S -O0 -o - | FileCheck %s // PR 4349 union reg Modified: llvm/trunk/test/FrontendC/pr5406.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/pr5406.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/pr5406.c (original) +++ llvm/trunk/test/FrontendC/pr5406.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | FileCheck %s +// RUN: %llvmgcc %s -S -O0 -o - | FileCheck %s // PR 5406 // XFAIL: * Modified: llvm/trunk/test/FrontendC/ptr-rotate.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/ptr-rotate.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/ptr-rotate.c (original) +++ llvm/trunk/test/FrontendC/ptr-rotate.c Thu Nov 25 15:24:35 2010 @@ -1,5 +1,5 @@ -// RUN: %llvmgcc %s -c -m32 -o /dev/null -// RUN: %llvmgcc %s -c -O1 -m32 -emit-llvm -o - | llc -march=x86 -mtriple=i386-apple-darwin9.7 | FileCheck %s -check-prefix=DARWIN +// RUN: %llvmgcc %s -S -m32 -o /dev/null +// RUN: %llvmgcc %s -S -O1 -m32 -o - | llc -march=x86 -mtriple=i386-apple-darwin9.7 | FileCheck %s -check-prefix=DARWIN unsigned int func(void *A) { // DARWIN: roll $27 Modified: llvm/trunk/test/FrontendC/sret.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/sret.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/sret.c (original) +++ llvm/trunk/test/FrontendC/sret.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep sret | count 5 +// RUN: %llvmgcc %s -S -O0 -o - | grep sret | count 5 struct abc { long a; Modified: llvm/trunk/test/FrontendC/sret2.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/sret2.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/sret2.c (original) +++ llvm/trunk/test/FrontendC/sret2.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep sret | count 2 +// RUN: %llvmgcc %s -S -O0 -o - | grep sret | count 2 struct abc { long a; Modified: llvm/trunk/test/FrontendC/unaligned-memcpy.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/unaligned-memcpy.c?rev=120158&r1=120157&r2=120158&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/unaligned-memcpy.c (original) +++ llvm/trunk/test/FrontendC/unaligned-memcpy.c Thu Nov 25 15:24:35 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -o - | llc +// RUN: %llvmgcc %s -S -o - | llc void bork() { char Qux[33] = {0}; From baldrick at free.fr Thu Nov 25 15:26:21 2010 From: baldrick at free.fr (Duncan Sands) Date: Thu, 25 Nov 2010 21:26:21 -0000 Subject: [llvm-commits] [llvm] r120159 - /llvm/trunk/test/FrontendC++/2006-11-20-GlobalSymbols.cpp Message-ID: <20101125212622.007712A6C12E@llvm.org> Author: baldrick Date: Thu Nov 25 15:26:21 2010 New Revision: 120159 URL: http://llvm.org/viewvc/llvm-project?rev=120159&view=rev Log: Judging from the comment, the system assembler is supposed to assemble the output of this test. Since it was producing bitcode, that clearly wasn't happening! Have it produce target assembler and assemble that instead. Modified: llvm/trunk/test/FrontendC++/2006-11-20-GlobalSymbols.cpp Modified: llvm/trunk/test/FrontendC++/2006-11-20-GlobalSymbols.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2006-11-20-GlobalSymbols.cpp?rev=120159&r1=120158&r2=120159&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2006-11-20-GlobalSymbols.cpp (original) +++ llvm/trunk/test/FrontendC++/2006-11-20-GlobalSymbols.cpp Thu Nov 25 15:26:21 2010 @@ -1,7 +1,7 @@ // PR1013 // Check to make sure debug symbols use the correct name for globals and // functions. Will not assemble if it fails to. -// RUN: %llvmgcc -O0 -g -c %s +// RUN: %llvmgcc_only -O0 -g -c %s int foo __asm__("f\001oo"); From baldrick at free.fr Thu Nov 25 15:39:18 2010 From: baldrick at free.fr (Duncan Sands) Date: Thu, 25 Nov 2010 21:39:18 -0000 Subject: [llvm-commits] [llvm] r120160 - /llvm/trunk/test/FrontendC++/ Message-ID: <20101125213918.599742A6C12C@llvm.org> Author: baldrick Date: Thu Nov 25 15:39:17 2010 New Revision: 120160 URL: http://llvm.org/viewvc/llvm-project?rev=120160&view=rev Log: Remove explicit uses of -emit-llvm, the test infrastructure adds it automatically. Use -S with llvm-gcc rather than -c, so tests can work when llvm-gcc is really dragonegg (which can output IR with -S but not -c). Modified: llvm/trunk/test/FrontendC++/2003-08-24-Cleanup.cpp llvm/trunk/test/FrontendC++/2003-08-29-ArgPassingBug.cpp llvm/trunk/test/FrontendC++/2003-11-08-ArrayAddress.cpp llvm/trunk/test/FrontendC++/2004-03-09-UnmangledBuiltinMethods.cpp llvm/trunk/test/FrontendC++/2004-09-27-DidntEmitTemplate.cpp llvm/trunk/test/FrontendC++/2005-07-21-VirtualBaseAccess.cpp llvm/trunk/test/FrontendC++/2006-09-27-Debug-Protection.cpp llvm/trunk/test/FrontendC++/2006-10-30-ClassBitfield.cpp llvm/trunk/test/FrontendC++/2006-11-30-ConstantExprCrash.cpp llvm/trunk/test/FrontendC++/2007-01-02-UnboundedArray.cpp llvm/trunk/test/FrontendC++/2007-01-06-ELF-Thunk-Sections.cpp llvm/trunk/test/FrontendC++/2007-01-06-PtrMethodInit.cpp llvm/trunk/test/FrontendC++/2007-03-27-FunctionVarRename.cpp llvm/trunk/test/FrontendC++/2007-04-11-InlineStorageClassC++.cpp llvm/trunk/test/FrontendC++/2007-05-03-VectorInit.cpp llvm/trunk/test/FrontendC++/2007-05-16-ReverseBitFieldCrash.cpp llvm/trunk/test/FrontendC++/2007-05-23-TryFinally.cpp llvm/trunk/test/FrontendC++/2007-07-29-RestrictPtrArg.cpp llvm/trunk/test/FrontendC++/2007-07-29-RestrictRefArg.cpp llvm/trunk/test/FrontendC++/2007-08-01-RestrictMethod.cpp llvm/trunk/test/FrontendC++/2007-09-10-RecursiveTypeResolution.cpp llvm/trunk/test/FrontendC++/2007-10-01-StructResize.cpp llvm/trunk/test/FrontendC++/2008-10-29-WrongOffset.cpp llvm/trunk/test/FrontendC++/2009-02-16-CtorNames-dbg.cpp llvm/trunk/test/FrontendC++/2009-03-17-dbg.cpp llvm/trunk/test/FrontendC++/2009-04-21-DtorNames-dbg.cpp llvm/trunk/test/FrontendC++/2009-04-23-bool2.cpp llvm/trunk/test/FrontendC++/2009-05-04-PureConstNounwind.cpp llvm/trunk/test/FrontendC++/2009-06-16-DebugInfoCrash.cpp llvm/trunk/test/FrontendC++/2009-06-20-DarwinPPCLayout.cpp llvm/trunk/test/FrontendC++/2009-08-05-ZeroInitWidth.cpp llvm/trunk/test/FrontendC++/2009-08-11-VectorRetTy.cpp llvm/trunk/test/FrontendC++/2009-09-04-modify-crash.cpp llvm/trunk/test/FrontendC++/2009-09-09-packed-layout.cpp llvm/trunk/test/FrontendC++/2009-10-27-crash.cpp llvm/trunk/test/FrontendC++/2010-03-22-empty-baseclass.cpp llvm/trunk/test/FrontendC++/2010-05-11-alwaysinlineinstantiation.cpp llvm/trunk/test/FrontendC++/2010-05-12-PtrToMember-Dbg.cpp llvm/trunk/test/FrontendC++/2010-06-22-BitfieldInit.cpp llvm/trunk/test/FrontendC++/2010-06-22-ZeroBitfield.cpp llvm/trunk/test/FrontendC++/2010-07-19-nowarn.cpp llvm/trunk/test/FrontendC++/2010-07-23-DeclLoc.cpp llvm/trunk/test/FrontendC++/member-alignment.cpp llvm/trunk/test/FrontendC++/ptr-to-method-devirt.cpp llvm/trunk/test/FrontendC++/varargs.cpp llvm/trunk/test/FrontendC++/weak-external.cpp llvm/trunk/test/FrontendC++/x86-64-abi-sret-vs-2word-struct-param.cpp Modified: llvm/trunk/test/FrontendC++/2003-08-24-Cleanup.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2003-08-24-Cleanup.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2003-08-24-Cleanup.cpp (original) +++ llvm/trunk/test/FrontendC++/2003-08-24-Cleanup.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -xc++ %s -c -o - | llvm-dis | grep unwind +// RUN: %llvmgxx -xc++ %s -S -o - | grep unwind struct S { ~S(); }; Modified: llvm/trunk/test/FrontendC++/2003-08-29-ArgPassingBug.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2003-08-29-ArgPassingBug.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2003-08-29-ArgPassingBug.cpp (original) +++ llvm/trunk/test/FrontendC++/2003-08-29-ArgPassingBug.cpp Thu Nov 25 15:39:17 2010 @@ -1,5 +1,5 @@ -// RUN: %llvmgcc -xc++ -c -o /dev/null %s |& not grep WARNING +// RUN: %llvmgcc -xc++ -S -o /dev/null %s |& not grep WARNING struct iterator { iterator(); Modified: llvm/trunk/test/FrontendC++/2003-11-08-ArrayAddress.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2003-11-08-ArrayAddress.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2003-11-08-ArrayAddress.cpp (original) +++ llvm/trunk/test/FrontendC++/2003-11-08-ArrayAddress.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -xc++ %s -c -o - | llvm-dis | grep getelementptr +// RUN: %llvmgxx -xc++ %s -S -o - | grep getelementptr struct foo { int array[100]; Modified: llvm/trunk/test/FrontendC++/2004-03-09-UnmangledBuiltinMethods.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2004-03-09-UnmangledBuiltinMethods.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2004-03-09-UnmangledBuiltinMethods.cpp (original) +++ llvm/trunk/test/FrontendC++/2004-03-09-UnmangledBuiltinMethods.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc++ -c -o - %s | llvm-dis | grep _ZN11AccessFlags6strlenEv +// RUN: %llvmgcc -xc++ -S -o - %s | grep _ZN11AccessFlags6strlenEv struct AccessFlags { void strlen(); Modified: llvm/trunk/test/FrontendC++/2004-09-27-DidntEmitTemplate.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2004-09-27-DidntEmitTemplate.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2004-09-27-DidntEmitTemplate.cpp (original) +++ llvm/trunk/test/FrontendC++/2004-09-27-DidntEmitTemplate.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -xc++ %s -c -o - | llvm-dis | grep callDefaultCtor | \ +// RUN: %llvmgxx -xc++ %s -S -o - | grep callDefaultCtor | \ // RUN: not grep declare // This is a testcase for LLVM PR445, which was a problem where the Modified: llvm/trunk/test/FrontendC++/2005-07-21-VirtualBaseAccess.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2005-07-21-VirtualBaseAccess.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2005-07-21-VirtualBaseAccess.cpp (original) +++ llvm/trunk/test/FrontendC++/2005-07-21-VirtualBaseAccess.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -xc++ %s -c -o - | opt -die | llvm-dis | not grep cast +// RUN: %llvmgxx -xc++ %s -S -o - | opt -die -S | not grep cast void foo(int*); Modified: llvm/trunk/test/FrontendC++/2006-09-27-Debug-Protection.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2006-09-27-Debug-Protection.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2006-09-27-Debug-Protection.cpp (original) +++ llvm/trunk/test/FrontendC++/2006-09-27-Debug-Protection.cpp Thu Nov 25 15:39:17 2010 @@ -1,5 +1,5 @@ -// RUN: %llvmgxx -O0 -emit-llvm -S -g -o - %s | grep {i32 1,} -// RUN: %llvmgxx -O0 -emit-llvm -S -g -o - %s | grep {i32 2,} +// RUN: %llvmgxx -O0 -S -g -o - %s | grep {i32 1,} +// RUN: %llvmgxx -O0 -S -g -o - %s | grep {i32 2,} class A { public: int x; Modified: llvm/trunk/test/FrontendC++/2006-10-30-ClassBitfield.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2006-10-30-ClassBitfield.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2006-10-30-ClassBitfield.cpp (original) +++ llvm/trunk/test/FrontendC++/2006-10-30-ClassBitfield.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgxx %s -emit-llvm -S -o - +// RUN: %llvmgxx %s -S -o - // PR954 struct _Refcount_Base { Modified: llvm/trunk/test/FrontendC++/2006-11-30-ConstantExprCrash.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2006-11-30-ConstantExprCrash.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2006-11-30-ConstantExprCrash.cpp (original) +++ llvm/trunk/test/FrontendC++/2006-11-30-ConstantExprCrash.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgxx %s -emit-llvm -S -o - +// RUN: %llvmgxx %s -S -o - // PR1027 struct sys_var { Modified: llvm/trunk/test/FrontendC++/2007-01-02-UnboundedArray.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2007-01-02-UnboundedArray.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2007-01-02-UnboundedArray.cpp (original) +++ llvm/trunk/test/FrontendC++/2007-01-02-UnboundedArray.cpp Thu Nov 25 15:39:17 2010 @@ -1,6 +1,6 @@ // Make sure unbounded arrays compile with debug information. // -// RUN: %llvmgcc -O0 -c -g %s +// RUN: %llvmgcc -O0 -S -g %s // PR1068 Modified: llvm/trunk/test/FrontendC++/2007-01-06-ELF-Thunk-Sections.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2007-01-06-ELF-Thunk-Sections.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2007-01-06-ELF-Thunk-Sections.cpp (original) +++ llvm/trunk/test/FrontendC++/2007-01-06-ELF-Thunk-Sections.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgxx %s -emit-llvm -S -o - | not grep gnu.linkonce. +// RUN: %llvmgxx %s -S -o - | not grep gnu.linkonce. // PR1085 class Modified: llvm/trunk/test/FrontendC++/2007-01-06-PtrMethodInit.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2007-01-06-PtrMethodInit.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2007-01-06-PtrMethodInit.cpp (original) +++ llvm/trunk/test/FrontendC++/2007-01-06-PtrMethodInit.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgxx %s -emit-llvm -S -o - +// RUN: %llvmgxx %s -S -o - // PR1084 extern "C" Modified: llvm/trunk/test/FrontendC++/2007-03-27-FunctionVarRename.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2007-03-27-FunctionVarRename.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2007-03-27-FunctionVarRename.cpp (original) +++ llvm/trunk/test/FrontendC++/2007-03-27-FunctionVarRename.cpp Thu Nov 25 15:39:17 2010 @@ -1,5 +1,5 @@ -// RUN: %llvmgxx %s -emit-llvm -S -o - | not grep eprintf1 -// RUN: %llvmgxx %s -emit-llvm -S -o - | grep eprintf +// RUN: %llvmgxx %s -S -o - | not grep eprintf1 +// RUN: %llvmgxx %s -S -o - | grep eprintf // Only one eprintf should exist in the output Modified: llvm/trunk/test/FrontendC++/2007-04-11-InlineStorageClassC++.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2007-04-11-InlineStorageClassC%2B%2B.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2007-04-11-InlineStorageClassC++.cpp (original) +++ llvm/trunk/test/FrontendC++/2007-04-11-InlineStorageClassC++.cpp Thu Nov 25 15:39:17 2010 @@ -1,16 +1,16 @@ -// RUN: %llvmgxx %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgxx %s -S -O0 -o - | grep define | \ // RUN: grep xglobWeak | grep linkonce | count 1 -// RUN: %llvmgxx %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgxx %s -S -O0 -o - | grep define | \ // RUN: grep xextWeak | grep linkonce | count 1 -// RUN: %llvmgxx %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgxx %s -S -O0 -o - | grep define | \ // RUN: grep xWeaknoinline | grep weak | count 1 -// RUN: %llvmgxx %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgxx %s -S -O0 -o - | grep define | \ // RUN: grep xWeakextnoinline | grep weak | count 1 -// RUN: %llvmgxx %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgxx %s -S -O0 -o - | grep define | \ // RUN: grep xglobnoWeak | grep linkonce | count 1 -// RUN: %llvmgxx %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgxx %s -S -O0 -o - | grep define | \ // RUN: grep xstatnoWeak | grep internal | count 1 -// RUN: %llvmgxx %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgxx %s -S -O0 -o - | grep define | \ // RUN: grep xextnoWeak | grep linkonce | count 1 inline int xglobWeak(int) __attribute__((weak)); inline int xglobWeak (int i) { Modified: llvm/trunk/test/FrontendC++/2007-05-03-VectorInit.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2007-05-03-VectorInit.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2007-05-03-VectorInit.cpp (original) +++ llvm/trunk/test/FrontendC++/2007-05-03-VectorInit.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgxx %s -S -emit-llvm -O0 -o - +// RUN: %llvmgxx %s -S -O0 -o - // PR1378 typedef float v4sf __attribute__((vector_size(16))); Modified: llvm/trunk/test/FrontendC++/2007-05-16-ReverseBitFieldCrash.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2007-05-16-ReverseBitFieldCrash.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2007-05-16-ReverseBitFieldCrash.cpp (original) +++ llvm/trunk/test/FrontendC++/2007-05-16-ReverseBitFieldCrash.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgxx %s -emit-llvm -S -o - +// RUN: %llvmgxx %s -S -o - #pragma reverse_bitfields on typedef unsigned long UINT32; Modified: llvm/trunk/test/FrontendC++/2007-05-23-TryFinally.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2007-05-23-TryFinally.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2007-05-23-TryFinally.cpp (original) +++ llvm/trunk/test/FrontendC++/2007-05-23-TryFinally.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgxx %s -S -emit-llvm -O2 -o - | ignore grep _Unwind_Resume | \ +// RUN: %llvmgxx %s -S -O2 -o - | ignore grep _Unwind_Resume | \ // RUN: wc -l | grep {\[23\]} struct One { }; Modified: llvm/trunk/test/FrontendC++/2007-07-29-RestrictPtrArg.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2007-07-29-RestrictPtrArg.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2007-07-29-RestrictPtrArg.cpp (original) +++ llvm/trunk/test/FrontendC++/2007-07-29-RestrictPtrArg.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -c -emit-llvm %s -o - | llvm-dis | grep noalias +// RUN: %llvmgxx -S %s -o - | grep noalias void foo(int * __restrict myptr1, int * myptr2) { myptr1[0] = 0; Modified: llvm/trunk/test/FrontendC++/2007-07-29-RestrictRefArg.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2007-07-29-RestrictRefArg.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2007-07-29-RestrictRefArg.cpp (original) +++ llvm/trunk/test/FrontendC++/2007-07-29-RestrictRefArg.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -c -emit-llvm %s -o - | llvm-dis | grep noalias +// RUN: %llvmgxx -S %s -o - | grep noalias void foo(int & __restrict myptr1, int & myptr2) { myptr1 = 0; Modified: llvm/trunk/test/FrontendC++/2007-08-01-RestrictMethod.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2007-08-01-RestrictMethod.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2007-08-01-RestrictMethod.cpp (original) +++ llvm/trunk/test/FrontendC++/2007-08-01-RestrictMethod.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -c -emit-llvm %s -o - | llvm-dis | grep noalias +// RUN: %llvmgxx -S %s -o - | grep noalias class foo { Modified: llvm/trunk/test/FrontendC++/2007-09-10-RecursiveTypeResolution.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2007-09-10-RecursiveTypeResolution.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2007-09-10-RecursiveTypeResolution.cpp (original) +++ llvm/trunk/test/FrontendC++/2007-09-10-RecursiveTypeResolution.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -c -emit-llvm %s -o - +// RUN: %llvmgxx -S %s -o - // PR1634 namespace Manta Modified: llvm/trunk/test/FrontendC++/2007-10-01-StructResize.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2007-10-01-StructResize.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2007-10-01-StructResize.cpp (original) +++ llvm/trunk/test/FrontendC++/2007-10-01-StructResize.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -c %s -o /dev/null +// RUN: %llvmgxx -S %s -o /dev/null #pragma pack(4) Modified: llvm/trunk/test/FrontendC++/2008-10-29-WrongOffset.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2008-10-29-WrongOffset.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2008-10-29-WrongOffset.cpp (original) +++ llvm/trunk/test/FrontendC++/2008-10-29-WrongOffset.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgxx %s -c -o /dev/null +// RUN: %llvmgxx %s -S -o /dev/null // PR2917 #include Modified: llvm/trunk/test/FrontendC++/2009-02-16-CtorNames-dbg.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2009-02-16-CtorNames-dbg.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2009-02-16-CtorNames-dbg.cpp (original) +++ llvm/trunk/test/FrontendC++/2009-02-16-CtorNames-dbg.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -S -g --emit-llvm %s -o - | grep "\~A" +// RUN: %llvmgcc -S -g %s -o - | grep "\~A" class A { int i; public: Modified: llvm/trunk/test/FrontendC++/2009-03-17-dbg.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2009-03-17-dbg.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2009-03-17-dbg.cpp (original) +++ llvm/trunk/test/FrontendC++/2009-03-17-dbg.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -c -emit-llvm %s -o /dev/null -g +// RUN: %llvmgxx -S %s -o /dev/null -g // XTARGET: darwin,linux // XFAIL: * template Modified: llvm/trunk/test/FrontendC++/2009-04-21-DtorNames-dbg.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2009-04-21-DtorNames-dbg.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2009-04-21-DtorNames-dbg.cpp (original) +++ llvm/trunk/test/FrontendC++/2009-04-21-DtorNames-dbg.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -c -g %s -o - | llc -O0 -o %t.s +// RUN: %llvmgcc -S -g %s -o - | llc -O0 -o %t.s // RUN: %compile_c %t.s -o %t.o // PR4025 Modified: llvm/trunk/test/FrontendC++/2009-04-23-bool2.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2009-04-23-bool2.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2009-04-23-bool2.cpp (original) +++ llvm/trunk/test/FrontendC++/2009-04-23-bool2.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -c -emit-llvm %s -o /dev/null +// RUN: %llvmgxx -S %s -o /dev/null // g++.old-deja/g++.jason/bool2.C from gcc testsuite. // Crashed before 67975 went in. struct F { Modified: llvm/trunk/test/FrontendC++/2009-05-04-PureConstNounwind.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2009-05-04-PureConstNounwind.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2009-05-04-PureConstNounwind.cpp (original) +++ llvm/trunk/test/FrontendC++/2009-05-04-PureConstNounwind.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -S -emit-llvm %s -o - | grep nounwind | count 4 +// RUN: %llvmgxx -S %s -o - | grep nounwind | count 4 int c(void) __attribute__((const)); int p(void) __attribute__((pure)); int t(void); Modified: llvm/trunk/test/FrontendC++/2009-06-16-DebugInfoCrash.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2009-06-16-DebugInfoCrash.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2009-06-16-DebugInfoCrash.cpp (original) +++ llvm/trunk/test/FrontendC++/2009-06-16-DebugInfoCrash.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -c -emit-llvm %s -o /dev/null -g +// RUN: %llvmgxx -S %s -o /dev/null -g // This crashes if we try to emit debug info for TEMPLATE_DECL members. template class K2PtrVectorBase {}; template class K2Vector {}; Modified: llvm/trunk/test/FrontendC++/2009-06-20-DarwinPPCLayout.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2009-06-20-DarwinPPCLayout.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2009-06-20-DarwinPPCLayout.cpp (original) +++ llvm/trunk/test/FrontendC++/2009-06-20-DarwinPPCLayout.cpp Thu Nov 25 15:39:17 2010 @@ -1,10 +1,10 @@ -// RUN: %llvmgxx -S -m32 -emit-llvm %s -o - | grep baz | grep global | grep {struct.bar} -// RUN: %llvmgxx -S -m32 -emit-llvm %s -o - | grep ccc | grep global | grep {struct.CC} -// RUN: %llvmgxx -S -m32 -emit-llvm %s -o - | grep quux | grep global | grep {struct.bar} -// RUN: %llvmgxx -S -m32 -emit-llvm %s -o - | grep foo | grep global | grep {struct.SRCFilter::FilterEntry} -// RUN: %llvmgxx -S -m32 -emit-llvm %s -o - | grep {struct.bar} | grep {1 x i32} -// RUN: %llvmgxx -S -m32 -emit-llvm %s -o - | grep {struct.CC} | grep {struct.payre typedef void (*Func) (); typedef long long m64 __attribute__((__vector_size__(8), __may_alias__)); Modified: llvm/trunk/test/FrontendC++/2009-09-04-modify-crash.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2009-09-04-modify-crash.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2009-09-04-modify-crash.cpp (original) +++ llvm/trunk/test/FrontendC++/2009-09-04-modify-crash.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgxx %s -emit-llvm -fapple-kext -S -o - +// RUN: %llvmgxx %s -fapple-kext -S -o - // The extra check in 71555 caused this to crash on Darwin X86 // in an assert build. class foo { Modified: llvm/trunk/test/FrontendC++/2009-09-09-packed-layout.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2009-09-09-packed-layout.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2009-09-09-packed-layout.cpp (original) +++ llvm/trunk/test/FrontendC++/2009-09-09-packed-layout.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -S -m32 -emit-llvm %s -o /dev/null +// RUN: %llvmgxx -S -m32 %s -o /dev/null class X { public: virtual ~X(); Modified: llvm/trunk/test/FrontendC++/2009-10-27-crash.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2009-10-27-crash.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2009-10-27-crash.cpp (original) +++ llvm/trunk/test/FrontendC++/2009-10-27-crash.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -emit-llvm -S %s -o /dev/null +// RUN: %llvmgxx -S %s -o /dev/null // Radar 7328944 typedef struct Modified: llvm/trunk/test/FrontendC++/2010-03-22-empty-baseclass.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2010-03-22-empty-baseclass.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2010-03-22-empty-baseclass.cpp (original) +++ llvm/trunk/test/FrontendC++/2010-03-22-empty-baseclass.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -S -emit-llvm %s -o - -O2 | FileCheck %s +// RUN: %llvmgxx -S %s -o - -O2 | FileCheck %s namespace boost { namespace detail { template struct cv_traits_imp {}; Modified: llvm/trunk/test/FrontendC++/2010-05-11-alwaysinlineinstantiation.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2010-05-11-alwaysinlineinstantiation.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2010-05-11-alwaysinlineinstantiation.cpp (original) +++ llvm/trunk/test/FrontendC++/2010-05-11-alwaysinlineinstantiation.cpp Thu Nov 25 15:39:17 2010 @@ -1,5 +1,5 @@ -// RUN: %llvmgxx -xc++ %s -c -o - | llvm-dis | not grep ZN12basic_stringIcEC1Ev -// RUN: %llvmgxx -xc++ %s -c -o - | llvm-dis | grep ZN12basic_stringIcED1Ev | count 2 +// RUN: %llvmgxx -xc++ %s -S -o - | not grep ZN12basic_stringIcEC1Ev +// RUN: %llvmgxx -xc++ %s -S -o - | grep ZN12basic_stringIcED1Ev | count 2 template class basic_string Modified: llvm/trunk/test/FrontendC++/2010-05-12-PtrToMember-Dbg.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2010-05-12-PtrToMember-Dbg.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2010-05-12-PtrToMember-Dbg.cpp (original) +++ llvm/trunk/test/FrontendC++/2010-05-12-PtrToMember-Dbg.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -//RUN: %llvmgxx -O0 -emit-llvm -S -g -o - %s | grep DW_TAG_auto_variable +//RUN: %llvmgxx -O0 -S -g -o - %s | grep DW_TAG_auto_variable class Foo { public: Modified: llvm/trunk/test/FrontendC++/2010-06-22-BitfieldInit.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2010-06-22-BitfieldInit.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2010-06-22-BitfieldInit.cpp (original) +++ llvm/trunk/test/FrontendC++/2010-06-22-BitfieldInit.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -g -c %s +// RUN: %llvmgxx -g -S %s struct TEST2 { int subid:32; Modified: llvm/trunk/test/FrontendC++/2010-06-22-ZeroBitfield.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2010-06-22-ZeroBitfield.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2010-06-22-ZeroBitfield.cpp (original) +++ llvm/trunk/test/FrontendC++/2010-06-22-ZeroBitfield.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -g -c %s +// RUN: %llvmgxx -g -S %s struct s8_0 { unsigned : 0; }; struct s8_1 { double x; }; struct s8 { s8_0 a; s8_1 b; }; Modified: llvm/trunk/test/FrontendC++/2010-07-19-nowarn.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2010-07-19-nowarn.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2010-07-19-nowarn.cpp (original) +++ llvm/trunk/test/FrontendC++/2010-07-19-nowarn.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -c -m32 -fasm-blocks -o /dev/null +// RUN: %llvmgcc %s -S -m32 -fasm-blocks -o /dev/null // This should not warn about unreferenced label. 8195660. // XFAIL: * // XTARGET: x86,i386,i686 Modified: llvm/trunk/test/FrontendC++/2010-07-23-DeclLoc.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2010-07-23-DeclLoc.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/2010-07-23-DeclLoc.cpp (original) +++ llvm/trunk/test/FrontendC++/2010-07-23-DeclLoc.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -emit-llvm -S -g %s -o - | FileCheck %s +// RUN: %llvmgxx -S -g %s -o - | FileCheck %s // Require the template function declaration refer to the correct filename. // First, locate the function decl in metadata, and pluck out the file handle: // CHECK: {{extract_dwarf_data_from_header.*extract_dwarf_data_from_header.*extract_dwarf_data_from_header.*[^ ]+", metadata !}}[[filehandle:[0-9]+]], Modified: llvm/trunk/test/FrontendC++/member-alignment.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/member-alignment.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/member-alignment.cpp (original) +++ llvm/trunk/test/FrontendC++/member-alignment.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -S -emit-llvm %s -o - | FileCheck %s +// RUN: %llvmgxx -S %s -o - | FileCheck %s // XFAIL: arm,powerpc // rdar://7268289 Modified: llvm/trunk/test/FrontendC++/ptr-to-method-devirt.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/ptr-to-method-devirt.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/ptr-to-method-devirt.cpp (original) +++ llvm/trunk/test/FrontendC++/ptr-to-method-devirt.cpp Thu Nov 25 15:39:17 2010 @@ -1,6 +1,6 @@ // PR1602 -// RUN: %llvmgxx -c -emit-llvm %s -o - -O3 | llvm-dis | not grep ptrtoint -// RUN: %llvmgxx -c -emit-llvm %s -o - -O3 | llvm-dis | grep getelementptr | count 1 +// RUN: %llvmgxx -S %s -o - -O3 | not grep ptrtoint +// RUN: %llvmgxx -S %s -o - -O3 | grep getelementptr | count 1 struct S { virtual void f(); }; Modified: llvm/trunk/test/FrontendC++/varargs.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/varargs.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/varargs.cpp (original) +++ llvm/trunk/test/FrontendC++/varargs.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -S -emit-llvm %s -o - | FileCheck %s +// RUN: %llvmgxx -S %s -o - | FileCheck %s // rdar://7309675 // PR4678 Modified: llvm/trunk/test/FrontendC++/weak-external.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/weak-external.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/weak-external.cpp (original) +++ llvm/trunk/test/FrontendC++/weak-external.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgxx %s -S -emit-llvm -O2 -o - | not grep {_ZNSs12_S_constructIPKcEEPcT_S3_RKSaIcESt20forward_iterator_tag} +// RUN: %llvmgxx %s -S -O2 -o - | not grep {_ZNSs12_S_constructIPKcEEPcT_S3_RKSaIcESt20forward_iterator_tag} // PR4262 // The "basic_string" extern template instantiation declaration is supposed to Modified: llvm/trunk/test/FrontendC++/x86-64-abi-sret-vs-2word-struct-param.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/x86-64-abi-sret-vs-2word-struct-param.cpp?rev=120160&r1=120159&r2=120160&view=diff ============================================================================== --- llvm/trunk/test/FrontendC++/x86-64-abi-sret-vs-2word-struct-param.cpp (original) +++ llvm/trunk/test/FrontendC++/x86-64-abi-sret-vs-2word-struct-param.cpp Thu Nov 25 15:39:17 2010 @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -S -emit-llvm %s -o - | grep byval | count 2 +// RUN: %llvmgxx -S %s -o - | grep byval | count 2 // XTARGET: x86 // PR4242 // (PR 4242 bug is on 64-bit only, test passes on x86-32 as well) From baldrick at free.fr Thu Nov 25 15:41:35 2010 From: baldrick at free.fr (Duncan Sands) Date: Thu, 25 Nov 2010 21:41:35 -0000 Subject: [llvm-commits] [llvm] r120161 - in /llvm/trunk/test/FrontendFortran: 2008-11-03-OptionOverride.f90 2009-02-09-FloorDivExpr.f90 cpow.f90 Message-ID: <20101125214135.32F7C2A6C12C@llvm.org> Author: baldrick Date: Thu Nov 25 15:41:35 2010 New Revision: 120161 URL: http://llvm.org/viewvc/llvm-project?rev=120161&view=rev Log: Use -S rather than -c for the benefit of dragonegg. Modified: llvm/trunk/test/FrontendFortran/2008-11-03-OptionOverride.f90 llvm/trunk/test/FrontendFortran/2009-02-09-FloorDivExpr.f90 llvm/trunk/test/FrontendFortran/cpow.f90 Modified: llvm/trunk/test/FrontendFortran/2008-11-03-OptionOverride.f90 URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendFortran/2008-11-03-OptionOverride.f90?rev=120161&r1=120160&r2=120161&view=diff ============================================================================== --- llvm/trunk/test/FrontendFortran/2008-11-03-OptionOverride.f90 (original) +++ llvm/trunk/test/FrontendFortran/2008-11-03-OptionOverride.f90 Thu Nov 25 15:41:35 2010 @@ -1,4 +1,4 @@ -! RUN: %llvmgcc -c %s -march=k8 +! RUN: %llvmgcc -S %s -march=k8 ! XTARGET: x86 ! Note: this file intentionally left blank, the problem itself is in ! frontend initialization routines and march flag! Modified: llvm/trunk/test/FrontendFortran/2009-02-09-FloorDivExpr.f90 URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendFortran/2009-02-09-FloorDivExpr.f90?rev=120161&r1=120160&r2=120161&view=diff ============================================================================== --- llvm/trunk/test/FrontendFortran/2009-02-09-FloorDivExpr.f90 (original) +++ llvm/trunk/test/FrontendFortran/2009-02-09-FloorDivExpr.f90 Thu Nov 25 15:41:35 2010 @@ -1,4 +1,4 @@ -! RUN: %llvmgcc -c %s +! RUN: %llvmgcc -S %s ! PR2437 program main implicit none Modified: llvm/trunk/test/FrontendFortran/cpow.f90 URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendFortran/cpow.f90?rev=120161&r1=120160&r2=120161&view=diff ============================================================================== --- llvm/trunk/test/FrontendFortran/cpow.f90 (original) +++ llvm/trunk/test/FrontendFortran/cpow.f90 Thu Nov 25 15:41:35 2010 @@ -1,4 +1,4 @@ -! RUN: %llvmgcc -c %s +! RUN: %llvmgcc -S %s ! PR2443 ! Program to test the power (**) operator From ofv at wanadoo.es Thu Nov 25 15:41:48 2010 From: ofv at wanadoo.es (Oscar Fuentes) Date: Thu, 25 Nov 2010 21:41:48 -0000 Subject: [llvm-commits] [llvm] r120162 - /llvm/trunk/docs/CMake.html Message-ID: <20101125214148.34D392A6C12C@llvm.org> Author: ofv Date: Thu Nov 25 15:41:48 2010 New Revision: 120162 URL: http://llvm.org/viewvc/llvm-project?rev=120162&view=rev Log: Bump required cmake version on CMake.html. Modified: llvm/trunk/docs/CMake.html Modified: llvm/trunk/docs/CMake.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CMake.html?rev=120162&r1=120161&r2=120162&view=diff ============================================================================== --- llvm/trunk/docs/CMake.html (original) +++ llvm/trunk/docs/CMake.html Thu Nov 25 15:41:48 2010 @@ -68,7 +68,7 @@

      1. Download - and install CMake. Version 2.6.2 is the minimum required.

        + and install CMake. Version 2.8 is the minimum required.

      2. Open a shell. Your development tools must be reachable from this shell through the PATH environment variable.

        From baldrick at free.fr Thu Nov 25 15:46:07 2010 From: baldrick at free.fr (Duncan Sands) Date: Thu, 25 Nov 2010 21:46:07 -0000 Subject: [llvm-commits] [llvm] r120163 - in /llvm/trunk/test/FrontendObjC: 2007-04-03-ObjcEH.m 2007-05-02-Strong.m 2007-09-25-EH.m 2007-10-18-ProDescriptor.m 2007-10-23-GC-WriteBarrier.m 2008-10-3-EhValue.m 2008-11-12-Metadata.m 2008-11-25-Blocks.m 2009-02-05-VolatileProp.m 2009-04-14-AsmSection.m Message-ID: <20101125214607.9F8602A6C12C@llvm.org> Author: baldrick Date: Thu Nov 25 15:46:07 2010 New Revision: 120163 URL: http://llvm.org/viewvc/llvm-project?rev=120163&view=rev Log: Remove explicit uses of -emit-llvm, the test infrastructure adds it automatically. Use -S with llvm-gcc rather than -c, so tests can work when llvm-gcc is really dragonegg (which can output IR with -S but not -c). Yes, dragonegg supports objective-c (poorly though). Modified: llvm/trunk/test/FrontendObjC/2007-04-03-ObjcEH.m llvm/trunk/test/FrontendObjC/2007-05-02-Strong.m llvm/trunk/test/FrontendObjC/2007-09-25-EH.m llvm/trunk/test/FrontendObjC/2007-10-18-ProDescriptor.m llvm/trunk/test/FrontendObjC/2007-10-23-GC-WriteBarrier.m llvm/trunk/test/FrontendObjC/2008-10-3-EhValue.m llvm/trunk/test/FrontendObjC/2008-11-12-Metadata.m llvm/trunk/test/FrontendObjC/2008-11-25-Blocks.m llvm/trunk/test/FrontendObjC/2009-02-05-VolatileProp.m llvm/trunk/test/FrontendObjC/2009-04-14-AsmSection.m Modified: llvm/trunk/test/FrontendObjC/2007-04-03-ObjcEH.m URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendObjC/2007-04-03-ObjcEH.m?rev=120163&r1=120162&r2=120163&view=diff ============================================================================== --- llvm/trunk/test/FrontendObjC/2007-04-03-ObjcEH.m (original) +++ llvm/trunk/test/FrontendObjC/20