From undingen at gmail.com Mon Jan 24 00:00:27 2011 From: undingen at gmail.com (Marius Wachtler) Date: Mon, 24 Jan 2011 07:00:27 +0100 Subject: [llvm-commits] Infinite recursion in StringRefTest Message-ID: Hello In the StringRef unittest is a std::ostream operator overload which calls itself. The function is not called in the tests hence it didn't show up. Patch attached... -- Marius Wachtler Index: StringRefTest.cpp =================================================================== --- StringRefTest.cpp (revision 124109) +++ StringRefTest.cpp (working copy) @@ -16,7 +16,7 @@ namespace llvm { std::ostream &operator<<(std::ostream &OS, const StringRef &S) { - OS << S; + OS << S.str(); return OS; } From undingen at gmail.com Mon Jan 24 00:01:48 2011 From: undingen at gmail.com (Marius Wachtler) Date: Mon, 24 Jan 2011 07:01:48 +0100 Subject: [llvm-commits] Infinite recursion in StringRefTest In-Reply-To: References: Message-ID: Patch attached... -------------- next part -------------- A non-text attachment was scrubbed... Name: stringreftest_fix.patch Type: application/octet-stream Size: 327 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110124/ead37112/attachment.obj From baldrick at free.fr Mon Jan 24 03:56:25 2011 From: baldrick at free.fr (Duncan Sands) Date: Mon, 24 Jan 2011 10:56:25 +0100 Subject: [llvm-commits] [llvm] r123990 - in /llvm/trunk: include/llvm/ADT/Triple.h lib/Support/Triple.cpp unittests/ADT/TripleTest.cpp In-Reply-To: <4D3C97BC.7080701@arm.com> References: <20110121182547.37AB92A6C12C@llvm.org> <4D39F247.10707@free.fr> <4D3AC24C.8070307@arm.com> <4D3C2B76.90808@free.fr> <4D3C97BC.7080701@arm.com> Message-ID: <4D3D4CC9.7040101@free.fr> Hi Renato, > The bug (segfault) happened because Triple was reading a three-token > triple (so the vector size was 3) and trying to re-create a four-token > triple (by writing to the 4th element). Before adding GNU as > environment, the bug was never there, but now that environment is not > *always* invalid, the bug showed up. I tested this code using input like "linux" (which gets transformed to "--linux") which could be expected to have the same issue, which is what makes me think that something more is going on. Ciao, Duncan. From baldrick at free.fr Mon Jan 24 04:12:19 2011 From: baldrick at free.fr (Duncan Sands) Date: Mon, 24 Jan 2011 11:12:19 +0100 Subject: [llvm-commits] [llvm] r123990 - in /llvm/trunk: include/llvm/ADT/Triple.h lib/Support/Triple.cpp unittests/ADT/TripleTest.cpp In-Reply-To: <4D3C946B.3020606@arm.com> References: <20110121182547.37AB92A6C12C@llvm.org> <4D39F247.10707@free.fr> <4D3ABC27.30908@free.fr> <4D3AC2C4.2090604@arm.com> <4D3C2C92.9010708@free.fr> <4D3C946B.3020606@arm.com> Message-ID: <4D3D5083.2010708@free.fr> Hi Renato, > I personally don't think it's too much to add NoOS and NoEnvironment to > the Triple class, since many of the OSs would end up having the same > codegen anyway. But if you feel strongly about it, I can add the option > to a supposedly Clang's Triple class. I don't see the point of having "none" be turned into "NoVendor" rather than "UnknownVendor" if you aren't go to do anything with that information anyway. However if you have a good reason to want "none" to be parsed then I will drop my objections to "none" :) There is an additional problem with "none", which is that it is ambiguous: if you see a "none" component, is it a vendor, an O/S or an environment? For example, suppose you have "arm*-none-eabi". Then the architecture is clearly "arm*". The environment could be "none" or "eabi"; since "none" could also be a vendor or an O/S while "eabi" can only be an environment, we can deduce that the environment is "eabi" (I don't think Normalize does this reasoning right now, but it could and probably should be enhanced to do so). At this point "none" could be the O/S or the vendor. Since it is in the vendor position, currently we will suppose it is the vendor. Is that the right conclusion or should it mean the O/S? If "none" was only valid as an O/S (and not as a vendor or environment) then the current code would turn this triple into "arm*--none-eabi", which is probably what you want. But if you have "arm*-none-eabi-linux" (does this kind of triple really occur?) then it is still ambiguous as to whether the O/S should be "none" or "linux". On the other hand, if you don't say that "none" is valid for anything, then "arm*-none-eabi" will become "arm*-none--eabi" (leaving "none" in the vendor position) which is probably fine as far as LLVM is concerned since it wouldn't make different decisions with an O/S of "none" as compared to an UnknownOS. In short, whether "none" is parsed at all, or only parsed as a valid "O/S", or parsed as a valid vendor and a valid O/S etc depends on what triples occur in the real world and what you plan to do with the information. So can you please give some examples. Thanks, Duncan. From Renato.Golin at arm.com Mon Jan 24 05:30:40 2011 From: Renato.Golin at arm.com (Renato Golin) Date: Mon, 24 Jan 2011 11:30:40 +0000 Subject: [llvm-commits] [llvm] r123990 - in /llvm/trunk: include/llvm/ADT/Triple.h lib/Support/Triple.cpp unittests/ADT/TripleTest.cpp In-Reply-To: <4D3D5083.2010708@free.fr> References: <20110121182547.37AB92A6C12C@llvm.org> <4D39F247.10707@free.fr> <4D3ABC27.30908@free.fr> <4D3AC2C4.2090604@arm.com> <4D3C2C92.9010708@free.fr> <4D3C946B.3020606@arm.com> <4D3D5083.2010708@free.fr> Message-ID: <4D3D62E0.4080602@arm.com> On 01/24/11 10:12, Duncan Sands wrote: > I don't see the point of having "none" be turned into "NoVendor" rather than > "UnknownVendor" if you aren't go to do anything with that information anyway. > However if you have a good reason to want "none" to be parsed then I will > drop my objections to "none" :) I guess that falls together with the LLVM/Clang triple implementation. Clang should interpret UnknownVendor to "none" and not LLVM changed to have a dubious and duplicated "none". > In short, whether "none" is parsed at all, or only parsed as a > valid "O/S", or parsed as a valid vendor and a valid O/S etc depends on what > triples occur in the real world and what you plan to do with the information. I agree. My mistake was to try and not break anything that was already working. Some ARM triples I found in the wild... -- From CodeSourcery: * arm-none-eabi none I "guess" it's for vendor, and no OS * arm-none-linux-gnueabi again, it's vendor * arm-none-symbianelf again, vendor is none, but OS and Env (ELF) are joined up also, ELF and EABI are not auto-exclusive * arm-uclinuxeabi OS/Env joined up again, but nothing for vendor... weird -- From GCC docs: * arm-*-freebsd * arm-*-netbsdelf * arm-*-*linux * arm-*-rtems Nothing new here... -- From a GCC bug (16350): * armv5b-softfloat-linux 'b' means big-endian, and softfloat is the Env. As you can see, ARM triples are a mess. Most of them will fail to parse in the naive triple parsing LLVM has today. I'm not saying we should add hack-logic to it, though. What we could do is to have a ClangTriple to pre-parse the hacks and transform into a triple conforming to the LLVM standards (pre-normalise), and then pass to the Triple to parse it and normalise. This way, that normalised (correct) triple will be printed in the IR and LLC will understand it perfectly. Example: Clang cmd-line: - arm-uclinuxeabi ClangTriple: - arm-uclinux-eabi Triple: - arm--uclinux-eabi Clang writes on IR: - arm-none-uclinux-eabi LLC: - arm--uclinux-eabi (vendor is UnknownVendor) Does it make sense? cheers, --renato PS: We're only left with the extra options that the IR cannot represent today (sub-architecture, build attributes, etc), breaking the two-step compilation, but that's a complete different problem whatsoever. -- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. From ismail at namtrac.org Mon Jan 24 05:36:34 2011 From: ismail at namtrac.org (=?UTF-8?B?xLBzbWFpbCBEw7ZubWV6?=) Date: Mon, 24 Jan 2011 13:36:34 +0200 Subject: [llvm-commits] [llvm] r123990 - in /llvm/trunk: include/llvm/ADT/Triple.h lib/Support/Triple.cpp unittests/ADT/TripleTest.cpp In-Reply-To: <4D3D62E0.4080602@arm.com> References: <20110121182547.37AB92A6C12C@llvm.org> <4D39F247.10707@free.fr> <4D3ABC27.30908@free.fr> <4D3AC2C4.2090604@arm.com> <4D3C2C92.9010708@free.fr> <4D3C946B.3020606@arm.com> <4D3D5083.2010708@free.fr> <4D3D62E0.4080602@arm.com> Message-ID: Hi; On Mon, Jan 24, 2011 at 1:30 PM, Renato Golin wrote: > On 01/24/11 10:12, Duncan Sands wrote: > > I don't see the point of having "none" be turned into "NoVendor" rather > than > > "UnknownVendor" if you aren't go to do anything with that information > anyway. > > However if you have a good reason to want "none" to be parsed then I will > > drop my objections to "none" :) > > I guess that falls together with the LLVM/Clang triple implementation. > > Clang should interpret UnknownVendor to "none" and not LLVM changed to > have a dubious and duplicated "none". > > > > In short, whether "none" is parsed at all, or only parsed as a > > valid "O/S", or parsed as a valid vendor and a valid O/S etc depends on > what > > triples occur in the real world and what you plan to do with the > information. > > I agree. My mistake was to try and not break anything that was already > working. > > Some ARM triples I found in the wild... > > -- From CodeSourcery: > > * arm-none-eabi > none I "guess" it's for vendor, and no OS > > * arm-none-linux-gnueabi > again, it's vendor > Android started using arm-linux-androideabi recently, old one was arm-eabi. Regards, ismail -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110124/f861942b/attachment.html From daniel at zuster.org Mon Jan 24 11:27:17 2011 From: daniel at zuster.org (Daniel Dunbar) Date: Mon, 24 Jan 2011 17:27:17 -0000 Subject: [llvm-commits] [llvm] r124124 - /llvm/trunk/lib/Support/CommandLine.cpp Message-ID: <20110124172717.B36852A6C12C@llvm.org> Author: ddunbar Date: Mon Jan 24 11:27:17 2011 New Revision: 124124 URL: http://llvm.org/viewvc/llvm-project?rev=124124&view=rev Log: Support/CommandLine: Fix LookupNearestOption to also search extra option names. Modified: llvm/trunk/lib/Support/CommandLine.cpp Modified: llvm/trunk/lib/Support/CommandLine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/CommandLine.cpp?rev=124124&r1=124123&r2=124124&view=diff ============================================================================== --- llvm/trunk/lib/Support/CommandLine.cpp (original) +++ llvm/trunk/lib/Support/CommandLine.cpp Mon Jan 24 11:27:17 2011 @@ -185,7 +185,8 @@ /// (after an equal sign) return that as well. This assumes that leading dashes /// have already been stripped. static Option *LookupNearestOption(StringRef Arg, - const StringMap &OptionsMap) { + const StringMap &OptionsMap, + const char *&NearestString) { // Reject all dashes. if (Arg.empty()) return 0; @@ -197,11 +198,21 @@ unsigned BestDistance = 0; for (StringMap::const_iterator it = OptionsMap.begin(), ie = OptionsMap.end(); it != ie; ++it) { - unsigned Distance = StringRef(it->second->ArgStr).edit_distance( - Arg, /*AllowReplacements=*/true, /*MaxEditDistance=*/BestDistance); - if (!Best || Distance < BestDistance) { - Best = it->second; - BestDistance = Distance; + Option *O = it->second; + SmallVector OptionNames; + O->getExtraOptionNames(OptionNames); + if (O->ArgStr[0]) + OptionNames.push_back(O->ArgStr); + + for (size_t i = 0, e = OptionNames.size(); i != e; ++i) { + StringRef Name = OptionNames[i]; + unsigned Distance = StringRef(Name).edit_distance( + Arg, /*AllowReplacements=*/true, /*MaxEditDistance=*/BestDistance); + if (!Best || Distance < BestDistance) { + Best = O; + NearestString = OptionNames[i]; + BestDistance = Distance; + } } } @@ -600,6 +611,7 @@ for (int i = 1; i < argc; ++i) { Option *Handler = 0; Option *NearestHandler = 0; + const char *NearestHandlerString = 0; StringRef Value; StringRef ArgName = ""; @@ -677,7 +689,8 @@ // Otherwise, look for the closest available option to report to the user // in the upcoming error. if (Handler == 0 && SinkOpts.empty()) - NearestHandler = LookupNearestOption(ArgName, Opts); + NearestHandler = LookupNearestOption(ArgName, Opts, + NearestHandlerString); } if (Handler == 0) { @@ -685,9 +698,11 @@ errs() << ProgramName << ": Unknown command line argument '" << argv[i] << "'. Try: '" << argv[0] << " -help'\n"; - // If we know a near match, report it as well. - errs() << ProgramName << ": Did you mean '-" - << NearestHandler->ArgStr << "'?\n"; + if (NearestHandler) { + // If we know a near match, report it as well. + errs() << ProgramName << ": Did you mean '-" + << NearestHandlerString << "'?\n"; + } ErrorParsing = true; } else { From rdivacky at freebsd.org Mon Jan 24 11:55:50 2011 From: rdivacky at freebsd.org (Roman Divacky) Date: Mon, 24 Jan 2011 18:55:50 +0100 Subject: [llvm-commits] [PATCH]: patch for .cfi register parsing Message-ID: <20110124175550.GA18819@freebsd.org> Hi, some .cfi directives take register as an argument, ie: .cfi_def_cfa_register %ebp The attached patch implements that. The patch makes ParseRegister method in TargetAsmParser public. I made that change only in X86 in that patch as I want some comment on whether this is the correct thing to do. Thank you! roman -------------- next part -------------- A non-text attachment was scrubbed... Name: llvm-cfi-register.patch Type: text/x-diff Size: 3843 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110124/2c3f8039/attachment.bin -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 196 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110124/2c3f8039/attachment-0001.bin From gohman at apple.com Mon Jan 24 11:54:02 2011 From: gohman at apple.com (Dan Gohman) Date: Mon, 24 Jan 2011 17:54:02 -0000 Subject: [llvm-commits] [llvm] r124125 - /llvm/trunk/test/Analysis/BasicAA/full-store-partial-alias.ll Message-ID: <20110124175402.1243F2A6C12C@llvm.org> Author: djg Date: Mon Jan 24 11:54:01 2011 New Revision: 124125 URL: http://llvm.org/viewvc/llvm-project?rev=124125&view=rev Log: Add another rdar number. Modified: llvm/trunk/test/Analysis/BasicAA/full-store-partial-alias.ll Modified: llvm/trunk/test/Analysis/BasicAA/full-store-partial-alias.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/BasicAA/full-store-partial-alias.ll?rev=124125&r1=124124&r2=124125&view=diff ============================================================================== --- llvm/trunk/test/Analysis/BasicAA/full-store-partial-alias.ll (original) +++ llvm/trunk/test/Analysis/BasicAA/full-store-partial-alias.ll Mon Jan 24 11:54:01 2011 @@ -1,6 +1,6 @@ ; RUN: opt -S -tbaa -basicaa -gvn < %s | grep {ret i32 %} ; RUN: opt -S -tbaa -gvn < %s | grep {ret i32 0} -; rdar://8875631 +; rdar://8875631, rdar://8875069 ; BasicAA should notice that the store stores to the entire %u object, ; so the %tmp5 load is PartialAlias with the store and suppress TBAA. From gohman at apple.com Mon Jan 24 11:54:18 2011 From: gohman at apple.com (Dan Gohman) Date: Mon, 24 Jan 2011 17:54:18 -0000 Subject: [llvm-commits] [llvm] r124126 - /llvm/trunk/lib/Analysis/ScalarEvolution.cpp Message-ID: <20110124175418.5AF2C2A6C12C@llvm.org> Author: djg Date: Mon Jan 24 11:54:18 2011 New Revision: 124126 URL: http://llvm.org/viewvc/llvm-project?rev=124126&view=rev Log: Add a comment. Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=124126&r1=124125&r2=124126&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original) +++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Mon Jan 24 11:54:18 2011 @@ -3126,6 +3126,7 @@ /// ConstantRange ScalarEvolution::getSignedRange(const SCEV *S) { + // See if we've computed this range already. DenseMap::iterator I = SignedRanges.find(S); if (I != SignedRanges.end()) return I->second; From rafael.espindola at gmail.com Mon Jan 24 12:02:54 2011 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Mon, 24 Jan 2011 18:02:54 -0000 Subject: [llvm-commits] [llvm] r124127 - in /llvm/trunk: lib/MC/MCParser/ELFAsmParser.cpp test/MC/ELF/section.s Message-ID: <20110124180254.6C74D2A6C12C@llvm.org> Author: rafael Date: Mon Jan 24 12:02:54 2011 New Revision: 124127 URL: http://llvm.org/viewvc/llvm-project?rev=124127&view=rev Log: Handle strings in section names the same way as gas: * If the name is a single string, we remove the quotes * If the name starts without a quote, we include any quotes in the name Modified: llvm/trunk/lib/MC/MCParser/ELFAsmParser.cpp llvm/trunk/test/MC/ELF/section.s Modified: llvm/trunk/lib/MC/MCParser/ELFAsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCParser/ELFAsmParser.cpp?rev=124127&r1=124126&r2=124127&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCParser/ELFAsmParser.cpp (original) +++ llvm/trunk/lib/MC/MCParser/ELFAsmParser.cpp Mon Jan 24 12:02:54 2011 @@ -168,6 +168,12 @@ SMLoc FirstLoc = getLexer().getLoc(); unsigned Size = 0; + if (getLexer().is(AsmToken::String)) { + SectionName = getTok().getIdentifier(); + Lex(); + return false; + } + for (;;) { StringRef Tmp; unsigned CurSize; @@ -176,10 +182,15 @@ if (getLexer().is(AsmToken::Minus)) { CurSize = 1; Lex(); // Consume the "-". - } else if (!getParser().ParseIdentifier(Tmp)) - CurSize = Tmp.size(); - else + } else if (getLexer().is(AsmToken::String)) { + CurSize = getTok().getIdentifier().size() + 2; + Lex(); + } else if (getLexer().is(AsmToken::Identifier)) { + CurSize = getTok().getIdentifier().size(); + Lex(); + } else { break; + } Size += CurSize; SectionName = StringRef(FirstLoc.getPointer(), Size); Modified: llvm/trunk/test/MC/ELF/section.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/section.s?rev=124127&r1=124126&r2=124127&view=diff ============================================================================== --- llvm/trunk/test/MC/ELF/section.s (original) +++ llvm/trunk/test/MC/ELF/section.s Mon Jan 24 12:02:54 2011 @@ -101,3 +101,10 @@ // CHECK-NEXT: ('sh_addralign', 0x00000001) // CHECK-NEXT: ('sh_entsize', 0x00000000) // CHECK-NEXT: ), + +// Test that we handle the strings like gas +.section bar-"foo" +.section "foo" + +// CHECK: ('sh_name', 0x0000008a) # 'bar-"foo"' +// CHECK: ('sh_name', 0x00000094) # 'foo' From baldrick at free.fr Mon Jan 24 12:04:13 2011 From: baldrick at free.fr (Duncan Sands) Date: Mon, 24 Jan 2011 18:04:13 -0000 Subject: [llvm-commits] [dragonegg] r124128 - in /dragonegg/trunk: llvm-convert.cpp llvm-internal.h Message-ID: <20110124180413.954CB2A6C12C@llvm.org> Author: baldrick Date: Mon Jan 24 12:04:13 2011 New Revision: 124128 URL: http://llvm.org/viewvc/llvm-project?rev=124128&view=rev Log: Taking a VIEW_CONVERT_EXPR of a REAL_CST requires an lvalue for the REAL_CST. Provide one rather than crashing! Modified: dragonegg/trunk/llvm-convert.cpp dragonegg/trunk/llvm-internal.h Modified: dragonegg/trunk/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/llvm-convert.cpp?rev=124128&r1=124127&r2=124128&view=diff ============================================================================== --- dragonegg/trunk/llvm-convert.cpp (original) +++ dragonegg/trunk/llvm-convert.cpp Mon Jan 24 12:04:13 2011 @@ -1258,6 +1258,11 @@ LV = LValue(Ptr, get_constant_alignment(exp) / 8); break; } + case REAL_CST: { + Value *Ptr = TreeConstantToLLVM::EmitLV_REAL_CST(exp); + LV = LValue(Ptr, get_constant_alignment(exp) / 8); + break; + } case STRING_CST: { Value *Ptr = TreeConstantToLLVM::EmitLV_STRING_CST(exp); LV = LValue(Ptr, get_constant_alignment(exp) / 8); @@ -8717,6 +8722,9 @@ case COMPLEX_CST: LV = EmitLV_COMPLEX_CST(exp); break; + case REAL_CST: + LV = EmitLV_REAL_CST(exp); + break; case STRING_CST: LV = EmitLV_STRING_CST(exp); break; @@ -8796,6 +8804,21 @@ return Slot; } +Constant *TreeConstantToLLVM::EmitLV_REAL_CST(tree exp) { + Constant *Init = TreeConstantToLLVM::ConvertREAL_CST(exp); + + // Cache the constants to avoid making obvious duplicates that have to be + // folded by the optimizer. + static std::map RealCSTCache; + GlobalVariable *&Slot = RealCSTCache[Init]; + if (Slot) return Slot; + + // Create a new real global. + Slot = new GlobalVariable(*TheModule, Init->getType(), true, + GlobalVariable::PrivateLinkage, Init, ".rl"); + return Slot; +} + Constant *TreeConstantToLLVM::EmitLV_STRING_CST(tree exp) { Constant *Init = TreeConstantToLLVM::ConvertSTRING_CST(exp); Modified: dragonegg/trunk/llvm-internal.h URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/llvm-internal.h?rev=124128&r1=124127&r2=124128&view=diff ============================================================================== --- dragonegg/trunk/llvm-internal.h (original) +++ dragonegg/trunk/llvm-internal.h Mon Jan 24 12:04:13 2011 @@ -844,6 +844,7 @@ static Constant *EmitLV_Decl(tree_node *exp); static Constant *EmitLV_LABEL_DECL(tree_node *exp); static Constant *EmitLV_COMPLEX_CST(tree_node *exp); + static Constant *EmitLV_REAL_CST(tree_node *exp); static Constant *EmitLV_STRING_CST(tree_node *exp); static Constant *EmitLV_COMPONENT_REF(tree_node *exp); static Constant *EmitLV_ARRAY_REF(tree_node *exp); From baldrick at free.fr Mon Jan 24 12:04:33 2011 From: baldrick at free.fr (Duncan Sands) Date: Mon, 24 Jan 2011 18:04:33 -0000 Subject: [llvm-commits] [llvm] r124129 - in /llvm/trunk/test/FrontendAda: Support/real_cst.ads real_cst.adb Message-ID: <20110124180433.6B6632A6C12C@llvm.org> Author: baldrick Date: Mon Jan 24 12:04:33 2011 New Revision: 124129 URL: http://llvm.org/viewvc/llvm-project?rev=124129&view=rev Log: Testcase for dragonegg commit 124128. Added: llvm/trunk/test/FrontendAda/Support/real_cst.ads llvm/trunk/test/FrontendAda/real_cst.adb Added: llvm/trunk/test/FrontendAda/Support/real_cst.ads URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendAda/Support/real_cst.ads?rev=124129&view=auto ============================================================================== --- llvm/trunk/test/FrontendAda/Support/real_cst.ads (added) +++ llvm/trunk/test/FrontendAda/Support/real_cst.ads Mon Jan 24 12:04:33 2011 @@ -0,0 +1,4 @@ +with Ada.Streams; +package Real_Cst is + procedure Write (Stream : access Ada.Streams.Root_Stream_Type'Class); +end; Added: llvm/trunk/test/FrontendAda/real_cst.adb URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendAda/real_cst.adb?rev=124129&view=auto ============================================================================== --- llvm/trunk/test/FrontendAda/real_cst.adb (added) +++ llvm/trunk/test/FrontendAda/real_cst.adb Mon Jan 24 12:04:33 2011 @@ -0,0 +1,8 @@ +-- RUN: %llvmgcc -S -O2 -gnatn %s +package body Real_Cst is + Cst : constant Float := 0.0; + procedure Write (Stream : access Ada.Streams.Root_Stream_Type'Class) is + begin + Float'Write (Stream, Cst); + end; +end; From sabre at nondot.org Mon Jan 24 12:36:51 2011 From: sabre at nondot.org (Chris Lattner) Date: Mon, 24 Jan 2011 18:36:51 -0000 Subject: [llvm-commits] [llvm] r124132 - /llvm/trunk/lib/Analysis/ProfileEstimatorPass.cpp Message-ID: <20110124183651.CB8C12A6C12C@llvm.org> Author: lattner Date: Mon Jan 24 12:36:51 2011 New Revision: 124132 URL: http://llvm.org/viewvc/llvm-project?rev=124132&view=rev Log: fix PR8928 by clearing a stale map, patch by Jakub Staszak! Modified: llvm/trunk/lib/Analysis/ProfileEstimatorPass.cpp Modified: llvm/trunk/lib/Analysis/ProfileEstimatorPass.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ProfileEstimatorPass.cpp?rev=124132&r1=124131&r2=124132&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ProfileEstimatorPass.cpp (original) +++ llvm/trunk/lib/Analysis/ProfileEstimatorPass.cpp Mon Jan 24 12:36:51 2011 @@ -323,6 +323,7 @@ FunctionInformation.erase(&F); BlockInformation[&F].clear(); EdgeInformation[&F].clear(); + BBToVisit.clear(); // Mark all blocks as to visit. for (Function::iterator bi = F.begin(), be = F.end(); bi != be; ++bi) From gohman at apple.com Mon Jan 24 12:53:32 2011 From: gohman at apple.com (Dan Gohman) Date: Mon, 24 Jan 2011 18:53:32 -0000 Subject: [llvm-commits] [llvm] r124134 - in /llvm/trunk: include/llvm/Analysis/ValueTracking.h lib/Analysis/BasicAliasAnalysis.cpp lib/Analysis/ConstantFolding.cpp lib/Analysis/Lint.cpp lib/Analysis/MemoryDependenceAnalysis.cpp lib/Analysis/ValueTracking.cpp lib/Transforms/Scalar/DeadStoreElimination.cpp lib/Transforms/Scalar/GVN.cpp lib/Transforms/Scalar/ScalarReplAggregates.cpp Message-ID: <20110124185332.EDC552A6C12C@llvm.org> Author: djg Date: Mon Jan 24 12:53:32 2011 New Revision: 124134 URL: http://llvm.org/viewvc/llvm-project?rev=124134&view=rev Log: Give GetUnderlyingObject a TargetData, to keep it in sync with BasicAA's DecomposeGEPExpression, which recently began using a TargetData. This fixes PR8968, though the testcase is awkward to reduce. Also, update several off GetUnderlyingObject's users which happen to have a TargetData handy to pass it in. Modified: llvm/trunk/include/llvm/Analysis/ValueTracking.h llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp llvm/trunk/lib/Analysis/ConstantFolding.cpp llvm/trunk/lib/Analysis/Lint.cpp llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp llvm/trunk/lib/Analysis/ValueTracking.cpp llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp llvm/trunk/lib/Transforms/Scalar/GVN.cpp llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp Modified: llvm/trunk/include/llvm/Analysis/ValueTracking.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/ValueTracking.h?rev=124134&r1=124133&r2=124134&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/ValueTracking.h (original) +++ llvm/trunk/include/llvm/Analysis/ValueTracking.h Mon Jan 24 12:53:32 2011 @@ -133,10 +133,12 @@ /// being addressed. Note that the returned value has pointer type if the /// specified value does. If the MaxLookup value is non-zero, it limits the /// number of instructions to be stripped off. - Value *GetUnderlyingObject(Value *V, unsigned MaxLookup = 6); + Value *GetUnderlyingObject(Value *V, const TargetData *TD = 0, + unsigned MaxLookup = 6); static inline const Value * - GetUnderlyingObject(const Value *V, unsigned MaxLookup = 6) { - return GetUnderlyingObject(const_cast(V), MaxLookup); + GetUnderlyingObject(const Value *V, const TargetData *TD = 0, + unsigned MaxLookup = 6) { + return GetUnderlyingObject(const_cast(V), TD, MaxLookup); } } // end namespace llvm Modified: llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp?rev=124134&r1=124133&r2=124134&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp (original) +++ llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp Mon Jan 24 12:53:32 2011 @@ -554,7 +554,7 @@ SmallVector Worklist; Worklist.push_back(Loc.Ptr); do { - const Value *V = GetUnderlyingObject(Worklist.pop_back_val()); + const Value *V = GetUnderlyingObject(Worklist.pop_back_val(), TD); if (!Visited.insert(V)) { Visited.clear(); return AliasAnalysis::pointsToConstantMemory(Loc, OrLocal); @@ -659,7 +659,7 @@ assert(notDifferentParent(CS.getInstruction(), Loc.Ptr) && "AliasAnalysis query involving multiple functions!"); - const Value *Object = GetUnderlyingObject(Loc.Ptr); + const Value *Object = GetUnderlyingObject(Loc.Ptr, TD); // If this is a tail call and Loc.Ptr points to a stack location, we know that // the tail call cannot access or modify the local stack. @@ -787,7 +787,7 @@ /// aliasGEP - Provide a bunch of ad-hoc rules to disambiguate a GEP instruction /// against another pointer. We know that V1 is a GEP, but we don't know -/// anything about V2. UnderlyingV1 is GetUnderlyingObject(GEP1), +/// anything about V2. UnderlyingV1 is GetUnderlyingObject(GEP1, TD), /// UnderlyingV2 is the same for V2. /// AliasAnalysis::AliasResult @@ -1070,8 +1070,8 @@ return NoAlias; // Scalars cannot alias each other // Figure out what objects these things are pointing to if we can. - const Value *O1 = GetUnderlyingObject(V1); - const Value *O2 = GetUnderlyingObject(V2); + const Value *O1 = GetUnderlyingObject(V1, TD); + const Value *O2 = GetUnderlyingObject(V2, TD); // Null values in the default address space don't point to any object, so they // don't alias any other pointer. Modified: llvm/trunk/lib/Analysis/ConstantFolding.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ConstantFolding.cpp?rev=124134&r1=124133&r2=124134&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ConstantFolding.cpp (original) +++ llvm/trunk/lib/Analysis/ConstantFolding.cpp Mon Jan 24 12:53:32 2011 @@ -467,7 +467,8 @@ // If this load comes from anywhere in a constant global, and if the global // is all undef or zero, we know what it loads. - if (GlobalVariable *GV = dyn_cast(GetUnderlyingObject(CE))){ + if (GlobalVariable *GV = + dyn_cast(GetUnderlyingObject(CE, TD))) { if (GV->isConstant() && GV->hasDefinitiveInitializer()) { const Type *ResTy = cast(C->getType())->getElementType(); if (GV->getInitializer()->isNullValue()) Modified: llvm/trunk/lib/Analysis/Lint.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/Lint.cpp?rev=124134&r1=124133&r2=124134&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/Lint.cpp (original) +++ llvm/trunk/lib/Analysis/Lint.cpp Mon Jan 24 12:53:32 2011 @@ -567,7 +567,7 @@ // TODO: Look through eliminable cast pairs. // TODO: Look through calls with unique return values. // TODO: Look through vector insert/extract/shuffle. - V = OffsetOk ? GetUnderlyingObject(V) : V->stripPointerCasts(); + V = OffsetOk ? GetUnderlyingObject(V, TD) : V->stripPointerCasts(); if (LoadInst *L = dyn_cast(V)) { BasicBlock::iterator BBI = L; BasicBlock *BB = L->getParent(); Modified: llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp?rev=124134&r1=124133&r2=124134&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp (original) +++ llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp Mon Jan 24 12:53:32 2011 @@ -339,7 +339,7 @@ // need to continue scanning until the malloc call. if (isa(Inst) || (isa(Inst) && extractMallocCall(Inst))) { - const Value *AccessPtr = GetUnderlyingObject(MemLoc.Ptr); + const Value *AccessPtr = GetUnderlyingObject(MemLoc.Ptr, TD); if (AccessPtr == Inst || AA->alias(Inst, 1, AccessPtr, 1) == AliasAnalysis::MustAlias) Modified: llvm/trunk/lib/Analysis/ValueTracking.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ValueTracking.cpp?rev=124134&r1=124133&r2=124134&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ValueTracking.cpp (original) +++ llvm/trunk/lib/Analysis/ValueTracking.cpp Mon Jan 24 12:53:32 2011 @@ -1504,7 +1504,8 @@ return Len == ~0ULL ? 1 : Len; } -Value *llvm::GetUnderlyingObject(Value *V, unsigned MaxLookup) { +Value * +llvm::GetUnderlyingObject(Value *V, const TargetData *TD, unsigned MaxLookup) { if (!V->getType()->isPointerTy()) return V; for (unsigned Count = 0; MaxLookup == 0 || Count < MaxLookup; ++Count) { @@ -1519,8 +1520,8 @@ } else { // See if InstructionSimplify knows any relevant tricks. if (Instruction *I = dyn_cast(V)) - // TODO: Aquire TargetData and DominatorTree and use them. - if (Value *Simplified = SimplifyInstruction(I, 0, 0)) { + // TODO: Aquire a DominatorTree and use it. + if (Value *Simplified = SimplifyInstruction(I, TD, 0)) { V = Simplified; continue; } Modified: llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp?rev=124134&r1=124133&r2=124134&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp Mon Jan 24 12:53:32 2011 @@ -321,7 +321,8 @@ // other store to the same object. const TargetData &TD = *AA.getTargetData(); - const Value *UO1 = GetUnderlyingObject(P1), *UO2 = GetUnderlyingObject(P2); + const Value *UO1 = GetUnderlyingObject(P1, &TD), + *UO2 = GetUnderlyingObject(P2, &TD); // If we can't resolve the same pointers to the same object, then we can't // analyze them at all. Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=124134&r1=124133&r2=124134&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Mon Jan 24 12:53:32 2011 @@ -818,7 +818,7 @@ Constant *Src = dyn_cast(MTI->getSource()); if (Src == 0) return -1; - GlobalVariable *GV = dyn_cast(GetUnderlyingObject(Src)); + GlobalVariable *GV = dyn_cast(GetUnderlyingObject(Src, &TD)); if (GV == 0 || !GV->isConstant()) return -1; // See if the access is within the bounds of the transfer. Modified: llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp?rev=124134&r1=124133&r2=124134&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp Mon Jan 24 12:53:32 2011 @@ -529,9 +529,9 @@ // If the source and destination are both to the same alloca, then this is // a noop copy-to-self, just delete it. Otherwise, emit a load and store // as appropriate. - AllocaInst *OrigAI = cast(GetUnderlyingObject(Ptr, 0)); + AllocaInst *OrigAI = cast(GetUnderlyingObject(Ptr, &TD, 0)); - if (GetUnderlyingObject(MTI->getSource(), 0) != OrigAI) { + if (GetUnderlyingObject(MTI->getSource(), &TD, 0) != OrigAI) { // Dest must be OrigAI, change this to be a load from the original // pointer (bitcasted), then a store to our new alloca. assert(MTI->getRawDest() == Ptr && "Neither use is of pointer?"); @@ -547,7 +547,7 @@ LoadInst *SrcVal = Builder.CreateLoad(SrcPtr, "srcval"); SrcVal->setAlignment(MTI->getAlignment()); Builder.CreateStore(SrcVal, NewAI); - } else if (GetUnderlyingObject(MTI->getDest(), 0) != OrigAI) { + } else if (GetUnderlyingObject(MTI->getDest(), &TD, 0) != OrigAI) { // Src must be OrigAI, change this to be a load from NewAI then a store // through the original dest pointer (bitcasted). assert(MTI->getRawSource() == Ptr && "Neither use is of pointer?"); From atrick at apple.com Mon Jan 24 13:08:15 2011 From: atrick at apple.com (Andrew Trick) Date: Mon, 24 Jan 2011 19:08:15 -0000 Subject: [llvm-commits] [llvm] r124137 - /llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Message-ID: <20110124190815.CC1D62A6C12C@llvm.org> Author: atrick Date: Mon Jan 24 13:08:15 2011 New Revision: 124137 URL: http://llvm.org/viewvc/llvm-project?rev=124137&view=rev Log: Temporarily workaround JM/lencod miscompile (SIGSEGV). rdar://problem/8893967 Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp?rev=124137&r1=124136&r2=124137&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Mon Jan 24 13:08:15 2011 @@ -1645,11 +1645,13 @@ // NumSuccsLeft counts all deps. Don't compare it with NumSuccs which only // counts data deps. To be more precise, we could maintain a // NumDataSuccsLeft count. + /* FIXME: exposing a downstream bug, JM/lencode miscompile if (PredSU->NumSuccsLeft != PredSU->Succs.size()) { DEBUG(dbgs() << " SU(" << PredSU->NodeNum << ") live across SU(" << SU->NodeNum << ")\n"); continue; } + */ const SDNode *PN = PredSU->getNode(); if (!PN->isMachineOpcode()) { if (PN->getOpcode() == ISD::CopyFromReg) { From dpatel at apple.com Mon Jan 24 13:24:37 2011 From: dpatel at apple.com (Devang Patel) Date: Mon, 24 Jan 2011 19:24:37 -0000 Subject: [llvm-commits] [llvm] r124138 - in /llvm/trunk: lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll Message-ID: <20110124192437.BE5E42A6C12C@llvm.org> Author: dpatel Date: Mon Jan 24 13:24:37 2011 New Revision: 124138 URL: http://llvm.org/viewvc/llvm-project?rev=124138&view=rev Log: Resolve DanglingDbgValue of PHI nodes where the use follows dbg.value intrinisic. Added: llvm/trunk/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=124138&r1=124137&r2=124138&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Mon Jan 24 13:24:37 2011 @@ -929,7 +929,9 @@ unsigned InReg = It->second; RegsForValue RFV(*DAG.getContext(), TLI, InReg, V->getType()); SDValue Chain = DAG.getEntryNode(); - return N = RFV.getCopyFromRegs(DAG, FuncInfo, getCurDebugLoc(), Chain,NULL); + N = RFV.getCopyFromRegs(DAG, FuncInfo, getCurDebugLoc(), Chain,NULL); + resolveDanglingDebugInfo(V, N); + return N; } // Otherwise create a new SDValue and remember it. Added: llvm/trunk/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll?rev=124138&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll (added) +++ llvm/trunk/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll Mon Jan 24 13:24:37 2011 @@ -0,0 +1,103 @@ +; RUN: llc < %s | FileCheck %s +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin10.0.0" + +; Check debug info for variable z_s +;CHECK: .ascii "z_s" ## DW_AT_name +;CHECK-NEXT: .byte 0 +;CHECK-NEXT: .byte 1 ## DW_AT_decl_file +;CHECK-NEXT: .byte 27 ## DW_AT_decl_line +;CHECK-NEXT: .long 203 ## DW_AT_type +;CHECK-NEXT: ## DW_AT_location + + + at .str1 = private unnamed_addr constant [14 x i8] c"m=%u, z_s=%d\0A\00" + at str = internal constant [21 x i8] c"Failing test vector:\00" + +define i64 @gcd(i64 %a, i64 %b) nounwind readnone optsize noinline ssp { +entry: + tail call void @llvm.dbg.value(metadata !{i64 %a}, i64 0, metadata !10), !dbg !18 + tail call void @llvm.dbg.value(metadata !{i64 %b}, i64 0, metadata !11), !dbg !19 + br label %while.body, !dbg !20 + +while.body: ; preds = %while.body, %entry + %b.addr.0 = phi i64 [ %b, %entry ], [ %rem, %while.body ] + %a.addr.0 = phi i64 [ %a, %entry ], [ %b.addr.0, %while.body ] + %rem = srem i64 %a.addr.0, %b.addr.0, !dbg !21 + %cmp = icmp eq i64 %rem, 0, !dbg !23 + br i1 %cmp, label %if.then, label %while.body, !dbg !23 + +if.then: ; preds = %while.body + tail call void @llvm.dbg.value(metadata !{i64 %rem}, i64 0, metadata !12), !dbg !21 + ret i64 %b.addr.0, !dbg !23 +} + +define i32 @main() nounwind optsize ssp { +entry: + %call = tail call i32 @rand() nounwind optsize, !dbg !24 + tail call void @llvm.dbg.value(metadata !{i32 %call}, i64 0, metadata !14), !dbg !24 + %cmp = icmp ugt i32 %call, 21, !dbg !25 + br i1 %cmp, label %cond.true, label %cond.end, !dbg !25 + +cond.true: ; preds = %entry + %call1 = tail call i32 @rand() nounwind optsize, !dbg !25 + br label %cond.end, !dbg !25 + +cond.end: ; preds = %entry, %cond.true + %cond = phi i32 [ %call1, %cond.true ], [ %call, %entry ], !dbg !25 + tail call void @llvm.dbg.value(metadata !{i32 %cond}, i64 0, metadata !17), !dbg !25 + %conv = sext i32 %cond to i64, !dbg !26 + %conv5 = zext i32 %call to i64, !dbg !26 + %call6 = tail call i64 @gcd(i64 %conv, i64 %conv5) optsize, !dbg !26 + %cmp7 = icmp eq i64 %call6, 0 + br i1 %cmp7, label %return, label %if.then, !dbg !26 + +if.then: ; preds = %cond.end + %puts = tail call i32 @puts(i8* getelementptr inbounds ([21 x i8]* @str, i64 0, i64 0)) + %call12 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([14 x i8]* @.str1, i64 0, i64 0), i32 %call, i32 %cond) nounwind optsize, !dbg !26 + ret i32 1, !dbg !27 + +return: ; preds = %cond.end + ret i32 0, !dbg !27 +} + +declare i32 @rand() optsize + +declare i32 @printf(i8* nocapture, ...) nounwind optsize + +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone + +declare i32 @puts(i8* nocapture) nounwind + +!llvm.dbg.sp = !{!0, !6} +!llvm.dbg.lv.gcd = !{!10, !11, !12} +!llvm.dbg.lv.main = !{!14, !17} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"gcd", metadata !"gcd", metadata !"", metadata !1, i32 5, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i64 (i64, i64)* @gcd} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"rem_small.c", metadata !"/private/tmp", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"rem_small.c", metadata !"/private/tmp", metadata !"clang version 2.9 (trunk 124117)", i1 true, i1 true, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"long int", null, i32 0, i64 64, i64 64, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 589870, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 25, metadata !7, i1 false, i1 true, i32 0, i32 0, i32 0, i32 0, i1 true, i32 ()* @main} ; [ DW_TAG_subprogram ] +!7 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!8 = metadata !{metadata !9} +!9 = metadata !{i32 589860, metadata !2, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!10 = metadata !{i32 590081, metadata !0, metadata !"a", metadata !1, i32 5, metadata !5, i32 0} ; [ DW_TAG_arg_variable ] +!11 = metadata !{i32 590081, metadata !0, metadata !"b", metadata !1, i32 5, metadata !5, i32 0} ; [ DW_TAG_arg_variable ] +!12 = metadata !{i32 590080, metadata !13, metadata !"c", metadata !1, i32 6, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!13 = metadata !{i32 589835, metadata !0, i32 5, i32 52, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!14 = metadata !{i32 590080, metadata !15, metadata !"m", metadata !1, i32 26, metadata !16, i32 0} ; [ DW_TAG_auto_variable ] +!15 = metadata !{i32 589835, metadata !6, i32 25, i32 12, metadata !1, i32 2} ; [ DW_TAG_lexical_block ] +!16 = metadata !{i32 589860, metadata !2, metadata !"unsigned int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ] +!17 = metadata !{i32 590080, metadata !15, metadata !"z_s", metadata !1, i32 27, metadata !9, i32 0} ; [ DW_TAG_auto_variable ] +!18 = metadata !{i32 5, i32 41, metadata !0, null} +!19 = metadata !{i32 5, i32 49, metadata !0, null} +!20 = metadata !{i32 7, i32 5, metadata !13, null} +!21 = metadata !{i32 8, i32 9, metadata !22, null} +!22 = metadata !{i32 589835, metadata !13, i32 7, i32 14, metadata !1, i32 1} ; [ DW_TAG_lexical_block ] +!23 = metadata !{i32 9, i32 9, metadata !22, null} +!24 = metadata !{i32 26, i32 38, metadata !15, null} +!25 = metadata !{i32 27, i32 38, metadata !15, null} +!26 = metadata !{i32 28, i32 9, metadata !15, null} +!27 = metadata !{i32 30, i32 1, metadata !15, null} From rafael.espindola at gmail.com Mon Jan 24 13:40:38 2011 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Mon, 24 Jan 2011 19:40:38 -0000 Subject: [llvm-commits] [llvm] r124139 - /llvm/trunk/test/MC/ELF/bad-section.s Message-ID: <20110124194038.E73442A6C12C@llvm.org> Author: rafael Date: Mon Jan 24 13:40:38 2011 New Revision: 124139 URL: http://llvm.org/viewvc/llvm-project?rev=124139&view=rev Log: J?rg Sonnenberger noticed that we were missing this test. Added: llvm/trunk/test/MC/ELF/bad-section.s Added: llvm/trunk/test/MC/ELF/bad-section.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/bad-section.s?rev=124139&view=auto ============================================================================== --- llvm/trunk/test/MC/ELF/bad-section.s (added) +++ llvm/trunk/test/MC/ELF/bad-section.s Mon Jan 24 13:40:38 2011 @@ -0,0 +1,9 @@ +// RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o /dev/null 2>%t +// RUN: FileCheck --input-file=%t %s + +// CHECK: error: unexpected token in directive +// CHECK: .section "foo"-bar + +// test that we don't accept this, as gas doesn't. + +.section "foo"-bar From dpatel at apple.com Mon Jan 24 14:04:37 2011 From: dpatel at apple.com (Devang Patel) Date: Mon, 24 Jan 2011 20:04:37 -0000 Subject: [llvm-commits] [llvm] r124142 - in /llvm/trunk: lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll Message-ID: <20110124200437.51C652A6C12C@llvm.org> Author: dpatel Date: Mon Jan 24 14:04:37 2011 New Revision: 124142 URL: http://llvm.org/viewvc/llvm-project?rev=124142&view=rev Log: Speculatively revert r124138. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp llvm/trunk/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=124142&r1=124141&r2=124142&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Mon Jan 24 14:04:37 2011 @@ -929,9 +929,7 @@ unsigned InReg = It->second; RegsForValue RFV(*DAG.getContext(), TLI, InReg, V->getType()); SDValue Chain = DAG.getEntryNode(); - N = RFV.getCopyFromRegs(DAG, FuncInfo, getCurDebugLoc(), Chain,NULL); - resolveDanglingDebugInfo(V, N); - return N; + return N = RFV.getCopyFromRegs(DAG, FuncInfo, getCurDebugLoc(), Chain,NULL); } // Otherwise create a new SDValue and remember it. Modified: llvm/trunk/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll?rev=124142&r1=124141&r2=124142&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll (original) +++ llvm/trunk/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll Mon Jan 24 14:04:37 2011 @@ -1,4 +1,5 @@ ; RUN: llc < %s | FileCheck %s +; XFAIL: * target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" target triple = "x86_64-apple-darwin10.0.0" From greened at obbligato.org Mon Jan 24 14:53:18 2011 From: greened at obbligato.org (David Greene) Date: Mon, 24 Jan 2011 20:53:18 -0000 Subject: [llvm-commits] [llvm] r124145 - in /llvm/trunk/utils/TableGen: CodeGenDAGPatterns.cpp CodeGenDAGPatterns.h Message-ID: <20110124205318.E156D2A6C12C@llvm.org> Author: greened Date: Mon Jan 24 14:53:18 2011 New Revision: 124145 URL: http://llvm.org/viewvc/llvm-project?rev=124145&view=rev Log: [AVX] Add type checking support for vector/subvector type constraints. This will be used to check patterns referencing a forthcoming INSERT_SUBVECTOR SDNode. INSERT_SUBVECTOR in turn is very useful for matching to VINSERTF128 instructions and complements the already existing EXTRACT_SUBVECTOR SDNode. Modified: llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp llvm/trunk/utils/TableGen/CodeGenDAGPatterns.h Modified: llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp?rev=124145&r1=124144&r2=124145&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp (original) +++ llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp Mon Jan 24 14:53:18 2011 @@ -434,6 +434,36 @@ return MadeChange; } +/// EnforceVectorSubVectorTypeIs - 'this' is now constrainted to be a +/// vector type specified by VTOperand. +bool EEVT::TypeSet::EnforceVectorSubVectorTypeIs(EEVT::TypeSet &VTOperand, + TreePattern &TP) { + // "This" must be a vector and "VTOperand" must be a vector. + bool MadeChange = false; + MadeChange |= EnforceVector(TP); + MadeChange |= VTOperand.EnforceVector(TP); + + // "This" must be larger than "VTOperand." + MadeChange |= VTOperand.EnforceSmallerThan(*this, TP); + + // If we know the vector type, it forces the scalar types to agree. + if (isConcrete()) { + EVT IVT = getConcrete(); + IVT = IVT.getVectorElementType(); + + EEVT::TypeSet EltTypeSet(IVT.getSimpleVT().SimpleTy, TP); + MadeChange |= VTOperand.EnforceVectorEltTypeIs(EltTypeSet, TP); + } else if (VTOperand.isConcrete()) { + EVT IVT = VTOperand.getConcrete(); + IVT = IVT.getVectorElementType(); + + EEVT::TypeSet EltTypeSet(IVT.getSimpleVT().SimpleTy, TP); + MadeChange |= EnforceVectorEltTypeIs(EltTypeSet, TP); + } + + return MadeChange; +} + //===----------------------------------------------------------------------===// // Helpers for working with extended types. @@ -605,6 +635,10 @@ } else if (R->isSubClassOf("SDTCisEltOfVec")) { ConstraintType = SDTCisEltOfVec; x.SDTCisEltOfVec_Info.OtherOperandNum = R->getValueAsInt("OtherOpNum"); + } else if (R->isSubClassOf("SDTCisSubVecOfVec")) { + ConstraintType = SDTCisSubVecOfVec; + x.SDTCisSubVecOfVec_Info.OtherOperandNum = + R->getValueAsInt("OtherOpNum"); } else { errs() << "Unrecognized SDTypeConstraint '" << R->getName() << "'!\n"; exit(1); @@ -708,6 +742,17 @@ return VecOperand->getExtType(VResNo). EnforceVectorEltTypeIs(NodeToApply->getExtType(ResNo), TP); } + case SDTCisSubVecOfVec: { + unsigned VResNo = 0; + TreePatternNode *BigVecOperand = + getOperandNum(x.SDTCisSubVecOfVec_Info.OtherOperandNum, N, NodeInfo, + VResNo); + + // Filter vector types out of BigVecOperand that don't have the + // right subvector type. + return BigVecOperand->getExtType(VResNo). + EnforceVectorSubVectorTypeIs(NodeToApply->getExtType(ResNo), TP); + } } return false; } Modified: llvm/trunk/utils/TableGen/CodeGenDAGPatterns.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenDAGPatterns.h?rev=124145&r1=124144&r2=124145&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/CodeGenDAGPatterns.h (original) +++ llvm/trunk/utils/TableGen/CodeGenDAGPatterns.h Mon Jan 24 14:53:18 2011 @@ -131,6 +131,10 @@ /// whose element is VT. bool EnforceVectorEltTypeIs(EEVT::TypeSet &VT, TreePattern &TP); + /// EnforceVectorSubVectorTypeIs - 'this' is now constrainted to + /// be a vector type VT. + bool EnforceVectorSubVectorTypeIs(EEVT::TypeSet &VT, TreePattern &TP); + bool operator!=(const TypeSet &RHS) const { return TypeVec != RHS.TypeVec; } bool operator==(const TypeSet &RHS) const { return TypeVec == RHS.TypeVec; } @@ -155,7 +159,8 @@ unsigned OperandNo; // The operand # this constraint applies to. enum { SDTCisVT, SDTCisPtrTy, SDTCisInt, SDTCisFP, SDTCisVec, SDTCisSameAs, - SDTCisVTSmallerThanOp, SDTCisOpSmallerThanOp, SDTCisEltOfVec + SDTCisVTSmallerThanOp, SDTCisOpSmallerThanOp, SDTCisEltOfVec, + SDTCisSubVecOfVec } ConstraintType; union { // The discriminated union. @@ -174,6 +179,9 @@ struct { unsigned OtherOperandNum; } SDTCisEltOfVec_Info; + struct { + unsigned OtherOperandNum; + } SDTCisSubVecOfVec_Info; } x; /// ApplyTypeConstraint - Given a node in a pattern, apply this type From deeppatel1987 at gmail.com Mon Jan 24 15:16:29 2011 From: deeppatel1987 at gmail.com (Sandeep Patel) Date: Mon, 24 Jan 2011 21:16:29 +0000 Subject: [llvm-commits] [llvm] r123990 - in /llvm/trunk: include/llvm/ADT/Triple.h lib/Support/Triple.cpp unittests/ADT/TripleTest.cpp In-Reply-To: References: <20110121182547.37AB92A6C12C@llvm.org> <4D39F247.10707@free.fr> <4D3ABC27.30908@free.fr> <4D3AC2C4.2090604@arm.com> <4D3C2C92.9010708@free.fr> <4D3C946B.3020606@arm.com> <4D3D5083.2010708@free.fr> <4D3D62E0.4080602@arm.com> Message-ID: On Mon, Jan 24, 2011 at 11:36 AM, ?smail D?nmez wrote: > > On Mon, Jan 24, 2011 at 1:30 PM, Renato Golin wrote: >> >> On 01/24/11 10:12, Duncan Sands wrote: >> > I don't see the point of having "none" be turned into "NoVendor" rather >> > than >> > "UnknownVendor" if you aren't go to do anything with that information >> > anyway. >> > However if you have a good reason to want "none" to be parsed then I >> > will >> > drop my objections to "none" :) >> >> I guess that falls together with the LLVM/Clang triple implementation. >> >> Clang should interpret UnknownVendor to "none" and not LLVM changed to >> have a dubious and duplicated "none". >> >> >> > In short, whether "none" is parsed at all, or only parsed as a >> > valid "O/S", or parsed as a valid vendor and a valid O/S etc depends on >> > what >> > triples occur in the real world and what you plan to do with the >> > information. >> >> I agree. My mistake was to try and not break anything that was already >> working. >> >> Some ARM triples I found in the wild... >> >> ?-- From CodeSourcery: >> >> * arm-none-eabi >> ? none I "guess" it's for vendor, and no OS >> >> * arm-none-linux-gnueabi >> ? again, it's vendor > > Android started using arm-linux-androideabi recently, old one was arm-eabi. We were prototyping with "arm-eabi" which actually expands to "arm-unknown-eabi" not "arm-none-eabi". deep From Renato.Golin at arm.com Mon Jan 24 15:42:42 2011 From: Renato.Golin at arm.com (Renato Golin) Date: Mon, 24 Jan 2011 21:42:42 +0000 Subject: [llvm-commits] [llvm] r123990 - in /llvm/trunk: include/llvm/ADT/Triple.h lib/Support/Triple.cpp unittests/ADT/TripleTest.cpp In-Reply-To: References: <20110121182547.37AB92A6C12C@llvm.org> <4D39F247.10707@free.fr> <4D3ABC27.30908@free.fr> <4D3AC2C4.2090604@arm.com> <4D3C2C92.9010708@free.fr> <4D3C946B.3020606@arm.com> <4D3D5083.2010708@free.fr> <4D3D62E0.4080602@arm.com> Message-ID: <4D3DF252.6030809@arm.com> On 24/01/11 21:16, Sandeep Patel wrote: > > Android started using arm-linux-androideabi recently, old one was > arm-eabi. > > We were prototyping with "arm-eabi" which actually expands to > "arm-unknown-eabi" not "arm-none-eabi". Hum, ok, I'm confused. Does this mean that "eabi" is bare-metal eabi, "linuxeabi" is Linux eabi and "gnueabi" is what? If that's the case, than "eabi" is in fact telling the OS by saying there is NO OS, but that's misleading... Anyway, I'm not trying to re-write target triple, just understanding it enough to parse it correctly in LLVM. It'd be good to have the same parser for both Clang and LLC when I pass a non-normalized triple to them (if it's a configuration option in a makefile). In my (very humble) view, we either parse the triple and understand it, or we bail out with an error message. I don't like at all the tons of silent decisions Clang makes, as much as I don't like the tons of guessing GCC does with ARM assembly. But that's another discussion entirely... cheers, --renato -- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. From echristo at apple.com Mon Jan 24 16:04:44 2011 From: echristo at apple.com (Eric Christopher) Date: Mon, 24 Jan 2011 14:04:44 -0800 Subject: [llvm-commits] [llvm] r123990 - in /llvm/trunk: include/llvm/ADT/Triple.h lib/Support/Triple.cpp unittests/ADT/TripleTest.cpp In-Reply-To: <4D3DF252.6030809@arm.com> References: <20110121182547.37AB92A6C12C@llvm.org> <4D39F247.10707@free.fr> <4D3ABC27.30908@free.fr> <4D3AC2C4.2090604@arm.com> <4D3C2C92.9010708@free.fr> <4D3C946B.3020606@arm.com> <4D3D5083.2010708@free.fr> <4D3D62E0.4080602@arm.com> <4D3DF252.6030809@arm.com> Message-ID: On Jan 24, 2011, at 1:42 PM, Renato Golin wrote: > Hum, ok, I'm confused. Does this mean that "eabi" is bare-metal eabi, > "linuxeabi" is Linux eabi and "gnueabi" is what? > > If that's the case, than "eabi" is in fact telling the OS by saying > there is NO OS, but that's misleading? Welcome to target triples. :) From what I recall (grain of salt here): eabi is not much different different than saying "elf" in this case. So arm-eabi is just like saying arm-elf and targets bare metal. arm-linuxeabi is an arm-linux-elf or arm-linux-eabi machine. arm-symbianeabi would be targeting the Symbian os. Also note that in some cases they're not triples, they're quartets like "arm*-*-linux-*eabi" which parse down into triples since the vendor doesn't really matter here. (We'll also avoid mentioning arm-linux-gnu which is at some point the quartet of arm-*-linux-gnu, but is also just a triple). That said, I believe the abi for arm-linux-gnueabi vs arm-linux-gnu is different in that it adds the BPABI for 128-bit long long. I haven't looked at the different arm configurations in some time :) This is what Duncan was talking about when he was mentioning the few hundred lines of config.sub - there's also huge amounts of matching in gcc in the config.gcc file that bases a lot of configuration on the parsing of the target triple. > Anyway, I'm not trying to re-write target triple, just understanding it > enough to parse it correctly in LLVM. You may not get to do this without rewriting it into a more canonical form in the general case. FWIW my idea of how cross compilation should work is mostly the way that llc deals with cross targets - via the -mtriple flag. That is parsed by the front end to the particular information on OS and architecture (you can also make -arch work my just substituting the architecture in front of the current host triple) and then the module will have the triple you've just passed. It's pretty simple, but may require a bit of rework. I haven't looked at it in a while. -eric -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110124/cf1e465d/attachment.html From echristo at apple.com Mon Jan 24 16:19:14 2011 From: echristo at apple.com (Eric Christopher) Date: Mon, 24 Jan 2011 22:19:14 -0000 Subject: [llvm-commits] [llvm] r124148 - /llvm/trunk/include/llvm/Analysis/InlineCost.h Message-ID: <20110124221914.473722A6C12C@llvm.org> Author: echristo Date: Mon Jan 24 16:19:14 2011 New Revision: 124148 URL: http://llvm.org/viewvc/llvm-project?rev=124148&view=rev Log: Perhaps a bit too much vertical whitespace. Modified: llvm/trunk/include/llvm/Analysis/InlineCost.h Modified: llvm/trunk/include/llvm/Analysis/InlineCost.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/InlineCost.h?rev=124148&r1=124147&r2=124148&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/InlineCost.h (original) +++ llvm/trunk/include/llvm/Analysis/InlineCost.h Mon Jan 24 16:19:14 2011 @@ -112,8 +112,6 @@ /// entry here. std::vector ArgumentWeights; - - /// analyzeFunction - Add information about the specified function /// to the current structure. void analyzeFunction(Function *F); From asl at math.spbu.ru Mon Jan 24 16:38:45 2011 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Mon, 24 Jan 2011 22:38:45 -0000 Subject: [llvm-commits] [llvm] r124151 - /llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Message-ID: <20110124223845.7A61C2A6C12D@llvm.org> Author: asl Date: Mon Jan 24 16:38:45 2011 New Revision: 124151 URL: http://llvm.org/viewvc/llvm-project?rev=124151&view=rev Log: Provide correct registers for EH stuff on ARM Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=124151&r1=124150&r2=124151&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Mon Jan 24 16:38:45 2011 @@ -551,9 +551,10 @@ setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); setOperationAction(ISD::EHSELECTION, MVT::i32, Expand); - // FIXME: Shouldn't need this, since no register is used, but the legalizer - // doesn't yet know how to not do that for SjLj. - setExceptionSelectorRegister(ARM::R0); + setOperationAction(ISD::EXCEPTIONADDR, MVT::i32, Expand); + setExceptionPointerRegister(ARM::R0); + setExceptionSelectorRegister(ARM::R1); + setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Expand); // ARMv6 Thumb1 (except for CPUs that support dmb / dsb) and earlier use // the default expansion. From asl at math.spbu.ru Mon Jan 24 16:38:40 2011 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Mon, 24 Jan 2011 22:38:40 -0000 Subject: [llvm-commits] [llvm] r124150 - /llvm/trunk/lib/CodeGen/AsmPrinter/DwarfException.cpp Message-ID: <20110124223840.542E22A6C12C@llvm.org> Author: asl Date: Mon Jan 24 16:38:40 2011 New Revision: 124150 URL: http://llvm.org/viewvc/llvm-project?rev=124150&view=rev Log: Support printing exception section into the current one. This is the case when LSDASection is blank Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfException.cpp Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfException.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfException.cpp?rev=124150&r1=124149&r2=124150&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfException.cpp (original) +++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfException.cpp Mon Jan 24 16:38:40 2011 @@ -451,7 +451,8 @@ } // Begin the exception table. - Asm->OutStreamer.SwitchSection(LSDASection); + if (LSDASection) + Asm->OutStreamer.SwitchSection(LSDASection); Asm->EmitAlignment(2); // Emit the LSDA. From echristo at apple.com Mon Jan 24 16:50:58 2011 From: echristo at apple.com (Eric Christopher) Date: Mon, 24 Jan 2011 14:50:58 -0800 Subject: [llvm-commits] [llvm] r124150 - /llvm/trunk/lib/CodeGen/AsmPrinter/DwarfException.cpp In-Reply-To: <20110124223840.542E22A6C12C@llvm.org> References: <20110124223840.542E22A6C12C@llvm.org> Message-ID: On Jan 24, 2011, at 2:38 PM, Anton Korobeynikov wrote: > Author: asl > Date: Mon Jan 24 16:38:40 2011 > New Revision: 124150 > > URL: http://llvm.org/viewvc/llvm-project?rev=124150&view=rev > Log: > Support printing exception section into the current one. This is the case when LSDASection is blank > > Modified: > llvm/trunk/lib/CodeGen/AsmPrinter/DwarfException.cpp > > Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfException.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfException.cpp?rev=124150&r1=124149&r2=124150&view=diff > ============================================================================== > --- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfException.cpp (original) > +++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfException.cpp Mon Jan 24 16:38:40 2011 > @@ -451,7 +451,8 @@ > } > > // Begin the exception table. > - Asm->OutStreamer.SwitchSection(LSDASection); > + if (LSDASection) > + Asm->OutStreamer.SwitchSection(LSDASection); > Asm->EmitAlignment(2); Can you explain this change? Thanks. -eric -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110124/b08a38a9/attachment.html From asl at math.spbu.ru Mon Jan 24 17:05:16 2011 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Tue, 25 Jan 2011 02:05:16 +0300 Subject: [llvm-commits] [llvm] r124150 - /llvm/trunk/lib/CodeGen/AsmPrinter/DwarfException.cpp In-Reply-To: References: <20110124223840.542E22A6C12C@llvm.org> Message-ID: Hi Eric, > Can you explain this change? > Thanks. For ARM EHABI stuff we will need not to switch the section to emit the exception table (so, basically all the stuff got emitted into the same section as the function itself and it's an assembler responsibility to "move" everything to proper section). Right now we always require switching to LSDASection, this patch relaxes this requirement. -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University From echristo at apple.com Mon Jan 24 17:12:08 2011 From: echristo at apple.com (Eric Christopher) Date: Mon, 24 Jan 2011 15:12:08 -0800 Subject: [llvm-commits] [llvm] r124150 - /llvm/trunk/lib/CodeGen/AsmPrinter/DwarfException.cpp In-Reply-To: References: <20110124223840.542E22A6C12C@llvm.org> Message-ID: On Jan 24, 2011, at 3:05 PM, Anton Korobeynikov wrote: > Hi Eric, > >> Can you explain this change? >> Thanks. > For ARM EHABI stuff we will need not to switch the section to emit the > exception table (so, basically all the stuff got emitted into the same > section as the function itself and it's an assembler responsibility to > "move" everything to proper section). Right now we always require > switching to LSDASection, this patch relaxes this requirement. That's insane. That said _can_ you put it into a section if you want to? If not, please make it more of a "ABINeedsLSDASection()" call or something, or an enormous comment in tags or something. If you can put it into its own section why not just leave it? :) -eric -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110124/752b78cd/attachment.html From evan.cheng at apple.com Mon Jan 24 17:15:23 2011 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 24 Jan 2011 15:15:23 -0800 Subject: [llvm-commits] [llvm] r124145 - in /llvm/trunk/utils/TableGen: CodeGenDAGPatterns.cpp CodeGenDAGPatterns.h In-Reply-To: <20110124205318.E156D2A6C12C@llvm.org> References: <20110124205318.E156D2A6C12C@llvm.org> Message-ID: <6A83E17C-237C-4C87-810A-4A0AFEB82D00@apple.com> Hi David, What's your plan? Please elaborate. Evan On Jan 24, 2011, at 12:53 PM, David Greene wrote: > Author: greened > Date: Mon Jan 24 14:53:18 2011 > New Revision: 124145 > > URL: http://llvm.org/viewvc/llvm-project?rev=124145&view=rev > Log: > > [AVX] Add type checking support for vector/subvector type constraints. > This will be used to check patterns referencing a forthcoming > INSERT_SUBVECTOR SDNode. INSERT_SUBVECTOR in turn is very useful for > matching to VINSERTF128 instructions and complements the already > existing EXTRACT_SUBVECTOR SDNode. > > Modified: > llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp > llvm/trunk/utils/TableGen/CodeGenDAGPatterns.h > > Modified: llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp?rev=124145&r1=124144&r2=124145&view=diff > ============================================================================== > --- llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp (original) > +++ llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp Mon Jan 24 14:53:18 2011 > @@ -434,6 +434,36 @@ > return MadeChange; > } > > +/// EnforceVectorSubVectorTypeIs - 'this' is now constrainted to be a > +/// vector type specified by VTOperand. > +bool EEVT::TypeSet::EnforceVectorSubVectorTypeIs(EEVT::TypeSet &VTOperand, > + TreePattern &TP) { > + // "This" must be a vector and "VTOperand" must be a vector. > + bool MadeChange = false; > + MadeChange |= EnforceVector(TP); > + MadeChange |= VTOperand.EnforceVector(TP); > + > + // "This" must be larger than "VTOperand." > + MadeChange |= VTOperand.EnforceSmallerThan(*this, TP); > + > + // If we know the vector type, it forces the scalar types to agree. > + if (isConcrete()) { > + EVT IVT = getConcrete(); > + IVT = IVT.getVectorElementType(); > + > + EEVT::TypeSet EltTypeSet(IVT.getSimpleVT().SimpleTy, TP); > + MadeChange |= VTOperand.EnforceVectorEltTypeIs(EltTypeSet, TP); > + } else if (VTOperand.isConcrete()) { > + EVT IVT = VTOperand.getConcrete(); > + IVT = IVT.getVectorElementType(); > + > + EEVT::TypeSet EltTypeSet(IVT.getSimpleVT().SimpleTy, TP); > + MadeChange |= EnforceVectorEltTypeIs(EltTypeSet, TP); > + } > + > + return MadeChange; > +} > + > //===----------------------------------------------------------------------===// > // Helpers for working with extended types. > > @@ -605,6 +635,10 @@ > } else if (R->isSubClassOf("SDTCisEltOfVec")) { > ConstraintType = SDTCisEltOfVec; > x.SDTCisEltOfVec_Info.OtherOperandNum = R->getValueAsInt("OtherOpNum"); > + } else if (R->isSubClassOf("SDTCisSubVecOfVec")) { > + ConstraintType = SDTCisSubVecOfVec; > + x.SDTCisSubVecOfVec_Info.OtherOperandNum = > + R->getValueAsInt("OtherOpNum"); > } else { > errs() << "Unrecognized SDTypeConstraint '" << R->getName() << "'!\n"; > exit(1); > @@ -708,6 +742,17 @@ > return VecOperand->getExtType(VResNo). > EnforceVectorEltTypeIs(NodeToApply->getExtType(ResNo), TP); > } > + case SDTCisSubVecOfVec: { > + unsigned VResNo = 0; > + TreePatternNode *BigVecOperand = > + getOperandNum(x.SDTCisSubVecOfVec_Info.OtherOperandNum, N, NodeInfo, > + VResNo); > + > + // Filter vector types out of BigVecOperand that don't have the > + // right subvector type. > + return BigVecOperand->getExtType(VResNo). > + EnforceVectorSubVectorTypeIs(NodeToApply->getExtType(ResNo), TP); > + } > } > return false; > } > > Modified: llvm/trunk/utils/TableGen/CodeGenDAGPatterns.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenDAGPatterns.h?rev=124145&r1=124144&r2=124145&view=diff > ============================================================================== > --- llvm/trunk/utils/TableGen/CodeGenDAGPatterns.h (original) > +++ llvm/trunk/utils/TableGen/CodeGenDAGPatterns.h Mon Jan 24 14:53:18 2011 > @@ -131,6 +131,10 @@ > /// whose element is VT. > bool EnforceVectorEltTypeIs(EEVT::TypeSet &VT, TreePattern &TP); > > + /// EnforceVectorSubVectorTypeIs - 'this' is now constrainted to > + /// be a vector type VT. > + bool EnforceVectorSubVectorTypeIs(EEVT::TypeSet &VT, TreePattern &TP); > + > bool operator!=(const TypeSet &RHS) const { return TypeVec != RHS.TypeVec; } > bool operator==(const TypeSet &RHS) const { return TypeVec == RHS.TypeVec; } > > @@ -155,7 +159,8 @@ > unsigned OperandNo; // The operand # this constraint applies to. > enum { > SDTCisVT, SDTCisPtrTy, SDTCisInt, SDTCisFP, SDTCisVec, SDTCisSameAs, > - SDTCisVTSmallerThanOp, SDTCisOpSmallerThanOp, SDTCisEltOfVec > + SDTCisVTSmallerThanOp, SDTCisOpSmallerThanOp, SDTCisEltOfVec, > + SDTCisSubVecOfVec > } ConstraintType; > > union { // The discriminated union. > @@ -174,6 +179,9 @@ > struct { > unsigned OtherOperandNum; > } SDTCisEltOfVec_Info; > + struct { > + unsigned OtherOperandNum; > + } SDTCisSubVecOfVec_Info; > } x; > > /// ApplyTypeConstraint - Given a node in a pattern, apply this type > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From daniel at zuster.org Mon Jan 24 17:26:32 2011 From: daniel at zuster.org (Daniel Dunbar) Date: Mon, 24 Jan 2011 23:26:32 -0000 Subject: [llvm-commits] [llvm] r124154 - /llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp Message-ID: <20110124232632.25C582A6C12C@llvm.org> Author: ddunbar Date: Mon Jan 24 17:26:31 2011 New Revision: 124154 URL: http://llvm.org/viewvc/llvm-project?rev=124154&view=rev Log: tblgen/AsmMatcherEmitter: Fix alias handling to honor -match-prefix. Modified: llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp Modified: llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp?rev=124154&r1=124153&r2=124154&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp Mon Jan 24 17:26:31 2011 @@ -1090,6 +1090,13 @@ for (unsigned i = 0, e = AllInstAliases.size(); i != e; ++i) { CodeGenInstAlias *Alias = new CodeGenInstAlias(AllInstAliases[i], Target); + // If the tblgen -match-prefix option is specified (for tblgen hackers), + // filter the set of instruction aliases we consider, based on the target + // instruction. + if (!StringRef(Alias->ResultInst->TheDef->getName()).startswith( + MatchPrefix)) + continue; + OwningPtr II(new MatchableInfo(Alias)); II->Initialize(*this, SingletonRegisters); @@ -1708,6 +1715,10 @@ /// EmitMnemonicAliases - If the target has any MnemonicAlias<> definitions, /// emit a function for them and return true, otherwise return false. static bool EmitMnemonicAliases(raw_ostream &OS, const AsmMatcherInfo &Info) { + // Ignore aliases when match-prefix is set. + if (!MatchPrefix.empty()) + return false; + std::vector Aliases = Info.getRecords().getAllDerivedDefinitions("MnemonicAlias"); if (Aliases.empty()) return false; From anton at korobeynikov.info Mon Jan 24 17:51:42 2011 From: anton at korobeynikov.info (Anton Korobeynikov) Date: Tue, 25 Jan 2011 02:51:42 +0300 Subject: [llvm-commits] First draft of ARM EHABI support Message-ID: Hello Everyone Please find attached the first series of patches which start implementation of ARM EHABI support. All stuff can be split into 2 parts: 1. Emission of exception section directives (.fnstart / .fnend / .personality / .handlerdata and friends) 2. Emission of frame unwinding directives Doing 1. is pretty much straightforward and can be done easily within the current exception lowering infrastructure. 2. is more complicated. The main problem is that current MachineMoves stuff seems not to be flexible enough: we don't care about offsets of the registers, but rather about the order how they pushed on stack, how we model stack frame allocation, etc. (Also, since we have post-RA scheduler that we will need to somehow update the MachineMoves set because the relative order of the instructions might be changed by a scheduler, etc.) All this is mostly due to fact that most of callee-save spills / reloads are done via load/store-multiple instructions, so frame unwinding directives follow instruction set in some way. My idea to handle this was to make prologue expansion code to mark the "interesting" instruction with the special flag and during MC lowering phase recognize the instructions and emit the necessary directives (yes we will need to make sure that no codegen pass running after prologue expansion would clobber these flags, but this is a separate task). Attached is the very first approximation showing how the stuff will be implemented, there are some limitations, e.g. thumb is not supported, stuff is not tested in all situations (e.g. with the presence of stack realignment, etc.) -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University -------------- next part -------------- A non-text attachment was scrubbed... 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Name: 0005-Preliminary-support-for-ARM-frame-save-directives-em.patch Type: application/octet-stream Size: 30769 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110125/f17e8dfc/attachment-0004.obj From stuart at apple.com Mon Jan 24 19:04:02 2011 From: stuart at apple.com (Stuart Hastings) Date: Tue, 25 Jan 2011 01:04:02 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r124164 - in /llvm-gcc-4.2/trunk/gcc: reload1.c tree-if-conv.c tree-ssa-structalias.c Message-ID: <20110125010402.5B5CE2A6C130@llvm.org> Author: stuart Date: Mon Jan 24 19:04:02 2011 New Revision: 124164 URL: http://llvm.org/viewvc/llvm-project?rev=124164&view=rev Log: Applying first patch for PR9031. (gcc/ChangeLog patch did not apply cleanly.) Patch by Pedro Giffuni! Modified: llvm-gcc-4.2/trunk/gcc/reload1.c llvm-gcc-4.2/trunk/gcc/tree-if-conv.c llvm-gcc-4.2/trunk/gcc/tree-ssa-structalias.c Modified: llvm-gcc-4.2/trunk/gcc/reload1.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/reload1.c?rev=124164&r1=124163&r2=124164&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/reload1.c (original) +++ llvm-gcc-4.2/trunk/gcc/reload1.c Mon Jan 24 19:04:02 2011 @@ -5562,7 +5562,14 @@ for (j = 0; j < n_reloads; j++) { reload_order[j] = j; - reload_spill_index[j] = -1; + if (rld[j].reg_rtx != NULL_RTX) + { + gcc_assert (REG_P (rld[j].reg_rtx) + && HARD_REGISTER_P (rld[j].reg_rtx)); + reload_spill_index[j] = REGNO (rld[j].reg_rtx); + } + else + reload_spill_index[j] = -1; if (rld[j].nregs > 1) { Modified: llvm-gcc-4.2/trunk/gcc/tree-if-conv.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/tree-if-conv.c?rev=124164&r1=124163&r2=124164&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/tree-if-conv.c (original) +++ llvm-gcc-4.2/trunk/gcc/tree-if-conv.c Mon Jan 24 19:04:02 2011 @@ -743,7 +743,7 @@ if (TREE_CODE (*cond) == TRUTH_NOT_EXPR) /* We can be smart here and choose inverted condition without switching bbs. */ - *cond = invert_truthvalue (*cond); + *cond = invert_truthvalue (*cond); else /* Select non loop header bb. */ first_edge = second_edge; @@ -762,9 +762,11 @@ /* Create temp. for the condition. Vectorizer prefers to have gimple value as condition. Various targets use different means to communicate - condition in vector compare operation. Using gimple value allows compiler - to emit vector compare and select RTL without exposing compare's result. */ - *cond = force_gimple_operand (*cond, &new_stmts, false, NULL_TREE); + condition in vector compare operation. Using gimple value allows + compiler to emit vector compare and select RTL without exposing + compare's result. */ + *cond = force_gimple_operand (unshare_expr (*cond), &new_stmts, + false, NULL_TREE); if (new_stmts) bsi_insert_before (bsi, new_stmts, BSI_SAME_STMT); if (!is_gimple_reg (*cond) && !is_gimple_condexpr (*cond)) Modified: llvm-gcc-4.2/trunk/gcc/tree-ssa-structalias.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/tree-ssa-structalias.c?rev=124164&r1=124163&r2=124164&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/tree-ssa-structalias.c (original) +++ llvm-gcc-4.2/trunk/gcc/tree-ssa-structalias.c Mon Jan 24 19:04:02 2011 @@ -4350,6 +4350,75 @@ process_constraint (new_constraint (lhs, rhs)); } +/* Structure used to put solution bitmaps in a hashtable so they can + be shared among variables with the same points-to set. */ + +typedef struct shared_bitmap_info +{ + bitmap pt_vars; + hashval_t hashcode; +} *shared_bitmap_info_t; + +static htab_t shared_bitmap_table; + +/* Hash function for a shared_bitmap_info_t */ + +static hashval_t +shared_bitmap_hash (const void *p) +{ + const shared_bitmap_info_t bi = (shared_bitmap_info_t) p; + return bi->hashcode; +} + +/* Equality function for two shared_bitmap_info_t's. */ + +static int +shared_bitmap_eq (const void *p1, const void *p2) +{ + const shared_bitmap_info_t sbi1 = (shared_bitmap_info_t) p1; + const shared_bitmap_info_t sbi2 = (shared_bitmap_info_t) p2; + return bitmap_equal_p (sbi1->pt_vars, sbi2->pt_vars); +} + +/* Lookup a bitmap in the shared bitmap hashtable, and return an already + existing instance if there is one, NULL otherwise. */ + +static bitmap +shared_bitmap_lookup (bitmap pt_vars) +{ + void **slot; + struct shared_bitmap_info sbi; + + sbi.pt_vars = pt_vars; + sbi.hashcode = bitmap_hash (pt_vars); + + slot = htab_find_slot_with_hash (shared_bitmap_table, &sbi, + sbi.hashcode, NO_INSERT); + if (!slot) + return NULL; + else + return ((shared_bitmap_info_t) *slot)->pt_vars; +} + + +/* Add a bitmap to the shared bitmap hashtable. */ + +static void +shared_bitmap_add (bitmap pt_vars) +{ + void **slot; + shared_bitmap_info_t sbi = XNEW (struct shared_bitmap_info); + + sbi->pt_vars = pt_vars; + sbi->hashcode = bitmap_hash (pt_vars); + + slot = htab_find_slot_with_hash (shared_bitmap_table, sbi, + sbi->hashcode, INSERT); + gcc_assert (!*slot); + *slot = (void *) sbi; +} + + /* Set bits in INTO corresponding to the variable uids in solution set FROM, which came from variable PTR. For variables that are actually dereferenced, we also use type @@ -4460,7 +4529,9 @@ struct ptr_info_def *pi = get_ptr_info (p); unsigned int i; bitmap_iterator bi; - + bitmap finished_solution; + bitmap result; + /* This variable may have been collapsed, let's get the real variable. */ vi = get_varinfo (find (vi->id)); @@ -4492,10 +4563,20 @@ if (pi->pt_anything) return false; - if (!pi->pt_vars) - pi->pt_vars = BITMAP_GGC_ALLOC (); + finished_solution = BITMAP_GGC_ALLOC (); + set_uids_in_ptset (vi->decl, finished_solution, vi->solution); + result = shared_bitmap_lookup (finished_solution); - set_uids_in_ptset (vi->decl, pi->pt_vars, vi->solution); + if (!result) + { + shared_bitmap_add (finished_solution); + pi->pt_vars = finished_solution; + } + else + { + pi->pt_vars = result; + bitmap_clear (finished_solution); + } if (bitmap_empty_p (pi->pt_vars)) pi->pt_vars = NULL; @@ -4691,6 +4772,8 @@ vi_for_tree = pointer_map_create (); memset (&stats, 0, sizeof (stats)); + shared_bitmap_table = htab_create (511, shared_bitmap_hash, + shared_bitmap_eq, free); init_base_vars (); } @@ -4923,6 +5006,7 @@ varinfo_t v; int i; + htab_delete (shared_bitmap_table); if (dump_file && (dump_flags & TDF_STATS)) fprintf (dump_file, "Points to sets created:%d\n", stats.points_to_sets_created); From evan.cheng at apple.com Mon Jan 24 19:28:33 2011 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 25 Jan 2011 01:28:33 -0000 Subject: [llvm-commits] [llvm] r124167 - in /llvm/trunk: lib/Target/ARM/ARMFrameLowering.cpp test/CodeGen/ARM/call-tc.ll Message-ID: <20110125012833.CC7EB2A6C130@llvm.org> Author: evancheng Date: Mon Jan 24 19:28:33 2011 New Revision: 124167 URL: http://llvm.org/viewvc/llvm-project?rev=124167&view=rev Log: Don't merge restore with tail call instruction. Modified: llvm/trunk/lib/Target/ARM/ARMFrameLowering.cpp llvm/trunk/test/CodeGen/ARM/call-tc.ll Modified: llvm/trunk/lib/Target/ARM/ARMFrameLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFrameLowering.cpp?rev=124167&r1=124166&r2=124167&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMFrameLowering.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMFrameLowering.cpp Mon Jan 24 19:28:33 2011 @@ -586,6 +586,11 @@ const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo(); ARMFunctionInfo *AFI = MF.getInfo(); DebugLoc DL = MI->getDebugLoc(); + unsigned RetOpcode = MI->getOpcode(); + bool isTailCall = (RetOpcode == ARM::TCRETURNdi || + RetOpcode == ARM::TCRETURNdiND || + RetOpcode == ARM::TCRETURNri || + RetOpcode == ARM::TCRETURNriND); SmallVector Regs; unsigned i = CSI.size(); @@ -596,7 +601,7 @@ unsigned Reg = CSI[i-1].getReg(); if (!(Func)(Reg, STI.isTargetDarwin())) continue; - if (Reg == ARM::LR && !isVarArg && STI.hasV5TOps()) { + if (Reg == ARM::LR && !isTailCall && !isVarArg && STI.hasV5TOps()) { Reg = ARM::PC; LdmOpc = AFI->isThumbFunction() ? ARM::t2LDMIA_RET : ARM::LDMIA_RET; // Fold the return instruction into the LDM. Modified: llvm/trunk/test/CodeGen/ARM/call-tc.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/call-tc.ll?rev=124167&r1=124166&r2=124167&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/call-tc.ll (original) +++ llvm/trunk/test/CodeGen/ARM/call-tc.ll Mon Jan 24 19:28:33 2011 @@ -1,5 +1,6 @@ ; RUN: llc < %s -mtriple=armv6-apple-darwin -mattr=+vfp2 -arm-tail-calls | FileCheck %s -check-prefix=CHECKV6 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -relocation-model=pic -mattr=+vfp2 -arm-tail-calls | FileCheck %s -check-prefix=CHECKELF +; RUN: llc < %s -mtriple=thumbv7-apple-darwin -arm-tail-calls | FileCheck %s -check-prefix=CHECKT2 @t = weak global i32 ()* null ; [#uses=1] @@ -63,3 +64,24 @@ %0 = sdiv i32 %a, %b ret i32 %0 } + +; Make sure the tail call instruction isn't deleted +; rdar://8309338 +declare void @foo() nounwind + +define void @t7() nounwind { +entry: +; CHECKT2: t7: +; CHECKT2: blxeq _foo +; CHECKT2-NEXT: pop.w +; CHECKT2-NEXT: b.w _foo + br i1 undef, label %bb, label %bb1.lr.ph + +bb1.lr.ph: + tail call void @foo() nounwind + unreachable + +bb: + tail call void @foo() nounwind + ret void +} From echristo at apple.com Mon Jan 24 19:34:31 2011 From: echristo at apple.com (Eric Christopher) Date: Tue, 25 Jan 2011 01:34:31 -0000 Subject: [llvm-commits] [llvm] r124168 - /llvm/trunk/lib/Analysis/InlineCost.cpp Message-ID: <20110125013431.2F4542A6C130@llvm.org> Author: echristo Date: Mon Jan 24 19:34:31 2011 New Revision: 124168 URL: http://llvm.org/viewvc/llvm-project?rev=124168&view=rev Log: Reorganize this so that the early exit and special cases come early rather than interspersed. No functional change. Modified: llvm/trunk/lib/Analysis/InlineCost.cpp Modified: llvm/trunk/lib/Analysis/InlineCost.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/InlineCost.cpp?rev=124168&r1=124167&r2=124168&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/InlineCost.cpp (original) +++ llvm/trunk/lib/Analysis/InlineCost.cpp Mon Jan 24 19:34:31 2011 @@ -380,32 +380,6 @@ CS.isNoInline()) return llvm::InlineCost::getNever(); - // InlineCost - This value measures how good of an inline candidate this call - // site is to inline. A lower inline cost make is more likely for the call to - // be inlined. This value may go negative. - // - int InlineCost = 0; - - // If there is only one call of the function, and it has internal linkage, - // make it almost guaranteed to be inlined. - // - if (Callee->hasLocalLinkage() && Callee->hasOneUse() && isDirectCall) - InlineCost += InlineConstants::LastCallToStaticBonus; - - // If this function uses the coldcc calling convention, prefer not to inline - // it. - if (Callee->getCallingConv() == CallingConv::Cold) - InlineCost += InlineConstants::ColdccPenalty; - - // If the instruction after the call, or if the normal destination of the - // invoke is an unreachable instruction, the function is noreturn. As such, - // there is little point in inlining this. - if (InvokeInst *II = dyn_cast(TheCall)) { - if (isa(II->getNormalDest()->begin())) - InlineCost += InlineConstants::NoreturnPenalty; - } else if (isa(++BasicBlock::iterator(TheCall))) - InlineCost += InlineConstants::NoreturnPenalty; - // Get information about the callee. FunctionInfo *CalleeFI = &CachedFunctionInfo[Callee]; @@ -444,6 +418,12 @@ return InlineCost::getNever(); } + // InlineCost - This value measures how good of an inline candidate this call + // site is to inline. A lower inline cost make is more likely for the call to + // be inlined. This value may go negative. + // + int InlineCost = 0; + // Add to the inline quality for properties that make the call valuable to // inline. This includes factors that indicate that the result of inlining // the function will be optimizable. Currently this just looks at arguments @@ -475,9 +455,29 @@ } } + // If there is only one call of the function, and it has internal linkage, + // make it almost guaranteed to be inlined. + // + if (Callee->hasLocalLinkage() && Callee->hasOneUse() && isDirectCall) + InlineCost += InlineConstants::LastCallToStaticBonus; + // Now that we have considered all of the factors that make the call site more // likely to be inlined, look at factors that make us not want to inline it. + // If the instruction after the call, or if the normal destination of the + // invoke is an unreachable instruction, the function is noreturn. As such, + // there is little point in inlining this. + if (InvokeInst *II = dyn_cast(TheCall)) { + if (isa(II->getNormalDest()->begin())) + InlineCost += InlineConstants::NoreturnPenalty; + } else if (isa(++BasicBlock::iterator(TheCall))) + InlineCost += InlineConstants::NoreturnPenalty; + + // If this function uses the coldcc calling convention, prefer not to inline + // it. + if (Callee->getCallingConv() == CallingConv::Cold) + InlineCost += InlineConstants::ColdccPenalty; + // Calls usually take a long time, so they make the inlining gain smaller. InlineCost += CalleeFI->Metrics.NumCalls * InlineConstants::CallPenalty; From Renato.Golin at arm.com Tue Jan 25 02:48:59 2011 From: Renato.Golin at arm.com (Renato Golin) Date: Tue, 25 Jan 2011 08:48:59 +0000 Subject: [llvm-commits] [llvm] r124150 - /llvm/trunk/lib/CodeGen/AsmPrinter/DwarfException.cpp In-Reply-To: References: <20110124223840.542E22A6C12C@llvm.org> , Message-ID: Hi anton, In GNU asm, can you represent the static relocations in the table? Or is that something that the assembler will always do automatically? Cheers, Renato ________________________________________ From: llvm-commits-bounces at cs.uiuc.edu [llvm-commits-bounces at cs.uiuc.edu] On Behalf Of Anton Korobeynikov [asl at math.spbu.ru] Sent: 24 January 2011 23:05 To: Eric Christopher Cc: llvm-commits at cs.uiuc.edu Subject: Re: [llvm-commits] [llvm] r124150 - /llvm/trunk/lib/CodeGen/AsmPrinter/DwarfException.cpp Hi Eric, > Can you explain this change? > Thanks. For ARM EHABI stuff we will need not to switch the section to emit the exception table (so, basically all the stuff got emitted into the same section as the function itself and it's an assembler responsibility to "move" everything to proper section). Right now we always require switching to LSDASection, this patch relaxes this requirement. -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University _______________________________________________ llvm-commits mailing list llvm-commits at cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits -- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. From nicholas at mxc.ca Tue Jan 25 02:56:50 2011 From: nicholas at mxc.ca (Nick Lewycky) Date: Tue, 25 Jan 2011 08:56:50 -0000 Subject: [llvm-commits] [llvm] r124182 - in /llvm/trunk: lib/Transforms/IPO/MergeFunctions.cpp test/Transforms/MergeFunc/fold-weak.ll Message-ID: <20110125085650.4742F2A6C12D@llvm.org> Author: nicholas Date: Tue Jan 25 02:56:50 2011 New Revision: 124182 URL: http://llvm.org/viewvc/llvm-project?rev=124182&view=rev Log: Teach mergefunc how to emit aliases safely again -- but keep it turned it off for now. It's controlled by the HasGlobalAliases variable which is not attached to any flag yet. Modified: llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp llvm/trunk/test/Transforms/MergeFunc/fold-weak.ll Modified: llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp?rev=124182&r1=124181&r2=124182&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp Tue Jan 25 02:56:50 2011 @@ -68,6 +68,7 @@ STATISTIC(NumFunctionsMerged, "Number of functions merged"); STATISTIC(NumThunksWritten, "Number of thunks generated"); +STATISTIC(NumAliasesWritten, "Number of aliases generated"); STATISTIC(NumDoubleWeak, "Number of new functions created"); /// ProfileFunction - Creates a hash-code for the function which is the same @@ -164,7 +165,8 @@ class MergeFunctions : public ModulePass { public: static char ID; - MergeFunctions() : ModulePass(ID) { + MergeFunctions() + : ModulePass(ID), HasGlobalAliases(false) { initializeMergeFunctionsPass(*PassRegistry::getPassRegistry()); } @@ -189,21 +191,34 @@ /// queue the functions. void RemoveUsers(Value *V); + /// Replace all direct calls of Old with calls of New. Will bitcast New if + /// necessary to make types match. + void replaceDirectCallers(Function *Old, Function *New); + /// MergeTwoFunctions - Merge two equivalent functions. Upon completion, G /// may be deleted, or may be converted into a thunk. In either case, it /// should never be visited again. void MergeTwoFunctions(Function *F, Function *G); + /// WriteThunkOrAlias - Replace G with a thunk or an alias to F. Deletes G. + void WriteThunkOrAlias(Function *F, Function *G); + /// WriteThunk - Replace G with a simple tail call to bitcast(F). Also /// replace direct uses of G with bitcast(F). Deletes G. void WriteThunk(Function *F, Function *G); + /// WriteAlias - Replace G with an alias to F. Deletes G. + void WriteAlias(Function *F, Function *G); + /// The set of all distinct functions. Use the Insert and Remove methods to /// modify it. FnSetType FnSet; /// TargetData for more accurate GEP comparisons. May be NULL. TargetData *TD; + + /// Whether or not the target supports global aliases. + bool HasGlobalAliases; }; } // end anonymous namespace @@ -587,22 +602,39 @@ return true; } +/// Replace direct callers of Old with New. +void MergeFunctions::replaceDirectCallers(Function *Old, Function *New) { + Constant *BitcastNew = ConstantExpr::getBitCast(New, Old->getType()); + for (Value::use_iterator UI = Old->use_begin(), UE = Old->use_end(); + UI != UE;) { + Value::use_iterator TheIter = UI; + ++UI; + CallSite CS(*TheIter); + if (CS && CS.isCallee(TheIter)) { + Remove(CS.getInstruction()->getParent()->getParent()); + TheIter.getUse().set(BitcastNew); + } + } +} + +void MergeFunctions::WriteThunkOrAlias(Function *F, Function *G) { + if (HasGlobalAliases && G->hasUnnamedAddr()) { + if (G->hasExternalLinkage() || G->hasLocalLinkage() || + G->hasWeakLinkage()) { + WriteAlias(F, G); + return; + } + } + + WriteThunk(F, G); +} + /// WriteThunk - Replace G with a simple tail call to bitcast(F). Also replace /// direct uses of G with bitcast(F). Deletes G. void MergeFunctions::WriteThunk(Function *F, Function *G) { if (!G->mayBeOverridden()) { // Redirect direct callers of G to F. - Constant *BitcastF = ConstantExpr::getBitCast(F, G->getType()); - for (Value::use_iterator UI = G->use_begin(), UE = G->use_end(); - UI != UE;) { - Value::use_iterator TheIter = UI; - ++UI; - CallSite CS(*TheIter); - if (CS && CS.isCallee(TheIter)) { - Remove(CS.getInstruction()->getParent()->getParent()); - TheIter.getUse().set(BitcastF); - } - } + replaceDirectCallers(G, F); } // If G was internal then we may have replaced all uses of G with F. If so, @@ -645,31 +677,53 @@ ++NumThunksWritten; } +/// WriteAlias - Replace G with an alias to F and delete G. +void MergeFunctions::WriteAlias(Function *F, Function *G) { + Constant *BitcastF = ConstantExpr::getBitCast(F, G->getType()); + GlobalAlias *GA = new GlobalAlias(G->getType(), G->getLinkage(), "", + BitcastF, G->getParent()); + F->setAlignment(std::max(F->getAlignment(), G->getAlignment())); + GA->takeName(G); + GA->setVisibility(G->getVisibility()); + RemoveUsers(G); + G->replaceAllUsesWith(GA); + G->eraseFromParent(); + + DEBUG(dbgs() << "WriteAlias: " << GA->getName() << '\n'); + ++NumAliasesWritten; +} + /// MergeTwoFunctions - Merge two equivalent functions. Upon completion, /// Function G is deleted. void MergeFunctions::MergeTwoFunctions(Function *F, Function *G) { if (F->mayBeOverridden()) { assert(G->mayBeOverridden()); - // Make them both thunks to the same internal function. - Function *H = Function::Create(F->getFunctionType(), F->getLinkage(), "", - F->getParent()); - H->copyAttributesFrom(F); - H->takeName(F); - RemoveUsers(F); - F->replaceAllUsesWith(H); + if (HasGlobalAliases) { + // Make them both thunks to the same internal function. + Function *H = Function::Create(F->getFunctionType(), F->getLinkage(), "", + F->getParent()); + H->copyAttributesFrom(F); + H->takeName(F); + RemoveUsers(F); + F->replaceAllUsesWith(H); - unsigned MaxAlignment = std::max(G->getAlignment(), H->getAlignment()); + unsigned MaxAlignment = std::max(G->getAlignment(), H->getAlignment()); - WriteThunk(F, G); - WriteThunk(F, H); + WriteAlias(F, G); + WriteAlias(F, H); - F->setAlignment(MaxAlignment); - F->setLinkage(GlobalValue::PrivateLinkage); + F->setAlignment(MaxAlignment); + F->setLinkage(GlobalValue::PrivateLinkage); + } else { + // We can't merge them. Instead, pick one and update all direct callers + // to call it and hope that we improve the instruction cache hit rate. + replaceDirectCallers(G, F); + } ++NumDoubleWeak; } else { - WriteThunk(F, G); + WriteThunkOrAlias(F, G); } ++NumFunctionsMerged; Modified: llvm/trunk/test/Transforms/MergeFunc/fold-weak.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/MergeFunc/fold-weak.ll?rev=124182&r1=124181&r2=124182&view=diff ============================================================================== --- llvm/trunk/test/Transforms/MergeFunc/fold-weak.ll (original) +++ llvm/trunk/test/Transforms/MergeFunc/fold-weak.ll Tue Jan 25 02:56:50 2011 @@ -1,6 +1,10 @@ ; RUN: opt < %s -mergefunc -S > %t ; RUN: grep {define weak} %t | count 2 ; RUN: grep {call} %t | count 2 +; XFAIL: * + +; This test is off for a bit as we change this particular sort of folding to +; only apply on ELF systems and not Mach-O systems. define weak i32 @sum(i32 %x, i32 %y) { %sum = add i32 %x, %y From baldrick at free.fr Tue Jan 25 03:38:29 2011 From: baldrick at free.fr (Duncan Sands) Date: Tue, 25 Jan 2011 09:38:29 -0000 Subject: [llvm-commits] [llvm] r124183 - in /llvm/trunk: include/llvm/Analysis/ValueTracking.h lib/Analysis/InstructionSimplify.cpp lib/Analysis/ValueTracking.cpp test/Transforms/InstSimplify/2011-01-18-Compare.ll Message-ID: <20110125093829.A8AA92A6C12C@llvm.org> Author: baldrick Date: Tue Jan 25 03:38:29 2011 New Revision: 124183 URL: http://llvm.org/viewvc/llvm-project?rev=124183&view=rev Log: According to my auto-simplifier the most common missed simplifications in optimized code are: (non-negative number)+(power-of-two) != 0 -> true and (x | 1) != 0 -> true Instcombine knows about the second one of course, but only does it if X|1 has only one use. These fire thousands of times in the testsuite. Modified: llvm/trunk/include/llvm/Analysis/ValueTracking.h llvm/trunk/lib/Analysis/InstructionSimplify.cpp llvm/trunk/lib/Analysis/ValueTracking.cpp llvm/trunk/test/Transforms/InstSimplify/2011-01-18-Compare.ll Modified: llvm/trunk/include/llvm/Analysis/ValueTracking.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/ValueTracking.h?rev=124183&r1=124182&r2=124183&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/ValueTracking.h (original) +++ llvm/trunk/include/llvm/Analysis/ValueTracking.h Tue Jan 25 03:38:29 2011 @@ -39,6 +39,23 @@ APInt &KnownOne, const TargetData *TD = 0, unsigned Depth = 0); + /// ComputeSignBit - Determine whether the sign bit is known to be zero or + /// one. Convenience wrapper around ComputeMaskedBits. + void ComputeSignBit(Value *V, bool &KnownZero, bool &KnownOne, + const TargetData *TD = 0, unsigned Depth = 0); + + /// isPowerOfTwo - Return true if the given value is known to have exactly one + /// bit set when defined. For vectors return true if every element is known to + /// be a power of two when defined. Supports values with integer or pointer + /// type and vectors of integers. + bool isPowerOfTwo(Value *V, const TargetData *TD = 0, unsigned Depth = 0); + + /// isKnownNonZero - Return true if the given value is known to be non-zero + /// when defined. For vectors return true if every element is known to be + /// non-zero when defined. Supports values with integer or pointer type and + /// vectors of integers. + bool isKnownNonZero(Value *V, const TargetData *TD = 0, unsigned Depth = 0); + /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use /// this predicate to simplify operations downstream. Mask is known to be /// zero for bits that V cannot have. Modified: llvm/trunk/lib/Analysis/InstructionSimplify.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/InstructionSimplify.cpp?rev=124183&r1=124182&r2=124183&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/InstructionSimplify.cpp (original) +++ llvm/trunk/lib/Analysis/InstructionSimplify.cpp Tue Jan 25 03:38:29 2011 @@ -22,6 +22,7 @@ #include "llvm/Analysis/InstructionSimplify.h" #include "llvm/Analysis/ConstantFolding.h" #include "llvm/Analysis/Dominators.h" +#include "llvm/Analysis/ValueTracking.h" #include "llvm/Support/PatternMatch.h" #include "llvm/Support/ValueHandle.h" #include "llvm/Target/TargetData.h" @@ -1153,7 +1154,69 @@ } } - // See if we are doing a comparison with a constant. + // icmp , - Different stack variables have + // different addresses, and what's more the address of a stack variable is + // never null or equal to the address of a global. Note that generalizing + // to the case where LHS is a global variable address or null is pointless, + // since if both LHS and RHS are constants then we already constant folded + // the compare, and if only one of them is then we moved it to RHS already. + if (isa(LHS) && (isa(RHS) || isa(RHS) || + isa(RHS))) + // We already know that LHS != LHS. + return ConstantInt::get(ITy, CmpInst::isFalseWhenEqual(Pred)); + + // If we are comparing with zero then try hard since this is a common case. + if (match(RHS, m_Zero())) { + bool LHSKnownNonNegative, LHSKnownNegative; + switch (Pred) { + default: + assert(false && "Unknown ICmp predicate!"); + case ICmpInst::ICMP_ULT: + return ConstantInt::getFalse(LHS->getContext()); + case ICmpInst::ICMP_UGE: + return ConstantInt::getTrue(LHS->getContext()); + case ICmpInst::ICMP_EQ: + case ICmpInst::ICMP_ULE: + if (isKnownNonZero(LHS, TD)) + return ConstantInt::getFalse(LHS->getContext()); + break; + case ICmpInst::ICMP_NE: + case ICmpInst::ICMP_UGT: + if (isKnownNonZero(LHS, TD)) + return ConstantInt::getTrue(LHS->getContext()); + break; + case ICmpInst::ICMP_SLT: + ComputeSignBit(LHS, LHSKnownNonNegative, LHSKnownNegative, TD); + if (LHSKnownNegative) + return ConstantInt::getTrue(LHS->getContext()); + if (LHSKnownNonNegative) + return ConstantInt::getFalse(LHS->getContext()); + break; + case ICmpInst::ICMP_SLE: + ComputeSignBit(LHS, LHSKnownNonNegative, LHSKnownNegative, TD); + if (LHSKnownNegative) + return ConstantInt::getTrue(LHS->getContext()); + if (LHSKnownNonNegative && isKnownNonZero(LHS, TD)) + return ConstantInt::getFalse(LHS->getContext()); + break; + case ICmpInst::ICMP_SGE: + ComputeSignBit(LHS, LHSKnownNonNegative, LHSKnownNegative, TD); + if (LHSKnownNegative) + return ConstantInt::getFalse(LHS->getContext()); + if (LHSKnownNonNegative) + return ConstantInt::getTrue(LHS->getContext()); + break; + case ICmpInst::ICMP_SGT: + ComputeSignBit(LHS, LHSKnownNonNegative, LHSKnownNegative, TD); + if (LHSKnownNegative) + return ConstantInt::getFalse(LHS->getContext()); + if (LHSKnownNonNegative && isKnownNonZero(LHS, TD)) + return ConstantInt::getTrue(LHS->getContext()); + break; + } + } + + // See if we are doing a comparison with a constant integer. if (ConstantInt *CI = dyn_cast(RHS)) { switch (Pred) { default: break; @@ -1192,17 +1255,6 @@ } } - // icmp , - Different stack variables have - // different addresses, and what's more the address of a stack variable is - // never null or equal to the address of a global. Note that generalizing - // to the case where LHS is a global variable address or null is pointless, - // since if both LHS and RHS are constants then we already constant folded - // the compare, and if only one of them is then we moved it to RHS already. - if (isa(LHS) && (isa(RHS) || isa(RHS) || - isa(RHS))) - // We already know that LHS != LHS. - return ConstantInt::get(ITy, CmpInst::isFalseWhenEqual(Pred)); - // Compare of cast, for example (zext X) != 0 -> X != 0 if (isa(LHS) && (isa(RHS) || isa(RHS))) { Instruction *LI = cast(LHS); Modified: llvm/trunk/lib/Analysis/ValueTracking.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ValueTracking.cpp?rev=124183&r1=124182&r2=124183&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ValueTracking.cpp (original) +++ llvm/trunk/lib/Analysis/ValueTracking.cpp Tue Jan 25 03:38:29 2011 @@ -24,9 +24,22 @@ #include "llvm/Target/TargetData.h" #include "llvm/Support/GetElementPtrTypeIterator.h" #include "llvm/Support/MathExtras.h" +#include "llvm/Support/PatternMatch.h" #include "llvm/ADT/SmallPtrSet.h" #include using namespace llvm; +using namespace llvm::PatternMatch; + +const unsigned MaxDepth = 6; + +/// getBitWidth - Returns the bitwidth of the given scalar or pointer type (if +/// unknown returns 0). For vector types, returns the element type's bitwidth. +static unsigned getBitWidth(const Type *Ty, const TargetData *TD) { + if (unsigned BitWidth = Ty->getScalarSizeInBits()) + return BitWidth; + assert(isa(Ty) && "Expected a pointer type!"); + return TD ? TD->getPointerSizeInBits() : 0; +} /// ComputeMaskedBits - Determine which of the bits specified in Mask are /// known to be either zero or one and return them in the KnownZero/KnownOne @@ -47,7 +60,6 @@ void llvm::ComputeMaskedBits(Value *V, const APInt &Mask, APInt &KnownZero, APInt &KnownOne, const TargetData *TD, unsigned Depth) { - const unsigned MaxDepth = 6; assert(V && "No Value?"); assert(Depth <= MaxDepth && "Limit Search Depth"); unsigned BitWidth = Mask.getBitWidth(); @@ -620,6 +632,157 @@ } } +/// ComputeSignBit - Determine whether the sign bit is known to be zero or +/// one. Convenience wrapper around ComputeMaskedBits. +void llvm::ComputeSignBit(Value *V, bool &KnownZero, bool &KnownOne, + const TargetData *TD, unsigned Depth) { + unsigned BitWidth = getBitWidth(V->getType(), TD); + if (!BitWidth) { + KnownZero = false; + KnownOne = false; + return; + } + APInt ZeroBits(BitWidth, 0); + APInt OneBits(BitWidth, 0); + ComputeMaskedBits(V, APInt::getSignBit(BitWidth), ZeroBits, OneBits, TD, + Depth); + KnownOne = OneBits[BitWidth - 1]; + KnownZero = ZeroBits[BitWidth - 1]; +} + +/// isPowerOfTwo - Return true if the given value is known to have exactly one +/// bit set when defined. For vectors return true if every element is known to +/// be a power of two when defined. Supports values with integer or pointer +/// types and vectors of integers. +bool llvm::isPowerOfTwo(Value *V, const TargetData *TD, unsigned Depth) { + if (ConstantInt *CI = dyn_cast(V)) + return CI->getValue().countPopulation() == 1; + // TODO: Handle vector constants. + + // 1 << X is clearly a power of two if the one is not shifted off the end. If + // it is shifted off the end then the result is undefined. + if (match(V, m_Shl(m_One(), m_Value()))) + return true; + + // (signbit) >>l X is clearly a power of two if the one is not shifted off the + // bottom. If it is shifted off the bottom then the result is undefined. + ConstantInt *CI; + if (match(V, m_LShr(m_ConstantInt(CI), m_Value())) && + CI->getValue().isSignBit()) + return true; + + // The remaining tests are all recursive, so bail out if we hit the limit. + if (Depth++ == MaxDepth) + return false; + + if (ZExtInst *ZI = dyn_cast(V)) + return isPowerOfTwo(ZI->getOperand(0), TD, Depth); + + if (SelectInst *SI = dyn_cast(V)) + return isPowerOfTwo(SI->getTrueValue(), TD, Depth) && + isPowerOfTwo(SI->getFalseValue(), TD, Depth); + + return false; +} + +/// isKnownNonZero - Return true if the given value is known to be non-zero +/// when defined. For vectors return true if every element is known to be +/// non-zero when defined. Supports values with integer or pointer type and +/// vectors of integers. +bool llvm::isKnownNonZero(Value *V, const TargetData *TD, unsigned Depth) { + if (Constant *C = dyn_cast(V)) { + if (C->isNullValue()) + return false; + if (isa(C)) + // Must be non-zero due to null test above. + return true; + // TODO: Handle vectors + return false; + } + + // The remaining tests are all recursive, so bail out if we hit the limit. + if (Depth++ == MaxDepth) + return false; + + unsigned BitWidth = getBitWidth(V->getType(), TD); + + // X | Y != 0 if X != 0 or Y != 0. + Value *X = 0, *Y = 0; + if (match(V, m_Or(m_Value(X), m_Value(Y)))) + return isKnownNonZero(X, TD, Depth) || isKnownNonZero(Y, TD, Depth); + + // ext X != 0 if X != 0. + if (isa(V) || isa(V)) + return isKnownNonZero(cast(V)->getOperand(0), TD, Depth); + + // shl X, A != 0 if X is odd. Note that the value of the shift is undefined + // if the lowest bit is shifted off the end. + if (BitWidth && match(V, m_Shl(m_Value(X), m_Value(Y)))) { + APInt KnownZero(BitWidth, 0); + APInt KnownOne(BitWidth, 0); + ComputeMaskedBits(V, APInt(BitWidth, 1), KnownZero, KnownOne, TD, Depth); + if (KnownOne[0]) + return true; + } + // shr X, A != 0 if X is negative. Note that the value of the shift is not + // defined if the sign bit is shifted off the end. + else if (match(V, m_Shr(m_Value(X), m_Value(Y)))) { + bool XKnownNonNegative, XKnownNegative; + ComputeSignBit(X, XKnownNonNegative, XKnownNegative, TD, Depth); + if (XKnownNegative) + return true; + } + // X + Y. + else if (match(V, m_Add(m_Value(X), m_Value(Y)))) { + bool XKnownNonNegative, XKnownNegative; + bool YKnownNonNegative, YKnownNegative; + ComputeSignBit(X, XKnownNonNegative, XKnownNegative, TD, Depth); + ComputeSignBit(Y, YKnownNonNegative, YKnownNegative, TD, Depth); + + // If X and Y are both non-negative (as signed values) then their sum is not + // zero. + if (XKnownNonNegative && YKnownNonNegative) + return true; + + // If X and Y are both negative (as signed values) then their sum is not + // zero unless both X and Y equal INT_MIN. + if (BitWidth && XKnownNegative && YKnownNegative) { + APInt KnownZero(BitWidth, 0); + APInt KnownOne(BitWidth, 0); + APInt Mask = APInt::getSignedMaxValue(BitWidth); + // The sign bit of X is set. If some other bit is set then X is not equal + // to INT_MIN. + ComputeMaskedBits(X, Mask, KnownZero, KnownOne, TD, Depth); + if ((KnownOne & Mask) != 0) + return true; + // The sign bit of Y is set. If some other bit is set then Y is not equal + // to INT_MIN. + ComputeMaskedBits(Y, Mask, KnownZero, KnownOne, TD, Depth); + if ((KnownOne & Mask) != 0) + return true; + } + + // The sum of a non-negative number and a power of two is not zero. + if (XKnownNonNegative && isPowerOfTwo(Y, TD, Depth)) + return true; + if (YKnownNonNegative && isPowerOfTwo(X, TD, Depth)) + return true; + } + // (C ? X : Y) != 0 if X != 0 and Y != 0. + else if (SelectInst *SI = dyn_cast(V)) { + if (isKnownNonZero(SI->getTrueValue(), TD, Depth) && + isKnownNonZero(SI->getFalseValue(), TD, Depth)) + return true; + } + + if (!BitWidth) return false; + APInt KnownZero(BitWidth, 0); + APInt KnownOne(BitWidth, 0); + ComputeMaskedBits(V, APInt::getAllOnesValue(BitWidth), KnownZero, KnownOne, + TD, Depth); + return KnownOne != 0; +} + /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use /// this predicate to simplify operations downstream. Mask is known to be zero /// for bits that V cannot have. Modified: llvm/trunk/test/Transforms/InstSimplify/2011-01-18-Compare.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstSimplify/2011-01-18-Compare.ll?rev=124183&r1=124182&r2=124183&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstSimplify/2011-01-18-Compare.ll (original) +++ llvm/trunk/test/Transforms/InstSimplify/2011-01-18-Compare.ll Tue Jan 25 03:38:29 2011 @@ -27,6 +27,14 @@ ; CHECK: ret i1 %x } +define i1 @zext3() { +; CHECK: @zext3 + %e = zext i1 1 to i32 + %c = icmp ne i32 %e, 0 + ret i1 %c +; CHECK: ret i1 true +} + define i1 @sext(i32 %x) { ; CHECK: @sext %e1 = sext i32 %x to i64 @@ -43,3 +51,49 @@ ret i1 %c ; CHECK: ret i1 %x } + +define i1 @sext3() { +; CHECK: @sext3 + %e = sext i1 1 to i32 + %c = icmp ne i32 %e, 0 + ret i1 %c +; CHECK: ret i1 true +} + +define i1 @add(i32 %x, i32 %y) { +; CHECK: @add + %l = lshr i32 %x, 1 + %r = lshr i32 %y, 1 + %s = add i32 %l, %r + %c = icmp eq i32 %s, 0 + ret i1 %c +; CHECK: ret i1 false +} + +define i1 @add2(i8 %x, i8 %y) { +; CHECK: @add2 + %l = or i8 %x, 128 + %r = or i8 %y, 129 + %s = add i8 %l, %r + %c = icmp eq i8 %s, 0 + ret i1 %c +; CHECK: ret i1 false +} + +define i1 @addpowtwo(i32 %x, i32 %y) { +; CHECK: @addpowtwo + %l = lshr i32 %x, 1 + %r = shl i32 1, %y + %s = add i32 %l, %r + %c = icmp eq i32 %s, 0 + ret i1 %c +; CHECK: ret i1 false +} + +define i1 @or(i32 %x) { +; CHECK: @or + %o = or i32 %x, 1 + %c = icmp eq i32 %o, 0 + ret i1 %c +; CHECK: ret i1 false +} From Renato.Golin at arm.com Tue Jan 25 04:15:49 2011 From: Renato.Golin at arm.com (Renato Golin) Date: Tue, 25 Jan 2011 10:15:49 +0000 Subject: [llvm-commits] First draft of ARM EHABI support In-Reply-To: References: Message-ID: <4D3EA2D5.80909@arm.com> On 01/24/11 23:51, Anton Korobeynikov wrote: > Please find attached the first series of patches which start > implementation of ARM EHABI support. Hi Anton, Very welcomed changes! :D I'm not the one to advise you on MC, so I'll refrain myself to target and exception model. + enum ExceptionsType { None, DwarfTable, DwarfCFI, SjLj, ARM }; Just a matter of preference, but can we call this EHABI rather than ARM? ;) +++ b/include/llvm/MC/MCStreamer.h + /// ARM-related methods. + /// FIXME: Eventually we should have some "target MC streamer" and move + /// these methods there. + virtual void EmitFnStart(); + virtual void EmitFnEnd(); + virtual void EmitCantUnwind(); + virtual void EmitPersonality(const MCSymbol *Personality); + virtual void EmitHandlerData(); Agreed, we need at least some target information in MC. Could be callbacks, derived classes or even template parameters (policies). + // Emit references to personality. + if (const Function * Personality = + MMI->getPersonalities()[MMI->getPersonalityIndex()]) { + MCSymbol *PerSym = Asm->Mang->getSymbol(Personality); + Asm->OutStreamer.EmitSymbolAttribute(PerSym, MCSA_Global); + Asm->OutStreamer.EmitPersonality(PerSym); + } It looks like you're following the GNU style (and using gnu personalities). I assume you don't need the prel31 relocation at this time, since GCC doesn't generate them (and GAS/LD guess them correctly). But when using short and long ARM personalities, some relocations will be needed in there... +class ARMException : public DwarfException { If I got it right, DwarfException now is the generic exception engine (not just Dwarf) but it still has a few specific code like emitting ULEBs in a specific way in ComputeActionTable, and lots of SjLj if/else all around. I'd suggest to change the class name to Exception?, extract SjLjException from it and make sure the action table construction and other appropriate bits are actually shared among all implementations. .... The rest seems fine. I haven't dug that deep into it, but looks ok. Thanks!! --renato -- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. From baldrick at free.fr Tue Jan 25 06:15:09 2011 From: baldrick at free.fr (Duncan Sands) Date: Tue, 25 Jan 2011 12:15:09 -0000 Subject: [llvm-commits] [llvm] r124184 - /llvm/trunk/lib/Analysis/ValueTracking.cpp Message-ID: <20110125121509.9B47E2A6C12C@llvm.org> Author: baldrick Date: Tue Jan 25 06:15:09 2011 New Revision: 124184 URL: http://llvm.org/viewvc/llvm-project?rev=124184&view=rev Log: See if this fixes llvm-gcc bootstrap. Modified: llvm/trunk/lib/Analysis/ValueTracking.cpp Modified: llvm/trunk/lib/Analysis/ValueTracking.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ValueTracking.cpp?rev=124184&r1=124183&r2=124184&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ValueTracking.cpp (original) +++ llvm/trunk/lib/Analysis/ValueTracking.cpp Tue Jan 25 06:15:09 2011 @@ -742,7 +742,8 @@ // If X and Y are both non-negative (as signed values) then their sum is not // zero. if (XKnownNonNegative && YKnownNonNegative) - return true; + return false; +// return true; // If X and Y are both negative (as signed values) then their sum is not // zero unless both X and Y equal INT_MIN. From baldrick at free.fr Tue Jan 25 06:31:43 2011 From: baldrick at free.fr (Duncan Sands) Date: Tue, 25 Jan 2011 12:31:43 -0000 Subject: [llvm-commits] [llvm] r124185 - /llvm/trunk/test/Transforms/InstSimplify/2011-01-18-Compare.ll Message-ID: <20110125123143.833CD2A6C12C@llvm.org> Author: baldrick Date: Tue Jan 25 06:31:43 2011 New Revision: 124185 URL: http://llvm.org/viewvc/llvm-project?rev=124185&view=rev Log: Turn off this test - the corresponding instsimplify logic has been disabled. Modified: llvm/trunk/test/Transforms/InstSimplify/2011-01-18-Compare.ll Modified: llvm/trunk/test/Transforms/InstSimplify/2011-01-18-Compare.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstSimplify/2011-01-18-Compare.ll?rev=124185&r1=124184&r2=124185&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstSimplify/2011-01-18-Compare.ll (original) +++ llvm/trunk/test/Transforms/InstSimplify/2011-01-18-Compare.ll Tue Jan 25 06:31:43 2011 @@ -61,13 +61,11 @@ } define i1 @add(i32 %x, i32 %y) { -; CHECK: @add %l = lshr i32 %x, 1 %r = lshr i32 %y, 1 %s = add i32 %l, %r %c = icmp eq i32 %s, 0 ret i1 %c -; CHECK: ret i1 false } define i1 @add2(i8 %x, i8 %y) { From aggarwa4 at illinois.edu Tue Jan 25 07:56:12 2011 From: aggarwa4 at illinois.edu (Arushi Aggarwal) Date: Tue, 25 Jan 2011 13:56:12 -0000 Subject: [llvm-commits] [poolalloc] r124186 - /poolalloc/trunk/lib/DSA/BottomUpClosure.cpp Message-ID: <20110125135612.B43AB2A6C12C@llvm.org> Author: aggarwa4 Date: Tue Jan 25 07:56:12 2011 New Revision: 124186 URL: http://llvm.org/viewvc/llvm-project?rev=124186&view=rev Log: Make sure we get the graph again, after we calculate the graph for callees, as the graph might have changed. This can happen in EQBU when graphs of functions have been merged. Modified: poolalloc/trunk/lib/DSA/BottomUpClosure.cpp Modified: poolalloc/trunk/lib/DSA/BottomUpClosure.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/BottomUpClosure.cpp?rev=124186&r1=124185&r2=124186&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/BottomUpClosure.cpp (original) +++ poolalloc/trunk/lib/DSA/BottomUpClosure.cpp Tue Jan 25 07:56:12 2011 @@ -382,9 +382,10 @@ << F->getName() << "\n"); Stack.pop_back(); DEBUG(errs() << " [BU] Calculating graph for: " << F->getName()<< "\n"); - calculateGraph(Graph); + DSGraph* G = getOrCreateGraph(F); + calculateGraph(G); DEBUG(errs() << " [BU] Done inlining: " << F->getName() << " [" - << Graph->getGraphSize() << "+" << Graph->getAuxFunctionCalls().size() + << G->getGraphSize() << "+" << G->getAuxFunctionCalls().size() << "]\n"); if (MaxSCC < 1) MaxSCC = 1; @@ -392,7 +393,7 @@ // // Should we revisit the graph? Only do it if there are now new resolvable // callees. - getAllAuxCallees(Graph, CalleeFunctions); + getAllAuxCallees(G, CalleeFunctions); if (!CalleeFunctions.empty()) { DEBUG(errs() << "Recalculating " << F->getName() << " due to new knowledge\n"); ValMap.erase(F); From jay.foad at gmail.com Tue Jan 25 08:33:33 2011 From: jay.foad at gmail.com (Jay Foad) Date: Tue, 25 Jan 2011 14:33:33 -0000 Subject: [llvm-commits] [llvm] r124187 - /llvm/trunk/include/llvm/Use.h Message-ID: <20110125143333.859EB2A6C12C@llvm.org> Author: foad Date: Tue Jan 25 08:33:33 2011 New Revision: 124187 URL: http://llvm.org/viewvc/llvm-project?rev=124187&view=rev Log: Avoid compiler errors when this header file is included first, by adding a forward declaration of simplify_type<>. Modified: llvm/trunk/include/llvm/Use.h Modified: llvm/trunk/include/llvm/Use.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Use.h?rev=124187&r1=124186&r2=124187&view=diff ============================================================================== --- llvm/trunk/include/llvm/Use.h (original) +++ llvm/trunk/include/llvm/Use.h Tue Jan 25 08:33:33 2011 @@ -33,6 +33,8 @@ class Value; class User; class Use; +template +struct simplify_type; // Use** is only 4-byte aligned. template<> From baldrick at free.fr Tue Jan 25 09:14:15 2011 From: baldrick at free.fr (Duncan Sands) Date: Tue, 25 Jan 2011 15:14:15 -0000 Subject: [llvm-commits] [llvm] r124188 - in /llvm/trunk: lib/Analysis/ValueTracking.cpp test/Transforms/InstSimplify/2011-01-18-Compare.ll Message-ID: <20110125151415.58DD82A6C12C@llvm.org> Author: baldrick Date: Tue Jan 25 09:14:15 2011 New Revision: 124188 URL: http://llvm.org/viewvc/llvm-project?rev=124188&view=rev Log: In which I discover that zero+zero is zero, d'oh! Modified: llvm/trunk/lib/Analysis/ValueTracking.cpp llvm/trunk/test/Transforms/InstSimplify/2011-01-18-Compare.ll Modified: llvm/trunk/lib/Analysis/ValueTracking.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ValueTracking.cpp?rev=124188&r1=124187&r2=124188&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ValueTracking.cpp (original) +++ llvm/trunk/lib/Analysis/ValueTracking.cpp Tue Jan 25 09:14:15 2011 @@ -740,10 +740,10 @@ ComputeSignBit(Y, YKnownNonNegative, YKnownNegative, TD, Depth); // If X and Y are both non-negative (as signed values) then their sum is not - // zero. + // zero unless both X and Y are zero. if (XKnownNonNegative && YKnownNonNegative) - return false; -// return true; + if (isKnownNonZero(X, TD, Depth) || isKnownNonZero(Y, TD, Depth)) + return true; // If X and Y are both negative (as signed values) then their sum is not // zero unless both X and Y equal INT_MIN. Modified: llvm/trunk/test/Transforms/InstSimplify/2011-01-18-Compare.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstSimplify/2011-01-18-Compare.ll?rev=124188&r1=124187&r2=124188&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstSimplify/2011-01-18-Compare.ll (original) +++ llvm/trunk/test/Transforms/InstSimplify/2011-01-18-Compare.ll Tue Jan 25 09:14:15 2011 @@ -61,11 +61,14 @@ } define i1 @add(i32 %x, i32 %y) { +; CHECK: @add %l = lshr i32 %x, 1 - %r = lshr i32 %y, 1 + %q = lshr i32 %y, 1 + %r = or i32 %q, 1 %s = add i32 %l, %r %c = icmp eq i32 %s, 0 ret i1 %c +; CHECK: ret i1 false } define i1 @add2(i8 %x, i8 %y) { @@ -78,6 +81,16 @@ ; CHECK: ret i1 false } +define i1 @add3(i8 %x, i8 %y) { +; CHECK: @add3 + %l = zext i8 %x to i32 + %r = zext i8 %y to i32 + %s = add i32 %l, %r + %c = icmp eq i32 %s, 0 + ret i1 %c +; CHECK: ret i1 %c +} + define i1 @addpowtwo(i32 %x, i32 %y) { ; CHECK: @addpowtwo %l = lshr i32 %x, 1 From greened at obbligato.org Tue Jan 25 09:30:55 2011 From: greened at obbligato.org (David A. Greene) Date: Tue, 25 Jan 2011 09:30:55 -0600 Subject: [llvm-commits] [llvm] r124145 - in /llvm/trunk/utils/TableGen: CodeGenDAGPatterns.cpp CodeGenDAGPatterns.h In-Reply-To: <6A83E17C-237C-4C87-810A-4A0AFEB82D00@apple.com> (Evan Cheng's message of "Mon, 24 Jan 2011 15:15:23 -0800") References: <20110124205318.E156D2A6C12C@llvm.org> <6A83E17C-237C-4C87-810A-4A0AFEB82D00@apple.com> Message-ID: Evan Cheng writes: > Hi David, > > What's your plan? Please elaborate. I'm about to add an INSERT_SUBVECTOR operation for SelectionDAGs. This, along with the existing EXTRACT_SUBVECTOR operation, will be matched to VINSERTF128/VEXTRACTF128, respectively. I tried writing various other patterns to match to those instructions but this is by far the cleanest way I could come up with. There was no type checking in TableGen for EXTRACT_SUBVECTOR, so this and following patches add it. It helped a lot to have TableGen catch type errors as I implemented patterns. The next commit will include default implementations for INSERT_SUBVECTOR/EXTRACT_SUBVECTOR by going through the stack, similar to what's done for BUILD_VECTOR. -Dave From greened at obbligato.org Tue Jan 25 10:16:32 2011 From: greened at obbligato.org (David Greene) Date: Tue, 25 Jan 2011 16:16:32 -0000 Subject: [llvm-commits] [llvm] r124191 - /llvm/trunk/include/llvm/Target/TargetSelectionDAG.td Message-ID: <20110125161632.CE5D62A6C12C@llvm.org> Author: greened Date: Tue Jan 25 10:16:32 2011 New Revision: 124191 URL: http://llvm.org/viewvc/llvm-project?rev=124191&view=rev Log: [AVX] Add TableGen classes for vector/subvector type constraints. This will be used to check patterns referencing a forthcoming INSERT_SUBVECTOR SDNode and will also be used to check EXTRACT_SUBVECTOR nodes. Modified: llvm/trunk/include/llvm/Target/TargetSelectionDAG.td Modified: llvm/trunk/include/llvm/Target/TargetSelectionDAG.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetSelectionDAG.td?rev=124191&r1=124190&r2=124191&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetSelectionDAG.td (original) +++ llvm/trunk/include/llvm/Target/TargetSelectionDAG.td Tue Jan 25 10:16:32 2011 @@ -61,6 +61,13 @@ int OtherOpNum = OtherOp; } +/// SDTCisSubVecOfVec - This indicates that ThisOp is a vector type +/// with length less that of OtherOp, which is a vector type. +class SDTCisSubVecOfVec + : SDTypeConstraint { + int OtherOpNum = OtherOp; +} + //===----------------------------------------------------------------------===// // Selection DAG Type Profile definitions. // @@ -183,6 +190,13 @@ SDTCisEltOfVec<2, 1>, SDTCisSameAs<0, 1>, SDTCisPtrTy<3> ]>; +def SDTSubVecExtract : SDTypeProfile<1, 1, [// subvector extract + SDTCisSubVecOfVec<0,1> +]>; +def SDTSubVecInsert : SDTypeProfile<1, 2, [ // subvector insert + SDTCisSubVecOfVec<2, 1>, SDTCisSameAs<0,1> +]>; + def SDTPrefetch : SDTypeProfile<0, 3, [ // prefetch SDTCisPtrTy<0>, SDTCisSameAs<1, 2>, SDTCisInt<1> ]>; From stuart at apple.com Tue Jan 25 10:32:44 2011 From: stuart at apple.com (Stuart Hastings) Date: Tue, 25 Jan 2011 16:32:44 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r124194 - in /llvm-gcc-4.2/trunk/gcc: config/mips/predicates.md dwarf2out.c gimplify.c simplify-rtx.c tree-vect-patterns.c tree.c Message-ID: <20110125163244.CDB8B2A6C12C@llvm.org> Author: stuart Date: Tue Jan 25 10:32:44 2011 New Revision: 124194 URL: http://llvm.org/viewvc/llvm-project?rev=124194&view=rev Log: Applying second patch for PR9031. Patch by Pedro Giffuni! Modified: llvm-gcc-4.2/trunk/gcc/config/mips/predicates.md llvm-gcc-4.2/trunk/gcc/dwarf2out.c llvm-gcc-4.2/trunk/gcc/gimplify.c llvm-gcc-4.2/trunk/gcc/simplify-rtx.c llvm-gcc-4.2/trunk/gcc/tree-vect-patterns.c llvm-gcc-4.2/trunk/gcc/tree.c Modified: llvm-gcc-4.2/trunk/gcc/config/mips/predicates.md URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/mips/predicates.md?rev=124194&r1=124193&r2=124194&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/mips/predicates.md (original) +++ llvm-gcc-4.2/trunk/gcc/config/mips/predicates.md Tue Jan 25 10:32:44 2011 @@ -116,7 +116,9 @@ /* If -mlong-calls, force all calls to use register addressing. Also, if this function has the long_call attribute, we must use register addressing. */ - return !TARGET_LONG_CALLS && !SYMBOL_REF_LONG_CALL_P (op); + return (!TARGET_LONG_CALLS + && !(GET_CODE (op) == SYMBOL_REF + && SYMBOL_REF_LONG_CALL_P (op))); case SYMBOL_GOT_GLOBAL: /* Without explicit relocs, there is no special syntax for Modified: llvm-gcc-4.2/trunk/gcc/dwarf2out.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/dwarf2out.c?rev=124194&r1=124193&r2=124194&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/dwarf2out.c (original) +++ llvm-gcc-4.2/trunk/gcc/dwarf2out.c Tue Jan 25 10:32:44 2011 @@ -14485,7 +14485,8 @@ was generated within the original definition of an inline function) we have to generate a special (abbreviated) DW_TAG_structure_type, DW_TAG_union_type, or DW_TAG_enumeration_type DIE here. */ - if (TYPE_DECL_IS_STUB (decl) && decl_ultimate_origin (decl) != NULL_TREE) + if (TYPE_DECL_IS_STUB (decl) && decl_ultimate_origin (decl) != NULL_TREE + && is_tagged_type (TREE_TYPE (decl))) { gen_tagged_type_instantiation_die (TREE_TYPE (decl), context_die); break; Modified: llvm-gcc-4.2/trunk/gcc/gimplify.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/gimplify.c?rev=124194&r1=124193&r2=124194&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/gimplify.c (original) +++ llvm-gcc-4.2/trunk/gcc/gimplify.c Tue Jan 25 10:32:44 2011 @@ -3583,8 +3583,16 @@ gcc_assert (TREE_CODE (*expr_p) == MODIFY_EXPR || TREE_CODE (*expr_p) == INIT_EXPR); - /* For zero sized types only gimplify the left hand side and right hand side - as statements and throw away the assignment. */ + /* See if any simplifications can be done based on what the RHS is. */ + ret = gimplify_modify_expr_rhs (expr_p, from_p, to_p, pre_p, post_p, + want_value); + if (ret != GS_UNHANDLED) + return ret; + + /* For zero sized types only gimplify the left hand side and right hand + side as statements and throw away the assignment. Do this after + gimplify_modify_expr_rhs so we handle TARGET_EXPRs of addressable + types properly. */ if (zero_sized_type (TREE_TYPE (*from_p))) { gimplify_stmt (from_p); @@ -3595,12 +3603,6 @@ return GS_ALL_DONE; } - /* See if any simplifications can be done based on what the RHS is. */ - ret = gimplify_modify_expr_rhs (expr_p, from_p, to_p, pre_p, post_p, - want_value); - if (ret != GS_UNHANDLED) - return ret; - /* If the value being copied is of variable width, compute the length of the copy into a WITH_SIZE_EXPR. Note that we need to do this before gimplifying any of the operands so that we can resolve any Modified: llvm-gcc-4.2/trunk/gcc/simplify-rtx.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/simplify-rtx.c?rev=124194&r1=124193&r2=124194&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/simplify-rtx.c (original) +++ llvm-gcc-4.2/trunk/gcc/simplify-rtx.c Tue Jan 25 10:32:44 2011 @@ -589,7 +589,8 @@ /* (neg (lt x 0)) is (ashiftrt X C) if STORE_FLAG_VALUE is 1. */ /* (neg (lt x 0)) is (lshiftrt X C) if STORE_FLAG_VALUE is -1. */ if (GET_CODE (op) == LT - && XEXP (op, 1) == const0_rtx) + && XEXP (op, 1) == const0_rtx + && SCALAR_INT_MODE_P (GET_MODE (XEXP (op, 0)))) { enum machine_mode inner = GET_MODE (XEXP (op, 0)); int isize = GET_MODE_BITSIZE (inner); Modified: llvm-gcc-4.2/trunk/gcc/tree-vect-patterns.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/tree-vect-patterns.c?rev=124194&r1=124193&r2=124194&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/tree-vect-patterns.c (original) +++ llvm-gcc-4.2/trunk/gcc/tree-vect-patterns.c Tue Jan 25 10:32:44 2011 @@ -499,8 +499,9 @@ || (icode = optab->handlers[(int) vec_mode].insn_code) == CODE_FOR_nothing || (type_out - && (insn_data[icode].operand[0].mode != - TYPE_MODE (get_vectype_for_scalar_type (type_out))))) + && (!get_vectype_for_scalar_type (type_out) + || (insn_data[icode].operand[0].mode != + TYPE_MODE (get_vectype_for_scalar_type (type_out)))))) return; } Modified: llvm-gcc-4.2/trunk/gcc/tree.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/tree.c?rev=124194&r1=124193&r2=124194&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/tree.c (original) +++ llvm-gcc-4.2/trunk/gcc/tree.c Tue Jan 25 10:32:44 2011 @@ -4636,7 +4636,8 @@ && (HOST_WIDE_INT) TREE_INT_CST_LOW (t) >= 0) || (! pos && TREE_INT_CST_HIGH (t) == -1 && (HOST_WIDE_INT) TREE_INT_CST_LOW (t) < 0 - && !TYPE_UNSIGNED (TREE_TYPE (t))) + && (!TYPE_UNSIGNED (TREE_TYPE (t)) + || TYPE_IS_SIZETYPE (TREE_TYPE (t)))) || (pos && TREE_INT_CST_HIGH (t) == 0))); } From dmalyshev at accesssoftek.com Tue Jan 25 10:58:03 2011 From: dmalyshev at accesssoftek.com (Danil Malyshev) Date: Tue, 25 Jan 2011 08:58:03 -0800 Subject: [llvm-commits] Quotation marks around command line arguments In-Reply-To: References: <6AE1604EE3EC5F4296C096518C6B77EE1747BF6C32@mail.accesssoftek.com> Message-ID: <6AE1604EE3EC5F4296C096518C6B77EE176EE56231@mail.accesssoftek.com> Hello Takumi, Thank you for your checks and review. Based in this http://msdn.microsoft.com/en-us/library/17w5ykft%28v=vs.85%29.aspx C/C++ programs for Windows have a startup code that parse command line string and prepare argc/argv for main(). And this code removes quotes from command line arguments. Unfortunately, I'm not found in gcc documentation about it, but I think it is works like Microsoft c/c++, because I run several tests for explore it. I'll be glad if someone could confirm this. Thank you, Danil From anton at korobeynikov.info Tue Jan 25 11:41:41 2011 From: anton at korobeynikov.info (Anton Korobeynikov) Date: Tue, 25 Jan 2011 20:41:41 +0300 Subject: [llvm-commits] First draft of ARM EHABI support In-Reply-To: <4D3EA2D5.80909@arm.com> References: <4D3EA2D5.80909@arm.com> Message-ID: > + ? ?enum ExceptionsType { None, DwarfTable, DwarfCFI, SjLj, ARM }; > Just a matter of preference, but can we call this EHABI rather than ARM? ;) Yes, I also thought about this. The problem is the following: do you know any other target which support EABI exceptions? Unwinding stuff looks pretty much ARM-specific. > But when using short and long ARM personalities, some relocations will > be needed in there... Well, maybe. As soon as there will be some example when this will matter. > I'd suggest to change the class name to Exception?, extract > SjLjException from it and make sure the action table construction and > other appropriate bits are actually shared among all implementations. Yes, right now DwarfException emits EH tables which are suitable for g++ personality function. So, probably we'll need to have generic "eh information emitter" which would know how to emit data for different personalities and unwinding mechanisms. As for factoring out sjlj - I'm not yet sure, too much duplication, etc. -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University From Renato.Golin at arm.com Tue Jan 25 11:58:34 2011 From: Renato.Golin at arm.com (Renato Golin) Date: Tue, 25 Jan 2011 17:58:34 +0000 Subject: [llvm-commits] First draft of ARM EHABI support In-Reply-To: References: <4D3EA2D5.80909@arm.com> Message-ID: <4D3F0F4A.80606@arm.com> On 01/25/11 17:41, Anton Korobeynikov wrote: >> + enum ExceptionsType { None, DwarfTable, DwarfCFI, SjLj, ARM }; >> Just a matter of preference, but can we call this EHABI rather than ARM? ;) > Yes, I also thought about this. The problem is the following: do you > know any other target which support EABI exceptions? It's more of a personal preference, really, not to use metonyms in code. ;) > As for factoring out sjlj - > I'm not yet sure, too much duplication, etc. Yes. The hierarchy would have to be deeper than two levels to avoid duplication. But that's not critical, certainly not now... cheers, --renato -- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. From dpatel at apple.com Tue Jan 25 12:09:33 2011 From: dpatel at apple.com (Devang Patel) Date: Tue, 25 Jan 2011 18:09:33 -0000 Subject: [llvm-commits] [llvm] r124202 - /llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp Message-ID: <20110125180933.61C4D2A6C12C@llvm.org> Author: dpatel Date: Tue Jan 25 12:09:33 2011 New Revision: 124202 URL: http://llvm.org/viewvc/llvm-project?rev=124202&view=rev Log: This assertion is too restrictive, it does not apply for dangling dbg value nodes (nodes where dbg.value intrinsic preceds use of the value). Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp?rev=124202&r1=124201&r2=124202&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp Tue Jan 25 12:09:33 2011 @@ -619,16 +619,8 @@ // Insert all SDDbgValue's whose order(s) are before "Order". if (!MI) continue; -#ifndef NDEBUG - unsigned LastDIOrder = 0; -#endif for (; DI != DE && (*DI)->getOrder() >= LastOrder && (*DI)->getOrder() < Order; ++DI) { -#ifndef NDEBUG - assert((*DI)->getOrder() >= LastDIOrder && - "SDDbgValue nodes must be in source order!"); - LastDIOrder = (*DI)->getOrder(); -#endif if ((*DI)->isInvalidated()) continue; MachineInstr *DbgMI = Emitter.EmitDbgValue(*DI, VRBaseMap); From dpatel at apple.com Tue Jan 25 12:09:58 2011 From: dpatel at apple.com (Devang Patel) Date: Tue, 25 Jan 2011 18:09:58 -0000 Subject: [llvm-commits] [llvm] r124203 - in /llvm/trunk: lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll Message-ID: <20110125180958.C6BE52A6C12C@llvm.org> Author: dpatel Date: Tue Jan 25 12:09:58 2011 New Revision: 124203 URL: http://llvm.org/viewvc/llvm-project?rev=124203&view=rev Log: Resolve DanglingDbgValue of PHI nodes where the use follows dbg.value intrinisic. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp llvm/trunk/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=124203&r1=124202&r2=124203&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Tue Jan 25 12:09:58 2011 @@ -929,7 +929,9 @@ unsigned InReg = It->second; RegsForValue RFV(*DAG.getContext(), TLI, InReg, V->getType()); SDValue Chain = DAG.getEntryNode(); - return N = RFV.getCopyFromRegs(DAG, FuncInfo, getCurDebugLoc(), Chain,NULL); + N = RFV.getCopyFromRegs(DAG, FuncInfo, getCurDebugLoc(), Chain,NULL); + resolveDanglingDebugInfo(V, N); + return N; } // Otherwise create a new SDValue and remember it. Modified: llvm/trunk/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll?rev=124203&r1=124202&r2=124203&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll (original) +++ llvm/trunk/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll Tue Jan 25 12:09:58 2011 @@ -1,5 +1,4 @@ ; RUN: llc < %s | FileCheck %s -; XFAIL: * target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" target triple = "x86_64-apple-darwin10.0.0" From stuart at apple.com Tue Jan 25 12:22:05 2011 From: stuart at apple.com (Stuart Hastings) Date: Tue, 25 Jan 2011 18:22:05 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r124205 - in /llvm-gcc-4.2/trunk/gcc: cgraphunit.c config.gcc config/elfos.h config/ia64/hpux.h config/ia64/ia64.c dwarf2out.c expr.c output.h toplev.c varasm.c Message-ID: <20110125182205.B5C392A6C12C@llvm.org> Author: stuart Date: Tue Jan 25 12:22:05 2011 New Revision: 124205 URL: http://llvm.org/viewvc/llvm-project?rev=124205&view=rev Log: Applying third patch for PR9031. Patch by Pedro Giffuni! Modified: llvm-gcc-4.2/trunk/gcc/cgraphunit.c llvm-gcc-4.2/trunk/gcc/config.gcc llvm-gcc-4.2/trunk/gcc/config/elfos.h llvm-gcc-4.2/trunk/gcc/config/ia64/hpux.h llvm-gcc-4.2/trunk/gcc/config/ia64/ia64.c llvm-gcc-4.2/trunk/gcc/dwarf2out.c llvm-gcc-4.2/trunk/gcc/expr.c llvm-gcc-4.2/trunk/gcc/output.h llvm-gcc-4.2/trunk/gcc/toplev.c llvm-gcc-4.2/trunk/gcc/varasm.c Modified: llvm-gcc-4.2/trunk/gcc/cgraphunit.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/cgraphunit.c?rev=124205&r1=124204&r2=124205&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/cgraphunit.c (original) +++ llvm-gcc-4.2/trunk/gcc/cgraphunit.c Tue Jan 25 12:22:05 2011 @@ -1632,8 +1632,6 @@ return; } - process_pending_assemble_externals (); - /* Frontend may output common variables after the unit has been finalized. It is safe to deal with them here as they are always zero initialized. */ cgraph_varpool_analyze_pending_decls (); Modified: llvm-gcc-4.2/trunk/gcc/config.gcc URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config.gcc?rev=124205&r1=124204&r2=124205&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config.gcc (original) +++ llvm-gcc-4.2/trunk/gcc/config.gcc Tue Jan 25 12:22:05 2011 @@ -485,6 +485,10 @@ tm_defines="${tm_defines} FBSD_MAJOR=8" ;; *-*-freebsd9 | *-*-freebsd[9].*) tm_defines="${tm_defines} FBSD_MAJOR=9" ;; + *-*-freebsd10 | *-*-freebsd10.*) + tm_defines="${tm_defines} FBSD_MAJOR=10" ;; + *-*-freebsd11 | *-*-freebsd11.*) + tm_defines="${tm_defines} FBSD_MAJOR=11" ;; *) echo 'Please update *-*-freebsd* in gcc/config.gcc' exit 1 Modified: llvm-gcc-4.2/trunk/gcc/config/elfos.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/elfos.h?rev=124205&r1=124204&r2=124205&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/elfos.h (original) +++ llvm-gcc-4.2/trunk/gcc/config/elfos.h Tue Jan 25 12:22:05 2011 @@ -496,3 +496,13 @@ fprintf ((FILE), "\"\n"); \ } \ while (0) + +/* A C statement (sans semicolon) to output to the stdio stream STREAM + any text necessary for declaring the name of an external symbol + named NAME whch is referenced in this compilation but not defined. + It is needed to properly support non-default visibility. */ + +#ifndef ASM_OUTPUT_EXTERNAL +#define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \ + default_elf_asm_output_external (FILE, DECL, NAME) +#endif Modified: llvm-gcc-4.2/trunk/gcc/config/ia64/hpux.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/ia64/hpux.h?rev=124205&r1=124204&r2=124205&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/ia64/hpux.h (original) +++ llvm-gcc-4.2/trunk/gcc/config/ia64/hpux.h Tue Jan 25 12:22:05 2011 @@ -144,10 +144,6 @@ definitions, so do not use them in gthr-posix.h. */ #define GTHREAD_USE_WEAK 0 -/* Put out the needed function declarations at the end. */ - -#define TARGET_ASM_FILE_END ia64_hpux_file_end - #undef CTORS_SECTION_ASM_OP #define CTORS_SECTION_ASM_OP "\t.section\t.init_array,\t\"aw\",\"init_array\"" Modified: llvm-gcc-4.2/trunk/gcc/config/ia64/ia64.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/ia64/ia64.c?rev=124205&r1=124204&r2=124205&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/ia64/ia64.c (original) +++ llvm-gcc-4.2/trunk/gcc/config/ia64/ia64.c Tue Jan 25 12:22:05 2011 @@ -250,10 +250,6 @@ static void ia64_output_dwarf_dtprel (FILE *, int, rtx) ATTRIBUTE_UNUSED; static unsigned int ia64_section_type_flags (tree, const char *, int); -static void ia64_hpux_add_extern_decl (tree decl) - ATTRIBUTE_UNUSED; -static void ia64_hpux_file_end (void) - ATTRIBUTE_UNUSED; static void ia64_init_libfuncs (void) ATTRIBUTE_UNUSED; static void ia64_hpux_init_libfuncs (void) @@ -5015,49 +5011,6 @@ } -/* Emit text to declare externally defined variables and functions, because - the Intel assembler does not support undefined externals. */ - -void -ia64_asm_output_external (FILE *file, tree decl, const char *name) -{ - int save_referenced; - - /* GNU as does not need anything here, but the HP linker does need - something for external functions. */ - - if (TARGET_GNU_AS - && (!TARGET_HPUX_LD - || TREE_CODE (decl) != FUNCTION_DECL - || strstr (name, "__builtin_") == name)) - return; - - /* ??? The Intel assembler creates a reference that needs to be satisfied by - the linker when we do this, so we need to be careful not to do this for - builtin functions which have no library equivalent. Unfortunately, we - can't tell here whether or not a function will actually be called by - expand_expr, so we pull in library functions even if we may not need - them later. */ - if (! strcmp (name, "__builtin_next_arg") - || ! strcmp (name, "alloca") - || ! strcmp (name, "__builtin_constant_p") - || ! strcmp (name, "__builtin_args_info")) - return; - - if (TARGET_HPUX_LD) - ia64_hpux_add_extern_decl (decl); - else - { - /* assemble_name will set TREE_SYMBOL_REFERENCED, so we must save and - restore it. */ - save_referenced = TREE_SYMBOL_REFERENCED (DECL_ASSEMBLER_NAME (decl)); - if (TREE_CODE (decl) == FUNCTION_DECL) - ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function"); - (*targetm.asm_out.globalize_label) (file, name); - TREE_SYMBOL_REFERENCED (DECL_ASSEMBLER_NAME (decl)) = save_referenced; - } -} - /* Parse the -mfixed-range= option string. */ static void @@ -9223,55 +9176,33 @@ return DEFAULT_FUNCTION_ARG_PADDING (mode, type); } -/* Linked list of all external functions that are to be emitted by GCC. - We output the name if and only if TREE_SYMBOL_REFERENCED is set in - order to avoid putting out names that are never really used. */ - -struct extern_func_list GTY(()) -{ - struct extern_func_list *next; - tree decl; -}; - -static GTY(()) struct extern_func_list *extern_func_head; - -static void -ia64_hpux_add_extern_decl (tree decl) -{ - struct extern_func_list *p = ggc_alloc (sizeof (struct extern_func_list)); - - p->decl = decl; - p->next = extern_func_head; - extern_func_head = p; -} - -/* Print out the list of used global functions. */ +/* Emit text to declare externally defined variables and functions, because + the Intel assembler does not support undefined externals. */ -static void -ia64_hpux_file_end (void) +void +ia64_asm_output_external (FILE *file, tree decl, const char *name) { - struct extern_func_list *p; - - for (p = extern_func_head; p; p = p->next) - { - tree decl = p->decl; - tree id = DECL_ASSEMBLER_NAME (decl); - - gcc_assert (id); - - if (!TREE_ASM_WRITTEN (decl) && TREE_SYMBOL_REFERENCED (id)) - { - const char *name = XSTR (XEXP (DECL_RTL (decl), 0), 0); - - TREE_ASM_WRITTEN (decl) = 1; - (*targetm.asm_out.globalize_label) (asm_out_file, name); - fputs (TYPE_ASM_OP, asm_out_file); - assemble_name (asm_out_file, name); - fprintf (asm_out_file, "," TYPE_OPERAND_FMT "\n", "function"); - } + /* We output the name if and only if TREE_SYMBOL_REFERENCED is + set in order to avoid putting out names that are never really + used. */ + if (TREE_SYMBOL_REFERENCED (DECL_ASSEMBLER_NAME (decl))) + { + /* maybe_assemble_visibility will return 1 if the assembler + visibility directive is outputed. */ + int need_visibility = ((*targetm.binds_local_p) (decl) + && maybe_assemble_visibility (decl)); + + /* GNU as does not need anything here, but the HP linker does + need something for external functions. */ + if ((TARGET_HPUX_LD || !TARGET_GNU_AS) + && TREE_CODE (decl) == FUNCTION_DECL) + { + ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function"); + (*targetm.asm_out.globalize_label) (file, name); + } + else if (need_visibility && !TARGET_GNU_AS) + (*targetm.asm_out.globalize_label) (file, name); } - - extern_func_head = 0; } /* Set SImode div/mod functions, init_integral_libfuncs only initializes Modified: llvm-gcc-4.2/trunk/gcc/dwarf2out.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/dwarf2out.c?rev=124205&r1=124204&r2=124205&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/dwarf2out.c (original) +++ llvm-gcc-4.2/trunk/gcc/dwarf2out.c Tue Jan 25 12:22:05 2011 @@ -10658,6 +10658,43 @@ else if (initializer_constant_valid_p (init, type) && ! walk_tree (&init, reference_to_unused, NULL, NULL)) { + /* Convert vector CONSTRUCTOR initializers to VECTOR_CST if + possible. */ + if (TREE_CODE (type) == VECTOR_TYPE) + switch (TREE_CODE (init)) + { + case VECTOR_CST: + break; + case CONSTRUCTOR: + if (TREE_CONSTANT (init)) + { + VEC(constructor_elt,gc) *elts = CONSTRUCTOR_ELTS (init); + bool constant_p = true; + tree value; + unsigned HOST_WIDE_INT ix; + + /* Even when ctor is constant, it might contain non-*_CST + elements (e.g. { 1.0/0.0 - 1.0/0.0, 0.0 }) and those don't + belong into VECTOR_CST nodes. */ + FOR_EACH_CONSTRUCTOR_VALUE (elts, ix, value) + if (!CONSTANT_CLASS_P (value)) + { + constant_p = false; + break; + } + + if (constant_p) + { + init = build_vector_from_ctor (type, elts); + break; + } + } + /* FALLTHRU */ + + default: + return NULL; + } + rtl = expand_expr (init, NULL_RTX, VOIDmode, EXPAND_INITIALIZER); /* If expand_expr returns a MEM, it wasn't immediate. */ Modified: llvm-gcc-4.2/trunk/gcc/expr.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/expr.c?rev=124205&r1=124204&r2=124205&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/expr.c (original) +++ llvm-gcc-4.2/trunk/gcc/expr.c Tue Jan 25 12:22:05 2011 @@ -5709,7 +5709,6 @@ enum machine_mode mode = VOIDmode; tree offset = size_zero_node; tree bit_offset = bitsize_zero_node; - tree tem; /* First get the mode, signedness, and size. We do this from just the outermost expression. */ @@ -5745,6 +5744,8 @@ *pbitsize = tree_low_cst (size_tree, 1); } + *pmode = mode; + /* Compute cumulative bit-offset for nested component-refs and array-refs, and find the ultimate containing object. */ while (1) @@ -5844,18 +5845,25 @@ done: /* If OFFSET is constant, see if we can return the whole thing as a - constant bit position. Otherwise, split it up. */ - if (host_integerp (offset, 0) - && 0 != (tem = size_binop (MULT_EXPR, - fold_convert (bitsizetype, offset), - bitsize_unit_node)) - && 0 != (tem = size_binop (PLUS_EXPR, tem, bit_offset)) - && host_integerp (tem, 0)) - *pbitpos = tree_low_cst (tem, 0), *poffset = 0; - else - *pbitpos = tree_low_cst (bit_offset, 0), *poffset = offset; + constant bit position. Make sure to handle overflow during + this conversion. */ + if (host_integerp (offset, 0)) + { + double_int tem = double_int_mul (tree_to_double_int (offset), + uhwi_to_double_int (BITS_PER_UNIT)); + tem = double_int_add (tem, tree_to_double_int (bit_offset)); + if (double_int_fits_in_shwi_p (tem)) + { + *pbitpos = double_int_to_shwi (tem); + *poffset = NULL_TREE; + return exp; + } + } + + /* Otherwise, split it up. */ + *pbitpos = tree_low_cst (bit_offset, 0); + *poffset = offset; - *pmode = mode; return exp; } Modified: llvm-gcc-4.2/trunk/gcc/output.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/output.h?rev=124205&r1=124204&r2=124205&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/output.h (original) +++ llvm-gcc-4.2/trunk/gcc/output.h Tue Jan 25 12:22:05 2011 @@ -200,9 +200,9 @@ DONT_OUTPUT_DATA is from assemble_variable. */ extern void align_variable (tree decl, bool dont_output_data); -/* Output something to declare an external symbol to the assembler. - (Most assemblers don't need this, so we normally output nothing.) - Do nothing if DECL is not external. */ +/* Queue for outputing something to declare an external symbol to the + assembler. (Most assemblers don't need this, so we normally output + nothing.) Do nothing if DECL is not external. */ extern void assemble_external (tree); /* Assemble code to leave SIZE bytes of zeros. */ @@ -607,6 +607,10 @@ extern void file_end_indicate_exec_stack (void); extern bool default_valid_pointer_mode (enum machine_mode); +extern void default_elf_asm_output_external (FILE *file, tree, + const char *); +extern int maybe_assemble_visibility (tree); + extern int default_address_cost (rtx); /* dbxout helper functions */ Modified: llvm-gcc-4.2/trunk/gcc/toplev.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/toplev.c?rev=124205&r1=124204&r2=124205&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/toplev.c (original) +++ llvm-gcc-4.2/trunk/gcc/toplev.c Tue Jan 25 12:22:05 2011 @@ -1168,9 +1168,7 @@ dw2_output_indirect_constants (); - /* Flush any pending external directives. cgraph did this for - assemble_external calls from the front end, but the RTL - expander can also generate them. */ + /* Flush any pending external directives. */ process_pending_assemble_externals (); /* Attach a special .ident directive to the end of the file to identify Modified: llvm-gcc-4.2/trunk/gcc/varasm.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/varasm.c?rev=124205&r1=124204&r2=124205&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/varasm.c (original) +++ llvm-gcc-4.2/trunk/gcc/varasm.c Tue Jan 25 12:22:05 2011 @@ -131,7 +131,6 @@ static unsigned min_align (unsigned, unsigned); static void output_constructor (tree, unsigned HOST_WIDE_INT, unsigned int); static void globalize_decl (tree); -static void maybe_assemble_visibility (tree); #ifdef BSS_SECTION_ASM_OP #ifdef ASM_OUTPUT_BSS static void asm_output_bss (FILE *, tree, const char *, @@ -2102,11 +2101,10 @@ if (!DECL_P (decl) || !DECL_EXTERNAL (decl) || !TREE_PUBLIC (decl)) return; - if (flag_unit_at_a_time) - pending_assemble_externals = tree_cons (0, decl, - pending_assemble_externals); - else - assemble_external_real (decl); + /* We want to output external symbols at very last to check if they + are references or not. */ + pending_assemble_externals = tree_cons (0, decl, + pending_assemble_externals); #endif } @@ -5373,13 +5371,18 @@ /* A helper function to call assemble_visibility when needed for a decl. */ -static void +int maybe_assemble_visibility (tree decl) { enum symbol_visibility vis = DECL_VISIBILITY (decl); if (vis != VISIBILITY_DEFAULT) - targetm.asm_out.visibility (decl, vis); + { + targetm.asm_out.visibility (decl, vis); + return 1; + } + else + return 0; } /* Returns 1 if the target configuration supports defining public symbols @@ -6556,4 +6559,19 @@ /* LLVM LOCAL end */ } +/* Emit text to declare externally defined symbols. It is needed to + properly support non-default visibility. */ +void +default_elf_asm_output_external (FILE *file ATTRIBUTE_UNUSED, + tree decl, + const char *name ATTRIBUTE_UNUSED) +{ + /* We output the name if and only if TREE_SYMBOL_REFERENCED is + set in order to avoid putting out names that are never really + used. */ + if (TREE_SYMBOL_REFERENCED (DECL_ASSEMBLER_NAME (decl)) + && targetm.binds_local_p (decl)) + maybe_assemble_visibility (decl); +} + #include "gt-varasm.h" From dmalyshev at accesssoftek.com Tue Jan 25 12:53:22 2011 From: dmalyshev at accesssoftek.com (Danil Malyshev) Date: Tue, 25 Jan 2011 10:53:22 -0800 Subject: [llvm-commits] Test check_binary_output.ll Message-ID: <6AE1604EE3EC5F4296C096518C6B77EE176EE56263@mail.accesssoftek.com> Hello Daniel, Is this is your build: http://google1.osuosl.org:8011/builders/llvm-i686-linux/builds/155 ? I'm exploring, why the test check_binary_output.ll failed. Unfortunately, on my MinGW and Ubuntu 10.10 this test goes well for ToT and for revision 121106. So, could you give me more information about your test system? OS version, GCC and libraries versions, LLVM configure settings. Thank you, Danil From nlewycky at google.com Tue Jan 25 12:52:27 2011 From: nlewycky at google.com (Nick Lewycky) Date: Tue, 25 Jan 2011 10:52:27 -0800 Subject: [llvm-commits] [llvm] r124183 - in /llvm/trunk: include/llvm/Analysis/ValueTracking.h lib/Analysis/InstructionSimplify.cpp lib/Analysis/ValueTracking.cpp test/Transforms/InstSimplify/2011-01-18-Compare.ll In-Reply-To: <20110125093829.A8AA92A6C12C@llvm.org> References: <20110125093829.A8AA92A6C12C@llvm.org> Message-ID: On 25 January 2011 01:38, Duncan Sands wrote: > Author: baldrick > Date: Tue Jan 25 03:38:29 2011 > New Revision: 124183 > > URL: http://llvm.org/viewvc/llvm-project?rev=124183&view=rev > Log: > According to my auto-simplifier the most common missed simplifications in > optimized code are: > (non-negative number)+(power-of-two) != 0 -> true > i1 1 (non-negative number) + i1 1 (power-of-two) != 0 -> false. You probably don't see this because we transform i1 add to xor very early on, but please make sure we don't get it wrong when someone does create it. and > (x | 1) != 0 -> true > Instcombine knows about the second one of course, but only does it if X|1 > has only one use. These fire thousands of times in the testsuite. > > Modified: > llvm/trunk/include/llvm/Analysis/ValueTracking.h > llvm/trunk/lib/Analysis/InstructionSimplify.cpp > llvm/trunk/lib/Analysis/ValueTracking.cpp > llvm/trunk/test/Transforms/InstSimplify/2011-01-18-Compare.ll > > Modified: llvm/trunk/include/llvm/Analysis/ValueTracking.h > URL: > http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/ValueTracking.h?rev=124183&r1=124182&r2=124183&view=diff > > ============================================================================== > --- llvm/trunk/include/llvm/Analysis/ValueTracking.h (original) > +++ llvm/trunk/include/llvm/Analysis/ValueTracking.h Tue Jan 25 03:38:29 > 2011 > @@ -39,6 +39,23 @@ > APInt &KnownOne, const TargetData *TD = 0, > unsigned Depth = 0); > > + /// ComputeSignBit - Determine whether the sign bit is known to be zero > or > + /// one. Convenience wrapper around ComputeMaskedBits. > + void ComputeSignBit(Value *V, bool &KnownZero, bool &KnownOne, > + const TargetData *TD = 0, unsigned Depth = 0); > + > + /// isPowerOfTwo - Return true if the given value is known to have > exactly one > + /// bit set when defined. For vectors return true if every element is > known to > + /// be a power of two when defined. Supports values with integer or > pointer > + /// type and vectors of integers. > + bool isPowerOfTwo(Value *V, const TargetData *TD = 0, unsigned Depth = > 0); > + > + /// isKnownNonZero - Return true if the given value is known to be > non-zero > + /// when defined. For vectors return true if every element is known to > be > + /// non-zero when defined. Supports values with integer or pointer type > and > + /// vectors of integers. > + bool isKnownNonZero(Value *V, const TargetData *TD = 0, unsigned Depth = > 0); > + > /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. > We use > /// this predicate to simplify operations downstream. Mask is known to > be > /// zero for bits that V cannot have. > > Modified: llvm/trunk/lib/Analysis/InstructionSimplify.cpp > URL: > http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/InstructionSimplify.cpp?rev=124183&r1=124182&r2=124183&view=diff > > ============================================================================== > --- llvm/trunk/lib/Analysis/InstructionSimplify.cpp (original) > +++ llvm/trunk/lib/Analysis/InstructionSimplify.cpp Tue Jan 25 03:38:29 > 2011 > @@ -22,6 +22,7 @@ > #include "llvm/Analysis/InstructionSimplify.h" > #include "llvm/Analysis/ConstantFolding.h" > #include "llvm/Analysis/Dominators.h" > +#include "llvm/Analysis/ValueTracking.h" > #include "llvm/Support/PatternMatch.h" > #include "llvm/Support/ValueHandle.h" > #include "llvm/Target/TargetData.h" > @@ -1153,7 +1154,69 @@ > } > } > > - // See if we are doing a comparison with a constant. > + // icmp , - Different stack variables > have > + // different addresses, and what's more the address of a stack variable > is > + // never null or equal to the address of a global. Note that > generalizing > + // to the case where LHS is a global variable address or null is > pointless, > + // since if both LHS and RHS are constants then we already constant > folded > + // the compare, and if only one of them is then we moved it to RHS > already. > + if (isa(LHS) && (isa(RHS) || > isa(RHS) || > + isa(RHS))) > + // We already know that LHS != LHS. > + return ConstantInt::get(ITy, CmpInst::isFalseWhenEqual(Pred)); > + > + // If we are comparing with zero then try hard since this is a common > case. > + if (match(RHS, m_Zero())) { > + bool LHSKnownNonNegative, LHSKnownNegative; > + switch (Pred) { > + default: > + assert(false && "Unknown ICmp predicate!"); > + case ICmpInst::ICMP_ULT: > + return ConstantInt::getFalse(LHS->getContext()); > + case ICmpInst::ICMP_UGE: > + return ConstantInt::getTrue(LHS->getContext()); > + case ICmpInst::ICMP_EQ: > + case ICmpInst::ICMP_ULE: > + if (isKnownNonZero(LHS, TD)) > + return ConstantInt::getFalse(LHS->getContext()); > + break; > + case ICmpInst::ICMP_NE: > + case ICmpInst::ICMP_UGT: > + if (isKnownNonZero(LHS, TD)) > + return ConstantInt::getTrue(LHS->getContext()); > + break; > + case ICmpInst::ICMP_SLT: > + ComputeSignBit(LHS, LHSKnownNonNegative, LHSKnownNegative, TD); > + if (LHSKnownNegative) > + return ConstantInt::getTrue(LHS->getContext()); > + if (LHSKnownNonNegative) > + return ConstantInt::getFalse(LHS->getContext()); > + break; > + case ICmpInst::ICMP_SLE: > + ComputeSignBit(LHS, LHSKnownNonNegative, LHSKnownNegative, TD); > + if (LHSKnownNegative) > + return ConstantInt::getTrue(LHS->getContext()); > + if (LHSKnownNonNegative && isKnownNonZero(LHS, TD)) > + return ConstantInt::getFalse(LHS->getContext()); > + break; > + case ICmpInst::ICMP_SGE: > + ComputeSignBit(LHS, LHSKnownNonNegative, LHSKnownNegative, TD); > + if (LHSKnownNegative) > + return ConstantInt::getFalse(LHS->getContext()); > + if (LHSKnownNonNegative) > + return ConstantInt::getTrue(LHS->getContext()); > + break; > + case ICmpInst::ICMP_SGT: > + ComputeSignBit(LHS, LHSKnownNonNegative, LHSKnownNegative, TD); > + if (LHSKnownNegative) > + return ConstantInt::getFalse(LHS->getContext()); > + if (LHSKnownNonNegative && isKnownNonZero(LHS, TD)) > + return ConstantInt::getTrue(LHS->getContext()); > + break; > + } > + } > + > + // See if we are doing a comparison with a constant integer. > if (ConstantInt *CI = dyn_cast(RHS)) { > switch (Pred) { > default: break; > @@ -1192,17 +1255,6 @@ > } > } > > - // icmp , - Different stack variables > have > - // different addresses, and what's more the address of a stack variable > is > - // never null or equal to the address of a global. Note that > generalizing > - // to the case where LHS is a global variable address or null is > pointless, > - // since if both LHS and RHS are constants then we already constant > folded > - // the compare, and if only one of them is then we moved it to RHS > already. > - if (isa(LHS) && (isa(RHS) || > isa(RHS) || > - isa(RHS))) > - // We already know that LHS != LHS. > - return ConstantInt::get(ITy, CmpInst::isFalseWhenEqual(Pred)); > - > // Compare of cast, for example (zext X) != 0 -> X != 0 > if (isa(LHS) && (isa(RHS) || isa(RHS))) { > Instruction *LI = cast(LHS); > > Modified: llvm/trunk/lib/Analysis/ValueTracking.cpp > URL: > http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ValueTracking.cpp?rev=124183&r1=124182&r2=124183&view=diff > > ============================================================================== > --- llvm/trunk/lib/Analysis/ValueTracking.cpp (original) > +++ llvm/trunk/lib/Analysis/ValueTracking.cpp Tue Jan 25 03:38:29 2011 > @@ -24,9 +24,22 @@ > #include "llvm/Target/TargetData.h" > #include "llvm/Support/GetElementPtrTypeIterator.h" > #include "llvm/Support/MathExtras.h" > +#include "llvm/Support/PatternMatch.h" > #include "llvm/ADT/SmallPtrSet.h" > #include > using namespace llvm; > +using namespace llvm::PatternMatch; > + > +const unsigned MaxDepth = 6; > + > +/// getBitWidth - Returns the bitwidth of the given scalar or pointer type > (if > +/// unknown returns 0). For vector types, returns the element type's > bitwidth. > +static unsigned getBitWidth(const Type *Ty, const TargetData *TD) { > + if (unsigned BitWidth = Ty->getScalarSizeInBits()) > + return BitWidth; > + assert(isa(Ty) && "Expected a pointer type!"); > + return TD ? TD->getPointerSizeInBits() : 0; > +} > > /// ComputeMaskedBits - Determine which of the bits specified in Mask are > /// known to be either zero or one and return them in the > KnownZero/KnownOne > @@ -47,7 +60,6 @@ > void llvm::ComputeMaskedBits(Value *V, const APInt &Mask, > APInt &KnownZero, APInt &KnownOne, > const TargetData *TD, unsigned Depth) { > - const unsigned MaxDepth = 6; > assert(V && "No Value?"); > assert(Depth <= MaxDepth && "Limit Search Depth"); > unsigned BitWidth = Mask.getBitWidth(); > @@ -620,6 +632,157 @@ > } > } > > +/// ComputeSignBit - Determine whether the sign bit is known to be zero or > +/// one. Convenience wrapper around ComputeMaskedBits. > +void llvm::ComputeSignBit(Value *V, bool &KnownZero, bool &KnownOne, > + const TargetData *TD, unsigned Depth) { > + unsigned BitWidth = getBitWidth(V->getType(), TD); > + if (!BitWidth) { > + KnownZero = false; > + KnownOne = false; > + return; > + } > + APInt ZeroBits(BitWidth, 0); > + APInt OneBits(BitWidth, 0); > + ComputeMaskedBits(V, APInt::getSignBit(BitWidth), ZeroBits, OneBits, TD, > + Depth); > + KnownOne = OneBits[BitWidth - 1]; > + KnownZero = ZeroBits[BitWidth - 1]; > +} > + > +/// isPowerOfTwo - Return true if the given value is known to have exactly > one > +/// bit set when defined. For vectors return true if every element is > known to > +/// be a power of two when defined. Supports values with integer or > pointer > +/// types and vectors of integers. > +bool llvm::isPowerOfTwo(Value *V, const TargetData *TD, unsigned Depth) { > + if (ConstantInt *CI = dyn_cast(V)) > + return CI->getValue().countPopulation() == 1; > + // TODO: Handle vector constants. > + > + // 1 << X is clearly a power of two if the one is not shifted off the > end. If > + // it is shifted off the end then the result is undefined. > + if (match(V, m_Shl(m_One(), m_Value()))) > + return true; > + > + // (signbit) >>l X is clearly a power of two if the one is not shifted > off the > + // bottom. If it is shifted off the bottom then the result is > undefined. > + ConstantInt *CI; > + if (match(V, m_LShr(m_ConstantInt(CI), m_Value())) && > + CI->getValue().isSignBit()) > + return true; > + > + // The remaining tests are all recursive, so bail out if we hit the > limit. > + if (Depth++ == MaxDepth) > + return false; > + > + if (ZExtInst *ZI = dyn_cast(V)) > + return isPowerOfTwo(ZI->getOperand(0), TD, Depth); > + > + if (SelectInst *SI = dyn_cast(V)) > + return isPowerOfTwo(SI->getTrueValue(), TD, Depth) && > + isPowerOfTwo(SI->getFalseValue(), TD, Depth); > + > + return false; > +} > + > +/// isKnownNonZero - Return true if the given value is known to be > non-zero > +/// when defined. For vectors return true if every element is known to be > +/// non-zero when defined. Supports values with integer or pointer type > and > +/// vectors of integers. > +bool llvm::isKnownNonZero(Value *V, const TargetData *TD, unsigned Depth) > { > + if (Constant *C = dyn_cast(V)) { > + if (C->isNullValue()) > + return false; > + if (isa(C)) > + // Must be non-zero due to null test above. > + return true; > + // TODO: Handle vectors > + return false; > + } > + > + // The remaining tests are all recursive, so bail out if we hit the > limit. > + if (Depth++ == MaxDepth) > + return false; > + > + unsigned BitWidth = getBitWidth(V->getType(), TD); > + > + // X | Y != 0 if X != 0 or Y != 0. > + Value *X = 0, *Y = 0; > + if (match(V, m_Or(m_Value(X), m_Value(Y)))) > + return isKnownNonZero(X, TD, Depth) || isKnownNonZero(Y, TD, Depth); > + > + // ext X != 0 if X != 0. > + if (isa(V) || isa(V)) > + return isKnownNonZero(cast(V)->getOperand(0), TD, Depth); > + > + // shl X, A != 0 if X is odd. Note that the value of the shift is > undefined > + // if the lowest bit is shifted off the end. > This is also true when A < BitWidth-CountTrailingZeros(X), but sadly we don't have ctz function in value tracking yet. + if (BitWidth && match(V, m_Shl(m_Value(X), m_Value(Y)))) { > + APInt KnownZero(BitWidth, 0); > + APInt KnownOne(BitWidth, 0); > + ComputeMaskedBits(V, APInt(BitWidth, 1), KnownZero, KnownOne, TD, > Depth); > + if (KnownOne[0]) > + return true; > + } > + // shr X, A != 0 if X is negative. Note that the value of the shift is > not > + // defined if the sign bit is shifted off the end. > As above, this is true when A < BitWidth-ComputeNumSignBits() and X is negative, except that this time we do have a ComputeNumSignBits function. > + else if (match(V, m_Shr(m_Value(X), m_Value(Y)))) { > + bool XKnownNonNegative, XKnownNegative; > + ComputeSignBit(X, XKnownNonNegative, XKnownNegative, TD, Depth); > + if (XKnownNegative) > + return true; > + } > + // X + Y. > + else if (match(V, m_Add(m_Value(X), m_Value(Y)))) { > This could handle subtraction too without much difficulty right? > + bool XKnownNonNegative, XKnownNegative; > + bool YKnownNonNegative, YKnownNegative; > + ComputeSignBit(X, XKnownNonNegative, XKnownNegative, TD, Depth); > + ComputeSignBit(Y, YKnownNonNegative, YKnownNegative, TD, Depth); > + > + // If X and Y are both non-negative (as signed values) then their sum > is not > + // zero. > + if (XKnownNonNegative && YKnownNonNegative) > + return true; > + > + // If X and Y are both negative (as signed values) then their sum is > not > + // zero unless both X and Y equal INT_MIN. > + if (BitWidth && XKnownNegative && YKnownNegative) { > + APInt KnownZero(BitWidth, 0); > + APInt KnownOne(BitWidth, 0); > + APInt Mask = APInt::getSignedMaxValue(BitWidth); > + // The sign bit of X is set. If some other bit is set then X is not > equal > + // to INT_MIN. > + ComputeMaskedBits(X, Mask, KnownZero, KnownOne, TD, Depth); > + if ((KnownOne & Mask) != 0) > + return true; > + // The sign bit of Y is set. If some other bit is set then Y is not > equal > + // to INT_MIN. > + ComputeMaskedBits(Y, Mask, KnownZero, KnownOne, TD, Depth); > + if ((KnownOne & Mask) != 0) > + return true; > + } > + > + // The sum of a non-negative number and a power of two is not zero. > + if (XKnownNonNegative && isPowerOfTwo(Y, TD, Depth)) > + return true; > + if (YKnownNonNegative && isPowerOfTwo(X, TD, Depth)) > + return true; > + } > + // (C ? X : Y) != 0 if X != 0 and Y != 0. > + else if (SelectInst *SI = dyn_cast(V)) { > + if (isKnownNonZero(SI->getTrueValue(), TD, Depth) && > + isKnownNonZero(SI->getFalseValue(), TD, Depth)) > + return true; > + } > Since this function claims to support pointers, how about inttoptr (recurse), ptrtoint (recurse), gep (non-zero when any argument is non-zero, which is most of the time) and non-weak globals? Nick + > + if (!BitWidth) return false; > + APInt KnownZero(BitWidth, 0); > + APInt KnownOne(BitWidth, 0); > + ComputeMaskedBits(V, APInt::getAllOnesValue(BitWidth), KnownZero, > KnownOne, > + TD, Depth); > + return KnownOne != 0; > +} > + > /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We > use > /// this predicate to simplify operations downstream. Mask is known to be > zero > /// for bits that V cannot have. > > Modified: llvm/trunk/test/Transforms/InstSimplify/2011-01-18-Compare.ll > URL: > http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstSimplify/2011-01-18-Compare.ll?rev=124183&r1=124182&r2=124183&view=diff > > ============================================================================== > --- llvm/trunk/test/Transforms/InstSimplify/2011-01-18-Compare.ll > (original) > +++ llvm/trunk/test/Transforms/InstSimplify/2011-01-18-Compare.ll Tue Jan > 25 03:38:29 2011 > @@ -27,6 +27,14 @@ > ; CHECK: ret i1 %x > } > > +define i1 @zext3() { > +; CHECK: @zext3 > + %e = zext i1 1 to i32 > + %c = icmp ne i32 %e, 0 > + ret i1 %c > +; CHECK: ret i1 true > +} > + > define i1 @sext(i32 %x) { > ; CHECK: @sext > %e1 = sext i32 %x to i64 > @@ -43,3 +51,49 @@ > ret i1 %c > ; CHECK: ret i1 %x > } > + > +define i1 @sext3() { > +; CHECK: @sext3 > + %e = sext i1 1 to i32 > + %c = icmp ne i32 %e, 0 > + ret i1 %c > +; CHECK: ret i1 true > +} > + > +define i1 @add(i32 %x, i32 %y) { > +; CHECK: @add > + %l = lshr i32 %x, 1 > + %r = lshr i32 %y, 1 > + %s = add i32 %l, %r > + %c = icmp eq i32 %s, 0 > + ret i1 %c > +; CHECK: ret i1 false > +} > + > +define i1 @add2(i8 %x, i8 %y) { > +; CHECK: @add2 > + %l = or i8 %x, 128 > + %r = or i8 %y, 129 > + %s = add i8 %l, %r > + %c = icmp eq i8 %s, 0 > + ret i1 %c > +; CHECK: ret i1 false > +} > + > +define i1 @addpowtwo(i32 %x, i32 %y) { > +; CHECK: @addpowtwo > + %l = lshr i32 %x, 1 > + %r = shl i32 1, %y > + %s = add i32 %l, %r > + %c = icmp eq i32 %s, 0 > + ret i1 %c > +; CHECK: ret i1 false > +} > + > +define i1 @or(i32 %x) { > +; CHECK: @or > + %o = or i32 %x, 1 > + %c = icmp eq i32 %o, 0 > + ret i1 %c > +; CHECK: ret i1 false > +} > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110125/d90ce61f/attachment.html From baldrick at free.fr Tue Jan 25 13:06:24 2011 From: baldrick at free.fr (Duncan Sands) Date: Tue, 25 Jan 2011 20:06:24 +0100 Subject: [llvm-commits] [llvm] r124183 - in /llvm/trunk: include/llvm/Analysis/ValueTracking.h lib/Analysis/InstructionSimplify.cpp lib/Analysis/ValueTracking.cpp test/Transforms/InstSimplify/2011-01-18-Compare.ll In-Reply-To: References: <20110125093829.A8AA92A6C12C@llvm.org> Message-ID: <4D3F1F30.3080200@free.fr> Hi Nick, > i1 1 (non-negative number) + i1 1 (power-of-two) != 0 -> false. You probably > don't see this because we transform i1 add to xor very early on, but please make > sure we don't get it wrong when someone does create it. i1 1 is a negative number. Ciao, Duncan. From nlewycky at google.com Tue Jan 25 13:08:25 2011 From: nlewycky at google.com (Nick Lewycky) Date: Tue, 25 Jan 2011 11:08:25 -0800 Subject: [llvm-commits] [llvm] r124183 - in /llvm/trunk: include/llvm/Analysis/ValueTracking.h lib/Analysis/InstructionSimplify.cpp lib/Analysis/ValueTracking.cpp test/Transforms/InstSimplify/2011-01-18-Compare.ll In-Reply-To: <4D3F1F30.3080200@free.fr> References: <20110125093829.A8AA92A6C12C@llvm.org> <4D3F1F30.3080200@free.fr> Message-ID: On 25 January 2011 11:06, Duncan Sands wrote: > Hi Nick, > > > i1 1 (non-negative number) + i1 1 (power-of-two) != 0 -> false. You >> probably >> don't see this because we transform i1 add to xor very early on, but >> please make >> sure we don't get it wrong when someone does create it. >> > > i1 1 is a negative number. > Oh right! Thanks. Nick -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110125/491483ea/attachment.html From rafael.espindola at gmail.com Tue Jan 25 13:09:57 2011 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Tue, 25 Jan 2011 19:09:57 -0000 Subject: [llvm-commits] [llvm] r124209 - in /llvm/trunk: lib/AsmParser/LLParser.cpp lib/VMCore/AsmWriter.cpp test/Assembler/unnamed-addr.ll Message-ID: <20110125190957.260502A6C12C@llvm.org> Author: rafael Date: Tue Jan 25 13:09:56 2011 New Revision: 124209 URL: http://llvm.org/viewvc/llvm-project?rev=124209&view=rev Log: Move unnamed_addr after the function arguments on Sabre's request. Modified: llvm/trunk/lib/AsmParser/LLParser.cpp llvm/trunk/lib/VMCore/AsmWriter.cpp llvm/trunk/test/Assembler/unnamed-addr.ll Modified: llvm/trunk/lib/AsmParser/LLParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/LLParser.cpp?rev=124209&r1=124208&r2=124209&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/LLParser.cpp (original) +++ llvm/trunk/lib/AsmParser/LLParser.cpp Tue Jan 25 13:09:56 2011 @@ -2670,8 +2670,6 @@ unsigned Linkage; unsigned Visibility, RetAttrs; - bool UnnamedAddr; - LocTy UnnamedAddrLoc; CallingConv::ID CC; PATypeHolder RetType(Type::getVoidTy(Context)); LocTy RetTypeLoc = Lex.getLoc(); @@ -2679,8 +2677,6 @@ ParseOptionalVisibility(Visibility) || ParseOptionalCallingConv(CC) || ParseOptionalAttrs(RetAttrs, 1) || - ParseOptionalToken(lltok::kw_unnamed_addr, UnnamedAddr, - &UnnamedAddrLoc) || ParseType(RetType, RetTypeLoc, true /*void allowed*/)) return true; @@ -2742,8 +2738,12 @@ std::string Section; unsigned Alignment; std::string GC; + bool UnnamedAddr; + LocTy UnnamedAddrLoc; if (ParseArgumentList(ArgList, isVarArg, false) || + ParseOptionalToken(lltok::kw_unnamed_addr, UnnamedAddr, + &UnnamedAddrLoc) || ParseOptionalAttrs(FuncAttrs, 2) || (EatIfPresent(lltok::kw_section) && ParseStringConstant(Section)) || Modified: llvm/trunk/lib/VMCore/AsmWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/AsmWriter.cpp?rev=124209&r1=124208&r2=124209&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/AsmWriter.cpp (original) +++ llvm/trunk/lib/VMCore/AsmWriter.cpp Tue Jan 25 13:09:56 2011 @@ -1590,8 +1590,6 @@ Attributes RetAttrs = Attrs.getRetAttributes(); if (RetAttrs != Attribute::None) Out << Attribute::getAsString(Attrs.getRetAttributes()) << ' '; - if (F->hasUnnamedAddr()) - Out << "unnamed_addr "; TypePrinter.print(F->getReturnType(), Out); Out << ' '; WriteAsOperandInternal(Out, F, &TypePrinter, &Machine, F->getParent()); @@ -1631,6 +1629,8 @@ Out << "..."; // Output varargs portion of signature! } Out << ')'; + if (F->hasUnnamedAddr()) + Out << " unnamed_addr"; Attributes FnAttrs = Attrs.getFnAttributes(); if (FnAttrs != Attribute::None) Out << ' ' << Attribute::getAsString(Attrs.getFnAttributes()); Modified: llvm/trunk/test/Assembler/unnamed-addr.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Assembler/unnamed-addr.ll?rev=124209&r1=124208&r2=124209&view=diff ============================================================================== --- llvm/trunk/test/Assembler/unnamed-addr.ll (original) +++ llvm/trunk/test/Assembler/unnamed-addr.ll Tue Jan 25 13:09:56 2011 @@ -5,7 +5,7 @@ @bar.d = internal unnamed_addr constant %struct.foobar zeroinitializer, align 4 @foo.d = internal constant %struct.foobar zeroinitializer, align 4 -define unnamed_addr i32 @main() nounwind ssp { +define i32 @main() unnamed_addr nounwind ssp { entry: %call2 = tail call i32 @zed(%struct.foobar* @foo.d, %struct.foobar* @bar.d) nounwind ret i32 0 @@ -15,4 +15,4 @@ ; CHECK: @bar.d = internal unnamed_addr constant %struct.foobar zeroinitializer, align 4 ; CHECK: @foo.d = internal constant %struct.foobar zeroinitializer, align 4 -; CHECK: define unnamed_addr i32 @main() nounwind ssp { +; CHECK: define i32 @main() unnamed_addr nounwind ssp { From echristo at apple.com Tue Jan 25 13:26:02 2011 From: echristo at apple.com (Eric Christopher) Date: Tue, 25 Jan 2011 11:26:02 -0800 Subject: [llvm-commits] First draft of ARM EHABI support In-Reply-To: <4D3F0F4A.80606@arm.com> References: <4D3EA2D5.80909@arm.com> <4D3F0F4A.80606@arm.com> Message-ID: On Jan 25, 2011, at 9:58 AM, Renato Golin wrote: > On 01/25/11 17:41, Anton Korobeynikov wrote: >>> + enum ExceptionsType { None, DwarfTable, DwarfCFI, SjLj, ARM }; >>> Just a matter of preference, but can we call this EHABI rather than ARM? ;) >> Yes, I also thought about this. The problem is the following: do you >> know any other target which support EABI exceptions? > > It's more of a personal preference, really, not to use metonyms in code. ;) Heh, but all EHABI stands for is "Exception Handling ABI", I'm with Anton here - they're ARM exception handlers :) Maybe ARM_EHABI if we wanted the best/worst of all worlds. -eric -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110125/be0b44b3/attachment.html From stuart at apple.com Tue Jan 25 13:28:31 2011 From: stuart at apple.com (Stuart Hastings) Date: Tue, 25 Jan 2011 19:28:31 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r124215 - /llvm-gcc-4.2/trunk/gcc/dwarf2out.c Message-ID: <20110125192831.8EF062A6C12C@llvm.org> Author: stuart Date: Tue Jan 25 13:28:31 2011 New Revision: 124215 URL: http://llvm.org/viewvc/llvm-project?rev=124215&view=rev Log: Applying the fourth patch for PR9031. Patch by Pedro Giffuni! Modified: llvm-gcc-4.2/trunk/gcc/dwarf2out.c Modified: llvm-gcc-4.2/trunk/gcc/dwarf2out.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/dwarf2out.c?rev=124215&r1=124214&r2=124215&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/dwarf2out.c (original) +++ llvm-gcc-4.2/trunk/gcc/dwarf2out.c Tue Jan 25 13:28:31 2011 @@ -10600,7 +10600,7 @@ return NULL_TREE; else if (!cgraph_global_info_ready && (TREE_CODE (*tp) == VAR_DECL || TREE_CODE (*tp) == FUNCTION_DECL)) - gcc_unreachable (); + return *tp; else if (DECL_P (*tp) && TREE_CODE (*tp) == VAR_DECL) { struct cgraph_varpool_node *node = cgraph_varpool_node (*tp); From Renato.Golin at arm.com Tue Jan 25 13:40:21 2011 From: Renato.Golin at arm.com (Renato Golin) Date: Tue, 25 Jan 2011 19:40:21 +0000 Subject: [llvm-commits] First draft of ARM EHABI support In-Reply-To: References: <4D3EA2D5.80909@arm.com> <4D3F0F4A.80606@arm.com>, Message-ID: > Maybe ARM_EHABI if we wanted the best/worst of all worlds. Jesus, no! ARM is fine... ;) cheers, --renato -- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. From isanbard at gmail.com Tue Jan 25 15:26:41 2011 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 25 Jan 2011 21:26:41 -0000 Subject: [llvm-commits] [llvm] r124229 - /llvm/trunk/lib/MC/MCParser/AsmParser.cpp Message-ID: <20110125212642.063EC2A6C12C@llvm.org> Author: void Date: Tue Jan 25 15:26:41 2011 New Revision: 124229 URL: http://llvm.org/viewvc/llvm-project?rev=124229&view=rev Log: Add support for parsing a Real value. It stores the Real value as its binary encoding. It's up to the individual back-ends to convert it to their preferred representation when printing. Modified: llvm/trunk/lib/MC/MCParser/AsmParser.cpp Modified: llvm/trunk/lib/MC/MCParser/AsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCParser/AsmParser.cpp?rev=124229&r1=124228&r2=124229&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCParser/AsmParser.cpp (original) +++ llvm/trunk/lib/MC/MCParser/AsmParser.cpp Tue Jan 25 15:26:41 2011 @@ -563,6 +563,13 @@ } return false; } + case AsmToken::Real: { + APFloat RealVal(APFloat::IEEEdouble, getTok().getString()); + int64_t IntVal = RealVal.bitcastToAPInt().getSExtValue(); + Res = MCConstantExpr::Create(IntVal, getContext()); + Lex(); // Eat token. + return false; + } case AsmToken::Dot: { // This is a '.' reference, which references the current PC. Emit a // temporary label to the streamer and refer to it. @@ -573,7 +580,6 @@ Lex(); // Eat identifier. return false; } - case AsmToken::LParen: Lex(); // Eat the '('. return ParseParenExpr(Res, EndLoc); From isanbard at gmail.com Tue Jan 25 15:27:46 2011 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 25 Jan 2011 21:27:46 -0000 Subject: [llvm-commits] [llvm] r124230 - /llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp Message-ID: <20110125212746.B59982A6C12C@llvm.org> Author: void Date: Tue Jan 25 15:27:46 2011 New Revision: 124230 URL: http://llvm.org/viewvc/llvm-project?rev=124230&view=rev Log: The floating point value is encoded in its binary form as an Imm. Convert it appropriately so that it prints out the decimal representation. Modified: llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp Modified: llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp?rev=124230&r1=124229&r2=124230&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp (original) +++ llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp Tue Jan 25 15:27:46 2011 @@ -673,12 +673,14 @@ void ARMInstPrinter::printVFPf32ImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) { - O << '#' << (float)MI->getOperand(OpNum).getFPImm(); + const MCOperand &MO = MI->getOperand(OpNum); + O << '#' << APInt(64, MO.getImm(), true).bitsToDouble(); } void ARMInstPrinter::printVFPf64ImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) { - O << '#' << MI->getOperand(OpNum).getFPImm(); + const MCOperand &MO = MI->getOperand(OpNum); + O << '#' << APInt(64, MO.getImm(), true).bitsToDouble(); } void ARMInstPrinter::printNEONModImmOperand(const MCInst *MI, unsigned OpNum, From wendling at apple.com Tue Jan 25 15:48:20 2011 From: wendling at apple.com (Bill Wendling) Date: Tue, 25 Jan 2011 13:48:20 -0800 Subject: [llvm-commits] [llvm] r123892 - /llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp In-Reply-To: <20110120062159.DF9572A6C12E@llvm.org> References: <20110120062159.DF9572A6C12E@llvm.org> Message-ID: <31296ED4-4EF1-440F-8857-213943EE45A6@apple.com> On Jan 19, 2011, at 10:21 PM, Andrew Trick wrote: > Author: atrick > Date: Thu Jan 20 00:21:59 2011 > New Revision: 123892 > > URL: http://llvm.org/viewvc/llvm-project?rev=123892&view=rev > Log: > Selection DAG scheduler register pressure heuristic fixes. > > Added a check for already live regs before claiming HighRegPressure. > Fixed a few cases of checking the wrong number of successors. > Added some tracing until these heuristics are better understood. > > Modified: > llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp > > Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp?rev=123892&r1=123891&r2=123892&view=diff > ============================================================================== > --- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp (original) > +++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Thu Jan 20 00:21:59 2011 > @@ -1589,6 +1589,8 @@ > CalcNodeSethiUllmanNumber(SU, SethiUllmanNumbers); > } > > +// Lower priority means schedule further down. For bottom-up scheduling, lower > +// priority SUs are scheduled before higher priority SUs. > unsigned RegReductionPQBase::getNodePriority(const SUnit *SU) const { > assert(SU->NodeNum < SethiUllmanNumbers.size()); > unsigned Opc = SU->getNode() ? SU->getNode()->getOpcode() : 0; > @@ -1641,6 +1643,14 @@ > if (I->isCtrl()) > continue; > SUnit *PredSU = I->getSUnit(); > + // NumSuccsLeft counts all deps. Don't compare it with NumSuccs which only > + // counts data deps. To be more precise, we could maintain a > + // NumDataSuccsLeft count. > + if (PredSU->NumSuccsLeft != PredSU->Succs.size()) { > + DEBUG(dbgs() << " SU(" << PredSU->NodeNum << ") live across SU(" > + << SU->NodeNum << ")\n"); > + continue; > + } > const SDNode *PN = PredSU->getNode(); > if (!PN->isMachineOpcode()) { > if (PN->getOpcode() == ISD::CopyFromReg) { > @@ -1735,7 +1745,9 @@ > if (I->isCtrl()) > continue; > SUnit *PredSU = I->getSUnit(); > - if (PredSU->NumSuccsLeft != PredSU->NumSuccs) > + // NumSuccsLeft counts all deps. Don't compare it with NumSuccs which only > + // counts data deps. > + if (PredSU->NumSuccsLeft != PredSU->Succs.size()) > continue; > const SDNode *PN = PredSU->getNode(); > if (!PN->isMachineOpcode()) { > @@ -1814,7 +1826,9 @@ > if (I->isCtrl()) > continue; > SUnit *PredSU = I->getSUnit(); > - if (PredSU->NumSuccsLeft != PredSU->NumSuccs) > + // NumSuccsLeft counts all deps. Don't compare it with NumSuccs which only > + // counts data deps. > + if (PredSU->NumSuccsLeft != PredSU->Succs.size()) > continue; > const SDNode *PN = PredSU->getNode(); > if (!PN->isMachineOpcode()) { > @@ -2003,12 +2017,11 @@ > int LDepth = (int)left->getDepth(); > int RDepth = (int)right->getDepth(); > > - DEBUG(dbgs() << " Comparing latency of SU #" << left->NodeNum > - << " depth " << LDepth << " vs SU #" << right->NodeNum > - << " depth " << RDepth << "\n"); > - > if (EnableSchedCycles) { > if (LDepth != RDepth) > + DEBUG(dbgs() << " Comparing latency of SU (" << left->NodeNum > + << ") depth " << LDepth << " vs SU (" << right->NodeNum > + << ") depth " << RDepth << ")\n"); > return LDepth < RDepth ? 1 : -1; Hi Andy, Did you mean to move the return statement out of that if-statement? -bw > } > else { > @@ -2119,10 +2132,16 @@ > bool RHigh = SPQ->HighRegPressure(right); > // Avoid causing spills. If register pressure is high, schedule for > // register pressure reduction. > - if (LHigh && !RHigh) > + if (LHigh && !RHigh) { > + DEBUG(dbgs() << " pressure SU(" << left->NodeNum << ") > SU(" > + << right->NodeNum << ")\n"); > return true; > - else if (!LHigh && RHigh) > + } > + else if (!LHigh && RHigh) { > + DEBUG(dbgs() << " pressure SU(" << right->NodeNum << ") > SU(" > + << left->NodeNum << ")\n"); > return false; > + } > else if (!LHigh && !RHigh) { > int result = BUCompareLatency(left, right, true /*checkPref*/, SPQ); > if (result != 0) > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From isanbard at gmail.com Tue Jan 25 15:48:36 2011 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 25 Jan 2011 21:48:36 -0000 Subject: [llvm-commits] [llvm] r124233 - /llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp Message-ID: <20110125214836.985442A6C12C@llvm.org> Author: void Date: Tue Jan 25 15:48:36 2011 New Revision: 124233 URL: http://llvm.org/viewvc/llvm-project?rev=124233&view=rev Log: Revert 124230. It was causing test failures. Modified: llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp Modified: llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp?rev=124233&r1=124232&r2=124233&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp (original) +++ llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp Tue Jan 25 15:48:36 2011 @@ -673,14 +673,12 @@ void ARMInstPrinter::printVFPf32ImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) { - const MCOperand &MO = MI->getOperand(OpNum); - O << '#' << APInt(64, MO.getImm(), true).bitsToDouble(); + O << '#' << (float)MI->getOperand(OpNum).getFPImm(); } void ARMInstPrinter::printVFPf64ImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) { - const MCOperand &MO = MI->getOperand(OpNum); - O << '#' << APInt(64, MO.getImm(), true).bitsToDouble(); + O << '#' << MI->getOperand(OpNum).getFPImm(); } void ARMInstPrinter::printNEONModImmOperand(const MCInst *MI, unsigned OpNum, From atrick at apple.com Tue Jan 25 15:59:37 2011 From: atrick at apple.com (Andrew Trick) Date: Tue, 25 Jan 2011 13:59:37 -0800 Subject: [llvm-commits] [llvm] r123892 - /llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp In-Reply-To: <31296ED4-4EF1-440F-8857-213943EE45A6@apple.com> References: <20110120062159.DF9572A6C12E@llvm.org> <31296ED4-4EF1-440F-8857-213943EE45A6@apple.com> Message-ID: <8CFC014A-BB87-4BCC-BDA5-90C7ABDBEDD7@apple.com> On Jan 25, 2011, at 1:48 PM, Bill Wendling wrote: > On Jan 19, 2011, at 10:21 PM, Andrew Trick wrote: >> if (!PN->isMachineOpcode()) { >> @@ -1814,7 +1826,9 @@ >> if (I->isCtrl()) >> continue; >> SUnit *PredSU = I->getSUnit(); >> - if (PredSU->NumSuccsLeft != PredSU->NumSuccs) >> + // NumSuccsLeft counts all deps. Don't compare it with NumSuccs which only >> + // counts data deps. >> + if (PredSU->NumSuccsLeft != PredSU->Succs.size()) >> continue; >> const SDNode *PN = PredSU->getNode(); >> if (!PN->isMachineOpcode()) { >> @@ -2003,12 +2017,11 @@ >> int LDepth = (int)left->getDepth(); >> int RDepth = (int)right->getDepth(); >> >> - DEBUG(dbgs() << " Comparing latency of SU #" << left->NodeNum >> - << " depth " << LDepth << " vs SU #" << right->NodeNum >> - << " depth " << RDepth << "\n"); >> - >> if (EnableSchedCycles) { >> if (LDepth != RDepth) >> + DEBUG(dbgs() << " Comparing latency of SU (" << left->NodeNum >> + << ") depth " << LDepth << " vs SU (" << right->NodeNum >> + << ") depth " << RDepth << ")\n"); >> return LDepth < RDepth ? 1 : -1; > > Hi Andy, > > Did you mean to move the return statement out of that if-statement? > > -bw > I did in the next commit. Thanks for checking though. -Andy >> } >> else { >> @@ -2119,10 +2132,16 @@ >> bool RHigh = SPQ->HighRegPressure(right); >> // Avoid causing spills. If register pressure is high, schedule for >> // register pressure reduction. >> - if (LHigh && !RHigh) >> + if (LHigh && !RHigh) { >> + DEBUG(dbgs() << " pressure SU(" << left->NodeNum << ") > SU(" >> + << right->NodeNum << ")\n"); >> return true; >> - else if (!LHigh && RHigh) >> + } >> + else if (!LHigh && RHigh) { >> + DEBUG(dbgs() << " pressure SU(" << right->NodeNum << ") > SU(" >> + << left->NodeNum << ")\n"); >> return false; >> + } >> else if (!LHigh && !RHigh) { >> int result = BUCompareLatency(left, right, true /*checkPref*/, SPQ); >> if (result != 0) >> >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110125/99cdcff3/attachment.html From greened at obbligato.org Tue Jan 25 16:05:41 2011 From: greened at obbligato.org (David Greene) Date: Tue, 25 Jan 2011 22:05:41 -0000 Subject: [llvm-commits] [llvm] r124234 - /llvm/trunk/include/llvm/Target/TargetSelectionDAG.td Message-ID: <20110125220541.B44D12A6C12C@llvm.org> Author: greened Date: Tue Jan 25 16:05:41 2011 New Revision: 124234 URL: http://llvm.org/viewvc/llvm-project?rev=124234&view=rev Log: [AVX] Fix a typo in the extract subvector type constraints to specify the correct number of operands. Modified: llvm/trunk/include/llvm/Target/TargetSelectionDAG.td Modified: llvm/trunk/include/llvm/Target/TargetSelectionDAG.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetSelectionDAG.td?rev=124234&r1=124233&r2=124234&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetSelectionDAG.td (original) +++ llvm/trunk/include/llvm/Target/TargetSelectionDAG.td Tue Jan 25 16:05:41 2011 @@ -190,10 +190,10 @@ SDTCisEltOfVec<2, 1>, SDTCisSameAs<0, 1>, SDTCisPtrTy<3> ]>; -def SDTSubVecExtract : SDTypeProfile<1, 1, [// subvector extract +def SDTSubVecExtract : SDTypeProfile<1, 2, [// subvector extract SDTCisSubVecOfVec<0,1> ]>; -def SDTSubVecInsert : SDTypeProfile<1, 2, [ // subvector insert +def SDTSubVecInsert : SDTypeProfile<1, 3, [ // subvector insert SDTCisSubVecOfVec<2, 1>, SDTCisSameAs<0,1> ]>; From dpatel at apple.com Tue Jan 25 17:27:42 2011 From: dpatel at apple.com (Devang Patel) Date: Tue, 25 Jan 2011 23:27:42 -0000 Subject: [llvm-commits] [llvm] r124245 - in /llvm/trunk: include/llvm/CodeGen/SelectionDAG.h lib/CodeGen/SelectionDAG/SDNodeDbgValue.h lib/CodeGen/SelectionDAG/SelectionDAG.cpp Message-ID: <20110125232742.6AFE32A6C12C@llvm.org> Author: dpatel Date: Tue Jan 25 17:27:42 2011 New Revision: 124245 URL: http://llvm.org/viewvc/llvm-project?rev=124245&view=rev Log: Provide an interface to transfer SDDbgValue from one SDNode to another. Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAG.h llvm/trunk/lib/CodeGen/SelectionDAG/SDNodeDbgValue.h llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAG.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAG.h?rev=124245&r1=124244&r2=124245&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/SelectionDAG.h (original) +++ llvm/trunk/include/llvm/CodeGen/SelectionDAG.h Tue Jan 25 17:27:42 2011 @@ -100,6 +100,10 @@ return DbgValMap[Node]; } + void removeSDDbgValues(const SDNode *Node) { + DbgValMap.erase(Node); + } + typedef SmallVector::iterator DbgIterator; DbgIterator DbgBegin() { return DbgValues.begin(); } DbgIterator DbgEnd() { return DbgValues.end(); } @@ -901,6 +905,9 @@ SmallVector &GetDbgValues(const SDNode* SD) { return DbgInfo->getSDDbgValues(SD); } + + /// TransferDbgValues - Transfer SDDbgValues. + void TransferDbgValues(SDValue From, SDValue To); /// hasDebugValues - Return true if there are any SDDbgValue nodes associated /// with this SelectionDAG. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SDNodeDbgValue.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SDNodeDbgValue.h?rev=124245&r1=124244&r2=124245&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SDNodeDbgValue.h (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SDNodeDbgValue.h Tue Jan 25 17:27:42 2011 @@ -83,6 +83,14 @@ // Returns the SDNode* for a register ref SDNode *getSDNode() { assert (kind==SDNODE); return u.s.Node; } + // setSDNode - If underlying SDNode is replaced by another node then + // SelectionDAG can use this to transfer DbgValue. + void setSDNode(SDNode *N, unsigned R) { + assert (kind==SDNODE); + u.s.Node = N; + u.s.ResNo = R; + } + // Returns the ResNo for a register ref unsigned getResNo() { assert (kind==SDNODE); return u.s.ResNo; } Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=124245&r1=124244&r2=124245&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Tue Jan 25 17:27:42 2011 @@ -5424,6 +5424,23 @@ SD->setHasDebugValue(true); } +/// TransferDbgValues - Transfer SDDbgValues. +void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) { + if (From == To || !From.getNode()->getHasDebugValue()) + return; + SDNode *FromNode = From.getNode(); + SDNode *ToNode = To.getNode(); + SmallVector &DVs = GetDbgValues(FromNode); + DbgInfo->removeSDDbgValues(FromNode); + for (SmallVector::iterator I = DVs.begin(), E = DVs.end(); + I != E; ++I) { + if ((*I)->getKind() == SDDbgValue::SDNODE) { + AddDbgValue(*I, ToNode, false); + (*I)->setSDNode(ToNode, To.getResNo()); + } + } +} + //===----------------------------------------------------------------------===// // SDNode Class //===----------------------------------------------------------------------===// From aggarwa4 at illinois.edu Tue Jan 25 17:32:14 2011 From: aggarwa4 at illinois.edu (Arushi Aggarwal) Date: Tue, 25 Jan 2011 23:32:14 -0000 Subject: [llvm-commits] [poolalloc] r124246 - in /poolalloc/trunk/test: TEST.optzn.Makefile TEST.ptrcomp.Makefile Message-ID: <20110125233214.73BE52A6C12C@llvm.org> Author: aggarwa4 Date: Tue Jan 25 17:32:14 2011 New Revision: 124246 URL: http://llvm.org/viewvc/llvm-project?rev=124246&view=rev Log: Use the CONFIGURATION setting instead of Debug by default Modified: poolalloc/trunk/test/TEST.optzn.Makefile poolalloc/trunk/test/TEST.ptrcomp.Makefile Modified: poolalloc/trunk/test/TEST.optzn.Makefile URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/test/TEST.optzn.Makefile?rev=124246&r1=124245&r2=124246&view=diff ============================================================================== --- poolalloc/trunk/test/TEST.optzn.Makefile (original) +++ poolalloc/trunk/test/TEST.optzn.Makefile Tue Jan 25 17:32:14 2011 @@ -21,7 +21,7 @@ RELDIR := $(subst $(PROGDIR),,$(CURDIR)) # Pool allocator pass shared object -PA_SO := $(PROJECT_DIR)/Debug/lib/poolalloc$(SHLIBEXT) +PA_SO := $(PROJECT_DIR)/$(CONFIGURATION)/lib/poolalloc$(SHLIBEXT) # Pool allocator runtime library #PA_RT := $(PROJECT_DIR)/lib/Bytecode/libpoolalloc_fl_rt.bc Modified: poolalloc/trunk/test/TEST.ptrcomp.Makefile URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/test/TEST.ptrcomp.Makefile?rev=124246&r1=124245&r2=124246&view=diff ============================================================================== --- poolalloc/trunk/test/TEST.ptrcomp.Makefile (original) +++ poolalloc/trunk/test/TEST.ptrcomp.Makefile Tue Jan 25 17:32:14 2011 @@ -14,7 +14,7 @@ RELDIR := $(subst $(PROGDIR),,$(CURDIR)) # Pool allocator pass shared object -PA_SO := $(PROJECT_DIR)/Debug/lib/poolalloc$(SHLIBEXT) +PA_SO := $(PROJECT_DIR)/$(CONFIGURATION)/lib/poolalloc$(SHLIBEXT) # Pool allocator runtime library #PA_RT := $(PROJECT_DIR)/lib/Bytecode/libpoolalloc_fl_rt.bc From carl.norum at apple.com Tue Jan 25 15:47:12 2011 From: carl.norum at apple.com (Carl Norum) Date: Tue, 25 Jan 2011 13:47:12 -0800 Subject: [llvm-commits] Patches to build EFI with clang/llvm Message-ID: <9D168FAF-67BF-414A-A0B4-D06D146A620B@apple.com> I've attached some patches to LLVM for review. We're currently using these patches to build EFI boot ROMs on Mac OS X using clang/llvm. The biggest change there is putting Windows ABI code into Mach-O objects. The patch should apply cleanly to r124214 or later - hopefully nothing's gotten in the way so far! Questions/comments/suggestions much appreciated! -- Carl Norum carl.norum at apple.com (408) 974-7544 -------------- next part -------------- A non-text attachment was scrubbed... Name: efi.patch Type: application/octet-stream Size: 22994 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110125/50567f70/attachment.obj From stoklund at 2pi.dk Tue Jan 25 18:32:21 2011 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Tue, 25 Jan 2011 16:32:21 -0800 Subject: [llvm-commits] Patches to build EFI with clang/llvm In-Reply-To: <9D168FAF-67BF-414A-A0B4-D06D146A620B@apple.com> References: <9D168FAF-67BF-414A-A0B4-D06D146A620B@apple.com> Message-ID: On Jan 25, 2011, at 1:47 PM, Carl Norum wrote: > > I've attached some patches to LLVM for review. We're currently using these patches to build EFI boot ROMs on Mac OS X using clang/llvm. The biggest change there is putting Windows ABI code into Mach-O objects. The patch should apply cleanly to r124214 or later - hopefully nothing's gotten in the way so far! > > Questions/comments/suggestions much appreciated! Thanks, Carl. Could you separate the Mach-O related changes from the Win64 tail call fixes, please? > +// Register class for scratch registers available for tailcalls and tailjumps. > +def ptr_rc_tc : PointerLikeRegClass<2>; > + The reason for having a dynamic register class was to avoid creating new Windows-specific pseudo-instructions, but you still have a bunch of new WIN* pseudos. Takumi recently submitted a patch to do the exact same thing. I think he managed to avoid the new instructions. I think his solution was better, assuming it works for you. /jakob -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110125/b27be5e4/attachment.html From carl.norum at apple.com Tue Jan 25 18:37:59 2011 From: carl.norum at apple.com (Carl Norum) Date: Tue, 25 Jan 2011 16:37:59 -0800 Subject: [llvm-commits] Patches to build EFI with clang/llvm In-Reply-To: References: <9D168FAF-67BF-414A-A0B4-D06D146A620B@apple.com> Message-ID: On Jan 25, 2011, at 4:32 PM, Jakob Stoklund Olesen wrote: > > On Jan 25, 2011, at 1:47 PM, Carl Norum wrote: > >> >> I've attached some patches to LLVM for review. We're currently using these patches to build EFI boot ROMs on Mac OS X using clang/llvm. The biggest change there is putting Windows ABI code into Mach-O objects. The patch should apply cleanly to r124214 or later - hopefully nothing's gotten in the way so far! >> >> Questions/comments/suggestions much appreciated! > > Thanks, Carl. > > Could you separate the Mach-O related changes from the Win64 tail call fixes, please? I'll see what I can do. >> +// Register class for scratch registers available for tailcalls and tailjumps. >> +def ptr_rc_tc : PointerLikeRegClass<2>; >> + > > The reason for having a dynamic register class was to avoid creating new Windows-specific pseudo-instructions, but you still have a bunch of new WIN* pseudos. > > Takumi recently submitted a patch to do the exact same thing. I think he managed to avoid the new instructions. I think his solution was better, assuming it works for you. It very well might; I sort of inherited this code, so I'll have to dig around a bit before figuring that all out. Has that patch gone into TOT, and if not, where can I get it from? -- Carl -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110125/5bc0951f/attachment.html From stoklund at 2pi.dk Tue Jan 25 18:47:42 2011 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Tue, 25 Jan 2011 16:47:42 -0800 Subject: [llvm-commits] Patches to build EFI with clang/llvm In-Reply-To: References: <9D168FAF-67BF-414A-A0B4-D06D146A620B@apple.com> Message-ID: On Jan 25, 2011, at 4:37 PM, Carl Norum wrote: > > On Jan 25, 2011, at 4:32 PM, Jakob Stoklund Olesen wrote: > >> Could you separate the Mach-O related changes from the Win64 tail call fixes, please? > > I'll see what I can do. Thanks! >> Takumi recently submitted a patch to do the exact same thing. I think he managed to avoid the new instructions. I think his solution was better, assuming it works for you. > > It very well might; I sort of inherited this code, so I'll have to dig around a bit before figuring that all out. Has that patch gone into TOT, and if not, where can I get it from? I think this was his latest attempt: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20110110/115159.html The changes haven't been committed, AFAIK. /jakob -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110125/c6b3b234/attachment.html From stoklund at 2pi.dk Tue Jan 25 18:50:53 2011 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Wed, 26 Jan 2011 00:50:53 -0000 Subject: [llvm-commits] [llvm] r124257 - in /llvm/trunk/lib/CodeGen: SplitKit.cpp SplitKit.h Message-ID: <20110126005053.B60482A6C12C@llvm.org> Author: stoklund Date: Tue Jan 25 18:50:53 2011 New Revision: 124257 URL: http://llvm.org/viewvc/llvm-project?rev=124257&view=rev Log: Rename member variables to follow the rest of LLVM. No functional change. Modified: llvm/trunk/lib/CodeGen/SplitKit.cpp llvm/trunk/lib/CodeGen/SplitKit.h Modified: llvm/trunk/lib/CodeGen/SplitKit.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SplitKit.cpp?rev=124257&r1=124256&r2=124257&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SplitKit.cpp (original) +++ llvm/trunk/lib/CodeGen/SplitKit.cpp Tue Jan 25 18:50:53 2011 @@ -41,51 +41,51 @@ SplitAnalysis::SplitAnalysis(const MachineFunction &mf, const LiveIntervals &lis, const MachineLoopInfo &mli) - : mf_(mf), - lis_(lis), - loops_(mli), - tii_(*mf.getTarget().getInstrInfo()), - curli_(0) {} + : MF(mf), + LIS(lis), + Loops(mli), + TII(*mf.getTarget().getInstrInfo()), + CurLI(0) {} void SplitAnalysis::clear() { UseSlots.clear(); - usingInstrs_.clear(); - usingBlocks_.clear(); - usingLoops_.clear(); - curli_ = 0; + UsingInstrs.clear(); + UsingBlocks.clear(); + UsingLoops.clear(); + CurLI = 0; } bool SplitAnalysis::canAnalyzeBranch(const MachineBasicBlock *MBB) { MachineBasicBlock *T, *F; SmallVector Cond; - return !tii_.AnalyzeBranch(const_cast(*MBB), T, F, Cond); + return !TII.AnalyzeBranch(const_cast(*MBB), T, F, Cond); } -/// analyzeUses - Count instructions, basic blocks, and loops using curli. +/// analyzeUses - Count instructions, basic blocks, and loops using CurLI. void SplitAnalysis::analyzeUses() { - const MachineRegisterInfo &MRI = mf_.getRegInfo(); - for (MachineRegisterInfo::reg_iterator I = MRI.reg_begin(curli_->reg); + const MachineRegisterInfo &MRI = MF.getRegInfo(); + for (MachineRegisterInfo::reg_iterator I = MRI.reg_begin(CurLI->reg); MachineInstr *MI = I.skipInstruction();) { - if (MI->isDebugValue() || !usingInstrs_.insert(MI)) + if (MI->isDebugValue() || !UsingInstrs.insert(MI)) continue; - UseSlots.push_back(lis_.getInstructionIndex(MI).getDefIndex()); + UseSlots.push_back(LIS.getInstructionIndex(MI).getDefIndex()); MachineBasicBlock *MBB = MI->getParent(); - if (usingBlocks_[MBB]++) + if (UsingBlocks[MBB]++) continue; - for (MachineLoop *Loop = loops_.getLoopFor(MBB); Loop; + for (MachineLoop *Loop = Loops.getLoopFor(MBB); Loop; Loop = Loop->getParentLoop()) - usingLoops_[Loop]++; + UsingLoops[Loop]++; } array_pod_sort(UseSlots.begin(), UseSlots.end()); DEBUG(dbgs() << " counted " - << usingInstrs_.size() << " instrs, " - << usingBlocks_.size() << " blocks, " - << usingLoops_.size() << " loops.\n"); + << UsingInstrs.size() << " instrs, " + << UsingBlocks.size() << " blocks, " + << UsingLoops.size() << " loops.\n"); } void SplitAnalysis::print(const BlockPtrSet &B, raw_ostream &OS) const { for (BlockPtrSet::const_iterator I = B.begin(), E = B.end(); I != E; ++I) { - unsigned count = usingBlocks_.lookup(*I); + unsigned count = UsingBlocks.lookup(*I); OS << " BB#" << (*I)->getNumber(); if (count) OS << '(' << count << ')'; @@ -127,12 +127,12 @@ print(B.Exits, OS); } -/// analyzeLoopPeripheralUse - Return an enum describing how curli_ is used in +/// analyzeLoopPeripheralUse - Return an enum describing how CurLI is used in /// and around the Loop. SplitAnalysis::LoopPeripheralUse SplitAnalysis:: analyzeLoopPeripheralUse(const SplitAnalysis::LoopBlocks &Blocks) { LoopPeripheralUse use = ContainedInLoop; - for (BlockCountMap::iterator I = usingBlocks_.begin(), E = usingBlocks_.end(); + for (BlockCountMap::iterator I = UsingBlocks.begin(), E = UsingBlocks.end(); I != E; ++I) { const MachineBasicBlock *MBB = I->first; // Is this a peripheral block? @@ -159,7 +159,7 @@ BlockPtrSet &CriticalExits) { CriticalExits.clear(); - // A critical exit block has curli live-in, and has a predecessor that is not + // A critical exit block has CurLI live-in, and has a predecessor that is not // in the loop nor a loop predecessor. For such an exit block, the edges // carrying the new variable must be moved to a new pre-exit block. for (BlockPtrSet::iterator I = Blocks.Exits.begin(), E = Blocks.Exits.end(); @@ -168,8 +168,8 @@ // A single-predecessor exit block is definitely not a critical edge. if (Exit->pred_size() == 1) continue; - // This exit may not have curli live in at all. No need to split. - if (!lis_.isLiveInToMBB(*curli_, Exit)) + // This exit may not have CurLI live in at all. No need to split. + if (!LIS.isLiveInToMBB(*CurLI, Exit)) continue; // Does this exit block have a predecessor that is not a loop block or loop // predecessor? @@ -189,8 +189,8 @@ BlockPtrSet &CriticalPreds) { CriticalPreds.clear(); - // A critical predecessor block has curli live-out, and has a successor that - // has curli live-in and is not in the loop nor a loop exit block. For such a + // A critical predecessor block has CurLI live-out, and has a successor that + // has CurLI live-in and is not in the loop nor a loop exit block. For such a // predecessor block, we must carry the value in both the 'inside' and // 'outside' registers. for (BlockPtrSet::iterator I = Blocks.Preds.begin(), E = Blocks.Preds.end(); @@ -199,8 +199,8 @@ // Definitely not a critical edge. if (Pred->succ_size() == 1) continue; - // This block may not have curli live out at all if there is a PHI. - if (!lis_.isLiveOutOfMBB(*curli_, Pred)) + // This block may not have CurLI live out at all if there is a PHI. + if (!LIS.isLiveOutOfMBB(*CurLI, Pred)) continue; // Does this block have a successor outside the loop? for (MachineBasicBlock::const_pred_iterator SI = Pred->succ_begin(), @@ -208,7 +208,7 @@ const MachineBasicBlock *Succ = *SI; if (Blocks.Loop.count(Succ) || Blocks.Exits.count(Succ)) continue; - if (!lis_.isLiveInToMBB(*curli_, Succ)) + if (!LIS.isLiveInToMBB(*CurLI, Succ)) continue; // This is a critical predecessor block. CriticalPreds.insert(Pred); @@ -245,7 +245,7 @@ // If Succ's layout predecessor falls through, that too must be analyzable. // We need to insert the pre-exit block in the gap. MachineFunction::const_iterator MFI = Succ; - if (MFI == mf_.begin()) + if (MFI == MF.begin()) continue; if (!canAnalyzeBranch(--MFI)) return false; @@ -256,21 +256,21 @@ void SplitAnalysis::analyze(const LiveInterval *li) { clear(); - curli_ = li; + CurLI = li; analyzeUses(); } void SplitAnalysis::getSplitLoops(LoopPtrSet &Loops) { - assert(curli_ && "Call analyze() before getSplitLoops"); - if (usingLoops_.empty()) + assert(CurLI && "Call analyze() before getSplitLoops"); + if (UsingLoops.empty()) return; LoopBlocks Blocks; BlockPtrSet CriticalExits; - // We split around loops where curli is used outside the periphery. - for (LoopCountMap::const_iterator I = usingLoops_.begin(), - E = usingLoops_.end(); I != E; ++I) { + // We split around loops where CurLI is used outside the periphery. + for (LoopCountMap::const_iterator I = UsingLoops.begin(), + E = UsingLoops.end(); I != E; ++I) { const MachineLoop *Loop = I->first; getLoopBlocks(Loop, Blocks); DEBUG({ dbgs() << " "; print(Blocks, dbgs()); }); @@ -320,7 +320,7 @@ SlotIndex BestIdx; for (LoopPtrSet::const_iterator I = Loops.begin(), E = Loops.end(); I != E; ++I) { - SlotIndex Idx = lis_.getMBBStartIdx((*I)->getHeader()); + SlotIndex Idx = LIS.getMBBStartIdx((*I)->getHeader()); if (!Best || Idx < BestIdx) Best = *I, BestIdx = Idx; } @@ -328,25 +328,25 @@ return Best; } -/// isBypassLoop - Return true if curli is live through Loop and has no uses +/// isBypassLoop - Return true if CurLI is live through Loop and has no uses /// inside the loop. Bypass loops are candidates for splitting because it can /// prevent interference inside the loop. bool SplitAnalysis::isBypassLoop(const MachineLoop *Loop) { - // If curli is live into the loop header and there are no uses in the loop, it + // If CurLI is live into the loop header and there are no uses in the loop, it // must be live in the entire loop and live on at least one exiting edge. - return !usingLoops_.count(Loop) && - lis_.isLiveInToMBB(*curli_, Loop->getHeader()); + return !UsingLoops.count(Loop) && + LIS.isLiveInToMBB(*CurLI, Loop->getHeader()); } /// getBypassLoops - Get all the maximal bypass loops. These are the bypass /// loops whose parent is not a bypass loop. void SplitAnalysis::getBypassLoops(LoopPtrSet &BypassLoops) { - SmallVector Todo(loops_.begin(), loops_.end()); + SmallVector Todo(Loops.begin(), Loops.end()); while (!Todo.empty()) { MachineLoop *Loop = Todo.pop_back_val(); - if (!usingLoops_.count(Loop)) { + if (!UsingLoops.count(Loop)) { // This is either a bypass loop or completely irrelevant. - if (lis_.isLiveInToMBB(*curli_, Loop->getHeader())) + if (LIS.isLiveInToMBB(*CurLI, Loop->getHeader())) BypassLoops.insert(Loop); // Either way, skip the child loops. continue; @@ -370,26 +370,26 @@ } void LiveIntervalMap::reset(LiveInterval *li) { - li_ = li; - valueMap_.clear(); - liveOutCache_.clear(); + LI = li; + Values.clear(); + LiveOutCache.clear(); } bool LiveIntervalMap::isComplexMapped(const VNInfo *ParentVNI) const { - ValueMap::const_iterator i = valueMap_.find(ParentVNI); - return i != valueMap_.end() && i->second == 0; + ValueMap::const_iterator i = Values.find(ParentVNI); + return i != Values.end() && i->second == 0; } -// defValue - Introduce a li_ def for ParentVNI that could be later than +// defValue - Introduce a LI def for ParentVNI that could be later than // ParentVNI->def. VNInfo *LiveIntervalMap::defValue(const VNInfo *ParentVNI, SlotIndex Idx) { - assert(li_ && "call reset first"); + assert(LI && "call reset first"); assert(ParentVNI && "Mapping NULL value"); assert(Idx.isValid() && "Invalid SlotIndex"); - assert(parentli_.getVNInfoAt(Idx) == ParentVNI && "Bad ParentVNI"); + assert(ParentLI.getVNInfoAt(Idx) == ParentVNI && "Bad ParentVNI"); // Create a new value. - VNInfo *VNI = li_->getNextValue(Idx, 0, lis_.getVNInfoAllocator()); + VNInfo *VNI = LI->getNextValue(Idx, 0, LIS.getVNInfoAllocator()); // Preserve the PHIDef bit. if (ParentVNI->isPHIDef() && Idx == ParentVNI->def) @@ -397,7 +397,7 @@ // Use insert for lookup, so we can add missing values with a second lookup. std::pair InsP = - valueMap_.insert(makeVV(ParentVNI, Idx == ParentVNI->def ? VNI : 0)); + Values.insert(makeVV(ParentVNI, Idx == ParentVNI->def ? VNI : 0)); // This is now a complex def. Mark with a NULL in valueMap. if (!InsP.second) @@ -411,20 +411,20 @@ // Potentially create phi-def values. VNInfo *LiveIntervalMap::mapValue(const VNInfo *ParentVNI, SlotIndex Idx, bool *simple) { - assert(li_ && "call reset first"); + assert(LI && "call reset first"); assert(ParentVNI && "Mapping NULL value"); assert(Idx.isValid() && "Invalid SlotIndex"); - assert(parentli_.getVNInfoAt(Idx) == ParentVNI && "Bad ParentVNI"); + assert(ParentLI.getVNInfoAt(Idx) == ParentVNI && "Bad ParentVNI"); // Use insert for lookup, so we can add missing values with a second lookup. std::pair InsP = - valueMap_.insert(makeVV(ParentVNI, 0)); + Values.insert(makeVV(ParentVNI, 0)); // This was an unknown value. Create a simple mapping. if (InsP.second) { if (simple) *simple = true; - return InsP.first->second = li_->createValueCopy(ParentVNI, - lis_.getVNInfoAllocator()); + return InsP.first->second = LI->createValueCopy(ParentVNI, + LIS.getVNInfoAllocator()); } // This was a simple mapped value. @@ -436,7 +436,7 @@ // This is a complex mapped value. There may be multiple defs, and we may need // to create phi-defs. if (simple) *simple = false; - MachineBasicBlock *IdxMBB = lis_.getMBBFromIndex(Idx); + MachineBasicBlock *IdxMBB = LIS.getMBBFromIndex(Idx); assert(IdxMBB && "No MBB at Idx"); // Is there a def in the same MBB we can extend? @@ -448,14 +448,14 @@ // Perform a search for all predecessor blocks where we know the dominating // VNInfo. Insert phi-def VNInfos along the path back to IdxMBB. DEBUG(dbgs() << "\n Reaching defs for BB#" << IdxMBB->getNumber() - << " at " << Idx << " in " << *li_ << '\n'); + << " at " << Idx << " in " << *LI << '\n'); DEBUG(dumpCache()); - // Blocks where li_ should be live-in. + // Blocks where LI should be live-in. SmallVector LiveIn; - LiveIn.push_back(mdt_[IdxMBB]); + LiveIn.push_back(MDT[IdxMBB]); - // Using liveOutCache_ as a visited set, perform a BFS for all reaching defs. + // Using LiveOutCache as a visited set, perform a BFS for all reaching defs. for (unsigned i = 0; i != LiveIn.size(); ++i) { MachineBasicBlock *MBB = LiveIn[i]->getBlock(); for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(), @@ -463,7 +463,7 @@ MachineBasicBlock *Pred = *PI; // Is this a known live-out block? std::pair LOIP = - liveOutCache_.insert(std::make_pair(Pred, LiveOutPair())); + LiveOutCache.insert(std::make_pair(Pred, LiveOutPair())); // Yes, we have been here before. if (!LOIP.second) { DEBUG(if (VNInfo *VNI = LOIP.first->second.first) @@ -473,20 +473,20 @@ } // Does Pred provide a live-out value? - SlotIndex Last = lis_.getMBBEndIdx(Pred).getPrevSlot(); + SlotIndex Last = LIS.getMBBEndIdx(Pred).getPrevSlot(); if (VNInfo *VNI = extendTo(Pred, Last)) { - MachineBasicBlock *DefMBB = lis_.getMBBFromIndex(VNI->def); + MachineBasicBlock *DefMBB = LIS.getMBBFromIndex(VNI->def); DEBUG(dbgs() << " found valno #" << VNI->id << " from BB#" << DefMBB->getNumber() << " at BB#" << Pred->getNumber() << '\n'); LiveOutPair &LOP = LOIP.first->second; LOP.first = VNI; - LOP.second = mdt_[DefMBB]; + LOP.second = MDT[DefMBB]; continue; } // No, we need a live-in value for Pred as well if (Pred != IdxMBB) - LiveIn.push_back(mdt_[Pred]); + LiveIn.push_back(MDT[Pred]); } } @@ -512,8 +512,8 @@ // Get the IDom live-out value. if (!needPHI) { - LiveOutMap::iterator I = liveOutCache_.find(IDom->getBlock()); - if (I != liveOutCache_.end()) + LiveOutMap::iterator I = LiveOutCache.find(IDom->getBlock()); + if (I != LiveOutCache.end()) IDomValue = I->second; else // If IDom is outside our set of live-out blocks, there must be new @@ -527,13 +527,13 @@ if (!needPHI) { for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(), PE = MBB->pred_end(); PI != PE; ++PI) { - LiveOutPair Value = liveOutCache_[*PI]; + LiveOutPair Value = LiveOutCache[*PI]; if (!Value.first || Value.first == IDomValue.first) continue; // This predecessor is carrying something other than IDomValue. // It could be because IDomValue hasn't propagated yet, or it could be // because MBB is in the dominance frontier of that value. - if (mdt_.dominates(IDom, Value.second)) { + if (MDT.dominates(IDom, Value.second)) { needPHI = true; break; } @@ -543,25 +543,25 @@ // Create a phi-def if required. if (needPHI) { ++Changes; - SlotIndex Start = lis_.getMBBStartIdx(MBB); - VNInfo *VNI = li_->getNextValue(Start, 0, lis_.getVNInfoAllocator()); + SlotIndex Start = LIS.getMBBStartIdx(MBB); + VNInfo *VNI = LI->getNextValue(Start, 0, LIS.getVNInfoAllocator()); VNI->setIsPHIDef(true); DEBUG(dbgs() << " - BB#" << MBB->getNumber() << " phi-def #" << VNI->id << " at " << Start << '\n'); - // We no longer need li_ to be live-in. + // We no longer need LI to be live-in. LiveIn.erase(LiveIn.begin()+(i-1)); // Blocks in LiveIn are either IdxMBB, or have a value live-through. if (MBB == IdxMBB) IdxVNI = VNI; // Check if we need to update live-out info. - LiveOutMap::iterator I = liveOutCache_.find(MBB); - if (I == liveOutCache_.end() || I->second.second == Node) { + LiveOutMap::iterator I = LiveOutCache.find(MBB); + if (I == LiveOutCache.end() || I->second.second == Node) { // We already have a live-out defined in MBB, so this must be IdxMBB. assert(MBB == IdxMBB && "Adding phi-def to known live-out"); - li_->addRange(LiveRange(Start, Idx.getNextSlot(), VNI)); + LI->addRange(LiveRange(Start, Idx.getNextSlot(), VNI)); } else { // This phi-def is also live-out, so color the whole block. - li_->addRange(LiveRange(Start, lis_.getMBBEndIdx(MBB), VNI)); + LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB), VNI)); I->second = LiveOutPair(VNI, Node); } } else if (IDomValue.first) { @@ -570,8 +570,8 @@ IdxVNI = IDomValue.first; // Propagate IDomValue if needed: // MBB is live-out and doesn't define its own value. - LiveOutMap::iterator I = liveOutCache_.find(MBB); - if (I != liveOutCache_.end() && I->second.second != Node && + LiveOutMap::iterator I = LiveOutCache.find(MBB); + if (I != LiveOutCache.end() && I->second.second != Node && I->second.first != IDomValue.first) { ++Changes; I->second = IDomValue; @@ -588,8 +588,8 @@ #ifndef NDEBUG DEBUG(dumpCache()); - // Check the liveOutCache_ invariants. - for (LiveOutMap::iterator I = liveOutCache_.begin(), E = liveOutCache_.end(); + // Check the LiveOutCache invariants. + for (LiveOutMap::iterator I = LiveOutCache.begin(), E = LiveOutCache.end(); I != E; ++I) { assert(I->first && "Null MBB entry in cache"); assert(I->second.first && "Null VNInfo in cache"); @@ -598,7 +598,7 @@ continue; for (MachineBasicBlock::pred_iterator PI = I->first->pred_begin(), PE = I->first->pred_end(); PI != PE; ++PI) - assert(liveOutCache_.lookup(*PI) == I->second && "Bad invariant"); + assert(LiveOutCache.lookup(*PI) == I->second && "Bad invariant"); } #endif @@ -608,15 +608,15 @@ // This makes the next mapValue call much faster. for (unsigned i = 0, e = LiveIn.size(); i != e; ++i) { MachineBasicBlock *MBB = LiveIn[i]->getBlock(); - SlotIndex Start = lis_.getMBBStartIdx(MBB); + SlotIndex Start = LIS.getMBBStartIdx(MBB); if (MBB == IdxMBB) { - li_->addRange(LiveRange(Start, Idx.getNextSlot(), IdxVNI)); + LI->addRange(LiveRange(Start, Idx.getNextSlot(), IdxVNI)); continue; } // Anything in LiveIn other than IdxMBB is live-through. - VNInfo *VNI = liveOutCache_.lookup(MBB).first; + VNInfo *VNI = LiveOutCache.lookup(MBB).first; assert(VNI && "Missing block value"); - li_->addRange(LiveRange(Start, lis_.getMBBEndIdx(MBB), VNI)); + LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB), VNI)); } return IdxVNI; @@ -624,7 +624,7 @@ #ifndef NDEBUG void LiveIntervalMap::dumpCache() { - for (LiveOutMap::iterator I = liveOutCache_.begin(), E = liveOutCache_.end(); + for (LiveOutMap::iterator I = LiveOutCache.begin(), E = LiveOutCache.end(); I != E; ++I) { assert(I->first && "Null MBB entry in cache"); assert(I->second.first && "Null VNInfo in cache"); @@ -637,70 +637,70 @@ dbgs() << " BB#" << (*PI)->getNumber(); dbgs() << '\n'; } - dbgs() << " cache: " << liveOutCache_.size() << " entries.\n"; + dbgs() << " cache: " << LiveOutCache.size() << " entries.\n"; } #endif -// extendTo - Find the last li_ value defined in MBB at or before Idx. The -// parentli_ is assumed to be live at Idx. Extend the live range to Idx. +// extendTo - Find the last LI value defined in MBB at or before Idx. The +// ParentLI is assumed to be live at Idx. Extend the live range to Idx. // Return the found VNInfo, or NULL. VNInfo *LiveIntervalMap::extendTo(const MachineBasicBlock *MBB, SlotIndex Idx) { - assert(li_ && "call reset first"); - LiveInterval::iterator I = std::upper_bound(li_->begin(), li_->end(), Idx); - if (I == li_->begin()) + assert(LI && "call reset first"); + LiveInterval::iterator I = std::upper_bound(LI->begin(), LI->end(), Idx); + if (I == LI->begin()) return 0; --I; - if (I->end <= lis_.getMBBStartIdx(MBB)) + if (I->end <= LIS.getMBBStartIdx(MBB)) return 0; if (I->end <= Idx) I->end = Idx.getNextSlot(); return I->valno; } -// addSimpleRange - Add a simple range from parentli_ to li_. +// addSimpleRange - Add a simple range from ParentLI to LI. // ParentVNI must be live in the [Start;End) interval. void LiveIntervalMap::addSimpleRange(SlotIndex Start, SlotIndex End, const VNInfo *ParentVNI) { - assert(li_ && "call reset first"); + assert(LI && "call reset first"); bool simple; VNInfo *VNI = mapValue(ParentVNI, Start, &simple); // A simple mapping is easy. if (simple) { - li_->addRange(LiveRange(Start, End, VNI)); + LI->addRange(LiveRange(Start, End, VNI)); return; } // ParentVNI is a complex value. We must map per MBB. - MachineFunction::iterator MBB = lis_.getMBBFromIndex(Start); - MachineFunction::iterator MBBE = lis_.getMBBFromIndex(End.getPrevSlot()); + MachineFunction::iterator MBB = LIS.getMBBFromIndex(Start); + MachineFunction::iterator MBBE = LIS.getMBBFromIndex(End.getPrevSlot()); if (MBB == MBBE) { - li_->addRange(LiveRange(Start, End, VNI)); + LI->addRange(LiveRange(Start, End, VNI)); return; } // First block. - li_->addRange(LiveRange(Start, lis_.getMBBEndIdx(MBB), VNI)); + LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB), VNI)); // Run sequence of full blocks. for (++MBB; MBB != MBBE; ++MBB) { - Start = lis_.getMBBStartIdx(MBB); - li_->addRange(LiveRange(Start, lis_.getMBBEndIdx(MBB), + Start = LIS.getMBBStartIdx(MBB); + LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB), mapValue(ParentVNI, Start))); } // Final block. - Start = lis_.getMBBStartIdx(MBB); + Start = LIS.getMBBStartIdx(MBB); if (Start != End) - li_->addRange(LiveRange(Start, End, mapValue(ParentVNI, Start))); + LI->addRange(LiveRange(Start, End, mapValue(ParentVNI, Start))); } -/// addRange - Add live ranges to li_ where [Start;End) intersects parentli_. +/// addRange - Add live ranges to LI where [Start;End) intersects ParentLI. /// All needed values whose def is not inside [Start;End) must be defined /// beforehand so mapValue will work. void LiveIntervalMap::addRange(SlotIndex Start, SlotIndex End) { - assert(li_ && "call reset first"); - LiveInterval::const_iterator B = parentli_.begin(), E = parentli_.end(); + assert(LI && "call reset first"); + LiveInterval::const_iterator B = ParentLI.begin(), E = ParentLI.end(); LiveInterval::const_iterator I = std::lower_bound(B, E, Start); // Check if --I begins before Start and overlaps. @@ -727,22 +727,22 @@ VirtRegMap &vrm, MachineDominatorTree &mdt, LiveRangeEdit &edit) - : sa_(sa), lis_(lis), vrm_(vrm), - mri_(vrm.getMachineFunction().getRegInfo()), - tii_(*vrm.getMachineFunction().getTarget().getInstrInfo()), - tri_(*vrm.getMachineFunction().getTarget().getRegisterInfo()), - edit_(edit), - dupli_(lis_, mdt, edit.getParent()), - openli_(lis_, mdt, edit.getParent()) + : sa_(sa), LIS(lis), VRM(vrm), + MRI(vrm.getMachineFunction().getRegInfo()), + TII(*vrm.getMachineFunction().getTarget().getInstrInfo()), + TRI(*vrm.getMachineFunction().getTarget().getRegisterInfo()), + Edit(edit), + DupLI(LIS, mdt, edit.getParent()), + OpenLI(LIS, mdt, edit.getParent()) { // We don't need an AliasAnalysis since we will only be performing // cheap-as-a-copy remats anyway. - edit_.anyRematerializable(lis_, tii_, 0); + Edit.anyRematerializable(LIS, TII, 0); } bool SplitEditor::intervalsLiveAt(SlotIndex Idx) const { - for (LiveRangeEdit::iterator I = edit_.begin(), E = edit_.end(); I != E; ++I) - if (*I != dupli_.getLI() && (*I)->liveAt(Idx)) + for (LiveRangeEdit::iterator I = Edit.begin(), E = Edit.end(); I != E; ++I) + if (*I != DupLI.getLI() && (*I)->liveAt(Idx)) return true; return false; } @@ -758,14 +758,14 @@ // Attempt cheap-as-a-copy rematerialization. LiveRangeEdit::Remat RM(ParentVNI); - if (edit_.canRematerializeAt(RM, UseIdx, true, lis_)) { - Def = edit_.rematerializeAt(MBB, I, Reg.getLI()->reg, RM, - lis_, tii_, tri_); + if (Edit.canRematerializeAt(RM, UseIdx, true, LIS)) { + Def = Edit.rematerializeAt(MBB, I, Reg.getLI()->reg, RM, + LIS, TII, TRI); } else { // Can't remat, just insert a copy from parent. - CopyMI = BuildMI(MBB, I, DebugLoc(), tii_.get(TargetOpcode::COPY), - Reg.getLI()->reg).addReg(edit_.getReg()); - Def = lis_.InsertMachineInstrInMaps(CopyMI).getDefIndex(); + CopyMI = BuildMI(MBB, I, DebugLoc(), TII.get(TargetOpcode::COPY), + Reg.getLI()->reg).addReg(Edit.getReg()); + Def = LIS.InsertMachineInstrInMaps(CopyMI).getDefIndex(); } // Define the value in Reg. @@ -781,121 +781,121 @@ /// Create a new virtual register and live interval. void SplitEditor::openIntv() { - assert(!openli_.getLI() && "Previous LI not closed before openIntv"); - if (!dupli_.getLI()) - dupli_.reset(&edit_.create(mri_, lis_, vrm_)); + assert(!OpenLI.getLI() && "Previous LI not closed before openIntv"); + if (!DupLI.getLI()) + DupLI.reset(&Edit.create(MRI, LIS, VRM)); - openli_.reset(&edit_.create(mri_, lis_, vrm_)); + OpenLI.reset(&Edit.create(MRI, LIS, VRM)); } -/// enterIntvBefore - Enter openli before the instruction at Idx. If curli is +/// enterIntvBefore - Enter OpenLI before the instruction at Idx. If CurLI is /// not live before Idx, a COPY is not inserted. void SplitEditor::enterIntvBefore(SlotIndex Idx) { - assert(openli_.getLI() && "openIntv not called before enterIntvBefore"); + assert(OpenLI.getLI() && "openIntv not called before enterIntvBefore"); Idx = Idx.getUseIndex(); DEBUG(dbgs() << " enterIntvBefore " << Idx); - VNInfo *ParentVNI = edit_.getParent().getVNInfoAt(Idx); + VNInfo *ParentVNI = Edit.getParent().getVNInfoAt(Idx); if (!ParentVNI) { DEBUG(dbgs() << ": not live\n"); return; } DEBUG(dbgs() << ": valno " << ParentVNI->id); truncatedValues.insert(ParentVNI); - MachineInstr *MI = lis_.getInstructionFromIndex(Idx); + MachineInstr *MI = LIS.getInstructionFromIndex(Idx); assert(MI && "enterIntvBefore called with invalid index"); - defFromParent(openli_, ParentVNI, Idx, *MI->getParent(), MI); + defFromParent(OpenLI, ParentVNI, Idx, *MI->getParent(), MI); - DEBUG(dbgs() << ": " << *openli_.getLI() << '\n'); + DEBUG(dbgs() << ": " << *OpenLI.getLI() << '\n'); } -/// enterIntvAtEnd - Enter openli at the end of MBB. +/// enterIntvAtEnd - Enter OpenLI at the end of MBB. void SplitEditor::enterIntvAtEnd(MachineBasicBlock &MBB) { - assert(openli_.getLI() && "openIntv not called before enterIntvAtEnd"); - SlotIndex End = lis_.getMBBEndIdx(&MBB).getPrevSlot(); + assert(OpenLI.getLI() && "openIntv not called before enterIntvAtEnd"); + SlotIndex End = LIS.getMBBEndIdx(&MBB).getPrevSlot(); DEBUG(dbgs() << " enterIntvAtEnd BB#" << MBB.getNumber() << ", " << End); - VNInfo *ParentVNI = edit_.getParent().getVNInfoAt(End); + VNInfo *ParentVNI = Edit.getParent().getVNInfoAt(End); if (!ParentVNI) { DEBUG(dbgs() << ": not live\n"); return; } DEBUG(dbgs() << ": valno " << ParentVNI->id); truncatedValues.insert(ParentVNI); - defFromParent(openli_, ParentVNI, End, MBB, MBB.getFirstTerminator()); - DEBUG(dbgs() << ": " << *openli_.getLI() << '\n'); + defFromParent(OpenLI, ParentVNI, End, MBB, MBB.getFirstTerminator()); + DEBUG(dbgs() << ": " << *OpenLI.getLI() << '\n'); } -/// useIntv - indicate that all instructions in MBB should use openli. +/// useIntv - indicate that all instructions in MBB should use OpenLI. void SplitEditor::useIntv(const MachineBasicBlock &MBB) { - useIntv(lis_.getMBBStartIdx(&MBB), lis_.getMBBEndIdx(&MBB)); + useIntv(LIS.getMBBStartIdx(&MBB), LIS.getMBBEndIdx(&MBB)); } void SplitEditor::useIntv(SlotIndex Start, SlotIndex End) { - assert(openli_.getLI() && "openIntv not called before useIntv"); - openli_.addRange(Start, End); + assert(OpenLI.getLI() && "openIntv not called before useIntv"); + OpenLI.addRange(Start, End); DEBUG(dbgs() << " use [" << Start << ';' << End << "): " - << *openli_.getLI() << '\n'); + << *OpenLI.getLI() << '\n'); } -/// leaveIntvAfter - Leave openli after the instruction at Idx. +/// leaveIntvAfter - Leave OpenLI after the instruction at Idx. void SplitEditor::leaveIntvAfter(SlotIndex Idx) { - assert(openli_.getLI() && "openIntv not called before leaveIntvAfter"); + assert(OpenLI.getLI() && "openIntv not called before leaveIntvAfter"); DEBUG(dbgs() << " leaveIntvAfter " << Idx); // The interval must be live beyond the instruction at Idx. Idx = Idx.getBoundaryIndex(); - VNInfo *ParentVNI = edit_.getParent().getVNInfoAt(Idx); + VNInfo *ParentVNI = Edit.getParent().getVNInfoAt(Idx); if (!ParentVNI) { DEBUG(dbgs() << ": not live\n"); return; } DEBUG(dbgs() << ": valno " << ParentVNI->id); - MachineBasicBlock::iterator MII = lis_.getInstructionFromIndex(Idx); - VNInfo *VNI = defFromParent(dupli_, ParentVNI, Idx, + MachineBasicBlock::iterator MII = LIS.getInstructionFromIndex(Idx); + VNInfo *VNI = defFromParent(DupLI, ParentVNI, Idx, *MII->getParent(), llvm::next(MII)); - // Make sure that openli is properly extended from Idx to the new copy. + // Make sure that OpenLI is properly extended from Idx to the new copy. // FIXME: This shouldn't be necessary for remats. - openli_.addSimpleRange(Idx, VNI->def, ParentVNI); + OpenLI.addSimpleRange(Idx, VNI->def, ParentVNI); - DEBUG(dbgs() << ": " << *openli_.getLI() << '\n'); + DEBUG(dbgs() << ": " << *OpenLI.getLI() << '\n'); } /// leaveIntvAtTop - Leave the interval at the top of MBB. /// Currently, only one value can leave the interval. void SplitEditor::leaveIntvAtTop(MachineBasicBlock &MBB) { - assert(openli_.getLI() && "openIntv not called before leaveIntvAtTop"); - SlotIndex Start = lis_.getMBBStartIdx(&MBB); + assert(OpenLI.getLI() && "openIntv not called before leaveIntvAtTop"); + SlotIndex Start = LIS.getMBBStartIdx(&MBB); DEBUG(dbgs() << " leaveIntvAtTop BB#" << MBB.getNumber() << ", " << Start); - VNInfo *ParentVNI = edit_.getParent().getVNInfoAt(Start); + VNInfo *ParentVNI = Edit.getParent().getVNInfoAt(Start); if (!ParentVNI) { DEBUG(dbgs() << ": not live\n"); return; } - VNInfo *VNI = defFromParent(dupli_, ParentVNI, Start, MBB, + VNInfo *VNI = defFromParent(DupLI, ParentVNI, Start, MBB, MBB.SkipPHIsAndLabels(MBB.begin())); - // Finally we must make sure that openli is properly extended from Start to + // Finally we must make sure that OpenLI is properly extended from Start to // the new copy. - openli_.addSimpleRange(Start, VNI->def, ParentVNI); - DEBUG(dbgs() << ": " << *openli_.getLI() << '\n'); + OpenLI.addSimpleRange(Start, VNI->def, ParentVNI); + DEBUG(dbgs() << ": " << *OpenLI.getLI() << '\n'); } /// closeIntv - Indicate that we are done editing the currently open /// LiveInterval, and ranges can be trimmed. void SplitEditor::closeIntv() { - assert(openli_.getLI() && "openIntv not called before closeIntv"); - DEBUG(dbgs() << " closeIntv " << *openli_.getLI() << '\n'); - openli_.reset(0); + assert(OpenLI.getLI() && "openIntv not called before closeIntv"); + DEBUG(dbgs() << " closeIntv " << *OpenLI.getLI() << '\n'); + OpenLI.reset(0); } /// rewrite - Rewrite all uses of reg to use the new registers. void SplitEditor::rewrite(unsigned reg) { - for (MachineRegisterInfo::reg_iterator RI = mri_.reg_begin(reg), - RE = mri_.reg_end(); RI != RE;) { + for (MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(reg), + RE = MRI.reg_end(); RI != RE;) { MachineOperand &MO = RI.getOperand(); unsigned OpNum = RI.getOperandNo(); MachineInstr *MI = MO.getParent(); @@ -906,10 +906,10 @@ MO.setReg(0); continue; } - SlotIndex Idx = lis_.getInstructionIndex(MI); + SlotIndex Idx = LIS.getInstructionIndex(MI); Idx = MO.isUse() ? Idx.getUseIndex() : Idx.getDefIndex(); LiveInterval *LI = 0; - for (LiveRangeEdit::iterator I = edit_.begin(), E = edit_.end(); I != E; + for (LiveRangeEdit::iterator I = Edit.begin(), E = Edit.end(); I != E; ++I) { LiveInterval *testli = *I; if (testli->liveAt(Idx)) { @@ -932,9 +932,9 @@ typedef std::pair IIPair; SmallVector Iters; - for (LiveRangeEdit::iterator LI = edit_.begin(), LE = edit_.end(); LI != LE; + for (LiveRangeEdit::iterator LI = Edit.begin(), LE = Edit.end(); LI != LE; ++LI) { - if (*LI == dupli_.getLI()) + if (*LI == DupLI.getLI()) continue; LiveInterval::const_iterator I = (*LI)->find(Start); LiveInterval::const_iterator E = (*LI)->end(); @@ -968,7 +968,7 @@ } // Now, [sidx;eidx) doesn't overlap anything in intervals_. if (sidx < eidx) - dupli_.addSimpleRange(sidx, eidx, VNI); + DupLI.addSimpleRange(sidx, eidx, VNI); // If the interval end was truncated, we can try again from next. if (next <= sidx) break; @@ -983,13 +983,13 @@ // If values were partially rematted, we should shrink to uses. // If values were fully rematted, they should be omitted. // FIXME: If a single value is redefined, just move the def and truncate. - LiveInterval &parent = edit_.getParent(); + LiveInterval &parent = Edit.getParent(); DEBUG(dbgs() << "computeRemainder from " << parent << '\n'); // Values that are fully contained in the split intervals. SmallPtrSet deadValues; - // Map all curli values that should have live defs in dupli. + // Map all CurLI values that should have live defs in dupli. for (LiveInterval::const_vni_iterator I = parent.vni_begin(), E = parent.vni_end(); I != E; ++I) { const VNInfo *VNI = *I; @@ -999,15 +999,15 @@ // Original def is contained in the split intervals. if (intervalsLiveAt(VNI->def)) { // Did this value escape? - if (dupli_.isMapped(VNI)) + if (DupLI.isMapped(VNI)) truncatedValues.insert(VNI); else deadValues.insert(VNI); continue; } // Add minimal live range at the definition. - VNInfo *DVNI = dupli_.defValue(VNI, VNI->def); - dupli_.getLI()->addRange(LiveRange(VNI->def, VNI->def.getNextSlot(), DVNI)); + VNInfo *DVNI = DupLI.defValue(VNI, VNI->def); + DupLI.getLI()->addRange(LiveRange(VNI->def, VNI->def.getNextSlot(), DVNI)); } // Add all ranges to dupli. @@ -1019,40 +1019,40 @@ addTruncSimpleRange(LR.start, LR.end, LR.valno); } else if (!deadValues.count(LR.valno)) { // recolor without truncation. - dupli_.addSimpleRange(LR.start, LR.end, LR.valno); + DupLI.addSimpleRange(LR.start, LR.end, LR.valno); } } - // Extend dupli_ to be live out of any critical loop predecessors. + // Extend DupLI to be live out of any critical loop predecessors. // This means we have multiple registers live out of those blocks. // The alternative would be to split the critical edges. if (criticalPreds_.empty()) return; for (SplitAnalysis::BlockPtrSet::iterator I = criticalPreds_.begin(), E = criticalPreds_.end(); I != E; ++I) - dupli_.extendTo(*I, lis_.getMBBEndIdx(*I).getPrevSlot()); + DupLI.extendTo(*I, LIS.getMBBEndIdx(*I).getPrevSlot()); criticalPreds_.clear(); } void SplitEditor::finish() { - assert(!openli_.getLI() && "Previous LI not closed before rewrite"); - assert(dupli_.getLI() && "No dupli for rewrite. Noop spilt?"); + assert(!OpenLI.getLI() && "Previous LI not closed before rewrite"); + assert(DupLI.getLI() && "No dupli for rewrite. Noop spilt?"); // Complete dupli liveness. computeRemainder(); // Get rid of unused values and set phi-kill flags. - for (LiveRangeEdit::iterator I = edit_.begin(), E = edit_.end(); I != E; ++I) - (*I)->RenumberValues(lis_); + for (LiveRangeEdit::iterator I = Edit.begin(), E = Edit.end(); I != E; ++I) + (*I)->RenumberValues(LIS); // Rewrite instructions. - rewrite(edit_.getReg()); + rewrite(Edit.getReg()); // Now check if any registers were separated into multiple components. - ConnectedVNInfoEqClasses ConEQ(lis_); - for (unsigned i = 0, e = edit_.size(); i != e; ++i) { + ConnectedVNInfoEqClasses ConEQ(LIS); + for (unsigned i = 0, e = Edit.size(); i != e; ++i) { // Don't use iterators, they are invalidated by create() below. - LiveInterval *li = edit_.get(i); + LiveInterval *li = Edit.get(i); unsigned NumComp = ConEQ.Classify(li); if (NumComp <= 1) continue; @@ -1060,19 +1060,19 @@ SmallVector dups; dups.push_back(li); for (unsigned i = 1; i != NumComp; ++i) - dups.push_back(&edit_.create(mri_, lis_, vrm_)); + dups.push_back(&Edit.create(MRI, LIS, VRM)); ConEQ.Distribute(&dups[0]); // Rewrite uses to the new regs. rewrite(li->reg); } // Calculate spill weight and allocation hints for new intervals. - VirtRegAuxInfo vrai(vrm_.getMachineFunction(), lis_, sa_.loops_); - for (LiveRangeEdit::iterator I = edit_.begin(), E = edit_.end(); I != E; ++I){ + VirtRegAuxInfo vrai(VRM.getMachineFunction(), LIS, sa_.Loops); + for (LiveRangeEdit::iterator I = Edit.begin(), E = Edit.end(); I != E; ++I){ LiveInterval &li = **I; vrai.CalculateRegClass(li.reg); vrai.CalculateWeightAndHint(li); - DEBUG(dbgs() << " new interval " << mri_.getRegClass(li.reg)->getName() + DEBUG(dbgs() << " new interval " << MRI.getRegClass(li.reg)->getName() << ":" << li << '\n'); } } @@ -1102,7 +1102,7 @@ openIntv(); // Insert copies in the predecessors if live-in to the header. - if (lis_.isLiveInToMBB(edit_.getParent(), Loop->getHeader())) { + if (LIS.isLiveInToMBB(Edit.getParent(), Loop->getHeader())) { for (SplitAnalysis::BlockPtrSet::iterator I = Blocks.Preds.begin(), E = Blocks.Preds.end(); I != E; ++I) { MachineBasicBlock &MBB = const_cast(**I); @@ -1132,27 +1132,27 @@ // Single Block Splitting //===----------------------------------------------------------------------===// -/// getMultiUseBlocks - if curli has more than one use in a basic block, it -/// may be an advantage to split curli for the duration of the block. +/// getMultiUseBlocks - if CurLI has more than one use in a basic block, it +/// may be an advantage to split CurLI for the duration of the block. bool SplitAnalysis::getMultiUseBlocks(BlockPtrSet &Blocks) { - // If curli is local to one block, there is no point to splitting it. - if (usingBlocks_.size() <= 1) + // If CurLI is local to one block, there is no point to splitting it. + if (UsingBlocks.size() <= 1) return false; // Add blocks with multiple uses. - for (BlockCountMap::iterator I = usingBlocks_.begin(), E = usingBlocks_.end(); + for (BlockCountMap::iterator I = UsingBlocks.begin(), E = UsingBlocks.end(); I != E; ++I) switch (I->second) { case 0: case 1: continue; case 2: { - // When there are only two uses and curli is both live in and live out, + // When there are only two uses and CurLI is both live in and live out, // we don't really win anything by isolating the block since we would be // inserting two copies. // The remaing register would still have two uses in the block. (Unless it // separates into disconnected components). - if (lis_.isLiveInToMBB(*curli_, I->first) && - lis_.isLiveOutOfMBB(*curli_, I->first)) + if (LIS.isLiveInToMBB(*CurLI, I->first) && + LIS.isLiveOutOfMBB(*CurLI, I->first)) continue; } // Fall through. default: @@ -1161,20 +1161,20 @@ return !Blocks.empty(); } -/// splitSingleBlocks - Split curli into a separate live interval inside each +/// splitSingleBlocks - Split CurLI into a separate live interval inside each /// basic block in Blocks. void SplitEditor::splitSingleBlocks(const SplitAnalysis::BlockPtrSet &Blocks) { DEBUG(dbgs() << " splitSingleBlocks for " << Blocks.size() << " blocks.\n"); - // Determine the first and last instruction using curli in each block. + // Determine the first and last instruction using CurLI in each block. typedef std::pair IndexPair; typedef DenseMap IndexPairMap; IndexPairMap MBBRange; - for (SplitAnalysis::InstrPtrSet::const_iterator I = sa_.usingInstrs_.begin(), - E = sa_.usingInstrs_.end(); I != E; ++I) { + for (SplitAnalysis::InstrPtrSet::const_iterator I = sa_.UsingInstrs.begin(), + E = sa_.UsingInstrs.end(); I != E; ++I) { const MachineBasicBlock *MBB = (*I)->getParent(); if (!Blocks.count(MBB)) continue; - SlotIndex Idx = lis_.getInstructionIndex(*I); + SlotIndex Idx = LIS.getInstructionIndex(*I); DEBUG(dbgs() << " BB#" << MBB->getNumber() << '\t' << Idx << '\t' << **I); IndexPair &IP = MBBRange[MBB]; if (!IP.first.isValid() || Idx < IP.first) @@ -1205,29 +1205,29 @@ // Sub Block Splitting //===----------------------------------------------------------------------===// -/// getBlockForInsideSplit - If curli is contained inside a single basic block, +/// getBlockForInsideSplit - If CurLI is contained inside a single basic block, /// and it wou pay to subdivide the interval inside that block, return it. /// Otherwise return NULL. The returned block can be passed to /// SplitEditor::splitInsideBlock. const MachineBasicBlock *SplitAnalysis::getBlockForInsideSplit() { // The interval must be exclusive to one block. - if (usingBlocks_.size() != 1) + if (UsingBlocks.size() != 1) return 0; // Don't to this for less than 4 instructions. We want to be sure that // splitting actually reduces the instruction count per interval. - if (usingInstrs_.size() < 4) + if (UsingInstrs.size() < 4) return 0; - return usingBlocks_.begin()->first; + return UsingBlocks.begin()->first; } -/// splitInsideBlock - Split curli into multiple intervals inside MBB. +/// splitInsideBlock - Split CurLI into multiple intervals inside MBB. void SplitEditor::splitInsideBlock(const MachineBasicBlock *MBB) { SmallVector Uses; - Uses.reserve(sa_.usingInstrs_.size()); - for (SplitAnalysis::InstrPtrSet::const_iterator I = sa_.usingInstrs_.begin(), - E = sa_.usingInstrs_.end(); I != E; ++I) + Uses.reserve(sa_.UsingInstrs.size()); + for (SplitAnalysis::InstrPtrSet::const_iterator I = sa_.UsingInstrs.begin(), + E = sa_.UsingInstrs.end(); I != E; ++I) if ((*I)->getParent() == MBB) - Uses.push_back(lis_.getInstructionIndex(*I)); + Uses.push_back(LIS.getInstructionIndex(*I)); DEBUG(dbgs() << " splitInsideBlock BB#" << MBB->getNumber() << " for " << Uses.size() << " instructions.\n"); assert(Uses.size() >= 3 && "Need at least 3 instructions"); Modified: llvm/trunk/lib/CodeGen/SplitKit.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SplitKit.h?rev=124257&r1=124256&r2=124257&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SplitKit.h (original) +++ llvm/trunk/lib/CodeGen/SplitKit.h Tue Jan 25 18:50:53 2011 @@ -41,31 +41,31 @@ /// opportunities. class SplitAnalysis { public: - const MachineFunction &mf_; - const LiveIntervals &lis_; - const MachineLoopInfo &loops_; - const TargetInstrInfo &tii_; + const MachineFunction &MF; + const LiveIntervals &LIS; + const MachineLoopInfo &Loops; + const TargetInstrInfo &TII; // Instructions using the the current register. typedef SmallPtrSet InstrPtrSet; - InstrPtrSet usingInstrs_; + InstrPtrSet UsingInstrs; // Sorted slot indexes of using instructions. SmallVector UseSlots; - // The number of instructions using curli in each basic block. + // The number of instructions using CurLI in each basic block. typedef DenseMap BlockCountMap; - BlockCountMap usingBlocks_; + BlockCountMap UsingBlocks; - // The number of basic block using curli in each loop. + // The number of basic block using CurLI in each loop. typedef DenseMap LoopCountMap; - LoopCountMap usingLoops_; + LoopCountMap UsingLoops; private: // Current live interval. - const LiveInterval *curli_; + const LiveInterval *CurLI; - // Sumarize statistics by counting instructions using curli_. + // Sumarize statistics by counting instructions using CurLI. void analyzeUses(); /// canAnalyzeBranch - Return true if MBB ends in a branch that can be @@ -76,7 +76,7 @@ SplitAnalysis(const MachineFunction &mf, const LiveIntervals &lis, const MachineLoopInfo &mli); - /// analyze - set curli to the specified interval, and analyze how it may be + /// analyze - set CurLI to the specified interval, and analyze how it may be /// split. void analyze(const LiveInterval *li); @@ -84,9 +84,9 @@ /// new interval. void clear(); - /// hasUses - Return true if MBB has any uses of curli. + /// hasUses - Return true if MBB has any uses of CurLI. bool hasUses(const MachineBasicBlock *MBB) const { - return usingBlocks_.lookup(MBB); + return UsingBlocks.lookup(MBB); } typedef SmallPtrSet BlockPtrSet; @@ -123,12 +123,12 @@ OutsideLoop // Uses outside loop periphery. }; - /// analyzeLoopPeripheralUse - Return an enum describing how curli_ is used in + /// analyzeLoopPeripheralUse - Return an enum describing how CurLI is used in /// and around the Loop. LoopPeripheralUse analyzeLoopPeripheralUse(const LoopBlocks&); /// getCriticalExits - It may be necessary to partially break critical edges - /// leaving the loop if an exit block has phi uses of curli. Collect the exit + /// leaving the loop if an exit block has phi uses of CurLI. Collect the exit /// blocks that need special treatment into CriticalExits. void getCriticalExits(const LoopBlocks &Blocks, BlockPtrSet &CriticalExits); @@ -138,19 +138,19 @@ BlockPtrSet &CriticalExits); /// getCriticalPreds - Get the set of loop predecessors with critical edges to - /// blocks outside the loop that have curli live in. We don't have to break + /// blocks outside the loop that have CurLI live in. We don't have to break /// these edges, but they do require special treatment. void getCriticalPreds(const LoopBlocks &Blocks, BlockPtrSet &CriticalPreds); - /// getSplitLoops - Get the set of loops that have curli uses and would be + /// getSplitLoops - Get the set of loops that have CurLI uses and would be /// profitable to split. void getSplitLoops(LoopPtrSet&); - /// getBestSplitLoop - Return the loop where curli may best be split to a + /// getBestSplitLoop - Return the loop where CurLI may best be split to a /// separate register, or NULL. const MachineLoop *getBestSplitLoop(); - /// isBypassLoop - Return true if curli is live through Loop and has no uses + /// isBypassLoop - Return true if CurLI is live through Loop and has no uses /// inside the loop. Bypass loops are candidates for splitting because it can /// prevent interference inside the loop. bool isBypassLoop(const MachineLoop *Loop); @@ -160,13 +160,13 @@ void getBypassLoops(LoopPtrSet&); /// getMultiUseBlocks - Add basic blocks to Blocks that may benefit from - /// having curli split to a new live interval. Return true if Blocks can be + /// having CurLI split to a new live interval. Return true if Blocks can be /// passed to SplitEditor::splitSingleBlocks. bool getMultiUseBlocks(BlockPtrSet &Blocks); - /// getBlockForInsideSplit - If curli is contained inside a single basic block, - /// and it wou pay to subdivide the interval inside that block, return it. - /// Otherwise return NULL. The returned block can be passed to + /// getBlockForInsideSplit - If CurLI is contained inside a single basic + /// block, and it would pay to subdivide the interval inside that block, + /// return it. Otherwise return NULL. The returned block can be passed to /// SplitEditor::splitInsideBlock. const MachineBasicBlock *getBlockForInsideSplit(); }; @@ -176,45 +176,45 @@ /// interval that is a subset. Insert phi-def values as needed. This class is /// used by SplitEditor to create new smaller LiveIntervals. /// -/// parentli_ is the larger interval, li_ is the subset interval. Every value -/// in li_ corresponds to exactly one value in parentli_, and the live range -/// of the value is contained within the live range of the parentli_ value. -/// Values in parentli_ may map to any number of openli_ values, including 0. +/// ParentLI is the larger interval, LI is the subset interval. Every value +/// in LI corresponds to exactly one value in ParentLI, and the live range +/// of the value is contained within the live range of the ParentLI value. +/// Values in ParentLI may map to any number of OpenLI values, including 0. class LiveIntervalMap { - LiveIntervals &lis_; - MachineDominatorTree &mdt_; + LiveIntervals &LIS; + MachineDominatorTree &MDT; // The parent interval is never changed. - const LiveInterval &parentli_; + const LiveInterval &ParentLI; - // The child interval's values are fully contained inside parentli_ values. - LiveInterval *li_; + // The child interval's values are fully contained inside ParentLI values. + LiveInterval *LI; typedef DenseMap ValueMap; - // Map parentli_ values to simple values in li_ that are defined at the same - // SlotIndex, or NULL for parentli_ values that have complex li_ defs. + // Map ParentLI values to simple values in LI that are defined at the same + // SlotIndex, or NULL for ParentLI values that have complex LI defs. // Note there is a difference between values mapping to NULL (complex), and // values not present (unknown/unmapped). - ValueMap valueMap_; + ValueMap Values; typedef std::pair LiveOutPair; typedef DenseMap LiveOutMap; - // liveOutCache_ - Map each basic block where li_ is live out to the live-out + // LiveOutCache - Map each basic block where LI is live out to the live-out // value and its defining block. One of these conditions shall be true: // - // 1. !liveOutCache_.count(MBB) - // 2. liveOutCache_[MBB].second.getNode() == MBB - // 3. forall P in preds(MBB): liveOutCache_[P] == liveOutCache_[MBB] + // 1. !LiveOutCache.count(MBB) + // 2. LiveOutCache[MBB].second.getNode() == MBB + // 3. forall P in preds(MBB): LiveOutCache[P] == LiveOutCache[MBB] // // This is only a cache, the values can be computed as: // - // VNI = li_->getVNInfoAt(lis_.getMBBEndIdx(MBB)) - // Node = mbt_[lis_.getMBBFromIndex(VNI->def)] + // VNI = LI->getVNInfoAt(LIS.getMBBEndIdx(MBB)) + // Node = mbt_[LIS.getMBBFromIndex(VNI->def)] // // The cache is also used as a visiteed set by mapValue(). - LiveOutMap liveOutCache_; + LiveOutMap LiveOutCache; // Dump the live-out cache to dbgs(). void dumpCache(); @@ -223,32 +223,32 @@ LiveIntervalMap(LiveIntervals &lis, MachineDominatorTree &mdt, const LiveInterval &parentli) - : lis_(lis), mdt_(mdt), parentli_(parentli), li_(0) {} + : LIS(lis), MDT(mdt), ParentLI(parentli), LI(0) {} /// reset - clear all data structures and start a new live interval. void reset(LiveInterval *); /// getLI - return the current live interval. - LiveInterval *getLI() const { return li_; } + LiveInterval *getLI() const { return LI; } - /// defValue - define a value in li_ from the parentli_ value VNI and Idx. + /// defValue - define a value in LI from the ParentLI value VNI and Idx. /// Idx does not have to be ParentVNI->def, but it must be contained within - /// ParentVNI's live range in parentli_. - /// Return the new li_ value. + /// ParentVNI's live range in ParentLI. + /// Return the new LI value. VNInfo *defValue(const VNInfo *ParentVNI, SlotIndex Idx); - /// mapValue - map ParentVNI to the corresponding li_ value at Idx. It is + /// mapValue - map ParentVNI to the corresponding LI value at Idx. It is /// assumed that ParentVNI is live at Idx. /// If ParentVNI has not been defined by defValue, it is assumed that /// ParentVNI->def dominates Idx. /// If ParentVNI has been defined by defValue one or more times, a value that /// dominates Idx will be returned. This may require creating extra phi-def - /// values and adding live ranges to li_. + /// values and adding live ranges to LI. /// If simple is not NULL, *simple will indicate if ParentVNI is a simply /// mapped value. VNInfo *mapValue(const VNInfo *ParentVNI, SlotIndex Idx, bool *simple = 0); - // extendTo - Find the last li_ value defined in MBB at or before Idx. The + // extendTo - Find the last LI value defined in MBB at or before Idx. The // parentli is assumed to be live at Idx. Extend the live range to include // Idx. Return the found VNInfo, or NULL. VNInfo *extendTo(const MachineBasicBlock *MBB, SlotIndex Idx); @@ -256,18 +256,18 @@ /// isMapped - Return true is ParentVNI is a known mapped value. It may be a /// simple 1-1 mapping or a complex mapping to later defs. bool isMapped(const VNInfo *ParentVNI) const { - return valueMap_.count(ParentVNI); + return Values.count(ParentVNI); } /// isComplexMapped - Return true if ParentVNI has received new definitions /// with defValue. bool isComplexMapped(const VNInfo *ParentVNI) const; - // addSimpleRange - Add a simple range from parentli_ to li_. + // addSimpleRange - Add a simple range from ParentLI to LI. // ParentVNI must be live in the [Start;End) interval. void addSimpleRange(SlotIndex Start, SlotIndex End, const VNInfo *ParentVNI); - /// addRange - Add live ranges to li_ where [Start;End) intersects parentli_. + /// addRange - Add live ranges to LI where [Start;End) intersects ParentLI. /// All needed values whose def is not inside [Start;End) must be defined /// beforehand so mapValue will work. void addRange(SlotIndex Start, SlotIndex End); @@ -287,22 +287,22 @@ /// class SplitEditor { SplitAnalysis &sa_; - LiveIntervals &lis_; - VirtRegMap &vrm_; - MachineRegisterInfo &mri_; - const TargetInstrInfo &tii_; - const TargetRegisterInfo &tri_; + LiveIntervals &LIS; + VirtRegMap &VRM; + MachineRegisterInfo &MRI; + const TargetInstrInfo &TII; + const TargetRegisterInfo &TRI; - /// edit_ - The current parent register and new intervals created. - LiveRangeEdit &edit_; + /// Edit - The current parent register and new intervals created. + LiveRangeEdit &Edit; - /// dupli_ - Created as a copy of curli_, ranges are carved out as new + /// DupLI - Created as a copy of CurLI, ranges are carved out as new /// intervals get added through openIntv / closeIntv. This is used to avoid - /// editing curli_. - LiveIntervalMap dupli_; + /// editing CurLI. + LiveIntervalMap DupLI; /// Currently open LiveInterval. - LiveIntervalMap openli_; + LiveIntervalMap OpenLI; /// defFromParent - Define Reg from ParentVNI at UseIdx using either /// rematerialization or a COPY from parent. Return the new value. @@ -315,15 +315,15 @@ /// intervalsLiveAt - Return true if any member of intervals_ is live at Idx. bool intervalsLiveAt(SlotIndex Idx) const; - /// Values in curli whose live range has been truncated when entering an open + /// Values in CurLI whose live range has been truncated when entering an open /// li. SmallPtrSet truncatedValues; - /// addTruncSimpleRange - Add the given simple range to dupli_ after + /// addTruncSimpleRange - Add the given simple range to DupLI after /// truncating any overlap with intervals_. void addTruncSimpleRange(SlotIndex Start, SlotIndex End, VNInfo *VNI); - /// criticalPreds_ - Set of basic blocks where both dupli and openli should be + /// criticalPreds_ - Set of basic blocks where both dupli and OpenLI should be /// live out because of a critical edge. SplitAnalysis::BlockPtrSet criticalPreds_; @@ -346,20 +346,20 @@ /// Create a new virtual register and live interval. void openIntv(); - /// enterIntvBefore - Enter openli before the instruction at Idx. If curli is + /// enterIntvBefore - Enter OpenLI before the instruction at Idx. If CurLI is /// not live before Idx, a COPY is not inserted. void enterIntvBefore(SlotIndex Idx); - /// enterIntvAtEnd - Enter openli at the end of MBB. + /// enterIntvAtEnd - Enter OpenLI at the end of MBB. void enterIntvAtEnd(MachineBasicBlock &MBB); - /// useIntv - indicate that all instructions in MBB should use openli. + /// useIntv - indicate that all instructions in MBB should use OpenLI. void useIntv(const MachineBasicBlock &MBB); - /// useIntv - indicate that all instructions in range should use openli. + /// useIntv - indicate that all instructions in range should use OpenLI. void useIntv(SlotIndex Start, SlotIndex End); - /// leaveIntvAfter - Leave openli after the instruction at Idx. + /// leaveIntvAfter - Leave OpenLI after the instruction at Idx. void leaveIntvAfter(SlotIndex Idx); /// leaveIntvAtTop - Leave the interval at the top of MBB. @@ -376,15 +376,15 @@ // ===--- High level methods ---=== - /// splitAroundLoop - Split curli into a separate live interval inside + /// splitAroundLoop - Split CurLI into a separate live interval inside /// the loop. void splitAroundLoop(const MachineLoop*); - /// splitSingleBlocks - Split curli into a separate live interval inside each + /// splitSingleBlocks - Split CurLI into a separate live interval inside each /// basic block in Blocks. void splitSingleBlocks(const SplitAnalysis::BlockPtrSet &Blocks); - /// splitInsideBlock - Split curli into multiple intervals inside MBB. + /// splitInsideBlock - Split CurLI into multiple intervals inside MBB. void splitInsideBlock(const MachineBasicBlock *); }; From echristo at apple.com Tue Jan 25 19:10:00 2011 From: echristo at apple.com (Eric Christopher) Date: Wed, 26 Jan 2011 01:10:00 -0000 Subject: [llvm-commits] [llvm] r124260 - /llvm/trunk/lib/Analysis/InlineCost.cpp Message-ID: <20110126011000.1844C2A6C12C@llvm.org> Author: echristo Date: Tue Jan 25 19:09:59 2011 New Revision: 124260 URL: http://llvm.org/viewvc/llvm-project?rev=124260&view=rev Log: Coding style formatting changes. Modified: llvm/trunk/lib/Analysis/InlineCost.cpp Modified: llvm/trunk/lib/Analysis/InlineCost.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/InlineCost.cpp?rev=124260&r1=124259&r2=124260&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/InlineCost.cpp (original) +++ llvm/trunk/lib/Analysis/InlineCost.cpp Tue Jan 25 19:09:59 2011 @@ -343,12 +343,9 @@ if (CalleeFI->Metrics.NumBlocks == 0) CalleeFI->analyzeFunction(Callee); - - for (unsigned i = 0, s = SpecializedArgNos.size(); - i < s; ++i ) - { + for (unsigned i = 0, s = SpecializedArgNos.size(); i < s; ++i ) Bonus += CalleeFI->ArgumentWeights[SpecializedArgNos[i]].ConstantBonus; - } + // Calls usually take a long time, so they make the specialization gain // smaller. Bonus -= CalleeFI->Metrics.NumCalls * InlineConstants::CallPenalty; @@ -514,9 +511,7 @@ // away with the given arguments replaced by constants. for (SmallVectorImpl::iterator an = SpecializedArgNos.begin(), ae = SpecializedArgNos.end(); an != ae; ++an) - { Cost -= CalleeFI->ArgumentWeights[*an].ConstantWeight; - } return llvm::InlineCost::get(Cost); } From carl.norum at apple.com Tue Jan 25 19:23:49 2011 From: carl.norum at apple.com (Carl Norum) Date: Tue, 25 Jan 2011 17:23:49 -0800 Subject: [llvm-commits] Patches to build EFI with clang/llvm In-Reply-To: References: <9D168FAF-67BF-414A-A0B4-D06D146A620B@apple.com> Message-ID: On Jan 25, 2011, at 4:47 PM, Jakob Stoklund Olesen wrote: > On Jan 25, 2011, at 4:37 PM, Carl Norum wrote: >> On Jan 25, 2011, at 4:32 PM, Jakob Stoklund Olesen wrote: >>> Could you separate the Mach-O related changes from the Win64 tail call fixes, please? >> >> I'll see what I can do. > > Thanks! MachO-related changes are attached as "macho.patch". I think I cleared out all the tail-call stuff correctly. >>> Takumi recently submitted a patch to do the exact same thing. I think he managed to avoid the new instructions. I think his solution was better, assuming it works for you. >> >> It very well might; I sort of inherited this code, so I'll have to dig around a bit before figuring that all out. Has that patch gone into TOT, and if not, where can I get it from? > > I think this was his latest attempt: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20110110/115159.html > The changes haven't been committed, AFAIK. This patch worked great here - I haven't done exhaustive testing, but I could build EFI and boot/sleep/wake a couple of machines with the resulting binaries. Is it expected that these patches will get committed sometime in the near future? Let me know what you think about the attached Mach-O patches! -- Carl -------------- next part -------------- An HTML attachment was scrubbed... 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URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110125/2e4bc85b/attachment-0001.html From geek4civic at gmail.com Tue Jan 25 19:27:58 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Wed, 26 Jan 2011 01:27:58 -0000 Subject: [llvm-commits] [llvm] r124267 - /llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp Message-ID: <20110126012758.29BD22A6C12C@llvm.org> Author: chapuni Date: Tue Jan 25 19:27:58 2011 New Revision: 124267 URL: http://llvm.org/viewvc/llvm-project?rev=124267&view=rev Log: lib/Target/X86/X86RegisterInfo.cpp: Fix a typo in comment. Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp?rev=124267&r1=124266&r2=124267&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp Tue Jan 25 19:27:58 2011 @@ -316,7 +316,7 @@ if (TM.getSubtarget().is64Bit()) return &X86::GR64RegClass; return &X86::GR32RegClass; - case 1: // Normal GRPs except the stack pointer (for encoding reasons). + case 1: // Normal GPRs except the stack pointer (for encoding reasons). if (TM.getSubtarget().is64Bit()) return &X86::GR64_NOSPRegClass; return &X86::GR32_NOSPRegClass; From geek4civic at gmail.com Tue Jan 25 19:28:06 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Wed, 26 Jan 2011 01:28:06 -0000 Subject: [llvm-commits] [llvm] r124268 - /llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp Message-ID: <20110126012806.C87B32A6C12C@llvm.org> Author: chapuni Date: Tue Jan 25 19:28:06 2011 New Revision: 124268 URL: http://llvm.org/viewvc/llvm-project?rev=124268&view=rev Log: lib/Target/X86/X86RegisterInfo.cpp: Fix whitespace. Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp?rev=124268&r1=124267&r2=124268&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp Tue Jan 25 19:28:06 2011 @@ -445,11 +445,11 @@ if (0 && requiresRealignment && MFI->hasVarSizedObjects()) report_fatal_error( "Stack realignment in presense of dynamic allocas is not supported"); - + // If we've requested that we force align the stack do so now. if (ForceStackAlign) return canRealignStack(MF); - + return requiresRealignment && canRealignStack(MF); } @@ -524,7 +524,7 @@ // Factor out the amount the callee already popped. Amount -= CalleeAmt; - + if (Amount) { unsigned Opc = getADDriOpcode(Is64Bit, Amount); New = BuildMI(MF, DL, TII.get(Opc), StackPtr) From stoklund at 2pi.dk Tue Jan 25 19:40:09 2011 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Tue, 25 Jan 2011 17:40:09 -0800 Subject: [llvm-commits] Patches to build EFI with clang/llvm In-Reply-To: References: <9D168FAF-67BF-414A-A0B4-D06D146A620B@apple.com> Message-ID: On Jan 25, 2011, at 5:23 PM, Carl Norum wrote: >>>> Takumi recently submitted a patch to do the exact same thing. I think he managed to avoid the new instructions. I think his solution was better, assuming it works for you. >>> >>> It very well might; I sort of inherited this code, so I'll have to dig around a bit before figuring that all out. Has that patch gone into TOT, and if not, where can I get it from? >> >> I think this was his latest attempt: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20110110/115159.html >> The changes haven't been committed, AFAIK. > > This patch worked great here - I haven't done exhaustive testing, but I could build EFI and boot/sleep/wake a couple of machines with the resulting binaries. Is it expected that these patches will get committed sometime in the near future? Takumi? > Let me know what you think about the attached Mach-O patches! Somebody else should look at those. Some of the conditionals look suspicious: > + if (Subtarget->isTargetDarwin() || Subtarget->isTargetMacho()) { > if (is64Bit) > return new X8664_MachoTargetObjectFile(); > return new TargetLoweringObjectFileMachO(); Should that be just Subtarget->isTargetMacho()? > - if (TM.getSubtarget().isTargetCOFF()) > + if (Subtarget->isTargetCOFF() && !Subtarget->isTargetMacho()) Can COFF and Macho be true at the same time? /jakob -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110125/3a0fd116/attachment.html -------------- next part -------------- A non-text attachment was scrubbed... Name: smime.p7s Type: application/pkcs7-signature Size: 1929 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110125/3a0fd116/attachment.bin From carl.norum at apple.com Tue Jan 25 19:43:56 2011 From: carl.norum at apple.com (Carl Norum) Date: Tue, 25 Jan 2011 17:43:56 -0800 Subject: [llvm-commits] Patches to build EFI with clang/llvm In-Reply-To: References: <9D168FAF-67BF-414A-A0B4-D06D146A620B@apple.com> Message-ID: On Jan 25, 2011, at 5:40 PM, Jakob Stoklund Olesen wrote: > On Jan 25, 2011, at 5:23 PM, Carl Norum wrote: >>>>> Takumi recently submitted a patch to do the exact same thing. I think he managed to avoid the new instructions. I think his solution was better, assuming it works for you. >>>> >>>> It very well might; I sort of inherited this code, so I'll have to dig around a bit before figuring that all out. Has that patch gone into TOT, and if not, where can I get it from? >>> >>> I think this was his latest attempt: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20110110/115159.html >>> The changes haven't been committed, AFAIK. >> >> This patch worked great here - I haven't done exhaustive testing, but I could build EFI and boot/sleep/wake a couple of machines with the resulting binaries. Is it expected that these patches will get committed sometime in the near future? > > Takumi? > >> Let me know what you think about the attached Mach-O patches! > > Somebody else should look at those. > > Some of the conditionals look suspicious: > >> + if (Subtarget->isTargetDarwin() || Subtarget->isTargetMacho()) { >> if (is64Bit) >> return new X8664_MachoTargetObjectFile(); >> return new TargetLoweringObjectFileMachO(); > > Should that be just Subtarget->isTargetMacho()? > >> - if (TM.getSubtarget().isTargetCOFF()) >> + if (Subtarget->isTargetCOFF() && !Subtarget->isTargetMacho()) > > Can COFF and Macho be true at the same time? I think the triple we're using confuses a lot of things. Our output is Win32 ABI in Mach-O objects, so for our case, isTargetDarwin() is not true, but isTargetMacho() is true; it is probably the case that anything that says isTargetDarwin() is true will also return true for isTargetMachO(), though. I guess because we have win32 in our triple (x86_64-pc-win32-macho) that somehow isTargetCOFF() is returning true. I'll have to dig in there and see what's up with that. -- Carl From geek4civic at gmail.com Tue Jan 25 20:03:37 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Wed, 26 Jan 2011 02:03:37 -0000 Subject: [llvm-commits] [llvm] r124270 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86InstrCompiler.td lib/Target/X86/X86InstrControl.td lib/Target/X86/X86InstrInfo.cpp lib/Target/X86/X86InstrInfo.td lib/Target/X86/X86RegisterInfo.td test/CodeGen/X86/tailcallstack64.ll utils/TableGen/CodeGenInstruction.cpp Message-ID: <20110126020338.01A842A6C12C@llvm.org> Author: chapuni Date: Tue Jan 25 20:03:37 2011 New Revision: 124270 URL: http://llvm.org/viewvc/llvm-project?rev=124270&view=rev Log: Fix whitespace. Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp llvm/trunk/lib/Target/X86/X86InstrCompiler.td llvm/trunk/lib/Target/X86/X86InstrControl.td llvm/trunk/lib/Target/X86/X86InstrInfo.cpp llvm/trunk/lib/Target/X86/X86InstrInfo.td llvm/trunk/lib/Target/X86/X86RegisterInfo.td llvm/trunk/test/CodeGen/X86/tailcallstack64.ll llvm/trunk/utils/TableGen/CodeGenInstruction.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=124270&r1=124269&r2=124270&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Jan 25 20:03:37 2011 @@ -69,7 +69,7 @@ return new X8664_MachoTargetObjectFile(); return new TargetLoweringObjectFileMachO(); } - + if (TM.getSubtarget().isTargetELF() ){ if (is64Bit) return new X8664_ELFTargetObjectFile(TM); @@ -256,7 +256,7 @@ setOperationAction(ISD::UDIV, VT, Expand); setOperationAction(ISD::SREM, VT, Expand); setOperationAction(ISD::UREM, VT, Expand); - + // Add/Sub overflow ops with MVT::Glues are lowered to EFLAGS dependences. setOperationAction(ISD::ADDC, VT, Custom); setOperationAction(ISD::ADDE, VT, Custom); @@ -369,7 +369,7 @@ setOperationAction(ISD::ATOMIC_CMP_SWAP, VT, Custom); setOperationAction(ISD::ATOMIC_LOAD_SUB, VT, Custom); } - + if (!Subtarget->is64Bit()) { setOperationAction(ISD::ATOMIC_LOAD_ADD, MVT::i64, Custom); setOperationAction(ISD::ATOMIC_LOAD_SUB, MVT::i64, Custom); @@ -931,7 +931,7 @@ // We want to custom lower some of our intrinsics. setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom); - + // Only custom-lower 64-bit SADDO and friends on 64-bit because we don't // handle type legalization for these operations here. // @@ -948,7 +948,7 @@ setOperationAction(ISD::SMULO, VT, Custom); setOperationAction(ISD::UMULO, VT, Custom); } - + // There are no 8-bit 3-address imul/mul instructions setOperationAction(ISD::SMULO, MVT::i8, Expand); setOperationAction(ISD::UMULO, MVT::i8, Expand); @@ -6198,7 +6198,7 @@ // TLSCALL will be codegen'ed as call. Inform MFI that function has calls. MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); MFI->setAdjustsStack(true); - + // And our return value (tls address) is in the standard call return value // location. unsigned Reg = Subtarget->is64Bit() ? X86::RAX : X86::EAX; @@ -7047,7 +7047,7 @@ (cast(Op1)->getZExtValue() == 1 || cast(Op1)->isNullValue()) && (CC == ISD::SETEQ || CC == ISD::SETNE)) { - + // If the input is a setcc, then reuse the input setcc or use a new one with // the inverted condition. if (Op0.getOpcode() == X86ISD::SETCC) { @@ -7055,7 +7055,7 @@ bool Invert = (CC == ISD::SETNE) ^ cast(Op1)->isNullValue(); if (!Invert) return Op0; - + CCode = X86::GetOppositeBranchCondition(CCode); return DAG.getNode(X86ISD::SETCC, dl, MVT::i8, DAG.getConstant(CCode, MVT::i8), Op0.getOperand(1)); @@ -7206,7 +7206,7 @@ if (Op.getResNo() == 2 && Opc == X86ISD::UMUL) return true; - + return false; } @@ -7242,24 +7242,24 @@ Cond.getOperand(1).getOpcode() == X86ISD::CMP && isZero(Cond.getOperand(1).getOperand(1))) { SDValue Cmp = Cond.getOperand(1); - + unsigned CondCode =cast(Cond.getOperand(0))->getZExtValue(); - - if ((isAllOnes(Op1) || isAllOnes(Op2)) && + + if ((isAllOnes(Op1) || isAllOnes(Op2)) && (CondCode == X86::COND_E || CondCode == X86::COND_NE)) { SDValue Y = isAllOnes(Op2) ? Op1 : Op2; SDValue CmpOp0 = Cmp.getOperand(0); Cmp = DAG.getNode(X86ISD::CMP, DL, MVT::i32, CmpOp0, DAG.getConstant(1, CmpOp0.getValueType())); - + SDValue Res = // Res = 0 or -1. DAG.getNode(X86ISD::SETCC_CARRY, DL, Op.getValueType(), DAG.getConstant(X86::COND_B, MVT::i8), Cmp); - + if (isAllOnes(Op1) != (CondCode == X86::COND_E)) Res = DAG.getNOT(DL, Res, Res.getValueType()); - + ConstantSDNode *N2C = dyn_cast(Op2); if (N2C == 0 || !N2C->isNullValue()) Res = DAG.getNode(ISD::OR, DL, Res.getValueType(), Res, Y); @@ -8443,7 +8443,7 @@ Op = DAG.getNode(ISD::ADD, dl, VT, Op, Op); // return pblendv(r, r+r, a); - R = DAG.getNode(X86ISD::PBLENDVB, dl, VT, + R = DAG.getNode(X86ISD::PBLENDVB, dl, VT, R, DAG.getNode(ISD::ADD, dl, VT, R, R), Op); return R; } @@ -8503,12 +8503,12 @@ SDVTList VTs = DAG.getVTList(N->getValueType(0), N->getValueType(0), MVT::i32); SDValue Sum = DAG.getNode(X86ISD::UMUL, DL, VTs, LHS, RHS); - + SDValue SetCC = DAG.getNode(X86ISD::SETCC, DL, MVT::i8, DAG.getConstant(X86::COND_O, MVT::i32), SDValue(Sum.getNode(), 2)); - + DAG.ReplaceAllUsesOfValueWith(SDValue(N, 1), SetCC); return Sum; } @@ -8663,9 +8663,9 @@ // Let legalize expand this if it isn't a legal type yet. if (!DAG.getTargetLoweringInfo().isTypeLegal(VT)) return SDValue(); - + SDVTList VTs = DAG.getVTList(VT, MVT::i32); - + unsigned Opc; bool ExtraOp = false; switch (Op.getOpcode()) { @@ -8675,7 +8675,7 @@ case ISD::SUBC: Opc = X86ISD::SUB; break; case ISD::SUBE: Opc = X86ISD::SBB; ExtraOp = true; break; } - + if (!ExtraOp) return DAG.getNode(Opc, Op->getDebugLoc(), VTs, Op.getOperand(0), Op.getOperand(1)); @@ -9555,14 +9555,14 @@ X86TargetLowering::EmitMonitor(MachineInstr *MI, MachineBasicBlock *BB) const { DebugLoc dl = MI->getDebugLoc(); const TargetInstrInfo *TII = getTargetMachine().getInstrInfo(); - + // Address into RAX/EAX, other two args into ECX, EDX. unsigned MemOpc = Subtarget->is64Bit() ? X86::LEA64r : X86::LEA32r; unsigned MemReg = Subtarget->is64Bit() ? X86::RAX : X86::EAX; MachineInstrBuilder MIB = BuildMI(*BB, MI, dl, TII->get(MemOpc), MemReg); for (int i = 0; i < X86::AddrNumOperands; ++i) MIB.addOperand(MI->getOperand(i)); - + unsigned ValOps = X86::AddrNumOperands; BuildMI(*BB, MI, dl, TII->get(TargetOpcode::COPY), X86::ECX) .addReg(MI->getOperand(ValOps).getReg()); @@ -9571,7 +9571,7 @@ // The instruction doesn't actually take any operands though. BuildMI(*BB, MI, dl, TII->get(X86::MONITORrrr)); - + MI->eraseFromParent(); // The pseudo is gone now. return BB; } @@ -9580,16 +9580,16 @@ X86TargetLowering::EmitMwait(MachineInstr *MI, MachineBasicBlock *BB) const { DebugLoc dl = MI->getDebugLoc(); const TargetInstrInfo *TII = getTargetMachine().getInstrInfo(); - + // First arg in ECX, the second in EAX. BuildMI(*BB, MI, dl, TII->get(TargetOpcode::COPY), X86::ECX) .addReg(MI->getOperand(0).getReg()); BuildMI(*BB, MI, dl, TII->get(TargetOpcode::COPY), X86::EAX) .addReg(MI->getOperand(1).getReg()); - + // The instruction doesn't actually take any operands though. BuildMI(*BB, MI, dl, TII->get(X86::MWAITrr)); - + MI->eraseFromParent(); // The pseudo is gone now. return BB; } @@ -10195,7 +10195,7 @@ // Thread synchronization. case X86::MONITOR: - return EmitMonitor(MI, BB); + return EmitMonitor(MI, BB); case X86::MWAIT: return EmitMwait(MI, BB); @@ -11116,19 +11116,19 @@ const X86Subtarget *Subtarget) { if (DCI.isBeforeLegalizeOps()) return SDValue(); - + // Want to form PANDN nodes, in the hopes of then easily combining them with // OR and AND nodes to form PBLEND/PSIGN. EVT VT = N->getValueType(0); if (VT != MVT::v2i64) return SDValue(); - + SDValue N0 = N->getOperand(0); SDValue N1 = N->getOperand(1); DebugLoc DL = N->getDebugLoc(); - + // Check LHS for vnot - if (N0.getOpcode() == ISD::XOR && + if (N0.getOpcode() == ISD::XOR && ISD::isBuildVectorAllOnes(N0.getOperand(1).getNode())) return DAG.getNode(X86ISD::PANDN, DL, VT, N0.getOperand(0), N1); @@ -11136,7 +11136,7 @@ if (N1.getOpcode() == ISD::XOR && ISD::isBuildVectorAllOnes(N1.getOperand(1).getNode())) return DAG.getNode(X86ISD::PANDN, DL, VT, N1.getOperand(0), N0); - + return SDValue(); } @@ -11152,7 +11152,7 @@ SDValue N0 = N->getOperand(0); SDValue N1 = N->getOperand(1); - + // look for psign/blend if (Subtarget->hasSSSE3()) { if (VT == MVT::v2i64) { @@ -11168,17 +11168,17 @@ Y = N0.getOperand(1); if (N0.getOperand(1) == Mask) Y = N0.getOperand(0); - + // Check to see if the mask appeared in both the AND and PANDN and if (!Y.getNode()) return SDValue(); - + // Validate that X, Y, and Mask are BIT_CONVERTS, and see through them. if (Mask.getOpcode() != ISD::BITCAST || X.getOpcode() != ISD::BITCAST || Y.getOpcode() != ISD::BITCAST) return SDValue(); - + // Look through mask bitcast. Mask = Mask.getOperand(0); EVT MaskVT = Mask.getValueType(); @@ -11187,7 +11187,7 @@ // will be an intrinsic. if (Mask.getOpcode() != ISD::INTRINSIC_WO_CHAIN) return SDValue(); - + // FIXME: what to do for bytes, since there is a psignb/pblendvb, but // there is no psrai.b switch (cast(Mask.getOperand(0))->getZExtValue()) { @@ -11196,14 +11196,14 @@ break; default: return SDValue(); } - + // Check that the SRA is all signbits. SDValue SraC = Mask.getOperand(2); unsigned SraAmt = cast(SraC)->getZExtValue(); unsigned EltBits = MaskVT.getVectorElementType().getSizeInBits(); if ((SraAmt + 1) != EltBits) return SDValue(); - + DebugLoc DL = N->getDebugLoc(); // Now we know we at least have a plendvb with the mask val. See if @@ -11229,7 +11229,7 @@ // PBLENDVB only available on SSE 4.1 if (!Subtarget->hasSSE41()) return SDValue(); - + X = DAG.getNode(ISD::BITCAST, DL, MVT::v16i8, X); Y = DAG.getNode(ISD::BITCAST, DL, MVT::v16i8, Y); Mask = DAG.getNode(ISD::BITCAST, DL, MVT::v16i8, Mask); @@ -11238,7 +11238,7 @@ } } } - + // fold (or (x << c) | (y >> (64 - c))) ==> (shld64 x, y, c) if (N0.getOpcode() == ISD::SRL && N1.getOpcode() == ISD::SHL) std::swap(N0, N1); @@ -11290,7 +11290,7 @@ DAG.getNode(ISD::TRUNCATE, DL, MVT::i8, ShAmt0)); } - + return SDValue(); } @@ -11500,7 +11500,7 @@ unsigned X86CC = N->getConstantOperandVal(0); SDValue EFLAG = N->getOperand(1); DebugLoc DL = N->getDebugLoc(); - + // Materialize "setb reg" as "sbb reg,reg", since it can be extended without // a zext and produces an all-ones bit which is more useful than 0/1 in some // cases. @@ -11509,10 +11509,10 @@ DAG.getNode(X86ISD::SETCC_CARRY, DL, MVT::i8, DAG.getConstant(X86CC, MVT::i8), EFLAG), DAG.getConstant(1, MVT::i8)); - + return SDValue(); } - + // Optimize RES, EFLAGS = X86ISD::ADC LHS, RHS, EFLAGS static SDValue PerformADCCombine(SDNode *N, SelectionDAG &DAG, X86TargetLowering::DAGCombinerInfo &DCI) { @@ -11544,7 +11544,7 @@ // (sub (setne X, 0), Y) -> adc -1, Y static SDValue OptimizeConditonalInDecrement(SDNode *N, SelectionDAG &DAG) { DebugLoc DL = N->getDebugLoc(); - + // Look through ZExts. SDValue Ext = N->getOperand(N->getOpcode() == ISD::SUB ? 1 : 0); if (Ext.getOpcode() != ISD::ZERO_EXTEND || !Ext.hasOneUse()) Modified: llvm/trunk/lib/Target/X86/X86InstrCompiler.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrCompiler.td?rev=124270&r1=124269&r2=124270&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrCompiler.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrCompiler.td Tue Jan 25 20:03:37 2011 @@ -849,38 +849,38 @@ // tailcall stuff def : Pat<(X86tcret GR32_TC:$dst, imm:$off), (TCRETURNri GR32_TC:$dst, imm:$off)>, - Requires<[In32BitMode]>; + Requires<[In32BitMode]>; // FIXME: This is disabled for 32-bit PIC mode because the global base // register which is part of the address mode may be assigned a // callee-saved register. def : Pat<(X86tcret (load addr:$dst), imm:$off), (TCRETURNmi addr:$dst, imm:$off)>, - Requires<[In32BitMode, IsNotPIC]>; + Requires<[In32BitMode, IsNotPIC]>; def : Pat<(X86tcret (i32 tglobaladdr:$dst), imm:$off), (TCRETURNdi texternalsym:$dst, imm:$off)>, - Requires<[In32BitMode]>; + Requires<[In32BitMode]>; def : Pat<(X86tcret (i32 texternalsym:$dst), imm:$off), (TCRETURNdi texternalsym:$dst, imm:$off)>, - Requires<[In32BitMode]>; + Requires<[In32BitMode]>; def : Pat<(X86tcret GR64_TC:$dst, imm:$off), (TCRETURNri64 GR64_TC:$dst, imm:$off)>, - Requires<[In64BitMode]>; + Requires<[In64BitMode]>; def : Pat<(X86tcret (load addr:$dst), imm:$off), (TCRETURNmi64 addr:$dst, imm:$off)>, - Requires<[In64BitMode]>; + Requires<[In64BitMode]>; def : Pat<(X86tcret (i64 tglobaladdr:$dst), imm:$off), (TCRETURNdi64 tglobaladdr:$dst, imm:$off)>, - Requires<[In64BitMode]>; + Requires<[In64BitMode]>; def : Pat<(X86tcret (i64 texternalsym:$dst), imm:$off), (TCRETURNdi64 texternalsym:$dst, imm:$off)>, - Requires<[In64BitMode]>; + Requires<[In64BitMode]>; // Normal calls, with various flavors of addresses. def : Pat<(X86call (i32 tglobaladdr:$dst)), @@ -1661,4 +1661,3 @@ (AND64ri8 GR64:$src1, i64immSExt8:$src2)>; def : Pat<(and GR64:$src1, i64immSExt32:$src2), (AND64ri32 GR64:$src1, i64immSExt32:$src2)>; - Modified: llvm/trunk/lib/Target/X86/X86InstrControl.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrControl.td?rev=124270&r1=124269&r2=124270&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrControl.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrControl.td Tue Jan 25 20:03:37 2011 @@ -1,10 +1,10 @@ //===- X86InstrControl.td - Control Flow Instructions ------*- tablegen -*-===// -// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file describes the X86 jump, return, call, and related instructions. @@ -43,7 +43,7 @@ "jmp\t$dst", [(br bb:$dst)]>; def JMP_1 : Ii8PCRel<0xEB, RawFrm, (outs), (ins brtarget8:$dst), "jmp\t$dst", []>; - def JMP64pcrel32 : I<0xE9, RawFrm, (outs), (ins brtarget:$dst), + def JMP64pcrel32 : I<0xE9, RawFrm, (outs), (ins brtarget:$dst), "jmp{q}\t$dst", []>; } @@ -108,16 +108,16 @@ def JMP64m : I<0xFF, MRM4m, (outs), (ins i64mem:$dst), "jmp{q}\t{*}$dst", [(brind (loadi64 addr:$dst))]>, Requires<[In64BitMode]>; - def FARJMP16i : Iseg16<0xEA, RawFrmImm16, (outs), + def FARJMP16i : Iseg16<0xEA, RawFrmImm16, (outs), (ins i16imm:$off, i16imm:$seg), "ljmp{w}\t{$seg, $off|$off, $seg}", []>, OpSize; def FARJMP32i : Iseg32<0xEA, RawFrmImm16, (outs), (ins i32imm:$off, i16imm:$seg), - "ljmp{l}\t{$seg, $off|$off, $seg}", []>; + "ljmp{l}\t{$seg, $off|$off, $seg}", []>; def FARJMP64 : RI<0xFF, MRM5m, (outs), (ins opaque80mem:$dst), "ljmp{q}\t{*}$dst", []>; - def FARJMP16m : I<0xFF, MRM5m, (outs), (ins opaque32mem:$dst), + def FARJMP16m : I<0xFF, MRM5m, (outs), (ins opaque32mem:$dst), "ljmp{w}\t{*}$dst", []>, OpSize; def FARJMP32m : I<0xFF, MRM5m, (outs), (ins opaque48mem:$dst), "ljmp{l}\t{*}$dst", []>; @@ -152,14 +152,14 @@ def CALL32m : I<0xFF, MRM2m, (outs), (ins i32mem:$dst, variable_ops), "call{l}\t{*}$dst", [(X86call (loadi32 addr:$dst))]>, Requires<[In32BitMode]>; - - def FARCALL16i : Iseg16<0x9A, RawFrmImm16, (outs), + + def FARCALL16i : Iseg16<0x9A, RawFrmImm16, (outs), (ins i16imm:$off, i16imm:$seg), "lcall{w}\t{$seg, $off|$off, $seg}", []>, OpSize; def FARCALL32i : Iseg32<0x9A, RawFrmImm16, (outs), (ins i32imm:$off, i16imm:$seg), "lcall{l}\t{$seg, $off|$off, $seg}", []>; - + def FARCALL16m : I<0xFF, MRM3m, (outs), (ins opaque32mem:$dst), "lcall{w}\t{*}$dst", []>, OpSize; def FARCALL32m : I<0xFF, MRM3m, (outs), (ins opaque48mem:$dst), @@ -182,12 +182,12 @@ XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, XMM8, XMM9, XMM10, XMM11, XMM12, XMM13, XMM14, XMM15, EFLAGS], Uses = [ESP] in { - def TCRETURNdi : PseudoI<(outs), + def TCRETURNdi : PseudoI<(outs), (ins i32imm_pcrel:$dst, i32imm:$offset, variable_ops), []>; - def TCRETURNri : PseudoI<(outs), + def TCRETURNri : PseudoI<(outs), (ins GR32_TC:$dst, i32imm:$offset, variable_ops), []>; let mayLoad = 1 in - def TCRETURNmi : PseudoI<(outs), + def TCRETURNmi : PseudoI<(outs), (ins i32mem_TC:$dst, i32imm:$offset, variable_ops), []>; // FIXME: The should be pseudo instructions that are lowered when going to @@ -196,7 +196,7 @@ (ins i32imm_pcrel:$dst, variable_ops), "jmp\t$dst # TAILCALL", []>; - def TAILJMPr : I<0xFF, MRM4r, (outs), (ins GR32_TC:$dst, variable_ops), + def TAILJMPr : I<0xFF, MRM4r, (outs), (ins GR32_TC:$dst, variable_ops), "", []>; // FIXME: Remove encoding when JIT is dead. let mayLoad = 1 in def TAILJMPm : I<0xFF, MRM4m, (outs), (ins i32mem_TC:$dst, variable_ops), @@ -218,7 +218,7 @@ XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, XMM8, XMM9, XMM10, XMM11, XMM12, XMM13, XMM14, XMM15, EFLAGS], Uses = [RSP] in { - + // NOTE: this pattern doesn't match "X86call imm", because we do not know // that the offset between an arbitrary immediate and the call will fit in // the 32-bit pcrel field that we have. @@ -232,12 +232,12 @@ def CALL64m : I<0xFF, MRM2m, (outs), (ins i64mem:$dst, variable_ops), "call{q}\t{*}$dst", [(X86call (loadi64 addr:$dst))]>, Requires<[In64BitMode, NotWin64]>; - + def FARCALL64 : RI<0xFF, MRM3m, (outs), (ins opaque80mem:$dst), "lcall{q}\t{*}$dst", []>; } - // FIXME: We need to teach codegen about single list of call-clobbered + // FIXME: We need to teach codegen about single list of call-clobbered // registers. let isCall = 1, isCodeGenOnly = 1 in // All calls clobber the non-callee saved registers. RSP is marked as @@ -256,10 +256,10 @@ def WINCALL64r : I<0xFF, MRM2r, (outs), (ins GR64:$dst, variable_ops), "call{q}\t{*}$dst", [(X86call GR64:$dst)]>, Requires<[IsWin64]>; - def WINCALL64m : I<0xFF, MRM2m, (outs), + def WINCALL64m : I<0xFF, MRM2m, (outs), (ins i64mem:$dst,variable_ops), "call{q}\t{*}$dst", - [(X86call (loadi64 addr:$dst))]>, + [(X86call (loadi64 addr:$dst))]>, Requires<[IsWin64]>; } @@ -278,7 +278,7 @@ def TCRETURNri64 : PseudoI<(outs), (ins GR64_TC:$dst, i32imm:$offset, variable_ops), []>; let mayLoad = 1 in - def TCRETURNmi64 : PseudoI<(outs), + def TCRETURNmi64 : PseudoI<(outs), (ins i64mem_TC:$dst, i32imm:$offset, variable_ops), []>; def TAILJMPd64 : Ii32PCRel<0xE9, RawFrm, (outs), @@ -291,4 +291,3 @@ def TAILJMPm64 : I<0xFF, MRM4m, (outs), (ins i64mem_TC:$dst, variable_ops), "jmp{q}\t{*}$dst # TAILCALL", []>; } - Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=124270&r1=124269&r2=124270&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Tue Jan 25 20:03:37 2011 @@ -58,7 +58,7 @@ TB_NOT_REVERSABLE = 1U << 31, TB_FLAGS = TB_NOT_REVERSABLE }; - + static const unsigned OpTbl2Addr[][2] = { { X86::ADC32ri, X86::ADC32mi }, { X86::ADC32ri8, X86::ADC32mi8 }, @@ -231,16 +231,16 @@ unsigned MemOp = OpTbl2Addr[i][1] & ~TB_FLAGS; assert(!RegOp2MemOpTable2Addr.count(RegOp) && "Duplicated entries?"); RegOp2MemOpTable2Addr[RegOp] = std::make_pair(MemOp, 0U); - + // If this is not a reversable operation (because there is a many->one) // mapping, don't insert the reverse of the operation into MemOp2RegOpTable. if (OpTbl2Addr[i][1] & TB_NOT_REVERSABLE) continue; - + // Index 0, folded load and store, no alignment requirement. unsigned AuxInfo = 0 | (1 << 4) | (1 << 5); - - assert(!MemOp2RegOpTable.count(MemOp) && + + assert(!MemOp2RegOpTable.count(MemOp) && "Duplicated entries in unfolding maps?"); MemOp2RegOpTable[MemOp] = std::make_pair(RegOp, AuxInfo); } @@ -334,12 +334,12 @@ unsigned Align = OpTbl0[i][3]; assert(!RegOp2MemOpTable0.count(RegOp) && "Duplicated entries?"); RegOp2MemOpTable0[RegOp] = std::make_pair(MemOp, Align); - + // If this is not a reversable operation (because there is a many->one) // mapping, don't insert the reverse of the operation into MemOp2RegOpTable. if (OpTbl0[i][1] & TB_NOT_REVERSABLE) continue; - + // Index 0, folded load or store. unsigned AuxInfo = 0 | (FoldedLoad << 4) | ((FoldedLoad^1) << 5); assert(!MemOp2RegOpTable.count(MemOp) && "Duplicated entries?"); @@ -461,12 +461,12 @@ unsigned Align = OpTbl1[i][2]; assert(!RegOp2MemOpTable1.count(RegOp) && "Duplicate entries"); RegOp2MemOpTable1[RegOp] = std::make_pair(MemOp, Align); - + // If this is not a reversable operation (because there is a many->one) // mapping, don't insert the reverse of the operation into MemOp2RegOpTable. if (OpTbl1[i][1] & TB_NOT_REVERSABLE) continue; - + // Index 1, folded load unsigned AuxInfo = 1 | (1 << 4); assert(!MemOp2RegOpTable.count(MemOp) && "Duplicate entries"); @@ -678,15 +678,15 @@ unsigned RegOp = OpTbl2[i][0]; unsigned MemOp = OpTbl2[i][1] & ~TB_FLAGS; unsigned Align = OpTbl2[i][2]; - + assert(!RegOp2MemOpTable2.count(RegOp) && "Duplicate entry!"); RegOp2MemOpTable2[RegOp] = std::make_pair(MemOp, Align); - + // If this is not a reversable operation (because there is a many->one) // mapping, don't insert the reverse of the operation into MemOp2RegOpTable. if (OpTbl2[i][1] & TB_NOT_REVERSABLE) continue; - + // Index 2, folded load unsigned AuxInfo = 2 | (1 << 4); assert(!MemOp2RegOpTable.count(MemOp) && @@ -808,7 +808,7 @@ return false; } -unsigned X86InstrInfo::isLoadFromStackSlot(const MachineInstr *MI, +unsigned X86InstrInfo::isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const { if (isFrameLoadOpcode(MI->getOpcode())) if (MI->getOperand(0).getSubReg() == 0 && isFrameOperand(MI, 1, FrameIndex)) @@ -816,7 +816,7 @@ return 0; } -unsigned X86InstrInfo::isLoadFromStackSlotPostFE(const MachineInstr *MI, +unsigned X86InstrInfo::isLoadFromStackSlotPostFE(const MachineInstr *MI, int &FrameIndex) const { if (isFrameLoadOpcode(MI->getOpcode())) { unsigned Reg; @@ -946,10 +946,10 @@ isPICBase = true; } return isPICBase; - } + } return false; } - + case X86::LEA32r: case X86::LEA64r: { if (MI->getOperand(2).isImm() && @@ -1124,9 +1124,9 @@ MachineRegisterInfo &RegInfo = MFI->getParent()->getRegInfo(); unsigned leaInReg = RegInfo.createVirtualRegister(&X86::GR32_NOSPRegClass); unsigned leaOutReg = RegInfo.createVirtualRegister(&X86::GR32RegClass); - + // Build and insert into an implicit UNDEF value. This is OK because - // well be shifting and then extracting the lower 16-bits. + // well be shifting and then extracting the lower 16-bits. // This has the potential to cause partial register stall. e.g. // movw (%rbp,%rcx,2), %dx // leal -65(%rdx), %esi @@ -1162,7 +1162,7 @@ case X86::ADD16ri8: case X86::ADD16ri_DB: case X86::ADD16ri8_DB: - addRegOffset(MIB, leaInReg, true, MI->getOperand(2).getImm()); + addRegOffset(MIB, leaInReg, true, MI->getOperand(2).getImm()); break; case X86::ADD16rr: case X86::ADD16rr_DB: { @@ -1177,7 +1177,7 @@ } else { leaInReg2 = RegInfo.createVirtualRegister(&X86::GR32_NOSPRegClass); // Build and insert into an implicit UNDEF value. This is OK because - // well be shifting and then extracting the lower 16-bits. + // well be shifting and then extracting the lower 16-bits. BuildMI(*MFI, MIB, MI->getDebugLoc(), get(X86::IMPLICIT_DEF), leaInReg2); InsMI2 = BuildMI(*MFI, MIB, MI->getDebugLoc(), get(TargetOpcode::COPY)) @@ -1244,7 +1244,7 @@ case X86::SHUFPSrri: { assert(MI->getNumOperands() == 4 && "Unknown shufps instruction!"); if (!TM.getSubtarget().hasSSE2()) return 0; - + unsigned B = MI->getOperand(1).getReg(); unsigned C = MI->getOperand(2).getReg(); if (B != C) return 0; @@ -1392,7 +1392,7 @@ RC = X86::GR32_NOSPRegisterClass; } - + unsigned Src2 = MI->getOperand(2).getReg(); bool isKill2 = MI->getOperand(2).isKill(); @@ -1471,7 +1471,7 @@ LV->replaceKillInstruction(Dest, MI, NewMI); } - MFI->insert(MBBI, NewMI); // Insert the new inst + MFI->insert(MBBI, NewMI); // Insert the new inst return NewMI; } @@ -1692,7 +1692,7 @@ bool X86InstrInfo::isUnpredicatedTerminator(const MachineInstr *MI) const { const TargetInstrDesc &TID = MI->getDesc(); if (!TID.isTerminator()) return false; - + // Conditional branch is a special case. if (TID.isBranch() && !TID.isBarrier()) return true; @@ -1701,7 +1701,7 @@ return !isPredicated(MI); } -bool X86InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, +bool X86InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl &Cond, @@ -1862,7 +1862,7 @@ I = MBB.end(); ++Count; } - + return Count; } @@ -2177,7 +2177,7 @@ MIB.addOperand(MOs[i]); if (NumAddrOps < 4) // FrameIndex only addOffset(MIB, 0); - + // Loop over the rest of the ri operands, converting them over. unsigned NumOps = MI->getDesc().getNumOperands()-2; for (unsigned i = 0; i != NumOps; ++i) { @@ -2198,7 +2198,7 @@ MachineInstr *NewMI = MF.CreateMachineInstr(TII.get(Opcode), MI->getDebugLoc(), true); MachineInstrBuilder MIB(NewMI); - + for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { MachineOperand &MO = MI->getOperand(i); if (i == OpNo) { @@ -2247,7 +2247,7 @@ if (isTwoAddr && NumOps >= 2 && i < 2 && MI->getOperand(0).isReg() && MI->getOperand(1).isReg() && - MI->getOperand(0).getReg() == MI->getOperand(1).getReg()) { + MI->getOperand(0).getReg() == MI->getOperand(1).getReg()) { OpcodeTablePtr = &RegOp2MemOpTable2Addr; isTwoAddrFold = true; } else if (i == 0) { // If operand 0 @@ -2261,14 +2261,14 @@ NewMI = MakeM0Inst(*this, X86::MOV8mi, MOs, MI); if (NewMI) return NewMI; - + OpcodeTablePtr = &RegOp2MemOpTable0; } else if (i == 1) { OpcodeTablePtr = &RegOp2MemOpTable1; } else if (i == 2) { OpcodeTablePtr = &RegOp2MemOpTable2; } - + // If table selected... if (OpcodeTablePtr) { // Find the Opcode to fuse @@ -2316,8 +2316,8 @@ return NewMI; } } - - // No fusion + + // No fusion if (PrintFailedFusing && !MI->isCopy()) dbgs() << "We failed to fuse operand " << i << " in " << *MI; return NULL; @@ -2328,7 +2328,7 @@ MachineInstr *MI, const SmallVectorImpl &Ops, int FrameIndex) const { - // Check switch flag + // Check switch flag if (NoFusing) return NULL; if (!MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize)) @@ -2380,7 +2380,7 @@ MachineInstr *MI, const SmallVectorImpl &Ops, MachineInstr *LoadMI) const { - // Check switch flag + // Check switch flag if (NoFusing) return NULL; if (!MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize)) @@ -2523,13 +2523,13 @@ bool X86InstrInfo::canFoldMemoryOperand(const MachineInstr *MI, const SmallVectorImpl &Ops) const { - // Check switch flag + // Check switch flag if (NoFusing) return 0; if (Ops.size() == 2 && Ops[0] == 0 && Ops[1] == 1) { switch (MI->getOpcode()) { default: return false; - case X86::TEST8rr: + case X86::TEST8rr: case X86::TEST16rr: case X86::TEST32rr: case X86::TEST64rr: @@ -2550,7 +2550,7 @@ // instruction is different than folding it other places. It requires // replacing the *two* registers with the memory location. const DenseMap > *OpcodeTablePtr = 0; - if (isTwoAddr && NumOps >= 2 && OpNum < 2) { + if (isTwoAddr && NumOps >= 2 && OpNum < 2) { OpcodeTablePtr = &RegOp2MemOpTable2Addr; } else if (OpNum == 0) { // If operand 0 switch (Opc) { @@ -2566,7 +2566,7 @@ } else if (OpNum == 2) { OpcodeTablePtr = &RegOp2MemOpTable2; } - + if (OpcodeTablePtr && OpcodeTablePtr->count(Opc)) return true; return TargetInstrInfoImpl::canFoldMemoryOperand(MI, Ops); @@ -2636,7 +2636,7 @@ // Emit the data processing instruction. MachineInstr *DataMI = MF.CreateMachineInstr(TID, MI->getDebugLoc(), true); MachineInstrBuilder MIB(DataMI); - + if (FoldedStore) MIB.addReg(Reg, RegState::Define); for (unsigned i = 0, e = BeforeOps.size(); i != e; ++i) @@ -3156,11 +3156,11 @@ PC = RegInfo.createVirtualRegister(X86::GR32RegisterClass); else PC = GlobalBaseReg; - + // Operand of MovePCtoStack is completely ignored by asm printer. It's // only used in JIT code emission as displacement to pc. BuildMI(FirstMBB, MBBI, DL, TII->get(X86::MOVPC32r), PC).addImm(0); - + // If we're using vanilla 'GOT' PIC style, we should use relative addressing // not to pc, but to _GLOBAL_OFFSET_TABLE_ external. if (TM->getSubtarget().isPICStyleGOT()) { Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=124270&r1=124269&r2=124270&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Tue Jan 25 20:03:37 2011 @@ -36,7 +36,7 @@ SDTCisSameAs<0, 3>, SDTCisInt<0>, SDTCisVT<1, i32>]>; -// SDTBinaryArithWithFlagsInOut - RES1, EFLAGS = op LHS, RHS, EFLAGS +// SDTBinaryArithWithFlagsInOut - RES1, EFLAGS = op LHS, RHS, EFLAGS def SDTBinaryArithWithFlagsInOut : SDTypeProfile<2, 3, [SDTCisSameAs<0, 2>, SDTCisSameAs<0, 3>, @@ -1612,4 +1612,3 @@ def : InstAlias<"xchgw $mem, $val", (XCHG16rm GR16:$val, i16mem:$mem)>; def : InstAlias<"xchgl $mem, $val", (XCHG32rm GR32:$val, i32mem:$mem)>; def : InstAlias<"xchgq $mem, $val", (XCHG64rm GR64:$val, i64mem:$mem)>; - Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.td?rev=124270&r1=124269&r2=124270&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86RegisterInfo.td (original) +++ llvm/trunk/lib/Target/X86/X86RegisterInfo.td Tue Jan 25 20:03:37 2011 @@ -1,10 +1,10 @@ //===- X86RegisterInfo.td - Describe the X86 Register File --*- tablegen -*-==// -// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file describes the X86 Register file, defining the registers themselves, @@ -34,8 +34,8 @@ // because the register file generator is smart enough to figure out that // AL aliases AX if we tell it that AX aliased AL (for example). - // Dwarf numbering is different for 32-bit and 64-bit, and there are - // variations by target as well. Currently the first entry is for X86-64, + // Dwarf numbering is different for 32-bit and 64-bit, and there are + // variations by target as well. Currently the first entry is for X86-64, // second - for EH on X86-32/Darwin and third is 'generic' one (X86-32/Linux // and debug information on X86-32/Darwin) @@ -81,7 +81,7 @@ def SP : RegisterWithSubRegs<"sp", [SPL]>, DwarfRegNum<[7, 5, 4]>; } def IP : Register<"ip">, DwarfRegNum<[16]>; - + // X86-64 only let SubRegIndices = [sub_8bit] in { def R8W : RegisterWithSubRegs<"r8w", [R8B]>, DwarfRegNum<[8, -2, -2]>; @@ -103,8 +103,8 @@ def EDI : RegisterWithSubRegs<"edi", [DI]>, DwarfRegNum<[5, 7, 7]>; def EBP : RegisterWithSubRegs<"ebp", [BP]>, DwarfRegNum<[6, 4, 5]>; def ESP : RegisterWithSubRegs<"esp", [SP]>, DwarfRegNum<[7, 5, 4]>; - def EIP : RegisterWithSubRegs<"eip", [IP]>, DwarfRegNum<[16, 8, 8]>; - + def EIP : RegisterWithSubRegs<"eip", [IP]>, DwarfRegNum<[16, 8, 8]>; + // X86-64 only def R8D : RegisterWithSubRegs<"r8d", [R8W]>, DwarfRegNum<[8, -2, -2]>; def R9D : RegisterWithSubRegs<"r9d", [R9W]>, DwarfRegNum<[9, -2, -2]>; @@ -208,7 +208,7 @@ def ST4 : Register<"st(4)">, DwarfRegNum<[37, 16, 15]>; def ST5 : Register<"st(5)">, DwarfRegNum<[38, 17, 16]>; def ST6 : Register<"st(6)">, DwarfRegNum<[39, 18, 17]>; - def ST7 : Register<"st(7)">, DwarfRegNum<[40, 19, 18]>; + def ST7 : Register<"st(7)">, DwarfRegNum<[40, 19, 18]>; // Status flags register def EFLAGS : Register<"flags">; @@ -220,7 +220,7 @@ def ES : Register<"es">; def FS : Register<"fs">; def GS : Register<"gs">; - + // Debug registers def DR0 : Register<"dr0">; def DR1 : Register<"dr1">; @@ -230,7 +230,7 @@ def DR5 : Register<"dr5">; def DR6 : Register<"dr6">; def DR7 : Register<"dr7">; - + // Control registers def CR0 : Register<"cr0">; def CR1 : Register<"cr1">; @@ -261,10 +261,10 @@ // implicitly defined to be the register allocation order. // -// List call-clobbered registers before callee-save registers. RBX, RBP, (and +// List call-clobbered registers before callee-save registers. RBX, RBP, (and // R12, R13, R14, and R15 for X86-64) are callee-save registers. // In 64-mode, there are 12 additional i8 registers, SIL, DIL, BPL, SPL, and -// R8B, ... R15B. +// R8B, ... R15B. // Allocate R12 and R13 last, as these require an extra byte when // encoded in x86_64 instructions. // FIXME: Allow AH, CH, DH, BH to be used as general-purpose registers in Modified: llvm/trunk/test/CodeGen/X86/tailcallstack64.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tailcallstack64.ll?rev=124270&r1=124269&r2=124270&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/tailcallstack64.ll (original) +++ llvm/trunk/test/CodeGen/X86/tailcallstack64.ll Tue Jan 25 20:03:37 2011 @@ -22,4 +22,3 @@ %retval = tail call fastcc i32 @tailcallee(i32 %p1, i32 %p2, i32 %p3, i32 %p4, i32 %p5, i32 %p6, i32 %in2,i32 %tmp) ret i32 %retval } - Modified: llvm/trunk/utils/TableGen/CodeGenInstruction.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenInstruction.cpp?rev=124270&r1=124269&r2=124270&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/CodeGenInstruction.cpp (original) +++ llvm/trunk/utils/TableGen/CodeGenInstruction.cpp Tue Jan 25 20:03:37 2011 @@ -28,15 +28,15 @@ isPredicable = false; hasOptionalDef = false; isVariadic = false; - + DagInit *OutDI = R->getValueAsDag("OutOperandList"); - + if (DefInit *Init = dynamic_cast(OutDI->getOperator())) { if (Init->getDef()->getName() != "outs") throw R->getName() + ": invalid def name for output list: use 'outs'"; } else throw R->getName() + ": invalid output list: use 'outs'"; - + NumDefs = OutDI->getNumArgs(); DagInit *InDI = R->getValueAsDag("InOperandList"); @@ -45,7 +45,7 @@ throw R->getName() + ": invalid def name for input list: use 'ins'"; } else throw R->getName() + ": invalid input list: use 'ins'"; - + unsigned MIOperandNo = 0; std::set OperandNames; for (unsigned i = 0, e = InDI->getNumArgs()+OutDI->getNumArgs(); i != e; ++i){ @@ -58,11 +58,11 @@ ArgInit = InDI->getArg(i-NumDefs); ArgName = InDI->getArgName(i-NumDefs); } - + DefInit *Arg = dynamic_cast(ArgInit); if (!Arg) throw "Illegal operand for the '" + R->getName() + "' instruction!"; - + Record *Rec = Arg->getDef(); std::string PrintMethod = "printOperand"; std::string EncoderMethod; @@ -73,19 +73,19 @@ // If there is an explicit encoder method, use it. EncoderMethod = Rec->getValueAsString("EncoderMethod"); MIOpInfo = Rec->getValueAsDag("MIOperandInfo"); - + // Verify that MIOpInfo has an 'ops' root value. if (!dynamic_cast(MIOpInfo->getOperator()) || dynamic_cast(MIOpInfo->getOperator()) ->getDef()->getName() != "ops") throw "Bad value for MIOperandInfo in operand '" + Rec->getName() + "'\n"; - + // If we have MIOpInfo, then we have #operands equal to number of entries // in MIOperandInfo. if (unsigned NumArgs = MIOpInfo->getNumArgs()) NumOps = NumArgs; - + if (Rec->isSubClassOf("PredicateOperand")) isPredicable = true; else if (Rec->isSubClassOf("OptionalDefOperand")) @@ -97,7 +97,7 @@ Rec->getName() != "ptr_rc" && Rec->getName() != "unknown") throw "Unknown operand class '" + Rec->getName() + "' in '" + R->getName() + "' instruction!"; - + // Check that the operand has a name and that it's unique. if (ArgName.empty()) throw "In instruction '" + R->getName() + "', operand #" + utostr(i) + @@ -105,13 +105,13 @@ if (!OperandNames.insert(ArgName).second) throw "In instruction '" + R->getName() + "', operand #" + utostr(i) + " has the same name as a previous operand!"; - + OperandList.push_back(OperandInfo(Rec, ArgName, PrintMethod, EncoderMethod, MIOperandNo, NumOps, MIOpInfo)); MIOperandNo += NumOps; } - - + + // Make sure the constraints list for each operand is large enough to hold // constraint info, even if none is present. for (unsigned i = 0, e = OperandList.size(); i != e; ++i) @@ -126,7 +126,7 @@ unsigned CGIOperandList::getOperandNamed(StringRef Name) const { unsigned OpIdx; if (hasOperandNamed(Name, OpIdx)) return OpIdx; - throw "'" + TheDef->getName() + "' does not have an operand named '$" + + throw "'" + TheDef->getName() + "' does not have an operand named '$" + Name.str() + "'!"; } @@ -147,10 +147,10 @@ CGIOperandList::ParseOperandName(const std::string &Op, bool AllowWholeOp) { if (Op.empty() || Op[0] != '$') throw TheDef->getName() + ": Illegal operand name: '" + Op + "'"; - + std::string OpName = Op.substr(1); std::string SubOpName; - + // Check to see if this is $foo.bar. std::string::size_type DotIdx = OpName.find_first_of("."); if (DotIdx != std::string::npos) { @@ -159,30 +159,30 @@ throw TheDef->getName() + ": illegal empty suboperand name in '" +Op +"'"; OpName = OpName.substr(0, DotIdx); } - + unsigned OpIdx = getOperandNamed(OpName); - + if (SubOpName.empty()) { // If no suboperand name was specified: // If one was needed, throw. if (OperandList[OpIdx].MINumOperands > 1 && !AllowWholeOp && SubOpName.empty()) throw TheDef->getName() + ": Illegal to refer to" " whole operand part of complex operand '" + Op + "'"; - + // Otherwise, return the operand. return std::make_pair(OpIdx, 0U); } - + // Find the suboperand number involved. DagInit *MIOpInfo = OperandList[OpIdx].MIOperandInfo; if (MIOpInfo == 0) throw TheDef->getName() + ": unknown suboperand name in '" + Op + "'"; - + // Find the operand with the right name. for (unsigned i = 0, e = MIOpInfo->getNumArgs(); i != e; ++i) if (MIOpInfo->getArgName(i) == SubOpName) return std::make_pair(OpIdx, i); - + // Otherwise, didn't find it! throw TheDef->getName() + ": unknown suboperand name in '" + Op + "'"; } @@ -199,7 +199,7 @@ throw "Illegal format for @earlyclobber constraint: '" + CStr + "'"; Name = Name.substr(wpos); std::pair Op = Ops.ParseOperandName(Name, false); - + // Build the string for the operand if (!Ops[Op.first].Constraints[Op.second].isNone()) throw "Operand '" + Name + "' cannot have multiple constraints!"; @@ -207,33 +207,33 @@ CGIOperandList::ConstraintInfo::getEarlyClobber(); return; } - + // Only other constraint is "TIED_TO" for now. std::string::size_type pos = CStr.find_first_of('='); assert(pos != std::string::npos && "Unrecognized constraint"); start = CStr.find_first_not_of(" \t"); std::string Name = CStr.substr(start, pos - start); - + // TIED_TO: $src1 = $dst wpos = Name.find_first_of(" \t"); if (wpos == std::string::npos) throw "Illegal format for tied-to constraint: '" + CStr + "'"; std::string DestOpName = Name.substr(0, wpos); std::pair DestOp = Ops.ParseOperandName(DestOpName, false); - + Name = CStr.substr(pos+1); wpos = Name.find_first_not_of(" \t"); if (wpos == std::string::npos) throw "Illegal format for tied-to constraint: '" + CStr + "'"; - + std::pair SrcOp = Ops.ParseOperandName(Name.substr(wpos), false); if (SrcOp > DestOp) throw "Illegal tied-to operand constraint '" + CStr + "'"; - - + + unsigned FlatOpNo = Ops.getFlattenedOperandNumber(SrcOp); - + if (!Ops[DestOp.first].Constraints[DestOp.second].isNone()) throw "Operand '" + DestOpName + "' cannot have multiple constraints!"; Ops[DestOp.first].Constraints[DestOp.second] = @@ -242,16 +242,16 @@ static void ParseConstraints(const std::string &CStr, CGIOperandList &Ops) { if (CStr.empty()) return; - + const std::string delims(","); std::string::size_type bidx, eidx; - + bidx = CStr.find_first_not_of(delims); while (bidx != std::string::npos) { eidx = CStr.find_first_of(delims, bidx); if (eidx == std::string::npos) eidx = CStr.length(); - + ParseConstraint(CStr.substr(bidx, eidx - bidx), Ops); bidx = CStr.find_first_not_of(delims, eidx); } @@ -262,16 +262,16 @@ std::string OpName; tie(OpName, DisableEncoding) = getToken(DisableEncoding, " ,\t"); if (OpName.empty()) break; - + // Figure out which operand this is. std::pair Op = ParseOperandName(OpName, false); - + // Mark the operand as not-to-be encoded. if (Op.second >= OperandList[Op.first].DoNotEncode.size()) OperandList[Op.first].DoNotEncode.resize(Op.second+1); OperandList[Op.first].DoNotEncode[Op.second] = true; } - + } //===----------------------------------------------------------------------===// @@ -325,11 +325,11 @@ MVT::SimpleValueType CodeGenInstruction:: HasOneImplicitDefWithKnownVT(const CodeGenTarget &TargetInfo) const { if (ImplicitDefs.empty()) return MVT::Other; - + // Check to see if the first implicit def has a resolvable type. Record *FirstImplicitDef = ImplicitDefs[0]; assert(FirstImplicitDef->isSubClassOf("Register")); - const std::vector &RegVTs = + const std::vector &RegVTs = TargetInfo.getRegisterVTs(FirstImplicitDef); if (RegVTs.size() == 1) return RegVTs[0]; @@ -342,7 +342,7 @@ std::string CodeGenInstruction:: FlattenAsmStringVariants(StringRef Cur, unsigned Variant) { std::string Res = ""; - + for (;;) { // Find the start of the next variant string. size_t VariantsStart = 0; @@ -351,14 +351,14 @@ (VariantsStart == 0 || (Cur[VariantsStart-1] != '$' && Cur[VariantsStart-1] != '\\'))) break; - + // Add the prefix to the result. Res += Cur.slice(0, VariantsStart); if (VariantsStart == Cur.size()) break; - + ++VariantsStart; // Skip the '{'. - + // Scan to the end of the variants string. size_t VariantsEnd = VariantsStart; unsigned NestedBraces = 1; @@ -369,18 +369,18 @@ } else if (Cur[VariantsEnd] == '{') ++NestedBraces; } - + // Select the Nth variant (or empty). StringRef Selection = Cur.slice(VariantsStart, VariantsEnd); for (unsigned i = 0; i != Variant; ++i) Selection = Selection.split('|').second; Res += Selection.split('|').first; - + assert(VariantsEnd != Cur.size() && "Unterminated variants in assembly string!"); Cur = Cur.substr(VariantsEnd + 1); } - + return Res; } @@ -399,7 +399,7 @@ throw TGError(R->getLoc(), "result of inst alias should be an instruction"); ResultInst = &T.getInstruction(DI->getDef()); - + // NameClass - If argument names are repeated, we need to verify they have // the same class. StringMap NameClass; @@ -417,7 +417,7 @@ ADI->getDef()->getName() + "!"); Entry = ADI->getDef(); } - + // Decode and validate the arguments of the result. unsigned AliasOpNo = 0; for (unsigned i = 0, e = ResultInst->Operands.size(); i != e; ++i) { @@ -430,8 +430,8 @@ " arguments, but " + ResultInst->TheDef->getName() + " instruction expects " + utostr(ResultInst->Operands.size()) + " operands!"); - - + + Init *Arg = Result->getArg(AliasOpNo); Record *ResultOpRec = ResultInst->Operands[i].Rec; @@ -441,16 +441,16 @@ if (!Result->getArgName(AliasOpNo).empty()) throw TGError(R->getLoc(), "result fixed register argument must " "not have a name!"); - + if (!ResultOpRec->isSubClassOf("RegisterClass")) throw TGError(R->getLoc(), "result fixed register argument is not " "passed to a RegisterClass operand!"); - + if (!T.getRegisterClass(ResultOpRec).containsRegister(ADI->getDef())) throw TGError(R->getLoc(), "fixed register " +ADI->getDef()->getName() + " is not a member of the " + ResultOpRec->getName() + " register class!"); - + // Now that it is validated, add it. ResultOperands.push_back(ResultOperand(ADI->getDef())); ResultInstOperandIndex.push_back(i); @@ -474,7 +474,7 @@ continue; } } - + // If the operand is a record, it must have a name, and the record type must // match up with the instruction's argument type. if (DefInit *ADI = dynamic_cast(Arg)) { @@ -485,9 +485,9 @@ if (ADI->getDef() != ResultOpRec) throw TGError(R->getLoc(), "result argument #" + utostr(AliasOpNo) + " declared with class " + ADI->getDef()->getName() + - ", instruction operand is class " + + ", instruction operand is class " + ResultOpRec->getName()); - + // Now that it is validated, add it. ResultOperands.push_back(ResultOperand(Result->getArgName(AliasOpNo), ADI->getDef())); @@ -495,7 +495,7 @@ ++AliasOpNo; continue; } - + if (IntInit *II = dynamic_cast(Arg)) { // Integer arguments can't have names. if (!Result->getArgName(AliasOpNo).empty()) @@ -503,7 +503,7 @@ " must not have a name!"); if (ResultInst->Operands[i].MINumOperands != 1 || !ResultOpRec->isSubClassOf("Operand")) - throw TGError(R->getLoc(), "invalid argument class " + + throw TGError(R->getLoc(), "invalid argument class " + ResultOpRec->getName() + " for integer result operand!"); ResultOperands.push_back(ResultOperand(II->getValue())); @@ -514,7 +514,7 @@ throw TGError(R->getLoc(), "result of inst alias has unknown operand type"); } - + if (AliasOpNo != Result->getNumArgs()) throw TGError(R->getLoc(), "result has " + utostr(Result->getNumArgs()) + " arguments, but " + ResultInst->TheDef->getName() + From geek4civic at gmail.com Tue Jan 25 20:03:48 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Wed, 26 Jan 2011 02:03:48 -0000 Subject: [llvm-commits] [llvm] r124271 - in /llvm/trunk/utils/TableGen: CodeGenInstruction.cpp EDEmitter.cpp Message-ID: <20110126020348.316962A6C12C@llvm.org> Author: chapuni Date: Tue Jan 25 20:03:48 2011 New Revision: 124271 URL: http://llvm.org/viewvc/llvm-project?rev=124271&view=rev Log: TableGen: PointerLikeRegClass can be accepted to operand. Modified: llvm/trunk/utils/TableGen/CodeGenInstruction.cpp llvm/trunk/utils/TableGen/EDEmitter.cpp Modified: llvm/trunk/utils/TableGen/CodeGenInstruction.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenInstruction.cpp?rev=124271&r1=124270&r2=124271&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/CodeGenInstruction.cpp (original) +++ llvm/trunk/utils/TableGen/CodeGenInstruction.cpp Tue Jan 25 20:03:48 2011 @@ -94,7 +94,8 @@ isVariadic = true; continue; } else if (!Rec->isSubClassOf("RegisterClass") && - Rec->getName() != "ptr_rc" && Rec->getName() != "unknown") + !Rec->isSubClassOf("PointerLikeRegClass") && + Rec->getName() != "unknown") throw "Unknown operand class '" + Rec->getName() + "' in '" + R->getName() + "' instruction!"; Modified: llvm/trunk/utils/TableGen/EDEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/EDEmitter.cpp?rev=124271&r1=124270&r2=124271&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/EDEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/EDEmitter.cpp Tue Jan 25 20:03:48 2011 @@ -354,7 +354,8 @@ const CGIOperandList::OperandInfo &operandInfo = inst.Operands[index]; Record &rec = *operandInfo.Rec; - if (X86TypeFromOpName(operandTypes[index], rec.getName())) { + if (X86TypeFromOpName(operandTypes[index], rec.getName()) && + !rec.isSubClassOf("PointerLikeRegClass")) { errs() << "Operand type: " << rec.getName().c_str() << "\n"; errs() << "Operand name: " << operandInfo.Name.c_str() << "\n"; errs() << "Instruction name: " << inst.TheDef->getName().c_str() << "\n"; From geek4civic at gmail.com Tue Jan 25 20:04:09 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Wed, 26 Jan 2011 02:04:09 -0000 Subject: [llvm-commits] [llvm] r124272 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86InstrCompiler.td lib/Target/X86/X86InstrControl.td lib/Target/X86/X86InstrInfo.cpp lib/Target/X86/X86InstrInfo.td lib/Target/X86/X86RegisterInfo.cpp lib/Target/X86/X86RegisterInfo.td test/CodeGen/X86/tailcall-ri64.ll test/CodeGen/X86/tailcallstack64.ll Message-ID: <20110126020409.6E0452A6C12C@llvm.org> Author: chapuni Date: Tue Jan 25 20:04:09 2011 New Revision: 124272 URL: http://llvm.org/viewvc/llvm-project?rev=124272&view=rev Log: Target/X86: Tweak win64's tailcall. Added: llvm/trunk/test/CodeGen/X86/tailcall-ri64.ll Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp llvm/trunk/lib/Target/X86/X86InstrCompiler.td llvm/trunk/lib/Target/X86/X86InstrControl.td llvm/trunk/lib/Target/X86/X86InstrInfo.cpp llvm/trunk/lib/Target/X86/X86InstrInfo.td llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp llvm/trunk/lib/Target/X86/X86RegisterInfo.td llvm/trunk/test/CodeGen/X86/tailcallstack64.ll Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=124272&r1=124271&r2=124272&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Jan 25 20:04:09 2011 @@ -2476,9 +2476,6 @@ MachineFunction &MF = DAG.getMachineFunction(); if (MF.getInfo()->getBytesToPopOnReturn()) return false; - if (Subtarget->isTargetWin64()) - // Win64 ABI has additional complications. - return false; // Check if the arguments are already laid out in the right way as // the caller's fixed stack objects. @@ -10078,6 +10075,30 @@ MachineBasicBlock *BB) const { switch (MI->getOpcode()) { default: assert(false && "Unexpected instr type to insert"); + case X86::TAILJMPd64: + case X86::TAILJMPr64: + case X86::TAILJMPm64: + assert(!"TAILJMP64 would not be touched here."); + case X86::TCRETURNdi64: + case X86::TCRETURNri64: + case X86::TCRETURNmi64: + // Defs of TCRETURNxx64 has Win64's callee-saved registers, as subset. + // On AMD64, additional defs should be added before register allocation. + if (!Subtarget->isTargetWin64()) { + MI->addRegisterDefined(X86::RSI); + MI->addRegisterDefined(X86::RDI); + MI->addRegisterDefined(X86::XMM6); + MI->addRegisterDefined(X86::XMM7); + MI->addRegisterDefined(X86::XMM8); + MI->addRegisterDefined(X86::XMM9); + MI->addRegisterDefined(X86::XMM10); + MI->addRegisterDefined(X86::XMM11); + MI->addRegisterDefined(X86::XMM12); + MI->addRegisterDefined(X86::XMM13); + MI->addRegisterDefined(X86::XMM14); + MI->addRegisterDefined(X86::XMM15); + } + return BB; case X86::WIN_ALLOCA: return EmitLoweredWinAlloca(MI, BB); case X86::TLSCall_32: Modified: llvm/trunk/lib/Target/X86/X86InstrCompiler.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrCompiler.td?rev=124272&r1=124271&r2=124272&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrCompiler.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrCompiler.td Tue Jan 25 20:04:09 2011 @@ -866,8 +866,8 @@ (TCRETURNdi texternalsym:$dst, imm:$off)>, Requires<[In32BitMode]>; -def : Pat<(X86tcret GR64_TC:$dst, imm:$off), - (TCRETURNri64 GR64_TC:$dst, imm:$off)>, +def : Pat<(X86tcret ptr_rc_tailcall:$dst, imm:$off), + (TCRETURNri64 ptr_rc_tailcall:$dst, imm:$off)>, Requires<[In64BitMode]>; def : Pat<(X86tcret (load addr:$dst), imm:$off), Modified: llvm/trunk/lib/Target/X86/X86InstrControl.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrControl.td?rev=124272&r1=124271&r2=124272&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrControl.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrControl.td Tue Jan 25 20:04:09 2011 @@ -266,17 +266,18 @@ let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, isCodeGenOnly = 1 in - let Defs = [RAX, RCX, RDX, RSI, RDI, R8, R9, R10, R11, + // AMD64 cc clobbers RSI, RDI, XMM6-XMM15. + let Defs = [RAX, RCX, RDX, R8, R9, R10, R11, FP0, FP1, FP2, FP3, FP4, FP5, FP6, ST0, ST1, MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7, - XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, - XMM8, XMM9, XMM10, XMM11, XMM12, XMM13, XMM14, XMM15, EFLAGS], - Uses = [RSP] in { + XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, EFLAGS], + Uses = [RSP], + usesCustomInserter = 1 in { def TCRETURNdi64 : PseudoI<(outs), (ins i64i32imm_pcrel:$dst, i32imm:$offset, variable_ops), []>; def TCRETURNri64 : PseudoI<(outs), - (ins GR64_TC:$dst, i32imm:$offset, variable_ops), []>; + (ins ptr_rc_tailcall:$dst, i32imm:$offset, variable_ops), []>; let mayLoad = 1 in def TCRETURNmi64 : PseudoI<(outs), (ins i64mem_TC:$dst, i32imm:$offset, variable_ops), []>; @@ -284,7 +285,7 @@ def TAILJMPd64 : Ii32PCRel<0xE9, RawFrm, (outs), (ins i64i32imm_pcrel:$dst, variable_ops), "jmp\t$dst # TAILCALL", []>; - def TAILJMPr64 : I<0xFF, MRM4r, (outs), (ins GR64_TC:$dst, variable_ops), + def TAILJMPr64 : I<0xFF, MRM4r, (outs), (ins ptr_rc_tailcall:$dst, variable_ops), "jmp{q}\t{*}$dst # TAILCALL", []>; let mayLoad = 1 in Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=124272&r1=124271&r2=124272&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Tue Jan 25 20:04:09 2011 @@ -2025,6 +2025,7 @@ case X86::GR64_NOREX_NOSPRegClassID: case X86::GR64_NOSPRegClassID: case X86::GR64_TCRegClassID: + case X86::GR64_TCW64RegClassID: return load ? X86::MOV64rm : X86::MOV64mr; case X86::GR32RegClassID: case X86::GR32_ABCDRegClassID: Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=124272&r1=124271&r2=124272&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Tue Jan 25 20:04:09 2011 @@ -273,6 +273,10 @@ let ParserMatchClass = X86MemAsmOperand; } +// GPRs available for tailcall. +// It represents GR64_TC or GR64_TCW64. +def ptr_rc_tailcall : PointerLikeRegClass<2>; + // Special i32mem for addresses of load folding tail calls. These are not // allowed to use callee-saved registers since they must be scheduled // after callee-saved register are popped. @@ -287,7 +291,8 @@ // after callee-saved register are popped. def i64mem_TC : Operand { let PrintMethod = "printi64mem"; - let MIOperandInfo = (ops GR64_TC, i8imm, GR64_TC, i32imm, i8imm); + let MIOperandInfo = (ops ptr_rc_tailcall, i8imm, + ptr_rc_tailcall, i32imm, i8imm); let ParserMatchClass = X86MemAsmOperand; } Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp?rev=124272&r1=124271&r2=124272&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp Tue Jan 25 20:04:09 2011 @@ -320,6 +320,12 @@ if (TM.getSubtarget().is64Bit()) return &X86::GR64_NOSPRegClass; return &X86::GR32_NOSPRegClass; + case 2: // Available for tailcall (not callee-saved GPRs). + if (TM.getSubtarget().isTargetWin64()) + return &X86::GR64_TCW64RegClass; + if (TM.getSubtarget().is64Bit()) + return &X86::GR64_TCRegClass; + return &X86::GR32_TCRegClass; } } Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.td?rev=124272&r1=124271&r2=124272&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86RegisterInfo.td (original) +++ llvm/trunk/lib/Target/X86/X86RegisterInfo.td Tue Jan 25 20:04:09 2011 @@ -496,6 +496,9 @@ (GR32_TC sub_32bit)]; } +def GR64_TCW64 : RegisterClass<"X86", [i64], 64, [RAX, RCX, RDX, + R8, R9, R11]>; + // GR8_NOREX - GR8 registers which do not require a REX prefix. def GR8_NOREX : RegisterClass<"X86", [i8], 8, [AL, CL, DL, AH, CH, DH, BL, BH]> { Added: llvm/trunk/test/CodeGen/X86/tailcall-ri64.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tailcall-ri64.ll?rev=124272&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/tailcall-ri64.ll (added) +++ llvm/trunk/test/CodeGen/X86/tailcall-ri64.ll Tue Jan 25 20:04:09 2011 @@ -0,0 +1,24 @@ +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=AMD64 +; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s -check-prefix=WIN64 +; PR8743 +; TAILJMPri64 should not receive "callee-saved" registers beyond epilogue. + +; AMD64: jmpq +; AMD64-NOT: %{{e[a-z]|rbx|rbp|r10|r12|r13|r14|r15}} + +; WIN64: jmpq +; WIN64-NOT: %{{e[a-z]|rbx|rsi|rdi|rbp|r12|r13|r14|r15}} + +%class = type { [8 x i8] } +%vt = type { i32 (...)** } + +define %vt* @_ZN4llvm9UnsetInit20convertInitializerToEPNS_5RecTyE(%class* +%this, %vt* %Ty) align 2 { +entry: + %0 = bitcast %vt* %Ty to %vt* (%vt*, %class*)*** + %vtable = load %vt* (%vt*, %class*)*** %0, align 8 + %vfn = getelementptr inbounds %vt* (%vt*, %class*)** %vtable, i64 4 + %1 = load %vt* (%vt*, %class*)** %vfn, align 8 + %call = tail call %vt* %1(%vt* %Ty, %class* %this) + ret %vt* %call +} Modified: llvm/trunk/test/CodeGen/X86/tailcallstack64.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tailcallstack64.ll?rev=124272&r1=124271&r2=124272&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/tailcallstack64.ll (original) +++ llvm/trunk/test/CodeGen/X86/tailcallstack64.ll Tue Jan 25 20:04:09 2011 @@ -1,16 +1,20 @@ -; RUN: llc < %s -tailcallopt -march=x86-64 -post-RA-scheduler=true | FileCheck %s +; RUN: llc < %s -tailcallopt -mtriple=x86_64-linux -post-RA-scheduler=true | FileCheck %s +; RUN: llc < %s -tailcallopt -mtriple=x86_64-win32 -post-RA-scheduler=true | FileCheck %s + +; FIXME: Redundant unused stack allocation could be eliminated. +; CHECK: subq ${{24|88}}, %rsp ; Check that lowered arguments on the stack do not overwrite each other. ; Add %in1 %p1 to a different temporary register (%eax). -; CHECK: movl 32(%rsp), %eax +; CHECK: movl [[A1:32|144]](%rsp), %eax ; Move param %in1 to temp register (%r10d). -; CHECK: movl 40(%rsp), %r10d +; CHECK: movl [[A2:40|152]](%rsp), %r10d ; Add %in1 %p1 to a different temporary register (%eax). -; CHECK: addl %edi, %eax +; CHECK: addl {{%edi|%ecx}}, %eax ; Move param %in2 to stack. -; CHECK: movl %r10d, 32(%rsp) +; CHECK: movl %r10d, [[A1]](%rsp) ; Move result of addition to stack. -; CHECK: movl %eax, 40(%rsp) +; CHECK: movl %eax, [[A2]](%rsp) ; Eventually, do a TAILCALL ; CHECK: TAILCALL From isanbard at gmail.com Tue Jan 25 20:06:22 2011 From: isanbard at gmail.com (Bill Wendling) Date: Wed, 26 Jan 2011 02:06:22 -0000 Subject: [llvm-commits] [llvm] r124273 - /llvm/trunk/lib/Target/ARM/ARMMCInstLower.cpp Message-ID: <20110126020622.647DE2A6C12C@llvm.org> Author: void Date: Tue Jan 25 20:06:22 2011 New Revision: 124273 URL: http://llvm.org/viewvc/llvm-project?rev=124273&view=rev Log: Add needed braces. Modified: llvm/trunk/lib/Target/ARM/ARMMCInstLower.cpp Modified: llvm/trunk/lib/Target/ARM/ARMMCInstLower.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMMCInstLower.cpp?rev=124273&r1=124272&r2=124273&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMMCInstLower.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMMCInstLower.cpp Tue Jan 25 20:06:22 2011 @@ -101,13 +101,14 @@ case MachineOperand::MO_BlockAddress: MCOp = GetSymbolRef(MO,AP.GetBlockAddressSymbol(MO.getBlockAddress()),AP); break; - case MachineOperand::MO_FPImmediate: + case MachineOperand::MO_FPImmediate: { APFloat Val = MO.getFPImm()->getValueAPF(); bool ignored; Val.convert(APFloat::IEEEdouble, APFloat::rmTowardZero, &ignored); MCOp = MCOperand::CreateFPImm(Val.convertToDouble()); break; } + } OutMI.addOperand(MCOp); } From geek4civic at gmail.com Tue Jan 25 20:09:43 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Wed, 26 Jan 2011 11:09:43 +0900 Subject: [llvm-commits] [Review request] Tweaking Win64 Codegen In-Reply-To: <705B073D-541C-499B-B33C-3FCE2A1A965A@2pi.dk> References: <6C9AA982-EFB8-4020-AEA2-273C6C1C721C@2pi.dk> <705B073D-541C-499B-B33C-3FCE2A1A965A@2pi.dk> Message-ID: Jakob, 2011/1/14 Jakob Stoklund Olesen : > Your patches #8 and #9 look good to me. Committed in r124271 and r124272, thank you! ...Takumi From echristo at apple.com Tue Jan 25 20:58:39 2011 From: echristo at apple.com (Eric Christopher) Date: Wed, 26 Jan 2011 02:58:39 -0000 Subject: [llvm-commits] [llvm] r124275 - in /llvm/trunk: include/llvm/Analysis/InlineCost.h lib/Analysis/InlineCost.cpp Message-ID: <20110126025839.C9EEC2A6C12C@llvm.org> Author: echristo Date: Tue Jan 25 20:58:39 2011 New Revision: 124275 URL: http://llvm.org/viewvc/llvm-project?rev=124275&view=rev Log: Separate out the constant bonus from the size reduction metrics. Rework a few loops accordingly. Should be no functional change. This is a step for more accurate cost/benefit analysis of devirt/inlining bonuses. Modified: llvm/trunk/include/llvm/Analysis/InlineCost.h llvm/trunk/lib/Analysis/InlineCost.cpp Modified: llvm/trunk/include/llvm/Analysis/InlineCost.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/InlineCost.h?rev=124275&r1=124274&r2=124275&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/InlineCost.h (original) +++ llvm/trunk/include/llvm/Analysis/InlineCost.h Tue Jan 25 20:58:39 2011 @@ -96,10 +96,9 @@ public: unsigned ConstantWeight; unsigned AllocaWeight; - unsigned ConstantBonus; - ArgInfo(unsigned CWeight, unsigned AWeight, unsigned CBonus) - : ConstantWeight(CWeight), AllocaWeight(AWeight), ConstantBonus(CBonus) + ArgInfo(unsigned CWeight, unsigned AWeight) + : ConstantWeight(CWeight), AllocaWeight(AWeight) {} }; @@ -125,6 +124,7 @@ // the ValueMap will update itself when this happens. ValueMap CachedFunctionInfo; + unsigned CountBonusForConstant(Value *V); public: /// getInlineCost - The heuristic used to determine if we should inline the Modified: llvm/trunk/lib/Analysis/InlineCost.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/InlineCost.cpp?rev=124275&r1=124274&r2=124275&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/InlineCost.cpp (original) +++ llvm/trunk/lib/Analysis/InlineCost.cpp Tue Jan 25 20:58:39 2011 @@ -142,64 +142,6 @@ NumBBInsts[BB] = NumInsts - NumInstsBeforeThisBB; } -// CountBonusForConstant - Figure out an approximation for how much per-call -// performance boost we can expect if the specified value is constant. -unsigned CodeMetrics::CountBonusForConstant(Value *V) { - unsigned Bonus = 0; - bool indirectCallBonus = false; - for (Value::use_iterator UI = V->use_begin(), E = V->use_end(); UI != E;++UI){ - User *U = *UI; - if (CallInst *CI = dyn_cast(U)) { - // Turning an indirect call into a direct call is a BIG win - if (CI->getCalledValue() == V) - indirectCallBonus = true; - } - else if (InvokeInst *II = dyn_cast(U)) { - // Turning an indirect call into a direct call is a BIG win - if (II->getCalledValue() == V) - indirectCallBonus = true; - } - // FIXME: Eliminating conditional branches and switches should - // also yield a per-call performance boost. - else { - // Figure out the bonuses that wll accrue due to simple constant - // propagation. - Instruction &Inst = cast(*U); - - // We can't constant propagate instructions which have effects or - // read memory. - // - // FIXME: It would be nice to capture the fact that a load from a - // pointer-to-constant-global is actually a *really* good thing to zap. - // Unfortunately, we don't know the pointer that may get propagated here, - // so we can't make this decision. - if (Inst.mayReadFromMemory() || Inst.mayHaveSideEffects() || - isa(Inst)) - continue; - - bool AllOperandsConstant = true; - for (unsigned i = 0, e = Inst.getNumOperands(); i != e; ++i) - if (!isa(Inst.getOperand(i)) && Inst.getOperand(i) != V) { - AllOperandsConstant = false; - break; - } - - if (AllOperandsConstant) - Bonus += CountBonusForConstant(&Inst); - } - } - - // FIXME: The only reason we're applying the bonus once is while it's great - // to devirtualize calls the magnitude of the bonus x number of call sites - // can lead to a huge code explosion when we prefer to inline 1000 instruction - // functions that have 10 call sites. This should be made a function of the - // estimated inline penalty/benefit + the indirect call bonus. - if (indirectCallBonus) Bonus += InlineConstants::IndirectCallBonus; - - return Bonus; -} - - // CountCodeReductionForConstant - Figure out an approximation for how many // instructions will be constant folded if the specified value is constant. // @@ -309,17 +251,14 @@ ArgumentWeights.reserve(F->arg_size()); for (Function::arg_iterator I = F->arg_begin(), E = F->arg_end(); I != E; ++I) ArgumentWeights.push_back(ArgInfo(Metrics.CountCodeReductionForConstant(I), - Metrics.CountCodeReductionForAlloca(I), - Metrics.CountBonusForConstant(I))); + Metrics.CountCodeReductionForAlloca(I))); } /// NeverInline - returns true if the function should never be inlined into /// any caller -bool InlineCostAnalyzer::FunctionInfo::NeverInline() -{ +bool InlineCostAnalyzer::FunctionInfo::NeverInline() { return (Metrics.callsSetJmp || Metrics.isRecursive || Metrics.containsIndirectBr); - } // getSpecializationBonus - The heuristic used to determine the per-call // performance boost for using a specialization of Callee with argument @@ -343,8 +282,14 @@ if (CalleeFI->Metrics.NumBlocks == 0) CalleeFI->analyzeFunction(Callee); - for (unsigned i = 0, s = SpecializedArgNos.size(); i < s; ++i ) - Bonus += CalleeFI->ArgumentWeights[SpecializedArgNos[i]].ConstantBonus; + unsigned ArgNo = 0; + unsigned i = 0; + for (Function::arg_iterator I = Callee->arg_begin(), E = Callee->arg_end(); + I != E; ++I, ++ArgNo) + if (ArgNo == SpecializedArgNos[i]) { + ++i; + Bonus += CountBonusForConstant(I); + } // Calls usually take a long time, so they make the specialization gain // smaller. @@ -353,6 +298,62 @@ return Bonus; } +// CountBonusForConstant - Figure out an approximation for how much per-call +// performance boost we can expect if the specified value is constant. +unsigned InlineCostAnalyzer::CountBonusForConstant(Value *V) { + unsigned Bonus = 0; + bool indirectCallBonus = false; + for (Value::use_iterator UI = V->use_begin(), E = V->use_end(); UI != E;++UI){ + User *U = *UI; + if (CallInst *CI = dyn_cast(U)) { + // Turning an indirect call into a direct call is a BIG win + if (CI->getCalledValue() == V) + indirectCallBonus = true; + } + else if (InvokeInst *II = dyn_cast(U)) { + // Turning an indirect call into a direct call is a BIG win + if (II->getCalledValue() == V) + indirectCallBonus = true; + } + // FIXME: Eliminating conditional branches and switches should + // also yield a per-call performance boost. + else { + // Figure out the bonuses that wll accrue due to simple constant + // propagation. + Instruction &Inst = cast(*U); + + // We can't constant propagate instructions which have effects or + // read memory. + // + // FIXME: It would be nice to capture the fact that a load from a + // pointer-to-constant-global is actually a *really* good thing to zap. + // Unfortunately, we don't know the pointer that may get propagated here, + // so we can't make this decision. + if (Inst.mayReadFromMemory() || Inst.mayHaveSideEffects() || + isa(Inst)) + continue; + + bool AllOperandsConstant = true; + for (unsigned i = 0, e = Inst.getNumOperands(); i != e; ++i) + if (!isa(Inst.getOperand(i)) && Inst.getOperand(i) != V) { + AllOperandsConstant = false; + break; + } + + if (AllOperandsConstant) + Bonus += CountBonusForConstant(&Inst); + } + } + + // FIXME: The only reason we're applying the bonus once is while it's great + // to devirtualize calls the magnitude of the bonus x number of call sites + // can lead to a huge code explosion when we prefer to inline 1000 instruction + // functions that have 10 call sites. This should be made a function of the + // estimated inline penalty/benefit + the indirect call bonus. + if (indirectCallBonus) Bonus += InlineConstants::IndirectCallBonus; + + return Bonus; +} // getInlineCost - The heuristic used to determine if we should inline the // function call or not. @@ -427,31 +428,33 @@ // passed into the function. // unsigned ArgNo = 0; - for (CallSite::arg_iterator I = CS.arg_begin(), E = CS.arg_end(); - I != E; ++I, ++ArgNo) { - // Each argument passed in has a cost at both the caller and the callee - // sides. Measurements show that each argument costs about the same as an - // instruction. - InlineCost -= InlineConstants::InstrCost; + CallSite::arg_iterator I = CS.arg_begin(); + for (Function::arg_iterator FI = Callee->arg_begin(), FE = Callee->arg_end(); + FI != FE; ++I, ++FI, ++ArgNo) { // If an alloca is passed in, inlining this function is likely to allow // significant future optimization possibilities (like scalar promotion, and // scalarization), so encourage the inlining of the function. // - if (isa(I)) { - if (ArgNo < CalleeFI->ArgumentWeights.size()) - InlineCost -= CalleeFI->ArgumentWeights[ArgNo].AllocaWeight; - - // If this is a constant being passed into the function, use the argument - // weights calculated for the callee to determine how much will be folded - // away with this information. - } else if (isa(I)) { - if (ArgNo < CalleeFI->ArgumentWeights.size()) - InlineCost -= (CalleeFI->ArgumentWeights[ArgNo].ConstantWeight + - CalleeFI->ArgumentWeights[ArgNo].ConstantBonus); + if (isa(I)) + InlineCost -= CalleeFI->ArgumentWeights[ArgNo].AllocaWeight; + + // If this is a constant being passed into the function, use the argument + // weights calculated for the callee to determine how much will be folded + // away with this information. + else if (isa(I)) { + InlineCost -= CalleeFI->ArgumentWeights[ArgNo].ConstantWeight; + + // Compute any constant bonus due to inlining we want to give here. + InlineCost -= CountBonusForConstant(FI); } } + // Each argument passed in has a cost at both the caller and the callee + // sides. Measurements show that each argument costs about the same as an + // instruction. + InlineCost -= (CS.arg_size() * InlineConstants::InstrCost); + // If there is only one call of the function, and it has internal linkage, // make it almost guaranteed to be inlined. // From david_dean at apple.com Tue Jan 25 19:26:48 2011 From: david_dean at apple.com (David Dean) Date: Wed, 26 Jan 2011 01:26:48 -0000 Subject: [llvm-commits] [zorg] r124265 - in /zorg/trunk/buildbot/llvmlab: ./ master/ master/Makefile master/buildbot.tac master/config/ master/config/__init__.py master/config/builders.py master/config/local.cfg master/config/schedulers.py master/config/slaves.py master/config/status.py master/master.cfg master/org.llvm.lab.master.plist master/state.sqlite Message-ID: <20110126012648.BD0062A6C12C@llvm.org> Author: ddean Date: Tue Jan 25 19:26:48 2011 New Revision: 124265 URL: http://llvm.org/viewvc/llvm-project?rev=124265&view=rev Log: add initial lab.llvm.org buildbot master configuration Added: zorg/trunk/buildbot/llvmlab/ zorg/trunk/buildbot/llvmlab/master/ zorg/trunk/buildbot/llvmlab/master/Makefile zorg/trunk/buildbot/llvmlab/master/buildbot.tac zorg/trunk/buildbot/llvmlab/master/config/ zorg/trunk/buildbot/llvmlab/master/config/__init__.py zorg/trunk/buildbot/llvmlab/master/config/builders.py zorg/trunk/buildbot/llvmlab/master/config/local.cfg zorg/trunk/buildbot/llvmlab/master/config/schedulers.py zorg/trunk/buildbot/llvmlab/master/config/slaves.py zorg/trunk/buildbot/llvmlab/master/config/status.py zorg/trunk/buildbot/llvmlab/master/master.cfg zorg/trunk/buildbot/llvmlab/master/org.llvm.lab.master.plist zorg/trunk/buildbot/llvmlab/master/state.sqlite (with props) Added: zorg/trunk/buildbot/llvmlab/master/Makefile URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/buildbot/llvmlab/master/Makefile?rev=124265&view=auto ============================================================================== --- zorg/trunk/buildbot/llvmlab/master/Makefile (added) +++ zorg/trunk/buildbot/llvmlab/master/Makefile Tue Jan 25 19:26:48 2011 @@ -0,0 +1,34 @@ +# -*- makefile -*- + +# This is a simple makefile which lives in a buildmaster/buildslave +# directory (next to the buildbot.tac file). It allows you to start/stop the +# master or slave in a launchd-friendly way by doing 'make start' or 'make stop' +# and includes some other targets for convenience. + +ZORGROOT := $(shell pwd)/../../.. + +start: + launchctl start org.llvm.smooshlab.master + +start-standalone: + env PYTHONPATH=$(ZORGROOT):$(ZORGROOT)/buildbot:"$$PYTHONPATH" /usr/bin/twistd \ + --nodaemon \ + --python=buildbot.tac \ + --logfile=twistd.log \ + --prefix=smooshlab + +# This stops the buildbot cleanly so launchd will not restart it, use +# 'make start' to restart it correctly via launchctl +stop: + buildbot stop . + +restart: stop start + +# Reloads the master.cfg and associated files. +sighup: + buildbot sighup . + +reconfig: sighup + +checkconfig: + env PYTHONPATH=$(ZORGROOT):$(ZORGROOT)/buildbot:"$$PYTHONPATH" buildbot checkconfig Added: zorg/trunk/buildbot/llvmlab/master/buildbot.tac URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/buildbot/llvmlab/master/buildbot.tac?rev=124265&view=auto ============================================================================== --- zorg/trunk/buildbot/llvmlab/master/buildbot.tac (added) +++ zorg/trunk/buildbot/llvmlab/master/buildbot.tac Tue Jan 25 19:26:48 2011 @@ -0,0 +1,12 @@ +# -*- Python -*- + +from twisted.application import service +from buildbot.master import BuildMaster +import os + +basedir = os.path.dirname(os.path.abspath(__file__)) +configfile = r'master.cfg' + +application = service.Application('buildmaster') +BuildMaster(basedir, configfile).setServiceParent(application) + Added: zorg/trunk/buildbot/llvmlab/master/config/__init__.py URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/buildbot/llvmlab/master/config/__init__.py?rev=124265&view=auto ============================================================================== --- zorg/trunk/buildbot/llvmlab/master/config/__init__.py (added) +++ zorg/trunk/buildbot/llvmlab/master/config/__init__.py Tue Jan 25 19:26:48 2011 @@ -0,0 +1,9 @@ +import builders +import slaves +import status + +# Load local options. +import os +import ConfigParser +options = ConfigParser.RawConfigParser() +options.read(os.path.join(os.path.dirname(__file__), 'local.cfg')) Added: zorg/trunk/buildbot/llvmlab/master/config/builders.py URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/buildbot/llvmlab/master/config/builders.py?rev=124265&view=auto ============================================================================== --- zorg/trunk/buildbot/llvmlab/master/config/builders.py (added) +++ zorg/trunk/buildbot/llvmlab/master/config/builders.py Tue Jan 25 19:26:48 2011 @@ -0,0 +1,553 @@ +import buildbot +import buildbot.process.factory +from buildbot.steps.shell import WithProperties +from buildbot.steps.trigger import Trigger +from buildbot.schedulers import basic, timed, triggerable +from buildbot.steps import source +from buildbot.steps.transfer import FileUpload, FileDownload + +def setProperty(f, new_property, new_value): + f.addStep(buildbot.steps.shell.SetProperty( + command=['echo', new_value], + property=new_property, + description=['set property', new_property], + workdir='.')) + return f + +def pullsrc(f, repo_name, URL, dir, pull_mode='clobber', def_branch='trunk'): + f.addStep(source.SVN(name='pull ' + repo_name, + mode=pull_mode, + baseURL=URL, + defaultBranch=def_branch, workdir=dir, always_purge='True' + )) + return f + + +def pullClang(f): + pullsrc(f, 'clang', 'http://llvm.org/svn/llvm-project/cfe/', 'llvm/tools/clang', 'update') + return f + +def pullllvm(f): + pullsrc(f, 'llvm', 'http://llvm.org/svn/llvm-project/llvm/', 'llvm', 'update') + return f + +def pulltest_suite(f): + pullsrc(f, 'llvm tests', 'http://llvm.org/svn/llvm-project/test-suite/', 'test-suite', 'update') + return f + +def pullclang_tests(f): + pullsrc(f, 'clang tests', 'http://llvm.org/svn/llvm-project/clang-tests/', 'test-suite', 'update') + return f + +def pulllibcxx(f): + pullsrc(f, 'libc++', 'http://llvm.org/svn/llvm-project/libcxx/', 'libcxx') + return f + +def pullboostrunner(f): +#alwaysUseLatest +#pullsrc(f, 'boost runner', 'http://svn.boost.org/svn/boost/%%BRANCH%%/tools/regression/src/', 'boost_runner') + f.addStep(source.SVN(name='pull boost runner', + mode='clobber', + baseURL='http://svn.boost.org/svn/boost/%%BRANCH%%/tools/regression/src/', + defaultBranch='trunk', workdir='boost_runner', alwaysUseLatest='True', + )) + return f + +def getBuildDir(f): + f.addStep(buildbot.steps.shell.SetProperty(name='get_builddir', + command=['pwd'], + property='builddir', + description='set build dir', + workdir='.')) + return f + +def GetCompilerArtifacts(f): + if WithProperties('%(revision)s')=='None': + src_file = WithProperties('~/artifacts/%(use_builder)s/%(got_revision)s/%(use_compiler)s.tar.gz') + else: + src_file = WithProperties('~/artifacts/%(use_builder)s/%(revision)s/%(use_compiler)s.tar.gz') + f.addStep(FileDownload(mastersrc=src_file, + slavedest=WithProperties('%(builddir)s/%(use_compiler)s.tar.gz') + )) + #extract compiler artifacts used for this build + f.addStep(buildbot.steps.shell.ShellCommand( + name='unzip', + command=['tar', '-zxvf', WithProperties('%(use_compiler)s.tar.gz'),], + haltOnFailure=True, + description=['extract', WithProperties('%(use_compiler)s')], + workdir='.', + )) + return f + +def cleanCompilerDir(f): + f.addStep(buildbot.steps.shell.ShellCommand( + command=['rm', '-rf', WithProperties('%(use_compiler:-)s')], + haltOnFailure=False, + description=['rm dir', WithProperties('%(use_compiler:-)s')], + workdir='.',)) + f.addStep(buildbot.steps.shell.ShellCommand( + command=['rm', '-rf', WithProperties('%(use_compiler:-)s.tar.gz')], + haltOnFailure=False, + description=['rm archive', WithProperties('%(use_compiler:-)s')], + workdir='.',)) + f.addStep(buildbot.steps.shell.ShellCommand( + command=['rm', '-rf', WithProperties('%(compiler_built:-)s')], + haltOnFailure=False, + description=['rm dir', WithProperties('%(compiler_built:-)s')], + workdir='.',)) + f.addStep(buildbot.steps.shell.ShellCommand( + command=['rm', '-rf', WithProperties('%(compiler_built:-)s.tar.gz')], + haltOnFailure=False, + description=['rm archive', WithProperties('%(compiler_built:-)s')], + workdir='.',)) + return f + +def uploadArtifacts(f): + f.addStep(buildbot.steps.shell.ShellCommand( + name='tar_and_zip', + command=['tar', 'czvf', WithProperties('%(compiler_built)s.tar.gz'), + WithProperties('./%(compiler_built)s/')], + haltOnFailure=True, + description=['tar', '&', 'zip'], + workdir='.', + )) + archive_src = WithProperties('%(builddir)s/%(compiler_built)s.tar.gz') + archive_dest = WithProperties('~/artifacts/%(buildername)s/%(got_revision)s/%(compiler_built)s.tar.gz') + f.addStep(FileUpload(slavesrc=archive_src, masterdest=archive_dest)) + return f + +def regressionTests(f): + f.addStep(buildbot.steps.shell.ShellCommand( + name='run_llvm_tests', + command=['make', '-j', WithProperties('%(jobs)s'), + ], + haltOnFailure=True, + description=['llvm', 'tests'], + env={'PATH': WithProperties('%(builddir)s/%(compiler_built)s/%(compiler_type)s/bin:${PATH}')}, + workdir=WithProperties('%(compiler_built)s/test'))) + f.addStep(buildbot.steps.shell.ShellCommand( + name='run_clang_tests', + command=['make', '-j', WithProperties('%(jobs)s'), + ], + haltOnFailure=True, + description=['clang', 'tests'], + env={'PATH': WithProperties('%(builddir)s/%(compiler_built)s/%(compiler_type)s/bin:${PATH}')}, + workdir=WithProperties('%(compiler_built)s/tools/clang/test'))) + return f + + +def createPhase1(): + # create the factory + f = buildbot.process.factory.BuildFactory() + f = clangStage1(f) + f = uploadArtifacts(f) + f = regressionTests(f) + return f + + +def clangStage1(f,config_options=''): + # Determine the build directory. + f = getBuildDir(f) + f = setProperty(f, 'compiler_built', 'stage1') + # clean out the directory used for the stage 1 compiler + #f = cleanCompilerDir(f) + # pull sources + f = pullllvm(f) + f = pullClang(f) + # do config/make + f.addStep(buildbot.steps.shell.ShellCommand( + name='configure', + command=[ + '../llvm/configure', '--enable-optimized', '--disable-bindings', + '--with-llvmcc=clang', '--without-llvmgcc', '--without-llvmgxx', + ], + haltOnFailure=True, + description=['configure'], + workdir=WithProperties('%(compiler_built)s'))) + f.addStep(buildbot.steps.shell.ShellCommand( + name='make', + command=['make', '-j', WithProperties('%(jobs)s'),], + haltOnFailure=True, + description=['make'], + workdir=WithProperties('%(compiler_built)s'))) + return f + +def clangHost(config_options): + # create the factory + f = buildbot.process.factory.BuildFactory() + # Determine the build directory. + f = getBuildDir(f) + f = setProperty(f, 'compiler_built', 'stage2') + f = setProperty(f, 'use_path', WithProperties('%(builddir)s/%(use_compiler)s/%(use_type)s')) + # clean out the directory/archives used for the stage 1 compiler + # clean out the directory used to build compiler + f = cleanCompilerDir(f) + # pull sources + f = pullllvm(f) + f = pullClang(f) + #Download artifacts from phase 1 compiler build + f = GetCompilerArtifacts(f) + # configure to use stage1 compiler (artifacts from phase 1 build) + f.addStep(buildbot.steps.shell.ShellCommand( + name='configure_with_host', + command=[ + '../llvm/configure', '--disable-bindings', + '--with-llvmcc=clang', '--without-llvmgcc', '--without-llvmgxx', + WithProperties('CC=%(use_path)s/bin/clang'), + WithProperties('CXX=%(use_path)s/bin/clang++'), + config_options], + haltOnFailure=True, + description=['configure'], + env={'PATH': WithProperties('%(use_path)s/bin:${PATH}')}, + workdir=WithProperties('%(compiler_built)s'))) + # build stage 2 compiler + f.addStep(buildbot.steps.shell.ShellCommand( + name='stage_2_make', + command=['make', '-j', WithProperties('%(jobs)s')], + haltOnFailure=True, + description=['make'], + env={'PATH': WithProperties('%(use_path)s/bin:${PATH}')}, + workdir=WithProperties('%(compiler_built)s'))) + # save artifacts of thids build for use by other builders + f = uploadArtifacts(f) + f = regressionTests(f) + return f + +def getGatedFactory(buildphase, next): + f = buildbot.process.factory.BuildFactory() + f.addStep(Trigger(schedulerNames=[buildphase], + waitForFinish=True, + haltOnFailure=True, + updateSourceStamp=True, + set_properties={'revision': WithProperties('%(revision)s'), 'got_revision': WithProperties('%(revision)s')} +# set_properties={'use_compiler': WithProperties('%(use_compiler:-stage1)s'), +# 'use_builder': WithProperties('%(use_builder:-phase1)s')}, + )) + f.addStep(Trigger(schedulerNames=[next], + waitForFinish=False, + updateSourceStamp=True, + set_properties={'revision': WithProperties('%(revision)s'), 'got_revision': WithProperties('%(revision)s')} + )) + return f + +def PublishGoodBuild(): + f = buildbot.process.factory.BuildFactory() + #add steps to prepare a release and announce a good build + return f + +def Placeholder(): + f = buildbot.process.factory.BuildFactory() + return f + +def makePhaseBuilder(bldname, trigger1, trigger2, bldslaves): + return { 'name' : bldname, + 'factory' : getGatedFactory(trigger1, trigger2), + 'slavenames' : bldslaves , + 'category' : 'status', + } + +def HostedClang(myname, compiler_type, use_compiler, use_type, slaves, config_options=''): + return { 'name' : myname, + 'builddir' : 'build.'+myname, + 'factory' : clangHost(config_options), + 'slavenames' : slaves, + 'category' : 'clang', + 'properties' : {'compiler_type': compiler_type, 'use_builder': use_compiler, + 'use_type': use_type, 'use_compiler': 'stage1' + }} + +def NightlyFactory(compiler, compiler_dir, options): + f = buildbot.process.factory.BuildFactory() + # Determine the build directory. + f = getBuildDir(f) + f = setProperty(f, 'use_builder', compiler) + f = setProperty(f, 'use_compiler', compiler_dir) + f = setProperty(f, 'use_path', WithProperties('%(builddir)s/%(use_compiler)s/%(use_type)s')) + #clean out the directory/archives prior to extracting compiler + f = cleanCompilerDir(f) + # pull test-suite + f = pulltest_suite(f) + #Download compiler artifacts to be used for this build + f = GetCompilerArtifacts(f) + f.addStep(buildbot.steps.shell.ShellCommand( + name='sanity_test', + command=[WithProperties('%(use_path)s/bin/clang'), + '--version'], + haltOnFailure=True, + description=['sanity test'], + env={'PATH': WithProperties('%(use_path)s/bin:${PATH}')}, + workdir='.')) + # run tests + f.addStep(buildbot.steps.shell.ShellCommand( + name='configure_tests', + command=['./configure', + WithProperties('CC=%(use_path)s/bin/clang'), + WithProperties('CXX=%(use_path)s/bin/clang++'), + 'CFLAGS='+options, + 'CXXFLAGS='+options, + # WithProperties('--with-llvmsrc=%(builddir)s/llvm'), + # WithProperties('--with-llvmobj=%(builddir)s/'+compiler_dir), + #options + ], + haltOnFailure=True, + description=['configure tests'], + env={'PATH': WithProperties('%(use_path)s/bin:${PATH}')}, + workdir='test-suite')) +# f.addStep(buildbot.steps.shell.ShellCommand( +# name='run_nightly_tests', +# command=['make', WithProperties('-j%(jobs)s'), 'ENABLE_PARALLEL_REPORT=1', +# 'DISABLE_CBE=1', 'DISABLE_JIT=1', 'TEST=nightly', 'report' +# ], +# haltOnFailure=True, +# env={'PATH': WithProperties('%(use_path)s/bin:${PATH}')}, +# description=['run tests'], +# workdir='test-suite')) + return f + +def Nightly(compiler, compiler_type, compiler_dir, slaves, options=''): + return { 'name' : 'nightly_'+ compiler + options, + 'builddir' : 'build.nightly.'+ compiler + options, + 'factory' : NightlyFactory(compiler, compiler_dir, options), + 'slavenames' : slaves, + 'category' : 'tests', + 'properties' : {'use_builder': compiler, 'use_type': compiler_type, + 'use_compiler': compiler_dir + }} + +def stage1Clang(compiler, compiler_type, slave): + return { 'name' : compiler, + 'builddir' : 'build.'+ compiler, + 'factory' : createPhase1(), + 'slavename' : slave, + 'category' : 'clang', + 'properties' : {'compiler_type': compiler_type + }} + +def HostStage3Clang(config_options): + # create the factory + f = buildbot.process.factory.BuildFactory() + # Determine the build directory. + f = getBuildDir(f) + f = setProperty(f, 'compiler_built', 'stage3') + f = setProperty(f, 'use_path', WithProperties('%(builddir)s/%(use_compiler)s/%(use_type)s')) + # clean out the directory/archives used for the stage 2 compiler + # clean out the directory used to build compiler + f = cleanCompilerDir(f) + # pull sources + f = pullllvm(f) + f = pullClang(f) + #Download artifacts from phase 1 compiler build + f = GetCompilerArtifacts(f) + # configure to use stage1 compiler (artifacts from phase 1 build) + f.addStep(buildbot.steps.shell.ShellCommand( + name='configure_with_host', + command=[ + '../llvm/configure', '--enable-optimized', '--disable-bindings', + '--with-llvmcc=clang', '--without-llvmgcc', '--without-llvmgxx', + WithProperties('CC=%(use_path)s/bin/clang'), + WithProperties('CXX=%(use_path)s/bin/clang++'), + config_options], + haltOnFailure=True, + description=['configure'], + env={'PATH': WithProperties('%(use_path)s/bin:${PATH}')}, + workdir=WithProperties('%(compiler_built)s'))) + # build stage 2 compiler + f.addStep(buildbot.steps.shell.ShellCommand( + name='stage_3_make', + command=['make', '-j', WithProperties('%(jobs)s')], + haltOnFailure=True, + description=['make'], + env={'PATH': WithProperties('%(use_path)s/bin:${PATH}')}, + workdir=WithProperties('%(compiler_built)s'))) + # save artifacts of thids build for use by other builders + f = uploadArtifacts(f) + f = regressionTests(f) + f.addStep(Trigger(schedulerNames=['stage3Nightly'], + waitForFinish=True, + updateSourceStamp=True, + set_properties={'revision': WithProperties('%(revision)s'), 'got_revision': WithProperties('%(revision)s')} + )) + return f + +def stage3Clang(use_compiler, use_type, slaves, config_options=''): + return { 'name' : use_compiler + '-stage3', + 'builddir' : 'build.'+ use_compiler + '-stage3', + 'factory' : HostStage3Clang(config_options), + 'slavenames' : slaves, + 'category' : 'clang', + 'properties' : {'compiler_type': use_type, 'use_builder': use_compiler, + 'use_type': use_type, 'use_compiler': 'stage2' + }} + +def gccTestSuite(use_compiler, use_type, slaves, config_options=''): + return { 'name' : 'gccTestSuite-'+ use_compiler, + 'builddir' : 'build.'+ 'gccTestSuite-'+ use_compiler, + 'factory' : gccRunSuite(config_options), + 'slavenames' : slaves, + 'category' : 'clang', + 'properties' : {'compiler_type': use_type, 'use_builder': use_compiler, + 'use_type': use_type, 'use_compiler': 'stage2' + }} + +def libcxx(use_compiler, use_type, slaves, config_options=''): + return { 'name' : 'libcxx-'+ use_compiler, + 'builddir' : 'build.'+ 'libcxx-'+ use_compiler, + 'factory' : runlibcxx(config_options), + 'slavenames' : slaves, + 'category' : 'clang', + 'properties' : {'compiler_type': use_type, 'use_builder': use_compiler, + 'use_type': use_type, 'use_compiler': 'stage2' + }} + +def boost(tag, use_compiler, use_type, slaves, config_options=''): + return { 'name' : 'boost-' + tag + '-' + use_compiler, + 'builddir' : 'build.'+ 'boost-' + tag + '-' + use_compiler, + 'factory' : runboost(config_options), + 'slavenames' : slaves, + 'category' : 'clang', + 'properties' : {'compiler_type': use_type, 'use_builder': use_compiler, + 'use_type': use_type, 'use_compiler': 'stage2', + 'boost_tag': tag + }} + +def gccRunSuite(config_options): + f = buildbot.process.factory.BuildFactory() + # Determine the build directory. + getBuildDir(f) + setProperty(f, 'use_path', WithProperties('%(builddir)s/%(use_compiler)s/%(use_type)s')) + cleanCompilerDir(f) + # pull test-suite + pullclang_tests(f) + #Download compiler artifacts to be used for this build + GetCompilerArtifacts(f) + # run tests +# f.addStep(buildbot.steps.shell.ShellCommand( +# name='make_check', +# command=['make', 'check', +# WithProperties('CC_UNDER_TEST=%(use_path)s/bin/clang'), +# WithProperties('CXX_UNDER_TEST=%(use_path)s/bin/clang++'),], +# haltOnFailure=True, +# description=['make check'], +# env={'PATH': WithProperties('/usr/local/bin/:%(use_path)s/bin:${PATH}')}, +# workdir='test-suite/gcc-4_2-testsuite')) + return f + +def runlibcxx(config_options): + f = buildbot.process.factory.BuildFactory() + # Determine the build directory. + getBuildDir(f) + setProperty(f, 'use_path', WithProperties('%(builddir)s/%(use_compiler)s/%(use_type)s')) + cleanCompilerDir(f) + # pull test-suite + pulllibcxx(f) + #Download compiler artifacts to be used for this build + GetCompilerArtifacts(f) + # run tests +# f.addStep(buildbot.steps.shell.ShellCommand( +# name='buildit', +# command=['./buildit',], +# haltOnFailure=True, +# description=['build libc++'], +# env={'PATH': WithProperties('%(use_path)s/bin:${PATH}')}, +# workdir='libcxx/lib')) +# f.addStep(buildbot.steps.shell.ShellCommand( +# name='testit', +# command=['testit',], +# haltOnFailure=True, +# description=['test libc++'], +# env={'PATH': WithProperties('%(use_path)s/bin:${PATH}')}, +# workdir='libcxx/test')) + return f + +def runboost(config_options): + f = buildbot.process.factory.BuildFactory() + # Determine the build directory. + getBuildDir(f) + setProperty(f, 'use_path', WithProperties('%(builddir)s/%(use_compiler)s/%(use_type)s')) + cleanCompilerDir(f) + # pull test-suite + pullboostrunner(f) + #Download compiler artifacts to be used for this build + GetCompilerArtifacts(f) + # run tests + # runner=llvmlab + # BOOST_ROOT=builddir/boost + # echo using borland : "integration" : %CD:\=/%/integration/bin/bcc32 : ; > %MYJAMFILE% + f.addStep(buildbot.steps.shell.ShellCommand( + name='user-config.jam', + command=['echo', 'using', 'clang', ':', 'darwin-4.2.1', ':', + WithProperties('%(use_path)s/bin/clang'), ':', config_options, + ';', '>', 'user-config.jam'], + haltOnFailure=True, + description=['create user-config.jam'], + workdir='.', + )) + #--bjam-options=target-os=windows --bjam-options=-l300 --bjam-options=--debug-level=3 --bjam-options=--user-config=%MYJAMFILE% --have-source --skip-script-download --ftp=ftp://boost:4peiV8Xwxfv9 at ftp.siliconman.net >runner.log + f.addStep(buildbot.steps.shell.ShellCommand( + name='run.py', + command=['python', 'boost_runner/run.py', WithProperties('--tag=%(boost_tag)s'), + '--runner=llvmlab', '--bjam-options=--toolset=clang-darwin', + WithProperties('--bjam-options=--user-config=%(builddir)s/userconfig.jam'), + '--ftp=ftp://boost:4peiV8Xwxfv9 at ftp.siliconman.net', + WithProperties('--bjam-options=-j%(jobs)s'),'--user=""',], + haltOnFailure=True, + description=['boost regression harness'], + workdir='.', + timeout=14400 + )) + return f + +def get_builders(all_slaves): + phase1 = 'clang-x86_64-osx10-gcc42-RA' + final_reference = 'clang-x86_64-osx10-RA' + typeDA = 'Debug+Asserts' + typeR = 'Release' + typeRA = 'Release+Asserts' + phase1_slave = 'llvmlab.local' + #phase2_slaves = [ 'leone.apple.com', 'dtqa09.apple.com' ] + #phaseRunners = [ 'leone.apple.com', 'dtqa09.apple.com' ] + snow_leopard_slaves = all_slaves + barolo_slaves = [] + phase2_slaves = filter(lambda x:x not in [phase1_slave], snow_leopard_slaves) + phaseRunners = filter(lambda x:x not in [phase1_slave], snow_leopard_slaves) + return [ + #Build to announce good build and prepare potential release candidate + { 'name' : 'Validated Build', + 'factory' : PublishGoodBuild(), + 'slavenames' : phaseRunners, + 'category' : 'status', + }, + #parent builds for each phase + makePhaseBuilder('phase1 - sanity', 'doPhase1','phase2', phaseRunners), + makePhaseBuilder('phase2 - living', 'doPhase2','phase3', phaseRunners), + makePhaseBuilder('phase3 - tree health', 'doPhase3','phase4', phaseRunners), + makePhaseBuilder('phase4 - validation', 'doPhase4','GoodBuild', phaseRunners), + # phase 1 build + stage1Clang(phase1, typeRA, phase1_slave), + #phase 2 Builds + HostedClang ('clang-x86_64-osx10-DA', typeDA, phase1, typeRA, [phase1_slave]), + HostedClang (final_reference, typeRA, phase1, typeRA, phase2_slaves, '--enable-optimized'), + Nightly(phase1, typeRA, 'stage1', phase2_slaves), + #phase3 builds + Nightly('clang-x86_64-osx10-DA', typeDA, 'stage2', phase2_slaves), + Nightly(final_reference, typeRA, 'stage2', phase2_slaves), + Nightly(final_reference, typeRA, 'stage2', phase2_slaves, '-O0'), + Nightly(final_reference, typeRA, 'stage2', phase2_slaves, '-Os'), + Nightly(final_reference, typeRA, 'stage2', phase2_slaves, '-O3'), + Nightly(final_reference, typeRA, 'stage2', phase2_slaves, '-flto'), + Nightly(final_reference, typeRA, 'stage2', phase2_slaves, '-g'), + + #phase4 builds + stage3Clang(final_reference, typeRA, phase2_slaves), + gccTestSuite(final_reference, typeRA, phase2_slaves), + Nightly(final_reference+ '-stage3', typeRA, 'stage3', all_slaves, '-g'), + libcxx(final_reference, typeRA, phase2_slaves), + boost('trunk', final_reference, typeRA, phase2_slaves), + #A Placeholder builder is required for triggers which haven't had builders + #configured yet, otherwise build will hang +# { 'name' : 'Placeholder', +# 'factory' : Placeholder(), +# 'slavenames' : phaseRunners, +# 'category' : 'clang', +# }, + ] Added: zorg/trunk/buildbot/llvmlab/master/config/local.cfg URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/buildbot/llvmlab/master/config/local.cfg?rev=124265&view=auto ============================================================================== --- zorg/trunk/buildbot/llvmlab/master/config/local.cfg (added) +++ zorg/trunk/buildbot/llvmlab/master/config/local.cfg Tue Jan 25 19:26:48 2011 @@ -0,0 +1,11 @@ +[Master Options] +# Someone who is automatically CC'ed on all failure messages and on +# failed email lookups. +default_email=david_dean at apple.com + +# Debugging options. +debug_password= +enable_manhole=false +manhole_port=tcp:9999:interface=127.0.0.1 +manhole_user=admin +manhole_password=password Added: zorg/trunk/buildbot/llvmlab/master/config/schedulers.py URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/buildbot/llvmlab/master/config/schedulers.py?rev=124265&view=auto ============================================================================== --- zorg/trunk/buildbot/llvmlab/master/config/schedulers.py (added) +++ zorg/trunk/buildbot/llvmlab/master/config/schedulers.py Tue Jan 25 19:26:48 2011 @@ -0,0 +1,57 @@ +from buildbot.scheduler import Scheduler +from buildbot.schedulers import triggerable +from buildbot.process.properties import WithProperties + +def get_schedulers(): + + vcScheduler = Scheduler(name='all',branch=None, + treeStableTimer=2*60, + builderNames=['phase1 - sanity',]) + startphase1 = triggerable.Triggerable(name='doPhase1', + builderNames=['clang-x86_64-osx10-gcc42-RA',]) + + gate1 = triggerable.Triggerable(name='phase2', + builderNames=['phase2 - living',], + properties = {'revision':WithProperties('%(got_revision)s')}) + startphase2 = triggerable.Triggerable(name='doPhase2', + builderNames=['clang-x86_64-osx10-DA', + 'clang-x86_64-osx10-RA', + 'nightly_clang-x86_64-osx10-gcc42-RA', + ], + properties = {'revision':WithProperties('%(got_revision)s')}) + + gate2 = triggerable.Triggerable(name='phase3', + builderNames=['phase3 - tree health',], + properties = {'revision':WithProperties('%(got_revision)s')}) + startphase3 = triggerable.Triggerable(name='doPhase3', + builderNames=['nightly_clang-x86_64-osx10-DA', + 'nightly_clang-x86_64-osx10-RA', + 'nightly_clang-x86_64-osx10-RA-O0', + 'nightly_clang-x86_64-osx10-RA-Os', + 'nightly_clang-x86_64-osx10-RA-O3', + 'nightly_clang-x86_64-osx10-RA-g', + 'nightly_clang-x86_64-osx10-RA-flto', + ], + properties = {'revision':WithProperties('%(got_revision)s')}) + + gate3 = triggerable.Triggerable(name='phase4', + builderNames=['phase4 - validation',], + properties = {'revision':WithProperties('%(got_revision)s')}) + startphase4 = triggerable.Triggerable(name='doPhase4', + builderNames=['clang-x86_64-osx10-RA-stage3', + 'gccTestSuite-clang-x86_64-osx10-RA', + 'libcxx-clang-x86_64-osx10-RA',], + properties = {'revision':WithProperties('%(got_revision)s')}) + + LastOne = triggerable.Triggerable(name='GoodBuild', + builderNames=['Validated Build',], + properties = {'revision':WithProperties('%(got_revision)s')}) + + stage3Nightly = triggerable.Triggerable(name='stage3Nightly', + builderNames=['nightly_clang-x86_64-osx10-RA-stage3-g',], + properties = {'revision':WithProperties('%(got_revision)s')}) + + + return [vcScheduler, startphase1, gate1, startphase2, gate2, + startphase3, gate3, startphase4, LastOne, stage3Nightly] + Added: zorg/trunk/buildbot/llvmlab/master/config/slaves.py URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/buildbot/llvmlab/master/config/slaves.py?rev=124265&view=auto ============================================================================== --- zorg/trunk/buildbot/llvmlab/master/config/slaves.py (added) +++ zorg/trunk/buildbot/llvmlab/master/config/slaves.py Tue Jan 25 19:26:48 2011 @@ -0,0 +1,29 @@ +import buildbot +import buildbot.buildslave +import os + +def create_slave(name, *args, **kwargs): + return buildbot.buildslave.BuildSlave(name, password='password', + *args, **kwargs) + +def get_build_slaves(): + yield create_slave("llvmlab.local", + notify_on_missing="david_dean at apple.com", + properties = { 'jobs' : 4 }, + max_builds = 1) + yield create_slave("lab-mini-01.local", + notify_on_missing="david_dean at apple.com", + properties = { 'jobs' : 2 }, + max_builds = 2) + yield create_slave("lab-mini-02.local", + notify_on_missing="david_dean at apple.com", + properties = { 'jobs' : 2 }, + max_builds = 2) + yield create_slave("lab-mini-03.local", + notify_on_missing="david_dean at apple.com", + properties = { 'jobs' : 2 }, + max_builds = 2) + yield create_slave("lab-mini-04.local", + notify_on_missing="david_dean at apple.com", + properties = { 'jobs' : 2 }, + max_builds = 2) Added: zorg/trunk/buildbot/llvmlab/master/config/status.py URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/buildbot/llvmlab/master/config/status.py?rev=124265&view=auto ============================================================================== --- zorg/trunk/buildbot/llvmlab/master/config/status.py (added) +++ zorg/trunk/buildbot/llvmlab/master/config/status.py Tue Jan 25 19:26:48 2011 @@ -0,0 +1,20 @@ +import os +import buildbot +import buildbot.status.html +import buildbot.status.mail +import buildbot.status.words + +import config +from zorg.buildbot.util.ConfigEmailLookup import ConfigEmailLookup + +def get_status_targets(standard_builders): + default_email = config.options.get('Master Options', 'default_email') + return [ + buildbot.status.html.WebStatus( + http_port = 8013, allowForce = True), + buildbot.status.mail.MailNotifier( + fromaddr = "daniel_dunbar at apple.com", + extraRecipients = [default_email], + mode = "all", + builders = standard_builders), + ] Added: zorg/trunk/buildbot/llvmlab/master/master.cfg URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/buildbot/llvmlab/master/master.cfg?rev=124265&view=auto ============================================================================== --- zorg/trunk/buildbot/llvmlab/master/master.cfg (added) +++ zorg/trunk/buildbot/llvmlab/master/master.cfg Tue Jan 25 19:26:48 2011 @@ -0,0 +1,107 @@ +# -*- python -*- +# ex: set syntax=python: + +""" +Top level build bot configuration file. +""" + +# Expect llvm_zorg to be checked out at the top level. +import os, sys +path = os.path.join(os.environ.get('HOME'), 'llvm_zorg', 'buildbot') +if path not in sys.path: + sys.path.append(path) +path = os.path.join(os.environ.get('HOME'), 'llvm_zorg') +if path not in sys.path: + sys.path.append(path) + +# This is the dictionary that the buildmaster pays attention to. We also use +# a shorter alias to save typing. +c = BuildmasterConfig = {} + +import config +import config.schedulers + +# Reload stuff automatically. +# +# FIXME: Find better way. +reload(config.slaves) +reload(config.schedulers) +reload(config.builders) +reload(config.status) +reload(config) +import config + +####### DB URL + +# This specifies what database buildbot uses to store change and scheduler +# state. +c['db_url'] = "sqlite:///state.sqlite" + +####### BUILDSLAVES + +c['slaves'] = list(config.slaves.get_build_slaves()) +c['slavePortnum'] = 9994 + +####### CHANGESOURCES + +# the 'change_source' setting tells the buildmaster how it should find out +# about source code changes. Any class which implements IChangeSource can be +# put here: there are several in buildbot/changes/*.py to choose from. + +import os +kStableTimeout = 2 * 60 + +import buildbot.changes.svnpoller +from buildbot.changes.pb import PBChangeSource + +class LLVMPoller(buildbot.changes.svnpoller.SVNPoller): + def __init__(self, project, pollinterval=120, histmax=10): + buildbot.changes.svnpoller.SVNPoller.__init__(self, + project=project, + svnurl='http://llvm.org/svn/llvm-project/%s/trunk' % project, + pollinterval=pollinterval, + histmax=histmax, + revlinktmpl='http://llvm.org/viewvc/llvm-project/?view=rev&revision=%s') +c['change_source'] = [] +if True: + c['change_source'].append(LLVMPoller("llvm")) + c['change_source'].append(LLVMPoller("cfe")) +# c['change_source'].append(LLVMPoller("llvm-gcc-4.2/trunk")) + c['change_source'].append(LLVMPoller("test-suite")) + +####### BUILDERS + +slaves_name = [s.slavename for s in c['slaves']] +c['builders'] = builders = list(config.builders.get_builders(slaves_name) ) + +####### STATUS TARGETS + +# Schedule builds and email for all non-experimental builders. +standard_builders = [b['name'] for b in builders + if not b['category'].endswith('.exp')] +c['status'] = config.status.get_status_targets(standard_builders) + +####### RESOURCE USAGE + +# Number of build records to maintain per builder. +c['buildHorizon'] = 4000 + +# Number of logs to maintain per builder. +c['logHorizon'] = 600 + +# Number of events (connect, disconnect, etc.) to maintain. +c['eventHorizon'] = 100 + +# Number of builds to cache in memory. +c['buildCacheSize'] = 500 + +####### SCHEDULERS + +c['schedulers'] = schedulers = list(config.schedulers.get_schedulers()) + +####### PROJECT IDENTITY + +c['projectName'] = "lab.llvm.org" +c['projectURL'] = "http://lab.llvm.org/" +c['buildbotURL'] = "http://lab.llvm.org:8013/" + Added: zorg/trunk/buildbot/llvmlab/master/org.llvm.lab.master.plist URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/buildbot/llvmlab/master/org.llvm.lab.master.plist?rev=124265&view=auto ============================================================================== --- zorg/trunk/buildbot/llvmlab/master/org.llvm.lab.master.plist (added) +++ zorg/trunk/buildbot/llvmlab/master/org.llvm.lab.master.plist Tue Jan 25 19:26:48 2011 @@ -0,0 +1,46 @@ + + + + + Label + org.llvm.lab.master + + + UserName + buildmaster + + + WorkingDirectory + /Users/buildmaster/llvm_zorg/buildbot/llvmlab/master + + ProgramArguments + + /venv/buildbot/bin/python + /usr/bin/twistd + --nodaemon + --python=buildbot.tac + --logfile=twistd.log + --prefix=llvmlab + + + KeepAlive + + SuccessfulExit + + + + RunAtLoad + + +SoftResourceLimits + + NumberOfFiles + 4096 + + HardResourceLimits + + NumberOfFiles + 4096 + + + Added: zorg/trunk/buildbot/llvmlab/master/state.sqlite URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/buildbot/llvmlab/master/state.sqlite?rev=124265&view=auto ============================================================================== Binary file - no diff available. Propchange: zorg/trunk/buildbot/llvmlab/master/state.sqlite ------------------------------------------------------------------------------ svn:mime-type = application/octet-stream From david_dean at apple.com Tue Jan 25 19:43:14 2011 From: david_dean at apple.com (David Dean) Date: Wed, 26 Jan 2011 01:43:14 -0000 Subject: [llvm-commits] [zorg] r124269 - in /zorg/trunk/buildbot/llvmlab/master/public_html: ./ bg_gradient.jpg buildbot.css buildbot.css.default buildbot.css.extended buildbot.css.goog default.css favicon.ico robots.txt robots.txt.new Message-ID: <20110126014314.EB9282A6C12C@llvm.org> Author: ddean Date: Tue Jan 25 19:43:14 2011 New Revision: 124269 URL: http://llvm.org/viewvc/llvm-project?rev=124269&view=rev Log: forgot to include public_html directory Added: zorg/trunk/buildbot/llvmlab/master/public_html/ zorg/trunk/buildbot/llvmlab/master/public_html/bg_gradient.jpg (with props) zorg/trunk/buildbot/llvmlab/master/public_html/buildbot.css zorg/trunk/buildbot/llvmlab/master/public_html/buildbot.css.default zorg/trunk/buildbot/llvmlab/master/public_html/buildbot.css.extended zorg/trunk/buildbot/llvmlab/master/public_html/buildbot.css.goog zorg/trunk/buildbot/llvmlab/master/public_html/default.css zorg/trunk/buildbot/llvmlab/master/public_html/favicon.ico (with props) zorg/trunk/buildbot/llvmlab/master/public_html/robots.txt zorg/trunk/buildbot/llvmlab/master/public_html/robots.txt.new Added: zorg/trunk/buildbot/llvmlab/master/public_html/bg_gradient.jpg URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/buildbot/llvmlab/master/public_html/bg_gradient.jpg?rev=124269&view=auto ============================================================================== Binary file - no diff available. Propchange: zorg/trunk/buildbot/llvmlab/master/public_html/bg_gradient.jpg ------------------------------------------------------------------------------ svn:mime-type = application/octet-stream Added: zorg/trunk/buildbot/llvmlab/master/public_html/buildbot.css URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/buildbot/llvmlab/master/public_html/buildbot.css?rev=124269&view=auto ============================================================================== --- zorg/trunk/buildbot/llvmlab/master/public_html/buildbot.css (added) +++ zorg/trunk/buildbot/llvmlab/master/public_html/buildbot.css Tue Jan 25 19:43:14 2011 @@ -0,0 +1,398 @@ +body { + margin-bottom:50px; +} + +body, td { + font-family: Verdana, Cursor; + font-size: 10px; + font-weight: bold; +} + +a:link,a:visited,a:active { + color: #444; +} + +a:hover { + color: #000000; +} + +table { + border-spacing: 1px 1px; +} + +table td { + padding: 3px 0px 3px 0px; + text-align: center; +} + +.Project { + width: 100px; +} + +.LastBuild, .Activity { + padding: 0 0 0 4px; +} + +.LastBuild, .Activity, .Builder, .BuildStep { + width: 155px; + max-width: 155px; +} + +td.Time { + color: #000; + border-bottom: 1px solid #aaa; + background-color: #eee; +} + +td.Activity, td.Change, td.Builder { + color: #333333; + background-color: #CCCCCC; +} + +td.Change { + border-radius: 5px; + -webkit-border-radius: 5px; + -moz-border-radius: 5px; +} +td.Event { + color: #777; + background-color: #ddd; + border-radius: 5px; + -webkit-border-radius: 5px; + -moz-border-radius: 5px; +} + +td.Activity { + border-top-left-radius: 10px; + -webkit-border-top-left-radius: 10px; + -moz-border-radius-topleft: 10px; + min-height: 20px; + padding: 2px 0 2px 0; +} + +td.idle, td.waiting, td.offline, td.building { + border-top-left-radius: 0px; + -webkit-border-top-left-radius: 0px; + -moz-border-radius-topleft: 0px; +} + +.LastBuild { + border-top-left-radius: 5px; + -webkit-border-top-left-radius: 5px; + -moz-border-radius-topleft: 5px; + border-top-right-radius: 5px; + -webkit-border-top-right-radius: 5px; + -moz-border-radius-topright: 5px; +} + +/* Console view styles */ + +td.DevRev { + padding: 4px 8px 4px 8px; + color: #333333; + border-top-left-radius: 5px; + -webkit-border-top-left-radius: 5px; + -moz-border-radius-topleft: 5px; + background-color: #eee; + width: 1%; +} + +td.DevRevCollapse { + border-bottom-left-radius: 5px; + -webkit-border-bottom-left-radius: 5px; + -moz-border-radius-bottomleft: 5px; +} + +td.DevName { + padding: 4px 8px 4px 8px; + color: #333333; + background-color: #eee; + width: 1%; + text-align: left; +} + +td.DevStatus { + padding: 4px 4px 4px 4px; + color: #333333; + background-color: #eee; +} + +td.DevSlave { + padding: 4px 4px 4px 4px; + color: #333333; + background-color: #eee; +} + +td.first { + border-top-left-radius: 5px; + -webkit-border-top-left-radius: 5px; + -moz-border-radius-topleft: 5px; +} + +td.last { + border-top-right-radius: 5px; + -webkit-border-top-right-radius: 5px; + -moz-border-radius-topright: 5px; +} + +td.DevStatusCategory { + border-radius: 5px; + -webkit-border-radius: 5px; + -moz-border-radius: 5px; + border-width:1px; + border-style:solid; +} + +td.DevStatusCollapse { + border-bottom-right-radius: 5px; + -webkit-border-bottom-right-radius: 5px; + -moz-border-radius-bottomright: 5px; +} + +td.DevDetails { + font-weight: normal; + padding: 8px 8px 8px 8px; + color: #333333; + background-color: #eee; + text-align: left; +} + +td.DevComment { + font-weight: normal; + padding: 8px 8px 8px 8px; + color: #333333; + border-bottom-right-radius: 5px; + -webkit-border-bottom-right-radius: 5px; + -moz-border-radius-bottomright: 5px; + border-bottom-left-radius: 5px; + -webkit-border-bottom-left-radius: 5px; + -moz-border-radius-bottomleft: 5px; + background-color: #eee; + text-align: left; +} +.DevCommentDate { + float: right; + font-style: italic; +} + +td.Alt { + background-color: #CCCCCC; +} + +.legend { + border-radius: 5px; + -webkit-border-radius: 5px; + -moz-border-radius: 5px; + width: 100px; + max-width: 100px; + text-align:center; + padding: 2px 2px 2px 2px; + height:14px; + white-space:nowrap; +} + +.DevStatusBox { + text-align:center; + height:20px; + padding:0 2px; + line-height:0; + white-space:nowrap; +} + +.DevStatusBox a { + opacity: 0.85; + border-width:1px; + border-style:solid; + border-radius: 4px; + -webkit-border-radius: 4px; + -moz-border-radius: 4px; + display:block; + width:90%; + height:20px; + line-height:20px; + margin-left: auto; + margin-right: auto; +} + +.DevSlaveBox { + text-align:center; + height:10px; + padding:0 2px; + line-height:0; + white-space:nowrap; +} + +.DevSlaveBox a { + opacity: 0.85; + border-width:1px; + border-style:solid; + border-radius: 4px; + -webkit-border-radius: 4px; + -moz-border-radius: 4px; + display:block; + width:90%; + height:10px; + line-height:20px; + margin-left: auto; + margin-right: auto; +} + +a.noround { + border-radius: 0px; + -webkit-border-radius: 0px; + -moz-border-radius: 0px; + position: relative; + margin-top: -8px; + margin-bottom: -8px; + height: 36px; + border-top-width: 0; + border-bottom-width: 0; +} + +a.begin { + border-top-width:1px; + position: relative; + margin-top: 0px; + margin-bottom: -7px; + height: 27px; + border-top-left-radius: 4px; + -webkit-border-top-left-radius: 4px; + -moz-border-radius-topleft: 4px; + border-top-right-radius: 4px; + -webkit-border-top-right-radius: 4px; + -moz-border-radius-topright: 4px; +} + +a.end { + border-bottom-width:1px; + position: relative; + margin-top: -7px; + margin-bottom: 0px; + height: 27px; + border-bottom-left-radius: 4px; + -webkit-border-bottom-left-radius: 4px; + -moz-border-radius-bottomleft: 4px; + border-bottom-right-radius: 4px; + -webkit-border-bottom-right-radius: 4px; + -moz-border-radius-bottomright: 4px; +} + +.center_align { + text-align: center; +} + +.right_align { + text-align: right; +} + +.left_align { + text-align: left; +} + +div.BuildWaterfall { + border-radius: 7px; + -webkit-border-radius: 7px; + -moz-border-radius: 7px; + position: absolute; + left: 0px; + top: 0px; + background-color: #FFFFFF; + padding: 4px 4px 4px 4px; + float: left; + display: none; + border-width: 1px; + border-style: solid; +} + +/* LastBuild, BuildStep states */ +.success { + color: #FFFFFF; + background-color: #8fdf5f; + border-color: #4F8530; +} +.success.Alt { + background-color: #6fbf3f; +} + +.failure { + color: #FFFFFF; + background-color: #e98080; + border-color: #A77272; +} +.failure.Alt { + background-color: #c96060; +} + +.warnings { + color: #FFFFFF; + background-color: #ffc343; + border-color: #C29D46; +} +.warnings.Alt { + background-color: #dfa323; +} + +.exception, td.offline { + color: #FFFFFF; + background-color: #e0b0ff; + border-color: #ACA0B3; +} +.exception.Alt { + background-color: #c090df; +} + +.start,.running, td.building { + color: #666666; + background-color: #fffc6c; + border-color: #C5C56D; +} + +.start { + border-bottom-left-radius: 10px; + -webkit-border-bottom-left-radius: 10px; + -moz-border-radius-bottomleft: 10px; + border-bottom-right-radius: 10px; + -webkit-border-bottom-right-radius: 10px; + -moz-border-radius-bottomright: 10px; +} + +.notstarted { + border-width:1px; + border-style:solid; + border-color:#aaa; +} + +td.Project a:hover, td.start a:hover { + color: #000; +} + +/* grid styles */ + +table.Grid { + border-collapse: collapse; +} + +table.Grid tr td { + padding: 0.2em; + margin: 0px; + text-align: center; +} + +table.Grid tr td.title { + font-size: 90%; + border-right: 1px gray solid; + border-bottom: 1px gray solid; +} + +table.Grid tr td.sourcestamp { + font-size: 90%; +} + +table.Grid tr td.builder { + text-align: right; + font-size: 90%; +} + +table.Grid tr td.build { + border: 1px gray solid; +} Added: zorg/trunk/buildbot/llvmlab/master/public_html/buildbot.css.default URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/buildbot/llvmlab/master/public_html/buildbot.css.default?rev=124269&view=auto ============================================================================== --- zorg/trunk/buildbot/llvmlab/master/public_html/buildbot.css.default (added) +++ zorg/trunk/buildbot/llvmlab/master/public_html/buildbot.css.default Tue Jan 25 19:43:14 2011 @@ -0,0 +1,78 @@ +a:visited { + color: #800080; +} + +td.Event, td.BuildStep, td.Activity, td.Change, td.Time, td.Builder { + border-top: 1px solid; + border-right: 1px solid; +} + +td.box { + border: 1px solid; +} + +/* Activity states */ +.offline { + background-color: red; +} +.idle { + background-color: white; +} +.waiting { + background-color: yellow; +} +.building { + background-color: yellow; +} + +/* LastBuild, BuildStep states */ +.success { + background-color: #72ff75; +} +.failure { + background-color: red; +} +.warnings { + background-color: #ff8000; +} +.exception { + background-color: #c000c0; +} +.start,.running { + background-color: yellow; +} + +/* grid styles */ + +table.Grid { + border-collapse: collapse; +} + +table.Grid tr td { + padding: 0.2em; + margin: 0px; + text-align: center; +} + +table.Grid tr td.title { + font-size: 90%; + border-right: 1px gray solid; + border-bottom: 1px gray solid; +} + +table.Grid tr td.sourcestamp { + font-size: 90%; +} + +table.Grid tr td.builder { + text-align: right; + font-size: 90%; +} + +table.Grid tr td.build { + border: 1px gray solid; +} + +div.footer { + font-size: 80%; +} Added: zorg/trunk/buildbot/llvmlab/master/public_html/buildbot.css.extended URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/buildbot/llvmlab/master/public_html/buildbot.css.extended?rev=124269&view=auto ============================================================================== --- zorg/trunk/buildbot/llvmlab/master/public_html/buildbot.css.extended (added) +++ zorg/trunk/buildbot/llvmlab/master/public_html/buildbot.css.extended Tue Jan 25 19:43:14 2011 @@ -0,0 +1,382 @@ +body { + margin-bottom:50px; +} + +body, td { + font-family: Verdana, Cursor; + font-size: 10px; + font-weight: bold; +} + +a:link,a:visited,a:active { + color: #444; +} + +a:hover { + color: #000000; +} + +table { + border-spacing: 1px 1px; +} + +table td { + padding: 3px 0px 3px 0px; + text-align: center; +} + +.Project { + width: 100px; +} + +.LastBuild, .Activity { + padding: 0 0 0 4px; +} + +.LastBuild, .Activity, .Builder, .BuildStep { + width: 155px; + max-width: 155px; +} + +td.Time { + color: #000; + border-bottom: 1px solid #aaa; + background-color: #eee; +} + +td.Activity, td.Change, td.Builder { + color: #333333; + background-color: #CCCCCC; +} + +td.Change { + border-radius: 5px; + -webkit-border-radius: 5px; + -moz-border-radius: 5px; +} +td.Event { + color: #777; + background-color: #ddd; + border-radius: 5px; + -webkit-border-radius: 5px; + -moz-border-radius: 5px; +} + +td.Activity { + border-top-left-radius: 10px; + -webkit-border-top-left-radius: 10px; + -moz-border-radius-topleft: 10px; + min-height: 20px; + padding: 2px 0 2px 0; +} + +td.idle, td.waiting, td.offline, td.building { + border-top-left-radius: 0px; + -webkit-border-top-left-radius: 0px; + -moz-border-radius-topleft: 0px; +} + +.LastBuild { + border-top-left-radius: 5px; + -webkit-border-top-left-radius: 5px; + -moz-border-radius-topleft: 5px; + border-top-right-radius: 5px; + -webkit-border-top-right-radius: 5px; + -moz-border-radius-topright: 5px; +} + +/* Console view styles */ + +td.DevRev { + padding: 4px 8px 4px 8px; + color: #333333; + border-top-left-radius: 5px; + -webkit-border-top-left-radius: 5px; + -moz-border-radius-topleft: 5px; + background-color: #eee; + width: 1%; +} + +td.DevRevCollapse { + border-bottom-left-radius: 5px; + -webkit-border-bottom-left-radius: 5px; + -moz-border-radius-bottomleft: 5px; +} + +td.DevName { + padding: 4px 8px 4px 8px; + color: #333333; + background-color: #eee; + width: 1%; + text-align: left; +} + +td.DevStatus { + padding: 4px 4px 4px 4px; + color: #333333; + background-color: #eee; +} + +td.DevSlave { + padding: 4px 4px 4px 4px; + color: #333333; + background-color: #eee; +} + +td.first { + border-top-left-radius: 5px; + -webkit-border-top-left-radius: 5px; + -moz-border-radius-topleft: 5px; +} + +td.last { + border-top-right-radius: 5px; + -webkit-border-top-right-radius: 5px; + -moz-border-radius-topright: 5px; +} + +td.DevStatusCategory { + border-radius: 5px; + -webkit-border-radius: 5px; + -moz-border-radius: 5px; + border-width:1px; + border-style:solid; +} + +td.DevStatusCollapse { + border-bottom-right-radius: 5px; + -webkit-border-bottom-right-radius: 5px; + -moz-border-radius-bottomright: 5px; +} + +td.DevDetails { + font-weight: normal; + padding: 8px 8px 8px 8px; + color: #333333; + background-color: #eee; + text-align: left; +} + +td.DevComment { + font-weight: normal; + padding: 8px 8px 8px 8px; + color: #333333; + border-bottom-right-radius: 5px; + -webkit-border-bottom-right-radius: 5px; + -moz-border-radius-bottomright: 5px; + border-bottom-left-radius: 5px; + -webkit-border-bottom-left-radius: 5px; + -moz-border-radius-bottomleft: 5px; + background-color: #eee; + text-align: left; +} + +td.Alt { + background-color: #CCCCCC; +} + +.legend { + border-radius: 5px; + -webkit-border-radius: 5px; + -moz-border-radius: 5px; + width: 100px; + max-width: 100px; + text-align:center; + padding: 2px 2px 2px 2px; + height:14px; + white-space:nowrap; +} + +.DevStatusBox { + text-align:center; + height:20px; + padding:0 2px; + line-height:0; + white-space:nowrap; +} + +.DevStatusBox a { + opacity: 0.85; + border-width:1px; + border-style:solid; + border-radius: 4px; + -webkit-border-radius: 4px; + -moz-border-radius: 4px; + display:block; + width:90%; + height:20px; + line-height:20px; + margin-left: auto; + margin-right: auto; +} + +.DevSlaveBox { + text-align:center; + height:10px; + padding:0 2px; + line-height:0; + white-space:nowrap; +} + +.DevSlaveBox a { + opacity: 0.85; + border-width:1px; + border-style:solid; + border-radius: 4px; + -webkit-border-radius: 4px; + -moz-border-radius: 4px; + display:block; + width:90%; + height:10px; + line-height:20px; + margin-left: auto; + margin-right: auto; +} + +a.noround { + border-radius: 0px; + -webkit-border-radius: 0px; + -moz-border-radius: 0px; + position: relative; + margin-top: -8px; + margin-bottom: -8px; + height: 36px; + border-top-width: 0; + border-bottom-width: 0; +} + +a.begin { + border-top-width:1px; + position: relative; + margin-top: 0px; + margin-bottom: -7px; + height: 27px; + border-top-left-radius: 4px; + -webkit-border-top-left-radius: 4px; + -moz-border-radius-topleft: 4px; + border-top-right-radius: 4px; + -webkit-border-top-right-radius: 4px; + -moz-border-radius-topright: 4px; +} + +a.end { + border-bottom-width:1px; + position: relative; + margin-top: -7px; + margin-bottom: 0px; + height: 27px; + border-bottom-left-radius: 4px; + -webkit-border-bottom-left-radius: 4px; + -moz-border-radius-bottomleft: 4px; + border-bottom-right-radius: 4px; + -webkit-border-bottom-right-radius: 4px; + -moz-border-radius-bottomright: 4px; +} + +.center_align { + text-align: center; +} + +.right_align { + text-align: right; +} + +.left_align { + text-align: left; +} + +div.BuildWaterfall { + border-radius: 7px; + -webkit-border-radius: 7px; + -moz-border-radius: 7px; + position: absolute; + left: 0px; + top: 0px; + background-color: #FFFFFF; + padding: 4px 4px 4px 4px; + float: left; + display: none; + border-width: 1px; + border-style: solid; +} + +/* LastBuild, BuildStep states */ +.success { + color: #FFFFFF; + background-color: #8fdf5f; + border-color: #4F8530; +} + +.failure { + color: #FFFFFF; + background-color: #e98080; + border-color: #A77272; +} + +.warnings { + color: #FFFFFF; + background-color: #ffc343; + border-color: #C29D46; +} + +.exception, td.offline { + color: #FFFFFF; + background-color: #e0b0ff; + border-color: #ACA0B3; +} + +.start,.running, td.building { + color: #666666; + background-color: #fffc6c; + border-color: #C5C56D; +} + +.start { + border-bottom-left-radius: 10px; + -webkit-border-bottom-left-radius: 10px; + -moz-border-radius-bottomleft: 10px; + border-bottom-right-radius: 10px; + -webkit-border-bottom-right-radius: 10px; + -moz-border-radius-bottomright: 10px; +} + +.notstarted { + border-width:1px; + border-style:solid; + border-color:#aaa; +} + +td.Project a:hover, td.start a:hover { + color: #000; +} + +/* grid styles */ + +table.Grid { + border-collapse: collapse; +} + +table.Grid tr td { + padding: 0.2em; + margin: 0px; + text-align: center; +} + +table.Grid tr td.title { + font-size: 90%; + border-right: 1px gray solid; + border-bottom: 1px gray solid; +} + +table.Grid tr td.sourcestamp { + font-size: 90%; +} + +table.Grid tr td.builder { + text-align: right; + font-size: 90%; +} + +table.Grid tr td.build { + border: 1px gray solid; +} Added: zorg/trunk/buildbot/llvmlab/master/public_html/buildbot.css.goog URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/buildbot/llvmlab/master/public_html/buildbot.css.goog?rev=124269&view=auto ============================================================================== --- zorg/trunk/buildbot/llvmlab/master/public_html/buildbot.css.goog (added) +++ zorg/trunk/buildbot/llvmlab/master/public_html/buildbot.css.goog Tue Jan 25 19:43:14 2011 @@ -0,0 +1,53 @@ +* { + font-family: Verdana, Cursor; + font-size: 10px; + font-weight: bold; +} + +a:link,a:visited,a:active { + color: #666666; +} +a:hover { + color: #FFFFFF; +} + +.table { + border-spacing: 2px; +} + +td.Event, td.Activity, td.Change, td.Time, td.Builder { + color: #333333; + border: 1px solid #666666; + background-color: #CCCCCC; +} + +/* LastBuild, BuildStep states */ +.success { + color: #FFFFFF; + border: 1px solid #2f8f0f; + background-color: #8fdf5f; +} + +.failure { + color: #FFFFFF; + border: 1px solid #f33636; + background-color: #e98080; +} + +.warnings { + color: #FFFFFF; + border: 1px solid #fc901f; + background-color: #ffc343; +} + +.exception, td.offline { + color: #FFFFFF; + border: 1px solid #8000c0; + background-color: #e0b0ff; +} + +.start,.running, td.building { + color: #666666; + border: 1px solid #ffff00; + background-color: #fffc6c; +} Added: zorg/trunk/buildbot/llvmlab/master/public_html/default.css URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/buildbot/llvmlab/master/public_html/default.css?rev=124269&view=auto ============================================================================== --- zorg/trunk/buildbot/llvmlab/master/public_html/default.css (added) +++ zorg/trunk/buildbot/llvmlab/master/public_html/default.css Tue Jan 25 19:43:14 2011 @@ -0,0 +1,535 @@ +body.interface { + margin-left: 30px; + margin-right: 30px; + margin-top: 20px; + margin-bottom: 50px; + padding: 0; + background: url(bg_gradient.jpg) repeat-x; + font-family: Verdana, Cursor; + font-size: 10px; + font-weight: bold; + background-color: #fff; + color: #333; +} + +a:link,a:visited,a:active { + color: #444; +} + +table { + border-spacing: 1px 1px; +} + +table td { + padding: 3px 2px 3px 2px; + text-align: center; +} + +.Project { + min-width: 6em; +} + +.LastBuild,.Activity { + padding: 0 0 0 4px; +} + +.LastBuild,.Activity,.Builder,.BuildStep { + width: 15em; + min-width: 15em; +} + +/* Chromium Specific styles */ +div.BuildResultInfo { + color: #444; +} + +div.Announcement { + margin-bottom: 1em; +} + +div.Announcement>a:hover { + color: black; +} + +div.Announcement>div.Notice { + background-color: #afdaff; + padding: 0.5em; + font-size: 16px; + text-align: center; +} + +div.Announcement>div.Open { + border: 3px solid #8fdf5f; + padding: 0.5em; + font-size: 16px; + text-align: center; +} + +div.Announcement>div.Closed { + border: 5px solid #e98080; + padding: 0.5em; + font-size: 24px; + font-weight: bold; + text-align: center; +} + +td.Time { + color: #000; + border-bottom: 1px solid #aaa; + background-color: #eee; +} + +td.Activity,td.Change,td.Builder { + color: #333333; + background-color: #CCCCCC; +} + +td.Change { + border-radius: 5px; + -webkit-border-radius: 5px; + -moz-border-radius: 5px; +} + +td.Event { + color: #777; + background-color: #ddd; + border-radius: 5px; + -webkit-border-radius: 5px; + -moz-border-radius: 5px; +} + +td.Activity { + border-top-left-radius: 10px; + -webkit-border-top-left-radius: 10px; + -moz-border-radius-topleft: 10px; + min-height: 20px; + padding: 2px 0 2px 0; +} + +td.idle,td.waiting,td.offline,td.building { + border-top-left-radius: 0px; + -webkit-border-top-left-radius: 0px; + -moz-border-radius-topleft: 0px; +} + +.LastBuild { + border-top-left-radius: 5px; + -webkit-border-top-left-radius: 5px; + -moz-border-radius-topleft: 5px; + border-top-right-radius: 5px; + -webkit-border-top-right-radius: 5px; + -moz-border-radius-topright: 5px; +} + +/* Console view styles */ +td.DevRev { + padding: 4px 8px 4px 8px; + color: #333333; + border-top-left-radius: 5px; + -webkit-border-top-left-radius: 5px; + -moz-border-radius-topleft: 5px; + background-color: #eee; + width: 1%; +} + +td.DevRevCollapse { + border-bottom-left-radius: 5px; + -webkit-border-bottom-left-radius: 5px; + -moz-border-radius-bottomleft: 5px; +} + +td.DevName { + padding: 4px 8px 4px 8px; + color: #333333; + background-color: #eee; + width: 1%; + text-align: left; +} + +td.DevStatus { + padding: 4px 4px 4px 4px; + color: #333333; + background-color: #eee; +} + +td.DevSlave { + padding: 4px 4px 4px 4px; + color: #333333; + background-color: #eee; +} + +td.first { + border-top-left-radius: 5px; + -webkit-border-top-left-radius: 5px; + -moz-border-radius-topleft: 5px; +} + +td.last { + border-top-right-radius: 5px; + -webkit-border-top-right-radius: 5px; + -moz-border-radius-topright: 5px; +} + +td.DevStatusCategory { + border-radius: 5px; + -webkit-border-radius: 5px; + -moz-border-radius: 5px; + border-width: 1px; + border-style: solid; +} + +td.DevStatusCollapse { + border-bottom-right-radius: 5px; + -webkit-border-bottom-right-radius: 5px; + -moz-border-radius-bottomright: 5px; +} + +td.DevDetails { + font-weight: normal; + padding: 8px 8px 8px 8px; + color: #333333; + background-color: #eee; + text-align: left; +} + +td.DevDetails li a { + padding-right: 5px; +} + +td.DevComment { + font-weight: normal; + padding: 8px 8px 8px 8px; + color: #333333; + border-bottom-right-radius: 5px; + -webkit-border-bottom-right-radius: 5px; + -moz-border-radius-bottomright: 5px; + border-bottom-left-radius: 5px; + -webkit-border-bottom-left-radius: 5px; + -moz-border-radius-bottomleft: 5px; + background-color: #eee; + text-align: left; +} + +td.Alt { + background-color: #ddd; +} + +.legend { + border-radius: 5px; + -webkit-border-radius: 5px; + -moz-border-radius: 5px; + width: 100px; + max-width: 100px; + text-align: center; + padding: 2px 2px 2px 2px; + height: 14px; + white-space: nowrap; +} + +.DevStatusBox { + text-align: center; + height: 20px; + padding: 0 2px; + line-height: 0; + white-space: nowrap; +} + +.DevStatusBox a { + opacity: 0.85; + border-width: 1px; + border-style: solid; + border-radius: 4px; + -webkit-border-radius: 4px; + -moz-border-radius: 4px; + display: block; + width: 90%; + height: 20px; + line-height: 20px; + margin-left: auto; + margin-right: auto; +} + +.DevSlaveBox { + text-align: center; + height: 10px; + padding: 0 2px; + line-height: 0; + white-space: nowrap; +} + +.DevSlaveBox a { + opacity: 0.85; + border-width: 1px; + border-style: solid; + border-radius: 4px; + -webkit-border-radius: 4px; + -moz-border-radius: 4px; + display: block; + width: 90%; + height: 10px; + line-height: 20px; + margin-left: auto; + margin-right: auto; +} + +a.noround { + border-radius: 0px; + -webkit-border-radius: 0px; + -moz-border-radius: 0px; + position: relative; + margin-top: -8px; + margin-bottom: -8px; + height: 36px; + border-top-width: 0; + border-bottom-width: 0; +} + +a.begin { + border-top-width: 1px; + position: relative; + margin-top: 0px; + margin-bottom: -7px; + height: 27px; + border-top-left-radius: 4px; + -webkit-border-top-left-radius: 4px; + -moz-border-radius-topleft: 4px; + border-top-right-radius: 4px; + -webkit-border-top-right-radius: 4px; + -moz-border-radius-topright: 4px; +} + +a.end { + border-bottom-width: 1px; + position: relative; + margin-top: -7px; + margin-bottom: 0px; + height: 27px; + border-bottom-left-radius: 4px; + -webkit-border-bottom-left-radius: 4px; + -moz-border-radius-bottomleft: 4px; + border-bottom-right-radius: 4px; + -webkit-border-bottom-right-radius: 4px; + -moz-border-radius-bottomright: 4px; +} + +.center_align { + text-align: center; +} + +.right_align { + text-align: right; +} + +.left_align { + text-align: left; +} + +div.BuildWaterfall { + border-radius: 7px; + -webkit-border-radius: 7px; + -moz-border-radius: 7px; + position: absolute; + left: 0px; + top: 0px; + background-color: #FFFFFF; + padding: 4px 4px 4px 4px; + float: left; + display: none; + border-width: 1px; + border-style: solid; +} + +/* LastBuild, BuildStep states */ +.success { + color: #FFFFFF; + background-color: #8f8; + border-color: #4F8530; +} + +.failure { + color: #FFFFFF; + background-color: #f99; + border-color: #A77272; +} + +.warnings { + color: #FFFFFF; + background-color: #ffc343; + border-color: #C29D46; +} + +.exception,.retry { + color: #FFFFFF; + background-color: #f6f; + border-color: #ACA0B3; +} + +.start,.running,.waiting,td.building { + color: #666666; + background-color: #ff6; + border-color: #C5C56D; +} + +.offline,td.offline { + color: #FFFFFF; + background-color: #777777; + border-color: #dddddd; +} + + +.start { + border-bottom-left-radius: 10px; + -webkit-border-bottom-left-radius: 10px; + -moz-border-radius-bottomleft: 10px; + border-bottom-right-radius: 10px; + -webkit-border-bottom-right-radius: 10px; + -moz-border-radius-bottomright: 10px; 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+} + +pre.comments>a:active { + color: purple; +} Added: zorg/trunk/buildbot/llvmlab/master/public_html/favicon.ico URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/buildbot/llvmlab/master/public_html/favicon.ico?rev=124269&view=auto ============================================================================== Binary file - no diff available. Propchange: zorg/trunk/buildbot/llvmlab/master/public_html/favicon.ico ------------------------------------------------------------------------------ svn:mime-type = application/octet-stream Added: zorg/trunk/buildbot/llvmlab/master/public_html/robots.txt URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/buildbot/llvmlab/master/public_html/robots.txt?rev=124269&view=auto ============================================================================== --- zorg/trunk/buildbot/llvmlab/master/public_html/robots.txt (added) +++ zorg/trunk/buildbot/llvmlab/master/public_html/robots.txt Tue Jan 25 19:43:14 2011 @@ -0,0 +1,9 @@ +User-agent: * +Disallow: /waterfall +Disallow: /builders +Disallow: /changes +Disallow: /buildslaves +Disallow: /schedulers +Disallow: /one_line_per_build +Disallow: /one_box_per_builder +Disallow: /xmlrpc Added: zorg/trunk/buildbot/llvmlab/master/public_html/robots.txt.new URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/buildbot/llvmlab/master/public_html/robots.txt.new?rev=124269&view=auto ============================================================================== --- zorg/trunk/buildbot/llvmlab/master/public_html/robots.txt.new (added) +++ zorg/trunk/buildbot/llvmlab/master/public_html/robots.txt.new Tue Jan 25 19:43:14 2011 @@ -0,0 +1,10 @@ +User-agent: * +Disallow: /waterfall +Disallow: /builders +Disallow: /changes +Disallow: /buildslaves +Disallow: /schedulers +Disallow: /one_line_per_build +Disallow: /builders +Disallow: /grid +Disallow: /tgrid From syoyofujita at gmail.com Tue Jan 25 21:02:17 2011 From: syoyofujita at gmail.com (Syoyo Fujita) Date: Wed, 26 Jan 2011 12:02:17 +0900 Subject: [llvm-commits] Patch to build 64bit LLVM with MinGW64 compiler Message-ID: Here's a patch to build 64bit LLVM with MinGW64 compiler. Index: lib/System/Win32/DynamicLibrary.inc =================================================================== --- lib/System/Win32/DynamicLibrary.inc (revision 114822) +++ lib/System/Win32/DynamicLibrary.inc (working copy) @@ -118,7 +118,7 @@ #define EXPLICIT_SYMBOL_DEF(SYM) \ extern "C" { extern void *SYM; } - #if defined(__MINGW32__) + #if defined(__MINGW32__) && !defined(_WIN64) EXPLICIT_SYMBOL_DEF(_alloca) EXPLICIT_SYMBOL_DEF(__main) EXPLICIT_SYMBOL_DEF(__ashldi3) @@ -159,7 +159,7 @@ } } -#if defined(__MINGW32__) +#if defined(__MINGW32__) && !defined(_WIN64) { EXPLICIT_SYMBOL(_alloca); EXPLICIT_SYMBOL(__main); From anton at korobeynikov.info Wed Jan 26 02:07:00 2011 From: anton at korobeynikov.info (Anton Korobeynikov) Date: Wed, 26 Jan 2011 11:07:00 +0300 Subject: [llvm-commits] Patch to build 64bit LLVM with MinGW64 compiler In-Reply-To: References: Message-ID: Hello > - ?#if defined(__MINGW32__) > + ?#if defined(__MINGW32__) && !defined(_WIN64) Why do you need this? Could you please explain? -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University From nicholas at mxc.ca Wed Jan 26 02:40:22 2011 From: nicholas at mxc.ca (Nick Lewycky) Date: Wed, 26 Jan 2011 08:40:22 -0000 Subject: [llvm-commits] [llvm] r124282 - /llvm/trunk/lib/Analysis/ScalarEvolution.cpp Message-ID: <20110126084022.877D52A6C12D@llvm.org> Author: nicholas Date: Wed Jan 26 02:40:22 2011 New Revision: 124282 URL: http://llvm.org/viewvc/llvm-project?rev=124282&view=rev Log: Fix memory corruption. If one of the SCEV creation functions calls another but doesn't return immediately after then the insert position in UniqueSCEVs will be out of date. No test because this is a memory corruption issue. Fixes PR9051! Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=124282&r1=124281&r2=124282&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original) +++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Wed Jan 26 02:40:22 2011 @@ -831,6 +831,7 @@ } if (!hasTrunc) return getAddExpr(Operands, false, false); + UniqueSCEVs.FindNodeOrInsertPos(ID, IP); // Mutates IP, returns NULL. } // trunc(x1*x2*...*xN) --> trunc(x1)*trunc(x2)*...*trunc(xN) if we can @@ -845,6 +846,7 @@ } if (!hasTrunc) return getMulExpr(Operands, false, false); + UniqueSCEVs.FindNodeOrInsertPos(ID, IP); // Mutates IP, returns NULL. } // If the input value is a chrec scev, truncate the chrec's operands. From baldrick at free.fr Wed Jan 26 02:44:16 2011 From: baldrick at free.fr (Duncan Sands) Date: Wed, 26 Jan 2011 08:44:16 -0000 Subject: [llvm-commits] [llvm] r124283 - /llvm/trunk/lib/Analysis/ValueTracking.cpp Message-ID: <20110126084416.944152A6C12D@llvm.org> Author: baldrick Date: Wed Jan 26 02:44:16 2011 New Revision: 124283 URL: http://llvm.org/viewvc/llvm-project?rev=124283&view=rev Log: APInt has a method for determining whether a number is a power of 2 which is more efficient than countPopulation - use it. Modified: llvm/trunk/lib/Analysis/ValueTracking.cpp Modified: llvm/trunk/lib/Analysis/ValueTracking.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ValueTracking.cpp?rev=124283&r1=124282&r2=124283&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ValueTracking.cpp (original) +++ llvm/trunk/lib/Analysis/ValueTracking.cpp Wed Jan 26 02:44:16 2011 @@ -656,7 +656,7 @@ /// types and vectors of integers. bool llvm::isPowerOfTwo(Value *V, const TargetData *TD, unsigned Depth) { if (ConstantInt *CI = dyn_cast(V)) - return CI->getValue().countPopulation() == 1; + return CI->getValue().isPowerOf2(); // TODO: Handle vector constants. // 1 << X is clearly a power of two if the one is not shifted off the end. If From baldrick at free.fr Wed Jan 26 02:48:54 2011 From: baldrick at free.fr (Duncan Sands) Date: Wed, 26 Jan 2011 09:48:54 +0100 Subject: [llvm-commits] [llvm] r124282 - /llvm/trunk/lib/Analysis/ScalarEvolution.cpp In-Reply-To: <20110126084022.877D52A6C12D@llvm.org> References: <20110126084022.877D52A6C12D@llvm.org> Message-ID: <4D3FDFF6.9090906@free.fr> Hi Nick, > Fix memory corruption. If one of the SCEV creation functions calls another but > doesn't return immediately after then the insert position in UniqueSCEVs will > be out of date. No test because this is a memory corruption issue. Fixes PR9051! thanks for fixing it. Adding a test is still useful since the valgrind buildbots should spot the memory corruption if it ever comes back. Ciao, Duncan. From nicholas at mxc.ca Wed Jan 26 02:50:18 2011 From: nicholas at mxc.ca (Nick Lewycky) Date: Wed, 26 Jan 2011 08:50:18 -0000 Subject: [llvm-commits] [llvm] r124284 - /llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp Message-ID: <20110126085018.47EB02A6C12D@llvm.org> Author: nicholas Date: Wed Jan 26 02:50:18 2011 New Revision: 124284 URL: http://llvm.org/viewvc/llvm-project?rev=124284&view=rev Log: There are no vectors of pointer or arrays, so we don't need to check vector elements for type equivalence. Modified: llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp Modified: llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp?rev=124284&r1=124283&r2=124284&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp Wed Jan 26 02:50:18 2011 @@ -295,6 +295,7 @@ // Fall through in Release mode. case Type::IntegerTyID: case Type::OpaqueTyID: + case Type::VectorTyID: // Ty1 == Ty2 would have returned true earlier. return false; @@ -353,13 +354,6 @@ return ATy1->getNumElements() == ATy2->getNumElements() && isEquivalentType(ATy1->getElementType(), ATy2->getElementType()); } - - case Type::VectorTyID: { - const VectorType *VTy1 = cast(Ty1); - const VectorType *VTy2 = cast(Ty2); - return VTy1->getNumElements() == VTy2->getNumElements() && - isEquivalentType(VTy1->getElementType(), VTy2->getElementType()); - } } } From anton at korobeynikov.info Wed Jan 26 03:09:15 2011 From: anton at korobeynikov.info (Anton Korobeynikov) Date: Wed, 26 Jan 2011 12:09:15 +0300 Subject: [llvm-commits] Patch to build 64bit LLVM with MinGW64 compiler In-Reply-To: References: Message-ID: CC'ing llvm-commits > In 64bit Mingw env, you should not to define stub functions(e.g. > __divdi3), this is just needed for 32bit Mingw env. Why? Won't this make JIT stop working? How the name resolution for these functions will work? -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University From nicholas at mxc.ca Wed Jan 26 03:13:58 2011 From: nicholas at mxc.ca (Nick Lewycky) Date: Wed, 26 Jan 2011 09:13:58 -0000 Subject: [llvm-commits] [llvm] r124285 - /llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp Message-ID: <20110126091358.DCB4B2A6C12D@llvm.org> Author: nicholas Date: Wed Jan 26 03:13:58 2011 New Revision: 124285 URL: http://llvm.org/viewvc/llvm-project?rev=124285&view=rev Log: Teach mergefunc that intptr_t is the same width as a pointer. We still can't merge vector::push_back() and vector::push_back() because Enumerate() doesn't realize that "i64* null" and "i8** null" are equivalent. Modified: llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp Modified: llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp?rev=124285&r1=124284&r2=124285&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp Wed Jan 26 03:13:58 2011 @@ -286,8 +286,14 @@ const Type *Ty2) const { if (Ty1 == Ty2) return true; - if (Ty1->getTypeID() != Ty2->getTypeID()) + if (Ty1->getTypeID() != Ty2->getTypeID()) { + if (TD) { + LLVMContext &Ctx = Ty1->getContext(); + if (isa(Ty1) && Ty2 == TD->getIntPtrType(Ctx)) return true; + if (isa(Ty2) && Ty1 == TD->getIntPtrType(Ctx)) return true; + } return false; + } switch(Ty1->getTypeID()) { default: From nicholas at mxc.ca Wed Jan 26 03:23:19 2011 From: nicholas at mxc.ca (Nick Lewycky) Date: Wed, 26 Jan 2011 09:23:19 -0000 Subject: [llvm-commits] [llvm] r124286 - in /llvm/trunk/lib: Transforms/IPO/MergeFunctions.cpp VMCore/Instruction.cpp Message-ID: <20110126092319.6457E2A6C12D@llvm.org> Author: nicholas Date: Wed Jan 26 03:23:19 2011 New Revision: 124286 URL: http://llvm.org/viewvc/llvm-project?rev=124286&view=rev Log: AttrListPtr has an overloaded operator== which does this for us, we should use it. No functionality change! Modified: llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp llvm/trunk/lib/VMCore/Instruction.cpp Modified: llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp?rev=124286&r1=124285&r2=124286&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp Wed Jan 26 03:23:19 2011 @@ -393,12 +393,10 @@ if (const CallInst *CI = dyn_cast(I1)) return CI->isTailCall() == cast(I2)->isTailCall() && CI->getCallingConv() == cast(I2)->getCallingConv() && - CI->getAttributes().getRawPointer() == - cast(I2)->getAttributes().getRawPointer(); + CI->getAttributes() == cast(I2)->getAttributes(); if (const InvokeInst *CI = dyn_cast(I1)) return CI->getCallingConv() == cast(I2)->getCallingConv() && - CI->getAttributes().getRawPointer() == - cast(I2)->getAttributes().getRawPointer(); + CI->getAttributes() == cast(I2)->getAttributes(); if (const InsertValueInst *IVI = dyn_cast(I1)) { if (IVI->getNumIndices() != cast(I2)->getNumIndices()) return false; Modified: llvm/trunk/lib/VMCore/Instruction.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Instruction.cpp?rev=124286&r1=124285&r2=124286&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Instruction.cpp (original) +++ llvm/trunk/lib/VMCore/Instruction.cpp Wed Jan 26 03:23:19 2011 @@ -200,12 +200,10 @@ if (const CallInst *CI = dyn_cast(this)) return CI->isTailCall() == cast(I)->isTailCall() && CI->getCallingConv() == cast(I)->getCallingConv() && - CI->getAttributes().getRawPointer() == - cast(I)->getAttributes().getRawPointer(); + CI->getAttributes() == cast(I)->getAttributes(); if (const InvokeInst *CI = dyn_cast(this)) return CI->getCallingConv() == cast(I)->getCallingConv() && - CI->getAttributes().getRawPointer() == - cast(I)->getAttributes().getRawPointer(); + CI->getAttributes() == cast(I)->getAttributes(); if (const InsertValueInst *IVI = dyn_cast(this)) { if (IVI->getNumIndices() != cast(I)->getNumIndices()) return false; @@ -253,12 +251,11 @@ if (const CallInst *CI = dyn_cast(this)) return CI->isTailCall() == cast(I)->isTailCall() && CI->getCallingConv() == cast(I)->getCallingConv() && - CI->getAttributes().getRawPointer() == - cast(I)->getAttributes().getRawPointer(); + CI->getAttributes() == cast(I)->getAttributes(); if (const InvokeInst *CI = dyn_cast(this)) return CI->getCallingConv() == cast(I)->getCallingConv() && - CI->getAttributes().getRawPointer() == - cast(I)->getAttributes().getRawPointer(); + CI->getAttributes() == + cast(I)->getAttributes(); if (const InsertValueInst *IVI = dyn_cast(this)) { if (IVI->getNumIndices() != cast(I)->getNumIndices()) return false; From syoyofujita at gmail.com Wed Jan 26 03:52:22 2011 From: syoyofujita at gmail.com (Syoyo Fujita) Date: Wed, 26 Jan 2011 18:52:22 +0900 Subject: [llvm-commits] Patch to build 64bit LLVM with MinGW64 compiler In-Reply-To: References: Message-ID: Anton, 64bit libgcc on x86 does not define such a function(e.g. __divdi3) and also 64bit gcc compiler does not emit a code calling such a function. (I've checked it with 64bit mingw on windows and 64bit gcc on x86 linux) For instance, when int64 division expression is given, * x86 32bit gcc emits __divdi3() * x86 64bit gcc emits idivq instruction. So you don't need to define stub functions of __divdi3 and so on in 64bit mingw environment. Things might be different on non x86 environment such like ARM, but its out of scope of my patch. On Wed, Jan 26, 2011 at 6:09 PM, Anton Korobeynikov wrote: > CC'ing llvm-commits > >> In 64bit Mingw env, you should not to define stub functions(e.g. >> __divdi3), this is just needed for 32bit Mingw env. > Why? Won't this make JIT stop working? How the name resolution for > these functions will work? > > -- > With best regards, Anton Korobeynikov > Faculty of Mathematics and Mechanics, Saint Petersburg State University > From baldrick at free.fr Wed Jan 26 04:08:38 2011 From: baldrick at free.fr (Duncan Sands) Date: Wed, 26 Jan 2011 10:08:38 -0000 Subject: [llvm-commits] [llvm] r124287 - in /llvm/trunk: lib/Transforms/Scalar/Reassociate.cpp test/Transforms/Reassociate/2011-01-26-UseAfterFree.ll Message-ID: <20110126100838.F37E62A6C12C@llvm.org> Author: baldrick Date: Wed Jan 26 04:08:38 2011 New Revision: 124287 URL: http://llvm.org/viewvc/llvm-project?rev=124287&view=rev Log: Fix PR9039, a use-after-free in reassociate. The issue was that the operand being factorized (and erased) could occur several times in Ops, resulting in freed memory being used when the next occurrence in Ops was analyzed. Added: llvm/trunk/test/Transforms/Reassociate/2011-01-26-UseAfterFree.ll Modified: llvm/trunk/lib/Transforms/Scalar/Reassociate.cpp Modified: llvm/trunk/lib/Transforms/Scalar/Reassociate.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/Reassociate.cpp?rev=124287&r1=124286&r2=124287&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/Reassociate.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/Reassociate.cpp Wed Jan 26 04:08:38 2011 @@ -811,16 +811,23 @@ // RemoveFactorFromExpression on successive values to behave differently. Instruction *DummyInst = BinaryOperator::CreateAdd(MaxOccVal, MaxOccVal); SmallVector NewMulOps; - for (unsigned i = 0, e = Ops.size(); i != e; ++i) { + for (unsigned i = 0; i != Ops.size(); ++i) { // Only try to remove factors from expressions we're allowed to. BinaryOperator *BOp = dyn_cast(Ops[i].Op); if (BOp == 0 || BOp->getOpcode() != Instruction::Mul || !BOp->use_empty()) continue; if (Value *V = RemoveFactorFromExpression(Ops[i].Op, MaxOccVal)) { - NewMulOps.push_back(V); - Ops.erase(Ops.begin()+i); - --i; --e; + // The factorized operand may occur several times. Convert them all in + // one fell swoop. + for (unsigned j = Ops.size(); j != i;) { + --j; + if (Ops[j].Op == Ops[i].Op) { + NewMulOps.push_back(V); + Ops.erase(Ops.begin()+j); + } + } + --i; } } Added: llvm/trunk/test/Transforms/Reassociate/2011-01-26-UseAfterFree.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/Reassociate/2011-01-26-UseAfterFree.ll?rev=124287&view=auto ============================================================================== --- llvm/trunk/test/Transforms/Reassociate/2011-01-26-UseAfterFree.ll (added) +++ llvm/trunk/test/Transforms/Reassociate/2011-01-26-UseAfterFree.ll Wed Jan 26 04:08:38 2011 @@ -0,0 +1,35 @@ +; RUN: opt < %s -reassociate +; PR9039 +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32" +target triple = "i386-gnu-linux" + +%ada__tags__T15s = type void () + +define void @exp_averages_intraday__deviation() { +entry: + %0 = load i32* undef, align 4 + %1 = shl i32 %0, 2 + %2 = add nsw i32 undef, %1 + %3 = add nsw i32 %2, undef + %4 = mul nsw i32 %0, 12 + %5 = add nsw i32 %3, %4 + %6 = add nsw i32 %5, %4 + %7 = add nsw i32 %6, undef + br i1 false, label %"4", label %"12" + +"4": ; preds = %entry + br i1 undef, label %"5", label %"8" + +"5": ; preds = %"4" + unreachable + +"8": ; preds = %"4" + %8 = getelementptr inbounds i8* undef, i32 %6 + br i1 undef, label %"13", label %"12" + +"12": ; preds = %"8", %entry + ret void + +"13": ; preds = %"8" + ret void +} From ismail at namtrac.org Wed Jan 26 04:19:46 2011 From: ismail at namtrac.org (=?UTF-8?B?xLBzbWFpbCBEw7ZubWV6?=) Date: Wed, 26 Jan 2011 12:19:46 +0200 Subject: [llvm-commits] [llvm] r124287 - in /llvm/trunk: lib/Transforms/Scalar/Reassociate.cpp test/Transforms/Reassociate/2011-01-26-UseAfterFree.ll In-Reply-To: <20110126100838.F37E62A6C12C@llvm.org> References: <20110126100838.F37E62A6C12C@llvm.org> Message-ID: Hi; On Wed, Jan 26, 2011 at 12:08 PM, Duncan Sands wrote: > Author: baldrick > Date: Wed Jan 26 04:08:38 2011 > New Revision: 124287 > > URL: http://llvm.org/viewvc/llvm-project?rev=124287&view=rev > Log: > Fix PR9039, a use-after-free in reassociate. The issue was that the > operand being factorized (and erased) could occur several times in Ops, > resulting in freed memory being used when the next occurrence in Ops was > analyzed. > > Added: > llvm/trunk/test/Transforms/Reassociate/2011-01-26-UseAfterFree.ll > Modified: > llvm/trunk/lib/Transforms/Scalar/Reassociate.cpp > > Also fixes PR9057 , thanks! ismail -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110126/a6b7117b/attachment.html From bruno.cardoso at gmail.com Wed Jan 26 07:21:25 2011 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Wed, 26 Jan 2011 11:21:25 -0200 Subject: [llvm-commits] [PATCH] Asm operand parsing improvements Message-ID: Hi, The first attached patch implements support for custom target specific asm parsing of operands. This is useful to avoid adding hacks to AsmParsers whenever something different from an immediate or register appears. The initial motivation was to remove the "mcr" family of hacks from ARMAsmParser, but this is also going to be useful for other ARM system instructions which I'm about to add the correct parsing and encoding once this gets accepted. The second attached patch contains modifications to the ARMAsmParser so that it starts using this mechanism. A quick explanation of how it works (read the first patch for details): A table like the one below is autogenerated for every instruction containing a 'ParserMethod' in its AsmOperandClass: static const OperandMatchEntry OperandMatchTable[20] = { /* Mnemonic, Operand List Mask, Operand Class, Features */ { "cdp", 29 /* 0, 2, 3, 4 */, MCK_Coproc, Feature_IsThumb|Feature_HasV6 }, { "cdp", 58 /* 1, 3, 4, 5 */, MCK_Coproc, Feature_IsARM }, A matcher function very similar (but lot more naive) to MatchInstructionImpl scans the table. After the mnemonic match, the features are checked and if the "to be parsed" operand index is present in the mask, there's a real match. Then, a switch like the one below dispatch the parsing to the custom method provided in 'ParseMethod': case MCK_Coproc: return TryParseCoprocessorOperandName(Operands); Ok to commit? Suggestions? Thanks. -- Bruno Cardoso Lopes http://www.brunocardoso.cc -------------- next part -------------- A non-text attachment was scrubbed... Name: asm-custom-operand-parse.patch Type: application/octet-stream Size: 14672 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110126/e638ada0/attachment.obj -------------- next part -------------- A non-text attachment was scrubbed... Name: arm-operand-parsing.patch Type: application/octet-stream Size: 6443 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110126/e638ada0/attachment-0001.obj From bruno.cardoso at gmail.com Wed Jan 26 07:28:14 2011 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Wed, 26 Jan 2011 13:28:14 -0000 Subject: [llvm-commits] [llvm] r124288 - in /llvm/trunk: lib/Target/ARM/ARMInstrThumb2.td test/MC/ARM/arm_instructions.s test/MC/ARM/thumb.s test/MC/ARM/thumb2.s Message-ID: <20110126132814.943872A6C12C@llvm.org> Author: bruno Date: Wed Jan 26 07:28:14 2011 New Revision: 124288 URL: http://llvm.org/viewvc/llvm-project?rev=124288&view=rev Log: fix the encoding and add testcases for ARM nop, yield, wfe and wfi instructions Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td llvm/trunk/test/MC/ARM/arm_instructions.s llvm/trunk/test/MC/ARM/thumb.s llvm/trunk/test/MC/ARM/thumb2.s Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=124288&r1=124287&r2=124288&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Wed Jan 26 07:28:14 2011 @@ -3157,6 +3157,7 @@ : T2I<(outs), (ins), NoItinerary, opc, asm, [/* For disassembly only; pattern left blank */]> { let Inst{31-20} = 0xf3a; + let Inst{19-16} = 0b1111; let Inst{15-14} = 0b10; let Inst{12} = 0; let Inst{10-8} = 0b000; Modified: llvm/trunk/test/MC/ARM/arm_instructions.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/arm_instructions.s?rev=124288&r1=124287&r2=124288&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/arm_instructions.s (original) +++ llvm/trunk/test/MC/ARM/arm_instructions.s Wed Jan 26 07:28:14 2011 @@ -176,3 +176,15 @@ @ CHECK: qdsub r1, r2, r3 @ encoding: [0x52,0x10,0x63,0xe1] qdsub r1, r2, r3 + +@ CHECK: wfe @ encoding: [0x02,0xf0,0x20,0xe3] + wfe + +@ CHECK: wfi @ encoding: [0x03,0xf0,0x20,0xe3] + wfi + +@ CHECK: yield @ encoding: [0x01,0xf0,0x20,0xe3] + yield + +@ CHECK: nop @ encoding: [0x00,0xf0,0x20,0xe3] + nop Modified: llvm/trunk/test/MC/ARM/thumb.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/thumb.s?rev=124288&r1=124287&r2=124288&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/thumb.s (original) +++ llvm/trunk/test/MC/ARM/thumb.s Wed Jan 26 07:28:14 2011 @@ -54,3 +54,14 @@ @ CHECK: cdp p7, #1, c1, c1, c1, #4 @ encoding: [0x11,0xee,0x81,0x17] cdp p7, #1, c1, c1, c1, #4 +@ CHECK: nop @ encoding: [0x00,0xbf] + nop + +@ CHECK: yield @ encoding: [0x10,0xbf] + yield + +@ CHECK: wfe @ encoding: [0x20,0xbf] + wfe + +@ CHECK: wfi @ encoding: [0x30,0xbf] + wfi Modified: llvm/trunk/test/MC/ARM/thumb2.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/thumb2.s?rev=124288&r1=124287&r2=124288&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/thumb2.s (original) +++ llvm/trunk/test/MC/ARM/thumb2.s Wed Jan 26 07:28:14 2011 @@ -214,3 +214,16 @@ @ CHECK: qdsub r1, r2, r3 @ encoding: [0x83,0xfa,0xb2,0xf1] qdsub r1, r2, r3 + +@ CHECK: nop.w @ encoding: [0xaf,0xf3,0x00,0x80] + nop.w + +@ CHECK: yield.w @ encoding: [0xaf,0xf3,0x01,0x80] + yield.w + +@ CHECK: wfe.w @ encoding: [0xaf,0xf3,0x02,0x80] + wfe.w + +@ CHECK: wfi.w @ encoding: [0xaf,0xf3,0x03,0x80] + wfi.w + From bruno.cardoso at gmail.com Wed Jan 26 07:53:38 2011 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Wed, 26 Jan 2011 13:53:38 -0000 Subject: [llvm-commits] [llvm] r124289 - /llvm/trunk/test/MC/ARM/simple-fp-encoding.s Message-ID: <20110126135338.3018B2A6C12C@llvm.org> Author: bruno Date: Wed Jan 26 07:53:38 2011 New Revision: 124289 URL: http://llvm.org/viewvc/llvm-project?rev=124289&view=rev Log: Add encoding testcases for ARM vcvtr variations Modified: llvm/trunk/test/MC/ARM/simple-fp-encoding.s Modified: llvm/trunk/test/MC/ARM/simple-fp-encoding.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/simple-fp-encoding.s?rev=124289&r1=124288&r2=124289&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/simple-fp-encoding.s (original) +++ llvm/trunk/test/MC/ARM/simple-fp-encoding.s Wed Jan 26 07:53:38 2011 @@ -226,3 +226,12 @@ @ CHECK: vstmia r1, {s2, s3, s4, s5, s6, s7} @ encoding: [0x06,0x1a,0x81,0xec] vstmia r1, {d2,d3-d6,d7} vstmia r1, {s2,s3-s6,s7} + +@ CHECK: vcvtr.s32.f64 s0, d0 @ encoding: [0x40,0x0b,0xbd,0xee] +@ CHECK: vcvtr.s32.f32 s0, s1 @ encoding: [0x60,0x0a,0xbd,0xee] +@ CHECK: vcvtr.u32.f64 s0, d0 @ encoding: [0x40,0x0b,0xbc,0xee] +@ CHECK: vcvtr.u32.f32 s0, s1 @ encoding: [0x60,0x0a,0xbc,0xee] + vcvtr.s32.f64 s0, d0 + vcvtr.s32.f32 s0, s1 + vcvtr.u32.f64 s0, d0 + vcvtr.u32.f32 s0, s1 From geek4civic at gmail.com Wed Jan 26 09:26:55 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Thu, 27 Jan 2011 00:26:55 +0900 Subject: [llvm-commits] Patches to build EFI with clang/llvm In-Reply-To: References: <9D168FAF-67BF-414A-A0B4-D06D146A620B@apple.com> Message-ID: Carl and Jakob, I have committed win64 tailcall stuff today. I think isTargetCOFF() would be annoying. We have never met we would use Win32/Win64 ABI not for PECOFF targets. Carl's win32-macho patch is okay in gross for me for now. :) In future, we might restructure triplets for win32-related system. IMHO, eg. -win32 should not present Microsoft-specific toolchain, but generic Win32 ABI and API. Microsoft environments might be presented as "-msvcrt[0-9]*", though mingw uses msvcrt.dll. I will post a topic for win32 stuff if someone had interest. ...Takumi From greened at obbligato.org Wed Jan 26 09:38:49 2011 From: greened at obbligato.org (David Greene) Date: Wed, 26 Jan 2011 15:38:49 -0000 Subject: [llvm-commits] [llvm] r124292 - in /llvm/trunk: include/llvm/Target/TargetSelectionDAG.td lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp lib/CodeGen/SelectionDAG/SelectionDAG.cpp lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86ISelLowering.h Message-ID: <20110126153849.EE2062A6C12C@llvm.org> Author: greened Date: Wed Jan 26 09:38:49 2011 New Revision: 124292 URL: http://llvm.org/viewvc/llvm-project?rev=124292&view=rev Log: [AVX] Support EXTRACT_SUBVECTOR on x86. This provides a default implementation of EXTRACT_SUBVECTOR for x86, going through the stack in a similr fashion to how the codegen implements BUILD_VECTOR. Eventually this will get matched to VEXTRACTF128 if AVX is available. Modified: llvm/trunk/include/llvm/Target/TargetSelectionDAG.td llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp llvm/trunk/lib/Target/X86/X86ISelLowering.cpp llvm/trunk/lib/Target/X86/X86ISelLowering.h Modified: llvm/trunk/include/llvm/Target/TargetSelectionDAG.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetSelectionDAG.td?rev=124292&r1=124291&r2=124292&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetSelectionDAG.td (original) +++ llvm/trunk/include/llvm/Target/TargetSelectionDAG.td Wed Jan 26 09:38:49 2011 @@ -191,10 +191,10 @@ ]>; def SDTSubVecExtract : SDTypeProfile<1, 2, [// subvector extract - SDTCisSubVecOfVec<0,1> + SDTCisSubVecOfVec<0,1>, SDTCisInt<2> ]>; def SDTSubVecInsert : SDTypeProfile<1, 3, [ // subvector insert - SDTCisSubVecOfVec<2, 1>, SDTCisSameAs<0,1> + SDTCisSubVecOfVec<2, 1>, SDTCisSameAs<0,1>, SDTCisInt<3> ]>; def SDTPrefetch : SDTypeProfile<0, 3, [ // prefetch @@ -435,11 +435,17 @@ []>; def vector_extract : SDNode<"ISD::EXTRACT_VECTOR_ELT", SDTypeProfile<1, 2, [SDTCisPtrTy<2>]>, []>; +def vector_insert : SDNode<"ISD::INSERT_VECTOR_ELT", + SDTypeProfile<1, 3, [SDTCisSameAs<0, 1>, SDTCisPtrTy<3>]>, []>; + +// This operator does not do subvector type checking. The ARM +// backend, at least, needs it. def vector_extract_subvec : SDNode<"ISD::EXTRACT_SUBVECTOR", SDTypeProfile<1, 2, [SDTCisInt<2>, SDTCisVec<1>, SDTCisVec<0>]>, []>; -def vector_insert : SDNode<"ISD::INSERT_VECTOR_ELT", - SDTypeProfile<1, 3, [SDTCisSameAs<0, 1>, SDTCisPtrTy<3>]>, []>; + +// This operator does subvector type checking. +def extract_subvector : SDNode<"ISD::EXTRACT_SUBVECTOR", SDTSubVecExtract, []>; // Nodes for intrinsics, you should use the intrinsic itself and let tblgen use // these internally. Don't reference these directly. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp?rev=124292&r1=124291&r2=124292&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp Wed Jan 26 09:38:49 2011 @@ -625,9 +625,9 @@ EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(), LoVT.getVectorNumElements()); VLo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp, - DAG.getIntPtrConstant(0)); + DAG.getIntPtrConstant(0)); VHi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp, - DAG.getIntPtrConstant(InNVT.getVectorNumElements())); + DAG.getIntPtrConstant(InNVT.getVectorNumElements())); break; } } Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=124292&r1=124291&r2=124292&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Wed Jan 26 09:38:49 2011 @@ -2864,11 +2864,30 @@ return getConstant(ShiftedVal.trunc(ElementSize), VT); } break; - case ISD::EXTRACT_SUBVECTOR: - if (N1.getValueType() == VT) // Trivial extraction. - return N1; + case ISD::EXTRACT_SUBVECTOR: { + SDValue Index = N2; + if (VT.isSimple() && N1.getValueType().isSimple()) { + assert(VT.isVector() && N1.getValueType().isVector() && + "Extract subvector VTs must be a vectors!"); + assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() && + "Extract subvector VTs must have the same element type!"); + assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() && + "Extract subvector must be from larger vector to smaller vector!"); + + if (ConstantSDNode *CSD = dyn_cast(Index.getNode())) { + uint64_t Idx = CSD->getZExtValue(); + assert((VT.getVectorNumElements() + Idx + <= N1.getValueType().getVectorNumElements()) + && "Extract subvector overflow!"); + } + + // Trivial extraction. + if (VT.getSimpleVT() == N1.getValueType().getSimpleVT()) + return N1; + } break; } + } if (N1C) { if (N2C) { Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=124292&r1=124291&r2=124292&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Jan 26 09:38:49 2011 @@ -5845,6 +5845,17 @@ DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v4i32,AnyExt)); } +// Lower a node with an EXTRACT_SUBVECTOR opcode. This may result in +// a simple subregister reference or explicit instructions to grab +// upper bits of a vector. +SDValue +X86TargetLowering::LowerEXTRACT_SUBVECTOR(SDValue Op, SelectionDAG &DAG) const { + if (Subtarget->hasAVX()) { + // TODO + } + return SDValue(); +} + // ConstantPool, JumpTable, GlobalAddress, and ExternalSymbol are lowered as // their target countpart wrapped in the X86ISD::Wrapper node. Suppose N is // one of the above mentioned nodes. It has to be wrapped because otherwise @@ -8693,6 +8704,7 @@ case ISD::VECTOR_SHUFFLE: return LowerVECTOR_SHUFFLE(Op, DAG); case ISD::EXTRACT_VECTOR_ELT: return LowerEXTRACT_VECTOR_ELT(Op, DAG); case ISD::INSERT_VECTOR_ELT: return LowerINSERT_VECTOR_ELT(Op, DAG); + case ISD::EXTRACT_SUBVECTOR: return LowerEXTRACT_SUBVECTOR(Op, DAG); case ISD::SCALAR_TO_VECTOR: return LowerSCALAR_TO_VECTOR(Op, DAG); case ISD::ConstantPool: return LowerConstantPool(Op, DAG); case ISD::GlobalAddress: return LowerGlobalAddress(Op, DAG); Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=124292&r1=124291&r2=124292&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Wed Jan 26 09:38:49 2011 @@ -741,6 +741,7 @@ SDValue LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const; SDValue LowerINSERT_VECTOR_ELT_SSE4(SDValue Op, SelectionDAG &DAG) const; SDValue LowerSCALAR_TO_VECTOR(SDValue Op, SelectionDAG &DAG) const; + SDValue LowerEXTRACT_SUBVECTOR(SDValue Op, SelectionDAG &DAG) const; SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const; SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const; SDValue LowerGlobalAddress(const GlobalValue *GV, DebugLoc dl, From geek4civic at gmail.com Wed Jan 26 10:01:59 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Thu, 27 Jan 2011 01:01:59 +0900 Subject: [llvm-commits] Patch to build 64bit LLVM with MinGW64 compiler In-Reply-To: References: Message-ID: Anton and Syoyo, ?????. IMO, I consider autoconf might detect libgcc's symbols on mingw. I assume mingw-w64 would be on the way in progress. I am using mingw-w64(20101129). Random notes for syoyo's proposal; - mingw-w64 defines _WIN32 _WIN64 __MINGW32__ __MINGW64__. - You may describe (__MINGW32__) && !(__MINGW64__) to detect i*86-mingw32 explicitly. - I propose not to use _alloca nor __alloca, but ___chkstk on w64. - I heard to you, you would use TDM-gcc for w64. It seems incompatible to FSF version of gcc. (esp. __alloca vs _alloca, and ___chkstk vs __chkstk!!!) Generic issues for patch proposal; - Please read http://llvm.org/docs/DeveloperPolicy.html#patches - Your patch is not applied in Top of Trunk. lib/System/Win32 has moved to lib/Support/Windows. - Please don't include patches to message body by inline. multipart would be preferred. - Please read http://llvm.org/docs/DeveloperPolicy.html#patches ;) ps. I have never built clang and llvm with mingw-w64! I can build with clang selfhost bootstrapping with mingw32. ???????...Takumi / ?? ? From syoyofujita at gmail.com Wed Jan 26 10:30:50 2011 From: syoyofujita at gmail.com (Syoyo Fujita) Date: Thu, 27 Jan 2011 01:30:50 +0900 Subject: [llvm-commits] Patch to build 64bit LLVM with MinGW64 compiler In-Reply-To: References: Message-ID: Takumi, > ?- mingw-w64 defines _WIN32 _WIN64 __MINGW32__ __MINGW64__. > ?- You may describe (__MINGW32__) && !(__MINGW64__) to detect > i*86-mingw32 explicitly. > ?- I propose not to use _alloca nor __alloca, but ___chkstk on w64. > ?- I heard to you, you would use TDM-gcc for w64. It seems > incompatible to FSF version of gcc. > ? ?(esp. __alloca vs _alloca, and ___chkstk vs __chkstk!!!) The number of leading underscore is another problem. llc and mingw emits different number of leading scores for function symbols, so I cannot link .s generated by llc on Windows with mingw. We need to investigate and fix it in the next step. TDM-gcc seems it does right way, I'll check it. > ?- Please read http://llvm.org/docs/DeveloperPolicy.html#patches ;) Okay, I understand it. From rafael.espindola at gmail.com Wed Jan 26 10:48:34 2011 From: rafael.espindola at gmail.com (=?ISO-8859-1?Q?Rafael_=C1vila_de_Esp=EDndola?=) Date: Wed, 26 Jan 2011 11:48:34 -0500 Subject: [llvm-commits] [PATCH]: patch for .cfi register parsing In-Reply-To: <20110124175550.GA18819@freebsd.org> References: <20110124175550.GA18819@freebsd.org> Message-ID: <4D405062.8040605@gmail.com> On 11-01-24 12:55 PM, Roman Divacky wrote: > Hi, > > some .cfi directives take register as an argument, ie: > > .cfi_def_cfa_register %ebp > > The attached patch implements that. The patch makes ParseRegister > method in TargetAsmParser public. I made that change only in > X86 in that patch as I want some comment on whether this is the > correct thing to do. It is probably on the right direction, but are you sure this is giving you the correct numbers? You should use the dwarf numbers, not the internal numbers used by llvm. It is probably also a good idea to factor out a ParseRegisterOrRegisterNumber method. Last but not least, include tests :-) > Thank you! > > roman > Cheers, Rafael From dpatel at apple.com Wed Jan 26 12:20:04 2011 From: dpatel at apple.com (Devang Patel) Date: Wed, 26 Jan 2011 18:20:04 -0000 Subject: [llvm-commits] [llvm] r124300 - /llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp Message-ID: <20110126182004.D03CD2A6C12C@llvm.org> Author: dpatel Date: Wed Jan 26 12:20:04 2011 New Revision: 124300 URL: http://llvm.org/viewvc/llvm-project?rev=124300&view=rev Log: Refactor. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp?rev=124300&r1=124299&r2=124300&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp Wed Jan 26 12:20:04 2011 @@ -501,6 +501,35 @@ }; } +/// ProcessSDDbgValues - Process SDDbgValues assoicated with this node. +static void ProcessSDDbgValues(SDNode *N, SelectionDAG *DAG, + InstrEmitter &Emitter, + SmallVector, 32> &Orders, + DenseMap &VRBaseMap, + unsigned Order) { + if (!N->getHasDebugValue()) + return; + + // Opportunistically insert immediate dbg_value uses, i.e. those with source + // order number right after the N. + MachineBasicBlock *BB = Emitter.getBlock(); + MachineBasicBlock::iterator InsertPos = Emitter.getInsertPos(); + SmallVector &DVs = DAG->GetDbgValues(N); + for (unsigned i = 0, e = DVs.size(); i != e; ++i) { + if (DVs[i]->isInvalidated()) + continue; + unsigned DVOrder = DVs[i]->getOrder(); + if (!Order || DVOrder == ++Order) { + MachineInstr *DbgMI = Emitter.EmitDbgValue(DVs[i], VRBaseMap); + if (DbgMI) { + Orders.push_back(std::make_pair(DVOrder, DbgMI)); + BB->insert(InsertPos, DbgMI); + } + DVs[i]->setIsInvalidated(); + } + } +} + // ProcessSourceNode - Process nodes with source order numbers. These are added // to a vector which EmitSchedule uses to determine how to insert dbg_value // instructions in the right order. @@ -521,25 +550,7 @@ } Orders.push_back(std::make_pair(Order, prior(Emitter.getInsertPos()))); - if (!N->getHasDebugValue()) - return; - // Opportunistically insert immediate dbg_value uses, i.e. those with source - // order number right after the N. - MachineBasicBlock::iterator InsertPos = Emitter.getInsertPos(); - SmallVector &DVs = DAG->GetDbgValues(N); - for (unsigned i = 0, e = DVs.size(); i != e; ++i) { - if (DVs[i]->isInvalidated()) - continue; - unsigned DVOrder = DVs[i]->getOrder(); - if (DVOrder == ++Order) { - MachineInstr *DbgMI = Emitter.EmitDbgValue(DVs[i], VRBaseMap); - if (DbgMI) { - Orders.push_back(std::make_pair(DVOrder, DbgMI)); - BB->insert(InsertPos, DbgMI); - } - DVs[i]->setIsInvalidated(); - } - } + ProcessSDDbgValues(N, DAG, Emitter, Orders, VRBaseMap, Order); } From dpatel at apple.com Wed Jan 26 12:42:32 2011 From: dpatel at apple.com (Devang Patel) Date: Wed, 26 Jan 2011 18:42:32 -0000 Subject: [llvm-commits] [llvm] r124301 - /llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp Message-ID: <20110126184232.479F22A6C12C@llvm.org> Author: dpatel Date: Wed Jan 26 12:42:32 2011 New Revision: 124301 URL: http://llvm.org/viewvc/llvm-project?rev=124301&view=rev Log: Process valid SDDbgValues even if the node does not have any order assigned. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp?rev=124301&r1=124300&r2=124301&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp Wed Jan 26 12:42:32 2011 @@ -539,8 +539,12 @@ SmallVector, 32> &Orders, SmallSet &Seen) { unsigned Order = DAG->GetOrdering(N); - if (!Order || !Seen.insert(Order)) + if (!Order || !Seen.insert(Order)) { + // Process any valid SDDbgValues even if node does not have any order + // assigned. + ProcessSDDbgValues(N, DAG, Emitter, Orders, VRBaseMap, 0); return; + } MachineBasicBlock *BB = Emitter.getBlock(); if (Emitter.getInsertPos() == BB->begin() || BB->back().isPHI()) { From dpatel at apple.com Wed Jan 26 12:55:05 2011 From: dpatel at apple.com (Devang Patel) Date: Wed, 26 Jan 2011 18:55:05 -0000 Subject: [llvm-commits] [llvm] r124302 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Message-ID: <20110126185505.BAC7C2A6C12C@llvm.org> Author: dpatel Date: Wed Jan 26 12:55:05 2011 New Revision: 124302 URL: http://llvm.org/viewvc/llvm-project?rev=124302&view=rev Log: While legalizing SDValues do not drop SDDbgValues, trasfer them to new legal nodes. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=124302&r1=124301&r2=124302&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Wed Jan 26 12:55:05 2011 @@ -87,6 +87,9 @@ // If someone requests legalization of the new node, return itself. if (From != To) LegalizedNodes.insert(std::make_pair(To, To)); + + // Transfer SDDbgValues. + DAG.TransferDbgValues(From, To); } public: From greened at obbligato.org Wed Jan 26 13:13:23 2011 From: greened at obbligato.org (David Greene) Date: Wed, 26 Jan 2011 19:13:23 -0000 Subject: [llvm-commits] [llvm] r124307 - in /llvm/trunk: include/llvm/CodeGen/ISDOpcodes.h include/llvm/Target/TargetSelectionDAG.td lib/CodeGen/SelectionDAG/LegalizeDAG.cpp lib/CodeGen/SelectionDAG/SelectionDAG.cpp lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86ISelLowering.h Message-ID: <20110126191323.50C2F2A6C12D@llvm.org> Author: greened Date: Wed Jan 26 13:13:22 2011 New Revision: 124307 URL: http://llvm.org/viewvc/llvm-project?rev=124307&view=rev Log: [AVX] Add INSERT_SUBVECTOR and support it on x86. This provides a default implementation for x86, going through the stack in a similr fashion to how the codegen implements BUILD_VECTOR. Eventually this will get matched to VINSERTF128 if AVX is available. Modified: llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h llvm/trunk/include/llvm/Target/TargetSelectionDAG.td llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp llvm/trunk/lib/Target/X86/X86ISelLowering.cpp llvm/trunk/lib/Target/X86/X86ISelLowering.h Modified: llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h?rev=124307&r1=124306&r2=124307&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h (original) +++ llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h Wed Jan 26 13:13:22 2011 @@ -269,6 +269,14 @@ /// lengths of the input vectors. CONCAT_VECTORS, + /// INSERT_SUBVECTOR(VECTOR1, VECTOR2, IDX) - Returns a vector + /// with VECTOR2 inserted into VECTOR1 at the (potentially + /// variable) element number IDX, which must be a multiple of the + /// VECTOR2 vector length. The elements of VECTOR1 starting at + /// IDX are overwritten with VECTOR2. Elements IDX through + /// vector_length(VECTOR2) must be valid VECTOR1 indices. + INSERT_SUBVECTOR, + /// EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR (an /// vector value) starting with the element number IDX, which must be a /// constant multiple of the result vector length. Modified: llvm/trunk/include/llvm/Target/TargetSelectionDAG.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetSelectionDAG.td?rev=124307&r1=124306&r2=124307&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetSelectionDAG.td (original) +++ llvm/trunk/include/llvm/Target/TargetSelectionDAG.td Wed Jan 26 13:13:22 2011 @@ -446,6 +446,7 @@ // This operator does subvector type checking. def extract_subvector : SDNode<"ISD::EXTRACT_SUBVECTOR", SDTSubVecExtract, []>; +def insert_subvector : SDNode<"ISD::INSERT_SUBVECTOR", SDTSubVecInsert, []>; // Nodes for intrinsics, you should use the intrinsic itself and let tblgen use // these internally. Don't reference these directly. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=124307&r1=124306&r2=124307&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Wed Jan 26 13:13:22 2011 @@ -171,6 +171,7 @@ SDValue ExpandBitCount(unsigned Opc, SDValue Op, DebugLoc dl); SDValue ExpandExtractFromVectorThroughStack(SDValue Op); + SDValue ExpandInsertToVectorThroughStack(SDValue Op); SDValue ExpandVectorBuildThroughStack(SDNode* Node); std::pair ExpandAtomic(SDNode *Node); @@ -1588,6 +1589,50 @@ false, false, 0); } +SDValue SelectionDAGLegalize::ExpandInsertToVectorThroughStack(SDValue Op) { + assert(Op.getValueType().isVector() && "Non-vector insert subvector!"); + + SDValue Vec = Op.getOperand(0); + SDValue Part = Op.getOperand(1); + SDValue Idx = Op.getOperand(2); + DebugLoc dl = Op.getDebugLoc(); + + // Store the value to a temporary stack slot, then LOAD the returned part. + + SDValue StackPtr = DAG.CreateStackTemporary(Vec.getValueType()); + int FI = cast(StackPtr.getNode())->getIndex(); + MachinePointerInfo PtrInfo = MachinePointerInfo::getFixedStack(FI); + + // First store the whole vector. + SDValue Ch = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr, PtrInfo, + false, false, 0); + + // Then store the inserted part. + + // Add the offset to the index. + unsigned EltSize = + Vec.getValueType().getVectorElementType().getSizeInBits()/8; + + Idx = DAG.getNode(ISD::MUL, dl, Idx.getValueType(), Idx, + DAG.getConstant(EltSize, Idx.getValueType())); + + if (Idx.getValueType().bitsGT(TLI.getPointerTy())) + Idx = DAG.getNode(ISD::TRUNCATE, dl, TLI.getPointerTy(), Idx); + else + Idx = DAG.getNode(ISD::ZERO_EXTEND, dl, TLI.getPointerTy(), Idx); + + SDValue SubStackPtr = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx, + StackPtr); + + // Store the subvector. + Ch = DAG.getStore(DAG.getEntryNode(), dl, Part, SubStackPtr, + MachinePointerInfo(), false, false, 0); + + // Finally, load the updated vector. + return DAG.getLoad(Op.getValueType(), dl, Ch, StackPtr, PtrInfo, + false, false, 0); +} + SDValue SelectionDAGLegalize::ExpandVectorBuildThroughStack(SDNode* Node) { // We can't handle this case efficiently. Allocate a sufficiently // aligned object on the stack, store each element into it, then load @@ -2806,6 +2851,9 @@ case ISD::EXTRACT_SUBVECTOR: Results.push_back(ExpandExtractFromVectorThroughStack(SDValue(Node, 0))); break; + case ISD::INSERT_SUBVECTOR: + Results.push_back(ExpandInsertToVectorThroughStack(SDValue(Node, 0))); + break; case ISD::CONCAT_VECTORS: { Results.push_back(ExpandVectorBuildThroughStack(Node)); break; Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=124307&r1=124306&r2=124307&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Wed Jan 26 13:13:22 2011 @@ -3082,6 +3082,30 @@ case ISD::VECTOR_SHUFFLE: llvm_unreachable("should use getVectorShuffle constructor!"); break; + case ISD::INSERT_SUBVECTOR: { + SDValue Index = N3; + if (VT.isSimple() && N1.getValueType().isSimple() + && N2.getValueType().isSimple()) { + assert(VT.isVector() && N1.getValueType().isVector() && + N2.getValueType().isVector() && + "Insert subvector VTs must be a vectors"); + assert(VT == N1.getValueType() && + "Dest and insert subvector source types must match!"); + assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() && + "Insert subvector must be from smaller vector to larger vector!"); + if (ConstantSDNode *CSD = dyn_cast(Index.getNode())) { + uint64_t Idx = CSD->getZExtValue(); + assert((N2.getValueType().getVectorNumElements() + Idx + <= VT.getVectorNumElements()) + && "Insert subvector overflow!"); + } + + // Trivial insertion. + if (VT.getSimpleVT() == N2.getValueType().getSimpleVT()) + return N2; + } + break; + } case ISD::BITCAST: // Fold bit_convert nodes from a type to themselves. if (N1.getValueType() == VT) @@ -5811,6 +5835,7 @@ case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; case ISD::CONCAT_VECTORS: return "concat_vectors"; + case ISD::INSERT_SUBVECTOR: return "insert_subvector"; case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=124307&r1=124306&r2=124307&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Jan 26 13:13:22 2011 @@ -568,8 +568,9 @@ setOperationAction(ISD::LOAD, (MVT::SimpleValueType)VT, Expand); setOperationAction(ISD::VECTOR_SHUFFLE, (MVT::SimpleValueType)VT, Expand); setOperationAction(ISD::EXTRACT_VECTOR_ELT,(MVT::SimpleValueType)VT,Expand); - setOperationAction(ISD::EXTRACT_SUBVECTOR,(MVT::SimpleValueType)VT,Expand); setOperationAction(ISD::INSERT_VECTOR_ELT,(MVT::SimpleValueType)VT, Expand); + setOperationAction(ISD::EXTRACT_SUBVECTOR,(MVT::SimpleValueType)VT,Expand); + setOperationAction(ISD::INSERT_SUBVECTOR,(MVT::SimpleValueType)VT,Expand); setOperationAction(ISD::FABS, (MVT::SimpleValueType)VT, Expand); setOperationAction(ISD::FSIN, (MVT::SimpleValueType)VT, Expand); setOperationAction(ISD::FCOS, (MVT::SimpleValueType)VT, Expand); @@ -5856,6 +5857,25 @@ return SDValue(); } +// Lower a node with an INSERT_SUBVECTOR opcode. This may result in a +// simple superregister reference or explicit instructions to insert +// the upper bits of a vector. +SDValue +X86TargetLowering::LowerINSERT_SUBVECTOR(SDValue Op, SelectionDAG &DAG) const { + if (Subtarget->hasAVX()) { + DebugLoc dl = Op.getNode()->getDebugLoc(); + SDValue Vec = Op.getNode()->getOperand(0); + SDValue SubVec = Op.getNode()->getOperand(1); + SDValue Idx = Op.getNode()->getOperand(2); + + if (Op.getNode()->getValueType(0).getSizeInBits() == 256 + && SubVec.getNode()->getValueType(0).getSizeInBits() == 128) { + // TODO + } + } + return SDValue(); +} + // ConstantPool, JumpTable, GlobalAddress, and ExternalSymbol are lowered as // their target countpart wrapped in the X86ISD::Wrapper node. Suppose N is // one of the above mentioned nodes. It has to be wrapped because otherwise @@ -8705,6 +8725,7 @@ case ISD::EXTRACT_VECTOR_ELT: return LowerEXTRACT_VECTOR_ELT(Op, DAG); case ISD::INSERT_VECTOR_ELT: return LowerINSERT_VECTOR_ELT(Op, DAG); case ISD::EXTRACT_SUBVECTOR: return LowerEXTRACT_SUBVECTOR(Op, DAG); + case ISD::INSERT_SUBVECTOR: return LowerINSERT_SUBVECTOR(Op, DAG); case ISD::SCALAR_TO_VECTOR: return LowerSCALAR_TO_VECTOR(Op, DAG); case ISD::ConstantPool: return LowerConstantPool(Op, DAG); case ISD::GlobalAddress: return LowerGlobalAddress(Op, DAG); Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=124307&r1=124306&r2=124307&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Wed Jan 26 13:13:22 2011 @@ -742,6 +742,7 @@ SDValue LowerINSERT_VECTOR_ELT_SSE4(SDValue Op, SelectionDAG &DAG) const; SDValue LowerSCALAR_TO_VECTOR(SDValue Op, SelectionDAG &DAG) const; SDValue LowerEXTRACT_SUBVECTOR(SDValue Op, SelectionDAG &DAG) const; + SDValue LowerINSERT_SUBVECTOR(SDValue Op, SelectionDAG &DAG) const; SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const; SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const; SDValue LowerGlobalAddress(const GlobalValue *GV, DebugLoc dl, From dpatel at apple.com Wed Jan 26 13:14:14 2011 From: dpatel at apple.com (Devang Patel) Date: Wed, 26 Jan 2011 19:14:14 -0000 Subject: [llvm-commits] [llvm] r124308 - /llvm/trunk/utils/CollectDebugInfoUsingLLDB.py Message-ID: <20110126191414.741C52A6C12C@llvm.org> Author: dpatel Date: Wed Jan 26 13:14:14 2011 New Revision: 124308 URL: http://llvm.org/viewvc/llvm-project?rev=124308&view=rev Log: - Do not try to print nameless variable's info. - Print a summary of breakpoints in the beginning. Modified: llvm/trunk/utils/CollectDebugInfoUsingLLDB.py Modified: llvm/trunk/utils/CollectDebugInfoUsingLLDB.py URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/CollectDebugInfoUsingLLDB.py?rev=124308&r1=124307&r2=124308&view=diff ============================================================================== --- llvm/trunk/utils/CollectDebugInfoUsingLLDB.py (original) +++ llvm/trunk/utils/CollectDebugInfoUsingLLDB.py Wed Jan 26 13:14:14 2011 @@ -87,30 +87,40 @@ bp_loc.SetEnabled(False); for i in range(vars.GetSize()): - file.write(tag) - file.write(fname) - file.write(':') - file.write(str(line)) - file.write(' ') - file.write(str(tid)) - file.write(':') - file.write(str(bid)) - file.write(' ') - v = vars.GetValueAtIndex(i) - file.write(v.GetName()) - file.write(' ') - AlreadyPrintedValues.clear() - print_var_value (v, file, frame) - file.write('\n') + v = vars.GetValueAtIndex(i) + if v.GetName() is not None: + file.write(tag) + file.write(fname) + file.write(':') + file.write(str(line)) + file.write(' ') + file.write(str(tid)) + file.write(':') + file.write(str(bid)) + file.write(' ') + file.write(v.GetName()) + file.write(' ') + AlreadyPrintedValues.clear() + print_var_value (v, file, frame) + file.write('\n') # set_breakpoints - set breakpoints as listed in input file. -def set_breakpoints (target, breakpoint_filename): +def set_breakpoints (target, breakpoint_filename, file): f = open(breakpoint_filename, "r") lines = f.readlines() for l in range(len(lines)): c = lines[l].split() # print "setting break point - ", c bp = target.BreakpointCreateByLocation (str(c[0]), int(c[1])) + file.write("#Breakpoint ") + file.write(str(c[0])) + file.write(':') + file.write(str(c[1])) + file.write(' ') + file.write(str(bp.GetThreadID())) + file.write(':') + file.write(str(bp.GetID())) + file.write('\n') f.close() # stopeed_at_breakpoint - Return True if process is stopeed at a @@ -139,16 +149,12 @@ if target.IsValid(): #print "target is valid" - set_breakpoints (target, sys.argv[2]) - #main_bp = target.BreakpointCreateByLocation ("byval-alignment.c", 11) - #main_bp2 = target.BreakpointCreateByLocation ("byval-alignment.c", 20) - - ##print main_bp + file=open(str(sys.argv[3]), 'w') + set_breakpoints (target, sys.argv[2], file) # Launch the process. Since we specified synchronous mode, we won't return # from this function until we hit the breakpoint at main process = target.LaunchProcess ([''], [''], "/dev/stdout", 0, False) - file=open(str(sys.argv[3]), 'w') # Make sure the launch went ok while stopped_at_breakpoint(process): thread = process.GetThreadAtIndex (0) From jay.foad at gmail.com Wed Jan 26 13:19:37 2011 From: jay.foad at gmail.com (Jay Foad) Date: Wed, 26 Jan 2011 19:19:37 +0000 Subject: [llvm-commits] [PATCH] simplify User::operator delete() Message-ID: It occurred to me that the logic in User::operator delete() is still unnecessarily complicated. Simplified thus -- the comments should explain what's going on. Tested with "make check". OK to commit? Thanks, Jay. -------------- next part -------------- A non-text attachment was scrubbed... Name: simplify-user-operator-delete Type: application/octet-stream Size: 1206 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110126/e91688c9/attachment.obj From clattner at apple.com Wed Jan 26 13:24:23 2011 From: clattner at apple.com (Chris Lattner) Date: Wed, 26 Jan 2011 11:24:23 -0800 Subject: [llvm-commits] [PATCH] simplify User::operator delete() In-Reply-To: References: Message-ID: On Jan 26, 2011, at 11:19 AM, Jay Foad wrote: > It occurred to me that the logic in User::operator delete() is still > unnecessarily complicated. Simplified thus -- the comments should > explain what's going on. > > Tested with "make check". OK to commit? LGTM! From rdivacky at freebsd.org Wed Jan 26 13:31:02 2011 From: rdivacky at freebsd.org (Roman Divacky) Date: Wed, 26 Jan 2011 20:31:02 +0100 Subject: [llvm-commits] [PATCH]: patch for .cfi register parsing In-Reply-To: <4D405062.8040605@gmail.com> References: <20110124175550.GA18819@freebsd.org> <4D405062.8040605@gmail.com> Message-ID: <20110126193102.GA5061@freebsd.org> On Wed, Jan 26, 2011 at 11:48:34AM -0500, Rafael ?vila de Esp?ndola wrote: > On 11-01-24 12:55 PM, Roman Divacky wrote: > > Hi, > > > > some .cfi directives take register as an argument, ie: > > > > .cfi_def_cfa_register %ebp > > > > The attached patch implements that. The patch makes ParseRegister > > method in TargetAsmParser public. I made that change only in > > X86 in that patch as I want some comment on whether this is the > > correct thing to do. > > It is probably on the right direction, but are you sure this is giving > you the correct numbers? You should use the dwarf numbers, not the > internal numbers used by llvm. I am actually doing that, by calling: Register = getContext().getTargetAsmInfo().getDwarfRegNum(RegNo, true); > It is probably also a good idea to factor out a > ParseRegisterOrRegisterNumber method. done > Last but not least, include tests :-) done I also converted ARM/MBlaze. Please check the next patch! roman -------------- next part -------------- A non-text attachment was scrubbed... Name: llvm-cfi-register.patch Type: text/x-diff Size: 7231 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110126/becbafaf/attachment.bin -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 196 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110126/becbafaf/attachment-0001.bin From echristo at apple.com Wed Jan 26 13:40:31 2011 From: echristo at apple.com (Eric Christopher) Date: Wed, 26 Jan 2011 19:40:31 -0000 Subject: [llvm-commits] [llvm] r124312 - in /llvm/trunk: include/llvm/Analysis/InlineCost.h lib/Analysis/InlineCost.cpp Message-ID: <20110126194031.7B4992A6C12C@llvm.org> Author: echristo Date: Wed Jan 26 13:40:31 2011 New Revision: 124312 URL: http://llvm.org/viewvc/llvm-project?rev=124312&view=rev Log: Temporarily revert 124275 to see if it brings the dragonegg buildbot back. Modified: llvm/trunk/include/llvm/Analysis/InlineCost.h llvm/trunk/lib/Analysis/InlineCost.cpp Modified: llvm/trunk/include/llvm/Analysis/InlineCost.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/InlineCost.h?rev=124312&r1=124311&r2=124312&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/InlineCost.h (original) +++ llvm/trunk/include/llvm/Analysis/InlineCost.h Wed Jan 26 13:40:31 2011 @@ -96,9 +96,10 @@ public: unsigned ConstantWeight; unsigned AllocaWeight; + unsigned ConstantBonus; - ArgInfo(unsigned CWeight, unsigned AWeight) - : ConstantWeight(CWeight), AllocaWeight(AWeight) + ArgInfo(unsigned CWeight, unsigned AWeight, unsigned CBonus) + : ConstantWeight(CWeight), AllocaWeight(AWeight), ConstantBonus(CBonus) {} }; @@ -124,7 +125,6 @@ // the ValueMap will update itself when this happens. ValueMap CachedFunctionInfo; - unsigned CountBonusForConstant(Value *V); public: /// getInlineCost - The heuristic used to determine if we should inline the Modified: llvm/trunk/lib/Analysis/InlineCost.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/InlineCost.cpp?rev=124312&r1=124311&r2=124312&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/InlineCost.cpp (original) +++ llvm/trunk/lib/Analysis/InlineCost.cpp Wed Jan 26 13:40:31 2011 @@ -142,6 +142,64 @@ NumBBInsts[BB] = NumInsts - NumInstsBeforeThisBB; } +// CountBonusForConstant - Figure out an approximation for how much per-call +// performance boost we can expect if the specified value is constant. +unsigned CodeMetrics::CountBonusForConstant(Value *V) { + unsigned Bonus = 0; + bool indirectCallBonus = false; + for (Value::use_iterator UI = V->use_begin(), E = V->use_end(); UI != E;++UI){ + User *U = *UI; + if (CallInst *CI = dyn_cast(U)) { + // Turning an indirect call into a direct call is a BIG win + if (CI->getCalledValue() == V) + indirectCallBonus = true; + } + else if (InvokeInst *II = dyn_cast(U)) { + // Turning an indirect call into a direct call is a BIG win + if (II->getCalledValue() == V) + indirectCallBonus = true; + } + // FIXME: Eliminating conditional branches and switches should + // also yield a per-call performance boost. + else { + // Figure out the bonuses that wll accrue due to simple constant + // propagation. + Instruction &Inst = cast(*U); + + // We can't constant propagate instructions which have effects or + // read memory. + // + // FIXME: It would be nice to capture the fact that a load from a + // pointer-to-constant-global is actually a *really* good thing to zap. + // Unfortunately, we don't know the pointer that may get propagated here, + // so we can't make this decision. + if (Inst.mayReadFromMemory() || Inst.mayHaveSideEffects() || + isa(Inst)) + continue; + + bool AllOperandsConstant = true; + for (unsigned i = 0, e = Inst.getNumOperands(); i != e; ++i) + if (!isa(Inst.getOperand(i)) && Inst.getOperand(i) != V) { + AllOperandsConstant = false; + break; + } + + if (AllOperandsConstant) + Bonus += CountBonusForConstant(&Inst); + } + } + + // FIXME: The only reason we're applying the bonus once is while it's great + // to devirtualize calls the magnitude of the bonus x number of call sites + // can lead to a huge code explosion when we prefer to inline 1000 instruction + // functions that have 10 call sites. This should be made a function of the + // estimated inline penalty/benefit + the indirect call bonus. + if (indirectCallBonus) Bonus += InlineConstants::IndirectCallBonus; + + return Bonus; +} + + // CountCodeReductionForConstant - Figure out an approximation for how many // instructions will be constant folded if the specified value is constant. // @@ -251,14 +309,17 @@ ArgumentWeights.reserve(F->arg_size()); for (Function::arg_iterator I = F->arg_begin(), E = F->arg_end(); I != E; ++I) ArgumentWeights.push_back(ArgInfo(Metrics.CountCodeReductionForConstant(I), - Metrics.CountCodeReductionForAlloca(I))); + Metrics.CountCodeReductionForAlloca(I), + Metrics.CountBonusForConstant(I))); } /// NeverInline - returns true if the function should never be inlined into /// any caller -bool InlineCostAnalyzer::FunctionInfo::NeverInline() { +bool InlineCostAnalyzer::FunctionInfo::NeverInline() +{ return (Metrics.callsSetJmp || Metrics.isRecursive || Metrics.containsIndirectBr); + } // getSpecializationBonus - The heuristic used to determine the per-call // performance boost for using a specialization of Callee with argument @@ -282,14 +343,8 @@ if (CalleeFI->Metrics.NumBlocks == 0) CalleeFI->analyzeFunction(Callee); - unsigned ArgNo = 0; - unsigned i = 0; - for (Function::arg_iterator I = Callee->arg_begin(), E = Callee->arg_end(); - I != E; ++I, ++ArgNo) - if (ArgNo == SpecializedArgNos[i]) { - ++i; - Bonus += CountBonusForConstant(I); - } + for (unsigned i = 0, s = SpecializedArgNos.size(); i < s; ++i ) + Bonus += CalleeFI->ArgumentWeights[SpecializedArgNos[i]].ConstantBonus; // Calls usually take a long time, so they make the specialization gain // smaller. @@ -298,62 +353,6 @@ return Bonus; } -// CountBonusForConstant - Figure out an approximation for how much per-call -// performance boost we can expect if the specified value is constant. -unsigned InlineCostAnalyzer::CountBonusForConstant(Value *V) { - unsigned Bonus = 0; - bool indirectCallBonus = false; - for (Value::use_iterator UI = V->use_begin(), E = V->use_end(); UI != E;++UI){ - User *U = *UI; - if (CallInst *CI = dyn_cast(U)) { - // Turning an indirect call into a direct call is a BIG win - if (CI->getCalledValue() == V) - indirectCallBonus = true; - } - else if (InvokeInst *II = dyn_cast(U)) { - // Turning an indirect call into a direct call is a BIG win - if (II->getCalledValue() == V) - indirectCallBonus = true; - } - // FIXME: Eliminating conditional branches and switches should - // also yield a per-call performance boost. - else { - // Figure out the bonuses that wll accrue due to simple constant - // propagation. - Instruction &Inst = cast(*U); - - // We can't constant propagate instructions which have effects or - // read memory. - // - // FIXME: It would be nice to capture the fact that a load from a - // pointer-to-constant-global is actually a *really* good thing to zap. - // Unfortunately, we don't know the pointer that may get propagated here, - // so we can't make this decision. - if (Inst.mayReadFromMemory() || Inst.mayHaveSideEffects() || - isa(Inst)) - continue; - - bool AllOperandsConstant = true; - for (unsigned i = 0, e = Inst.getNumOperands(); i != e; ++i) - if (!isa(Inst.getOperand(i)) && Inst.getOperand(i) != V) { - AllOperandsConstant = false; - break; - } - - if (AllOperandsConstant) - Bonus += CountBonusForConstant(&Inst); - } - } - - // FIXME: The only reason we're applying the bonus once is while it's great - // to devirtualize calls the magnitude of the bonus x number of call sites - // can lead to a huge code explosion when we prefer to inline 1000 instruction - // functions that have 10 call sites. This should be made a function of the - // estimated inline penalty/benefit + the indirect call bonus. - if (indirectCallBonus) Bonus += InlineConstants::IndirectCallBonus; - - return Bonus; -} // getInlineCost - The heuristic used to determine if we should inline the // function call or not. @@ -428,33 +427,31 @@ // passed into the function. // unsigned ArgNo = 0; - CallSite::arg_iterator I = CS.arg_begin(); - for (Function::arg_iterator FI = Callee->arg_begin(), FE = Callee->arg_end(); - FI != FE; ++I, ++FI, ++ArgNo) { + for (CallSite::arg_iterator I = CS.arg_begin(), E = CS.arg_end(); + I != E; ++I, ++ArgNo) { + // Each argument passed in has a cost at both the caller and the callee + // sides. Measurements show that each argument costs about the same as an + // instruction. + InlineCost -= InlineConstants::InstrCost; // If an alloca is passed in, inlining this function is likely to allow // significant future optimization possibilities (like scalar promotion, and // scalarization), so encourage the inlining of the function. // - if (isa(I)) - InlineCost -= CalleeFI->ArgumentWeights[ArgNo].AllocaWeight; - - // If this is a constant being passed into the function, use the argument - // weights calculated for the callee to determine how much will be folded - // away with this information. - else if (isa(I)) { - InlineCost -= CalleeFI->ArgumentWeights[ArgNo].ConstantWeight; - - // Compute any constant bonus due to inlining we want to give here. - InlineCost -= CountBonusForConstant(FI); + if (isa(I)) { + if (ArgNo < CalleeFI->ArgumentWeights.size()) + InlineCost -= CalleeFI->ArgumentWeights[ArgNo].AllocaWeight; + + // If this is a constant being passed into the function, use the argument + // weights calculated for the callee to determine how much will be folded + // away with this information. + } else if (isa(I)) { + if (ArgNo < CalleeFI->ArgumentWeights.size()) + InlineCost -= (CalleeFI->ArgumentWeights[ArgNo].ConstantWeight + + CalleeFI->ArgumentWeights[ArgNo].ConstantBonus); } } - // Each argument passed in has a cost at both the caller and the callee - // sides. Measurements show that each argument costs about the same as an - // instruction. - InlineCost -= (CS.arg_size() * InlineConstants::InstrCost); - // If there is only one call of the function, and it has internal linkage, // make it almost guaranteed to be inlined. // From bob.wilson at apple.com Wed Jan 26 13:44:55 2011 From: bob.wilson at apple.com (Bob Wilson) Date: Wed, 26 Jan 2011 19:44:55 -0000 Subject: [llvm-commits] [llvm] r124314 - in /llvm/trunk/utils/TableGen: AsmMatcherEmitter.cpp CodeGenInstruction.cpp CodeGenInstruction.h Message-ID: <20110126194455.9D3192A6C12C@llvm.org> Author: bwilson Date: Wed Jan 26 13:44:55 2011 New Revision: 124314 URL: http://llvm.org/viewvc/llvm-project?rev=124314&view=rev Log: Improve the AsmMatcher's ability to handle suboperands. When an operand class is defined with MIOperandInfo set to a list of suboperands, the AsmMatcher has so far required that operand to also define a custom ParserMatchClass, and InstAlias patterns have not been able to set the individual suboperands separately. This patch removes both of those restrictions. If a "compound" operand does not override the default ParserMatchClass, then the AsmMatcher will now parse its suboperands separately. If an InstAlias operand has the same class as the corresponding compound operand, then it will be handled as before; but if that check fails, TableGen will now try to match up a sequence of InstAlias operands with the corresponding suboperands. Modified: llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp llvm/trunk/utils/TableGen/CodeGenInstruction.cpp llvm/trunk/utils/TableGen/CodeGenInstruction.h Modified: llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp?rev=124314&r1=124313&r2=124314&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp Wed Jan 26 13:44:55 2011 @@ -253,8 +253,11 @@ /// The operand name this is, if anything. StringRef SrcOpName; + + /// The suboperand index within SrcOpName, or -1 for the entire operand. + int SubOpIdx; - explicit AsmOperand(StringRef T) : Token(T), Class(0) {} + explicit AsmOperand(StringRef T) : Token(T), Class(0), SubOpIdx(-1) {} }; /// ResOperand - This represents a single operand in the result instruction @@ -296,46 +299,41 @@ Record *Register; }; - /// OpInfo - This is the information about the instruction operand that is - /// being populated. - const CGIOperandList::OperandInfo *OpInfo; + /// MINumOperands - The number of MCInst operands populated by this + /// operand. + unsigned MINumOperands; - static ResOperand getRenderedOp(unsigned AsmOpNum, - const CGIOperandList::OperandInfo *Op) { + static ResOperand getRenderedOp(unsigned AsmOpNum, unsigned NumOperands) { ResOperand X; X.Kind = RenderAsmOperand; X.AsmOperandNum = AsmOpNum; - X.OpInfo = Op; + X.MINumOperands = NumOperands; return X; } - static ResOperand getTiedOp(unsigned TiedOperandNum, - const CGIOperandList::OperandInfo *Op) { + static ResOperand getTiedOp(unsigned TiedOperandNum) { ResOperand X; X.Kind = TiedOperand; X.TiedOperandNum = TiedOperandNum; - X.OpInfo = Op; + X.MINumOperands = 1; return X; } - static ResOperand getImmOp(int64_t Val, - const CGIOperandList::OperandInfo *Op) { + static ResOperand getImmOp(int64_t Val) { ResOperand X; X.Kind = ImmOperand; X.ImmVal = Val; - X.OpInfo = Op; + X.MINumOperands = 1; return X; } - static ResOperand getRegOp(Record *Reg, - const CGIOperandList::OperandInfo *Op) { + static ResOperand getRegOp(Record *Reg) { ResOperand X; X.Kind = RegOperand; X.Register = Reg; - X.OpInfo = Op; + X.MINumOperands = 1; return X; } - }; /// TheDef - This is the definition of the instruction or InstAlias that this @@ -397,6 +395,18 @@ Record *getSingletonRegisterForAsmOperand(unsigned i, const AsmMatcherInfo &Info) const; + /// FindAsmOperand - Find the AsmOperand with the specified name and + /// suboperand index. + int FindAsmOperand(StringRef N, int SubOpIdx) const { + for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) + if (N == AsmOperands[i].SrcOpName && + SubOpIdx == AsmOperands[i].SubOpIdx) + return i; + return -1; + } + + /// FindAsmOperandNamed - Find the first AsmOperand with the specified name. + /// This does not check the suboperand index. int FindAsmOperandNamed(StringRef N) const { for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) if (N == AsmOperands[i].SrcOpName) @@ -531,7 +541,8 @@ ClassInfo *getTokenClass(StringRef Token); /// getOperandClass - Lookup or create the class for the given operand. - ClassInfo *getOperandClass(const CGIOperandList::OperandInfo &OI); + ClassInfo *getOperandClass(const CGIOperandList::OperandInfo &OI, + int SubOpIdx = -1); /// BuildRegisterClasses - Build the ClassInfo* instances for register /// classes. @@ -541,11 +552,9 @@ /// operand classes. void BuildOperandClasses(); - void BuildInstructionOperandReference(MatchableInfo *II, - StringRef OpName, - MatchableInfo::AsmOperand &Op); - void BuildAliasOperandReference(MatchableInfo *II, - StringRef OpName, + void BuildInstructionOperandReference(MatchableInfo *II, StringRef OpName, + unsigned AsmOpIdx); + void BuildAliasOperandReference(MatchableInfo *II, StringRef OpName, MatchableInfo::AsmOperand &Op); public: @@ -806,19 +815,24 @@ } ClassInfo * -AsmMatcherInfo::getOperandClass(const CGIOperandList::OperandInfo &OI) { - if (OI.Rec->isSubClassOf("RegisterClass")) { - if (ClassInfo *CI = RegisterClassClasses[OI.Rec]) +AsmMatcherInfo::getOperandClass(const CGIOperandList::OperandInfo &OI, + int SubOpIdx) { + Record *Rec = OI.Rec; + if (SubOpIdx != -1) + Rec = dynamic_cast(OI.MIOperandInfo->getArg(SubOpIdx))->getDef(); + + if (Rec->isSubClassOf("RegisterClass")) { + if (ClassInfo *CI = RegisterClassClasses[Rec]) return CI; - throw TGError(OI.Rec->getLoc(), "register class has no class info!"); + throw TGError(Rec->getLoc(), "register class has no class info!"); } - assert(OI.Rec->isSubClassOf("Operand") && "Unexpected operand!"); - Record *MatchClass = OI.Rec->getValueAsDef("ParserMatchClass"); + assert(Rec->isSubClassOf("Operand") && "Unexpected operand!"); + Record *MatchClass = Rec->getValueAsDef("ParserMatchClass"); if (ClassInfo *CI = AsmOperandClasses[MatchClass]) return CI; - throw TGError(OI.Rec->getLoc(), "operand has no match class!"); + throw TGError(Rec->getLoc(), "operand has no match class!"); } void AsmMatcherInfo:: @@ -1120,7 +1134,9 @@ MatchableInfo *II = *it; // Parse the tokens after the mnemonic. - for (unsigned i = 0, e = II->AsmOperands.size(); i != e; ++i) { + // Note: BuildInstructionOperandReference may insert new AsmOperands, so + // don't precompute the loop bound. + for (unsigned i = 0; i != II->AsmOperands.size(); ++i) { MatchableInfo::AsmOperand &Op = II->AsmOperands[i]; StringRef Token = Op.Token; @@ -1151,7 +1167,7 @@ OperandName = Token.substr(1); if (II->DefRec.is()) - BuildInstructionOperandReference(II, OperandName, Op); + BuildInstructionOperandReference(II, OperandName, i); else BuildAliasOperandReference(II, OperandName, Op); } @@ -1171,9 +1187,10 @@ void AsmMatcherInfo:: BuildInstructionOperandReference(MatchableInfo *II, StringRef OperandName, - MatchableInfo::AsmOperand &Op) { + unsigned AsmOpIdx) { const CodeGenInstruction &CGI = *II->DefRec.get(); const CGIOperandList &Operands = CGI.Operands; + MatchableInfo::AsmOperand *Op = &II->AsmOperands[AsmOpIdx]; // Map this token to an operand. unsigned Idx; @@ -1181,8 +1198,29 @@ throw TGError(II->TheDef->getLoc(), "error: unable to find operand: '" + OperandName.str() + "'"); + // If the instruction operand has multiple suboperands, but the parser + // match class for the asm operand is still the default "ImmAsmOperand", + // then handle each suboperand separately. + if (Op->SubOpIdx == -1 && Operands[Idx].MINumOperands > 1) { + Record *Rec = Operands[Idx].Rec; + assert(Rec->isSubClassOf("Operand") && "Unexpected operand!"); + Record *MatchClass = Rec->getValueAsDef("ParserMatchClass"); + if (MatchClass && MatchClass->getValueAsString("Name") == "Imm") { + // Insert remaining suboperands after AsmOpIdx in II->AsmOperands. + StringRef Token = Op->Token; // save this in case Op gets moved + for (unsigned SI = 1, SE = Operands[Idx].MINumOperands; SI != SE; ++SI) { + MatchableInfo::AsmOperand NewAsmOp(Token); + NewAsmOp.SubOpIdx = SI; + II->AsmOperands.insert(II->AsmOperands.begin()+AsmOpIdx+SI, NewAsmOp); + } + // Replace Op with first suboperand. + Op = &II->AsmOperands[AsmOpIdx]; // update the pointer in case it moved + Op->SubOpIdx = 0; + } + } + // Set up the operand class. - Op.Class = getOperandClass(Operands[Idx]); + Op->Class = getOperandClass(Operands[Idx], Op->SubOpIdx); // If the named operand is tied, canonicalize it to the untied operand. // For example, something like: @@ -1196,15 +1234,12 @@ if (OITied != -1) { // The tied operand index is an MIOperand index, find the operand that // contains it. - for (unsigned i = 0, e = Operands.size(); i != e; ++i) { - if (Operands[i].MIOperandNo == unsigned(OITied)) { - OperandName = Operands[i].Name; - break; - } - } + std::pair Idx = Operands.getSubOperandNumber(OITied); + OperandName = Operands[Idx.first].Name; + Op->SubOpIdx = Idx.second; } - Op.SrcOpName = OperandName; + Op->SrcOpName = OperandName; } /// BuildAliasOperandReference - When parsing an operand reference out of the @@ -1221,8 +1256,10 @@ CGA.ResultOperands[i].getName() == OperandName) { // It's safe to go with the first one we find, because CodeGenInstAlias // validates that all operands with the same name have the same record. - unsigned ResultIdx = CGA.ResultInstOperandIndex[i]; - Op.Class = getOperandClass(CGA.ResultInst->Operands[ResultIdx]); + unsigned ResultIdx = CGA.ResultInstOperandIndex[i].first; + Op.SubOpIdx = CGA.ResultInstOperandIndex[i].second; + Op.Class = getOperandClass(CGA.ResultInst->Operands[ResultIdx], + Op.SubOpIdx); Op.SrcOpName = OperandName; return; } @@ -1242,22 +1279,31 @@ // If this is a tied operand, just copy from the previously handled operand. int TiedOp = OpInfo.getTiedRegister(); if (TiedOp != -1) { - ResOperands.push_back(ResOperand::getTiedOp(TiedOp, &OpInfo)); + ResOperands.push_back(ResOperand::getTiedOp(TiedOp)); continue; } - // Find out what operand from the asmparser that this MCInst operand comes - // from. + // Find out what operand from the asmparser this MCInst operand comes from. int SrcOperand = FindAsmOperandNamed(OpInfo.Name); + if (OpInfo.Name.empty() || SrcOperand == -1) + throw TGError(TheDef->getLoc(), "Instruction '" + + TheDef->getName() + "' has operand '" + OpInfo.Name + + "' that doesn't appear in asm string!"); - if (!OpInfo.Name.empty() && SrcOperand != -1) { - ResOperands.push_back(ResOperand::getRenderedOp(SrcOperand, &OpInfo)); + // Check if the one AsmOperand populates the entire operand. + unsigned NumOperands = OpInfo.MINumOperands; + if (AsmOperands[SrcOperand].SubOpIdx == -1) { + ResOperands.push_back(ResOperand::getRenderedOp(SrcOperand, NumOperands)); continue; } - - throw TGError(TheDef->getLoc(), "Instruction '" + - TheDef->getName() + "' has operand '" + OpInfo.Name + - "' that doesn't appear in asm string!"); + + // Add a separate ResOperand for each suboperand. + for (unsigned AI = 0; AI < NumOperands; ++AI) { + assert(AsmOperands[SrcOperand+AI].SubOpIdx == (int)AI && + AsmOperands[SrcOperand+AI].SrcOpName == OpInfo.Name && + "unexpected AsmOperands for suboperands"); + ResOperands.push_back(ResOperand::getRenderedOp(SrcOperand + AI, 1)); + } } } @@ -1268,42 +1314,50 @@ // Loop over all operands of the result instruction, determining how to // populate them. unsigned AliasOpNo = 0; + unsigned LastOpNo = CGA.ResultInstOperandIndex.size(); for (unsigned i = 0, e = ResultInst->Operands.size(); i != e; ++i) { - const CGIOperandList::OperandInfo &OpInfo = ResultInst->Operands[i]; + const CGIOperandList::OperandInfo *OpInfo = &ResultInst->Operands[i]; // If this is a tied operand, just copy from the previously handled operand. - int TiedOp = OpInfo.getTiedRegister(); + int TiedOp = OpInfo->getTiedRegister(); if (TiedOp != -1) { - ResOperands.push_back(ResOperand::getTiedOp(TiedOp, &OpInfo)); - continue; - } - - // Find out what operand from the asmparser that this MCInst operand comes - // from. - switch (CGA.ResultOperands[AliasOpNo].Kind) { - case CodeGenInstAlias::ResultOperand::K_Record: { - StringRef Name = CGA.ResultOperands[AliasOpNo++].getName(); - int SrcOperand = FindAsmOperandNamed(Name); - if (SrcOperand != -1) { - ResOperands.push_back(ResOperand::getRenderedOp(SrcOperand, &OpInfo)); - continue; - } - - throw TGError(TheDef->getLoc(), "Instruction '" + - TheDef->getName() + "' has operand '" + OpInfo.Name + - "' that doesn't appear in asm string!"); - } - case CodeGenInstAlias::ResultOperand::K_Imm: { - int64_t ImmVal = CGA.ResultOperands[AliasOpNo++].getImm(); - ResOperands.push_back(ResOperand::getImmOp(ImmVal, &OpInfo)); + ResOperands.push_back(ResOperand::getTiedOp(TiedOp)); continue; } - case CodeGenInstAlias::ResultOperand::K_Reg: { - Record *Reg = CGA.ResultOperands[AliasOpNo++].getRegister(); - ResOperands.push_back(ResOperand::getRegOp(Reg, &OpInfo)); - continue; - } + // Handle all the suboperands for this operand. + const std::string &OpName = OpInfo->Name; + for ( ; AliasOpNo < LastOpNo && + CGA.ResultInstOperandIndex[AliasOpNo].first == i; ++AliasOpNo) { + int SubIdx = CGA.ResultInstOperandIndex[AliasOpNo].second; + + // Find out what operand from the asmparser that this MCInst operand + // comes from. + switch (CGA.ResultOperands[AliasOpNo].Kind) { + default: assert(0 && "unexpected InstAlias operand kind"); + case CodeGenInstAlias::ResultOperand::K_Record: { + StringRef Name = CGA.ResultOperands[AliasOpNo].getName(); + int SrcOperand = FindAsmOperand(Name, SubIdx); + if (SrcOperand == -1) + throw TGError(TheDef->getLoc(), "Instruction '" + + TheDef->getName() + "' has operand '" + OpName + + "' that doesn't appear in asm string!"); + unsigned NumOperands = (SubIdx == -1 ? OpInfo->MINumOperands : 1); + ResOperands.push_back(ResOperand::getRenderedOp(SrcOperand, + NumOperands)); + break; + } + case CodeGenInstAlias::ResultOperand::K_Imm: { + int64_t ImmVal = CGA.ResultOperands[AliasOpNo].getImm(); + ResOperands.push_back(ResOperand::getImmOp(ImmVal)); + break; + } + case CodeGenInstAlias::ResultOperand::K_Reg: { + Record *Reg = CGA.ResultOperands[AliasOpNo].getRegister(); + ResOperands.push_back(ResOperand::getRegOp(Reg)); + break; + } + } } } } @@ -1362,19 +1416,19 @@ Signature += "Reg"; else Signature += Op.Class->ClassName; - Signature += utostr(OpInfo.OpInfo->MINumOperands); + Signature += utostr(OpInfo.MINumOperands); Signature += "_" + itostr(OpInfo.AsmOperandNum); CaseOS << " ((" << TargetOperandClass << "*)Operands[" << (OpInfo.AsmOperandNum+1) << "])->" << Op.Class->RenderMethod - << "(Inst, " << OpInfo.OpInfo->MINumOperands << ");\n"; + << "(Inst, " << OpInfo.MINumOperands << ");\n"; break; } case MatchableInfo::ResOperand::TiedOperand: { // If this operand is tied to a previous one, just copy the MCInst // operand from the earlier one.We can only tie single MCOperand values. - //assert(OpInfo.OpInfo->MINumOperands == 1 && "Not a singular MCOperand"); + //assert(OpInfo.MINumOperands == 1 && "Not a singular MCOperand"); unsigned TiedOp = OpInfo.TiedOperandNum; assert(i > TiedOp && "Tied operand preceeds its target!"); CaseOS << " Inst.addOperand(Inst.getOperand(" << TiedOp << "));\n"; Modified: llvm/trunk/utils/TableGen/CodeGenInstruction.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenInstruction.cpp?rev=124314&r1=124313&r2=124314&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/CodeGenInstruction.cpp (original) +++ llvm/trunk/utils/TableGen/CodeGenInstruction.cpp Wed Jan 26 13:44:55 2011 @@ -390,6 +390,71 @@ /// CodeGenInstAlias Implementation //===----------------------------------------------------------------------===// +/// tryAliasOpMatch - This is a helper function for the CodeGenInstAlias +/// constructor. It checks if an argument in an InstAlias pattern matches +/// the corresponding operand of the instruction. It returns true on a +/// successful match, with ResOp set to the result operand to be used. +bool CodeGenInstAlias::tryAliasOpMatch(DagInit *Result, unsigned AliasOpNo, + Record *InstOpRec, bool hasSubOps, + SMLoc Loc, CodeGenTarget &T, + ResultOperand &ResOp) { + Init *Arg = Result->getArg(AliasOpNo); + DefInit *ADI = dynamic_cast(Arg); + + if (ADI && ADI->getDef() == InstOpRec) { + // If the operand is a record, it must have a name, and the record type + // must match up with the instruction's argument type. + if (Result->getArgName(AliasOpNo).empty()) + throw TGError(Loc, "result argument #" + utostr(AliasOpNo) + + " must have a name!"); + ResOp = ResultOperand(Result->getArgName(AliasOpNo), ADI->getDef()); + return true; + } + + // Handle explicit registers. + if (ADI && ADI->getDef()->isSubClassOf("Register")) { + if (!InstOpRec->isSubClassOf("RegisterClass")) + return false; + + if (!T.getRegisterClass(InstOpRec).containsRegister(ADI->getDef())) + throw TGError(Loc, "fixed register " +ADI->getDef()->getName() + + " is not a member of the " + InstOpRec->getName() + + " register class!"); + + if (!Result->getArgName(AliasOpNo).empty()) + throw TGError(Loc, "result fixed register argument must " + "not have a name!"); + + ResOp = ResultOperand(ADI->getDef()); + return true; + } + + // Handle "zero_reg" for optional def operands. + if (ADI && ADI->getDef()->getName() == "zero_reg") { + + // Check if this is an optional def. + if (!InstOpRec->isSubClassOf("OptionalDefOperand")) + throw TGError(Loc, "reg0 used for result that is not an " + "OptionalDefOperand!"); + + ResOp = ResultOperand(static_cast(0)); + return true; + } + + if (IntInit *II = dynamic_cast(Arg)) { + if (hasSubOps || !InstOpRec->isSubClassOf("Operand")) + return false; + // Integer arguments can't have names. + if (!Result->getArgName(AliasOpNo).empty()) + throw TGError(Loc, "result argument #" + utostr(AliasOpNo) + + " must not have a name!"); + ResOp = ResultOperand(II->getValue()); + return true; + } + + return false; +} + CodeGenInstAlias::CodeGenInstAlias(Record *R, CodeGenTarget &T) : TheDef(R) { AsmString = R->getValueAsString("AsmString"); Result = R->getValueAsDag("ResultInst"); @@ -422,103 +487,51 @@ // Decode and validate the arguments of the result. unsigned AliasOpNo = 0; for (unsigned i = 0, e = ResultInst->Operands.size(); i != e; ++i) { + // Tied registers don't have an entry in the result dag. if (ResultInst->Operands[i].getTiedRegister() != -1) continue; if (AliasOpNo >= Result->getNumArgs()) - throw TGError(R->getLoc(), "result has " + utostr(Result->getNumArgs()) + - " arguments, but " + ResultInst->TheDef->getName() + - " instruction expects " + - utostr(ResultInst->Operands.size()) + " operands!"); - - - Init *Arg = Result->getArg(AliasOpNo); - Record *ResultOpRec = ResultInst->Operands[i].Rec; - - // Handle explicit registers. - if (DefInit *ADI = dynamic_cast(Arg)) { - if (ADI->getDef()->isSubClassOf("Register")) { - if (!Result->getArgName(AliasOpNo).empty()) - throw TGError(R->getLoc(), "result fixed register argument must " - "not have a name!"); - - if (!ResultOpRec->isSubClassOf("RegisterClass")) - throw TGError(R->getLoc(), "result fixed register argument is not " - "passed to a RegisterClass operand!"); - - if (!T.getRegisterClass(ResultOpRec).containsRegister(ADI->getDef())) - throw TGError(R->getLoc(), "fixed register " +ADI->getDef()->getName() - + " is not a member of the " + ResultOpRec->getName() + - " register class!"); - - // Now that it is validated, add it. - ResultOperands.push_back(ResultOperand(ADI->getDef())); - ResultInstOperandIndex.push_back(i); - ++AliasOpNo; - continue; - } - if (ADI->getDef()->getName() == "zero_reg") { - if (!Result->getArgName(AliasOpNo).empty()) - throw TGError(R->getLoc(), "result fixed register argument must " - "not have a name!"); - - // Check if this is an optional def. - if (!ResultOpRec->isSubClassOf("OptionalDefOperand")) - throw TGError(R->getLoc(), "reg0 used for result that is not an " - "OptionalDefOperand!"); - - // Now that it is validated, add it. - ResultOperands.push_back(ResultOperand(static_cast(0))); - ResultInstOperandIndex.push_back(i); - ++AliasOpNo; - continue; - } - } + throw TGError(R->getLoc(), "not enough arguments for instruction!"); - // If the operand is a record, it must have a name, and the record type must - // match up with the instruction's argument type. - if (DefInit *ADI = dynamic_cast(Arg)) { - if (Result->getArgName(AliasOpNo).empty()) - throw TGError(R->getLoc(), "result argument #" + utostr(AliasOpNo) + - " must have a name!"); - - if (ADI->getDef() != ResultOpRec) - throw TGError(R->getLoc(), "result argument #" + utostr(AliasOpNo) + - " declared with class " + ADI->getDef()->getName() + - ", instruction operand is class " + - ResultOpRec->getName()); - - // Now that it is validated, add it. - ResultOperands.push_back(ResultOperand(Result->getArgName(AliasOpNo), - ADI->getDef())); - ResultInstOperandIndex.push_back(i); + Record *InstOpRec = ResultInst->Operands[i].Rec; + unsigned NumSubOps = ResultInst->Operands[i].MINumOperands; + ResultOperand ResOp(static_cast(0)); + if (tryAliasOpMatch(Result, AliasOpNo, InstOpRec, (NumSubOps > 1), + R->getLoc(), T, ResOp)) { + ResultOperands.push_back(ResOp); + ResultInstOperandIndex.push_back(std::make_pair(i, -1)); ++AliasOpNo; continue; } - if (IntInit *II = dynamic_cast(Arg)) { - // Integer arguments can't have names. - if (!Result->getArgName(AliasOpNo).empty()) - throw TGError(R->getLoc(), "result argument #" + utostr(AliasOpNo) + - " must not have a name!"); - if (ResultInst->Operands[i].MINumOperands != 1 || - !ResultOpRec->isSubClassOf("Operand")) - throw TGError(R->getLoc(), "invalid argument class " + - ResultOpRec->getName() + - " for integer result operand!"); - ResultOperands.push_back(ResultOperand(II->getValue())); - ResultInstOperandIndex.push_back(i); - ++AliasOpNo; + // If the argument did not match the instruction operand, and the operand + // is composed of multiple suboperands, try matching the suboperands. + if (NumSubOps > 1) { + DagInit *MIOI = ResultInst->Operands[i].MIOperandInfo; + for (unsigned SubOp = 0; SubOp != NumSubOps; ++SubOp) { + if (AliasOpNo >= Result->getNumArgs()) + throw TGError(R->getLoc(), "not enough arguments for instruction!"); + Record *SubRec = dynamic_cast(MIOI->getArg(SubOp))->getDef(); + if (tryAliasOpMatch(Result, AliasOpNo, SubRec, false, + R->getLoc(), T, ResOp)) { + ResultOperands.push_back(ResOp); + ResultInstOperandIndex.push_back(std::make_pair(i, SubOp)); + ++AliasOpNo; + } else { + throw TGError(R->getLoc(), "result argument #" + utostr(AliasOpNo) + + " does not match instruction operand class " + + (SubOp == 0 ? InstOpRec->getName() :SubRec->getName())); + } + } continue; } - - throw TGError(R->getLoc(), "result of inst alias has unknown operand type"); + throw TGError(R->getLoc(), "result argument #" + utostr(AliasOpNo) + + " does not match instruction operand class " + + InstOpRec->getName()); } if (AliasOpNo != Result->getNumArgs()) - throw TGError(R->getLoc(), "result has " + utostr(Result->getNumArgs()) + - " arguments, but " + ResultInst->TheDef->getName() + - " instruction expects " + utostr(ResultInst->Operands.size())+ - " operands!"); + throw TGError(R->getLoc(), "too many operands for instruction!"); } Modified: llvm/trunk/utils/TableGen/CodeGenInstruction.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenInstruction.h?rev=124314&r1=124313&r2=124314&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/CodeGenInstruction.h (original) +++ llvm/trunk/utils/TableGen/CodeGenInstruction.h Wed Jan 26 13:44:55 2011 @@ -16,6 +16,7 @@ #include "llvm/CodeGen/ValueTypes.h" #include "llvm/ADT/StringRef.h" +#include "llvm/Support/SourceMgr.h" #include #include #include @@ -297,11 +298,18 @@ /// ResultOperands - The decoded operands for the result instruction. std::vector ResultOperands; - /// ResultInstOperandIndex - For each operand, this vector holds the - /// corresponding index of an operand in the result instruction. - std::vector ResultInstOperandIndex; + /// ResultInstOperandIndex - For each operand, this vector holds a pair of + /// indices to identify the corresponding operand in the result + /// instruction. The first index specifies the operand and the second + /// index specifies the suboperand. If there are no suboperands or if all + /// of them are matched by the operand, the second value should be -1. + std::vector > ResultInstOperandIndex; CodeGenInstAlias(Record *R, CodeGenTarget &T); + + bool tryAliasOpMatch(DagInit *Result, unsigned AliasOpNo, + Record *InstOpRec, bool hasSubOps, SMLoc Loc, + CodeGenTarget &T, ResultOperand &ResOp); }; } From criswell at uiuc.edu Wed Jan 26 14:36:24 2011 From: criswell at uiuc.edu (John Criswell) Date: Wed, 26 Jan 2011 20:36:24 -0000 Subject: [llvm-commits] [poolalloc] r124317 - /poolalloc/trunk/include/poolalloc_runtime/Support/SplayTree.h Message-ID: <20110126203624.0C1902A6C12C@llvm.org> Author: criswell Date: Wed Jan 26 14:36:23 2011 New Revision: 124317 URL: http://llvm.org/viewvc/llvm-project?rev=124317&view=rev Log: Fixed some indentation and white-space issues. No functionality changes. Modified: poolalloc/trunk/include/poolalloc_runtime/Support/SplayTree.h Modified: poolalloc/trunk/include/poolalloc_runtime/Support/SplayTree.h URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/poolalloc_runtime/Support/SplayTree.h?rev=124317&r1=124316&r2=124317&view=diff ============================================================================== --- poolalloc/trunk/include/poolalloc_runtime/Support/SplayTree.h (original) +++ poolalloc/trunk/include/poolalloc_runtime/Support/SplayTree.h Wed Jan 26 14:36:23 2011 @@ -52,12 +52,12 @@ tree_node* Tree; tree_node* rotate_right(tree_node* p) { - tree_node* x = p->left; - p->left = x->right; + tree_node* x = p->left; + p->left = x->right; x->right = p; return x; } - + tree_node* rotate_left(tree_node* p) { tree_node* x = p->right; p->right = x->left; @@ -153,7 +153,7 @@ } template - void __clear_internal(tree_node* t, O& act) { + void __clear_internal(tree_node* t, O& act) { if (!t) return; __clear_internal(t->left); __clear_internal(t->right); @@ -265,9 +265,9 @@ bool remove(void* key) { return Tree.__remove(key); } - + bool count() { return Tree.__count(); } - + void clear() { Tree.__clear(); } template From isanbard at gmail.com Wed Jan 26 14:57:44 2011 From: isanbard at gmail.com (Bill Wendling) Date: Wed, 26 Jan 2011 20:57:44 -0000 Subject: [llvm-commits] [llvm] r124318 - /llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp Message-ID: <20110126205744.124752A6C12C@llvm.org> Author: void Date: Wed Jan 26 14:57:43 2011 New Revision: 124318 URL: http://llvm.org/viewvc/llvm-project?rev=124318&view=rev Log: Add support for printing out floating point values from the ARM assembly parser. The parser will always give us a binary representation of the floating point number. Modified: llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp Modified: llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp?rev=124318&r1=124317&r2=124318&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp (original) +++ llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp Wed Jan 26 14:57:43 2011 @@ -673,12 +673,37 @@ void ARMInstPrinter::printVFPf32ImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) { - O << '#' << (float)MI->getOperand(OpNum).getFPImm(); + const MCOperand &MO = MI->getOperand(OpNum); + O << '#'; + if (MO.isFPImm()) { + O << (float)MO.getFPImm(); + } else { + union { + uint32_t I; + float F; + } FPUnion; + + FPUnion.I = MO.getImm(); + O << FPUnion.F; + } } void ARMInstPrinter::printVFPf64ImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) { - O << '#' << MI->getOperand(OpNum).getFPImm(); + const MCOperand &MO = MI->getOperand(OpNum); + O << '#'; + if (MO.isFPImm()) { + O << MO.getFPImm(); + } else { + // We expect the binary encoding of a floating point number here. + union { + uint64_t I; + double D; + } FPUnion; + + FPUnion.I = MO.getImm(); + O << FPUnion.D; + } } void ARMInstPrinter::printNEONModImmOperand(const MCInst *MI, unsigned OpNum, From dpatel at apple.com Wed Jan 26 15:12:32 2011 From: dpatel at apple.com (Devang Patel) Date: Wed, 26 Jan 2011 21:12:32 -0000 Subject: [llvm-commits] [llvm] r124320 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Message-ID: <20110126211232.431AB2A6C12C@llvm.org> Author: dpatel Date: Wed Jan 26 15:12:32 2011 New Revision: 124320 URL: http://llvm.org/viewvc/llvm-project?rev=124320&view=rev Log: Revert r124302 Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=124320&r1=124319&r2=124320&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Wed Jan 26 15:12:32 2011 @@ -87,9 +87,6 @@ // If someone requests legalization of the new node, return itself. if (From != To) LegalizedNodes.insert(std::make_pair(To, To)); - - // Transfer SDDbgValues. - DAG.TransferDbgValues(From, To); } public: From bob.wilson at apple.com Wed Jan 26 15:26:19 2011 From: bob.wilson at apple.com (Bob Wilson) Date: Wed, 26 Jan 2011 21:26:19 -0000 Subject: [llvm-commits] [llvm] r124323 - /llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp Message-ID: <20110126212619.8A70F2A6C12C@llvm.org> Author: bwilson Date: Wed Jan 26 15:26:19 2011 New Revision: 124323 URL: http://llvm.org/viewvc/llvm-project?rev=124323&view=rev Log: Whitespace and 80-column fixes. Modified: llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp Modified: llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp?rev=124323&r1=124322&r2=124323&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp Wed Jan 26 15:26:19 2011 @@ -90,9 +90,8 @@ MatchPrefix("match-prefix", cl::init(""), cl::desc("Only match instructions with the given prefix")); - namespace { - class AsmMatcherInfo; +class AsmMatcherInfo; struct SubtargetFeatureInfo; /// ClassInfo - Helper class for storing the information about a particular @@ -247,7 +246,7 @@ struct AsmOperand { /// Token - This is the token that the operand came from. StringRef Token; - + /// The unique class instance this operand should match. ClassInfo *Class; @@ -256,10 +255,10 @@ /// The suboperand index within SrcOpName, or -1 for the entire operand. int SubOpIdx; - + explicit AsmOperand(StringRef T) : Token(T), Class(0), SubOpIdx(-1) {} }; - + /// ResOperand - This represents a single operand in the result instruction /// generated by the match. In cases (like addressing modes) where a single /// assembler operand expands to multiple MCOperands, this represents the @@ -270,39 +269,39 @@ /// generated by calling the render method on the assembly operand. The /// corresponding AsmOperand is specified by AsmOperandNum. RenderAsmOperand, - + /// TiedOperand - This represents a result operand that is a duplicate of /// a previous result operand. TiedOperand, - + /// ImmOperand - This represents an immediate value that is dumped into /// the operand. ImmOperand, - + /// RegOperand - This represents a fixed register that is dumped in. RegOperand } Kind; - + union { /// This is the operand # in the AsmOperands list that this should be /// copied from. unsigned AsmOperandNum; - + /// TiedOperandNum - This is the (earlier) result operand that should be /// copied from. unsigned TiedOperandNum; - + /// ImmVal - This is the immediate value added to the instruction. int64_t ImmVal; - + /// Register - This is the register record. Record *Register; }; - + /// MINumOperands - The number of MCInst operands populated by this /// operand. unsigned MINumOperands; - + static ResOperand getRenderedOp(unsigned AsmOpNum, unsigned NumOperands) { ResOperand X; X.Kind = RenderAsmOperand; @@ -310,7 +309,7 @@ X.MINumOperands = NumOperands; return X; } - + static ResOperand getTiedOp(unsigned TiedOperandNum) { ResOperand X; X.Kind = TiedOperand; @@ -318,7 +317,7 @@ X.MINumOperands = 1; return X; } - + static ResOperand getImmOp(int64_t Val) { ResOperand X; X.Kind = ImmOperand; @@ -326,7 +325,7 @@ X.MINumOperands = 1; return X; } - + static ResOperand getRegOp(Record *Reg) { ResOperand X; X.Kind = RegOperand; @@ -339,16 +338,16 @@ /// TheDef - This is the definition of the instruction or InstAlias that this /// matchable came from. Record *const TheDef; - + /// DefRec - This is the definition that it came from. PointerUnion DefRec; - + const CodeGenInstruction *getResultInst() const { if (DefRec.is()) return DefRec.get(); return DefRec.get()->ResultInst; } - + /// ResOperands - This is the operand list that should be built for the result /// MCInst. std::vector ResOperands; @@ -360,7 +359,7 @@ /// Mnemonic - This is the first token of the matched instruction, its /// mnemonic. StringRef Mnemonic; - + /// AsmOperands - The textual operands that this instruction matches, /// annotated with a class and where in the OperandList they were defined. /// This directly corresponds to the tokenized AsmString after the mnemonic is @@ -374,7 +373,7 @@ /// ConvertToMCInst to convert parsed operands into an MCInst for this /// function. std::string ConversionFnKind; - + MatchableInfo(const CodeGenInstruction &CGI) : TheDef(CGI.TheDef), DefRec(&CGI), AsmString(CGI.AsmString) { } @@ -382,18 +381,18 @@ MatchableInfo(const CodeGenInstAlias *Alias) : TheDef(Alias->TheDef), DefRec(Alias), AsmString(Alias->AsmString) { } - + void Initialize(const AsmMatcherInfo &Info, SmallPtrSet &SingletonRegisters); - + /// Validate - Return true if this matchable is a valid thing to match against /// and perform a bunch of validity checking. bool Validate(StringRef CommentDelimiter, bool Hack) const; - + /// getSingletonRegisterForAsmOperand - If the specified token is a singleton /// register, return the Record for it, otherwise return null. Record *getSingletonRegisterForAsmOperand(unsigned i, - const AsmMatcherInfo &Info) const; + const AsmMatcherInfo &Info) const; /// FindAsmOperand - Find the AsmOperand with the specified name and /// suboperand index. @@ -404,7 +403,7 @@ return i; return -1; } - + /// FindAsmOperandNamed - Find the first AsmOperand with the specified name. /// This does not check the suboperand index. int FindAsmOperandNamed(StringRef N) const { @@ -413,7 +412,7 @@ return i; return -1; } - + void BuildInstructionResultOperands(); void BuildAliasResultOperands(); @@ -445,7 +444,7 @@ // The primary comparator is the instruction mnemonic. if (Mnemonic != RHS.Mnemonic) return false; - + // The number of operands is unambiguous. if (AsmOperands.size() != RHS.AsmOperands.size()) return false; @@ -478,7 +477,7 @@ } void dump(); - + private: void TokenizeAsmString(const AsmMatcherInfo &Info); }; @@ -493,7 +492,7 @@ unsigned Index; SubtargetFeatureInfo(Record *D, unsigned Idx) : TheDef(D), Index(Idx) {} - + /// \brief The name of the enumerated constant identifying this feature. std::string getEnumName() const { return "Feature_" + TheDef->getName(); @@ -525,7 +524,7 @@ /// Map of Predicate records to their subtarget information. std::map SubtargetFeatures; - + private: /// Map of token to class information which has already been constructed. std::map TokenClasses; @@ -556,15 +555,15 @@ unsigned AsmOpIdx); void BuildAliasOperandReference(MatchableInfo *II, StringRef OpName, MatchableInfo::AsmOperand &Op); - + public: - AsmMatcherInfo(Record *AsmParser, - CodeGenTarget &Target, + AsmMatcherInfo(Record *AsmParser, + CodeGenTarget &Target, RecordKeeper &Records); /// BuildInfo - Construct the various tables used during matching. void BuildInfo(); - + /// getSubtargetFeature - Lookup or create the subtarget feature info for the /// given operand. SubtargetFeatureInfo *getSubtargetFeature(Record *Def) const { @@ -595,16 +594,16 @@ SmallPtrSet &SingletonRegisters) { // TODO: Eventually support asmparser for Variant != 0. AsmString = CodeGenInstruction::FlattenAsmStringVariants(AsmString, 0); - + TokenizeAsmString(Info); - + // Compute the require features. std::vector Predicates =TheDef->getValueAsListOfDefs("Predicates"); for (unsigned i = 0, e = Predicates.size(); i != e; ++i) if (SubtargetFeatureInfo *Feature = Info.getSubtargetFeature(Predicates[i])) RequiredFeatures.push_back(Feature); - + // Collect singleton registers, if used. for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) { if (Record *Reg = getSingletonRegisterForAsmOperand(i, Info)) @@ -651,7 +650,7 @@ AsmOperands.push_back(AsmOperand(String.slice(Prev, i))); InTok = false; } - + // If this isn't "${", treat like a normal token. if (i + 1 == String.size() || String[i + 1] != '{') { Prev = i; @@ -680,7 +679,7 @@ } if (InTok && Prev != String.size()) AsmOperands.push_back(AsmOperand(String.substr(Prev))); - + // The first token of the instruction is the mnemonic, which must be a // simple string, not a $foo variable or a singleton register. assert(!AsmOperands.empty() && "Instruction has no tokens?"); @@ -688,25 +687,23 @@ if (Mnemonic[0] == '$' || getSingletonRegisterForAsmOperand(0, Info)) throw TGError(TheDef->getLoc(), "Invalid instruction mnemonic '" + Mnemonic.str() + "'!"); - + // Remove the first operand, it is tracked in the mnemonic field. AsmOperands.erase(AsmOperands.begin()); } - - bool MatchableInfo::Validate(StringRef CommentDelimiter, bool Hack) const { // Reject matchables with no .s string. if (AsmString.empty()) throw TGError(TheDef->getLoc(), "instruction with empty asm string"); - + // Reject any matchables with a newline in them, they should be marked // isCodeGenOnly if they are pseudo instructions. if (AsmString.find('\n') != std::string::npos) throw TGError(TheDef->getLoc(), "multiline instruction is not valid for the asmparser, " "mark it isCodeGenOnly"); - + // Remove comments from the asm string. We know that the asmstring only // has one line. if (!CommentDelimiter.empty() && @@ -714,7 +711,7 @@ throw TGError(TheDef->getLoc(), "asmstring for instruction has comment character in it, " "mark it isCodeGenOnly"); - + // Reject matchables with operand modifiers, these aren't something we can // handle, the target should be refactored to use operands instead of // modifiers. @@ -728,7 +725,7 @@ throw TGError(TheDef->getLoc(), "matchable with operand modifier '" + Tok.str() + "' not supported by asm matcher. Mark isCodeGenOnly!"); - + // Verify that any operand is only mentioned once. // We reject aliases and ignore instructions for now. if (Tok[0] == '$' && !OperandNames.insert(Tok).second) { @@ -746,11 +743,10 @@ return false; } } - + return true; } - /// getSingletonRegisterForAsmOperand - If the specified token is a singleton /// register, return the register name, otherwise return a null StringRef. Record *MatchableInfo:: @@ -758,16 +754,16 @@ StringRef Tok = AsmOperands[i].Token; if (!Tok.startswith(Info.RegisterPrefix)) return 0; - + StringRef RegName = Tok.substr(Info.RegisterPrefix.size()); if (const CodeGenRegister *Reg = Info.Target.getRegisterByName(RegName)) return Reg->TheDef; - + // If there is no register prefix (i.e. "%" in "%eax"), then this may // be some random non-register token, just ignore it. if (Info.RegisterPrefix.empty()) return 0; - + // Otherwise, we have something invalid prefixed with the register prefix, // such as %foo. std::string Err = "unable to find register for '" + RegName.str() + @@ -775,7 +771,6 @@ throw TGError(TheDef->getLoc(), Err); } - static std::string getEnumNameForToken(StringRef Str) { std::string Res; @@ -876,7 +871,7 @@ ContainingSet = *it; continue; } - + std::set Tmp; std::swap(Tmp, ContainingSet); std::insert_iterator< std::set > II(ContainingSet, @@ -1013,14 +1008,13 @@ } } -AsmMatcherInfo::AsmMatcherInfo(Record *asmParser, - CodeGenTarget &target, +AsmMatcherInfo::AsmMatcherInfo(Record *asmParser, + CodeGenTarget &target, RecordKeeper &records) : Records(records), AsmParser(asmParser), Target(target), RegisterPrefix(AsmParser->getValueAsString("RegisterPrefix")) { } - void AsmMatcherInfo::BuildInfo() { // Build information about all of the AssemblerPredicates. std::vector AllPredicates = @@ -1030,17 +1024,17 @@ // Ignore predicates that are not intended for the assembler. if (!Pred->getValueAsBit("AssemblerMatcherPredicate")) continue; - + if (Pred->getName().empty()) throw TGError(Pred->getLoc(), "Predicate has no name!"); - + unsigned FeatureNo = SubtargetFeatures.size(); SubtargetFeatures[Pred] = new SubtargetFeatureInfo(Pred, FeatureNo); assert(FeatureNo < 32 && "Too many subtarget features!"); } StringRef CommentDelimiter = AsmParser->getValueAsString("CommentDelimiter"); - + // Parse the instructions; we need to do this first so that we can gather the // singleton register classes. SmallPtrSet SingletonRegisters; @@ -1056,15 +1050,15 @@ // Ignore "codegen only" instructions. if (CGI.TheDef->getValueAsBit("isCodeGenOnly")) continue; - + // Validate the operand list to ensure we can handle this instruction. for (unsigned i = 0, e = CGI.Operands.size(); i != e; ++i) { const CGIOperandList::OperandInfo &OI = CGI.Operands[i]; - + // Validate tied operands. if (OI.getTiedRegister() != -1) { - // If we have a tied operand that consists of multiple MCOperands, reject - // it. We reject aliases and ignore instructions for now. + // If we have a tied operand that consists of multiple MCOperands, + // reject it. We reject aliases and ignore instructions for now. if (OI.MINumOperands != 1) { // FIXME: Should reject these. The ARM backend hits this with $lane // in a bunch of instructions. It is unclear what the right answer is. @@ -1077,26 +1071,26 @@ } } } - + OwningPtr II(new MatchableInfo(CGI)); II->Initialize(*this, SingletonRegisters); - + // Ignore instructions which shouldn't be matched and diagnose invalid // instruction definitions with an error. if (!II->Validate(CommentDelimiter, true)) continue; - + // Ignore "Int_*" and "*_Int" instructions, which are internal aliases. // // FIXME: This is a total hack. if (StringRef(II->TheDef->getName()).startswith("Int_") || StringRef(II->TheDef->getName()).endswith("_Int")) continue; - + Matchables.push_back(II.take()); } - + // Parse all of the InstAlias definitions and stick them in the list of // matchables. std::vector AllInstAliases = @@ -1112,12 +1106,12 @@ continue; OwningPtr II(new MatchableInfo(Alias)); - + II->Initialize(*this, SingletonRegisters); - + // Validate the alias definitions. II->Validate(CommentDelimiter, false); - + Matchables.push_back(II.take()); } @@ -1158,20 +1152,20 @@ Op.Class = getTokenClass(Token); continue; } - + // Otherwise this is an operand reference. StringRef OperandName; if (Token[1] == '{') OperandName = Token.substr(2, Token.size() - 3); else OperandName = Token.substr(1); - + if (II->DefRec.is()) BuildInstructionOperandReference(II, OperandName, i); else BuildAliasOperandReference(II, OperandName, Op); } - + if (II->DefRec.is()) II->BuildInstructionResultOperands(); else @@ -1191,7 +1185,7 @@ const CodeGenInstruction &CGI = *II->DefRec.get(); const CGIOperandList &Operands = CGI.Operands; MatchableInfo::AsmOperand *Op = &II->AsmOperands[AsmOpIdx]; - + // Map this token to an operand. unsigned Idx; if (!Operands.hasOperandNamed(OperandName, Idx)) @@ -1238,7 +1232,7 @@ OperandName = Operands[Idx.first].Name; Op->SubOpIdx = Idx.second; } - + Op->SrcOpName = OperandName; } @@ -1249,7 +1243,7 @@ StringRef OperandName, MatchableInfo::AsmOperand &Op) { const CodeGenInstAlias &CGA = *II->DefRec.get(); - + // Set up the operand class. for (unsigned i = 0, e = CGA.ResultOperands.size(); i != e; ++i) if (CGA.ResultOperands[i].isRecord() && @@ -1270,7 +1264,7 @@ void MatchableInfo::BuildInstructionResultOperands() { const CodeGenInstruction *ResultInst = getResultInst(); - + // Loop over all operands of the result instruction, determining how to // populate them. for (unsigned i = 0, e = ResultInst->Operands.size(); i != e; ++i) { @@ -1282,7 +1276,7 @@ ResOperands.push_back(ResOperand::getTiedOp(TiedOp)); continue; } - + // Find out what operand from the asmparser this MCInst operand comes from. int SrcOperand = FindAsmOperandNamed(OpInfo.Name); if (OpInfo.Name.empty() || SrcOperand == -1) @@ -1310,14 +1304,14 @@ void MatchableInfo::BuildAliasResultOperands() { const CodeGenInstAlias &CGA = *DefRec.get(); const CodeGenInstruction *ResultInst = getResultInst(); - + // Loop over all operands of the result instruction, determining how to // populate them. unsigned AliasOpNo = 0; unsigned LastOpNo = CGA.ResultInstOperandIndex.size(); for (unsigned i = 0, e = ResultInst->Operands.size(); i != e; ++i) { const CGIOperandList::OperandInfo *OpInfo = &ResultInst->Operands[i]; - + // If this is a tied operand, just copy from the previously handled operand. int TiedOp = OpInfo->getTiedRegister(); if (TiedOp != -1) { @@ -1398,7 +1392,7 @@ std::string Signature = "Convert"; std::string CaseBody; raw_string_ostream CaseOS(CaseBody); - + // Compute the convert enum and the case body. for (unsigned i = 0, e = II.ResOperands.size(); i != e; ++i) { const MatchableInfo::ResOperand &OpInfo = II.ResOperands[i]; @@ -1408,7 +1402,7 @@ case MatchableInfo::ResOperand::RenderAsmOperand: { // This comes from something we parsed. MatchableInfo::AsmOperand &Op = II.AsmOperands[OpInfo.AsmOperandNum]; - + // Registers are always converted the same, don't duplicate the // conversion function based on them. Signature += "__"; @@ -1418,13 +1412,13 @@ Signature += Op.Class->ClassName; Signature += utostr(OpInfo.MINumOperands); Signature += "_" + itostr(OpInfo.AsmOperandNum); - + CaseOS << " ((" << TargetOperandClass << "*)Operands[" << (OpInfo.AsmOperandNum+1) << "])->" << Op.Class->RenderMethod << "(Inst, " << OpInfo.MINumOperands << ");\n"; break; } - + case MatchableInfo::ResOperand::TiedOperand: { // If this operand is tied to a previous one, just copy the MCInst // operand from the earlier one.We can only tie single MCOperand values. @@ -1450,10 +1444,10 @@ CaseOS << " Inst.addOperand(MCOperand::CreateReg(" << N << "));\n"; Signature += "__reg" + OpInfo.Register->getName(); } - } + } } } - + II.ConversionFnKind = Signature; // Check if we have already generated this signature. @@ -1538,9 +1532,9 @@ OS << " }\n\n"; // Classify user defined operands. To do so, we need to perform a topological - // sort of the superclass relationship graph so that we always match the + // sort of the superclass relationship graph so that we always match the // narrowest type first. - + // Collect the incoming edge counts for each class. std::map IncomingEdges; for (std::vector::iterator it = Info.Classes.begin(), @@ -1549,12 +1543,12 @@ if (!CI.isUserClass()) continue; - + for (std::vector::iterator SI = CI.SuperClasses.begin(), SE = CI.SuperClasses.end(); SI != SE; ++SI) ++IncomingEdges[*SI]; } - + // Initialize a worklist of classes with no incoming edges. std::vector LeafClasses; for (std::vector::iterator it = Info.Classes.begin(), @@ -1562,17 +1556,17 @@ if (!IncomingEdges[*it]) LeafClasses.push_back(*it); } - + // Iteratively pop the list, process that class, and update the incoming // edge counts for its super classes. When a superclass reaches zero // incoming edges, push it onto the worklist for processing. while (!LeafClasses.empty()) { ClassInfo &CI = *LeafClasses.back(); LeafClasses.pop_back(); - + if (!CI.isUserClass()) continue; - + OS << " // '" << CI.ClassName << "' class"; if (!CI.SuperClasses.empty()) { OS << ", subclass of "; @@ -1580,7 +1574,7 @@ if (i) OS << ", "; OS << "'" << CI.SuperClasses[i]->ClassName << "'"; assert(CI < *CI.SuperClasses[i] && "Invalid class relation!"); - + --IncomingEdges[CI.SuperClasses[i]]; if (!IncomingEdges[CI.SuperClasses[i]]) LeafClasses.push_back(CI.SuperClasses[i]); @@ -1596,11 +1590,11 @@ OS << " assert(Operand." << CI.SuperClasses[i]->PredicateMethod << "() && \"Invalid class relationship!\");\n"; } - + OS << " return " << CI.Name << ";\n"; OS << " }\n\n"; } - + OS << " return InvalidMatchClass;\n"; OS << "}\n\n"; } @@ -1652,8 +1646,6 @@ OS << "}\n\n"; } - - /// EmitMatchTokenString - Emit the function to match a token string to the /// appropriate match class value. static void EmitMatchTokenString(CodeGenTarget &Target, @@ -1749,18 +1741,18 @@ unsigned NumFeatures = 0; for (unsigned i = 0, e = ReqFeatures.size(); i != e; ++i) { SubtargetFeatureInfo *F = Info.getSubtargetFeature(ReqFeatures[i]); - + if (F == 0) throw TGError(R->getLoc(), "Predicate '" + ReqFeatures[i]->getName() + "' is not marked as an AssemblerPredicate!"); - + if (NumFeatures) Result += '|'; - + Result += F->getEnumName(); ++NumFeatures; } - + if (NumFeatures > 1) Result = '(' + Result + ')'; return Result; @@ -1779,11 +1771,11 @@ OS << "static void ApplyMnemonicAliases(StringRef &Mnemonic, " "unsigned Features) {\n"; - + // Keep track of all the aliases from a mnemonic. Use an std::map so that the // iteration order of the map is stable. std::map > AliasesFromMnemonic; - + for (unsigned i = 0, e = Aliases.size(); i != e; ++i) { Record *R = Aliases[i]; AliasesFromMnemonic[R->getValueAsString("FromMnemonic")].push_back(R); @@ -1802,11 +1794,11 @@ // emit it last. std::string MatchCode; int AliasWithNoPredicate = -1; - + for (unsigned i = 0, e = ToVec.size(); i != e; ++i) { Record *R = ToVec[i]; std::string FeatureMask = GetAliasRequiredFeatures(R, Info); - + // If this unconditionally matches, remember it for later and diagnose // duplicates. if (FeatureMask.empty()) { @@ -1816,33 +1808,32 @@ "two MnemonicAliases with the same 'from' mnemonic!"); throw TGError(R->getLoc(), "this is the other MnemonicAlias."); } - + AliasWithNoPredicate = i; continue; } - + if (!MatchCode.empty()) MatchCode += "else "; MatchCode += "if ((Features & " + FeatureMask + ") == "+FeatureMask+")\n"; MatchCode += " Mnemonic = \"" +R->getValueAsString("ToMnemonic")+"\";\n"; } - + if (AliasWithNoPredicate != -1) { Record *R = ToVec[AliasWithNoPredicate]; if (!MatchCode.empty()) MatchCode += "else\n "; MatchCode += "Mnemonic = \"" + R->getValueAsString("ToMnemonic")+"\";\n"; } - + MatchCode += "return;"; Cases.push_back(std::make_pair(I->first, MatchCode)); } - - + StringMatcher("Mnemonic", Cases, OS).Emit(); OS << "}\n\n"; - + return true; } @@ -1928,7 +1919,7 @@ // Generate the function that remaps for mnemonic aliases. bool HasMnemonicAliases = EmitMnemonicAliases(OS, Info); - + // Generate the unified function to convert operands into an MCInst. EmitConvertToMCInst(Target, Info.Matchables, OS); @@ -1954,7 +1945,6 @@ it != ie; ++it) MaxNumOperands = std::max(MaxNumOperands, (*it)->AsmOperands.size()); - // Emit the static match table; unused classes get initalized to 0 which is // guaranteed to be InvalidMatchClass. // @@ -2042,7 +2032,7 @@ OS << " // Process all MnemonicAliases to remap the mnemonic.\n"; OS << " ApplyMnemonicAliases(Mnemonic, AvailableFeatures);\n\n"; } - + // Emit code to compute the class list for this operand vector. OS << " // Eliminate obvious mismatches.\n"; OS << " if (Operands.size() > " << (MaxNumOperands+1) << ") {\n"; From bob.wilson at apple.com Wed Jan 26 15:26:21 2011 From: bob.wilson at apple.com (Bob Wilson) Date: Wed, 26 Jan 2011 21:26:21 -0000 Subject: [llvm-commits] [llvm] r124324 - /llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp Message-ID: <20110126212621.E58462A6C12D@llvm.org> Author: bwilson Date: Wed Jan 26 15:26:21 2011 New Revision: 124324 URL: http://llvm.org/viewvc/llvm-project?rev=124324&view=rev Log: Fix spelling of CouldMatchAmbiguouslyWith method name. Modified: llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp Modified: llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp?rev=124324&r1=124323&r2=124324&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp Wed Jan 26 15:26:21 2011 @@ -426,7 +426,7 @@ return AsmOperands.size() < RHS.AsmOperands.size(); // Compare lexicographically by operand. The matcher validates that other - // orderings wouldn't be ambiguous using \see CouldMatchAmiguouslyWith(). + // orderings wouldn't be ambiguous using \see CouldMatchAmbiguouslyWith(). for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) { if (*AsmOperands[i].Class < *RHS.AsmOperands[i].Class) return true; @@ -437,10 +437,10 @@ return false; } - /// CouldMatchAmiguouslyWith - Check whether this matchable could + /// CouldMatchAmbiguouslyWith - Check whether this matchable could /// ambiguously match the same set of operands as \arg RHS (without being a /// strictly superior match). - bool CouldMatchAmiguouslyWith(const MatchableInfo &RHS) { + bool CouldMatchAmbiguouslyWith(const MatchableInfo &RHS) { // The primary comparator is the instruction mnemonic. if (Mnemonic != RHS.Mnemonic) return false; @@ -1867,7 +1867,7 @@ MatchableInfo &A = *Info.Matchables[i]; MatchableInfo &B = *Info.Matchables[j]; - if (A.CouldMatchAmiguouslyWith(B)) { + if (A.CouldMatchAmbiguouslyWith(B)) { errs() << "warning: ambiguous matchables:\n"; A.dump(); errs() << "\nis incomparable with:\n"; From dpatel at apple.com Wed Jan 26 15:41:22 2011 From: dpatel at apple.com (Devang Patel) Date: Wed, 26 Jan 2011 21:41:22 -0000 Subject: [llvm-commits] [llvm] r124327 - /llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp Message-ID: <20110126214122.DCB782A6C12C@llvm.org> Author: dpatel Date: Wed Jan 26 15:41:22 2011 New Revision: 124327 URL: http://llvm.org/viewvc/llvm-project?rev=124327&view=rev Log: Revert 124301. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp?rev=124327&r1=124326&r2=124327&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp Wed Jan 26 15:41:22 2011 @@ -539,12 +539,8 @@ SmallVector, 32> &Orders, SmallSet &Seen) { unsigned Order = DAG->GetOrdering(N); - if (!Order || !Seen.insert(Order)) { - // Process any valid SDDbgValues even if node does not have any order - // assigned. - ProcessSDDbgValues(N, DAG, Emitter, Orders, VRBaseMap, 0); + if (!Order || !Seen.insert(Order)) return; - } MachineBasicBlock *BB = Emitter.getBlock(); if (Emitter.getInsertPos() == BB->begin() || BB->back().isPHI()) { From bob.wilson at apple.com Wed Jan 26 15:43:46 2011 From: bob.wilson at apple.com (Bob Wilson) Date: Wed, 26 Jan 2011 21:43:46 -0000 Subject: [llvm-commits] [llvm] r124328 - /llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp Message-ID: <20110126214346.4F70D2A6C12C@llvm.org> Author: bwilson Date: Wed Jan 26 15:43:46 2011 New Revision: 124328 URL: http://llvm.org/viewvc/llvm-project?rev=124328&view=rev Log: Add a MnemonicIsValid method to the asm matcher. Patch by Bill Wendling. Modified: llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp Modified: llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp?rev=124328&r1=124327&r2=124328&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp Wed Jan 26 15:43:46 2011 @@ -1897,6 +1897,7 @@ OS << " Match_Success, Match_MnemonicFail, Match_InvalidOperand,\n"; OS << " Match_MissingFeature\n"; OS << " };\n"; + OS << " bool MnemonicIsValid(StringRef Mnemonic);\n"; OS << " MatchResultTy MatchInstructionImpl(\n"; OS << " const SmallVectorImpl &Operands,\n"; OS << " MCInst &Inst, unsigned &ErrorInfo);\n\n"; @@ -2013,6 +2014,16 @@ OS << "};\n\n"; + // A method to determine if a mnemonic is in the list. + OS << "bool " << Target.getName() << ClassName << "::\n" + << "MnemonicIsValid(StringRef Mnemonic) {\n"; + OS << " // Search the table.\n"; + OS << " std::pair MnemonicRange =\n"; + OS << " std::equal_range(MatchTable, MatchTable+" + << Info.Matchables.size() << ", Mnemonic, LessOpcode());\n"; + OS << " return MnemonicRange.first != MnemonicRange.second;\n"; + OS << "}\n\n"; + // Finally, build the match function. OS << Target.getName() << ClassName << "::MatchResultTy " << Target.getName() << ClassName << "::\n" From gkistanova at gmail.com Wed Jan 26 15:44:54 2011 From: gkistanova at gmail.com (Galina Kistanova) Date: Wed, 26 Jan 2011 21:44:54 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r124329 - /llvm-gcc-4.2/trunk/extras/build-darwin-x-mingw32-x-armeabi Message-ID: <20110126214454.901422A6C12C@llvm.org> Author: gkistanova Date: Wed Jan 26 15:44:54 2011 New Revision: 124329 URL: http://llvm.org/viewvc/llvm-project?rev=124329&view=rev Log: Added build script for 3-stage automated build on x86_64-apple-darwin10 of LLVM mingw32 cross-toolchain for arm-eabi hardfloat. Added: llvm-gcc-4.2/trunk/extras/build-darwin-x-mingw32-x-armeabi (with props) Added: llvm-gcc-4.2/trunk/extras/build-darwin-x-mingw32-x-armeabi URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/extras/build-darwin-x-mingw32-x-armeabi?rev=124329&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/extras/build-darwin-x-mingw32-x-armeabi (added) +++ llvm-gcc-4.2/trunk/extras/build-darwin-x-mingw32-x-armeabi Wed Jan 26 15:44:54 2011 @@ -0,0 +1,510 @@ +#!/bin/bash + +set -e # Terminate script at the first line that fails. +set -o pipefail # Return the first non-zero pipe command error. +set -x # Print commands as they are executed + +# This script performs a 3 stages automated build on x86_64-apple-darwin10 +# of LLVM mingw32 cross-toolchain for arm-eabi hardfloat. +# To do so it builds dependencies for this canadian cross as the first 2 stages +# +# Stage 1: Builds x86_64-apple-darwin10 cross for i686-pc-mingw32 as +# --build=x86_64-apple-darwin10 +# --host=x86_64-apple-darwin10 +# --target=i686-pc-mingw32 +# +# Stage 2: Builds x86_64-apple-darwin10 cross for arm-eabi hardfloat as +# --build=x86_64-apple-darwin10 +# --host=x86_64-apple-darwin10 +# --target=arm-eabi +# +# Stage 3: Using the cross tool-chains from stages 1 and 2 builds +# i686-pc-mingw32 cross for i686-pc-mingw32 as +# --build=x86_64-apple-darwin10 +# --host=i686-pc-mingw32 +# --target=arm-eabi + +# This script assumes the valid native compiler for x86_64-apple-darwin10 +# is in place and available as well as cross tools, libraries and +# headers for mingw and arm-eabi. + +# The usage: +# Run this build from the build from the build root directory as +# build-darwin-x-mingw32-x-armeabi [] [] + +# Expected project tree structure: +# +# +-- ${LLVM_src} +# +-- ${LLVM_GCC_src} +# +-- ${LLVM_obj_1} # llvm build directory (stage 1). +# +-- ${LLVM_GCC_obj_1} # llvm-gcc build directory (stage 1). +# +-- ${LLVM_obj_2} # llvm build directory (stage 2). +# +-- ${LLVM_GCC_obj_2} # llvm-gcc build directory (stage 2). +# +-- ${LLVM_obj_3} # llvm build directory (stage 3). +# +-- ${LLVM_GCC_obj_3} # llvm-gcc build directory (stage 3). +# +-- ${INSTALL} # Install directory. + +LLVM_src=llvm.src # The LLVM source code root directory name. +LLVM_GCC_src=llvm-gcc.src # The LLVM-GCC source code root directory name. + +LLVM_obj_1=llvm_1.obj # The LLVM build root directory for stage1. +LLVM_GCC_obj_1=llvm-gcc_1.obj # The LLVM-GCC build root directory for stage1. + +LLVM_obj_2=llvm_2.obj # The LLVM build root directory for stage2. +LLVM_GCC_obj_2=llvm-gcc_2.obj # The LLVM-GCC build root directory for stage2. + +LLVM_obj_3=llvm_3.obj # The LLVM build root directory for stage2. +LLVM_GCC_obj_3=llvm-gcc_3.obj # The LLVM-GCC build root directory for stage2. + +INSTALL=install # Where the result will be installed. + +# CFLAGS and CXXFLAGS must not be set during the building of cross-tools. +unset CFLAGS +unset CXXFLAGS + +BUILD_ROOT=$PWD # Where build happens. +PRIVATE_INSTALL=${BUILD_ROOT}/${INSTALL} # Where the result will be installed. + +export PATH=/opt/local/bin:/opt/local/sbin:/bin:/sbin:/usr/bin:/usr/sbin +export PATH=$PATH:/mingw_build_tools/install/bin +export PATH=$PATH:/arm-eabi_build_tools/install/bin +export PATH=$PATH:${PRIVATE_INSTALL}/bin + +#------------------------------------------------------------------------------ +# Define build steps, parse and validate input parameters +#------------------------------------------------------------------------------ + +# This script supports the following steps: +do_clean=no # Clean up the build directory. +do_copy_cross_tools=no # Copy cross-tools and newlib. + +do_configure_llvm_1=no # Configure LLVM stage 1. +do_make_llvm_1=no # Make LLVM stage 1. +do_install_llvm_1=no # Install LLVM stage 1. +do_test_llvm_1=no # Test LLVM stage 1. +do_configure_llvmgcc_1=no # Configure LLVM-GCC stage 1. +do_make_llvmgcc_1=no # Make LLVM-GCC stage 1. +do_install_llvmgcc_1=no # Install LLVM-GCC stage 1. + +do_configure_llvm_2=no # Configure LLVM stage 2. +do_make_llvm_2=no # Make LLVM stage 2. +do_install_llvm_2=no # Install LLVM stage 2. +do_test_llvm_2=no # Test LLVM stage 2. +do_configure_llvmgcc_2=no # Configure LLVM-GCC stage 2. +do_make_llvmgcc_2=no # Make LLVM-GCC stage 2. +do_install_llvmgcc_2=no # Install LLVM-GCC stage 2. + +do_configure_llvm_3=no # Configure LLVM stage 3. +do_make_llvm_3=no # Make LLVM stage 3. +do_install_llvm_3=no # Install LLVM stage 3. +do_configure_llvmgcc_3=no # Configure LLVM-GCC stage 3. +do_make_llvmgcc_3=no # Make LLVM-GCC stage 3. +do_install_llvmgcc_3=no # Install LLVM-GCC stage 3. + +do_all=no # Runs all steps at once when requested. + +# Set step parameter +if (( $# == 0 )) ; then + do_all=yes +fi +# else +if (( ! $# == 0 )) ; then + # First check that the parameter actually defines a step. + case $1 in + clean | \ + copy_cross_tools | \ + configure_llvm_1 | \ + make_llvm_1 | \ + install_llvm_1 | \ + test_llvm_1 | \ + configure_llvmgcc_1 | \ + make_llvmgcc_1 | \ + install_llvmgcc_1 | \ + configure_llvm_2 | \ + make_llvm_2 | \ + install_llvm_2 | \ + test_llvm_2 | \ + configure_llvmgcc_2 | \ + make_llvmgcc_2 | \ + install_llvmgcc_2 | \ + configure_llvm_3 | \ + make_llvm_3 | \ + install_llvm_3 | \ + configure_llvmgcc_3 | \ + make_llvmgcc_3 | \ + install_llvmgcc_3 | \ + all) + eval do_$1=yes # Set the flag for the requested step . + shift # Remove it since is is ours and already precessed. + ;; + + *) + # Not our parameter. Pass it as is. + esac +fi + +# Set all steps if do_all requested +if [ "$do_all" == "yes" ] ; then + # Set all steps to yes + do_clean=yes + do_copy_cross_tools=yes + do_configure_llvm_1=yes + do_make_llvm_1=yes + do_install_llvm_1=yes + do_test_llvm_1=yes + do_configure_llvmgcc_1=yes + do_make_llvmgcc_1=yes + do_install_llvmgcc_1=yes + do_configure_llvm_2=yes + do_make_llvm_2=yes + do_install_llvm_2=yes + do_test_llvm_2=yes + do_configure_llvmgcc_2=yes + do_make_llvmgcc_2=yes + do_install_llvmgcc_2=yes + do_configure_llvm_3=yes + do_make_llvm_3=yes + do_install_llvm_3=yes + do_configure_llvmgcc_3=yes + do_make_llvmgcc_3=yes + do_install_llvmgcc_3=yes +fi + +#------------------------------------------------------------------------------ +# Step: Clean up. +#------------------------------------------------------------------------------ +if [ "$do_clean" == "yes" ] ; then + + # Remove everything from where we will be installing the result. + rm -rf ${PRIVATE_INSTALL} + mkdir -p ${PRIVATE_INSTALL} + chmod a+rx ${PRIVATE_INSTALL} + +fi + +#------------------------------------------------------------------------------ +# Step: Copy newlib. +#------------------------------------------------------------------------------ +if [ "$do_copy_cross_tools" == "yes" ] ; then + + cp -RL /mingw_build_tools/install/ ${PRIVATE_INSTALL} + cp -RL /arm-eabi_build_tools/install/ ${PRIVATE_INSTALL} + + cp -RL /arm-eabi_build_tools/newlib-src/newlib ${BUILD_ROOT}/${LLVM_GCC_src} + cp -RL /arm-eabi_build_tools/newlib-src/libgloss \ + ${BUILD_ROOT}/${LLVM_GCC_src} + +fi + +#============================================================================== +# STAGE 1 builds cross llvm-gcc for mingw32. +#============================================================================== + +#------------------------------------------------------------------------------ +# Step: Stage1. Configure LLVM. +#------------------------------------------------------------------------------ +if [ "$do_configure_llvm_1" == "yes" ] ; then + + # Remove previously build files if any. + rm -rf ${BUILD_ROOT}/${LLVM_obj_1} + mkdir -p ${BUILD_ROOT}/${LLVM_obj_1} + chmod a+rx ${BUILD_ROOT}/${LLVM_obj_1} + cd ${BUILD_ROOT}/${LLVM_obj_1} + + ../${LLVM_src}/configure --prefix=${PRIVATE_INSTALL} \ + --build=x86_64-apple-darwin10 --host=x86_64-apple-darwin10 \ + --target=i686-pc-mingw32 \ + --enable-optimize \ + --without-llvmgcc --without-llvmgxx \ + $@ # Extra args if any + +fi + +#------------------------------------------------------------------------------ +# Step: Stage1. Make LLVM. +#------------------------------------------------------------------------------ +if [ "$do_make_llvm_1" == "yes" ] ; then + + cd ${BUILD_ROOT}/${LLVM_obj_1} + # NOTE: Do not build with ENABLE_OPTIMIZED=1 - some test fail after it. + nice -n 20 make VERBOSE=1 \ + $@ # Extra args if any, like -j16 for example. + +fi + +#------------------------------------------------------------------------------ +# Step: Stage1. Install LLVM. +#------------------------------------------------------------------------------ +if [ "$do_install_llvm_1" == "yes" ] ; then + + cd ${BUILD_ROOT}/${LLVM_obj_1} + nice -n 20 make install VERBOSE=1 \ + $@ # Extra args if any, like -j16 for example. + +fi + +#------------------------------------------------------------------------------ +# Step: Stage1. Test LLVM. +#------------------------------------------------------------------------------ +if [ "$do_test_llvm_1" == "yes" ] ; then + + cd ${BUILD_ROOT}/${LLVM_obj_1} + make check-lit VERBOSE=1 \ + $@ # Extra args if any, like -j16 for example. + +fi + +#------------------------------------------------------------------------------ +# Step: Stage1. Configure LLVM-GCC. +#------------------------------------------------------------------------------ +if [ "$do_configure_llvmgcc_1" == "yes" ] ; then + + # Remove previously build files if any. + rm -rf ${BUILD_ROOT}/${LLVM_GCC_obj_1} + mkdir -p ${BUILD_ROOT}/${LLVM_GCC_obj_1} + chmod a+rx ${BUILD_ROOT}/${LLVM_GCC_obj_1} + cd ${BUILD_ROOT}/${LLVM_GCC_obj_1} + + ../${LLVM_GCC_src}/configure --prefix=${PRIVATE_INSTALL} \ + --build=x86_64-apple-darwin10 --host=x86_64-apple-darwin10 \ + --target=i686-pc-mingw32 \ + --with-local-prefix=/tools \ + --program-prefix=i686-pc-mingw32- \ + --enable-llvm=${BUILD_ROOT}/${LLVM_obj_1} \ + --enable-languages=c,c++ \ + --disable-multilib --disable-nls --disable-shared \ + --disable-sjlj-exceptions --disable-__cxa_atexit \ + $@ # Extra args if any + +fi + +#------------------------------------------------------------------------------ +# Step: Stage1. Make LLVM-GCC. +#------------------------------------------------------------------------------ +if [ "$do_make_llvmgcc_1" == "yes" ] ; then + + cd ${BUILD_ROOT}/${LLVM_GCC_obj_1} + nice -n 20 make all \ + $@ # Extra args if any + +fi + +#------------------------------------------------------------------------------ +# Step: Stage1. Install LLVM-GCC. +#------------------------------------------------------------------------------ +if [ "$do_install_llvmgcc_1" == "yes" ] ; then + + cd ${BUILD_ROOT}/${LLVM_GCC_obj_1} + nice -n 20 make install \ + $@ # Extra args if any + +fi + +#============================================================================== +# STAGE 2 builds cross llvm-gcc for arm-eabi. +#============================================================================== + +#------------------------------------------------------------------------------ +# Step: Stage2. Configure LLVM. +#------------------------------------------------------------------------------ +if [ "$do_configure_llvm_2" == "yes" ] ; then + + # Remove previously build files if any. + rm -rf ${BUILD_ROOT}/${LLVM_obj_2} + mkdir -p ${BUILD_ROOT}/${LLVM_obj_2} + chmod a+rx ${BUILD_ROOT}/${LLVM_obj_2} + cd ${BUILD_ROOT}/${LLVM_obj_2} + + ../${LLVM_src}/configure --prefix=${PRIVATE_INSTALL} \ + --build=x86_64-apple-darwin10 \ + --host=x86_64-apple-darwin10 \ + --target=arm-eabi \ + --enable-optimized \ + --enable-targets=cbe,arm \ + $@ # Extra args if any + +fi + +#------------------------------------------------------------------------------ +# Step: Stage2. Make LLVM. +#------------------------------------------------------------------------------ +if [ "$do_make_llvm_2" == "yes" ] ; then + + cd ${BUILD_ROOT}/${LLVM_obj_2} + # NOTE: Do not build with ENABLE_OPTIMIZED=1 - some test fail after it. + nice -n 20 make VERBOSE=1 \ + $@ # Extra args if any, like -j16 for example. + +fi + +#------------------------------------------------------------------------------ +# Step: Stage2. Install LLVM. +#------------------------------------------------------------------------------ +if [ "$do_install_llvm_2" == "yes" ] ; then + + cd ${BUILD_ROOT}/${LLVM_obj_2} + nice -n 20 make install VERBOSE=1 \ + $@ # Extra args if any, like -j16 for example. + +fi + +#------------------------------------------------------------------------------ +# Step: Stage2. Test LLVM. +#------------------------------------------------------------------------------ +if [ "$do_test_llvm_2" == "yes" ] ; then + + cd ${BUILD_ROOT}/${LLVM_obj_2} + make check-lit VERBOSE=1 \ + $@ # Extra args if any, like -j16 for example. + +fi + +#------------------------------------------------------------------------------ +# Step: Stage2. Configure LLVM-GCC. +#------------------------------------------------------------------------------ +if [ "$do_configure_llvmgcc_2" == "yes" ] ; then + + # Remove previously build files if any. + rm -rf ${BUILD_ROOT}/${LLVM_GCC_obj_2} + mkdir -p ${BUILD_ROOT}/${LLVM_GCC_obj_2} + chmod a+rx ${BUILD_ROOT}/${LLVM_GCC_obj_2} + cd ${BUILD_ROOT}/${LLVM_GCC_obj_2} + + ../${LLVM_GCC_src}/configure --prefix=${PRIVATE_INSTALL} \ + --build=x86_64-apple-darwin10 \ + --host=x86_64-apple-darwin10 \ + --target=arm-eabi \ + --enable-languages=c,c++ \ + --disable-nls \ + --program-prefix=arm-eabi- \ + --with-newlib \ + --with-headers=yes \ + --enable-llvm=${BUILD_ROOT}/${LLVM_obj_2} \ + --with-cpu=cortex-a8 \ + --with-fpu=neon \ + --with-float=hard \ + --with-abi=aapcs \ + $@ # Extra args if any + +fi + +#------------------------------------------------------------------------------ +# Step: Stage2. Make LLVM-GCC. +#------------------------------------------------------------------------------ +if [ "$do_make_llvmgcc_2" == "yes" ] ; then + + cd ${BUILD_ROOT}/${LLVM_GCC_obj_2} + nice -n 20 make all \ + $@ # Extra args if any + +fi + +#------------------------------------------------------------------------------ +# Step: Stage2. Install LLVM-GCC. +#------------------------------------------------------------------------------ +if [ "$do_install_llvmgcc_2" == "yes" ] ; then + + cd ${BUILD_ROOT}/${LLVM_GCC_obj_2} + nice -n 20 make install \ + $@ # Extra args if any + +fi + +#============================================================================== +# STAGE 3 builds mingw-hosted llvm-gcc for arm-eabi. +#============================================================================== + +#------------------------------------------------------------------------------ +# Step: Stage3. Configure LLVM. +#------------------------------------------------------------------------------ +if [ "$do_configure_llvm_3" == "yes" ] ; then + + # Remove previously build files if any. + rm -rf ${BUILD_ROOT}/${LLVM_obj_3} + mkdir -p ${BUILD_ROOT}/${LLVM_obj_3} + chmod a+rx ${BUILD_ROOT}/${LLVM_obj_3} + cd ${BUILD_ROOT}/${LLVM_obj_3} + + ../${LLVM_src}/configure --prefix=${PRIVATE_INSTALL} \ + --build=x86_64-apple-darwin10 \ + --host=i686-pc-mingw32 --target=arm-eabi \ + --enable-optimized \ + --enable-targets=cbe,arm \ + $@ # Extra args if any + +fi + +#------------------------------------------------------------------------------ +# Step: Stage3. Make LLVM. +#------------------------------------------------------------------------------ +if [ "$do_make_llvm_3" == "yes" ] ; then + + cd ${BUILD_ROOT}/${LLVM_obj_3} + # NOTE: Do not build with ENABLE_OPTIMIZED=1 - some test fail after it. + nice -n 20 make VERBOSE=1 \ + $@ # Extra args if any, like -j16 for example. + +fi + +#------------------------------------------------------------------------------ +# Step: Stage3. Install LLVM. +#------------------------------------------------------------------------------ +if [ "$do_install_llvm_3" == "yes" ] ; then + + cd ${BUILD_ROOT}/${LLVM_obj_3} + nice -n 20 make install VERBOSE=3 \ + $@ # Extra args if any, like -j16 for example. + +fi + +#------------------------------------------------------------------------------ +# Step: Stage3. Configure LLVM-GCC. +#------------------------------------------------------------------------------ +if [ "$do_configure_llvmgcc_3" == "yes" ] ; then + + # Remove previously build files if any. + rm -rf ${BUILD_ROOT}/${LLVM_GCC_obj_3} + mkdir -p ${BUILD_ROOT}/${LLVM_GCC_obj_3} + chmod a+rx ${BUILD_ROOT}/${LLVM_GCC_obj_3} + cd ${BUILD_ROOT}/${LLVM_GCC_obj_3} + + ../${LLVM_GCC_src}/configure --prefix=${PRIVATE_INSTALL} \ + --build=x86_64-apple-darwin10 \ + --host=i686-pc-mingw32 --target=arm-eabi \ + --enable-languages=c,c++ \ + --disable-nls \ + --program-prefix=arm-eabi- \ + --with-newlib \ + --with-headers=yes \ + --enable-llvm=${BUILD_ROOT}/${LLVM_obj_3} \ + --with-cpu=cortex-a8 \ + --with-fpu=neon \ + --with-float=hard \ + --with-abi=aapcs \ + $@ # Extra args if any + +fi + +#------------------------------------------------------------------------------ +# Step: Stage3. Make LLVM-GCC. +#------------------------------------------------------------------------------ +if [ "$do_make_llvmgcc_3" == "yes" ] ; then + + cd ${BUILD_ROOT}/${LLVM_GCC_obj_3} + nice -n 20 make all \ + $@ # Extra args if any + +fi + +#------------------------------------------------------------------------------ +# Step: Stage3. Install LLVM-GCC. +#------------------------------------------------------------------------------ +if [ "$do_install_llvmgcc_3" == "yes" ] ; then + + cd ${BUILD_ROOT}/${LLVM_GCC_obj_3} + nice -n 20 make install \ + $@ # Extra args if any + +fi + + Propchange: llvm-gcc-4.2/trunk/extras/build-darwin-x-mingw32-x-armeabi ------------------------------------------------------------------------------ svn:executable = * From jay.foad at gmail.com Wed Jan 26 15:56:11 2011 From: jay.foad at gmail.com (Jay Foad) Date: Wed, 26 Jan 2011 21:56:11 -0000 Subject: [llvm-commits] [llvm] r124330 - in /llvm/trunk: include/llvm/User.h lib/VMCore/User.cpp Message-ID: <20110126215611.241752A6C12C@llvm.org> Author: foad Date: Wed Jan 26 15:56:10 2011 New Revision: 124330 URL: http://llvm.org/viewvc/llvm-project?rev=124330&view=rev Log: Simplify User::operator delete(). Modified: llvm/trunk/include/llvm/User.h llvm/trunk/lib/VMCore/User.cpp Modified: llvm/trunk/include/llvm/User.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/User.h?rev=124330&r1=124329&r2=124330&view=diff ============================================================================== --- llvm/trunk/include/llvm/User.h (original) +++ llvm/trunk/include/llvm/User.h Wed Jan 26 15:56:10 2011 @@ -53,6 +53,7 @@ void dropHungoffUses() { Use::zap(OperandList, OperandList + NumOperands, true); OperandList = 0; + // Reset NumOperands so User::operator delete() does the right thing. NumOperands = 0; } public: Modified: llvm/trunk/lib/VMCore/User.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/User.cpp?rev=124330&r1=124329&r2=124330&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/User.cpp (original) +++ llvm/trunk/lib/VMCore/User.cpp Wed Jan 26 15:56:10 2011 @@ -73,16 +73,9 @@ void User::operator delete(void *Usr) { User *Start = static_cast(Usr); Use *Storage = static_cast(Usr) - Start->NumOperands; - // - // look for a variadic User - if (Storage == Start->OperandList) { - ::operator delete(Storage); - return; - } - // - // in all other cases just delete the nullary User (covers hung-off - // uses also - ::operator delete(Usr); + // If there were hung-off uses, they will have been freed already and + // NumOperands reset to 0, so here we just free the User itself. + ::operator delete(Storage); } } // End llvm namespace From carl.norum at apple.com Wed Jan 26 16:17:43 2011 From: carl.norum at apple.com (Carl Norum) Date: Wed, 26 Jan 2011 14:17:43 -0800 Subject: [llvm-commits] Patches to build EFI with clang/llvm In-Reply-To: References: <9D168FAF-67BF-414A-A0B4-D06D146A620B@apple.com> Message-ID: <7A34E85B-57A9-4AFC-B81D-1F2A70662DC9@apple.com> On Jan 26, 2011, at 7:26 AM, NAKAMURA Takumi wrote: > Carl and Jakob, > > I have committed win64 tailcall stuff today. Great - I synced up, applied my MachO patches, and built EFI. The resulting ROM is working here to boot my test machine. > I think isTargetCOFF() would be annoying. > We have never met we would use Win32/Win64 ABI not for PECOFF targets. > > Carl's win32-macho patch is okay in gross for me for now. :) I'll try to look at those suspicious conditionals that Jakob pointed out yesterday and see if I can clean them up. As I mentioned before, I'm not that familiar with the code or the changes, but I'll see what I can do. > In future, we might restructure triplets for win32-related system. > IMHO, eg. -win32 should not present Microsoft-specific toolchain, but > generic Win32 ABI and API. > Microsoft environments might be presented as "-msvcrt[0-9]*", though > mingw uses msvcrt.dll. > I will post a topic for win32 stuff if someone had interest. That is a fantastic idea. -- Carl From isanbard at gmail.com Wed Jan 26 16:21:35 2011 From: isanbard at gmail.com (Bill Wendling) Date: Wed, 26 Jan 2011 22:21:35 -0000 Subject: [llvm-commits] [llvm] r124331 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Message-ID: <20110126222135.99B152A6C12C@llvm.org> Author: void Date: Wed Jan 26 16:21:35 2011 New Revision: 124331 URL: http://llvm.org/viewvc/llvm-project?rev=124331&view=rev Log: Initialize variable to get rid of clang warning. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=124331&r1=124330&r2=124331&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Wed Jan 26 16:21:35 2011 @@ -814,7 +814,7 @@ bool isCustom = false; // Figure out the correct action; the way to query this varies by opcode - TargetLowering::LegalizeAction Action; + TargetLowering::LegalizeAction Action = TargetLowering::Legal; bool SimpleFinishLegalizing = true; switch (Node->getOpcode()) { case ISD::INTRINSIC_W_CHAIN: From carl.norum at apple.com Wed Jan 26 16:28:21 2011 From: carl.norum at apple.com (Carl Norum) Date: Wed, 26 Jan 2011 14:28:21 -0800 Subject: [llvm-commits] Patches to build EFI with clang/llvm In-Reply-To: <7A34E85B-57A9-4AFC-B81D-1F2A70662DC9@apple.com> References: <9D168FAF-67BF-414A-A0B4-D06D146A620B@apple.com> <7A34E85B-57A9-4AFC-B81D-1F2A70662DC9@apple.com> Message-ID: On Jan 26, 2011, at 2:17 PM, Carl Norum wrote: > I'll try to look at those suspicious conditionals that Jakob pointed out yesterday and see if I can clean them up. As I mentioned before, I'm not that familiar with the code or the changes, but I'll see what I can do. And here are some new patches. I extended isTargetMacho() to return true for all Darwin targets, and that helped me clean up a bunch of the funny ones. I think I have to leave the ones of the form: if (Subtarget->isTargetCOFF() && !Subtarget->isTargetMacho()) Until isTargetCOFF() is implemented differently to not return true for all triples containing 'win32'. Let me know what you think of these patches! -- Carl -------------- next part -------------- A non-text attachment was scrubbed... Name: macho-2.patch Type: application/octet-stream Size: 7164 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110126/cd79b74a/attachment.obj From undingen at gmail.com Wed Jan 26 16:56:57 2011 From: undingen at gmail.com (Marius Wachtler) Date: Wed, 26 Jan 2011 23:56:57 +0100 Subject: [llvm-commits] Infinite recursion in StringRefTest In-Reply-To: References: Message-ID: ping From wendling at apple.com Wed Jan 26 17:00:14 2011 From: wendling at apple.com (Bill Wendling) Date: Wed, 26 Jan 2011 15:00:14 -0800 Subject: [llvm-commits] [llvm] r124328 - /llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp In-Reply-To: <20110126214346.4F70D2A6C12C@llvm.org> References: <20110126214346.4F70D2A6C12C@llvm.org> Message-ID: <5AC0E817-7450-4632-B261-517DE49C6918@apple.com> On Jan 26, 2011, at 1:43 PM, Bob Wilson wrote: > Author: bwilson > Date: Wed Jan 26 15:43:46 2011 > New Revision: 124328 > > URL: http://llvm.org/viewvc/llvm-project?rev=124328&view=rev > Log: > Add a MnemonicIsValid method to the asm matcher. > Patch by Bill Wendling. > Thanks, Bob! :-) -bw -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110126/9a3c2466/attachment.html From aggarwa4 at illinois.edu Wed Jan 26 17:35:21 2011 From: aggarwa4 at illinois.edu (Arushi Aggarwal) Date: Wed, 26 Jan 2011 23:35:21 -0000 Subject: [llvm-commits] [poolalloc] r124334 - in /poolalloc/trunk/test: TEST.calltargets.Makefile TEST.pacompiletime.Makefile Message-ID: <20110126233521.410892A6C12C@llvm.org> Author: aggarwa4 Date: Wed Jan 26 17:35:21 2011 New Revision: 124334 URL: http://llvm.org/viewvc/llvm-project?rev=124334&view=rev Log: Fix path to test cases; Use Configuration setting; Modified: poolalloc/trunk/test/TEST.calltargets.Makefile poolalloc/trunk/test/TEST.pacompiletime.Makefile Modified: poolalloc/trunk/test/TEST.calltargets.Makefile URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/test/TEST.calltargets.Makefile?rev=124334&r1=124333&r2=124334&view=diff ============================================================================== --- poolalloc/trunk/test/TEST.calltargets.Makefile (original) +++ poolalloc/trunk/test/TEST.calltargets.Makefile Wed Jan 26 17:35:21 2011 @@ -53,8 +53,8 @@ -$(LLVMLD) -link-as-library $< $(PA_PRE_RT) -o $@ $(PROGRAMS_TO_TEST:%=Output/%.base.bc): \ -Output/%.base.bc: Output/%.temp.bc $(LOPT) $(ASSIST_SO) - -$(LOPT) -load $(ASSIST_SO) -instnamer -internalize -indclone -funcspec -ipsccp -deadargelim -instcombine -globaldce -stats $< -f -o $@ +Output/%.base.bc: Output/%.temp.bc $(LOPT) $(ASSIST_SO) $(DSA_SO) + -$(LOPT) -load $(DSA_SO) -load $(ASSIST_SO) -instnamer -internalize -indclone -funcspec -ipsccp -deadargelim -instcombine -globaldce -stats $< -f -o $@ # This rule runs the pool allocator on the .base.bc file to produce a new .bc # file Modified: poolalloc/trunk/test/TEST.pacompiletime.Makefile URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/test/TEST.pacompiletime.Makefile?rev=124334&r1=124333&r2=124334&view=diff ============================================================================== --- poolalloc/trunk/test/TEST.pacompiletime.Makefile (original) +++ poolalloc/trunk/test/TEST.pacompiletime.Makefile Wed Jan 26 17:35:21 2011 @@ -10,14 +10,14 @@ EXTRA_PA_FLAGS := CURDIR := $(shell cd .; pwd) -PROGDIR := $(shell cd $(LLVM_SRC_ROOT)/projects/llvm-test; pwd)/ +PROGDIR := $(shell cd $(LLVM_SRC_ROOT)/projects/test-suite/; pwd)/ RELDIR := $(subst $(PROGDIR),,$(CURDIR)) # Pool allocator pass shared object -PA_SO := $(PROJECT_DIR)/Release/lib/libpoolalloc$(SHLIBEXT) +PA_SO := $(PROJECT_DIR)/$(CONFIGURATION)/lib/libpoolalloc$(SHLIBEXT) # Command to run opt with the pool allocator pass loaded -OPT_PA := $(LOPT) -load $(PA_SO) +OPT_PA := $(RUNTOOLSAFELY) $(WATCHDOG) $(LOPT) -load $(DSA_SO) -load $(PA_SO) # OPT_PA_STATS - Run opt with the -stats and -time-passes options, capturing the # output to a file. From aggarwa4 at illinois.edu Wed Jan 26 17:36:36 2011 From: aggarwa4 at illinois.edu (Arushi Aggarwal) Date: Wed, 26 Jan 2011 23:36:36 -0000 Subject: [llvm-commits] [poolalloc] r124335 - in /poolalloc/trunk: include/dsa/DSCallGraph.h lib/DSA/DSCallGraph.cpp Message-ID: <20110126233636.E5AE52A6C12C@llvm.org> Author: aggarwa4 Date: Wed Jan 26 17:36:36 2011 New Revision: 124335 URL: http://llvm.org/viewvc/llvm-project?rev=124335&view=rev Log: Add a function to get all the functions callable from a given call site. Modified: poolalloc/trunk/include/dsa/DSCallGraph.h poolalloc/trunk/lib/DSA/DSCallGraph.cpp Modified: poolalloc/trunk/include/dsa/DSCallGraph.h URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/dsa/DSCallGraph.h?rev=124335&r1=124334&r2=124335&view=diff ============================================================================== --- poolalloc/trunk/include/dsa/DSCallGraph.h (original) +++ poolalloc/trunk/include/dsa/DSCallGraph.h Wed Jan 26 17:36:36 2011 @@ -185,6 +185,8 @@ void buildRoots(); void buildIncompleteCalleeSet(svset callees); + + void addFullFunctionList(llvm::CallSite CS, std::vector &List) const; void dump(); Modified: poolalloc/trunk/lib/DSA/DSCallGraph.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/DSCallGraph.cpp?rev=124335&r1=124334&r2=124335&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/DSCallGraph.cpp (original) +++ poolalloc/trunk/lib/DSA/DSCallGraph.cpp Wed Jan 26 17:36:36 2011 @@ -12,6 +12,8 @@ //===----------------------------------------------------------------------===// #include "dsa/DSCallGraph.h" +#include "dsa/DataStructure.h" +#include "dsa/DSGraph.h" #include "llvm/Function.h" #include "llvm/DerivedTypes.h" @@ -20,6 +22,8 @@ #include +using namespace llvm; + static bool _hasPointers(const llvm::FunctionType* T) { if (T->isVarArg()) return true; if (T->getReturnType()->isPointerTy()) return true; @@ -253,3 +257,25 @@ void DSCallGraph::insureEntry(const llvm::Function* F) { SimpleCallees[F]; } + +void DSCallGraph::addFullFunctionList(llvm::CallSite CS, + std::vector &List) const { + DSCallGraph::callee_iterator csi = callee_begin(CS), + cse = callee_end(CS); + while(csi != cse) { + const Function *F = *csi; + DSCallGraph::scc_iterator sccii = scc_begin(F), + sccee = scc_end(F); + for(;sccii != sccee; ++sccii) { + List.push_back (*sccii); + } + ++csi; + } + const Function *F1 = CS.getInstruction()->getParent()->getParent(); + F1 = sccLeader(&*F1); + DSCallGraph::scc_iterator sccii = scc_begin(F1), + sccee = scc_end(F1); + for(;sccii != sccee; ++sccii) { + List.push_back (*sccii); + } +} From aggarwa4 at illinois.edu Wed Jan 26 17:37:02 2011 From: aggarwa4 at illinois.edu (Arushi Aggarwal) Date: Wed, 26 Jan 2011 23:37:02 -0000 Subject: [llvm-commits] [poolalloc] r124336 - /poolalloc/trunk/lib/DSA/CallTargets.cpp Message-ID: <20110126233702.D5AF92A6C12C@llvm.org> Author: aggarwa4 Date: Wed Jan 26 17:37:02 2011 New Revision: 124336 URL: http://llvm.org/viewvc/llvm-project?rev=124336&view=rev Log: Use DSCallGraph to get the call targets. Modified: poolalloc/trunk/lib/DSA/CallTargets.cpp Modified: poolalloc/trunk/lib/DSA/CallTargets.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/CallTargets.cpp?rev=124336&r1=124335&r2=124336&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/CallTargets.cpp (original) +++ poolalloc/trunk/lib/DSA/CallTargets.cpp Wed Jan 26 17:37:02 2011 @@ -43,6 +43,9 @@ void CallTargetFinder::findIndTargets(Module &M) { EQTDDataStructures* T = &getAnalysis(); + const DSCallGraph & callgraph = T->getCallGraph(); + DSGraph* G = T->getGlobalsGraph(); + DSGraph::ScalarMapTy& SM = G->getScalarMap(); for (Module::iterator I = M.begin(), E = M.end(); I != E; ++I) if (!I->isDeclaration()) for (Function::iterator F = I->begin(), FE = I->end(); F != FE; ++F) @@ -67,10 +70,37 @@ CompleteSites.insert(cs); } else { IndCall++; + + DSCallGraph::callee_iterator csi = callgraph.callee_begin(cs), + cse = callgraph.callee_end(cs); + while(csi != cse) { + const Function *F = *csi; + DSCallGraph::scc_iterator sccii = callgraph.scc_begin(F), + sccee = callgraph.scc_end(F); + for(;sccii != sccee; ++sccii) { + DSGraph::ScalarMapTy::const_iterator I = SM.find(SM.getLeaderForGlobal(*sccii)); + if (I != SM.end()) { + IndMap[cs].push_back (*sccii); + } + } + ++csi; + } + const Function *F1 = (cs).getInstruction()->getParent()->getParent(); + F1 = callgraph.sccLeader(&*F1); + + DSCallGraph::scc_iterator sccii = callgraph.scc_begin(F1), + sccee = callgraph.scc_end(F1); + for(;sccii != sccee; ++sccii) { + DSGraph::ScalarMapTy::const_iterator I = SM.find(SM.getLeaderForGlobal(*sccii)); + if (I != SM.end()) { + IndMap[cs].push_back (*sccii); + } + } + DSNode* N = T->getDSGraph(*cs.getCaller()) ->getNodeForValue(cs.getCalledValue()).getNode(); assert (N && "CallTarget: findIndTargets: No DSNode!\n"); - N->addFullFunctionList(IndMap[cs]); + if (N->isCompleteNode() && IndMap[cs].size()) { CompleteSites.insert(cs); ++CompleteInd; From aggarwa4 at illinois.edu Wed Jan 26 17:46:20 2011 From: aggarwa4 at illinois.edu (Arushi Aggarwal) Date: Wed, 26 Jan 2011 23:46:20 -0000 Subject: [llvm-commits] [poolalloc] r124337 - /poolalloc/trunk/test/Makefile Message-ID: <20110126234620.A9F6D2A6C12C@llvm.org> Author: aggarwa4 Date: Wed Jan 26 17:46:20 2011 New Revision: 124337 URL: http://llvm.org/viewvc/llvm-project?rev=124337&view=rev Log: Formatting changes, to make the SPEC benchmarks listed in order. Modified: poolalloc/trunk/test/Makefile Modified: poolalloc/trunk/test/Makefile URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/test/Makefile?rev=124337&r1=124336&r2=124337&view=diff ============================================================================== --- poolalloc/trunk/test/Makefile (original) +++ poolalloc/trunk/test/Makefile Wed Jan 26 17:46:20 2011 @@ -40,27 +40,29 @@ NORMAL_PROBLEM_SIZE_DIRS := \ MultiSource/Benchmarks/Olden \ - External/SPEC/CINT2000 \ + External/SPEC/CINT2000/ \ + #External/SPEC/CINT2000/164.gzip \ + #External/SPEC/CINT2000/175.vpr \ + #External/SPEC/CINT2000/176.gcc \ + #External/SPEC/CINT2000/181.mcf \ + #External/SPEC/CINT2000/186.crafty \ + #External/SPEC/CINT2000/197.parser \ + #External/SPEC/CINT2000/252.eon \ + #External/SPEC/CINT2000/253.perlbmk \ + #External/SPEC/CINT2000/254.gap \ + #External/SPEC/CINT2000/255.vortex \ + #External/SPEC/CINT2000/256.bzip2 \ + #External/SPEC/CINT2000/300.twolf \ #MultiSource/Applications \ #MultiSource/Applications/Burg \ #MultiSource/Applications/hexxagon \ #MultiSource/Applications/kimwitu++ \ #MultiSource/Applications/lambda-0.1.3 \ - #External/SPEC/CINT2000/175.vpr \ #MultiSource/Benchmarks/Olden/bh \ - #External/SPEC/CINT2000/181.mcf \ - #External/SPEC/CINT2000/186.crafty \ #External/FPGrowth \ #External/Namd \ #External/Povray \ #MultiSource/Benchmarks/SciMark2-C/scimark2 \ - #External/SPEC/CINT2000/164.gzip \ - #External/SPEC/CINT2000/175.vpr \ - #External/SPEC/CINT2000/176.gcc \ - #External/SPEC/CINT2000/252.eon \ - #External/SPEC/CINT2000/253.perlbmk \ - #External/SPEC/CINT2000/254.gap \ - #External/SPEC/CINT2000/300.twolf NORMAL_PROBLEM_SIZE_DIRS := \ From dpatel at apple.com Wed Jan 26 18:13:27 2011 From: dpatel at apple.com (Devang Patel) Date: Thu, 27 Jan 2011 00:13:27 -0000 Subject: [llvm-commits] [llvm] r124339 - /llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp Message-ID: <20110127001327.7480C2A6C12C@llvm.org> Author: dpatel Date: Wed Jan 26 18:13:27 2011 New Revision: 124339 URL: http://llvm.org/viewvc/llvm-project?rev=124339&view=rev Log: Reapply 124301 Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp?rev=124339&r1=124338&r2=124339&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp Wed Jan 26 18:13:27 2011 @@ -539,8 +539,12 @@ SmallVector, 32> &Orders, SmallSet &Seen) { unsigned Order = DAG->GetOrdering(N); - if (!Order || !Seen.insert(Order)) + if (!Order || !Seen.insert(Order)) { + // Process any valid SDDbgValues even if node does not have any order + // assigned. + ProcessSDDbgValues(N, DAG, Emitter, Orders, VRBaseMap, 0); return; + } MachineBasicBlock *BB = Emitter.getBlock(); if (Emitter.getInsertPos() == BB->begin() || BB->back().isPHI()) { From geek4civic at gmail.com Wed Jan 26 18:26:01 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Thu, 27 Jan 2011 09:26:01 +0900 Subject: [llvm-commits] Patch to build 64bit LLVM with MinGW64 compiler In-Reply-To: References: Message-ID: Good morning, syoyo san! 2011/1/27 Syoyo Fujita : > The number of leading underscore is another problem. > llc and mingw emits different number of leading scores for function > symbols, so I cannot link .s generated by llc on Windows with mingw. > We need to investigate and fix it in the next step. > TDM-gcc seems it does right way, I'll check it. I have checked on both mingw-w64-gcc(20101129) and llc(ToT). On Win64, symbols do not have a leading underscore. (Or, I could not build x64-clang! with mingw-w64's libs!) Lemme know your environments. eg. $ x86_64-w64-mingw32-gcc --version x86_64-w64-mingw32-gcc.exe (GCC) 4.5.2 20101129 (prerelease) ...Takumi From matthewbg at google.com Wed Jan 26 19:47:50 2011 From: matthewbg at google.com (Matt Beaumont-Gay) Date: Thu, 27 Jan 2011 01:47:50 -0000 Subject: [llvm-commits] [llvm] r124346 - /llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Message-ID: <20110127014751.096A02A6C12C@llvm.org> Author: matthewbg Date: Wed Jan 26 19:47:50 2011 New Revision: 124346 URL: http://llvm.org/viewvc/llvm-project?rev=124346&view=rev Log: Opt-mode -Wunused-variable cleanup Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=124346&r1=124345&r2=124346&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Wed Jan 26 19:47:50 2011 @@ -2875,8 +2875,7 @@ "Extract subvector must be from larger vector to smaller vector!"); if (ConstantSDNode *CSD = dyn_cast(Index.getNode())) { - uint64_t Idx = CSD->getZExtValue(); - assert((VT.getVectorNumElements() + Idx + assert((VT.getVectorNumElements() + CSD->getZExtValue() <= N1.getValueType().getVectorNumElements()) && "Extract subvector overflow!"); } @@ -3094,8 +3093,7 @@ assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() && "Insert subvector must be from smaller vector to larger vector!"); if (ConstantSDNode *CSD = dyn_cast(Index.getNode())) { - uint64_t Idx = CSD->getZExtValue(); - assert((N2.getValueType().getVectorNumElements() + Idx + assert((N2.getValueType().getVectorNumElements() + CSD->getZExtValue() <= VT.getVectorNumElements()) && "Insert subvector overflow!"); } From rafael.espindola at gmail.com Wed Jan 26 20:19:04 2011 From: rafael.espindola at gmail.com (=?ISO-8859-1?Q?Rafael_=C1vila_de_Esp=EDndola?=) Date: Wed, 26 Jan 2011 21:19:04 -0500 Subject: [llvm-commits] [PATCH]: patch for .cfi register parsing In-Reply-To: <20110126193102.GA5061@freebsd.org> References: <20110124175550.GA18819@freebsd.org> <4D405062.8040605@gmail.com> <20110126193102.GA5061@freebsd.org> Message-ID: <4D40D618.90402@gmail.com> > > I am actually doing that, by calling: > > Register = getContext().getTargetAsmInfo().getDwarfRegNum(RegNo, true); Somehow I missed it. LGTM. >> It is probably also a good idea to factor out a >> ParseRegisterOrRegisterNumber method. > > done > >> Last but not least, include tests :-) > > done > > I also converted ARM/MBlaze. Please check the next patch! > > roman Thanks, Rafael From matthewbg at google.com Wed Jan 26 20:39:27 2011 From: matthewbg at google.com (Matt Beaumont-Gay) Date: Thu, 27 Jan 2011 02:39:27 -0000 Subject: [llvm-commits] [llvm] r124350 - /llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Message-ID: <20110127023927.CE2C72A6C12C@llvm.org> Author: matthewbg Date: Wed Jan 26 20:39:27 2011 New Revision: 124350 URL: http://llvm.org/viewvc/llvm-project?rev=124350&view=rev Log: Try harder to not have unused variables. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=124350&r1=124349&r2=124350&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Wed Jan 26 20:39:27 2011 @@ -2875,6 +2875,7 @@ "Extract subvector must be from larger vector to smaller vector!"); if (ConstantSDNode *CSD = dyn_cast(Index.getNode())) { + (void)CSD; assert((VT.getVectorNumElements() + CSD->getZExtValue() <= N1.getValueType().getVectorNumElements()) && "Extract subvector overflow!"); @@ -3093,6 +3094,7 @@ assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() && "Insert subvector must be from smaller vector to larger vector!"); if (ConstantSDNode *CSD = dyn_cast(Index.getNode())) { + (void)CSD; assert((N2.getValueType().getVectorNumElements() + CSD->getZExtValue() <= VT.getVectorNumElements()) && "Insert subvector overflow!"); From geek4civic at gmail.com Wed Jan 26 21:20:20 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Thu, 27 Jan 2011 03:20:20 -0000 Subject: [llvm-commits] [llvm] r124354 - /llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Message-ID: <20110127032020.1464E2A6C12C@llvm.org> Author: chapuni Date: Wed Jan 26 21:20:19 2011 New Revision: 124354 URL: http://llvm.org/viewvc/llvm-project?rev=124354&view=rev Log: lib/Target/X86/X86ISelDAGToDAG.cpp: __main should be WINCALL64 on Win64. CALL64 marks %xmm* as dead. Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=124354&r1=124353&r2=124354&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Wed Jan 26 21:20:19 2011 @@ -532,7 +532,7 @@ const TargetInstrInfo *TII = TM.getInstrInfo(); if (Subtarget->isTargetCygMing()) { unsigned CallOp = - Subtarget->is64Bit() ? X86::CALL64pcrel32 : X86::CALLpcrel32; + Subtarget->is64Bit() ? X86::WINCALL64pcrel32 : X86::CALLpcrel32; BuildMI(BB, DebugLoc(), TII->get(CallOp)).addExternalSymbol("__main"); } From syoyofujita at gmail.com Wed Jan 26 21:24:33 2011 From: syoyofujita at gmail.com (Syoyo Fujita) Date: Thu, 27 Jan 2011 12:24:33 +0900 Subject: [llvm-commits] Patch to build 64bit LLVM with MinGW64 compiler In-Reply-To: References: Message-ID: Takumi, > 2011/1/27 Syoyo Fujita : >> The number of leading underscore is another problem. >> llc and mingw emits different number of leading scores for function >> symbols, so I cannot link .s generated by llc on Windows with mingw. >> We need to investigate and fix it in the next step. >> TDM-gcc seems it does right way, I'll check it. > > I have checked on both mingw-w64-gcc(20101129) and llc(ToT). > On Win64, symbols do not have a leading underscore. > (Or, I could not build x64-clang! with mingw-w64's libs!) I'm afraid it was happen in old llc. I've tested with recent llc(r124350) and checked that it emits same number of leading underscores with mingw 64bit. I could emit .s by recent llc, then link it with gcc to emit .exe: YEY! My environment is as follows. LLVM: r124350 TDM mingw: tdm64-1 4.5.1 Mingw64: x86_64-w64-mingw32-gcc.exe (GCC) 4.5.2 20100804 (prerelease) From echristo at apple.com Wed Jan 26 23:44:56 2011 From: echristo at apple.com (Eric Christopher) Date: Thu, 27 Jan 2011 05:44:56 -0000 Subject: [llvm-commits] [llvm] r124357 - /llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Message-ID: <20110127054456.DF4532A6C12C@llvm.org> Author: echristo Date: Wed Jan 26 23:44:56 2011 New Revision: 124357 URL: http://llvm.org/viewvc/llvm-project?rev=124357&view=rev Log: Use the incoming VT not the VT of where we're trying to store to determine if we can store a value. Also, the exclusion is or, not and. Fixes rdar://8920247. Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp?rev=124357&r1=124356&r2=124357&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMFastISel.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Wed Jan 26 23:44:56 2011 @@ -1437,8 +1437,8 @@ unsigned Arg = ArgRegs[VA.getValNo()]; MVT ArgVT = ArgVTs[VA.getValNo()]; - // We don't handle NEON parameters yet. - if (VA.getLocVT().isVector() && VA.getLocVT().getSizeInBits() > 64) + // We don't handle NEON/vector parameters yet. + if (ArgVT.isVector() || ArgVT.getSizeInBits() > 64) return false; // Handle arg promotion, etc. From echristo at apple.com Thu Jan 27 00:01:17 2011 From: echristo at apple.com (Eric Christopher) Date: Thu, 27 Jan 2011 06:01:17 -0000 Subject: [llvm-commits] [llvm] r124358 - /llvm/trunk/test/CodeGen/ARM/fast-isel-crash.ll Message-ID: <20110127060117.8B6702A6C131@llvm.org> Author: echristo Date: Thu Jan 27 00:01:17 2011 New Revision: 124358 URL: http://llvm.org/viewvc/llvm-project?rev=124358&view=rev Log: Add a testcase for my last checkin. Added: llvm/trunk/test/CodeGen/ARM/fast-isel-crash.ll Added: llvm/trunk/test/CodeGen/ARM/fast-isel-crash.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fast-isel-crash.ll?rev=124358&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/ARM/fast-isel-crash.ll (added) +++ llvm/trunk/test/CodeGen/ARM/fast-isel-crash.ll Thu Jan 27 00:01:17 2011 @@ -0,0 +1,21 @@ +; RUN: llc < %s -O0 -mtriple=thumbv7-apple-darwin + +%union.anon = type { <16 x i32> } + + at __md0 = external global [137 x i8] + +define internal void @stretch(<4 x i8> addrspace(1)* %src, <4 x i8> addrspace(1)* %dst, i32 %width, i32 %height, i32 %iLS, i32 %oLS, <2 x float> %c, <4 x float> %param) nounwind { +entry: + ret void +} + +define internal i32 @_Z13get_global_idj(i32 %dim) nounwind ssp { +entry: + ret i32 undef +} + +define void @wrap(i8 addrspace(1)* addrspace(1)* %arglist, i32 addrspace(1)* %gtid) nounwind ssp { +entry: + call void @stretch(<4 x i8> addrspace(1)* undef, <4 x i8> addrspace(1)* undef, i32 undef, i32 undef, i32 undef, i32 undef, <2 x float> undef, <4 x float> undef) + ret void +} From bob.wilson at apple.com Thu Jan 27 01:26:15 2011 From: bob.wilson at apple.com (Bob Wilson) Date: Thu, 27 Jan 2011 07:26:15 -0000 Subject: [llvm-commits] [llvm] r124365 - /llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp Message-ID: <20110127072615.B29482A6C12C@llvm.org> Author: bwilson Date: Thu Jan 27 01:26:15 2011 New Revision: 124365 URL: http://llvm.org/viewvc/llvm-project?rev=124365&view=rev Log: Avoid modifying the OneClassForEachPhysReg map while iterating over it. Linear scan regalloc is currently assuming that any register aliased with a member of a regclass must also be in at least one regclass. That is not always true. For example, for X86, RIP is in a regclass but IP is not. If you're unlucky, this can cause a crash by invalidating the iterator. Modified: llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp Modified: llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp?rev=124365&r1=124364&r2=124365&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp (original) +++ llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp Thu Jan 27 01:26:15 2011 @@ -431,8 +431,12 @@ for (DenseMap::iterator I = OneClassForEachPhysReg.begin(), E = OneClassForEachPhysReg.end(); I != E; ++I) - for (const unsigned *AS = tri_->getAliasSet(I->first); *AS; ++AS) - RelatedRegClasses.unionSets(I->second, OneClassForEachPhysReg[*AS]); + for (const unsigned *AS = tri_->getAliasSet(I->first); *AS; ++AS) { + const TargetRegisterClass *AliasClass = + OneClassForEachPhysReg.lookup(*AS); + if (AliasClass) + RelatedRegClasses.unionSets(I->second, AliasClass); + } } /// attemptTrivialCoalescing - If a simple interval is defined by a copy, try From sabre at nondot.org Thu Jan 27 01:35:27 2011 From: sabre at nondot.org (Chris Lattner) Date: Thu, 27 Jan 2011 07:35:27 -0000 Subject: [llvm-commits] [llvm] r124366 - /llvm/trunk/unittests/ADT/StringRefTest.cpp Message-ID: <20110127073527.E45532A6C12C@llvm.org> Author: lattner Date: Thu Jan 27 01:35:27 2011 New Revision: 124366 URL: http://llvm.org/viewvc/llvm-project?rev=124366&view=rev Log: Don't infinitely recurse! Patch by Marius Wachtler! Modified: llvm/trunk/unittests/ADT/StringRefTest.cpp Modified: llvm/trunk/unittests/ADT/StringRefTest.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/ADT/StringRefTest.cpp?rev=124366&r1=124365&r2=124366&view=diff ============================================================================== --- llvm/trunk/unittests/ADT/StringRefTest.cpp (original) +++ llvm/trunk/unittests/ADT/StringRefTest.cpp Thu Jan 27 01:35:27 2011 @@ -16,7 +16,7 @@ namespace llvm { std::ostream &operator<<(std::ostream &OS, const StringRef &S) { - OS << S; + OS << S.str(); return OS; } From clattner at apple.com Thu Jan 27 01:38:51 2011 From: clattner at apple.com (Chris Lattner) Date: Wed, 26 Jan 2011 23:38:51 -0800 Subject: [llvm-commits] Infinite recursion in StringRefTest In-Reply-To: References: Message-ID: <5EE60311-9A7E-48EA-9C23-D5EF8E837468@apple.com> On Jan 23, 2011, at 10:01 PM, Marius Wachtler wrote: > Patch attached... Thanks Marius, applied in r124366! -Chris From nicholas at mxc.ca Thu Jan 27 02:38:19 2011 From: nicholas at mxc.ca (Nick Lewycky) Date: Thu, 27 Jan 2011 08:38:19 -0000 Subject: [llvm-commits] [llvm] r124368 - in /llvm/trunk: lib/Transforms/IPO/MergeFunctions.cpp test/Transforms/MergeFunc/vector.ll Message-ID: <20110127083819.4A3012A6C12D@llvm.org> Author: nicholas Date: Thu Jan 27 02:38:19 2011 New Revision: 124368 URL: http://llvm.org/viewvc/llvm-project?rev=124368&view=rev Log: Fix surprising missed optimization in mergefunc where we forgot to consider that relationships like "i8* null" is equivalent to "i32* null". Added: llvm/trunk/test/Transforms/MergeFunc/vector.ll Modified: llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp Modified: llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp?rev=124368&r1=124367&r2=124368&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp Thu Jan 27 02:38:19 2011 @@ -460,9 +460,18 @@ if (V1 == F2 && V2 == F1) return true; - // TODO: constant expressions with GEP or references to F1 or F2. - if (isa(V1)) - return V1 == V2; + if (isa(V1)) { + if (V1 == V2) return true; + const Constant *C1 = cast(V1); + const Constant *C2 = dyn_cast(V2); + if (!C2) return false; + // TODO: constant expressions with GEP or references to F1 or F2. + if (C1->isNullValue() && C2->isNullValue() && + isEquivalentType(C1->getType(), C2->getType())) + return true; + return C1->getType()->canLosslesslyBitCastTo(C2->getType()) && + C1 == ConstantExpr::getBitCast(const_cast(C2), C1->getType()); + } if (isa(V1) && isa(V2)) { const InlineAsm *IA1 = cast(V1); Added: llvm/trunk/test/Transforms/MergeFunc/vector.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/MergeFunc/vector.ll?rev=124368&view=auto ============================================================================== --- llvm/trunk/test/Transforms/MergeFunc/vector.ll (added) +++ llvm/trunk/test/Transforms/MergeFunc/vector.ll Thu Jan 27 02:38:19 2011 @@ -0,0 +1,76 @@ +; RUN: opt -mergefunc -stats -disable-output < %s |& grep {functions merged} + +; This test is checks whether we can merge +; vector::push_back(0) +; and +; vector::push_back(0) +; . + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-unknown-linux-gnu" + +%0 = type { i32, void ()* } +%1 = type { i64, i1 } +%"class.std::vector" = type { [24 x i8] } + + at vi = global %"class.std::vector" zeroinitializer, align 8 + at __dso_handle = external unnamed_addr global i8* + at vp = global %"class.std::vector" zeroinitializer, align 8 + at llvm.global_ctors = appending global [1 x %0] [%0 { i32 65535, void ()* @_GLOBAL__I_a }] + +define linkonce_odr void @_ZNSt6vectorIlSaIlEED1Ev(%"class.std::vector"* nocapture %this) unnamed_addr align 2 { +entry: + %tmp2.i.i = bitcast %"class.std::vector"* %this to i64** + %tmp3.i.i = load i64** %tmp2.i.i, align 8, !tbaa !0 + %tobool.i.i.i = icmp eq i64* %tmp3.i.i, null + br i1 %tobool.i.i.i, label %_ZNSt6vectorIlSaIlEED2Ev.exit, label %if.then.i.i.i + +if.then.i.i.i: ; preds = %entry + %0 = bitcast i64* %tmp3.i.i to i8* + tail call void @_ZdlPv(i8* %0) nounwind + ret void + +_ZNSt6vectorIlSaIlEED2Ev.exit: ; preds = %entry + ret void +} + +declare i32 @__cxa_atexit(void (i8*)*, i8*, i8*) + +define linkonce_odr void @_ZNSt6vectorIPvSaIS0_EED1Ev(%"class.std::vector"* nocapture %this) unnamed_addr align 2 { +entry: + %tmp2.i.i = bitcast %"class.std::vector"* %this to i8*** + %tmp3.i.i = load i8*** %tmp2.i.i, align 8, !tbaa !0 + %tobool.i.i.i = icmp eq i8** %tmp3.i.i, null + br i1 %tobool.i.i.i, label %_ZNSt6vectorIPvSaIS0_EED2Ev.exit, label %if.then.i.i.i + +if.then.i.i.i: ; preds = %entry + %0 = bitcast i8** %tmp3.i.i to i8* + tail call void @_ZdlPv(i8* %0) nounwind + ret void + +_ZNSt6vectorIPvSaIS0_EED2Ev.exit: ; preds = %entry + ret void +} + +declare void @_Z1fv() + +declare void @_ZNSt6vectorIPvSaIS0_EE13_M_insert_auxEN9__gnu_cxx17__normal_iteratorIPS0_S2_EERKS0_(%"class.std::vector"* nocapture %this, i8** %__position.coerce, i8** nocapture %__x) align 2 + +declare void @_ZdlPv(i8*) nounwind + +declare void @llvm.memmove.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind + +declare void @_ZSt17__throw_bad_allocv() noreturn + +declare noalias i8* @_Znwm(i64) + +declare void @_ZNSt6vectorIlSaIlEE13_M_insert_auxEN9__gnu_cxx17__normal_iteratorIPlS1_EERKl(%"class.std::vector"* nocapture %this, i64* %__position.coerce, i64* nocapture %__x) align 2 + +declare void @_GLOBAL__I_a() + +declare %1 @llvm.uadd.with.overflow.i64(i64, i64) nounwind readnone + +!0 = metadata !{metadata !"any pointer", metadata !1} +!1 = metadata !{metadata !"omnipotent char", metadata !2} +!2 = metadata !{metadata !"Simple C/C++ TBAA", null} +!3 = metadata !{metadata !"long", metadata !1} From nicholas at mxc.ca Thu Jan 27 03:10:43 2011 From: nicholas at mxc.ca (Nick Lewycky) Date: Thu, 27 Jan 2011 09:10:43 -0000 Subject: [llvm-commits] [llvm] r124370 - /llvm/trunk/include/llvm/ADT/DenseSet.h Message-ID: <20110127091043.13B8B2A6C12D@llvm.org> Author: nicholas Date: Thu Jan 27 03:10:42 2011 New Revision: 124370 URL: http://llvm.org/viewvc/llvm-project?rev=124370&view=rev Log: Add DenseSet::resize for API parity with DenseMap::resize. Modified: llvm/trunk/include/llvm/ADT/DenseSet.h Modified: llvm/trunk/include/llvm/ADT/DenseSet.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/DenseSet.h?rev=124370&r1=124369&r2=124370&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/DenseSet.h (original) +++ llvm/trunk/include/llvm/ADT/DenseSet.h Thu Jan 27 03:10:42 2011 @@ -33,6 +33,9 @@ bool empty() const { return TheMap.empty(); } unsigned size() const { return TheMap.size(); } + /// Grow the denseset so that it has at least Size buckets. Does not shrink + void resize(size_t Size) { TheMap.resize(Size); } + void clear() { TheMap.clear(); } From jay.foad at gmail.com Thu Jan 27 08:44:55 2011 From: jay.foad at gmail.com (Jay Foad) Date: Thu, 27 Jan 2011 14:44:55 -0000 Subject: [llvm-commits] [llvm] r124375 - /llvm/trunk/lib/VMCore/Constants.cpp Message-ID: <20110127144455.F08D32A6C12C@llvm.org> Author: foad Date: Thu Jan 27 08:44:55 2011 New Revision: 124375 URL: http://llvm.org/viewvc/llvm-project?rev=124375&view=rev Log: Fix indentation. Modified: llvm/trunk/lib/VMCore/Constants.cpp Modified: llvm/trunk/lib/VMCore/Constants.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Constants.cpp?rev=124375&r1=124374&r2=124375&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Constants.cpp (original) +++ llvm/trunk/lib/VMCore/Constants.cpp Thu Jan 27 08:44:55 2011 @@ -591,10 +591,10 @@ OperandTraits::op_end(this) - V.size(), V.size()) { Use *OL = OperandList; - for (std::vector::const_iterator I = V.begin(), E = V.end(); - I != E; ++I, ++OL) { - Constant *C = *I; - assert(C->getType() == T->getElementType() && + for (std::vector::const_iterator I = V.begin(), E = V.end(); + I != E; ++I, ++OL) { + Constant *C = *I; + assert(C->getType() == T->getElementType() && "Initializer for vector element doesn't match vector element type!"); *OL = C; } @@ -603,10 +603,10 @@ // ConstantVector accessors. Constant* ConstantVector::get(const VectorType* T, const std::vector& V) { - assert(!V.empty() && "Vectors can't be empty"); - LLVMContext &Context = T->getContext(); - LLVMContextImpl *pImpl = Context.pImpl; - + assert(!V.empty() && "Vectors can't be empty"); + LLVMContext &Context = T->getContext(); + LLVMContextImpl *pImpl = Context.pImpl; + // If this is an all-undef or alll-zero vector, return a // ConstantAggregateZero or UndefValue. Constant *C = V[0]; @@ -1240,7 +1240,7 @@ if (SrcBits == DstBits) return C; // Avoid a useless cast Instruction::CastOps opcode = - (SrcBits > DstBits ? Instruction::FPTrunc : Instruction::FPExt); + (SrcBits > DstBits ? Instruction::FPTrunc : Instruction::FPExt); return getCast(opcode, C, Ty); } From renato.golin at arm.com Thu Jan 27 09:17:35 2011 From: renato.golin at arm.com (Renato Golin) Date: Thu, 27 Jan 2011 15:17:35 +0000 Subject: [llvm-commits] Triple normalization bug Message-ID: Hi there, So, only today I could get back to the normalization bug, let me explain what is going on and why I fixed that way. I've reverted my OS/Env changes, leaving only the Environment additions (gnu, eabi) and letting normalize do its job. === Context Triple.cpp, std::string Triple::normalize(StringRef Str); Triple = "x86_64-gnu-linux"; === The problem First, the Components vector is created to hold 4 elements (but not filled with 4 elements). The string tokenizer fills it up with three elements: (x86_64, gnu and linux). The fourth element is not pushed back (so it doesn't exist). SmallVector Components; for (size_t First = 0, Last = 0; Last != StringRef::npos; First = Last + 1) { Last = Str.find('-', First); Components.push_back(Str.slice(First, Last)); } The elements are parsed and only x86_64 and linux makes sense, so Found array contains { true, false, true, false }; Note, it has 4 *allocated* elements. bool Found[4]; Found[0] = Arch != UnknownArch; Found[1] = Vendor != UnknownVendor; Found[2] = OS != UnknownOS; Found[3] = Environment != UnknownEnvironment; The normalization passes through all Pos [0 -> 3] (positions that weren't found) and internally iterate through all Idx [0 -> 2] (tokens split). for (unsigned Pos = 0; Pos != array_lengthof(Found); ++Pos) { if (Found[Pos]) continue; // Already in the canonical position. for (unsigned Idx = 0; Idx != Components.size(); ++Idx) { // Do not reparse any components that already matched. if (Idx < array_lengthof(Found) && Found[Idx]) continue; Because of the continue on both places, the only two times it enters the inner loop is when Pos = 1, Idx = 1 (Vendor, "gnu") and Pos = 3, Idx = 1 (Environment, "gnu"). On the first case, Vendor is still invalid, but in the second case the normalization detected a match (as it should). And here's where the bug shows its face: Pos = 3, Idx = 1: } else if (Pos > Idx) { do { StringRef CurrentComponent(""); // The empty component. i = [1 -> 2], Components.size() = 3 for (unsigned i = Idx; i < Components.size(); ++i) { // Skip over any fixed components. The first time it passes here, CurrentComponent swaps with "gnu", so Vendor is now empty string. On the second pass, however: lengthof(Found) is 4, while the vector size is 3. The next not-found item is on Found[4] (index 3), which is one pass the Components' size: while (i < array_lengthof(Found) && Found[i]) ++i; /* THIS IS WRONG */ Here, i = 3; std::swap(CurrentComponent, Components[i]); Bang! Components[3] hasn't been allocated, segfault. === The fix To avoid major changes and adding too much code/data for a single special case, I've added the extra (not so nice) addition to Components vector the last element. However, there should be a better way. If you want to place the element at the end, you MUST have it initialized with empty string so "swap" can work OR avoid using swap when there is no such element at that index (probably the best solution). === Why it works with "linux"? Because that movement is done by two distinct loops. The "do { }" and and "for (i) { }". The triple "linux" is moved up by the "do" loop because there were no other found tokens (so the for loop is always executed once), which works and triples that have a partial match (such as x86_64-gnu-linux) go into the "for" loop and pass the end of the vector. As I said, this was a latent bug that didn't show up because there weren't enough tests for it (not enough combinations of triples). === The OS/Env hack As Duncan said, it was redundant and wrong, the normalization should've done that automatically, and it actually does. I fell in the error of trying that firs to solve the segfault problem and not removing it after I found the real problem. === What I'll do I have removed already the OS/Env hack locally and am tweaking the swap to not break under those situations and will add some random tests in TripleTests.cpp with the corner cases I can think of. Feel free to add more, even unrealistic ones, in case some other crazy guys come with weird triples... ;) -- cheers, --renato From rdivacky at freebsd.org Thu Jan 27 11:14:22 2011 From: rdivacky at freebsd.org (Roman Divacky) Date: Thu, 27 Jan 2011 17:14:22 -0000 Subject: [llvm-commits] [llvm] r124378 - in /llvm/trunk: include/llvm/Target/TargetAsmParser.h lib/Target/ARM/AsmParser/ARMAsmParser.cpp lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp lib/Target/X86/AsmParser/X86AsmParser.cpp Message-ID: <20110127171422.426162A6C12C@llvm.org> Author: rdivacky Date: Thu Jan 27 11:14:22 2011 New Revision: 124378 URL: http://llvm.org/viewvc/llvm-project?rev=124378&view=rev Log: Introduce virtual ParseRegister method in TargetAsmParser. Create override of this method in X86/ARM/MBlaze. Modified: llvm/trunk/include/llvm/Target/TargetAsmParser.h llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp llvm/trunk/lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp Modified: llvm/trunk/include/llvm/Target/TargetAsmParser.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetAsmParser.h?rev=124378&r1=124377&r2=124378&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetAsmParser.h (original) +++ llvm/trunk/include/llvm/Target/TargetAsmParser.h Thu Jan 27 11:14:22 2011 @@ -42,6 +42,8 @@ unsigned getAvailableFeatures() const { return AvailableFeatures; } void setAvailableFeatures(unsigned Value) { AvailableFeatures = Value; } + virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) = 0; + /// ParseInstruction - Parse one assembly instruction. /// /// The parser is positioned following the instruction name. The target Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp?rev=124378&r1=124377&r2=124378&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp (original) +++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Thu Jan 27 11:14:22 2011 @@ -53,6 +53,7 @@ bool Error(SMLoc L, const Twine &Msg) { return Parser.Error(L, Msg); } int TryParseRegister(); + virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc); bool TryParseCoprocessorOperandName(SmallVectorImpl&); bool TryParseRegisterWithWriteBack(SmallVectorImpl &); bool ParseRegisterList(SmallVectorImpl &); @@ -549,6 +550,12 @@ /// } +bool ARMAsmParser::ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) { + RegNo = TryParseRegister(); + + return (RegNo == (unsigned)-1); +} + /// Try to parse a register name. The token must be an Identifier when called, /// and if it is a register name the token is eaten and the register number is /// returned. Otherwise return -1. Modified: llvm/trunk/lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp?rev=124378&r1=124377&r2=124378&view=diff ============================================================================== --- llvm/trunk/lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp (original) +++ llvm/trunk/lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp Thu Jan 27 11:14:22 2011 @@ -41,11 +41,13 @@ bool Error(SMLoc L, const Twine &Msg) { return Parser.Error(L, Msg); } MBlazeOperand *ParseMemory(SmallVectorImpl &Operands); - MBlazeOperand *ParseRegister(); + MBlazeOperand *ParseRegister(unsigned &RegNo); MBlazeOperand *ParseImmediate(); MBlazeOperand *ParseFsl(); MBlazeOperand* ParseOperand(SmallVectorImpl &Operands); + virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc); + bool ParseDirectiveWord(unsigned Size, SMLoc L); bool MatchAndEmitInstruction(SMLoc IDLoc, @@ -384,14 +386,18 @@ return Op; } -MBlazeOperand *MBlazeAsmParser::ParseRegister() { +bool MBlazeAsmParser::ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) { + return (ParseRegister(RegNo) == 0); +} + +MBlazeOperand *MBlazeAsmParser::ParseRegister(unsigned &RegNo) { SMLoc S = Parser.getTok().getLoc(); SMLoc E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1); switch (getLexer().getKind()) { default: return 0; case AsmToken::Identifier: - unsigned RegNo = MatchRegisterName(getLexer().getTok().getIdentifier()); + RegNo = MatchRegisterName(getLexer().getTok().getIdentifier()); if (RegNo == 0) return 0; @@ -452,7 +458,8 @@ MBlazeOperand *Op; // Attempt to parse the next token as a register name - Op = ParseRegister(); + unsigned RegNo; + Op = ParseRegister(RegNo); // Attempt to parse the next token as an FSL immediate if (!Op) Modified: llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp?rev=124378&r1=124377&r2=124378&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp (original) +++ llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp Thu Jan 27 11:14:22 2011 @@ -44,8 +44,6 @@ bool Error(SMLoc L, const Twine &Msg) { return Parser.Error(L, Msg); } - bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc); - X86Operand *ParseOperand(); X86Operand *ParseMemOperand(unsigned SegReg, SMLoc StartLoc); @@ -71,6 +69,7 @@ setAvailableFeatures(ComputeAvailableFeatures( &TM.getSubtarget())); } + virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc); virtual bool ParseInstruction(StringRef Name, SMLoc NameLoc, SmallVectorImpl &Operands); From rdivacky at freebsd.org Thu Jan 27 11:16:37 2011 From: rdivacky at freebsd.org (Roman Divacky) Date: Thu, 27 Jan 2011 17:16:37 -0000 Subject: [llvm-commits] [llvm] r124379 - in /llvm/trunk: lib/MC/MCParser/AsmParser.cpp test/MC/ELF/cfi-offset.s Message-ID: <20110127171637.D07D52A6C12C@llvm.org> Author: rdivacky Date: Thu Jan 27 11:16:37 2011 New Revision: 124379 URL: http://llvm.org/viewvc/llvm-project?rev=124379&view=rev Log: Add support for specifying register name in cfi-register/offset/def as well as register number. Modified: llvm/trunk/lib/MC/MCParser/AsmParser.cpp llvm/trunk/test/MC/ELF/cfi-offset.s Modified: llvm/trunk/lib/MC/MCParser/AsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCParser/AsmParser.cpp?rev=124379&r1=124378&r2=124379&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCParser/AsmParser.cpp (original) +++ llvm/trunk/lib/MC/MCParser/AsmParser.cpp Thu Jan 27 11:16:37 2011 @@ -30,6 +30,7 @@ #include "llvm/Support/MemoryBuffer.h" #include "llvm/Support/SourceMgr.h" #include "llvm/Support/raw_ostream.h" +#include "llvm/Target/TargetAsmInfo.h" #include "llvm/Target/TargetAsmParser.h" #include #include @@ -274,6 +275,8 @@ AddDirectiveHandler<&GenericAsmParser::ParseDirectiveLEB128>(".uleb128"); } + bool ParseRegisterOrRegisterNumber(int64_t &Register, SMLoc DirectiveLoc); + bool ParseDirectiveFile(StringRef, SMLoc DirectiveLoc); bool ParseDirectiveLine(StringRef, SMLoc DirectiveLoc); bool ParseDirectiveLoc(StringRef, SMLoc DirectiveLoc); @@ -2181,12 +2184,28 @@ return getStreamer().EmitCFIEndProc(); } +/// ParseRegisterOrRegisterNumber - parse register name or number. +bool GenericAsmParser::ParseRegisterOrRegisterNumber(int64_t &Register, + SMLoc DirectiveLoc) { + unsigned RegNo; + + if (getLexer().is(AsmToken::Percent)) { + if (getParser().getTargetParser().ParseRegister(RegNo, DirectiveLoc, + DirectiveLoc)) + return true; + Register = getContext().getTargetAsmInfo().getDwarfRegNum(RegNo, true); + } else + return getParser().ParseAbsoluteExpression(Register); + + return false; +} + /// ParseDirectiveCFIDefCfa /// ::= .cfi_def_cfa register, offset bool GenericAsmParser::ParseDirectiveCFIDefCfa(StringRef, SMLoc DirectiveLoc) { int64_t Register = 0; - if (getParser().ParseAbsoluteExpression(Register)) + if (ParseRegisterOrRegisterNumber(Register, DirectiveLoc)) return true; if (getLexer().isNot(AsmToken::Comma)) @@ -2216,7 +2235,7 @@ bool GenericAsmParser::ParseDirectiveCFIDefCfaRegister(StringRef, SMLoc DirectiveLoc) { int64_t Register = 0; - if (getParser().ParseAbsoluteExpression(Register)) + if (ParseRegisterOrRegisterNumber(Register, DirectiveLoc)) return true; return getStreamer().EmitCFIDefCfaRegister(Register); @@ -2227,7 +2246,8 @@ bool GenericAsmParser::ParseDirectiveCFIOffset(StringRef, SMLoc DirectiveLoc) { int64_t Register = 0; int64_t Offset = 0; - if (getParser().ParseAbsoluteExpression(Register)) + + if (ParseRegisterOrRegisterNumber(Register, DirectiveLoc)) return true; if (getLexer().isNot(AsmToken::Comma)) Modified: llvm/trunk/test/MC/ELF/cfi-offset.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/cfi-offset.s?rev=124379&r1=124378&r2=124379&view=diff ============================================================================== --- llvm/trunk/test/MC/ELF/cfi-offset.s (original) +++ llvm/trunk/test/MC/ELF/cfi-offset.s Thu Jan 27 11:16:37 2011 @@ -3,7 +3,7 @@ f: .cfi_startproc nop - .cfi_offset 6, -16 + .cfi_offset %ebp, -16 nop .cfi_endproc From dpatel at apple.com Thu Jan 27 11:43:54 2011 From: dpatel at apple.com (Devang Patel) Date: Thu, 27 Jan 2011 17:43:54 -0000 Subject: [llvm-commits] [llvm] r124380 - in /llvm/trunk/lib/CodeGen/SelectionDAG: LegalizeDAG.cpp SelectionDAG.cpp Message-ID: <20110127174354.25C382A6C12C@llvm.org> Author: dpatel Date: Thu Jan 27 11:43:53 2011 New Revision: 124380 URL: http://llvm.org/viewvc/llvm-project?rev=124380&view=rev Log: While legalizing SDValues do not drop SDDbgValues, trasfer them to new legal nodes. Take 2. This includes fix for dragonegg crash. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=124380&r1=124379&r2=124380&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Thu Jan 27 11:43:53 2011 @@ -87,6 +87,9 @@ // If someone requests legalization of the new node, return itself. if (From != To) LegalizedNodes.insert(std::make_pair(To, To)); + + // Transfer SDDbgValues. + DAG.TransferDbgValues(From, To); } public: Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=124380&r1=124379&r2=124380&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Thu Jan 27 11:43:53 2011 @@ -5474,7 +5474,6 @@ SDNode *FromNode = From.getNode(); SDNode *ToNode = To.getNode(); SmallVector &DVs = GetDbgValues(FromNode); - DbgInfo->removeSDDbgValues(FromNode); for (SmallVector::iterator I = DVs.begin(), E = DVs.end(); I != E; ++I) { if ((*I)->getKind() == SDDbgValue::SDNODE) { @@ -5482,6 +5481,7 @@ (*I)->setSDNode(ToNode, To.getResNo()); } } + DbgInfo->removeSDDbgValues(FromNode); } //===----------------------------------------------------------------------===// From clattner at apple.com Thu Jan 27 12:11:48 2011 From: clattner at apple.com (Chris Lattner) Date: Thu, 27 Jan 2011 10:11:48 -0800 Subject: [llvm-commits] [llvm] r124368 - in /llvm/trunk: lib/Transforms/IPO/MergeFunctions.cpp test/Transforms/MergeFunc/vector.ll In-Reply-To: <20110127083819.4A3012A6C12D@llvm.org> References: <20110127083819.4A3012A6C12D@llvm.org> Message-ID: <95CAB20C-DB73-48D0-88E5-989A0764226B@apple.com> On Jan 27, 2011, at 12:38 AM, Nick Lewycky wrote: > URL: http://llvm.org/viewvc/llvm-project?rev=124368&view=rev > Log: > Fix surprising missed optimization in mergefunc where we forgot to consider > that relationships like "i8* null" is equivalent to "i32* null". Nice! > +++ llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp Thu Jan 27 02:38:19 2011 > @@ -460,9 +460,18 @@ > + if (isa(V1)) { > + if (V1 == V2) return true; > + const Constant *C1 = cast(V1); Please use dyn_cast in the if instead of isa+cast. > + const Constant *C2 = dyn_cast(V2); > + if (!C2) return false; > + // TODO: constant expressions with GEP or references to F1 or F2. > + if (C1->isNullValue() && C2->isNullValue() && > + isEquivalentType(C1->getType(), C2->getType())) > + return true; isEquivalentType accepts intptr_t and void* as equiv, so this will merge null with (intptr)0 right? > + return C1->getType()->canLosslesslyBitCastTo(C2->getType()) && > + C1 == ConstantExpr::getBitCast(const_cast(C2), C1->getType()); > + } Urr? What is this about? This needs a comment at the very least. -Chris From dpatel at apple.com Thu Jan 27 13:15:01 2011 From: dpatel at apple.com (Devang Patel) Date: Thu, 27 Jan 2011 19:15:01 -0000 Subject: [llvm-commits] [llvm] r124397 - in /llvm/trunk/lib/CodeGen/SelectionDAG: LegalizeDAG.cpp SelectionDAG.cpp Message-ID: <20110127191501.EB43E2A6C12C@llvm.org> Author: dpatel Date: Thu Jan 27 13:15:01 2011 New Revision: 124397 URL: http://llvm.org/viewvc/llvm-project?rev=124397&view=rev Log: Speculatively revert r124380. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=124397&r1=124396&r2=124397&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Thu Jan 27 13:15:01 2011 @@ -87,9 +87,6 @@ // If someone requests legalization of the new node, return itself. if (From != To) LegalizedNodes.insert(std::make_pair(To, To)); - - // Transfer SDDbgValues. - DAG.TransferDbgValues(From, To); } public: Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=124397&r1=124396&r2=124397&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Thu Jan 27 13:15:01 2011 @@ -5474,6 +5474,7 @@ SDNode *FromNode = From.getNode(); SDNode *ToNode = To.getNode(); SmallVector &DVs = GetDbgValues(FromNode); + DbgInfo->removeSDDbgValues(FromNode); for (SmallVector::iterator I = DVs.begin(), E = DVs.end(); I != E; ++I) { if ((*I)->getKind() == SDDbgValue::SDNODE) { @@ -5481,7 +5482,6 @@ (*I)->setSDNode(ToNode, To.getResNo()); } } - DbgInfo->removeSDDbgValues(FromNode); } //===----------------------------------------------------------------------===// From ofv at wanadoo.es Thu Jan 27 13:29:48 2011 From: ofv at wanadoo.es (Oscar Fuentes) Date: Thu, 27 Jan 2011 19:29:48 -0000 Subject: [llvm-commits] [llvm] r124399 - in /llvm/trunk: cmake/modules/AddLLVMDefinitions.cmake tools/llvm-config/CMakeLists.txt Message-ID: <20110127192948.EE3FC2A6C12C@llvm.org> Author: ofv Date: Thu Jan 27 13:29:48 2011 New Revision: 124399 URL: http://llvm.org/viewvc/llvm-project?rev=124399&view=rev Log: Don't show -pedantic, -W and -Wall on the output of llvm-config --cflags --cxxflags --cppflags We shouldn't impose those flags on people who use llvm-config for building their own projects. Modified: llvm/trunk/cmake/modules/AddLLVMDefinitions.cmake llvm/trunk/tools/llvm-config/CMakeLists.txt Modified: llvm/trunk/cmake/modules/AddLLVMDefinitions.cmake URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/cmake/modules/AddLLVMDefinitions.cmake?rev=124399&r1=124398&r2=124399&view=diff ============================================================================== --- llvm/trunk/cmake/modules/AddLLVMDefinitions.cmake (original) +++ llvm/trunk/cmake/modules/AddLLVMDefinitions.cmake Thu Jan 27 13:29:48 2011 @@ -5,7 +5,10 @@ # Beware that there is no implementation of remove_llvm_definitions. macro(add_llvm_definitions) - set(LLVM_DEFINITIONS "${LLVM_DEFINITIONS} ${ARGN}") + # We don't want no semicolons on LLVM_DEFINITIONS: + foreach(arg ${ARGN}) + set(LLVM_DEFINITIONS "${LLVM_DEFINITIONS} ${arg}") + endforeach(arg) add_definitions( ${ARGN} ) endmacro(add_llvm_definitions) Modified: llvm/trunk/tools/llvm-config/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-config/CMakeLists.txt?rev=124399&r1=124398&r2=124399&view=diff ============================================================================== --- llvm/trunk/tools/llvm-config/CMakeLists.txt (original) +++ llvm/trunk/tools/llvm-config/CMakeLists.txt Thu Jan 27 13:29:48 2011 @@ -92,6 +92,17 @@ set(CXX_FLGS "${CMAKE_CXX_FLAGS_${uppercase_CMAKE_BUILD_TYPE}} ${LLVM_DEFINITIONS}") set(CPP_FLGS "${CMAKE_CPP_FLAGS_${uppercase_CMAKE_BUILD_TYPE}} ${LLVM_DEFINITIONS}") +# We don't want certain flags on the output of +# llvm-config --cflags --cxxflags +macro(remove_option_from_llvm_config option) + llvm_replace_compiler_option(C_FLGS "${option}" "") + llvm_replace_compiler_option(CXX_FLGS "${option}" "") + llvm_replace_compiler_option(CPP_FLGS "${option}" "") +endmacro(remove_option_from_llvm_config) +remove_option_from_llvm_config("-pedantic") +remove_option_from_llvm_config("-Wall") +remove_option_from_llvm_config("-W") + add_custom_command(OUTPUT ${LLVM_CONFIG} COMMAND echo 's!@LLVM_CPPFLAGS@!${CPP_FLGS}!' > temp.sed COMMAND echo 's!@LLVM_CFLAGS@!${C_FLGS}!' >> temp.sed From nicholas at mxc.ca Thu Jan 27 13:42:43 2011 From: nicholas at mxc.ca (Nick Lewycky) Date: Thu, 27 Jan 2011 19:42:43 -0000 Subject: [llvm-commits] [llvm] r124404 - /llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp Message-ID: <20110127194243.8D3312A6C12D@llvm.org> Author: nicholas Date: Thu Jan 27 13:42:43 2011 New Revision: 124404 URL: http://llvm.org/viewvc/llvm-project?rev=124404&view=rev Log: Use dyn_cast instead of isa+cast. Modified: llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp Modified: llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp?rev=124404&r1=124403&r2=124404&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp Thu Jan 27 13:42:43 2011 @@ -460,9 +460,8 @@ if (V1 == F2 && V2 == F1) return true; - if (isa(V1)) { + if (Constant *C1 = dyn_cast(V1)) { if (V1 == V2) return true; - const Constant *C1 = cast(V1); const Constant *C2 = dyn_cast(V2); if (!C2) return false; // TODO: constant expressions with GEP or references to F1 or F2. From nicholas at mxc.ca Thu Jan 27 13:51:31 2011 From: nicholas at mxc.ca (Nick Lewycky) Date: Thu, 27 Jan 2011 19:51:31 -0000 Subject: [llvm-commits] [llvm] r124406 - /llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp Message-ID: <20110127195131.9EC6F2A6C12D@llvm.org> Author: nicholas Date: Thu Jan 27 13:51:31 2011 New Revision: 124406 URL: http://llvm.org/viewvc/llvm-project?rev=124406&view=rev Log: Expound upon this comparison! Modified: llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp Modified: llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp?rev=124406&r1=124405&r2=124406&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp Thu Jan 27 13:51:31 2011 @@ -468,6 +468,8 @@ if (C1->isNullValue() && C2->isNullValue() && isEquivalentType(C1->getType(), C2->getType())) return true; + // Try bitcasting C2 to C1's type. If the bitcast is legal and returns C1 + // then they must have equal bit patterns. return C1->getType()->canLosslesslyBitCastTo(C2->getType()) && C1 == ConstantExpr::getBitCast(const_cast(C2), C1->getType()); } From aggarwa4 at illinois.edu Thu Jan 27 13:51:45 2011 From: aggarwa4 at illinois.edu (Arushi Aggarwal) Date: Thu, 27 Jan 2011 19:51:45 -0000 Subject: [llvm-commits] [poolalloc] r124407 - /poolalloc/trunk/lib/DSA/Basic.cpp Message-ID: <20110127195145.5B9BE2A6C12D@llvm.org> Author: aggarwa4 Date: Thu Jan 27 13:51:45 2011 New Revision: 124407 URL: http://llvm.org/viewvc/llvm-project?rev=124407&view=rev Log: Globals that do not have internal linkage must be marked external. Also, mark external flag on the node for external globals. Modified: poolalloc/trunk/lib/DSA/Basic.cpp Modified: poolalloc/trunk/lib/DSA/Basic.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/Basic.cpp?rev=124407&r1=124406&r2=124407&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/Basic.cpp (original) +++ poolalloc/trunk/lib/DSA/Basic.cpp Thu Jan 27 13:51:45 2011 @@ -43,7 +43,7 @@ DSNode * GVNodeExternal = new DSNode(GlobalsGraph); for (Module::global_iterator I = M.global_begin(), E = M.global_end(); I != E; ++I) { - if (I->isDeclaration()) { + if (I->isDeclaration() || (!(I->hasInternalLinkage()))) { GlobalsGraph->getNodeForValue(&*I).mergeWith(GVNodeExternal); } else { GlobalsGraph->getNodeForValue(&*I).mergeWith(GVNodeInternal); @@ -54,6 +54,7 @@ GVNodeInternal->maskNodeTypes(DSNode::IncompleteNode); GVNodeExternal->foldNodeCompletely(); + GVNodeExternal->setExternalMarker(); // Next step, iterate through the nodes in the globals graph, unioning // together the globals into equivalence classes. From nlewycky at google.com Thu Jan 27 13:57:45 2011 From: nlewycky at google.com (Nick Lewycky) Date: Thu, 27 Jan 2011 11:57:45 -0800 Subject: [llvm-commits] [llvm] r124368 - in /llvm/trunk: lib/Transforms/IPO/MergeFunctions.cpp test/Transforms/MergeFunc/vector.ll In-Reply-To: <95CAB20C-DB73-48D0-88E5-989A0764226B@apple.com> References: <20110127083819.4A3012A6C12D@llvm.org> <95CAB20C-DB73-48D0-88E5-989A0764226B@apple.com> Message-ID: On 27 January 2011 10:11, Chris Lattner wrote: > On Jan 27, 2011, at 12:38 AM, Nick Lewycky wrote: > > URL: http://llvm.org/viewvc/llvm-project?rev=124368&view=rev > > Log: > > Fix surprising missed optimization in mergefunc where we forgot to > consider > > that relationships like "i8* null" is equivalent to "i32* null". > > Nice! > > > +++ llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp Thu Jan 27 02:38:19 > 2011 > > @@ -460,9 +460,18 @@ > > > + if (isa(V1)) { > > + if (V1 == V2) return true; > > + const Constant *C1 = cast(V1); > > Please use dyn_cast in the if instead of isa+cast. > Done. > > + const Constant *C2 = dyn_cast(V2); > > + if (!C2) return false; > > + // TODO: constant expressions with GEP or references to F1 or F2. > > + if (C1->isNullValue() && C2->isNullValue() && > > + isEquivalentType(C1->getType(), C2->getType())) > > + return true; > > isEquivalentType accepts intptr_t and void* as equiv, so this will merge > null with (intptr)0 right? > Right. > + return C1->getType()->canLosslesslyBitCastTo(C2->getType()) && > > + C1 == ConstantExpr::getBitCast(const_cast(C2), > C1->getType()); > > + } > > Urr? What is this about? This needs a comment at the very least. > I've added a comment. The only case this doesn't handle is inttoptr/ptrtoint conversions (since you can't bitcast integers and pointers), which are special-cased for null-only above. I may want to generalize that test too. While we're at it, I should probably also call ConstantFoldConstantExpression on it given that I have a TD and ConstantExpr doesn't. I didn't think it was worth thinking about this comparison function too hard, but maybe I'll try it and see whether it improves the number of merges in llvm-test. Nick > > -Chris > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110127/579aafae/attachment.html From benny.kra at googlemail.com Thu Jan 27 14:30:55 2011 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Thu, 27 Jan 2011 20:30:55 -0000 Subject: [llvm-commits] [llvm] r124426 - /llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp Message-ID: <20110127203055.2154E2A6C12C@llvm.org> Author: d0k Date: Thu Jan 27 14:30:54 2011 New Revision: 124426 URL: http://llvm.org/viewvc/llvm-project?rev=124426&view=rev Log: Unbreak the build. Modified: llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp Modified: llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp?rev=124426&r1=124425&r2=124426&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp Thu Jan 27 14:30:54 2011 @@ -460,7 +460,7 @@ if (V1 == F2 && V2 == F1) return true; - if (Constant *C1 = dyn_cast(V1)) { + if (const Constant *C1 = dyn_cast(V1)) { if (V1 == V2) return true; const Constant *C2 = dyn_cast(V2); if (!C2) return false; From dgregor at apple.com Thu Jan 27 15:06:17 2011 From: dgregor at apple.com (Douglas Gregor) Date: Thu, 27 Jan 2011 21:06:17 -0000 Subject: [llvm-commits] [llvm] r124440 - /llvm/trunk/utils/TableGen/ClangDiagnosticsEmitter.cpp Message-ID: <20110127210617.689E52A6C12C@llvm.org> Author: dgregor Date: Thu Jan 27 15:06:17 2011 New Revision: 124440 URL: http://llvm.org/viewvc/llvm-project?rev=124440&view=rev Log: Clang: separate the access-control diagnostics from other diagnostics that do not have SFINAE behavior. Modified: llvm/trunk/utils/TableGen/ClangDiagnosticsEmitter.cpp Modified: llvm/trunk/utils/TableGen/ClangDiagnosticsEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/ClangDiagnosticsEmitter.cpp?rev=124440&r1=124439&r2=124440&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/ClangDiagnosticsEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/ClangDiagnosticsEmitter.cpp Thu Jan 27 15:06:17 2011 @@ -170,7 +170,13 @@ OS << ", true"; else OS << ", false"; - + + // Access control bit + if (R.getValueAsBit("AccessControl")) + OS << ", true"; + else + OS << ", false"; + // Category number. OS << ", " << CategoryIDs.getID(getDiagnosticCategory(&R, DGParentMap)); OS << ")\n"; From atrick at apple.com Thu Jan 27 15:26:43 2011 From: atrick at apple.com (Andrew Trick) Date: Thu, 27 Jan 2011 21:26:43 -0000 Subject: [llvm-commits] [llvm] r124442 - /llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp Message-ID: <20110127212643.A3FBF2A6C12C@llvm.org> Author: atrick Date: Thu Jan 27 15:26:43 2011 New Revision: 124442 URL: http://llvm.org/viewvc/llvm-project?rev=124442&view=rev Log: VirtRegRewriter fix: update kill flags, which are used by the scavenger. rdar://problem/8893967: JM/lencod miscompile at -arch armv7 -mthumb -O3 Added ResurrectKill to remove kill flags after we decide to reused a physical register. And (hopefully) ensure that we call it in all the right places. Sorry, I'm not checking in a unit test given that it's a miscompile I can't reproduce easily with a toy example. Failures in the rewriter depend on a series of heuristic decisions maked during one of the many upstream phases in codegen. This case would require coercing regalloc to generate a couple of rematerialzations in a way that causes the scavenger to reuse the same register at just the wrong point. The general way to test this is to implement kill flags verification. Then we could have a simple, robust compile-only unit test. That would be worth doing if the whole pass was not about to disappear. At this point we focus verification work on the next generation of regalloc. Modified: llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp Modified: llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp?rev=124442&r1=124441&r2=124442&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp (original) +++ llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp Thu Jan 27 15:26:43 2011 @@ -216,7 +216,8 @@ << SlotOrReMat-VirtRegMap::MAX_STACK_SLOT-1); else DEBUG(dbgs() << "Remembering SS#" << SlotOrReMat); - DEBUG(dbgs() << " in physreg " << TRI->getName(Reg) << "\n"); + DEBUG(dbgs() << " in physreg " << TRI->getName(Reg) + << (CanClobber ? " canclobber" : "") << "\n"); } /// canClobberPhysRegForSS - Return true if the spiller is allowed to change @@ -462,25 +463,70 @@ } } -/// InvalidateKill - Invalidate register kill information for a specific -/// register. This also unsets the kills marker on the last kill operand. -static void InvalidateKill(unsigned Reg, - const TargetRegisterInfo* TRI, - BitVector &RegKills, - std::vector &KillOps) { - if (RegKills[Reg]) { - KillOps[Reg]->setIsKill(false); - // KillOps[Reg] might be a def of a super-register. - unsigned KReg = KillOps[Reg]->getReg(); - KillOps[KReg] = NULL; - RegKills.reset(KReg); - for (const unsigned *SR = TRI->getSubRegisters(KReg); *SR; ++SR) { - if (RegKills[*SR]) { - KillOps[*SR]->setIsKill(false); - KillOps[*SR] = NULL; - RegKills.reset(*SR); - } - } +/// ResurrectConfirmedKill - Helper for ResurrectKill. This register is killed +/// but not re-defined and it's being reused. Remove the kill flag for the +/// register and unset the kill's marker and last kill operand. +static void ResurrectConfirmedKill(unsigned Reg, const TargetRegisterInfo* TRI, + BitVector &RegKills, + std::vector &KillOps) { + DEBUG(dbgs() << "Resurrect " << TRI->getName(Reg) << "\n"); + + MachineOperand *KillOp = KillOps[Reg]; + KillOp->setIsKill(false); + // KillOps[Reg] might be a def of a super-register. + unsigned KReg = KillOp->getReg(); + if (!RegKills[KReg]) + return; + + assert(KillOps[KReg] == KillOp && "invalid superreg kill flags"); + KillOps[KReg] = NULL; + RegKills.reset(KReg); + + // If it's a def of a super-register. Its other sub-regsters are no + // longer killed as well. + for (const unsigned *SR = TRI->getSubRegisters(KReg); *SR; ++SR) { + DEBUG(dbgs() << " Resurrect subreg " << TRI->getName(*SR) << "\n"); + + assert(KillOps[*SR] == KillOp && "invalid subreg kill flags"); + KillOps[*SR] = NULL; + RegKills.reset(*SR); + } +} + +/// ResurrectKill - Invalidate kill info associated with a previous MI. An +/// optimization may have decided that it's safe to reuse a previously killed +/// register. If we fail to erase the invalid kill flags, then the register +/// scavenger may later clobber the register used by this MI. Note that this +/// must be done even if this MI is being deleted! Consider: +/// +/// USE $r1 (vreg1) +/// ... +/// $r1(vreg3) = COPY $r1 (vreg2) +/// +/// RegAlloc has smartly assigned all three vregs to the same physreg. Initially +/// vreg1's only use is a kill. The rewriter doesn't know it should be live +/// until it rewrites vreg2. At that points it sees that the copy is dead and +/// deletes it. However, deleting the copy implicitly forwards liveness of $r1 +/// (it's copy coalescing). We must resurrect $r1 by removing the kill flag at +/// vreg1 before deleting the copy. +static void ResurrectKill(MachineInstr &MI, unsigned Reg, + const TargetRegisterInfo* TRI, BitVector &RegKills, + std::vector &KillOps) { + if (RegKills[Reg] && KillOps[Reg]->getParent() != &MI) { + ResurrectConfirmedKill(Reg, TRI, RegKills, KillOps); + return; + } + // No previous kill for this reg. Check for subreg kills as well. + // d4 = + // store d4, fi#0 + // ... + // = s8 + // ... + // = d4 + for (const unsigned *SR = TRI->getSubRegisters(Reg); *SR; ++SR) { + unsigned SReg = *SR; + if (RegKills[SReg] && KillOps[SReg]->getParent() != &MI) + ResurrectConfirmedKill(SReg, TRI, RegKills, KillOps); } } @@ -502,15 +548,22 @@ KillRegs->push_back(Reg); assert(Reg < KillOps.size()); if (KillOps[Reg] == &MO) { + // This operand was the kill, now no longer. KillOps[Reg] = NULL; RegKills.reset(Reg); for (const unsigned *SR = TRI->getSubRegisters(Reg); *SR; ++SR) { if (RegKills[*SR]) { + assert(KillOps[*SR] == &MO && "bad subreg kill flags"); KillOps[*SR] = NULL; RegKills.reset(*SR); } } } + else { + // This operand may have reused a previously killed reg. Keep it live in + // case it continues to be used after erasing this instruction. + ResurrectKill(MI, Reg, TRI, RegKills, KillOps); + } } } @@ -578,44 +631,8 @@ if (Reg == 0) continue; - if (RegKills[Reg] && KillOps[Reg]->getParent() != &MI) { - // That can't be right. Register is killed but not re-defined and it's - // being reused. Let's fix that. - KillOps[Reg]->setIsKill(false); - // KillOps[Reg] might be a def of a super-register. - unsigned KReg = KillOps[Reg]->getReg(); - KillOps[KReg] = NULL; - RegKills.reset(KReg); - - // Must be a def of a super-register. Its other sub-regsters are no - // longer killed as well. - for (const unsigned *SR = TRI->getSubRegisters(KReg); *SR; ++SR) { - KillOps[*SR] = NULL; - RegKills.reset(*SR); - } - } else { - // Check for subreg kills as well. - // d4 = - // store d4, fi#0 - // ... - // = s8 - // ... - // = d4 - for (const unsigned *SR = TRI->getSubRegisters(Reg); *SR; ++SR) { - unsigned SReg = *SR; - if (RegKills[SReg] && KillOps[SReg]->getParent() != &MI) { - KillOps[SReg]->setIsKill(false); - unsigned KReg = KillOps[SReg]->getReg(); - KillOps[KReg] = NULL; - RegKills.reset(KReg); - - for (const unsigned *SSR = TRI->getSubRegisters(KReg); *SSR; ++SSR) { - KillOps[*SSR] = NULL; - RegKills.reset(*SSR); - } - } - } - } + // This operand may have reused a previously killed reg. Keep it live. + ResurrectKill(MI, Reg, TRI, RegKills, KillOps); if (MO.isKill()) { RegKills.set(Reg); @@ -770,7 +787,8 @@ NotAvailable.insert(Reg); else { MBB.addLiveIn(Reg); - InvalidateKill(Reg, TRI, RegKills, KillOps); + if (RegKills[Reg]) + ResurrectConfirmedKill(Reg, TRI, RegKills, KillOps); } // Skip over the same register. @@ -1774,6 +1792,10 @@ << TRI->getName(InReg) << " for vreg" << VirtReg <<" instead of reloading into physreg " << TRI->getName(Phys) << '\n'); + + // Reusing a physreg may resurrect it. But we expect ProcessUses to update + // the kill flags for the current instruction after processing it. + ++NumOmitted; continue; } else if (InReg && InReg != Phys) { @@ -1882,6 +1904,7 @@ continue; // Ignore non-register operands. unsigned VirtReg = MO.getReg(); + if (TargetRegisterInfo::isPhysicalRegister(VirtReg)) { // Ignore physregs for spilling, but remember that it is used by this // function. @@ -2021,6 +2044,9 @@ MI.getOperand(i).setReg(RReg); MI.getOperand(i).setSubReg(0); + // Reusing a physreg may resurrect it. But we expect ProcessUses to + // update the kill flags for the current instr after processing it. + // The only technical detail we have is that we don't know that // PhysReg won't be clobbered by a reloaded stack slot that occurs // later in the instruction. In particular, consider 'op V1, V2'. @@ -2061,7 +2087,6 @@ MI.getOperand(i).setIsKill(); KilledMIRegs.insert(VirtReg); } - continue; } // CanReuse @@ -2135,7 +2160,7 @@ continue; } // if (PhysReg) - // Otherwise, reload it and remember that we have it. + // Otherwise, reload it and remember that we have it. PhysReg = VRM->getPhys(VirtReg); assert(PhysReg && "Must map virtreg to physreg!"); @@ -2204,7 +2229,6 @@ ++NumDSE; } } - } /// rewriteMBB - Keep track of which spills are available even after the @@ -2321,8 +2345,8 @@ BackTracked = true; } else { DEBUG(dbgs() << "Removing now-noop copy: " << MI); - // Unset last kill since it's being reused. - InvalidateKill(InReg, TRI, RegKills, KillOps); + // InvalidateKills resurrects any prior kill of the copy's source + // allowing the source reg to be reused in place of the copy. Spills.disallowClobberPhysReg(InReg); } From atrick at apple.com Thu Jan 27 15:28:52 2011 From: atrick at apple.com (Andrew Trick) Date: Thu, 27 Jan 2011 21:28:52 -0000 Subject: [llvm-commits] [llvm] r124443 - /llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Message-ID: <20110127212852.27C312A6C12C@llvm.org> Author: atrick Date: Thu Jan 27 15:28:51 2011 New Revision: 124443 URL: http://llvm.org/viewvc/llvm-project?rev=124443&view=rev Log: Remove a temporary workaround for a lencod miscompile. Depends on the fix in r124442. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp?rev=124443&r1=124442&r2=124443&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Thu Jan 27 15:28:51 2011 @@ -1645,13 +1645,11 @@ // NumSuccsLeft counts all deps. Don't compare it with NumSuccs which only // counts data deps. To be more precise, we could maintain a // NumDataSuccsLeft count. - /* FIXME: exposing a downstream bug, JM/lencode miscompile if (PredSU->NumSuccsLeft != PredSU->Succs.size()) { DEBUG(dbgs() << " SU(" << PredSU->NodeNum << ") live across SU(" << SU->NodeNum << ")\n"); continue; } - */ const SDNode *PN = PredSU->getNode(); if (!PN->isMachineOpcode()) { if (PN->getOpcode() == ISD::CopyFromReg) { From venkatra at cs.wisc.edu Thu Jan 27 15:38:44 2011 From: venkatra at cs.wisc.edu (Venkatraman Govindaraju) Date: Thu, 27 Jan 2011 21:38:44 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r124444 - /llvm-gcc-4.2/trunk/gcc/config/sparc/sparc.h Message-ID: <20110127213844.BC2162A6C12C@llvm.org> Author: venkatra Date: Thu Jan 27 15:38:44 2011 New Revision: 124444 URL: http://llvm.org/viewvc/llvm-project?rev=124444&view=rev Log: Pass aggregate arguments using byval attr for sparc. Modified: llvm-gcc-4.2/trunk/gcc/config/sparc/sparc.h Modified: llvm-gcc-4.2/trunk/gcc/config/sparc/sparc.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/sparc/sparc.h?rev=124444&r1=124443&r2=124444&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/sparc/sparc.h (original) +++ llvm-gcc-4.2/trunk/gcc/config/sparc/sparc.h Thu Jan 27 15:38:44 2011 @@ -2488,5 +2488,8 @@ */ #define LLVM_TARGET_NAME Sparc +#define LLVM_SHOULD_PASS_AGGREGATE_USING_BYVAL_ATTR(X, TY) \ + true + #endif /* ENABLE_LLVM */ /* LLVM LOCAL end */ From evan.cheng at apple.com Thu Jan 27 15:54:50 2011 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 27 Jan 2011 13:54:50 -0800 Subject: [llvm-commits] [llvm] r124442 - /llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp In-Reply-To: <20110127212643.A3FBF2A6C12C@llvm.org> References: <20110127212643.A3FBF2A6C12C@llvm.org> Message-ID: <2B2D5434-D0F5-45FE-9E94-A19236C1389E@apple.com> Thanks. I'm so sorry you had to see this code. Evan On Jan 27, 2011, at 1:26 PM, Andrew Trick wrote: > Author: atrick > Date: Thu Jan 27 15:26:43 2011 > New Revision: 124442 > > URL: http://llvm.org/viewvc/llvm-project?rev=124442&view=rev > Log: > VirtRegRewriter fix: update kill flags, which are used by the scavenger. > rdar://problem/8893967: JM/lencod miscompile at -arch armv7 -mthumb -O3 > > Added ResurrectKill to remove kill flags after we decide to reused a > physical register. And (hopefully) ensure that we call it in all the > right places. > > Sorry, I'm not checking in a unit test given that it's a miscompile I > can't reproduce easily with a toy example. Failures in the rewriter > depend on a series of heuristic decisions maked during one of the many > upstream phases in codegen. This case would require coercing regalloc > to generate a couple of rematerialzations in a way that causes the > scavenger to reuse the same register at just the wrong point. > > The general way to test this is to implement kill flags > verification. Then we could have a simple, robust compile-only unit > test. That would be worth doing if the whole pass was not about to > disappear. At this point we focus verification work on the next > generation of regalloc. > > Modified: > llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp > > Modified: llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp?rev=124442&r1=124441&r2=124442&view=diff > ============================================================================== > --- llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp (original) > +++ llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp Thu Jan 27 15:26:43 2011 > @@ -216,7 +216,8 @@ > << SlotOrReMat-VirtRegMap::MAX_STACK_SLOT-1); > else > DEBUG(dbgs() << "Remembering SS#" << SlotOrReMat); > - DEBUG(dbgs() << " in physreg " << TRI->getName(Reg) << "\n"); > + DEBUG(dbgs() << " in physreg " << TRI->getName(Reg) > + << (CanClobber ? " canclobber" : "") << "\n"); > } > > /// canClobberPhysRegForSS - Return true if the spiller is allowed to change > @@ -462,25 +463,70 @@ > } > } > > -/// InvalidateKill - Invalidate register kill information for a specific > -/// register. This also unsets the kills marker on the last kill operand. > -static void InvalidateKill(unsigned Reg, > - const TargetRegisterInfo* TRI, > - BitVector &RegKills, > - std::vector &KillOps) { > - if (RegKills[Reg]) { > - KillOps[Reg]->setIsKill(false); > - // KillOps[Reg] might be a def of a super-register. > - unsigned KReg = KillOps[Reg]->getReg(); > - KillOps[KReg] = NULL; > - RegKills.reset(KReg); > - for (const unsigned *SR = TRI->getSubRegisters(KReg); *SR; ++SR) { > - if (RegKills[*SR]) { > - KillOps[*SR]->setIsKill(false); > - KillOps[*SR] = NULL; > - RegKills.reset(*SR); > - } > - } > +/// ResurrectConfirmedKill - Helper for ResurrectKill. This register is killed > +/// but not re-defined and it's being reused. Remove the kill flag for the > +/// register and unset the kill's marker and last kill operand. > +static void ResurrectConfirmedKill(unsigned Reg, const TargetRegisterInfo* TRI, > + BitVector &RegKills, > + std::vector &KillOps) { > + DEBUG(dbgs() << "Resurrect " << TRI->getName(Reg) << "\n"); > + > + MachineOperand *KillOp = KillOps[Reg]; > + KillOp->setIsKill(false); > + // KillOps[Reg] might be a def of a super-register. > + unsigned KReg = KillOp->getReg(); > + if (!RegKills[KReg]) > + return; > + > + assert(KillOps[KReg] == KillOp && "invalid superreg kill flags"); > + KillOps[KReg] = NULL; > + RegKills.reset(KReg); > + > + // If it's a def of a super-register. Its other sub-regsters are no > + // longer killed as well. > + for (const unsigned *SR = TRI->getSubRegisters(KReg); *SR; ++SR) { > + DEBUG(dbgs() << " Resurrect subreg " << TRI->getName(*SR) << "\n"); > + > + assert(KillOps[*SR] == KillOp && "invalid subreg kill flags"); > + KillOps[*SR] = NULL; > + RegKills.reset(*SR); > + } > +} > + > +/// ResurrectKill - Invalidate kill info associated with a previous MI. An > +/// optimization may have decided that it's safe to reuse a previously killed > +/// register. If we fail to erase the invalid kill flags, then the register > +/// scavenger may later clobber the register used by this MI. Note that this > +/// must be done even if this MI is being deleted! Consider: > +/// > +/// USE $r1 (vreg1) > +/// ... > +/// $r1(vreg3) = COPY $r1 (vreg2) > +/// > +/// RegAlloc has smartly assigned all three vregs to the same physreg. Initially > +/// vreg1's only use is a kill. The rewriter doesn't know it should be live > +/// until it rewrites vreg2. At that points it sees that the copy is dead and > +/// deletes it. However, deleting the copy implicitly forwards liveness of $r1 > +/// (it's copy coalescing). We must resurrect $r1 by removing the kill flag at > +/// vreg1 before deleting the copy. > +static void ResurrectKill(MachineInstr &MI, unsigned Reg, > + const TargetRegisterInfo* TRI, BitVector &RegKills, > + std::vector &KillOps) { > + if (RegKills[Reg] && KillOps[Reg]->getParent() != &MI) { > + ResurrectConfirmedKill(Reg, TRI, RegKills, KillOps); > + return; > + } > + // No previous kill for this reg. Check for subreg kills as well. > + // d4 = > + // store d4, fi#0 > + // ... > + // = s8 > + // ... > + // = d4 > + for (const unsigned *SR = TRI->getSubRegisters(Reg); *SR; ++SR) { > + unsigned SReg = *SR; > + if (RegKills[SReg] && KillOps[SReg]->getParent() != &MI) > + ResurrectConfirmedKill(SReg, TRI, RegKills, KillOps); > } > } > > @@ -502,15 +548,22 @@ > KillRegs->push_back(Reg); > assert(Reg < KillOps.size()); > if (KillOps[Reg] == &MO) { > + // This operand was the kill, now no longer. > KillOps[Reg] = NULL; > RegKills.reset(Reg); > for (const unsigned *SR = TRI->getSubRegisters(Reg); *SR; ++SR) { > if (RegKills[*SR]) { > + assert(KillOps[*SR] == &MO && "bad subreg kill flags"); > KillOps[*SR] = NULL; > RegKills.reset(*SR); > } > } > } > + else { > + // This operand may have reused a previously killed reg. Keep it live in > + // case it continues to be used after erasing this instruction. > + ResurrectKill(MI, Reg, TRI, RegKills, KillOps); > + } > } > } > > @@ -578,44 +631,8 @@ > if (Reg == 0) > continue; > > - if (RegKills[Reg] && KillOps[Reg]->getParent() != &MI) { > - // That can't be right. Register is killed but not re-defined and it's > - // being reused. Let's fix that. > - KillOps[Reg]->setIsKill(false); > - // KillOps[Reg] might be a def of a super-register. > - unsigned KReg = KillOps[Reg]->getReg(); > - KillOps[KReg] = NULL; > - RegKills.reset(KReg); > - > - // Must be a def of a super-register. Its other sub-regsters are no > - // longer killed as well. > - for (const unsigned *SR = TRI->getSubRegisters(KReg); *SR; ++SR) { > - KillOps[*SR] = NULL; > - RegKills.reset(*SR); > - } > - } else { > - // Check for subreg kills as well. > - // d4 = > - // store d4, fi#0 > - // ... > - // = s8 > - // ... > - // = d4 > - for (const unsigned *SR = TRI->getSubRegisters(Reg); *SR; ++SR) { > - unsigned SReg = *SR; > - if (RegKills[SReg] && KillOps[SReg]->getParent() != &MI) { > - KillOps[SReg]->setIsKill(false); > - unsigned KReg = KillOps[SReg]->getReg(); > - KillOps[KReg] = NULL; > - RegKills.reset(KReg); > - > - for (const unsigned *SSR = TRI->getSubRegisters(KReg); *SSR; ++SSR) { > - KillOps[*SSR] = NULL; > - RegKills.reset(*SSR); > - } > - } > - } > - } > + // This operand may have reused a previously killed reg. Keep it live. > + ResurrectKill(MI, Reg, TRI, RegKills, KillOps); > > if (MO.isKill()) { > RegKills.set(Reg); > @@ -770,7 +787,8 @@ > NotAvailable.insert(Reg); > else { > MBB.addLiveIn(Reg); > - InvalidateKill(Reg, TRI, RegKills, KillOps); > + if (RegKills[Reg]) > + ResurrectConfirmedKill(Reg, TRI, RegKills, KillOps); > } > > // Skip over the same register. > @@ -1774,6 +1792,10 @@ > << TRI->getName(InReg) << " for vreg" > << VirtReg <<" instead of reloading into physreg " > << TRI->getName(Phys) << '\n'); > + > + // Reusing a physreg may resurrect it. But we expect ProcessUses to update > + // the kill flags for the current instruction after processing it. > + > ++NumOmitted; > continue; > } else if (InReg && InReg != Phys) { > @@ -1882,6 +1904,7 @@ > continue; // Ignore non-register operands. > > unsigned VirtReg = MO.getReg(); > + > if (TargetRegisterInfo::isPhysicalRegister(VirtReg)) { > // Ignore physregs for spilling, but remember that it is used by this > // function. > @@ -2021,6 +2044,9 @@ > MI.getOperand(i).setReg(RReg); > MI.getOperand(i).setSubReg(0); > > + // Reusing a physreg may resurrect it. But we expect ProcessUses to > + // update the kill flags for the current instr after processing it. > + > // The only technical detail we have is that we don't know that > // PhysReg won't be clobbered by a reloaded stack slot that occurs > // later in the instruction. In particular, consider 'op V1, V2'. > @@ -2061,7 +2087,6 @@ > MI.getOperand(i).setIsKill(); > KilledMIRegs.insert(VirtReg); > } > - > continue; > } // CanReuse > > @@ -2135,7 +2160,7 @@ > continue; > } // if (PhysReg) > > - // Otherwise, reload it and remember that we have it. > + // Otherwise, reload it and remember that we have it. > PhysReg = VRM->getPhys(VirtReg); > assert(PhysReg && "Must map virtreg to physreg!"); > > @@ -2204,7 +2229,6 @@ > ++NumDSE; > } > } > - > } > > /// rewriteMBB - Keep track of which spills are available even after the > @@ -2321,8 +2345,8 @@ > BackTracked = true; > } else { > DEBUG(dbgs() << "Removing now-noop copy: " << MI); > - // Unset last kill since it's being reused. > - InvalidateKill(InReg, TRI, RegKills, KillOps); > + // InvalidateKills resurrects any prior kill of the copy's source > + // allowing the source reg to be reused in place of the copy. > Spills.disallowClobberPhysReg(InReg); > } > > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From greened at obbligato.org Thu Jan 27 16:38:56 2011 From: greened at obbligato.org (David Greene) Date: Thu, 27 Jan 2011 22:38:56 -0000 Subject: [llvm-commits] [llvm] r124447 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Message-ID: <20110127223857.1471E2A6C12C@llvm.org> Author: greened Date: Thu Jan 27 16:38:56 2011 New Revision: 124447 URL: http://llvm.org/viewvc/llvm-project?rev=124447&view=rev Log: [AVX] Clean up the code to configure target lowering for AVX. Specify how to lower more/new operations. This is a prerequisite for adding additional AVX lowering. Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=124447&r1=124446&r2=124447&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Jan 27 16:38:56 2011 @@ -831,27 +831,14 @@ setOperationAction(ISD::LOAD, MVT::v8i32, Legal); setOperationAction(ISD::LOAD, MVT::v4f64, Legal); setOperationAction(ISD::LOAD, MVT::v4i64, Legal); + setOperationAction(ISD::FADD, MVT::v8f32, Legal); setOperationAction(ISD::FSUB, MVT::v8f32, Legal); setOperationAction(ISD::FMUL, MVT::v8f32, Legal); setOperationAction(ISD::FDIV, MVT::v8f32, Legal); setOperationAction(ISD::FSQRT, MVT::v8f32, Legal); setOperationAction(ISD::FNEG, MVT::v8f32, Custom); - setOperationAction(ISD::BUILD_VECTOR, MVT::v8f32, Custom); - //setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v8f32, Custom); - //setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v8f32, Custom); - //setOperationAction(ISD::SELECT, MVT::v8f32, Custom); - //setOperationAction(ISD::VSETCC, MVT::v8f32, Custom); - - // Operations to consider commented out -v16i16 v32i8 - //setOperationAction(ISD::ADD, MVT::v16i16, Legal); - setOperationAction(ISD::ADD, MVT::v8i32, Custom); - setOperationAction(ISD::ADD, MVT::v4i64, Custom); - //setOperationAction(ISD::SUB, MVT::v32i8, Legal); - //setOperationAction(ISD::SUB, MVT::v16i16, Legal); - setOperationAction(ISD::SUB, MVT::v8i32, Custom); - setOperationAction(ISD::SUB, MVT::v4i64, Custom); - //setOperationAction(ISD::MUL, MVT::v16i16, Legal); + setOperationAction(ISD::FADD, MVT::v4f64, Legal); setOperationAction(ISD::FSUB, MVT::v4f64, Legal); setOperationAction(ISD::FMUL, MVT::v4f64, Legal); @@ -859,74 +846,61 @@ setOperationAction(ISD::FSQRT, MVT::v4f64, Legal); setOperationAction(ISD::FNEG, MVT::v4f64, Custom); - setOperationAction(ISD::VSETCC, MVT::v4f64, Custom); - // setOperationAction(ISD::VSETCC, MVT::v32i8, Custom); - // setOperationAction(ISD::VSETCC, MVT::v16i16, Custom); - setOperationAction(ISD::VSETCC, MVT::v8i32, Custom); - - // setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v32i8, Custom); - // setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v16i16, Custom); - // setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v16i16, Custom); - setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v8i32, Custom); - setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v8f32, Custom); - - setOperationAction(ISD::BUILD_VECTOR, MVT::v4f64, Custom); - setOperationAction(ISD::BUILD_VECTOR, MVT::v4i64, Custom); - setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v4f64, Custom); - setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v4i64, Custom); - setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4f64, Custom); - setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v4f64, Custom); - -#if 0 - // Not sure we want to do this since there are no 256-bit integer - // operations in AVX - - // Custom lower build_vector, vector_shuffle, and extract_vector_elt. - // This includes 256-bit vectors - for (unsigned i = (unsigned)MVT::v16i8; i != (unsigned)MVT::v4i64; ++i) { - EVT VT = (MVT::SimpleValueType)i; - - // Do not attempt to custom lower non-power-of-2 vectors - if (!isPowerOf2_32(VT.getVectorNumElements())) + // Custom lower build_vector, vector_shuffle, scalar_to_vector, + // insert_vector_elt extract_subvector and extract_vector_elt for + // 256-bit types. + for (unsigned i = (unsigned)MVT::FIRST_VECTOR_VALUETYPE; + i <= (unsigned)MVT::LAST_VECTOR_VALUETYPE; + ++i) { + MVT::SimpleValueType VT = (MVT::SimpleValueType)i; + // Do not attempt to custom lower non-256-bit vectors + if (!isPowerOf2_32(MVT(VT).getVectorNumElements()) + || (MVT(VT).getSizeInBits() < 256)) continue; - setOperationAction(ISD::BUILD_VECTOR, VT, Custom); setOperationAction(ISD::VECTOR_SHUFFLE, VT, Custom); + setOperationAction(ISD::INSERT_VECTOR_ELT, VT, Custom); setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT, Custom); + setOperationAction(ISD::SCALAR_TO_VECTOR, VT, Custom); } + // Custom-lower insert_subvector and extract_subvector based on + // the result type. + for (unsigned i = (unsigned)MVT::FIRST_VECTOR_VALUETYPE; + i <= (unsigned)MVT::LAST_VECTOR_VALUETYPE; + ++i) { + MVT::SimpleValueType VT = (MVT::SimpleValueType)i; + // Do not attempt to custom lower non-256-bit vectors + if (!isPowerOf2_32(MVT(VT).getVectorNumElements())) + continue; - if (Subtarget->is64Bit()) { - setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4i64, Custom); - setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v4i64, Custom); + if (MVT(VT).getSizeInBits() == 128) { + setOperationAction(ISD::EXTRACT_SUBVECTOR, VT, Custom); + } + else if (MVT(VT).getSizeInBits() == 256) { + setOperationAction(ISD::INSERT_SUBVECTOR, VT, Custom); + } } -#endif - -#if 0 - // Not sure we want to do this since there are no 256-bit integer - // operations in AVX - // Promote v32i8, v16i16, v8i32 load, select, and, or, xor to v4i64. - // Including 256-bit vectors - for (unsigned i = (unsigned)MVT::v16i8; i != (unsigned)MVT::v4i64; i++) { - EVT VT = (MVT::SimpleValueType)i; + // Promote v32i8, v16i16, v8i32 select, and, or, xor to v4i64. + // Don't promote loads because we need them for VPERM vector index versions. - if (!VT.is256BitVector()) { + for (unsigned VT = (unsigned)MVT::FIRST_VECTOR_VALUETYPE; + VT != (unsigned)MVT::LAST_VECTOR_VALUETYPE; + VT++) { + if (!isPowerOf2_32(MVT((MVT::SimpleValueType)VT).getVectorNumElements()) + || (MVT((MVT::SimpleValueType)VT).getSizeInBits() < 256)) continue; - } - setOperationAction(ISD::AND, VT, Promote); - AddPromotedToType (ISD::AND, VT, MVT::v4i64); - setOperationAction(ISD::OR, VT, Promote); - AddPromotedToType (ISD::OR, VT, MVT::v4i64); - setOperationAction(ISD::XOR, VT, Promote); - AddPromotedToType (ISD::XOR, VT, MVT::v4i64); - setOperationAction(ISD::LOAD, VT, Promote); - AddPromotedToType (ISD::LOAD, VT, MVT::v4i64); - setOperationAction(ISD::SELECT, VT, Promote); - AddPromotedToType (ISD::SELECT, VT, MVT::v4i64); + setOperationAction(ISD::AND, (MVT::SimpleValueType)VT, Promote); + AddPromotedToType (ISD::AND, (MVT::SimpleValueType)VT, MVT::v4i64); + setOperationAction(ISD::OR, (MVT::SimpleValueType)VT, Promote); + AddPromotedToType (ISD::OR, (MVT::SimpleValueType)VT, MVT::v4i64); + setOperationAction(ISD::XOR, (MVT::SimpleValueType)VT, Promote); + AddPromotedToType (ISD::XOR, (MVT::SimpleValueType)VT, MVT::v4i64); + //setOperationAction(ISD::LOAD, (MVT::SimpleValueType)VT, Promote); + //AddPromotedToType (ISD::LOAD, (MVT::SimpleValueType)VT, MVT::v4i64); + setOperationAction(ISD::SELECT, (MVT::SimpleValueType)VT, Promote); + AddPromotedToType (ISD::SELECT, (MVT::SimpleValueType)VT, MVT::v4i64); } - - setTruncStoreAction(MVT::f64, MVT::f32, Expand); -#endif } // We want to custom lower some of our intrinsics. From ofv at wanadoo.es Thu Jan 27 16:58:34 2011 From: ofv at wanadoo.es (Oscar Fuentes) Date: Thu, 27 Jan 2011 22:58:34 -0000 Subject: [llvm-commits] [llvm] r124449 - /llvm/trunk/lib/ExecutionEngine/Interpreter/CMakeLists.txt Message-ID: <20110127225834.9DA622A6C12C@llvm.org> Author: ofv Date: Thu Jan 27 16:58:34 2011 New Revision: 124449 URL: http://llvm.org/viewvc/llvm-project?rev=124449&view=rev Log: Use the paths to libffi's header and library even when no custom location was stated with FFI_INCLUDE_DIR/FFI_LIBRARY_DIR. Modified: llvm/trunk/lib/ExecutionEngine/Interpreter/CMakeLists.txt Modified: llvm/trunk/lib/ExecutionEngine/Interpreter/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/Interpreter/CMakeLists.txt?rev=124449&r1=124448&r2=124449&view=diff ============================================================================== --- llvm/trunk/lib/ExecutionEngine/Interpreter/CMakeLists.txt (original) +++ llvm/trunk/lib/ExecutionEngine/Interpreter/CMakeLists.txt Thu Jan 27 16:58:34 2011 @@ -1,12 +1,16 @@ -# If the user required a custom path for ffi headers, use it on its -# abolute form (see config-ix.cmake): -if( FFI_INCLUDE_DIR ) +# Make sure that the path to libffi headers is on the command +# line. That path can be a compiler's non-default path even when +# FFI_INCLUDE_DIR was not used, because cmake has its own paths for +# searching for headers (CMAKE_SYSTEM_INCLUDE_PATH, for instance): +if( FFI_INCLUDE_PATH ) include_directories( ${FFI_INCLUDE_PATH} ) endif() -# If the user required a custom path for libffi, use it on its abolute -# form (see config-ix.cmake): -if( FFI_LIBRARY_DIR ) +# Make sure that the path to libffi archive is on the command +# line. That path can be a linker's non-default path even when +# FFI_LIBRARY_DIR was not used, because cmake has its own paths for +# searching for libraries (CMAKE_SYSTEM_LIBRARY_PATH, for instance): +if( FFI_LIBRARY_PATH ) link_directories( ${FFI_LIBRARY_PATH} ) endif() From bob.wilson at apple.com Thu Jan 27 17:08:52 2011 From: bob.wilson at apple.com (Bob Wilson) Date: Thu, 27 Jan 2011 23:08:52 -0000 Subject: [llvm-commits] [llvm] r124450 - /llvm/trunk/utils/TableGen/CodeEmitterGen.cpp Message-ID: <20110127230852.CD65C2A6C12C@llvm.org> Author: bwilson Date: Thu Jan 27 17:08:52 2011 New Revision: 124450 URL: http://llvm.org/viewvc/llvm-project?rev=124450&view=rev Log: Fix a comment typo. Modified: llvm/trunk/utils/TableGen/CodeEmitterGen.cpp Modified: llvm/trunk/utils/TableGen/CodeEmitterGen.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeEmitterGen.cpp?rev=124450&r1=124449&r2=124450&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/CodeEmitterGen.cpp (original) +++ llvm/trunk/utils/TableGen/CodeEmitterGen.cpp Thu Jan 27 17:08:52 2011 @@ -142,7 +142,7 @@ continue; } - // Figure out the consequtive range of bits covered by this operand, in + // Figure out the consecutive range of bits covered by this operand, in // order to generate better encoding code. int beginInstBit = bit; int beginVarBit = varBit; From enderby at apple.com Thu Jan 27 17:22:36 2011 From: enderby at apple.com (Kevin Enderby) Date: Thu, 27 Jan 2011 23:22:36 -0000 Subject: [llvm-commits] [llvm] r124454 - /llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Message-ID: <20110127232236.EAB9C2A6C12C@llvm.org> Author: enderby Date: Thu Jan 27 17:22:36 2011 New Revision: 124454 URL: http://llvm.org/viewvc/llvm-project?rev=124454&view=rev Log: Changed llvm-mc arm target to give an error if .syntax divided is used. Since only .syntax unified is supported. Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp?rev=124454&r1=124453&r2=124454&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp (original) +++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Thu Jan 27 17:22:36 2011 @@ -1481,7 +1481,7 @@ if (Mode == "unified" || Mode == "UNIFIED") Parser.Lex(); else if (Mode == "divided" || Mode == "DIVIDED") - Parser.Lex(); + return Error(L, "'.syntax divided' arm asssembly not supported"); else return Error(L, "unrecognized syntax mode in .syntax directive"); From david_dean at apple.com Thu Jan 27 17:42:34 2011 From: david_dean at apple.com (David Dean) Date: Thu, 27 Jan 2011 23:42:34 -0000 Subject: [llvm-commits] [zorg] r124457 - in /zorg/trunk/buildbot/llvmlab/master: config/builders.py config/slaves.py state.sqlite Message-ID: <20110127234234.208F62A6C12C@llvm.org> Author: ddean Date: Thu Jan 27 17:42:33 2011 New Revision: 124457 URL: http://llvm.org/viewvc/llvm-project?rev=124457&view=rev Log: force phase runners to run on same machine as phase1 to prevent multiple simultaneous runs, also needed to increase number of jobs and threads at the same time, also removed uneccessary binary file Removed: zorg/trunk/buildbot/llvmlab/master/state.sqlite Modified: zorg/trunk/buildbot/llvmlab/master/config/builders.py zorg/trunk/buildbot/llvmlab/master/config/slaves.py Modified: zorg/trunk/buildbot/llvmlab/master/config/builders.py URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/buildbot/llvmlab/master/config/builders.py?rev=124457&r1=124456&r2=124457&view=diff ============================================================================== --- zorg/trunk/buildbot/llvmlab/master/config/builders.py (original) +++ zorg/trunk/buildbot/llvmlab/master/config/builders.py Thu Jan 27 17:42:33 2011 @@ -504,12 +504,9 @@ typeR = 'Release' typeRA = 'Release+Asserts' phase1_slave = 'llvmlab.local' - #phase2_slaves = [ 'leone.apple.com', 'dtqa09.apple.com' ] - #phaseRunners = [ 'leone.apple.com', 'dtqa09.apple.com' ] snow_leopard_slaves = all_slaves - barolo_slaves = [] + phaseRunners = [phase1_slave] phase2_slaves = filter(lambda x:x not in [phase1_slave], snow_leopard_slaves) - phaseRunners = filter(lambda x:x not in [phase1_slave], snow_leopard_slaves) return [ #Build to announce good build and prepare potential release candidate { 'name' : 'Validated Build', Modified: zorg/trunk/buildbot/llvmlab/master/config/slaves.py URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/buildbot/llvmlab/master/config/slaves.py?rev=124457&r1=124456&r2=124457&view=diff ============================================================================== --- zorg/trunk/buildbot/llvmlab/master/config/slaves.py (original) +++ zorg/trunk/buildbot/llvmlab/master/config/slaves.py Thu Jan 27 17:42:33 2011 @@ -9,8 +9,8 @@ def get_build_slaves(): yield create_slave("llvmlab.local", notify_on_missing="david_dean at apple.com", - properties = { 'jobs' : 4 }, - max_builds = 1) + properties = { 'jobs' : 16 }, + max_builds = 16) yield create_slave("lab-mini-01.local", notify_on_missing="david_dean at apple.com", properties = { 'jobs' : 2 }, Removed: zorg/trunk/buildbot/llvmlab/master/state.sqlite URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/buildbot/llvmlab/master/state.sqlite?rev=124456&view=auto ============================================================================== Binary file - no diff available. From evan.cheng at apple.com Thu Jan 27 17:48:34 2011 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 27 Jan 2011 23:48:34 -0000 Subject: [llvm-commits] [llvm] r124458 - in /llvm/trunk: lib/Target/ARM/ARMInstrInfo.td test/MC/ARM/prefetch.ll Message-ID: <20110127234834.E27022A6C12C@llvm.org> Author: evancheng Date: Thu Jan 27 17:48:34 2011 New Revision: 124458 URL: http://llvm.org/viewvc/llvm-project?rev=124458&view=rev Log: Fix PLD encoding. Added: llvm/trunk/test/MC/ARM/prefetch.ll Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=124458&r1=124457&r2=124458&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Thu Jan 27 17:48:34 2011 @@ -1107,14 +1107,13 @@ let Inst{22} = read; let Inst{21-20} = 0b01; let Inst{19-16} = addr{16-13}; // Rn - let Inst{15-12} = Rt; + let Inst{15-12} = 0b1111; let Inst{11-0} = addr{11-0}; // imm12 } def rs : AXI<(outs), (ins ldst_so_reg:$shift), MiscFrm, IIC_Preload, !strconcat(opc, "\t$shift"), [(ARMPreload ldst_so_reg:$shift, (i32 read), (i32 data))]> { - bits<4> Rt; bits<17> shift; let Inst{31-26} = 0b111101; let Inst{25} = 1; // 1 for register form @@ -1123,6 +1122,7 @@ let Inst{22} = read; let Inst{21-20} = 0b01; let Inst{19-16} = shift{16-13}; // Rn + let Inst{15-12} = 0b1111; let Inst{11-0} = shift{11-0}; } } Added: llvm/trunk/test/MC/ARM/prefetch.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/prefetch.ll?rev=124458&view=auto ============================================================================== --- llvm/trunk/test/MC/ARM/prefetch.ll (added) +++ llvm/trunk/test/MC/ARM/prefetch.ll Thu Jan 27 17:48:34 2011 @@ -0,0 +1,58 @@ +; RUN: llc < %s -march=arm -mattr=+v7a,+mp -show-mc-encoding | FileCheck %s -check-prefix=ARM +; RUN: llc < %s -march=thumb -mattr=+v7a -show-mc-encoding | FileCheck %s -check-prefix=T2 +; rdar://8924681 + +define void @t1(i8* %ptr) nounwind { +entry: +; ARM: t1: +; ARM: pldw [r0] @ encoding: [0x00,0xf0,0x90,0xf5] +; ARM: pld [r0] @ encoding: [0x00,0xf0,0xd0,0xf5] + +; T2: t1: +; T2: pld [r0] @ encoding: [0x90,0xf8,0x00,0xf0] + tail call void @llvm.prefetch( i8* %ptr, i32 1, i32 3 ) + tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3 ) + ret void +} + +define void @t2(i8* %ptr) nounwind { +entry: +; ARM: t2: +; ARM: pld [r0, #1023] @ encoding: [0xff,0xf3,0xd0,0xf5] + +; T2: t2: +; T2: pld [r0, #1023] @ encoding: [0x90,0xf8,0xff,0xf3] + %tmp = getelementptr i8* %ptr, i32 1023 + tail call void @llvm.prefetch( i8* %tmp, i32 0, i32 3 ) + ret void +} + +define void @t3(i32 %base, i32 %offset) nounwind { +entry: +; ARM: t3: +; ARM: pld [r0, r1, lsr #2] @ encoding: [0x21,0xf1,0xd0,0xf7] + +; T2: t3: +; T2: pld [r0, r1] @ encoding: [0x10,0xf8,0x01,0xf0] + %tmp1 = lshr i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i8* + tail call void @llvm.prefetch( i8* %tmp3, i32 0, i32 3 ) + ret void +} + +define void @t4(i32 %base, i32 %offset) nounwind { +entry: +; ARM: t4: +; ARM: pld [r0, r1, lsl #2] @ encoding: [0x01,0xf1,0xd0,0xf7] + +; T2: t4: +; T2: pld [r0, r1, lsl #2] @ encoding: [0x10,0xf8,0x21,0xf0] + %tmp1 = shl i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i8* + tail call void @llvm.prefetch( i8* %tmp3, i32 0, i32 3 ) + ret void +} + +declare void @llvm.prefetch(i8*, i32, i32) nounwind From geek4civic at gmail.com Thu Jan 27 19:34:27 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Fri, 28 Jan 2011 10:34:27 +0900 Subject: [llvm-commits] [llvm] r124458 - in /llvm/trunk: lib/Target/ARM/ARMInstrInfo.td test/MC/ARM/prefetch.ll In-Reply-To: <20110127234834.E27022A6C12C@llvm.org> References: <20110127234834.E27022A6C12C@llvm.org> Message-ID: 2011/1/28 Evan Cheng : > Author: evancheng > Date: Thu Jan 27 17:48:34 2011 > New Revision: 124458 > > URL: http://llvm.org/viewvc/llvm-project?rev=124458&view=rev > Log: > Fix PLD encoding. > --- llvm/trunk/test/MC/ARM/prefetch.ll (added) > +++ llvm/trunk/test/MC/ARM/prefetch.ll Thu Jan 27 17:48:34 2011 > @@ -0,0 +1,58 @@ > +; RUN: llc < %s -march=arm ? -mattr=+v7a,+mp -show-mc-encoding | FileCheck %s -check-prefix=ARM > +; RUN: llc < %s -march=thumb -mattr=+v7a ? ? -show-mc-encoding | FileCheck %s -check-prefix=T2 On Win32 host, The triplet would be inferred like "arm-mingw32", and it would fail due to PECOFF's unsupported. I would be happy if explicit triplets were there. Or, shall we implement "{arm|thumb}-pecoff"? :p ...Takumi From aggarwa4 at illinois.edu Thu Jan 27 20:08:59 2011 From: aggarwa4 at illinois.edu (Arushi Aggarwal) Date: Fri, 28 Jan 2011 02:08:59 -0000 Subject: [llvm-commits] [poolalloc] r124461 - in /poolalloc/trunk/test/dsa/td: mergeArgs.ll mergeArgs1.ll Message-ID: <20110128020900.000C02A6C12C@llvm.org> Author: aggarwa4 Date: Thu Jan 27 20:08:59 2011 New Revision: 124461 URL: http://llvm.org/viewvc/llvm-project?rev=124461&view=rev Log: Add more tests to check that TD correctly merges nodes for formal arguments, if same actual argument is passed in. Added: poolalloc/trunk/test/dsa/td/mergeArgs.ll poolalloc/trunk/test/dsa/td/mergeArgs1.ll Added: poolalloc/trunk/test/dsa/td/mergeArgs.ll URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/test/dsa/td/mergeArgs.ll?rev=124461&view=auto ============================================================================== --- poolalloc/trunk/test/dsa/td/mergeArgs.ll (added) +++ poolalloc/trunk/test/dsa/td/mergeArgs.ll Thu Jan 27 20:08:59 2011 @@ -0,0 +1,47 @@ +; Pass same pointer(from main) as 2 different args to func +; The formal args to func do not alias in func +; Verify that the node is merged in TD + +;RUN: dsaopt %s -dsa-td -analyze -check-same-node=func:arg1,func:arg2 +;RUN: dsaopt %s -dsa-bu -analyze -check-not-same-node=func:arg1,func:arg2 + +; ModuleID = 'mergeArgs.o' +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-unknown-linux-gnu" + +define void @func(i32* %arg1, i32* %arg2) nounwind { +entry: + %arg1_addr = alloca i32* ; [#uses=2] + %arg2_addr = alloca i32* ; [#uses=2] + %"alloca point" = bitcast i32 0 to i32 ; [#uses=0] + store i32* %arg1, i32** %arg1_addr + store i32* %arg2, i32** %arg2_addr + %0 = load i32** %arg1_addr, align 8 ; [#uses=1] + store i32 1, i32* %0, align 4 + %1 = load i32** %arg2_addr, align 8 ; [#uses=1] + store i32 2, i32* %1, align 4 + br label %return + +return: ; preds = %entry + ret void +} + +define i32 @main() nounwind { +entry: + %retval = alloca i32 ; [#uses=1] + %p = alloca i32* ; [#uses=3] + %"alloca point" = bitcast i32 0 to i32 ; [#uses=0] + %0 = call noalias i8* @malloc(i64 4) nounwind ; [#uses=1] + %1 = bitcast i8* %0 to i32* ; [#uses=1] + store i32* %1, i32** %p, align 8 + %2 = load i32** %p, align 8 ; [#uses=1] + %3 = load i32** %p, align 8 ; [#uses=1] + call void @func(i32* %2, i32* %3) nounwind + br label %return + +return: ; preds = %entry + %retval1 = load i32* %retval ; [#uses=1] + ret i32 %retval1 +} + +declare noalias i8* @malloc(i64) nounwind Added: poolalloc/trunk/test/dsa/td/mergeArgs1.ll URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/test/dsa/td/mergeArgs1.ll?rev=124461&view=auto ============================================================================== --- poolalloc/trunk/test/dsa/td/mergeArgs1.ll (added) +++ poolalloc/trunk/test/dsa/td/mergeArgs1.ll Thu Jan 27 20:08:59 2011 @@ -0,0 +1,47 @@ +; Pass same pointer(from main) as 2 different args to func +; The formal args to func do not alias in func +; Verify that the node is merged in TD + +;RUN: dsaopt %s -dsa-td -analyze -check-same-node=func:arg1:0,func:arg2 +;RUN: dsaopt %s -dsa-bu -analyze -check-not-same-node=func:arg1:0,func:arg2 + +; ModuleID = 'mergeArgs.o' +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-unknown-linux-gnu" + +define void @func(i32** %arg1, i32* %arg2) nounwind { +entry: + %arg1_addr = alloca i32** ; [#uses=2] + %arg2_addr = alloca i32* ; [#uses=2] + %"alloca point" = bitcast i32 0 to i32 ; [#uses=0] + store i32** %arg1, i32*** %arg1_addr + store i32* %arg2, i32** %arg2_addr + %0 = load i32*** %arg1_addr, align 8 ; [#uses=1] + %1 = load i32** %0, align 8 ; [#uses=1] + store i32 1, i32* %1, align 4 + %2 = load i32** %arg2_addr, align 8 ; [#uses=1] + store i32 2, i32* %2, align 4 + br label %return + +return: ; preds = %entry + ret void +} + +define i32 @main() nounwind { +entry: + %retval = alloca i32 ; [#uses=1] + %p = alloca i32* ; [#uses=3] + %"alloca point" = bitcast i32 0 to i32 ; [#uses=0] + %0 = call noalias i8* @malloc(i64 4) nounwind ; [#uses=1] + %1 = bitcast i8* %0 to i32* ; [#uses=1] + store i32* %1, i32** %p, align 8 + %2 = load i32** %p, align 8 ; [#uses=1] + call void @func(i32** %p, i32* %2) nounwind + br label %return + +return: ; preds = %entry + %retval1 = load i32* %retval ; [#uses=1] + ret i32 %retval1 +} + +declare noalias i8* @malloc(i64) nounwind From evan.cheng at apple.com Thu Jan 27 20:19:21 2011 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 28 Jan 2011 02:19:21 -0000 Subject: [llvm-commits] [llvm] r124462 - in /llvm/trunk: lib/CodeGen/TailDuplication.cpp lib/Transforms/Utils/SimplifyCFG.cpp test/CodeGen/X86/critical-edge-split.ll test/CodeGen/X86/loop-blocks.ll test/Transforms/JumpThreading/and-and-cond.ll test/Transforms/JumpThreading/and-cond.ll test/Transforms/JumpThreading/thread-loads.ll test/Transforms/SimplifyCFG/MagicPointer.ll test/Transforms/SimplifyCFG/basictest.ll test/Transforms/SimplifyCFG/switch_create.ll test/Transforms/SimplifyCFG/switch_formation.dbg.ll Message-ID: <20110128021921.DAA1C2A6C12C@llvm.org> Author: evancheng Date: Thu Jan 27 20:19:21 2011 New Revision: 124462 URL: http://llvm.org/viewvc/llvm-project?rev=124462&view=rev Log: - Stop simplifycfg from duplicating "ret" instructions into unconditional branches. PR8575, rdar://5134905, rdar://8911460. - Allow codegen tail duplication to dup small return blocks after register allocation is done. Removed: llvm/trunk/test/CodeGen/X86/critical-edge-split.ll Modified: llvm/trunk/lib/CodeGen/TailDuplication.cpp llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp llvm/trunk/test/CodeGen/X86/loop-blocks.ll llvm/trunk/test/Transforms/JumpThreading/and-and-cond.ll llvm/trunk/test/Transforms/JumpThreading/and-cond.ll llvm/trunk/test/Transforms/JumpThreading/thread-loads.ll llvm/trunk/test/Transforms/SimplifyCFG/MagicPointer.ll llvm/trunk/test/Transforms/SimplifyCFG/basictest.ll llvm/trunk/test/Transforms/SimplifyCFG/switch_create.ll llvm/trunk/test/Transforms/SimplifyCFG/switch_formation.dbg.ll Modified: llvm/trunk/lib/CodeGen/TailDuplication.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TailDuplication.cpp?rev=124462&r1=124461&r2=124462&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/TailDuplication.cpp (original) +++ llvm/trunk/lib/CodeGen/TailDuplication.cpp Thu Jan 27 20:19:21 2011 @@ -465,9 +465,12 @@ MaxDuplicateCount = TailDuplicateSize; if (PreRegAlloc) { - // Pre-regalloc tail duplication hurts compile time and doesn't help - // much except for indirect branches. - if (TailBB->empty() || !TailBB->back().getDesc().isIndirectBranch()) + if (TailBB->empty()) + return false; + const TargetInstrDesc &TID = TailBB->back().getDesc(); + // Pre-regalloc tail duplication hurts compile time and doesn't help + // much except for indirect branches and returns. + if (!TID.isIndirectBranch() && !TID.isReturn()) return false; // If the target has hardware branch prediction that can handle indirect // branches, duplicating them can often make them predictable when there @@ -502,7 +505,7 @@ } // Heuristically, don't tail-duplicate calls if it would expand code size, // as it's less likely to be worth the extra cost. - if (InstrCount > 1 && HasCall) + if (InstrCount > 1 && (PreRegAlloc && HasCall)) return false; DEBUG(dbgs() << "\n*** Tail-duplicating BB#" << TailBB->getNumber() << '\n'); Modified: llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp?rev=124462&r1=124461&r2=124462&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp Thu Jan 27 20:19:21 2011 @@ -28,6 +28,7 @@ #include "llvm/ADT/Statistic.h" #include "llvm/ADT/STLExtras.h" #include "llvm/Support/CFG.h" +#include "llvm/Support/CommandLine.h" #include "llvm/Support/ConstantRange.h" #include "llvm/Support/Debug.h" #include "llvm/Support/raw_ostream.h" @@ -36,6 +37,10 @@ #include using namespace llvm; +static cl::opt +DupRet("simplifycfg-dup-ret", cl::Hidden, cl::init(false), + cl::desc("Duplicate return instructions into unconditional branches")); + STATISTIC(NumSpeculations, "Number of speculative executed instructions"); namespace { @@ -2027,7 +2032,7 @@ } // If we found some, do the transformation! - if (!UncondBranchPreds.empty()) { + if (!UncondBranchPreds.empty() && DupRet) { while (!UncondBranchPreds.empty()) { BasicBlock *Pred = UncondBranchPreds.pop_back_val(); DEBUG(dbgs() << "FOLDING: " << *BB Removed: llvm/trunk/test/CodeGen/X86/critical-edge-split.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/critical-edge-split.ll?rev=124461&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/critical-edge-split.ll (original) +++ llvm/trunk/test/CodeGen/X86/critical-edge-split.ll (removed) @@ -1,50 +0,0 @@ -; RUN: llc < %s -mtriple=i386-apple-darwin -o /dev/null -stats -info-output-file - | grep asm-printer | grep 29 - - %CC = type { %Register } - %II = type { %"struct.XX::II::$_74" } - %JITFunction = type %YYValue* (%CC*, %YYValue**) - %YYValue = type { i32 (...)** } - %Register = type { %"struct.XX::ByteCodeFeatures" } - %"struct.XX::ByteCodeFeatures" = type { i32 } - %"struct.XX::II::$_74" = type { i8* } - at llvm.used = appending global [1 x i8*] [ i8* bitcast (%JITFunction* @loop to i8*) ], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0] - -define %YYValue* @loop(%CC*, %YYValue**) nounwind { -;