From anton at korobeynikov.info Mon Feb 7 01:26:43 2011 From: anton at korobeynikov.info (Anton Korobeynikov) Date: Mon, 7 Feb 2011 10:26:43 +0300 Subject: [llvm-commits] [llvm] r124995 - in /llvm/trunk: lib/Target/ARM/ARMAsmPrinter.cpp lib/Target/ARM/ARMBuildAttrs.h test/CodeGen/ARM/2010-09-29-mc-asm-header-test.ll test/CodeGen/ARM/2010-10-19-mc-elf-objheader.ll In-Reply-To: References: <20110207004954.20D7F2A6C12C@llvm.org> Message-ID: > I am not sure what you mean here. see below. The code below this hunk does the emission of attributes basing on the subtarget features. It seems that 2/3 of the stuff you're emitting via processor-name lookup can be implemented looking over the features as well (e.g. arch version, ISA, etc.) -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University From jasonwkim at google.com Mon Feb 7 02:14:16 2011 From: jasonwkim at google.com (Jason Kim) Date: Mon, 7 Feb 2011 00:14:16 -0800 Subject: [llvm-commits] [llvm] r124995 - in /llvm/trunk: lib/Target/ARM/ARMAsmPrinter.cpp lib/Target/ARM/ARMBuildAttrs.h test/CodeGen/ARM/2010-09-29-mc-asm-header-test.ll test/CodeGen/ARM/2010-10-19-mc-elf-objheader.ll In-Reply-To: References: <20110207004954.20D7F2A6C12C@llvm.org> Message-ID: On Sun, Feb 6, 2011 at 11:26 PM, Anton Korobeynikov wrote: >> I am not sure what you mean here. see below. > The code below this hunk does the emission of attributes basing on the > subtarget features. It seems that 2/3 of the stuff you're emitting via > processor-name lookup can be implemented looking over the features as > well (e.g. arch version, ISA, etc.) Ahh. Good point. Certainly seems worth while to go that way. I needed to get one corner case (cortexa8) working for testing purposes, which were a set of defaults in the .s -> .o case from gcc depending solely upon .cpu name - (it didn't look like cpu name by itself sets any subtarget features on llvm, so I guess that needs to be coded first ?) thanks! -jason > > -- > With best regards, Anton Korobeynikov > Faculty of Mathematics and Mechanics, Saint Petersburg State University > From echristo at apple.com Mon Feb 7 02:20:47 2011 From: echristo at apple.com (Eric Christopher) Date: Mon, 7 Feb 2011 00:20:47 -0800 Subject: [llvm-commits] _WIN32_WINNT as predefined (was Re: [Review request][Win64] Patches for Mingw-w64(and mingw64-clang)) In-Reply-To: References: Message-ID: <183A72A7-350D-4E88-9925-B826BBD55BE6@apple.com> On Feb 6, 2011, at 6:06 PM, NAKAMURA Takumi wrote: > Anton gave me a comment on the github for: > * 0004-lib-Support-Windows-Windows.h-Autoconf-provides-.patch.txt >> View Commit: https://github.com/chapuni/LLVM/commit/45be38ca409cbbdf2b63be2eaf7bf230aa9d6b38 > >> I don't think this is a good way of doing thing. You're passing platform-dependent macros to all files, even those which do not include windows.h. These #define's should be localized in windows-only places (e.g. libSupport) > > In the case of mingw-w64, _WIN32_WINNT would be defined (as 0x0502) by > system headers even if we did not provide predefined _WIN32_WINNT. In > reverse, predefined _WIN32_WINNT might affect to system headers on > mingw-w64. > > IMHO, _WIN32_WINNT (and similar) is not "platform-dependent macro". I > think it could be done even if _WIN32_WINNT were defined on command > line (-D_WIN32_WINNT=0x0500). > > Similarly, I think, also, _GNU_SOURCE could be defined in config.h > (not llvm-config.h). > and definitions in command line might be reduced as possible. > I don't like that way of doing it necessarily either, though it's not any worse than having a windows only include. Is there some reason why you'd need to have all of those defines in every file that includes config.h as opposed to just doing some work in libSupport as Anton suggests? > May I reopen PR7809 - TargetSelect.h shouldn't include llvm/Config/config.h ? > http://llvm.org/bugs/show_bug.cgi?id=7809 > In TOT, a few headers depend on llvm/Config/config.h. No, don't reopen that bug. It isn't related as far as I know unless it's a public header including config.h. -eric From anton at korobeynikov.info Mon Feb 7 02:39:15 2011 From: anton at korobeynikov.info (Anton Korobeynikov) Date: Mon, 7 Feb 2011 11:39:15 +0300 Subject: [llvm-commits] [llvm] r124995 - in /llvm/trunk: lib/Target/ARM/ARMAsmPrinter.cpp lib/Target/ARM/ARMBuildAttrs.h test/CodeGen/ARM/2010-09-29-mc-asm-header-test.ll test/CodeGen/ARM/2010-10-19-mc-elf-objheader.ll In-Reply-To: References: <20110207004954.20D7F2A6C12C@llvm.org> Message-ID: > (it didn't look like cpu name by itself sets any subtarget features on > llvm, so I guess that needs to be coded first ?) It definitely sets the full set of features. How else, for example, neon codegen works with just -mcpu=cortex-a8 w/o explicit -mattr=+neon :) -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University From geek4civic at gmail.com Mon Feb 7 02:47:27 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Mon, 7 Feb 2011 17:47:27 +0900 Subject: [llvm-commits] _WIN32_WINNT as predefined (was Re: [Review request][Win64] Patches for Mingw-w64(and mingw64-clang)) In-Reply-To: <183A72A7-350D-4E88-9925-B826BBD55BE6@apple.com> References: <183A72A7-350D-4E88-9925-B826BBD55BE6@apple.com> Message-ID: Eric, thanks to give me comments. 2011/2/7 Eric Christopher : > I don't like that way of doing it necessarily either, though it's not any worse than having a windows only include. Is there some reason why you'd need to have all of those defines in every file that includes config.h as opposed to just doing some work in libSupport as Anton suggests? I would like to let configure predefined macros recognized, to work with AC_CHECK_DECL. I thought it might be smarter, though, I have got two objections ;) I would suggest to use AC_GNU_SOURCE, too. (It also inserts _GNU_SOURCE to config.h.in.) I will rewrite my patches w/o modifying autoconf's style, later. >> May I reopen PR7809 - TargetSelect.h shouldn't include llvm/Config/config.h ? >> http://llvm.org/bugs/show_bug.cgi?id=7809 >> In TOT, a few headers depend on llvm/Config/config.h. > No, don't reopen that bug. It isn't related as far as I know unless it's a public header including config.h. Excuse me, it was not related directly to this article. On TOT, I saw a few dependencies to config.h. Is there no issue? ../install-llvm/include/clang/Basic/FileManager.h ../install-llvm/include/llvm/Support/Endian.h ../install-llvm/include/llvm/Support/system_error.h ../install-llvm/include/llvm/Support/FEnv.h ...Takumi From anton at korobeynikov.info Mon Feb 7 02:56:47 2011 From: anton at korobeynikov.info (Anton Korobeynikov) Date: Mon, 7 Feb 2011 11:56:47 +0300 Subject: [llvm-commits] _WIN32_WINNT as predefined (was Re: [Review request][Win64] Patches for Mingw-w64(and mingw64-clang)) In-Reply-To: References: Message-ID: Hello Takumi, > In the case of mingw-w64, _WIN32_WINNT would be defined (as 0x0502) by > system headers even if we did not provide predefined _WIN32_WINNT. In > reverse, predefined _WIN32_WINNT might affect to system headers on > mingw-w64. If system headers have all necessary stuff defined why should be bother defining them? Could you please clarify what is the problem you're trying to solve here? It might allow everyone better understand the needs, etc. -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University From baldrick at free.fr Mon Feb 7 03:15:49 2011 From: baldrick at free.fr (Duncan Sands) Date: Mon, 07 Feb 2011 10:15:49 +0100 Subject: [llvm-commits] [llvm] r124992 - in /llvm/trunk: docs/LangRef.html include/llvm/Bitcode/LLVMBitCodes.h include/llvm/Constants.h include/llvm/InstrTypes.h include/llvm/Operator.h lib/AsmParser/LLParser.cpp lib/Bitcode/Reader/BitcodeReader.cpp lib/Bitcode/Writer/BitcodeWriter.cpp lib/Transforms/InstCombine/InstCombineMulDivRem.cpp lib/VMCore/AsmWriter.cpp lib/VMCore/Constants.cpp lib/VMCore/Instructions.cpp test/Assembler/flags.ll test/Transforms/InstCombine/exact-sdiv.ll test/Transforms/InstCombine/exact.ll In-Reply-To: <20110206214457.DEE1A2A6C12C@llvm.org> References: <20110206214457.DEE1A2A6C12C@llvm.org> Message-ID: <4D4FB845.7000901@free.fr> Hi Chris, > enhance vmcore to know that udiv's can be exact, and add a trivial > instcombine xform to exercise this. thanks for doing this - the lack of exact udiv has been on my list of pet hates for a while :) Ciao, Duncan. From baldrick at free.fr Mon Feb 7 03:21:52 2011 From: baldrick at free.fr (Duncan Sands) Date: Mon, 07 Feb 2011 09:21:52 -0000 Subject: [llvm-commits] [llvm] r125002 - in /llvm/trunk/include/llvm: InstrTypes.h Operator.h Support/ConstantFolder.h Support/IRBuilder.h Support/NoFolder.h Support/TargetFolder.h Message-ID: <20110207092153.0FF162A6C12D@llvm.org> Author: baldrick Date: Mon Feb 7 03:21:52 2011 New Revision: 125002 URL: http://llvm.org/viewvc/llvm-project?rev=125002&view=rev Log: Add IRBuilder methods for creating an exact udiv, like for exact sdiv. Modified: llvm/trunk/include/llvm/InstrTypes.h llvm/trunk/include/llvm/Operator.h llvm/trunk/include/llvm/Support/ConstantFolder.h llvm/trunk/include/llvm/Support/IRBuilder.h llvm/trunk/include/llvm/Support/NoFolder.h llvm/trunk/include/llvm/Support/TargetFolder.h Modified: llvm/trunk/include/llvm/InstrTypes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/InstrTypes.h?rev=125002&r1=125001&r2=125002&view=diff ============================================================================== --- llvm/trunk/include/llvm/InstrTypes.h (original) +++ llvm/trunk/include/llvm/InstrTypes.h Mon Feb 7 03:21:52 2011 @@ -321,6 +321,27 @@ return BO; } + /// CreateExactUDiv - Create a UDiv operator with the exact flag set. + /// + static BinaryOperator *CreateExactUDiv(Value *V1, Value *V2, + const Twine &Name = "") { + BinaryOperator *BO = CreateUDiv(V1, V2, Name); + BO->setIsExact(true); + return BO; + } + static BinaryOperator *CreateExactUDiv(Value *V1, Value *V2, + const Twine &Name, BasicBlock *BB) { + BinaryOperator *BO = CreateUDiv(V1, V2, Name, BB); + BO->setIsExact(true); + return BO; + } + static BinaryOperator *CreateExactUDiv(Value *V1, Value *V2, + const Twine &Name, Instruction *I) { + BinaryOperator *BO = CreateUDiv(V1, V2, Name, I); + BO->setIsExact(true); + return BO; + } + /// CreateExactSDiv - Create an SDiv operator with the exact flag set. /// static BinaryOperator *CreateExactSDiv(Value *V1, Value *V2, Modified: llvm/trunk/include/llvm/Operator.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Operator.h?rev=125002&r1=125001&r2=125002&view=diff ============================================================================== --- llvm/trunk/include/llvm/Operator.h (original) +++ llvm/trunk/include/llvm/Operator.h Mon Feb 7 03:21:52 2011 @@ -228,7 +228,7 @@ } }; -/// UDivOperator - An Operator with opcode Instruction::SDiv. +/// UDivOperator - An Operator with opcode Instruction::UDiv. /// class UDivOperator : public PossiblyExactOperator { public: Modified: llvm/trunk/include/llvm/Support/ConstantFolder.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/ConstantFolder.h?rev=125002&r1=125001&r2=125002&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/ConstantFolder.h (original) +++ llvm/trunk/include/llvm/Support/ConstantFolder.h Mon Feb 7 03:21:52 2011 @@ -72,6 +72,9 @@ Constant *CreateUDiv(Constant *LHS, Constant *RHS) const { return ConstantExpr::getUDiv(LHS, RHS); } + Constant *CreateExactUDiv(Constant *LHS, Constant *RHS) const { + return ConstantExpr::getExactUDiv(LHS, RHS); + } Constant *CreateSDiv(Constant *LHS, Constant *RHS) const { return ConstantExpr::getSDiv(LHS, RHS); } Modified: llvm/trunk/include/llvm/Support/IRBuilder.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/IRBuilder.h?rev=125002&r1=125001&r2=125002&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/IRBuilder.h (original) +++ llvm/trunk/include/llvm/Support/IRBuilder.h Mon Feb 7 03:21:52 2011 @@ -527,6 +527,12 @@ return Insert(Folder.CreateUDiv(LC, RC), Name); return Insert(BinaryOperator::CreateUDiv(LHS, RHS), Name); } + Value *CreateExactUDiv(Value *LHS, Value *RHS, const Twine &Name = "") { + if (Constant *LC = dyn_cast(LHS)) + if (Constant *RC = dyn_cast(RHS)) + return Insert(Folder.CreateExactUDiv(LC, RC), Name); + return Insert(BinaryOperator::CreateExactUDiv(LHS, RHS), Name); + } Value *CreateSDiv(Value *LHS, Value *RHS, const Twine &Name = "") { if (Constant *LC = dyn_cast(LHS)) if (Constant *RC = dyn_cast(RHS)) Modified: llvm/trunk/include/llvm/Support/NoFolder.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/NoFolder.h?rev=125002&r1=125001&r2=125002&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/NoFolder.h (original) +++ llvm/trunk/include/llvm/Support/NoFolder.h Mon Feb 7 03:21:52 2011 @@ -77,6 +77,9 @@ Instruction *CreateUDiv(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateUDiv(LHS, RHS); } + Instruction *CreateExactUDiv(Constant *LHS, Constant *RHS) const { + return BinaryOperator::CreateExactUDiv(LHS, RHS); + } Instruction *CreateSDiv(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateSDiv(LHS, RHS); } Modified: llvm/trunk/include/llvm/Support/TargetFolder.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/TargetFolder.h?rev=125002&r1=125001&r2=125002&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/TargetFolder.h (original) +++ llvm/trunk/include/llvm/Support/TargetFolder.h Mon Feb 7 03:21:52 2011 @@ -85,6 +85,9 @@ Constant *CreateUDiv(Constant *LHS, Constant *RHS) const { return Fold(ConstantExpr::getUDiv(LHS, RHS)); } + Constant *CreateExactUDiv(Constant *LHS, Constant *RHS) const { + return Fold(ConstantExpr::getExactUDiv(LHS, RHS)); + } Constant *CreateSDiv(Constant *LHS, Constant *RHS) const { return Fold(ConstantExpr::getSDiv(LHS, RHS)); } From baldrick at free.fr Mon Feb 7 03:22:26 2011 From: baldrick at free.fr (Duncan Sands) Date: Mon, 07 Feb 2011 09:22:26 -0000 Subject: [llvm-commits] [dragonegg] r125003 - /dragonegg/trunk/llvm-convert.cpp Message-ID: <20110207092227.055762A6C12D@llvm.org> Author: baldrick Date: Mon Feb 7 03:22:26 2011 New Revision: 125003 URL: http://llvm.org/viewvc/llvm-project?rev=125003&view=rev Log: If an unsigned division is exact, create an exact udiv. Modified: dragonegg/trunk/llvm-convert.cpp Modified: dragonegg/trunk/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/llvm-convert.cpp?rev=125003&r1=125002&r2=125003&view=diff ============================================================================== --- dragonegg/trunk/llvm-convert.cpp (original) +++ dragonegg/trunk/llvm-convert.cpp Mon Feb 7 03:22:26 2011 @@ -6665,9 +6665,9 @@ assert(LHS->getType()->isIntOrIntVectorTy() && "TRUNC_DIV_EXPR not integer!"); if (TYPE_UNSIGNED(type)) { -// if (isExact) -// return Builder.CreateExactUDiv(LHS, RHS); -// else + if (isExact) + return Builder.CreateExactUDiv(LHS, RHS); + else return Builder.CreateUDiv(LHS, RHS); } else { if (isExact) From baldrick at free.fr Mon Feb 7 03:36:32 2011 From: baldrick at free.fr (Duncan Sands) Date: Mon, 07 Feb 2011 09:36:32 -0000 Subject: [llvm-commits] [llvm] r125004 - in /llvm/trunk: include/llvm/Support/PatternMatch.h lib/Analysis/InstructionSimplify.cpp Message-ID: <20110207093632.4AD942A6C12C@llvm.org> Author: baldrick Date: Mon Feb 7 03:36:32 2011 New Revision: 125004 URL: http://llvm.org/viewvc/llvm-project?rev=125004&view=rev Log: Add an m_Div pattern for matching either a udiv or an sdiv and use it to simplify the "(X/Y)*Y->X when the division is exact" transform. Modified: llvm/trunk/include/llvm/Support/PatternMatch.h llvm/trunk/lib/Analysis/InstructionSimplify.cpp Modified: llvm/trunk/include/llvm/Support/PatternMatch.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/PatternMatch.h?rev=125004&r1=125003&r2=125004&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/PatternMatch.h (original) +++ llvm/trunk/include/llvm/Support/PatternMatch.h Mon Feb 7 03:36:32 2011 @@ -347,6 +347,40 @@ } //===----------------------------------------------------------------------===// +// Matchers for either SDiv or UDiv .. for convenience +// +template +struct Div_match { + LHS_t L; + RHS_t R; + + Div_match(const LHS_t &LHS, const RHS_t &RHS) : L(LHS), R(RHS) {} + + template + bool match(OpTy *V) { + if (V->getValueID() == Value::InstructionVal + Instruction::SDiv || + V->getValueID() == Value::InstructionVal + Instruction::UDiv) { + ConcreteTy *I = cast(V); + return (I->getOpcode() == Instruction::UDiv || + I->getOpcode() == Instruction::SDiv) && + L.match(I->getOperand(0)) && + R.match(I->getOperand(1)); + } + if (ConstantExpr *CE = dyn_cast(V)) + return (CE->getOpcode() == Instruction::SDiv || + CE->getOpcode() == Instruction::UDiv) && + L.match(CE->getOperand(0)) && + R.match(CE->getOperand(1)); + return false; + } +}; + +template +inline Div_match m_Div(const LHS &L, const RHS &R) { + return Div_match(L, R); +} + +//===----------------------------------------------------------------------===// // Matchers for binary classes // Modified: llvm/trunk/lib/Analysis/InstructionSimplify.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/InstructionSimplify.cpp?rev=125004&r1=125003&r2=125004&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/InstructionSimplify.cpp (original) +++ llvm/trunk/lib/Analysis/InstructionSimplify.cpp Mon Feb 7 03:36:32 2011 @@ -734,10 +734,8 @@ // (X / Y) * Y -> X if the division is exact. Value *X = 0, *Y = 0; - if ((match(Op0, m_SDiv(m_Value(X), m_Value(Y))) && Y == Op1) || // (X / Y) * Y - (match(Op0, m_UDiv(m_Value(X), m_Value(Y))) && Y == Op1) || - (match(Op1, m_SDiv(m_Value(X), m_Value(Y))) && Y == Op0) || // Y * (X / Y) - (match(Op1, m_UDiv(m_Value(X), m_Value(Y))) && Y == Op0)) { + if ((match(Op0, m_Div(m_Value(X), m_Value(Y))) && Y == Op1) || // (X / Y) * Y + (match(Op1, m_Div(m_Value(X), m_Value(Y))) && Y == Op0)) { // Y * (X / Y) BinaryOperator *Div = cast(Y == Op1 ? Op0 : Op1); if (Div->isExact()) return X; From Renato.Golin at arm.com Mon Feb 7 03:46:29 2011 From: Renato.Golin at arm.com (Renato Golin) Date: Mon, 7 Feb 2011 09:46:29 +0000 Subject: [llvm-commits] [llvm] r124995 - in /llvm/trunk: lib/Target/ARM/ARMAsmPrinter.cpp lib/Target/ARM/ARMBuildAttrs.h test/CodeGen/ARM/2010-09-29-mc-asm-header-test.ll test/CodeGen/ARM/2010-10-19-mc-elf-objheader.ll In-Reply-To: References: <20110207004954.20D7F2A6C12C@llvm.org> , Message-ID: Yes, it sets the full set of "default" features, which is by no means accurate. When you're emitting ASM to GAS, it won't recognize all build attributes and will, unfortunately, stick to .cpu/.fpu attributes. But, when LLVM can emit object files directly, LD will (hopefully) respect the build attributes in it. cheers, --renato ________________________________________ From: llvm-commits-bounces at cs.uiuc.edu [llvm-commits-bounces at cs.uiuc.edu] On Behalf Of Anton Korobeynikov [anton at korobeynikov.info] Sent: 07 February 2011 08:39 To: Jason Kim Cc: Jason W Kim; llvm-commits at cs.uiuc.edu Subject: Re: [llvm-commits] [llvm] r124995 - in /llvm/trunk: lib/Target/ARM/ARMAsmPrinter.cpp lib/Target/ARM/ARMBuildAttrs.h test/CodeGen/ARM/2010-09-29-mc-asm-header-test.ll test/CodeGen/ARM/2010-10-19-mc-elf-objheader.ll > (it didn't look like cpu name by itself sets any subtarget features on > llvm, so I guess that needs to be coded first ?) It definitely sets the full set of features. How else, for example, neon codegen works with just -mcpu=cortex-a8 w/o explicit -mattr=+neon :) -- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. From geek4civic at gmail.com Mon Feb 7 04:45:04 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Mon, 7 Feb 2011 19:45:04 +0900 Subject: [llvm-commits] [Review request] Tweaking Win64 Codegen In-Reply-To: References: Message-ID: Hello, > * 0003-lib-Target-X86-X86ISelLowering.cpp-Introduce-a-n.patch.txt Committed in r124948. > * 0004-Target-X86-Tweak-allocating-shadow-area-aka-home.patch.txt Committed in r124949. Approved by Anton, thank you. > * 0005-Target-X86-Tweak-alloca-and-add-a-testcase-for-m.patch.txt > * 0006-Target-X86-Tweak-va_arg-for-Win64-not-to-miss-ta.patch.txt They are pending. I am still dubious of them. They could be applied on ToT and I will repost them later. Thank you, ...Takumi From clattner at apple.com Mon Feb 7 05:45:20 2011 From: clattner at apple.com (Chris Lattner) Date: Mon, 07 Feb 2011 12:45:20 +0100 Subject: [llvm-commits] [llvm] r124992 - in /llvm/trunk: docs/LangRef.html include/llvm/Bitcode/LLVMBitCodes.h include/llvm/Constants.h include/llvm/InstrTypes.h include/llvm/Operator.h lib/AsmParser/LLParser.cpp lib/Bitcode/Reader/BitcodeReader.cpp lib/Bitcode/Writer/BitcodeWriter.cpp lib/Transforms/InstCombine/InstCombineMulDivRem.cpp lib/VMCore/AsmWriter.cpp lib/VMCore/Constants.cpp lib/VMCore/Instructions.cpp test/Assembler/flags.ll test/Transforms/InstCombine/exact-sdiv.ll test/Transforms/InstCombine/exact.ll In-Reply-To: <4D4FB845.7000901@free.fr> References: <20110206214457.DEE1A2A6C12C@llvm.org> <4D4FB845.7000901@free.fr> Message-ID: <9F70A51D-A906-480D-ACA2-D4C9A50A2CF4@apple.com> Thanks for your followon improvements. I plan to add exact to the right shifts and nsw/nuw to left shift next. -Chris On Feb 7, 2011, at 10:15 AM, Duncan Sands wrote: > Hi Chris, > >> enhance vmcore to know that udiv's can be exact, and add a trivial >> instcombine xform to exercise this. > > thanks for doing this - the lack of exact udiv has been on my list of pet hates > for a while :) > > Ciao, Duncan. > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From geek4civic at gmail.com Mon Feb 7 05:49:53 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Mon, 7 Feb 2011 20:49:53 +0900 Subject: [llvm-commits] [Review request][Win64] Use pushq/popq GPRs in function prologue/epilogue Message-ID: Anton, I attached an updated patch, refined and comments added, thank you. It is at; https://github.com/chapuni/LLVM/commit/8da7419f8170e5a11063eb8e992ecb1ad40f9f6a On the github, Anton wrote; > View Commit: https://github.com/chapuni/LLVM/commit/d719f1b1ba5f01823e00904c1599adf356089a1d > This will pessimize non-win64 targets. Basically, the problem is that you cannot use pushq/popq for high xmm regs, which are callee-saved on win64-only (but not on linux / darwin, for example). I thought the patch does not affect to non-win64 targets, but it might be dubious to check whether regs are GPR or not. I rewrote checking expressions. I am sorry if I missed your point. > Another problem is function prologue emission. Have you verified that you always have proper stack frame? Even in case when high xmm regs (xmm5, etc.) are spilled? As far as spiller emits in order [pushq GPRs...] and [mov xmm to fp], and restorer emits in order [mov xmm from fp] and [popq GPRs], emitPrologue() and emitEpilogue() will emit adjusting %rsp onto proper place. And I can expect spiller can place XMMs i128 aligned. ; for example define void @foo() nounwind { entry: tail call void (...)* @bar() nounwind tail call void asm sideeffect "nop", "~{si},~{di},~{xmm13},~{xmm11},~{xmm15},~{dirflag},~{fpsr},~{flags}"() nounwind ret void } declare void @bar(...) #### -mtriple=x86_64-mingw32 foo: pushq %rsi pushq %rdi subq $88, %rsp movaps %xmm15, 32(%rsp) # 16-byte Spill movaps %xmm13, 48(%rsp) # 16-byte Spill movaps %xmm11, 64(%rsp) # 16-byte Spill callq bar #APP nop #NO_APP movaps 64(%rsp), %xmm11 # 16-byte Reload movaps 48(%rsp), %xmm13 # 16-byte Reload movaps 32(%rsp), %xmm15 # 16-byte Reload addq $88, %rsp popq %rdi popq %rsi ret And also, I have checked to build clang by 3 stage. (x64-clang can build and test clang and llvm) ...Takumi -------------- next part -------------- From 8da7419f8170e5a11063eb8e992ecb1ad40f9f6a Mon Sep 17 00:00:00 2001 From: NAKAMURA Takumi Date: Thu, 20 Jan 2011 13:24:27 +0900 Subject: [PATCH] lib/Target/X86/X86FrameLowering.cpp: On Win64, pushq/popq GPR can be used instead of n(%rsp) and n(%rbp). --- lib/Target/X86/X86FrameLowering.cpp | 56 ++++++++++++++++++++++++---------- test/CodeGen/X86/tailcallstack64.ll | 2 +- 2 files changed, 40 insertions(+), 18 deletions(-) diff --git a/lib/Target/X86/X86FrameLowering.cpp b/lib/Target/X86/X86FrameLowering.cpp index 0a3f931..3246c43 100644 --- a/lib/Target/X86/X86FrameLowering.cpp +++ b/lib/Target/X86/X86FrameLowering.cpp @@ -892,7 +892,6 @@ bool X86FrameLowering::spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineFunction &MF = *MBB.getParent(); - bool isWin64 = STI.isTargetWin64(); unsigned SlotSize = STI.is64Bit() ? 8 : 4; unsigned FPReg = TRI->getFrameRegister(MF); unsigned CalleeFrameSize = 0; @@ -900,25 +899,39 @@ bool X86FrameLowering::spillCalleeSavedRegisters(MachineBasicBlock &MBB, const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo(); X86MachineFunctionInfo *X86FI = MF.getInfo(); + // Push GPRs. It increases frame size. unsigned Opc = STI.is64Bit() ? X86::PUSH64r : X86::PUSH32r; for (unsigned i = CSI.size(); i != 0; --i) { unsigned Reg = CSI[i-1].getReg(); + if (!X86::GR64RegClass.contains(Reg) && + !X86::GR32RegClass.contains(Reg)) + continue; // Add the callee-saved register as live-in. It's killed at the spill. MBB.addLiveIn(Reg); if (Reg == FPReg) // X86RegisterInfo::emitPrologue will handle spilling of frame register. continue; - if (!X86::VR128RegClass.contains(Reg) && !isWin64) { - CalleeFrameSize += SlotSize; - BuildMI(MBB, MI, DL, TII.get(Opc)).addReg(Reg, RegState::Kill); - } else { - const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg); - TII.storeRegToStackSlot(MBB, MI, Reg, true, CSI[i-1].getFrameIdx(), - RC, TRI); - } + CalleeFrameSize += SlotSize; + BuildMI(MBB, MI, DL, TII.get(Opc)).addReg(Reg, RegState::Kill); } X86FI->setCalleeSavedFrameSize(CalleeFrameSize); + + // Make XMM regs spilled. X86 does not have ability of push/pop XMM. + // It can be done by spilling XMMs to stack frame. + // Note that only Win64 ABI might spill XMMs. + for (unsigned i = CSI.size(); i != 0; --i) { + unsigned Reg = CSI[i-1].getReg(); + if (X86::GR64RegClass.contains(Reg) || + X86::GR32RegClass.contains(Reg)) + continue; + // Add the callee-saved register as live-in. It's killed at the spill. + MBB.addLiveIn(Reg); + const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg); + TII.storeRegToStackSlot(MBB, MI, Reg, true, CSI[i-1].getFrameIdx(), + RC, TRI); + } + return true; } @@ -933,21 +946,30 @@ bool X86FrameLowering::restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineFunction &MF = *MBB.getParent(); const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo(); + + // Reload XMMs from stack frame. + for (unsigned i = 0, e = CSI.size(); i != e; ++i) { + unsigned Reg = CSI[i].getReg(); + if (X86::GR64RegClass.contains(Reg) || + X86::GR32RegClass.contains(Reg)) + continue; + const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg); + TII.loadRegFromStackSlot(MBB, MI, Reg, CSI[i].getFrameIdx(), + RC, TRI); + } + + // POP GPRs. unsigned FPReg = TRI->getFrameRegister(MF); - bool isWin64 = STI.isTargetWin64(); unsigned Opc = STI.is64Bit() ? X86::POP64r : X86::POP32r; for (unsigned i = 0, e = CSI.size(); i != e; ++i) { unsigned Reg = CSI[i].getReg(); + if (!X86::GR64RegClass.contains(Reg) && + !X86::GR32RegClass.contains(Reg)) + continue; if (Reg == FPReg) // X86RegisterInfo::emitEpilogue will handle restoring of frame register. continue; - if (!X86::VR128RegClass.contains(Reg) && !isWin64) { - BuildMI(MBB, MI, DL, TII.get(Opc), Reg); - } else { - const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg); - TII.loadRegFromStackSlot(MBB, MI, Reg, CSI[i].getFrameIdx(), - RC, TRI); - } + BuildMI(MBB, MI, DL, TII.get(Opc), Reg); } return true; } diff --git a/test/CodeGen/X86/tailcallstack64.ll b/test/CodeGen/X86/tailcallstack64.ll index 0c732d5..0927779 100644 --- a/test/CodeGen/X86/tailcallstack64.ll +++ b/test/CodeGen/X86/tailcallstack64.ll @@ -2,7 +2,7 @@ ; RUN: llc < %s -tailcallopt -mtriple=x86_64-win32 -post-RA-scheduler=true | FileCheck %s ; FIXME: Redundant unused stack allocation could be eliminated. -; CHECK: subq ${{24|88}}, %rsp +; CHECK: subq ${{24|72}}, %rsp ; Check that lowered arguments on the stack do not overwrite each other. ; Add %in1 %p1 to a different temporary register (%eax). -- 1.7.1.GIT From Edmund.Grimley-Evans at arm.com Mon Feb 7 08:46:27 2011 From: Edmund.Grimley-Evans at arm.com (Edmund Grimley-Evans) Date: Mon, 7 Feb 2011 14:46:27 -0000 Subject: [llvm-commits] [PATCH] s/CORTEX-A8/cortex-a8/ in ARMAsmPrinter.cpp Message-ID: The CodeSourcery toolchain from about a year ago needs lower case in this line in the assembler file: .cpu cortex-a8 So this patch might be a good idea, unless some other tool version requires upper case: Index: lib/Target/ARM/ARMAsmPrinter.cpp =================================================================== --- lib/Target/ARM/ARMAsmPrinter.cpp (revision 125005) +++ lib/Target/ARM/ARMAsmPrinter.cpp (working copy) @@ -467,7 +467,7 @@ if (CPUString == "cortex-a8" || Subtarget->isCortexA8()) { - AttrEmitter->EmitTextAttribute(ARMBuildAttrs::CPU_name, "CORTEX-A8"); + AttrEmitter->EmitTextAttribute(ARMBuildAttrs::CPU_name, "cortex-a8"); AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch, ARMBuildAttrs::v7); AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch_profile, ARMBuildAttrs::ApplicationProfile); -- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. From jasonwkim at google.com Mon Feb 7 10:31:24 2011 From: jasonwkim at google.com (Jason Kim) Date: Mon, 7 Feb 2011 08:31:24 -0800 Subject: [llvm-commits] [PATCH] s/CORTEX-A8/cortex-a8/ in ARMAsmPrinter.cpp In-Reply-To: References: Message-ID: On Mon, Feb 7, 2011 at 6:46 AM, Edmund Grimley-Evans wrote: > The CodeSourcery toolchain from about a year ago needs lower case in this line in the assembler file: > > ? ? ? ?.cpu cortex-a8 > > So this patch might be a good idea, unless some other tool version requires upper case: > Thanks for noticing this. Gosh darn it, at least one version likes upper case in the .ARM.attributes. for ELF.o I guess we can put in lower case in .s, and upper case in .o? > > Index: lib/Target/ARM/ARMAsmPrinter.cpp > =================================================================== > --- lib/Target/ARM/ARMAsmPrinter.cpp ? ?(revision 125005) > +++ lib/Target/ARM/ARMAsmPrinter.cpp ? ?(working copy) > @@ -467,7 +467,7 @@ > > ? if (CPUString == "cortex-a8" || > ? ? ? Subtarget->isCortexA8()) { > - ? ?AttrEmitter->EmitTextAttribute(ARMBuildAttrs::CPU_name, "CORTEX-A8"); > + ? ?AttrEmitter->EmitTextAttribute(ARMBuildAttrs::CPU_name, "cortex-a8"); > ? ? AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch, ARMBuildAttrs::v7); > ? ? AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch_profile, > ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?ARMBuildAttrs::ApplicationProfile); > -- > IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. ?Thank you. > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > From sabre at nondot.org Mon Feb 7 10:40:21 2011 From: sabre at nondot.org (Chris Lattner) Date: Mon, 07 Feb 2011 16:40:21 -0000 Subject: [llvm-commits] [llvm] r125006 - in /llvm/trunk: docs/LangRef.html include/llvm/Constants.h include/llvm/Operator.h lib/AsmParser/LLParser.cpp lib/Bitcode/Reader/BitcodeReader.cpp lib/VMCore/Constants.cpp test/Assembler/2003-05-21-MalformedShiftCrash.ll test/Assembler/flags.ll Message-ID: <20110207164022.3F67C2A6C12D@llvm.org> Author: lattner Date: Mon Feb 7 10:40:21 2011 New Revision: 125006 URL: http://llvm.org/viewvc/llvm-project?rev=125006&view=rev Log: implement .ll and .bc support for nsw/nuw on shl and exact on lshr/ashr. Factor some code better. Modified: llvm/trunk/docs/LangRef.html llvm/trunk/include/llvm/Constants.h llvm/trunk/include/llvm/Operator.h llvm/trunk/lib/AsmParser/LLParser.cpp llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp llvm/trunk/lib/VMCore/Constants.cpp llvm/trunk/test/Assembler/2003-05-21-MalformedShiftCrash.ll llvm/trunk/test/Assembler/flags.ll Modified: llvm/trunk/docs/LangRef.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/LangRef.html?rev=125006&r1=125005&r2=125006&view=diff ============================================================================== --- llvm/trunk/docs/LangRef.html (original) +++ llvm/trunk/docs/LangRef.html Mon Feb 7 10:40:21 2011 @@ -3684,7 +3684,10 @@
Syntax:
-  <result> = shl <ty> <op1>, <op2>   ; yields {ty}:result
+  <result> = shl <ty> <op1>, <op2>           ; yields {ty}:result
+  <result> = shl nuw <ty> <op1>, <op2>       ; yields {ty}:result
+  <result> = shl nsw <ty> <op1>, <op2>       ; yields {ty}:result
+  <result> = shl nuw nsw <ty> <op1>, <op2>   ; yields {ty}:result
 
Overview:
@@ -3704,6 +3707,14 @@ vectors, each vector element of op1 is shifted by the corresponding shift amount in op2.

+

If the nuw keyword is present, then the shift produces a + trap value if it shifts out any non-zero bits. If + the nsw keywrod is present, then the shift produces a + trap value if it shifts out any bits that disagree + with the resultant sign bit. As such, NUW/NSW have the same semantics as + they would if the shift were expressed as a mul instruction with the same + nsw/nuw bits in (mul %op1, (shl 1, %op2)).

+
Example:
   <result> = shl i32 4, %var   ; yields {i32}: 4 << %var
@@ -3723,7 +3734,8 @@
 
 
Syntax:
-  <result> = lshr <ty> <op1>, <op2>   ; yields {ty}:result
+  <result> = lshr <ty> <op1>, <op2>         ; yields {ty}:result
+  <result> = lshr exact <ty> <op1>, <op2>   ; yields {ty}:result
 
Overview:
@@ -3743,6 +3755,11 @@ vectors, each vector element of op1 is shifted by the corresponding shift amount in op2.

+

If the exact keyword is present, the result value of the + lshr is a trap value if any of the bits + shifted out are non-zero.

+ +
Example:
   <result> = lshr i32 4, 1   ; yields {i32}:result = 2
@@ -3762,7 +3779,8 @@
 
 
Syntax:
-  <result> = ashr <ty> <op1>, <op2>   ; yields {ty}:result
+  <result> = ashr <ty> <op1>, <op2>         ; yields {ty}:result
+  <result> = ashr exact <ty> <op1>, <op2>   ; yields {ty}:result
 
Overview:
@@ -3783,6 +3801,10 @@ the arguments are vectors, each vector element of op1 is shifted by the corresponding shift amount in op2.

+

If the exact keyword is present, the result value of the + ashr is a trap value if any of the bits + shifted out are non-zero.

+
Example:
   <result> = ashr i32 4, 1   ; yields {i32}:result = 2

Modified: llvm/trunk/include/llvm/Constants.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Constants.h?rev=125006&r1=125005&r2=125006&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Constants.h (original)
+++ llvm/trunk/include/llvm/Constants.h Mon Feb  7 10:40:21 2011
@@ -724,8 +724,12 @@
   static Constant *getNUWSub(Constant *C1, Constant *C2);
   static Constant *getNSWMul(Constant *C1, Constant *C2);
   static Constant *getNUWMul(Constant *C1, Constant *C2);
+  static Constant *getNSWShl(Constant *C1, Constant *C2);
+  static Constant *getNUWShl(Constant *C1, Constant *C2);
   static Constant *getExactSDiv(Constant *C1, Constant *C2);
   static Constant *getExactUDiv(Constant *C1, Constant *C2);
+  static Constant *getExactAShr(Constant *C1, Constant *C2);
+  static Constant *getExactLShr(Constant *C1, Constant *C2);
 
   /// Transparently provide more efficient getOperand methods.
   DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Constant);

Modified: llvm/trunk/include/llvm/Operator.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Operator.h?rev=125006&r1=125005&r2=125006&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Operator.h (original)
+++ llvm/trunk/include/llvm/Operator.h Mon Feb  7 10:40:21 2011
@@ -106,66 +106,14 @@
   static inline bool classof(const Instruction *I) {
     return I->getOpcode() == Instruction::Add ||
            I->getOpcode() == Instruction::Sub ||
-           I->getOpcode() == Instruction::Mul;
+           I->getOpcode() == Instruction::Mul ||
+           I->getOpcode() == Instruction::Shl;
   }
   static inline bool classof(const ConstantExpr *CE) {
     return CE->getOpcode() == Instruction::Add ||
            CE->getOpcode() == Instruction::Sub ||
-           CE->getOpcode() == Instruction::Mul;
-  }
-  static inline bool classof(const Value *V) {
-    return (isa(V) && classof(cast(V))) ||
-           (isa(V) && classof(cast(V)));
-  }
-};
-
-/// AddOperator - Utility class for integer addition operators.
-///
-class AddOperator : public OverflowingBinaryOperator {
-  ~AddOperator(); // do not implement
-public:
-  static inline bool classof(const AddOperator *) { return true; }
-  static inline bool classof(const Instruction *I) {
-    return I->getOpcode() == Instruction::Add;
-  }
-  static inline bool classof(const ConstantExpr *CE) {
-    return CE->getOpcode() == Instruction::Add;
-  }
-  static inline bool classof(const Value *V) {
-    return (isa(V) && classof(cast(V))) ||
-           (isa(V) && classof(cast(V)));
-  }
-};
-
-/// SubOperator - Utility class for integer subtraction operators.
-///
-class SubOperator : public OverflowingBinaryOperator {
-  ~SubOperator(); // do not implement
-public:
-  static inline bool classof(const SubOperator *) { return true; }
-  static inline bool classof(const Instruction *I) {
-    return I->getOpcode() == Instruction::Sub;
-  }
-  static inline bool classof(const ConstantExpr *CE) {
-    return CE->getOpcode() == Instruction::Sub;
-  }
-  static inline bool classof(const Value *V) {
-    return (isa(V) && classof(cast(V))) ||
-           (isa(V) && classof(cast(V)));
-  }
-};
-
-/// MulOperator - Utility class for integer multiplication operators.
-///
-class MulOperator : public OverflowingBinaryOperator {
-  ~MulOperator(); // do not implement
-public:
-  static inline bool classof(const MulOperator *) { return true; }
-  static inline bool classof(const Instruction *I) {
-    return I->getOpcode() == Instruction::Mul;
-  }
-  static inline bool classof(const ConstantExpr *CE) {
-    return CE->getOpcode() == Instruction::Mul;
+           CE->getOpcode() == Instruction::Mul ||
+           CE->getOpcode() == Instruction::Shl;
   }
   static inline bool classof(const Value *V) {
     return (isa(V) && classof(cast(V))) ||
@@ -196,63 +144,74 @@
     return SubclassOptionalData & IsExact;
   }
   
-  static inline bool classof(const ConstantExpr *CE) {
-    return CE->getOpcode() == Instruction::SDiv ||
-           CE->getOpcode() == Instruction::UDiv;
-  }
-  static inline bool classof(const Instruction *I) {
-    return I->getOpcode() == Instruction::SDiv ||
-           I->getOpcode() == Instruction::UDiv;
-  }
-  static inline bool classof(const Value *V) {
-    return (isa(V) && classof(cast(V))) ||
-    (isa(V) && classof(cast(V)));
+  static bool isPossiblyExactOpcode(unsigned OpC) {
+    return OpC == Instruction::SDiv ||
+           OpC == Instruction::UDiv ||
+           OpC == Instruction::AShr ||
+           OpC == Instruction::LShr;
   }
-};
-  
-/// SDivOperator - An Operator with opcode Instruction::SDiv.
-///
-class SDivOperator : public PossiblyExactOperator {
-public:
-  // Methods for support type inquiry through isa, cast, and dyn_cast:
-  static inline bool classof(const SDivOperator *) { return true; }
   static inline bool classof(const ConstantExpr *CE) {
-    return CE->getOpcode() == Instruction::SDiv;
+    return isPossiblyExactOpcode(CE->getOpcode());
   }
   static inline bool classof(const Instruction *I) {
-    return I->getOpcode() == Instruction::SDiv;
+    return isPossiblyExactOpcode(I->getOpcode());
   }
   static inline bool classof(const Value *V) {
     return (isa(V) && classof(cast(V))) ||
            (isa(V) && classof(cast(V)));
   }
 };
+  
 
-/// UDivOperator - An Operator with opcode Instruction::UDiv.
-///
-class UDivOperator : public PossiblyExactOperator {
+  
+/// ConcreteOperator - A helper template for defining operators for individual
+/// opcodes.
+template
+class ConcreteOperator : public SuperClass {
+  ~ConcreteOperator(); // DO NOT IMPLEMENT
 public:
-  // Methods for support type inquiry through isa, cast, and dyn_cast:
-  static inline bool classof(const UDivOperator *) { return true; }
-  static inline bool classof(const ConstantExpr *CE) {
-    return CE->getOpcode() == Instruction::UDiv;
+  static inline bool classof(const ConcreteOperator *) {
+    return true;
   }
   static inline bool classof(const Instruction *I) {
-    return I->getOpcode() == Instruction::UDiv;
+    return I->getOpcode() == Opc;
+  }
+  static inline bool classof(const ConstantExpr *CE) {
+    return CE->getOpcode() == Opc;
   }
   static inline bool classof(const Value *V) {
     return (isa(V) && classof(cast(V))) ||
-    (isa(V) && classof(cast(V)));
+           (isa(V) && classof(cast(V)));
   }
 };
+
+class AddOperator
+  : public ConcreteOperator {};
+class SubOperator
+  : public ConcreteOperator {};
+class MulOperator
+  : public ConcreteOperator {};
+class ShlOperator
+  : public ConcreteOperator {};
+
+  
+class SDivOperator
+  : public ConcreteOperator {};
+class UDivOperator
+  : public ConcreteOperator {};
+class AShrOperator
+  : public ConcreteOperator {};
+class LShrOperator
+  : public ConcreteOperator {};
+  
   
-class GEPOperator : public Operator {
+  
+class GEPOperator
+  : public ConcreteOperator {
   enum {
     IsInBounds = (1 << 0)
   };
 
-  ~GEPOperator(); // do not implement
-
   friend class GetElementPtrInst;
   friend class ConstantExpr;
   void setIsInBounds(bool B) {
@@ -301,8 +260,8 @@
   /// value, just potentially different types.
   bool hasAllZeroIndices() const {
     for (const_op_iterator I = idx_begin(), E = idx_end(); I != E; ++I) {
-      if (Constant *C = dyn_cast(I))
-        if (C->isNullValue())
+      if (ConstantInt *C = dyn_cast(I))
+        if (C->isZero())
           continue;
       return false;
     }
@@ -319,21 +278,6 @@
     }
     return true;
   }
-  
-
-  // Methods for support type inquiry through isa, cast, and dyn_cast:
-  static inline bool classof(const GEPOperator *) { return true; }
-  static inline bool classof(const GetElementPtrInst *) { return true; }
-  static inline bool classof(const ConstantExpr *CE) {
-    return CE->getOpcode() == Instruction::GetElementPtr;
-  }
-  static inline bool classof(const Instruction *I) {
-    return I->getOpcode() == Instruction::GetElementPtr;
-  }
-  static inline bool classof(const Value *V) {
-    return (isa(V) && classof(cast(V))) ||
-           (isa(V) && classof(cast(V)));
-  }
 };
 
 } // End llvm namespace

Modified: llvm/trunk/lib/AsmParser/LLParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/LLParser.cpp?rev=125006&r1=125005&r2=125006&view=diff
==============================================================================
--- llvm/trunk/lib/AsmParser/LLParser.cpp (original)
+++ llvm/trunk/lib/AsmParser/LLParser.cpp Mon Feb  7 10:40:21 2011
@@ -2286,7 +2286,10 @@
   case lltok::kw_fdiv:
   case lltok::kw_urem:
   case lltok::kw_srem:
-  case lltok::kw_frem: {
+  case lltok::kw_frem:
+  case lltok::kw_shl:
+  case lltok::kw_lshr:
+  case lltok::kw_ashr: {
     bool NUW = false;
     bool NSW = false;
     bool Exact = false;
@@ -2294,9 +2297,8 @@
     Constant *Val0, *Val1;
     Lex.Lex();
     LocTy ModifierLoc = Lex.getLoc();
-    if (Opc == Instruction::Add ||
-        Opc == Instruction::Sub ||
-        Opc == Instruction::Mul) {
+    if (Opc == Instruction::Add || Opc == Instruction::Sub ||
+        Opc == Instruction::Mul || Opc == Instruction::Shl) {
       if (EatIfPresent(lltok::kw_nuw))
         NUW = true;
       if (EatIfPresent(lltok::kw_nsw)) {
@@ -2304,7 +2306,8 @@
         if (EatIfPresent(lltok::kw_nuw))
           NUW = true;
       }
-    } else if (Opc == Instruction::SDiv || Opc == Instruction::UDiv) {
+    } else if (Opc == Instruction::SDiv || Opc == Instruction::UDiv ||
+               Opc == Instruction::LShr || Opc == Instruction::AShr) {
       if (EatIfPresent(lltok::kw_exact))
         Exact = true;
     }
@@ -2331,6 +2334,9 @@
     case Instruction::SDiv:
     case Instruction::URem:
     case Instruction::SRem:
+    case Instruction::Shl:
+    case Instruction::AShr:
+    case Instruction::LShr:
       if (!Val0->getType()->isIntOrIntVectorTy())
         return Error(ID.Loc, "constexpr requires integer operands");
       break;
@@ -2355,9 +2361,6 @@
   }
 
   // Logical Operations
-  case lltok::kw_shl:
-  case lltok::kw_lshr:
-  case lltok::kw_ashr:
   case lltok::kw_and:
   case lltok::kw_or:
   case lltok::kw_xor: {
@@ -3002,55 +3005,38 @@
   // Binary Operators.
   case lltok::kw_add:
   case lltok::kw_sub:
-  case lltok::kw_mul: {
-    bool NUW = false;
-    bool NSW = false;
+  case lltok::kw_mul:
+  case lltok::kw_shl: {
     LocTy ModifierLoc = Lex.getLoc();
-    if (EatIfPresent(lltok::kw_nuw))
-      NUW = true;
-    if (EatIfPresent(lltok::kw_nsw)) {
-      NSW = true;
-      if (EatIfPresent(lltok::kw_nuw))
-        NUW = true;
-    }
-    bool Result = ParseArithmetic(Inst, PFS, KeywordVal, 1);
-    if (!Result) {
-      if (!Inst->getType()->isIntOrIntVectorTy()) {
-        if (NUW)
-          return Error(ModifierLoc, "nuw only applies to integer operations");
-        if (NSW)
-          return Error(ModifierLoc, "nsw only applies to integer operations");
-      }
-      if (NUW)
-        cast(Inst)->setHasNoUnsignedWrap(true);
-      if (NSW)
-        cast(Inst)->setHasNoSignedWrap(true);
-    }
-    return Result;
+    bool NUW = EatIfPresent(lltok::kw_nuw);
+    bool NSW = EatIfPresent(lltok::kw_nsw);
+    if (!NUW) NUW = EatIfPresent(lltok::kw_nuw);
+    
+    if (ParseArithmetic(Inst, PFS, KeywordVal, 1)) return true;
+    
+    if (NUW) cast(Inst)->setHasNoUnsignedWrap(true);
+    if (NSW) cast(Inst)->setHasNoSignedWrap(true);
+    return false;
   }
   case lltok::kw_fadd:
   case lltok::kw_fsub:
   case lltok::kw_fmul:    return ParseArithmetic(Inst, PFS, KeywordVal, 2);
 
   case lltok::kw_sdiv:
-  case lltok::kw_udiv: {
-    bool Exact = false;
-    if (EatIfPresent(lltok::kw_exact))
-      Exact = true;
-    bool Result = ParseArithmetic(Inst, PFS, KeywordVal, 1);
-    if (!Result)
-      if (Exact)
-        cast(Inst)->setIsExact(true);
-    return Result;
+  case lltok::kw_udiv:
+  case lltok::kw_lshr:
+  case lltok::kw_ashr: {
+    bool Exact = EatIfPresent(lltok::kw_exact);
+
+    if (ParseArithmetic(Inst, PFS, KeywordVal, 1)) return true;
+    if (Exact) cast(Inst)->setIsExact(true);
+    return false;
   }
 
   case lltok::kw_urem:
   case lltok::kw_srem:   return ParseArithmetic(Inst, PFS, KeywordVal, 1);
   case lltok::kw_fdiv:
   case lltok::kw_frem:   return ParseArithmetic(Inst, PFS, KeywordVal, 2);
-  case lltok::kw_shl:
-  case lltok::kw_lshr:
-  case lltok::kw_ashr:
   case lltok::kw_and:
   case lltok::kw_or:
   case lltok::kw_xor:    return ParseLogical(Inst, PFS, KeywordVal);

Modified: llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp?rev=125006&r1=125005&r2=125006&view=diff
==============================================================================
--- llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp (original)
+++ llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp Mon Feb  7 10:40:21 2011
@@ -1085,13 +1085,16 @@
         if (Record.size() >= 4) {
           if (Opc == Instruction::Add ||
               Opc == Instruction::Sub ||
-              Opc == Instruction::Mul) {
+              Opc == Instruction::Mul ||
+              Opc == Instruction::Shl) {
             if (Record[3] & (1 << bitc::OBO_NO_SIGNED_WRAP))
               Flags |= OverflowingBinaryOperator::NoSignedWrap;
             if (Record[3] & (1 << bitc::OBO_NO_UNSIGNED_WRAP))
               Flags |= OverflowingBinaryOperator::NoUnsignedWrap;
           } else if (Opc == Instruction::SDiv ||
-                     Opc == Instruction::UDiv) {
+                     Opc == Instruction::UDiv ||
+                     Opc == Instruction::LShr ||
+                     Opc == Instruction::AShr) {
             if (Record[3] & (1 << bitc::PEO_EXACT))
               Flags |= SDivOperator::IsExact;
           }
@@ -1901,13 +1904,16 @@
       if (OpNum < Record.size()) {
         if (Opc == Instruction::Add ||
             Opc == Instruction::Sub ||
-            Opc == Instruction::Mul) {
+            Opc == Instruction::Mul ||
+            Opc == Instruction::Shl) {
           if (Record[OpNum] & (1 << bitc::OBO_NO_SIGNED_WRAP))
             cast(I)->setHasNoSignedWrap(true);
           if (Record[OpNum] & (1 << bitc::OBO_NO_UNSIGNED_WRAP))
             cast(I)->setHasNoUnsignedWrap(true);
         } else if (Opc == Instruction::SDiv ||
-                   Opc == Instruction::UDiv) {
+                   Opc == Instruction::UDiv ||
+                   Opc == Instruction::LShr ||
+                   Opc == Instruction::AShr) {
           if (Record[OpNum] & (1 << bitc::PEO_EXACT))
             cast(I)->setIsExact(true);
         }

Modified: llvm/trunk/lib/VMCore/Constants.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Constants.cpp?rev=125006&r1=125005&r2=125006&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/Constants.cpp (original)
+++ llvm/trunk/lib/VMCore/Constants.cpp Mon Feb  7 10:40:21 2011
@@ -7,7 +7,7 @@
 //
 //===----------------------------------------------------------------------===//
 //
-// This file implements the Constant* classes.
+// This file implements the Constant *classes.
 //
 //===----------------------------------------------------------------------===//
 
@@ -72,7 +72,7 @@
   }
 }
 
-Constant* Constant::getIntegerValue(const Type *Ty, const APInt &V) {
+Constant *Constant::getIntegerValue(const Type *Ty, const APInt &V) {
   const Type *ScalarTy = Ty->getScalarType();
 
   // Create the base integer constant.
@@ -89,7 +89,7 @@
   return C;
 }
 
-Constant* Constant::getAllOnesValue(const Type *Ty) {
+Constant *Constant::getAllOnesValue(const Type *Ty) {
   if (const IntegerType *ITy = dyn_cast(Ty))
     return ConstantInt::get(Ty->getContext(),
                             APInt::getAllOnesValue(ITy->getBitWidth()));
@@ -296,7 +296,7 @@
   return Slot;
 }
 
-Constant* ConstantInt::get(const Type* Ty, uint64_t V, bool isSigned) {
+Constant *ConstantInt::get(const Type* Ty, uint64_t V, bool isSigned) {
   Constant *C = get(cast(Ty->getScalarType()),
                                V, isSigned);
 
@@ -321,7 +321,7 @@
   return get(Ty, V, true);
 }
 
-Constant* ConstantInt::get(const Type* Ty, const APInt& V) {
+Constant *ConstantInt::get(const Type* Ty, const APInt& V) {
   ConstantInt *C = get(Ty->getContext(), V);
   assert(C->getType() == Ty->getScalarType() &&
          "ConstantInt type doesn't match the type implied by its value!");
@@ -360,7 +360,7 @@
 /// get() - This returns a constant fp for the specified value in the
 /// specified type.  This should only be used for simple constant values like
 /// 2.0/1.0 etc, that are known-valid both as double and as the target format.
-Constant* ConstantFP::get(const Type* Ty, double V) {
+Constant *ConstantFP::get(const Type* Ty, double V) {
   LLVMContext &Context = Ty->getContext();
   
   APFloat FV(V);
@@ -378,7 +378,7 @@
 }
 
 
-Constant* ConstantFP::get(const Type* Ty, StringRef Str) {
+Constant *ConstantFP::get(const Type* Ty, StringRef Str) {
   LLVMContext &Context = Ty->getContext();
 
   APFloat FV(*TypeToFloatSemantics(Ty->getScalarType()), Str);
@@ -401,7 +401,7 @@
 }
 
 
-Constant* ConstantFP::getZeroValueForNegation(const Type* Ty) {
+Constant *ConstantFP::getZeroValueForNegation(const Type* Ty) {
   if (const VectorType *PTy = dyn_cast(Ty))
     if (PTy->getElementType()->isFloatingPointTy()) {
       std::vector zeros(PTy->getNumElements(),
@@ -509,7 +509,7 @@
 }
 
 
-Constant* ConstantArray::get(const ArrayType* T, Constant* const* Vals,
+Constant *ConstantArray::get(const ArrayType* T, Constant *const* Vals,
                              unsigned NumVals) {
   // FIXME: make this the primary ctor method.
   return get(T, std::vector(Vals, Vals+NumVals));
@@ -521,7 +521,7 @@
 /// Otherwise, the length parameter specifies how much of the string to use 
 /// and it won't be null terminated.
 ///
-Constant* ConstantArray::get(LLVMContext &Context, StringRef Str,
+Constant *ConstantArray::get(LLVMContext &Context, StringRef Str,
                              bool AddNull) {
   std::vector ElementVals;
   ElementVals.reserve(Str.size() + size_t(AddNull));
@@ -557,7 +557,7 @@
 }
 
 // ConstantStruct accessors.
-Constant* ConstantStruct::get(const StructType* T,
+Constant *ConstantStruct::get(const StructType* T,
                               const std::vector& V) {
   LLVMContextImpl* pImpl = T->getContext().pImpl;
   
@@ -569,7 +569,7 @@
   return ConstantAggregateZero::get(T);
 }
 
-Constant* ConstantStruct::get(LLVMContext &Context,
+Constant *ConstantStruct::get(LLVMContext &Context,
                               const std::vector& V, bool packed) {
   std::vector StructEls;
   StructEls.reserve(V.size());
@@ -578,8 +578,8 @@
   return get(StructType::get(Context, StructEls, packed), V);
 }
 
-Constant* ConstantStruct::get(LLVMContext &Context,
-                              Constant* const *Vals, unsigned NumVals,
+Constant *ConstantStruct::get(LLVMContext &Context,
+                              Constant *const *Vals, unsigned NumVals,
                               bool Packed) {
   // FIXME: make this the primary ctor method.
   return get(Context, std::vector(Vals, Vals+NumVals), Packed);
@@ -601,7 +601,7 @@
 }
 
 // ConstantVector accessors.
-Constant* ConstantVector::get(const VectorType* T,
+Constant *ConstantVector::get(const VectorType* T,
                               const std::vector& V) {
   assert(!V.empty() && "Vectors can't be empty");
   LLVMContext &Context = T->getContext();
@@ -629,68 +629,89 @@
   return pImpl->VectorConstants.getOrCreate(T, V);
 }
 
-Constant* ConstantVector::get(const std::vector& V) {
+Constant *ConstantVector::get(const std::vector& V) {
   assert(!V.empty() && "Cannot infer type if V is empty");
   return get(VectorType::get(V.front()->getType(),V.size()), V);
 }
 
-Constant* ConstantVector::get(Constant* const* Vals, unsigned NumVals) {
+Constant *ConstantVector::get(Constant *const* Vals, unsigned NumVals) {
   // FIXME: make this the primary ctor method.
   return get(std::vector(Vals, Vals+NumVals));
 }
 
-Constant* ConstantExpr::getNSWNeg(Constant* C) {
+Constant *ConstantExpr::getNSWNeg(Constant *C) {
   assert(C->getType()->isIntOrIntVectorTy() &&
          "Cannot NEG a nonintegral value!");
   return getNSWSub(ConstantFP::getZeroValueForNegation(C->getType()), C);
 }
 
-Constant* ConstantExpr::getNUWNeg(Constant* C) {
+Constant *ConstantExpr::getNUWNeg(Constant *C) {
   assert(C->getType()->isIntOrIntVectorTy() &&
          "Cannot NEG a nonintegral value!");
   return getNUWSub(ConstantFP::getZeroValueForNegation(C->getType()), C);
 }
 
-Constant* ConstantExpr::getNSWAdd(Constant* C1, Constant* C2) {
+Constant *ConstantExpr::getNSWAdd(Constant *C1, Constant *C2) {
   return getTy(C1->getType(), Instruction::Add, C1, C2,
                OverflowingBinaryOperator::NoSignedWrap);
 }
 
-Constant* ConstantExpr::getNUWAdd(Constant* C1, Constant* C2) {
+Constant *ConstantExpr::getNUWAdd(Constant *C1, Constant *C2) {
   return getTy(C1->getType(), Instruction::Add, C1, C2,
                OverflowingBinaryOperator::NoUnsignedWrap);
 }
 
-Constant* ConstantExpr::getNSWSub(Constant* C1, Constant* C2) {
+Constant *ConstantExpr::getNSWSub(Constant *C1, Constant *C2) {
   return getTy(C1->getType(), Instruction::Sub, C1, C2,
                OverflowingBinaryOperator::NoSignedWrap);
 }
 
-Constant* ConstantExpr::getNUWSub(Constant* C1, Constant* C2) {
+Constant *ConstantExpr::getNUWSub(Constant *C1, Constant *C2) {
   return getTy(C1->getType(), Instruction::Sub, C1, C2,
                OverflowingBinaryOperator::NoUnsignedWrap);
 }
 
-Constant* ConstantExpr::getNSWMul(Constant* C1, Constant* C2) {
+Constant *ConstantExpr::getNSWMul(Constant *C1, Constant *C2) {
   return getTy(C1->getType(), Instruction::Mul, C1, C2,
                OverflowingBinaryOperator::NoSignedWrap);
 }
 
-Constant* ConstantExpr::getNUWMul(Constant* C1, Constant* C2) {
+Constant *ConstantExpr::getNUWMul(Constant *C1, Constant *C2) {
   return getTy(C1->getType(), Instruction::Mul, C1, C2,
                OverflowingBinaryOperator::NoUnsignedWrap);
 }
 
-Constant* ConstantExpr::getExactSDiv(Constant* C1, Constant* C2) {
+Constant *ConstantExpr::getNSWShl(Constant *C1, Constant *C2) {
+  return getTy(C1->getType(), Instruction::Shl, C1, C2,
+               OverflowingBinaryOperator::NoSignedWrap);
+}
+
+Constant *ConstantExpr::getNUWShl(Constant *C1, Constant *C2) {
+  return getTy(C1->getType(), Instruction::Shl, C1, C2,
+               OverflowingBinaryOperator::NoUnsignedWrap);
+}
+
+Constant *ConstantExpr::getExactSDiv(Constant *C1, Constant *C2) {
   return getTy(C1->getType(), Instruction::SDiv, C1, C2,
                PossiblyExactOperator::IsExact);
 }
 
-Constant* ConstantExpr::getExactUDiv(Constant* C1, Constant* C2) {
+Constant *ConstantExpr::getExactUDiv(Constant *C1, Constant *C2) {
   return getTy(C1->getType(), Instruction::UDiv, C1, C2,
                PossiblyExactOperator::IsExact);
 }
 
+Constant *ConstantExpr::getExactAShr(Constant *C1, Constant *C2) {
+  return getTy(C1->getType(), Instruction::AShr, C1, C2,
+               PossiblyExactOperator::IsExact);
+}
+
+Constant *ConstantExpr::getExactLShr(Constant *C1, Constant *C2) {
+  return getTy(C1->getType(), Instruction::LShr, C1, C2,
+               PossiblyExactOperator::IsExact);
+}
+
+
 // Utility function for determining if a ConstantExpr is a CastOp or not. This
 // can't be inline because we don't want to #include Instruction.h into
 // Constant.h
@@ -816,7 +837,7 @@
 /// operands replaced with the specified values.  The specified operands must
 /// match count and type with the existing ones.
 Constant *ConstantExpr::
-getWithOperands(Constant* const *Ops, unsigned NumOps) const {
+getWithOperands(Constant *const *Ops, unsigned NumOps) const {
   assert(NumOps == getNumOperands() && "Operand count mismatch!");
   bool AnyChange = false;
   for (unsigned i = 0; i != NumOps; ++i) {
@@ -1486,7 +1507,7 @@
   return getTy(C1->getType(), Opcode, C1, C2, Flags);
 }
 
-Constant* ConstantExpr::getSizeOf(const Type* Ty) {
+Constant *ConstantExpr::getSizeOf(const Type* Ty) {
   // sizeof is implemented as: (i64) gep (Ty*)null, 1
   // Note that a non-inbounds gep is used, as null isn't within any object.
   Constant *GEPIdx = ConstantInt::get(Type::getInt32Ty(Ty->getContext()), 1);
@@ -1496,7 +1517,7 @@
                      Type::getInt64Ty(Ty->getContext()));
 }
 
-Constant* ConstantExpr::getAlignOf(const Type* Ty) {
+Constant *ConstantExpr::getAlignOf(const Type* Ty) {
   // alignof is implemented as: (i64) gep ({i1,Ty}*)null, 0, 1
   // Note that a non-inbounds gep is used, as null isn't within any object.
   const Type *AligningTy = StructType::get(Ty->getContext(),
@@ -1510,12 +1531,12 @@
                      Type::getInt64Ty(Ty->getContext()));
 }
 
-Constant* ConstantExpr::getOffsetOf(const StructType* STy, unsigned FieldNo) {
+Constant *ConstantExpr::getOffsetOf(const StructType* STy, unsigned FieldNo) {
   return getOffsetOf(STy, ConstantInt::get(Type::getInt32Ty(STy->getContext()),
                                            FieldNo));
 }
 
-Constant* ConstantExpr::getOffsetOf(const Type* Ty, Constant *FieldNo) {
+Constant *ConstantExpr::getOffsetOf(const Type* Ty, Constant *FieldNo) {
   // offsetof is implemented as: (i64) gep (Ty*)null, 0, FieldNo
   // Note that a non-inbounds gep is used, as null isn't within any object.
   Constant *GEPIdx[] = {
@@ -1823,7 +1844,7 @@
   return getExtractValueTy(ReqTy, Agg, IdxList, NumIdx);
 }
 
-Constant* ConstantExpr::getNeg(Constant* C) {
+Constant *ConstantExpr::getNeg(Constant *C) {
   assert(C->getType()->isIntOrIntVectorTy() &&
          "Cannot NEG a nonintegral value!");
   return get(Instruction::Sub,
@@ -1831,7 +1852,7 @@
              C);
 }
 
-Constant* ConstantExpr::getFNeg(Constant* C) {
+Constant *ConstantExpr::getFNeg(Constant *C) {
   assert(C->getType()->isFPOrFPVectorTy() &&
          "Cannot FNEG a non-floating-point value!");
   return get(Instruction::FSub,
@@ -1839,81 +1860,81 @@
              C);
 }
 
-Constant* ConstantExpr::getNot(Constant* C) {
+Constant *ConstantExpr::getNot(Constant *C) {
   assert(C->getType()->isIntOrIntVectorTy() &&
          "Cannot NOT a nonintegral value!");
   return get(Instruction::Xor, C, Constant::getAllOnesValue(C->getType()));
 }
 
-Constant* ConstantExpr::getAdd(Constant* C1, Constant* C2) {
+Constant *ConstantExpr::getAdd(Constant *C1, Constant *C2) {
   return get(Instruction::Add, C1, C2);
 }
 
-Constant* ConstantExpr::getFAdd(Constant* C1, Constant* C2) {
+Constant *ConstantExpr::getFAdd(Constant *C1, Constant *C2) {
   return get(Instruction::FAdd, C1, C2);
 }
 
-Constant* ConstantExpr::getSub(Constant* C1, Constant* C2) {
+Constant *ConstantExpr::getSub(Constant *C1, Constant *C2) {
   return get(Instruction::Sub, C1, C2);
 }
 
-Constant* ConstantExpr::getFSub(Constant* C1, Constant* C2) {
+Constant *ConstantExpr::getFSub(Constant *C1, Constant *C2) {
   return get(Instruction::FSub, C1, C2);
 }
 
-Constant* ConstantExpr::getMul(Constant* C1, Constant* C2) {
+Constant *ConstantExpr::getMul(Constant *C1, Constant *C2) {
   return get(Instruction::Mul, C1, C2);
 }
 
-Constant* ConstantExpr::getFMul(Constant* C1, Constant* C2) {
+Constant *ConstantExpr::getFMul(Constant *C1, Constant *C2) {
   return get(Instruction::FMul, C1, C2);
 }
 
-Constant* ConstantExpr::getUDiv(Constant* C1, Constant* C2) {
+Constant *ConstantExpr::getUDiv(Constant *C1, Constant *C2) {
   return get(Instruction::UDiv, C1, C2);
 }
 
-Constant* ConstantExpr::getSDiv(Constant* C1, Constant* C2) {
+Constant *ConstantExpr::getSDiv(Constant *C1, Constant *C2) {
   return get(Instruction::SDiv, C1, C2);
 }
 
-Constant* ConstantExpr::getFDiv(Constant* C1, Constant* C2) {
+Constant *ConstantExpr::getFDiv(Constant *C1, Constant *C2) {
   return get(Instruction::FDiv, C1, C2);
 }
 
-Constant* ConstantExpr::getURem(Constant* C1, Constant* C2) {
+Constant *ConstantExpr::getURem(Constant *C1, Constant *C2) {
   return get(Instruction::URem, C1, C2);
 }
 
-Constant* ConstantExpr::getSRem(Constant* C1, Constant* C2) {
+Constant *ConstantExpr::getSRem(Constant *C1, Constant *C2) {
   return get(Instruction::SRem, C1, C2);
 }
 
-Constant* ConstantExpr::getFRem(Constant* C1, Constant* C2) {
+Constant *ConstantExpr::getFRem(Constant *C1, Constant *C2) {
   return get(Instruction::FRem, C1, C2);
 }
 
-Constant* ConstantExpr::getAnd(Constant* C1, Constant* C2) {
+Constant *ConstantExpr::getAnd(Constant *C1, Constant *C2) {
   return get(Instruction::And, C1, C2);
 }
 
-Constant* ConstantExpr::getOr(Constant* C1, Constant* C2) {
+Constant *ConstantExpr::getOr(Constant *C1, Constant *C2) {
   return get(Instruction::Or, C1, C2);
 }
 
-Constant* ConstantExpr::getXor(Constant* C1, Constant* C2) {
+Constant *ConstantExpr::getXor(Constant *C1, Constant *C2) {
   return get(Instruction::Xor, C1, C2);
 }
 
-Constant* ConstantExpr::getShl(Constant* C1, Constant* C2) {
+Constant *ConstantExpr::getShl(Constant *C1, Constant *C2) {
   return get(Instruction::Shl, C1, C2);
 }
 
-Constant* ConstantExpr::getLShr(Constant* C1, Constant* C2) {
+Constant *ConstantExpr::getLShr(Constant *C1, Constant *C2) {
   return get(Instruction::LShr, C1, C2);
 }
 
-Constant* ConstantExpr::getAShr(Constant* C1, Constant* C2) {
+Constant *ConstantExpr::getAShr(Constant *C1, Constant *C2) {
   return get(Instruction::AShr, C1, C2);
 }
 

Modified: llvm/trunk/test/Assembler/2003-05-21-MalformedShiftCrash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Assembler/2003-05-21-MalformedShiftCrash.ll?rev=125006&r1=125005&r2=125006&view=diff
==============================================================================
--- llvm/trunk/test/Assembler/2003-05-21-MalformedShiftCrash.ll (original)
+++ llvm/trunk/test/Assembler/2003-05-21-MalformedShiftCrash.ll Mon Feb  7 10:40:21 2011
@@ -1,4 +1,4 @@
 ; Found by inspection of the code
-; RUN: not llvm-as < %s > /dev/null |& grep {constexpr requires integer or integer vector operands}
+; RUN: not llvm-as < %s > /dev/null |& grep {constexpr requires integer operands}
 
 global i32 ashr (float 1.0, float 2.0)

Modified: llvm/trunk/test/Assembler/flags.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Assembler/flags.ll?rev=125006&r1=125005&r2=125006&view=diff
==============================================================================
--- llvm/trunk/test/Assembler/flags.ll (original)
+++ llvm/trunk/test/Assembler/flags.ll Mon Feb  7 10:40:21 2011
@@ -92,6 +92,12 @@
 	ret i64 %z
 }
 
+define i64 @shl_both(i64 %x, i64 %y) {
+; CHECK: %z = shl nuw nsw i64 %x, %y
+	%z = shl nuw nsw i64 %x, %y
+	ret i64 %z
+}
+
 define i64 @sdiv_exact(i64 %x, i64 %y) {
 ; CHECK: %z = sdiv exact i64 %x, %y
 	%z = sdiv exact i64 %x, %y
@@ -116,6 +122,29 @@
 	ret i64 %z
 }
 
+define i64 @ashr_plain(i64 %x, i64 %y) {
+; CHECK: %z = ashr i64 %x, %y
+	%z = ashr i64 %x, %y
+	ret i64 %z
+}
+
+define i64 @ashr_exact(i64 %x, i64 %y) {
+; CHECK: %z = ashr exact i64 %x, %y
+	%z = ashr exact i64 %x, %y
+	ret i64 %z
+}
+
+define i64 @lshr_plain(i64 %x, i64 %y) {
+; CHECK: %z = lshr i64 %x, %y
+	%z = lshr i64 %x, %y
+	ret i64 %z
+}
+
+define i64 @lshr_exact(i64 %x, i64 %y) {
+; CHECK: %z = lshr exact i64 %x, %y
+	%z = lshr exact i64 %x, %y
+	ret i64 %z
+}
 
 define i64* @gep_nw(i64* %p, i64 %x) {
 ; CHECK: %z = getelementptr inbounds i64* %p, i64 %x
@@ -154,6 +183,16 @@
 	ret i64 udiv exact (i64 ptrtoint (i64* @addr to i64), i64 91)
 }
 
+define i64 @ashr_exact_ce() {
+; CHECK: ret i64 ashr exact (i64 ptrtoint (i64* @addr to i64), i64 9)
+	ret i64 ashr exact (i64 ptrtoint (i64* @addr to i64), i64 9)
+}
+
+define i64 @lshr_exact_ce() {
+; CHECK: ret i64 lshr exact (i64 ptrtoint (i64* @addr to i64), i64 9)
+	ret i64 lshr exact (i64 ptrtoint (i64* @addr to i64), i64 9)
+}
+
 define i64* @gep_nw_ce() {
 ; CHECK: ret i64* getelementptr inbounds (i64* @addr, i64 171)
         ret i64* getelementptr inbounds (i64* @addr, i64 171)
@@ -214,6 +253,12 @@
 	ret i64 mul nsw (i64 ptrtoint (i64* @addr to i64), i64 91)
 }
 
+define i64 @shl_signed_ce() {
+; CHECK: ret i64 shl nsw (i64 ptrtoint (i64* @addr to i64), i64 17)
+	ret i64 shl nsw (i64 ptrtoint (i64* @addr to i64), i64 17)
+}
+
+
 define i64 @add_unsigned_ce() {
 ; CHECK: ret i64 add nuw (i64 ptrtoint (i64* @addr to i64), i64 91)
 	ret i64 add nuw (i64 ptrtoint (i64* @addr to i64), i64 91)



From Edmund.Grimley-Evans at arm.com  Mon Feb  7 10:59:50 2011
From: Edmund.Grimley-Evans at arm.com (Edmund Grimley-Evans)
Date: Mon, 7 Feb 2011 16:59:50 -0000
Subject: [llvm-commits] [PATCH] s/CORTEX-A8/cortex-a8/ in
	ARMAsmPrinter.cpp
References: 
	
Message-ID: 

Jason Kim:

> Gosh darn it, at least one version likes upper case in the
> .ARM.attributes. for ELF.o
> I guess we can put in lower case in .s, and upper case in .o?

That seems to be what the CodeSourcery tools do. I tested a more recent version, too.
-- 
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From fvbommel at gmail.com  Mon Feb  7 11:31:05 2011
From: fvbommel at gmail.com (Frits van Bommel)
Date: Mon, 7 Feb 2011 18:31:05 +0100
Subject: [llvm-commits] [llvm] r125006 - in /llvm/trunk:
 docs/LangRef.html include/llvm/Constants.h include/llvm/Operator.h
 lib/AsmParser/LLParser.cpp lib/Bitcode/Reader/BitcodeReader.cpp
 lib/VMCore/Constants.cpp test/Assembler/2003-05-21-MalformedShiftCr
Message-ID: 

On Mon, Feb 7, 2011 at 5:40 PM, Chris Lattner  wrote:
> --- llvm/trunk/lib/VMCore/Constants.cpp (original)
> +++ llvm/trunk/lib/VMCore/Constants.cpp Mon Feb ?7 10:40:21 2011
> @@ -7,7 +7,7 @@
> ?//
> ?//===----------------------------------------------------------------------===//
> ?//
> -// This file implements the Constant* classes.
> +// This file implements the Constant *classes.

I don't think this was intentional :).


From bob.wilson at apple.com  Mon Feb  7 11:43:03 2011
From: bob.wilson at apple.com (Bob Wilson)
Date: Mon, 07 Feb 2011 17:43:03 -0000
Subject: [llvm-commits] [llvm] r125009 -
	/llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
Message-ID: <20110207174303.559592A6C12C@llvm.org>

Author: bwilson
Date: Mon Feb  7 11:43:03 2011
New Revision: 125009

URL: http://llvm.org/viewvc/llvm-project?rev=125009&view=rev
Log:
Move code for OffsetCompare struct closer to where it is used.

Modified:
    llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp?rev=125009&r1=125008&r2=125009&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Mon Feb  7 11:43:03 2011
@@ -1327,17 +1327,6 @@
   return NumMerges > 0;
 }
 
-namespace {
-  struct OffsetCompare {
-    bool operator()(const MachineInstr *LHS, const MachineInstr *RHS) const {
-      int LOffset = getMemoryOpOffset(LHS);
-      int ROffset = getMemoryOpOffset(RHS);
-      assert(LHS == RHS || LOffset != ROffset);
-      return LOffset > ROffset;
-    }
-  };
-}
-
 /// MergeReturnIntoLDM - If this is a exit BB, try merging the return ops
 /// ("bx lr" and "mov pc, lr") into the preceeding stack restore so it
 /// directly restore the value of LR into pc.
@@ -1578,6 +1567,17 @@
   return true;
 }
 
+namespace {
+  struct OffsetCompare {
+    bool operator()(const MachineInstr *LHS, const MachineInstr *RHS) const {
+      int LOffset = getMemoryOpOffset(LHS);
+      int ROffset = getMemoryOpOffset(RHS);
+      assert(LHS == RHS || LOffset != ROffset);
+      return LOffset > ROffset;
+    }
+  };
+}
+
 bool ARMPreAllocLoadStoreOpt::RescheduleOps(MachineBasicBlock *MBB,
                                  SmallVector &Ops,
                                  unsigned Base, bool isLd,



From bob.wilson at apple.com  Mon Feb  7 11:43:06 2011
From: bob.wilson at apple.com (Bob Wilson)
Date: Mon, 07 Feb 2011 17:43:06 -0000
Subject: [llvm-commits] [llvm] r125010 - in /llvm/trunk/lib/Target/ARM:
 ARMInstrInfo.td ARMInstrThumb2.td
Message-ID: <20110207174307.054D32A6C12D@llvm.org>

Author: bwilson
Date: Mon Feb  7 11:43:06 2011
New Revision: 125010

URL: http://llvm.org/viewvc/llvm-project?rev=125010&view=rev
Log:
Remove inaccurate comments: so_imm and t2_so_imm operands are not encoded
until the instructions are emitted or printed.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
    llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=125010&r1=125009&r2=125010&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Mon Feb  7 11:43:06 2011
@@ -407,10 +407,7 @@
 }
 
 // so_imm - Match a 32-bit shifter_operand immediate operand, which is an
-// 8-bit immediate rotated by an arbitrary number of bits.  so_imm values are
-// represented in the imm field in the same 12-bit form that they are encoded
-// into so_imm instructions: the 8-bit immediate is the least significant bits
-// [bits 0-7], the 4-bit shift amount is the next 4 bits [bits 8-11].
+// 8-bit immediate rotated by an arbitrary number of bits.
 def so_imm : Operand, PatLeaf<(imm), [{ return Pred_so_imm(N); }]> {
   let EncoderMethod = "getSOImmOpValue";
   let PrintMethod = "printSOImmOperand";

Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=125010&r1=125009&r2=125010&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Mon Feb  7 11:43:06 2011
@@ -43,10 +43,7 @@
 
 // t2_so_imm - Match a 32-bit immediate operand, which is an
 // 8-bit immediate rotated by an arbitrary number of bits, or an 8-bit
-// immediate splatted into multiple bytes of the word. t2_so_imm values are
-// represented in the imm field in the same 12-bit form that they are encoded
-// into t2_so_imm instructions: the 8-bit immediate is the least significant
-// bits [bits 0-7], the 4-bit shift/splat amount is the next 4 bits [bits 8-11].
+// immediate splatted into multiple bytes of the word.
 def t2_so_imm : Operand, PatLeaf<(imm), [{ return Pred_t2_so_imm(N); }]> {
   let EncoderMethod = "getT2SOImmOpValue";
 }



From bob.wilson at apple.com  Mon Feb  7 11:43:09 2011
From: bob.wilson at apple.com (Bob Wilson)
Date: Mon, 07 Feb 2011 17:43:09 -0000
Subject: [llvm-commits] [llvm] r125011 -
	/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
Message-ID: <20110207174309.D1E7D2A6C12E@llvm.org>

Author: bwilson
Date: Mon Feb  7 11:43:09 2011
New Revision: 125011

URL: http://llvm.org/viewvc/llvm-project?rev=125011&view=rev
Log:
Fix a comment: addrmode6 no longer includes the optional writeback flag.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=125011&r1=125010&r2=125011&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Mon Feb  7 11:43:09 2011
@@ -552,7 +552,7 @@
   let EncoderMethod = "getAddrMode5OpValue";
 }
 
-// addrmode6 := reg with optional writeback
+// addrmode6 := reg with optional alignment
 //
 def addrmode6 : Operand,
                 ComplexPattern{



From bob.wilson at apple.com  Mon Feb  7 11:43:12 2011
From: bob.wilson at apple.com (Bob Wilson)
Date: Mon, 07 Feb 2011 17:43:12 -0000
Subject: [llvm-commits] [llvm] r125012 -
	/llvm/trunk/lib/Target/ARM/ARMInstrNEON.td
Message-ID: <20110207174312.DBCDF2A6C12C@llvm.org>

Author: bwilson
Date: Mon Feb  7 11:43:12 2011
New Revision: 125012

URL: http://llvm.org/viewvc/llvm-project?rev=125012&view=rev
Log:
Fix some NEON instruction itineraries.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrNEON.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrNEON.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrNEON.td?rev=125012&r1=125011&r2=125012&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrNEON.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrNEON.td Mon Feb  7 11:43:12 2011
@@ -284,7 +284,7 @@
 class VLD1D4WB op7_4, string Dt>
   : NLdSt<0,0b10,0b0010,op7_4,
           (outs DPR:$Vd, DPR:$dst2, DPR:$dst3, DPR:$dst4, GPR:$wb),
-          (ins addrmode6:$Rn, am6offset:$Rm), IIC_VLD4, "vld1", Dt,
+          (ins addrmode6:$Rn, am6offset:$Rm), IIC_VLD1x4u, "vld1", Dt,
           "\\{$Vd, $dst2, $dst3, $dst4\\}, $Rn$Rm", "$Rn.addr = $wb",
           []> {
   let Inst{5-4} = Rn{5-4};
@@ -451,7 +451,7 @@
 class VLD4DWB op11_8, bits<4> op7_4, string Dt>
   : NLdSt<0, 0b10, op11_8, op7_4,
           (outs DPR:$Vd, DPR:$dst2, DPR:$dst3, DPR:$dst4, GPR:$wb),
-          (ins addrmode6:$Rn, am6offset:$Rm), IIC_VLD4,
+          (ins addrmode6:$Rn, am6offset:$Rm), IIC_VLD4u,
           "vld4", Dt, "\\{$Vd, $dst2, $dst3, $dst4\\}, $Rn$Rm",
           "$Rn.addr = $wb", []> {
   let Inst{5-4} = Rn{5-4};
@@ -461,9 +461,9 @@
 def VLD4d16_UPD : VLD4DWB<0b0000, {0,1,?,?}, "16">;
 def VLD4d32_UPD : VLD4DWB<0b0000, {1,0,?,?}, "32">;
 
-def VLD4d8Pseudo_UPD  : VLDQQWBPseudo;
-def VLD4d16Pseudo_UPD : VLDQQWBPseudo;
-def VLD4d32Pseudo_UPD : VLDQQWBPseudo;
+def VLD4d8Pseudo_UPD  : VLDQQWBPseudo;
+def VLD4d16Pseudo_UPD : VLDQQWBPseudo;
+def VLD4d32Pseudo_UPD : VLDQQWBPseudo;
 
 // ...with double-spaced registers (non-updating versions for disassembly only):
 def VLD4q8      : VLD4D<0b0001, {0,0,?,?}, "8">;
@@ -473,14 +473,18 @@
 def VLD4q16_UPD : VLD4DWB<0b0001, {0,1,?,?}, "16">;
 def VLD4q32_UPD : VLD4DWB<0b0001, {1,0,?,?}, "32">;
 
-def VLD4q8Pseudo_UPD  : VLDQQQQWBPseudo;
-def VLD4q16Pseudo_UPD : VLDQQQQWBPseudo;
-def VLD4q32Pseudo_UPD : VLDQQQQWBPseudo;
+def VLD4q8Pseudo_UPD  : VLDQQQQWBPseudo;
+def VLD4q16Pseudo_UPD : VLDQQQQWBPseudo;
+def VLD4q32Pseudo_UPD : VLDQQQQWBPseudo;
 
 // ...alternate versions to be allocated odd register numbers:
-def VLD4q8oddPseudo_UPD  : VLDQQQQWBPseudo;
-def VLD4q16oddPseudo_UPD : VLDQQQQWBPseudo;
-def VLD4q32oddPseudo_UPD : VLDQQQQWBPseudo;
+def VLD4q8oddPseudo   : VLDQQQQPseudo;
+def VLD4q16oddPseudo  : VLDQQQQPseudo;
+def VLD4q32oddPseudo  : VLDQQQQPseudo;
+
+def VLD4q8oddPseudo_UPD  : VLDQQQQWBPseudo;
+def VLD4q16oddPseudo_UPD : VLDQQQQWBPseudo;
+def VLD4q32oddPseudo_UPD : VLDQQQQWBPseudo;
 
 } // mayLoad = 1, neverHasSideEffects = 1, hasExtraDefRegAllocReq = 1
 
@@ -764,7 +768,7 @@
           (outs DPR:$Vd, DPR:$dst2, DPR:$dst3, DPR:$dst4, GPR:$wb),
           (ins addrmode6:$Rn, am6offset:$Rm,
            DPR:$src1, DPR:$src2, DPR:$src3, DPR:$src4, nohash_imm:$lane),
-          IIC_VLD4ln, "vld4", Dt,
+          IIC_VLD4lnu, "vld4", Dt,
 "\\{$Vd[$lane], $dst2[$lane], $dst3[$lane], $dst4[$lane]\\}, $Rn$Rm",
 "$src1 = $Vd, $src2 = $dst2, $src3 = $dst3, $src4 = $dst4, $Rn.addr = $wb",
           []> {



From bob.wilson at apple.com  Mon Feb  7 11:43:16 2011
From: bob.wilson at apple.com (Bob Wilson)
Date: Mon, 07 Feb 2011 17:43:16 -0000
Subject: [llvm-commits] [llvm] r125013 - in /llvm/trunk/lib/Target/ARM:
 ARMExpandPseudoInsts.cpp ARMISelDAGToDAG.cpp ARMInstrNEON.td
Message-ID: <20110207174316.29C9E2A6C12D@llvm.org>

Author: bwilson
Date: Mon Feb  7 11:43:15 2011
New Revision: 125013

URL: http://llvm.org/viewvc/llvm-project?rev=125013&view=rev
Log:
Change VLD3/4 and VST3/4 for quad registers to not update the address register.

These operations are expanded to pairs of loads or stores, and the first one
uses the address register update to produce the address for the second one.
So far, the second load/store has also updated the address register, just
for convenience, since that output has never been used.  In anticipation of
actually supporting post-increment updates for these operations, this changes
the non-updating operations to use a non-updating load/store for the second
instruction.

Modified:
    llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp
    llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp
    llvm/trunk/lib/Target/ARM/ARMInstrNEON.td

Modified: llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp?rev=125013&r1=125012&r2=125013&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp Mon Feb  7 11:43:15 2011
@@ -203,10 +203,13 @@
 { ARM::VLD3d8Pseudo_UPD,    ARM::VLD3d8_UPD,   true,  true,  SingleSpc,  3, 8 },
 
 { ARM::VLD3q16Pseudo_UPD,    ARM::VLD3q16_UPD, true,  true,  EvenDblSpc, 3, 4 },
+{ ARM::VLD3q16oddPseudo,     ARM::VLD3q16,     true,  false, OddDblSpc,  3, 4 },
 { ARM::VLD3q16oddPseudo_UPD, ARM::VLD3q16_UPD, true,  true,  OddDblSpc,  3, 4 },
 { ARM::VLD3q32Pseudo_UPD,    ARM::VLD3q32_UPD, true,  true,  EvenDblSpc, 3, 2 },
+{ ARM::VLD3q32oddPseudo,     ARM::VLD3q32,     true,  false, OddDblSpc,  3, 2 },
 { ARM::VLD3q32oddPseudo_UPD, ARM::VLD3q32_UPD, true,  true,  OddDblSpc,  3, 2 },
 { ARM::VLD3q8Pseudo_UPD,     ARM::VLD3q8_UPD,  true,  true,  EvenDblSpc, 3, 8 },
+{ ARM::VLD3q8oddPseudo,      ARM::VLD3q8,      true,  false, OddDblSpc,  3, 8 },
 { ARM::VLD3q8oddPseudo_UPD,  ARM::VLD3q8_UPD,  true,  true,  OddDblSpc,  3, 8 },
 
 { ARM::VLD4DUPd16Pseudo,     ARM::VLD4DUPd16,     true, false, SingleSpc, 4, 4},
@@ -235,10 +238,13 @@
 { ARM::VLD4d8Pseudo_UPD,    ARM::VLD4d8_UPD,   true,  true,  SingleSpc,  4, 8 },
 
 { ARM::VLD4q16Pseudo_UPD,    ARM::VLD4q16_UPD, true,  true,  EvenDblSpc, 4, 4 },
+{ ARM::VLD4q16oddPseudo,     ARM::VLD4q16,     true,  false, OddDblSpc,  4, 4 },
 { ARM::VLD4q16oddPseudo_UPD, ARM::VLD4q16_UPD, true,  true,  OddDblSpc,  4, 4 },
 { ARM::VLD4q32Pseudo_UPD,    ARM::VLD4q32_UPD, true,  true,  EvenDblSpc, 4, 2 },
+{ ARM::VLD4q32oddPseudo,     ARM::VLD4q32,     true,  false, OddDblSpc,  4, 2 },
 { ARM::VLD4q32oddPseudo_UPD, ARM::VLD4q32_UPD, true,  true,  OddDblSpc,  4, 2 },
 { ARM::VLD4q8Pseudo_UPD,     ARM::VLD4q8_UPD,  true,  true,  EvenDblSpc, 4, 8 },
+{ ARM::VLD4q8oddPseudo,      ARM::VLD4q8,      true,  false, OddDblSpc,  4, 8 },
 { ARM::VLD4q8oddPseudo_UPD,  ARM::VLD4q8_UPD,  true,  true,  OddDblSpc,  4, 8 },
 
 { ARM::VST1LNq16Pseudo,     ARM::VST1LNd16,    false, false, EvenDblSpc, 1, 4 },
@@ -306,10 +312,13 @@
 { ARM::VST3d8Pseudo_UPD,    ARM::VST3d8_UPD,   false, true,  SingleSpc,  3, 8 },
 
 { ARM::VST3q16Pseudo_UPD,    ARM::VST3q16_UPD, false, true,  EvenDblSpc, 3, 4 },
+{ ARM::VST3q16oddPseudo,     ARM::VST3q16,     false, false, OddDblSpc,  3, 4 },
 { ARM::VST3q16oddPseudo_UPD, ARM::VST3q16_UPD, false, true,  OddDblSpc,  3, 4 },
 { ARM::VST3q32Pseudo_UPD,    ARM::VST3q32_UPD, false, true,  EvenDblSpc, 3, 2 },
+{ ARM::VST3q32oddPseudo,     ARM::VST3q32,     false, false, OddDblSpc,  3, 2 },
 { ARM::VST3q32oddPseudo_UPD, ARM::VST3q32_UPD, false, true,  OddDblSpc,  3, 2 },
 { ARM::VST3q8Pseudo_UPD,     ARM::VST3q8_UPD,  false, true,  EvenDblSpc, 3, 8 },
+{ ARM::VST3q8oddPseudo,      ARM::VST3q8,      false, false, OddDblSpc,  3, 8 },
 { ARM::VST3q8oddPseudo_UPD,  ARM::VST3q8_UPD,  false, true,  OddDblSpc,  3, 8 },
 
 { ARM::VST4LNd16Pseudo,     ARM::VST4LNd16,     false, false, SingleSpc, 4, 4 },
@@ -331,11 +340,14 @@
 { ARM::VST4d8Pseudo_UPD,    ARM::VST4d8_UPD,   false, true,  SingleSpc,  4, 8 },
 
 { ARM::VST4q16Pseudo_UPD,    ARM::VST4q16_UPD, false, true,  EvenDblSpc, 4, 4 },
+{ ARM::VST4q16oddPseudo,     ARM::VST4q16,     false, false, OddDblSpc,  4, 4 },
 { ARM::VST4q16oddPseudo_UPD, ARM::VST4q16_UPD, false, true,  OddDblSpc,  4, 4 },
 { ARM::VST4q32Pseudo_UPD,    ARM::VST4q32_UPD, false, true,  EvenDblSpc, 4, 2 },
+{ ARM::VST4q32oddPseudo,     ARM::VST4q32,     false, false, OddDblSpc,  4, 2 },
 { ARM::VST4q32oddPseudo_UPD, ARM::VST4q32_UPD, false, true,  OddDblSpc,  4, 2 },
 { ARM::VST4q8Pseudo_UPD,     ARM::VST4q8_UPD,  false, true,  EvenDblSpc, 4, 8 },
-{ ARM::VST4q8oddPseudo_UPD , ARM::VST4q8_UPD,  false, true,  OddDblSpc,  4, 8 }
+{ ARM::VST4q8oddPseudo,      ARM::VST4q8,      false, false, OddDblSpc,  4, 8 },
+{ ARM::VST4q8oddPseudo_UPD,  ARM::VST4q8_UPD,  false, true,  OddDblSpc,  4, 8 }
 };
 
 /// LookupNEONLdSt - Search the NEONLdStTable for information about a NEON
@@ -1036,6 +1048,9 @@
     case ARM::VLD3q8Pseudo_UPD:
     case ARM::VLD3q16Pseudo_UPD:
     case ARM::VLD3q32Pseudo_UPD:
+    case ARM::VLD3q8oddPseudo:
+    case ARM::VLD3q16oddPseudo:
+    case ARM::VLD3q32oddPseudo:
     case ARM::VLD3q8oddPseudo_UPD:
     case ARM::VLD3q16oddPseudo_UPD:
     case ARM::VLD3q32oddPseudo_UPD:
@@ -1050,6 +1065,9 @@
     case ARM::VLD4q8Pseudo_UPD:
     case ARM::VLD4q16Pseudo_UPD:
     case ARM::VLD4q32Pseudo_UPD:
+    case ARM::VLD4q8oddPseudo:
+    case ARM::VLD4q16oddPseudo:
+    case ARM::VLD4q32oddPseudo:
     case ARM::VLD4q8oddPseudo_UPD:
     case ARM::VLD4q16oddPseudo_UPD:
     case ARM::VLD4q32oddPseudo_UPD:
@@ -1111,6 +1129,9 @@
     case ARM::VST3q8Pseudo_UPD:
     case ARM::VST3q16Pseudo_UPD:
     case ARM::VST3q32Pseudo_UPD:
+    case ARM::VST3q8oddPseudo:
+    case ARM::VST3q16oddPseudo:
+    case ARM::VST3q32oddPseudo:
     case ARM::VST3q8oddPseudo_UPD:
     case ARM::VST3q16oddPseudo_UPD:
     case ARM::VST3q32oddPseudo_UPD:
@@ -1125,6 +1146,9 @@
     case ARM::VST4q8Pseudo_UPD:
     case ARM::VST4q16Pseudo_UPD:
     case ARM::VST4q32Pseudo_UPD:
+    case ARM::VST4q8oddPseudo:
+    case ARM::VST4q16oddPseudo:
+    case ARM::VST4q32oddPseudo:
     case ARM::VST4q8oddPseudo_UPD:
     case ARM::VST4q16oddPseudo_UPD:
     case ARM::VST4q32oddPseudo_UPD:

Modified: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp?rev=125013&r1=125012&r2=125013&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp Mon Feb  7 11:43:15 2011
@@ -1487,9 +1487,9 @@
   SDValue Reg0 = CurDAG->getRegister(0, MVT::i32);
   SDValue SuperReg;
   if (is64BitVector) {
-    unsigned Opc = DOpcodes[OpcodeIndex];
     const SDValue Ops[] = { MemAddr, Align, Pred, Reg0, Chain };
-    SDNode *VLd = CurDAG->getMachineNode(Opc, dl, ResTy, MVT::Other, Ops, 5);
+    SDNode *VLd = CurDAG->getMachineNode(DOpcodes[OpcodeIndex], dl,
+                                         ResTy, MVT::Other, Ops, 5);
     if (NumVecs == 1)
       return VLd;
 
@@ -1507,9 +1507,9 @@
   if (NumVecs <= 2) {
     // Quad registers are directly supported for VLD1 and VLD2,
     // loading pairs of D regs.
-    unsigned Opc = QOpcodes0[OpcodeIndex];
     const SDValue Ops[] = { MemAddr, Align, Pred, Reg0, Chain };
-    SDNode *VLd = CurDAG->getMachineNode(Opc, dl, ResTy, MVT::Other, Ops, 5);
+    SDNode *VLd = CurDAG->getMachineNode(QOpcodes0[OpcodeIndex], dl,
+                                         ResTy, MVT::Other, Ops, 5);
     if (NumVecs == 1)
       return VLd;
 
@@ -1522,22 +1522,20 @@
     EVT AddrTy = MemAddr.getValueType();
 
     // Load the even subregs.
-    unsigned Opc = QOpcodes0[OpcodeIndex];
     SDValue ImplDef =
       SDValue(CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, dl, ResTy), 0);
     const SDValue OpsA[] = { MemAddr, Align, Reg0, ImplDef, Pred, Reg0, Chain };
-    SDNode *VLdA =
-      CurDAG->getMachineNode(Opc, dl, ResTy, AddrTy, MVT::Other, OpsA, 7);
+    SDNode *VLdA = CurDAG->getMachineNode(QOpcodes0[OpcodeIndex], dl,
+                                          ResTy, AddrTy, MVT::Other, OpsA, 7);
     Chain = SDValue(VLdA, 2);
 
     // Load the odd subregs.
-    Opc = QOpcodes1[OpcodeIndex];
-    const SDValue OpsB[] = { SDValue(VLdA, 1), Align, Reg0, SDValue(VLdA, 0),
+    const SDValue OpsB[] = { SDValue(VLdA, 1), Align, SDValue(VLdA, 0),
                              Pred, Reg0, Chain };
-    SDNode *VLdB =
-      CurDAG->getMachineNode(Opc, dl, ResTy, AddrTy, MVT::Other, OpsB, 7);
+    SDNode *VLdB = CurDAG->getMachineNode(QOpcodes1[OpcodeIndex], dl,
+                                          ResTy, MVT::Other, OpsB, 6);
     SuperReg = SDValue(VLdB, 0);
-    Chain = SDValue(VLdB, 2);
+    Chain = SDValue(VLdB, 1);
   }
 
   // Extract out the Q registers.
@@ -1588,54 +1586,46 @@
   SDValue Pred = getAL(CurDAG);
   SDValue Reg0 = CurDAG->getRegister(0, MVT::i32);
 
-  SmallVector Ops;
-  Ops.push_back(MemAddr);
-  Ops.push_back(Align);
-
   if (is64BitVector) {
+    SDValue SrcReg;
     if (NumVecs == 1) {
-      Ops.push_back(N->getOperand(3));
+      SrcReg = N->getOperand(3);
     } else {
-      SDValue RegSeq;
       SDValue V0 = N->getOperand(0+3);
       SDValue V1 = N->getOperand(1+3);
 
       // Form a REG_SEQUENCE to force register allocation.
       if (NumVecs == 2)
-        RegSeq = SDValue(PairDRegs(MVT::v2i64, V0, V1), 0);
+        SrcReg = SDValue(PairDRegs(MVT::v2i64, V0, V1), 0);
       else {
         SDValue V2 = N->getOperand(2+3);
-        // If it's a vld3, form a quad D-register and leave the last part as
+        // If it's a vst3, form a quad D-register and leave the last part as
         // an undef.
         SDValue V3 = (NumVecs == 3)
           ? SDValue(CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF,dl,VT), 0)
           : N->getOperand(3+3);
-        RegSeq = SDValue(QuadDRegs(MVT::v4i64, V0, V1, V2, V3), 0);
+        SrcReg = SDValue(QuadDRegs(MVT::v4i64, V0, V1, V2, V3), 0);
       }
-      Ops.push_back(RegSeq);
     }
-    Ops.push_back(Pred);
-    Ops.push_back(Reg0); // predicate register
-    Ops.push_back(Chain);
-    unsigned Opc = DOpcodes[OpcodeIndex];
-    return CurDAG->getMachineNode(Opc, dl, MVT::Other, Ops.data(), 6);
+    const SDValue Ops[] = { MemAddr, Align, SrcReg, Pred, Reg0, Chain };
+    return CurDAG->getMachineNode(DOpcodes[OpcodeIndex], dl,
+                                  MVT::Other, Ops, 6);
   }
 
   if (NumVecs <= 2) {
     // Quad registers are directly supported for VST1 and VST2.
-    unsigned Opc = QOpcodes0[OpcodeIndex];
+    SDValue SrcReg;
     if (NumVecs == 1) {
-      Ops.push_back(N->getOperand(3));
+      SrcReg = N->getOperand(3);
     } else {
       // Form a QQ register.
       SDValue Q0 = N->getOperand(3);
       SDValue Q1 = N->getOperand(4);
-      Ops.push_back(SDValue(PairQRegs(MVT::v4i64, Q0, Q1), 0));
+      SrcReg = SDValue(PairQRegs(MVT::v4i64, Q0, Q1), 0);
     }
-    Ops.push_back(Pred);
-    Ops.push_back(Reg0); // predicate register
-    Ops.push_back(Chain);
-    return CurDAG->getMachineNode(Opc, dl, MVT::Other, Ops.data(), 6);
+    const SDValue Ops[] = { MemAddr, Align, SrcReg, Pred, Reg0, Chain };
+    return CurDAG->getMachineNode(QOpcodes0[OpcodeIndex], dl,
+                                  MVT::Other, Ops, 6);
   }
 
   // Otherwise, quad registers are stored with two separate instructions,
@@ -1651,23 +1641,17 @@
   SDValue RegSeq = SDValue(QuadQRegs(MVT::v8i64, V0, V1, V2, V3), 0);
 
   // Store the even D registers.
-  Ops.push_back(Reg0); // post-access address offset
-  Ops.push_back(RegSeq);
-  Ops.push_back(Pred);
-  Ops.push_back(Reg0); // predicate register
-  Ops.push_back(Chain);
-  unsigned Opc = QOpcodes0[OpcodeIndex];
-  SDNode *VStA = CurDAG->getMachineNode(Opc, dl, MemAddr.getValueType(),
-                                        MVT::Other, Ops.data(), 7);
+  const SDValue OpsA[] = { MemAddr, Align, Reg0, RegSeq, Pred, Reg0, Chain };
+  SDNode *VStA = CurDAG->getMachineNode(QOpcodes0[OpcodeIndex], dl,
+                                        MemAddr.getValueType(),
+                                        MVT::Other, OpsA, 7);
   Chain = SDValue(VStA, 1);
 
   // Store the odd D registers.
-  Ops[0] = SDValue(VStA, 0); // MemAddr
-  Ops[6] = Chain;
-  Opc = QOpcodes1[OpcodeIndex];
-  SDNode *VStB = CurDAG->getMachineNode(Opc, dl, MemAddr.getValueType(),
-                                        MVT::Other, Ops.data(), 7);
-  Chain = SDValue(VStB, 1);
+  const SDValue OpsB[] = { SDValue(VStA, 0), Align, RegSeq, Pred, Reg0, Chain };
+  SDNode *VStB = CurDAG->getMachineNode(QOpcodes1[OpcodeIndex], dl,
+                                        MVT::Other, OpsB, 6);
+  Chain = SDValue(VStB, 0);
   ReplaceUses(SDValue(N, 0), Chain);
   return NULL;
 }
@@ -2530,9 +2514,9 @@
       unsigned QOpcodes0[] = { ARM::VLD3q8Pseudo_UPD,
                                ARM::VLD3q16Pseudo_UPD,
                                ARM::VLD3q32Pseudo_UPD };
-      unsigned QOpcodes1[] = { ARM::VLD3q8oddPseudo_UPD,
-                               ARM::VLD3q16oddPseudo_UPD,
-                               ARM::VLD3q32oddPseudo_UPD };
+      unsigned QOpcodes1[] = { ARM::VLD3q8oddPseudo,
+                               ARM::VLD3q16oddPseudo,
+                               ARM::VLD3q32oddPseudo };
       return SelectVLD(N, 3, DOpcodes, QOpcodes0, QOpcodes1);
     }
 
@@ -2542,9 +2526,9 @@
       unsigned QOpcodes0[] = { ARM::VLD4q8Pseudo_UPD,
                                ARM::VLD4q16Pseudo_UPD,
                                ARM::VLD4q32Pseudo_UPD };
-      unsigned QOpcodes1[] = { ARM::VLD4q8oddPseudo_UPD,
-                               ARM::VLD4q16oddPseudo_UPD,
-                               ARM::VLD4q32oddPseudo_UPD };
+      unsigned QOpcodes1[] = { ARM::VLD4q8oddPseudo,
+                               ARM::VLD4q16oddPseudo,
+                               ARM::VLD4q32oddPseudo };
       return SelectVLD(N, 4, DOpcodes, QOpcodes0, QOpcodes1);
     }
 
@@ -2591,9 +2575,9 @@
       unsigned QOpcodes0[] = { ARM::VST3q8Pseudo_UPD,
                                ARM::VST3q16Pseudo_UPD,
                                ARM::VST3q32Pseudo_UPD };
-      unsigned QOpcodes1[] = { ARM::VST3q8oddPseudo_UPD,
-                               ARM::VST3q16oddPseudo_UPD,
-                               ARM::VST3q32oddPseudo_UPD };
+      unsigned QOpcodes1[] = { ARM::VST3q8oddPseudo,
+                               ARM::VST3q16oddPseudo,
+                               ARM::VST3q32oddPseudo };
       return SelectVST(N, 3, DOpcodes, QOpcodes0, QOpcodes1);
     }
 
@@ -2603,9 +2587,9 @@
       unsigned QOpcodes0[] = { ARM::VST4q8Pseudo_UPD,
                                ARM::VST4q16Pseudo_UPD,
                                ARM::VST4q32Pseudo_UPD };
-      unsigned QOpcodes1[] = { ARM::VST4q8oddPseudo_UPD,
-                               ARM::VST4q16oddPseudo_UPD,
-                               ARM::VST4q32oddPseudo_UPD };
+      unsigned QOpcodes1[] = { ARM::VST4q8oddPseudo,
+                               ARM::VST4q16oddPseudo,
+                               ARM::VST4q32oddPseudo };
       return SelectVST(N, 4, DOpcodes, QOpcodes0, QOpcodes1);
     }
 

Modified: llvm/trunk/lib/Target/ARM/ARMInstrNEON.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrNEON.td?rev=125013&r1=125012&r2=125013&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrNEON.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrNEON.td Mon Feb  7 11:43:15 2011
@@ -176,6 +176,8 @@
   : PseudoNLdSt<(outs QQPR:$dst, GPR:$wb),
                 (ins addrmode6:$addr, am6offset:$offset), itin,
                 "$addr.addr = $wb">;
+class VLDQQQQPseudo
+  : PseudoNLdSt<(outs QQQQPR:$dst), (ins addrmode6:$addr, QQQQPR:$src), itin,"">;
 class VLDQQQQWBPseudo
   : PseudoNLdSt<(outs QQQQPR:$dst, GPR:$wb),
                 (ins addrmode6:$addr, am6offset:$offset, QQQQPR:$src), itin,
@@ -412,7 +414,7 @@
 def VLD3d16Pseudo_UPD : VLDQQWBPseudo;
 def VLD3d32Pseudo_UPD : VLDQQWBPseudo;
 
-// ...with double-spaced registers (non-updating versions for disassembly only):
+// ...with double-spaced registers:
 def VLD3q8      : VLD3D<0b0101, {0,0,0,?}, "8">;
 def VLD3q16     : VLD3D<0b0101, {0,1,0,?}, "16">;
 def VLD3q32     : VLD3D<0b0101, {1,0,0,?}, "32">;
@@ -425,6 +427,10 @@
 def VLD3q32Pseudo_UPD : VLDQQQQWBPseudo;
 
 // ...alternate versions to be allocated odd register numbers:
+def VLD3q8oddPseudo   : VLDQQQQPseudo;
+def VLD3q16oddPseudo  : VLDQQQQPseudo;
+def VLD3q32oddPseudo  : VLDQQQQPseudo;
+
 def VLD3q8oddPseudo_UPD  : VLDQQQQWBPseudo;
 def VLD3q16oddPseudo_UPD : VLDQQQQWBPseudo;
 def VLD3q32oddPseudo_UPD : VLDQQQQWBPseudo;
@@ -465,7 +471,7 @@
 def VLD4d16Pseudo_UPD : VLDQQWBPseudo;
 def VLD4d32Pseudo_UPD : VLDQQWBPseudo;
 
-// ...with double-spaced registers (non-updating versions for disassembly only):
+// ...with double-spaced registers:
 def VLD4q8      : VLD4D<0b0001, {0,0,?,?}, "8">;
 def VLD4q16     : VLD4D<0b0001, {0,1,?,?}, "16">;
 def VLD4q32     : VLD4D<0b0001, {1,0,?,?}, "32">;
@@ -1017,6 +1023,8 @@
   : PseudoNLdSt<(outs GPR:$wb),
                 (ins addrmode6:$addr, am6offset:$offset, QQPR:$src), itin,
                 "$addr.addr = $wb">;
+class VSTQQQQPseudo
+  : PseudoNLdSt<(outs), (ins addrmode6:$addr, QQQQPR:$src), itin, "">;
 class VSTQQQQWBPseudo
   : PseudoNLdSt<(outs GPR:$wb),
                 (ins addrmode6:$addr, am6offset:$offset, QQQQPR:$src), itin,
@@ -1252,7 +1260,7 @@
 def VST3d16Pseudo_UPD : VSTQQWBPseudo;
 def VST3d32Pseudo_UPD : VSTQQWBPseudo;
 
-// ...with double-spaced registers (non-updating versions for disassembly only):
+// ...with double-spaced registers:
 def VST3q8      : VST3D<0b0101, {0,0,0,?}, "8">;
 def VST3q16     : VST3D<0b0101, {0,1,0,?}, "16">;
 def VST3q32     : VST3D<0b0101, {1,0,0,?}, "32">;
@@ -1265,6 +1273,10 @@
 def VST3q32Pseudo_UPD : VSTQQQQWBPseudo;
 
 // ...alternate versions to be allocated odd register numbers:
+def VST3q8oddPseudo   : VSTQQQQPseudo;
+def VST3q16oddPseudo  : VSTQQQQPseudo;
+def VST3q32oddPseudo  : VSTQQQQPseudo;
+
 def VST3q8oddPseudo_UPD  : VSTQQQQWBPseudo;
 def VST3q16oddPseudo_UPD : VSTQQQQWBPseudo;
 def VST3q32oddPseudo_UPD : VSTQQQQWBPseudo;
@@ -1305,7 +1317,7 @@
 def VST4d16Pseudo_UPD : VSTQQWBPseudo;
 def VST4d32Pseudo_UPD : VSTQQWBPseudo;
 
-// ...with double-spaced registers (non-updating versions for disassembly only):
+// ...with double-spaced registers:
 def VST4q8      : VST4D<0b0001, {0,0,?,?}, "8">;
 def VST4q16     : VST4D<0b0001, {0,1,?,?}, "16">;
 def VST4q32     : VST4D<0b0001, {1,0,?,?}, "32">;
@@ -1318,6 +1330,10 @@
 def VST4q32Pseudo_UPD : VSTQQQQWBPseudo;
 
 // ...alternate versions to be allocated odd register numbers:
+def VST4q8oddPseudo   : VSTQQQQPseudo;
+def VST4q16oddPseudo  : VSTQQQQPseudo;
+def VST4q32oddPseudo  : VSTQQQQPseudo;
+
 def VST4q8oddPseudo_UPD  : VSTQQQQWBPseudo;
 def VST4q16oddPseudo_UPD : VSTQQQQWBPseudo;
 def VST4q32oddPseudo_UPD : VSTQQQQWBPseudo;



From bob.wilson at apple.com  Mon Feb  7 11:43:21 2011
From: bob.wilson at apple.com (Bob Wilson)
Date: Mon, 07 Feb 2011 17:43:21 -0000
Subject: [llvm-commits] [llvm] r125014 - in /llvm/trunk:
 lib/Target/ARM/ARMISelDAGToDAG.cpp lib/Target/ARM/ARMISelLowering.cpp
 lib/Target/ARM/ARMISelLowering.h test/CodeGen/ARM/vld1.ll
 test/CodeGen/ARM/vld2.ll test/CodeGen/ARM/vld3.ll test/CodeGen/ARM/vld4.ll
 test/CodeGen/ARM/vlddup.ll test/CodeGen/ARM/vldlane.ll
 test/CodeGen/ARM/vst1.ll test/CodeGen/ARM/vst2.ll test/CodeGen/ARM/vst3.ll
 test/CodeGen/ARM/vst4.ll test/CodeGen/ARM/vstlane.ll
Message-ID: <20110207174322.1BE182A6C12C@llvm.org>

Author: bwilson
Date: Mon Feb  7 11:43:21 2011
New Revision: 125014

URL: http://llvm.org/viewvc/llvm-project?rev=125014&view=rev
Log:
Add codegen support for using post-increment NEON load/store instructions.

The vld1-lane, vld1-dup and vst1-lane instructions do not yet support using
post-increment versions, but all the rest of the NEON load/store instructions
should be handled now.

Modified:
    llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
    llvm/trunk/lib/Target/ARM/ARMISelLowering.h
    llvm/trunk/test/CodeGen/ARM/vld1.ll
    llvm/trunk/test/CodeGen/ARM/vld2.ll
    llvm/trunk/test/CodeGen/ARM/vld3.ll
    llvm/trunk/test/CodeGen/ARM/vld4.ll
    llvm/trunk/test/CodeGen/ARM/vlddup.ll
    llvm/trunk/test/CodeGen/ARM/vldlane.ll
    llvm/trunk/test/CodeGen/ARM/vst1.ll
    llvm/trunk/test/CodeGen/ARM/vst2.ll
    llvm/trunk/test/CodeGen/ARM/vst3.ll
    llvm/trunk/test/CodeGen/ARM/vst4.ll
    llvm/trunk/test/CodeGen/ARM/vstlane.ll

Modified: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp?rev=125014&r1=125013&r2=125014&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp Mon Feb  7 11:43:21 2011
@@ -196,26 +196,30 @@
   /// 1, 2, 3 or 4.  The opcode arrays specify the instructions used for
   /// loads of D registers and even subregs and odd subregs of Q registers.
   /// For NumVecs <= 2, QOpcodes1 is not used.
-  SDNode *SelectVLD(SDNode *N, unsigned NumVecs, unsigned *DOpcodes,
+  SDNode *SelectVLD(SDNode *N, bool isUpdating, unsigned NumVecs,
+                    unsigned *DOpcodes,
                     unsigned *QOpcodes0, unsigned *QOpcodes1);
 
   /// SelectVST - Select NEON store intrinsics.  NumVecs should
   /// be 1, 2, 3 or 4.  The opcode arrays specify the instructions used for
   /// stores of D registers and even subregs and odd subregs of Q registers.
   /// For NumVecs <= 2, QOpcodes1 is not used.
-  SDNode *SelectVST(SDNode *N, unsigned NumVecs, unsigned *DOpcodes,
+  SDNode *SelectVST(SDNode *N, bool isUpdating, unsigned NumVecs,
+                    unsigned *DOpcodes,
                     unsigned *QOpcodes0, unsigned *QOpcodes1);
 
   /// SelectVLDSTLane - Select NEON load/store lane intrinsics.  NumVecs should
   /// be 2, 3 or 4.  The opcode arrays specify the instructions used for
   /// load/store of D registers and Q registers.
-  SDNode *SelectVLDSTLane(SDNode *N, bool IsLoad, unsigned NumVecs,
+  SDNode *SelectVLDSTLane(SDNode *N, bool IsLoad,
+                          bool isUpdating, unsigned NumVecs,
                           unsigned *DOpcodes, unsigned *QOpcodes);
 
   /// SelectVLDDup - Select NEON load-duplicate intrinsics.  NumVecs
   /// should be 2, 3 or 4.  The opcode array specifies the instructions used
   /// for loading D registers.  (Q registers are not supported.)
-  SDNode *SelectVLDDup(SDNode *N, unsigned NumVecs, unsigned *Opcodes);
+  SDNode *SelectVLDDup(SDNode *N, bool isUpdating, unsigned NumVecs,
+                       unsigned *Opcodes);
 
   /// SelectVTBL - Select NEON VTBL and VTBX intrinsics.  NumVecs should be 2,
   /// 3 or 4.  These are custom-selected so that a REG_SEQUENCE can be
@@ -1439,14 +1443,15 @@
   return CurDAG->getTargetConstant(Alignment, MVT::i32);
 }
 
-SDNode *ARMDAGToDAGISel::SelectVLD(SDNode *N, unsigned NumVecs,
+SDNode *ARMDAGToDAGISel::SelectVLD(SDNode *N, bool isUpdating, unsigned NumVecs,
                                    unsigned *DOpcodes, unsigned *QOpcodes0,
                                    unsigned *QOpcodes1) {
   assert(NumVecs >= 1 && NumVecs <= 4 && "VLD NumVecs out-of-range");
   DebugLoc dl = N->getDebugLoc();
 
   SDValue MemAddr, Align;
-  if (!SelectAddrMode6(N, N->getOperand(2), MemAddr, Align))
+  unsigned AddrOpIdx = isUpdating ? 1 : 2;
+  if (!SelectAddrMode6(N, N->getOperand(AddrOpIdx), MemAddr, Align))
     return NULL;
 
   SDValue Chain = N->getOperand(0);
@@ -1482,46 +1487,39 @@
       ResTyElts *= 2;
     ResTy = EVT::getVectorVT(*CurDAG->getContext(), MVT::i64, ResTyElts);
   }
+  std::vector ResTys;
+  ResTys.push_back(ResTy);
+  if (isUpdating)
+    ResTys.push_back(MVT::i32);
+  ResTys.push_back(MVT::Other);
 
   SDValue Pred = getAL(CurDAG);
   SDValue Reg0 = CurDAG->getRegister(0, MVT::i32);
-  SDValue SuperReg;
-  if (is64BitVector) {
-    const SDValue Ops[] = { MemAddr, Align, Pred, Reg0, Chain };
-    SDNode *VLd = CurDAG->getMachineNode(DOpcodes[OpcodeIndex], dl,
-                                         ResTy, MVT::Other, Ops, 5);
-    if (NumVecs == 1)
-      return VLd;
-
-    SuperReg = SDValue(VLd, 0);
-    assert(ARM::dsub_7 == ARM::dsub_0+7 && "Unexpected subreg numbering");
-    for (unsigned Vec = 0; Vec < NumVecs; ++Vec) {
-      SDValue D = CurDAG->getTargetExtractSubreg(ARM::dsub_0+Vec,
-                                                 dl, VT, SuperReg);
-      ReplaceUses(SDValue(N, Vec), D);
-    }
-    ReplaceUses(SDValue(N, NumVecs), SDValue(VLd, 1));
-    return NULL;
-  }
-
-  if (NumVecs <= 2) {
-    // Quad registers are directly supported for VLD1 and VLD2,
-    // loading pairs of D regs.
-    const SDValue Ops[] = { MemAddr, Align, Pred, Reg0, Chain };
-    SDNode *VLd = CurDAG->getMachineNode(QOpcodes0[OpcodeIndex], dl,
-                                         ResTy, MVT::Other, Ops, 5);
-    if (NumVecs == 1)
-      return VLd;
+  SDNode *VLd;
+  SmallVector Ops;
 
-    SuperReg = SDValue(VLd, 0);
-    Chain = SDValue(VLd, 1);
+  // Double registers and VLD1/VLD2 quad registers are directly supported.
+  if (is64BitVector || NumVecs <= 2) {
+    unsigned Opc = (is64BitVector ? DOpcodes[OpcodeIndex] :
+                    QOpcodes0[OpcodeIndex]);
+    Ops.push_back(MemAddr);
+    Ops.push_back(Align);
+    if (isUpdating) {
+      SDValue Inc = N->getOperand(AddrOpIdx + 1);
+      Ops.push_back(isa(Inc.getNode()) ? Reg0 : Inc);
+    }
+    Ops.push_back(Pred);
+    Ops.push_back(Reg0);
+    Ops.push_back(Chain);
+    VLd = CurDAG->getMachineNode(Opc, dl, ResTys, Ops.data(), Ops.size());
 
   } else {
     // Otherwise, quad registers are loaded with two separate instructions,
     // where one loads the even registers and the other loads the odd registers.
     EVT AddrTy = MemAddr.getValueType();
 
-    // Load the even subregs.
+    // Load the even subregs.  This is always an updating load, so that it
+    // provides the address to the second load for the odd subregs.
     SDValue ImplDef =
       SDValue(CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, dl, ResTy), 0);
     const SDValue OpsA[] = { MemAddr, Align, Reg0, ImplDef, Pred, Reg0, Chain };
@@ -1530,37 +1528,54 @@
     Chain = SDValue(VLdA, 2);
 
     // Load the odd subregs.
-    const SDValue OpsB[] = { SDValue(VLdA, 1), Align, SDValue(VLdA, 0),
-                             Pred, Reg0, Chain };
-    SDNode *VLdB = CurDAG->getMachineNode(QOpcodes1[OpcodeIndex], dl,
-                                          ResTy, MVT::Other, OpsB, 6);
-    SuperReg = SDValue(VLdB, 0);
-    Chain = SDValue(VLdB, 1);
-  }
-
-  // Extract out the Q registers.
-  assert(ARM::qsub_3 == ARM::qsub_0+3 && "Unexpected subreg numbering");
-  for (unsigned Vec = 0; Vec < NumVecs; ++Vec) {
-    SDValue Q = CurDAG->getTargetExtractSubreg(ARM::qsub_0+Vec,
-                                               dl, VT, SuperReg);
-    ReplaceUses(SDValue(N, Vec), Q);
+    Ops.push_back(SDValue(VLdA, 1));
+    Ops.push_back(Align);
+    if (isUpdating) {
+      SDValue Inc = N->getOperand(AddrOpIdx + 1);
+      assert(isa(Inc.getNode()) &&
+             "only constant post-increment update allowed for VLD3/4");
+      (void)Inc;
+      Ops.push_back(Reg0);
+    }
+    Ops.push_back(SDValue(VLdA, 0));
+    Ops.push_back(Pred);
+    Ops.push_back(Reg0);
+    Ops.push_back(Chain);
+    VLd = CurDAG->getMachineNode(QOpcodes1[OpcodeIndex], dl, ResTys,
+                                 Ops.data(), Ops.size());
   }
-  ReplaceUses(SDValue(N, NumVecs), Chain);
+
+  if (NumVecs == 1)
+    return VLd;
+
+  // Extract out the subregisters.
+  SDValue SuperReg = SDValue(VLd, 0);
+  assert(ARM::dsub_7 == ARM::dsub_0+7 &&
+         ARM::qsub_3 == ARM::qsub_0+3 && "Unexpected subreg numbering");
+  unsigned Sub0 = (is64BitVector ? ARM::dsub_0 : ARM::qsub_0);
+  for (unsigned Vec = 0; Vec < NumVecs; ++Vec)
+    ReplaceUses(SDValue(N, Vec),
+                CurDAG->getTargetExtractSubreg(Sub0 + Vec, dl, VT, SuperReg));
+  ReplaceUses(SDValue(N, NumVecs), SDValue(VLd, 1));
+  if (isUpdating)
+    ReplaceUses(SDValue(N, NumVecs + 1), SDValue(VLd, 2));
   return NULL;
 }
 
-SDNode *ARMDAGToDAGISel::SelectVST(SDNode *N, unsigned NumVecs,
+SDNode *ARMDAGToDAGISel::SelectVST(SDNode *N, bool isUpdating, unsigned NumVecs,
                                    unsigned *DOpcodes, unsigned *QOpcodes0,
                                    unsigned *QOpcodes1) {
   assert(NumVecs >= 1 && NumVecs <= 4 && "VST NumVecs out-of-range");
   DebugLoc dl = N->getDebugLoc();
 
   SDValue MemAddr, Align;
-  if (!SelectAddrMode6(N, N->getOperand(2), MemAddr, Align))
+  unsigned AddrOpIdx = isUpdating ? 1 : 2;
+  unsigned Vec0Idx = 3; // AddrOpIdx + (isUpdating ? 2 : 1)
+  if (!SelectAddrMode6(N, N->getOperand(AddrOpIdx), MemAddr, Align))
     return NULL;
 
   SDValue Chain = N->getOperand(0);
-  EVT VT = N->getOperand(3).getValueType();
+  EVT VT = N->getOperand(Vec0Idx).getValueType();
   bool is64BitVector = VT.is64BitVector();
   Align = GetVLDSTAlign(Align, NumVecs, is64BitVector);
 
@@ -1583,64 +1598,71 @@
     break;
   }
 
+  std::vector ResTys;
+  if (isUpdating)
+    ResTys.push_back(MVT::i32);
+  ResTys.push_back(MVT::Other);
+
   SDValue Pred = getAL(CurDAG);
   SDValue Reg0 = CurDAG->getRegister(0, MVT::i32);
+  SmallVector Ops;
 
-  if (is64BitVector) {
+  // Double registers and VST1/VST2 quad registers are directly supported.
+  if (is64BitVector || NumVecs <= 2) {
     SDValue SrcReg;
     if (NumVecs == 1) {
-      SrcReg = N->getOperand(3);
-    } else {
-      SDValue V0 = N->getOperand(0+3);
-      SDValue V1 = N->getOperand(1+3);
-
+      SrcReg = N->getOperand(Vec0Idx);
+    } else if (is64BitVector) {
       // Form a REG_SEQUENCE to force register allocation.
+      SDValue V0 = N->getOperand(Vec0Idx + 0);
+      SDValue V1 = N->getOperand(Vec0Idx + 1);
       if (NumVecs == 2)
         SrcReg = SDValue(PairDRegs(MVT::v2i64, V0, V1), 0);
       else {
-        SDValue V2 = N->getOperand(2+3);
+        SDValue V2 = N->getOperand(Vec0Idx + 2);
         // If it's a vst3, form a quad D-register and leave the last part as
         // an undef.
         SDValue V3 = (NumVecs == 3)
           ? SDValue(CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF,dl,VT), 0)
-          : N->getOperand(3+3);
+          : N->getOperand(Vec0Idx + 3);
         SrcReg = SDValue(QuadDRegs(MVT::v4i64, V0, V1, V2, V3), 0);
       }
-    }
-    const SDValue Ops[] = { MemAddr, Align, SrcReg, Pred, Reg0, Chain };
-    return CurDAG->getMachineNode(DOpcodes[OpcodeIndex], dl,
-                                  MVT::Other, Ops, 6);
-  }
-
-  if (NumVecs <= 2) {
-    // Quad registers are directly supported for VST1 and VST2.
-    SDValue SrcReg;
-    if (NumVecs == 1) {
-      SrcReg = N->getOperand(3);
     } else {
       // Form a QQ register.
-      SDValue Q0 = N->getOperand(3);
-      SDValue Q1 = N->getOperand(4);
+      SDValue Q0 = N->getOperand(Vec0Idx);
+      SDValue Q1 = N->getOperand(Vec0Idx + 1);
       SrcReg = SDValue(PairQRegs(MVT::v4i64, Q0, Q1), 0);
     }
-    const SDValue Ops[] = { MemAddr, Align, SrcReg, Pred, Reg0, Chain };
-    return CurDAG->getMachineNode(QOpcodes0[OpcodeIndex], dl,
-                                  MVT::Other, Ops, 6);
+
+    unsigned Opc = (is64BitVector ? DOpcodes[OpcodeIndex] :
+                    QOpcodes0[OpcodeIndex]);
+    Ops.push_back(MemAddr);
+    Ops.push_back(Align);
+    if (isUpdating) {
+      SDValue Inc = N->getOperand(AddrOpIdx + 1);
+      Ops.push_back(isa(Inc.getNode()) ? Reg0 : Inc);
+    }
+    Ops.push_back(SrcReg);
+    Ops.push_back(Pred);
+    Ops.push_back(Reg0);
+    Ops.push_back(Chain);
+    return CurDAG->getMachineNode(Opc, dl, ResTys, Ops.data(), Ops.size());
   }
 
   // Otherwise, quad registers are stored with two separate instructions,
   // where one stores the even registers and the other stores the odd registers.
 
   // Form the QQQQ REG_SEQUENCE.
-  SDValue V0 = N->getOperand(0+3);
-  SDValue V1 = N->getOperand(1+3);
-  SDValue V2 = N->getOperand(2+3);
+  SDValue V0 = N->getOperand(Vec0Idx + 0);
+  SDValue V1 = N->getOperand(Vec0Idx + 1);
+  SDValue V2 = N->getOperand(Vec0Idx + 2);
   SDValue V3 = (NumVecs == 3)
     ? SDValue(CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, dl, VT), 0)
-    : N->getOperand(3+3);
+    : N->getOperand(Vec0Idx + 3);
   SDValue RegSeq = SDValue(QuadQRegs(MVT::v8i64, V0, V1, V2, V3), 0);
 
-  // Store the even D registers.
+  // Store the even D registers.  This is always an updating store, so that it
+  // provides the address to the second store for the odd subregs.
   const SDValue OpsA[] = { MemAddr, Align, Reg0, RegSeq, Pred, Reg0, Chain };
   SDNode *VStA = CurDAG->getMachineNode(QOpcodes0[OpcodeIndex], dl,
                                         MemAddr.getValueType(),
@@ -1648,28 +1670,40 @@
   Chain = SDValue(VStA, 1);
 
   // Store the odd D registers.
-  const SDValue OpsB[] = { SDValue(VStA, 0), Align, RegSeq, Pred, Reg0, Chain };
-  SDNode *VStB = CurDAG->getMachineNode(QOpcodes1[OpcodeIndex], dl,
-                                        MVT::Other, OpsB, 6);
-  Chain = SDValue(VStB, 0);
-  ReplaceUses(SDValue(N, 0), Chain);
-  return NULL;
+  Ops.push_back(SDValue(VStA, 0));
+  Ops.push_back(Align);
+  if (isUpdating) {
+    SDValue Inc = N->getOperand(AddrOpIdx + 1);
+    assert(isa(Inc.getNode()) &&
+           "only constant post-increment update allowed for VST3/4");
+    (void)Inc;
+    Ops.push_back(Reg0);
+  }
+  Ops.push_back(RegSeq);
+  Ops.push_back(Pred);
+  Ops.push_back(Reg0);
+  Ops.push_back(Chain);
+  return CurDAG->getMachineNode(QOpcodes1[OpcodeIndex], dl, ResTys,
+                                Ops.data(), Ops.size());
 }
 
 SDNode *ARMDAGToDAGISel::SelectVLDSTLane(SDNode *N, bool IsLoad,
-                                         unsigned NumVecs, unsigned *DOpcodes,
+                                         bool isUpdating, unsigned NumVecs,
+                                         unsigned *DOpcodes,
                                          unsigned *QOpcodes) {
   assert(NumVecs >=2 && NumVecs <= 4 && "VLDSTLane NumVecs out-of-range");
   DebugLoc dl = N->getDebugLoc();
 
   SDValue MemAddr, Align;
-  if (!SelectAddrMode6(N, N->getOperand(2), MemAddr, Align))
+  unsigned AddrOpIdx = isUpdating ? 1 : 2;
+  unsigned Vec0Idx = 3; // AddrOpIdx + (isUpdating ? 2 : 1)
+  if (!SelectAddrMode6(N, N->getOperand(AddrOpIdx), MemAddr, Align))
     return NULL;
 
   SDValue Chain = N->getOperand(0);
   unsigned Lane =
-    cast(N->getOperand(NumVecs+3))->getZExtValue();
-  EVT VT = IsLoad ? N->getValueType(0) : N->getOperand(3).getValueType();
+    cast(N->getOperand(Vec0Idx + NumVecs))->getZExtValue();
+  EVT VT = N->getOperand(Vec0Idx).getValueType();
   bool is64BitVector = VT.is64BitVector();
 
   unsigned Alignment = 0;
@@ -1701,29 +1735,42 @@
   case MVT::v4i32: OpcodeIndex = 1; break;
   }
 
+  std::vector ResTys;
+  if (IsLoad) {
+    unsigned ResTyElts = (NumVecs == 3) ? 4 : NumVecs;
+    if (!is64BitVector)
+      ResTyElts *= 2;
+    ResTys.push_back(EVT::getVectorVT(*CurDAG->getContext(),
+                                      MVT::i64, ResTyElts));
+  }
+  if (isUpdating)
+    ResTys.push_back(MVT::i32);
+  ResTys.push_back(MVT::Other);
+
   SDValue Pred = getAL(CurDAG);
   SDValue Reg0 = CurDAG->getRegister(0, MVT::i32);
 
-  SmallVector Ops;
+  SmallVector Ops;
   Ops.push_back(MemAddr);
   Ops.push_back(Align);
-
-  unsigned Opc = (is64BitVector ? DOpcodes[OpcodeIndex] :
-                                  QOpcodes[OpcodeIndex]);
+  if (isUpdating) {
+    SDValue Inc = N->getOperand(AddrOpIdx + 1);
+    Ops.push_back(isa(Inc.getNode()) ? Reg0 : Inc);
+  }
 
   SDValue SuperReg;
-  SDValue V0 = N->getOperand(0+3);
-  SDValue V1 = N->getOperand(1+3);
+  SDValue V0 = N->getOperand(Vec0Idx + 0);
+  SDValue V1 = N->getOperand(Vec0Idx + 1);
   if (NumVecs == 2) {
     if (is64BitVector)
       SuperReg = SDValue(PairDRegs(MVT::v2i64, V0, V1), 0);
     else
       SuperReg = SDValue(PairQRegs(MVT::v4i64, V0, V1), 0);
   } else {
-    SDValue V2 = N->getOperand(2+3);
+    SDValue V2 = N->getOperand(Vec0Idx + 2);
     SDValue V3 = (NumVecs == 3)
-      ? SDValue(CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF,dl,VT), 0)
-      : N->getOperand(3+3);
+      ? SDValue(CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, dl, VT), 0)
+      : N->getOperand(Vec0Idx + 3);
     if (is64BitVector)
       SuperReg = SDValue(QuadDRegs(MVT::v4i64, V0, V1, V2, V3), 0);
     else
@@ -1735,33 +1782,29 @@
   Ops.push_back(Reg0);
   Ops.push_back(Chain);
 
+  unsigned Opc = (is64BitVector ? DOpcodes[OpcodeIndex] :
+                                  QOpcodes[OpcodeIndex]);
+  SDNode *VLdLn = CurDAG->getMachineNode(Opc, dl, ResTys,
+                                         Ops.data(), Ops.size());
   if (!IsLoad)
-    return CurDAG->getMachineNode(Opc, dl, MVT::Other, Ops.data(), 7);
-
-  EVT ResTy;
-  unsigned ResTyElts = (NumVecs == 3) ? 4 : NumVecs;
-  if (!is64BitVector)
-    ResTyElts *= 2;
-  ResTy = EVT::getVectorVT(*CurDAG->getContext(), MVT::i64, ResTyElts);
-
-  SDNode *VLdLn = CurDAG->getMachineNode(Opc, dl, ResTy, MVT::Other,
-                                         Ops.data(), 7);
-  SuperReg = SDValue(VLdLn, 0);
-  Chain = SDValue(VLdLn, 1);
+    return VLdLn;
 
   // Extract the subregisters.
-  assert(ARM::dsub_7 == ARM::dsub_0+7 && "Unexpected subreg numbering");
-  assert(ARM::qsub_3 == ARM::qsub_0+3 && "Unexpected subreg numbering");
-  unsigned SubIdx = is64BitVector ? ARM::dsub_0 : ARM::qsub_0;
+  SuperReg = SDValue(VLdLn, 0);
+  assert(ARM::dsub_7 == ARM::dsub_0+7 &&
+         ARM::qsub_3 == ARM::qsub_0+3 && "Unexpected subreg numbering");
+  unsigned Sub0 = is64BitVector ? ARM::dsub_0 : ARM::qsub_0;
   for (unsigned Vec = 0; Vec < NumVecs; ++Vec)
     ReplaceUses(SDValue(N, Vec),
-                CurDAG->getTargetExtractSubreg(SubIdx+Vec, dl, VT, SuperReg));
-  ReplaceUses(SDValue(N, NumVecs), Chain);
+                CurDAG->getTargetExtractSubreg(Sub0 + Vec, dl, VT, SuperReg));
+  ReplaceUses(SDValue(N, NumVecs), SDValue(VLdLn, 1));
+  if (isUpdating)
+    ReplaceUses(SDValue(N, NumVecs + 1), SDValue(VLdLn, 2));
   return NULL;
 }
 
-SDNode *ARMDAGToDAGISel::SelectVLDDup(SDNode *N, unsigned NumVecs,
-                                      unsigned *Opcodes) {
+SDNode *ARMDAGToDAGISel::SelectVLDDup(SDNode *N, bool isUpdating,
+                                      unsigned NumVecs, unsigned *Opcodes) {
   assert(NumVecs >=2 && NumVecs <= 4 && "VLDDup NumVecs out-of-range");
   DebugLoc dl = N->getDebugLoc();
 
@@ -1800,13 +1843,26 @@
   SDValue Reg0 = CurDAG->getRegister(0, MVT::i32);
   SDValue SuperReg;
   unsigned Opc = Opcodes[OpcodeIndex];
-  const SDValue Ops[] = { MemAddr, Align, Pred, Reg0, Chain };
+  SmallVector Ops;
+  Ops.push_back(MemAddr);
+  Ops.push_back(Align);
+  if (isUpdating) {
+    SDValue Inc = N->getOperand(2);
+    Ops.push_back(isa(Inc.getNode()) ? Reg0 : Inc);
+  }
+  Ops.push_back(Pred);
+  Ops.push_back(Reg0);
+  Ops.push_back(Chain);
 
   unsigned ResTyElts = (NumVecs == 3) ? 4 : NumVecs;
-  EVT ResTy = EVT::getVectorVT(*CurDAG->getContext(), MVT::i64, ResTyElts);
-  SDNode *VLdDup = CurDAG->getMachineNode(Opc, dl, ResTy, MVT::Other, Ops, 5);
+  std::vector ResTys;
+  ResTys.push_back(EVT::getVectorVT(*CurDAG->getContext(), MVT::i64, ResTyElts));
+  if (isUpdating)
+    ResTys.push_back(MVT::i32);
+  ResTys.push_back(MVT::Other);
+  SDNode *VLdDup =
+    CurDAG->getMachineNode(Opc, dl, ResTys, Ops.data(), Ops.size());
   SuperReg = SDValue(VLdDup, 0);
-  Chain = SDValue(VLdDup, 1);
 
   // Extract the subregisters.
   assert(ARM::dsub_7 == ARM::dsub_0+7 && "Unexpected subreg numbering");
@@ -1814,7 +1870,9 @@
   for (unsigned Vec = 0; Vec < NumVecs; ++Vec)
     ReplaceUses(SDValue(N, Vec),
                 CurDAG->getTargetExtractSubreg(SubIdx+Vec, dl, VT, SuperReg));
-  ReplaceUses(SDValue(N, NumVecs), Chain);
+  ReplaceUses(SDValue(N, NumVecs), SDValue(VLdDup, 1));
+  if (isUpdating)
+    ReplaceUses(SDValue(N, NumVecs + 1), SDValue(VLdDup, 2));
   return NULL;
 }
 
@@ -2470,19 +2528,165 @@
   case ARMISD::VLD2DUP: {
     unsigned Opcodes[] = { ARM::VLD2DUPd8Pseudo, ARM::VLD2DUPd16Pseudo,
                            ARM::VLD2DUPd32Pseudo };
-    return SelectVLDDup(N, 2, Opcodes);
+    return SelectVLDDup(N, false, 2, Opcodes);
   }
 
   case ARMISD::VLD3DUP: {
     unsigned Opcodes[] = { ARM::VLD3DUPd8Pseudo, ARM::VLD3DUPd16Pseudo,
                            ARM::VLD3DUPd32Pseudo };
-    return SelectVLDDup(N, 3, Opcodes);
+    return SelectVLDDup(N, false, 3, Opcodes);
   }
 
   case ARMISD::VLD4DUP: {
     unsigned Opcodes[] = { ARM::VLD4DUPd8Pseudo, ARM::VLD4DUPd16Pseudo,
                            ARM::VLD4DUPd32Pseudo };
-    return SelectVLDDup(N, 4, Opcodes);
+    return SelectVLDDup(N, false, 4, Opcodes);
+  }
+
+  case ARMISD::VLD2DUP_UPD: {
+    unsigned Opcodes[] = { ARM::VLD2DUPd8Pseudo_UPD, ARM::VLD2DUPd16Pseudo_UPD,
+                           ARM::VLD2DUPd32Pseudo_UPD };
+    return SelectVLDDup(N, true, 2, Opcodes);
+  }
+
+  case ARMISD::VLD3DUP_UPD: {
+    unsigned Opcodes[] = { ARM::VLD3DUPd8Pseudo_UPD, ARM::VLD3DUPd16Pseudo_UPD,
+                           ARM::VLD3DUPd32Pseudo_UPD };
+    return SelectVLDDup(N, true, 3, Opcodes);
+  }
+
+  case ARMISD::VLD4DUP_UPD: {
+    unsigned Opcodes[] = { ARM::VLD4DUPd8Pseudo_UPD, ARM::VLD4DUPd16Pseudo_UPD,
+                           ARM::VLD4DUPd32Pseudo_UPD };
+    return SelectVLDDup(N, true, 4, Opcodes);
+  }
+
+  case ARMISD::VLD1_UPD: {
+    unsigned DOpcodes[] = { ARM::VLD1d8_UPD, ARM::VLD1d16_UPD,
+                            ARM::VLD1d32_UPD, ARM::VLD1d64_UPD };
+    unsigned QOpcodes[] = { ARM::VLD1q8Pseudo_UPD, ARM::VLD1q16Pseudo_UPD,
+                            ARM::VLD1q32Pseudo_UPD, ARM::VLD1q64Pseudo_UPD };
+    return SelectVLD(N, true, 1, DOpcodes, QOpcodes, 0);
+  }
+
+  case ARMISD::VLD2_UPD: {
+    unsigned DOpcodes[] = { ARM::VLD2d8Pseudo_UPD, ARM::VLD2d16Pseudo_UPD,
+                            ARM::VLD2d32Pseudo_UPD, ARM::VLD1q64Pseudo_UPD };
+    unsigned QOpcodes[] = { ARM::VLD2q8Pseudo_UPD, ARM::VLD2q16Pseudo_UPD,
+                            ARM::VLD2q32Pseudo_UPD };
+    return SelectVLD(N, true, 2, DOpcodes, QOpcodes, 0);
+  }
+
+  case ARMISD::VLD3_UPD: {
+    unsigned DOpcodes[] = { ARM::VLD3d8Pseudo_UPD, ARM::VLD3d16Pseudo_UPD,
+                            ARM::VLD3d32Pseudo_UPD, ARM::VLD1d64TPseudo_UPD };
+    unsigned QOpcodes0[] = { ARM::VLD3q8Pseudo_UPD,
+                             ARM::VLD3q16Pseudo_UPD,
+                             ARM::VLD3q32Pseudo_UPD };
+    unsigned QOpcodes1[] = { ARM::VLD3q8oddPseudo_UPD,
+                             ARM::VLD3q16oddPseudo_UPD,
+                             ARM::VLD3q32oddPseudo_UPD };
+    return SelectVLD(N, true, 3, DOpcodes, QOpcodes0, QOpcodes1);
+  }
+
+  case ARMISD::VLD4_UPD: {
+    unsigned DOpcodes[] = { ARM::VLD4d8Pseudo_UPD, ARM::VLD4d16Pseudo_UPD,
+                            ARM::VLD4d32Pseudo_UPD, ARM::VLD1d64QPseudo_UPD };
+    unsigned QOpcodes0[] = { ARM::VLD4q8Pseudo_UPD,
+                             ARM::VLD4q16Pseudo_UPD,
+                             ARM::VLD4q32Pseudo_UPD };
+    unsigned QOpcodes1[] = { ARM::VLD4q8oddPseudo_UPD,
+                             ARM::VLD4q16oddPseudo_UPD,
+                             ARM::VLD4q32oddPseudo_UPD };
+    return SelectVLD(N, true, 4, DOpcodes, QOpcodes0, QOpcodes1);
+  }
+
+  case ARMISD::VLD2LN_UPD: {
+    unsigned DOpcodes[] = { ARM::VLD2LNd8Pseudo_UPD, ARM::VLD2LNd16Pseudo_UPD,
+                            ARM::VLD2LNd32Pseudo_UPD };
+    unsigned QOpcodes[] = { ARM::VLD2LNq16Pseudo_UPD,
+                            ARM::VLD2LNq32Pseudo_UPD };
+    return SelectVLDSTLane(N, true, true, 2, DOpcodes, QOpcodes);
+  }
+
+  case ARMISD::VLD3LN_UPD: {
+    unsigned DOpcodes[] = { ARM::VLD3LNd8Pseudo_UPD, ARM::VLD3LNd16Pseudo_UPD,
+                            ARM::VLD3LNd32Pseudo_UPD };
+    unsigned QOpcodes[] = { ARM::VLD3LNq16Pseudo_UPD,
+                            ARM::VLD3LNq32Pseudo_UPD };
+    return SelectVLDSTLane(N, true, true, 3, DOpcodes, QOpcodes);
+  }
+
+  case ARMISD::VLD4LN_UPD: {
+    unsigned DOpcodes[] = { ARM::VLD4LNd8Pseudo_UPD, ARM::VLD4LNd16Pseudo_UPD,
+                            ARM::VLD4LNd32Pseudo_UPD };
+    unsigned QOpcodes[] = { ARM::VLD4LNq16Pseudo_UPD,
+                            ARM::VLD4LNq32Pseudo_UPD };
+    return SelectVLDSTLane(N, true, true, 4, DOpcodes, QOpcodes);
+  }
+
+  case ARMISD::VST1_UPD: {
+    unsigned DOpcodes[] = { ARM::VST1d8_UPD, ARM::VST1d16_UPD,
+                            ARM::VST1d32_UPD, ARM::VST1d64_UPD };
+    unsigned QOpcodes[] = { ARM::VST1q8Pseudo_UPD, ARM::VST1q16Pseudo_UPD,
+                            ARM::VST1q32Pseudo_UPD, ARM::VST1q64Pseudo_UPD };
+    return SelectVST(N, true, 1, DOpcodes, QOpcodes, 0);
+  }
+
+  case ARMISD::VST2_UPD: {
+    unsigned DOpcodes[] = { ARM::VST2d8Pseudo_UPD, ARM::VST2d16Pseudo_UPD,
+                            ARM::VST2d32Pseudo_UPD, ARM::VST1q64Pseudo_UPD };
+    unsigned QOpcodes[] = { ARM::VST2q8Pseudo_UPD, ARM::VST2q16Pseudo_UPD,
+                            ARM::VST2q32Pseudo_UPD };
+    return SelectVST(N, true, 2, DOpcodes, QOpcodes, 0);
+  }
+
+  case ARMISD::VST3_UPD: {
+    unsigned DOpcodes[] = { ARM::VST3d8Pseudo_UPD, ARM::VST3d16Pseudo_UPD,
+                            ARM::VST3d32Pseudo_UPD, ARM::VST1d64TPseudo_UPD };
+    unsigned QOpcodes0[] = { ARM::VST3q8Pseudo_UPD,
+                             ARM::VST3q16Pseudo_UPD,
+                             ARM::VST3q32Pseudo_UPD };
+    unsigned QOpcodes1[] = { ARM::VST3q8oddPseudo_UPD,
+                             ARM::VST3q16oddPseudo_UPD,
+                             ARM::VST3q32oddPseudo_UPD };
+    return SelectVST(N, true, 3, DOpcodes, QOpcodes0, QOpcodes1);
+  }
+
+  case ARMISD::VST4_UPD: {
+    unsigned DOpcodes[] = { ARM::VST4d8Pseudo_UPD, ARM::VST4d16Pseudo_UPD,
+                            ARM::VST4d32Pseudo_UPD, ARM::VST1d64QPseudo_UPD };
+    unsigned QOpcodes0[] = { ARM::VST4q8Pseudo_UPD,
+                             ARM::VST4q16Pseudo_UPD,
+                             ARM::VST4q32Pseudo_UPD };
+    unsigned QOpcodes1[] = { ARM::VST4q8oddPseudo_UPD,
+                             ARM::VST4q16oddPseudo_UPD,
+                             ARM::VST4q32oddPseudo_UPD };
+    return SelectVST(N, true, 4, DOpcodes, QOpcodes0, QOpcodes1);
+  }
+
+  case ARMISD::VST2LN_UPD: {
+    unsigned DOpcodes[] = { ARM::VST2LNd8Pseudo_UPD, ARM::VST2LNd16Pseudo_UPD,
+                            ARM::VST2LNd32Pseudo_UPD };
+    unsigned QOpcodes[] = { ARM::VST2LNq16Pseudo_UPD,
+                            ARM::VST2LNq32Pseudo_UPD };
+    return SelectVLDSTLane(N, false, true, 2, DOpcodes, QOpcodes);
+  }
+
+  case ARMISD::VST3LN_UPD: {
+    unsigned DOpcodes[] = { ARM::VST3LNd8Pseudo_UPD, ARM::VST3LNd16Pseudo_UPD,
+                            ARM::VST3LNd32Pseudo_UPD };
+    unsigned QOpcodes[] = { ARM::VST3LNq16Pseudo_UPD,
+                            ARM::VST3LNq32Pseudo_UPD };
+    return SelectVLDSTLane(N, false, true, 3, DOpcodes, QOpcodes);
+  }
+
+  case ARMISD::VST4LN_UPD: {
+    unsigned DOpcodes[] = { ARM::VST4LNd8Pseudo_UPD, ARM::VST4LNd16Pseudo_UPD,
+                            ARM::VST4LNd32Pseudo_UPD };
+    unsigned QOpcodes[] = { ARM::VST4LNq16Pseudo_UPD,
+                            ARM::VST4LNq32Pseudo_UPD };
+    return SelectVLDSTLane(N, false, true, 4, DOpcodes, QOpcodes);
   }
 
   case ISD::INTRINSIC_VOID:
@@ -2497,7 +2701,7 @@
                               ARM::VLD1d32, ARM::VLD1d64 };
       unsigned QOpcodes[] = { ARM::VLD1q8Pseudo, ARM::VLD1q16Pseudo,
                               ARM::VLD1q32Pseudo, ARM::VLD1q64Pseudo };
-      return SelectVLD(N, 1, DOpcodes, QOpcodes, 0);
+      return SelectVLD(N, false, 1, DOpcodes, QOpcodes, 0);
     }
 
     case Intrinsic::arm_neon_vld2: {
@@ -2505,7 +2709,7 @@
                               ARM::VLD2d32Pseudo, ARM::VLD1q64Pseudo };
       unsigned QOpcodes[] = { ARM::VLD2q8Pseudo, ARM::VLD2q16Pseudo,
                               ARM::VLD2q32Pseudo };
-      return SelectVLD(N, 2, DOpcodes, QOpcodes, 0);
+      return SelectVLD(N, false, 2, DOpcodes, QOpcodes, 0);
     }
 
     case Intrinsic::arm_neon_vld3: {
@@ -2517,7 +2721,7 @@
       unsigned QOpcodes1[] = { ARM::VLD3q8oddPseudo,
                                ARM::VLD3q16oddPseudo,
                                ARM::VLD3q32oddPseudo };
-      return SelectVLD(N, 3, DOpcodes, QOpcodes0, QOpcodes1);
+      return SelectVLD(N, false, 3, DOpcodes, QOpcodes0, QOpcodes1);
     }
 
     case Intrinsic::arm_neon_vld4: {
@@ -2529,28 +2733,28 @@
       unsigned QOpcodes1[] = { ARM::VLD4q8oddPseudo,
                                ARM::VLD4q16oddPseudo,
                                ARM::VLD4q32oddPseudo };
-      return SelectVLD(N, 4, DOpcodes, QOpcodes0, QOpcodes1);
+      return SelectVLD(N, false, 4, DOpcodes, QOpcodes0, QOpcodes1);
     }
 
     case Intrinsic::arm_neon_vld2lane: {
       unsigned DOpcodes[] = { ARM::VLD2LNd8Pseudo, ARM::VLD2LNd16Pseudo,
                               ARM::VLD2LNd32Pseudo };
       unsigned QOpcodes[] = { ARM::VLD2LNq16Pseudo, ARM::VLD2LNq32Pseudo };
-      return SelectVLDSTLane(N, true, 2, DOpcodes, QOpcodes);
+      return SelectVLDSTLane(N, true, false, 2, DOpcodes, QOpcodes);
     }
 
     case Intrinsic::arm_neon_vld3lane: {
       unsigned DOpcodes[] = { ARM::VLD3LNd8Pseudo, ARM::VLD3LNd16Pseudo,
                               ARM::VLD3LNd32Pseudo };
       unsigned QOpcodes[] = { ARM::VLD3LNq16Pseudo, ARM::VLD3LNq32Pseudo };
-      return SelectVLDSTLane(N, true, 3, DOpcodes, QOpcodes);
+      return SelectVLDSTLane(N, true, false, 3, DOpcodes, QOpcodes);
     }
 
     case Intrinsic::arm_neon_vld4lane: {
       unsigned DOpcodes[] = { ARM::VLD4LNd8Pseudo, ARM::VLD4LNd16Pseudo,
                               ARM::VLD4LNd32Pseudo };
       unsigned QOpcodes[] = { ARM::VLD4LNq16Pseudo, ARM::VLD4LNq32Pseudo };
-      return SelectVLDSTLane(N, true, 4, DOpcodes, QOpcodes);
+      return SelectVLDSTLane(N, true, false, 4, DOpcodes, QOpcodes);
     }
 
     case Intrinsic::arm_neon_vst1: {
@@ -2558,7 +2762,7 @@
                               ARM::VST1d32, ARM::VST1d64 };
       unsigned QOpcodes[] = { ARM::VST1q8Pseudo, ARM::VST1q16Pseudo,
                               ARM::VST1q32Pseudo, ARM::VST1q64Pseudo };
-      return SelectVST(N, 1, DOpcodes, QOpcodes, 0);
+      return SelectVST(N, false, 1, DOpcodes, QOpcodes, 0);
     }
 
     case Intrinsic::arm_neon_vst2: {
@@ -2566,7 +2770,7 @@
                               ARM::VST2d32Pseudo, ARM::VST1q64Pseudo };
       unsigned QOpcodes[] = { ARM::VST2q8Pseudo, ARM::VST2q16Pseudo,
                               ARM::VST2q32Pseudo };
-      return SelectVST(N, 2, DOpcodes, QOpcodes, 0);
+      return SelectVST(N, false, 2, DOpcodes, QOpcodes, 0);
     }
 
     case Intrinsic::arm_neon_vst3: {
@@ -2578,7 +2782,7 @@
       unsigned QOpcodes1[] = { ARM::VST3q8oddPseudo,
                                ARM::VST3q16oddPseudo,
                                ARM::VST3q32oddPseudo };
-      return SelectVST(N, 3, DOpcodes, QOpcodes0, QOpcodes1);
+      return SelectVST(N, false, 3, DOpcodes, QOpcodes0, QOpcodes1);
     }
 
     case Intrinsic::arm_neon_vst4: {
@@ -2590,28 +2794,28 @@
       unsigned QOpcodes1[] = { ARM::VST4q8oddPseudo,
                                ARM::VST4q16oddPseudo,
                                ARM::VST4q32oddPseudo };
-      return SelectVST(N, 4, DOpcodes, QOpcodes0, QOpcodes1);
+      return SelectVST(N, false, 4, DOpcodes, QOpcodes0, QOpcodes1);
     }
 
     case Intrinsic::arm_neon_vst2lane: {
       unsigned DOpcodes[] = { ARM::VST2LNd8Pseudo, ARM::VST2LNd16Pseudo,
                               ARM::VST2LNd32Pseudo };
       unsigned QOpcodes[] = { ARM::VST2LNq16Pseudo, ARM::VST2LNq32Pseudo };
-      return SelectVLDSTLane(N, false, 2, DOpcodes, QOpcodes);
+      return SelectVLDSTLane(N, false, false, 2, DOpcodes, QOpcodes);
     }
 
     case Intrinsic::arm_neon_vst3lane: {
       unsigned DOpcodes[] = { ARM::VST3LNd8Pseudo, ARM::VST3LNd16Pseudo,
                               ARM::VST3LNd32Pseudo };
       unsigned QOpcodes[] = { ARM::VST3LNq16Pseudo, ARM::VST3LNq32Pseudo };
-      return SelectVLDSTLane(N, false, 3, DOpcodes, QOpcodes);
+      return SelectVLDSTLane(N, false, false, 3, DOpcodes, QOpcodes);
     }
 
     case Intrinsic::arm_neon_vst4lane: {
       unsigned DOpcodes[] = { ARM::VST4LNd8Pseudo, ARM::VST4LNd16Pseudo,
                               ARM::VST4LNd32Pseudo };
       unsigned QOpcodes[] = { ARM::VST4LNq16Pseudo, ARM::VST4LNq32Pseudo };
-      return SelectVLDSTLane(N, false, 4, DOpcodes, QOpcodes);
+      return SelectVLDSTLane(N, false, false, 4, DOpcodes, QOpcodes);
     }
     }
     break;

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=125014&r1=125013&r2=125014&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Mon Feb  7 11:43:21 2011
@@ -457,6 +457,8 @@
     setOperationAction(ISD::VSETCC, MVT::v1i64, Expand);
     setOperationAction(ISD::VSETCC, MVT::v2i64, Expand);
 
+    setTargetDAGCombine(ISD::INTRINSIC_VOID);
+    setTargetDAGCombine(ISD::INTRINSIC_W_CHAIN);
     setTargetDAGCombine(ISD::INTRINSIC_WO_CHAIN);
     setTargetDAGCombine(ISD::SHL);
     setTargetDAGCombine(ISD::SRL);
@@ -857,6 +859,23 @@
   case ARMISD::VLD2DUP:       return "ARMISD::VLD2DUP";
   case ARMISD::VLD3DUP:       return "ARMISD::VLD3DUP";
   case ARMISD::VLD4DUP:       return "ARMISD::VLD4DUP";
+  case ARMISD::VLD1_UPD:      return "ARMISD::VLD1_UPD";
+  case ARMISD::VLD2_UPD:      return "ARMISD::VLD2_UPD";
+  case ARMISD::VLD3_UPD:      return "ARMISD::VLD3_UPD";
+  case ARMISD::VLD4_UPD:      return "ARMISD::VLD4_UPD";
+  case ARMISD::VLD2LN_UPD:    return "ARMISD::VLD2LN_UPD";
+  case ARMISD::VLD3LN_UPD:    return "ARMISD::VLD3LN_UPD";
+  case ARMISD::VLD4LN_UPD:    return "ARMISD::VLD4LN_UPD";
+  case ARMISD::VLD2DUP_UPD:   return "ARMISD::VLD2DUP_UPD";
+  case ARMISD::VLD3DUP_UPD:   return "ARMISD::VLD3DUP_UPD";
+  case ARMISD::VLD4DUP_UPD:   return "ARMISD::VLD4DUP_UPD";
+  case ARMISD::VST1_UPD:      return "ARMISD::VST1_UPD";
+  case ARMISD::VST2_UPD:      return "ARMISD::VST2_UPD";
+  case ARMISD::VST3_UPD:      return "ARMISD::VST3_UPD";
+  case ARMISD::VST4_UPD:      return "ARMISD::VST4_UPD";
+  case ARMISD::VST2LN_UPD:    return "ARMISD::VST2LN_UPD";
+  case ARMISD::VST3LN_UPD:    return "ARMISD::VST3LN_UPD";
+  case ARMISD::VST4LN_UPD:    return "ARMISD::VST4LN_UPD";
   }
 }
 
@@ -5210,6 +5229,138 @@
                               DAG.getUNDEF(VT), NewMask.data());
 }
 
+/// CombineBaseUpdate - Target-specific DAG combine function for VLDDUP and
+/// NEON load/store intrinsics to merge base address updates.
+static SDValue CombineBaseUpdate(SDNode *N,
+                                 TargetLowering::DAGCombinerInfo &DCI) {
+  if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer())
+    return SDValue();
+
+  SelectionDAG &DAG = DCI.DAG;
+  bool isIntrinsic = (N->getOpcode() == ISD::INTRINSIC_VOID ||
+                      N->getOpcode() == ISD::INTRINSIC_W_CHAIN);
+  unsigned AddrOpIdx = (isIntrinsic ? 2 : 1);
+  SDValue Addr = N->getOperand(AddrOpIdx);
+
+  // Search for a use of the address operand that is an increment.
+  for (SDNode::use_iterator UI = Addr.getNode()->use_begin(),
+         UE = Addr.getNode()->use_end(); UI != UE; ++UI) {
+    SDNode *User = *UI;
+    if (User->getOpcode() != ISD::ADD ||
+        UI.getUse().getResNo() != Addr.getResNo())
+      continue;
+
+    // Check that the add is independent of the load/store.  Otherwise, folding
+    // it would create a cycle.
+    if (User->isPredecessorOf(N) || N->isPredecessorOf(User))
+      continue;
+
+    // Find the new opcode for the updating load/store.
+    bool isLoad = true;
+    bool isLaneOp = false;
+    unsigned NewOpc = 0;
+    unsigned NumVecs = 0;
+    if (isIntrinsic) {
+      unsigned IntNo = cast(N->getOperand(1))->getZExtValue();
+      switch (IntNo) {
+      default: assert(0 && "unexpected intrinsic for Neon base update");
+      case Intrinsic::arm_neon_vld1:     NewOpc = ARMISD::VLD1_UPD;
+        NumVecs = 1; break;
+      case Intrinsic::arm_neon_vld2:     NewOpc = ARMISD::VLD2_UPD;
+        NumVecs = 2; break;
+      case Intrinsic::arm_neon_vld3:     NewOpc = ARMISD::VLD3_UPD;
+        NumVecs = 3; break;
+      case Intrinsic::arm_neon_vld4:     NewOpc = ARMISD::VLD4_UPD;
+        NumVecs = 4; break;
+      case Intrinsic::arm_neon_vld2lane: NewOpc = ARMISD::VLD2LN_UPD;
+        NumVecs = 2; isLaneOp = true; break;
+      case Intrinsic::arm_neon_vld3lane: NewOpc = ARMISD::VLD3LN_UPD;
+        NumVecs = 3; isLaneOp = true; break;
+      case Intrinsic::arm_neon_vld4lane: NewOpc = ARMISD::VLD4LN_UPD;
+        NumVecs = 4; isLaneOp = true; break;
+      case Intrinsic::arm_neon_vst1:     NewOpc = ARMISD::VST1_UPD;
+        NumVecs = 1; isLoad = false; break;
+      case Intrinsic::arm_neon_vst2:     NewOpc = ARMISD::VST2_UPD;
+        NumVecs = 2; isLoad = false; break;
+      case Intrinsic::arm_neon_vst3:     NewOpc = ARMISD::VST3_UPD;
+        NumVecs = 3; isLoad = false; break;
+      case Intrinsic::arm_neon_vst4:     NewOpc = ARMISD::VST4_UPD;
+        NumVecs = 4; isLoad = false; break;
+      case Intrinsic::arm_neon_vst2lane: NewOpc = ARMISD::VST2LN_UPD;
+        NumVecs = 2; isLoad = false; isLaneOp = true; break;
+      case Intrinsic::arm_neon_vst3lane: NewOpc = ARMISD::VST3LN_UPD;
+        NumVecs = 3; isLoad = false; isLaneOp = true; break;
+      case Intrinsic::arm_neon_vst4lane: NewOpc = ARMISD::VST4LN_UPD;
+        NumVecs = 4; isLoad = false; isLaneOp = true; break;
+      }
+    } else {
+      isLaneOp = true;
+      switch (N->getOpcode()) {
+      default: assert(0 && "unexpected opcode for Neon base update");
+      case ARMISD::VLD2DUP: NewOpc = ARMISD::VLD2DUP_UPD; NumVecs = 2; break;
+      case ARMISD::VLD3DUP: NewOpc = ARMISD::VLD3DUP_UPD; NumVecs = 3; break;
+      case ARMISD::VLD4DUP: NewOpc = ARMISD::VLD4DUP_UPD; NumVecs = 4; break;
+      }
+    }
+
+    // Find the size of memory referenced by the load/store.
+    EVT VecTy;
+    if (isLoad)
+      VecTy = N->getValueType(0);
+    else 
+      VecTy = N->getOperand(AddrOpIdx+1).getValueType();
+    unsigned NumBytes = NumVecs * VecTy.getSizeInBits() / 8;
+    if (isLaneOp)
+      NumBytes /= VecTy.getVectorNumElements();
+
+    // If the increment is a constant, it must match the memory ref size.
+    SDValue Inc = User->getOperand(User->getOperand(0) == Addr ? 1 : 0);
+    if (ConstantSDNode *CInc = dyn_cast(Inc.getNode())) {
+      uint64_t IncVal = CInc->getZExtValue();
+      if (IncVal != NumBytes)
+        continue;
+    } else if (NumBytes >= 3 * 16) {
+      // VLD3/4 and VST3/4 for 128-bit vectors are implemented with two
+      // separate instructions that make it harder to use a non-constant update.
+      continue;
+    }
+
+    // Create the new updating load/store node.
+    EVT Tys[6];
+    unsigned NumResultVecs = (isLoad ? NumVecs : 0);
+    unsigned n;
+    for (n = 0; n < NumResultVecs; ++n)
+      Tys[n] = VecTy;
+    Tys[n++] = MVT::i32;
+    Tys[n] = MVT::Other;
+    SDVTList SDTys = DAG.getVTList(Tys, NumResultVecs+2);
+    SmallVector Ops;
+    Ops.push_back(N->getOperand(0)); // incoming chain
+    Ops.push_back(N->getOperand(AddrOpIdx));
+    Ops.push_back(Inc);
+    for (unsigned i = AddrOpIdx + 1; i < N->getNumOperands(); ++i) {
+      Ops.push_back(N->getOperand(i));
+    }
+    MemIntrinsicSDNode *MemInt = cast(N);
+    SDValue UpdN = DAG.getMemIntrinsicNode(NewOpc, N->getDebugLoc(), SDTys,
+                                           Ops.data(), Ops.size(),
+                                           MemInt->getMemoryVT(),
+                                           MemInt->getMemOperand());
+
+    // Update the uses.
+    std::vector NewResults;
+    for (unsigned i = 0; i < NumResultVecs; ++i) {
+      NewResults.push_back(SDValue(UpdN.getNode(), i));
+    }
+    NewResults.push_back(SDValue(UpdN.getNode(), NumResultVecs+1)); // chain
+    DCI.CombineTo(N, NewResults);
+    DCI.CombineTo(User, SDValue(UpdN.getNode(), NumResultVecs));
+
+    break;
+  } 
+  return SDValue();
+}
+
 /// CombineVLDDUP - For a VDUPLANE node N, check if its source operand is a
 /// vldN-lane (N > 1) intrinsic, and if all the other uses of that intrinsic
 /// are also VDUPLANEs.  If so, combine them to a vldN-dup operation and
@@ -5720,6 +5871,31 @@
   case ISD::ZERO_EXTEND:
   case ISD::ANY_EXTEND: return PerformExtendCombine(N, DCI.DAG, Subtarget);
   case ISD::SELECT_CC:  return PerformSELECT_CCCombine(N, DCI.DAG, Subtarget);
+  case ARMISD::VLD2DUP:
+  case ARMISD::VLD3DUP:
+  case ARMISD::VLD4DUP:
+    return CombineBaseUpdate(N, DCI);
+  case ISD::INTRINSIC_VOID:
+  case ISD::INTRINSIC_W_CHAIN:
+    switch (cast(N->getOperand(1))->getZExtValue()) {
+    case Intrinsic::arm_neon_vld1:
+    case Intrinsic::arm_neon_vld2:
+    case Intrinsic::arm_neon_vld3:
+    case Intrinsic::arm_neon_vld4:
+    case Intrinsic::arm_neon_vld2lane:
+    case Intrinsic::arm_neon_vld3lane:
+    case Intrinsic::arm_neon_vld4lane:
+    case Intrinsic::arm_neon_vst1:
+    case Intrinsic::arm_neon_vst2:
+    case Intrinsic::arm_neon_vst3:
+    case Intrinsic::arm_neon_vst4:
+    case Intrinsic::arm_neon_vst2lane:
+    case Intrinsic::arm_neon_vst3lane:
+    case Intrinsic::arm_neon_vst4lane:
+      return CombineBaseUpdate(N, DCI);
+    default: break;
+    }
+    break;
   }
   return SDValue();
 }

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.h?rev=125014&r1=125013&r2=125014&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.h Mon Feb  7 11:43:21 2011
@@ -181,7 +181,28 @@
       // Vector load N-element structure to all lanes:
       VLD2DUP = ISD::FIRST_TARGET_MEMORY_OPCODE,
       VLD3DUP,
-      VLD4DUP
+      VLD4DUP,
+
+      // NEON loads with post-increment base updates:
+      VLD1_UPD,
+      VLD2_UPD,
+      VLD3_UPD,
+      VLD4_UPD,
+      VLD2LN_UPD,
+      VLD3LN_UPD,
+      VLD4LN_UPD,
+      VLD2DUP_UPD,
+      VLD3DUP_UPD,
+      VLD4DUP_UPD,
+
+      // NEON stores with post-increment base updates:
+      VST1_UPD,
+      VST2_UPD,
+      VST3_UPD,
+      VST4_UPD,
+      VST2LN_UPD,
+      VST3LN_UPD,
+      VST4LN_UPD
     };
   }
 

Modified: llvm/trunk/test/CodeGen/ARM/vld1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vld1.ll?rev=125014&r1=125013&r2=125014&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/vld1.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/vld1.ll Mon Feb  7 11:43:21 2011
@@ -16,6 +16,18 @@
 	ret <4 x i16> %tmp1
 }
 
+;Check for a post-increment updating load. 
+define <4 x i16> @vld1i16_update(i16** %ptr) nounwind {
+;CHECK: vld1i16_update:
+;CHECK: vld1.16 {d16}, [r1]!
+	%A = load i16** %ptr
+	%tmp0 = bitcast i16* %A to i8*
+	%tmp1 = call <4 x i16> @llvm.arm.neon.vld1.v4i16(i8* %tmp0, i32 1)
+	%tmp2 = getelementptr i16* %A, i32 4
+	       store i16* %tmp2, i16** %ptr
+	ret <4 x i16> %tmp1
+}
+
 define <2 x i32> @vld1i32(i32* %A) nounwind {
 ;CHECK: vld1i32:
 ;CHECK: vld1.32
@@ -24,6 +36,18 @@
 	ret <2 x i32> %tmp1
 }
 
+;Check for a post-increment updating load with register increment.
+define <2 x i32> @vld1i32_update(i32** %ptr, i32 %inc) nounwind {
+;CHECK: vld1i32_update:
+;CHECK: vld1.32 {d16}, [r2], r1
+	%A = load i32** %ptr
+	%tmp0 = bitcast i32* %A to i8*
+	%tmp1 = call <2 x i32> @llvm.arm.neon.vld1.v2i32(i8* %tmp0, i32 1)
+	%tmp2 = getelementptr i32* %A, i32 %inc
+	store i32* %tmp2, i32** %ptr
+	ret <2 x i32> %tmp1
+}
+
 define <2 x float> @vld1f(float* %A) nounwind {
 ;CHECK: vld1f:
 ;CHECK: vld1.32
@@ -48,6 +72,17 @@
 	ret <16 x i8> %tmp1
 }
 
+;Check for a post-increment updating load.
+define <16 x i8> @vld1Qi8_update(i8** %ptr) nounwind {
+;CHECK: vld1Qi8_update:
+;CHECK: vld1.8 {d16, d17}, [r1, :64]!
+	%A = load i8** %ptr
+	%tmp1 = call <16 x i8> @llvm.arm.neon.vld1.v16i8(i8* %A, i32 8)
+	%tmp2 = getelementptr i8* %A, i32 16
+	store i8* %tmp2, i8** %ptr
+	ret <16 x i8> %tmp1
+}
+
 define <8 x i16> @vld1Qi16(i16* %A) nounwind {
 ;CHECK: vld1Qi16:
 ;Check the alignment value.  Max for this instruction is 128 bits:

Modified: llvm/trunk/test/CodeGen/ARM/vld2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vld2.ll?rev=125014&r1=125013&r2=125014&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/vld2.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/vld2.ll Mon Feb  7 11:43:21 2011
@@ -56,6 +56,21 @@
 	ret <2 x float> %tmp4
 }
 
+;Check for a post-increment updating load. 
+define <2 x float> @vld2f_update(float** %ptr) nounwind {
+;CHECK: vld2f_update:
+;CHECK: vld2.32 {d16, d17}, [r1]!
+	%A = load float** %ptr
+	%tmp0 = bitcast float* %A to i8*
+	%tmp1 = call %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2.v2f32(i8* %tmp0, i32 1)
+	%tmp2 = extractvalue %struct.__neon_float32x2x2_t %tmp1, 0
+	%tmp3 = extractvalue %struct.__neon_float32x2x2_t %tmp1, 1
+	%tmp4 = fadd <2 x float> %tmp2, %tmp3
+	%tmp5 = getelementptr float* %A, i32 4
+	store float* %tmp5, float** %ptr
+	ret <2 x float> %tmp4
+}
+
 define <1 x i64> @vld2i64(i64* %A) nounwind {
 ;CHECK: vld2i64:
 ;Check the alignment value.  Max for this instruction is 128 bits:
@@ -79,6 +94,20 @@
 	ret <16 x i8> %tmp4
 }
 
+;Check for a post-increment updating load with register increment.
+define <16 x i8> @vld2Qi8_update(i8** %ptr, i32 %inc) nounwind {
+;CHECK: vld2Qi8_update:
+;CHECK: vld2.8 {d16, d17, d18, d19}, [r2, :128], r1
+	%A = load i8** %ptr
+	%tmp1 = call %struct.__neon_int8x16x2_t @llvm.arm.neon.vld2.v16i8(i8* %A, i32 16)
+        %tmp2 = extractvalue %struct.__neon_int8x16x2_t %tmp1, 0
+        %tmp3 = extractvalue %struct.__neon_int8x16x2_t %tmp1, 1
+        %tmp4 = add <16 x i8> %tmp2, %tmp3
+	%tmp5 = getelementptr i8* %A, i32 %inc
+	store i8* %tmp5, i8** %ptr
+	ret <16 x i8> %tmp4
+}
+
 define <8 x i16> @vld2Qi16(i16* %A) nounwind {
 ;CHECK: vld2Qi16:
 ;Check the alignment value.  Max for this instruction is 256 bits:

Modified: llvm/trunk/test/CodeGen/ARM/vld3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vld3.ll?rev=125014&r1=125013&r2=125014&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/vld3.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/vld3.ll Mon Feb  7 11:43:21 2011
@@ -33,6 +33,21 @@
 	ret <4 x i16> %tmp4
 }
 
+;Check for a post-increment updating load with register increment.
+define <4 x i16> @vld3i16_update(i16** %ptr, i32 %inc) nounwind {
+;CHECK: vld3i16_update:
+;CHECK: vld3.16 {d16, d17, d18}, [r2], r1
+	%A = load i16** %ptr
+	%tmp0 = bitcast i16* %A to i8*
+	%tmp1 = call %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3.v4i16(i8* %tmp0, i32 1)
+	%tmp2 = extractvalue %struct.__neon_int16x4x3_t %tmp1, 0
+	%tmp3 = extractvalue %struct.__neon_int16x4x3_t %tmp1, 2
+	%tmp4 = add <4 x i16> %tmp2, %tmp3
+	%tmp5 = getelementptr i16* %A, i32 %inc
+	store i16* %tmp5, i16** %ptr
+	ret <4 x i16> %tmp4
+}
+
 define <2 x i32> @vld3i32(i32* %A) nounwind {
 ;CHECK: vld3i32:
 ;CHECK: vld3.32
@@ -103,6 +118,22 @@
 	ret <4 x i32> %tmp4
 }
 
+;Check for a post-increment updating load. 
+define <4 x i32> @vld3Qi32_update(i32** %ptr) nounwind {
+;CHECK: vld3Qi32_update:
+;CHECK: vld3.32 {d16, d18, d20}, [r1]!
+;CHECK: vld3.32 {d17, d19, d21}, [r1]!
+	%A = load i32** %ptr
+	%tmp0 = bitcast i32* %A to i8*
+	%tmp1 = call %struct.__neon_int32x4x3_t @llvm.arm.neon.vld3.v4i32(i8* %tmp0, i32 1)
+	%tmp2 = extractvalue %struct.__neon_int32x4x3_t %tmp1, 0
+	%tmp3 = extractvalue %struct.__neon_int32x4x3_t %tmp1, 2
+	%tmp4 = add <4 x i32> %tmp2, %tmp3
+	%tmp5 = getelementptr i32* %A, i32 12
+	store i32* %tmp5, i32** %ptr
+	ret <4 x i32> %tmp4
+}
+
 define <4 x float> @vld3Qf(float* %A) nounwind {
 ;CHECK: vld3Qf:
 ;CHECK: vld3.32

Modified: llvm/trunk/test/CodeGen/ARM/vld4.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vld4.ll?rev=125014&r1=125013&r2=125014&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/vld4.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/vld4.ll Mon Feb  7 11:43:21 2011
@@ -22,6 +22,20 @@
 	ret <8 x i8> %tmp4
 }
 
+;Check for a post-increment updating load with register increment.
+define <8 x i8> @vld4i8_update(i8** %ptr, i32 %inc) nounwind {
+;CHECK: vld4i8_update:
+;CHECK: vld4.8 {d16, d17, d18, d19}, [r2, :128], r1
+	%A = load i8** %ptr
+	%tmp1 = call %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4.v8i8(i8* %A, i32 16)
+	%tmp2 = extractvalue %struct.__neon_int8x8x4_t %tmp1, 0
+	%tmp3 = extractvalue %struct.__neon_int8x8x4_t %tmp1, 2
+	%tmp4 = add <8 x i8> %tmp2, %tmp3
+	%tmp5 = getelementptr i8* %A, i32 %inc
+	store i8* %tmp5, i8** %ptr
+	ret <8 x i8> %tmp4
+}
+
 define <4 x i16> @vld4i16(i16* %A) nounwind {
 ;CHECK: vld4i16:
 ;Check the alignment value.  Max for this instruction is 256 bits:
@@ -94,6 +108,22 @@
 	ret <8 x i16> %tmp4
 }
 
+;Check for a post-increment updating load. 
+define <8 x i16> @vld4Qi16_update(i16** %ptr) nounwind {
+;CHECK: vld4Qi16_update:
+;CHECK: vld4.16 {d16, d18, d20, d22}, [r1, :64]!
+;CHECK: vld4.16 {d17, d19, d21, d23}, [r1, :64]!
+	%A = load i16** %ptr
+	%tmp0 = bitcast i16* %A to i8*
+	%tmp1 = call %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4.v8i16(i8* %tmp0, i32 8)
+	%tmp2 = extractvalue %struct.__neon_int16x8x4_t %tmp1, 0
+	%tmp3 = extractvalue %struct.__neon_int16x8x4_t %tmp1, 2
+	%tmp4 = add <8 x i16> %tmp2, %tmp3
+	%tmp5 = getelementptr i16* %A, i32 32
+	store i16* %tmp5, i16** %ptr
+	ret <8 x i16> %tmp4
+}
+
 define <4 x i32> @vld4Qi32(i32* %A) nounwind {
 ;CHECK: vld4Qi32:
 ;CHECK: vld4.32

Modified: llvm/trunk/test/CodeGen/ARM/vlddup.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vlddup.ll?rev=125014&r1=125013&r2=125014&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/vlddup.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/vlddup.ll Mon Feb  7 11:43:21 2011
@@ -89,6 +89,22 @@
         ret <4 x i16> %tmp5
 }
 
+;Check for a post-increment updating load. 
+define <4 x i16> @vld2dupi16_update(i16** %ptr) nounwind {
+;CHECK: vld2dupi16_update:
+;CHECK: vld2.16 {d16[], d17[]}, [r1]!
+	%A = load i16** %ptr
+	%tmp0 = tail call %struct.__neon_int4x16x2_t @llvm.arm.neon.vld2lane.v4i16(i16* %A, <4 x i16> undef, <4 x i16> undef, i32 0, i32 2)
+	%tmp1 = extractvalue %struct.__neon_int4x16x2_t %tmp0, 0
+	%tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <4 x i32> zeroinitializer
+	%tmp3 = extractvalue %struct.__neon_int4x16x2_t %tmp0, 1
+	%tmp4 = shufflevector <4 x i16> %tmp3, <4 x i16> undef, <4 x i32> zeroinitializer
+	%tmp5 = add <4 x i16> %tmp2, %tmp4
+	%tmp6 = getelementptr i16* %A, i32 2
+	store i16* %tmp6, i16** %ptr
+	ret <4 x i16> %tmp5
+}
+
 define <2 x i32> @vld2dupi32(i32* %A) nounwind {
 ;CHECK: vld2dupi32:
 ;Check the alignment value.  Max for this instruction is 64 bits:
@@ -106,8 +122,28 @@
 declare %struct.__neon_int4x16x2_t @llvm.arm.neon.vld2lane.v4i16(i16*, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly
 declare %struct.__neon_int2x32x2_t @llvm.arm.neon.vld2lane.v2i32(i32*, <2 x i32>, <2 x i32>, i32, i32) nounwind readonly
 
+%struct.__neon_int8x8x3_t = type { <8 x i8>, <8 x i8>, <8 x i8> }
 %struct.__neon_int16x4x3_t = type { <4 x i16>, <4 x i16>, <4 x i16> }
 
+;Check for a post-increment updating load with register increment.
+define <8 x i8> @vld3dupi8_update(i8** %ptr, i32 %inc) nounwind {
+;CHECK: vld3dupi8_update:
+;CHECK: vld3.8 {d16[], d17[], d18[]}, [r2], r1
+	%A = load i8** %ptr
+	%tmp0 = tail call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3lane.v8i8(i8* %A, <8 x i8> undef, <8 x i8> undef, <8 x i8> undef, i32 0, i32 8)
+	%tmp1 = extractvalue %struct.__neon_int8x8x3_t %tmp0, 0
+	%tmp2 = shufflevector <8 x i8> %tmp1, <8 x i8> undef, <8 x i32> zeroinitializer
+	%tmp3 = extractvalue %struct.__neon_int8x8x3_t %tmp0, 1
+	%tmp4 = shufflevector <8 x i8> %tmp3, <8 x i8> undef, <8 x i32> zeroinitializer
+	%tmp5 = extractvalue %struct.__neon_int8x8x3_t %tmp0, 2
+	%tmp6 = shufflevector <8 x i8> %tmp5, <8 x i8> undef, <8 x i32> zeroinitializer
+	%tmp7 = add <8 x i8> %tmp2, %tmp4
+	%tmp8 = add <8 x i8> %tmp7, %tmp6
+	%tmp9 = getelementptr i8* %A, i32 %inc
+	store i8* %tmp9, i8** %ptr
+	ret <8 x i8> %tmp8
+}
+
 define <4 x i16> @vld3dupi16(i16* %A) nounwind {
 ;CHECK: vld3dupi16:
 ;Check the (default) alignment value. VLD3 does not support alignment.
@@ -124,10 +160,34 @@
         ret <4 x i16> %tmp8
 }
 
+declare %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3lane.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, i32, i32) nounwind readonly
 declare %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i16*, <4 x i16>, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly
 
+%struct.__neon_int16x4x4_t = type { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> }
 %struct.__neon_int32x2x4_t = type { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> }
 
+;Check for a post-increment updating load.
+define <4 x i16> @vld4dupi16_update(i16** %ptr) nounwind {
+;CHECK: vld4dupi16_update:
+;CHECK: vld4.16 {d16[], d17[], d18[], d19[]}, [r1]!
+	%A = load i16** %ptr
+	%tmp0 = tail call %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4lane.v4i16(i16* %A, <4 x i16> undef, <4 x i16> undef, <4 x i16> undef, <4 x i16> undef, i32 0, i32 1)
+	%tmp1 = extractvalue %struct.__neon_int16x4x4_t %tmp0, 0
+	%tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <4 x i32> zeroinitializer
+	%tmp3 = extractvalue %struct.__neon_int16x4x4_t %tmp0, 1
+	%tmp4 = shufflevector <4 x i16> %tmp3, <4 x i16> undef, <4 x i32> zeroinitializer
+	%tmp5 = extractvalue %struct.__neon_int16x4x4_t %tmp0, 2
+	%tmp6 = shufflevector <4 x i16> %tmp5, <4 x i16> undef, <4 x i32> zeroinitializer
+	%tmp7 = extractvalue %struct.__neon_int16x4x4_t %tmp0, 3
+	%tmp8 = shufflevector <4 x i16> %tmp7, <4 x i16> undef, <4 x i32> zeroinitializer
+	%tmp9 = add <4 x i16> %tmp2, %tmp4
+	%tmp10 = add <4 x i16> %tmp6, %tmp8
+	%tmp11 = add <4 x i16> %tmp9, %tmp10
+	%tmp12 = getelementptr i16* %A, i32 4
+	store i16* %tmp12, i16** %ptr
+	ret <4 x i16> %tmp11
+}
+
 define <2 x i32> @vld4dupi32(i32* %A) nounwind {
 ;CHECK: vld4dupi32:
 ;Check the alignment value.  An 8-byte alignment is allowed here even though
@@ -148,4 +208,5 @@
         ret <2 x i32> %tmp11
 }
 
+declare %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4lane.v4i16(i16*, <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly
 declare %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i32*, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i32, i32) nounwind readonly

Modified: llvm/trunk/test/CodeGen/ARM/vldlane.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vldlane.ll?rev=125014&r1=125013&r2=125014&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/vldlane.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/vldlane.ll Mon Feb  7 11:43:21 2011
@@ -121,6 +121,22 @@
 	ret <2 x i32> %tmp5
 }
 
+;Check for a post-increment updating load.
+define <2 x i32> @vld2lanei32_update(i32** %ptr, <2 x i32>* %B) nounwind {
+;CHECK: vld2lanei32_update:
+;CHECK: vld2.32 {d16[1], d17[1]}, [r1]!
+	%A = load i32** %ptr
+	%tmp0 = bitcast i32* %A to i8*
+	%tmp1 = load <2 x i32>* %B
+	%tmp2 = call %struct.__neon_int32x2x2_t @llvm.arm.neon.vld2lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 1)
+	%tmp3 = extractvalue %struct.__neon_int32x2x2_t %tmp2, 0
+	%tmp4 = extractvalue %struct.__neon_int32x2x2_t %tmp2, 1
+	%tmp5 = add <2 x i32> %tmp3, %tmp4
+	%tmp6 = getelementptr i32* %A, i32 2
+	store i32* %tmp6, i32** %ptr
+	ret <2 x i32> %tmp5
+}
+
 define <2 x float> @vld2lanef(float* %A, <2 x float>* %B) nounwind {
 ;CHECK: vld2lanef:
 ;CHECK: vld2.32
@@ -260,6 +276,24 @@
 	ret <8 x i16> %tmp7
 }
 
+;Check for a post-increment updating load with register increment.
+define <8 x i16> @vld3laneQi16_update(i16** %ptr, <8 x i16>* %B, i32 %inc) nounwind {
+;CHECK: vld3laneQi16_update:
+;CHECK: vld3.16 {d16[1], d18[1], d20[1]}, [r2], r1
+	%A = load i16** %ptr
+	%tmp0 = bitcast i16* %A to i8*
+	%tmp1 = load <8 x i16>* %B
+	%tmp2 = call %struct.__neon_int16x8x3_t @llvm.arm.neon.vld3lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1, i32 8)
+	%tmp3 = extractvalue %struct.__neon_int16x8x3_t %tmp2, 0
+	%tmp4 = extractvalue %struct.__neon_int16x8x3_t %tmp2, 1
+	%tmp5 = extractvalue %struct.__neon_int16x8x3_t %tmp2, 2
+	%tmp6 = add <8 x i16> %tmp3, %tmp4
+	%tmp7 = add <8 x i16> %tmp5, %tmp6
+	%tmp8 = getelementptr i16* %A, i32 %inc
+	store i16* %tmp8, i16** %ptr
+	ret <8 x i16> %tmp7
+}
+
 define <4 x i32> @vld3laneQi32(i32* %A, <4 x i32>* %B) nounwind {
 ;CHECK: vld3laneQi32:
 ;CHECK: vld3.32
@@ -322,6 +356,25 @@
 	ret <8 x i8> %tmp9
 }
 
+;Check for a post-increment updating load.
+define <8 x i8> @vld4lanei8_update(i8** %ptr, <8 x i8>* %B) nounwind {
+;CHECK: vld4lanei8_update:
+;CHECK: vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r1, :32]!
+	%A = load i8** %ptr
+	%tmp1 = load <8 x i8>* %B
+	%tmp2 = call %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 8)
+	%tmp3 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 0
+	%tmp4 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 1
+	%tmp5 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 2
+	%tmp6 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 3
+	%tmp7 = add <8 x i8> %tmp3, %tmp4
+	%tmp8 = add <8 x i8> %tmp5, %tmp6
+	%tmp9 = add <8 x i8> %tmp7, %tmp8
+	%tmp10 = getelementptr i8* %A, i32 4
+	store i8* %tmp10, i8** %ptr
+	ret <8 x i8> %tmp9
+}
+
 define <4 x i16> @vld4lanei16(i16* %A, <4 x i16>* %B) nounwind {
 ;CHECK: vld4lanei16:
 ;Check that a power-of-two alignment smaller than the total size of the memory

Modified: llvm/trunk/test/CodeGen/ARM/vst1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vst1.ll?rev=125014&r1=125013&r2=125014&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/vst1.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/vst1.ll Mon Feb  7 11:43:21 2011
@@ -36,6 +36,19 @@
 	ret void
 }
 
+;Check for a post-increment updating store.
+define void @vst1f_update(float** %ptr, <2 x float>* %B) nounwind {
+;CHECK: vst1f_update:
+;CHECK: vst1.32 {d16}, [r1]!
+	%A = load float** %ptr
+	%tmp0 = bitcast float* %A to i8*
+	%tmp1 = load <2 x float>* %B
+	call void @llvm.arm.neon.vst1.v2f32(i8* %tmp0, <2 x float> %tmp1, i32 1)
+	%tmp2 = getelementptr float* %A, i32 2
+	store float* %tmp2, float** %ptr
+	ret void
+}
+
 define void @vst1i64(i64* %A, <1 x i64>* %B) nounwind {
 ;CHECK: vst1i64:
 ;CHECK: vst1.64
@@ -64,6 +77,19 @@
 	ret void
 }
 
+;Check for a post-increment updating store with register increment.
+define void @vst1Qi16_update(i16** %ptr, <8 x i16>* %B, i32 %inc) nounwind {
+;CHECK: vst1Qi16_update:
+;CHECK: vst1.16 {d16, d17}, [r1, :64], r2
+	%A = load i16** %ptr
+	%tmp0 = bitcast i16* %A to i8*
+	%tmp1 = load <8 x i16>* %B
+	call void @llvm.arm.neon.vst1.v8i16(i8* %tmp0, <8 x i16> %tmp1, i32 8)
+	%tmp2 = getelementptr i16* %A, i32 %inc
+	store i16* %tmp2, i16** %ptr
+	ret void
+}
+
 define void @vst1Qi32(i32* %A, <4 x i32>* %B) nounwind {
 ;CHECK: vst1Qi32:
 ;CHECK: vst1.32

Modified: llvm/trunk/test/CodeGen/ARM/vst2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vst2.ll?rev=125014&r1=125013&r2=125014&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/vst2.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/vst2.ll Mon Feb  7 11:43:21 2011
@@ -9,6 +9,18 @@
 	ret void
 }
 
+;Check for a post-increment updating store with register increment.
+define void @vst2i8_update(i8** %ptr, <8 x i8>* %B, i32 %inc) nounwind {
+;CHECK: vst2i8_update:
+;CHECK: vst2.8 {d16, d17}, [r1], r2
+	%A = load i8** %ptr
+	%tmp1 = load <8 x i8>* %B
+	call void @llvm.arm.neon.vst2.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 4)
+	%tmp2 = getelementptr i8* %A, i32 %inc
+	store i8* %tmp2, i8** %ptr
+	ret void
+}
+
 define void @vst2i16(i16* %A, <4 x i16>* %B) nounwind {
 ;CHECK: vst2i16:
 ;Check the alignment value.  Max for this instruction is 128 bits:
@@ -47,6 +59,19 @@
 	ret void
 }
 
+;Check for a post-increment updating store.
+define void @vst2i64_update(i64** %ptr, <1 x i64>* %B) nounwind {
+;CHECK: vst2i64_update:
+;CHECK: vst1.64 {d16, d17}, [r1, :64]!
+	%A = load i64** %ptr
+	%tmp0 = bitcast i64* %A to i8*
+	%tmp1 = load <1 x i64>* %B
+	call void @llvm.arm.neon.vst2.v1i64(i8* %tmp0, <1 x i64> %tmp1, <1 x i64> %tmp1, i32 8)
+	%tmp2 = getelementptr i64* %A, i32 2
+	store i64* %tmp2, i64** %ptr
+	ret void
+}
+
 define void @vst2Qi8(i8* %A, <16 x i8>* %B) nounwind {
 ;CHECK: vst2Qi8:
 ;Check the alignment value.  Max for this instruction is 256 bits:

Modified: llvm/trunk/test/CodeGen/ARM/vst3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vst3.ll?rev=125014&r1=125013&r2=125014&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/vst3.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/vst3.ll Mon Feb  7 11:43:21 2011
@@ -28,6 +28,19 @@
 	ret void
 }
 
+;Check for a post-increment updating store.
+define void @vst3i32_update(i32** %ptr, <2 x i32>* %B) nounwind {
+;CHECK: vst3i32_update:
+;CHECK: vst3.32 {d{{.*}}, d{{.*}}, d{{.*}}}, [r{{.*}}]!
+	%A = load i32** %ptr
+	%tmp0 = bitcast i32* %A to i8*
+	%tmp1 = load <2 x i32>* %B
+	call void @llvm.arm.neon.vst3.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1)
+	%tmp2 = getelementptr i32* %A, i32 6
+	store i32* %tmp2, i32** %ptr
+	ret void
+}
+
 define void @vst3f(float* %A, <2 x float>* %B) nounwind {
 ;CHECK: vst3f:
 ;CHECK: vst3.32
@@ -69,6 +82,20 @@
 	ret void
 }
 
+;Check for a post-increment updating store.
+define void @vst3Qi16_update(i16** %ptr, <8 x i16>* %B) nounwind {
+;CHECK: vst3Qi16_update:
+;CHECK: vst3.16 {d{{.*}}, d{{.*}}, d{{.*}}}, [r{{.*}}]!
+;CHECK: vst3.16 {d{{.*}}, d{{.*}}, d{{.*}}}, [r{{.*}}]!
+	%A = load i16** %ptr
+	%tmp0 = bitcast i16* %A to i8*
+	%tmp1 = load <8 x i16>* %B
+	call void @llvm.arm.neon.vst3.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1)
+	%tmp2 = getelementptr i16* %A, i32 24
+	store i16* %tmp2, i16** %ptr
+	ret void
+}
+
 define void @vst3Qi32(i32* %A, <4 x i32>* %B) nounwind {
 ;CHECK: vst3Qi32:
 ;CHECK: vst3.32

Modified: llvm/trunk/test/CodeGen/ARM/vst4.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vst4.ll?rev=125014&r1=125013&r2=125014&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/vst4.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/vst4.ll Mon Feb  7 11:43:21 2011
@@ -9,6 +9,18 @@
 	ret void
 }
 
+;Check for a post-increment updating store with register increment.
+define void @vst4i8_update(i8** %ptr, <8 x i8>* %B, i32 %inc) nounwind {
+;CHECK: vst4i8_update:
+;CHECK: vst4.8 {d16, d17, d18, d19}, [r1, :128], r2
+	%A = load i8** %ptr
+	%tmp1 = load <8 x i8>* %B
+	call void @llvm.arm.neon.vst4.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 16)
+	%tmp2 = getelementptr i8* %A, i32 %inc
+	store i8* %tmp2, i8** %ptr
+	ret void
+}
+
 define void @vst4i16(i16* %A, <4 x i16>* %B) nounwind {
 ;CHECK: vst4i16:
 ;Check the alignment value.  Max for this instruction is 256 bits:
@@ -89,6 +101,20 @@
 	ret void
 }
 
+;Check for a post-increment updating store.
+define void @vst4Qf_update(float** %ptr, <4 x float>* %B) nounwind {
+;CHECK: vst4Qf_update:
+;CHECK: vst4.32 {d16, d18, d20, d22}, [r1]!
+;CHECK: vst4.32 {d17, d19, d21, d23}, [r1]!
+	%A = load float** %ptr
+	%tmp0 = bitcast float* %A to i8*
+	%tmp1 = load <4 x float>* %B
+	call void @llvm.arm.neon.vst4.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, i32 1)
+	%tmp2 = getelementptr float* %A, i32 16
+	store float* %tmp2, float** %ptr
+	ret void
+}
+
 declare void @llvm.arm.neon.vst4.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, i32) nounwind
 declare void @llvm.arm.neon.vst4.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>, i32) nounwind
 declare void @llvm.arm.neon.vst4.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i32) nounwind

Modified: llvm/trunk/test/CodeGen/ARM/vstlane.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vstlane.ll?rev=125014&r1=125013&r2=125014&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/vstlane.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/vstlane.ll Mon Feb  7 11:43:21 2011
@@ -94,6 +94,19 @@
 	ret void
 }
 
+;Check for a post-increment updating store with register increment.
+define void @vst2lanei16_update(i16** %ptr, <4 x i16>* %B, i32 %inc) nounwind {
+;CHECK: vst2lanei16_update:
+;CHECK: vst2.16 {d16[1], d17[1]}, [r1], r2
+	%A = load i16** %ptr
+	%tmp0 = bitcast i16* %A to i8*
+	%tmp1 = load <4 x i16>* %B
+	call void @llvm.arm.neon.vst2lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 2)
+	%tmp2 = getelementptr i16* %A, i32 %inc
+	store i16* %tmp2, i16** %ptr
+	ret void
+}
+
 define void @vst2lanei32(i32* %A, <2 x i32>* %B) nounwind {
 ;CHECK: vst2lanei32:
 ;CHECK: vst2.32
@@ -205,6 +218,19 @@
 	ret void
 }
 
+;Check for a post-increment updating store.
+define void @vst3laneQi32_update(i32** %ptr, <4 x i32>* %B) nounwind {
+;CHECK: vst3laneQi32_update:
+;CHECK: vst3.32 {d16[0], d18[0], d20[0]}, [r1]!
+	%A = load i32** %ptr
+	%tmp0 = bitcast i32* %A to i8*
+	%tmp1 = load <4 x i32>* %B
+	call void @llvm.arm.neon.vst3lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 0, i32 1)
+	%tmp2 = getelementptr i32* %A, i32 3
+	store i32* %tmp2, i32** %ptr
+	ret void
+}
+
 define void @vst3laneQf(float* %A, <4 x float>* %B) nounwind {
 ;CHECK: vst3laneQf:
 ;CHECK: vst3.32
@@ -233,6 +259,18 @@
 	ret void
 }
 
+;Check for a post-increment updating store.
+define void @vst4lanei8_update(i8** %ptr, <8 x i8>* %B) nounwind {
+;CHECK: vst4lanei8_update:
+;CHECK: vst4.8 {d16[1], d17[1], d18[1], d19[1]}, [r1, :32]!
+	%A = load i8** %ptr
+	%tmp1 = load <8 x i8>* %B
+	call void @llvm.arm.neon.vst4lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 8)
+	%tmp2 = getelementptr i8* %A, i32 4
+	store i8* %tmp2, i8** %ptr
+	ret void
+}
+
 define void @vst4lanei16(i16* %A, <4 x i16>* %B) nounwind {
 ;CHECK: vst4lanei16:
 ;CHECK: vst4.16



From dpatel at apple.com  Mon Feb  7 12:24:18 2011
From: dpatel at apple.com (Devang Patel)
Date: Mon, 07 Feb 2011 18:24:18 -0000
Subject: [llvm-commits] [llvm] r125019 -
	/llvm/trunk/test/CodeGen/X86/dbg-merge-loc-entry.ll
Message-ID: <20110207182418.BD9122A6C12C@llvm.org>

Author: dpatel
Date: Mon Feb  7 12:24:18 2011
New Revision: 125019

URL: http://llvm.org/viewvc/llvm-project?rev=125019&view=rev
Log:
Reduce test case, smaller is better.

Modified:
    llvm/trunk/test/CodeGen/X86/dbg-merge-loc-entry.ll

Modified: llvm/trunk/test/CodeGen/X86/dbg-merge-loc-entry.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/dbg-merge-loc-entry.ll?rev=125019&r1=125018&r2=125019&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/dbg-merge-loc-entry.ll (original)
+++ llvm/trunk/test/CodeGen/X86/dbg-merge-loc-entry.ll Mon Feb  7 12:24:18 2011
@@ -2,641 +2,35 @@
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
 target triple = "x86_64-apple-darwin8"
 
-;CHECK: Ldebug_loc2:
-;CHECK-NEXT:         .quad   Ltmp11
-;CHECK-NEXT:         .quad   Lfunc_end0
-;CHECK-NEXT:         .short  1                       ## Loc expr size
-;CHECK-NEXT:         .byte   85                      ## DW_OP_reg5
-;CHECK-NEXT:         .quad   0
-;CHECK-NEXT:         .quad   0
-
+;CHECK: Ldebug_loc0:
+;CHECK-NEXT:	.quad	Lfunc_begin0
+;CHECK-NEXT:	.quad	Lfunc_end0
+;CHECK-NEXT:	.short	1                       ## Loc expr size
+;CHECK-NEXT:	.byte	85                      ## DW_OP_reg5
+;CHECK-NEXT:	.quad	0
+;CHECK-NEXT:	.quad	0
 
 %0 = type { i64, i1 }
 
- at __clz_tab = external unnamed_addr constant [256 x i8]
+ at __clz_tab = external constant [256 x i8]
 
 define hidden i128 @__divti3(i128 %u, i128 %v) nounwind readnone {
 entry:
-  tail call void @llvm.dbg.value(metadata !{i128 %u}, i64 0, metadata !103), !dbg !111
-  tail call void @llvm.dbg.value(metadata !{i128 %v}, i64 0, metadata !104), !dbg !111
-  tail call void @llvm.dbg.declare(metadata !{null}, metadata !108), !dbg !112
-  tail call void @llvm.dbg.declare(metadata !{null}, metadata !109), !dbg !113
-  tail call void @llvm.dbg.value(metadata !114, i64 0, metadata !105), !dbg !115
-  %0 = trunc i128 %u to i64
-  %sroa.store.elt15 = lshr i128 %u, 64
-  %1 = trunc i128 %sroa.store.elt15 to i64
-  %2 = trunc i128 %v to i64
-  %sroa.store.elt = lshr i128 %v, 64
-  %3 = trunc i128 %sroa.store.elt to i64
-  %4 = icmp slt i64 %1, 0, !dbg !116
-  br i1 %4, label %bb, label %bb1, !dbg !116
-
-bb:                                               ; preds = %entry
-  tail call void @llvm.dbg.value(metadata !117, i64 0, metadata !105), !dbg !118
-  %5 = sub nsw i128 0, %u, !dbg !118
-  %6 = trunc i128 %5 to i64
-  %sroa.store.elt18 = lshr i128 %5, 64
-  %7 = trunc i128 %sroa.store.elt18 to i64
-  br label %bb1, !dbg !118
-
-bb1:                                              ; preds = %bb, %entry
-  %uu.0.1.0 = phi i64 [ %7, %bb ], [ %1, %entry ]
-  %uu.0.0.0 = phi i64 [ %6, %bb ], [ %0, %entry ]
-  %c.0 = phi i64 [ -1, %bb ], [ 0, %entry ]
-  %8 = icmp slt i64 %3, 0, !dbg !119
-  br i1 %8, label %bb2, label %bb4, !dbg !119
-
-bb2:                                              ; preds = %bb1
-  %not3 = xor i64 %c.0, -1, !dbg !120
-  tail call void @llvm.dbg.value(metadata !{i64 %not3}, i64 0, metadata !105), !dbg !120
-  %9 = sub nsw i128 0, %v, !dbg !120
-  %10 = trunc i128 %9 to i64
-  %sroa.store.elt11 = lshr i128 %9, 64
-  %11 = trunc i128 %sroa.store.elt11 to i64
-  br label %bb4, !dbg !120
-
-bb4:                                              ; preds = %bb2, %bb1
-  %vv.0.1.0 = phi i64 [ %11, %bb2 ], [ %3, %bb1 ]
-  %vv.0.0.0 = phi i64 [ %10, %bb2 ], [ %2, %bb1 ]
-  %c.1 = phi i64 [ %not3, %bb2 ], [ %c.0, %bb1 ]
-  tail call void @llvm.dbg.value(metadata !{null}, i64 0, metadata !14) nounwind, !dbg !121
-  tail call void @llvm.dbg.value(metadata !{null}, i64 0, metadata !15) nounwind, !dbg !121
-  tail call void @llvm.dbg.value(metadata !123, i64 0, metadata !16) nounwind, !dbg !121
-  tail call void @llvm.dbg.declare(metadata !{null}, metadata !17) nounwind, !dbg !124
-  tail call void @llvm.dbg.declare(metadata !{null}, metadata !30) nounwind, !dbg !125
-  tail call void @llvm.dbg.declare(metadata !{null}, metadata !31) nounwind, !dbg !126
-  tail call void @llvm.dbg.declare(metadata !{null}, metadata !43) nounwind, !dbg !127
-  tail call void @llvm.dbg.value(metadata !{i64 %vv.0.0.0}, i64 0, metadata !32) nounwind, !dbg !128
-  tail call void @llvm.dbg.value(metadata !{i64 %vv.0.1.0}, i64 0, metadata !35) nounwind, !dbg !129
-  tail call void @llvm.dbg.value(metadata !{i64 %uu.0.0.0}, i64 0, metadata !36) nounwind, !dbg !130
-  tail call void @llvm.dbg.value(metadata !{i64 %uu.0.1.0}, i64 0, metadata !37) nounwind, !dbg !131
-  %12 = icmp eq i64 %vv.0.1.0, 0, !dbg !132
-  br i1 %12, label %bb.i, label %bb73.i, !dbg !132
-
-bb.i:                                             ; preds = %bb4
-  %13 = icmp ugt i64 %vv.0.0.0, %uu.0.1.0, !dbg !133
-  br i1 %13, label %bb4.i, label %bb21.i, !dbg !133
-
-bb2.i:                                            ; preds = %bb4.i
-  %tmp154.i = shl i64 255, %.cast.i
-  %14 = and i64 %tmp154.i, %vv.0.0.0
-  %15 = icmp eq i64 %14, 0, !dbg !134
-  br i1 %15, label %bb3.i, label %bb5.i, !dbg !134
-
-bb3.i:                                            ; preds = %bb2.i
-  %indvar.next20.i = add i64 %indvar19.i, 1
-  br label %bb4.i, !dbg !134
-
-bb4.i:                                            ; preds = %bb.i, %bb3.i
-  %indvar19.i = phi i64 [ %indvar.next20.i, %bb3.i ], [ 0, %bb.i ]
-  %tmp24 = mul i64 %indvar19.i, -8
-  %.cast.i = add i64 %tmp24, 56
-  %16 = icmp eq i64 %.cast.i, 0, !dbg !134
-  br i1 %16, label %bb5.i, label %bb2.i, !dbg !134
-
-bb5.i:                                            ; preds = %bb4.i, %bb2.i
-  %.cast6.i = and i64 %.cast.i, 4294967288
-  %17 = lshr i64 %vv.0.0.0, %.cast6.i, !dbg !134
-  %18 = getelementptr inbounds [256 x i8]* @__clz_tab, i64 0, i64 %17, !dbg !134
-  %19 = load i8* %18, align 1, !dbg !134
-  %20 = zext i8 %19 to i64, !dbg !134
-  %21 = add i64 %20, %.cast.i, !dbg !134
-  tail call void @llvm.dbg.value(metadata !135, i64 0, metadata !42) nounwind, !dbg !134
-  %22 = icmp eq i64 %21, 64
-  br i1 %22, label %bb12.i, label %bb7.i, !dbg !136
-
-bb7.i:                                            ; preds = %bb5.i
-  %23 = sub i64 64, %21, !dbg !134
-  %.cast8.i = and i64 %23, 4294967295
-  %24 = shl i64 %vv.0.0.0, %.cast8.i, !dbg !137
-  tail call void @llvm.dbg.value(metadata !{i64 %24}, i64 0, metadata !32) nounwind, !dbg !137
-  %25 = shl i64 %uu.0.1.0, %.cast8.i, !dbg !138
-  %.cast10.i = and i64 %21, 4294967295
-  %26 = lshr i64 %uu.0.0.0, %.cast10.i, !dbg !138
-  %27 = or i64 %25, %26, !dbg !138
-  tail call void @llvm.dbg.value(metadata !{i64 %27}, i64 0, metadata !37) nounwind, !dbg !138
-  %28 = shl i64 %uu.0.0.0, %.cast8.i, !dbg !139
-  tail call void @llvm.dbg.value(metadata !{i64 %28}, i64 0, metadata !36) nounwind, !dbg !139
-  br label %bb12.i, !dbg !139
-
-bb12.i:                                           ; preds = %bb7.i, %bb5.i
-  %n1.0.i = phi i64 [ %27, %bb7.i ], [ %uu.0.1.0, %bb5.i ]
-  %n0.0.i = phi i64 [ %28, %bb7.i ], [ %uu.0.0.0, %bb5.i ]
-  %d0.0.i = phi i64 [ %24, %bb7.i ], [ %vv.0.0.0, %bb5.i ]
-  %29 = lshr i64 %d0.0.i, 32, !dbg !140
-  tail call void @llvm.dbg.value(metadata !{i64 %29}, i64 0, metadata !47) nounwind, !dbg !140
-  %30 = and i64 %d0.0.i, 4294967295, !dbg !140
-  tail call void @llvm.dbg.value(metadata !{i64 %30}, i64 0, metadata !49) nounwind, !dbg !140
-  %31 = urem i64 %n1.0.i, %29, !dbg !140
-  tail call void @llvm.dbg.value(metadata !{i64 %31}, i64 0, metadata !52) nounwind, !dbg !140
-  %32 = udiv i64 %n1.0.i, %29, !dbg !140
-  tail call void @llvm.dbg.value(metadata !{i64 %32}, i64 0, metadata !50) nounwind, !dbg !140
-  %33 = mul i64 %32, %30, !dbg !140
-  tail call void @llvm.dbg.value(metadata !{i64 %33}, i64 0, metadata !54) nounwind, !dbg !140
-  %34 = shl i64 %31, 32
-  %35 = lshr i64 %n0.0.i, 32, !dbg !140
-  %36 = or i64 %34, %35, !dbg !140
-  tail call void @llvm.dbg.value(metadata !{i64 %36}, i64 0, metadata !52) nounwind, !dbg !140
-  %37 = icmp ult i64 %36, %33, !dbg !140
-  br i1 %37, label %bb13.i, label %bb16.i, !dbg !140
-
-bb13.i:                                           ; preds = %bb12.i
-  %38 = add i64 %32, -1
-  tail call void @llvm.dbg.value(metadata !{i64 %38}, i64 0, metadata !50) nounwind, !dbg !140
-  %uadd153.i = tail call %0 @llvm.uadd.with.overflow.i64(i64 %36, i64 %d0.0.i) nounwind
-  %39 = extractvalue %0 %uadd153.i, 0
-  tail call void @llvm.dbg.value(metadata !{i64 %39}, i64 0, metadata !52) nounwind, !dbg !140
-  %40 = extractvalue %0 %uadd153.i, 1
-  %.not.i = xor i1 %40, true
-  %41 = icmp ult i64 %39, %33, !dbg !140
-  %or.cond.i = and i1 %41, %.not.i
-  br i1 %or.cond.i, label %bb15.i, label %bb16.i, !dbg !140
-
-bb15.i:                                           ; preds = %bb13.i
-  %42 = add i64 %32, -2
-  tail call void @llvm.dbg.value(metadata !{i64 %42}, i64 0, metadata !50) nounwind, !dbg !140
-  %43 = add i64 %39, %d0.0.i, !dbg !140
-  tail call void @llvm.dbg.value(metadata !{i64 %43}, i64 0, metadata !52) nounwind, !dbg !140
-  br label %bb16.i, !dbg !140
-
-bb16.i:                                           ; preds = %bb15.i, %bb13.i, %bb12.i
-  %__r1.0.i = phi i64 [ %43, %bb15.i ], [ %39, %bb13.i ], [ %36, %bb12.i ]
-  %__q1.0.i = phi i64 [ %42, %bb15.i ], [ %38, %bb13.i ], [ %32, %bb12.i ]
-  %44 = sub i64 %__r1.0.i, %33, !dbg !140
-  tail call void @llvm.dbg.value(metadata !{i64 %44}, i64 0, metadata !52) nounwind, !dbg !140
-  %45 = urem i64 %44, %29, !dbg !140
-  tail call void @llvm.dbg.value(metadata !{i64 %45}, i64 0, metadata !53) nounwind, !dbg !140
-  %46 = udiv i64 %44, %29, !dbg !140
-  tail call void @llvm.dbg.value(metadata !{i64 %46}, i64 0, metadata !51) nounwind, !dbg !140
-  %47 = mul i64 %46, %30, !dbg !140
-  tail call void @llvm.dbg.value(metadata !{i64 %47}, i64 0, metadata !54) nounwind, !dbg !140
-  %48 = shl i64 %45, 32
-  %49 = and i64 %n0.0.i, 4294967295, !dbg !140
-  %50 = or i64 %48, %49, !dbg !140
-  tail call void @llvm.dbg.value(metadata !{i64 %50}, i64 0, metadata !53) nounwind, !dbg !140
-  %51 = icmp ult i64 %50, %47, !dbg !140
-  br i1 %51, label %bb17.i, label %bb20.i, !dbg !140
-
-bb17.i:                                           ; preds = %bb16.i
-  %52 = add i64 %46, -1
-  tail call void @llvm.dbg.value(metadata !{i64 %52}, i64 0, metadata !51) nounwind, !dbg !140
-  %uadd152.i = tail call %0 @llvm.uadd.with.overflow.i64(i64 %50, i64 %d0.0.i) nounwind
-  tail call void @llvm.dbg.value(metadata !135, i64 0, metadata !53) nounwind, !dbg !140
-  %53 = extractvalue %0 %uadd152.i, 1
-  br i1 %53, label %bb20.i, label %bb18.i, !dbg !140
-
-bb18.i:                                           ; preds = %bb17.i
-  %54 = extractvalue %0 %uadd152.i, 0
-  %55 = add i64 %46, -2
-  %56 = icmp ult i64 %54, %47, !dbg !140
-  %..i = select i1 %56, i64 %55, i64 %52
-  br label %bb20.i
-
-bb20.i:                                           ; preds = %bb18.i, %bb17.i, %bb16.i
-  %__q0.0.i = phi i64 [ %52, %bb17.i ], [ %46, %bb16.i ], [ %..i, %bb18.i ]
-  tail call void @llvm.dbg.value(metadata !{null}, i64 0, metadata !53) nounwind, !dbg !140
-  %57 = shl i64 %__q1.0.i, 32
-  %58 = or i64 %__q0.0.i, %57, !dbg !140
-  tail call void @llvm.dbg.value(metadata !{i64 %58}, i64 0, metadata !39) nounwind, !dbg !140
-  tail call void @llvm.dbg.value(metadata !{null}, i64 0, metadata !36) nounwind, !dbg !140
-  tail call void @llvm.dbg.value(metadata !114, i64 0, metadata !40) nounwind, !dbg !141
-  br label %__udivmodti4.exit, !dbg !141
-
-bb21.i:                                           ; preds = %bb.i
-  %59 = icmp eq i64 %vv.0.0.0, 0, !dbg !142
-  br i1 %59, label %bb22.i, label %bb23.i, !dbg !142
-
-bb22.i:                                           ; preds = %bb21.i
-  %60 = udiv i64 1, %vv.0.0.0, !dbg !143
-  tail call void @llvm.dbg.value(metadata !{i64 %60}, i64 0, metadata !32) nounwind, !dbg !143
-  br label %bb23.i, !dbg !143
-
-bb23.i:                                           ; preds = %bb22.i, %bb21.i
-  %d0.1.i = phi i64 [ %60, %bb22.i ], [ %vv.0.0.0, %bb21.i ]
-  tail call void @llvm.dbg.value(metadata !{i64 %d0.1.i}, i64 0, metadata !55) nounwind, !dbg !144
-  tail call void @llvm.dbg.value(metadata !145, i64 0, metadata !57) nounwind, !dbg !144
-  br label %bb29.i, !dbg !144
-
-bb26.i:                                           ; preds = %bb29.i
-  %tmp151.i = shl i64 255, %.cast27.i
-  %61 = and i64 %tmp151.i, %d0.1.i
-  %62 = icmp eq i64 %61, 0, !dbg !144
-  br i1 %62, label %bb28.i, label %bb30.i, !dbg !144
-
-bb28.i:                                           ; preds = %bb26.i
-  %indvar.next16.i = add i64 %indvar15.i, 1
-  br label %bb29.i, !dbg !144
-
-bb29.i:                                           ; preds = %bb28.i, %bb23.i
-  %indvar15.i = phi i64 [ %indvar.next16.i, %bb28.i ], [ 0, %bb23.i ]
-  %tmp22 = mul i64 %indvar15.i, -8
-  %.cast27.i = add i64 %tmp22, 56
-  %63 = icmp eq i64 %.cast27.i, 0, !dbg !144
-  br i1 %63, label %bb30.i, label %bb26.i, !dbg !144
-
-bb30.i:                                           ; preds = %bb29.i, %bb26.i
-  %.cast31.i = and i64 %.cast27.i, 4294967288
-  %64 = lshr i64 %d0.1.i, %.cast31.i, !dbg !144
-  %65 = getelementptr inbounds [256 x i8]* @__clz_tab, i64 0, i64 %64, !dbg !144
-  %66 = load i8* %65, align 1, !dbg !144
-  %67 = zext i8 %66 to i64, !dbg !144
-  %68 = add i64 %67, %.cast27.i, !dbg !144
-  tail call void @llvm.dbg.value(metadata !135, i64 0, metadata !42) nounwind, !dbg !144
-  %69 = icmp eq i64 %68, 64
-  br i1 %69, label %bb32.i, label %bb33.i, !dbg !146
-
-bb32.i:                                           ; preds = %bb30.i
-  %70 = sub i64 %uu.0.1.0, %d0.1.i, !dbg !147
-  tail call void @llvm.dbg.value(metadata !{i64 %70}, i64 0, metadata !37) nounwind, !dbg !147
-  tail call void @llvm.dbg.value(metadata !148, i64 0, metadata !40) nounwind, !dbg !149
-  br label %bb54.i, !dbg !149
-
-bb33.i:                                           ; preds = %bb30.i
-  %71 = sub i64 64, %68, !dbg !144
-  tail call void @llvm.dbg.value(metadata !{i64 %68}, i64 0, metadata !41) nounwind, !dbg !150
-  %.cast34.i = and i64 %71, 4294967295
-  %72 = shl i64 %d0.1.i, %.cast34.i, !dbg !151
-  tail call void @llvm.dbg.value(metadata !{i64 %72}, i64 0, metadata !32) nounwind, !dbg !151
-  %.cast35.i = and i64 %68, 4294967295
-  %73 = lshr i64 %uu.0.1.0, %.cast35.i, !dbg !152
-  tail call void @llvm.dbg.value(metadata !{i64 %73}, i64 0, metadata !38) nounwind, !dbg !152
-  %74 = shl i64 %uu.0.1.0, %.cast34.i, !dbg !153
-  %75 = lshr i64 %uu.0.0.0, %.cast35.i, !dbg !153
-  %76 = or i64 %74, %75, !dbg !153
-  tail call void @llvm.dbg.value(metadata !{i64 %76}, i64 0, metadata !37) nounwind, !dbg !153
-  %77 = shl i64 %uu.0.0.0, %.cast34.i, !dbg !154
-  tail call void @llvm.dbg.value(metadata !{i64 %77}, i64 0, metadata !36) nounwind, !dbg !154
-  %78 = lshr i64 %72, 32, !dbg !155
-  tail call void @llvm.dbg.value(metadata !{i64 %78}, i64 0, metadata !58) nounwind, !dbg !155
-  %79 = and i64 %72, 4294967295, !dbg !155
-  tail call void @llvm.dbg.value(metadata !{i64 %79}, i64 0, metadata !60) nounwind, !dbg !155
-  %80 = urem i64 %73, %78, !dbg !155
-  tail call void @llvm.dbg.value(metadata !{i64 %80}, i64 0, metadata !63) nounwind, !dbg !155
-  %81 = udiv i64 %73, %78, !dbg !155
-  tail call void @llvm.dbg.value(metadata !{i64 %81}, i64 0, metadata !61) nounwind, !dbg !155
-  %82 = mul i64 %81, %79, !dbg !155
-  tail call void @llvm.dbg.value(metadata !{i64 %82}, i64 0, metadata !65) nounwind, !dbg !155
-  %83 = shl i64 %80, 32
-  %84 = lshr i64 %76, 32, !dbg !155
-  %85 = or i64 %83, %84, !dbg !155
-  tail call void @llvm.dbg.value(metadata !{i64 %85}, i64 0, metadata !63) nounwind, !dbg !155
-  %86 = icmp ult i64 %85, %82, !dbg !155
-  br i1 %86, label %bb46.i, label %bb49.i, !dbg !155
-
-bb46.i:                                           ; preds = %bb33.i
-  %87 = add i64 %81, -1
-  tail call void @llvm.dbg.value(metadata !{i64 %87}, i64 0, metadata !61) nounwind, !dbg !155
-  %uadd150.i = tail call %0 @llvm.uadd.with.overflow.i64(i64 %85, i64 %72) nounwind
-  %88 = extractvalue %0 %uadd150.i, 0
-  tail call void @llvm.dbg.value(metadata !{i64 %88}, i64 0, metadata !63) nounwind, !dbg !155
-  %89 = extractvalue %0 %uadd150.i, 1
-  %.not1.i = xor i1 %89, true
-  %90 = icmp ult i64 %88, %82, !dbg !155
-  %or.cond2.i = and i1 %90, %.not1.i
-  br i1 %or.cond2.i, label %bb48.i, label %bb49.i, !dbg !155
-
-bb48.i:                                           ; preds = %bb46.i
-  %91 = add i64 %81, -2
-  tail call void @llvm.dbg.value(metadata !{i64 %91}, i64 0, metadata !61) nounwind, !dbg !155
-  %92 = add i64 %88, %72, !dbg !155
-  tail call void @llvm.dbg.value(metadata !{i64 %92}, i64 0, metadata !63) nounwind, !dbg !155
-  br label %bb49.i, !dbg !155
-
-bb49.i:                                           ; preds = %bb48.i, %bb46.i, %bb33.i
-  %__q141.0.i = phi i64 [ %91, %bb48.i ], [ %87, %bb46.i ], [ %81, %bb33.i ]
-  %__r143.0.i = phi i64 [ %92, %bb48.i ], [ %88, %bb46.i ], [ %85, %bb33.i ]
-  %93 = sub i64 %__r143.0.i, %82, !dbg !155
-  tail call void @llvm.dbg.value(metadata !{i64 %93}, i64 0, metadata !63) nounwind, !dbg !155
-  %94 = urem i64 %93, %78, !dbg !155
-  tail call void @llvm.dbg.value(metadata !{i64 %94}, i64 0, metadata !64) nounwind, !dbg !155
-  %95 = udiv i64 %93, %78, !dbg !155
-  tail call void @llvm.dbg.value(metadata !{i64 %95}, i64 0, metadata !62) nounwind, !dbg !155
-  %96 = mul i64 %95, %79, !dbg !155
-  tail call void @llvm.dbg.value(metadata !{i64 %96}, i64 0, metadata !65) nounwind, !dbg !155
-  %97 = shl i64 %94, 32
-  %98 = and i64 %76, 4294967295, !dbg !155
-  %99 = or i64 %97, %98, !dbg !155
-  tail call void @llvm.dbg.value(metadata !{i64 %99}, i64 0, metadata !64) nounwind, !dbg !155
-  %100 = icmp ult i64 %99, %96, !dbg !155
-  br i1 %100, label %bb50.i, label %bb53.i, !dbg !155
-
-bb50.i:                                           ; preds = %bb49.i
-  %101 = add i64 %95, -1
-  tail call void @llvm.dbg.value(metadata !{i64 %101}, i64 0, metadata !62) nounwind, !dbg !155
-  %uadd149.i = tail call %0 @llvm.uadd.with.overflow.i64(i64 %99, i64 %72) nounwind
-  %102 = extractvalue %0 %uadd149.i, 0
-  tail call void @llvm.dbg.value(metadata !{i64 %102}, i64 0, metadata !64) nounwind, !dbg !155
-  %103 = extractvalue %0 %uadd149.i, 1
-  %.not3.i = xor i1 %103, true
-  %104 = icmp ult i64 %102, %96, !dbg !155
-  %or.cond4.i = and i1 %104, %.not3.i
-  br i1 %or.cond4.i, label %bb52.i, label %bb53.i, !dbg !155
-
-bb52.i:                                           ; preds = %bb50.i
-  %105 = add i64 %95, -2
-  tail call void @llvm.dbg.value(metadata !{i64 %105}, i64 0, metadata !62) nounwind, !dbg !155
-  %106 = add i64 %102, %72, !dbg !155
-  tail call void @llvm.dbg.value(metadata !{i64 %106}, i64 0, metadata !64) nounwind, !dbg !155
-  br label %bb53.i, !dbg !155
-
-bb53.i:                                           ; preds = %bb52.i, %bb50.i, %bb49.i
-  %__q042.0.i = phi i64 [ %105, %bb52.i ], [ %101, %bb50.i ], [ %95, %bb49.i ]
-  %__r044.0.i = phi i64 [ %106, %bb52.i ], [ %102, %bb50.i ], [ %99, %bb49.i ]
-  %107 = sub i64 %__r044.0.i, %96, !dbg !155
-  tail call void @llvm.dbg.value(metadata !{i64 %107}, i64 0, metadata !64) nounwind, !dbg !155
-  %108 = shl i64 %__q141.0.i, 32
-  %109 = or i64 %__q042.0.i, %108, !dbg !155
-  tail call void @llvm.dbg.value(metadata !{i64 %109}, i64 0, metadata !40) nounwind, !dbg !155
-  tail call void @llvm.dbg.value(metadata !{i64 %107}, i64 0, metadata !37) nounwind, !dbg !155
-  br label %bb54.i, !dbg !155
-
-bb54.i:                                           ; preds = %bb53.i, %bb32.i
-  %q1.0.i = phi i64 [ 1, %bb32.i ], [ %109, %bb53.i ]
-  %n1.1.i = phi i64 [ %70, %bb32.i ], [ %107, %bb53.i ]
-  %n0.1.i = phi i64 [ %uu.0.0.0, %bb32.i ], [ %77, %bb53.i ]
-  %d0.2.i = phi i64 [ %d0.1.i, %bb32.i ], [ %72, %bb53.i ]
-  %110 = lshr i64 %d0.2.i, 32, !dbg !156
-  tail call void @llvm.dbg.value(metadata !{i64 %110}, i64 0, metadata !66) nounwind, !dbg !156
-  %111 = and i64 %d0.2.i, 4294967295, !dbg !156
-  tail call void @llvm.dbg.value(metadata !{i64 %111}, i64 0, metadata !68) nounwind, !dbg !156
-  %112 = urem i64 %n1.1.i, %110, !dbg !156
-  tail call void @llvm.dbg.value(metadata !{i64 %112}, i64 0, metadata !71) nounwind, !dbg !156
-  %113 = udiv i64 %n1.1.i, %110, !dbg !156
-  tail call void @llvm.dbg.value(metadata !{i64 %113}, i64 0, metadata !69) nounwind, !dbg !156
-  %114 = mul i64 %113, %111, !dbg !156
-  tail call void @llvm.dbg.value(metadata !{i64 %114}, i64 0, metadata !73) nounwind, !dbg !156
-  %115 = shl i64 %112, 32
-  %116 = lshr i64 %n0.1.i, 32, !dbg !156
-  %117 = or i64 %115, %116, !dbg !156
-  tail call void @llvm.dbg.value(metadata !{i64 %117}, i64 0, metadata !71) nounwind, !dbg !156
-  %118 = icmp ult i64 %117, %114, !dbg !156
-  br i1 %118, label %bb62.i, label %bb65.i, !dbg !156
-
-bb62.i:                                           ; preds = %bb54.i
-  %119 = add i64 %113, -1
-  tail call void @llvm.dbg.value(metadata !{i64 %119}, i64 0, metadata !69) nounwind, !dbg !156
-  %uadd148.i = tail call %0 @llvm.uadd.with.overflow.i64(i64 %117, i64 %d0.2.i) nounwind
-  %120 = extractvalue %0 %uadd148.i, 0
-  tail call void @llvm.dbg.value(metadata !{i64 %120}, i64 0, metadata !71) nounwind, !dbg !156
-  %121 = extractvalue %0 %uadd148.i, 1
-  %.not5.i = xor i1 %121, true
-  %122 = icmp ult i64 %120, %114, !dbg !156
-  %or.cond6.i = and i1 %122, %.not5.i
-  br i1 %or.cond6.i, label %bb64.i, label %bb65.i, !dbg !156
-
-bb64.i:                                           ; preds = %bb62.i
-  %123 = add i64 %113, -2
-  tail call void @llvm.dbg.value(metadata !{i64 %123}, i64 0, metadata !69) nounwind, !dbg !156
-  %124 = add i64 %120, %d0.2.i, !dbg !156
-  tail call void @llvm.dbg.value(metadata !{i64 %124}, i64 0, metadata !71) nounwind, !dbg !156
-  br label %bb65.i, !dbg !156
-
-bb65.i:                                           ; preds = %bb64.i, %bb62.i, %bb54.i
-  %__q157.0.i = phi i64 [ %123, %bb64.i ], [ %119, %bb62.i ], [ %113, %bb54.i ]
-  %__r159.0.i = phi i64 [ %124, %bb64.i ], [ %120, %bb62.i ], [ %117, %bb54.i ]
-  %125 = sub i64 %__r159.0.i, %114, !dbg !156
-  tail call void @llvm.dbg.value(metadata !{i64 %125}, i64 0, metadata !71) nounwind, !dbg !156
-  %126 = urem i64 %125, %110, !dbg !156
-  tail call void @llvm.dbg.value(metadata !{i64 %126}, i64 0, metadata !72) nounwind, !dbg !156
-  %127 = udiv i64 %125, %110, !dbg !156
-  tail call void @llvm.dbg.value(metadata !{i64 %127}, i64 0, metadata !70) nounwind, !dbg !156
-  %128 = mul i64 %127, %111, !dbg !156
-  tail call void @llvm.dbg.value(metadata !{i64 %128}, i64 0, metadata !73) nounwind, !dbg !156
-  %129 = shl i64 %126, 32
-  %130 = and i64 %n0.1.i, 4294967295, !dbg !156
-  %131 = or i64 %129, %130, !dbg !156
-  tail call void @llvm.dbg.value(metadata !{i64 %131}, i64 0, metadata !72) nounwind, !dbg !156
-  %132 = icmp ult i64 %131, %128, !dbg !156
-  br i1 %132, label %bb66.i, label %bb69.i, !dbg !156
-
-bb66.i:                                           ; preds = %bb65.i
-  %133 = add i64 %127, -1
-  tail call void @llvm.dbg.value(metadata !{i64 %133}, i64 0, metadata !70) nounwind, !dbg !156
-  %uadd147.i = tail call %0 @llvm.uadd.with.overflow.i64(i64 %131, i64 %d0.2.i) nounwind
-  tail call void @llvm.dbg.value(metadata !135, i64 0, metadata !72) nounwind, !dbg !156
-  %134 = extractvalue %0 %uadd147.i, 1
-  br i1 %134, label %bb69.i, label %bb67.i, !dbg !156
-
-bb67.i:                                           ; preds = %bb66.i
-  %135 = extractvalue %0 %uadd147.i, 0
-  %136 = add i64 %127, -2
-  %137 = icmp ult i64 %135, %128, !dbg !156
-  %.7.i = select i1 %137, i64 %136, i64 %133
-  br label %bb69.i
-
-bb69.i:                                           ; preds = %bb67.i, %bb66.i, %bb65.i
-  %__q058.0.i = phi i64 [ %133, %bb66.i ], [ %127, %bb65.i ], [ %.7.i, %bb67.i ]
-  tail call void @llvm.dbg.value(metadata !{null}, i64 0, metadata !72) nounwind, !dbg !156
-  %138 = shl i64 %__q157.0.i, 32
-  %139 = or i64 %__q058.0.i, %138, !dbg !156
-  tail call void @llvm.dbg.value(metadata !{i64 %139}, i64 0, metadata !39) nounwind, !dbg !156
-  tail call void @llvm.dbg.value(metadata !{null}, i64 0, metadata !36) nounwind, !dbg !156
-  br label %__udivmodti4.exit, !dbg !156
-
-bb73.i:                                           ; preds = %bb4
-  %140 = icmp ugt i64 %vv.0.1.0, %uu.0.1.0, !dbg !157
-  br i1 %140, label %__udivmodti4.exit, label %bb82.i, !dbg !157
-
-bb79.i:                                           ; preds = %bb82.i
-  %tmp.i = shl i64 255, %.cast80.i
-  %141 = and i64 %tmp.i, %vv.0.1.0
-  %142 = icmp eq i64 %141, 0, !dbg !158
-  br i1 %142, label %bb81.i, label %bb83.i, !dbg !158
-
-bb81.i:                                           ; preds = %bb79.i
-  %indvar.next.i = add i64 %indvar.i, 1
-  br label %bb82.i, !dbg !158
-
-bb82.i:                                           ; preds = %bb73.i, %bb81.i
-  %indvar.i = phi i64 [ %indvar.next.i, %bb81.i ], [ 0, %bb73.i ]
-  %tmp = mul i64 %indvar.i, -8
-  %.cast80.i = add i64 %tmp, 56
-  %143 = icmp eq i64 %.cast80.i, 0, !dbg !158
-  br i1 %143, label %bb83.i, label %bb79.i, !dbg !158
-
-bb83.i:                                           ; preds = %bb82.i, %bb79.i
-  %.cast84.i = and i64 %.cast80.i, 4294967288
-  %144 = lshr i64 %vv.0.1.0, %.cast84.i, !dbg !158
-  %145 = getelementptr inbounds [256 x i8]* @__clz_tab, i64 0, i64 %144, !dbg !158
-  %146 = load i8* %145, align 1, !dbg !158
-  %147 = zext i8 %146 to i64, !dbg !158
-  %148 = add i64 %147, %.cast80.i, !dbg !158
-  tail call void @llvm.dbg.value(metadata !135, i64 0, metadata !42) nounwind, !dbg !158
-  %149 = icmp eq i64 %148, 64
-  br i1 %149, label %bb85.i, label %bb92.i, !dbg !159
-
-bb85.i:                                           ; preds = %bb83.i
-  %150 = icmp ugt i64 %uu.0.1.0, %vv.0.1.0, !dbg !160
-  %151 = icmp uge i64 %uu.0.0.0, %vv.0.0.0, !dbg !160
-  %152 = or i1 %150, %151, !dbg !160
-  %.8.i = zext i1 %152 to i64
-  tail call void @llvm.dbg.value(metadata !114, i64 0, metadata !40) nounwind, !dbg !161
-  br label %__udivmodti4.exit
-
-bb92.i:                                           ; preds = %bb83.i
-  %153 = sub i64 64, %148, !dbg !158
-  tail call void @llvm.dbg.value(metadata !{i64 %148}, i64 0, metadata !41) nounwind, !dbg !162
-  %.cast93.i = and i64 %153, 4294967295
-  %154 = shl i64 %vv.0.1.0, %.cast93.i, !dbg !163
-  %.cast94.i = and i64 %148, 4294967295
-  %155 = lshr i64 %vv.0.0.0, %.cast94.i, !dbg !163
-  %156 = or i64 %154, %155, !dbg !163
-  tail call void @llvm.dbg.value(metadata !{i64 %156}, i64 0, metadata !35) nounwind, !dbg !163
-  %157 = shl i64 %vv.0.0.0, %.cast93.i, !dbg !164
-  tail call void @llvm.dbg.value(metadata !{i64 %157}, i64 0, metadata !32) nounwind, !dbg !164
-  %158 = lshr i64 %uu.0.1.0, %.cast94.i, !dbg !165
-  tail call void @llvm.dbg.value(metadata !{i64 %158}, i64 0, metadata !38) nounwind, !dbg !165
-  %159 = shl i64 %uu.0.1.0, %.cast93.i, !dbg !166
-  %160 = lshr i64 %uu.0.0.0, %.cast94.i, !dbg !166
-  %161 = or i64 %159, %160, !dbg !166
-  tail call void @llvm.dbg.value(metadata !{i64 %161}, i64 0, metadata !37) nounwind, !dbg !166
-  %162 = shl i64 %uu.0.0.0, %.cast93.i, !dbg !167
-  tail call void @llvm.dbg.value(metadata !{i64 %162}, i64 0, metadata !36) nounwind, !dbg !167
-  %163 = lshr i64 %156, 32, !dbg !168
-  tail call void @llvm.dbg.value(metadata !{i64 %163}, i64 0, metadata !82) nounwind, !dbg !168
-  %164 = and i64 %156, 4294967295, !dbg !168
-  tail call void @llvm.dbg.value(metadata !{i64 %164}, i64 0, metadata !84) nounwind, !dbg !168
-  %165 = urem i64 %158, %163, !dbg !168
-  tail call void @llvm.dbg.value(metadata !{i64 %165}, i64 0, metadata !87) nounwind, !dbg !168
-  %166 = udiv i64 %158, %163, !dbg !168
-  tail call void @llvm.dbg.value(metadata !{i64 %166}, i64 0, metadata !85) nounwind, !dbg !168
-  %167 = mul i64 %166, %164, !dbg !168
-  tail call void @llvm.dbg.value(metadata !{i64 %167}, i64 0, metadata !89) nounwind, !dbg !168
-  %168 = shl i64 %165, 32
-  %169 = lshr i64 %161, 32, !dbg !168
-  %170 = or i64 %168, %169, !dbg !168
-  tail call void @llvm.dbg.value(metadata !{i64 %170}, i64 0, metadata !87) nounwind, !dbg !168
-  %171 = icmp ult i64 %170, %167, !dbg !168
-  br i1 %171, label %bb107.i, label %bb110.i, !dbg !168
-
-bb107.i:                                          ; preds = %bb92.i
-  %172 = add i64 %166, -1
-  tail call void @llvm.dbg.value(metadata !{i64 %172}, i64 0, metadata !85) nounwind, !dbg !168
-  %uadd146.i = tail call %0 @llvm.uadd.with.overflow.i64(i64 %170, i64 %156) nounwind
-  %173 = extractvalue %0 %uadd146.i, 0
-  tail call void @llvm.dbg.value(metadata !{i64 %173}, i64 0, metadata !87) nounwind, !dbg !168
-  %174 = extractvalue %0 %uadd146.i, 1
-  %.not9.i = xor i1 %174, true
-  %175 = icmp ult i64 %173, %167, !dbg !168
-  %or.cond10.i = and i1 %175, %.not9.i
-  br i1 %or.cond10.i, label %bb109.i, label %bb110.i, !dbg !168
-
-bb109.i:                                          ; preds = %bb107.i
-  %176 = add i64 %166, -2
-  tail call void @llvm.dbg.value(metadata !{i64 %176}, i64 0, metadata !85) nounwind, !dbg !168
-  %177 = add i64 %173, %156, !dbg !168
-  tail call void @llvm.dbg.value(metadata !{i64 %177}, i64 0, metadata !87) nounwind, !dbg !168
-  br label %bb110.i, !dbg !168
-
-bb110.i:                                          ; preds = %bb109.i, %bb107.i, %bb92.i
-  %__q1102.0.i = phi i64 [ %176, %bb109.i ], [ %172, %bb107.i ], [ %166, %bb92.i ]
-  %__r1104.0.i = phi i64 [ %177, %bb109.i ], [ %173, %bb107.i ], [ %170, %bb92.i ]
-  %178 = sub i64 %__r1104.0.i, %167, !dbg !168
-  tail call void @llvm.dbg.value(metadata !{i64 %178}, i64 0, metadata !87) nounwind, !dbg !168
-  %179 = urem i64 %178, %163, !dbg !168
-  tail call void @llvm.dbg.value(metadata !{i64 %179}, i64 0, metadata !88) nounwind, !dbg !168
-  %180 = udiv i64 %178, %163, !dbg !168
-  tail call void @llvm.dbg.value(metadata !{i64 %180}, i64 0, metadata !86) nounwind, !dbg !168
-  %181 = mul i64 %180, %164, !dbg !168
-  tail call void @llvm.dbg.value(metadata !{i64 %181}, i64 0, metadata !89) nounwind, !dbg !168
-  %182 = shl i64 %179, 32
-  %183 = and i64 %161, 4294967295, !dbg !168
-  %184 = or i64 %182, %183, !dbg !168
-  tail call void @llvm.dbg.value(metadata !{i64 %184}, i64 0, metadata !88) nounwind, !dbg !168
-  %185 = icmp ult i64 %184, %181, !dbg !168
-  br i1 %185, label %bb111.i, label %bb114.i, !dbg !168
-
-bb111.i:                                          ; preds = %bb110.i
-  %186 = add i64 %180, -1
-  tail call void @llvm.dbg.value(metadata !{i64 %186}, i64 0, metadata !86) nounwind, !dbg !168
-  %uadd145.i = tail call %0 @llvm.uadd.with.overflow.i64(i64 %184, i64 %156) nounwind
-  %187 = extractvalue %0 %uadd145.i, 0
-  tail call void @llvm.dbg.value(metadata !{i64 %187}, i64 0, metadata !88) nounwind, !dbg !168
-  %188 = extractvalue %0 %uadd145.i, 1
-  %.not11.i = xor i1 %188, true
-  %189 = icmp ult i64 %187, %181, !dbg !168
-  %or.cond12.i = and i1 %189, %.not11.i
-  br i1 %or.cond12.i, label %bb113.i, label %bb114.i, !dbg !168
-
-bb113.i:                                          ; preds = %bb111.i
-  %190 = add i64 %180, -2
-  tail call void @llvm.dbg.value(metadata !{i64 %190}, i64 0, metadata !86) nounwind, !dbg !168
-  %191 = add i64 %187, %156, !dbg !168
-  tail call void @llvm.dbg.value(metadata !{i64 %191}, i64 0, metadata !88) nounwind, !dbg !168
-  br label %bb114.i, !dbg !168
-
-bb114.i:                                          ; preds = %bb113.i, %bb111.i, %bb110.i
-  %__q0103.0.i = phi i64 [ %190, %bb113.i ], [ %186, %bb111.i ], [ %180, %bb110.i ]
-  %__r0105.0.i = phi i64 [ %191, %bb113.i ], [ %187, %bb111.i ], [ %184, %bb110.i ]
-  %192 = sub i64 %__r0105.0.i, %181, !dbg !168
-  tail call void @llvm.dbg.value(metadata !{i64 %192}, i64 0, metadata !88) nounwind, !dbg !168
-  %193 = shl i64 %__q1102.0.i, 32
-  %194 = or i64 %__q0103.0.i, %193, !dbg !168
-  tail call void @llvm.dbg.value(metadata !{i64 %194}, i64 0, metadata !39) nounwind, !dbg !168
-  tail call void @llvm.dbg.value(metadata !{i64 %192}, i64 0, metadata !37) nounwind, !dbg !168
-  %195 = and i64 %__q0103.0.i, 4294967295, !dbg !169
-  tail call void @llvm.dbg.value(metadata !{i64 %195}, i64 0, metadata !95) nounwind, !dbg !169
-  %196 = lshr i64 %194, 32, !dbg !169
-  tail call void @llvm.dbg.value(metadata !{i64 %196}, i64 0, metadata !97) nounwind, !dbg !169
-  %197 = and i64 %157, 4294967295, !dbg !169
-  tail call void @llvm.dbg.value(metadata !{i64 %197}, i64 0, metadata !96) nounwind, !dbg !169
-  %198 = lshr i64 %157, 32, !dbg !169
-  tail call void @llvm.dbg.value(metadata !{i64 %198}, i64 0, metadata !98) nounwind, !dbg !169
-  %199 = mul i64 %195, %197, !dbg !169
-  tail call void @llvm.dbg.value(metadata !{i64 %199}, i64 0, metadata !90) nounwind, !dbg !169
-  %200 = mul i64 %195, %198, !dbg !169
-  tail call void @llvm.dbg.value(metadata !{i64 %200}, i64 0, metadata !92) nounwind, !dbg !169
-  %201 = mul i64 %196, %197, !dbg !169
-  tail call void @llvm.dbg.value(metadata !{i64 %201}, i64 0, metadata !93) nounwind, !dbg !169
-  %202 = mul i64 %196, %198, !dbg !169
-  tail call void @llvm.dbg.value(metadata !{i64 %202}, i64 0, metadata !94) nounwind, !dbg !169
-  %203 = lshr i64 %199, 32, !dbg !169
-  %204 = add i64 %203, %200, !dbg !169
-  tail call void @llvm.dbg.value(metadata !{i64 %204}, i64 0, metadata !92) nounwind, !dbg !169
-  %uadd.i = tail call %0 @llvm.uadd.with.overflow.i64(i64 %204, i64 %201) nounwind
-  %205 = extractvalue %0 %uadd.i, 0
-  tail call void @llvm.dbg.value(metadata !{i64 %205}, i64 0, metadata !92) nounwind, !dbg !169
-  %206 = extractvalue %0 %uadd.i, 1
-  %207 = add i64 %202, 4294967296, !dbg !169
-  tail call void @llvm.dbg.value(metadata !{i64 %207}, i64 0, metadata !94) nounwind, !dbg !169
-  %__x3.0.i = select i1 %206, i64 %207, i64 %202
-  %208 = lshr i64 %205, 32, !dbg !169
-  %209 = add i64 %__x3.0.i, %208, !dbg !169
-  tail call void @llvm.dbg.value(metadata !{i64 %209}, i64 0, metadata !79) nounwind, !dbg !169
-  tail call void @llvm.dbg.value(metadata !135, i64 0, metadata !81) nounwind, !dbg !169
-  %210 = icmp ugt i64 %209, %192, !dbg !170
-  br i1 %210, label %bb121.i, label %bb117.i, !dbg !170
-
-bb117.i:                                          ; preds = %bb114.i
-  %211 = and i64 %199, 4294967295, !dbg !169
-  %212 = shl i64 %205, 32
-  %213 = or i64 %212, %211
-  %214 = icmp eq i64 %209, %192, !dbg !170
-  %215 = icmp ugt i64 %213, %162, !dbg !170
-  %216 = and i1 %214, %215, !dbg !170
-  br i1 %216, label %bb121.i, label %__udivmodti4.exit, !dbg !170
-
-bb121.i:                                          ; preds = %bb117.i, %bb114.i
-  %217 = add i64 %194, -1
-  tail call void @llvm.dbg.value(metadata !{i64 %217}, i64 0, metadata !39) nounwind, !dbg !171
-  tail call void @llvm.dbg.value(metadata !{null}, i64 0, metadata !99) nounwind, !dbg !172
-  tail call void @llvm.dbg.value(metadata !{null}, i64 0, metadata !79) nounwind, !dbg !172
-  tail call void @llvm.dbg.value(metadata !{null}, i64 0, metadata !81) nounwind, !dbg !172
-  br label %__udivmodti4.exit, !dbg !172
-
-__udivmodti4.exit:                                ; preds = %bb20.i, %bb69.i, %bb73.i, %bb85.i, %bb117.i, %bb121.i
-  %q1.2.i = phi i64 [ 0, %bb85.i ], [ 0, %bb20.i ], [ %q1.0.i, %bb69.i ], [ 0, %bb73.i ], [ 0, %bb121.i ], [ 0, %bb117.i ]
-  %q0.3.i = phi i64 [ %.8.i, %bb85.i ], [ %58, %bb20.i ], [ %139, %bb69.i ], [ 0, %bb73.i ], [ %217, %bb121.i ], [ %194, %bb117.i ]
-  %218 = zext i64 %q0.3.i to i128
-  %219 = zext i64 %q1.2.i to i128
-  %220 = shl i128 %219, 64
-  %221 = or i128 %220, %218
-  tail call void @llvm.dbg.value(metadata !{i128 %221}, i64 0, metadata !110), !dbg !122
-  %222 = icmp eq i64 %c.1, 0, !dbg !173
-  %223 = sub nsw i128 0, %221, !dbg !174
-  tail call void @llvm.dbg.value(metadata !{i128 %223}, i64 0, metadata !110), !dbg !174
-  %w.0 = select i1 %222, i128 %221, i128 %223
-  ret i128 %w.0, !dbg !175
+  tail call void @llvm.dbg.value(metadata !{i128 %u}, i64 0, metadata !14), !dbg !15
+  tail call void @llvm.dbg.value(metadata !16, i64 0, metadata !17), !dbg !21
+  br i1 undef, label %bb2, label %bb4, !dbg !22
+
+bb2:                                              ; preds = %entry
+  br label %bb4, !dbg !23
+
+bb4:                                              ; preds = %bb2, %entry
+  br i1 undef, label %__udivmodti4.exit, label %bb82.i, !dbg !24
+
+bb82.i:                                           ; preds = %bb4
+  unreachable
+
+__udivmodti4.exit:                                ; preds = %bb4
+  ret i128 undef, !dbg !27
 }
 
 declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
@@ -646,8 +40,6 @@
 declare %0 @llvm.uadd.with.overflow.i64(i64, i64) nounwind readnone
 
 !llvm.dbg.sp = !{!0, !9}
-!llvm.dbg.lv.__udivmodti4 = !{!14, !15, !16, !17, !30, !31, !32, !35, !36, !37, !38, !39, !40, !41, !42, !43, !44, !46, !47, !49, !50, !51, !52, !53, !54, !55, !57, !58, !60, !61, !62, !63, !64, !65, !66, !68, !69, !70, !71, !72, !73, !74, !76, !77, !79, !81, !82, !84, !85, !86, !87, !88, !89, !90, !92, !93, !94, !95, !96, !97, !98, !99, !101}
-!llvm.dbg.lv.__divti3 = !{!103, !104, !105, !108, !109, !110}
 
 !0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"__udivmodti4", metadata !"__udivmodti4", metadata !"", metadata !1, i32 879, metadata !3, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 true, null} ; [ DW_TAG_subprogram ]
 !1 = metadata !{i32 589865, metadata !"foobar.c", metadata !"/tmp", metadata !2} ; [ DW_TAG_file_type ]
@@ -663,165 +55,17 @@
 !11 = metadata !{metadata !12, metadata !12, metadata !12}
 !12 = metadata !{i32 589846, metadata !6, metadata !"TItype", metadata !6, i32 160, i64 0, i64 0, i64 0, i32 0, metadata !13} ; [ DW_TAG_typedef ]
 !13 = metadata !{i32 589860, metadata !1, metadata !"", metadata !1, i32 0, i64 128, i64 128, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ]
-!14 = metadata !{i32 590081, metadata !0, metadata !"n", metadata !1, i32 878, metadata !5, i32 0} ; [ DW_TAG_arg_variable ]
-!15 = metadata !{i32 590081, metadata !0, metadata !"d", metadata !1, i32 878, metadata !5, i32 0} ; [ DW_TAG_arg_variable ]
-!16 = metadata !{i32 590081, metadata !0, metadata !"rp", metadata !1, i32 878, metadata !8, i32 0} ; [ DW_TAG_arg_variable ]
-!17 = metadata !{i32 590080, metadata !18, metadata !"nn", metadata !1, i32 880, metadata !19, i32 0} ; [ DW_TAG_auto_variable ]
-!18 = metadata !{i32 589835, metadata !0, i32 879, i32 0, metadata !1, i32 0} ; [ DW_TAG_lexical_block ]
-!19 = metadata !{i32 589846, metadata !1, metadata !"DWunion", metadata !1, i32 879, i64 0, i64 0, i64 0, i32 0, metadata !20} ; [ DW_TAG_typedef ]
-!20 = metadata !{i32 589847, metadata !1, metadata !"", metadata !6, i32 432, i64 128, i64 128, i64 0, i32 0, null, metadata !21, i32 0, null} ; [ DW_TAG_union_type ]
-!21 = metadata !{metadata !22, metadata !29}
-!22 = metadata !{i32 589837, metadata !20, metadata !"s", metadata !6, i32 433, i64 128, i64 64, i64 0, i32 0, metadata !23} ; [ DW_TAG_member ]
-!23 = metadata !{i32 589843, metadata !1, metadata !"DWstruct", metadata !6, i32 424, i64 128, i64 64, i64 0, i32 0, null, metadata !24, i32 0, null} ; [ DW_TAG_structure_type ]
-!24 = metadata !{metadata !25, metadata !28}
-!25 = metadata !{i32 589837, metadata !23, metadata !"low", metadata !6, i32 424, i64 64, i64 64, i64 0, i32 0, metadata !26} ; [ DW_TAG_member ]
-!26 = metadata !{i32 589846, metadata !6, metadata !"DItype", metadata !6, i32 156, i64 0, i64 0, i64 0, i32 0, metadata !27} ; [ DW_TAG_typedef ]
-!27 = metadata !{i32 589860, metadata !1, metadata !"long int", metadata !1, i32 0, i64 64, i64 64, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ]
-!28 = metadata !{i32 589837, metadata !23, metadata !"high", metadata !6, i32 424, i64 64, i64 64, i64 64, i32 0, metadata !26} ; [ DW_TAG_member ]
-!29 = metadata !{i32 589837, metadata !20, metadata !"ll", metadata !6, i32 434, i64 128, i64 128, i64 0, i32 0, metadata !12} ; [ DW_TAG_member ]
-!30 = metadata !{i32 590080, metadata !18, metadata !"dd", metadata !1, i32 881, metadata !19, i32 0} ; [ DW_TAG_auto_variable ]
-!31 = metadata !{i32 590080, metadata !18, metadata !"rr", metadata !1, i32 882, metadata !19, i32 0} ; [ DW_TAG_auto_variable ]
-!32 = metadata !{i32 590080, metadata !18, metadata !"d0", metadata !1, i32 883, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!33 = metadata !{i32 589846, metadata !6, metadata !"UDItype", metadata !6, i32 159, i64 0, i64 0, i64 0, i32 0, metadata !34} ; [ DW_TAG_typedef ]
-!34 = metadata !{i32 589860, metadata !1, metadata !"long unsigned int", metadata !1, i32 0, i64 64, i64 64, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ]
-!35 = metadata !{i32 590080, metadata !18, metadata !"d1", metadata !1, i32 883, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!36 = metadata !{i32 590080, metadata !18, metadata !"n0", metadata !1, i32 883, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!37 = metadata !{i32 590080, metadata !18, metadata !"n1", metadata !1, i32 883, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!38 = metadata !{i32 590080, metadata !18, metadata !"n2", metadata !1, i32 883, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!39 = metadata !{i32 590080, metadata !18, metadata !"q0", metadata !1, i32 884, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!40 = metadata !{i32 590080, metadata !18, metadata !"q1", metadata !1, i32 884, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!41 = metadata !{i32 590080, metadata !18, metadata !"b", metadata !1, i32 885, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!42 = metadata !{i32 590080, metadata !18, metadata !"bm", metadata !1, i32 885, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!43 = metadata !{i32 590080, metadata !18, metadata !"ww", metadata !1, i32 1086, metadata !19, i32 0} ; [ DW_TAG_auto_variable ]
-!44 = metadata !{i32 590080, metadata !45, metadata !"__xr", metadata !1, i32 933, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!45 = metadata !{i32 589835, metadata !18, i32 933, i32 0, metadata !1, i32 1} ; [ DW_TAG_lexical_block ]
-!46 = metadata !{i32 590080, metadata !45, metadata !"__a", metadata !1, i32 933, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!47 = metadata !{i32 590080, metadata !48, metadata !"__d1", metadata !1, i32 945, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!48 = metadata !{i32 589835, metadata !18, i32 945, i32 0, metadata !1, i32 2} ; [ DW_TAG_lexical_block ]
-!49 = metadata !{i32 590080, metadata !48, metadata !"__d0", metadata !1, i32 945, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!50 = metadata !{i32 590080, metadata !48, metadata !"__q1", metadata !1, i32 945, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!51 = metadata !{i32 590080, metadata !48, metadata !"__q0", metadata !1, i32 945, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!52 = metadata !{i32 590080, metadata !48, metadata !"__r1", metadata !1, i32 945, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!53 = metadata !{i32 590080, metadata !48, metadata !"__r0", metadata !1, i32 945, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!54 = metadata !{i32 590080, metadata !48, metadata !"__m", metadata !1, i32 945, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!55 = metadata !{i32 590080, metadata !56, metadata !"__xr", metadata !1, i32 957, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!56 = metadata !{i32 589835, metadata !18, i32 957, i32 0, metadata !1, i32 3} ; [ DW_TAG_lexical_block ]
-!57 = metadata !{i32 590080, metadata !56, metadata !"__a", metadata !1, i32 957, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!58 = metadata !{i32 590080, metadata !59, metadata !"__d1", metadata !1, i32 982, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!59 = metadata !{i32 589835, metadata !18, i32 982, i32 0, metadata !1, i32 4} ; [ DW_TAG_lexical_block ]
-!60 = metadata !{i32 590080, metadata !59, metadata !"__d0", metadata !1, i32 982, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!61 = metadata !{i32 590080, metadata !59, metadata !"__q1", metadata !1, i32 982, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!62 = metadata !{i32 590080, metadata !59, metadata !"__q0", metadata !1, i32 982, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!63 = metadata !{i32 590080, metadata !59, metadata !"__r1", metadata !1, i32 982, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!64 = metadata !{i32 590080, metadata !59, metadata !"__r0", metadata !1, i32 982, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!65 = metadata !{i32 590080, metadata !59, metadata !"__m", metadata !1, i32 982, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!66 = metadata !{i32 590080, metadata !67, metadata !"__d1", metadata !1, i32 987, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!67 = metadata !{i32 589835, metadata !18, i32 987, i32 0, metadata !1, i32 5} ; [ DW_TAG_lexical_block ]
-!68 = metadata !{i32 590080, metadata !67, metadata !"__d0", metadata !1, i32 987, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!69 = metadata !{i32 590080, metadata !67, metadata !"__q1", metadata !1, i32 987, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!70 = metadata !{i32 590080, metadata !67, metadata !"__q0", metadata !1, i32 987, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!71 = metadata !{i32 590080, metadata !67, metadata !"__r1", metadata !1, i32 987, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!72 = metadata !{i32 590080, metadata !67, metadata !"__r0", metadata !1, i32 987, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!73 = metadata !{i32 590080, metadata !67, metadata !"__m", metadata !1, i32 987, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!74 = metadata !{i32 590080, metadata !75, metadata !"__xr", metadata !1, i32 1022, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!75 = metadata !{i32 589835, metadata !18, i32 1022, i32 0, metadata !1, i32 6} ; [ DW_TAG_lexical_block ]
-!76 = metadata !{i32 590080, metadata !75, metadata !"__a", metadata !1, i32 1022, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!77 = metadata !{i32 590080, metadata !78, metadata !"__x", metadata !1, i32 1036, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!78 = metadata !{i32 589835, metadata !18, i32 1036, i32 0, metadata !1, i32 7} ; [ DW_TAG_lexical_block ]
-!79 = metadata !{i32 590080, metadata !80, metadata !"m1", metadata !1, i32 1052, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!80 = metadata !{i32 589835, metadata !18, i32 1055, i32 0, metadata !1, i32 8} ; [ DW_TAG_lexical_block ]
-!81 = metadata !{i32 590080, metadata !80, metadata !"m0", metadata !1, i32 1052, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!82 = metadata !{i32 590080, metadata !83, metadata !"__d1", metadata !1, i32 1063, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!83 = metadata !{i32 589835, metadata !80, i32 1063, i32 0, metadata !1, i32 9} ; [ DW_TAG_lexical_block ]
-!84 = metadata !{i32 590080, metadata !83, metadata !"__d0", metadata !1, i32 1063, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!85 = metadata !{i32 590080, metadata !83, metadata !"__q1", metadata !1, i32 1063, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!86 = metadata !{i32 590080, metadata !83, metadata !"__q0", metadata !1, i32 1063, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!87 = metadata !{i32 590080, metadata !83, metadata !"__r1", metadata !1, i32 1063, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!88 = metadata !{i32 590080, metadata !83, metadata !"__r0", metadata !1, i32 1063, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!89 = metadata !{i32 590080, metadata !83, metadata !"__m", metadata !1, i32 1063, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!90 = metadata !{i32 590080, metadata !91, metadata !"__x0", metadata !1, i32 1064, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!91 = metadata !{i32 589835, metadata !80, i32 1064, i32 0, metadata !1, i32 10} ; [ DW_TAG_lexical_block ]
-!92 = metadata !{i32 590080, metadata !91, metadata !"__x1", metadata !1, i32 1064, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!93 = metadata !{i32 590080, metadata !91, metadata !"__x2", metadata !1, i32 1064, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!94 = metadata !{i32 590080, metadata !91, metadata !"__x3", metadata !1, i32 1064, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!95 = metadata !{i32 590080, metadata !91, metadata !"__ul", metadata !1, i32 1064, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!96 = metadata !{i32 590080, metadata !91, metadata !"__vl", metadata !1, i32 1064, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!97 = metadata !{i32 590080, metadata !91, metadata !"__uh", metadata !1, i32 1064, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!98 = metadata !{i32 590080, metadata !91, metadata !"__vh", metadata !1, i32 1064, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!99 = metadata !{i32 590080, metadata !100, metadata !"__x", metadata !1, i32 1069, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!100 = metadata !{i32 589835, metadata !80, i32 1069, i32 0, metadata !1, i32 11} ; [ DW_TAG_lexical_block ]
-!101 = metadata !{i32 590080, metadata !102, metadata !"__x", metadata !1, i32 1077, metadata !33, i32 0} ; [ DW_TAG_auto_variable ]
-!102 = metadata !{i32 589835, metadata !80, i32 1077, i32 0, metadata !1, i32 12} ; [ DW_TAG_lexical_block ]
-!103 = metadata !{i32 590081, metadata !9, metadata !"u", metadata !1, i32 1093, metadata !12, i32 0} ; [ DW_TAG_arg_variable ]
-!104 = metadata !{i32 590081, metadata !9, metadata !"v", metadata !1, i32 1093, metadata !12, i32 0} ; [ DW_TAG_arg_variable ]
-!105 = metadata !{i32 590080, metadata !106, metadata !"c", metadata !1, i32 1095, metadata !107, i32 0} ; [ DW_TAG_auto_variable ]
-!106 = metadata !{i32 589835, metadata !9, i32 1094, i32 0, metadata !1, i32 13} ; [ DW_TAG_lexical_block ]
-!107 = metadata !{i32 589846, metadata !6, metadata !"word_type", metadata !6, i32 424, i64 0, i64 0, i64 0, i32 0, metadata !27} ; [ DW_TAG_typedef ]
-!108 = metadata !{i32 590080, metadata !106, metadata !"uu", metadata !1, i32 1096, metadata !19, i32 0} ; [ DW_TAG_auto_variable ]
-!109 = metadata !{i32 590080, metadata !106, metadata !"vv", metadata !1, i32 1097, metadata !19, i32 0} ; [ DW_TAG_auto_variable ]
-!110 = metadata !{i32 590080, metadata !106, metadata !"w", metadata !1, i32 1098, metadata !12, i32 0} ; [ DW_TAG_auto_variable ]
-!111 = metadata !{i32 1093, i32 0, metadata !9, null}
-!112 = metadata !{i32 1096, i32 0, metadata !106, null}
-!113 = metadata !{i32 1097, i32 0, metadata !106, null}
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-!115 = metadata !{i32 1095, i32 0, metadata !106, null}
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-!118 = metadata !{i32 1101, i32 0, metadata !106, null}
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-!134 = metadata !{i32 933, i32 0, metadata !45, metadata !122}
-!135 = metadata !{null}
-!136 = metadata !{i32 935, i32 0, metadata !18, metadata !122}
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-!145 = metadata !{i64 56}
-!146 = metadata !{i32 959, i32 0, metadata !18, metadata !122}
-!147 = metadata !{i32 968, i32 0, metadata !18, metadata !122}
-!148 = metadata !{i64 1}
-!149 = metadata !{i32 969, i32 0, metadata !18, metadata !122}
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-!156 = metadata !{i32 987, i32 0, metadata !67, metadata !122}
-!157 = metadata !{i32 1003, i32 0, metadata !18, metadata !122}
-!158 = metadata !{i32 1022, i32 0, metadata !75, metadata !122}
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-!164 = metadata !{i32 1058, i32 0, metadata !80, metadata !122}
-!165 = metadata !{i32 1059, i32 0, metadata !80, metadata !122}
-!166 = metadata !{i32 1060, i32 0, metadata !80, metadata !122}
-!167 = metadata !{i32 1061, i32 0, metadata !80, metadata !122}
-!168 = metadata !{i32 1063, i32 0, metadata !83, metadata !122}
-!169 = metadata !{i32 1064, i32 0, metadata !91, metadata !122}
-!170 = metadata !{i32 1066, i32 0, metadata !80, metadata !122}
-!171 = metadata !{i32 1068, i32 0, metadata !80, metadata !122}
-!172 = metadata !{i32 1069, i32 0, metadata !100, metadata !122}
-!173 = metadata !{i32 1108, i32 0, metadata !106, null}
-!174 = metadata !{i32 1109, i32 0, metadata !106, null}
-!175 = metadata !{i32 1111, i32 0, metadata !106, null}
+!14 = metadata !{i32 590081, metadata !9, metadata !"u", metadata !1, i32 1093, metadata !12, i32 0} ; [ DW_TAG_arg_variable ]
+!15 = metadata !{i32 1093, i32 0, metadata !9, null}
+!16 = metadata !{i64 0}
+!17 = metadata !{i32 590080, metadata !18, metadata !"c", metadata !1, i32 1095, metadata !19, i32 0} ; [ DW_TAG_auto_variable ]
+!18 = metadata !{i32 589835, metadata !9, i32 1094, i32 0, metadata !1, i32 13} ; [ DW_TAG_lexical_block ]
+!19 = metadata !{i32 589846, metadata !6, metadata !"word_type", metadata !6, i32 424, i64 0, i64 0, i64 0, i32 0, metadata !20} ; [ DW_TAG_typedef ]
+!20 = metadata !{i32 589860, metadata !1, metadata !"long int", metadata !1, i32 0, i64 64, i64 64, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ]
+!21 = metadata !{i32 1095, i32 0, metadata !18, null}
+!22 = metadata !{i32 1103, i32 0, metadata !18, null}
+!23 = metadata !{i32 1104, i32 0, metadata !18, null}
+!24 = metadata !{i32 1003, i32 0, metadata !25, metadata !26}
+!25 = metadata !{i32 589835, metadata !0, i32 879, i32 0, metadata !1, i32 0} ; [ DW_TAG_lexical_block ]
+!26 = metadata !{i32 1107, i32 0, metadata !18, null}
+!27 = metadata !{i32 1111, i32 0, metadata !18, null}



From evan.cheng at apple.com  Mon Feb  7 12:50:47 2011
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 07 Feb 2011 18:50:47 -0000
Subject: [llvm-commits] [llvm] r125023 - in /llvm/trunk:
 lib/Target/ARM/ARMISelLowering.cpp test/CodeGen/ARM/atomic-cmp.ll
Message-ID: <20110207185048.013BE2A6C12D@llvm.org>

Author: evancheng
Date: Mon Feb  7 12:50:47 2011
New Revision: 125023

URL: http://llvm.org/viewvc/llvm-project?rev=125023&view=rev
Log:
Fix an obvious typo which caused an isel assertion. rdar://8964854.

Added:
    llvm/trunk/test/CodeGen/ARM/atomic-cmp.ll
Modified:
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=125023&r1=125022&r2=125023&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Mon Feb  7 12:50:47 2011
@@ -4344,7 +4344,7 @@
   default: llvm_unreachable("unsupported size for AtomicCmpSwap!");
   case 1:
     ldrOpc = isThumb2 ? ARM::t2LDREXB : ARM::LDREXB;
-    strOpc = isThumb2 ? ARM::t2LDREXB : ARM::STREXB;
+    strOpc = isThumb2 ? ARM::t2STREXB : ARM::STREXB;
     break;
   case 2:
     ldrOpc = isThumb2 ? ARM::t2LDREXH : ARM::LDREXH;

Added: llvm/trunk/test/CodeGen/ARM/atomic-cmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/atomic-cmp.ll?rev=125023&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/atomic-cmp.ll (added)
+++ llvm/trunk/test/CodeGen/ARM/atomic-cmp.ll Mon Feb  7 12:50:47 2011
@@ -0,0 +1,17 @@
+; RUN: llc < %s -mtriple=armv7-apple-darwin   | FileCheck %s -check-prefix=ARM
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s -check-prefix=T2
+; rdar://8964854
+
+define i8 @t(i8* %a, i8 %b, i8 %c) nounwind {
+; ARM: t:
+; ARM: ldrexb
+; ARM: strexb
+
+; T2: t:
+; T2: ldrexb
+; T2: strexb
+  %tmp0 = tail call i8 @llvm.atomic.cmp.swap.i8.p0i8(i8* %a, i8 %b, i8 %c)
+  ret i8 %tmp0
+}
+
+declare i8 @llvm.atomic.cmp.swap.i8.p0i8(i8* nocapture, i8, i8) nounwind



From jason.w.kim.2009 at gmail.com  Mon Feb  7 13:07:11 2011
From: jason.w.kim.2009 at gmail.com (Jason W Kim)
Date: Mon, 07 Feb 2011 19:07:11 -0000
Subject: [llvm-commits] [llvm] r125025 -
	/llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp
Message-ID: <20110207190711.AEFED2A6C12C@llvm.org>

Author: jasonwkim
Date: Mon Feb  7 13:07:11 2011
New Revision: 125025

URL: http://llvm.org/viewvc/llvm-project?rev=125025&view=rev
Log:
ARM/MC/ELF Lowercase .cpu attributes in .s, but make them uppercase in .o


Modified:
    llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp?rev=125025&r1=125024&r2=125025&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp Mon Feb  7 13:07:11 2011
@@ -86,7 +86,7 @@
     void EmitTextAttribute(unsigned Attribute, StringRef String) {
       switch (Attribute) {
       case ARMBuildAttrs::CPU_name:
-        Streamer.EmitRawText(StringRef("\t.cpu ") + String);
+        Streamer.EmitRawText(StringRef("\t.cpu ") + LowercaseString(String));
         break;
       default: assert(0 && "Unsupported Text attribute in ASM Mode"); break;
       }
@@ -126,7 +126,7 @@
 
     void EmitTextAttribute(unsigned Attribute, StringRef String) {
       Contents += Attribute;
-      Contents += String;
+      Contents += UppercaseString(String);
       Contents += 0;
     }
 
@@ -467,7 +467,7 @@
 
   if (CPUString == "cortex-a8" ||
       Subtarget->isCortexA8()) {
-    AttrEmitter->EmitTextAttribute(ARMBuildAttrs::CPU_name, "CORTEX-A8");
+    AttrEmitter->EmitTextAttribute(ARMBuildAttrs::CPU_name, "cortex-a8");
     AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch, ARMBuildAttrs::v7);
     AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch_profile,
                                ARMBuildAttrs::ApplicationProfile);



From greened at obbligato.org  Mon Feb  7 13:36:54 2011
From: greened at obbligato.org (David Greene)
Date: Mon, 07 Feb 2011 19:36:54 -0000
Subject: [llvm-commits] [llvm] r125029 -
	/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
Message-ID: <20110207193654.94A702A6C12C@llvm.org>

Author: greened
Date: Mon Feb  7 13:36:54 2011
New Revision: 125029

URL: http://llvm.org/viewvc/llvm-project?rev=125029&view=rev
Log:

[AVX] Insert/extract subvector lowering support.  This includes a
couple of utility functions that will be used in other places for more
AVX lowering.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=125029&r1=125028&r2=125029&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Feb  7 13:36:54 2011
@@ -60,6 +60,97 @@
 static SDValue getMOVL(SelectionDAG &DAG, DebugLoc dl, EVT VT, SDValue V1,
                        SDValue V2);
 
+static SDValue Insert128BitVector(SDValue Result,
+                                  SDValue Vec,
+                                  SDValue Idx,
+                                  SelectionDAG &DAG,
+                                  DebugLoc dl);
+static SDValue Extract128BitVector(SDValue Vec,
+                                   SDValue Idx,
+                                   SelectionDAG &DAG,
+                                   DebugLoc dl);
+
+/// Generate a DAG to grab 128-bits from a vector > 128 bits.  This
+/// sets things up to match to an AVX VEXTRACTF128 instruction or a
+/// simple subregister reference.
+static SDValue Extract128BitVector(SDValue Vec,
+                                   SDValue Idx,
+                                   SelectionDAG &DAG,
+                                   DebugLoc dl) {
+  EVT VT = Vec.getValueType();
+  assert(VT.getSizeInBits() == 256 && "Unexpected vector size!");
+
+  EVT ElVT = VT.getVectorElementType();
+
+  int Factor = VT.getSizeInBits() / 128;
+
+  EVT ResultVT = EVT::getVectorVT(*DAG.getContext(),
+                                  ElVT,
+                                  VT.getVectorNumElements() / Factor);
+
+  // Extract from UNDEF is UNDEF.
+  if (Vec.getOpcode() == ISD::UNDEF)
+    return DAG.getNode(ISD::UNDEF, dl, ResultVT);
+
+  if (isa(Idx)) {
+    unsigned IdxVal = cast(Idx)->getZExtValue();
+
+    // Extract the relevant 128 bits.  Generate an EXTRACT_SUBVECTOR
+    // we can match to VEXTRACTF128.
+    unsigned ElemsPerChunk = 128 / ElVT.getSizeInBits();
+
+    // This is the index of the first element of the 128-bit chunk
+    // we want.
+    unsigned NormalizedIdxVal = (((IdxVal * ElVT.getSizeInBits()) / 128)
+                                 * ElemsPerChunk);
+
+    SDValue VecIdx = DAG.getConstant(NormalizedIdxVal, MVT::i32);
+
+    SDValue Result = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, ResultVT, Vec,
+                                 VecIdx);
+
+    return Result;
+  }
+
+  return SDValue();
+}
+
+/// Generate a DAG to put 128-bits into a vector > 128 bits.  This
+/// sets things up to match to an AVX VINSERTF128 instruction or a
+/// simple superregister reference.
+static SDValue Insert128BitVector(SDValue Result,
+                                  SDValue Vec,
+                                  SDValue Idx,
+                                  SelectionDAG &DAG,
+                                  DebugLoc dl) {
+  if (isa(Idx)) {
+    EVT VT = Vec.getValueType();
+    assert(VT.getSizeInBits() == 128 && "Unexpected vector size!");
+
+    EVT ElVT = VT.getVectorElementType();
+
+    unsigned IdxVal = cast(Idx)->getZExtValue();
+
+    EVT ResultVT = Result.getValueType();
+
+    // Insert the relevant 128 bits.
+    unsigned ElemsPerChunk = 128 / ElVT.getSizeInBits();
+
+    // This is the index of the first element of the 128-bit chunk
+    // we want.
+    unsigned NormalizedIdxVal = (((IdxVal * ElVT.getSizeInBits()) / 128)
+                                 * ElemsPerChunk);
+
+    SDValue VecIdx = DAG.getConstant(NormalizedIdxVal, MVT::i32);
+
+    Result = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResultVT, Result, Vec,
+                         VecIdx);
+    return Result;
+  }
+
+  return SDValue();
+}
+
 static TargetLoweringObjectFile *createTLOF(X86TargetMachine &TM) {
   const X86Subtarget *Subtarget = &TM.getSubtarget();
   bool is64Bit = Subtarget->is64Bit();
@@ -4189,6 +4280,7 @@
 SDValue
 X86TargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const {
   DebugLoc dl = Op.getDebugLoc();
+
   // All zero's are handled with pxor in SSE2 and above, xorps in SSE1.
   // All one's are handled with pcmpeqd. In AVX, zero's are handled with
   // vpxor in 128-bit and xor{pd,ps} in 256-bit, but no 256 version of pcmpeqd
@@ -5918,7 +6010,14 @@
 SDValue
 X86TargetLowering::LowerEXTRACT_SUBVECTOR(SDValue Op, SelectionDAG &DAG) const {
   if (Subtarget->hasAVX()) {
-    // TODO
+    DebugLoc dl = Op.getNode()->getDebugLoc();
+    SDValue Vec = Op.getNode()->getOperand(0);
+    SDValue Idx = Op.getNode()->getOperand(1);
+
+    if (Op.getNode()->getValueType(0).getSizeInBits() == 128
+        && Vec.getNode()->getValueType(0).getSizeInBits() == 256) {
+        return Extract128BitVector(Vec, Idx, DAG, dl);
+    }
   }
   return SDValue();
 }
@@ -5936,7 +6035,7 @@
 
     if (Op.getNode()->getValueType(0).getSizeInBits() == 256
         && SubVec.getNode()->getValueType(0).getSizeInBits() == 128) {
-      // TODO
+      return Insert128BitVector(Vec, SubVec, Idx, DAG, dl);
     }
   }
   return SDValue();



From bruno.cardoso at gmail.com  Mon Feb  7 13:38:32 2011
From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes)
Date: Mon, 07 Feb 2011 19:38:32 -0000
Subject: [llvm-commits] [llvm] r125030 - in /llvm/trunk:
 include/llvm/Target/Target.td utils/TableGen/AsmMatcherEmitter.cpp
Message-ID: <20110207193832.B7F862A6C12C@llvm.org>

Author: bruno
Date: Mon Feb  7 13:38:32 2011
New Revision: 125030

URL: http://llvm.org/viewvc/llvm-project?rev=125030&view=rev
Log:
Implement support for custom target specific asm parsing of operands.
Motivation: Improve the parsing of not usual (different from registers or
immediates) operand forms.

This commit implements only the generic support. The ARM specific modifications
will come next.

A table like the one below is autogenerated for every instruction
containing a 'ParserMethod' in its AsmOperandClass

static const OperandMatchEntry OperandMatchTable[20] = {
 /* Mnemonic, Operand List Mask, Operand Class, Features */
 { "cdp", 29 /* 0, 2, 3, 4 */, MCK_Coproc, Feature_IsThumb|Feature_HasV6 },
 { "cdp", 58 /* 1, 3, 4, 5 */, MCK_Coproc, Feature_IsARM },

A matcher function very similar (but lot more naive) to
MatchInstructionImpl scans the table. After the mnemonic match, the
features are checked and if the "to be parsed" operand index is
present in the mask, there's a real match. Then, a switch like the one
below dispatch the parsing to the custom method provided in
'ParseMethod':

 case MCK_Coproc:
   return TryParseCoprocessorOperandName(Operands);



Modified:
    llvm/trunk/include/llvm/Target/Target.td
    llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp

Modified: llvm/trunk/include/llvm/Target/Target.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/Target.td?rev=125030&r1=125029&r2=125030&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/Target.td (original)
+++ llvm/trunk/include/llvm/Target/Target.td Mon Feb  7 13:38:32 2011
@@ -341,6 +341,12 @@
   /// signature should be:
   ///   void addFooOperands(MCInst &Inst, unsigned N) const;
   string RenderMethod = ?;
+
+  /// The name of the method on the target specific operand to call to custom
+  /// handle the operand parsing. This is useful when the operands do not relate
+  /// to immediates or registers and are very instruction specific (as flags to
+  /// set in a processor register, coprocessor number, ...).
+  string ParserMethod = ?;
 }
 
 def ImmAsmOperand : AsmOperandClass {

Modified: llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp?rev=125030&r1=125029&r2=125030&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp Mon Feb  7 13:38:32 2011
@@ -8,7 +8,11 @@
 //===----------------------------------------------------------------------===//
 //
 // This tablegen backend emits a target specifier matcher for converting parsed
-// assembly operands in the MCInst structures.
+// assembly operands in the MCInst structures. It also emits a matcher for
+// custom operand parsing.
+//
+// Converting assembly operands into MCInst structures
+// ---------------------------------------------------
 //
 // The input to the target specific matcher is a list of literal tokens and
 // operands. The target specific parser should generally eliminate any syntax
@@ -68,6 +72,28 @@
 //      instruction (we currently ignore cases where this isn't true, whee!!!),
 //      which we can emit a simple matcher for.
 //
+// Custom Operand Parsing
+// ----------------------
+//
+//  Some targets need a custom way to parse operands, some specific instructions
+//  can contain arguments that can represent processor flags and other kinds of
+//  identifiers that need to be mapped to specific valeus in the final encoded
+//  instructions. The target specific custom operand parsing works in the
+//  following way:
+//
+//   1. A operand match table is built, each entry contains a mnemonic, an
+//      operand class, a mask for all operand positions for that same
+//      class/mnemonic and target features to be checked while trying to match.
+//
+//   2. The operand matcher will try every possible entry with the same
+//      mnemonic and will check if the target feature for this mnemonic also
+//      matches. After that, if the operand to be matched has its index
+//      present in the mask, a successfull match occurs. Otherwise, fallback
+//      to the regular operand parsing.
+//
+//   3. For a match success, each operand class that has a 'ParserMethod'
+//      becomes part of a switch from where the custom method is called.
+//
 //===----------------------------------------------------------------------===//
 
 #include "AsmMatcherEmitter.h"
@@ -141,6 +167,10 @@
   /// MCInst; this is not valid for Token or register kinds.
   std::string RenderMethod;
 
+  /// ParserMethod - The name of the operand method to do a target specific
+  /// parsing on the operand.
+  std::string ParserMethod;
+
   /// For register classes, the records for all the registers in this class.
   std::set Registers;
 
@@ -499,6 +529,22 @@
   }
 };
 
+struct OperandMatchEntry {
+  unsigned OperandMask;
+  MatchableInfo* MI;
+  ClassInfo *CI;
+
+  static OperandMatchEntry Create(MatchableInfo* mi, ClassInfo *ci,
+                                  unsigned opMask) {
+    OperandMatchEntry X;
+    X.OperandMask = opMask;
+    X.CI = ci;
+    X.MI = mi;
+    return X;
+  }
+};
+
+
 class AsmMatcherInfo {
 public:
   /// Tracked Records
@@ -519,6 +565,9 @@
   /// The information on the matchables to match.
   std::vector Matchables;
 
+  /// Info for custom matching operands by user defined methods.
+  std::vector OperandMatchInfo;
+
   /// Map of Register records to their class information.
   std::map RegisterClasses;
 
@@ -564,6 +613,10 @@
   /// BuildInfo - Construct the various tables used during matching.
   void BuildInfo();
 
+  /// BuildOperandMatchInfo - Build the necessary information to handle user
+  /// defined operand parsing methods.
+  void BuildOperandMatchInfo();
+
   /// getSubtargetFeature - Lookup or create the subtarget feature info for the
   /// given operand.
   SubtargetFeatureInfo *getSubtargetFeature(Record *Def) const {
@@ -803,6 +856,7 @@
     Entry->ValueName = Token;
     Entry->PredicateMethod = "";
     Entry->RenderMethod = "";
+    Entry->ParserMethod = "";
     Classes.push_back(Entry);
   }
 
@@ -1003,6 +1057,11 @@
       CI->RenderMethod = "add" + CI->ClassName + "Operands";
     }
 
+    // Get the parse method name or leave it as empty.
+    Init *PRMName = (*it)->getValueInit("ParserMethod");
+    if (StringInit *SI = dynamic_cast(PRMName))
+      CI->ParserMethod = SI->getValue();
+
     AsmOperandClasses[*it] = CI;
     Classes.push_back(CI);
   }
@@ -1015,6 +1074,40 @@
     RegisterPrefix(AsmParser->getValueAsString("RegisterPrefix")) {
 }
 
+/// BuildOperandMatchInfo - Build the necessary information to handle user
+/// defined operand parsing methods.
+void AsmMatcherInfo::BuildOperandMatchInfo() {
+
+  /// Map containing a mask with all operands indicies that can be found for
+  /// that class inside a instruction.
+  std::map OpClassMask;
+
+  for (std::vector::const_iterator it =
+       Matchables.begin(), ie = Matchables.end();
+       it != ie; ++it) {
+    MatchableInfo &II = **it;
+    OpClassMask.clear();
+
+    // Keep track of all operands of this instructions which belong to the
+    // same class.
+    for (unsigned i = 0, e = II.AsmOperands.size(); i != e; ++i) {
+      MatchableInfo::AsmOperand &Op = II.AsmOperands[i];
+      if (Op.Class->ParserMethod.empty())
+        continue;
+      unsigned &OperandMask = OpClassMask[Op.Class];
+      OperandMask |= (1 << i);
+    }
+
+    // Generate operand match info for each mnemonic/operand class pair.
+    for (std::map::iterator iit = OpClassMask.begin(),
+         iie = OpClassMask.end(); iit != iie; ++iit) {
+      unsigned OpMask = iit->second;
+      ClassInfo *CI = iit->first;
+      OperandMatchInfo.push_back(OperandMatchEntry::Create(&II, CI, OpMask));
+    }
+  }
+}
+
 void AsmMatcherInfo::BuildInfo() {
   // Build information about all of the AssemblerPredicates.
   std::vector AllPredicates =
@@ -1859,6 +1952,155 @@
   return true;
 }
 
+static void EmitCustomOperandParsing(raw_ostream &OS, CodeGenTarget &Target,
+                              const AsmMatcherInfo &Info, StringRef ClassName) {
+  // Emit the static custom operand parsing table;
+  OS << "namespace {\n";
+  OS << "  struct OperandMatchEntry {\n";
+  OS << "    const char *Mnemonic;\n";
+  OS << "    unsigned OperandMask;\n";
+  OS << "    MatchClassKind Class;\n";
+  OS << "    unsigned RequiredFeatures;\n";
+  OS << "  };\n\n";
+
+  OS << "  // Predicate for searching for an opcode.\n";
+  OS << "  struct LessOpcodeOperand {\n";
+  OS << "    bool operator()(const OperandMatchEntry &LHS, StringRef RHS) {\n";
+  OS << "      return StringRef(LHS.Mnemonic) < RHS;\n";
+  OS << "    }\n";
+  OS << "    bool operator()(StringRef LHS, const OperandMatchEntry &RHS) {\n";
+  OS << "      return LHS < StringRef(RHS.Mnemonic);\n";
+  OS << "    }\n";
+  OS << "    bool operator()(const OperandMatchEntry &LHS,";
+  OS << " const OperandMatchEntry &RHS) {\n";
+  OS << "      return StringRef(LHS.Mnemonic) < StringRef(RHS.Mnemonic);\n";
+  OS << "    }\n";
+  OS << "  };\n";
+
+  OS << "} // end anonymous namespace.\n\n";
+
+  OS << "static const OperandMatchEntry OperandMatchTable["
+     << Info.OperandMatchInfo.size() << "] = {\n";
+
+  OS << "  /* Mnemonic, Operand List Mask, Operand Class, Features */\n";
+  for (std::vector::const_iterator it =
+       Info.OperandMatchInfo.begin(), ie = Info.OperandMatchInfo.end();
+       it != ie; ++it) {
+    const OperandMatchEntry &OMI = *it;
+    const MatchableInfo &II = *OMI.MI;
+
+    OS << "  { \"" << II.Mnemonic << "\""
+       << ", " << OMI.OperandMask;
+
+    OS << " /* ";
+    bool printComma = false;
+    for (int i = 0, e = 31; i !=e; ++i)
+      if (OMI.OperandMask & (1 << i)) {
+        if (printComma)
+          OS << ", ";
+        OS << i;
+        printComma = true;
+      }
+    OS << " */";
+
+    OS << ", " << OMI.CI->Name
+       << ", ";
+
+    // Write the required features mask.
+    if (!II.RequiredFeatures.empty()) {
+      for (unsigned i = 0, e = II.RequiredFeatures.size(); i != e; ++i) {
+        if (i) OS << "|";
+        OS << II.RequiredFeatures[i]->getEnumName();
+      }
+    } else
+      OS << "0";
+    OS << " },\n";
+  }
+  OS << "};\n\n";
+
+  // Emit the operand class switch to call the correct custom parser for
+  // the found operand class.
+  OS << "bool " << Target.getName() << ClassName << "::\n"
+     << "TryCustomParseOperand(SmallVectorImpl"
+     << " &Operands,\n                      unsigned MCK) {\n\n"
+     << "  switch(MCK) {\n";
+
+  for (std::vector::const_iterator it = Info.Classes.begin(),
+       ie = Info.Classes.end(); it != ie; ++it) {
+    ClassInfo *CI = *it;
+    if (CI->ParserMethod.empty())
+      continue;
+    OS << "  case " << CI->Name << ":\n"
+       << "    return " << CI->ParserMethod << "(Operands);\n";
+  }
+
+  OS << "  default:\n";
+  OS << "    return true;\n";
+  OS << "  }\n";
+  OS << "  return true;\n";
+  OS << "}\n\n";
+
+  // Emit the static custom operand parser. This code is very similar with
+  // the other matcher. Also use MatchResultTy here just in case we go for
+  // a better error handling.
+  OS << Target.getName() << ClassName << "::MatchResultTy "
+     << Target.getName() << ClassName << "::\n"
+     << "MatchOperandParserImpl(SmallVectorImpl"
+     << " &Operands,\n                       StringRef Mnemonic) {\n";
+
+  // Emit code to get the available features.
+  OS << "  // Get the current feature set.\n";
+  OS << "  unsigned AvailableFeatures = getAvailableFeatures();\n\n";
+
+  OS << "  // Get the next operand index.\n";
+  OS << "  unsigned NextOpNum = Operands.size()-1;\n";
+
+  OS << "  // Some state to try to produce better error messages.\n";
+  OS << "  bool HadMatchOtherThanFeatures = false;\n\n";
+
+  // Emit code to search the table.
+  OS << "  // Search the table.\n";
+  OS << "  std::pair";
+  OS << " MnemonicRange =\n";
+  OS << "    std::equal_range(OperandMatchTable, OperandMatchTable+"
+     << Info.OperandMatchInfo.size() << ", Mnemonic,\n"
+     << "                     LessOpcodeOperand());\n\n";
+
+  OS << "  // Return a more specific error code if no mnemonics match.\n";
+  OS << "  if (MnemonicRange.first == MnemonicRange.second)\n";
+  OS << "    return Match_MnemonicFail;\n\n";
+
+  OS << "  for (const OperandMatchEntry *it = MnemonicRange.first,\n"
+     << "       *ie = MnemonicRange.second; it != ie; ++it) {\n";
+
+  OS << "    // equal_range guarantees that instruction mnemonic matches.\n";
+  OS << "    assert(Mnemonic == it->Mnemonic);\n\n";
+
+  // Emit check that the required features are available.
+  OS << "    // check if the available features match\n";
+  OS << "    if ((AvailableFeatures & it->RequiredFeatures) "
+     << "!= it->RequiredFeatures) {\n";
+  OS << "      HadMatchOtherThanFeatures = true;\n";
+  OS << "      continue;\n";
+  OS << "    }\n\n";
+
+  // Emit check to ensure the operand number matches.
+  OS << "    // check if the operand in question has a custom parser.\n";
+  OS << "    if (!(it->OperandMask & (1 << NextOpNum)))\n";
+  OS << "      continue;\n\n";
+
+  // Emit call to the custom parser method
+  OS << "    // call custom parse method to handle the operand\n";
+  OS << "    if (!TryCustomParseOperand(Operands, it->Class))\n";
+  OS << "      return Match_Success;\n";
+  OS << "  }\n\n";
+
+  OS << "  // Okay, we had no match.  Try to return a useful error code.\n";
+  OS << "  if (HadMatchOtherThanFeatures) return Match_MissingFeature;\n";
+  OS << "  return Match_InvalidOperand;\n";
+  OS << "}\n\n";
+}
+
 void AsmMatcherEmitter::run(raw_ostream &OS) {
   CodeGenTarget Target(Records);
   Record *AsmParser = Target.getAsmParser();
@@ -1904,6 +2146,9 @@
              << " ambiguous matchables!\n";
   });
 
+  // Compute the information on the custom operand parsing.
+  Info.BuildOperandMatchInfo();
+
   // Write the output.
 
   EmitSourceFileHeader("Assembly Matcher Source Fragment", OS);
@@ -1929,7 +2174,18 @@
   OS << "  bool MnemonicIsValid(StringRef Mnemonic);\n";
   OS << "  MatchResultTy MatchInstructionImpl(\n";
   OS << "    const SmallVectorImpl &Operands,\n";
-  OS << "    MCInst &Inst, unsigned &ErrorInfo);\n\n";
+  OS << "    MCInst &Inst, unsigned &ErrorInfo);\n";
+
+  if (Info.OperandMatchInfo.size()) {
+    OS << "  MatchResultTy MatchOperandParserImpl(\n";
+    OS << "    SmallVectorImpl &Operands,\n";
+    OS << "    StringRef Mnemonic);\n";
+
+    OS << "  bool TryCustomParseOperand(\n";
+    OS << "    SmallVectorImpl &Operands,\n";
+    OS << "    unsigned MCK);\n\n";
+  }
+
   OS << "#endif // GET_ASSEMBLER_HEADER_INFO\n\n";
 
   OS << "\n#ifdef GET_REGISTER_MATCHER\n";
@@ -1994,7 +2250,7 @@
   OS << "    unsigned RequiredFeatures;\n";
   OS << "  };\n\n";
 
-  OS << "// Predicate for searching for an opcode.\n";
+  OS << "  // Predicate for searching for an opcode.\n";
   OS << "  struct LessOpcode {\n";
   OS << "    bool operator()(const MatchEntry &LHS, StringRef RHS) {\n";
   OS << "      return StringRef(LHS.Mnemonic) < RHS;\n";
@@ -2164,5 +2420,8 @@
   OS << "  return Match_InvalidOperand;\n";
   OS << "}\n\n";
 
+  if (Info.OperandMatchInfo.size())
+    EmitCustomOperandParsing(OS, Target, Info, ClassName);
+
   OS << "#endif // GET_MATCHER_IMPLEMENTATION\n\n";
 }



From sabre at nondot.org  Mon Feb  7 14:03:14 2011
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 07 Feb 2011 20:03:14 -0000
Subject: [llvm-commits] [llvm] r125047 - /llvm/trunk/lib/VMCore/Constants.cpp
Message-ID: <20110207200314.8B5802A6C12C@llvm.org>

Author: lattner
Date: Mon Feb  7 14:03:14 2011
New Revision: 125047

URL: http://llvm.org/viewvc/llvm-project?rev=125047&view=rev
Log:
fix comment change.

Modified:
    llvm/trunk/lib/VMCore/Constants.cpp

Modified: llvm/trunk/lib/VMCore/Constants.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Constants.cpp?rev=125047&r1=125046&r2=125047&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/Constants.cpp (original)
+++ llvm/trunk/lib/VMCore/Constants.cpp Mon Feb  7 14:03:14 2011
@@ -7,7 +7,7 @@
 //
 //===----------------------------------------------------------------------===//
 //
-// This file implements the Constant *classes.
+// This file implements the Constant* classes.
 //
 //===----------------------------------------------------------------------===//
 



From fvbommel at gmail.com  Mon Feb  7 14:12:03 2011
From: fvbommel at gmail.com (Frits van Bommel)
Date: Mon, 7 Feb 2011 21:12:03 +0100
Subject: [llvm-commits] [Review request] Have Correlated Value Propagation
	handle instruction operands.
Message-ID: 

This patch teaches -correlated-propagation to check whether LVI knows
instruction operands to be constant, and if so to replace them. It
also adds a call to SimplifyInstruction afterwards so that the special
handling of some instructions (select, load, store) is no longer
needed.

This fixes the -correlated-propagation problem mentioned in comment 1
of PR 9004[1] and is an alternative implementation of "A small pass to
constant fold branch conditions in destination blocks"[2] which
integrates with the existing pass as Duncan suggested.
Since it leverages LVI, this also handles the 'if (x == 0) use(x)'
case mentioned in that post as well as the 'x > 10' followed by 'x >
5' case I mentioned in a follow-up (and doesn't need a domtree).

It passes 'make check-all'.


[1]: http://llvm.org/bugs/show_bug.cgi?id=9004
[2]: http://lists.cs.uiuc.edu/pipermail/llvmdev/2011-February/037884.html
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From jasonwkim at google.com  Mon Feb  7 14:39:21 2011
From: jasonwkim at google.com (Jason Kim)
Date: Mon, 7 Feb 2011 12:39:21 -0800
Subject: [llvm-commits] [PATCH] s/CORTEX-A8/cortex-a8/ in
	ARMAsmPrinter.cpp
In-Reply-To: 
References: 
	
	
Message-ID: 

I just committed a likely fix.
Thank you Edmund.
-jason

On Mon, Feb 7, 2011 at 8:59 AM, Edmund Grimley-Evans
 wrote:
> Jason Kim:
>
>> Gosh darn it, at least one version likes upper case in the
>> .ARM.attributes. for ELF.o
>> I guess we can put in lower case in .s, and upper case in .o?
>
> That seems to be what the CodeSourcery tools do. I tested a more recent version, too.
> --
> IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. ?Thank you.
>


From baldrick at free.fr  Mon Feb  7 14:56:27 2011
From: baldrick at free.fr (Duncan Sands)
Date: Mon, 07 Feb 2011 21:56:27 +0100
Subject: [llvm-commits] [llvm] r125006 - in /llvm/trunk:
 docs/LangRef.html include/llvm/Constants.h include/llvm/Operator.h
 lib/AsmParser/LLParser.cpp lib/Bitcode/Reader/BitcodeReader.cpp
 lib/VMCore/Constants.cpp test/Assembler/2003-05-21-MalformedShiftCrash.ll
 test/Assembler/flags.ll
In-Reply-To: <20110207164022.3F67C2A6C12D@llvm.org>
References: <20110207164022.3F67C2A6C12D@llvm.org>
Message-ID: <4D505C7B.6090907@free.fr>

Hi Chris,

> @@ -3704,6 +3707,14 @@
>      vectors, each vector element ofop1  is shifted by the corresponding
>      shift amount inop2.

> > +

If thenuw keyword is present, then the shift produces a > +trap value if it shifts out any non-zero bits. If > + thensw keywrod is present, then the shift produces a keywrod -> keyword Ciao, Duncan. From bruno.cardoso at gmail.com Mon Feb 7 15:41:26 2011 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Mon, 07 Feb 2011 21:41:26 -0000 Subject: [llvm-commits] [llvm] r125052 - in /llvm/trunk/lib/Target/ARM: ARMInstrInfo.td AsmParser/ARMAsmParser.cpp Message-ID: <20110207214126.135612A6C12C@llvm.org> Author: bruno Date: Mon Feb 7 15:41:25 2011 New Revision: 125052 URL: http://llvm.org/viewvc/llvm-project?rev=125052&view=rev Log: Remove the MCR asm parser hack and start using the custom target specific asm parsing of operands introduced in r125030. As a small note, besides using a more generic approach we can also have more descriptive output when debugging llvm-mc, example: mcr p7, #1, r5, c1, c1, #4 note: parsed instruction: ['mcr', , , 1, , , , 4] Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=125052&r1=125051&r2=125052&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Mon Feb 7 15:41:25 2011 @@ -588,12 +588,26 @@ let PrintMethod = "printNoHashImmediate"; } +def CoprocNumAsmOperand : AsmOperandClass { + let Name = "CoprocNum"; + let SuperClasses = []; + let ParserMethod = "ParseCoprocNumOperand"; +} + +def CoprocRegAsmOperand : AsmOperandClass { + let Name = "CoprocReg"; + let SuperClasses = []; + let ParserMethod = "ParseCoprocRegOperand"; +} + def p_imm : Operand { let PrintMethod = "printPImmediate"; + let ParserMatchClass = CoprocNumAsmOperand; } def c_imm : Operand { let PrintMethod = "printCImmediate"; + let ParserMatchClass = CoprocRegAsmOperand; } //===----------------------------------------------------------------------===// Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp?rev=125052&r1=125051&r2=125052&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp (original) +++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Mon Feb 7 15:41:25 2011 @@ -54,11 +54,12 @@ int TryParseRegister(); virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc); - bool TryParseCoprocessorOperandName(SmallVectorImpl&); bool TryParseRegisterWithWriteBack(SmallVectorImpl &); + bool ParseCoprocNumOperand(SmallVectorImpl&); + bool ParseCoprocRegOperand(SmallVectorImpl&); bool ParseRegisterList(SmallVectorImpl &); bool ParseMemory(SmallVectorImpl &); - bool ParseOperand(SmallVectorImpl &, bool hasCoprocOp); + bool ParseOperand(SmallVectorImpl &, StringRef Mnemonic); bool ParsePrefix(ARMMCExpr::VariantKind &RefKind); const MCExpr *ApplyPrefixToExpr(const MCExpr *E, MCSymbolRefExpr::VariantKind Variant); @@ -115,6 +116,8 @@ enum KindTy { CondCode, CCOut, + CoprocNum, + CoprocReg, Immediate, Memory, Register, @@ -133,6 +136,10 @@ } CC; struct { + unsigned Val; + } Cop; + + struct { const char *Data; unsigned Length; } Tok; @@ -185,6 +192,10 @@ case SPRRegisterList: Registers = o.Registers; break; + case CoprocNum: + case CoprocReg: + Cop = o.Cop; + break; case Immediate: Imm = o.Imm; break; @@ -204,6 +215,11 @@ return CC.Val; } + unsigned getCoproc() const { + assert((Kind == CoprocNum || Kind == CoprocReg) && "Invalid access!"); + return Cop.Val; + } + StringRef getToken() const { assert(Kind == Token && "Invalid access!"); return StringRef(Tok.Data, Tok.Length); @@ -259,6 +275,8 @@ /// @} + bool isCoprocNum() const { return Kind == CoprocNum; } + bool isCoprocReg() const { return Kind == CoprocReg; } bool isCondCode() const { return Kind == CondCode; } bool isCCOut() const { return Kind == CCOut; } bool isImm() const { return Kind == Immediate; } @@ -314,6 +332,16 @@ Inst.addOperand(MCOperand::CreateReg(RegNum)); } + void addCoprocNumOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::CreateImm(getCoproc())); + } + + void addCoprocRegOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::CreateImm(getCoproc())); + } + void addCCOutOperands(MCInst &Inst, unsigned N) const { assert(N == 1 && "Invalid number of operands!"); Inst.addOperand(MCOperand::CreateReg(getReg())); @@ -391,6 +419,22 @@ return Op; } + static ARMOperand *CreateCoprocNum(unsigned CopVal, SMLoc S) { + ARMOperand *Op = new ARMOperand(CoprocNum); + Op->Cop.Val = CopVal; + Op->StartLoc = S; + Op->EndLoc = S; + return Op; + } + + static ARMOperand *CreateCoprocReg(unsigned CopVal, SMLoc S) { + ARMOperand *Op = new ARMOperand(CoprocReg); + Op->Cop.Val = CopVal; + Op->StartLoc = S; + Op->EndLoc = S; + return Op; + } + static ARMOperand *CreateCCOut(unsigned RegNum, SMLoc S) { ARMOperand *Op = new ARMOperand(CCOut); Op->Reg.RegNum = RegNum; @@ -492,6 +536,12 @@ case CCOut: OS << ""; break; + case CoprocNum: + OS << ""; + break; + case CoprocReg: + OS << ""; + break; case Immediate: getImm()->print(OS); break; @@ -609,13 +659,16 @@ return false; } -static int MatchCoprocessorOperandName(StringRef Name) { +/// MatchCoprocessorOperandName - Try to parse an coprocessor related +/// instruction with a symbolic operand name. Example: "p1", "p7", "c3", +/// "c5", ... +static int MatchCoprocessorOperandName(StringRef Name, char CoprocOp) { // Use the same layout as the tablegen'erated register name matcher. Ugly, // but efficient. switch (Name.size()) { default: break; case 2: - if (Name[0] != 'p' && Name[0] != 'c') + if (Name[0] != CoprocOp) return -1; switch (Name[1]) { default: return -1; @@ -632,7 +685,7 @@ } break; case 3: - if ((Name[0] != 'p' && Name[0] != 'c') || Name[1] != '1') + if (Name[0] != CoprocOp || Name[1] != '1') return -1; switch (Name[2]) { default: return -1; @@ -650,24 +703,39 @@ return -1; } -/// TryParseCoprocessorOperandName - Try to parse an coprocessor related -/// instruction with a symbolic operand name. The token must be an Identifier -/// when called, and if it is a coprocessor related operand name, the token is -/// eaten and the operand is added to the operand list. Example: operands like -/// "p1", "p7", "c3", "c5", ... +/// ParseCoprocNumOperand - Try to parse an coprocessor number operand. The +/// token must be an Identifier when called, and if it is a coprocessor +/// number, the token is eaten and the operand is added to the operand list. bool ARMAsmParser:: -TryParseCoprocessorOperandName(SmallVectorImpl &Operands) { +ParseCoprocNumOperand(SmallVectorImpl &Operands) { SMLoc S = Parser.getTok().getLoc(); const AsmToken &Tok = Parser.getTok(); assert(Tok.is(AsmToken::Identifier) && "Token is not an Identifier"); - int Num = MatchCoprocessorOperandName(Tok.getString()); + int Num = MatchCoprocessorOperandName(Tok.getString(), 'p'); if (Num == -1) return true; Parser.Lex(); // Eat identifier token. - Operands.push_back(ARMOperand::CreateImm( - MCConstantExpr::Create(Num, getContext()), S, Parser.getTok().getLoc())); + Operands.push_back(ARMOperand::CreateCoprocNum(Num, S)); + return false; +} + +/// ParseCoprocRegOperand - Try to parse an coprocessor register operand. The +/// token must be an Identifier when called, and if it is a coprocessor +/// number, the token is eaten and the operand is added to the operand list. +bool ARMAsmParser:: +ParseCoprocRegOperand(SmallVectorImpl &Operands) { + SMLoc S = Parser.getTok().getLoc(); + const AsmToken &Tok = Parser.getTok(); + assert(Tok.is(AsmToken::Identifier) && "Token is not an Identifier"); + + int Reg = MatchCoprocessorOperandName(Tok.getString(), 'c'); + if (Reg == -1) + return true; + + Parser.Lex(); // Eat identifier token. + Operands.push_back(ARMOperand::CreateCoprocReg(Reg, S)); return false; } @@ -974,8 +1042,15 @@ /// Parse a arm instruction operand. For now this parses the operand regardless /// of the mnemonic. bool ARMAsmParser::ParseOperand(SmallVectorImpl &Operands, - bool hasCoprocOp){ + StringRef Mnemonic) { SMLoc S, E; + + // Check if the current operand has a custom associated parser, if so, try to + // custom parse the operand, or fallback to the general approach. + MatchResultTy ResTy = MatchOperandParserImpl(Operands, Mnemonic); + if (ResTy == Match_Success) + return false; + switch (getLexer().getKind()) { default: Error(Parser.getTok().getLoc(), "unexpected token in operand"); @@ -983,8 +1058,6 @@ case AsmToken::Identifier: if (!TryParseRegisterWithWriteBack(Operands)) return false; - if (hasCoprocOp && !TryParseCoprocessorOperandName(Operands)) - return false; // Fall though for the Identifier case that is not a register or a // special name. @@ -1273,22 +1346,10 @@ Operands.push_back(ARMOperand::CreateToken(Head, NameLoc)); } - // Enable the parsing of instructions containing coprocessor related - // asm syntax, such as coprocessor names "p7, p15, ..." and coprocessor - // registers "c1, c3, ..." - // FIXME: we probably want AsmOperandClass and ParserMatchClass declarations - // in the .td file rather than hacking the ASMParser for every symbolic - // operand type. - bool hasCoprocOp = (Head == "mcr" || Head == "mcr2" || - Head == "mcrr" || Head == "mcrr2" || - Head == "mrc" || Head == "mrc2" || - Head == "mrrc" || Head == "mrrc2" || - Head == "cdp" || Head == "cdp2"); - // Read the remaining operands. if (getLexer().isNot(AsmToken::EndOfStatement)) { // Read the first operand. - if (ParseOperand(Operands, hasCoprocOp)) { + if (ParseOperand(Operands, Head)) { Parser.EatToEndOfStatement(); return true; } @@ -1297,7 +1358,7 @@ Parser.Lex(); // Eat the comma. // Parse and remember the operand. - if (ParseOperand(Operands, hasCoprocOp)) { + if (ParseOperand(Operands, Head)) { Parser.EatToEndOfStatement(); return true; } From dpatel at apple.com Mon Feb 7 15:58:52 2011 From: dpatel at apple.com (Devang Patel) Date: Mon, 07 Feb 2011 21:58:52 -0000 Subject: [llvm-commits] [llvm] r125054 - /llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Message-ID: <20110207215852.3EA0E2A6C12C@llvm.org> Author: dpatel Date: Mon Feb 7 15:58:52 2011 New Revision: 125054 URL: http://llvm.org/viewvc/llvm-project?rev=125054&view=rev Log: Remove comment about an argument that was removed couple of years ago. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=125054&r1=125053&r2=125054&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Mon Feb 7 15:58:52 2011 @@ -3879,7 +3879,6 @@ } /// getMergeValues - Create a MERGE_VALUES node from the given operands. -/// Allowed to return something different (and simpler) if Simplify is true. SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, DebugLoc dl) { if (NumOps == 1) From bruno.cardoso at gmail.com Mon Feb 7 16:09:15 2011 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Mon, 07 Feb 2011 22:09:15 -0000 Subject: [llvm-commits] [llvm] r125055 - in /llvm/trunk: lib/Target/ARM/ARMInstrFormats.td lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/AsmParser/ARMAsmParser.cpp test/MC/ARM/arm_instructions.s test/MC/ARM/thumb2.s Message-ID: <20110207220915.D4BF12A6C12C@llvm.org> Author: bruno Date: Mon Feb 7 16:09:15 2011 New Revision: 125055 URL: http://llvm.org/viewvc/llvm-project?rev=125055&view=rev Log: Add support for parsing dmb/dsb instructions Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td llvm/trunk/lib/Target/ARM/ARMInstrInfo.td llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp llvm/trunk/test/MC/ARM/arm_instructions.s llvm/trunk/test/MC/ARM/thumb2.s Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=125055&r1=125054&r2=125055&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Mon Feb 7 16:09:15 2011 @@ -149,6 +149,12 @@ let SuperClasses = []; } +def MemBarrierOptOperand : AsmOperandClass { + let Name = "MemBarrierOpt"; + let SuperClasses = []; + let ParserMethod = "ParseMemBarrierOptOperand"; +} + // ARM Predicate operand. Default to 14 = always (AL). Second part is CC // register whose default is 0 (no register). def pred : PredicateOperand { let PrintMethod = "printMemBOption"; + let ParserMatchClass = MemBarrierOptOperand; } // memory barriers protect the atomic sequences Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp?rev=125055&r1=125054&r2=125055&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp (original) +++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Mon Feb 7 16:09:15 2011 @@ -58,6 +58,7 @@ bool ParseCoprocNumOperand(SmallVectorImpl&); bool ParseCoprocRegOperand(SmallVectorImpl&); bool ParseRegisterList(SmallVectorImpl &); + bool ParseMemBarrierOptOperand(SmallVectorImpl &); bool ParseMemory(SmallVectorImpl &); bool ParseOperand(SmallVectorImpl &, StringRef Mnemonic); bool ParsePrefix(ARMMCExpr::VariantKind &RefKind); @@ -119,6 +120,7 @@ CoprocNum, CoprocReg, Immediate, + MemBarrierOpt, Memory, Register, RegisterList, @@ -136,6 +138,10 @@ } CC; struct { + ARM_MB::MemBOpt Val; + } MBOpt; + + struct { unsigned Val; } Cop; @@ -199,6 +205,9 @@ case Immediate: Imm = o.Imm; break; + case MemBarrierOpt: + MBOpt = o.MBOpt; + break; case Memory: Mem = o.Mem; break; @@ -241,6 +250,11 @@ return Imm.Val; } + ARM_MB::MemBOpt getMemBarrierOpt() const { + assert(Kind == MemBarrierOpt && "Invalid access!"); + return MBOpt.Val; + } + /// @name Memory Operand Accessors /// @{ @@ -285,6 +299,7 @@ bool isDPRRegList() const { return Kind == DPRRegisterList; } bool isSPRRegList() const { return Kind == SPRRegisterList; } bool isToken() const { return Kind == Token; } + bool isMemBarrierOpt() const { return Kind == MemBarrierOpt; } bool isMemory() const { return Kind == Memory; } bool isMemMode5() const { if (!isMemory() || getMemOffsetIsReg() || getMemWriteback() || @@ -373,6 +388,11 @@ addExpr(Inst, getImm()); } + void addMemBarrierOptOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::CreateImm(unsigned(getMemBarrierOpt()))); + } + void addMemMode5Operands(MCInst &Inst, unsigned N) const { assert(N == 2 && isMemMode5() && "Invalid number of operands!"); @@ -524,6 +544,14 @@ Op->EndLoc = E; return Op; } + + static ARMOperand *CreateMemBarrierOpt(ARM_MB::MemBOpt Opt, SMLoc S) { + ARMOperand *Op = new ARMOperand(MemBarrierOpt); + Op->MBOpt.Val = Opt; + Op->StartLoc = S; + Op->EndLoc = S; + return Op; + } }; } // end anonymous namespace. @@ -545,6 +573,9 @@ case Immediate: getImm()->print(OS); break; + case MemBarrierOpt: + OS << ""; + break; case Memory: OS << " &Operands) { + SMLoc S = Parser.getTok().getLoc(); + const AsmToken &Tok = Parser.getTok(); + assert(Tok.is(AsmToken::Identifier) && "Token is not an Identifier"); + StringRef OptStr = Tok.getString(); + + unsigned Opt = StringSwitch(OptStr.slice(0, OptStr.size())) + .Case("sy", ARM_MB::SY) + .Case("st", ARM_MB::ST) + .Case("ish", ARM_MB::ISH) + .Case("ishst", ARM_MB::ISHST) + .Case("nsh", ARM_MB::NSH) + .Case("nshst", ARM_MB::NSHST) + .Case("osh", ARM_MB::OSH) + .Case("oshst", ARM_MB::OSHST) + .Default(~0U); + + if (Opt == ~0U) + return true; + + Parser.Lex(); // Eat identifier token. + Operands.push_back(ARMOperand::CreateMemBarrierOpt((ARM_MB::MemBOpt)Opt, S)); + return false; +} + /// Parse an ARM memory expression, return false if successful else return true /// or an error. The first token must be a '[' when called. /// Modified: llvm/trunk/test/MC/ARM/arm_instructions.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/arm_instructions.s?rev=125055&r1=125054&r2=125055&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/arm_instructions.s (original) +++ llvm/trunk/test/MC/ARM/arm_instructions.s Mon Feb 7 16:09:15 2011 @@ -188,3 +188,52 @@ @ CHECK: nop @ encoding: [0x00,0xf0,0x20,0xe3] nop + +@ CHECK: dmb sy @ encoding: [0x5f,0xf0,0x7f,0xf5] + dmb sy + +@ CHECK: dmb st @ encoding: [0x5e,0xf0,0x7f,0xf5] + dmb st + +@ CHECK: dmb ish @ encoding: [0x5b,0xf0,0x7f,0xf5] + dmb ish + +@ CHECK: dmb ishst @ encoding: [0x5a,0xf0,0x7f,0xf5] + dmb ishst + +@ CHECK: dmb nsh @ encoding: [0x57,0xf0,0x7f,0xf5] + dmb nsh + +@ CHECK: dmb nshst @ encoding: [0x56,0xf0,0x7f,0xf5] + dmb nshst + +@ CHECK: dmb osh @ encoding: [0x53,0xf0,0x7f,0xf5] + dmb osh + +@ CHECK: dmb oshst @ encoding: [0x52,0xf0,0x7f,0xf5] + dmb oshst + +@ CHECK: dsb sy @ encoding: [0x4f,0xf0,0x7f,0xf5] + dsb sy + +@ CHECK: dsb st @ encoding: [0x4e,0xf0,0x7f,0xf5] + dsb st + +@ CHECK: dsb ish @ encoding: [0x4b,0xf0,0x7f,0xf5] + dsb ish + +@ CHECK: dsb ishst @ encoding: [0x4a,0xf0,0x7f,0xf5] + dsb ishst + +@ CHECK: dsb nsh @ encoding: [0x47,0xf0,0x7f,0xf5] + dsb nsh + +@ CHECK: dsb nshst @ encoding: [0x46,0xf0,0x7f,0xf5] + dsb nshst + +@ CHECK: dsb osh @ encoding: [0x43,0xf0,0x7f,0xf5] + dsb osh + +@ CHECK: dsb oshst @ encoding: [0x42,0xf0,0x7f,0xf5] + dsb oshst + Modified: llvm/trunk/test/MC/ARM/thumb2.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/thumb2.s?rev=125055&r1=125054&r2=125055&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/thumb2.s (original) +++ llvm/trunk/test/MC/ARM/thumb2.s Mon Feb 7 16:09:15 2011 @@ -92,15 +92,6 @@ @ CHECK: pkhtb r0, r0, r1, asr #22 @ encoding: [0xa1,0x50,0xc0,0xea] pkhtb r0, r0, r1, asr #22 -@ CHECK: dmb st @ encoding: [0x5e,0x8f,0xbf,0xf3] - dmb st -@ CHECK: dmb sy @ encoding: [0x5f,0x8f,0xbf,0xf3] - dmb sy -@ CHECK: dmb ishst @ encoding: [0x5a,0x8f,0xbf,0xf3] - dmb ishst -@ CHECK: dmb ish @ encoding: [0x5b,0x8f,0xbf,0xf3] - dmb ish - @ CHECK: str.w r0, [r1, #4092] @ encoding: [0xfc,0x0f,0xc1,0xf8] str.w r0, [r1, #4092] @ CHECK: str r0, [r1, #-128] @ encoding: [0x80,0x0c,0x41,0xf8] @@ -227,3 +218,37 @@ @ CHECK: wfi.w @ encoding: [0xaf,0xf3,0x03,0x80] wfi.w +@ CHECK: dmb sy @ encoding: [0xbf,0xf3,0x5f,0x8f] + dmb sy +@ CHECK: dmb st @ encoding: [0xbf,0xf3,0x5e,0x8f] + dmb st +@ CHECK: dmb ish @ encoding: [0xbf,0xf3,0x5b,0x8f] + dmb ish +@ CHECK: dmb ishst @ encoding: [0xbf,0xf3,0x5a,0x8f] + dmb ishst +@ CHECK: dmb nsh @ encoding: [0xbf,0xf3,0x57,0x8f] + dmb nsh +@ CHECK: dmb nshst @ encoding: [0xbf,0xf3,0x56,0x8f] + dmb nshst +@ CHECK: dmb osh @ encoding: [0xbf,0xf3,0x53,0x8f] + dmb osh +@ CHECK: dmb oshst @ encoding: [0xbf,0xf3,0x52,0x8f] + dmb oshst + +@ CHECK: dsb sy @ encoding: [0xbf,0xf3,0x4f,0x8f] + dsb sy +@ CHECK: dsb st @ encoding: [0xbf,0xf3,0x4e,0x8f] + dsb st +@ CHECK: dsb ish @ encoding: [0xbf,0xf3,0x4b,0x8f] + dsb ish +@ CHECK: dsb ishst @ encoding: [0xbf,0xf3,0x4a,0x8f] + dsb ishst +@ CHECK: dsb nsh @ encoding: [0xbf,0xf3,0x47,0x8f] + dsb nsh +@ CHECK: dsb nshst @ encoding: [0xbf,0xf3,0x46,0x8f] + dsb nshst +@ CHECK: dsb osh @ encoding: [0xbf,0xf3,0x43,0x8f] + dsb osh +@ CHECK: dsb oshst @ encoding: [0xbf,0xf3,0x42,0x8f] + dsb oshst + From benny.kra at googlemail.com Mon Feb 7 16:37:28 2011 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Mon, 07 Feb 2011 22:37:28 -0000 Subject: [llvm-commits] [llvm] r125056 - in /llvm/trunk: lib/Transforms/Utils/SimplifyCFG.cpp test/Transforms/SimplifyCFG/switch-to-icmp.ll test/Transforms/SimplifyCFG/switch_create.ll test/Transforms/SimplifyCFG/switch_formation.dbg.ll Message-ID: <20110207223728.75F4E2A6C12C@llvm.org> Author: d0k Date: Mon Feb 7 16:37:28 2011 New Revision: 125056 URL: http://llvm.org/viewvc/llvm-project?rev=125056&view=rev Log: SimplifyCFG: Track the number of used icmps when turning a icmp chain into a switch. If we used only one icmp, don't turn it into a switch. Also prevent the switch-to-icmp transform from creating identity adds, noticed by Marius Wachtler. Modified: llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp llvm/trunk/test/Transforms/SimplifyCFG/switch-to-icmp.ll llvm/trunk/test/Transforms/SimplifyCFG/switch_create.ll llvm/trunk/test/Transforms/SimplifyCFG/switch_formation.dbg.ll Modified: llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp?rev=125056&r1=125055&r2=125056&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp Mon Feb 7 16:37:28 2011 @@ -305,7 +305,7 @@ /// Values vector. static Value * GatherConstantCompares(Value *V, std::vector &Vals, Value *&Extra, - const TargetData *TD, bool isEQ) { + const TargetData *TD, bool isEQ, unsigned &UsedICmps) { Instruction *I = dyn_cast(V); if (I == 0) return 0; @@ -313,6 +313,7 @@ if (ICmpInst *ICI = dyn_cast(I)) { if (ConstantInt *C = GetConstantInt(I->getOperand(1), TD)) { if (ICI->getPredicate() == (isEQ ? ICmpInst::ICMP_EQ:ICmpInst::ICMP_NE)) { + UsedICmps++; Vals.push_back(C); return I->getOperand(0); } @@ -335,6 +336,7 @@ for (APInt Tmp = Span.getLower(); Tmp != Span.getUpper(); ++Tmp) Vals.push_back(ConstantInt::get(V->getContext(), Tmp)); + UsedICmps++; return I->getOperand(0); } return 0; @@ -345,14 +347,17 @@ return 0; unsigned NumValsBeforeLHS = Vals.size(); + unsigned UsedICmpsBeforeLHS = UsedICmps; if (Value *LHS = GatherConstantCompares(I->getOperand(0), Vals, Extra, TD, - isEQ)) { + isEQ, UsedICmps)) { unsigned NumVals = Vals.size(); + unsigned UsedICmpsBeforeRHS = UsedICmps; if (Value *RHS = GatherConstantCompares(I->getOperand(1), Vals, Extra, TD, - isEQ)) { + isEQ, UsedICmps)) { if (LHS == RHS) return LHS; Vals.resize(NumVals); + UsedICmps = UsedICmpsBeforeRHS; } // The RHS of the or/and can't be folded in and we haven't used "Extra" yet, @@ -363,6 +368,7 @@ } Vals.resize(NumValsBeforeLHS); + UsedICmps = UsedICmpsBeforeLHS; return 0; } @@ -372,7 +378,7 @@ Value *OldExtra = Extra; Extra = I->getOperand(0); if (Value *RHS = GatherConstantCompares(I->getOperand(1), Vals, Extra, TD, - isEQ)) + isEQ, UsedICmps)) return RHS; assert(Vals.size() == NumValsBeforeLHS); Extra = OldExtra; @@ -1926,17 +1932,24 @@ std::vector Values; bool TrueWhenEqual = true; Value *ExtraCase = 0; + unsigned UsedICmps = 0; if (Cond->getOpcode() == Instruction::Or) { - CompVal = GatherConstantCompares(Cond, Values, ExtraCase, TD, true); + CompVal = GatherConstantCompares(Cond, Values, ExtraCase, TD, true, + UsedICmps); } else if (Cond->getOpcode() == Instruction::And) { - CompVal = GatherConstantCompares(Cond, Values, ExtraCase, TD, false); + CompVal = GatherConstantCompares(Cond, Values, ExtraCase, TD, false, + UsedICmps); TrueWhenEqual = false; } // If we didn't have a multiply compared value, fail. if (CompVal == 0) return false; + // Avoid turning single icmps into a switch. + if (UsedICmps <= 1) + return false; + // There might be duplicate constants in the list, which the switch // instruction can't handle, remove them now. array_pod_sort(Values.begin(), Values.end(), ConstantIntSortPredicate); @@ -2262,7 +2275,9 @@ Constant *Offset = ConstantExpr::getNeg(Cases.back()); Constant *NumCases = ConstantInt::get(Offset->getType(), SI->getNumCases()-1); - Value *Sub = BinaryOperator::CreateAdd(SI->getCondition(), Offset, "off", SI); + Value *Sub = SI->getCondition(); + if (!Offset->isNullValue()) + Sub = BinaryOperator::CreateAdd(Sub, Offset, Sub->getName()+".off", SI); Value *Cmp = new ICmpInst(SI, ICmpInst::ICMP_ULT, Sub, NumCases, "switch"); BranchInst::Create(SI->getSuccessor(1), SI->getDefaultDest(), Cmp, SI); Modified: llvm/trunk/test/Transforms/SimplifyCFG/switch-to-icmp.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/SimplifyCFG/switch-to-icmp.ll?rev=125056&r1=125055&r2=125056&view=diff ============================================================================== --- llvm/trunk/test/Transforms/SimplifyCFG/switch-to-icmp.ll (original) +++ llvm/trunk/test/Transforms/SimplifyCFG/switch-to-icmp.ll Mon Feb 7 16:37:28 2011 @@ -16,8 +16,8 @@ ret i1 %0 ; CHECK: @test1 -; CHECK: %off = add i32 %x, -1 -; CHECK: %switch = icmp ult i32 %off, 3 +; CHECK: %x.off = add i32 %x, -1 +; CHECK: %switch = icmp ult i32 %x.off, 3 } define zeroext i1 @test2(i32 %x) nounwind readnone ssp noredzone { @@ -35,6 +35,5 @@ ret i1 %0 ; CHECK: @test2 -; CHECK: %off = add i32 %x, 0 -; CHECK: %switch = icmp ult i32 %off, 2 +; CHECK: %switch = icmp ult i32 %x, 2 } Modified: llvm/trunk/test/Transforms/SimplifyCFG/switch_create.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/SimplifyCFG/switch_create.ll?rev=125056&r1=125055&r2=125056&view=diff ============================================================================== --- llvm/trunk/test/Transforms/SimplifyCFG/switch_create.ll (original) +++ llvm/trunk/test/Transforms/SimplifyCFG/switch_create.ll Mon Feb 7 16:37:28 2011 @@ -141,8 +141,8 @@ ret i1 %UnifiedRetVal ; CHECK: @test6 -; CHECK: %off = add i32 %tmp.2.i, -14 -; CHECK: %switch = icmp ult i32 %off, 6 +; CHECK: %tmp.2.i.off = add i32 %tmp.2.i, -14 +; CHECK: %switch = icmp ult i32 %tmp.2.i.off, 6 } define void @test7(i8 zeroext %c, i32 %x) nounwind ssp noredzone { @@ -441,8 +441,8 @@ define zeroext i1 @test16(i32 %x) nounwind { entry: ; CHECK: @test16 -; CHECK: %off = add i32 %x, -1 -; CHECK: %switch = icmp ult i32 %off, 3 +; CHECK: %x.off = add i32 %x, -1 +; CHECK: %switch = icmp ult i32 %x.off, 3 %cmp.i = icmp eq i32 %x, 1 br i1 %cmp.i, label %lor.end, label %lor.lhs.false @@ -458,3 +458,24 @@ %0 = phi i1 [ true, %lor.lhs.false ], [ true, %entry ], [ %cmp.i1, %lor.rhs ] ret i1 %0 } + +; Check that we don't turn an icmp into a switch where it's not useful. +define void @test17(i32 %x, i32 %y) { + %cmp = icmp ult i32 %x, 3 + %switch = icmp ult i32 %y, 2 + %or.cond775 = or i1 %cmp, %switch + br i1 %or.cond775, label %lor.lhs.false8, label %return + +lor.lhs.false8: + tail call void @foo1() + ret void + +return: + ret void + +; CHECK: @test17 +; CHECK-NOT: switch.early.test +; CHECK-NOT: switch i32 +; CHECK: ret void +} + Modified: llvm/trunk/test/Transforms/SimplifyCFG/switch_formation.dbg.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/SimplifyCFG/switch_formation.dbg.ll?rev=125056&r1=125055&r2=125056&view=diff ============================================================================== --- llvm/trunk/test/Transforms/SimplifyCFG/switch_formation.dbg.ll (original) +++ llvm/trunk/test/Transforms/SimplifyCFG/switch_formation.dbg.ll Mon Feb 7 16:37:28 2011 @@ -14,8 +14,8 @@ define i1 @t({ i32, i32 }* %I) { ; CHECK: @t -; CHECK: %off = add i32 %tmp.2.i, -14 -; CHECK: %switch = icmp ult i32 %off, 6 +; CHECK: %tmp.2.i.off = add i32 %tmp.2.i, -14 +; CHECK: %switch = icmp ult i32 %tmp.2.i.off, 6 entry: %tmp.1.i = getelementptr { i32, i32 }* %I, i64 0, i32 1 ; [#uses=1] %tmp.2.i = load i32* %tmp.1.i ; [#uses=6] From stoklund at 2pi.dk Mon Feb 7 18:03:05 2011 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Tue, 08 Feb 2011 00:03:05 -0000 Subject: [llvm-commits] [llvm] r125058 - in /llvm/trunk: include/llvm/CodeGen/LiveIntervalAnalysis.h lib/CodeGen/LiveIntervalAnalysis.cpp lib/CodeGen/SimpleRegisterCoalescing.cpp lib/CodeGen/SimpleRegisterCoalescing.h Message-ID: <20110208000305.B39962A6C12C@llvm.org> Author: stoklund Date: Mon Feb 7 18:03:05 2011 New Revision: 125058 URL: http://llvm.org/viewvc/llvm-project?rev=125058&view=rev Log: Add LiveIntervals::shrinkToUses(). After uses of a live range are removed, recompute the live range to only cover the remaining uses. This is necessary after rematerializing the value before some (but not all) uses. Modified: llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h Modified: llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h?rev=125058&r1=125057&r2=125058&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h (original) +++ llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h Mon Feb 7 18:03:05 2011 @@ -163,6 +163,12 @@ LiveRange addLiveRangeToEndOfBlock(unsigned reg, MachineInstr* startInst); + /// shrinkToUses - After removing some uses of a register, shrink its live + /// range to just the remaining uses. This method does not compute reaching + /// defs for new uses, and it doesn't remove dead defs. + /// Dead PHIDef values are marked as unused. + void shrinkToUses(LiveInterval *li); + // Interval removal void removeInterval(unsigned Reg) { Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=125058&r1=125057&r2=125058&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original) +++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Mon Feb 7 18:03:05 2011 @@ -742,6 +742,128 @@ return NewLI; } +/// shrinkToUses - After removing some uses of a register, shrink its live +/// range to just the remaining uses. This method does not compute reaching +/// defs for new uses, and it doesn't remove dead defs. +void LiveIntervals::shrinkToUses(LiveInterval *li) { + DEBUG(dbgs() << "Shrink: " << *li << '\n'); + assert(TargetRegisterInfo::isVirtualRegister(li->reg) + && "Can't only shrink physical registers"); + // Find all the values used, including PHI kills. + SmallVector, 16> WorkList; + + // Visit all instructions reading li->reg. + for (MachineRegisterInfo::reg_iterator I = mri_->reg_begin(li->reg); + MachineInstr *UseMI = I.skipInstruction();) { + if (UseMI->isDebugValue() || !UseMI->readsVirtualRegister(li->reg)) + continue; + SlotIndex Idx = getInstructionIndex(UseMI).getUseIndex(); + VNInfo *VNI = li->getVNInfoAt(Idx); + assert(VNI && "Live interval not live into reading instruction"); + if (VNI->def == Idx) { + // Special case: An early-clobber tied operand reads and writes the + // register one slot early. + Idx = Idx.getPrevSlot(); + VNI = li->getVNInfoAt(Idx); + assert(VNI && "Early-clobber tied value not available"); + } + WorkList.push_back(std::make_pair(Idx, VNI)); + } + + // Create a new live interval with only minimal live segments per def. + LiveInterval NewLI(li->reg, 0); + for (LiveInterval::vni_iterator I = li->vni_begin(), E = li->vni_end(); + I != E; ++I) { + VNInfo *VNI = *I; + if (VNI->isUnused()) + continue; + NewLI.addRange(LiveRange(VNI->def, VNI->def.getNextSlot(), VNI)); + } + + // Extend intervals to reach all uses in WorkList. + while (!WorkList.empty()) { + SlotIndex Idx = WorkList.back().first; + VNInfo *VNI = WorkList.back().second; + WorkList.pop_back(); + + // Extend the live range for VNI to be live at Idx. + LiveInterval::iterator I = NewLI.find(Idx); + + // Already got it? + if (I != NewLI.end() && I->start <= Idx) { + assert(I->valno == VNI && "Unexpected existing value number"); + continue; + } + + // Is there already a live range in the block containing Idx? + const MachineBasicBlock *MBB = getMBBFromIndex(Idx); + SlotIndex BlockStart = getMBBStartIdx(MBB); + DEBUG(dbgs() << "Shrink: Use val#" << VNI->id << " at " << Idx + << " in BB#" << MBB->getNumber() << '@' << BlockStart); + if (I != NewLI.begin() && (--I)->end > BlockStart) { + assert(I->valno == VNI && "Wrong reaching def"); + DEBUG(dbgs() << " extend [" << I->start << ';' << I->end << ")\n"); + // Is this the first use of a PHIDef in its defining block? + if (VNI->isPHIDef() && I->end == VNI->def.getNextSlot()) { + // The PHI is live, make sure the predecessors are live-out. + for (MachineBasicBlock::const_pred_iterator PI = MBB->pred_begin(), + PE = MBB->pred_end(); PI != PE; ++PI) { + SlotIndex Stop = getMBBEndIdx(*PI).getPrevSlot(); + VNInfo *PVNI = li->getVNInfoAt(Stop); + // A predecessor is not required to have a live-out value for a PHI. + if (PVNI) { + assert(PVNI->hasPHIKill() && "Missing hasPHIKill flag"); + WorkList.push_back(std::make_pair(Stop, PVNI)); + } + } + } + + // Extend the live range in the block to include Idx. + NewLI.addRange(LiveRange(I->end, Idx.getNextSlot(), VNI)); + continue; + } + + // VNI is live-in to MBB. + DEBUG(dbgs() << " live-in at " << BlockStart << '\n'); + NewLI.addRange(LiveRange(BlockStart, Idx.getNextSlot(), VNI)); + + // Make sure VNI is live-out from the predecessors. + for (MachineBasicBlock::const_pred_iterator PI = MBB->pred_begin(), + PE = MBB->pred_end(); PI != PE; ++PI) { + SlotIndex Stop = getMBBEndIdx(*PI).getPrevSlot(); + assert(li->getVNInfoAt(Stop) == VNI && "Wrong value out of predecessor"); + WorkList.push_back(std::make_pair(Stop, VNI)); + } + } + + // Handle dead values. + for (LiveInterval::vni_iterator I = li->vni_begin(), E = li->vni_end(); + I != E; ++I) { + VNInfo *VNI = *I; + if (VNI->isUnused()) + continue; + LiveInterval::iterator LII = NewLI.FindLiveRangeContaining(VNI->def); + assert(LII != NewLI.end() && "Missing live range for PHI"); + if (LII->end != VNI->def.getNextSlot()) + continue; + if (!VNI->isPHIDef()) { + // This is a dead PHI. Remove it. + VNI->setIsUnused(true); + NewLI.removeRange(*LII); + } else { + // This is a dead def. Make sure the instruction knows. + MachineInstr *MI = getInstructionFromIndex(VNI->def); + assert(MI && "No instruction defining live value"); + MI->addRegisterDead(li->reg, tri_); + } + } + + // Move the trimmed ranges back. + li->ranges.swap(NewLI.ranges); + DEBUG(dbgs() << "Shrink: " << *li << '\n'); +} + + //===----------------------------------------------------------------------===// // Register allocator hooks. // Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=125058&r1=125057&r2=125058&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original) +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Mon Feb 7 18:03:05 2011 @@ -587,6 +587,7 @@ /// ReMaterializeTrivialDef - If the source of a copy is defined by a trivial /// computation, replace the copy by rematerialize the definition. bool SimpleRegisterCoalescing::ReMaterializeTrivialDef(LiveInterval &SrcInt, + bool preserveSrcInt, unsigned DstReg, unsigned DstSubIdx, MachineInstr *CopyMI) { @@ -642,30 +643,12 @@ RemoveCopyFlag(DstReg, CopyMI); - // If copy kills the source register, find the last use and propagate - // kill. - bool checkForDeadDef = false; MachineBasicBlock *MBB = CopyMI->getParent(); - if (SrcLR->end == CopyIdx.getDefIndex()) - if (!TrimLiveIntervalToLastUse(CopyIdx, MBB, SrcInt, SrcLR)) { - checkForDeadDef = true; - } - MachineBasicBlock::iterator MII = llvm::next(MachineBasicBlock::iterator(CopyMI)); tii_->reMaterialize(*MBB, MII, DstReg, DstSubIdx, DefMI, *tri_); MachineInstr *NewMI = prior(MII); - if (checkForDeadDef) { - // PR4090 fix: Trim interval failed because there was no use of the - // source interval in this MBB. If the def is in this MBB too then we - // should mark it dead: - if (DefMI->getParent() == MBB) { - DefMI->addRegisterDead(SrcInt.reg, tri_); - SrcLR->end = SrcLR->start.getNextSlot(); - } - } - // CopyMI may have implicit operands, transfer them over to the newly // rematerialized instruction. And update implicit def interval valnos. for (unsigned i = CopyMI->getDesc().getNumOperands(), @@ -684,6 +667,11 @@ ReMatDefs.insert(DefMI); DEBUG(dbgs() << "Remat: " << *NewMI); ++NumReMats; + + // The source interval can become smaller because we removed a use. + if (preserveSrcInt) + li_->shrinkToUses(&SrcInt); + return true; } @@ -714,7 +702,7 @@ UseMI->getOperand(0).getReg() != SrcReg && UseMI->getOperand(0).getReg() != DstReg && !JoinedCopies.count(UseMI) && - ReMaterializeTrivialDef(li_->getInterval(SrcReg), + ReMaterializeTrivialDef(li_->getInterval(SrcReg), false, UseMI->getOperand(0).getReg(), 0, UseMI)) continue; } @@ -1056,7 +1044,7 @@ // Before giving up coalescing, if definition of source is defined by // trivial computation, try rematerializing it. if (!CP.isFlipped() && - ReMaterializeTrivialDef(JoinVInt, CP.getDstReg(), 0, CopyMI)) + ReMaterializeTrivialDef(JoinVInt, true, CP.getDstReg(), 0, CopyMI)) return true; ++numAborts; @@ -1076,7 +1064,7 @@ // If definition of source is defined by trivial computation, try // rematerializing it. if (!CP.isFlipped() && - ReMaterializeTrivialDef(li_->getInterval(CP.getSrcReg()), + ReMaterializeTrivialDef(li_->getInterval(CP.getSrcReg()), true, CP.getDstReg(), 0, CopyMI)) return true; Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h?rev=125058&r1=125057&r2=125058&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h (original) +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h Mon Feb 7 18:03:05 2011 @@ -143,8 +143,10 @@ /// ReMaterializeTrivialDef - If the source of a copy is defined by a trivial /// computation, replace the copy by rematerialize the definition. - bool ReMaterializeTrivialDef(LiveInterval &SrcInt, unsigned DstReg, - unsigned DstSubIdx, MachineInstr *CopyMI); + /// If PreserveSrcInt is true, make sure SrcInt is valid after the call. + bool ReMaterializeTrivialDef(LiveInterval &SrcInt, bool PreserveSrcInt, + unsigned DstReg, unsigned DstSubIdx, + MachineInstr *CopyMI); /// isWinToJoinCrossClass - Return true if it's profitable to coalesce /// two virtual registers from different register classes. From aggarwa4 at illinois.edu Mon Feb 7 18:21:44 2011 From: aggarwa4 at illinois.edu (Arushi Aggarwal) Date: Tue, 08 Feb 2011 00:21:44 -0000 Subject: [llvm-commits] [poolalloc] r125060 - /poolalloc/trunk/lib/DSA/StdLibPass.cpp Message-ID: <20110208002144.7A0592A6C12C@llvm.org> Author: aggarwa4 Date: Mon Feb 7 18:21:44 2011 New Revision: 125060 URL: http://llvm.org/viewvc/llvm-project?rev=125060&view=rev Log: Add support for a bunch of functions not handled earlier. Modified: poolalloc/trunk/lib/DSA/StdLibPass.cpp Modified: poolalloc/trunk/lib/DSA/StdLibPass.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/StdLibPass.cpp?rev=125060&r1=125059&r2=125060&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/StdLibPass.cpp (original) +++ poolalloc/trunk/lib/DSA/StdLibPass.cpp Mon Feb 7 18:21:44 2011 @@ -85,18 +85,27 @@ {"fstat", {NRET_YNARGS, NRET_NYARGS, NRET_NARGS, NRET_NARGS, false}}, {"lstat", {NRET_YNARGS, NRET_NYARGS, NRET_NARGS, NRET_NARGS, false}}, {"read", {NRET_YARGS, YRET_YARGS, NRET_NARGS, NRET_NARGS, false}}, + {"time", {NRET_YARGS, YRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, // printf not strictly true, %n could cause a write - {"printf", {NRET_YARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, - {"fprintf", {NRET_YARGS, NRET_YNARGS, NRET_NARGS, NRET_NARGS, false}}, - {"sprintf", {NRET_YARGS, NRET_YNARGS, NRET_NARGS, NRET_NARGS, false}}, - {"snprintf", {NRET_YARGS, NRET_YNARGS, NRET_NARGS, NRET_NARGS, false}}, - {"puts", {NRET_YARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, - {"putc", {NRET_NARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, - {"putchar", {NRET_NARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, - {"fputs", {NRET_YARGS, NRET_NYARGS, NRET_NARGS, NRET_NARGS, false}}, - {"fputc", {NRET_YARGS, NRET_NYARGS, NRET_NARGS, NRET_NARGS, false}}, - + {"printf", {NRET_YARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, + {"sscanf", {NRET_YARGS, YRET_NYARGS, NRET_NARGS, NRET_NARGS, false}}, + {"scanf", {NRET_YARGS, YRET_NYARGS, NRET_NARGS, NRET_NARGS, false}}, + {"fscanf", {NRET_YARGS, YRET_NYARGS, NRET_NARGS, NRET_NARGS, false}}, + {"fprintf", {NRET_YARGS, NRET_YNARGS, NRET_NARGS, NRET_NARGS, false}}, + {"sprintf", {NRET_YARGS, NRET_YNARGS, NRET_NARGS, NRET_NARGS, false}}, + {"snprintf", {NRET_YARGS, NRET_YNARGS, NRET_NARGS, NRET_NARGS, false}}, + {"puts", {NRET_YARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, + {"gets", {NRET_NARGS, YRET_YARGS, NRET_NARGS, YRET_YNARGS, false}}, + {"fgets", {NRET_NYARGS, YRET_YNARGS, NRET_NARGS, YRET_YNARGS, false}}, + {"getc", {NRET_YNARGS, YRET_YNARGS, NRET_NARGS, NRET_NARGS, false}}, + {"fgetc", {NRET_YNARGS, YRET_YNARGS, NRET_NARGS, NRET_NARGS, false}}, + {"_IO_getc", {NRET_NARGS, YRET_YARGS, NRET_NARGS, YRET_YNARGS, false}}, + {"putc", {NRET_NARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, + {"putchar", {NRET_NARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, + {"fputs", {NRET_YARGS, NRET_NYARGS, NRET_NARGS, NRET_NARGS, false}}, + {"fputc", {NRET_YARGS, NRET_NYARGS, NRET_NARGS, NRET_NARGS, false}}, + {"feof", {NRET_YARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, {"calloc", {NRET_NARGS, YRET_NARGS, YRET_NARGS, NRET_NARGS, false}}, {"malloc", {NRET_NARGS, YRET_NARGS, YRET_NARGS, NRET_NARGS, false}}, @@ -187,10 +196,8 @@ {"chdir", {false, false, false, true, false, false, false, false, false}}, {"mkdir", {false, false, false, true, false, false, false, false, false}}, {"rmdir", {false, false, false, true, false, false, false, false, false}}, - {"read", {false, false, false, false, true, false, false, false, false}}, {"pipe", {false, false, false, false, true, false, false, false, false}}, {"wait", {false, false, false, false, true, false, false, false, false}}, - {"time", {false, false, false, false, true, false, false, false, false}}, {"getrusage", {false, false, false, false, true, false, false, false, false}}, {"bcopy", {false, false, false, true, true, false, true, false, true}}, {"getcwd", { true, true, true, true, true, true, false, true, true}}, From aggarwa4 at illinois.edu Mon Feb 7 18:30:14 2011 From: aggarwa4 at illinois.edu (Arushi Aggarwal) Date: Tue, 08 Feb 2011 00:30:14 -0000 Subject: [llvm-commits] [poolalloc] r125063 - in /poolalloc/trunk: lib/DSA/DSGraph.cpp test/pa/clone/computeNodeMappingFail.ll Message-ID: <20110208003014.83DF02A6C12C@llvm.org> Author: aggarwa4 Date: Mon Feb 7 18:30:14 2011 New Revision: 125063 URL: http://llvm.org/viewvc/llvm-project?rev=125063&view=rev Log: reduced test case, that was triggering the assert in DSGraph.cpp. Removed the assert, and added an if condition to handle the example correctly. Added: poolalloc/trunk/test/pa/clone/computeNodeMappingFail.ll Modified: poolalloc/trunk/lib/DSA/DSGraph.cpp Modified: poolalloc/trunk/lib/DSA/DSGraph.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/DSGraph.cpp?rev=125063&r1=125062&r2=125063&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/DSGraph.cpp (original) +++ poolalloc/trunk/lib/DSA/DSGraph.cpp Mon Feb 7 18:30:14 2011 @@ -1364,11 +1364,12 @@ // Modify the entry in the node map so that the DSNode from the first // DSNodeHandle is mapped to the second DSNodeHandle. // - assert(((signed int)(NH2.getOffset()-NH1.getOffset())>=0) && " Underflow error "); + // FIXME: AA:I am not sure what the right mapping for the + // following case is. I believe we do not need to create any + // new mapping. + //assert(((signed int)(NH2.getOffset()-NH1.getOffset())>=0) && " Underflow error "); if(NH2.getOffset() >= NH1.getOffset()) { Entry.setTo(N2, NH2.getOffset()-NH1.getOffset()); - } else { - Entry.setTo(N2, NH1.getOffset()); } // Added: poolalloc/trunk/test/pa/clone/computeNodeMappingFail.ll URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/test/pa/clone/computeNodeMappingFail.ll?rev=125063&view=auto ============================================================================== --- poolalloc/trunk/test/pa/clone/computeNodeMappingFail.ll (added) +++ poolalloc/trunk/test/pa/clone/computeNodeMappingFail.ll Mon Feb 7 18:30:14 2011 @@ -0,0 +1,54 @@ +;This hits an assert in computeNodeMapping, when offset of merging node is greater than 1st node. +;RUN: paopt %s -paheur-AllButUnreachableFromMemory -poolalloc -o %t.bc |& grep "Pool allocating.*nodes!" +;RUN: llvm-dis %t.bc -o %t.ll + +; ModuleID = 'bugpoint-reduced-simplified.bc' +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-unknown-linux-gnu" + +%struct.RefObj = type { i8*, %struct.TypeToken } +%struct.TypeToken = type { i32, i16, i16 } + +define fastcc void @ImageTokenToRef(%struct.TypeToken* %Token, i32 %AttrNum, i32* %Status, i8** nocapture %RefObject) nounwind { +entry: + %RefTkn = alloca %struct.TypeToken, align 8 ; <%struct.TypeToken*> [#uses=1] + br i1 undef, label %bb13, label %bb + +bb: ; preds = %entry + unreachable + +bb13: ; preds = %entry + br i1 undef, label %bb14, label %bb33 + +bb14: ; preds = %bb13 + br i1 undef, label %bb15, label %bb21 + +bb15: ; preds = %bb14 + br i1 undef, label %bb17, label %KernelGetAttr.exit + +KernelGetAttr.exit: ; preds = %bb15 + unreachable + +bb17: ; preds = %bb15 + %tmp62 = call fastcc i32 @ImageGetObject(%struct.TypeToken* %RefTkn, i32* %Status, i8** %RefObject) nounwind ; [#uses=0] + unreachable + +bb21: ; preds = %bb14 + br i1 undef, label %bb23, label %KernelGetAttr.exit42 + +KernelGetAttr.exit42: ; preds = %bb21 + unreachable + +bb23: ; preds = %bb21 + %tmp72 = getelementptr inbounds %struct.RefObj* undef, i64 0, i32 1 ; <%struct.TypeToken*> [#uses=1] + %tmp85 = call fastcc i32 @ImageGetObject(%struct.TypeToken* %tmp72, i32* %Status, i8** %RefObject) nounwind ; [#uses=0] + unreachable + +bb33: ; preds = %bb13 + ret void +} + +define fastcc i32 @ImageGetObject(%struct.TypeToken* %Token, i32* %Status, i8** nocapture %This) nounwind { +entry: + unreachable +} From geek4civic at gmail.com Mon Feb 7 18:52:24 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Tue, 8 Feb 2011 09:52:24 +0900 Subject: [llvm-commits] _WIN32_WINNT as predefined (was Re: [Review request][Win64] Patches for Mingw-w64(and mingw64-clang)) In-Reply-To: References: Message-ID: Good morning, Anton and Eric. 2011/2/7 Anton Korobeynikov : >> In the case of mingw-w64, _WIN32_WINNT would be defined (as 0x0502) by >> system headers even if we did not provide predefined _WIN32_WINNT. In >> reverse, predefined _WIN32_WINNT might affect to system headers on >> mingw-w64. > If system headers have all necessary stuff defined why should be > bother defining them? Nope. It would be easier to suppress warnings, simply to undefine and redefine _WIN32_WINNT in Support/Windows/Windows.h. My aim is described below; > Could you please clarify what is the problem you're trying to solve > here? It might allow everyone better understand the needs, etc. My aim was to work with AC_CHECK_DECL, (not AC_CHECK_LIB). 1) It needs AC_DEFINE(s) to find some decls. (_WIN32_WINNT, MINGW_HAS_SECURE_API, &c) 2) AC_DEFINE(s) are written out to config.h.in. 3) I noticed config.h.in could provide those definitions. 4) I could remove those definitions from Windows/Windows.h. It would be overwork, I thought at last night. I will attempt to rework for easier tweaks later. Thank you, ...Takumi From gohman at apple.com Mon Feb 7 18:55:13 2011 From: gohman at apple.com (Dan Gohman) Date: Tue, 08 Feb 2011 00:55:13 -0000 Subject: [llvm-commits] [llvm] r125065 - /llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Message-ID: <20110208005513.B0D9F2A6C12C@llvm.org> Author: djg Date: Mon Feb 7 18:55:13 2011 New Revision: 125065 URL: http://llvm.org/viewvc/llvm-project?rev=125065&view=rev Log: Don't split any loop backedges, including backedges of loops other than the active loop. This is generally desirable, and it avoids trouble in situations such as the testcase in PR9123, though the failure mode depends on use-list order, so it is infeasible to test. Modified: llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Modified: llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp?rev=125065&r1=125064&r2=125065&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Mon Feb 7 18:55:13 2011 @@ -3544,21 +3544,23 @@ // is the canonical backedge for this loop, which complicates post-inc // users. if (e != 1 && BB->getTerminator()->getNumSuccessors() > 1 && - !isa(BB->getTerminator()) && - (PN->getParent() != L->getHeader() || !L->contains(BB))) { - // Split the critical edge. - BasicBlock *NewBB = SplitCriticalEdge(BB, PN->getParent(), P); - - // If PN is outside of the loop and BB is in the loop, we want to - // move the block to be immediately before the PHI block, not - // immediately after BB. - if (L->contains(BB) && !L->contains(PN)) - NewBB->moveBefore(PN->getParent()); - - // Splitting the edge can reduce the number of PHI entries we have. - e = PN->getNumIncomingValues(); - BB = NewBB; - i = PN->getBasicBlockIndex(BB); + !isa(BB->getTerminator())) { + Loop *PNLoop = LI.getLoopFor(PN->getParent()); + if (!PNLoop || PN->getParent() != PNLoop->getHeader()) { + // Split the critical edge. + BasicBlock *NewBB = SplitCriticalEdge(BB, PN->getParent(), P); + + // If PN is outside of the loop and BB is in the loop, we want to + // move the block to be immediately before the PHI block, not + // immediately after BB. + if (L->contains(BB) && !L->contains(PN)) + NewBB->moveBefore(PN->getParent()); + + // Splitting the edge can reduce the number of PHI entries we have. + e = PN->getNumIncomingValues(); + BB = NewBB; + i = PN->getBasicBlockIndex(BB); + } } std::pair::iterator, bool> Pair = From evan.cheng at apple.com Mon Feb 7 21:07:03 2011 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 08 Feb 2011 03:07:03 -0000 Subject: [llvm-commits] [llvm] r125074 - in /llvm/trunk/lib/Target/ARM: ARMConstantIslandPass.cpp Thumb2SizeReduction.cpp Message-ID: <20110208030703.86AD02A6C12D@llvm.org> Author: evancheng Date: Mon Feb 7 21:07:03 2011 New Revision: 125074 URL: http://llvm.org/viewvc/llvm-project?rev=125074&view=rev Log: Temporary workaround for a bad bug introduced by r121082 which replaced t2LDRpci with t2LDRi12. There are a couple of problems with this. 1. The encoding for the literal and immediate constant are different. Note bit 7 of the literal case is 'U' so it can be negative. 2. t2LDRi12 is now narrowed to tLDRpci before constant island pass is run. So we end up never using the Thumb2 instruction, which ends up creating a lot more constant islands. Modified: llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp llvm/trunk/lib/Target/ARM/Thumb2SizeReduction.cpp Modified: llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp?rev=125074&r1=125073&r2=125074&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp Mon Feb 7 21:07:03 2011 @@ -1576,6 +1576,16 @@ Scale = 4; } break; + case ARM::t2LDRi12: + // FIXME: Temporary workaround for a bug introduced by r121082. + // We should use t2LDRpci for loads from constantpools. + if (isARMLowRegister(U.MI->getOperand(0).getReg()) && + U.MI->getOperand(1).getReg() == ARM::PC) { + NewOpc = ARM::tLDRpci; + Bits = 8; + Scale = 4; + } + break; } if (!NewOpc) @@ -1586,6 +1596,10 @@ // FIXME: Check if offset is multiple of scale if scale is not 4. if (CPEIsInRange(U.MI, UserOffset, U.CPEMI, MaxOffs, false, true)) { U.MI->setDesc(TII->get(NewOpc)); + if (NewOpc == ARM::tLDRpci) + // FIXME: Temporary workaround. + // PC is now an implicit operand. + U.MI->RemoveOperand(1); MachineBasicBlock *MBB = U.MI->getParent(); BBSizes[MBB->getNumber()] -= 2; AdjustBBOffsetsAfter(MBB, -2); Modified: llvm/trunk/lib/Target/ARM/Thumb2SizeReduction.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Thumb2SizeReduction.cpp?rev=125074&r1=125073&r2=125074&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/Thumb2SizeReduction.cpp (original) +++ llvm/trunk/lib/Target/ARM/Thumb2SizeReduction.cpp Mon Feb 7 21:07:03 2011 @@ -294,14 +294,11 @@ HasImmOffset = true; HasOffReg = false; } else { - if (Entry.WideOpc == ARM::t2LDRi12) { - Opc = ARM::tLDRpci; - OpNum = 2; - } - - HasImmOffset = false; - HasBaseReg = false; - HasOffReg = false; + // FIXME: Temporary workaround for a bug introduced by r121082. + // We should use t2LDRpci for loads from constantpools. + // We don't want to narrow this to tLDRpci until constant island pass + // for fear of pessimizing code. + return false; } break; case ARM::t2LDRBi12: From geek4civic at gmail.com Mon Feb 7 22:02:25 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Tue, 8 Feb 2011 13:02:25 +0900 Subject: [llvm-commits] [Review request][Win64] Patches for Mingw-w64(and mingw64-clang) In-Reply-To: References: <87zkqhggv2.fsf@wanadoo.es> <5D4E2204-78B8-4011-91AF-17E5B2E5C79B@apple.com> <87aaigh6mn.fsf@wanadoo.es> <8762t4h5np.fsf@wanadoo.es> Message-ID: Hello. I commited them below with Anton's approval, thank you. > * 0002-lib-Target-X86-X86JITInfo.cpp-Add-Win64-stuff.patch.txt > * 0009-Autoconf-may-check-symbols-in-libgcc.a-for-JIT-o.patch.txt > * 0011-Windows-DynamicLibrary.inc-Split-explicit-symbol.patch.txt I have reworked more simply with my patchest left. I will post them individually (as possible), later. ...Takumi From geek4civic at gmail.com Mon Feb 7 23:27:16 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Tue, 8 Feb 2011 14:27:16 +0900 Subject: [llvm-commits] [Review request][Win64] Patches for Mingw-w64(and mingw64-clang) Message-ID: Hello, everyone. I reworked my patches simpler. Please look into following patches and give me any comments, thank you. ...Takumi ---Part 1 https://github.com/chapuni/LLVM/commits/mingw64/20110208/ NAKAMURA Takumi (5): Windows/Program.inc: Eliminate the declaration of SetInformationJobObject(). It should be provided with _WIN32_WINNT>=0x0500. Windows/DynamicLibrary.inc: ELM_Callback fix autoconf: Seek strerror_s() with AC_CHECK_DECLS. Regenerate configure. (**** unsent ***) lib/Support/Errno.cpp: Check strerror_s() with HAVE_DECL_STRERROR_S int config.h.*. autoconf/configure.ac | 5 ++- cmake/config-ix.cmake | 2 +- configure | 90 +++++++++++++++++++++++++++++++- include/llvm/Config/config.h.cmake | 7 ++- include/llvm/Config/config.h.in | 7 ++- lib/Support/Errno.cpp | 2 +- lib/Support/Windows/DynamicLibrary.inc | 12 ++++- lib/Support/Windows/Program.inc | 9 --- 8 files changed, 113 insertions(+), 21 deletions(-) ---Part 2-1 (exclusive against part 2-2) https://github.com/chapuni/LLVM/commits/mingw64/20110208-1 NAKAMURA Takumi (1): Windows/Windows.h: Redefine _WIN32_WINNT here. mingw-w64 tends to define it as 0x0502 in its headers. lib/Support/Windows/Windows.h | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) ---Part 2-2 (exclusive against part 2-1) https://github.com/chapuni/LLVM/commits/mingw64/20110208-2 NAKAMURA Takumi (1): lib/Support: Always include Windows/Windows.h! lib/Support/DynamicLibrary.cpp | 4 ++++ lib/Support/Host.cpp | 4 ++++ lib/Support/Memory.cpp | 4 ++++ lib/Support/Mutex.cpp | 4 ++++ lib/Support/Path.cpp | 7 +++++++ lib/Support/PathV2.cpp | 4 ++++ lib/Support/Process.cpp | 4 ++++ lib/Support/Program.cpp | 4 ++++ lib/Support/RWMutex.cpp | 4 ++++ lib/Support/Signals.cpp | 4 ++++ lib/Support/ThreadLocal.cpp | 4 ++++ lib/Support/TimeValue.cpp | 4 ++++ lib/Support/Windows/Windows.h | 5 +++++ 13 files changed, 56 insertions(+), 0 deletions(-) From geek4civic at gmail.com Mon Feb 7 23:27:36 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Tue, 8 Feb 2011 14:27:36 +0900 Subject: [llvm-commits] [PATCH 1/5] Windows/Program.inc: Eliminate the declaration of SetInformationJobObject(). It should be provided with _WIN32_WINNT>=0x0500. Message-ID: --- lib/Support/Windows/Program.inc | 9 --------- 1 files changed, 0 insertions(+), 9 deletions(-) -------------- next part -------------- A non-text attachment was scrubbed... Name: 0001-Windows-Program.inc-Eliminate-the-declaration-of.patch.txt Type: text/x-patch Size: 771 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110208/2a868480/attachment.bin From geek4civic at gmail.com Mon Feb 7 23:27:46 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Tue, 8 Feb 2011 14:27:46 +0900 Subject: [llvm-commits] [PATCH 2/5] Windows/DynamicLibrary.inc: ELM_Callback fix Message-ID: --- lib/Support/Windows/DynamicLibrary.inc | 12 +++++++++++- 1 files changed, 11 insertions(+), 1 deletions(-) It has been unchanged since last one. I wonder it would be better to detect header compatibility with autoconf and cmake. -------------- next part -------------- A non-text attachment was scrubbed... Name: 0002-Windows-DynamicLibrary.inc-ELM_Callback-fix.patch.txt Type: text/x-patch Size: 974 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110208/34dee85e/attachment-0001.bin From geek4civic at gmail.com Mon Feb 7 23:27:54 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Tue, 8 Feb 2011 14:27:54 +0900 Subject: [llvm-commits] [PATCH 3/5] autoconf: Seek strerror_s() with AC_CHECK_DECLS. Message-ID: AC_CHECK_FUNCS seeks a symbol only in libs. We should check decl in string.h. With recent Mingw, *_s() stuff would be enabled by MINGW_HAS_SECURE_API. --- autoconf/configure.ac | 5 ++++- 1 files changed, 4 insertions(+), 1 deletions(-) -------------- next part -------------- A non-text attachment was scrubbed... Name: 0003-autoconf-Seek-strerror_s-with-AC_CHECK_DECLS.patch.txt Type: text/x-patch Size: 958 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110208/a2428ec4/attachment.bin From geek4civic at gmail.com Mon Feb 7 23:28:07 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Tue, 8 Feb 2011 14:28:07 +0900 Subject: [llvm-commits] [PATCH 5/5] lib/Support/Errno.cpp: Check strerror_s() with HAVE_DECL_STRERROR_S int config.h.*. Message-ID: FIXME: I have never seen mingw(s) have strerror_s() (not _strerror_s()). --- cmake/config-ix.cmake | 2 +- include/llvm/Config/config.h.cmake | 7 ++++--- include/llvm/Config/config.h.in | 7 ++++--- lib/Support/Errno.cpp | 2 +- 4 files changed, 10 insertions(+), 8 deletions(-) -------------- next part -------------- A non-text attachment was scrubbed... Name: 0005-lib-Support-Errno.cpp-Check-strerror_s-with-HAVE.patch.txt Type: text/x-patch Size: 2892 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110208/919a0d3a/attachment.bin From geek4civic at gmail.com Mon Feb 7 23:28:20 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Tue, 8 Feb 2011 14:28:20 +0900 Subject: [llvm-commits] [PATCH] Windows/Windows.h: Redefine _WIN32_WINNT here. mingw-w64 tends to define it as 0x0502 in its headers. Message-ID: --- lib/Support/Windows/Windows.h | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) It is the simplest one. Ruben suggests it. -------------- next part -------------- A non-text attachment was scrubbed... Name: 0001-Windows-Windows.h-Redefine-_WIN32_WINNT-here.-mi.patch.txt Type: text/x-patch Size: 556 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110208/c6760bfe/attachment.bin From geek4civic at gmail.com Mon Feb 7 23:28:34 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Tue, 8 Feb 2011 14:28:34 +0900 Subject: [llvm-commits] [PATCH] lib/Support: Always include Windows/Windows.h! Message-ID: --- lib/Support/DynamicLibrary.cpp | 4 ++++ lib/Support/Host.cpp | 4 ++++ lib/Support/Memory.cpp | 4 ++++ lib/Support/Mutex.cpp | 4 ++++ lib/Support/Path.cpp | 7 +++++++ lib/Support/PathV2.cpp | 4 ++++ lib/Support/Process.cpp | 4 ++++ lib/Support/Program.cpp | 4 ++++ lib/Support/RWMutex.cpp | 4 ++++ lib/Support/Signals.cpp | 4 ++++ lib/Support/ThreadLocal.cpp | 4 ++++ lib/Support/TimeValue.cpp | 4 ++++ lib/Support/Windows/Windows.h | 5 +++++ 13 files changed, 56 insertions(+), 0 deletions(-) I intend to avoid macro collision, to include "Windows/Windows.h" at first. I think this is not smart. :( -------------- next part -------------- A non-text attachment was scrubbed... Name: 0001-lib-Support-Always-include-Windows-Windows.h.patch.txt Type: text/x-patch Size: 5833 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110208/48e75697/attachment.bin From resistor at mac.com Mon Feb 7 23:33:50 2011 From: resistor at mac.com (Owen Anderson) Date: Mon, 07 Feb 2011 21:33:50 -0800 Subject: [llvm-commits] [Review request] Have Correlated Value Propagation handle instruction operands. In-Reply-To: References: Message-ID: Frits, Do you done any measurements of the compile-time impact of this? --Owen On Feb 7, 2011, at 12:12 PM, Frits van Bommel wrote: > This patch teaches -correlated-propagation to check whether LVI knows > instruction operands to be constant, and if so to replace them. It > also adds a call to SimplifyInstruction afterwards so that the special > handling of some instructions (select, load, store) is no longer > needed. > > This fixes the -correlated-propagation problem mentioned in comment 1 > of PR 9004[1] and is an alternative implementation of "A small pass to > constant fold branch conditions in destination blocks"[2] which > integrates with the existing pass as Duncan suggested. > Since it leverages LVI, this also handles the 'if (x == 0) use(x)' > case mentioned in that post as well as the 'x > 10' followed by 'x > > 5' case I mentioned in a follow-up (and doesn't need a domtree). > > It passes 'make check-all'. > > > [1]: http://llvm.org/bugs/show_bug.cgi?id=9004 > [2]: http://lists.cs.uiuc.edu/pipermail/llvmdev/2011-February/037884.html > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From fvbommel at gmail.com Tue Feb 8 01:46:04 2011 From: fvbommel at gmail.com (Frits van Bommel) Date: Tue, 8 Feb 2011 08:46:04 +0100 Subject: [llvm-commits] [Review request] Have Correlated Value Propagation handle instruction operands. In-Reply-To: References: Message-ID: On Tue, Feb 8, 2011 at 6:33 AM, Owen Anderson wrote: > Frits, > > Do you done any measurements of the compile-time impact of this? No, sorry. Duncan Sands was worried about this too... From nicholas at mxc.ca Tue Feb 8 02:42:16 2011 From: nicholas at mxc.ca (Nick Lewycky) Date: Tue, 08 Feb 2011 00:42:16 -0800 Subject: [llvm-commits] [llvm] r125006 - in /llvm/trunk: docs/LangRef.html include/llvm/Constants.h include/llvm/Operator.h lib/AsmParser/LLParser.cpp lib/Bitcode/Reader/BitcodeReader.cpp lib/VMCore/Constants.cpp test/Assembler/2003-05-21-MalformedShiftCrash.ll test/Assembler/flags.ll In-Reply-To: <20110207164022.3F67C2A6C12D@llvm.org> References: <20110207164022.3F67C2A6C12D@llvm.org> Message-ID: <4D5101E8.9080206@mxc.ca> Chris Lattner wrote: > Author: lattner > Date: Mon Feb 7 10:40:21 2011 > New Revision: 125006 > > URL: http://llvm.org/viewvc/llvm-project?rev=125006&view=rev > Log: > implement .ll and .bc support for nsw/nuw on shl and exact on lshr/ashr. > Factor some code better. > > Modified: > llvm/trunk/docs/LangRef.html > llvm/trunk/include/llvm/Constants.h > llvm/trunk/include/llvm/Operator.h > llvm/trunk/lib/AsmParser/LLParser.cpp > llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp > llvm/trunk/lib/VMCore/Constants.cpp > llvm/trunk/test/Assembler/2003-05-21-MalformedShiftCrash.ll > llvm/trunk/test/Assembler/flags.ll > > Modified: llvm/trunk/docs/LangRef.html > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/LangRef.html?rev=125006&r1=125005&r2=125006&view=diff > ============================================================================== > --- llvm/trunk/docs/LangRef.html (original) > +++ llvm/trunk/docs/LangRef.html Mon Feb 7 10:40:21 2011 > @@ -3684,7 +3684,10 @@ > >

Syntax:
>
> -<result> = shl<ty><op1>,<op2>; yields {ty}:result
> +<result> = shl<ty><op1>,<op2>; yields {ty}:result
> +<result> = shl nuw<ty><op1>,<op2>; yields {ty}:result
> +<result> = shl nsw<ty><op1>,<op2>; yields {ty}:result
> +<result> = shl nuw nsw<ty><op1>,<op2>; yields {ty}:result
>   
> >
Overview:
> @@ -3704,6 +3707,14 @@ > vectors, each vector element ofop1 is shifted by the corresponding > shift amount inop2.

> > +

If thenuw keyword is present, then the shift produces a > +trap value if it shifts out any non-zero bits. If > + thensw keywrod is present, then the shift produces a Typo: keywrod Nick > +trap value if it shifts out any bits that disagree > + with the resultant sign bit. As such, NUW/NSW have the same semantics as > + they would if the shift were expressed as a mul instruction with the same > + nsw/nuw bits in (mul %op1, (shl 1, %op2)).

> + >
Example:
>
>     <result> = shl i32 4, %var; yields {i32}: 4<< %var
> @@ -3723,7 +3734,8 @@
>
>   
Syntax:
>
> -<result> = lshr<ty><op1>,<op2>; yields {ty}:result
> +<result> = lshr<ty><op1>,<op2>; yields {ty}:result
> +<result> = lshr exact<ty><op1>,<op2>; yields {ty}:result
>   
> >
Overview:
> @@ -3743,6 +3755,11 @@ > vectors, each vector element ofop1 is shifted by the corresponding > shift amount inop2.

> > +

If theexact keyword is present, the result value of the > +lshr is atrap value if any of the bits > + shifted out are non-zero.

> + > + >
Example:
>
>     <result> = lshr i32 4, 1; yields {i32}:result = 2
> @@ -3762,7 +3779,8 @@
>
>   
Syntax:
>
> -<result> = ashr<ty><op1>,<op2>; yields {ty}:result
> +<result> = ashr<ty><op1>,<op2>; yields {ty}:result
> +<result> = ashr exact<ty><op1>,<op2>; yields {ty}:result
>   
> >
Overview:
> @@ -3783,6 +3801,10 @@ > the arguments are vectors, each vector element ofop1 is shifted by > the corresponding shift amount inop2.

> > +

If theexact keyword is present, the result value of the > +ashr is atrap value if any of the bits > + shifted out are non-zero.

> + >
Example:
>
>     <result> = ashr i32 4, 1; yields {i32}:result = 2
>
> Modified: llvm/trunk/include/llvm/Constants.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Constants.h?rev=125006&r1=125005&r2=125006&view=diff
> ==============================================================================
> --- llvm/trunk/include/llvm/Constants.h (original)
> +++ llvm/trunk/include/llvm/Constants.h Mon Feb  7 10:40:21 2011
> @@ -724,8 +724,12 @@
>     static Constant *getNUWSub(Constant *C1, Constant *C2);
>     static Constant *getNSWMul(Constant *C1, Constant *C2);
>     static Constant *getNUWMul(Constant *C1, Constant *C2);
> +  static Constant *getNSWShl(Constant *C1, Constant *C2);
> +  static Constant *getNUWShl(Constant *C1, Constant *C2);
>     static Constant *getExactSDiv(Constant *C1, Constant *C2);
>     static Constant *getExactUDiv(Constant *C1, Constant *C2);
> +  static Constant *getExactAShr(Constant *C1, Constant *C2);
> +  static Constant *getExactLShr(Constant *C1, Constant *C2);
>
>     /// Transparently provide more efficient getOperand methods.
>     DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Constant);
>
> Modified: llvm/trunk/include/llvm/Operator.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Operator.h?rev=125006&r1=125005&r2=125006&view=diff
> ==============================================================================
> --- llvm/trunk/include/llvm/Operator.h (original)
> +++ llvm/trunk/include/llvm/Operator.h Mon Feb  7 10:40:21 2011
> @@ -106,66 +106,14 @@
>     static inline bool classof(const Instruction *I) {
>       return I->getOpcode() == Instruction::Add ||
>              I->getOpcode() == Instruction::Sub ||
> -           I->getOpcode() == Instruction::Mul;
> +           I->getOpcode() == Instruction::Mul ||
> +           I->getOpcode() == Instruction::Shl;
>     }
>     static inline bool classof(const ConstantExpr *CE) {
>       return CE->getOpcode() == Instruction::Add ||
>              CE->getOpcode() == Instruction::Sub ||
> -           CE->getOpcode() == Instruction::Mul;
> -  }
> -  static inline bool classof(const Value *V) {
> -    return (isa(V)&&  classof(cast(V))) ||
> -           (isa(V)&&  classof(cast(V)));
> -  }
> -};
> -
> -/// AddOperator - Utility class for integer addition operators.
> -///
> -class AddOperator : public OverflowingBinaryOperator {
> -  ~AddOperator(); // do not implement
> -public:
> -  static inline bool classof(const AddOperator *) { return true; }
> -  static inline bool classof(const Instruction *I) {
> -    return I->getOpcode() == Instruction::Add;
> -  }
> -  static inline bool classof(const ConstantExpr *CE) {
> -    return CE->getOpcode() == Instruction::Add;
> -  }
> -  static inline bool classof(const Value *V) {
> -    return (isa(V)&&  classof(cast(V))) ||
> -           (isa(V)&&  classof(cast(V)));
> -  }
> -};
> -
> -/// SubOperator - Utility class for integer subtraction operators.
> -///
> -class SubOperator : public OverflowingBinaryOperator {
> -  ~SubOperator(); // do not implement
> -public:
> -  static inline bool classof(const SubOperator *) { return true; }
> -  static inline bool classof(const Instruction *I) {
> -    return I->getOpcode() == Instruction::Sub;
> -  }
> -  static inline bool classof(const ConstantExpr *CE) {
> -    return CE->getOpcode() == Instruction::Sub;
> -  }
> -  static inline bool classof(const Value *V) {
> -    return (isa(V)&&  classof(cast(V))) ||
> -           (isa(V)&&  classof(cast(V)));
> -  }
> -};
> -
> -/// MulOperator - Utility class for integer multiplication operators.
> -///
> -class MulOperator : public OverflowingBinaryOperator {
> -  ~MulOperator(); // do not implement
> -public:
> -  static inline bool classof(const MulOperator *) { return true; }
> -  static inline bool classof(const Instruction *I) {
> -    return I->getOpcode() == Instruction::Mul;
> -  }
> -  static inline bool classof(const ConstantExpr *CE) {
> -    return CE->getOpcode() == Instruction::Mul;
> +           CE->getOpcode() == Instruction::Mul ||
> +           CE->getOpcode() == Instruction::Shl;
>     }
>     static inline bool classof(const Value *V) {
>       return (isa(V)&&  classof(cast(V))) ||
> @@ -196,63 +144,74 @@
>       return SubclassOptionalData&  IsExact;
>     }
>
> -  static inline bool classof(const ConstantExpr *CE) {
> -    return CE->getOpcode() == Instruction::SDiv ||
> -           CE->getOpcode() == Instruction::UDiv;
> -  }
> -  static inline bool classof(const Instruction *I) {
> -    return I->getOpcode() == Instruction::SDiv ||
> -           I->getOpcode() == Instruction::UDiv;
> -  }
> -  static inline bool classof(const Value *V) {
> -    return (isa(V)&&  classof(cast(V))) ||
> -    (isa(V)&&  classof(cast(V)));
> +  static bool isPossiblyExactOpcode(unsigned OpC) {
> +    return OpC == Instruction::SDiv ||
> +           OpC == Instruction::UDiv ||
> +           OpC == Instruction::AShr ||
> +           OpC == Instruction::LShr;
>     }
> -};
> -
> -/// SDivOperator - An Operator with opcode Instruction::SDiv.
> -///
> -class SDivOperator : public PossiblyExactOperator {
> -public:
> -  // Methods for support type inquiry through isa, cast, and dyn_cast:
> -  static inline bool classof(const SDivOperator *) { return true; }
>     static inline bool classof(const ConstantExpr *CE) {
> -    return CE->getOpcode() == Instruction::SDiv;
> +    return isPossiblyExactOpcode(CE->getOpcode());
>     }
>     static inline bool classof(const Instruction *I) {
> -    return I->getOpcode() == Instruction::SDiv;
> +    return isPossiblyExactOpcode(I->getOpcode());
>     }
>     static inline bool classof(const Value *V) {
>       return (isa(V)&&  classof(cast(V))) ||
>              (isa(V)&&  classof(cast(V)));
>     }
>   };
> +
>
> -/// UDivOperator - An Operator with opcode Instruction::UDiv.
> -///
> -class UDivOperator : public PossiblyExactOperator {
> +
> +/// ConcreteOperator - A helper template for defining operators for individual
> +/// opcodes.
> +template
> +class ConcreteOperator : public SuperClass {
> +  ~ConcreteOperator(); // DO NOT IMPLEMENT
>   public:
> -  // Methods for support type inquiry through isa, cast, and dyn_cast:
> -  static inline bool classof(const UDivOperator *) { return true; }
> -  static inline bool classof(const ConstantExpr *CE) {
> -    return CE->getOpcode() == Instruction::UDiv;
> +  static inline bool classof(const ConcreteOperator  *) {
> +    return true;
>     }
>     static inline bool classof(const Instruction *I) {
> -    return I->getOpcode() == Instruction::UDiv;
> +    return I->getOpcode() == Opc;
> +  }
> +  static inline bool classof(const ConstantExpr *CE) {
> +    return CE->getOpcode() == Opc;
>     }
>     static inline bool classof(const Value *V) {
>       return (isa(V)&&  classof(cast(V))) ||
> -    (isa(V)&&  classof(cast(V)));
> +           (isa(V)&&  classof(cast(V)));
>     }
>   };
> +
> +class AddOperator
> +  : public ConcreteOperator  {};
> +class SubOperator
> +  : public ConcreteOperator  {};
> +class MulOperator
> +  : public ConcreteOperator  {};
> +class ShlOperator
> +  : public ConcreteOperator  {};
> +
> +
> +class SDivOperator
> +  : public ConcreteOperator  {};
> +class UDivOperator
> +  : public ConcreteOperator  {};
> +class AShrOperator
> +  : public ConcreteOperator  {};
> +class LShrOperator
> +  : public ConcreteOperator  {};
> +
>
> -class GEPOperator : public Operator {
> +
> +class GEPOperator
> +  : public ConcreteOperator  {
>     enum {
>       IsInBounds = (1<<  0)
>     };
>
> -  ~GEPOperator(); // do not implement
> -
>     friend class GetElementPtrInst;
>     friend class ConstantExpr;
>     void setIsInBounds(bool B) {
> @@ -301,8 +260,8 @@
>     /// value, just potentially different types.
>     bool hasAllZeroIndices() const {
>       for (const_op_iterator I = idx_begin(), E = idx_end(); I != E; ++I) {
> -      if (Constant *C = dyn_cast(I))
> -        if (C->isNullValue())
> +      if (ConstantInt *C = dyn_cast(I))
> +        if (C->isZero())
>             continue;
>         return false;
>       }
> @@ -319,21 +278,6 @@
>       }
>       return true;
>     }
> -
> -
> -  // Methods for support type inquiry through isa, cast, and dyn_cast:
> -  static inline bool classof(const GEPOperator *) { return true; }
> -  static inline bool classof(const GetElementPtrInst *) { return true; }
> -  static inline bool classof(const ConstantExpr *CE) {
> -    return CE->getOpcode() == Instruction::GetElementPtr;
> -  }
> -  static inline bool classof(const Instruction *I) {
> -    return I->getOpcode() == Instruction::GetElementPtr;
> -  }
> -  static inline bool classof(const Value *V) {
> -    return (isa(V)&&  classof(cast(V))) ||
> -           (isa(V)&&  classof(cast(V)));
> -  }
>   };
>
>   } // End llvm namespace
>
> Modified: llvm/trunk/lib/AsmParser/LLParser.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/LLParser.cpp?rev=125006&r1=125005&r2=125006&view=diff
> ==============================================================================
> --- llvm/trunk/lib/AsmParser/LLParser.cpp (original)
> +++ llvm/trunk/lib/AsmParser/LLParser.cpp Mon Feb  7 10:40:21 2011
> @@ -2286,7 +2286,10 @@
>     case lltok::kw_fdiv:
>     case lltok::kw_urem:
>     case lltok::kw_srem:
> -  case lltok::kw_frem: {
> +  case lltok::kw_frem:
> +  case lltok::kw_shl:
> +  case lltok::kw_lshr:
> +  case lltok::kw_ashr: {
>       bool NUW = false;
>       bool NSW = false;
>       bool Exact = false;
> @@ -2294,9 +2297,8 @@
>       Constant *Val0, *Val1;
>       Lex.Lex();
>       LocTy ModifierLoc = Lex.getLoc();
> -    if (Opc == Instruction::Add ||
> -        Opc == Instruction::Sub ||
> -        Opc == Instruction::Mul) {
> +    if (Opc == Instruction::Add || Opc == Instruction::Sub ||
> +        Opc == Instruction::Mul || Opc == Instruction::Shl) {
>         if (EatIfPresent(lltok::kw_nuw))
>           NUW = true;
>         if (EatIfPresent(lltok::kw_nsw)) {
> @@ -2304,7 +2306,8 @@
>           if (EatIfPresent(lltok::kw_nuw))
>             NUW = true;
>         }
> -    } else if (Opc == Instruction::SDiv || Opc == Instruction::UDiv) {
> +    } else if (Opc == Instruction::SDiv || Opc == Instruction::UDiv ||
> +               Opc == Instruction::LShr || Opc == Instruction::AShr) {
>         if (EatIfPresent(lltok::kw_exact))
>           Exact = true;
>       }
> @@ -2331,6 +2334,9 @@
>       case Instruction::SDiv:
>       case Instruction::URem:
>       case Instruction::SRem:
> +    case Instruction::Shl:
> +    case Instruction::AShr:
> +    case Instruction::LShr:
>         if (!Val0->getType()->isIntOrIntVectorTy())
>           return Error(ID.Loc, "constexpr requires integer operands");
>         break;
> @@ -2355,9 +2361,6 @@
>     }
>
>     // Logical Operations
> -  case lltok::kw_shl:
> -  case lltok::kw_lshr:
> -  case lltok::kw_ashr:
>     case lltok::kw_and:
>     case lltok::kw_or:
>     case lltok::kw_xor: {
> @@ -3002,55 +3005,38 @@
>     // Binary Operators.
>     case lltok::kw_add:
>     case lltok::kw_sub:
> -  case lltok::kw_mul: {
> -    bool NUW = false;
> -    bool NSW = false;
> +  case lltok::kw_mul:
> +  case lltok::kw_shl: {
>       LocTy ModifierLoc = Lex.getLoc();
> -    if (EatIfPresent(lltok::kw_nuw))
> -      NUW = true;
> -    if (EatIfPresent(lltok::kw_nsw)) {
> -      NSW = true;
> -      if (EatIfPresent(lltok::kw_nuw))
> -        NUW = true;
> -    }
> -    bool Result = ParseArithmetic(Inst, PFS, KeywordVal, 1);
> -    if (!Result) {
> -      if (!Inst->getType()->isIntOrIntVectorTy()) {
> -        if (NUW)
> -          return Error(ModifierLoc, "nuw only applies to integer operations");
> -        if (NSW)
> -          return Error(ModifierLoc, "nsw only applies to integer operations");
> -      }
> -      if (NUW)
> -        cast(Inst)->setHasNoUnsignedWrap(true);
> -      if (NSW)
> -        cast(Inst)->setHasNoSignedWrap(true);
> -    }
> -    return Result;
> +    bool NUW = EatIfPresent(lltok::kw_nuw);
> +    bool NSW = EatIfPresent(lltok::kw_nsw);
> +    if (!NUW) NUW = EatIfPresent(lltok::kw_nuw);
> +
> +    if (ParseArithmetic(Inst, PFS, KeywordVal, 1)) return true;
> +
> +    if (NUW) cast(Inst)->setHasNoUnsignedWrap(true);
> +    if (NSW) cast(Inst)->setHasNoSignedWrap(true);
> +    return false;
>     }
>     case lltok::kw_fadd:
>     case lltok::kw_fsub:
>     case lltok::kw_fmul:    return ParseArithmetic(Inst, PFS, KeywordVal, 2);
>
>     case lltok::kw_sdiv:
> -  case lltok::kw_udiv: {
> -    bool Exact = false;
> -    if (EatIfPresent(lltok::kw_exact))
> -      Exact = true;
> -    bool Result = ParseArithmetic(Inst, PFS, KeywordVal, 1);
> -    if (!Result)
> -      if (Exact)
> -        cast(Inst)->setIsExact(true);
> -    return Result;
> +  case lltok::kw_udiv:
> +  case lltok::kw_lshr:
> +  case lltok::kw_ashr: {
> +    bool Exact = EatIfPresent(lltok::kw_exact);
> +
> +    if (ParseArithmetic(Inst, PFS, KeywordVal, 1)) return true;
> +    if (Exact) cast(Inst)->setIsExact(true);
> +    return false;
>     }
>
>     case lltok::kw_urem:
>     case lltok::kw_srem:   return ParseArithmetic(Inst, PFS, KeywordVal, 1);
>     case lltok::kw_fdiv:
>     case lltok::kw_frem:   return ParseArithmetic(Inst, PFS, KeywordVal, 2);
> -  case lltok::kw_shl:
> -  case lltok::kw_lshr:
> -  case lltok::kw_ashr:
>     case lltok::kw_and:
>     case lltok::kw_or:
>     case lltok::kw_xor:    return ParseLogical(Inst, PFS, KeywordVal);
>
> Modified: llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp?rev=125006&r1=125005&r2=125006&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp (original)
> +++ llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp Mon Feb  7 10:40:21 2011
> @@ -1085,13 +1085,16 @@
>           if (Record.size()>= 4) {
>             if (Opc == Instruction::Add ||
>                 Opc == Instruction::Sub ||
> -              Opc == Instruction::Mul) {
> +              Opc == Instruction::Mul ||
> +              Opc == Instruction::Shl) {
>               if (Record[3]&  (1<<  bitc::OBO_NO_SIGNED_WRAP))
>                 Flags |= OverflowingBinaryOperator::NoSignedWrap;
>               if (Record[3]&  (1<<  bitc::OBO_NO_UNSIGNED_WRAP))
>                 Flags |= OverflowingBinaryOperator::NoUnsignedWrap;
>             } else if (Opc == Instruction::SDiv ||
> -                     Opc == Instruction::UDiv) {
> +                     Opc == Instruction::UDiv ||
> +                     Opc == Instruction::LShr ||
> +                     Opc == Instruction::AShr) {
>               if (Record[3]&  (1<<  bitc::PEO_EXACT))
>                 Flags |= SDivOperator::IsExact;
>             }
> @@ -1901,13 +1904,16 @@
>         if (OpNum<  Record.size()) {
>           if (Opc == Instruction::Add ||
>               Opc == Instruction::Sub ||
> -            Opc == Instruction::Mul) {
> +            Opc == Instruction::Mul ||
> +            Opc == Instruction::Shl) {
>             if (Record[OpNum]&  (1<<  bitc::OBO_NO_SIGNED_WRAP))
>               cast(I)->setHasNoSignedWrap(true);
>             if (Record[OpNum]&  (1<<  bitc::OBO_NO_UNSIGNED_WRAP))
>               cast(I)->setHasNoUnsignedWrap(true);
>           } else if (Opc == Instruction::SDiv ||
> -                   Opc == Instruction::UDiv) {
> +                   Opc == Instruction::UDiv ||
> +                   Opc == Instruction::LShr ||
> +                   Opc == Instruction::AShr) {
>             if (Record[OpNum]&  (1<<  bitc::PEO_EXACT))
>               cast(I)->setIsExact(true);
>           }
>
> Modified: llvm/trunk/lib/VMCore/Constants.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Constants.cpp?rev=125006&r1=125005&r2=125006&view=diff
> ==============================================================================
> --- llvm/trunk/lib/VMCore/Constants.cpp (original)
> +++ llvm/trunk/lib/VMCore/Constants.cpp Mon Feb  7 10:40:21 2011
> @@ -7,7 +7,7 @@
>   //
>   //===----------------------------------------------------------------------===//
>   //
> -// This file implements the Constant* classes.
> +// This file implements the Constant *classes.
>   //
>   //===----------------------------------------------------------------------===//
>
> @@ -72,7 +72,7 @@
>     }
>   }
>
> -Constant* Constant::getIntegerValue(const Type *Ty, const APInt&V) {
> +Constant *Constant::getIntegerValue(const Type *Ty, const APInt&V) {
>     const Type *ScalarTy = Ty->getScalarType();
>
>     // Create the base integer constant.
> @@ -89,7 +89,7 @@
>     return C;
>   }
>
> -Constant* Constant::getAllOnesValue(const Type *Ty) {
> +Constant *Constant::getAllOnesValue(const Type *Ty) {
>     if (const IntegerType *ITy = dyn_cast(Ty))
>       return ConstantInt::get(Ty->getContext(),
>                               APInt::getAllOnesValue(ITy->getBitWidth()));
> @@ -296,7 +296,7 @@
>     return Slot;
>   }
>
> -Constant* ConstantInt::get(const Type* Ty, uint64_t V, bool isSigned) {
> +Constant *ConstantInt::get(const Type* Ty, uint64_t V, bool isSigned) {
>     Constant *C = get(cast(Ty->getScalarType()),
>                                  V, isSigned);
>
> @@ -321,7 +321,7 @@
>     return get(Ty, V, true);
>   }
>
> -Constant* ConstantInt::get(const Type* Ty, const APInt&  V) {
> +Constant *ConstantInt::get(const Type* Ty, const APInt&  V) {
>     ConstantInt *C = get(Ty->getContext(), V);
>     assert(C->getType() == Ty->getScalarType()&&
>            "ConstantInt type doesn't match the type implied by its value!");
> @@ -360,7 +360,7 @@
>   /// get() - This returns a constant fp for the specified value in the
>   /// specified type.  This should only be used for simple constant values like
>   /// 2.0/1.0 etc, that are known-valid both as double and as the target format.
> -Constant* ConstantFP::get(const Type* Ty, double V) {
> +Constant *ConstantFP::get(const Type* Ty, double V) {
>     LLVMContext&Context = Ty->getContext();
>
>     APFloat FV(V);
> @@ -378,7 +378,7 @@
>   }
>
>
> -Constant* ConstantFP::get(const Type* Ty, StringRef Str) {
> +Constant *ConstantFP::get(const Type* Ty, StringRef Str) {
>     LLVMContext&Context = Ty->getContext();
>
>     APFloat FV(*TypeToFloatSemantics(Ty->getScalarType()), Str);
> @@ -401,7 +401,7 @@
>   }
>
>
> -Constant* ConstantFP::getZeroValueForNegation(const Type* Ty) {
> +Constant *ConstantFP::getZeroValueForNegation(const Type* Ty) {
>     if (const VectorType *PTy = dyn_cast(Ty))
>       if (PTy->getElementType()->isFloatingPointTy()) {
>         std::vector  zeros(PTy->getNumElements(),
> @@ -509,7 +509,7 @@
>   }
>
>
> -Constant* ConstantArray::get(const ArrayType* T, Constant* const* Vals,
> +Constant *ConstantArray::get(const ArrayType* T, Constant *const* Vals,
>                                unsigned NumVals) {
>     // FIXME: make this the primary ctor method.
>     return get(T, std::vector(Vals, Vals+NumVals));
> @@ -521,7 +521,7 @@
>   /// Otherwise, the length parameter specifies how much of the string to use
>   /// and it won't be null terminated.
>   ///
> -Constant* ConstantArray::get(LLVMContext&Context, StringRef Str,
> +Constant *ConstantArray::get(LLVMContext&Context, StringRef Str,
>                                bool AddNull) {
>     std::vector  ElementVals;
>     ElementVals.reserve(Str.size() + size_t(AddNull));
> @@ -557,7 +557,7 @@
>   }
>
>   // ConstantStruct accessors.
> -Constant* ConstantStruct::get(const StructType* T,
> +Constant *ConstantStruct::get(const StructType* T,
>                                 const std::vector&  V) {
>     LLVMContextImpl* pImpl = T->getContext().pImpl;
>
> @@ -569,7 +569,7 @@
>     return ConstantAggregateZero::get(T);
>   }
>
> -Constant* ConstantStruct::get(LLVMContext&Context,
> +Constant *ConstantStruct::get(LLVMContext&Context,
>                                 const std::vector&  V, bool packed) {
>     std::vector  StructEls;
>     StructEls.reserve(V.size());
> @@ -578,8 +578,8 @@
>     return get(StructType::get(Context, StructEls, packed), V);
>   }
>
> -Constant* ConstantStruct::get(LLVMContext&Context,
> -                              Constant* const *Vals, unsigned NumVals,
> +Constant *ConstantStruct::get(LLVMContext&Context,
> +                              Constant *const *Vals, unsigned NumVals,
>                                 bool Packed) {
>     // FIXME: make this the primary ctor method.
>     return get(Context, std::vector(Vals, Vals+NumVals), Packed);
> @@ -601,7 +601,7 @@
>   }
>
>   // ConstantVector accessors.
> -Constant* ConstantVector::get(const VectorType* T,
> +Constant *ConstantVector::get(const VectorType* T,
>                                 const std::vector&  V) {
>     assert(!V.empty()&&  "Vectors can't be empty");
>     LLVMContext&Context = T->getContext();
> @@ -629,68 +629,89 @@
>     return pImpl->VectorConstants.getOrCreate(T, V);
>   }
>
> -Constant* ConstantVector::get(const std::vector&  V) {
> +Constant *ConstantVector::get(const std::vector&  V) {
>     assert(!V.empty()&&  "Cannot infer type if V is empty");
>     return get(VectorType::get(V.front()->getType(),V.size()), V);
>   }
>
> -Constant* ConstantVector::get(Constant* const* Vals, unsigned NumVals) {
> +Constant *ConstantVector::get(Constant *const* Vals, unsigned NumVals) {
>     // FIXME: make this the primary ctor method.
>     return get(std::vector(Vals, Vals+NumVals));
>   }
>
> -Constant* ConstantExpr::getNSWNeg(Constant* C) {
> +Constant *ConstantExpr::getNSWNeg(Constant *C) {
>     assert(C->getType()->isIntOrIntVectorTy()&&
>            "Cannot NEG a nonintegral value!");
>     return getNSWSub(ConstantFP::getZeroValueForNegation(C->getType()), C);
>   }
>
> -Constant* ConstantExpr::getNUWNeg(Constant* C) {
> +Constant *ConstantExpr::getNUWNeg(Constant *C) {
>     assert(C->getType()->isIntOrIntVectorTy()&&
>            "Cannot NEG a nonintegral value!");
>     return getNUWSub(ConstantFP::getZeroValueForNegation(C->getType()), C);
>   }
>
> -Constant* ConstantExpr::getNSWAdd(Constant* C1, Constant* C2) {
> +Constant *ConstantExpr::getNSWAdd(Constant *C1, Constant *C2) {
>     return getTy(C1->getType(), Instruction::Add, C1, C2,
>                  OverflowingBinaryOperator::NoSignedWrap);
>   }
>
> -Constant* ConstantExpr::getNUWAdd(Constant* C1, Constant* C2) {
> +Constant *ConstantExpr::getNUWAdd(Constant *C1, Constant *C2) {
>     return getTy(C1->getType(), Instruction::Add, C1, C2,
>                  OverflowingBinaryOperator::NoUnsignedWrap);
>   }
>
> -Constant* ConstantExpr::getNSWSub(Constant* C1, Constant* C2) {
> +Constant *ConstantExpr::getNSWSub(Constant *C1, Constant *C2) {
>     return getTy(C1->getType(), Instruction::Sub, C1, C2,
>                  OverflowingBinaryOperator::NoSignedWrap);
>   }
>
> -Constant* ConstantExpr::getNUWSub(Constant* C1, Constant* C2) {
> +Constant *ConstantExpr::getNUWSub(Constant *C1, Constant *C2) {
>     return getTy(C1->getType(), Instruction::Sub, C1, C2,
>                  OverflowingBinaryOperator::NoUnsignedWrap);
>   }
>
> -Constant* ConstantExpr::getNSWMul(Constant* C1, Constant* C2) {
> +Constant *ConstantExpr::getNSWMul(Constant *C1, Constant *C2) {
>     return getTy(C1->getType(), Instruction::Mul, C1, C2,
>                  OverflowingBinaryOperator::NoSignedWrap);
>   }
>
> -Constant* ConstantExpr::getNUWMul(Constant* C1, Constant* C2) {
> +Constant *ConstantExpr::getNUWMul(Constant *C1, Constant *C2) {
>     return getTy(C1->getType(), Instruction::Mul, C1, C2,
>                  OverflowingBinaryOperator::NoUnsignedWrap);
>   }
>
> -Constant* ConstantExpr::getExactSDiv(Constant* C1, Constant* C2) {
> +Constant *ConstantExpr::getNSWShl(Constant *C1, Constant *C2) {
> +  return getTy(C1->getType(), Instruction::Shl, C1, C2,
> +               OverflowingBinaryOperator::NoSignedWrap);
> +}
> +
> +Constant *ConstantExpr::getNUWShl(Constant *C1, Constant *C2) {
> +  return getTy(C1->getType(), Instruction::Shl, C1, C2,
> +               OverflowingBinaryOperator::NoUnsignedWrap);
> +}
> +
> +Constant *ConstantExpr::getExactSDiv(Constant *C1, Constant *C2) {
>     return getTy(C1->getType(), Instruction::SDiv, C1, C2,
>                  PossiblyExactOperator::IsExact);
>   }
>
> -Constant* ConstantExpr::getExactUDiv(Constant* C1, Constant* C2) {
> +Constant *ConstantExpr::getExactUDiv(Constant *C1, Constant *C2) {
>     return getTy(C1->getType(), Instruction::UDiv, C1, C2,
>                  PossiblyExactOperator::IsExact);
>   }
>
> +Constant *ConstantExpr::getExactAShr(Constant *C1, Constant *C2) {
> +  return getTy(C1->getType(), Instruction::AShr, C1, C2,
> +               PossiblyExactOperator::IsExact);
> +}
> +
> +Constant *ConstantExpr::getExactLShr(Constant *C1, Constant *C2) {
> +  return getTy(C1->getType(), Instruction::LShr, C1, C2,
> +               PossiblyExactOperator::IsExact);
> +}
> +
> +
>   // Utility function for determining if a ConstantExpr is a CastOp or not. This
>   // can't be inline because we don't want to #include Instruction.h into
>   // Constant.h
> @@ -816,7 +837,7 @@
>   /// operands replaced with the specified values.  The specified operands must
>   /// match count and type with the existing ones.
>   Constant *ConstantExpr::
> -getWithOperands(Constant* const *Ops, unsigned NumOps) const {
> +getWithOperands(Constant *const *Ops, unsigned NumOps) const {
>     assert(NumOps == getNumOperands()&&  "Operand count mismatch!");
>     bool AnyChange = false;
>     for (unsigned i = 0; i != NumOps; ++i) {
> @@ -1486,7 +1507,7 @@
>     return getTy(C1->getType(), Opcode, C1, C2, Flags);
>   }
>
> -Constant* ConstantExpr::getSizeOf(const Type* Ty) {
> +Constant *ConstantExpr::getSizeOf(const Type* Ty) {
>     // sizeof is implemented as: (i64) gep (Ty*)null, 1
>     // Note that a non-inbounds gep is used, as null isn't within any object.
>     Constant *GEPIdx = ConstantInt::get(Type::getInt32Ty(Ty->getContext()), 1);
> @@ -1496,7 +1517,7 @@
>                        Type::getInt64Ty(Ty->getContext()));
>   }
>
> -Constant* ConstantExpr::getAlignOf(const Type* Ty) {
> +Constant *ConstantExpr::getAlignOf(const Type* Ty) {
>     // alignof is implemented as: (i64) gep ({i1,Ty}*)null, 0, 1
>     // Note that a non-inbounds gep is used, as null isn't within any object.
>     const Type *AligningTy = StructType::get(Ty->getContext(),
> @@ -1510,12 +1531,12 @@
>                        Type::getInt64Ty(Ty->getContext()));
>   }
>
> -Constant* ConstantExpr::getOffsetOf(const StructType* STy, unsigned FieldNo) {
> +Constant *ConstantExpr::getOffsetOf(const StructType* STy, unsigned FieldNo) {
>     return getOffsetOf(STy, ConstantInt::get(Type::getInt32Ty(STy->getContext()),
>                                              FieldNo));
>   }
>
> -Constant* ConstantExpr::getOffsetOf(const Type* Ty, Constant *FieldNo) {
> +Constant *ConstantExpr::getOffsetOf(const Type* Ty, Constant *FieldNo) {
>     // offsetof is implemented as: (i64) gep (Ty*)null, 0, FieldNo
>     // Note that a non-inbounds gep is used, as null isn't within any object.
>     Constant *GEPIdx[] = {
> @@ -1823,7 +1844,7 @@
>     return getExtractValueTy(ReqTy, Agg, IdxList, NumIdx);
>   }
>
> -Constant* ConstantExpr::getNeg(Constant* C) {
> +Constant *ConstantExpr::getNeg(Constant *C) {
>     assert(C->getType()->isIntOrIntVectorTy()&&
>            "Cannot NEG a nonintegral value!");
>     return get(Instruction::Sub,
> @@ -1831,7 +1852,7 @@
>                C);
>   }
>
> -Constant* ConstantExpr::getFNeg(Constant* C) {
> +Constant *ConstantExpr::getFNeg(Constant *C) {
>     assert(C->getType()->isFPOrFPVectorTy()&&
>            "Cannot FNEG a non-floating-point value!");
>     return get(Instruction::FSub,
> @@ -1839,81 +1860,81 @@
>                C);
>   }
>
> -Constant* ConstantExpr::getNot(Constant* C) {
> +Constant *ConstantExpr::getNot(Constant *C) {
>     assert(C->getType()->isIntOrIntVectorTy()&&
>            "Cannot NOT a nonintegral value!");
>     return get(Instruction::Xor, C, Constant::getAllOnesValue(C->getType()));
>   }
>
> -Constant* ConstantExpr::getAdd(Constant* C1, Constant* C2) {
> +Constant *ConstantExpr::getAdd(Constant *C1, Constant *C2) {
>     return get(Instruction::Add, C1, C2);
>   }
>
> -Constant* ConstantExpr::getFAdd(Constant* C1, Constant* C2) {
> +Constant *ConstantExpr::getFAdd(Constant *C1, Constant *C2) {
>     return get(Instruction::FAdd, C1, C2);
>   }
>
> -Constant* ConstantExpr::getSub(Constant* C1, Constant* C2) {
> +Constant *ConstantExpr::getSub(Constant *C1, Constant *C2) {
>     return get(Instruction::Sub, C1, C2);
>   }
>
> -Constant* ConstantExpr::getFSub(Constant* C1, Constant* C2) {
> +Constant *ConstantExpr::getFSub(Constant *C1, Constant *C2) {
>     return get(Instruction::FSub, C1, C2);
>   }
>
> -Constant* ConstantExpr::getMul(Constant* C1, Constant* C2) {
> +Constant *ConstantExpr::getMul(Constant *C1, Constant *C2) {
>     return get(Instruction::Mul, C1, C2);
>   }
>
> -Constant* ConstantExpr::getFMul(Constant* C1, Constant* C2) {
> +Constant *ConstantExpr::getFMul(Constant *C1, Constant *C2) {
>     return get(Instruction::FMul, C1, C2);
>   }
>
> -Constant* ConstantExpr::getUDiv(Constant* C1, Constant* C2) {
> +Constant *ConstantExpr::getUDiv(Constant *C1, Constant *C2) {
>     return get(Instruction::UDiv, C1, C2);
>   }
>
> -Constant* ConstantExpr::getSDiv(Constant* C1, Constant* C2) {
> +Constant *ConstantExpr::getSDiv(Constant *C1, Constant *C2) {
>     return get(Instruction::SDiv, C1, C2);
>   }
>
> -Constant* ConstantExpr::getFDiv(Constant* C1, Constant* C2) {
> +Constant *ConstantExpr::getFDiv(Constant *C1, Constant *C2) {
>     return get(Instruction::FDiv, C1, C2);
>   }
>
> -Constant* ConstantExpr::getURem(Constant* C1, Constant* C2) {
> +Constant *ConstantExpr::getURem(Constant *C1, Constant *C2) {
>     return get(Instruction::URem, C1, C2);
>   }
>
> -Constant* ConstantExpr::getSRem(Constant* C1, Constant* C2) {
> +Constant *ConstantExpr::getSRem(Constant *C1, Constant *C2) {
>     return get(Instruction::SRem, C1, C2);
>   }
>
> -Constant* ConstantExpr::getFRem(Constant* C1, Constant* C2) {
> +Constant *ConstantExpr::getFRem(Constant *C1, Constant *C2) {
>     return get(Instruction::FRem, C1, C2);
>   }
>
> -Constant* ConstantExpr::getAnd(Constant* C1, Constant* C2) {
> +Constant *ConstantExpr::getAnd(Constant *C1, Constant *C2) {
>     return get(Instruction::And, C1, C2);
>   }
>
> -Constant* ConstantExpr::getOr(Constant* C1, Constant* C2) {
> +Constant *ConstantExpr::getOr(Constant *C1, Constant *C2) {
>     return get(Instruction::Or, C1, C2);
>   }
>
> -Constant* ConstantExpr::getXor(Constant* C1, Constant* C2) {
> +Constant *ConstantExpr::getXor(Constant *C1, Constant *C2) {
>     return get(Instruction::Xor, C1, C2);
>   }
>
> -Constant* ConstantExpr::getShl(Constant* C1, Constant* C2) {
> +Constant *ConstantExpr::getShl(Constant *C1, Constant *C2) {
>     return get(Instruction::Shl, C1, C2);
>   }
>
> -Constant* ConstantExpr::getLShr(Constant* C1, Constant* C2) {
> +Constant *ConstantExpr::getLShr(Constant *C1, Constant *C2) {
>     return get(Instruction::LShr, C1, C2);
>   }
>
> -Constant* ConstantExpr::getAShr(Constant* C1, Constant* C2) {
> +Constant *ConstantExpr::getAShr(Constant *C1, Constant *C2) {
>     return get(Instruction::AShr, C1, C2);
>   }
>
>
> Modified: llvm/trunk/test/Assembler/2003-05-21-MalformedShiftCrash.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Assembler/2003-05-21-MalformedShiftCrash.ll?rev=125006&r1=125005&r2=125006&view=diff
> ==============================================================================
> --- llvm/trunk/test/Assembler/2003-05-21-MalformedShiftCrash.ll (original)
> +++ llvm/trunk/test/Assembler/2003-05-21-MalformedShiftCrash.ll Mon Feb  7 10:40:21 2011
> @@ -1,4 +1,4 @@
>   ; Found by inspection of the code
> -; RUN: not llvm-as<  %s>  /dev/null |&  grep {constexpr requires integer or integer vector operands}
> +; RUN: not llvm-as<  %s>  /dev/null |&  grep {constexpr requires integer operands}
>
>   global i32 ashr (float 1.0, float 2.0)
>
> Modified: llvm/trunk/test/Assembler/flags.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Assembler/flags.ll?rev=125006&r1=125005&r2=125006&view=diff
> ==============================================================================
> --- llvm/trunk/test/Assembler/flags.ll (original)
> +++ llvm/trunk/test/Assembler/flags.ll Mon Feb  7 10:40:21 2011
> @@ -92,6 +92,12 @@
>   	ret i64 %z
>   }
>
> +define i64 @shl_both(i64 %x, i64 %y) {
> +; CHECK: %z = shl nuw nsw i64 %x, %y
> +	%z = shl nuw nsw i64 %x, %y
> +	ret i64 %z
> +}
> +
>   define i64 @sdiv_exact(i64 %x, i64 %y) {
>   ; CHECK: %z = sdiv exact i64 %x, %y
>   	%z = sdiv exact i64 %x, %y
> @@ -116,6 +122,29 @@
>   	ret i64 %z
>   }
>
> +define i64 @ashr_plain(i64 %x, i64 %y) {
> +; CHECK: %z = ashr i64 %x, %y
> +	%z = ashr i64 %x, %y
> +	ret i64 %z
> +}
> +
> +define i64 @ashr_exact(i64 %x, i64 %y) {
> +; CHECK: %z = ashr exact i64 %x, %y
> +	%z = ashr exact i64 %x, %y
> +	ret i64 %z
> +}
> +
> +define i64 @lshr_plain(i64 %x, i64 %y) {
> +; CHECK: %z = lshr i64 %x, %y
> +	%z = lshr i64 %x, %y
> +	ret i64 %z
> +}
> +
> +define i64 @lshr_exact(i64 %x, i64 %y) {
> +; CHECK: %z = lshr exact i64 %x, %y
> +	%z = lshr exact i64 %x, %y
> +	ret i64 %z
> +}
>
>   define i64* @gep_nw(i64* %p, i64 %x) {
>   ; CHECK: %z = getelementptr inbounds i64* %p, i64 %x
> @@ -154,6 +183,16 @@
>   	ret i64 udiv exact (i64 ptrtoint (i64* @addr to i64), i64 91)
>   }
>
> +define i64 @ashr_exact_ce() {
> +; CHECK: ret i64 ashr exact (i64 ptrtoint (i64* @addr to i64), i64 9)
> +	ret i64 ashr exact (i64 ptrtoint (i64* @addr to i64), i64 9)
> +}
> +
> +define i64 @lshr_exact_ce() {
> +; CHECK: ret i64 lshr exact (i64 ptrtoint (i64* @addr to i64), i64 9)
> +	ret i64 lshr exact (i64 ptrtoint (i64* @addr to i64), i64 9)
> +}
> +
>   define i64* @gep_nw_ce() {
>   ; CHECK: ret i64* getelementptr inbounds (i64* @addr, i64 171)
>           ret i64* getelementptr inbounds (i64* @addr, i64 171)
> @@ -214,6 +253,12 @@
>   	ret i64 mul nsw (i64 ptrtoint (i64* @addr to i64), i64 91)
>   }
>
> +define i64 @shl_signed_ce() {
> +; CHECK: ret i64 shl nsw (i64 ptrtoint (i64* @addr to i64), i64 17)
> +	ret i64 shl nsw (i64 ptrtoint (i64* @addr to i64), i64 17)
> +}
> +
> +
>   define i64 @add_unsigned_ce() {
>   ; CHECK: ret i64 add nuw (i64 ptrtoint (i64* @addr to i64), i64 91)
>   	ret i64 add nuw (i64 ptrtoint (i64* @addr to i64), i64 91)
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>


From rafael.espindola at gmail.com  Tue Feb  8 09:07:21 2011
From: rafael.espindola at gmail.com (=?ISO-8859-1?Q?Rafael_=C1vila_de_Esp=EDndola?=)
Date: Tue, 08 Feb 2011 10:07:21 -0500
Subject: [llvm-commits] [PATCH] [MC] Support for .ifdef / .ifndef
In-Reply-To: <20110205233414.GA12822@britannica.bec.de>
References: <20110205233414.GA12822@britannica.bec.de>
Message-ID: <4D515C29.5010306@gmail.com>

On 11-02-05 6:34 PM, Joerg Sonnenberger wrote:
> Hi all,
> attached patch implements .ifdef / .ifndef in the assembler parser.

OK, but please make the tests a bit stronger. Adding a CHECK-NOT for the 
dropped cases would help.

> Joerg
>

Cheers,
Rafael

From baldrick at free.fr  Tue Feb  8 10:46:31 2011
From: baldrick at free.fr (Duncan Sands)
Date: Tue, 08 Feb 2011 17:46:31 +0100
Subject: [llvm-commits] [Review request] Have Correlated Value
 Propagation handle instruction operands.
In-Reply-To: 
References: 	
	
Message-ID: <4D517367.9050105@free.fr>

Hi Frits,

>> Do you done any measurements of the compile-time impact of this?
>
> No, sorry. Duncan Sands was worried about this too...

it is very expensive.  I ran some comparisons and it is very visible that with
your patch compilation is much slower.  The obvious thing to do is to keep your
logic but only analyse a small set of instructions, for example the ones it used
to analyse (Select, PHI, I/FCmp, Load, Store) plus branch instructions.  Sadly
the result is disappointing: it catches way less stuff than my pass.  I then
tried with your original patch, i.e. analysing all instructions.  It still
catches way less stuff than my pass if I judge by the number of lines of bitcode
removed.  I don't understand this since indeed LVI knows lots of tricks, so it
is probably worth trying to understand why correlated value propagation/LVI is
not doing a better job.

Ciao, Duncan.

PS: Way less = order of magnitude.

From wdietz2 at illinois.edu  Tue Feb  8 10:59:24 2011
From: wdietz2 at illinois.edu (Will Dietz)
Date: Tue, 08 Feb 2011 16:59:24 -0000
Subject: [llvm-commits] [poolalloc] r125088 - in
 /poolalloc/trunk/test/dsa/local: union.ll union_P2I.ll
Message-ID: <20110208165924.E1B9D2A6C12C@llvm.org>

Author: wdietz2
Date: Tue Feb  8 10:59:24 2011
New Revision: 125088

URL: http://llvm.org/viewvc/llvm-project?rev=125088&view=rev
Log:
Mark tests for features we have no plans to implement as XFAIL.

Modified:
    poolalloc/trunk/test/dsa/local/union.ll
    poolalloc/trunk/test/dsa/local/union_P2I.ll

Modified: poolalloc/trunk/test/dsa/local/union.ll
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/test/dsa/local/union.ll?rev=125088&r1=125087&r2=125088&view=diff
==============================================================================
--- poolalloc/trunk/test/dsa/local/union.ll (original)
+++ poolalloc/trunk/test/dsa/local/union.ll Tue Feb  8 10:59:24 2011
@@ -2,6 +2,11 @@
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
 target triple = "x86_64-unknown-linux-gnu"
 
+;TODO: What exactly does this test?
+
+;Mark this as expected to fail since we don't plan on implementing this anytime soon.
+;XFAIL: *
+
 ;RUN: dsaopt %s -dsa-local -analyze -check-same-node=func:tmp:0,func:c:0,func:s1:0
 ;RUN: dsaopt %s -dsa-local -analyze -check-same-node=func:s1:8,func:x:8
 

Modified: poolalloc/trunk/test/dsa/local/union_P2I.ll
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/test/dsa/local/union_P2I.ll?rev=125088&r1=125087&r2=125088&view=diff
==============================================================================
--- poolalloc/trunk/test/dsa/local/union_P2I.ll (original)
+++ poolalloc/trunk/test/dsa/local/union_P2I.ll Tue Feb  8 10:59:24 2011
@@ -1,5 +1,8 @@
 ;checks that the PtrToInt and IntToPtr flag is set on unions that contain integer and pointer types
 
+;Mark this as expected to fail since we don't plan on implementing this anytime soon.
+;XFAIL: *
+
 ;RUN: dsaopt %s -dsa-local -analyze -check-same-node=main:ptr:0,main:obj:0
 ;RUN: dsaopt %s -dsa-local -analyze -verify-flags "main:obj+UP2"
 ;RUN: dsaopt %s -dsa-local -analyze -check-type=main:obj,0:i32|%\struct.StructType*



From jan_sjodin at yahoo.com  Tue Feb  8 11:27:32 2011
From: jan_sjodin at yahoo.com (Jan Sjodin)
Date: Tue, 8 Feb 2011 09:27:32 -0800 (PST)
Subject: [llvm-commits] JunkJIT (was MCJIT)
Message-ID: <448258.50376.qm@web55602.mail.re4.yahoo.com>

I updated the patch (now even bigger) in case there is any interest. The code 
lives here: http://gitorious.org/llvm-junkjit/llvm-junkjit

- Jan



----- Original Message ----
> From: Jan Sjodin 
> To: Daniel Dunbar 
> Cc: llvm-commits at cs.uiuc.edu
> Sent: Thu, January 20, 2011 5:21:53 PM
> Subject: JunkJIT (was MCJIT)
> 
> This is the updated patch for the old MCJIT proposal. I changed  MCJIT->JunkJIT 
>
> and made the tests work again. I was thinking it might at  least be useful to 
> replace the old JIT until the real MCJIT is in  place.
> 
> - Jan
> 
-------------- next part --------------
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From atrick at apple.com  Tue Feb  8 11:39:46 2011
From: atrick at apple.com (Andrew Trick)
Date: Tue, 08 Feb 2011 17:39:46 -0000
Subject: [llvm-commits] [llvm] r125089 - in /llvm/trunk/lib/CodeGen:
 CriticalAntiDepBreaker.cpp CriticalAntiDepBreaker.h
Message-ID: <20110208173946.4536E2A6C12C@llvm.org>

Author: atrick
Date: Tue Feb  8 11:39:46 2011
New Revision: 125089

URL: http://llvm.org/viewvc/llvm-project?rev=125089&view=rev
Log:
Fix PostRA antidependence breaker.

Avoid using the same register for two def operands or and earlyclobber
def and use operand. This fixes PR8986 and improves on the prior fix
for rdar://problem/8959122.

Modified:
    llvm/trunk/lib/CodeGen/CriticalAntiDepBreaker.cpp
    llvm/trunk/lib/CodeGen/CriticalAntiDepBreaker.h

Modified: llvm/trunk/lib/CodeGen/CriticalAntiDepBreaker.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/CriticalAntiDepBreaker.cpp?rev=125089&r1=125088&r2=125089&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/CriticalAntiDepBreaker.cpp (original)
+++ llvm/trunk/lib/CodeGen/CriticalAntiDepBreaker.cpp Tue Feb  8 11:39:46 2011
@@ -325,17 +325,55 @@
   }
 }
 
-// Check all machine instructions that define the antidependent register.
-// Return true if any of these instructions define the new register.
+// Check all machine operands that reference the antidependent register and must
+// be replaced by NewReg. Return true if any of their parent instructions may
+// clobber the new register.
+//
+// Note: AntiDepReg may be referenced by a two-address instruction such that
+// it's use operand is tied to a def operand. We guard against the case in which
+// the two-address instruction also defines NewReg, as may happen with
+// pre/postincrement loads. In this case, both the use and def operands are in
+// RegRefs because the def is inserted by PrescanInstruction and not erased
+// during ScanInstruction. So checking for an instructions with definitions of
+// both NewReg and AntiDepReg covers it.
 bool
-CriticalAntiDepBreaker::isNewRegModifiedByRefs(RegRefIter RegRefBegin,
-                                               RegRefIter RegRefEnd,
-                                               unsigned NewReg)
+CriticalAntiDepBreaker::isNewRegClobberedByRefs(RegRefIter RegRefBegin,
+                                                RegRefIter RegRefEnd,
+                                                unsigned NewReg)
 {
   for (RegRefIter I = RegRefBegin; I != RegRefEnd; ++I ) {
-    MachineOperand *MO = I->second;
-    if (MO->getParent()->modifiesRegister(NewReg, TRI))
+    MachineOperand *RefOper = I->second;
+
+    // Don't allow the instruction defining AntiDepReg to earlyclobber its
+    // operands, in case they may be assigned to NewReg. In this case antidep
+    // breaking must fail, but it's too rare to bother optimizing.
+    if (RefOper->isDef() && RefOper->isEarlyClobber())
       return true;
+
+    // Handle cases in which this instructions defines NewReg.
+    MachineInstr *MI = RefOper->getParent();
+    for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
+      const MachineOperand &CheckOper = MI->getOperand(i);
+
+      if (!CheckOper.isReg() || !CheckOper.isDef() ||
+          CheckOper.getReg() != NewReg)
+        continue;
+
+      // Don't allow the instruction to define NewReg and AntiDepReg.
+      // When AntiDepReg is renamed it will be an illegal op.
+      if (RefOper->isDef())
+        return true;
+
+      // Don't allow an instruction using AntiDepReg to be earlyclobbered by
+      // NewReg
+      if (CheckOper.isEarlyClobber())
+        return true;
+
+      // Don't allow inline asm to define NewReg at all. Who know what it's
+      // doing with it.
+      if (MI->isInlineAsm())
+        return true;
+    }
   }
   return false;
 }
@@ -361,7 +399,7 @@
     // If any instructions that define AntiDepReg also define the NewReg, it's
     // not suitable.  For example, Instruction with multiple definitions can
     // result in this condition.
-    if (isNewRegModifiedByRefs(RegRefBegin, RegRefEnd, NewReg)) continue;
+    if (isNewRegClobberedByRefs(RegRefBegin, RegRefEnd, NewReg)) continue;
     // If NewReg is dead and NewReg's most recent def is not before
     // AntiDepReg's kill, it's safe to replace AntiDepReg with NewReg.
     assert(((KillIndices[AntiDepReg] == ~0u) != (DefIndices[AntiDepReg] == ~0u))

Modified: llvm/trunk/lib/CodeGen/CriticalAntiDepBreaker.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/CriticalAntiDepBreaker.h?rev=125089&r1=125088&r2=125089&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/CriticalAntiDepBreaker.h (original)
+++ llvm/trunk/lib/CodeGen/CriticalAntiDepBreaker.h Tue Feb  8 11:39:46 2011
@@ -92,9 +92,9 @@
   private:
     void PrescanInstruction(MachineInstr *MI);
     void ScanInstruction(MachineInstr *MI, unsigned Count);
-    bool isNewRegModifiedByRefs(RegRefIter RegRefBegin,
-                                RegRefIter RegRefEnd,
-                                unsigned NewReg);
+    bool isNewRegClobberedByRefs(RegRefIter RegRefBegin,
+                                 RegRefIter RegRefEnd,
+                                 unsigned NewReg);
     unsigned findSuitableFreeRegister(RegRefIter RegRefBegin,
                                       RegRefIter RegRefEnd,
                                       unsigned AntiDepReg,



From atrick at apple.com  Tue Feb  8 11:41:13 2011
From: atrick at apple.com (Andrew Trick)
Date: Tue, 08 Feb 2011 17:41:13 -0000
Subject: [llvm-commits] [llvm] r125090 -
	/llvm/trunk/test/CodeGen/ARM/2011-02-04-AntidepMultidef.ll
Message-ID: <20110208174113.131572A6C12C@llvm.org>

Author: atrick
Date: Tue Feb  8 11:41:12 2011
New Revision: 125090

URL: http://llvm.org/viewvc/llvm-project?rev=125090&view=rev
Log:
PostRA antidependence breaker unit test for rdar://8959122.

Added:
    llvm/trunk/test/CodeGen/ARM/2011-02-04-AntidepMultidef.ll

Added: llvm/trunk/test/CodeGen/ARM/2011-02-04-AntidepMultidef.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2011-02-04-AntidepMultidef.ll?rev=125090&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/2011-02-04-AntidepMultidef.ll (added)
+++ llvm/trunk/test/CodeGen/ARM/2011-02-04-AntidepMultidef.ll Tue Feb  8 11:41:12 2011
@@ -0,0 +1,128 @@
+; RUN: llc < %s -asm-verbose=false -O3 -mtriple=armv6-apple-darwin -relocation-model=pic  -mcpu=arm1136jf-s | FileCheck %s
+; rdar://8959122 illegal register operands for UMULL instruction
+;   in cfrac nightly test.
+; Armv6 generates a umull that must write to two distinct destination regs.
+
+; ModuleID = 'bugpoint-reduced-simplified.bc'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:64-n32"
+target triple = "armv6-apple-darwin10"
+
+define void @ptoa() nounwind {
+entry:
+  br i1 false, label %bb3, label %bb
+
+bb:                                               ; preds = %entry
+  br label %bb3
+
+bb3:                                              ; preds = %bb, %entry
+  %0 = call noalias i8* @malloc() nounwind
+  br i1 undef, label %bb46, label %bb8
+
+bb8:                                              ; preds = %bb3
+  %1 = getelementptr inbounds i8* %0, i32 0
+  store i8 0, i8* %1, align 1
+  %2 = call i32 @ptou() nounwind
+  ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
+  ; CHECK-NOT: [[REGISTER]],
+  ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}}
+  ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
+  ; CHECK-NOT: [[REGISTER]],
+  ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}}
+  %3 = udiv i32 %2, 10
+  %4 = urem i32 %3, 10
+  %5 = icmp ult i32 %4, 10
+  %6 = trunc i32 %4 to i8
+  %7 = or i8 %6, 48
+  %8 = add i8 %6, 87
+  %iftmp.5.0.1 = select i1 %5, i8 %7, i8 %8
+  store i8 %iftmp.5.0.1, i8* undef, align 1
+  ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
+  ; CHECK-NOT: [[REGISTER]],
+  ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}}
+  ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
+  ; CHECK-NOT: [[REGISTER]],
+  ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}}
+  %9 = udiv i32 %2, 100
+  %10 = urem i32 %9, 10
+  %11 = icmp ult i32 %10, 10
+  %12 = trunc i32 %10 to i8
+  %13 = or i8 %12, 48
+  %14 = add i8 %12, 87
+  %iftmp.5.0.2 = select i1 %11, i8 %13, i8 %14
+  store i8 %iftmp.5.0.2, i8* undef, align 1
+  ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
+  ; CHECK-NOT: [[REGISTER]],
+  ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}}
+  ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
+  ; CHECK-NOT: [[REGISTER]],
+  ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}}
+  %15 = udiv i32 %2, 10000
+  %16 = urem i32 %15, 10
+  %17 = icmp ult i32 %16, 10
+  %18 = trunc i32 %16 to i8
+  %19 = or i8 %18, 48
+  %20 = add i8 %18, 87
+  %iftmp.5.0.4 = select i1 %17, i8 %19, i8 %20
+  store i8 %iftmp.5.0.4, i8* null, align 1
+  ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
+  ; CHECK-NOT: [[REGISTER]],
+  ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}}
+  ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
+  ; CHECK-NOT: [[REGISTER]],
+  ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}}
+  %21 = udiv i32 %2, 100000
+  %22 = urem i32 %21, 10
+  %23 = icmp ult i32 %22, 10
+  %iftmp.5.0.5 = select i1 %23, i8 0, i8 undef
+  store i8 %iftmp.5.0.5, i8* undef, align 1
+  ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
+  ; CHECK-NOT: [[REGISTER]],
+  ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}}
+  ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
+  ; CHECK-NOT: [[REGISTER]],
+  ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}}
+  %24 = udiv i32 %2, 1000000
+  %25 = urem i32 %24, 10
+  %26 = icmp ult i32 %25, 10
+  %27 = trunc i32 %25 to i8
+  %28 = or i8 %27, 48
+  %29 = add i8 %27, 87
+  %iftmp.5.0.6 = select i1 %26, i8 %28, i8 %29
+  store i8 %iftmp.5.0.6, i8* undef, align 1
+  ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
+  ; CHECK-NOT: [[REGISTER]],
+  ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}}
+  ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
+  ; CHECK-NOT: [[REGISTER]],
+  ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}}
+  %30 = udiv i32 %2, 10000000
+  %31 = urem i32 %30, 10
+  %32 = icmp ult i32 %31, 10
+  %33 = trunc i32 %31 to i8
+  %34 = or i8 %33, 48
+  %35 = add i8 %33, 87
+  %iftmp.5.0.7 = select i1 %32, i8 %34, i8 %35
+  store i8 %iftmp.5.0.7, i8* undef, align 1
+  ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
+  ; CHECK-NOT: [[REGISTER]],
+  ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}}
+  ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
+  ; CHECK-NOT: [[REGISTER]],
+  ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}}
+  %36 = udiv i32 %2, 100000000
+  %37 = urem i32 %36, 10
+  %38 = icmp ult i32 %37, 10
+  %39 = trunc i32 %37 to i8
+  %40 = or i8 %39, 48
+  %41 = add i8 %39, 87
+  %iftmp.5.0.8 = select i1 %38, i8 %40, i8 %41
+  store i8 %iftmp.5.0.8, i8* null, align 1
+  unreachable
+
+bb46:                                             ; preds = %bb3
+  ret void
+}
+
+declare noalias i8* @malloc() nounwind
+
+declare i32 @ptou()



From atrick at apple.com  Tue Feb  8 11:42:05 2011
From: atrick at apple.com (Andrew Trick)
Date: Tue, 08 Feb 2011 17:42:05 -0000
Subject: [llvm-commits] [llvm] r125091 -
	/llvm/trunk/test/CodeGen/ARM/2011-02-07-AntidepClobber.ll
Message-ID: <20110208174205.A66812A6C12C@llvm.org>

Author: atrick
Date: Tue Feb  8 11:42:05 2011
New Revision: 125091

URL: http://llvm.org/viewvc/llvm-project?rev=125091&view=rev
Log:
PostRA antidependence breaker unit test for PR8986.

Added:
    llvm/trunk/test/CodeGen/ARM/2011-02-07-AntidepClobber.ll

Added: llvm/trunk/test/CodeGen/ARM/2011-02-07-AntidepClobber.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2011-02-07-AntidepClobber.ll?rev=125091&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/2011-02-07-AntidepClobber.ll (added)
+++ llvm/trunk/test/CodeGen/ARM/2011-02-07-AntidepClobber.ll Tue Feb  8 11:42:05 2011
@@ -0,0 +1,89 @@
+; RUN: llc < %s -asm-verbose=false -O3  -mtriple=armv5e-none-linux-gnueabi | FileCheck %s
+; PR8986: PostRA antidependence breaker must respect "earlyclobber".
+; armv5e generates mulv5 that cannot used the same reg for src/dest.
+
+; ModuleID = ''
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32"
+target triple = "armv5e-none-linux-gnueabi"
+
+define hidden fastcc void @storeAtts() nounwind {
+entry:
+  %.SV116 = alloca i8**
+  br i1 undef, label %meshBB520, label %meshBB464
+
+bb15:                                             ; preds = %meshBB424
+  br i1 undef, label %bb216, label %meshBB396
+
+bb22:                                             ; preds = %meshBB396
+  br label %cBB564
+
+cBB564:                                           ; preds = %cBB564, %bb22
+  br label %cBB564
+
+poolStoreString.exit.thread:                      ; preds = %meshBB424
+  ret void
+
+bb78:                                             ; preds = %meshBB412
+  unreachable
+
+bb129:                                            ; preds = %meshBB540
+  br i1 undef, label %bb131.loopexit, label %meshBB540
+
+bb131.loopexit:                                   ; preds = %bb129
+  br label %bb131
+
+bb131:                                            ; preds = %bb135, %bb131.loopexit
+  br i1 undef, label %bb134, label %meshBB396
+
+bb134:                                            ; preds = %bb131
+  unreachable
+
+bb135:                                            ; preds = %meshBB396
+  %uriHash.1.phi.load = load i32* undef
+  %.load120 = load i8*** %.SV116
+  %.phi24 = load i8* null
+  %.phi26 = load i8** null
+  store i8 %.phi24, i8* %.phi26, align 1
+  %0 = getelementptr inbounds i8* %.phi26, i32 1
+  store i8* %0, i8** %.load120, align 4
+  ; CHECK: mul [[REGISTER:lr|r[0-9]+]],
+  ; CHECK-NOT: [[REGISTER]],
+  ; CHECK: {{(lr|r[0-9]+)$}}
+  %1 = mul i32 %uriHash.1.phi.load, 1000003
+  %2 = xor i32 0, %1
+  store i32 %2, i32* null
+  %3 = load i8* null, align 1
+  %4 = icmp eq i8 %3, 0
+  store i8* %0, i8** undef
+  br i1 %4, label %meshBB472, label %bb131
+
+bb212:                                            ; preds = %meshBB540
+  unreachable
+
+bb216:                                            ; preds = %bb15
+  ret void
+
+meshBB396:                                        ; preds = %bb131, %bb15
+  br i1 undef, label %bb135, label %bb22
+
+meshBB412:                                        ; preds = %meshBB464
+  br i1 undef, label %meshBB504, label %bb78
+
+meshBB424:                                        ; preds = %meshBB464
+  br i1 undef, label %poolStoreString.exit.thread, label %bb15
+
+meshBB464:                                        ; preds = %entry
+  br i1 undef, label %meshBB424, label %meshBB412
+
+meshBB472:                                        ; preds = %meshBB504, %bb135
+  unreachable
+
+meshBB504:                                        ; preds = %meshBB412
+  br label %meshBB472
+
+meshBB520:                                        ; preds = %entry
+  br label %meshBB540
+
+meshBB540:                                        ; preds = %meshBB520, %bb129
+  br i1 undef, label %bb212, label %bb129
+}



From aggarwa4 at illinois.edu  Tue Feb  8 11:47:41 2011
From: aggarwa4 at illinois.edu (Arushi Aggarwal)
Date: Tue, 08 Feb 2011 17:47:41 -0000
Subject: [llvm-commits] [poolalloc] r125092 -
	/poolalloc/trunk/lib/DSA/Local.cpp
Message-ID: <20110208174741.424BD2A6C12C@llvm.org>

Author: aggarwa4
Date: Tue Feb  8 11:47:41 2011
New Revision: 125092

URL: http://llvm.org/viewvc/llvm-project?rev=125092&view=rev
Log:
1. Minor formatting changes.
2. Pattern match uglygeps, so as to get better 
type inference. Helps some SPEC benchmarks.

Modified:
    poolalloc/trunk/lib/DSA/Local.cpp

Modified: poolalloc/trunk/lib/DSA/Local.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/Local.cpp?rev=125092&r1=125091&r2=125092&view=diff
==============================================================================
--- poolalloc/trunk/lib/DSA/Local.cpp (original)
+++ poolalloc/trunk/lib/DSA/Local.cpp Tue Feb  8 11:47:41 2011
@@ -45,6 +45,8 @@
 STATISTIC(NumIndirectCall,  "Number of indirect calls added");
 STATISTIC(NumAsmCall,       "Number of asm calls collapsed/seen");
 STATISTIC(NumIntrinsicCall, "Number of intrinsics called");
+STATISTIC(NumUglyGep,       "Number of uglygeps");
+STATISTIC(NumUglyGep1,      "Number of uglygeps caught");
 
 RegisterPass
 X("dsa-local", "Local Data Structure Analysis");
@@ -206,6 +208,53 @@
     void mergeFunction(Function* F) { getValueDest(F); }
   };
 
+  static bool handleUglygep(GetElementPtrInst *GEPInst, int *Offset) {
+    int O = 0;
+    llvm::Value* Val = GEPInst->getOperand(1);
+    if(isa(Val)) {
+      O = (cast(Val))->getSExtValue();
+    } else {
+      std::vector exprs;
+      while(!isa(Val)){
+        exprs.push_back(Val);
+        if(BinaryOperator *BI = dyn_cast(Val)){
+          if(!isa(BI->getOperand(1))){
+            return false;
+          }
+          Val = BI->getOperand(0);
+        }else {
+          return false;
+        }
+      }
+      PHINode *phi = cast(Val);
+      if(phi->getNumIncomingValues() > 3){
+        return false;
+      }
+      if(isa(phi->getIncomingValue(1)))
+         O = (cast(phi->getIncomingValue(1)))->getSExtValue();
+      else if(isa(phi->getIncomingValue(0)))
+        O = (cast(phi->getIncomingValue(0)))->getSExtValue();
+      else if(isa(phi->getIncomingValue(2)))
+        O = (cast(phi->getIncomingValue(2)))->getSExtValue();
+      while (!exprs.empty()) {
+        llvm::Value* V = exprs.back();
+        exprs.pop_back();
+        BinaryOperator *BI = cast(V);
+        unsigned O1 = (cast(BI->getOperand(1)))->getSExtValue();
+        switch(BI->getOpcode()){
+        case llvm::BinaryOperator::Shl: O = O << O1;break;
+        case llvm::BinaryOperator::Or: O = O | O1;break;
+        case llvm::BinaryOperator::And: O = O & O1;break;
+        case llvm::BinaryOperator::Add: O = O + O1;break;
+        case llvm::BinaryOperator::Sub: O = O - O1;break;
+        case llvm::BinaryOperator::Mul: O = O * O1;break;
+        default: errs() <<"NOT HANDLED : " << BI << "\n";return false;
+        }
+      }
+    }
+    *Offset = O;
+    return true;
+  }
   /// Traverse the whole DSGraph, and propagate the unknown flags through all 
   /// out edges.
   static void propagateUnknownFlag(DSGraph * G) {
@@ -442,7 +491,8 @@
   Dest.getNode()->setModifiedMarker();
   unsigned Offset = 0;
   const Type* STy = I.getAggregateOperand()->getType();
-  for (llvm::ExtractValueInst::idx_iterator i = I.idx_begin(), e = I.idx_end(); i != e; i++) {
+  llvm::InsertValueInst::idx_iterator i = I.idx_begin(), e = I.idx_end(); 
+  for (; i != e; i++) {
     const StructLayout *SL = TD.getStructLayout(cast(STy));
     Offset += SL->getElementOffset(*i);
     STy = (cast(STy))->getTypeAtIndex(*i);
@@ -463,7 +513,8 @@
   Ptr.getNode()->setReadMarker();
   unsigned Offset = 0;
   const Type* STy = I.getAggregateOperand()->getType();
-  for (llvm::ExtractValueInst::idx_iterator i = I.idx_begin(), e = I.idx_end(); i != e; i++) {
+  llvm::ExtractValueInst::idx_iterator i = I.idx_begin(), e = I.idx_end();
+  for (; i != e; i++) {
     const StructLayout *SL = TD.getStructLayout(cast(STy));
     Offset += SL->getElementOffset(*i);
     STy = (cast(STy))->getTypeAtIndex(*i);
@@ -505,11 +556,11 @@
   unsigned Offset = 0;
 
   if(TypeInferenceOptimize) {
-  // Trying to special case constant index "inbounds" GEPs
+  // Trying to special case constant index GEPs
     if(GetElementPtrInst *GEPInst = dyn_cast(&GEP)) {
-      if(GEPInst->isInBounds())
       if(GEPInst->hasAllConstantIndices()){
-        if(GEPInst->getType() == llvm::Type::getInt8PtrTy(GEPInst->getParent()->getParent()->getContext()))
+        if(GEPInst->getType() == 
+           llvm::Type::getInt8PtrTy(GEPInst->getParent()->getParent()->getContext()))
           if(GEPInst->getNumIndices() == 1) {
             Offset = (cast(GEPInst->getOperand(1)))->getSExtValue();
             if(Value.getNode()->getSize() <= Value.getOffset() + (Offset+1)) {
@@ -526,7 +577,27 @@
     }
   }
 
-
+  if(TypeInferenceOptimize) {
+    if(GetElementPtrInst *GEPInst = dyn_cast(&GEP)) {
+      std::string name = GEPInst->getName();
+      if (strncmp(name.c_str(), "uglygep", 7) == 0) {
+        ++NumUglyGep;
+        assert(GEPInst->getNumOperands() == 2);
+        int O;
+        if(handleUglygep(GEPInst, &O)) {
+          if(Value.getNode()->getSize() <= Value.getOffset() + O+1) 
+            Value.getNode()->growSize(Value.getOffset() + O+1);
+          Value.setOffset(Value.getOffset()+O);
+          DSNode *N = Value.getNode();
+          if(O < 0)
+            N->foldNodeCompletely();
+          setDestTo(GEP, Value);
+          ++NumUglyGep1;
+          return;
+        }
+      }
+    }
+  }
   // FIXME: I am not sure if the code below is completely correct (especially
   //        if we start doing fancy analysis on non-constant array indices).
   //        What if the array is indexed using a larger index than its declared
@@ -566,6 +637,11 @@
       // indexing into an array.
       Value.getNode()->setArrayMarker();
       const Type *CurTy = ATy->getElementType();
+      if(TypeInferenceOptimize) {
+        //if(const ConstantInt* CUI = dyn_cast(I.getOperand()))
+          //if(ATy->getNumElements() > CUI->getZExtValue())
+            //CUI->dump();
+      }
 
       if(!isa(CurTy) &&
           Value.getNode()->getSize() <= 0) {
@@ -577,7 +653,6 @@
         }
         Value.getNode()->growSize(TD.getTypeAllocSize(ETy));
       }
-      // indexing into an array.
 
       // Find if the DSNode belongs to the array
       // If not fold.
@@ -771,7 +846,8 @@
     // Merge the first & second arguments, and mark the memory read and
     // modified.
     DSNodeHandle RetNH = getValueDest(*CS.arg_begin());
-    RetNH.mergeWith(getValueDest(*(CS.arg_begin()+1)));
+    if(!TypeInferenceOptimize)
+      RetNH.mergeWith(getValueDest(*(CS.arg_begin()+1)));
     if (DSNode *N = RetNH.getNode())
       N->setModifiedMarker()->setReadMarker();
     return true;



From anton at korobeynikov.info  Tue Feb  8 11:51:19 2011
From: anton at korobeynikov.info (Anton Korobeynikov)
Date: Tue, 8 Feb 2011 20:51:19 +0300
Subject: [llvm-commits] [llvm] r125089 - in /llvm/trunk/lib/CodeGen:
 CriticalAntiDepBreaker.cpp CriticalAntiDepBreaker.h
In-Reply-To: <20110208173946.4536E2A6C12C@llvm.org>
References: <20110208173946.4536E2A6C12C@llvm.org>
Message-ID: 

Hi Andrew,

> Avoid using the same register for two def operands or and earlyclobber
> def and use operand. This fixes PR8986 and improves on the prior fix
> for rdar://problem/8959122.
Cool! Does the same problem exist in aggressive atidep breaker, btw?

-- 
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University

From atrick at apple.com  Tue Feb  8 12:08:21 2011
From: atrick at apple.com (Andrew Trick)
Date: Tue, 8 Feb 2011 10:08:21 -0800
Subject: [llvm-commits] [llvm] r125089 - in /llvm/trunk/lib/CodeGen:
	CriticalAntiDepBreaker.cpp CriticalAntiDepBreaker.h
In-Reply-To: 
References: <20110208173946.4536E2A6C12C@llvm.org>
	
Message-ID: <1AA85739-F681-49E3-89AB-D7476054EF4E@apple.com>

Aggressive antidep breaker most likely has similar issues. It's different enough that I can't trivially apply my fix, and I don't have a test case. I also don't know if anyone is using it. I have it on my todo list to look into. Meanwhile, feel free to file a bug!

-Andy

On Feb 8, 2011, at 9:51 AM, Anton Korobeynikov wrote:

> Hi Andrew,
> 
>> Avoid using the same register for two def operands or and earlyclobber
>> def and use operand. This fixes PR8986 and improves on the prior fix
>> for rdar://problem/8959122.
> Cool! Does the same problem exist in aggressive atidep breaker, btw?
> 
> -- 
> With best regards, Anton Korobeynikov
> Faculty of Mathematics and Mechanics, Saint Petersburg State University



From atrick at apple.com  Tue Feb  8 12:07:10 2011
From: atrick at apple.com (Andrew Trick)
Date: Tue, 08 Feb 2011 18:07:10 -0000
Subject: [llvm-commits] [llvm] r125095 - in /llvm/trunk/tools/bugpoint:
 ExecutionDriver.cpp ToolRunner.h
Message-ID: <20110208180710.9F0A92A6C12C@llvm.org>

Author: atrick
Date: Tue Feb  8 12:07:10 2011
New Revision: 125095

URL: http://llvm.org/viewvc/llvm-project?rev=125095&view=rev
Log:
whitespace

Modified:
    llvm/trunk/tools/bugpoint/ExecutionDriver.cpp
    llvm/trunk/tools/bugpoint/ToolRunner.h

Modified: llvm/trunk/tools/bugpoint/ExecutionDriver.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/ExecutionDriver.cpp?rev=125095&r1=125094&r2=125095&view=diff
==============================================================================
--- llvm/trunk/tools/bugpoint/ExecutionDriver.cpp (original)
+++ llvm/trunk/tools/bugpoint/ExecutionDriver.cpp Tue Feb  8 12:07:10 2011
@@ -87,7 +87,7 @@
                          "into executing programs"));
 
   cl::list
-  AdditionalLinkerArgs("Xlinker", 
+  AdditionalLinkerArgs("Xlinker",
       cl::desc("Additional arguments to pass to the linker"));
 
   cl::opt
@@ -119,7 +119,7 @@
                cl::ZeroOrMore, cl::PositionalEatsArgs);
 
   cl::opt
-  GCCBinary("gcc", cl::init("gcc"), 
+  GCCBinary("gcc", cl::init("gcc"),
               cl::desc("The gcc binary to use. (default 'gcc')"));
 
   cl::list
@@ -157,7 +157,7 @@
     if (!Interpreter) {
       InterpreterSel = RunLLC;
       Interpreter = AbstractInterpreter::createLLC(getToolName(), Message,
-                                                   GCCBinary, &ToolArgv, 
+                                                   GCCBinary, &ToolArgv,
                                                    &GCCToolArgv);
     }
     if (!Interpreter) {
@@ -178,7 +178,7 @@
   case RunLLCIA:
   case LLC_Safe:
     Interpreter = AbstractInterpreter::createLLC(getToolName(), Message,
-                                                 GCCBinary, &ToolArgv, 
+                                                 GCCBinary, &ToolArgv,
                                                  &GCCToolArgv,
                                                  InterpreterSel == RunLLCIA);
     break;
@@ -189,7 +189,7 @@
   case RunCBE:
   case CBE_bug:
     Interpreter = AbstractInterpreter::createCBE(getToolName(), Message,
-                                                 GCCBinary, &ToolArgv, 
+                                                 GCCBinary, &ToolArgv,
                                                  &GCCToolArgv);
     break;
   case Custom:
@@ -216,7 +216,7 @@
       SafeInterpreterSel = RunLLC;
       SafeToolArgs.push_back("--relocation-model=pic");
       SafeInterpreter = AbstractInterpreter::createLLC(Path.c_str(), Message,
-                                                       GCCBinary, 
+                                                       GCCBinary,
                                                        &SafeToolArgs,
                                                        &GCCToolArgv);
     }
@@ -227,7 +227,7 @@
       SafeInterpreterSel = RunLLC;
       SafeToolArgs.push_back("--relocation-model=pic");
       SafeInterpreter = AbstractInterpreter::createLLC(Path.c_str(), Message,
-                                                       GCCBinary, 
+                                                       GCCBinary,
                                                        &SafeToolArgs,
                                                        &GCCToolArgv);
     }
@@ -249,7 +249,7 @@
       SafeInterpreterSel = RunLLC;
       SafeToolArgs.push_back("--relocation-model=pic");
       SafeInterpreter = AbstractInterpreter::createLLC(Path.c_str(), Message,
-                                                       GCCBinary, 
+                                                       GCCBinary,
                                                        &SafeToolArgs,
                                                        &GCCToolArgv);
     }
@@ -281,7 +281,7 @@
     break;
   }
   if (!SafeInterpreter) { outs() << Message << "\nExiting.\n"; exit(1); }
-  
+
   gcc = GCC::create(Message, GCCBinary, &GCCToolArgv);
   if (!gcc) { outs() << Message << "\nExiting.\n"; exit(1); }
 
@@ -298,7 +298,7 @@
   sys::Path BitcodeFile (OutputPrefix + "-test-program.bc");
   std::string ErrMsg;
   if (BitcodeFile.makeUnique(true, &ErrMsg)) {
-    errs() << ToolName << ": Error making unique filename: " << ErrMsg 
+    errs() << ToolName << ": Error making unique filename: " << ErrMsg
            << "\n";
     exit(1);
   }
@@ -432,7 +432,7 @@
 }
 
 /// createReferenceFile - calls compileProgram and then records the output
-/// into ReferenceOutputFile. Returns true if reference file created, false 
+/// into ReferenceOutputFile. Returns true if reference file created, false
 /// otherwise. Note: initializeExecutionEnvironment should be called BEFORE
 /// this function.
 ///

Modified: llvm/trunk/tools/bugpoint/ToolRunner.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/ToolRunner.h?rev=125095&r1=125094&r2=125095&view=diff
==============================================================================
--- llvm/trunk/tools/bugpoint/ToolRunner.h (original)
+++ llvm/trunk/tools/bugpoint/ToolRunner.h Tue Feb  8 12:07:10 2011
@@ -66,7 +66,7 @@
                      const std::string &OutputFile,
                      std::string *Error = 0,
                      const std::vector &GCCArgs =
-                         std::vector(), 
+                         std::vector(),
                      unsigned Timeout = 0,
                      unsigned MemoryLimit = 0);
 



From fvbommel at gmail.com  Tue Feb  8 12:14:53 2011
From: fvbommel at gmail.com (Frits van Bommel)
Date: Tue, 8 Feb 2011 19:14:53 +0100
Subject: [llvm-commits] [Review request] Have Correlated Value
 Propagation handle instruction operands.
In-Reply-To: <4D517367.9050105@free.fr>
References: 
	
	
	<4D517367.9050105@free.fr>
Message-ID: 

On Tue, Feb 8, 2011 at 5:46 PM, Duncan Sands  wrote:
>>> Do you done any measurements of the compile-time impact of this?
>> No, sorry. Duncan Sands was worried about this too...
>
> it is very expensive. ?I ran some comparisons and it is very visible that
> with
> your patch compilation is much slower.

:(

>?The obvious thing to do is to keep your
> logic but only analyse a small set of instructions, for example the ones it
> used
> to analyse (Select, PHI, I/FCmp, Load, Store) plus branch instructions.
> ?Sadly
> the result is disappointing: it catches way less stuff than my pass. ?I then
> tried with your original patch, i.e. analysing all instructions. ?It still
> catches way less stuff than my pass if I judge by the number of lines of
> bitcode
> removed. ?I don't understand this since indeed LVI knows lots of tricks, so
> it
> is probably worth trying to understand why correlated value propagation/LVI
> is
> not doing a better job.
>
> PS: Way less = order of magnitude.

One obvious thing to check for is whether the ability of your pass to
use e.g. X == Y even if neither is constant is a factor. LVI only
returns constants; what happens if your pass refuses to substitute
non-constants? Is the loss of effectiveness comparable?

I also noticed that LVI nor correlated value propagation requires
dominator info. Is this because LVI effectively calculates this
itself? If not, could this perhaps cause CVP+LVI to be overly
pessimistic if a condition is reused in a block that is only dominated
by the outgoing edge? (instead of directly in the block the outgoing
edge jumps to)

(Note that I only have a vague idea of how LVI works internally)


From atrick at apple.com  Tue Feb  8 12:20:48 2011
From: atrick at apple.com (Andrew Trick)
Date: Tue, 08 Feb 2011 18:20:48 -0000
Subject: [llvm-commits] [llvm] r125096 - in /llvm/trunk/tools/bugpoint:
 ExecutionDriver.cpp ToolRunner.cpp ToolRunner.h
Message-ID: <20110208182048.559472A6C12C@llvm.org>

Author: atrick
Date: Tue Feb  8 12:20:48 2011
New Revision: 125096

URL: http://llvm.org/viewvc/llvm-project?rev=125096&view=rev
Log:
Added bugpoint options: -compile-custom and -compile-command=...

I've been using this mode to narrow down llc unit tests. Example
custom compile script:
llc "$@"
not pygrep.py 'mul\s+r([0-9]), r\1,' < bugpoint-test-program.s

Modified:
    llvm/trunk/tools/bugpoint/ExecutionDriver.cpp
    llvm/trunk/tools/bugpoint/ToolRunner.cpp
    llvm/trunk/tools/bugpoint/ToolRunner.h

Modified: llvm/trunk/tools/bugpoint/ExecutionDriver.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/ExecutionDriver.cpp?rev=125096&r1=125095&r2=125096&view=diff
==============================================================================
--- llvm/trunk/tools/bugpoint/ExecutionDriver.cpp (original)
+++ llvm/trunk/tools/bugpoint/ExecutionDriver.cpp Tue Feb  8 12:20:48 2011
@@ -28,7 +28,8 @@
   // for miscompilation.
   //
   enum OutputType {
-    AutoPick, RunLLI, RunJIT, RunLLC, RunLLCIA, RunCBE, CBE_bug, LLC_Safe,Custom
+    AutoPick, RunLLI, RunJIT, RunLLC, RunLLCIA, RunCBE, CBE_bug, LLC_Safe,
+    CompileCustom, Custom
   };
 
   cl::opt
@@ -50,6 +51,9 @@
                             clEnumValN(RunCBE, "run-cbe", "Compile with CBE"),
                             clEnumValN(CBE_bug,"cbe-bug", "Find CBE bugs"),
                             clEnumValN(LLC_Safe, "llc-safe", "Use LLC for all"),
+                            clEnumValN(CompileCustom, "compile-custom",
+                            "Use -compile-command to define a command to "
+                            "compile the bitcode. Useful to avoid linking."),
                             clEnumValN(Custom, "run-custom",
                             "Use -exec-command to define a command to execute "
                             "the bitcode. Useful for cross-compilation."),
@@ -91,6 +95,11 @@
       cl::desc("Additional arguments to pass to the linker"));
 
   cl::opt
+  CustomCompileCommand("compile-command", cl::init("llc"),
+      cl::desc("Command to compile the bitcode (use with -compile-custom) "
+               "(default: llc)"));
+
+  cl::opt
   CustomExecCommand("exec-command", cl::init("simulate"),
       cl::desc("Command to execute the bitcode (use with -run-custom) "
                "(default: simulate)"));
@@ -192,8 +201,13 @@
                                                  GCCBinary, &ToolArgv,
                                                  &GCCToolArgv);
     break;
+  case CompileCustom:
+    Interpreter =
+      AbstractInterpreter::createCustomCompiler(Message, CustomCompileCommand);
+    break;
   case Custom:
-    Interpreter = AbstractInterpreter::createCustom(Message, CustomExecCommand);
+    Interpreter =
+      AbstractInterpreter::createCustomExecutor(Message, CustomExecCommand);
     break;
   default:
     Message = "Sorry, this back-end is not supported by bugpoint right now!\n";
@@ -272,8 +286,8 @@
                                                      &GCCToolArgv);
     break;
   case Custom:
-    SafeInterpreter = AbstractInterpreter::createCustom(Message,
-                                                        CustomExecCommand);
+    SafeInterpreter =
+      AbstractInterpreter::createCustomExecutor(Message, CustomExecCommand);
     break;
   default:
     Message = "Sorry, this back-end is not supported by bugpoint as the "

Modified: llvm/trunk/tools/bugpoint/ToolRunner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/ToolRunner.cpp?rev=125096&r1=125095&r2=125096&view=diff
==============================================================================
--- llvm/trunk/tools/bugpoint/ToolRunner.cpp (original)
+++ llvm/trunk/tools/bugpoint/ToolRunner.cpp Tue Feb  8 12:20:48 2011
@@ -250,6 +250,67 @@
 }
 
 //===---------------------------------------------------------------------===//
+// Custom compiler command implementation of AbstractIntepreter interface
+//
+// Allows using a custom command for compiling the bitcode, thus allows, for
+// example, to compile a bitcode fragment without linking or executing, then
+// using a custom wrapper script to check for compiler errors.
+namespace {
+  class CustomCompiler : public AbstractInterpreter {
+    std::string CompilerCommand;
+    std::vector CompilerArgs;
+  public:
+    CustomCompiler(
+      const std::string &CompilerCmd, std::vector CompArgs) :
+      CompilerCommand(CompilerCmd), CompilerArgs(CompArgs) {}
+
+    virtual void compileProgram(const std::string &Bitcode,
+                                std::string *Error,
+                                unsigned Timeout = 0,
+                                unsigned MemoryLimit = 0);
+
+    virtual int ExecuteProgram(const std::string &Bitcode,
+                               const std::vector &Args,
+                               const std::string &InputFile,
+                               const std::string &OutputFile,
+                               std::string *Error,
+                               const std::vector &GCCArgs =
+                               std::vector(),
+                               const std::vector &SharedLibs =
+                               std::vector(),
+                               unsigned Timeout = 0,
+                               unsigned MemoryLimit = 0) {
+      *Error = "Execution not supported with -compile-custom";
+      return -1;
+    }
+  };
+}
+
+void CustomCompiler::compileProgram(const std::string &Bitcode,
+                                    std::string *Error,
+                                    unsigned Timeout,
+                                    unsigned MemoryLimit) {
+
+  std::vector ProgramArgs;
+  ProgramArgs.push_back(CompilerCommand.c_str());
+
+  for (std::size_t i = 0; i < CompilerArgs.size(); ++i)
+    ProgramArgs.push_back(CompilerArgs.at(i).c_str());
+  ProgramArgs.push_back(Bitcode.c_str());
+  ProgramArgs.push_back(0);
+
+  // Add optional parameters to the running program from Argv
+  for (unsigned i = 0, e = CompilerArgs.size(); i != e; ++i)
+    ProgramArgs.push_back(CompilerArgs[i].c_str());
+
+  if (RunProgramWithTimeout( sys::Path(CompilerCommand), &ProgramArgs[0],
+                             sys::Path(), sys::Path(), sys::Path(),
+                             Timeout, MemoryLimit, Error))
+    *Error = ProcessFailure(sys::Path(CompilerCommand), &ProgramArgs[0],
+                           Timeout, MemoryLimit);
+}
+
+//===---------------------------------------------------------------------===//
 // Custom execution command implementation of AbstractIntepreter interface
 //
 // Allows using a custom command for executing the bitcode, thus allows,
@@ -305,51 +366,74 @@
     sys::Path(OutputFile), Timeout, MemoryLimit, Error);
 }
 
-// Custom execution environment create method, takes the execution command
-// as arguments
-AbstractInterpreter *AbstractInterpreter::createCustom(
-                    std::string &Message,
-                    const std::string &ExecCommandLine) {
+// Tokenize the CommandLine to the command and the args to allow
+// defining a full command line as the command instead of just the
+// executed program. We cannot just pass the whole string after the command
+// as a single argument because then program sees only a single
+// command line argument (with spaces in it: "foo bar" instead
+// of "foo" and "bar").
+//
+// code borrowed from:
+// http://oopweb.com/CPP/Documents/CPPHOWTO/Volume/C++Programming-HOWTO-7.html
+static void lexCommand(std::string &Message, const std::string &CommandLine,
+                       std::string &CmdPath, std::vector Args) {
 
   std::string Command = "";
-  std::vector Args;
   std::string delimiters = " ";
 
-  // Tokenize the ExecCommandLine to the command and the args to allow
-  // defining a full command line as the command instead of just the
-  // executed program. We cannot just pass the whole string after the command
-  // as a single argument because then program sees only a single
-  // command line argument (with spaces in it: "foo bar" instead
-  // of "foo" and "bar").
-
-  // code borrowed from:
-  // http://oopweb.com/CPP/Documents/CPPHOWTO/Volume/C++Programming-HOWTO-7.html
-  std::string::size_type lastPos =
-    ExecCommandLine.find_first_not_of(delimiters, 0);
-  std::string::size_type pos =
-    ExecCommandLine.find_first_of(delimiters, lastPos);
+  std::string::size_type lastPos = CommandLine.find_first_not_of(delimiters, 0);
+  std::string::size_type pos = CommandLine.find_first_of(delimiters, lastPos);
 
   while (std::string::npos != pos || std::string::npos != lastPos) {
-    std::string token = ExecCommandLine.substr(lastPos, pos - lastPos);
+    std::string token = CommandLine.substr(lastPos, pos - lastPos);
     if (Command == "")
        Command = token;
     else
        Args.push_back(token);
     // Skip delimiters.  Note the "not_of"
-    lastPos = ExecCommandLine.find_first_not_of(delimiters, pos);
+    lastPos = CommandLine.find_first_not_of(delimiters, pos);
     // Find next "non-delimiter"
-    pos = ExecCommandLine.find_first_of(delimiters, lastPos);
+    pos = CommandLine.find_first_of(delimiters, lastPos);
   }
 
-  std::string CmdPath = sys::Program::FindProgramByName(Command).str();
+  CmdPath = sys::Program::FindProgramByName(Command).str();
   if (CmdPath.empty()) {
     Message =
       std::string("Cannot find '") + Command +
       "' in PATH!\n";
-    return 0;
+    return;
   }
 
   Message = "Found command in: " + CmdPath + "\n";
+}
+
+// Custom execution environment create method, takes the execution command
+// as arguments
+AbstractInterpreter *AbstractInterpreter::createCustomCompiler(
+                    std::string &Message,
+                    const std::string &CompileCommandLine) {
+
+  std::string CmdPath;
+  std::vector Args;
+  lexCommand(Message, CompileCommandLine, CmdPath, Args);
+  if (CmdPath.empty())
+    return 0;
+
+  return new CustomCompiler(CmdPath, Args);
+}
+
+// Custom execution environment create method, takes the execution command
+// as arguments
+AbstractInterpreter *AbstractInterpreter::createCustomExecutor(
+                    std::string &Message,
+                    const std::string &ExecCommandLine) {
+
+
+  std::string CmdPath;
+  std::vector Args;
+  lexCommand(Message, ExecCommandLine, CmdPath, Args);
+  if (CmdPath.empty())
+    return 0;
 
   return new CustomExecutor(CmdPath, Args);
 }

Modified: llvm/trunk/tools/bugpoint/ToolRunner.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/ToolRunner.h?rev=125096&r1=125095&r2=125096&view=diff
==============================================================================
--- llvm/trunk/tools/bugpoint/ToolRunner.h (original)
+++ llvm/trunk/tools/bugpoint/ToolRunner.h Tue Feb  8 12:20:48 2011
@@ -103,8 +103,13 @@
   static AbstractInterpreter* createJIT(const char *Argv0, std::string &Message,
                                         const std::vector *Args=0);
 
-  static AbstractInterpreter* createCustom(std::string &Message,
-                                           const std::string &ExecCommandLine);
+  static AbstractInterpreter*
+  createCustomCompiler(std::string &Message,
+                       const std::string &CompileCommandLine);
+
+  static AbstractInterpreter*
+  createCustomExecutor(std::string &Message,
+                       const std::string &ExecCommandLine);
 
 
   virtual ~AbstractInterpreter() {}



From stoklund at 2pi.dk  Tue Feb  8 12:50:19 2011
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Tue, 08 Feb 2011 18:50:19 -0000
Subject: [llvm-commits] [llvm] r125101 - /llvm/trunk/lib/CodeGen/SplitKit.cpp
Message-ID: <20110208185019.1C5812A6C12C@llvm.org>

Author: stoklund
Date: Tue Feb  8 12:50:18 2011
New Revision: 125101

URL: http://llvm.org/viewvc/llvm-project?rev=125101&view=rev
Log:
Add assertion.

Modified:
    llvm/trunk/lib/CodeGen/SplitKit.cpp

Modified: llvm/trunk/lib/CodeGen/SplitKit.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SplitKit.cpp?rev=125101&r1=125100&r2=125101&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SplitKit.cpp (original)
+++ llvm/trunk/lib/CodeGen/SplitKit.cpp Tue Feb  8 12:50:18 2011
@@ -857,9 +857,10 @@
   }
   DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
 
-  MachineBasicBlock::iterator MII = LIS.getInstructionFromIndex(Idx);
-  VNInfo *VNI = defFromParent(0, ParentVNI, Idx,
-                              *MII->getParent(), llvm::next(MII));
+  MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
+  assert(MI && "No instruction at index");
+  VNInfo *VNI = defFromParent(0, ParentVNI, Idx, *MI->getParent(),
+                              llvm::next(MachineBasicBlock::iterator(MI)));
   return VNI->def;
 }
 



From stoklund at 2pi.dk  Tue Feb  8 12:50:21 2011
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Tue, 08 Feb 2011 18:50:21 -0000
Subject: [llvm-commits] [llvm] r125102 - in /llvm/trunk/lib/CodeGen:
 RegAllocGreedy.cpp SplitKit.cpp SplitKit.h
Message-ID: <20110208185021.ECDBC2A6C12D@llvm.org>

Author: stoklund
Date: Tue Feb  8 12:50:21 2011
New Revision: 125102

URL: http://llvm.org/viewvc/llvm-project?rev=125102&view=rev
Log:
Add SplitEditor::overlapIntv() to create small ranges where both registers are live.

If a live range is used by a terminator instruction, and that live range needs
to leave the block on the stack or in a different register, it can be necessary
to have both sides of the split live at the terminator instruction.

Example:

  %vreg2 = COPY %vreg1
  JMP %vreg1

Becomes after spilling %vreg2:

  SPILL %vreg1
  JMP %vreg1

The spill doesn't kill the register as is normally the case.

Modified:
    llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
    llvm/trunk/lib/CodeGen/SplitKit.cpp
    llvm/trunk/lib/CodeGen/SplitKit.h

Modified: llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp?rev=125102&r1=125101&r2=125102&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp Tue Feb  8 12:50:21 2011
@@ -746,6 +746,7 @@
       assert(Use <= BI.LastUse && "Couldn't find last use");
       SlotIndex SegStart = SE.enterIntvBefore(Use);
       assert(SegStart >= IP.second && "Couldn't avoid interference");
+      assert(SegStart < BI.LastSplitPoint && "Impossible split point");
       SE.useIntv(SegStart, Stop);
       continue;
     }
@@ -798,8 +799,30 @@
       if (!RegOut) {
         // Block is live-through, but exit bundle is on the stack.
         // Spill immediately after the last use.
-        DEBUG(dbgs() << ", uses, stack-out.\n");
-        SE.useIntv(Start, SE.leaveIntvAfter(BI.LastUse));
+        if (BI.LastUse < BI.LastSplitPoint) {
+          DEBUG(dbgs() << ", uses, stack-out.\n");
+          SE.useIntv(Start, SE.leaveIntvAfter(BI.LastUse));
+          continue;
+        }
+        // The last use is after the last split point, it is probably an
+        // indirect jump.
+        DEBUG(dbgs() << ", uses at " << BI.LastUse << " after split point "
+                     << BI.LastSplitPoint << ", stack-out.\n");
+        SlotIndex SegEnd;
+        if (BI.LastSplitPoint == Start)
+          SegEnd = SE.leaveIntvAtTop(*BI.MBB);
+        else {
+          MachineBasicBlock::iterator I =
+            LIS->getInstructionFromIndex(BI.LastSplitPoint);
+          do assert(I != BI.MBB->begin() && "Expected instruction");
+          while ((--I)->isDebugValue());
+          SegEnd = SE.leaveIntvAfter(LIS->getInstructionIndex(I));
+        }
+        SE.useIntv(Start, SegEnd);
+        // Run a double interval from the split to the last use.
+        // This makes it possible to spill the complement without affecting the
+        // indirect branch.
+        SE.overlapIntv(SegEnd, BI.LastUse);
         continue;
       }
       // Register is live-through.

Modified: llvm/trunk/lib/CodeGen/SplitKit.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SplitKit.cpp?rev=125102&r1=125101&r2=125102&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SplitKit.cpp (original)
+++ llvm/trunk/lib/CodeGen/SplitKit.cpp Tue Feb  8 12:50:21 2011
@@ -882,6 +882,22 @@
   return VNI->def;
 }
 
+void SplitEditor::overlapIntv(SlotIndex Start, SlotIndex End) {
+  assert(OpenIdx && "openIntv not called before overlapIntv");
+  assert(Edit.getParent().getVNInfoAt(Start) ==
+         Edit.getParent().getVNInfoAt(End.getPrevSlot()) &&
+         "Parent changes value in extended range");
+  assert(Edit.get(0)->getVNInfoAt(Start) && "Start must come from leaveIntv*");
+  assert(LIS.getMBBFromIndex(Start) == LIS.getMBBFromIndex(End) &&
+         "Range cannot span basic blocks");
+
+  // Treat this as useIntv() for now. The complement interval will be extended
+  // as needed by mapValue().
+  DEBUG(dbgs() << "    overlapIntv [" << Start << ';' << End << "):");
+  RegAssign.insert(Start, End, OpenIdx);
+  DEBUG(dump());
+}
+
 /// closeIntv - Indicate that we are done editing the currently open
 /// LiveInterval, and ranges can be trimmed.
 void SplitEditor::closeIntv() {

Modified: llvm/trunk/lib/CodeGen/SplitKit.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SplitKit.h?rev=125102&r1=125101&r2=125102&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SplitKit.h (original)
+++ llvm/trunk/lib/CodeGen/SplitKit.h Tue Feb  8 12:50:21 2011
@@ -377,6 +377,18 @@
   /// Return the end of the live range.
   SlotIndex leaveIntvAtTop(MachineBasicBlock &MBB);
 
+  /// overlapIntv - Indicate that all instructions in range should use the open
+  /// interval, but also let the complement interval be live.
+  ///
+  /// This doubles the register pressure, but is sometimes required to deal with
+  /// register uses after the last valid split point.
+  ///
+  /// The Start index should be a return value from a leaveIntv* call, and End
+  /// should be in the same basic block. The parent interval must have the same
+  /// value across the range.
+  ///
+  void overlapIntv(SlotIndex Start, SlotIndex End);
+
   /// closeIntv - Indicate that we are done editing the currently open
   /// LiveInterval, and ranges can be trimmed.
   void closeIntv();



From greened at obbligato.org  Tue Feb  8 13:04:41 2011
From: greened at obbligato.org (David Greene)
Date: Tue, 08 Feb 2011 19:04:41 -0000
Subject: [llvm-commits] [llvm] r125105 -
	/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
Message-ID: <20110208190442.036ED2A6C12C@llvm.org>

Author: greened
Date: Tue Feb  8 13:04:41 2011
New Revision: 125105

URL: http://llvm.org/viewvc/llvm-project?rev=125105&view=rev
Log:

[AVX] Implement BUILD_VECTOR lowering for 256-bit vectors.  For
anything but the simplest of cases, lower a 256-bit BUILD_VECTOR by
splitting it into 128-bit parts and recombining.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=125105&r1=125104&r2=125105&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Feb  8 13:04:41 2011
@@ -56,6 +56,10 @@
 
 STATISTIC(NumTailCalls, "Number of tail calls");
 
+static cl::opt
+Disable256Bit("disable-256bit", cl::Hidden,
+              cl::desc("Disable use of 256-bit vectors"));
+
 // Forward declarations.
 static SDValue getMOVL(SelectionDAG &DAG, DebugLoc dl, EVT VT, SDValue V1,
                        SDValue V2);
@@ -65,11 +69,15 @@
                                   SDValue Idx,
                                   SelectionDAG &DAG,
                                   DebugLoc dl);
+
 static SDValue Extract128BitVector(SDValue Vec,
                                    SDValue Idx,
                                    SelectionDAG &DAG,
                                    DebugLoc dl);
 
+static SDValue ConcatVectors(SDValue Lower, SDValue Upper, SelectionDAG &DAG);
+
+
 /// Generate a DAG to grab 128-bits from a vector > 128 bits.  This
 /// sets things up to match to an AVX VEXTRACTF128 instruction or a
 /// simple subregister reference.
@@ -151,6 +159,34 @@
   return SDValue();
 }
 
+/// Given two vectors, concat them.
+static SDValue ConcatVectors(SDValue Lower, SDValue Upper, SelectionDAG &DAG) {
+  DebugLoc dl = Lower.getDebugLoc();
+
+  assert(Lower.getValueType() == Upper.getValueType() && "Mismatched vectors!");
+
+  EVT VT = EVT::getVectorVT(*DAG.getContext(),
+                            Lower.getValueType().getVectorElementType(),
+                            Lower.getValueType().getVectorNumElements() * 2);
+
+  // TODO: Generalize to arbitrary vector length (this assumes 256-bit vectors).
+  assert(VT.getSizeInBits() == 256 && "Unsupported vector concat!");
+
+  // Insert the upper subvector.
+  SDValue Vec = Insert128BitVector(DAG.getNode(ISD::UNDEF, dl, VT), Upper,
+                                   DAG.getConstant(
+                                     // This is half the length of the result
+                                     // vector.  Start inserting the upper 128
+                                     // bits here.
+                                     Lower.getValueType().getVectorNumElements(),
+                                     MVT::i32),
+                                   DAG, dl);
+
+  // Insert the lower subvector.
+  Vec = Insert128BitVector(Vec, Lower, DAG.getConstant(0, MVT::i32), DAG, dl);
+  return Vec;
+}
+
 static TargetLoweringObjectFile *createTLOF(X86TargetMachine &TM) {
   const X86Subtarget *Subtarget = &TM.getSubtarget();
   bool is64Bit = Subtarget->is64Bit();
@@ -4281,6 +4317,34 @@
 X86TargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const {
   DebugLoc dl = Op.getDebugLoc();
 
+  EVT VT = Op.getValueType();
+  EVT ExtVT = VT.getVectorElementType();
+
+  unsigned NumElems = Op.getNumOperands();
+
+  // For AVX-length vectors, build the individual 128-bit pieces and
+  // use shuffles to put them in place.
+  if (VT.getSizeInBits() > 256 && 
+      Subtarget->hasAVX() && 
+      !Disable256Bit &&
+      !ISD::isBuildVectorAllZeros(Op.getNode())) {
+    SmallVector V;
+    V.resize(NumElems);
+    for (unsigned i = 0; i < NumElems; ++i) {
+      V[i] = Op.getOperand(i);
+    }
+ 
+    EVT HVT = EVT::getVectorVT(*DAG.getContext(), ExtVT, NumElems/2);
+
+    // Build the lower subvector.
+    SDValue Lower = DAG.getNode(ISD::BUILD_VECTOR, dl, HVT, &V[0], NumElems/2);
+    // Build the upper subvector.
+    SDValue Upper = DAG.getNode(ISD::BUILD_VECTOR, dl, HVT, &V[NumElems / 2],
+                                NumElems/2);
+
+    return ConcatVectors(Lower, Upper, DAG);
+  }
+
   // All zero's are handled with pxor in SSE2 and above, xorps in SSE1.
   // All one's are handled with pcmpeqd. In AVX, zero's are handled with
   // vpxor in 128-bit and xor{pd,ps} in 256-bit, but no 256 version of pcmpeqd
@@ -4299,11 +4363,8 @@
     return getZeroVector(Op.getValueType(), Subtarget->hasSSE2(), DAG, dl);
   }
 
-  EVT VT = Op.getValueType();
-  EVT ExtVT = VT.getVectorElementType();
   unsigned EVTBits = ExtVT.getSizeInBits();
 
-  unsigned NumElems = Op.getNumOperands();
   unsigned NumZero  = 0;
   unsigned NumNonZero = 0;
   unsigned NonZeros = 0;



From grosbach at apple.com  Tue Feb  8 13:33:05 2011
From: grosbach at apple.com (Jim Grosbach)
Date: Tue, 8 Feb 2011 11:33:05 -0800
Subject: [llvm-commits] [llvm] r124870 - in /llvm/trunk:
	include/llvm/Target/Target.td utils/TableGen/AsmMatcherEmitter.cpp
In-Reply-To: <20110204171215.7FE862A6C12C@llvm.org>
References: <20110204171215.7FE862A6C12C@llvm.org>
Message-ID: 

Hi Daniel,

This looks very interesting, but I'm not completely clear what it's for. Do you have an example in mind I could look at?

Tangentially, being able to do something similar on an InstAlias would be very handy. That is, by able to have match classes on input operands and then have a transform function for setting the output MCInst.

-Jim

On Feb 4, 2011, at 9:12 AM, Daniel Dunbar wrote:

> Author: ddunbar
> Date: Fri Feb  4 11:12:15 2011
> New Revision: 124870
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=124870&view=rev
> Log:
> MC/AsmMatcher: Add support for custom conversion functions.
> 
> Modified:
>    llvm/trunk/include/llvm/Target/Target.td
>    llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp
> 
> Modified: llvm/trunk/include/llvm/Target/Target.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/Target.td?rev=124870&r1=124869&r2=124870&view=diff
> ==============================================================================
> --- llvm/trunk/include/llvm/Target/Target.td (original)
> +++ llvm/trunk/include/llvm/Target/Target.td Fri Feb  4 11:12:15 2011
> @@ -248,6 +248,13 @@
> 
>   /// Target-specific flags. This becomes the TSFlags field in TargetInstrDesc.
>   bits<64> TSFlags = 0;
> +
> +  ///@name Assembler Parser Support
> +  ///@{
> +
> +  string AsmMatchConverter = "";
> +
> +  ///@}
> }
> 
> /// Predicates - These are extra conditionals which are turned into instruction
> 
> Modified: llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp?rev=124870&r1=124869&r2=124870&view=diff
> ==============================================================================
> --- llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp (original)
> +++ llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp Fri Feb  4 11:12:15 2011
> @@ -1388,6 +1388,26 @@
>          ie = Infos.end(); it != ie; ++it) {
>     MatchableInfo &II = **it;
> 
> +    // Check if we have a custom match function.
> +    StringRef AsmMatchConverter = II.getResultInst()->TheDef->getValueAsString(
> +      "AsmMatchConverter");
> +    if (!AsmMatchConverter.empty()) {
> +      std::string Signature = "ConvertCustom_" + AsmMatchConverter.str();
> +      II.ConversionFnKind = Signature;
> +
> +      // Check if we have already generated this signature.
> +      if (!GeneratedFns.insert(Signature).second)
> +        continue;
> +
> +      // If not, emit it now.  Add to the enum list.
> +      OS << "  " << Signature << ",\n";
> +
> +      CvtOS << "  case " << Signature << ":\n";
> +      CvtOS << "    " << AsmMatchConverter << "(Inst, Opcode, Operands);\n";
> +      CvtOS << "    return;\n";
> +      continue;
> +    }
> +
>     // Build the conversion function signature.
>     std::string Signature = "Convert";
>     std::string CaseBody;
> @@ -1988,7 +2008,6 @@
>        it != ie; ++it) {
>     MatchableInfo &II = **it;
> 
> -
>     OS << "  { " << Target.getName() << "::"
>        << II.getResultInst()->TheDef->getName() << ", \"" << II.Mnemonic << "\""
>        << ", " << II.ConversionFnKind << ", { ";
> 
> 
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From aggarwa4 at illinois.edu  Tue Feb  8 13:30:32 2011
From: aggarwa4 at illinois.edu (Arushi Aggarwal)
Date: Tue, 08 Feb 2011 19:30:32 -0000
Subject: [llvm-commits] [poolalloc] r125107 -
	/poolalloc/trunk/lib/DSA/Local.cpp
Message-ID: <20110208193032.D53D62A6C12C@llvm.org>

Author: aggarwa4
Date: Tue Feb  8 13:30:32 2011
New Revision: 125107

URL: http://llvm.org/viewvc/llvm-project?rev=125107&view=rev
Log:
Offset calculated for a GEP Instruction might be
negative.

Modified:
    poolalloc/trunk/lib/DSA/Local.cpp

Modified: poolalloc/trunk/lib/DSA/Local.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/Local.cpp?rev=125107&r1=125106&r2=125107&view=diff
==============================================================================
--- poolalloc/trunk/lib/DSA/Local.cpp (original)
+++ poolalloc/trunk/lib/DSA/Local.cpp Tue Feb  8 13:30:32 2011
@@ -553,7 +553,7 @@
   // indexed.
   //
  
-  unsigned Offset = 0;
+  int Offset = 0;
 
   if(TypeInferenceOptimize) {
   // Trying to special case constant index GEPs
@@ -568,7 +568,7 @@
             }
             Value.setOffset(Value.getOffset()+Offset);
             DSNode *N = Value.getNode();
-            if((int)Offset < 0)
+            if(((int)Value.getOffset() + Offset) < 0)
               N->foldNodeCompletely();
             setDestTo(GEP, Value);
             return;
@@ -589,7 +589,7 @@
             Value.getNode()->growSize(Value.getOffset() + O+1);
           Value.setOffset(Value.getOffset()+O);
           DSNode *N = Value.getNode();
-          if(O < 0)
+          if(((int)Value.getOffset() + O) < 0)
             N->foldNodeCompletely();
           setDestTo(GEP, Value);
           ++NumUglyGep1;
@@ -598,6 +598,7 @@
       }
     }
   }
+  
   // FIXME: I am not sure if the code below is completely correct (especially
   //        if we start doing fancy analysis on non-constant array indices).
   //        What if the array is indexed using a larger index than its declared
@@ -711,7 +712,7 @@
       !N->isNodeCompletelyFolded() &&
       (N->getSize() != 0 || Offset != 0) &&
       !N->isForwarding()) {
-    if ((Offset >= N->getSize()) || int(Offset) < 0) {
+    if ((Offset >= (int)N->getSize()) || Offset < 0) {
       // Accessing offsets out of node size range
       // This is seen in the "magic" struct in named (from bind), where the
       // fourth field is an array of length 0, presumably used to create struct



From stoklund at 2pi.dk  Tue Feb  8 13:33:56 2011
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Tue, 08 Feb 2011 19:33:56 -0000
Subject: [llvm-commits] [llvm] r125108 -
	/llvm/trunk/lib/CodeGen/InlineSpiller.cpp
Message-ID: <20110208193356.2D8152A6C12C@llvm.org>

Author: stoklund
Date: Tue Feb  8 13:33:55 2011
New Revision: 125108

URL: http://llvm.org/viewvc/llvm-project?rev=125108&view=rev
Log:
Avoid folding a load instruction into an instruction that redefines the register.

The target hook doesn't know how to do that. (Neither do I).

Modified:
    llvm/trunk/lib/CodeGen/InlineSpiller.cpp

Modified: llvm/trunk/lib/CodeGen/InlineSpiller.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/InlineSpiller.cpp?rev=125108&r1=125107&r2=125108&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/InlineSpiller.cpp (original)
+++ llvm/trunk/lib/CodeGen/InlineSpiller.cpp Tue Feb  8 13:33:55 2011
@@ -157,7 +157,8 @@
   // Finally we can rematerialize OrigMI before MI.
   SlotIndex DefIdx = edit_->rematerializeAt(*MI->getParent(), MI, NewLI.reg, RM,
                                             lis_, tii_, tri_);
-  DEBUG(dbgs() << "\tremat:  " << DefIdx << '\n');
+  DEBUG(dbgs() << "\tremat:  " << DefIdx << '\t'
+               << *lis_.getInstructionFromIndex(DefIdx));
 
   // Replace operands
   for (unsigned i = 0, e = Ops.size(); i != e; ++i) {
@@ -270,6 +271,9 @@
     // FIXME: Teach targets to deal with subregs.
     if (MO.getSubReg())
       return false;
+    // We cannot fold a load instruction into a def.
+    if (LoadMI && MO.isDef())
+      return false;
     // Tied use operands should not be passed to foldMemoryOperand.
     if (!MI->isRegTiedToDefOperand(Idx))
       FoldOps.push_back(Idx);



From stoklund at 2pi.dk  Tue Feb  8 13:33:58 2011
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Tue, 08 Feb 2011 19:33:58 -0000
Subject: [llvm-commits] [llvm] r125109 -
	/llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
Message-ID: <20110208193358.DE4832A6C12D@llvm.org>

Author: stoklund
Date: Tue Feb  8 13:33:58 2011
New Revision: 125109

URL: http://llvm.org/viewvc/llvm-project?rev=125109&view=rev
Log:
Trim debug spew

Modified:
    llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp

Modified: llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp?rev=125109&r1=125108&r2=125109&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp Tue Feb  8 13:33:58 2011
@@ -444,7 +444,6 @@
   for (const unsigned *AI = TRI->getOverlaps(PhysReg); *AI; ++AI) {
     if (!query(VirtReg, *AI).checkInterference())
       continue;
-    DEBUG(PhysReg2LiveUnion[*AI].print(dbgs(), TRI));
     LiveIntervalUnion::SegmentIter IntI =
       PhysReg2LiveUnion[*AI].find(VirtReg.beginIndex());
     if (!IntI.valid())



From clattner at apple.com  Tue Feb  8 13:51:05 2011
From: clattner at apple.com (Chris Lattner)
Date: Tue, 08 Feb 2011 13:51:05 -0600
Subject: [llvm-commits] [llvm] r125006 - in /llvm/trunk:
 docs/LangRef.html include/llvm/Constants.h include/llvm/Operator.h
 lib/AsmParser/LLParser.cpp lib/Bitcode/Reader/BitcodeReader.cpp
 lib/VMCore/Constants.cpp test/Assembler/2003-05-21-MalformedShiftCrash.ll
 test/Assembler/flags.ll
In-Reply-To: <4D505C7B.6090907@free.fr>
References: <20110207164022.3F67C2A6C12D@llvm.org> <4D505C7B.6090907@free.fr>
Message-ID: 

Thanks will fix.  FYI I have a bunch of related patches queued up and ready to submit once I get wifi access again.  Please hold off on related patches for a bit :)

-Chris

On Feb 7, 2011, at 2:56 PM, Duncan Sands  wrote:

> Hi Chris,
> 
>> @@ -3704,6 +3707,14 @@
>>     vectors, each vector element ofop1  is shifted by the corresponding
>>     shift amount inop2.

>> >> +

If thenuw keyword is present, then the shift produces a >> +trap value if it shifts out any non-zero bits. If >> + thensw keywrod is present, then the shift produces a > > keywrod -> keyword > > Ciao, Duncan. > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From echristo at apple.com Tue Feb 8 14:00:12 2011 From: echristo at apple.com (Eric Christopher) Date: Tue, 8 Feb 2011 12:00:12 -0800 Subject: [llvm-commits] [PATCH] lib/Support: Always include Windows/Windows.h! In-Reply-To: References: Message-ID: On Feb 7, 2011, at 9:28 PM, NAKAMURA Takumi wrote: > --- > lib/Support/DynamicLibrary.cpp | 4 ++++ > lib/Support/Host.cpp | 4 ++++ > lib/Support/Memory.cpp | 4 ++++ > lib/Support/Mutex.cpp | 4 ++++ > lib/Support/Path.cpp | 7 +++++++ > lib/Support/PathV2.cpp | 4 ++++ > lib/Support/Process.cpp | 4 ++++ > lib/Support/Program.cpp | 4 ++++ > lib/Support/RWMutex.cpp | 4 ++++ > lib/Support/Signals.cpp | 4 ++++ > lib/Support/ThreadLocal.cpp | 4 ++++ > lib/Support/TimeValue.cpp | 4 ++++ > lib/Support/Windows/Windows.h | 5 +++++ > 13 files changed, 56 insertions(+), 0 deletions(-) > > I intend to avoid macro collision, to include "Windows/Windows.h" at first. > I think this is not smart. :( > <0001-lib-Support-Always-include-Windows-Windows.h.patch.txt> Uh, eew? -eric -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110208/81c97bc6/attachment.html From echristo at apple.com Tue Feb 8 14:01:07 2011 From: echristo at apple.com (Eric Christopher) Date: Tue, 8 Feb 2011 12:01:07 -0800 Subject: [llvm-commits] [Review request][Win64] Patches for Mingw-w64(and mingw64-clang) In-Reply-To: References: Message-ID: <3B0F3253-966A-496E-9A27-D002869931E0@apple.com> On Feb 7, 2011, at 9:27 PM, NAKAMURA Takumi wrote: > ---Part 1 > https://github.com/chapuni/LLVM/commits/mingw64/20110208/ > > NAKAMURA Takumi (5): > Windows/Program.inc: Eliminate the declaration of > SetInformationJobObject(). It should be provided with > _WIN32_WINNT>=0x0500. > Windows/DynamicLibrary.inc: ELM_Callback fix > autoconf: Seek strerror_s() with AC_CHECK_DECLS. > Regenerate configure. (**** unsent ***) > lib/Support/Errno.cpp: Check strerror_s() with HAVE_DECL_STRERROR_S > int config.h.*. > > autoconf/configure.ac | 5 ++- > cmake/config-ix.cmake | 2 +- > configure | 90 +++++++++++++++++++++++++++++++- > include/llvm/Config/config.h.cmake | 7 ++- > include/llvm/Config/config.h.in | 7 ++- > lib/Support/Errno.cpp | 2 +- > lib/Support/Windows/DynamicLibrary.inc | 12 ++++- > lib/Support/Windows/Program.inc | 9 --- > 8 files changed, 113 insertions(+), 21 deletions(-) > > ---Part 2-1 (exclusive against part 2-2) > https://github.com/chapuni/LLVM/commits/mingw64/20110208-1 > > NAKAMURA Takumi (1): > Windows/Windows.h: Redefine _WIN32_WINNT here. mingw-w64 tends to > define it as 0x0502 in its headers. > > lib/Support/Windows/Windows.h | 3 +++ > 1 files changed, 3 insertions(+), 0 deletions(-) > > ---Part 2-2 (exclusive against part 2-1) > https://github.com/chapuni/LLVM/commits/mingw64/20110208-2 > > These all looked ok, if not great. > NAKAMURA Takumi (1): > lib/Support: Always include Windows/Windows.h! > > lib/Support/DynamicLibrary.cpp | 4 ++++ > lib/Support/Host.cpp | 4 ++++ > lib/Support/Memory.cpp | 4 ++++ > lib/Support/Mutex.cpp | 4 ++++ > lib/Support/Path.cpp | 7 +++++++ > lib/Support/PathV2.cpp | 4 ++++ > lib/Support/Process.cpp | 4 ++++ > lib/Support/Program.cpp | 4 ++++ > lib/Support/RWMutex.cpp | 4 ++++ > lib/Support/Signals.cpp | 4 ++++ > lib/Support/ThreadLocal.cpp | 4 ++++ > lib/Support/TimeValue.cpp | 4 ++++ > lib/Support/Windows/Windows.h | 5 +++++ > 13 files changed, 56 insertions(+), 0 deletions(-) I responded to this one, but we can keep it here too. "Uh, eew?" -eric -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110208/928e452e/attachment.html From joerg at britannica.bec.de Tue Feb 8 14:22:56 2011 From: joerg at britannica.bec.de (Joerg Sonnenberger) Date: Tue, 8 Feb 2011 21:22:56 +0100 Subject: [llvm-commits] [PATCH] [MC] Support for .ifdef / .ifndef In-Reply-To: <20110205233414.GA12822@britannica.bec.de> References: <20110205233414.GA12822@britannica.bec.de> Message-ID: <20110208202256.GA7581@britannica.bec.de> Stricter test cases are attached. Joerg -------------- next part -------------- # RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s # CHECK-NOT: .byte 0 # CHECK: .byte 1 .ifdef undefined .byte 0 .else .byte 1 .endif defined: # CHECK: .byte 1 # CHECK-NOT: .byte 0 .ifdef defined .byte 1 .else .byte 0 .endif movl %eax, undefined # CHECK-NOT: .byte 0 # CHECK: .byte 1 .ifdef undefined .byte 0 .else .byte 1 .endif -------------- next part -------------- # RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s # CHECK: .byte 1 # CHECK-NOT: byte 0 .ifndef undefined .byte 1 .else .byte 0 .endif defined: # CHECK-NOT: byte 0 # CHECK: .byte 1 .ifndef defined .byte 0 .else .byte 1 .endif movl %eax, undefined # CHECK: .byte 1 # CHECK-NOT: byte 0 .ifndef undefined .byte 1 .else .byte 0 .endif From rafael.espindola at gmail.com Tue Feb 8 15:02:58 2011 From: rafael.espindola at gmail.com (Rafael Avila de Espindola) Date: Tue, 08 Feb 2011 16:02:58 -0500 Subject: [llvm-commits] [patch][gold-plugin] Don't open the files already opened by gold Message-ID: <4D51AF82.8060702@gmail.com> I noticed that we were opening the same file three times. Once in gold and twice via libLTO. This patch fixes that. The only big change is that MemoryBuffer::getOpenFile will not close the files any more . I have updated the callers. Let me know if I should add a MemoryBuffer::getOpenFile2 or something. Cheers, Rafael -------------- next part -------------- A non-text attachment was scrubbed... Name: clang.patch Type: text/x-patch Size: 551 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110208/54bdcc10/attachment.bin -------------- next part -------------- A non-text attachment was scrubbed... Name: llvm.patch Type: text/x-patch Size: 6819 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110208/54bdcc10/attachment-0001.bin From rafael.espindola at gmail.com Tue Feb 8 15:15:43 2011 From: rafael.espindola at gmail.com (Rafael Avila de Espindola) Date: Tue, 08 Feb 2011 16:15:43 -0500 Subject: [llvm-commits] [PATCH] [MC] Support for .ifdef / .ifndef In-Reply-To: <20110208202256.GA7581@britannica.bec.de> References: <20110205233414.GA12822@britannica.bec.de> <20110208202256.GA7581@britannica.bec.de> Message-ID: <4D51B27F.7080706@gmail.com> On 11-02-08 03:22 PM, Joerg Sonnenberger wrote: > Stricter test cases are attached. OK with the new tests. > Joerg > Cheers, Rafael From stoklund at 2pi.dk Tue Feb 8 15:13:03 2011 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Tue, 08 Feb 2011 21:13:03 -0000 Subject: [llvm-commits] [llvm] r125113 - in /llvm/trunk: include/llvm/CodeGen/LiveIntervalAnalysis.h lib/CodeGen/LiveIntervalAnalysis.cpp lib/CodeGen/RegAllocGreedy.cpp Message-ID: <20110208211303.4C7412A6C12C@llvm.org> Author: stoklund Date: Tue Feb 8 15:13:03 2011 New Revision: 125113 URL: http://llvm.org/viewvc/llvm-project?rev=125113&view=rev Log: Add LiveIntervals::addKillFlags() to recompute kill flags after register allocation. This is a lot easier than trying to get kill flags right during live range splitting and rematerialization. Modified: llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp Modified: llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h?rev=125113&r1=125112&r2=125113&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h (original) +++ llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h Tue Feb 8 15:13:03 2011 @@ -320,6 +320,10 @@ MachineBasicBlock::iterator getLastSplitPoint(const LiveInterval &li, MachineBasicBlock *mbb); + /// addKillFlags - Add kill flags to any instruction that kills a virtual + /// register. + void addKillFlags(); + private: /// computeIntervals - Compute live intervals. void computeIntervals(); Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=125113&r1=125112&r2=125113&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original) +++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Tue Feb 8 15:13:03 2011 @@ -890,6 +890,29 @@ return mbb->getFirstTerminator(); } +void LiveIntervals::addKillFlags() { + for (iterator I = begin(), E = end(); I != E; ++I) { + unsigned Reg = I->first; + if (TargetRegisterInfo::isPhysicalRegister(Reg)) + continue; + if (mri_->reg_nodbg_empty(Reg)) + continue; + LiveInterval *LI = I->second; + + // Every instruction that kills Reg corresponds to a live range end point. + for (LiveInterval::iterator RI = LI->begin(), RE = LI->end(); RI != RE; + ++RI) { + // A LOAD index indicates an MBB edge. + if (RI->end.isLoad()) + continue; + MachineInstr *MI = getInstructionFromIndex(RI->end); + if (!MI) + continue; + MI->addRegisterKilled(Reg, NULL); + } + } +} + /// getReMatImplicitUse - If the remat definition MI has one (for now, we only /// allow one) virtual register operand, then its uses are implicitly using /// the register. Returns the virtual register. Modified: llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp?rev=125113&r1=125112&r2=125113&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp (original) +++ llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp Tue Feb 8 15:13:03 2011 @@ -1087,6 +1087,7 @@ allocatePhysRegs(); addMBBLiveIns(MF); + LIS->addKillFlags(); // Run rewriter { From nadav.rotem at intel.com Tue Feb 8 06:34:25 2011 From: nadav.rotem at intel.com (Rotem, Nadav) Date: Tue, 8 Feb 2011 14:34:25 +0200 Subject: [llvm-commits] Patch for #9165 Message-ID: <6594DDFF12B03D4E89690887C2486994026DF4F88F@hasmsx504.ger.corp.intel.com> Hi, Here is a fix for #9165. http://llvm.org/bugs/show_bug.cgi?id=9165 More details inside. Index: DAGCombiner.cpp =================================================================== --- DAGCombiner.cpp (revision 124985) +++ DAGCombiner.cpp (working copy) @@ -6377,7 +6377,8 @@ // If the invec is a BUILD_VECTOR and if EltNo is a constant, build a new // vector with the inserted element. - if (InVec.getOpcode() == ISD::BUILD_VECTOR && isa(EltNo)) { + if (!LegalOperations && InVec.getOpcode() == ISD::BUILD_VECTOR && + isa(EltNo)) { unsigned Elt = cast(EltNo)->getZExtValue(); SmallVector Ops(InVec.getNode()->op_begin(), InVec.getNode()->op_end()); Cheers, Nadav --------------------------------------------------------------------- Intel Israel (74) Limited This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). Any review or distribution by others is strictly prohibited. If you are not the intended recipient, please contact the sender and delete all copies. -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110208/0337f450/attachment.html From stoklund at 2pi.dk Tue Feb 8 15:46:12 2011 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Tue, 08 Feb 2011 21:46:12 -0000 Subject: [llvm-commits] [llvm] r125116 - /llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp Message-ID: <20110208214612.1043E2A6C12C@llvm.org> Author: stoklund Date: Tue Feb 8 15:46:11 2011 New Revision: 125116 URL: http://llvm.org/viewvc/llvm-project?rev=125116&view=rev Log: Also handle the situation where an indirect branch is the first (and last) instruction in a basic block. Modified: llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp Modified: llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp?rev=125116&r1=125115&r2=125116&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp (original) +++ llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp Tue Feb 8 15:46:11 2011 @@ -808,16 +808,18 @@ DEBUG(dbgs() << ", uses at " << BI.LastUse << " after split point " << BI.LastSplitPoint << ", stack-out.\n"); SlotIndex SegEnd; - if (BI.LastSplitPoint == Start) + // Find the last real instruction before the split point. + MachineBasicBlock::iterator SplitI = + LIS->getInstructionFromIndex(BI.LastSplitPoint); + MachineBasicBlock::iterator I = SplitI, B = BI.MBB->begin(); + while (I != B && (--I)->isDebugValue()) + ; + if (I == SplitI) SegEnd = SE.leaveIntvAtTop(*BI.MBB); else { - MachineBasicBlock::iterator I = - LIS->getInstructionFromIndex(BI.LastSplitPoint); - do assert(I != BI.MBB->begin() && "Expected instruction"); - while ((--I)->isDebugValue()); SegEnd = SE.leaveIntvAfter(LIS->getInstructionIndex(I)); + SE.useIntv(Start, SegEnd); } - SE.useIntv(Start, SegEnd); // Run a double interval from the split to the last use. // This makes it possible to spill the complement without affecting the // indirect branch. From benny.kra at googlemail.com Tue Feb 8 16:29:56 2011 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Tue, 08 Feb 2011 22:29:56 -0000 Subject: [llvm-commits] [llvm] r125120 - in /llvm/trunk: lib/MC/MCParser/AsmParser.cpp test/MC/AsmParser/ifdef.s test/MC/AsmParser/ifndef.s Message-ID: <20110208222956.601AF2A6C12C@llvm.org> Author: d0k Date: Tue Feb 8 16:29:56 2011 New Revision: 125120 URL: http://llvm.org/viewvc/llvm-project?rev=125120&view=rev Log: Support for .ifdef / .ifndef in the assembler parser. Patch by Joerg Sonnenberger. Added: llvm/trunk/test/MC/AsmParser/ifdef.s llvm/trunk/test/MC/AsmParser/ifndef.s Modified: llvm/trunk/lib/MC/MCParser/AsmParser.cpp Modified: llvm/trunk/lib/MC/MCParser/AsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCParser/AsmParser.cpp?rev=125120&r1=125119&r2=125120&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCParser/AsmParser.cpp (original) +++ llvm/trunk/lib/MC/MCParser/AsmParser.cpp Tue Feb 8 16:29:56 2011 @@ -202,6 +202,8 @@ bool ParseDirectiveInclude(); // ".include" bool ParseDirectiveIf(SMLoc DirectiveLoc); // ".if" + // ".ifdef" or ".ifndef", depending on expect_defined + bool ParseDirectiveIfdef(SMLoc DirectiveLoc, bool expect_defined); bool ParseDirectiveElseIf(SMLoc DirectiveLoc); // ".elseif" bool ParseDirectiveElse(SMLoc DirectiveLoc); // ".else" bool ParseDirectiveEndIf(SMLoc DirectiveLoc); // .endif @@ -222,7 +224,6 @@ getParser().AddDirectiveHandler(this, Directive, HandleDirective); } - public: GenericAsmParser() {} @@ -887,6 +888,10 @@ // example. if (IDVal == ".if") return ParseDirectiveIf(IDLoc); + if (IDVal == ".ifdef") + return ParseDirectiveIfdef(IDLoc, true); + if (IDVal == ".ifndef" || IDVal == ".ifnotdef") + return ParseDirectiveIfdef(IDLoc, false); if (IDVal == ".elseif") return ParseDirectiveElseIf(IDLoc); if (IDVal == ".else") @@ -1933,6 +1938,31 @@ return false; } +bool AsmParser::ParseDirectiveIfdef(SMLoc DirectiveLoc, bool expect_defined) { + StringRef Name; + TheCondStack.push_back(TheCondState); + TheCondState.TheCond = AsmCond::IfCond; + + if (TheCondState.Ignore) { + EatToEndOfStatement(); + } else { + if (ParseIdentifier(Name)) + return TokError("expected identifier after '.ifdef'"); + + Lex(); + + MCSymbol *Sym = getContext().LookupSymbol(Name); + + if (expect_defined) + TheCondState.CondMet = (Sym != NULL && !Sym->isUndefined()); + else + TheCondState.CondMet = (Sym == NULL || Sym->isUndefined()); + TheCondState.Ignore = !TheCondState.CondMet; + } + + return false; +} + /// ParseDirectiveElseIf /// ::= .elseif expression bool AsmParser::ParseDirectiveElseIf(SMLoc DirectiveLoc) { Added: llvm/trunk/test/MC/AsmParser/ifdef.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AsmParser/ifdef.s?rev=125120&view=auto ============================================================================== --- llvm/trunk/test/MC/AsmParser/ifdef.s (added) +++ llvm/trunk/test/MC/AsmParser/ifdef.s Tue Feb 8 16:29:56 2011 @@ -0,0 +1,29 @@ +# RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s + +# CHECK-NOT: .byte 0 +# CHECK: .byte 1 +.ifdef undefined + .byte 0 +.else + .byte 1 +.endif + +defined: + +# CHECK: .byte 1 +# CHECK-NOT: .byte 0 +.ifdef defined + .byte 1 +.else + .byte 0 +.endif + + movl %eax, undefined + +# CHECK-NOT: .byte 0 +# CHECK: .byte 1 +.ifdef undefined + .byte 0 +.else + .byte 1 +.endif Added: llvm/trunk/test/MC/AsmParser/ifndef.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AsmParser/ifndef.s?rev=125120&view=auto ============================================================================== --- llvm/trunk/test/MC/AsmParser/ifndef.s (added) +++ llvm/trunk/test/MC/AsmParser/ifndef.s Tue Feb 8 16:29:56 2011 @@ -0,0 +1,29 @@ +# RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s + +# CHECK: .byte 1 +# CHECK-NOT: byte 0 +.ifndef undefined + .byte 1 +.else + .byte 0 +.endif + +defined: + +# CHECK-NOT: byte 0 +# CHECK: .byte 1 +.ifndef defined + .byte 0 +.else + .byte 1 +.endif + + movl %eax, undefined + +# CHECK: .byte 1 +# CHECK-NOT: byte 0 +.ifndef undefined + .byte 1 +.else + .byte 0 +.endif From resistor at mac.com Tue Feb 8 16:39:40 2011 From: resistor at mac.com (Owen Anderson) Date: Tue, 08 Feb 2011 22:39:40 -0000 Subject: [llvm-commits] [llvm] r125127 - in /llvm/trunk: lib/Target/ARM/ARMConstantIslandPass.cpp lib/Target/ARM/ARMExpandPseudoInsts.cpp lib/Target/ARM/ARMInstrThumb2.td lib/Target/ARM/ARMMCCodeEmitter.cpp lib/Target/ARM/Disassembler/ARMDisassembler.cpp lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp lib/Target/ARM/Thumb2SizeReduction.cpp test/MC/Disassembler/ARM/thumb-tests.txt Message-ID: <20110208223941.061D62A6C12C@llvm.org> Author: resistor Date: Tue Feb 8 16:39:40 2011 New Revision: 125127 URL: http://llvm.org/viewvc/llvm-project?rev=125127&view=rev Log: Revert both r121082 (which broke a bunch of constant pool stuff) and r125074 (which worked around it). This should get us back to the old, correct behavior, though it will make the integrated assembler unhappy for the time being. Modified: llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp llvm/trunk/lib/Target/ARM/Thumb2SizeReduction.cpp llvm/trunk/test/MC/Disassembler/ARM/thumb-tests.txt Modified: llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp?rev=125127&r1=125126&r2=125127&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp Tue Feb 8 16:39:40 2011 @@ -613,11 +613,7 @@ case ARM::LDRi12: case ARM::LDRcp: - case ARM::t2LDRi12: - case ARM::t2LDRHi12: - case ARM::t2LDRBi12: - case ARM::t2LDRSHi12: - case ARM::t2LDRSBi12: + case ARM::t2LDRpci: Bits = 12; // +-offset_12 NegOk = true; break; @@ -1576,16 +1572,6 @@ Scale = 4; } break; - case ARM::t2LDRi12: - // FIXME: Temporary workaround for a bug introduced by r121082. - // We should use t2LDRpci for loads from constantpools. - if (isARMLowRegister(U.MI->getOperand(0).getReg()) && - U.MI->getOperand(1).getReg() == ARM::PC) { - NewOpc = ARM::tLDRpci; - Bits = 8; - Scale = 4; - } - break; } if (!NewOpc) @@ -1596,10 +1582,6 @@ // FIXME: Check if offset is multiple of scale if scale is not 4. if (CPEIsInRange(U.MI, UserOffset, U.CPEMI, MaxOffs, false, true)) { U.MI->setDesc(TII->get(NewOpc)); - if (NewOpc == ARM::tLDRpci) - // FIXME: Temporary workaround. - // PC is now an implicit operand. - U.MI->RemoveOperand(1); MachineBasicBlock *MBB = U.MI->getParent(); BBSizes[MBB->getNumber()] -= 2; AdjustBBOffsetsAfter(MBB, -2); Modified: llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp?rev=125127&r1=125126&r2=125127&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp Tue Feb 8 16:39:40 2011 @@ -780,7 +780,7 @@ return true; } case ARM::TPsoft: { - MachineInstrBuilder MIB = + MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::BL)) .addExternalSymbol("__aeabi_read_tp", 0); @@ -790,49 +790,16 @@ MI.eraseFromParent(); return true; } - case ARM::t2LDRHpci: - case ARM::t2LDRBpci: - case ARM::t2LDRSHpci: - case ARM::t2LDRSBpci: - case ARM::t2LDRpci: { - unsigned NewLdOpc; - if (Opcode == ARM::t2LDRpci) - NewLdOpc = ARM::t2LDRi12; - else if (Opcode == ARM::t2LDRHpci) - NewLdOpc = ARM::t2LDRHi12; - else if (Opcode == ARM::t2LDRBpci) - NewLdOpc = ARM::t2LDRBi12; - else if (Opcode == ARM::t2LDRSHpci) - NewLdOpc = ARM::t2LDRSHi12; - else if (Opcode == ARM::t2LDRSBpci) - NewLdOpc = ARM::t2LDRSBi12; - else - llvm_unreachable("Not a known opcode?"); - - unsigned DstReg = MI.getOperand(0).getReg(); - MachineInstrBuilder MIB = - AddDefaultPred(BuildMI(MBB, MBBI, MI.getDebugLoc(), - TII->get(NewLdOpc), DstReg) - .addReg(ARM::PC) - .addOperand(MI.getOperand(1))); - (*MIB).setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); - TransferImpOps(MI, MIB, MIB); - MI.eraseFromParent(); - return true; - } - case ARM::tLDRpci_pic: case ARM::t2LDRpci_pic: { unsigned NewLdOpc = (Opcode == ARM::tLDRpci_pic) - ? ARM::tLDRpci : ARM::t2LDRi12; + ? ARM::tLDRpci : ARM::t2LDRpci; unsigned DstReg = MI.getOperand(0).getReg(); bool DstIsDead = MI.getOperand(0).isDead(); MachineInstrBuilder MIB1 = - BuildMI(MBB, MBBI, MI.getDebugLoc(), - TII->get(NewLdOpc), DstReg); - if (Opcode == ARM::t2LDRpci_pic) MIB1.addReg(ARM::PC); - MIB1.addOperand(MI.getOperand(1)); - AddDefaultPred(MIB1); + AddDefaultPred(BuildMI(MBB, MBBI, MI.getDebugLoc(), + TII->get(NewLdOpc), DstReg) + .addOperand(MI.getOperand(1))); (*MIB1).setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); MachineInstrBuilder MIB2 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::tPICADD)) Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=125127&r1=125126&r2=125127&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Tue Feb 8 16:39:40 2011 @@ -910,8 +910,23 @@ let Inst{5-4} = addr{1-0}; // imm } - def pci : t2PseudoInst<(outs GPR:$Rt), (ins i32imm:$addr), Size4Bytes, iis, - [(set GPR:$Rt, (opnode (ARMWrapper tconstpool:$addr)))]>; + // FIXME: Is the pci variant actually needed? + def pci : T2Ipc <(outs GPR:$Rt), (ins i32imm:$addr), iii, + opc, ".w\t$Rt, $addr", + [(set GPR:$Rt, (opnode (ARMWrapper tconstpool:$addr)))]> { + let isReMaterializable = 1; + let Inst{31-27} = 0b11111; + let Inst{26-25} = 0b00; + let Inst{24} = signed; + let Inst{23} = ?; // add = (U == '1') + let Inst{22-21} = opcod; + let Inst{20} = 1; // load + let Inst{19-16} = 0b1111; // Rn + bits<4> Rt; + bits<12> addr; + let Inst{15-12} = Rt{3-0}; + let Inst{11-0} = addr{11-0}; + } } /// T2I_st - Defines a set of (op r, {imm12|imm8|so_reg}) store patterns. Modified: llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp?rev=125127&r1=125126&r2=125127&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp Tue Feb 8 16:39:40 2011 @@ -58,7 +58,7 @@ SmallVectorImpl &Fixups) const; /// getHiLo16ImmOpValue - Return the encoding for the hi / low 16-bit of - /// the specified operand. This is used for operands with :lower16: and + /// the specified operand. This is used for operands with :lower16: and /// :upper16: prefixes. uint32_t getHiLo16ImmOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl &Fixups) const; @@ -112,7 +112,7 @@ SmallVectorImpl &Fixups) const; uint32_t getT2AdrLabelOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl &Fixups) const; - + /// getAddrModeImm12OpValue - Return encoding info for 'reg +/- imm12' /// operand. @@ -536,12 +536,12 @@ Val &= ~0x400000; else Val |= 0x400000; - + if (I ^ J2) Val &= ~0x200000; else Val |= 0x200000; - + return Val; } @@ -601,17 +601,13 @@ bool isAdd = true; // If The first operand isn't a register, we have a label reference. const MCOperand &MO = MI.getOperand(OpIdx); - const MCOperand &MO2 = MI.getOperand(OpIdx+1); - if (!MO.isReg() || (MO.getReg() == ARM::PC && MO2.isExpr())) { + if (!MO.isReg()) { Reg = getARMRegisterNumbering(ARM::PC); // Rn is PC. Imm12 = 0; isAdd = false ; // 'U' bit is set as part of the fixup. - const MCExpr *Expr = 0; - if (!MO.isReg()) - Expr = MO.getExpr(); - else - Expr = MO2.getExpr(); + assert(MO.isExpr() && "Unexpected machine operand type!"); + const MCExpr *Expr = MO.getExpr(); MCFixupKind Kind; if (Subtarget->isThumb2()) @@ -699,7 +695,7 @@ switch (ARM16Expr->getKind()) { default: assert(0 && "Unsupported ARMFixup"); case ARMMCExpr::VK_ARM_HI16: - if (!Subtarget->isTargetDarwin() && EvaluateAsPCRel(E)) + if (!Subtarget->isTargetDarwin() && EvaluateAsPCRel(E)) Kind = MCFixupKind(Subtarget->isThumb2() ? ARM::fixup_t2_movt_hi16_pcrel : ARM::fixup_arm_movt_hi16_pcrel); @@ -709,7 +705,7 @@ : ARM::fixup_arm_movt_hi16); break; case ARMMCExpr::VK_ARM_LO16: - if (!Subtarget->isTargetDarwin() && EvaluateAsPCRel(E)) + if (!Subtarget->isTargetDarwin() && EvaluateAsPCRel(E)) Kind = MCFixupKind(Subtarget->isThumb2() ? ARM::fixup_t2_movw_lo16_pcrel : ARM::fixup_arm_movw_lo16_pcrel); Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp?rev=125127&r1=125126&r2=125127&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp (original) +++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp Tue Feb 8 16:39:40 2011 @@ -256,27 +256,27 @@ case ARM::t2LDR_POST: case ARM::t2LDR_PRE: case ARM::t2LDRi12: case ARM::t2LDRi8: case ARM::t2LDRs: case ARM::t2LDRT: - return ARM::t2LDRi12; + return ARM::t2LDRpci; case ARM::t2LDRB_POST: case ARM::t2LDRB_PRE: case ARM::t2LDRBi12: case ARM::t2LDRBi8: case ARM::t2LDRBs: case ARM::t2LDRBT: - return ARM::t2LDRBi12; + return ARM::t2LDRBpci; case ARM::t2LDRH_POST: case ARM::t2LDRH_PRE: case ARM::t2LDRHi12: case ARM::t2LDRHi8: case ARM::t2LDRHs: case ARM::t2LDRHT: - return ARM::t2LDRHi12; + return ARM::t2LDRHpci; case ARM::t2LDRSB_POST: case ARM::t2LDRSB_PRE: case ARM::t2LDRSBi12: case ARM::t2LDRSBi8: case ARM::t2LDRSBs: case ARM::t2LDRSBT: - return ARM::t2LDRSBi12; + return ARM::t2LDRSBpci; case ARM::t2LDRSH_POST: case ARM::t2LDRSH_PRE: case ARM::t2LDRSHi12: case ARM::t2LDRSHi8: case ARM::t2LDRSHs: case ARM::t2LDRSHT: - return ARM::t2LDRSHi12; + return ARM::t2LDRSHpci; } } @@ -531,9 +531,9 @@ return new ThumbDisassembler; } -extern "C" void LLVMInitializeARMDisassembler() { +extern "C" void LLVMInitializeARMDisassembler() { // Register the disassembler. - TargetRegistry::RegisterMCDisassembler(TheARMTarget, + TargetRegistry::RegisterMCDisassembler(TheARMTarget, createARMDisassembler); TargetRegistry::RegisterMCDisassembler(TheThumbTarget, createThumbDisassembler); Modified: llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h?rev=125127&r1=125126&r2=125127&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h (original) +++ llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h Tue Feb 8 16:39:40 2011 @@ -564,6 +564,38 @@ // t_addrmode_sp := sp + imm8 * 4 // +// A8.6.63 LDRB (literal) +// A8.6.79 LDRSB (literal) +// A8.6.75 LDRH (literal) +// A8.6.83 LDRSH (literal) +// A8.6.59 LDR (literal) +// +// These instrs calculate an address from the PC value and an immediate offset. +// Rd Rn=PC (+/-)imm12 (+ if Inst{23} == 0b1) +static bool DisassembleThumb2Ldpci(MCInst &MI, unsigned Opcode, + uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) { + + const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo; + if (!OpInfo) return false; + + assert(NumOps >= 2 && + OpInfo[0].RegClass == ARM::GPRRegClassID && + OpInfo[1].RegClass < 0 && + "Expect >= 2 operands, first as reg, and second as imm operand"); + + // Build the register operand, followed by the (+/-)imm12 immediate. + + MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID, + decodeRd(insn)))); + + MI.addOperand(MCOperand::CreateImm(decodeImm12(insn))); + + NumOpsAdded = 2; + + return true; +} + + // A6.2.4 Load/store single data item // // Load/Store Register (reg|imm): tRd tRn imm5 tRm @@ -1755,7 +1787,7 @@ if (slice(insn, 19, 16) == 0xFF) { bool Negative = slice(insn, 23, 23) == 0; unsigned Imm12 = getImm12(insn); - Offset = Negative ? -1 - Imm12 : 1 * Imm12; + Offset = Negative ? -1 - Imm12 : 1 * Imm12; } else if (Opcode == ARM::t2PLDi8 || Opcode == ARM::t2PLDWi8 || Opcode == ARM::t2PLIi8) { // A8.6.117 Encoding T2: add = FALSE @@ -1812,6 +1844,9 @@ if (Thumb2PreloadOpcode(Opcode)) return DisassembleThumb2PreLoad(MI, Opcode, insn, NumOps, NumOpsAdded, B); + // See, for example, A6.3.7 Load word: Table A6-18 Load word. + if (Load && Rn == 15) + return DisassembleThumb2Ldpci(MI, Opcode, insn, NumOps, NumOpsAdded, B); const TargetInstrDesc &TID = ARMInsts[Opcode]; const TargetOperandInfo *OpInfo = TID.OpInfo; unsigned &OpIdx = NumOpsAdded; @@ -1858,7 +1893,7 @@ else Imm = decodeImm8(insn); } - + MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID, R0))); ++OpIdx; @@ -2183,7 +2218,7 @@ } // A6.3 32-bit Thumb instruction encoding - + uint16_t op1 = slice(HalfWord, 12, 11); uint16_t op2 = slice(HalfWord, 10, 4); uint16_t op = slice(insn, 15, 15); Modified: llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp?rev=125127&r1=125126&r2=125127&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp (original) +++ llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp Tue Feb 8 16:39:40 2011 @@ -574,9 +574,6 @@ if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right. printOperand(MI, OpNum, O); return; - } else if (MO1.getReg() == ARM::PC && MO2.isExpr()) { - printOperand(MI, OpNum+1, O); - return; } O << "[" << getRegisterName(MO1.getReg()); Modified: llvm/trunk/lib/Target/ARM/Thumb2SizeReduction.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Thumb2SizeReduction.cpp?rev=125127&r1=125126&r2=125127&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/Thumb2SizeReduction.cpp (original) +++ llvm/trunk/lib/Target/ARM/Thumb2SizeReduction.cpp Tue Feb 8 16:39:40 2011 @@ -234,7 +234,7 @@ unsigned Opc = MI->getOpcode(); bool isPCOk = (Opc == ARM::t2LDMIA_RET || Opc == ARM::t2LDMIA || Opc == ARM::t2LDMDB || Opc == ARM::t2LDMIA_UPD || - Opc == ARM::t2LDMDB_UPD || Opc == ARM::t2LDRi12); + Opc == ARM::t2LDMDB_UPD); bool isLROk = (Opc == ARM::t2STMIA_UPD || Opc == ARM::t2STMDB_UPD); bool isSPOk = isPCOk || isLROk || (Opc == ARM::t2ADDrSPi); for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { @@ -268,7 +268,6 @@ return false; unsigned Scale = 1; - bool HasBaseReg = true; bool HasImmOffset = false; bool HasShift = false; bool HasOffReg = true; @@ -289,50 +288,19 @@ } Scale = 4; - - if (MI->getOperand(2).isImm()) { - HasImmOffset = true; - HasOffReg = false; - } else { - // FIXME: Temporary workaround for a bug introduced by r121082. - // We should use t2LDRpci for loads from constantpools. - // We don't want to narrow this to tLDRpci until constant island pass - // for fear of pessimizing code. - return false; - } + HasImmOffset = true; + HasOffReg = false; break; case ARM::t2LDRBi12: case ARM::t2STRBi12: - if (MI->getOperand(2).isImm()) { - HasImmOffset = true; - HasOffReg = false; - } else { - if (Entry.WideOpc == ARM::t2LDRBi12) { - Opc = ARM::tLDRpci; - OpNum = 2; - } - - HasImmOffset = false; - HasBaseReg = false; - HasOffReg = false; - } + HasImmOffset = true; + HasOffReg = false; break; case ARM::t2LDRHi12: case ARM::t2STRHi12: Scale = 2; - if (MI->getOperand(2).isImm()) { - HasImmOffset = true; - HasOffReg = false; - } else { - if (Entry.WideOpc == ARM::t2LDRHi12) { - Opc = ARM::tLDRpci; - OpNum = 2; - } - - HasImmOffset = false; - HasBaseReg = false; - HasOffReg = false; - } + HasImmOffset = true; + HasOffReg = false; break; case ARM::t2LDRs: case ARM::t2LDRBs: @@ -426,9 +394,7 @@ MachineInstrBuilder MIB = BuildMI(MBB, *MI, dl, TII->get(Opc)); if (!isLdStMul) { MIB.addOperand(MI->getOperand(0)); - - if (HasBaseReg) - MIB.addOperand(MI->getOperand(1)); + MIB.addOperand(MI->getOperand(1)); if (HasImmOffset) MIB.addImm(OffsetImm / Scale); @@ -467,7 +433,7 @@ unsigned Opc = MI->getOpcode(); switch (Opc) { default: break; - case ARM::t2ADDSri: + case ARM::t2ADDSri: case ARM::t2ADDSrr: { unsigned PredReg = 0; if (getInstrPredicate(MI, PredReg) == ARMCC::AL) { Modified: llvm/trunk/test/MC/Disassembler/ARM/thumb-tests.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/thumb-tests.txt?rev=125127&r1=125126&r2=125127&view=diff ============================================================================== --- llvm/trunk/test/MC/Disassembler/ARM/thumb-tests.txt (original) +++ llvm/trunk/test/MC/Disassembler/ARM/thumb-tests.txt Tue Feb 8 16:39:40 2011 @@ -27,7 +27,7 @@ # CHECK: ldmia r0!, {r1} 0x02 0xc8 -# CHECK: ldrb.w r8, [pc, #-24] +# CHECK: ldrb.w r8, #-24 0x1f 0xf8 0x18 0x80 # CHECK: ldrd r0, r1, [r7, #64]! From rafael.espindola at gmail.com Tue Feb 8 16:40:47 2011 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Tue, 08 Feb 2011 22:40:47 -0000 Subject: [llvm-commits] [llvm] r125128 - in /llvm/trunk: include/llvm-c/lto.h include/llvm/Support/MemoryBuffer.h lib/Support/MemoryBuffer.cpp tools/gold/gold-plugin.cpp tools/lto/LTOModule.cpp tools/lto/LTOModule.h tools/lto/lto.cpp tools/lto/lto.exports Message-ID: <20110208224047.4710F2A6C12C@llvm.org> Author: rafael Date: Tue Feb 8 16:40:47 2011 New Revision: 125128 URL: http://llvm.org/viewvc/llvm-project?rev=125128&view=rev Log: Don't open the file again in the gold plugin. To be able to do this, update MemoryBuffer::getOpenFile to not close the file descriptor. Modified: llvm/trunk/include/llvm-c/lto.h llvm/trunk/include/llvm/Support/MemoryBuffer.h llvm/trunk/lib/Support/MemoryBuffer.cpp llvm/trunk/tools/gold/gold-plugin.cpp llvm/trunk/tools/lto/LTOModule.cpp llvm/trunk/tools/lto/LTOModule.h llvm/trunk/tools/lto/lto.cpp llvm/trunk/tools/lto/lto.exports Modified: llvm/trunk/include/llvm-c/lto.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm-c/lto.h?rev=125128&r1=125127&r2=125128&view=diff ============================================================================== --- llvm/trunk/include/llvm-c/lto.h (original) +++ llvm/trunk/include/llvm-c/lto.h Tue Feb 8 16:40:47 2011 @@ -18,6 +18,7 @@ #include #include +#include #define LTO_API_VERSION 4 @@ -121,6 +122,13 @@ extern lto_module_t lto_module_create_from_memory(const void* mem, size_t length); +/** + * Loads an object file from disk. The seek point of fd is not preserved. + * Returns NULL on error (check lto_get_error_message() for details). + */ +extern lto_module_t +lto_module_create_from_fd(int fd, const char *path, off_t size); + /** * Frees all memory internally allocated by the module. Modified: llvm/trunk/include/llvm/Support/MemoryBuffer.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/MemoryBuffer.h?rev=125128&r1=125127&r2=125128&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/MemoryBuffer.h (original) +++ llvm/trunk/include/llvm/Support/MemoryBuffer.h Tue Feb 8 16:40:47 2011 @@ -69,8 +69,7 @@ int64_t FileSize = -1); /// getOpenFile - Given an already-open file descriptor, read the file and - /// return a MemoryBuffer. This takes ownership of the descriptor, - /// immediately closing it after reading the file. + /// return a MemoryBuffer. static error_code getOpenFile(int FD, const char *Filename, OwningPtr &result, int64_t FileSize = -1); Modified: llvm/trunk/lib/Support/MemoryBuffer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/MemoryBuffer.cpp?rev=125128&r1=125127&r2=125128&view=diff ============================================================================== --- llvm/trunk/lib/Support/MemoryBuffer.cpp (original) +++ llvm/trunk/lib/Support/MemoryBuffer.cpp Tue Feb 8 16:40:47 2011 @@ -179,14 +179,6 @@ sys::Path::UnMapFilePages(getBufferStart(), getBufferSize()); } }; - -/// FileCloser - RAII object to make sure an FD gets closed properly. -class FileCloser { - int FD; -public: - explicit FileCloser(int FD) : FD(FD) {} - ~FileCloser() { ::close(FD); } -}; } error_code MemoryBuffer::getFile(StringRef Filename, @@ -208,15 +200,14 @@ if (FD == -1) { return error_code(errno, posix_category()); } - - return getOpenFile(FD, Filename, result, FileSize); + error_code ret = getOpenFile(FD, Filename, result, FileSize); + close(FD); + return ret; } error_code MemoryBuffer::getOpenFile(int FD, const char *Filename, OwningPtr &result, int64_t FileSize) { - FileCloser FC(FD); // Close FD on return. - // If we don't know the file size, use fstat to find out. fstat on an open // file descriptor is cheaper than stat on a random path. if (FileSize == -1) { Modified: llvm/trunk/tools/gold/gold-plugin.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/gold/gold-plugin.cpp?rev=125128&r1=125127&r2=125128&view=diff ============================================================================== --- llvm/trunk/tools/gold/gold-plugin.cpp (original) +++ llvm/trunk/tools/gold/gold-plugin.cpp Tue Feb 8 16:40:47 2011 @@ -241,7 +241,8 @@ /// with add_symbol if possible. static ld_plugin_status claim_file_hook(const ld_plugin_input_file *file, int *claimed) { - void *buf = NULL; + lto_module_t M; + if (file->offset) { // Gold has found what might be IR part-way inside of a file, such as // an .a archive. @@ -252,7 +253,7 @@ file->offset, sys::StrError(errno).c_str()); return LDPS_ERR; } - buf = malloc(file->filesize); + void *buf = malloc(file->filesize); if (!buf) { (*message)(LDPL_ERROR, "Failed to allocate buffer for archive member of size: %d\n", @@ -272,16 +273,31 @@ free(buf); return LDPS_OK; } - } else if (!lto_module_is_object_file(file->name)) - return LDPS_OK; + M = lto_module_create_from_memory(buf, file->filesize); + free(buf); + } else { + // FIXME: We should not need to pass -1 as the file size, but there + // is a bug in BFD that causes it to pass 0 to us. Remove this once + // that is fixed. + off_t size = file->filesize ? file->filesize : -1; + + // FIXME: We should not need to reset the position in the file, but there + // is a bug in BFD. Remove this once that is fixed. + off_t old_pos = lseek(file->fd, 0, SEEK_CUR); + + lseek(file->fd, 0, SEEK_SET); + M = lto_module_create_from_fd(file->fd, file->name, size); + + lseek(file->fd, old_pos, SEEK_SET); + if (!M) + return LDPS_OK; + } *claimed = 1; Modules.resize(Modules.size() + 1); claimed_file &cf = Modules.back(); + cf.M = M; - cf.M = buf ? lto_module_create_from_memory(buf, file->filesize) : - lto_module_create(file->name); - free(buf); if (!cf.M) { (*message)(LDPL_ERROR, "Failed to create LLVM module: %s", lto_get_error_message()); Modified: llvm/trunk/tools/lto/LTOModule.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto/LTOModule.cpp?rev=125128&r1=125127&r2=125128&view=diff ============================================================================== --- llvm/trunk/tools/lto/LTOModule.cpp (original) +++ llvm/trunk/tools/lto/LTOModule.cpp Tue Feb 8 16:40:47 2011 @@ -87,6 +87,17 @@ return makeLTOModule(buffer.get(), errMsg); } +LTOModule *LTOModule::makeLTOModule(int fd, const char *path, + off_t size, + std::string &errMsg) { + OwningPtr buffer; + if (error_code ec = MemoryBuffer::getOpenFile(fd, path, buffer, size)) { + errMsg = ec.message(); + return NULL; + } + return makeLTOModule(buffer.get(), errMsg); +} + /// makeBuffer - Create a MemoryBuffer from a memory range. MemoryBuffer /// requires the byte past end of the buffer to be a zero. We might get lucky /// and already be that way, otherwise make a copy. Also if next byte is on a Modified: llvm/trunk/tools/lto/LTOModule.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto/LTOModule.h?rev=125128&r1=125127&r2=125128&view=diff ============================================================================== --- llvm/trunk/tools/lto/LTOModule.h (original) +++ llvm/trunk/tools/lto/LTOModule.h Tue Feb 8 16:40:47 2011 @@ -51,6 +51,9 @@ static LTOModule* makeLTOModule(const char* path, std::string& errMsg); + static LTOModule* makeLTOModule(int fd, const char *path, + off_t size, + std::string& errMsg); static LTOModule* makeLTOModule(const void* mem, size_t length, std::string& errMsg); Modified: llvm/trunk/tools/lto/lto.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto/lto.cpp?rev=125128&r1=125127&r2=125128&view=diff ============================================================================== --- llvm/trunk/tools/lto/lto.cpp (original) +++ llvm/trunk/tools/lto/lto.cpp Tue Feb 8 16:40:47 2011 @@ -91,6 +91,14 @@ return LTOModule::makeLTOModule(path, sLastErrorString); } +// +// loads an object file from disk +// returns NULL on error (check lto_get_error_message() for details) +// +lto_module_t lto_module_create_from_fd(int fd, const char *path, off_t size) +{ + return LTOModule::makeLTOModule(fd, path, size, sLastErrorString); +} // // loads an object file from memory Modified: llvm/trunk/tools/lto/lto.exports URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto/lto.exports?rev=125128&r1=125127&r2=125128&view=diff ============================================================================== --- llvm/trunk/tools/lto/lto.exports (original) +++ llvm/trunk/tools/lto/lto.exports Tue Feb 8 16:40:47 2011 @@ -1,6 +1,7 @@ lto_get_error_message lto_get_version lto_module_create +lto_module_create_from_fd lto_module_create_from_memory lto_module_get_num_symbols lto_module_get_symbol_attribute From stoklund at 2pi.dk Tue Feb 8 17:02:58 2011 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Tue, 08 Feb 2011 23:02:58 -0000 Subject: [llvm-commits] [llvm] r125132 - /llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp Message-ID: <20110208230258.51E9D2A6C12C@llvm.org> Author: stoklund Date: Tue Feb 8 17:02:58 2011 New Revision: 125132 URL: http://llvm.org/viewvc/llvm-project?rev=125132&view=rev Log: Reorganize interference code to check LastSplitPoint first. The last split point can be anywhere in the block, so it interferes with the strictly monotonic requirements of advanceTo(). Modified: llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp Modified: llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp?rev=125132&r1=125131&r2=125132&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp (original) +++ llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp Tue Feb 8 17:02:58 2011 @@ -449,6 +449,8 @@ if (!IntI.valid()) continue; + // Determine which blocks have interference live in or after the last split + // point. for (unsigned i = 0, e = LiveBlocks.size(); i != e; ++i) { BlockInfo &BI = LiveBlocks[i]; SpillPlacement::BlockConstraint &BC = SpillConstraints[i]; @@ -459,29 +461,51 @@ if (IntI.start() >= Stop) continue; - // Handle transparent blocks with interference separately. - // Transparent blocks never incur any fixed cost. - if (BI.LiveThrough && !BI.Uses) { - // Check if interference is live-in - force spill. - if (BC.Entry != SpillPlacement::MustSpill) { - BC.Entry = SpillPlacement::PrefSpill; - IntI.advanceTo(Start); - if (IntI.valid() && IntI.start() <= Start) - BC.Entry = SpillPlacement::MustSpill; - } + // Is the interference live-in? + if (BI.LiveIn) { + IntI.advanceTo(Start); + if (!IntI.valid()) + break; + if (IntI.start() <= Start) + BC.Entry = SpillPlacement::MustSpill; + } - // Check if interference is live-out - force spill. - if (BC.Exit != SpillPlacement::MustSpill) { - BC.Exit = SpillPlacement::PrefSpill; - // Any interference overlapping [LastSplitPoint;Stop) forces a spill. + // Is the interference overlapping the last split point? + if (BI.LiveOut) { + if (IntI.stop() < BI.LastSplitPoint) IntI.advanceTo(BI.LastSplitPoint.getPrevSlot()); - if (IntI.valid() && IntI.start() < Stop) - BC.Exit = SpillPlacement::MustSpill; - } + if (!IntI.valid()) + break; + if (IntI.start() < Stop) + BC.Exit = SpillPlacement::MustSpill; + } + } - // Nothing more to do for this transparent block. + // Rewind iterator and check other interferences. + IntI.find(VirtReg.beginIndex()); + for (unsigned i = 0, e = LiveBlocks.size(); i != e; ++i) { + BlockInfo &BI = LiveBlocks[i]; + SpillPlacement::BlockConstraint &BC = SpillConstraints[i]; + SlotIndex Start, Stop; + tie(Start, Stop) = Indexes->getMBBRange(BI.MBB); + + // Skip interference-free blocks. + if (IntI.start() >= Stop) + continue; + + // Handle transparent blocks with interference separately. + // Transparent blocks never incur any fixed cost. + if (BI.LiveThrough && !BI.Uses) { + IntI.advanceTo(Start); if (!IntI.valid()) break; + if (IntI.start() >= Stop) + continue; + + if (BC.Entry != SpillPlacement::MustSpill) + BC.Entry = SpillPlacement::PrefSpill; + if (BC.Exit != SpillPlacement::MustSpill) + BC.Exit = SpillPlacement::PrefSpill; continue; } @@ -494,12 +518,8 @@ IntI.advanceTo(Start); if (!IntI.valid()) break; - - // Interference is live-in - force spill. - if (IntI.start() <= Start) - BC.Entry = SpillPlacement::MustSpill; // Not live in, but before the first use. - else if (IntI.start() < BI.FirstUse) + if (IntI.start() < BI.FirstUse) BC.Entry = SpillPlacement::PrefSpill; } @@ -534,12 +554,6 @@ if (IntI.start() < Stop) BC.Exit = SpillPlacement::PrefSpill; } - // Is the interference overlapping the last split point? - IntI.advanceTo(BI.LastSplitPoint.getPrevSlot()); - if (!IntI.valid()) - break; - if (IntI.start() < Stop) - BC.Exit = SpillPlacement::MustSpill; } } } From stoklund at 2pi.dk Tue Feb 8 17:26:48 2011 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Tue, 08 Feb 2011 23:26:48 -0000 Subject: [llvm-commits] [llvm] r125137 - /llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp Message-ID: <20110208232648.AEF652A6C12C@llvm.org> Author: stoklund Date: Tue Feb 8 17:26:48 2011 New Revision: 125137 URL: http://llvm.org/viewvc/llvm-project?rev=125137&view=rev Log: Fix one more case of splitting after the last split point. Modified: llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp Modified: llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp?rev=125137&r1=125136&r2=125137&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp (original) +++ llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp Tue Feb 8 17:26:48 2011 @@ -746,8 +746,7 @@ continue; } - if (IP.second.getBoundaryIndex() < BI.LastUse && - IP.second.getBoundaryIndex() <= BI.LastSplitPoint) { + if (IP.second.getBoundaryIndex() < BI.LastUse) { // There are interference-free uses at the end of the block. // Find the first use that can get the live-out register. SmallVectorImpl::const_iterator UI = @@ -755,13 +754,16 @@ IP.second.getBoundaryIndex()); assert(UI != SA->UseSlots.end() && "Couldn't find last use"); SlotIndex Use = *UI; - DEBUG(dbgs() << ", free use at " << Use << ".\n"); assert(Use <= BI.LastUse && "Couldn't find last use"); - SlotIndex SegStart = SE.enterIntvBefore(Use); - assert(SegStart >= IP.second && "Couldn't avoid interference"); - assert(SegStart < BI.LastSplitPoint && "Impossible split point"); - SE.useIntv(SegStart, Stop); - continue; + // Only attempt a split befroe the last split point. + if (Use.getBaseIndex() <= BI.LastSplitPoint) { + DEBUG(dbgs() << ", free use at " << Use << ".\n"); + SlotIndex SegStart = SE.enterIntvBefore(Use); + assert(SegStart >= IP.second && "Couldn't avoid interference"); + assert(SegStart < BI.LastSplitPoint && "Impossible split point"); + SE.useIntv(SegStart, Stop); + continue; + } } // Interference is after the last use. From stoklund at 2pi.dk Tue Feb 8 18:25:36 2011 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Wed, 09 Feb 2011 00:25:36 -0000 Subject: [llvm-commits] [llvm] r125140 - /llvm/trunk/lib/CodeGen/InlineSpiller.cpp Message-ID: <20110209002536.922B52A6C12C@llvm.org> Author: stoklund Date: Tue Feb 8 18:25:36 2011 New Revision: 125140 URL: http://llvm.org/viewvc/llvm-project?rev=125140&view=rev Log: Set an allocation hint when rematting before a COPY. This almost guarantees that the COPY will be coalesced. Modified: llvm/trunk/lib/CodeGen/InlineSpiller.cpp Modified: llvm/trunk/lib/CodeGen/InlineSpiller.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/InlineSpiller.cpp?rev=125140&r1=125139&r2=125140&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/InlineSpiller.cpp (original) +++ llvm/trunk/lib/CodeGen/InlineSpiller.cpp Tue Feb 8 18:25:36 2011 @@ -154,6 +154,10 @@ LiveInterval &NewLI = edit_->create(mri_, lis_, vrm_); NewLI.markNotSpillable(); + // Rematting for a copy: Set allocation hint to be the destination register. + if (MI->isCopy()) + mri_.setRegAllocationHint(NewLI.reg, 0, MI->getOperand(0).getReg()); + // Finally we can rematerialize OrigMI before MI. SlotIndex DefIdx = edit_->rematerializeAt(*MI->getParent(), MI, NewLI.reg, RM, lis_, tii_, tri_); From daniel at zuster.org Tue Feb 8 18:37:50 2011 From: daniel at zuster.org (Daniel Dunbar) Date: Wed, 09 Feb 2011 00:37:50 -0000 Subject: [llvm-commits] [test-suite] r125143 - /test-suite/trunk/RunSafely.sh Message-ID: <20110209003750.B03922A6C12C@llvm.org> Author: ddunbar Date: Tue Feb 8 18:37:50 2011 New Revision: 125143 URL: http://llvm.org/viewvc/llvm-project?rev=125143&view=rev Log: RunSafely: Add support for a -t argument to change the time command to use. Modified: test-suite/trunk/RunSafely.sh Modified: test-suite/trunk/RunSafely.sh URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/RunSafely.sh?rev=125143&r1=125142&r2=125143&view=diff ============================================================================== --- test-suite/trunk/RunSafely.sh (original) +++ test-suite/trunk/RunSafely.sh Tue Feb 8 18:37:50 2011 @@ -57,6 +57,7 @@ RCLIENT=rsh RPORT= RUN_UNDER= +TIMEIT=time if [ $1 = "-r" ]; then RHOST=$2 shift 2 @@ -77,6 +78,10 @@ RUN_UNDER=$2 shift 2 fi +if [ $1 = "-t" ]; then + TIMEIT=$2 + shift 2 +fi ULIMIT=$1 EXITOK=$2 @@ -133,7 +138,7 @@ COMMAND=$(echo "$COMMAND" | sed -e 's#"#\\"#g') if [ "x$RHOST" = x ] ; then - ( sh -c "$ULIMITCMD time -p sh -c '$COMMAND >$OUTFILE 2>&1 < $INFILE; echo exit \$?'" ) 2>&1 \ + ( sh -c "$ULIMITCMD $TIMEIT -p sh -c '$COMMAND >$OUTFILE 2>&1 < $INFILE; echo exit \$?'" ) 2>&1 \ | awk -- '\ BEGIN { cpu = 0.0; } /^user/ { cpu += $2; print; } @@ -143,7 +148,7 @@ rm -f "$PWD/${PROG}.command" rm -f "$PWD/${PROG}.remote" rm -f "$PWD/${PROG}.remote.time" - echo "$ULIMITCMD cd $PWD; (time -p ($COMMAND > $PWD/${OUTFILE}.remote 2>&1 < $INFILE;); echo exit \$?) > $PWD/${OUTFILE}.remote.time 2>&1" > "$PWD/${PROG}.command" + echo "$ULIMITCMD cd $PWD; ($TIMEIT -p ($COMMAND > $PWD/${OUTFILE}.remote 2>&1 < $INFILE;); echo exit \$?) > $PWD/${OUTFILE}.remote.time 2>&1" > "$PWD/${PROG}.command" chmod +x "$PWD/${PROG}.command" ( $RCLIENT -l $RUSER $RHOST $RPORT "ls $PWD/${PROG}.command" ) > /dev/null 2>&1 From dpatel at apple.com Tue Feb 8 18:37:52 2011 From: dpatel at apple.com (Devang Patel) Date: Wed, 09 Feb 2011 00:37:52 -0000 Subject: [llvm-commits] [debuginfo-tests] r125144 - /debuginfo-tests/trunk/aggregate-indirect-arg.cpp Message-ID: <20110209003752.987252A6C12D@llvm.org> Author: dpatel Date: Tue Feb 8 18:37:52 2011 New Revision: 125144 URL: http://llvm.org/viewvc/llvm-project?rev=125144&view=rev Log: Test case for r125142. Added: debuginfo-tests/trunk/aggregate-indirect-arg.cpp Added: debuginfo-tests/trunk/aggregate-indirect-arg.cpp URL: http://llvm.org/viewvc/llvm-project/debuginfo-tests/trunk/aggregate-indirect-arg.cpp?rev=125144&view=auto ============================================================================== --- debuginfo-tests/trunk/aggregate-indirect-arg.cpp (added) +++ debuginfo-tests/trunk/aggregate-indirect-arg.cpp Tue Feb 8 18:37:52 2011 @@ -0,0 +1,32 @@ +// RUN: %clangxx -O0 -g %s -c -o %t.o +// RUN: %clangxx %t.o -o %t.out +// RUN: %test_debuginfo %s %t.out +// Radar 8945514 +// DEBUGGER: break 22 +// DEBUGGER: r +// DEBUGGER: p v +// CHECK: $1 = (SVal &) +// CHECK: Data = 0x0, +// CHECK: Kind = 2142 + +class SVal { +public: + ~SVal() {} + const void* Data; + unsigned Kind; +}; + +void bar(SVal &v) {} +class A { +public: + void foo(SVal v) { bar(v); } +}; + +int main() { + SVal v; + v.Data = 0; + v.Kind = 2142; + A a; + a.foo(v); + return 0; +} From daniel at zuster.org Tue Feb 8 18:37:55 2011 From: daniel at zuster.org (Daniel Dunbar) Date: Wed, 09 Feb 2011 00:37:55 -0000 Subject: [llvm-commits] [test-suite] r125145 - in /test-suite/trunk: Makefile autoconf/configure.ac tools/ tools/Makefile Message-ID: <20110209003755.A10EC2A6C12E@llvm.org> Author: ddunbar Date: Tue Feb 8 18:37:55 2011 New Revision: 125145 URL: http://llvm.org/viewvc/llvm-project?rev=125145&view=rev Log: test-suite: Sketch an empty tools directory. Added: test-suite/trunk/tools/ test-suite/trunk/tools/Makefile Modified: test-suite/trunk/Makefile test-suite/trunk/autoconf/configure.ac Modified: test-suite/trunk/Makefile URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Makefile?rev=125145&r1=125144&r2=125145&view=diff ============================================================================== --- test-suite/trunk/Makefile (original) +++ test-suite/trunk/Makefile Tue Feb 8 18:37:55 2011 @@ -20,3 +20,7 @@ build-for-llvm-top: ./configure --with-llvmsrc=$(LLVM_TOP)/llvm --with-llvmobj=$(LLVM_TOP)/llvm --srcdir=$(LLVM_TOP)/test-suite --with-llvmgccdir=$(LLVM_TOP)/install --with-externals=$(LLVM_TOP)/externals $(MAKE) + +tools: + $(MAKE) -C tools +.PHONY: tools Modified: test-suite/trunk/autoconf/configure.ac URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/autoconf/configure.ac?rev=125145&r1=125144&r2=125145&view=diff ============================================================================== --- test-suite/trunk/autoconf/configure.ac (original) +++ test-suite/trunk/autoconf/configure.ac Tue Feb 8 18:37:55 2011 @@ -46,6 +46,7 @@ AC_CONFIG_MAKEFILE(MultiSource/Makefile.multisrc) AC_CONFIG_MAKEFILE(SingleSource/Makefile) AC_CONFIG_MAKEFILE(SingleSource/Makefile.singlesrc) +AC_CONFIG_MAKEFILE(tools/Makefile) dnl ************************************************************************** dnl * Get command line options Added: test-suite/trunk/tools/Makefile URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/tools/Makefile?rev=125145&view=auto ============================================================================== --- test-suite/trunk/tools/Makefile (added) +++ test-suite/trunk/tools/Makefile Tue Feb 8 18:37:55 2011 @@ -0,0 +1,2 @@ +LEVEL=.. +include $(LEVEL)/Makefile.programs From daniel at zuster.org Tue Feb 8 18:37:57 2011 From: daniel at zuster.org (Daniel Dunbar) Date: Wed, 09 Feb 2011 00:37:57 -0000 Subject: [llvm-commits] [test-suite] r125146 - /test-suite/trunk/configure Message-ID: <20110209003758.0C6422A6C12C@llvm.org> Author: ddunbar Date: Tue Feb 8 18:37:57 2011 New Revision: 125146 URL: http://llvm.org/viewvc/llvm-project?rev=125146&view=rev Log: Regenerate configure. Modified: test-suite/trunk/configure Modified: test-suite/trunk/configure URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/configure?rev=125146&r1=125145&r2=125146&view=diff ============================================================================== --- test-suite/trunk/configure (original) +++ test-suite/trunk/configure Tue Feb 8 18:37:57 2011 @@ -2078,6 +2078,9 @@ ac_config_commands="$ac_config_commands SingleSource/Makefile.singlesrc" +ac_config_commands="$ac_config_commands tools/Makefile" + + @@ -4873,7 +4876,7 @@ ;; *-*-irix6*) # Find out which ABI we are using. - echo '#line 4876 "configure"' > conftest.$ac_ext + echo '#line 4879 "configure"' > conftest.$ac_ext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>&5 ac_status=$? @@ -7038,11 +7041,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:7041: $lt_compile\"" >&5) + (eval echo "\"\$as_me:7044: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:7045: \$? = $ac_status" >&5 + echo "$as_me:7048: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -7306,11 +7309,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:7309: $lt_compile\"" >&5) + (eval echo "\"\$as_me:7312: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:7313: \$? = $ac_status" >&5 + echo "$as_me:7316: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -7410,11 +7413,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:7413: $lt_compile\"" >&5) + (eval echo "\"\$as_me:7416: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:7417: \$? = $ac_status" >&5 + echo "$as_me:7420: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized @@ -9862,7 +9865,7 @@ lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext < conftest.$ac_ext <&5) + (eval echo "\"\$as_me:12336: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:12337: \$? = $ac_status" >&5 + echo "$as_me:12340: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -12434,11 +12437,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:12437: $lt_compile\"" >&5) + (eval echo "\"\$as_me:12440: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:12441: \$? = $ac_status" >&5 + echo "$as_me:12444: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized @@ -14004,11 +14007,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:14007: $lt_compile\"" >&5) + (eval echo "\"\$as_me:14010: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:14011: \$? = $ac_status" >&5 + echo "$as_me:14014: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -14108,11 +14111,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:14111: $lt_compile\"" >&5) + (eval echo "\"\$as_me:14114: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:14115: \$? = $ac_status" >&5 + echo "$as_me:14118: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized @@ -16343,11 +16346,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:16346: $lt_compile\"" >&5) + (eval echo "\"\$as_me:16349: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:16350: \$? = $ac_status" >&5 + echo "$as_me:16353: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -16611,11 +16614,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:16614: $lt_compile\"" >&5) + (eval echo "\"\$as_me:16617: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:16618: \$? = $ac_status" >&5 + echo "$as_me:16621: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -16715,11 +16718,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:16718: $lt_compile\"" >&5) + (eval echo "\"\$as_me:16721: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:16722: \$? = $ac_status" >&5 + echo "$as_me:16725: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized @@ -21076,6 +21079,7 @@ "MultiSource/Makefile.multisrc") CONFIG_COMMANDS="$CONFIG_COMMANDS MultiSource/Makefile.multisrc" ;; "SingleSource/Makefile") CONFIG_COMMANDS="$CONFIG_COMMANDS SingleSource/Makefile" ;; "SingleSource/Makefile.singlesrc") CONFIG_COMMANDS="$CONFIG_COMMANDS SingleSource/Makefile.singlesrc" ;; + "tools/Makefile") CONFIG_COMMANDS="$CONFIG_COMMANDS tools/Makefile" ;; *) { { echo "$as_me:$LINENO: error: invalid argument: $ac_config_target" >&5 echo "$as_me: error: invalid argument: $ac_config_target" >&2;} @@ -21664,6 +21668,8 @@ ${SHELL} ${llvm_src}/autoconf/install-sh -m 0644 -c ${srcdir}/SingleSource/Makefile SingleSource/Makefile ;; "SingleSource/Makefile.singlesrc":C) ${llvm_src}/autoconf/mkinstalldirs `dirname SingleSource/Makefile.singlesrc` ${SHELL} ${llvm_src}/autoconf/install-sh -m 0644 -c ${srcdir}/SingleSource/Makefile.singlesrc SingleSource/Makefile.singlesrc ;; + "tools/Makefile":C) ${llvm_src}/autoconf/mkinstalldirs `dirname tools/Makefile` + ${SHELL} ${llvm_src}/autoconf/install-sh -m 0644 -c ${srcdir}/tools/Makefile tools/Makefile ;; esac done # for ac_tag From daniel at zuster.org Tue Feb 8 18:44:15 2011 From: daniel at zuster.org (Daniel Dunbar) Date: Wed, 09 Feb 2011 00:44:15 -0000 Subject: [llvm-commits] [test-suite] r125147 - in /test-suite/trunk: Makefile.programs Makefile.rules tools/Makefile tools/fpcmp.c tools/timeit.c Message-ID: <20110209004415.B52692A6C12C@llvm.org> Author: ddunbar Date: Tue Feb 8 18:44:15 2011 New Revision: 125147 URL: http://llvm.org/viewvc/llvm-project?rev=125147&view=rev Log: test-suite: Start sketching some tools. - timeit is just a simple replacement for /usr/bin/time which prints a whopping four digits of precision. That's right, FOUR! - fpcmp is just stubbed out at the moment. Yes, I will be reimplementing fpcmp in C. Added: test-suite/trunk/tools/fpcmp.c test-suite/trunk/tools/timeit.c Modified: test-suite/trunk/Makefile.programs test-suite/trunk/Makefile.rules test-suite/trunk/tools/Makefile Modified: test-suite/trunk/Makefile.programs URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Makefile.programs?rev=125147&r1=125146&r2=125147&view=diff ============================================================================== --- test-suite/trunk/Makefile.programs (original) +++ test-suite/trunk/Makefile.programs Tue Feb 8 18:44:15 2011 @@ -136,6 +136,11 @@ RUNSAFELY := $(RUNSAFELY) -u $(RUNUNDER) endif +ifdef TIMEIT +RUNSAFELY := $(RUNSAFELY) -t "$(TIMEIT)" +RUNSAFELYLOCAL := $(RUNSAFELYLOCAL) -t "$(TIMEIT)" +endif + RUNSAFELY := $(RUNSAFELY) $(RUNTIMELIMIT) $(EXIT_OK) RUNSAFELYLOCAL := $(RUNSAFELYLOCAL) $(RUNTIMELIMIT) $(EXIT_OK) endif Modified: test-suite/trunk/Makefile.rules URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Makefile.rules?rev=125147&r1=125146&r2=125147&view=diff ============================================================================== --- test-suite/trunk/Makefile.rules (original) +++ test-suite/trunk/Makefile.rules Tue Feb 8 18:44:15 2011 @@ -317,7 +317,18 @@ LPROF = $(LLVMTOOLCURRENT)/llvm-prof$(EXEEXT) LBUGPOINT = $(LLVMTOOLCURRENT)/bugpoint$(EXEEXT) LFINDMISOPT= $(LLVM_SRC_ROOT)/utils/findmisopt + +ifeq ($(HAS_LLVM),1) FPCMP = $(LLVMTOOLCURRENT)/fpcmp +else +FPCMP = $(PROJ_OBJ_ROOT)/tools/fpcmp +endif + +ifeq ($(HAS_LLVM),0) +# Not strictly related to HAS_LLVM, but otherwise in generally tools weren't +# being built. +TIMEIT = $(PROJ_OBJ_ROOT)/tools/timeit +endif LCC := $(LLVMCC) LCXX := $(LLVMCXX) Modified: test-suite/trunk/tools/Makefile URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/tools/Makefile?rev=125147&r1=125146&r2=125147&view=diff ============================================================================== --- test-suite/trunk/tools/Makefile (original) +++ test-suite/trunk/tools/Makefile Tue Feb 8 18:44:15 2011 @@ -1,2 +1,10 @@ LEVEL=.. include $(LEVEL)/Makefile.programs + +all:: timeit fpcmp + +timeit: timeit.c + $(CC) $(CFLAGS) -O3 -o $@ $< + +fpcmp: fpcmp.c + $(CC) $(CFLAGS) -O3 -o $@ $< Added: test-suite/trunk/tools/fpcmp.c URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/tools/fpcmp.c?rev=125147&view=auto ============================================================================== --- test-suite/trunk/tools/fpcmp.c (added) +++ test-suite/trunk/tools/fpcmp.c Tue Feb 8 18:44:15 2011 @@ -0,0 +1,14 @@ +/*===-- timeit.c - LLVM Test Suite Timing Tool ------------------*- C++ -*-===*\ +|* *| +|* The LLVM Compiler Infrastructure *| +|* *| +|* This file is distributed under the University of Illinois Open Source *| +|* License. See LICENSE.TXT for details. *| +|* *| +\*===----------------------------------------------------------------------===*/ + +#include + +int main(int argc, char * const argv[]) { + return 0; +} Added: test-suite/trunk/tools/timeit.c URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/tools/timeit.c?rev=125147&view=auto ============================================================================== --- test-suite/trunk/tools/timeit.c (added) +++ test-suite/trunk/tools/timeit.c Tue Feb 8 18:44:15 2011 @@ -0,0 +1,83 @@ +/*===-- timeit.c - LLVM Test Suite Timing Tool ------------------*- C++ -*-===*\ +|* *| +|* The LLVM Compiler Infrastructure *| +|* *| +|* This file is distributed under the University of Illinois Open Source *| +|* License. See LICENSE.TXT for details. *| +|* *| +\*===----------------------------------------------------------------------===*/ + +#include +#include +#include +#include +#include + +int g_posix_mode = 0; + +static double sample_wall_time(void) { + struct timeval t; + gettimeofday(&t, NULL); + return (double) t.tv_sec + t.tv_usec * 1.e-6; +} + +int execute(char * const argv[]) { + double start_time = sample_wall_time(); + pid_t pid = fork(); + + double real_time, user_time, sys_time; + struct rusage usage; + int res, status; + + if (!pid) { + execvp(argv[0], argv); + perror("execvp"); + return 127; + } + + res = waitpid(pid, &status, 0); + if (res < 0) { + perror("waitpid"); + return 126; + } + + real_time = sample_wall_time() - start_time; + + if (getrusage(RUSAGE_CHILDREN, &usage) < 0) { + perror("getrusage"); + return 125; + } + user_time = (double) usage.ru_utime.tv_sec + usage.ru_utime.tv_usec/1000000.0; + sys_time = (double) usage.ru_stime.tv_sec + usage.ru_stime.tv_usec/1000000.0; + + if (g_posix_mode) { + fprintf(stderr, "real %12.4f\nuser %12.4f\nsys %12.4f\n", + real_time, user_time, sys_time); + } else { + fprintf(stderr, "%12.4f real %12.4f user %12.4f sys\n", + real_time, user_time, sys_time); + } + + return WEXITSTATUS(status); +} + +int main(int argc, char * const argv[]) { + int i; + + for (i = 1; i != argc; ++i) { + if (argv[i][0] != '-') + break; + + switch (argv[i][1]) { + case 'p': + g_posix_mode = 1; + continue; + + default: + fprintf(stderr, "error: invalid argument '%s'\n", argv[i]); + return 1; + } + } + + return execute(&argv[i]); +} From stoklund at 2pi.dk Tue Feb 8 19:14:03 2011 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Wed, 09 Feb 2011 01:14:03 -0000 Subject: [llvm-commits] [llvm] r125151 - in /llvm/trunk/lib/CodeGen: RegAllocBase.h RegAllocBasic.cpp RegAllocGreedy.cpp Message-ID: <20110209011403.55B552A6C12C@llvm.org> Author: stoklund Date: Tue Feb 8 19:14:03 2011 New Revision: 125151 URL: http://llvm.org/viewvc/llvm-project?rev=125151&view=rev Log: Evict a lighter single interference before attempting to split a live range. Registers are not allocated strictly in spill weight order when live range splitting and spilling has created new shorter intervals with higher spill weights. When one of the new heavy intervals conflicts with a single lighter interval, simply evict the old interval instead of trying to split the heavy one. The lighter interval is a better candidate for splitting, it has a smaller use density. Modified: llvm/trunk/lib/CodeGen/RegAllocBase.h llvm/trunk/lib/CodeGen/RegAllocBasic.cpp llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp Modified: llvm/trunk/lib/CodeGen/RegAllocBase.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocBase.h?rev=125151&r1=125150&r2=125151&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/RegAllocBase.h (original) +++ llvm/trunk/lib/CodeGen/RegAllocBase.h Tue Feb 8 19:14:03 2011 @@ -139,6 +139,15 @@ // exists, return the interfering register, which may be preg or an alias. unsigned checkPhysRegInterference(LiveInterval& VirtReg, unsigned PhysReg); + /// assign - Assign VirtReg to PhysReg. + /// This should not be called from selectOrSplit for the current register. + void assign(LiveInterval &VirtReg, unsigned PhysReg); + + /// unassign - Undo a previous assignment of VirtReg to PhysReg. + /// This can be invoked from selectOrSplit, but be careful to guarantee that + /// allocation is making progress. + void unassign(LiveInterval &VirtReg, unsigned PhysReg); + // Helper for spilling all live virtual registers currently unified under preg // that interfere with the most recently queried lvr. Return true if spilling // was successful, and append any new spilled/split intervals to splitLVRs. Modified: llvm/trunk/lib/CodeGen/RegAllocBasic.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocBasic.cpp?rev=125151&r1=125150&r2=125151&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/RegAllocBasic.cpp (original) +++ llvm/trunk/lib/CodeGen/RegAllocBasic.cpp Tue Feb 8 19:14:03 2011 @@ -238,6 +238,18 @@ } } +void RegAllocBase::assign(LiveInterval &VirtReg, unsigned PhysReg) { + assert(!VRM->hasPhys(VirtReg.reg) && "Duplicate VirtReg assignment"); + VRM->assignVirt2Phys(VirtReg.reg, PhysReg); + PhysReg2LiveUnion[PhysReg].unify(VirtReg); +} + +void RegAllocBase::unassign(LiveInterval &VirtReg, unsigned PhysReg) { + assert(VRM->getPhys(VirtReg.reg) == PhysReg && "Inconsistent unassign"); + PhysReg2LiveUnion[PhysReg].extract(VirtReg); + VRM->clearVirt(VirtReg.reg); +} + // Top-level driver to manage the queue of unassigned VirtRegs and call the // selectOrSplit implementation. void RegAllocBase::allocatePhysRegs() { @@ -264,9 +276,7 @@ if (AvailablePhysReg) { DEBUG(dbgs() << "allocating: " << TRI->getName(AvailablePhysReg) << " for " << VirtReg << '\n'); - assert(!VRM->hasPhys(VirtReg.reg) && "duplicate vreg in union"); - VRM->assignVirt2Phys(VirtReg.reg, AvailablePhysReg); - PhysReg2LiveUnion[AvailablePhysReg].unify(VirtReg); + assign(VirtReg, AvailablePhysReg); } for (VirtRegVec::iterator I = SplitVRegs.begin(), E = SplitVRegs.end(); I != E; ++I) { @@ -308,10 +318,7 @@ // Deallocate the interfering vreg by removing it from the union. // A LiveInterval instance may not be in a union during modification! - PhysReg2LiveUnion[PhysReg].extract(SpilledVReg); - - // Clear the vreg assignment. - VRM->clearVirt(SpilledVReg.reg); + unassign(SpilledVReg, PhysReg); // Spill the extracted interval. spiller().spill(&SpilledVReg, SplitVRegs, PendingSpills); Modified: llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp?rev=125151&r1=125150&r2=125151&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp (original) +++ llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp Tue Feb 8 19:14:03 2011 @@ -133,7 +133,6 @@ bool checkUncachedInterference(LiveInterval&, unsigned); LiveInterval *getSingleInterference(LiveInterval&, unsigned); bool reassignVReg(LiveInterval &InterferingVReg, unsigned OldPhysReg); - bool reassignInterferences(LiveInterval &VirtReg, unsigned PhysReg); float calcInterferenceWeight(LiveInterval&, unsigned); void calcLiveBlockInfo(LiveInterval&); float calcInterferenceInfo(LiveInterval&, unsigned); @@ -141,7 +140,8 @@ void splitAroundRegion(LiveInterval&, unsigned, const BitVector&, SmallVectorImpl&); - unsigned tryReassign(LiveInterval&, AllocationOrder&); + unsigned tryReassignOrEvict(LiveInterval&, AllocationOrder&, + SmallVectorImpl&); unsigned tryRegionSplit(LiveInterval&, AllocationOrder&, SmallVectorImpl&); unsigned trySplit(LiveInterval&, AllocationOrder&, @@ -286,41 +286,54 @@ unsigned OldAssign = VRM->getPhys(InterferingVReg.reg); DEBUG(dbgs() << "reassigning: " << InterferingVReg << " from " << TRI->getName(OldAssign) << " to " << TRI->getName(PhysReg) << '\n'); - PhysReg2LiveUnion[OldAssign].extract(InterferingVReg); - VRM->clearVirt(InterferingVReg.reg); - VRM->assignVirt2Phys(InterferingVReg.reg, PhysReg); - PhysReg2LiveUnion[PhysReg].unify(InterferingVReg); - + unassign(InterferingVReg, OldAssign); + assign(InterferingVReg, PhysReg); return true; } return false; } -/// reassignInterferences - Reassign all interferences to different physical -/// registers such that Virtreg can be assigned to PhysReg. -/// Currently this only works with a single interference. -/// @param VirtReg Currently unassigned virtual register. -/// @param PhysReg Physical register to be cleared. -/// @return True on success, false if nothing was changed. -bool RAGreedy::reassignInterferences(LiveInterval &VirtReg, unsigned PhysReg) { - LiveInterval *InterferingVReg = getSingleInterference(VirtReg, PhysReg); - if (!InterferingVReg) - return false; - if (TargetRegisterInfo::isPhysicalRegister(InterferingVReg->reg)) - return false; - return reassignVReg(*InterferingVReg, PhysReg); -} - -/// tryReassign - Try to reassign interferences to different physregs. +/// tryReassignOrEvict - Try to reassign a single interferences to a different +/// physreg, or evict a single interference with a lower spill weight. /// @param VirtReg Currently unassigned virtual register. /// @param Order Physregs to try. /// @return Physreg to assign VirtReg, or 0. -unsigned RAGreedy::tryReassign(LiveInterval &VirtReg, AllocationOrder &Order) { +unsigned RAGreedy::tryReassignOrEvict(LiveInterval &VirtReg, + AllocationOrder &Order, + SmallVectorImpl &NewVRegs){ NamedRegionTimer T("Reassign", TimerGroupName, TimePassesIsEnabled); + + // Keep track of the lightest single interference seen so far. + float BestWeight = VirtReg.weight; + LiveInterval *BestVirt = 0; + unsigned BestPhys = 0; + Order.rewind(); - while (unsigned PhysReg = Order.next()) - if (reassignInterferences(VirtReg, PhysReg)) + while (unsigned PhysReg = Order.next()) { + LiveInterval *InterferingVReg = getSingleInterference(VirtReg, PhysReg); + if (!InterferingVReg) + continue; + if (TargetRegisterInfo::isPhysicalRegister(InterferingVReg->reg)) + continue; + if (reassignVReg(*InterferingVReg, PhysReg)) return PhysReg; + + // Cannot reassign, is this an eviction candidate? + if (InterferingVReg->weight < BestWeight) { + BestVirt = InterferingVReg; + BestPhys = PhysReg; + BestWeight = InterferingVReg->weight; + } + } + + // Nothing reassigned, can we evict a lighter single interference? + if (BestVirt) { + DEBUG(dbgs() << "evicting lighter " << *BestVirt << '\n'); + unassign(*BestVirt, VRM->getPhys(BestVirt->reg)); + NewVRegs.push_back(BestVirt); + return BestPhys; + } + return 0; } @@ -1029,8 +1042,7 @@ Spills.append(Q.interferingVRegs().begin(), Q.interferingVRegs().end()); for (unsigned i = 0, e = Q.interferingVRegs().size(); i != e; ++i) { LiveInterval *VReg = Q.interferingVRegs()[i]; - PhysReg2LiveUnion[*AI].extract(*VReg); - VRM->clearVirt(VReg->reg); + unassign(*VReg, *AI); } } @@ -1057,7 +1069,7 @@ } // Try to reassign interferences. - if (unsigned PhysReg = tryReassign(VirtReg, Order)) + if (unsigned PhysReg = tryReassignOrEvict(VirtReg, Order, NewVRegs)) return PhysReg; assert(NewVRegs.empty() && "Cannot append to existing NewVRegs"); From daniel at zuster.org Tue Feb 8 19:32:00 2011 From: daniel at zuster.org (Daniel Dunbar) Date: Wed, 09 Feb 2011 01:32:00 -0000 Subject: [llvm-commits] [test-suite] r125155 - /test-suite/trunk/tools/fpcmp.c Message-ID: <20110209013200.4D9492A6C12C@llvm.org> Author: ddunbar Date: Tue Feb 8 19:32:00 2011 New Revision: 125155 URL: http://llvm.org/viewvc/llvm-project?rev=125155&view=rev Log: test-suite/fpcmp: Implement the bare minimum cmp functionality. - No support for the "fp" part of the tool yet. Modified: test-suite/trunk/tools/fpcmp.c Modified: test-suite/trunk/tools/fpcmp.c URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/tools/fpcmp.c?rev=125155&r1=125154&r2=125155&view=diff ============================================================================== --- test-suite/trunk/tools/fpcmp.c (original) +++ test-suite/trunk/tools/fpcmp.c Tue Feb 8 19:32:00 2011 @@ -8,7 +8,135 @@ \*===----------------------------------------------------------------------===*/ #include +#include +#include + +char *load_file(const char *path, long *size_out) { + FILE *fp; + long size; + char *data; + + /* Open the file... */ + fp = fopen(path, "rb"); + if (!fp) { + fprintf(stderr, "error: unable to open '%s'\n", path); + exit(2); + } + + /* Determine the file size. */ + if (fseek(fp, 0, SEEK_END) == -1) { + fprintf(stderr, "error: unable to seek '%s'\n", path); + exit(2); + } + size = ftell(fp); + if (fseek(fp, 0, SEEK_SET) == -1) { + fprintf(stderr, "error: unable to seek '%s'\n", path); + exit(2); + } + + /* Avoid malloc(0). */ + if (size == 0) { + *size_out = 0; + return 0; + } + + /* Allocate a buffer for the data. */ + data = malloc(size); + if (!data) { + fprintf(stderr, "error: unable to allocate buffer for '%s'\n", path); + exit(2); + } + + /* Read in the file contents. */ + if (fread(data, size, 1, fp) != 1) { + fprintf(stderr, "error: unable to read data for '%s'\n", path); + exit(2); + } + + /* Close the file and return the data. */ + fclose(fp); + *size_out = size; + return data; +} + +int diff_files_with_tolerance(const char *path_a, const char *path_b, + double absolute_tolerance, + double relative_tolerance) { + /* First, load the file buffers completely into memory. */ + long size_a, size_b; + char *data_a = load_file(path_a, &size_a); + char *data_b = load_file(path_b, &size_b); + + /* Fast path equivalent buffers. */ + if (size_a == size_b && memcmp(data_a, data_b, size_a) == 0) + return 0; + + /* Otherwise, if our tolerances are 0 then we are done. */ + if (relative_tolerance == 0.0 && absolute_tolerance == 0.0) + return 1; + + /* FIXME: Implement support for relative tolerances. */ + fprintf(stderr, "FIXME: this version of fcmp doesn't " + "support relative tolerances yet.\n"); + return 2; +} + +void usage(const char *program) { + fprintf(stderr, "usage: %s [-a VALUE] [-r VALUE] \n\n", + program); + fprintf(stderr, "Compare two files using absolute and relative tolerances\n"); + fprintf(stderr, "when comparing differences between two character\n"); + fprintf(stderr, "which could be real numbers\n"); + exit(2); +} int main(int argc, char * const argv[]) { - return 0; + double relative_tolerance = 0.0; + double absolute_tolerance = 0.0; + int i; + + for (i = 1; i != argc; ++i) { + const char *arg = argv[i]; + if (arg[0] != '-') + break; + + if (strlen(arg) != 2) { + fprintf(stderr, "error: invalid argument '%s'\n\n", arg); + usage(argv[0]); + } + + switch (arg[1]) { + case 'a': + case 'r': + if (i + 1 == argc) { + fprintf(stderr, "error: missing argument to '%s'\n\n", arg); + usage(argv[0]); + } else { + char *endp = 0; + double value = strtod(argv[++i], &endp); + if (endp == 0 || *endp != '\0') { + fprintf(stderr, "error: invalid argument to '%s': '%s'\n\n", arg, + argv[i]); + usage(argv[0]); + } + if (arg[1] == 'a') + absolute_tolerance = value; + else + relative_tolerance = value; + } + break; + + default: + fprintf(stderr, "error: invalid argument '%s'\n\n", arg); + usage(argv[0]); + } + } + + if (i + 2 != argc) { + fprintf(stderr, "error: invalid number of arguments\n\n"); + usage(argv[0]); + } + + return diff_files_with_tolerance(argv[i], argv[i + 1], + absolute_tolerance, relative_tolerance); } From david_dean at apple.com Tue Feb 8 20:53:36 2011 From: david_dean at apple.com (David Dean) Date: Wed, 09 Feb 2011 02:53:36 -0000 Subject: [llvm-commits] [zorg] r125159 - in /zorg/trunk/buildbot/llvmlab/master/config: builders.py schedulers.py Message-ID: <20110209025336.CF4252A6C12C@llvm.org> Author: ddean Date: Tue Feb 8 20:53:36 2011 New Revision: 125159 URL: http://llvm.org/viewvc/llvm-project?rev=125159&view=rev Log: address a majority of Daniel's style nits Modified: zorg/trunk/buildbot/llvmlab/master/config/builders.py zorg/trunk/buildbot/llvmlab/master/config/schedulers.py Modified: zorg/trunk/buildbot/llvmlab/master/config/builders.py URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/buildbot/llvmlab/master/config/builders.py?rev=125159&r1=125158&r2=125159&view=diff ============================================================================== --- zorg/trunk/buildbot/llvmlab/master/config/builders.py (original) +++ zorg/trunk/buildbot/llvmlab/master/config/builders.py Tue Feb 8 20:53:36 2011 @@ -6,24 +6,22 @@ from buildbot.steps import source def setProperty(f, new_property, new_value): - f.addStep(buildbot.steps.shell.SetProperty( - command=['echo', new_value], + f.addStep(buildbot.steps.shell.SetProperty(command=['echo', new_value], property=new_property, - description=['set property', new_property], - )) + description=['set property', new_property])) return f -def pullsrc(f, repo_name, URL, dir, pull_mode='clobber', def_branch='trunk', UseLatest='False'): - f.addStep(source.SVN(name='pull ' + repo_name, +# This serves as a generic method to pull different repositories. +def pullsrc(f, repo_name, URL, dir, pull_mode='clobber', def_branch='trunk', UseLatest=False): + f.addStep(source.SVN(name='pull.' + repo_name, mode=pull_mode, baseURL=URL, - defaultBranch=def_branch, workdir=dir, always_purge='True' - )) + defaultBranch=def_branch, workdir=dir, always_purge=True, + alwaysUseLatest=UseLatest)) return f - def pullClang(f): - pullsrc(f, 'clang', 'http://llvm.org/svn/llvm-project/cfe/', 'llvm/tools/clang', ) + pullsrc(f, 'clang', 'http://llvm.org/svn/llvm-project/cfe/', 'llvm/tools/clang') return f def pullllvm(f): @@ -31,57 +29,50 @@ return f def pulltest_suite(f): - pullsrc(f, 'llvm tests', 'http://llvm.org/svn/llvm-project/test-suite/', 'test-suite', 'clobber', 'trunk', 'True') + pullsrc(f, 'llvm tests', 'http://llvm.org/svn/llvm-project/test-suite/', 'test-suite', + 'clobber', 'trunk', 'True') return f def pullclang_tests(f): pullsrc(f, 'clang tests', 'http://llvm.org/svn/llvm-project/clang-tests/', 'test-suite') return f -def pulllibcxx(f): - pullsrc(f, 'libc++', 'http://llvm.org/svn/llvm-project/libcxx/', 'libcxx') - return f - def pullboostrunner(f): -#alwaysUseLatest -#pullsrc(f, 'boost runner', 'http://svn.boost.org/svn/boost/%%BRANCH%%/tools/regression/src/', 'boost_runner') - f.addStep(source.SVN(name='pull boost runner', - mode='clobber', - baseURL='http://svn.boost.org/svn/boost/%%BRANCH%%/tools/regression/src/', - defaultBranch='trunk', workdir='boost_runner', alwaysUseLatest='True', - )) + pullsrc(f, 'boost.runner', 'http://svn.boost.org/svn/boost/%%BRANCH%%/tools/regression/src/', + 'boost_runner', 'clobber', 'trunk', 'True') return f def getBuildDir(f): - f.addStep(buildbot.steps.shell.SetProperty(name='get_builddir', + f.addStep(buildbot.steps.shell.SetProperty(name='get.build.dir', command=['pwd'], property='builddir', description='set build dir', - workdir='.', - )) + workdir='.')) return f def GetCompilerArtifacts(f): + # The 'revision' property is always defined, so it is safer to use. + # That being said, it has not yet been set to a valid number for phase 1 builds. + # You must use 'got_build' to determine which revision was actually pulled. if WithProperties('%(revision)s')=='None': - src_file = WithProperties('buildmaster at llvmlab.local:~/artifacts/%(use_builder)s/%(got_revision)s/clang-*.tar.gz') + src_file = WithProperties('buildmaster at llvmlab.local:~/artifacts/%(use_builder)s/' + + 'clang-r%(got_revision)s-*.tar.gz') else: - src_file = WithProperties('buildmaster at llvmlab.local:~/artifacts/%(use_builder)s/%(revision)s/clang-*.tar.gz') + src_file = WithProperties('buildmaster at llvmlab.local:~/artifacts/%(use_builder)s/' + + 'clang-r%(revision)s-*.tar.gz') slavedest=WithProperties('%(builddir)s/clang-host.tar.gz') f.addStep(buildbot.steps.shell.ShellCommand( - name='download_artifacts', - command=['rsync', '-ave', 'ssh', src_file, slavedest ], + name='download.artifacts', + command=['rsync', '-ave', 'ssh', src_file, slavedest], haltOnFailure=True, description=['download build artifacts'], - workdir=WithProperties('%(builddir)s'), - )) - #extract compiler artifacts used for this build + workdir=WithProperties('%(builddir)s'))) f.addStep(buildbot.steps.shell.ShellCommand( name='unzip', - command=['tar', '-zxvf','../clang-host.tar.gz',], + command=['tar', '-zxvf','../clang-host.tar.gz'], haltOnFailure=True, description=['extract', 'clang-host'], - workdir='clang-host', - )) + workdir='clang-host')) return f def cleanCompilerDir(f): @@ -89,106 +80,104 @@ command=['rm', '-rfv', 'clang-install'], haltOnFailure=False, description=['rm dir', 'clang-install'], - workdir=WithProperties('%(builddir)s'), - )) + workdir=WithProperties('%(builddir)s'))) f.addStep(buildbot.steps.shell.ShellCommand( command=['rm', '-rfv', 'clang-host'], haltOnFailure=False, description=['rm dir', 'clang-host'], - workdir=WithProperties('%(builddir)s'), - )) + workdir=WithProperties('%(builddir)s'))) f.addStep(buildbot.steps.shell.ShellCommand( command=['sh', '-c', 'rm -rfv clang*.tar.gz'], haltOnFailure=False, description=['rm archives'], - workdir=WithProperties('%(builddir)s'), - )) + workdir=WithProperties('%(builddir)s'))) f.addStep(buildbot.steps.shell.ShellCommand( command=['rm', '-rfv', WithProperties('%(compiler_built:-)s')], haltOnFailure=False, description=['rm dir', WithProperties('%(compiler_built:-)s')], - workdir=WithProperties('%(builddir)s'), - )) + workdir=WithProperties('%(builddir)s'))) return f def uploadArtifacts(f): f.addStep(buildbot.steps.shell.ShellCommand( - name='tar_and_zip', - command=['tar', 'czvf', WithProperties('../clang-r%(got_revision)s-b%(buildnumber)s.tar.gz'), + name='tar.and.zip', + command=['tar', 'czvf', + WithProperties('../clang-r%(got_revision)s-b%(buildnumber)s.tar.gz'), './'], haltOnFailure=True, description=['tar', '&', 'zip'], - workdir='clang-install', - )) + workdir='clang-install')) archive_src = WithProperties('%(builddir)s/clang-r%(got_revision)s-b%(buildnumber)s.tar.gz') + archive_dest = WithProperties('buildmaster at llvmlab.local:~/artifacts/%(buildername)s') f.addStep(buildbot.steps.shell.ShellCommand( - name='upload_artifacts', - command=['rsync', '-ave', 'ssh', archive_src, - WithProperties('buildmaster at llvmlab.local:~/artifacts/%(buildername)s/%(got_revision)s/') - ], + name='upload.artifacts', + command=['rsync', '-ave', 'ssh', archive_src, archive_dest], haltOnFailure=True, description=['upload build artifacts'], - workdir=WithProperties('%(builddir)s'), - )) - setProperty(f, 'artifactsURL', WithProperties('http://smooshlab.apple.com/artifacts/%(buildername)s/clang-r%(got_revision)s-b%(buildnumber)s.tar.gz') ) + workdir=WithProperties('%(builddir)s'))) + artifactsURL = WithProperties('http://smooshlab.apple.com/artifacts/%(buildername)s' + + '/clang-r%(got_revision)s-b%(buildnumber)s.tar.gz') + setProperty(f, 'artifactsURL', artifactsURL) return f def regressionTests(f): f.addStep(buildbot.steps.shell.ShellCommand( - name='run_llvm_tests', - command=['make', '-j', WithProperties('%(jobs)s'), - ], + name='run.llvm.tests', + command=['make', '-j', WithProperties('%(jobs)s')], haltOnFailure=True, description=['llvm', 'tests'], - env={'PATH': WithProperties('%(builddir)s/%(compiler_built)s/%(compiler_type)s/bin:${PATH}')}, + env={'PATH': + WithProperties('%(builddir)s/%(compiler_built)s/%(compiler_type)s/bin:${PATH}')}, workdir=WithProperties('%(compiler_built)s/test'))) f.addStep(buildbot.steps.shell.ShellCommand( - name='run_clang_tests', - command=['make', '-j', WithProperties('%(jobs)s'), - ], + name='run.clang.tests', + command=['make', '-j', WithProperties('%(jobs)s')], haltOnFailure=True, description=['clang', 'tests'], - env={'PATH': WithProperties('%(builddir)s/%(compiler_built)s/%(compiler_type)s/bin:${PATH}')}, + env={'PATH': + WithProperties('%(builddir)s/%(compiler_built)s/%(compiler_type)s/bin:${PATH}')}, workdir=WithProperties('%(compiler_built)s/tools/clang/test'))) return f def createPhase1(): - # create the factory + # Create an instance of the Builder. f = buildbot.process.factory.BuildFactory() f = clangStage1(f) + # Save artifacts of thids build for use by other builders. f = uploadArtifacts(f) f = regressionTests(f) return f -def clangStage1(f,config_options=''): +def clangStage1(f, config_options=''): # Determine the build directory. f = getBuildDir(f) - # clean out the directory used for the stage 1 compiler + # Clean out the directories/archives used to ensure a clean build. f = cleanCompilerDir(f) - # pull sources + # Pull sources. f = pullllvm(f) f = pullClang(f) - # do config/make + # Configure to use built-in compiler. f.addStep(buildbot.steps.shell.ShellCommand( name='configure', command=[ '../llvm/configure', '--enable-optimized', '--disable-bindings', '--with-llvmcc=clang', '--without-llvmgcc', '--without-llvmgxx', - WithProperties('--prefix=/'), - ], + WithProperties('--prefix=/')], haltOnFailure=True, description=['configure'], workdir=WithProperties('%(compiler_built)s'))) + # Build clang. f.addStep(buildbot.steps.shell.ShellCommand( name='make', - command=['make', '-j', WithProperties('%(jobs)s'),], + command=['make', '-j', WithProperties('%(jobs)s')], haltOnFailure=True, description=['make'], workdir=WithProperties('%(compiler_built)s'))) + # Use make inatall-clang to produce minimal archive for use by downstream builders. f.addStep(buildbot.steps.shell.ShellCommand( - name='make install', + name='make.install-clang', command=['make', 'install-clang', '-j', WithProperties('%(jobs)s'), WithProperties('DESTDIR=%(builddir)s/clang-install')], haltOnFailure=True, @@ -197,54 +186,53 @@ return f def clangHost(config_options): - # create the factory + # Create an instance of the Builder. f = buildbot.process.factory.BuildFactory() # Determine the build directory. f = getBuildDir(f) f = setProperty(f, 'use_path', WithProperties('%(builddir)s/clang-host/bin')) - # clean out the directory/archives used for the stage 1 compiler - # clean out the directory used to build compiler + # Clean out the directories/archives used to ensure a clean build. f = cleanCompilerDir(f) - # pull sources + # Pull sources. f = pullllvm(f) f = pullClang(f) - #Download artifacts from phase 1 compiler build + # Download artifacts from phase 1 compiler build. f = GetCompilerArtifacts(f) - # configure to use stage1 compiler (artifacts from phase 1 build) if config_options == (): config_options = [] else: config_options = list(config_options) + # Configure to use artifacts from upstream builder. f.addStep(buildbot.steps.shell.ShellCommand( - name='configure_with_host', + name='configure.with.host', command=[ - '../llvm/configure',] + config_options + ['--disable-bindings', + '../llvm/configure'] + config_options + ['--disable-bindings', '--with-llvmcc=clang', '--without-llvmgcc', '--without-llvmgxx', WithProperties('CC=%(use_path)s/clang'), WithProperties('CXX=%(use_path)s/clang++'), - WithProperties('--prefix=/'), - ], + WithProperties('--prefix=/')], haltOnFailure=True, description=['configure'], env={'PATH': WithProperties('%(use_path)s:${PATH}')}, workdir=WithProperties('%(compiler_built)s'))) - # build stage 2 compiler + # Build clang using clang. f.addStep(buildbot.steps.shell.ShellCommand( - name='stage_2_make', + name='stage.2.make', command=['make', '-j', WithProperties('%(jobs)s')], haltOnFailure=True, description=['make'], env={'PATH': WithProperties('%(use_path)s:${PATH}')}, workdir=WithProperties('%(compiler_built)s'))) + # Use make inatall-clang to produce minimal archive for use by downstream builders. f.addStep(buildbot.steps.shell.ShellCommand( - name='make install', + name='make.install-clang', command=['make', 'install-clang', '-j', WithProperties('%(jobs)s'), WithProperties('DESTDIR=%(builddir)s/clang-install')], env={'PATH': WithProperties('%(use_path)s:${PATH}')}, haltOnFailure=True, description=['make install'], workdir=WithProperties('%(compiler_built)s'))) - # save artifacts of thids build for use by other builders + # Save artifacts of thids build for use by other builders. f = uploadArtifacts(f) f = regressionTests(f) return f @@ -255,20 +243,18 @@ waitForFinish=True, haltOnFailure=True, updateSourceStamp=True, - set_properties={'revision': WithProperties('%(revision)s'), 'got_revision': WithProperties('%(revision)s')} -# set_properties={'use_compiler': WithProperties('%(use_compiler:-stage1)s'), -# 'use_builder': WithProperties('%(use_builder:-phase1)s')}, - )) + set_properties={'revision': WithProperties('%(revision)s'), + 'got_revision': WithProperties('%(revision)s')})) f.addStep(Trigger(schedulerNames=[next], waitForFinish=False, updateSourceStamp=True, - set_properties={'revision': WithProperties('%(revision)s'), 'got_revision': WithProperties('%(revision)s')} - )) + set_properties={'revision': WithProperties('%(revision)s'), + 'got_revision': WithProperties('%(revision)s')})) return f def PublishGoodBuild(): f = buildbot.process.factory.BuildFactory() - #add steps to prepare a release and announce a good build + # TODO: Add steps to prepare a release and announce a good build. return f def Placeholder(): @@ -279,8 +265,7 @@ return { 'name' : bldname, 'factory' : getGatedFactory(trigger1, trigger2), 'slavenames' : bldslaves , - 'category' : 'status', - } + 'category' : 'status'} def HostedClang(myname, compiler_type, use_compiler, slaves, *config_options): return { 'name' : myname, @@ -290,8 +275,7 @@ 'category' : 'clang', 'properties' : {'compiler_type': compiler_type, 'use_builder': use_compiler, - 'compiler_built': 'clang-build' - }} + 'compiler_built': 'clang-build'}} def CreateNightly(options): f = buildbot.process.factory.BuildFactory() @@ -303,40 +287,37 @@ # Determine the build directory. f = getBuildDir(f) f = setProperty(f, 'use_path', WithProperties('%(builddir)s/clang-host/bin')) - #clean out the directory/archives prior to extracting compiler + # Clean out the directories/archives used to ensure a clean build. f = cleanCompilerDir(f) - #Download compiler artifacts to be used for this build + # Download compiler artifacts to be used for this build. f = GetCompilerArtifacts(f) f.addStep(buildbot.steps.shell.ShellCommand( - name='sanity_test', + name='sanity.test', command=[WithProperties('%(use_path)s/clang'), '--version'], haltOnFailure=True, description=['sanity test'], - env={'PATH': WithProperties('%(use_path)s:${PATH}')}, - )) - # pull source code + env={'PATH': WithProperties('%(use_path)s:${PATH}')})) + # Pull source code. f = pullllvm(f) f = pullClang(f) f = pulltest_suite(f) - # must build llvm utils, so configure llvm and build - # TODO: build less of llvm + # It is currently necessary to build llvm in order for nightly tests to build and run. + # TODO: build less of llvm. f.addStep(buildbot.steps.shell.ShellCommand( - name='configure_with_host', + name='configure.with.host', command=[ '../llvm/configure', '--enable-optimized', '--disable-bindings', '--with-llvmcc=clang', '--without-llvmgcc', '--without-llvmgxx', WithProperties('CC=%(use_path)s/clang'), - WithProperties('CXX=%(use_path)s/clang++'), - ], + WithProperties('CXX=%(use_path)s/clang++')], haltOnFailure=True, description=['configure'], env={'PATH': WithProperties('%(use_path)s:${PATH}')}, workdir='llvm.obj')) f.addStep(buildbot.steps.shell.ShellCommand( name='make', - command=['make', 'tools-only', '-j', WithProperties('%(jobs)s'), - ], + command=['make', 'tools-only', '-j', WithProperties('%(jobs)s')], env={'PATH': WithProperties('%(use_path)s:${PATH}')}, haltOnFailure=True, description=['make'], @@ -348,37 +329,32 @@ command=["rm", "-rfv", "test-suite-build"], haltOnFailure=True, description="rm test-suite build dir", - workdir=WithProperties('%(builddir)s'), - )) - # Configure. + workdir=WithProperties('%(builddir)s'))) + # Configure tests to use clang from upstream build. f.addStep(buildbot.steps.shell.ShellCommand( - name='configure_tests', + name='configure.tests', command=['../test-suite/configure', WithProperties('CC=%(use_path)s/clang'), WithProperties('CXX=%(use_path)s/clang++'), 'CFLAGS='+options, 'CXXFLAGS='+options, WithProperties('--with-llvmsrc=%(builddir)s/llvm'), - WithProperties('--with-llvmobj=%(builddir)s/llvm.obj'), - ], + WithProperties('--with-llvmobj=%(builddir)s/llvm.obj')], haltOnFailure=True, description=['configure tests'], env={'PATH': WithProperties('%(use_path)s:${PATH}')}, - workdir='test-suite-build', - )) + workdir='test-suite-build')) # Build and test. f.addStep(NightlyTestCommand( - name='run_fast_nightly_tests', + name='run.fast.nightly.tests', command=['make', WithProperties('-j%(jobs)s'), 'ENABLE_PARALLEL_REPORT=1', - 'DISABLE_CBE=1', 'DISABLE_JIT=1', 'TEST=nightly', 'report' - ], + 'DISABLE_CBE=1', 'DISABLE_JIT=1', 'TEST=nightly', 'report'], env={'PATH': WithProperties('%(use_path)s:${PATH}')}, haltOnFailure=True, description=["run", "test-suite"], workdir='test-suite-build', - logfiles={ 'report' : 'report.nightly.txt' }, - xfails=xfails - )) + logfiles={ 'report' : 'report.nightly.txt'}, + xfails=xfails)) return f def Nightly(compiler, slaves, options=''): @@ -387,7 +363,7 @@ 'factory' : CreateNightly(options), 'slavenames' : slaves, 'category' : 'tests', - 'properties' : {'use_builder': compiler }} + 'properties' : {'use_builder': compiler}} def stage1Clang(compiler, compiler_type, slave): return { 'name' : compiler, @@ -396,55 +372,53 @@ 'slavename' : slave, 'category' : 'clang', 'properties' : {'compiler_type': compiler_type, - 'compiler_built': 'clang-build' - }} + 'compiler_built': 'clang-build'}} def HostStage3Clang(config_options): - # create the factory + # Create instance of Builder. f = buildbot.process.factory.BuildFactory() # Determine the build directory. f = getBuildDir(f) f = setProperty(f, 'use_path', WithProperties('%(builddir)s/clang-host/bin')) - # clean out the directory/archives used for the stage 2 compiler - # clean out the directory used to build compiler + # Clean out the directories/archives used to ensure a clean build. f = cleanCompilerDir(f) - # pull sources + # Pull sources. f = pullllvm(f) f = pullClang(f) - #Download artifacts from phase 1 compiler build + # Download artifacts from upstream builder. f = GetCompilerArtifacts(f) - # configure to use stage1 compiler (artifacts from phase 1 build) + # Configure to use compiler from upstream builder. f.addStep(buildbot.steps.shell.ShellCommand( - name='configure_with_host', + name='configure.with.host', command=[ '../llvm/configure', '--enable-optimized', '--disable-bindings', '--with-llvmcc=clang', '--without-llvmgcc', '--without-llvmgxx', config_options, WithProperties('CC=%(use_path)s/clang'), WithProperties('CXX=%(use_path)s/clang++'), - WithProperties('--prefix=/'), - ], + WithProperties('--prefix=/')], haltOnFailure=True, description=['configure'], env={'PATH': WithProperties('%(use_path)s:${PATH}')}, workdir=WithProperties('%(compiler_built)s'))) - # build stage 2 compiler + # Build clang using clang. f.addStep(buildbot.steps.shell.ShellCommand( - name='stage_3_make', + name='stage.3.make', command=['make', '-j', WithProperties('%(jobs)s')], haltOnFailure=True, description=['make'], env={'PATH': WithProperties('%(use_path)s:${PATH}')}, workdir=WithProperties('%(compiler_built)s'))) + # Use make inatall-clang to produce minimal archive for use by downstream builders. f.addStep(buildbot.steps.shell.ShellCommand( - name='make install', + name='make.install-clang', command=['make', 'install-clang', '-j', WithProperties('%(jobs)s'), WithProperties('DESTDIR=%(builddir)s/clang-install')], env={'PATH': WithProperties('%(use_path)s:${PATH}')}, haltOnFailure=True, description=['make install'], workdir=WithProperties('%(compiler_built)s'))) - # save artifacts of thids build for use by other builders + # Save artifacts of thids build for use by downstream builders. f = uploadArtifacts(f) f = regressionTests(f) NightlyFactory(f, '') @@ -458,8 +432,7 @@ 'category' : 'clang', 'properties' : {'use_builder': use_compiler, 'compiler_type': 'Release+Asserts', - 'compiler_built': 'clang-build' - }} + 'compiler_built': 'clang-build'}} def gccTestSuite(use_compiler, slaves, config_options=''): return { 'name' : 'gccTestSuite-'+ use_compiler, @@ -467,17 +440,7 @@ 'factory' : gccRunSuite(config_options), 'slavenames' : slaves, 'category' : 'clang', - 'properties' : { 'use_builder': use_compiler, - }} - -def libcxx(use_compiler, slaves, config_options=''): - return { 'name' : 'libcxx-'+ use_compiler, - 'builddir' : 'build.'+ 'libcxx-'+ use_compiler, - 'factory' : runlibcxx(config_options), - 'slavenames' : slaves, - 'category' : 'clang', - 'properties' : { 'use_builder': use_compiler, - }} + 'properties' : { 'use_builder': use_compiler}} def boost(tag, use_compiler, slaves, config_options=''): return { 'name' : 'boost-' + tag + '-' + use_compiler, @@ -486,8 +449,7 @@ 'slavenames' : slaves, 'category' : 'clang', 'properties' : {'use_builder': use_compiler, - 'boost_tag': tag - }} + 'boost_tag': tag}} def gccRunSuite(config_options): f = buildbot.process.factory.BuildFactory() @@ -495,63 +457,34 @@ getBuildDir(f) setProperty(f, 'use_path', WithProperties('%(builddir)s/clang-host/bin')) cleanCompilerDir(f) - # pull test-suite + # Pull test-suite. pullclang_tests(f) - #Download compiler artifacts to be used for this build + # Download compiler from upstream builder. GetCompilerArtifacts(f) - # run tests + # Run gcc test suite. + # TODO: This step returns as a failure because it does not handle expected failures. # f.addStep(buildbot.steps.shell.ShellCommand( -# name='make_check', +# name='make.check', # command=['make', 'check', # WithProperties('CC_UNDER_TEST=%(use_path)s/clang'), -# WithProperties('CXX_UNDER_TEST=%(use_path)s/clang++'),], +# WithProperties('CXX_UNDER_TEST=%(use_path)s/clang++')], # haltOnFailure=True, # description=['make check'], # env={'PATH': WithProperties('/usr/local/bin/:%(use_path)s:${PATH}')}, # workdir='test-suite/gcc-4_2-testsuite')) return f -def runlibcxx(config_options): - f = buildbot.process.factory.BuildFactory() - # Determine the build directory. - getBuildDir(f) - setProperty(f, 'use_path', WithProperties('%(builddir)s/clang-host/bin')) - cleanCompilerDir(f) - # pull test-suite - pulllibcxx(f) - #Download compiler artifacts to be used for this build - GetCompilerArtifacts(f) - # run tests -# f.addStep(buildbot.steps.shell.ShellCommand( -# name='buildit', -# command=['./buildit',], -# haltOnFailure=True, -# description=['build libc++'], -# env={'PATH': WithProperties('%(use_path)s:${PATH}')}, -# workdir='libcxx/lib')) -# f.addStep(buildbot.steps.shell.ShellCommand( -# name='testit', -# command=['testit',], -# haltOnFailure=True, -# description=['test libc++'], -# env={'PATH': WithProperties('%(use_path)s:${PATH}')}, -# workdir='libcxx/test')) - return f - def runboost(config_options): f = buildbot.process.factory.BuildFactory() # Determine the build directory. getBuildDir(f) f = setProperty(f, 'use_path', WithProperties('%(builddir)s/clang-host/bin')) cleanCompilerDir(f) - # pull test-suite + # Pull Boost's test-suite. pullboostrunner(f) - #Download compiler artifacts to be used for this build + # Download compiler artifacts to be used for this build. GetCompilerArtifacts(f) - # run tests - # runner=llvmlab - # BOOST_ROOT=builddir/boost - # echo using borland : "integration" : %CD:\=/%/integration/bin/bcc32 : ; > %MYJAMFILE% + # Run boost test suite. f.addStep(buildbot.steps.shell.ShellCommand( name='user-config.jam', command=['echo', 'using', 'clang', ':', 'darwin-4.2.1', ':', @@ -559,21 +492,18 @@ ';', '>', 'user-config.jam'], haltOnFailure=True, description=['create user-config.jam'], - workdir=WithProperties('%(builddir)s'), - )) - #--bjam-options=target-os=windows --bjam-options=-l300 --bjam-options=--debug-level=3 --bjam-options=--user-config=%MYJAMFILE% --have-source --skip-script-download --ftp=ftp://boost:4peiV8Xwxfv9 at ftp.siliconman.net >runner.log + workdir=WithProperties('%(builddir)s'))) f.addStep(buildbot.steps.shell.ShellCommand( name='run.py', command=['python', 'boost_runner/run.py', WithProperties('--tag=%(boost_tag)s'), '--runner=llvmlab', '--bjam-options=--toolset=clang-darwin', WithProperties('--bjam-options=--user-config=%(builddir)s/userconfig.jam'), '--ftp=ftp://boost:4peiV8Xwxfv9 at ftp.siliconman.net', - WithProperties('--bjam-options=-j%(jobs)s'),'--user=""',], + WithProperties('--bjam-options=-j%(jobs)s'),'--user=""'], haltOnFailure=True, description=['boost regression harness'], workdir=WithProperties('%(builddir)s'), - timeout=14400 - )) + timeout=14400)) return f def get_builders(all_slaves): @@ -585,27 +515,31 @@ phase1_slave = 'llvmlab.local' phaseRunners = [phase1_slave] phase3_slaves = ['lab-mini-04.local'] - #phase2_slaves = filter(lambda x:x not in [phase1_slave], all_slaves) return [ - #Build to announce good build and prepare potential release candidate + # This builder should announce good builds and prepare potential release candidates. { 'name' : 'Validated Build', 'factory' : PublishGoodBuild(), 'slavenames' : phaseRunners, - 'category' : 'status', - }, - #parent builds for each phase + 'category' : 'status'}, + + # These builds coordinate and gate each phase as part of the staged design. makePhaseBuilder('phase1 - sanity', 'doPhase1','phase2', phaseRunners), makePhaseBuilder('phase2 - living', 'doPhase2','phase3', phaseRunners), makePhaseBuilder('phase3 - tree health', 'doPhase3','phase4', phaseRunners), makePhaseBuilder('phase4 - validation', 'doPhase4','GoodBuild', phaseRunners), - # phase 1 build + + # These are phase 1 build(s). stage1Clang(phase1, typeRA, phase1_slave), - #phase 2 Builds + + # These are phase 2 builds. HostedClang ('clang-x86_64-osx10-DA', typeDA, phase1, ['lab-mini-01.local']), - HostedClang (final_reference, typeRA, phase1, ['lab-mini-02.local'], '--enable-optimized'), + HostedClang (final_reference, typeRA, phase1, ['lab-mini-02.local'], + '--enable-optimized'), Nightly(phase1, ['lab-mini-03.local']), - #phase3 builds - HostedClang ('clang-i386-osx10-RA', typeRA, phase1, phase3_slaves, '--enable-optimized', '--target=i386'), + + # These are phase 3 builds. + HostedClang ('clang-i386-osx10-RA', typeRA, phase1, phase3_slaves, + '--enable-optimized', '--target=i386'), Nightly('clang-x86_64-osx10-DA', phase3_slaves), Nightly(final_reference, phase3_slaves), Nightly(final_reference, phase3_slaves, '-O0'), @@ -614,22 +548,11 @@ Nightly(final_reference, phase3_slaves, '-flto'), Nightly(final_reference, phase3_slaves, '-g'), - #phase4 builds + # These are phase 4 builds. Nightly('clang-i386-osx10-RA', phase3_slaves), stage3Clang(final_reference, phase3_slaves), gccTestSuite(final_reference, phase3_slaves), - libcxx(final_reference, phase3_slaves), - boost('trunk', final_reference, phase3_slaves), -# boost('branches/release', final_reference, phase3_slaves), -# boost('tags/release/Boost_1_44_0', final_reference, phase3_slaves), - #A Placeholder builder is required for triggers which haven't had builders - #configured yet, otherwise build will hang -# { 'name' : 'Placeholder', -# 'factory' : Placeholder(), -# 'slavenames' : phaseRunners, -# 'category' : 'clang', -# }, - ] + boost('trunk', final_reference, phase3_slaves)] def prioritizeBuilders(buildmaster, builders): builderPriorities = { @@ -653,10 +576,8 @@ 'clang-x86_64-osx10-RA-stage3':4, 'gccTestSuite-clang-x86_64-osx10-RA':4, 'nightly_clang-x86_64-osx10-RA-stage3-g':5, - 'libcxx-clang-x86_64-osx10-RA':4, 'boost-trunk-clang-x86_64-osx10-RA':6, - 'Validated Build':7, - } + 'Validated Build':7} builders.sort(key=lambda b: builderPriorities.get(b.name, 0)) return builders Modified: zorg/trunk/buildbot/llvmlab/master/config/schedulers.py URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/buildbot/llvmlab/master/config/schedulers.py?rev=125159&r1=125158&r2=125159&view=diff ============================================================================== --- zorg/trunk/buildbot/llvmlab/master/config/schedulers.py (original) +++ zorg/trunk/buildbot/llvmlab/master/config/schedulers.py Tue Feb 8 20:53:36 2011 @@ -45,7 +45,6 @@ 'clang-x86_64-osx10-RA-stage3', 'nightly_clang-i386-osx10-RA', 'gccTestSuite-clang-x86_64-osx10-RA', - 'libcxx-clang-x86_64-osx10-RA', 'boost-trunk-clang-x86_64-osx10-RA', ], properties = {'revision':WithProperties('%(got_revision)s')}) From daniel at zuster.org Tue Feb 8 20:58:19 2011 From: daniel at zuster.org (Daniel Dunbar) Date: Wed, 09 Feb 2011 02:58:19 -0000 Subject: [llvm-commits] [zorg] r125160 - /zorg/trunk/lnt/lnt/tests/nt.py Message-ID: <20110209025819.C169C2A6C12C@llvm.org> Author: ddunbar Date: Tue Feb 8 20:58:19 2011 New Revision: 125160 URL: http://llvm.org/viewvc/llvm-project?rev=125160&view=rev Log: LNT/nt: Add support for a --without-llvm argument, which allows running the test-suite without an LLVM source or build directory available. Modified: zorg/trunk/lnt/lnt/tests/nt.py Modified: zorg/trunk/lnt/lnt/tests/nt.py URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/lnt/lnt/tests/nt.py?rev=125160&r1=125159&r2=125160&view=diff ============================================================================== --- zorg/trunk/lnt/lnt/tests/nt.py (original) +++ zorg/trunk/lnt/lnt/tests/nt.py Tue Feb 8 20:58:19 2011 @@ -19,7 +19,10 @@ return datetime.utcnow().strftime('%Y-%m-%d %H:%M:%S') def run_test(nick_prefix, opts, iteration): - llvm_source_version = get_source_version(opts.llvm_src_root) + if opts.llvm_src_root: + llvm_source_version = get_source_version(opts.llvm_src_root) + else: + llvm_source_version = None # Compute TARGET_FLAGS. target_flags = [] @@ -256,11 +259,14 @@ configure_log = open(configure_log_path, 'w') args = [os.path.realpath(os.path.join(opts.test_suite_root, - 'configure')), - '--with-llvmsrc=%s' % opts.llvm_src_root, - '--with-llvmobj=%s' % opts.llvm_obj_root, - '--with-externals=%s' % os.path.realpath( - opts.test_suite_externals)] + 'configure'))] + if opts.without_llvm: + args.extend(['--without-llvmsrc', '--without-llvmobj']) + else: + args.extend(['--with-llvmsrc=%s' % opts.llvm_src_root, + '--with-llvmobj=%s' % opts.llvm_obj_root]) + args.append('--with-externals=%s' % os.path.realpath( + opts.test_suite_externals)) print >>configure_log, '%s: running: %s' % (timestamp(), ' '.join('"%s"' % a for a in args)) @@ -288,6 +294,20 @@ shutil.copyfile(os.path.join(src_path, 'Makefile'), os.path.join(obj_path, 'Makefile')) + # If running without LLVM, make sure tools are up to date. + if opts.without_llvm: + print '%s: building test-suite tools' % (timestamp(),) + args = ['make', 'tools'] + build_tools_log_path = os.path.join(basedir, 'build-tools.log') + build_tools_log = open(build_tools_log_path, 'w') + p = subprocess.Popen(args=args, stdin=None, stdout=build_tools_log, + stderr=subprocess.STDOUT, cwd=basedir, + env=os.environ) + res = p.wait() + build_tools_log.close() + if res != 0: + fatal('unable to build tools, aborting!') + # Always blow away any existing report. report_path = os.path.join(basedir) if opts.only_test is not None: @@ -481,7 +501,8 @@ # FIXME: Hack, use better method of getting versions. Ideally, from binaries # so we are more likely to be accurate. - run_info['llvm_revision'] = llvm_source_version + if llvm_source_version is not None: + run_info['llvm_revision'] = llvm_source_version run_info['test_suite_revision'] = get_source_version(opts.test_suite_root) run_info.update(public_make_variables) @@ -593,6 +614,9 @@ parser.add_option_group(group) group = OptionGroup(parser, "Inputs") + group.add_option("", "--without-llvm", dest="without_llvm", + help="Don't use any LLVM source or build products", + action="store_true", default=False) group.add_option("", "--llvm-src", dest="llvm_src_root", help="Path to the LLVM source tree", type=str, default=None, metavar="PATH") @@ -756,6 +780,9 @@ if opts.cxx_reference is not None: parser.error('--cxx-reference is unused with --simple') else: + if opts.without_llvm: + parser.error('--simple is required with --without-llvm') + # Attempt to infer cc_reference and cxx_reference if not given. if opts.cc_reference is None: opts.cc_reference = which('gcc') or which('cc') @@ -783,10 +810,16 @@ warning("invalid cxx_under_test, falling back to cc_under_test") opts.cxx_under_test = opts.cc_under_test - if opts.llvm_src_root is None: - parser.error('--llvm-src is required') - if opts.llvm_obj_root is None: - parser.error('--llvm-obj is required') + if opts.without_llvm: + if opts.llvm_src_root is not None: + parser.error('--llvm-src is not allowed with --without-llvm') + if opts.llvm_obj_root is not None: + parser.error('--llvm-obj is not allowed with --without-llvm') + else: + if opts.llvm_src_root is None: + parser.error('--llvm-src is required') + if opts.llvm_obj_root is None: + parser.error('--llvm-obj is required') if opts.test_suite_root is None: parser.error('--test-suite is required') From daniel at zuster.org Tue Feb 8 21:56:16 2011 From: daniel at zuster.org (Daniel Dunbar) Date: Wed, 09 Feb 2011 03:56:16 -0000 Subject: [llvm-commits] [zorg] r125164 - /zorg/trunk/lnt/lnt/tests/nt.py Message-ID: <20110209035616.BE75A2A6C12C@llvm.org> Author: ddunbar Date: Tue Feb 8 21:56:16 2011 New Revision: 125164 URL: http://llvm.org/viewvc/llvm-project?rev=125164&view=rev Log: LNT/nt: Fix logging print output stream. Modified: zorg/trunk/lnt/lnt/tests/nt.py Modified: zorg/trunk/lnt/lnt/tests/nt.py URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/lnt/lnt/tests/nt.py?rev=125164&r1=125163&r2=125164&view=diff ============================================================================== --- zorg/trunk/lnt/lnt/tests/nt.py (original) +++ zorg/trunk/lnt/lnt/tests/nt.py Tue Feb 8 21:56:16 2011 @@ -296,7 +296,7 @@ # If running without LLVM, make sure tools are up to date. if opts.without_llvm: - print '%s: building test-suite tools' % (timestamp(),) + print >>sys.stderr, '%s: building test-suite tools' % (timestamp(),) args = ['make', 'tools'] build_tools_log_path = os.path.join(basedir, 'build-tools.log') build_tools_log = open(build_tools_log_path, 'w') From geek4civic at gmail.com Tue Feb 8 22:17:39 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Wed, 09 Feb 2011 04:17:39 -0000 Subject: [llvm-commits] [llvm] r125165 - /llvm/trunk/tools/llvm-ld/llvm-ld.cpp Message-ID: <20110209041739.DCDCF2A6C12C@llvm.org> Author: chapuni Date: Tue Feb 8 22:17:39 2011 New Revision: 125165 URL: http://llvm.org/viewvc/llvm-project?rev=125165&view=rev Log: tools/llvm-ld: Cygwin can handle #!shbang. Modified: llvm/trunk/tools/llvm-ld/llvm-ld.cpp Modified: llvm/trunk/tools/llvm-ld/llvm-ld.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-ld/llvm-ld.cpp?rev=125165&r1=125164&r2=125165&view=diff ============================================================================== --- llvm/trunk/tools/llvm-ld/llvm-ld.cpp (original) +++ llvm/trunk/tools/llvm-ld/llvm-ld.cpp Tue Feb 8 22:17:39 2011 @@ -410,7 +410,7 @@ static void EmitShellScript(char **argv, Module *M) { if (Verbose) errs() << "Emitting Shell Script\n"; -#if defined(_WIN32) || defined(__CYGWIN__) +#if defined(_WIN32) // Windows doesn't support #!/bin/sh style shell scripts in .exe files. To // support windows systems, we copy the llvm-stub.exe executable from the // build tree to the destination file. From geek4civic at gmail.com Tue Feb 8 22:17:47 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Wed, 09 Feb 2011 04:17:47 -0000 Subject: [llvm-commits] [llvm] r125166 - /llvm/trunk/tools/llvm-ld/CMakeLists.txt Message-ID: <20110209041747.63BA42A6C12C@llvm.org> Author: chapuni Date: Tue Feb 8 22:17:47 2011 New Revision: 125166 URL: http://llvm.org/viewvc/llvm-project?rev=125166&view=rev Log: tools/llvm-ld/CMakeLists.txt: llvm-ld depends on llvm-stub at runtime. Modified: llvm/trunk/tools/llvm-ld/CMakeLists.txt Modified: llvm/trunk/tools/llvm-ld/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-ld/CMakeLists.txt?rev=125166&r1=125165&r2=125166&view=diff ============================================================================== --- llvm/trunk/tools/llvm-ld/CMakeLists.txt (original) +++ llvm/trunk/tools/llvm-ld/CMakeLists.txt Tue Feb 8 22:17:47 2011 @@ -4,3 +4,5 @@ Optimize.cpp llvm-ld.cpp ) + +add_dependencies(llvm-ld llvm-stub) From geek4civic at gmail.com Tue Feb 8 22:17:54 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Wed, 09 Feb 2011 04:17:54 -0000 Subject: [llvm-commits] [llvm] r125167 - /llvm/trunk/utils/llvm-lit/llvm-lit.in Message-ID: <20110209041754.AB43C2A6C12C@llvm.org> Author: chapuni Date: Tue Feb 8 22:17:54 2011 New Revision: 125167 URL: http://llvm.org/viewvc/llvm-project?rev=125167&view=rev Log: llvm-lit may be able to invoke clang tests. Modified: llvm/trunk/utils/llvm-lit/llvm-lit.in Modified: llvm/trunk/utils/llvm-lit/llvm-lit.in URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/llvm-lit/llvm-lit.in?rev=125167&r1=125166&r2=125167&view=diff ============================================================================== --- llvm/trunk/utils/llvm-lit/llvm-lit.in (original) +++ llvm/trunk/utils/llvm-lit/llvm-lit.in Tue Feb 8 22:17:54 2011 @@ -16,6 +16,10 @@ 'llvm_site_config' : os.path.join(llvm_obj_root, 'test', 'lit.site.cfg') } +clang_site_config = os.path.join(llvm_obj_root, 'tools', 'clang', 'test', 'lit.site.cfg') +if os.path.exists(clang_site_config): + builtin_parameters['clang_site_config'] = clang_site_config + if __name__=='__main__': import lit lit.main(builtin_parameters) From geek4civic at gmail.com Tue Feb 8 22:18:03 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Wed, 09 Feb 2011 04:18:03 -0000 Subject: [llvm-commits] [llvm] r125168 - /llvm/trunk/utils/llvm-lit/llvm-lit.in Message-ID: <20110209041803.225332A6C12C@llvm.org> Author: chapuni Date: Tue Feb 8 22:18:02 2011 New Revision: 125168 URL: http://llvm.org/viewvc/llvm-project?rev=125168&view=rev Log: llvm-lit may be available with CMake. Modified: llvm/trunk/utils/llvm-lit/llvm-lit.in (contents, props changed) Modified: llvm/trunk/utils/llvm-lit/llvm-lit.in URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/llvm-lit/llvm-lit.in?rev=125168&r1=125167&r2=125168&view=diff ============================================================================== --- llvm/trunk/utils/llvm-lit/llvm-lit.in (original) +++ llvm/trunk/utils/llvm-lit/llvm-lit.in Tue Feb 8 22:18:02 2011 @@ -13,6 +13,8 @@ # Set up some builtin parameters, so that by default the LLVM test suite # configuration file knows how to find the object tree. builtin_parameters = { + 'build_config' : "@CMAKE_CFG_INTDIR@", + 'build_mode' : "@RUNTIME_BUILD_MODE@", 'llvm_site_config' : os.path.join(llvm_obj_root, 'test', 'lit.site.cfg') } Propchange: llvm/trunk/utils/llvm-lit/llvm-lit.in ------------------------------------------------------------------------------ svn:executable = * From geek4civic at gmail.com Tue Feb 8 22:18:12 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Wed, 09 Feb 2011 04:18:12 -0000 Subject: [llvm-commits] [llvm] r125169 - /llvm/trunk/lib/Support/Windows/DynamicLibrary.inc Message-ID: <20110209041812.38D9F2A6C12C@llvm.org> Author: chapuni Date: Tue Feb 8 22:18:12 2011 New Revision: 125169 URL: http://llvm.org/viewvc/llvm-project?rev=125169&view=rev Log: Windows/DynamicLibrary.inc: ELM_Callback fix for mingw-w64. Modified: llvm/trunk/lib/Support/Windows/DynamicLibrary.inc Modified: llvm/trunk/lib/Support/Windows/DynamicLibrary.inc URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Windows/DynamicLibrary.inc?rev=125169&r1=125168&r2=125169&view=diff ============================================================================== --- llvm/trunk/lib/Support/Windows/DynamicLibrary.inc (original) +++ llvm/trunk/lib/Support/Windows/DynamicLibrary.inc Tue Feb 8 22:18:12 2011 @@ -55,7 +55,17 @@ // Use new callback if: // - Newer Visual Studio (comes with newer SDK). // - Visual Studio 2005 with Windows SDK 6.0+ -#if !defined(_MSC_VER) || _MSC_VER < 1500 && (!defined(VER_PRODUCTBUILD) || VER_PRODUCTBUILD < 6000) +#if defined(_MSC_VER) + #if _MSC_VER < 1500 && (!defined(VER_PRODUCTBUILD) || VER_PRODUCTBUILD < 6000) + #define OLD_ELM_CALLBACK_DECL 1 + #endif +#elif defined(__MINGW64__) + // Use new callback. +#elif defined(__MINGW32__) + #define OLD_ELM_CALLBACK_DECL 1 +#endif + +#ifdef OLD_ELM_CALLBACK_DECL static BOOL CALLBACK ELM_Callback(PSTR ModuleName, ModuleBaseType ModuleBase, ULONG ModuleSize, From geek4civic at gmail.com Tue Feb 8 22:18:21 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Wed, 09 Feb 2011 04:18:21 -0000 Subject: [llvm-commits] [llvm] r125170 - /llvm/trunk/lib/Support/Windows/Program.inc Message-ID: <20110209041821.97D9C2A6C12C@llvm.org> Author: chapuni Date: Tue Feb 8 22:18:21 2011 New Revision: 125170 URL: http://llvm.org/viewvc/llvm-project?rev=125170&view=rev Log: Windows/Program.inc: Eliminate the declaration of SetInformationJobObject(). It should be provided with _WIN32_WINNT>=0x0500. Modified: llvm/trunk/lib/Support/Windows/Program.inc Modified: llvm/trunk/lib/Support/Windows/Program.inc URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Windows/Program.inc?rev=125170&r1=125169&r2=125170&view=diff ============================================================================== --- llvm/trunk/lib/Support/Windows/Program.inc (original) +++ llvm/trunk/lib/Support/Windows/Program.inc Tue Feb 8 22:18:21 2011 @@ -22,15 +22,6 @@ //=== and must not be UNIX code //===----------------------------------------------------------------------===// -#ifdef __MINGW32__ -// Ancient mingw32's w32api might not have this declaration. -extern "C" -BOOL WINAPI SetInformationJobObject(HANDLE hJob, - JOBOBJECTINFOCLASS JobObjectInfoClass, - LPVOID lpJobObjectInfo, - DWORD cbJobObjectInfoLength); -#endif - namespace { struct Win32ProcessInfo { HANDLE hProcess; From geek4civic at gmail.com Tue Feb 8 22:18:30 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Wed, 09 Feb 2011 04:18:30 -0000 Subject: [llvm-commits] [llvm] r125171 - /llvm/trunk/lib/Support/Windows/Windows.h Message-ID: <20110209041830.8B6A32A6C12C@llvm.org> Author: chapuni Date: Tue Feb 8 22:18:30 2011 New Revision: 125171 URL: http://llvm.org/viewvc/llvm-project?rev=125171&view=rev Log: Windows/Windows.h: Redefine _WIN32_WINNT here. mingw-w64 tends to define it as 0x0502 in its headers. Modified: llvm/trunk/lib/Support/Windows/Windows.h Modified: llvm/trunk/lib/Support/Windows/Windows.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Windows/Windows.h?rev=125171&r1=125170&r2=125171&view=diff ============================================================================== --- llvm/trunk/lib/Support/Windows/Windows.h (original) +++ llvm/trunk/lib/Support/Windows/Windows.h Tue Feb 8 22:18:30 2011 @@ -16,6 +16,9 @@ //=== is guaranteed to work on *all* Win32 variants. //===----------------------------------------------------------------------===// +// mingw-w64 tends to define it as 0x0502 in its headers. +#undef _WIN32_WINNT + // Require at least Windows 2000 API. #define _WIN32_WINNT 0x0500 #define _WIN32_IE 0x0500 // MinGW at it again. From geek4civic at gmail.com Tue Feb 8 22:18:48 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Wed, 09 Feb 2011 04:18:48 -0000 Subject: [llvm-commits] [llvm] r125172 - in /llvm/trunk: autoconf/configure.ac cmake/config-ix.cmake configure include/llvm/Config/config.h.cmake include/llvm/Config/config.h.in lib/Support/Errno.cpp Message-ID: <20110209041848.C84C62A6C12C@llvm.org> Author: chapuni Date: Tue Feb 8 22:18:48 2011 New Revision: 125172 URL: http://llvm.org/viewvc/llvm-project?rev=125172&view=rev Log: lib/Support/Errno.cpp: Check strerror_s() with HAVE_DECL_STRERROR_S in config.h.*. AC_CHECK_FUNCS seeks a symbol only in libs. We should check the declaration in string.h. FIXME: I have never seen mingw(s) have strerror_s() (not _strerror_s()). FIXME: Autoconf/CMake may seek strerror_s() with the definition MINGW_HAS_SECURE_API in future. Modified: llvm/trunk/autoconf/configure.ac llvm/trunk/cmake/config-ix.cmake llvm/trunk/configure llvm/trunk/include/llvm/Config/config.h.cmake llvm/trunk/include/llvm/Config/config.h.in llvm/trunk/lib/Support/Errno.cpp Modified: llvm/trunk/autoconf/configure.ac URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/autoconf/configure.ac?rev=125172&r1=125171&r2=125172&view=diff ============================================================================== --- llvm/trunk/autoconf/configure.ac (original) +++ llvm/trunk/autoconf/configure.ac Tue Feb 8 22:18:48 2011 @@ -1391,12 +1391,15 @@ AC_CHECK_FUNCS([getpagesize getrusage getrlimit setrlimit gettimeofday ]) AC_CHECK_FUNCS([isatty mkdtemp mkstemp ]) AC_CHECK_FUNCS([mktemp posix_spawn realpath sbrk setrlimit strdup ]) -AC_CHECK_FUNCS([strerror strerror_r strerror_s setenv ]) +AC_CHECK_FUNCS([strerror strerror_r setenv ]) AC_CHECK_FUNCS([strtoll strtoq sysconf malloc_zone_statistics ]) AC_CHECK_FUNCS([setjmp longjmp sigsetjmp siglongjmp writev]) AC_C_PRINTF_A AC_FUNC_RAND48 +dnl Check the declaration "Secure API" on Windows environments. +AC_CHECK_DECLS([strerror_s]) + dnl Check symbols in libgcc.a for JIT on Mingw. if test "$llvm_cv_os_type" = "MingW" ; then AC_CHECK_LIB(gcc,_alloca,AC_DEFINE([HAVE__ALLOCA],[1],[Have host's _alloca])) Modified: llvm/trunk/cmake/config-ix.cmake URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/cmake/config-ix.cmake?rev=125172&r1=125171&r2=125172&view=diff ============================================================================== --- llvm/trunk/cmake/config-ix.cmake (original) +++ llvm/trunk/cmake/config-ix.cmake Tue Feb 8 22:18:48 2011 @@ -149,7 +149,7 @@ check_symbol_exists(strtoq stdlib.h HAVE_STRTOQ) check_symbol_exists(strerror string.h HAVE_STRERROR) check_symbol_exists(strerror_r string.h HAVE_STRERROR_R) -check_symbol_exists(strerror_s string.h HAVE_STRERROR_S) +check_symbol_exists(strerror_s string.h HAVE_DECL_STRERROR_S) check_symbol_exists(memcpy string.h HAVE_MEMCPY) check_symbol_exists(memmove string.h HAVE_MEMMOVE) check_symbol_exists(setenv stdlib.h HAVE_SETENV) Modified: llvm/trunk/configure URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/configure?rev=125172&r1=125171&r2=125172&view=diff ============================================================================== --- llvm/trunk/configure (original) +++ llvm/trunk/configure Tue Feb 8 22:18:48 2011 @@ -18679,8 +18679,7 @@ - -for ac_func in strerror strerror_r strerror_s setenv +for ac_func in strerror strerror_r setenv do as_ac_var=`echo "ac_cv_func_$ac_func" | $as_tr_sh` { echo "$as_me:$LINENO: checking for $ac_func" >&5 @@ -19199,6 +19198,93 @@ fi +{ echo "$as_me:$LINENO: checking whether strerror_s is declared" >&5 +echo $ECHO_N "checking whether strerror_s is declared... $ECHO_C" >&6; } +if test "${ac_cv_have_decl_strerror_s+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +int +main () +{ +#ifndef strerror_s + char *p = (char *) strerror_s; + return !p; +#endif + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_have_decl_strerror_s=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_have_decl_strerror_s=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +{ echo "$as_me:$LINENO: result: $ac_cv_have_decl_strerror_s" >&5 +echo "${ECHO_T}$ac_cv_have_decl_strerror_s" >&6; } +if test $ac_cv_have_decl_strerror_s = yes; then + +cat >>confdefs.h <<_ACEOF +#define HAVE_DECL_STRERROR_S 1 +_ACEOF + + +else + cat >>confdefs.h <<_ACEOF +#define HAVE_DECL_STRERROR_S 0 +_ACEOF + + +fi + + + if test "$llvm_cv_os_type" = "MingW" ; then { echo "$as_me:$LINENO: checking for _alloca in -lgcc" >&5 echo $ECHO_N "checking for _alloca in -lgcc... $ECHO_C" >&6; } Modified: llvm/trunk/include/llvm/Config/config.h.cmake URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Config/config.h.cmake?rev=125172&r1=125171&r2=125172&view=diff ============================================================================== --- llvm/trunk/include/llvm/Config/config.h.cmake (original) +++ llvm/trunk/include/llvm/Config/config.h.cmake Tue Feb 8 22:18:48 2011 @@ -62,6 +62,10 @@ /* Define to 1 if you have the header file. */ #cmakedefine HAVE_CTYPE_H ${HAVE_CTYPE_H} +/* Define to 1 if you have the declaration of `strerror_s', and to 0 if you + don't. */ +#cmakedefine01 HAVE_DECL_STRERROR_S + /* Define to 1 if you have the header file, and it defines `DIR'. */ #cmakedefine HAVE_DIRENT_H ${HAVE_DIRENT_H} @@ -368,9 +372,6 @@ /* Define to 1 if you have the `strerror_r' function. */ #cmakedefine HAVE_STRERROR_R ${HAVE_STRERROR_R} -/* Define to 1 if you have the `strerror_s' function. */ -#cmakedefine HAVE_STRERROR_S ${HAVE_STRERROR_S} - /* Define to 1 if you have the header file. */ #cmakedefine HAVE_STRINGS_H ${HAVE_STRINGS_H} Modified: llvm/trunk/include/llvm/Config/config.h.in URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Config/config.h.in?rev=125172&r1=125171&r2=125172&view=diff ============================================================================== --- llvm/trunk/include/llvm/Config/config.h.in (original) +++ llvm/trunk/include/llvm/Config/config.h.in Tue Feb 8 22:18:48 2011 @@ -78,6 +78,10 @@ /* Define to 1 if you have the header file. */ #undef HAVE_CTYPE_H +/* Define to 1 if you have the declaration of `strerror_s', and to 0 if you + don't. */ +#undef HAVE_DECL_STRERROR_S + /* Define to 1 if you have the header file, and it defines `DIR'. */ #undef HAVE_DIRENT_H @@ -384,9 +388,6 @@ /* Define to 1 if you have the `strerror_r' function. */ #undef HAVE_STRERROR_R -/* Define to 1 if you have the `strerror_s' function. */ -#undef HAVE_STRERROR_S - /* Define to 1 if you have the header file. */ #undef HAVE_STRINGS_H Modified: llvm/trunk/lib/Support/Errno.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Errno.cpp?rev=125172&r1=125171&r2=125172&view=diff ============================================================================== --- llvm/trunk/lib/Support/Errno.cpp (original) +++ llvm/trunk/lib/Support/Errno.cpp Tue Feb 8 22:18:48 2011 @@ -50,7 +50,7 @@ # else strerror_r(errnum,buffer,MaxErrStrLen-1); # endif -#elif defined(HAVE_STRERROR_S) // Windows. +#elif HAVE_DECL_STRERROR_S // "Windows Secure API" if (errnum) strerror_s(buffer, errnum); #elif defined(HAVE_STRERROR) From geek4civic at gmail.com Tue Feb 8 22:18:58 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Wed, 09 Feb 2011 04:18:58 -0000 Subject: [llvm-commits] [llvm] r125173 - in /llvm/trunk: cmake/modules/HandleLLVMOptions.cmake test/lit.site.cfg.in Message-ID: <20110209041858.38C6A2A6C12C@llvm.org> Author: chapuni Date: Tue Feb 8 22:18:58 2011 New Revision: 125173 URL: http://llvm.org/viewvc/llvm-project?rev=125173&view=rev Log: CMake: Add the new option LLVM_LIT_TOOLS_DIR. It can specify "Path to GnuWin32 tools". Modified: llvm/trunk/cmake/modules/HandleLLVMOptions.cmake llvm/trunk/test/lit.site.cfg.in Modified: llvm/trunk/cmake/modules/HandleLLVMOptions.cmake URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/cmake/modules/HandleLLVMOptions.cmake?rev=125173&r1=125172&r2=125173&view=diff ============================================================================== --- llvm/trunk/cmake/modules/HandleLLVMOptions.cmake (original) +++ llvm/trunk/cmake/modules/HandleLLVMOptions.cmake Tue Feb 8 22:18:58 2011 @@ -21,6 +21,8 @@ set(LLVM_LIT_ARGS "${LIT_ARGS_DEFAULT}" CACHE STRING "Default options for lit") +set(LLVM_LIT_TOOLS_DIR "" CACHE PATH "Path to GnuWin32 tools") + if( LLVM_ENABLE_ASSERTIONS ) # MSVC doesn't like _DEBUG on release builds. See PR 4379. if( NOT MSVC ) Modified: llvm/trunk/test/lit.site.cfg.in URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/lit.site.cfg.in?rev=125173&r1=125172&r2=125173&view=diff ============================================================================== --- llvm/trunk/test/lit.site.cfg.in (original) +++ llvm/trunk/test/lit.site.cfg.in Tue Feb 8 22:18:58 2011 @@ -4,6 +4,7 @@ config.llvm_obj_root = "@LLVM_BINARY_DIR@" config.llvm_tools_dir = "@LLVM_TOOLS_DIR@" config.llvmgcc_dir = "@LLVMGCCDIR@" +config.lit_tools_dir = "@LLVM_LIT_TOOLS_DIR@" config.python_executable = "@PYTHON_EXECUTABLE@" config.enable_shared = @ENABLE_SHARED@ From geek4civic at gmail.com Tue Feb 8 22:19:06 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Wed, 09 Feb 2011 04:19:06 -0000 Subject: [llvm-commits] [llvm] r125174 - /llvm/trunk/utils/lit/lit/Util.py Message-ID: <20110209041906.CD4972A6C12C@llvm.org> Author: chapuni Date: Tue Feb 8 22:19:06 2011 New Revision: 125174 URL: http://llvm.org/viewvc/llvm-project?rev=125174&view=rev Log: lit/Util.py: Add two functions, checkToolsPath(dir,tools) and whichTools(tools,paths). checkToolsPath(dir,tools): return True if "dir" contains all "tools". whichTools(tools,paths): return a directory that contains all "tools" in "paths". Or return None when all "tools" were not met. Modified: llvm/trunk/utils/lit/lit/Util.py Modified: llvm/trunk/utils/lit/lit/Util.py URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/lit/lit/Util.py?rev=125174&r1=125173&r2=125174&view=diff ============================================================================== --- llvm/trunk/utils/lit/lit/Util.py (original) +++ llvm/trunk/utils/lit/lit/Util.py Tue Feb 8 22:19:06 2011 @@ -75,6 +75,18 @@ return None +def checkToolsPath(dir, tools): + for tool in tools: + if not os.path.exists(os.path.join(dir, tool)): + return False; + return True; + +def whichTools(tools, paths): + for path in paths.split(os.pathsep): + if checkToolsPath(path, tools): + return path + return None + def printHistogram(items, title = 'Items'): import itertools, math From geek4civic at gmail.com Tue Feb 8 22:19:15 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Wed, 09 Feb 2011 04:19:15 -0000 Subject: [llvm-commits] [llvm] r125175 - /llvm/trunk/utils/lit/lit/LitConfig.py Message-ID: <20110209041915.33ACE2A6C12C@llvm.org> Author: chapuni Date: Tue Feb 8 22:19:15 2011 New Revision: 125175 URL: http://llvm.org/viewvc/llvm-project?rev=125175&view=rev Log: lit/LitConfig.py: Add the new method getToolsPath(dir,paths,tools). It seeks tools(eg. [cmp, grep, sed]) in same directory, to be sane. It seeks "bash" only in the directory found at last time. Or bash would be insane (against other tools). Modified: llvm/trunk/utils/lit/lit/LitConfig.py Modified: llvm/trunk/utils/lit/lit/LitConfig.py URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/lit/lit/LitConfig.py?rev=125175&r1=125174&r2=125175&view=diff ============================================================================== --- llvm/trunk/utils/lit/lit/LitConfig.py (original) +++ llvm/trunk/utils/lit/lit/LitConfig.py Tue Feb 8 22:19:15 2011 @@ -85,6 +85,22 @@ return self.bashPath + def getToolsPath(self, dir, paths, tools): + import os, Util + if dir is not None and os.path.isabs(dir) and os.path.isdir(dir): + if not Util.checkToolsPath(dir, tools): + return None + else: + dir = Util.whichTools(tools, paths) + + # bash + self.bashPath = Util.which('bash', dir) + if self.bashPath is None: + self.warning("Unable to find 'bash.exe'.") + self.bashPath = '' + + return dir + def _write_message(self, kind, message): import inspect, os, sys From geek4civic at gmail.com Tue Feb 8 22:19:21 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Wed, 09 Feb 2011 04:19:21 -0000 Subject: [llvm-commits] [llvm] r125176 - /llvm/trunk/test/lit.cfg Message-ID: <20110209041921.5B2642A6C12D@llvm.org> Author: chapuni Date: Tue Feb 8 22:19:21 2011 New Revision: 125176 URL: http://llvm.org/viewvc/llvm-project?rev=125176&view=rev Log: test/lit.cfg: Seek sane tools(and bash) in directories and set to $PATH. LitConfig.getBashPath() will not seek in $PATH after LitConfig.getToolsPath() was executed. Modified: llvm/trunk/test/lit.cfg Modified: llvm/trunk/test/lit.cfg URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/lit.cfg?rev=125176&r1=125175&r2=125176&view=diff ============================================================================== --- llvm/trunk/test/lit.cfg (original) +++ llvm/trunk/test/lit.cfg Tue Feb 8 22:19:21 2011 @@ -19,6 +19,18 @@ # test_source_root: The root path where tests are located. config.test_source_root = os.path.dirname(__file__) +# Tweak PATH for Win32 +if sys.platform in ['win32']: + # Seek sane tools in directories and set to $PATH. + path = getattr(config, 'lit_tools_dir', None) + path = lit.getToolsPath(path, + config.environment['PATH'], + ['cmp.exe', 'grep.exe', 'sed.exe']) + if path is not None: + path = os.path.pathsep.join((path, + config.environment['PATH'])) + config.environment['PATH'] = path + # test_exec_root: The root path where tests should be run. llvm_obj_root = getattr(config, 'llvm_obj_root', None) if llvm_obj_root is not None: @@ -273,7 +285,7 @@ ### Features # Shell execution -if sys.platform not in ['win32']: +if sys.platform not in ['win32'] or lit.getBashPath() != '': config.available_features.add('shell') # Loadable module From geek4civic at gmail.com Tue Feb 8 22:19:28 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Wed, 09 Feb 2011 04:19:28 -0000 Subject: [llvm-commits] [llvm] r125177 - in /llvm/trunk/docs: CMake.html GettingStartedVS.html Message-ID: <20110209041928.D26E62A6C12C@llvm.org> Author: chapuni Date: Tue Feb 8 22:19:28 2011 New Revision: 125177 URL: http://llvm.org/viewvc/llvm-project?rev=125177&view=rev Log: Add testing stuff to CMake documents. - Note "GnuWin32". - Note LLVM_LIT_TOOLS_DIR - Now we can run tests on VS w/e all tests might pass or not! Modified: llvm/trunk/docs/CMake.html llvm/trunk/docs/GettingStartedVS.html Modified: llvm/trunk/docs/CMake.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CMake.html?rev=125177&r1=125176&r2=125177&view=diff ============================================================================== --- llvm/trunk/docs/CMake.html (original) +++ llvm/trunk/docs/CMake.html Tue Feb 8 22:19:28 2011 @@ -339,6 +339,12 @@ on Visual C++ and Xcode, "-sv" on others. +

LLVM_LIT_TOOLS_DIR:STRING
+
The path to GnuWin32 tools for tests. Valid on Windows host. + Defaults to "", then Lit seeks tools according to %PATH%. + Lit can find tools(eg. grep, sort, &c) on LLVM_LIT_TOOLS_DIR at first, + without specifying GnuWin32 to %PATH%.
+
LLVM_ENABLE_FFI:BOOL
Indicates whether LLVM Interpreter will be linked with Foreign Function Interface library. If the library or its headers are @@ -364,7 +370,7 @@

make check

-

Testing is not supported on Visual Studio.

+

On Visual Studio, you may run tests to build the project "check".

Modified: llvm/trunk/docs/GettingStartedVS.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/GettingStartedVS.html?rev=125177&r1=125176&r2=125177&view=diff ============================================================================== --- llvm/trunk/docs/GettingStartedVS.html (original) +++ llvm/trunk/docs/GettingStartedVS.html Tue Feb 8 22:19:28 2011 @@ -112,7 +112,8 @@

If you would like to run the LLVM tests you will need Python. Versions 2.4-2.7 are known to - work.

+ work. You will need "GnuWin32" + tools, too.

Do not install the LLVM directory tree into a path containing spaces (e.g. C:\Documents and Settings\...) as the configure step will fail.

@@ -191,6 +192,15 @@ program will print the corresponding fibonacci value. +
  • Test LLVM on Visual Studio: +
      +
    • If %PATH% does not contain GnuWin32, you may specify LLVM_LIT_TOOLS_DIR + on CMake for the path to GnuWin32.
    • +
    • You can run LLVM tests to build the project "check".
    • +
    +
  • + +
  • Test LLVM:
    • The LLVM tests can be run by cding to the llvm source directory From geek4civic at gmail.com Tue Feb 8 23:16:57 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Wed, 9 Feb 2011 14:16:57 +0900 Subject: [llvm-commits] [PATCH] lib/Support: Always include Windows/Windows.h! In-Reply-To: References: Message-ID: > Uh, eew? Eric, I won't apply it, thank you! From geek4civic at gmail.com Tue Feb 8 23:27:51 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Wed, 9 Feb 2011 14:27:51 +0900 Subject: [llvm-commits] [Review request][Win64] Patches for Mingw-w64(and mingw64-clang) In-Reply-To: References: Message-ID: Committed (to exclude part2-2) in r125169 to r125172, thank you! Now I believe clang and llvm can be built on mingw-w64 (with -Wl,--stack,16777216)! ...Takumi From geek4civic at gmail.com Tue Feb 8 23:33:43 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Wed, 9 Feb 2011 14:33:43 +0900 Subject: [llvm-commits] [Review request][Win] CMake & Lit: the new feature "LLVM_LIT_TOOLS_DIR" In-Reply-To: <878vzc3q9l.fsf@telefonica.net> References: <87zkshc15m.fsf@telefonica.net> <878vzc3q9l.fsf@telefonica.net> Message-ID: Committed in (llvm) r125173 to r125176 and (clang) r125178 with Daniel's approval, thank you! I added sentences to documents in r125177. Feel free to rewrite them. ...Takumi From nicholas at mxc.ca Wed Feb 9 00:32:02 2011 From: nicholas at mxc.ca (Nick Lewycky) Date: Wed, 09 Feb 2011 06:32:02 -0000 Subject: [llvm-commits] [llvm] r125180 - in /llvm/trunk: lib/Transforms/IPO/MergeFunctions.cpp test/Transforms/MergeFunc/2011-02-08-RemoveEqual.ll Message-ID: <20110209063203.05E942A6C12C@llvm.org> Author: nicholas Date: Wed Feb 9 00:32:02 2011 New Revision: 125180 URL: http://llvm.org/viewvc/llvm-project?rev=125180&view=rev Log: When removing a function from the function set and adding it to deferred, we could end up removing a different function than we intended because it was functionally equivalent, then end up with a comparison of a function against itself in the next round of comparisons (the one in the function set and the one on the deferred list). To fix this, I introduce a choice in the form of comparison for ComparableFunctions, either normal or "pointer only" used to find exact Function*'s in lookups. Also add some debugging statements. Added: llvm/trunk/test/Transforms/MergeFunc/2011-02-08-RemoveEqual.ll Modified: llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp Modified: llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp?rev=125180&r1=125179&r2=125180&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp Wed Feb 9 00:32:02 2011 @@ -96,6 +96,7 @@ public: static const ComparableFunction EmptyKey; static const ComparableFunction TombstoneKey; + static TargetData * const LookupOnly; ComparableFunction(Function *Func, TargetData *TD) : Func(Func), Hash(profileFunction(Func)), TD(TD) {} @@ -124,6 +125,7 @@ const ComparableFunction ComparableFunction::EmptyKey = ComparableFunction(0); const ComparableFunction ComparableFunction::TombstoneKey = ComparableFunction(1); +TargetData * const ComparableFunction::LookupOnly = (TargetData*)(-1); } @@ -658,6 +660,12 @@ return true; if (!LHS.getFunc() || !RHS.getFunc()) return false; + + // One of these is a special "underlying pointer comparison only" object. + if (LHS.getTD() == ComparableFunction::LookupOnly || + RHS.getTD() == ComparableFunction::LookupOnly) + return false; + assert(LHS.getTD() == RHS.getTD() && "Comparing functions for different targets"); @@ -796,8 +804,10 @@ // that was already inserted. bool MergeFunctions::insert(ComparableFunction &NewF) { std::pair Result = FnSet.insert(NewF); - if (Result.second) + if (Result.second) { + DEBUG(dbgs() << "Inserting as unique: " << NewF.getFunc()->getName() << '\n'); return false; + } const ComparableFunction &OldF = *Result.first; @@ -817,8 +827,15 @@ // Remove a function from FnSet. If it was already in FnSet, add it to Deferred // so that we'll look at it in the next round. void MergeFunctions::remove(Function *F) { - ComparableFunction CF = ComparableFunction(F, TD); + // We need to make sure we remove F, not a function "equal" to F per the + // function equality comparator. + // + // The special "lookup only" ComparableFunction bypasses the expensive + // function comparison in favour of a pointer comparison on the underlying + // Function*'s. + ComparableFunction CF = ComparableFunction(F, ComparableFunction::LookupOnly); if (FnSet.erase(CF)) { + DEBUG(dbgs() << "Removed " << F->getName() << " from set and deferred it.\n"); Deferred.push_back(F); } } Added: llvm/trunk/test/Transforms/MergeFunc/2011-02-08-RemoveEqual.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/MergeFunc/2011-02-08-RemoveEqual.ll?rev=125180&view=auto ============================================================================== --- llvm/trunk/test/Transforms/MergeFunc/2011-02-08-RemoveEqual.ll (added) +++ llvm/trunk/test/Transforms/MergeFunc/2011-02-08-RemoveEqual.ll Wed Feb 9 00:32:02 2011 @@ -0,0 +1,276 @@ +; RUN: opt -mergefunc %s -disable-output +; This used to crash. + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32" +target triple = "i386-pc-linux-gnu" + +%"struct.kc::impl_Ccode_option" = type { %"struct.kc::impl_abstract_phylum" } +%"struct.kc::impl_CexpressionDQ" = type { %"struct.kc::impl_Ccode_option", %"struct.kc::impl_Ccode_option"*, %"struct.kc::impl_CexpressionDQ"* } +%"struct.kc::impl_Ctext" = type { %"struct.kc::impl_Ccode_option", i32, %"struct.kc::impl_casestring__Str"*, %"struct.kc::impl_Ctext_elem"*, %"struct.kc::impl_Ctext"* } +%"struct.kc::impl_Ctext_elem" = type { %"struct.kc::impl_abstract_phylum", i32, %"struct.kc::impl_casestring__Str"* } +%"struct.kc::impl_ID" = type { %"struct.kc::impl_abstract_phylum", %"struct.kc::impl_Ccode_option"*, %"struct.kc::impl_casestring__Str"*, i32, %"struct.kc::impl_casestring__Str"* } +%"struct.kc::impl_abstract_phylum" = type { i32 (...)** } +%"struct.kc::impl_ac_abstract_declarator_AcAbsdeclDirdecl" = type { %"struct.kc::impl_Ccode_option", %"struct.kc::impl_Ccode_option"*, %"struct.kc::impl_Ccode_option"* } +%"struct.kc::impl_casestring__Str" = type { %"struct.kc::impl_abstract_phylum", i8* } +%"struct.kc::impl_elem_patternrepresentation" = type { %"struct.kc::impl_abstract_phylum", i32, %"struct.kc::impl_casestring__Str"*, %"struct.kc::impl_ID"* } +%"struct.kc::impl_fileline" = type { %"struct.kc::impl_abstract_phylum", %"struct.kc::impl_casestring__Str"*, i32 } +%"struct.kc::impl_fileline_FileLine" = type { %"struct.kc::impl_fileline" } +%"struct.kc::impl_outmostpatterns" = type { %"struct.kc::impl_Ccode_option", %"struct.kc::impl_elem_patternrepresentation"*, %"struct.kc::impl_outmostpatterns"* } +%"struct.kc::impl_withcaseinfo_Withcaseinfo" = type { %"struct.kc::impl_Ccode_option", %"struct.kc::impl_outmostpatterns"*, %"struct.kc::impl_outmostpatterns"*, %"struct.kc::impl_Ctext"* } + + at _ZTVN2kc13impl_filelineE = external constant [13 x i32 (...)*], align 32 + at .str = external constant [1 x i8], align 1 + at _ZTVN2kc22impl_fileline_FileLineE = external constant [13 x i32 (...)*], align 32 + +define void @_ZN2kc22impl_fileline_FileLineC2EPNS_20impl_casestring__StrEi(%"struct.kc::impl_fileline_FileLine"* %this, %"struct.kc::impl_casestring__Str"* %_file, i32 %_line) align 2 { +entry: + %this_addr = alloca %"struct.kc::impl_fileline_FileLine"*, align 4 + %_file_addr = alloca %"struct.kc::impl_casestring__Str"*, align 4 + %_line_addr = alloca i32, align 4 + %save_filt.150 = alloca i32 + %save_eptr.149 = alloca i8* + %iftmp.99 = alloca %"struct.kc::impl_casestring__Str"* + %eh_exception = alloca i8* + %eh_selector = alloca i32 + %"alloca point" = bitcast i32 0 to i32 + store %"struct.kc::impl_fileline_FileLine"* %this, %"struct.kc::impl_fileline_FileLine"** %this_addr + store %"struct.kc::impl_casestring__Str"* %_file, %"struct.kc::impl_casestring__Str"** %_file_addr + store i32 %_line, i32* %_line_addr + %0 = load %"struct.kc::impl_fileline_FileLine"** %this_addr, align 4 + %1 = getelementptr inbounds %"struct.kc::impl_fileline_FileLine"* %0, i32 0, i32 0 + call void @_ZN2kc13impl_filelineC2Ev() nounwind + %2 = load %"struct.kc::impl_fileline_FileLine"** %this_addr, align 4 + %3 = getelementptr inbounds %"struct.kc::impl_fileline_FileLine"* %2, i32 0, i32 0 + %4 = getelementptr inbounds %"struct.kc::impl_fileline"* %3, i32 0, i32 0 + %5 = getelementptr inbounds %"struct.kc::impl_abstract_phylum"* %4, i32 0, i32 0 + store i32 (...)** getelementptr inbounds ([13 x i32 (...)*]* @_ZTVN2kc22impl_fileline_FileLineE, i32 0, i32 2), i32 (...)*** %5, align 4 + %6 = load %"struct.kc::impl_casestring__Str"** %_file_addr, align 4 + %7 = icmp eq %"struct.kc::impl_casestring__Str"* %6, null + br i1 %7, label %bb, label %bb1 + +bb: ; preds = %entry + %8 = invoke %"struct.kc::impl_casestring__Str"* @_ZN2kc12mkcasestringEPKci() + to label %invcont unwind label %lpad + +invcont: ; preds = %bb + store %"struct.kc::impl_casestring__Str"* %8, %"struct.kc::impl_casestring__Str"** %iftmp.99, align 4 + br label %bb2 + +bb1: ; preds = %entry + %9 = load %"struct.kc::impl_casestring__Str"** %_file_addr, align 4 + store %"struct.kc::impl_casestring__Str"* %9, %"struct.kc::impl_casestring__Str"** %iftmp.99, align 4 + br label %bb2 + +bb2: ; preds = %bb1, %invcont + %10 = load %"struct.kc::impl_fileline_FileLine"** %this_addr, align 4 + %11 = getelementptr inbounds %"struct.kc::impl_fileline_FileLine"* %10, i32 0, i32 0 + %12 = getelementptr inbounds %"struct.kc::impl_fileline"* %11, i32 0, i32 1 + %13 = load %"struct.kc::impl_casestring__Str"** %iftmp.99, align 4 + store %"struct.kc::impl_casestring__Str"* %13, %"struct.kc::impl_casestring__Str"** %12, align 4 + %14 = load %"struct.kc::impl_fileline_FileLine"** %this_addr, align 4 + %15 = getelementptr inbounds %"struct.kc::impl_fileline_FileLine"* %14, i32 0, i32 0 + %16 = getelementptr inbounds %"struct.kc::impl_fileline"* %15, i32 0, i32 2 + %17 = load i32* %_line_addr, align 4 + store i32 %17, i32* %16, align 4 + ret void + +lpad: ; preds = %bb + %eh_ptr = call i8* @llvm.eh.exception() + store i8* %eh_ptr, i8** %eh_exception + %eh_ptr4 = load i8** %eh_exception + %eh_select5 = call i32 (i8*, i8*, ...)* @llvm.eh.selector(i8* %eh_ptr4, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i32 0) + store i32 %eh_select5, i32* %eh_selector + %eh_select = load i32* %eh_selector + store i32 %eh_select, i32* %save_filt.150, align 4 + %eh_value = load i8** %eh_exception + store i8* %eh_value, i8** %save_eptr.149, align 4 + %18 = load %"struct.kc::impl_fileline_FileLine"** %this_addr, align 4 + %19 = bitcast %"struct.kc::impl_fileline_FileLine"* %18 to %"struct.kc::impl_fileline"* + call void @_ZN2kc13impl_filelineD2Ev(%"struct.kc::impl_fileline"* %19) nounwind + %20 = load i8** %save_eptr.149, align 4 + store i8* %20, i8** %eh_exception, align 4 + %21 = load i32* %save_filt.150, align 4 + store i32 %21, i32* %eh_selector, align 4 + %eh_ptr6 = load i8** %eh_exception + call void @_Unwind_Resume_or_Rethrow() + unreachable +} + +declare void @_ZN2kc13impl_filelineC2Ev() nounwind align 2 + +define void @_ZN2kc13impl_filelineD1Ev(%"struct.kc::impl_fileline"* %this) nounwind align 2 { +entry: + %this_addr = alloca %"struct.kc::impl_fileline"*, align 4 + %"alloca point" = bitcast i32 0 to i32 + store %"struct.kc::impl_fileline"* %this, %"struct.kc::impl_fileline"** %this_addr + %0 = load %"struct.kc::impl_fileline"** %this_addr, align 4 + %1 = getelementptr inbounds %"struct.kc::impl_fileline"* %0, i32 0, i32 0 + %2 = getelementptr inbounds %"struct.kc::impl_abstract_phylum"* %1, i32 0, i32 0 + store i32 (...)** getelementptr inbounds ([13 x i32 (...)*]* @_ZTVN2kc13impl_filelineE, i32 0, i32 2), i32 (...)*** %2, align 4 + %3 = trunc i32 0 to i8 + %toBool = icmp ne i8 %3, 0 + br i1 %toBool, label %bb1, label %return + +bb1: ; preds = %entry + %4 = load %"struct.kc::impl_fileline"** %this_addr, align 4 + %5 = bitcast %"struct.kc::impl_fileline"* %4 to i8* + call void @_ZdlPv() nounwind + br label %return + +return: ; preds = %bb1, %entry + ret void +} + +declare void @_ZdlPv() nounwind + +define void @_ZN2kc13impl_filelineD2Ev(%"struct.kc::impl_fileline"* %this) nounwind align 2 { +entry: + %this_addr = alloca %"struct.kc::impl_fileline"*, align 4 + %"alloca point" = bitcast i32 0 to i32 + store %"struct.kc::impl_fileline"* %this, %"struct.kc::impl_fileline"** %this_addr + %0 = load %"struct.kc::impl_fileline"** %this_addr, align 4 + %1 = getelementptr inbounds %"struct.kc::impl_fileline"* %0, i32 0, i32 0 + %2 = getelementptr inbounds %"struct.kc::impl_abstract_phylum"* %1, i32 0, i32 0 + store i32 (...)** getelementptr inbounds ([13 x i32 (...)*]* @_ZTVN2kc13impl_filelineE, i32 0, i32 2), i32 (...)*** %2, align 4 + %3 = trunc i32 0 to i8 + %toBool = icmp ne i8 %3, 0 + br i1 %toBool, label %bb1, label %return + +bb1: ; preds = %entry + %4 = load %"struct.kc::impl_fileline"** %this_addr, align 4 + %5 = bitcast %"struct.kc::impl_fileline"* %4 to i8* + call void @_ZdlPv() nounwind + br label %return + +return: ; preds = %bb1, %entry + ret void +} + +define void @_ZN2kc22impl_fileline_FileLineC1EPNS_20impl_casestring__StrEi(%"struct.kc::impl_fileline_FileLine"* %this, %"struct.kc::impl_casestring__Str"* %_file, i32 %_line) align 2 { +entry: + %this_addr = alloca %"struct.kc::impl_fileline_FileLine"*, align 4 + %_file_addr = alloca %"struct.kc::impl_casestring__Str"*, align 4 + %_line_addr = alloca i32, align 4 + %save_filt.148 = alloca i32 + %save_eptr.147 = alloca i8* + %iftmp.99 = alloca %"struct.kc::impl_casestring__Str"* + %eh_exception = alloca i8* + %eh_selector = alloca i32 + %"alloca point" = bitcast i32 0 to i32 + store %"struct.kc::impl_fileline_FileLine"* %this, %"struct.kc::impl_fileline_FileLine"** %this_addr + store %"struct.kc::impl_casestring__Str"* %_file, %"struct.kc::impl_casestring__Str"** %_file_addr + store i32 %_line, i32* %_line_addr + %0 = load %"struct.kc::impl_fileline_FileLine"** %this_addr, align 4 + %1 = getelementptr inbounds %"struct.kc::impl_fileline_FileLine"* %0, i32 0, i32 0 + call void @_ZN2kc13impl_filelineC2Ev() nounwind + %2 = load %"struct.kc::impl_fileline_FileLine"** %this_addr, align 4 + %3 = getelementptr inbounds %"struct.kc::impl_fileline_FileLine"* %2, i32 0, i32 0 + %4 = getelementptr inbounds %"struct.kc::impl_fileline"* %3, i32 0, i32 0 + %5 = getelementptr inbounds %"struct.kc::impl_abstract_phylum"* %4, i32 0, i32 0 + store i32 (...)** getelementptr inbounds ([13 x i32 (...)*]* @_ZTVN2kc22impl_fileline_FileLineE, i32 0, i32 2), i32 (...)*** %5, align 4 + %6 = load %"struct.kc::impl_casestring__Str"** %_file_addr, align 4 + %7 = icmp eq %"struct.kc::impl_casestring__Str"* %6, null + br i1 %7, label %bb, label %bb1 + +bb: ; preds = %entry + %8 = invoke %"struct.kc::impl_casestring__Str"* @_ZN2kc12mkcasestringEPKci() + to label %invcont unwind label %lpad + +invcont: ; preds = %bb + store %"struct.kc::impl_casestring__Str"* %8, %"struct.kc::impl_casestring__Str"** %iftmp.99, align 4 + br label %bb2 + +bb1: ; preds = %entry + %9 = load %"struct.kc::impl_casestring__Str"** %_file_addr, align 4 + store %"struct.kc::impl_casestring__Str"* %9, %"struct.kc::impl_casestring__Str"** %iftmp.99, align 4 + br label %bb2 + +bb2: ; preds = %bb1, %invcont + %10 = load %"struct.kc::impl_fileline_FileLine"** %this_addr, align 4 + %11 = getelementptr inbounds %"struct.kc::impl_fileline_FileLine"* %10, i32 0, i32 0 + %12 = getelementptr inbounds %"struct.kc::impl_fileline"* %11, i32 0, i32 1 + %13 = load %"struct.kc::impl_casestring__Str"** %iftmp.99, align 4 + store %"struct.kc::impl_casestring__Str"* %13, %"struct.kc::impl_casestring__Str"** %12, align 4 + %14 = load %"struct.kc::impl_fileline_FileLine"** %this_addr, align 4 + %15 = getelementptr inbounds %"struct.kc::impl_fileline_FileLine"* %14, i32 0, i32 0 + %16 = getelementptr inbounds %"struct.kc::impl_fileline"* %15, i32 0, i32 2 + %17 = load i32* %_line_addr, align 4 + store i32 %17, i32* %16, align 4 + ret void + +lpad: ; preds = %bb + %eh_ptr = call i8* @llvm.eh.exception() + store i8* %eh_ptr, i8** %eh_exception + %eh_ptr4 = load i8** %eh_exception + %eh_select5 = call i32 (i8*, i8*, ...)* @llvm.eh.selector(i8* %eh_ptr4, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i32 0) + store i32 %eh_select5, i32* %eh_selector + %eh_select = load i32* %eh_selector + store i32 %eh_select, i32* %save_filt.148, align 4 + %eh_value = load i8** %eh_exception + store i8* %eh_value, i8** %save_eptr.147, align 4 + %18 = load %"struct.kc::impl_fileline_FileLine"** %this_addr, align 4 + %19 = bitcast %"struct.kc::impl_fileline_FileLine"* %18 to %"struct.kc::impl_fileline"* + call void @_ZN2kc13impl_filelineD2Ev(%"struct.kc::impl_fileline"* %19) nounwind + %20 = load i8** %save_eptr.147, align 4 + store i8* %20, i8** %eh_exception, align 4 + %21 = load i32* %save_filt.148, align 4 + store i32 %21, i32* %eh_selector, align 4 + %eh_ptr6 = load i8** %eh_exception + call void @_Unwind_Resume_or_Rethrow() + unreachable +} + +declare i8* @llvm.eh.exception() nounwind readonly + +declare i32 @llvm.eh.selector(i8*, i8*, ...) nounwind + +declare i32 @__gxx_personality_v0(...) + +declare void @_Unwind_Resume_or_Rethrow() + +define void @_ZN2kc21printer_functor_classC2Ev(%"struct.kc::impl_abstract_phylum"* %this) nounwind align 2 { +entry: + unreachable +} + +define %"struct.kc::impl_Ccode_option"* @_ZN2kc11phylum_castIPNS_17impl_withcaseinfoES1_EET_PT0_(%"struct.kc::impl_Ccode_option"* %t) nounwind { +entry: + ret %"struct.kc::impl_Ccode_option"* null +} + +define %"struct.kc::impl_abstract_phylum"* @_ZNK2kc43impl_ac_direct_declarator_AcDirectDeclProto9subphylumEi(%"struct.kc::impl_ac_abstract_declarator_AcAbsdeclDirdecl"* %this, i32 %no) nounwind align 2 { +entry: + ret %"struct.kc::impl_abstract_phylum"* undef +} + +define void @_ZN2kc30impl_withcaseinfo_WithcaseinfoD0Ev(%"struct.kc::impl_withcaseinfo_Withcaseinfo"* %this) nounwind align 2 { +entry: + unreachable +} + +define void @_ZN2kc30impl_withcaseinfo_WithcaseinfoC1EPNS_26impl_patternrepresentationES2_PNS_10impl_CtextE(%"struct.kc::impl_withcaseinfo_Withcaseinfo"* %this, %"struct.kc::impl_outmostpatterns"* %_patternrepresentation_1, %"struct.kc::impl_outmostpatterns"* %_patternrepresentation_2, %"struct.kc::impl_Ctext"* %_Ctext_1) nounwind align 2 { +entry: + unreachable +} + +define void @_ZN2kc21impl_rewriteviewsinfoC2EPNS_20impl_rewriteviewinfoEPS0_(%"struct.kc::impl_CexpressionDQ"* %this, %"struct.kc::impl_Ccode_option"* %p1, %"struct.kc::impl_CexpressionDQ"* %p2) nounwind align 2 { +entry: + unreachable +} + +define %"struct.kc::impl_Ctext_elem"* @_ZN2kc11phylum_castIPNS_9impl_termENS_20impl_abstract_phylumEEET_PT0_(%"struct.kc::impl_abstract_phylum"* %t) nounwind { +entry: + unreachable +} + +define void @_ZN2kc27impl_ac_parameter_type_listD2Ev(%"struct.kc::impl_Ccode_option"* %this) nounwind align 2 { +entry: + ret void +} + +define void @_ZN2kc21impl_ac_operator_nameD2Ev(%"struct.kc::impl_Ctext_elem"* %this) nounwind align 2 { +entry: + ret void +} + +declare %"struct.kc::impl_casestring__Str"* @_ZN2kc12mkcasestringEPKci() From anton at korobeynikov.info Wed Feb 9 00:36:55 2011 From: anton at korobeynikov.info (Anton Korobeynikov) Date: Wed, 9 Feb 2011 09:36:55 +0300 Subject: [llvm-commits] [llvm] r125171 - /llvm/trunk/lib/Support/Windows/Windows.h In-Reply-To: <20110209041830.8B6A32A6C12C@llvm.org> References: <20110209041830.8B6A32A6C12C@llvm.org> Message-ID: Hi Takumi, > +// mingw-w64 tends to define it as 0x0502 in its headers. > +#undef _WIN32_WINNT > + > ?// Require at least Windows 2000 API. > ?#define _WIN32_WINNT 0x0500 > ?#define _WIN32_IE ? ?0x0500 // MinGW at it again. Ok, now the question: why can't we have 0x0500 for mingw32 and 0x0502 for mingw64 here? -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University From david_dean at apple.com Tue Feb 8 18:33:54 2011 From: david_dean at apple.com (David Dean) Date: Wed, 09 Feb 2011 00:33:54 -0000 Subject: [llvm-commits] [zorg] r125141 - in /zorg/trunk/buildbot/llvmlab/master/config: builders.py schedulers.py status.py Message-ID: <20110209003354.0FFD92A6C12C@llvm.org> Author: ddean Date: Tue Feb 8 18:33:53 2011 New Revision: 125141 URL: http://llvm.org/viewvc/llvm-project?rev=125141&view=rev Log: remove unneeded trigger/scheduler; remove unneeded WithProperties(); remove intermediate revision directory from artifacts upload path since the revision is now encoded in the archive name; Use NightlyTestCommand() for nightly test runs; make artifacts/archives smaller Modified: zorg/trunk/buildbot/llvmlab/master/config/builders.py zorg/trunk/buildbot/llvmlab/master/config/schedulers.py zorg/trunk/buildbot/llvmlab/master/config/status.py Modified: zorg/trunk/buildbot/llvmlab/master/config/builders.py URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/buildbot/llvmlab/master/config/builders.py?rev=125141&r1=125140&r2=125141&view=diff ============================================================================== --- zorg/trunk/buildbot/llvmlab/master/config/builders.py (original) +++ zorg/trunk/buildbot/llvmlab/master/config/builders.py Tue Feb 8 18:33:53 2011 @@ -63,58 +63,64 @@ def GetCompilerArtifacts(f): if WithProperties('%(revision)s')=='None': - src_file = WithProperties('buildmaster at llvmlab.local:~/artifacts/%(use_builder)s/%(got_revision)s/clang-install.tar.gz') + src_file = WithProperties('buildmaster at llvmlab.local:~/artifacts/%(use_builder)s/%(got_revision)s/clang-*.tar.gz') else: - src_file = WithProperties('buildmaster at llvmlab.local:~/artifacts/%(use_builder)s/%(revision)s/clang-install.tar.gz') - slavedest=WithProperties('%(builddir)s/clang-install.tar.gz') + src_file = WithProperties('buildmaster at llvmlab.local:~/artifacts/%(use_builder)s/%(revision)s/clang-*.tar.gz') + slavedest=WithProperties('%(builddir)s/clang-host.tar.gz') f.addStep(buildbot.steps.shell.ShellCommand( name='download_artifacts', command=['rsync', '-ave', 'ssh', src_file, slavedest ], haltOnFailure=True, description=['download build artifacts'], - workdir='.', + workdir=WithProperties('%(builddir)s'), )) #extract compiler artifacts used for this build f.addStep(buildbot.steps.shell.ShellCommand( name='unzip', - command=['tar', '-zxvf', WithProperties('clang-install.tar.gz'),], + command=['tar', '-zxvf','../clang-host.tar.gz',], haltOnFailure=True, - description=['extract', WithProperties('clang-install')], - workdir='.', + description=['extract', 'clang-host'], + workdir='clang-host', )) return f def cleanCompilerDir(f): f.addStep(buildbot.steps.shell.ShellCommand( - command=['rm', '-rf', 'clang-install'], + command=['rm', '-rfv', 'clang-install'], haltOnFailure=False, description=['rm dir', 'clang-install'], - workdir='.', + workdir=WithProperties('%(builddir)s'), )) f.addStep(buildbot.steps.shell.ShellCommand( - command=['rm', '-rf', 'clang-install.tar.gz'], + command=['rm', '-rfv', 'clang-host'], haltOnFailure=False, - description=['rm archive', 'clang-install.tar.gz'], - workdir='.', + description=['rm dir', 'clang-host'], + workdir=WithProperties('%(builddir)s'), )) f.addStep(buildbot.steps.shell.ShellCommand( - command=['rm', '-rf', WithProperties('%(compiler_built:-)s')], + command=['sh', '-c', 'rm -rfv clang*.tar.gz'], + haltOnFailure=False, + description=['rm archives'], + workdir=WithProperties('%(builddir)s'), + )) + f.addStep(buildbot.steps.shell.ShellCommand( + command=['rm', '-rfv', WithProperties('%(compiler_built:-)s')], haltOnFailure=False, description=['rm dir', WithProperties('%(compiler_built:-)s')], - workdir='.', + workdir=WithProperties('%(builddir)s'), )) return f def uploadArtifacts(f): f.addStep(buildbot.steps.shell.ShellCommand( name='tar_and_zip', - command=['tar', 'czvf', 'clang-install.tar.gz', - WithProperties('./clang-install/')], + command=['tar', 'czvf', WithProperties('../clang-r%(got_revision)s-b%(buildnumber)s.tar.gz'), + './'], haltOnFailure=True, description=['tar', '&', 'zip'], - workdir='.', + workdir='clang-install', )) - archive_src = WithProperties('%(builddir)s/clang-install.tar.gz') + archive_src = WithProperties('%(builddir)s/clang-r%(got_revision)s-b%(buildnumber)s.tar.gz') f.addStep(buildbot.steps.shell.ShellCommand( name='upload_artifacts', command=['rsync', '-ave', 'ssh', archive_src, @@ -122,9 +128,9 @@ ], haltOnFailure=True, description=['upload build artifacts'], - workdir='.', + workdir=WithProperties('%(builddir)s'), )) - + setProperty(f, 'artifactsURL', WithProperties('http://smooshlab.apple.com/artifacts/%(buildername)s/clang-r%(got_revision)s-b%(buildnumber)s.tar.gz') ) return f def regressionTests(f): @@ -159,9 +165,8 @@ def clangStage1(f,config_options=''): # Determine the build directory. f = getBuildDir(f) - f = setProperty(f, 'compiler_built', 'clang-build') # clean out the directory used for the stage 1 compiler - #f = cleanCompilerDir(f) + f = cleanCompilerDir(f) # pull sources f = pullllvm(f) f = pullClang(f) @@ -171,6 +176,7 @@ command=[ '../llvm/configure', '--enable-optimized', '--disable-bindings', '--with-llvmcc=clang', '--without-llvmgcc', '--without-llvmgxx', + WithProperties('--prefix=/'), ], haltOnFailure=True, description=['configure'], @@ -183,7 +189,7 @@ workdir=WithProperties('%(compiler_built)s'))) f.addStep(buildbot.steps.shell.ShellCommand( name='make install', - command=['make', 'install', '-j', WithProperties('%(jobs)s'), + command=['make', 'install-clang', '-j', WithProperties('%(jobs)s'), WithProperties('DESTDIR=%(builddir)s/clang-install')], haltOnFailure=True, description=['make install'], @@ -195,8 +201,7 @@ f = buildbot.process.factory.BuildFactory() # Determine the build directory. f = getBuildDir(f) - f = setProperty(f, 'compiler_built', 'clang-build') - f = setProperty(f, 'use_path', WithProperties('%(builddir)s/clang-install/usr/local/bin')) + f = setProperty(f, 'use_path', WithProperties('%(builddir)s/clang-host/bin')) # clean out the directory/archives used for the stage 1 compiler # clean out the directory used to build compiler f = cleanCompilerDir(f) @@ -217,6 +222,7 @@ '--with-llvmcc=clang', '--without-llvmgcc', '--without-llvmgxx', WithProperties('CC=%(use_path)s/clang'), WithProperties('CXX=%(use_path)s/clang++'), + WithProperties('--prefix=/'), ], haltOnFailure=True, description=['configure'], @@ -232,7 +238,7 @@ workdir=WithProperties('%(compiler_built)s'))) f.addStep(buildbot.steps.shell.ShellCommand( name='make install', - command=['make', '-j', WithProperties('%(jobs)s'), 'install-clang', + command=['make', 'install-clang', '-j', WithProperties('%(jobs)s'), WithProperties('DESTDIR=%(builddir)s/clang-install')], env={'PATH': WithProperties('%(use_path)s:${PATH}')}, haltOnFailure=True, @@ -282,15 +288,21 @@ 'factory' : clangHost(config_options), 'slavenames' : slaves, 'category' : 'clang', - 'properties' : {'compiler_type': compiler_type, 'use_builder': use_compiler, + 'properties' : {'compiler_type': compiler_type, + 'use_builder': use_compiler, + 'compiler_built': 'clang-build' }} -def NightlyFactory(compiler, options): +def CreateNightly(options): f = buildbot.process.factory.BuildFactory() + NightlyFactory(f, options) + return f + +from zorg.buildbot.commands.NightlyTestCommand import NightlyTestCommand +def NightlyFactory(f, options, clean=True, test=True, xfails=set()): # Determine the build directory. f = getBuildDir(f) - f = setProperty(f, 'use_builder', compiler) - f = setProperty(f, 'use_path', WithProperties('%(builddir)s/clang-install/usr/local/bin')) + f = setProperty(f, 'use_path', WithProperties('%(builddir)s/clang-host/bin')) #clean out the directory/archives prior to extracting compiler f = cleanCompilerDir(f) #Download compiler artifacts to be used for this build @@ -303,7 +315,7 @@ description=['sanity test'], env={'PATH': WithProperties('%(use_path)s:${PATH}')}, )) - # pull test-suite + # pull source code f = pullllvm(f) f = pullClang(f) f = pulltest_suite(f) @@ -329,10 +341,19 @@ haltOnFailure=True, description=['make'], workdir='llvm.obj')) - # run tests + # Clean up. + if clean: + f.addStep(buildbot.steps.shell.ShellCommand( + name="rm.test-suite", + command=["rm", "-rfv", "test-suite-build"], + haltOnFailure=True, + description="rm test-suite build dir", + workdir=WithProperties('%(builddir)s'), + )) + # Configure. f.addStep(buildbot.steps.shell.ShellCommand( name='configure_tests', - command=['./configure', + command=['../test-suite/configure', WithProperties('CC=%(use_path)s/clang'), WithProperties('CXX=%(use_path)s/clang++'), 'CFLAGS='+options, @@ -343,22 +364,27 @@ haltOnFailure=True, description=['configure tests'], env={'PATH': WithProperties('%(use_path)s:${PATH}')}, - workdir='test-suite')) - f.addStep(buildbot.steps.shell.ShellCommand( - name='run_nightly_tests', + workdir='test-suite-build', + )) + # Build and test. + f.addStep(NightlyTestCommand( + name='run_fast_nightly_tests', command=['make', WithProperties('-j%(jobs)s'), 'ENABLE_PARALLEL_REPORT=1', 'DISABLE_CBE=1', 'DISABLE_JIT=1', 'TEST=nightly', 'report' ], env={'PATH': WithProperties('%(use_path)s:${PATH}')}, haltOnFailure=True, - description=['run tests'], - workdir='test-suite')) + description=["run", "test-suite"], + workdir='test-suite-build', + logfiles={ 'report' : 'report.nightly.txt' }, + xfails=xfails + )) return f def Nightly(compiler, slaves, options=''): return { 'name' : 'nightly_'+ compiler + options, 'builddir' : 'build.nightly.'+ compiler + options, - 'factory' : NightlyFactory(compiler, options), + 'factory' : CreateNightly(options), 'slavenames' : slaves, 'category' : 'tests', 'properties' : {'use_builder': compiler }} @@ -369,7 +395,8 @@ 'factory' : createPhase1(), 'slavename' : slave, 'category' : 'clang', - 'properties' : {'compiler_type': compiler_type + 'properties' : {'compiler_type': compiler_type, + 'compiler_built': 'clang-build' }} def HostStage3Clang(config_options): @@ -377,8 +404,7 @@ f = buildbot.process.factory.BuildFactory() # Determine the build directory. f = getBuildDir(f) - f = setProperty(f, 'compiler_built', 'clang-build') - f = setProperty(f, 'use_path', WithProperties('%(builddir)s/clang-install/usr/local/bin')) + f = setProperty(f, 'use_path', WithProperties('%(builddir)s/clang-host/bin')) # clean out the directory/archives used for the stage 2 compiler # clean out the directory used to build compiler f = cleanCompilerDir(f) @@ -396,6 +422,7 @@ config_options, WithProperties('CC=%(use_path)s/clang'), WithProperties('CXX=%(use_path)s/clang++'), + WithProperties('--prefix=/'), ], haltOnFailure=True, description=['configure'], @@ -411,7 +438,7 @@ workdir=WithProperties('%(compiler_built)s'))) f.addStep(buildbot.steps.shell.ShellCommand( name='make install', - command=['make', '-j', WithProperties('%(jobs)s'), 'install-clang', + command=['make', 'install-clang', '-j', WithProperties('%(jobs)s'), WithProperties('DESTDIR=%(builddir)s/clang-install')], env={'PATH': WithProperties('%(use_path)s:${PATH}')}, haltOnFailure=True, @@ -420,11 +447,7 @@ # save artifacts of thids build for use by other builders f = uploadArtifacts(f) f = regressionTests(f) - f.addStep(Trigger(schedulerNames=['stage3Nightly'], - waitForFinish=True, - updateSourceStamp=True, - set_properties={'revision': WithProperties('%(revision)s'), 'got_revision': WithProperties('%(revision)s')} - )) + NightlyFactory(f, '') return f def stage3Clang(use_compiler, slaves, config_options=''): @@ -433,7 +456,9 @@ 'factory' : HostStage3Clang(config_options), 'slavenames' : slaves, 'category' : 'clang', - 'properties' : { 'use_builder': use_compiler, + 'properties' : {'use_builder': use_compiler, + 'compiler_type': 'Release+Asserts', + 'compiler_built': 'clang-build' }} def gccTestSuite(use_compiler, slaves, config_options=''): @@ -468,7 +493,7 @@ f = buildbot.process.factory.BuildFactory() # Determine the build directory. getBuildDir(f) - setProperty(f, 'use_path', WithProperties('%(builddir)s/clang-install/usr/local/bin')) + setProperty(f, 'use_path', WithProperties('%(builddir)s/clang-host/bin')) cleanCompilerDir(f) # pull test-suite pullclang_tests(f) @@ -490,7 +515,7 @@ f = buildbot.process.factory.BuildFactory() # Determine the build directory. getBuildDir(f) - setProperty(f, 'use_path', WithProperties('%(builddir)s/clang-install/usr/local/bin')) + setProperty(f, 'use_path', WithProperties('%(builddir)s/clang-host/bin')) cleanCompilerDir(f) # pull test-suite pulllibcxx(f) @@ -517,7 +542,7 @@ f = buildbot.process.factory.BuildFactory() # Determine the build directory. getBuildDir(f) - f = setProperty(f, 'use_path', WithProperties('%(builddir)s/clang-install/usr/local/bin')) + f = setProperty(f, 'use_path', WithProperties('%(builddir)s/clang-host/bin')) cleanCompilerDir(f) # pull test-suite pullboostrunner(f) @@ -534,7 +559,7 @@ ';', '>', 'user-config.jam'], haltOnFailure=True, description=['create user-config.jam'], - workdir='.', + workdir=WithProperties('%(builddir)s'), )) #--bjam-options=target-os=windows --bjam-options=-l300 --bjam-options=--debug-level=3 --bjam-options=--user-config=%MYJAMFILE% --have-source --skip-script-download --ftp=ftp://boost:4peiV8Xwxfv9 at ftp.siliconman.net >runner.log f.addStep(buildbot.steps.shell.ShellCommand( @@ -546,7 +571,7 @@ WithProperties('--bjam-options=-j%(jobs)s'),'--user=""',], haltOnFailure=True, description=['boost regression harness'], - workdir='.', + workdir=WithProperties('%(builddir)s'), timeout=14400 )) return f @@ -558,11 +583,9 @@ typeR = 'Release' typeRA = 'Release+Asserts' phase1_slave = 'llvmlab.local' - snow_leopard_slaves = all_slaves phaseRunners = [phase1_slave] - reserved_phase3 = 'lab-mini-04.local' - phase2_slaves = filter(lambda x:x not in [phase1_slave, reserved_phase3], snow_leopard_slaves) - phase3_slaves = phase2_slaves + [reserved_phase3] + phase3_slaves = ['lab-mini-04.local'] + #phase2_slaves = filter(lambda x:x not in [phase1_slave], all_slaves) return [ #Build to announce good build and prepare potential release candidate { 'name' : 'Validated Build', @@ -578,9 +601,9 @@ # phase 1 build stage1Clang(phase1, typeRA, phase1_slave), #phase 2 Builds - HostedClang ('clang-x86_64-osx10-DA', typeDA, phase1, phase2_slaves), - HostedClang (final_reference, typeRA, phase1, phase2_slaves, '--enable-optimized'), - Nightly(phase1, phase2_slaves), + HostedClang ('clang-x86_64-osx10-DA', typeDA, phase1, ['lab-mini-01.local']), + HostedClang (final_reference, typeRA, phase1, ['lab-mini-02.local'], '--enable-optimized'), + Nightly(phase1, ['lab-mini-03.local']), #phase3 builds HostedClang ('clang-i386-osx10-RA', typeRA, phase1, phase3_slaves, '--enable-optimized', '--target=i386'), Nightly('clang-x86_64-osx10-DA', phase3_slaves), @@ -595,11 +618,10 @@ Nightly('clang-i386-osx10-RA', phase3_slaves), stage3Clang(final_reference, phase3_slaves), gccTestSuite(final_reference, phase3_slaves), - Nightly(final_reference+ '-stage3', phase3_slaves, '-g'), libcxx(final_reference, phase3_slaves), boost('trunk', final_reference, phase3_slaves), -# boost('branches/release', final_reference, phase2_slaves), -# boost('tags/release/Boost_1_44_0', final_reference, phase2_slaves), +# boost('branches/release', final_reference, phase3_slaves), +# boost('tags/release/Boost_1_44_0', final_reference, phase3_slaves), #A Placeholder builder is required for triggers which haven't had builders #configured yet, otherwise build will hang # { 'name' : 'Placeholder', Modified: zorg/trunk/buildbot/llvmlab/master/config/schedulers.py URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/buildbot/llvmlab/master/config/schedulers.py?rev=125141&r1=125140&r2=125141&view=diff ============================================================================== --- zorg/trunk/buildbot/llvmlab/master/config/schedulers.py (original) +++ zorg/trunk/buildbot/llvmlab/master/config/schedulers.py Tue Feb 8 18:33:53 2011 @@ -53,12 +53,7 @@ LastOne = triggerable.Triggerable(name='GoodBuild', builderNames=['Validated Build',], properties = {'revision':WithProperties('%(got_revision)s')}) - - stage3Nightly = triggerable.Triggerable(name='stage3Nightly', - builderNames=['nightly_clang-x86_64-osx10-RA-stage3-g',], - properties = {'revision':WithProperties('%(got_revision)s')}) - return [vcScheduler, startphase1, gate1, startphase2, gate2, - startphase3, gate3, startphase4, LastOne, stage3Nightly] + startphase3, gate3, startphase4, LastOne, ] Modified: zorg/trunk/buildbot/llvmlab/master/config/status.py URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/buildbot/llvmlab/master/config/status.py?rev=125141&r1=125140&r2=125141&view=diff ============================================================================== --- zorg/trunk/buildbot/llvmlab/master/config/status.py (original) +++ zorg/trunk/buildbot/llvmlab/master/config/status.py Tue Feb 8 18:33:53 2011 @@ -17,5 +17,14 @@ extraRecipients = ['daniel_dunbar at apple.com','david_dean at apple.com'], sendToInterestedUsers=False, mode = 'problem', - relayhost="mail-in2.apple.com",), - ] + relayhost="mail-in2.apple.com", + categories=['clang','tests'], + ), + buildbot.status.mail.MailNotifier( + fromaddr = 'david_dean at apple.com', + extraRecipients = ['david_dean at apple.com'], + sendToInterestedUsers=False, + mode = 'change', + relayhost="mail-in2.apple.com", + categories=['status'], + ),] From geek4civic at gmail.com Wed Feb 9 03:59:52 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Wed, 9 Feb 2011 18:59:52 +0900 Subject: [llvm-commits] [llvm] r125171 - /llvm/trunk/lib/Support/Windows/Windows.h In-Reply-To: References: <20110209041830.8B6A32A6C12C@llvm.org> Message-ID: On Wed, Feb 9, 2011 at 3:36 PM, Anton Korobeynikov wrote: >> +// mingw-w64 tends to define it as 0x0502 in its headers. >> +#undef _WIN32_WINNT >> + >> ?// Require at least Windows 2000 API. >> ?#define _WIN32_WINNT 0x0500 >> ?#define _WIN32_IE ? ?0x0500 // MinGW at it again. > Ok, now the question: why can't we have 0x0500 for mingw32 and 0x0502 > for mingw64 here? We assume we could not know whether _WIN32_WINNT := 0x0502 or not until including anything (_mingw.h, std*.h, &c). Note that both {i686|x86_64}-w64-mingw32 (not pc-mingw32) have such behavior. If we could honor system header's _WIN32_WINNT, it would be possible; (but weird!) #include /* anything available on msvc and mingw! */ #ifdef _WIN32_WINNT # if _WIN32_WINNT<0x0500 # error "W2k?" # endif #else # ifdef _WIN64 # define _WIN32_WINNT 0x0502 /* at least Windows XP SP2 */ # else # define _WIN32_WINNT 0x0500 /* W2k */ # endif #endif ...Takumi From richard at xmos.com Wed Feb 9 07:22:12 2011 From: richard at xmos.com (Richard Osborne) Date: Wed, 09 Feb 2011 13:22:12 -0000 Subject: [llvm-commits] [llvm] r125186 - in /llvm/trunk: include/llvm/IntrinsicsXCore.td lib/Target/XCore/XCoreInstrInfo.td test/CodeGen/XCore/resources.ll Message-ID: <20110209132212.D24792A6C12C@llvm.org> Author: friedgold Date: Wed Feb 9 07:22:12 2011 New Revision: 125186 URL: http://llvm.org/viewvc/llvm-project?rev=125186&view=rev Log: Add intrinsic for setc instruction on the XCore. Modified: llvm/trunk/include/llvm/IntrinsicsXCore.td llvm/trunk/lib/Target/XCore/XCoreInstrInfo.td llvm/trunk/test/CodeGen/XCore/resources.ll Modified: llvm/trunk/include/llvm/IntrinsicsXCore.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IntrinsicsXCore.td?rev=125186&r1=125185&r2=125186&view=diff ============================================================================== --- llvm/trunk/include/llvm/IntrinsicsXCore.td (original) +++ llvm/trunk/include/llvm/IntrinsicsXCore.td Wed Feb 9 07:22:12 2011 @@ -31,4 +31,6 @@ [NoCapture<0>]>; def int_xcore_setd : Intrinsic<[],[llvm_anyptr_ty, llvm_i32_ty], [NoCapture<0>]>; + def int_xcore_setc : Intrinsic<[],[llvm_anyptr_ty, llvm_i32_ty], + [NoCapture<0>]>; } Modified: llvm/trunk/lib/Target/XCore/XCoreInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreInstrInfo.td?rev=125186&r1=125185&r2=125186&view=diff ============================================================================== --- llvm/trunk/lib/Target/XCore/XCoreInstrInfo.td (original) +++ llvm/trunk/lib/Target/XCore/XCoreInstrInfo.td Wed Feb 9 07:22:12 2011 @@ -610,8 +610,15 @@ [(set GRRegs:$dst, immU16:$b)]>; } +def SETC_ru6 : _FRU6<(outs), (ins GRRegs:$r, i32imm:$val), + "setc res[$r], $val", + [(int_xcore_setc GRRegs:$r, immU6:$val)]>; + +def SETC_lru6 : _FLRU6<(outs), (ins GRRegs:$r, i32imm:$val), + "setc res[$r], $val", + [(int_xcore_setc GRRegs:$r, immU16:$val)]>; + // Operand register - U6 -// TODO setc let isBranch = 1, isTerminator = 1 in { defm BRFT: FRU6_LRU6_branch<"bt">; defm BRBT: FRU6_LRU6_branch<"bt">; @@ -806,6 +813,10 @@ "clz $dst, $src", [(set GRRegs:$dst, (ctlz GRRegs:$src))]>; +def SETC_l2r : _FRU6<(outs), (ins GRRegs:$r, GRRegs:$val), + "setc res[$r], $val", + [(int_xcore_setc GRRegs:$r, GRRegs:$val)]>; + // One operand short // TODO edu, eeu, waitet, waitef, tstart, msync, mjoin, syncr, clrtp // setdp, setcp, setv, setev, kcall Modified: llvm/trunk/test/CodeGen/XCore/resources.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/resources.ll?rev=125186&r1=125185&r2=125186&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/XCore/resources.ll (original) +++ llvm/trunk/test/CodeGen/XCore/resources.ll Wed Feb 9 07:22:12 2011 @@ -95,3 +95,17 @@ call void @llvm.xcore.setd.p1i8(i8 addrspace(1)* %r, i32 %value) ret void } + +define void @setc(i8 addrspace(1)* %r, i32 %value) { +; CHECK: setc: +; CHECK: setc res[r0], r1 + call void @llvm.xcore.setc.p1i8(i8 addrspace(1)* %r, i32 %value) + ret void +} + +define void @setci(i8 addrspace(1)* %r) { +; CHECK: setci: +; CHECK: setc res[r0], 2 + call void @llvm.xcore.setc.p1i8(i8 addrspace(1)* %r, i32 2) + ret void +} From greened at obbligato.org Wed Feb 9 09:32:06 2011 From: greened at obbligato.org (David Greene) Date: Wed, 09 Feb 2011 15:32:06 -0000 Subject: [llvm-commits] [llvm] r125187 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Message-ID: <20110209153206.A2E372A6C12C@llvm.org> Author: greened Date: Wed Feb 9 09:32:06 2011 New Revision: 125187 URL: http://llvm.org/viewvc/llvm-project?rev=125187&view=rev Log: [AVX] Implement 256-bit vector lowering for INSERT_VECTOR_ELT. Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=125187&r1=125186&r2=125187&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Feb 9 09:32:06 2011 @@ -125,7 +125,9 @@ /// Generate a DAG to put 128-bits into a vector > 128 bits. This /// sets things up to match to an AVX VINSERTF128 instruction or a -/// simple superregister reference. +/// simple superregister reference. Idx is an index in the 128 bits +/// we want. It need not be aligned to a 128-bit bounday. That makes +/// lowering INSERT_VECTOR_ELT operations easier. static SDValue Insert128BitVector(SDValue Result, SDValue Vec, SDValue Idx, @@ -6027,17 +6029,45 @@ EVT VT = Op.getValueType(); EVT EltVT = VT.getVectorElementType(); + DebugLoc dl = Op.getDebugLoc(); + SDValue N0 = Op.getOperand(0); + SDValue N1 = Op.getOperand(1); + SDValue N2 = Op.getOperand(2); + + // If this is a 256-bit vector result, first insert into a 128-bit + // vector and then insert into the 256-bit vector. + if (VT.getSizeInBits() > 128) { + if (!isa(N2)) + return SDValue(); + + // Get the 128-bit vector. + unsigned NumElems = VT.getVectorNumElements(); + unsigned IdxVal = cast(N2)->getZExtValue(); + bool Upper = IdxVal >= NumElems / 2; + + SDValue SubN0 = Extract128BitVector(N0, N2, DAG, dl); + + // Insert into it. + SDValue ScaledN2 = N2; + if (Upper) + ScaledN2 = DAG.getNode(ISD::SUB, dl, N2.getValueType(), N2, + DAG.getConstant(NumElems / + (VT.getSizeInBits() / 128), + N2.getValueType())); + Op = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, SubN0.getValueType(), SubN0, + N1, ScaledN2); + + // Insert the 128-bit vector + // FIXME: Why UNDEF? + return Insert128BitVector(N0, Op, N2, DAG, dl); + } + if (Subtarget->hasSSE41()) return LowerINSERT_VECTOR_ELT_SSE4(Op, DAG); if (EltVT == MVT::i8) return SDValue(); - DebugLoc dl = Op.getDebugLoc(); - SDValue N0 = Op.getOperand(0); - SDValue N1 = Op.getOperand(1); - SDValue N2 = Op.getOperand(2); - if (EltVT.getSizeInBits() == 16 && isa(N2)) { // Transform it so it match pinsrw which expects a 16-bit value in a GR32 // as its second argument. From nadav.rotem at intel.com Wed Feb 9 09:43:13 2011 From: nadav.rotem at intel.com (Rotem, Nadav) Date: Wed, 9 Feb 2011 17:43:13 +0200 Subject: [llvm-commits] A patch fixing # 9173 Message-ID: <6594DDFF12B03D4E89690887C24869940270CCA569@hasmsx504.ger.corp.intel.com> I attached a partial fix to #9173. 1. On vector selects: a. For vectors, If the cond is all-zero: pick the second value b. For vectors, If the cond and vals are int-vectors, create a new int vector 2. For Bitcast: If the value is const-int and all-one, return a new all-one vector of new type. It does not eliminate all of the code in this bug-report because the Endianess of the vector is unknown at this point, so we can't perform bitcast. Patch attached. --------------------------------------------------------------------- Intel Israel (74) Limited This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). Any review or distribution by others is strictly prohibited. If you are not the intended recipient, please contact the sender and delete all copies. -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110209/6abbe635/attachment.html -------------- next part -------------- A non-text attachment was scrubbed... Name: constant_fold_cast.diff Type: application/octet-stream Size: 2842 bytes Desc: constant_fold_cast.diff Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110209/6abbe635/attachment.obj From baldrick at free.fr Wed Feb 9 10:18:18 2011 From: baldrick at free.fr (Duncan Sands) Date: Wed, 09 Feb 2011 17:18:18 +0100 Subject: [llvm-commits] A patch fixing # 9173 In-Reply-To: <6594DDFF12B03D4E89690887C24869940270CCA569@hasmsx504.ger.corp.intel.com> References: <6594DDFF12B03D4E89690887C24869940270CCA569@hasmsx504.ger.corp.intel.com> Message-ID: <4D52BE4A.10103@free.fr> Hi Nadav, @@ -132,11 +132,27 @@ if (const VectorType *SrcTy = dyn_cast(V->getType())) { assert(DestPTy->getBitWidth() == SrcTy->getBitWidth() && "Not cast between same sized vectors!"); - SrcTy = NULL; // First, check for null. Undef is already handled. if (isa(V)) return Constant::getNullValue(DestTy); + // In case of all-one vector, create a new all-one of dst type If you are only going to do this when the source is an all-ones vector then logic belongs in BitCastConstantVector. You could also handle the case when the source is an all-ones integer in which case at least that part belongs here. + if (ConstantVector* CV = dyn_cast(V)) { + bool AllOne = true; + for (unsigned int i=0; i< SrcTy->getNumElements() ; ++i) { + ConstantInt *ci = dyn_cast(CV->getOperand(i)); + if (! ci) { + AllOne = false; + break; + } + if (! ci->isAllOnesValue()) { + AllOne = false; + break; + } + } This test for all-ones can be replaced with: CV->isAllOnesValue() + if (AllOne) Constant::getAllOnesValue(DestPTy); Looks like you are missing the "return" keyword. @@ -694,15 +710,37 @@ if (isa(Cond)) return V1; if (V1 == V2) return V1; + if (Cond->isNullValue()) return V2; You could also check if CondV->isAllOnesValue() here and if so return V1. You could also replace the ConstantInt Cond check at the start of this method with something that checks isNullValue and isAllOnesValue. + + if (ConstantVector* CondV = dyn_cast(Cond)) { + const VectorType *VTy = CondV->getType(); + ConstantVector *CP1 = dyn_cast(V1); + ConstantVector *CP2 = dyn_cast(V2); + + if ((CP1 != NULL || isa(V1)) && + (CP2 != NULL || isa(V2))) { Is it possible for this check to fail? If not, it should be an assertion. + + const Type *EltTy = V1->getType(); + std::vector Res; You know the size that Res will be so you can reserve the right amount of space here. + for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) { + ConstantInt* c = dyn_cast(CondV->getOperand(i)); What if CondV->getOperand(i) is a ConstantExpr and not a ConstantInt? Then you will get null here and crash below doing c->getZExtValue(). + Constant *C1 = CP1 ? CP1->getOperand(i) : Constant::getNullValue(EltTy); + Constant *C2 = CP2 ? CP2->getOperand(i) : Constant::getNullValue(EltTy); + Res.push_back(c->getZExtValue() ? C1 : C2); + } + return ConstantVector::get(Res); + } + } + if (ConstantExpr *TrueVal = dyn_cast(V1)) { if (TrueVal->getOpcode() == Instruction::Select) if (TrueVal->getOperand(0) == Cond) - return ConstantExpr::getSelect(Cond, TrueVal->getOperand(1), V2); + return ConstantExpr::getSelect(Cond, TrueVal->getOperand(1), V2); What's the reason for changing this line? } if (ConstantExpr *FalseVal = dyn_cast(V2)) { if (FalseVal->getOpcode() == Instruction::Select) if (FalseVal->getOperand(0) == Cond) - return ConstantExpr::getSelect(Cond, V1, FalseVal->getOperand(2)); + return ConstantExpr::getSelect(Cond, V1, FalseVal->getOperand(2)); Likewise. Ciao, Duncan. From sabre at nondot.org Wed Feb 9 10:40:56 2011 From: sabre at nondot.org (Chris Lattner) Date: Wed, 09 Feb 2011 16:40:56 -0000 Subject: [llvm-commits] [llvm] r125188 - /llvm/trunk/test/FrontendC++/2003-08-24-Cleanup.cpp Message-ID: <20110209164056.34C732A6C12C@llvm.org> Author: lattner Date: Wed Feb 9 10:40:56 2011 New Revision: 125188 URL: http://llvm.org/viewvc/llvm-project?rev=125188&view=rev Log: remove a broken test, this is matching nounwind on intrinsics, not the old unwind instruction Removed: llvm/trunk/test/FrontendC++/2003-08-24-Cleanup.cpp Removed: llvm/trunk/test/FrontendC++/2003-08-24-Cleanup.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2003-08-24-Cleanup.cpp?rev=125187&view=auto ============================================================================== --- llvm/trunk/test/FrontendC++/2003-08-24-Cleanup.cpp (original) +++ llvm/trunk/test/FrontendC++/2003-08-24-Cleanup.cpp (removed) @@ -1,10 +0,0 @@ -// RUN: %llvmgxx -xc++ %s -S -o - | grep unwind - -struct S { ~S(); }; - -int mightthrow(); - -int test() { - S s; - mightthrow(); -} From sabre at nondot.org Wed Feb 9 10:41:31 2011 From: sabre at nondot.org (Chris Lattner) Date: Wed, 09 Feb 2011 16:41:31 -0000 Subject: [llvm-commits] [llvm] r125189 - /llvm/trunk/test/FrontendC++/ Message-ID: <20110209164131.9F35D2A6C12C@llvm.org> Author: lattner Date: Wed Feb 9 10:41:31 2011 New Revision: 125189 URL: http://llvm.org/viewvc/llvm-project?rev=125189&view=rev Log: remove a small scattering of basically pointless tests. These are all covered by llvm-test, which is what they were reduced from back in 2003. Removed: llvm/trunk/test/FrontendC++/2003-08-20-ExceptionFail.cpp llvm/trunk/test/FrontendC++/2003-08-21-EmptyClass.cpp llvm/trunk/test/FrontendC++/2003-08-27-TypeNamespaces.cpp llvm/trunk/test/FrontendC++/2003-08-28-ForwardType.cpp llvm/trunk/test/FrontendC++/2003-08-28-SaveExprBug.cpp llvm/trunk/test/FrontendC++/2003-08-29-ArgPassingBug.cpp llvm/trunk/test/FrontendC++/2003-08-31-StructLayout.cpp llvm/trunk/test/FrontendC++/2003-09-22-CompositeExprValue.cpp llvm/trunk/test/FrontendC++/2003-09-29-ArgumentNumberMismatch.cpp llvm/trunk/test/FrontendC++/2003-09-30-CommaExprBug.cpp llvm/trunk/test/FrontendC++/2003-09-30-ForIncrementExprBug.cpp llvm/trunk/test/FrontendC++/2003-09-30-ForIncrementExprBug2.cpp llvm/trunk/test/FrontendC++/2003-09-30-NestedFunctionDecl.cpp llvm/trunk/test/FrontendC++/2003-10-17-BoolBitfields.cpp llvm/trunk/test/FrontendC++/2003-10-27-VirtualBaseClassCrash.cpp llvm/trunk/test/FrontendC++/2003-11-04-ArrayConstructors.cpp llvm/trunk/test/FrontendC++/2003-11-04-CatchLabelName.cpp llvm/trunk/test/FrontendC++/2003-11-08-ArrayAddress.cpp llvm/trunk/test/FrontendC++/2003-11-18-EnumArray.cpp Removed: llvm/trunk/test/FrontendC++/2003-08-20-ExceptionFail.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2003-08-20-ExceptionFail.cpp?rev=125188&view=auto ============================================================================== --- llvm/trunk/test/FrontendC++/2003-08-20-ExceptionFail.cpp (original) +++ llvm/trunk/test/FrontendC++/2003-08-20-ExceptionFail.cpp (removed) @@ -1,12 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -void foo(); - -void bar() { - struct local { - ~local() { foo(); } - } local_obj; - - foo(); -} - Removed: llvm/trunk/test/FrontendC++/2003-08-21-EmptyClass.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2003-08-21-EmptyClass.cpp?rev=125188&view=auto ============================================================================== --- llvm/trunk/test/FrontendC++/2003-08-21-EmptyClass.cpp (original) +++ llvm/trunk/test/FrontendC++/2003-08-21-EmptyClass.cpp (removed) @@ -1,9 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -// This tests compilation of EMPTY_CLASS_EXPR's - -struct empty {}; - -void foo(empty) {} - -void bar() { foo(empty()); } Removed: llvm/trunk/test/FrontendC++/2003-08-27-TypeNamespaces.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2003-08-27-TypeNamespaces.cpp?rev=125188&view=auto ============================================================================== --- llvm/trunk/test/FrontendC++/2003-08-27-TypeNamespaces.cpp (original) +++ llvm/trunk/test/FrontendC++/2003-08-27-TypeNamespaces.cpp (removed) @@ -1,16 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - - -namespace foo { - namespace bar { - struct X { X(); }; - - X::X() {} - } -} - - -namespace { - struct Y { Y(); }; - Y::Y() {} -} Removed: llvm/trunk/test/FrontendC++/2003-08-28-ForwardType.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2003-08-28-ForwardType.cpp?rev=125188&view=auto ============================================================================== --- llvm/trunk/test/FrontendC++/2003-08-28-ForwardType.cpp (original) +++ llvm/trunk/test/FrontendC++/2003-08-28-ForwardType.cpp (removed) @@ -1,23 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -// Default placement versions of operator new. -#include - -void* operator new(size_t, void* __p) throw(); - - -template -struct stdio_filebuf -{ stdio_filebuf(); - -}; - -extern stdio_filebuf buf_cout; - -void foo() { - // Create stream buffers for the standard streams and use - // those buffers without destroying and recreating the - // streams. - new (&buf_cout) stdio_filebuf(); - -} Removed: llvm/trunk/test/FrontendC++/2003-08-28-SaveExprBug.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2003-08-28-SaveExprBug.cpp?rev=125188&view=auto ============================================================================== --- llvm/trunk/test/FrontendC++/2003-08-28-SaveExprBug.cpp (original) +++ llvm/trunk/test/FrontendC++/2003-08-28-SaveExprBug.cpp (removed) @@ -1,24 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - - -char* eback(); - -template -struct basic_filebuf { - char *instancevar; - - void callee() { - instancevar += eback() != eback(); - } - - void caller(); -}; - - -template -void basic_filebuf<_CharT>::caller() { - callee(); -} - - -template class basic_filebuf; Removed: llvm/trunk/test/FrontendC++/2003-08-29-ArgPassingBug.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2003-08-29-ArgPassingBug.cpp?rev=125188&view=auto ============================================================================== --- llvm/trunk/test/FrontendC++/2003-08-29-ArgPassingBug.cpp (original) +++ llvm/trunk/test/FrontendC++/2003-08-29-ArgPassingBug.cpp (removed) @@ -1,13 +0,0 @@ - -// RUN: %llvmgcc -xc++ -S -o /dev/null %s |& not grep WARNING - -struct iterator { - iterator(); - iterator(const iterator &I); -}; - -iterator foo(const iterator &I) { return I; } - -void test() { - foo(iterator()); -} Removed: llvm/trunk/test/FrontendC++/2003-08-31-StructLayout.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2003-08-31-StructLayout.cpp?rev=125188&view=auto ============================================================================== --- llvm/trunk/test/FrontendC++/2003-08-31-StructLayout.cpp (original) +++ llvm/trunk/test/FrontendC++/2003-08-31-StructLayout.cpp (removed) @@ -1,16 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -// There is a HOLE in the derived2 object due to not wanting to place the two -// baseclass instances at the same offset! - -struct baseclass {}; - -class derived1 : public baseclass { - void * NodePtr; -}; - -class derived2 : public baseclass { - derived1 current; -}; - -derived2 RI; Removed: llvm/trunk/test/FrontendC++/2003-09-22-CompositeExprValue.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2003-09-22-CompositeExprValue.cpp?rev=125188&view=auto ============================================================================== --- llvm/trunk/test/FrontendC++/2003-09-22-CompositeExprValue.cpp (original) +++ llvm/trunk/test/FrontendC++/2003-09-22-CompositeExprValue.cpp (removed) @@ -1,11 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -struct duration { - duration operator/=(int c) { - return *this; - } -}; - -void a000090() { - duration() /= 1; -} Removed: llvm/trunk/test/FrontendC++/2003-09-29-ArgumentNumberMismatch.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2003-09-29-ArgumentNumberMismatch.cpp?rev=125188&view=auto ============================================================================== --- llvm/trunk/test/FrontendC++/2003-09-29-ArgumentNumberMismatch.cpp (original) +++ llvm/trunk/test/FrontendC++/2003-09-29-ArgumentNumberMismatch.cpp (removed) @@ -1,17 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -// Non-POD classes cannot be passed into a function by component, because their -// dtors must be run. Instead, pass them in by reference. The C++ front-end -// was mistakenly "thinking" that 'foo' took a structure by component. - -struct C { - int A, B; - ~C() {} -}; - -void foo(C b); - -void test(C *P) { - foo(*P); -} - Removed: llvm/trunk/test/FrontendC++/2003-09-30-CommaExprBug.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2003-09-30-CommaExprBug.cpp?rev=125188&view=auto ============================================================================== --- llvm/trunk/test/FrontendC++/2003-09-30-CommaExprBug.cpp (original) +++ llvm/trunk/test/FrontendC++/2003-09-30-CommaExprBug.cpp (removed) @@ -1,10 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -class Empty {}; - -void foo(Empty E); - -void bar() { - foo(Empty()); -} - Removed: llvm/trunk/test/FrontendC++/2003-09-30-ForIncrementExprBug.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2003-09-30-ForIncrementExprBug.cpp?rev=125188&view=auto ============================================================================== --- llvm/trunk/test/FrontendC++/2003-09-30-ForIncrementExprBug.cpp (original) +++ llvm/trunk/test/FrontendC++/2003-09-30-ForIncrementExprBug.cpp (removed) @@ -1,10 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -struct C {}; - -C &foo(); - -void foox() { - for (; ; foo()); -} - Removed: llvm/trunk/test/FrontendC++/2003-09-30-ForIncrementExprBug2.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2003-09-30-ForIncrementExprBug2.cpp?rev=125188&view=auto ============================================================================== --- llvm/trunk/test/FrontendC++/2003-09-30-ForIncrementExprBug2.cpp (original) +++ llvm/trunk/test/FrontendC++/2003-09-30-ForIncrementExprBug2.cpp (removed) @@ -1,12 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -// Test with an opaque type - -struct C; - -C &foo(); - -void foox() { - for (; ; foo()); -} - Removed: llvm/trunk/test/FrontendC++/2003-09-30-NestedFunctionDecl.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2003-09-30-NestedFunctionDecl.cpp?rev=125188&view=auto ============================================================================== --- llvm/trunk/test/FrontendC++/2003-09-30-NestedFunctionDecl.cpp (original) +++ llvm/trunk/test/FrontendC++/2003-09-30-NestedFunctionDecl.cpp (removed) @@ -1,12 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -// The C++ front-end thinks the two foo's are different, the LLVM emitter -// thinks they are the same. The disconnect causes problems. - -void foo() { } - -void bar() { - void foo(); - - foo(); -} Removed: llvm/trunk/test/FrontendC++/2003-10-17-BoolBitfields.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2003-10-17-BoolBitfields.cpp?rev=125188&view=auto ============================================================================== --- llvm/trunk/test/FrontendC++/2003-10-17-BoolBitfields.cpp (original) +++ llvm/trunk/test/FrontendC++/2003-10-17-BoolBitfields.cpp (removed) @@ -1,11 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -struct test { - bool A : 1; - bool B : 1; -}; - -void foo(test *T) { - T->B = true; -} - Removed: llvm/trunk/test/FrontendC++/2003-10-27-VirtualBaseClassCrash.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2003-10-27-VirtualBaseClassCrash.cpp?rev=125188&view=auto ============================================================================== --- llvm/trunk/test/FrontendC++/2003-10-27-VirtualBaseClassCrash.cpp (original) +++ llvm/trunk/test/FrontendC++/2003-10-27-VirtualBaseClassCrash.cpp (removed) @@ -1,17 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - - -template -struct super { - int Y; - void foo(); -}; - -template -struct test : virtual super {}; - -extern test X; - -void foo() { - X.foo(); -} Removed: llvm/trunk/test/FrontendC++/2003-11-04-ArrayConstructors.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2003-11-04-ArrayConstructors.cpp?rev=125188&view=auto ============================================================================== --- llvm/trunk/test/FrontendC++/2003-11-04-ArrayConstructors.cpp (original) +++ llvm/trunk/test/FrontendC++/2003-11-04-ArrayConstructors.cpp (removed) @@ -1,12 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - - -struct Foo { - Foo(int); - ~Foo(); -}; -void foo() { - struct { - Foo name; - } Int[] = { 1 }; -} Removed: llvm/trunk/test/FrontendC++/2003-11-04-CatchLabelName.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2003-11-04-CatchLabelName.cpp?rev=125188&view=auto ============================================================================== --- llvm/trunk/test/FrontendC++/2003-11-04-CatchLabelName.cpp (original) +++ llvm/trunk/test/FrontendC++/2003-11-04-CatchLabelName.cpp (removed) @@ -1,11 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -#include - -void bar(); - -void test() { - try { - bar(); - } catch (std::string) {} -} Removed: llvm/trunk/test/FrontendC++/2003-11-08-ArrayAddress.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2003-11-08-ArrayAddress.cpp?rev=125188&view=auto ============================================================================== --- llvm/trunk/test/FrontendC++/2003-11-08-ArrayAddress.cpp (original) +++ llvm/trunk/test/FrontendC++/2003-11-08-ArrayAddress.cpp (removed) @@ -1,10 +0,0 @@ -// RUN: %llvmgxx -xc++ %s -S -o - | grep getelementptr - -struct foo { - int array[100]; - void *getAddr(unsigned i); -}; - -void *foo::getAddr(unsigned i) { - return &array[i]; -} Removed: llvm/trunk/test/FrontendC++/2003-11-18-EnumArray.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2003-11-18-EnumArray.cpp?rev=125188&view=auto ============================================================================== --- llvm/trunk/test/FrontendC++/2003-11-18-EnumArray.cpp (original) +++ llvm/trunk/test/FrontendC++/2003-11-18-EnumArray.cpp (removed) @@ -1,14 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -enum TchkType { - tchkNum, tchkString, tchkSCN, tchkNone -}; - -struct Operator { - enum TchkType tchk[8]; -}; - -struct Operator opTab[] = { - {{tchkNum, tchkNum, tchkString} } -}; - From sabre at nondot.org Wed Feb 9 10:43:07 2011 From: sabre at nondot.org (Chris Lattner) Date: Wed, 09 Feb 2011 16:43:07 -0000 Subject: [llvm-commits] [llvm] r125190 - in /llvm/trunk: include/llvm/Constants.h lib/VMCore/Constants.cpp Message-ID: <20110209164307.583EC2A6C12C@llvm.org> Author: lattner Date: Wed Feb 9 10:43:07 2011 New Revision: 125190 URL: http://llvm.org/viewvc/llvm-project?rev=125190&view=rev Log: refactor ConstantExpr interfaces a bit around "exactness". Modified: llvm/trunk/include/llvm/Constants.h llvm/trunk/lib/VMCore/Constants.cpp Modified: llvm/trunk/include/llvm/Constants.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Constants.h?rev=125190&r1=125189&r2=125190&view=diff ============================================================================== --- llvm/trunk/include/llvm/Constants.h (original) +++ llvm/trunk/include/llvm/Constants.h Wed Feb 9 10:43:07 2011 @@ -691,8 +691,8 @@ static Constant *getFSub(Constant *C1, Constant *C2); static Constant *getMul(Constant *C1, Constant *C2); static Constant *getFMul(Constant *C1, Constant *C2); - static Constant *getUDiv(Constant *C1, Constant *C2); - static Constant *getSDiv(Constant *C1, Constant *C2); + static Constant *getUDiv(Constant *C1, Constant *C2, bool isExact = false); + static Constant *getSDiv(Constant *C1, Constant *C2, bool isExact = false); static Constant *getFDiv(Constant *C1, Constant *C2); static Constant *getURem(Constant *C1, Constant *C2); static Constant *getSRem(Constant *C1, Constant *C2); @@ -701,8 +701,8 @@ static Constant *getOr(Constant *C1, Constant *C2); static Constant *getXor(Constant *C1, Constant *C2); static Constant *getShl(Constant *C1, Constant *C2); - static Constant *getLShr(Constant *C1, Constant *C2); - static Constant *getAShr(Constant *C1, Constant *C2); + static Constant *getLShr(Constant *C1, Constant *C2, bool isExact = false); + static Constant *getAShr(Constant *C1, Constant *C2, bool isExact = false); static Constant *getTrunc (Constant *C, const Type *Ty); static Constant *getSExt (Constant *C, const Type *Ty); static Constant *getZExt (Constant *C, const Type *Ty); @@ -726,10 +726,18 @@ static Constant *getNUWMul(Constant *C1, Constant *C2); static Constant *getNSWShl(Constant *C1, Constant *C2); static Constant *getNUWShl(Constant *C1, Constant *C2); - static Constant *getExactSDiv(Constant *C1, Constant *C2); - static Constant *getExactUDiv(Constant *C1, Constant *C2); - static Constant *getExactAShr(Constant *C1, Constant *C2); - static Constant *getExactLShr(Constant *C1, Constant *C2); + static Constant *getExactSDiv(Constant *C1, Constant *C2) { + return getSDiv(C1, C2, true); + } + static Constant *getExactUDiv(Constant *C1, Constant *C2) { + return getUDiv(C1, C2, true); + } + static Constant *getExactAShr(Constant *C1, Constant *C2) { + return getAShr(C1, C2, true); + } + static Constant *getExactLShr(Constant *C1, Constant *C2) { + return getLShr(C1, C2, true); + } /// Transparently provide more efficient getOperand methods. DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Constant); Modified: llvm/trunk/lib/VMCore/Constants.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Constants.cpp?rev=125190&r1=125189&r2=125190&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Constants.cpp (original) +++ llvm/trunk/lib/VMCore/Constants.cpp Wed Feb 9 10:43:07 2011 @@ -691,27 +691,6 @@ OverflowingBinaryOperator::NoUnsignedWrap); } -Constant *ConstantExpr::getExactSDiv(Constant *C1, Constant *C2) { - return getTy(C1->getType(), Instruction::SDiv, C1, C2, - PossiblyExactOperator::IsExact); -} - -Constant *ConstantExpr::getExactUDiv(Constant *C1, Constant *C2) { - return getTy(C1->getType(), Instruction::UDiv, C1, C2, - PossiblyExactOperator::IsExact); -} - -Constant *ConstantExpr::getExactAShr(Constant *C1, Constant *C2) { - return getTy(C1->getType(), Instruction::AShr, C1, C2, - PossiblyExactOperator::IsExact); -} - -Constant *ConstantExpr::getExactLShr(Constant *C1, Constant *C2) { - return getTy(C1->getType(), Instruction::LShr, C1, C2, - PossiblyExactOperator::IsExact); -} - - // Utility function for determining if a ConstantExpr is a CastOp or not. This // can't be inline because we don't want to #include Instruction.h into // Constant.h @@ -1890,12 +1869,14 @@ return get(Instruction::FMul, C1, C2); } -Constant *ConstantExpr::getUDiv(Constant *C1, Constant *C2) { - return get(Instruction::UDiv, C1, C2); +Constant *ConstantExpr::getUDiv(Constant *C1, Constant *C2, bool isExact) { + return get(Instruction::UDiv, C1, C2, + isExact ? PossiblyExactOperator::IsExact : 0); } -Constant *ConstantExpr::getSDiv(Constant *C1, Constant *C2) { - return get(Instruction::SDiv, C1, C2); +Constant *ConstantExpr::getSDiv(Constant *C1, Constant *C2, bool isExact) { + return get(Instruction::SDiv, C1, C2, + isExact ? PossiblyExactOperator::IsExact : 0); } Constant *ConstantExpr::getFDiv(Constant *C1, Constant *C2) { @@ -1930,12 +1911,14 @@ return get(Instruction::Shl, C1, C2); } -Constant *ConstantExpr::getLShr(Constant *C1, Constant *C2) { - return get(Instruction::LShr, C1, C2); +Constant *ConstantExpr::getLShr(Constant *C1, Constant *C2, bool isExact) { + return get(Instruction::LShr, C1, C2, + isExact ? PossiblyExactOperator::IsExact : 0); } -Constant *ConstantExpr::getAShr(Constant *C1, Constant *C2) { - return get(Instruction::AShr, C1, C2); +Constant *ConstantExpr::getAShr(Constant *C1, Constant *C2, bool isExact) { + return get(Instruction::AShr, C1, C2, + isExact ? PossiblyExactOperator::IsExact : 0); } // destroyConstant - Remove the constant from the constant table... From sabre at nondot.org Wed Feb 9 10:44:36 2011 From: sabre at nondot.org (Chris Lattner) Date: Wed, 09 Feb 2011 16:44:36 -0000 Subject: [llvm-commits] [llvm] r125191 - in /llvm/trunk/include/llvm/Support: ConstantFolder.h TargetFolder.h Message-ID: <20110209164436.DC2412A6C12C@llvm.org> Author: lattner Date: Wed Feb 9 10:44:36 2011 New Revision: 125191 URL: http://llvm.org/viewvc/llvm-project?rev=125191&view=rev Log: enrich folder interfaces around exactness. Modified: llvm/trunk/include/llvm/Support/ConstantFolder.h llvm/trunk/include/llvm/Support/TargetFolder.h Modified: llvm/trunk/include/llvm/Support/ConstantFolder.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/ConstantFolder.h?rev=125191&r1=125190&r2=125191&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/ConstantFolder.h (original) +++ llvm/trunk/include/llvm/Support/ConstantFolder.h Wed Feb 9 10:44:36 2011 @@ -69,17 +69,13 @@ Constant *CreateFMul(Constant *LHS, Constant *RHS) const { return ConstantExpr::getFMul(LHS, RHS); } - Constant *CreateUDiv(Constant *LHS, Constant *RHS) const { - return ConstantExpr::getUDiv(LHS, RHS); - } - Constant *CreateExactUDiv(Constant *LHS, Constant *RHS) const { - return ConstantExpr::getExactUDiv(LHS, RHS); - } - Constant *CreateSDiv(Constant *LHS, Constant *RHS) const { - return ConstantExpr::getSDiv(LHS, RHS); - } - Constant *CreateExactSDiv(Constant *LHS, Constant *RHS) const { - return ConstantExpr::getExactSDiv(LHS, RHS); + Constant *CreateUDiv(Constant *LHS, Constant *RHS, + bool isExact = false) const { + return ConstantExpr::getUDiv(LHS, RHS, isExact); + } + Constant *CreateSDiv(Constant *LHS, Constant *RHS, + bool isExact = false) const { + return ConstantExpr::getSDiv(LHS, RHS, isExact); } Constant *CreateFDiv(Constant *LHS, Constant *RHS) const { return ConstantExpr::getFDiv(LHS, RHS); @@ -96,11 +92,13 @@ Constant *CreateShl(Constant *LHS, Constant *RHS) const { return ConstantExpr::getShl(LHS, RHS); } - Constant *CreateLShr(Constant *LHS, Constant *RHS) const { - return ConstantExpr::getLShr(LHS, RHS); - } - Constant *CreateAShr(Constant *LHS, Constant *RHS) const { - return ConstantExpr::getAShr(LHS, RHS); + Constant *CreateLShr(Constant *LHS, Constant *RHS, + bool isExact = false) const { + return ConstantExpr::getLShr(LHS, RHS, isExact); + } + Constant *CreateAShr(Constant *LHS, Constant *RHS, + bool isExact = false) const { + return ConstantExpr::getAShr(LHS, RHS, isExact); } Constant *CreateAnd(Constant *LHS, Constant *RHS) const { return ConstantExpr::getAnd(LHS, RHS); Modified: llvm/trunk/include/llvm/Support/TargetFolder.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/TargetFolder.h?rev=125191&r1=125190&r2=125191&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/TargetFolder.h (original) +++ llvm/trunk/include/llvm/Support/TargetFolder.h Wed Feb 9 10:44:36 2011 @@ -82,17 +82,11 @@ Constant *CreateFMul(Constant *LHS, Constant *RHS) const { return Fold(ConstantExpr::getFMul(LHS, RHS)); } - Constant *CreateUDiv(Constant *LHS, Constant *RHS) const { - return Fold(ConstantExpr::getUDiv(LHS, RHS)); + Constant *CreateUDiv(Constant *LHS, Constant *RHS, bool isExact = false)const{ + return Fold(ConstantExpr::getUDiv(LHS, RHS, isExact)); } - Constant *CreateExactUDiv(Constant *LHS, Constant *RHS) const { - return Fold(ConstantExpr::getExactUDiv(LHS, RHS)); - } - Constant *CreateSDiv(Constant *LHS, Constant *RHS) const { - return Fold(ConstantExpr::getSDiv(LHS, RHS)); - } - Constant *CreateExactSDiv(Constant *LHS, Constant *RHS) const { - return Fold(ConstantExpr::getExactSDiv(LHS, RHS)); + Constant *CreateSDiv(Constant *LHS, Constant *RHS, bool isExact = false)const{ + return Fold(ConstantExpr::getSDiv(LHS, RHS, isExact)); } Constant *CreateFDiv(Constant *LHS, Constant *RHS) const { return Fold(ConstantExpr::getFDiv(LHS, RHS)); @@ -109,11 +103,11 @@ Constant *CreateShl(Constant *LHS, Constant *RHS) const { return Fold(ConstantExpr::getShl(LHS, RHS)); } - Constant *CreateLShr(Constant *LHS, Constant *RHS) const { - return Fold(ConstantExpr::getLShr(LHS, RHS)); + Constant *CreateLShr(Constant *LHS, Constant *RHS, bool isExact = false)const{ + return Fold(ConstantExpr::getLShr(LHS, RHS, isExact)); } - Constant *CreateAShr(Constant *LHS, Constant *RHS) const { - return Fold(ConstantExpr::getAShr(LHS, RHS)); + Constant *CreateAShr(Constant *LHS, Constant *RHS, bool isExact = false)const{ + return Fold(ConstantExpr::getAShr(LHS, RHS, isExact)); } Constant *CreateAnd(Constant *LHS, Constant *RHS) const { return Fold(ConstantExpr::getAnd(LHS, RHS)); From sabre at nondot.org Wed Feb 9 10:44:44 2011 From: sabre at nondot.org (Chris Lattner) Date: Wed, 09 Feb 2011 16:44:44 -0000 Subject: [llvm-commits] [llvm] r125192 - /llvm/trunk/docs/LangRef.html Message-ID: <20110209164445.057672A6C12C@llvm.org> Author: lattner Date: Wed Feb 9 10:44:44 2011 New Revision: 125192 URL: http://llvm.org/viewvc/llvm-project?rev=125192&view=rev Log: fix typo Modified: llvm/trunk/docs/LangRef.html Modified: llvm/trunk/docs/LangRef.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/LangRef.html?rev=125192&r1=125191&r2=125192&view=diff ============================================================================== --- llvm/trunk/docs/LangRef.html (original) +++ llvm/trunk/docs/LangRef.html Wed Feb 9 10:44:44 2011 @@ -3709,7 +3709,7 @@

      If the nuw keyword is present, then the shift produces a trap value if it shifts out any non-zero bits. If - the nsw keywrod is present, then the shift produces a + the nsw keyword is present, then the shift produces a trap value if it shifts out any bits that disagree with the resultant sign bit. As such, NUW/NSW have the same semantics as they would if the shift were expressed as a mul instruction with the same From sabre at nondot.org Wed Feb 9 10:46:03 2011 From: sabre at nondot.org (Chris Lattner) Date: Wed, 09 Feb 2011 16:46:03 -0000 Subject: [llvm-commits] [llvm] r125193 - /llvm/trunk/utils/FileCheck/FileCheck.cpp Message-ID: <20110209164603.1C3922A6C12C@llvm.org> Author: lattner Date: Wed Feb 9 10:46:02 2011 New Revision: 125193 URL: http://llvm.org/viewvc/llvm-project?rev=125193&view=rev Log: emit a specific error when the input file is empty. This fixes an annoyance of mine when working on tests: if the input .ll file is broken, opt outputs an error and generates an empty file. FileCheck then emits its "ooh I couldn't find the first CHECK line, scanning from ..." which obfuscates the actual problem. Modified: llvm/trunk/utils/FileCheck/FileCheck.cpp Modified: llvm/trunk/utils/FileCheck/FileCheck.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/FileCheck/FileCheck.cpp?rev=125193&r1=125192&r2=125193&view=diff ============================================================================== --- llvm/trunk/utils/FileCheck/FileCheck.cpp (original) +++ llvm/trunk/utils/FileCheck/FileCheck.cpp Wed Feb 9 10:46:02 2011 @@ -659,6 +659,11 @@ } MemoryBuffer *F = File.take(); + if (F->getBufferSize() == 0) { + errs() << "FileCheck error: '" << InputFilename << "' is empty.\n"; + return 1; + } + // Remove duplicate spaces in the input file if requested. if (!NoCanonicalizeWhiteSpace) F = CanonicalizeInputFile(F); From sabre at nondot.org Wed Feb 9 11:00:45 2011 From: sabre at nondot.org (Chris Lattner) Date: Wed, 09 Feb 2011 17:00:45 -0000 Subject: [llvm-commits] [llvm] r125194 - in /llvm/trunk: include/llvm/InstrTypes.h include/llvm/Support/IRBuilder.h include/llvm/Support/PatternMatch.h lib/Analysis/InstructionSimplify.cpp lib/Transforms/InstCombine/InstCombineAndOrXor.cpp Message-ID: <20110209170045.D17E12A6C12C@llvm.org> Author: lattner Date: Wed Feb 9 11:00:45 2011 New Revision: 125194 URL: http://llvm.org/viewvc/llvm-project?rev=125194&view=rev Log: Rework InstrTypes.h so to reduce the repetition around the NSW/NUW/Exact versions of creation functions. Eventually, the "insertion point" versions of these should just be removed, we do have IRBuilder afterall. Do a massive rewrite of much of pattern match. It is now shorter and less redundant and has several other widgets I will be using in other patches. Among other changes, m_Div is renamed to m_IDiv (since it only matches integer divides) and m_Shift is gone (it used to match all binops!!) and we now have m_LogicalShift for the one client to use. Enhance IRBuilder to have "isExact" arguments to things like CreateUDiv and reduce redundancy within IRbuilder by having these methods chain to each other more instead of duplicating code. Modified: llvm/trunk/include/llvm/InstrTypes.h llvm/trunk/include/llvm/Support/IRBuilder.h llvm/trunk/include/llvm/Support/PatternMatch.h llvm/trunk/lib/Analysis/InstructionSimplify.cpp llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp Modified: llvm/trunk/include/llvm/InstrTypes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/InstrTypes.h?rev=125194&r1=125193&r2=125194&view=diff ============================================================================== --- llvm/trunk/include/llvm/InstrTypes.h (original) +++ llvm/trunk/include/llvm/InstrTypes.h Wed Feb 9 11:00:45 2011 @@ -194,175 +194,93 @@ } #include "llvm/Instruction.def" - - /// CreateNSWAdd - Create an Add operator with the NSW flag set. - /// - static BinaryOperator *CreateNSWAdd(Value *V1, Value *V2, - const Twine &Name = "") { - BinaryOperator *BO = CreateAdd(V1, V2, Name); + static BinaryOperator *CreateNSW(BinaryOps Opc, Value *V1, Value *V2, + const Twine &Name = "") { + BinaryOperator *BO = Create(Opc, V1, V2, Name); BO->setHasNoSignedWrap(true); return BO; } - static BinaryOperator *CreateNSWAdd(Value *V1, Value *V2, - const Twine &Name, BasicBlock *BB) { - BinaryOperator *BO = CreateAdd(V1, V2, Name, BB); + static BinaryOperator *CreateNSW(BinaryOps Opc, Value *V1, Value *V2, + const Twine &Name, BasicBlock *BB) { + BinaryOperator *BO = Create(Opc, V1, V2, Name, BB); BO->setHasNoSignedWrap(true); return BO; } - static BinaryOperator *CreateNSWAdd(Value *V1, Value *V2, - const Twine &Name, Instruction *I) { - BinaryOperator *BO = CreateAdd(V1, V2, Name, I); + static BinaryOperator *CreateNSW(BinaryOps Opc, Value *V1, Value *V2, + const Twine &Name, Instruction *I) { + BinaryOperator *BO = Create(Opc, V1, V2, Name, I); BO->setHasNoSignedWrap(true); return BO; } - - /// CreateNUWAdd - Create an Add operator with the NUW flag set. - /// - static BinaryOperator *CreateNUWAdd(Value *V1, Value *V2, - const Twine &Name = "") { - BinaryOperator *BO = CreateAdd(V1, V2, Name); - BO->setHasNoUnsignedWrap(true); - return BO; - } - static BinaryOperator *CreateNUWAdd(Value *V1, Value *V2, - const Twine &Name, BasicBlock *BB) { - BinaryOperator *BO = CreateAdd(V1, V2, Name, BB); - BO->setHasNoUnsignedWrap(true); - return BO; - } - static BinaryOperator *CreateNUWAdd(Value *V1, Value *V2, - const Twine &Name, Instruction *I) { - BinaryOperator *BO = CreateAdd(V1, V2, Name, I); - BO->setHasNoUnsignedWrap(true); - return BO; - } - - /// CreateNSWSub - Create an Sub operator with the NSW flag set. - /// - static BinaryOperator *CreateNSWSub(Value *V1, Value *V2, - const Twine &Name = "") { - BinaryOperator *BO = CreateSub(V1, V2, Name); - BO->setHasNoSignedWrap(true); - return BO; - } - static BinaryOperator *CreateNSWSub(Value *V1, Value *V2, - const Twine &Name, BasicBlock *BB) { - BinaryOperator *BO = CreateSub(V1, V2, Name, BB); - BO->setHasNoSignedWrap(true); - return BO; - } - static BinaryOperator *CreateNSWSub(Value *V1, Value *V2, - const Twine &Name, Instruction *I) { - BinaryOperator *BO = CreateSub(V1, V2, Name, I); - BO->setHasNoSignedWrap(true); - return BO; - } - - /// CreateNUWSub - Create an Sub operator with the NUW flag set. - /// - static BinaryOperator *CreateNUWSub(Value *V1, Value *V2, - const Twine &Name = "") { - BinaryOperator *BO = CreateSub(V1, V2, Name); - BO->setHasNoUnsignedWrap(true); - return BO; - } - static BinaryOperator *CreateNUWSub(Value *V1, Value *V2, - const Twine &Name, BasicBlock *BB) { - BinaryOperator *BO = CreateSub(V1, V2, Name, BB); - BO->setHasNoUnsignedWrap(true); - return BO; - } - static BinaryOperator *CreateNUWSub(Value *V1, Value *V2, - const Twine &Name, Instruction *I) { - BinaryOperator *BO = CreateSub(V1, V2, Name, I); - BO->setHasNoUnsignedWrap(true); - return BO; - } - - /// CreateNSWMul - Create a Mul operator with the NSW flag set. - /// - static BinaryOperator *CreateNSWMul(Value *V1, Value *V2, - const Twine &Name = "") { - BinaryOperator *BO = CreateMul(V1, V2, Name); - BO->setHasNoSignedWrap(true); - return BO; - } - static BinaryOperator *CreateNSWMul(Value *V1, Value *V2, - const Twine &Name, BasicBlock *BB) { - BinaryOperator *BO = CreateMul(V1, V2, Name, BB); - BO->setHasNoSignedWrap(true); - return BO; - } - static BinaryOperator *CreateNSWMul(Value *V1, Value *V2, - const Twine &Name, Instruction *I) { - BinaryOperator *BO = CreateMul(V1, V2, Name, I); - BO->setHasNoSignedWrap(true); - return BO; - } - - /// CreateNUWMul - Create a Mul operator with the NUW flag set. - /// - static BinaryOperator *CreateNUWMul(Value *V1, Value *V2, - const Twine &Name = "") { - BinaryOperator *BO = CreateMul(V1, V2, Name); + + static BinaryOperator *CreateNUW(BinaryOps Opc, Value *V1, Value *V2, + const Twine &Name = "") { + BinaryOperator *BO = Create(Opc, V1, V2, Name); BO->setHasNoUnsignedWrap(true); return BO; } - static BinaryOperator *CreateNUWMul(Value *V1, Value *V2, - const Twine &Name, BasicBlock *BB) { - BinaryOperator *BO = CreateMul(V1, V2, Name, BB); + static BinaryOperator *CreateNUW(BinaryOps Opc, Value *V1, Value *V2, + const Twine &Name, BasicBlock *BB) { + BinaryOperator *BO = Create(Opc, V1, V2, Name, BB); BO->setHasNoUnsignedWrap(true); return BO; } - static BinaryOperator *CreateNUWMul(Value *V1, Value *V2, - const Twine &Name, Instruction *I) { - BinaryOperator *BO = CreateMul(V1, V2, Name, I); + static BinaryOperator *CreateNUW(BinaryOps Opc, Value *V1, Value *V2, + const Twine &Name, Instruction *I) { + BinaryOperator *BO = Create(Opc, V1, V2, Name, I); BO->setHasNoUnsignedWrap(true); return BO; } - - /// CreateExactUDiv - Create a UDiv operator with the exact flag set. - /// - static BinaryOperator *CreateExactUDiv(Value *V1, Value *V2, - const Twine &Name = "") { - BinaryOperator *BO = CreateUDiv(V1, V2, Name); - BO->setIsExact(true); - return BO; - } - static BinaryOperator *CreateExactUDiv(Value *V1, Value *V2, - const Twine &Name, BasicBlock *BB) { - BinaryOperator *BO = CreateUDiv(V1, V2, Name, BB); - BO->setIsExact(true); - return BO; - } - static BinaryOperator *CreateExactUDiv(Value *V1, Value *V2, - const Twine &Name, Instruction *I) { - BinaryOperator *BO = CreateUDiv(V1, V2, Name, I); + + static BinaryOperator *CreateExact(BinaryOps Opc, Value *V1, Value *V2, + const Twine &Name = "") { + BinaryOperator *BO = Create(Opc, V1, V2, Name); BO->setIsExact(true); return BO; } - - /// CreateExactSDiv - Create an SDiv operator with the exact flag set. - /// - static BinaryOperator *CreateExactSDiv(Value *V1, Value *V2, - const Twine &Name = "") { - BinaryOperator *BO = CreateSDiv(V1, V2, Name); + static BinaryOperator *CreateExact(BinaryOps Opc, Value *V1, Value *V2, + const Twine &Name, BasicBlock *BB) { + BinaryOperator *BO = Create(Opc, V1, V2, Name, BB); BO->setIsExact(true); return BO; } - static BinaryOperator *CreateExactSDiv(Value *V1, Value *V2, - const Twine &Name, BasicBlock *BB) { - BinaryOperator *BO = CreateSDiv(V1, V2, Name, BB); + static BinaryOperator *CreateExact(BinaryOps Opc, Value *V1, Value *V2, + const Twine &Name, Instruction *I) { + BinaryOperator *BO = Create(Opc, V1, V2, Name, I); BO->setIsExact(true); return BO; } - static BinaryOperator *CreateExactSDiv(Value *V1, Value *V2, - const Twine &Name, Instruction *I) { - BinaryOperator *BO = CreateSDiv(V1, V2, Name, I); - BO->setIsExact(true); - return BO; + +#define DEFINE_HELPERS(OPC, NUWNSWEXACT) \ + static BinaryOperator *Create ## NUWNSWEXACT ## OPC \ + (Value *V1, Value *V2, const Twine &Name = "") { \ + return Create ## NUWNSWEXACT(Instruction::OPC, V1, V2, Name); \ + } \ + static BinaryOperator *Create ## NUWNSWEXACT ## OPC \ + (Value *V1, Value *V2, const Twine &Name, BasicBlock *BB) { \ + return Create ## NUWNSWEXACT(Instruction::OPC, V1, V2, Name, BB); \ + } \ + static BinaryOperator *Create ## NUWNSWEXACT ## OPC \ + (Value *V1, Value *V2, const Twine &Name, Instruction *I) { \ + return Create ## NUWNSWEXACT(Instruction::OPC, V1, V2, Name, I); \ } + DEFINE_HELPERS(Add, NSW) // CreateNSWAdd + DEFINE_HELPERS(Add, NUW) // CreateNUWAdd + DEFINE_HELPERS(Sub, NSW) // CreateNSWSub + DEFINE_HELPERS(Sub, NUW) // CreateNUWSub + DEFINE_HELPERS(Mul, NSW) // CreateNSWMul + DEFINE_HELPERS(Mul, NUW) // CreateNUWMul + DEFINE_HELPERS(Shl, NSW) // CreateNSWShl + DEFINE_HELPERS(Shl, NUW) // CreateNUWShl + + DEFINE_HELPERS(SDiv, Exact) // CreateExactSDiv + DEFINE_HELPERS(UDiv, Exact) // CreateExactUDiv + DEFINE_HELPERS(AShr, Exact) // CreateExactAShr + DEFINE_HELPERS(LShr, Exact) // CreateExactLShr + +#undef DEFINE_HELPERS + /// Helper functions to construct and inspect unary operations (NEG and NOT) /// via binary operators SUB and XOR: /// Modified: llvm/trunk/include/llvm/Support/IRBuilder.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/IRBuilder.h?rev=125194&r1=125193&r2=125194&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/IRBuilder.h (original) +++ llvm/trunk/include/llvm/Support/IRBuilder.h Wed Feb 9 11:00:45 2011 @@ -521,29 +521,29 @@ return Insert(Folder.CreateFMul(LC, RC), Name); return Insert(BinaryOperator::CreateFMul(LHS, RHS), Name); } - Value *CreateUDiv(Value *LHS, Value *RHS, const Twine &Name = "") { + Value *CreateUDiv(Value *LHS, Value *RHS, const Twine &Name = "", + bool isExact = false) { if (Constant *LC = dyn_cast(LHS)) if (Constant *RC = dyn_cast(RHS)) - return Insert(Folder.CreateUDiv(LC, RC), Name); - return Insert(BinaryOperator::CreateUDiv(LHS, RHS), Name); + return Insert(Folder.CreateUDiv(LC, RC, isExact), Name); + if (!isExact) + return Insert(BinaryOperator::CreateUDiv(LHS, RHS), Name); + return Insert(BinaryOperator::CreateExactUDiv(LHS, RHS), Name); } Value *CreateExactUDiv(Value *LHS, Value *RHS, const Twine &Name = "") { - if (Constant *LC = dyn_cast(LHS)) - if (Constant *RC = dyn_cast(RHS)) - return Insert(Folder.CreateExactUDiv(LC, RC), Name); - return Insert(BinaryOperator::CreateExactUDiv(LHS, RHS), Name); + return CreateUDiv(LHS, RHS, Name, true); } - Value *CreateSDiv(Value *LHS, Value *RHS, const Twine &Name = "") { + Value *CreateSDiv(Value *LHS, Value *RHS, const Twine &Name = "", + bool isExact = false) { if (Constant *LC = dyn_cast(LHS)) if (Constant *RC = dyn_cast(RHS)) - return Insert(Folder.CreateSDiv(LC, RC), Name); - return Insert(BinaryOperator::CreateSDiv(LHS, RHS), Name); + return Insert(Folder.CreateSDiv(LC, RC, isExact), Name); + if (!isExact) + return Insert(BinaryOperator::CreateSDiv(LHS, RHS), Name); + return Insert(BinaryOperator::CreateExactSDiv(LHS, RHS), Name); } Value *CreateExactSDiv(Value *LHS, Value *RHS, const Twine &Name = "") { - if (Constant *LC = dyn_cast(LHS)) - if (Constant *RC = dyn_cast(RHS)) - return Insert(Folder.CreateExactSDiv(LC, RC), Name); - return Insert(BinaryOperator::CreateExactSDiv(LHS, RHS), Name); + return CreateSDiv(LHS, RHS, Name, true); } Value *CreateFDiv(Value *LHS, Value *RHS, const Twine &Name = "") { if (Constant *LC = dyn_cast(LHS)) @@ -577,54 +577,46 @@ return Insert(BinaryOperator::CreateShl(LHS, RHS), Name); } Value *CreateShl(Value *LHS, const APInt &RHS, const Twine &Name = "") { - Constant *RHSC = ConstantInt::get(LHS->getType(), RHS); - if (Constant *LC = dyn_cast(LHS)) - return Insert(Folder.CreateShl(LC, RHSC), Name); - return Insert(BinaryOperator::CreateShl(LHS, RHSC), Name); + return CreateShl(LHS, ConstantInt::get(LHS->getType(), RHS), Name); } Value *CreateShl(Value *LHS, uint64_t RHS, const Twine &Name = "") { - Constant *RHSC = ConstantInt::get(LHS->getType(), RHS); - if (Constant *LC = dyn_cast(LHS)) - return Insert(Folder.CreateShl(LC, RHSC), Name); - return Insert(BinaryOperator::CreateShl(LHS, RHSC), Name); + return CreateShl(LHS, ConstantInt::get(LHS->getType(), RHS), Name); } - Value *CreateLShr(Value *LHS, Value *RHS, const Twine &Name = "") { + Value *CreateLShr(Value *LHS, Value *RHS, const Twine &Name = "", + bool isExact = false) { if (Constant *LC = dyn_cast(LHS)) if (Constant *RC = dyn_cast(RHS)) - return Insert(Folder.CreateLShr(LC, RC), Name); - return Insert(BinaryOperator::CreateLShr(LHS, RHS), Name); + return Insert(Folder.CreateLShr(LC, RC, isExact), Name); + if (!isExact) + return Insert(BinaryOperator::CreateLShr(LHS, RHS), Name); + return Insert(BinaryOperator::CreateExactLShr(LHS, RHS), Name); } - Value *CreateLShr(Value *LHS, const APInt &RHS, const Twine &Name = "") { - Constant *RHSC = ConstantInt::get(LHS->getType(), RHS); - if (Constant *LC = dyn_cast(LHS)) - return Insert(Folder.CreateLShr(LC, RHSC), Name); - return Insert(BinaryOperator::CreateLShr(LHS, RHSC), Name); + Value *CreateLShr(Value *LHS, const APInt &RHS, const Twine &Name = "", + bool isExact = false) { + return CreateLShr(LHS, ConstantInt::get(LHS->getType(), RHS), Name,isExact); } - Value *CreateLShr(Value *LHS, uint64_t RHS, const Twine &Name = "") { - Constant *RHSC = ConstantInt::get(LHS->getType(), RHS); - if (Constant *LC = dyn_cast(LHS)) - return Insert(Folder.CreateLShr(LC, RHSC), Name); - return Insert(BinaryOperator::CreateLShr(LHS, RHSC), Name); + Value *CreateLShr(Value *LHS, uint64_t RHS, const Twine &Name = "", + bool isExact = false) { + return CreateLShr(LHS, ConstantInt::get(LHS->getType(), RHS), Name,isExact); } - Value *CreateAShr(Value *LHS, Value *RHS, const Twine &Name = "") { + Value *CreateAShr(Value *LHS, Value *RHS, const Twine &Name = "", + bool isExact = false) { if (Constant *LC = dyn_cast(LHS)) if (Constant *RC = dyn_cast(RHS)) - return Insert(Folder.CreateAShr(LC, RC), Name); - return Insert(BinaryOperator::CreateAShr(LHS, RHS), Name); + return Insert(Folder.CreateAShr(LC, RC, isExact), Name); + if (!isExact) + return Insert(BinaryOperator::CreateAShr(LHS, RHS), Name); + return Insert(BinaryOperator::CreateExactAShr(LHS, RHS), Name); } - Value *CreateAShr(Value *LHS, const APInt &RHS, const Twine &Name = "") { - Constant *RHSC = ConstantInt::get(LHS->getType(), RHS); - if (Constant *LC = dyn_cast(LHS)) - return Insert(Folder.CreateAShr(LC, RHSC), Name); - return Insert(BinaryOperator::CreateAShr(LHS, RHSC), Name); + Value *CreateAShr(Value *LHS, const APInt &RHS, const Twine &Name = "", + bool isExact = false) { + return CreateAShr(LHS, ConstantInt::get(LHS->getType(), RHS), Name,isExact); } - Value *CreateAShr(Value *LHS, uint64_t RHS, const Twine &Name = "") { - Constant *RHSC = ConstantInt::get(LHS->getType(), RHS); - if (Constant *LC = dyn_cast(LHS)) - return Insert(Folder.CreateAShr(LC, RHSC), Name); - return Insert(BinaryOperator::CreateAShr(LHS, RHSC), Name); + Value *CreateAShr(Value *LHS, uint64_t RHS, const Twine &Name = "", + bool isExact = false) { + return CreateAShr(LHS, ConstantInt::get(LHS->getType(), RHS), Name,isExact); } Value *CreateAnd(Value *LHS, Value *RHS, const Twine &Name = "") { @@ -637,16 +629,10 @@ return Insert(BinaryOperator::CreateAnd(LHS, RHS), Name); } Value *CreateAnd(Value *LHS, const APInt &RHS, const Twine &Name = "") { - Constant *RHSC = ConstantInt::get(LHS->getType(), RHS); - if (Constant *LC = dyn_cast(LHS)) - return Insert(Folder.CreateAnd(LC, RHSC), Name); - return Insert(BinaryOperator::CreateAnd(LHS, RHSC), Name); + return CreateAnd(LHS, ConstantInt::get(LHS->getType(), RHS), Name); } Value *CreateAnd(Value *LHS, uint64_t RHS, const Twine &Name = "") { - Constant *RHSC = ConstantInt::get(LHS->getType(), RHS); - if (Constant *LC = dyn_cast(LHS)) - return Insert(Folder.CreateAnd(LC, RHSC), Name); - return Insert(BinaryOperator::CreateAnd(LHS, RHSC), Name); + return CreateAnd(LHS, ConstantInt::get(LHS->getType(), RHS), Name); } Value *CreateOr(Value *LHS, Value *RHS, const Twine &Name = "") { @@ -659,16 +645,10 @@ return Insert(BinaryOperator::CreateOr(LHS, RHS), Name); } Value *CreateOr(Value *LHS, const APInt &RHS, const Twine &Name = "") { - Constant *RHSC = ConstantInt::get(LHS->getType(), RHS); - if (Constant *LC = dyn_cast(LHS)) - return Insert(Folder.CreateOr(LC, RHSC), Name); - return Insert(BinaryOperator::CreateOr(LHS, RHSC), Name); + return CreateOr(LHS, ConstantInt::get(LHS->getType(), RHS), Name); } Value *CreateOr(Value *LHS, uint64_t RHS, const Twine &Name = "") { - Constant *RHSC = ConstantInt::get(LHS->getType(), RHS); - if (Constant *LC = dyn_cast(LHS)) - return Insert(Folder.CreateOr(LC, RHSC), Name); - return Insert(BinaryOperator::CreateOr(LHS, RHSC), Name); + return CreateOr(LHS, ConstantInt::get(LHS->getType(), RHS), Name); } Value *CreateXor(Value *LHS, Value *RHS, const Twine &Name = "") { @@ -678,16 +658,10 @@ return Insert(BinaryOperator::CreateXor(LHS, RHS), Name); } Value *CreateXor(Value *LHS, const APInt &RHS, const Twine &Name = "") { - Constant *RHSC = ConstantInt::get(LHS->getType(), RHS); - if (Constant *LC = dyn_cast(LHS)) - return Insert(Folder.CreateXor(LC, RHSC), Name); - return Insert(BinaryOperator::CreateXor(LHS, RHSC), Name); + return CreateXor(LHS, ConstantInt::get(LHS->getType(), RHS), Name); } Value *CreateXor(Value *LHS, uint64_t RHS, const Twine &Name = "") { - Constant *RHSC = ConstantInt::get(LHS->getType(), RHS); - if (Constant *LC = dyn_cast(LHS)) - return Insert(Folder.CreateXor(LC, RHSC), Name); - return Insert(BinaryOperator::CreateXor(LHS, RHSC), Name); + return CreateXor(LHS, ConstantInt::get(LHS->getType(), RHS), Name); } Value *CreateBinOp(Instruction::BinaryOps Opc, Modified: llvm/trunk/include/llvm/Support/PatternMatch.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/PatternMatch.h?rev=125194&r1=125193&r2=125194&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/PatternMatch.h (original) +++ llvm/trunk/include/llvm/Support/PatternMatch.h Wed Feb 9 11:00:45 2011 @@ -41,18 +41,61 @@ } template -struct leaf_ty { +struct class_match { template bool match(ITy *V) { return isa(V); } }; /// m_Value() - Match an arbitrary value and ignore it. -inline leaf_ty m_Value() { return leaf_ty(); } +inline class_match m_Value() { return class_match(); } /// m_ConstantInt() - Match an arbitrary ConstantInt and ignore it. -inline leaf_ty m_ConstantInt() { return leaf_ty(); } +inline class_match m_ConstantInt() { + return class_match(); +} +/// m_Undef() - Match an arbitrary undef constant. +inline class_match m_Undef() { return class_match(); } +inline class_match m_Constant() { return class_match(); } + +struct match_zero { + template + bool match(ITy *V) { + if (const Constant *C = dyn_cast(V)) + return C->isNullValue(); + return false; + } +}; + +/// m_Zero() - Match an arbitrary zero/null constant. This includes +/// zero_initializer for vectors and ConstantPointerNull for pointers. +inline match_zero m_Zero() { return match_zero(); } + + +struct apint_match { + const APInt *&Res; + apint_match(const APInt *&R) : Res(R) {} + template + bool match(ITy *V) { + if (ConstantInt *CI = dyn_cast(V)) { + Res = &CI->getValue(); + return true; + } + if (ConstantVector *CV = dyn_cast(V)) + if (ConstantInt *CI = cast_or_null(CV->getSplatValue())) { + Res = &CI->getValue(); + return true; + } + return false; + } +}; + +/// m_APInt - Match a ConstantInt or splatted ConstantVector, binding the +/// specified pointer to the contained APInt. +inline apint_match m_APInt(const APInt *&Res) { return Res; } + + template -struct constantint_ty { +struct constantint_match { template bool match(ITy *V) { if (const ConstantInt *CI = dyn_cast(V)) { @@ -68,79 +111,82 @@ } }; -/// m_ConstantInt(int64_t) - Match a ConstantInt with a specific value -/// and ignore it. +/// m_ConstantInt - Match a ConstantInt with a specific value. template -inline constantint_ty m_ConstantInt() { - return constantint_ty(); +inline constantint_match m_ConstantInt() { + return constantint_match(); } -struct undef_ty { - template - bool match(ITy *V) { - return isa(V); - } -}; - -/// m_Undef() - Match an arbitrary undef constant. -inline undef_ty m_Undef() { return undef_ty(); } - -struct zero_ty { +/// cst_pred_ty - This helper class is used to match scalar and vector constants +/// that satisfy a specified predicate. +template +struct cst_pred_ty : public Predicate { template bool match(ITy *V) { - if (const Constant *C = dyn_cast(V)) - return C->isNullValue(); + if (const ConstantInt *CI = dyn_cast(V)) + return this->isValue(CI->getValue()); + if (const ConstantVector *CV = dyn_cast(V)) + if (ConstantInt *CI = cast_or_null(CV->getSplatValue())) + return this->isValue(CI->getValue()); return false; } }; - -/// m_Zero() - Match an arbitrary zero/null constant. -inline zero_ty m_Zero() { return zero_ty(); } - -struct one_ty { + +/// api_pred_ty - This helper class is used to match scalar and vector constants +/// that satisfy a specified predicate, and bind them to an APInt. +template +struct api_pred_ty : public Predicate { + const APInt *&Res; + api_pred_ty(const APInt *&R) : Res(R) {} template bool match(ITy *V) { if (const ConstantInt *CI = dyn_cast(V)) - return CI->isOne(); + if (this->isValue(CI->getValue())) { + Res = &CI->getValue(); + return true; + } if (const ConstantVector *CV = dyn_cast(V)) if (ConstantInt *CI = cast_or_null(CV->getSplatValue())) - return CI->isOne(); + if (this->isValue(CI->getValue())) { + Res = &CI->getValue(); + return true; + } return false; } }; - -/// m_One() - Match an integer 1 or a vector with all elements equal to 1. -inline one_ty m_One() { return one_ty(); } -struct all_ones_ty { - template - bool match(ITy *V) { - if (const ConstantInt *C = dyn_cast(V)) - return C->isAllOnesValue(); - if (const ConstantVector *C = dyn_cast(V)) - return C->isAllOnesValue(); - return false; - } + +struct is_one { + bool isValue(const APInt &C) { return C == 1; } }; +/// m_One() - Match an integer 1 or a vector with all elements equal to 1. +inline cst_pred_ty m_One() { return cst_pred_ty(); } +inline api_pred_ty m_One(const APInt *&V) { return V; } + +struct is_all_ones { + bool isValue(const APInt &C) { return C.isAllOnesValue(); } +}; + /// m_AllOnes() - Match an integer or vector with all bits set to true. -inline all_ones_ty m_AllOnes() { return all_ones_ty(); } +inline cst_pred_ty m_AllOnes() {return cst_pred_ty();} +inline api_pred_ty m_AllOnes(const APInt *&V) { return V; } -struct signbit_ty { - template - bool match(ITy *V) { - if (const ConstantInt *CI = dyn_cast(V)) - return CI->getValue().isSignBit(); - if (const ConstantVector *CV = dyn_cast(V)) - if (ConstantInt *CI = cast_or_null(CV->getSplatValue())) - return CI->getValue().isSignBit(); - return false; - } +struct is_sign_bit { + bool isValue(const APInt &C) { return C.isSignBit(); } }; /// m_SignBit() - Match an integer or vector with only the sign bit(s) set. -inline signbit_ty m_SignBit() { return signbit_ty(); } +inline cst_pred_ty m_SignBit() {return cst_pred_ty();} +inline api_pred_ty m_SignBit(const APInt *&V) { return V; } +struct is_power2 { + bool isValue(const APInt &C) { return C.isPowerOf2(); } +}; + +/// m_Power2() - Match an integer or vector power of 2. +inline cst_pred_ty m_Power2() { return cst_pred_ty(); } +inline api_pred_ty m_Power2(const APInt *&V) { return V; } template struct bind_ty { @@ -163,6 +209,9 @@ /// m_ConstantInt - Match a ConstantInt, capturing the value if we match. inline bind_ty m_ConstantInt(ConstantInt *&CI) { return CI; } +/// m_Constant - Match a Constant, capturing the value if we match. +inline bind_ty m_Constant(Constant *&C) { return C; } + /// specificval_ty - Match a specified Value*. struct specificval_ty { const Value *Val; @@ -182,8 +231,7 @@ // Matchers for specific binary operators. // -template +template struct BinaryOp_match { LHS_t L; RHS_t R; @@ -193,9 +241,8 @@ template bool match(OpTy *V) { if (V->getValueID() == Value::InstructionVal + Opcode) { - ConcreteTy *I = cast(V); - return I->getOpcode() == Opcode && L.match(I->getOperand(0)) && - R.match(I->getOperand(1)); + BinaryOperator *I = cast(V); + return L.match(I->getOperand(0)) && R.match(I->getOperand(1)); } if (ConstantExpr *CE = dyn_cast(V)) return CE->getOpcode() == Opcode && L.match(CE->getOperand(0)) && @@ -205,227 +252,156 @@ }; template -inline BinaryOp_match m_Add(const LHS &L, - const RHS &R) { +inline BinaryOp_match +m_Add(const LHS &L, const RHS &R) { return BinaryOp_match(L, R); } template -inline BinaryOp_match m_FAdd(const LHS &L, - const RHS &R) { +inline BinaryOp_match +m_FAdd(const LHS &L, const RHS &R) { return BinaryOp_match(L, R); } template -inline BinaryOp_match m_Sub(const LHS &L, - const RHS &R) { +inline BinaryOp_match +m_Sub(const LHS &L, const RHS &R) { return BinaryOp_match(L, R); } template -inline BinaryOp_match m_FSub(const LHS &L, - const RHS &R) { +inline BinaryOp_match +m_FSub(const LHS &L, const RHS &R) { return BinaryOp_match(L, R); } template -inline BinaryOp_match m_Mul(const LHS &L, - const RHS &R) { +inline BinaryOp_match +m_Mul(const LHS &L, const RHS &R) { return BinaryOp_match(L, R); } template -inline BinaryOp_match m_FMul(const LHS &L, - const RHS &R) { +inline BinaryOp_match +m_FMul(const LHS &L, const RHS &R) { return BinaryOp_match(L, R); } template -inline BinaryOp_match m_UDiv(const LHS &L, - const RHS &R) { +inline BinaryOp_match +m_UDiv(const LHS &L, const RHS &R) { return BinaryOp_match(L, R); } template -inline BinaryOp_match m_SDiv(const LHS &L, - const RHS &R) { +inline BinaryOp_match +m_SDiv(const LHS &L, const RHS &R) { return BinaryOp_match(L, R); } template -inline BinaryOp_match m_FDiv(const LHS &L, - const RHS &R) { +inline BinaryOp_match +m_FDiv(const LHS &L, const RHS &R) { return BinaryOp_match(L, R); } template -inline BinaryOp_match m_URem(const LHS &L, - const RHS &R) { +inline BinaryOp_match +m_URem(const LHS &L, const RHS &R) { return BinaryOp_match(L, R); } template -inline BinaryOp_match m_SRem(const LHS &L, - const RHS &R) { +inline BinaryOp_match +m_SRem(const LHS &L, const RHS &R) { return BinaryOp_match(L, R); } template -inline BinaryOp_match m_FRem(const LHS &L, - const RHS &R) { +inline BinaryOp_match +m_FRem(const LHS &L, const RHS &R) { return BinaryOp_match(L, R); } template -inline BinaryOp_match m_And(const LHS &L, - const RHS &R) { +inline BinaryOp_match +m_And(const LHS &L, const RHS &R) { return BinaryOp_match(L, R); } template -inline BinaryOp_match m_Or(const LHS &L, - const RHS &R) { +inline BinaryOp_match +m_Or(const LHS &L, const RHS &R) { return BinaryOp_match(L, R); } template -inline BinaryOp_match m_Xor(const LHS &L, - const RHS &R) { +inline BinaryOp_match +m_Xor(const LHS &L, const RHS &R) { return BinaryOp_match(L, R); } template -inline BinaryOp_match m_Shl(const LHS &L, - const RHS &R) { +inline BinaryOp_match +m_Shl(const LHS &L, const RHS &R) { return BinaryOp_match(L, R); } template -inline BinaryOp_match m_LShr(const LHS &L, - const RHS &R) { +inline BinaryOp_match +m_LShr(const LHS &L, const RHS &R) { return BinaryOp_match(L, R); } template -inline BinaryOp_match m_AShr(const LHS &L, - const RHS &R) { +inline BinaryOp_match +m_AShr(const LHS &L, const RHS &R) { return BinaryOp_match(L, R); } //===----------------------------------------------------------------------===// -// Matchers for either AShr or LShr .. for convenience -// -template -struct Shr_match { - LHS_t L; - RHS_t R; - - Shr_match(const LHS_t &LHS, const RHS_t &RHS) : L(LHS), R(RHS) {} - - template - bool match(OpTy *V) { - if (V->getValueID() == Value::InstructionVal + Instruction::LShr || - V->getValueID() == Value::InstructionVal + Instruction::AShr) { - ConcreteTy *I = cast(V); - return (I->getOpcode() == Instruction::AShr || - I->getOpcode() == Instruction::LShr) && - L.match(I->getOperand(0)) && - R.match(I->getOperand(1)); - } - if (ConstantExpr *CE = dyn_cast(V)) - return (CE->getOpcode() == Instruction::LShr || - CE->getOpcode() == Instruction::AShr) && - L.match(CE->getOperand(0)) && - R.match(CE->getOperand(1)); - return false; - } -}; - -template -inline Shr_match m_Shr(const LHS &L, const RHS &R) { - return Shr_match(L, R); -} - -//===----------------------------------------------------------------------===// -// Matchers for either SDiv or UDiv .. for convenience +// Class that matches two different binary ops. // -template -struct Div_match { +template +struct BinOp2_match { LHS_t L; RHS_t R; - Div_match(const LHS_t &LHS, const RHS_t &RHS) : L(LHS), R(RHS) {} + BinOp2_match(const LHS_t &LHS, const RHS_t &RHS) : L(LHS), R(RHS) {} template bool match(OpTy *V) { - if (V->getValueID() == Value::InstructionVal + Instruction::SDiv || - V->getValueID() == Value::InstructionVal + Instruction::UDiv) { - ConcreteTy *I = cast(V); - return (I->getOpcode() == Instruction::UDiv || - I->getOpcode() == Instruction::SDiv) && - L.match(I->getOperand(0)) && - R.match(I->getOperand(1)); + if (V->getValueID() == Value::InstructionVal + Opc1 || + V->getValueID() == Value::InstructionVal + Opc2) { + BinaryOperator *I = cast(V); + return L.match(I->getOperand(0)) && R.match(I->getOperand(1)); } if (ConstantExpr *CE = dyn_cast(V)) - return (CE->getOpcode() == Instruction::SDiv || - CE->getOpcode() == Instruction::UDiv) && - L.match(CE->getOperand(0)) && - R.match(CE->getOperand(1)); + return (CE->getOpcode() == Opc1 || CE->getOpcode() == Opc2) && + L.match(CE->getOperand(0)) && R.match(CE->getOperand(1)); return false; } }; +/// m_Shr - Matches LShr or AShr. template -inline Div_match m_Div(const LHS &L, const RHS &R) { - return Div_match(L, R); +inline BinOp2_match +m_Shr(const LHS &L, const RHS &R) { + return BinOp2_match(L, R); } -//===----------------------------------------------------------------------===// -// Matchers for binary classes -// - -template -struct BinaryOpClass_match { - OpcType *Opcode; - LHS_t L; - RHS_t R; - - BinaryOpClass_match(OpcType &Op, const LHS_t &LHS, - const RHS_t &RHS) - : Opcode(&Op), L(LHS), R(RHS) {} - BinaryOpClass_match(const LHS_t &LHS, const RHS_t &RHS) - : Opcode(0), L(LHS), R(RHS) {} - - template - bool match(OpTy *V) { - if (Class *I = dyn_cast(V)) - if (L.match(I->getOperand(0)) && - R.match(I->getOperand(1))) { - if (Opcode) - *Opcode = I->getOpcode(); - return true; - } -#if 0 // Doesn't handle constantexprs yet! - if (ConstantExpr *CE = dyn_cast(V)) - return CE->getOpcode() == Opcode && L.match(CE->getOperand(0)) && - R.match(CE->getOperand(1)); -#endif - return false; - } -}; - +/// m_LogicalShift - Matches LShr or Shl. template -inline BinaryOpClass_match -m_Shift(Instruction::BinaryOps &Op, const LHS &L, const RHS &R) { - return BinaryOpClass_match(Op, L, R); +inline BinOp2_match +m_LogicalShift(const LHS &L, const RHS &R) { + return BinOp2_match(L, R); } +/// m_IDiv - Matches UDiv and SDiv. template -inline BinaryOpClass_match -m_Shift(const LHS &L, const RHS &R) { - return BinaryOpClass_match(L, R); +inline BinOp2_match +m_IDiv(const LHS &L, const RHS &R) { + return BinOp2_match(L, R); } //===----------------------------------------------------------------------===// @@ -438,15 +414,13 @@ LHS_t L; RHS_t R; - CmpClass_match(PredicateTy &Pred, const LHS_t &LHS, - const RHS_t &RHS) + CmpClass_match(PredicateTy &Pred, const LHS_t &LHS, const RHS_t &RHS) : Predicate(Pred), L(LHS), R(RHS) {} template bool match(OpTy *V) { if (Class *I = dyn_cast(V)) - if (L.match(I->getOperand(0)) && - R.match(I->getOperand(1))) { + if (L.match(I->getOperand(0)) && R.match(I->getOperand(1))) { Predicate = I->getPredicate(); return true; } @@ -501,11 +475,9 @@ /// m_SelectCst - This matches a select of two constants, e.g.: /// m_SelectCst<-1, 0>(m_Value(V)) template -inline SelectClass_match, constantint_ty > +inline SelectClass_match, constantint_match > m_SelectCst(const Cond &C) { - return SelectClass_match, - constantint_ty >(C, m_ConstantInt(), - m_ConstantInt()); + return m_Select(C, m_ConstantInt(), m_ConstantInt()); } @@ -589,12 +561,8 @@ bool matchIfNot(Value *LHS, Value *RHS) { if (ConstantInt *CI = dyn_cast(RHS)) return CI->isAllOnesValue() && L.match(LHS); - if (ConstantInt *CI = dyn_cast(LHS)) - return CI->isAllOnesValue() && L.match(RHS); if (ConstantVector *CV = dyn_cast(RHS)) return CV->isAllOnesValue() && L.match(LHS); - if (ConstantVector *CV = dyn_cast(LHS)) - return CV->isAllOnesValue() && L.match(RHS); return false; } }; @@ -621,11 +589,13 @@ } private: bool matchIfNeg(Value *LHS, Value *RHS) { - return LHS == ConstantFP::getZeroValueForNegation(LHS->getType()) && - L.match(RHS); + if (ConstantInt *C = dyn_cast(LHS)) + return C->isZero() && L.match(RHS); + return false; } }; +/// m_Neg - Match an integer negate. template inline neg_match m_Neg(const LHS &L) { return L; } @@ -644,23 +614,23 @@ if (ConstantExpr *CE = dyn_cast(V)) if (CE->getOpcode() == Instruction::FSub) return matchIfFNeg(CE->getOperand(0), CE->getOperand(1)); - if (ConstantFP *CF = dyn_cast(V)) - return L.match(ConstantExpr::getFNeg(CF)); return false; } private: bool matchIfFNeg(Value *LHS, Value *RHS) { - return LHS == ConstantFP::getZeroValueForNegation(LHS->getType()) && - L.match(RHS); + if (ConstantFP *C = dyn_cast(LHS)) + return C->isNegativeZeroValue() && L.match(RHS); + return false; } }; +/// m_FNeg - Match a floating point negate. template inline fneg_match m_FNeg(const LHS &L) { return L; } //===----------------------------------------------------------------------===// -// Matchers for control flow +// Matchers for control flow. // template @@ -674,12 +644,10 @@ template bool match(OpTy *V) { if (BranchInst *BI = dyn_cast(V)) - if (BI->isConditional()) { - if (Cond.match(BI->getCondition())) { - T = BI->getSuccessor(0); - F = BI->getSuccessor(1); - return true; - } + if (BI->isConditional() && Cond.match(BI->getCondition())) { + T = BI->getSuccessor(0); + F = BI->getSuccessor(1); + return true; } return false; } Modified: llvm/trunk/lib/Analysis/InstructionSimplify.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/InstructionSimplify.cpp?rev=125194&r1=125193&r2=125194&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/InstructionSimplify.cpp (original) +++ llvm/trunk/lib/Analysis/InstructionSimplify.cpp Wed Feb 9 11:00:45 2011 @@ -734,8 +734,8 @@ // (X / Y) * Y -> X if the division is exact. Value *X = 0, *Y = 0; - if ((match(Op0, m_Div(m_Value(X), m_Value(Y))) && Y == Op1) || // (X / Y) * Y - (match(Op1, m_Div(m_Value(X), m_Value(Y))) && Y == Op0)) { // Y * (X / Y) + if ((match(Op0, m_IDiv(m_Value(X), m_Value(Y))) && Y == Op1) || // (X / Y) * Y + (match(Op1, m_IDiv(m_Value(X), m_Value(Y))) && Y == Op0)) { // Y * (X / Y) BinaryOperator *Div = cast(Y == Op1 ? Op0 : Op1); if (Div->isExact()) return X; Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp?rev=125194&r1=125193&r2=125194&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp Wed Feb 9 11:00:45 2011 @@ -1755,8 +1755,8 @@ // (A >> B) | (C << D) and (A << B) | (B >> C) -> bswap if possible. if (match(Op0, m_Or(m_Value(), m_Value())) || match(Op1, m_Or(m_Value(), m_Value())) || - (match(Op0, m_Shift(m_Value(), m_Value())) && - match(Op1, m_Shift(m_Value(), m_Value())))) { + (match(Op0, m_LogicalShift(m_Value(), m_Value())) && + match(Op1, m_LogicalShift(m_Value(), m_Value())))) { if (Instruction *BSwap = MatchBSwap(I)) return BSwap; } From sabre at nondot.org Wed Feb 9 11:06:41 2011 From: sabre at nondot.org (Chris Lattner) Date: Wed, 09 Feb 2011 17:06:41 -0000 Subject: [llvm-commits] [llvm] r125195 - in /llvm/trunk/test/Transforms/InstCombine: div-cmp-overflow.ll icmp.ll Message-ID: <20110209170641.A3DA72A6C12C@llvm.org> Author: lattner Date: Wed Feb 9 11:06:41 2011 New Revision: 125195 URL: http://llvm.org/viewvc/llvm-project?rev=125195&view=rev Log: merge two tests. Removed: llvm/trunk/test/Transforms/InstCombine/div-cmp-overflow.ll Modified: llvm/trunk/test/Transforms/InstCombine/icmp.ll Removed: llvm/trunk/test/Transforms/InstCombine/div-cmp-overflow.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/div-cmp-overflow.ll?rev=125194&view=auto ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/div-cmp-overflow.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/div-cmp-overflow.ll (removed) @@ -1,8 +0,0 @@ -; RUN: opt < %s -instcombine -S | not grep sdiv -; PR2740 - -define i1 @func_75(i32 %i2) nounwind { - %i3 = sdiv i32 %i2, -1328634635 - %i4 = icmp eq i32 %i3, -1 - ret i1 %i4 -} Modified: llvm/trunk/test/Transforms/InstCombine/icmp.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/icmp.ll?rev=125195&r1=125194&r2=125195&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/icmp.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/icmp.ll Wed Feb 9 11:06:41 2011 @@ -209,3 +209,12 @@ %B = icmp ult i8 %A, 4 ret i1 %B } + +; PR2740 +; CHECK: @test23 +; CHECK: icmp sgt i32 %x, 1328634634 +define i1 @test23(i32 %x) nounwind { + %i3 = sdiv i32 %x, -1328634635 + %i4 = icmp eq i32 %i3, -1 + ret i1 %i4 +} From sabre at nondot.org Wed Feb 9 11:15:04 2011 From: sabre at nondot.org (Chris Lattner) Date: Wed, 09 Feb 2011 17:15:04 -0000 Subject: [llvm-commits] [llvm] r125196 - in /llvm/trunk: include/llvm/Analysis/InstructionSimplify.h lib/Analysis/InstructionSimplify.cpp lib/Transforms/InstCombine/InstCombineShifts.cpp test/Transforms/InstSimplify/exact-nsw-nuw.ll Message-ID: <20110209171504.DF5812A6C12C@llvm.org> Author: lattner Date: Wed Feb 9 11:15:04 2011 New Revision: 125196 URL: http://llvm.org/viewvc/llvm-project?rev=125196&view=rev Log: Teach instsimplify some tricks about exact/nuw/nsw shifts. improve interfaces to instsimplify to take this info. Added: llvm/trunk/test/Transforms/InstSimplify/exact-nsw-nuw.ll Modified: llvm/trunk/include/llvm/Analysis/InstructionSimplify.h llvm/trunk/lib/Analysis/InstructionSimplify.cpp llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp Modified: llvm/trunk/include/llvm/Analysis/InstructionSimplify.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/InstructionSimplify.h?rev=125196&r1=125195&r2=125196&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/InstructionSimplify.h (original) +++ llvm/trunk/include/llvm/Analysis/InstructionSimplify.h Wed Feb 9 11:15:04 2011 @@ -57,17 +57,18 @@ /// SimplifyShlInst - Given operands for a Shl, see if we can /// fold the result. If not, this returns null. - Value *SimplifyShlInst(Value *Op0, Value *Op1, const TargetData *TD = 0, - const DominatorTree *DT = 0); + Value *SimplifyShlInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, + const TargetData *TD = 0, const DominatorTree *DT = 0); /// SimplifyLShrInst - Given operands for a LShr, see if we can /// fold the result. If not, this returns null. - Value *SimplifyLShrInst(Value *Op0, Value *Op1, const TargetData *TD = 0, - const DominatorTree *DT = 0); + Value *SimplifyLShrInst(Value *Op0, Value *Op1, bool isExact, + const TargetData *TD = 0, const DominatorTree *DT=0); /// SimplifyAShrInst - Given operands for a AShr, see if we can /// fold the result. If not, this returns null. - Value *SimplifyAShrInst(Value *Op0, Value *Op1, const TargetData *TD = 0, + Value *SimplifyAShrInst(Value *Op0, Value *Op1, bool isExact, + const TargetData *TD = 0, const DominatorTree *DT = 0); /// SimplifyAndInst - Given operands for an And, see if we can Modified: llvm/trunk/lib/Analysis/InstructionSimplify.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/InstructionSimplify.cpp?rev=125196&r1=125195&r2=125196&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/InstructionSimplify.cpp (original) +++ llvm/trunk/lib/Analysis/InstructionSimplify.cpp Wed Feb 9 11:15:04 2011 @@ -29,7 +29,7 @@ using namespace llvm; using namespace llvm::PatternMatch; -#define RecursionLimit 3 +enum { RecursionLimit = 3 }; STATISTIC(NumExpand, "Number of expansions"); STATISTIC(NumFactor , "Number of factorizations"); @@ -946,8 +946,9 @@ /// SimplifyShlInst - Given operands for an Shl, see if we can /// fold the result. If not, this returns null. -static Value *SimplifyShlInst(Value *Op0, Value *Op1, const TargetData *TD, - const DominatorTree *DT, unsigned MaxRecurse) { +static Value *SimplifyShlInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, + const TargetData *TD, const DominatorTree *DT, + unsigned MaxRecurse) { if (Value *V = SimplifyShift(Instruction::Shl, Op0, Op1, TD, DT, MaxRecurse)) return V; @@ -955,18 +956,24 @@ if (match(Op0, m_Undef())) return Constant::getNullValue(Op0->getType()); + // (X >> A) << A -> X + Value *X; + if (match(Op0, m_Shr(m_Value(X), m_Specific(Op1))) && + cast(Op0)->isExact()) + return X; return 0; } -Value *llvm::SimplifyShlInst(Value *Op0, Value *Op1, const TargetData *TD, - const DominatorTree *DT) { - return ::SimplifyShlInst(Op0, Op1, TD, DT, RecursionLimit); +Value *llvm::SimplifyShlInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, + const TargetData *TD, const DominatorTree *DT) { + return ::SimplifyShlInst(Op0, Op1, isNSW, isNUW, TD, DT, RecursionLimit); } /// SimplifyLShrInst - Given operands for an LShr, see if we can /// fold the result. If not, this returns null. -static Value *SimplifyLShrInst(Value *Op0, Value *Op1, const TargetData *TD, - const DominatorTree *DT, unsigned MaxRecurse) { +static Value *SimplifyLShrInst(Value *Op0, Value *Op1, bool isExact, + const TargetData *TD, const DominatorTree *DT, + unsigned MaxRecurse) { if (Value *V = SimplifyShift(Instruction::LShr, Op0, Op1, TD, DT, MaxRecurse)) return V; @@ -974,18 +981,25 @@ if (match(Op0, m_Undef())) return Constant::getNullValue(Op0->getType()); + // (X << A) >> A -> X + Value *X; + if (match(Op0, m_Shl(m_Value(X), m_Specific(Op1))) && + cast(Op0)->hasNoUnsignedWrap()) + return X; + return 0; } -Value *llvm::SimplifyLShrInst(Value *Op0, Value *Op1, const TargetData *TD, - const DominatorTree *DT) { - return ::SimplifyLShrInst(Op0, Op1, TD, DT, RecursionLimit); +Value *llvm::SimplifyLShrInst(Value *Op0, Value *Op1, bool isExact, + const TargetData *TD, const DominatorTree *DT) { + return ::SimplifyLShrInst(Op0, Op1, isExact, TD, DT, RecursionLimit); } /// SimplifyAShrInst - Given operands for an AShr, see if we can /// fold the result. If not, this returns null. -static Value *SimplifyAShrInst(Value *Op0, Value *Op1, const TargetData *TD, - const DominatorTree *DT, unsigned MaxRecurse) { +static Value *SimplifyAShrInst(Value *Op0, Value *Op1, bool isExact, + const TargetData *TD, const DominatorTree *DT, + unsigned MaxRecurse) { if (Value *V = SimplifyShift(Instruction::AShr, Op0, Op1, TD, DT, MaxRecurse)) return V; @@ -997,12 +1011,18 @@ if (match(Op0, m_Undef())) return Constant::getAllOnesValue(Op0->getType()); + // (X << A) >> A -> X + Value *X; + if (match(Op0, m_Shl(m_Value(X), m_Specific(Op1))) && + cast(Op0)->hasNoSignedWrap()) + return X; + return 0; } -Value *llvm::SimplifyAShrInst(Value *Op0, Value *Op1, const TargetData *TD, - const DominatorTree *DT) { - return ::SimplifyAShrInst(Op0, Op1, TD, DT, RecursionLimit); +Value *llvm::SimplifyAShrInst(Value *Op0, Value *Op1, bool isExact, + const TargetData *TD, const DominatorTree *DT) { + return ::SimplifyAShrInst(Op0, Op1, isExact, TD, DT, RecursionLimit); } /// SimplifyAndInst - Given operands for an And, see if we can @@ -1037,12 +1057,12 @@ return Op0; // A & ~A = ~A & A = 0 - Value *A = 0, *B = 0; - if ((match(Op0, m_Not(m_Value(A))) && A == Op1) || - (match(Op1, m_Not(m_Value(A))) && A == Op0)) + if (match(Op0, m_Not(m_Specific(Op1))) || + match(Op1, m_Not(m_Specific(Op0)))) return Constant::getNullValue(Op0->getType()); // (A | ?) & A = A + Value *A = 0, *B = 0; if (match(Op0, m_Or(m_Value(A), m_Value(B))) && (A == Op1 || B == Op1)) return Op1; @@ -1126,12 +1146,12 @@ return Op1; // A | ~A = ~A | A = -1 - Value *A = 0, *B = 0; - if ((match(Op0, m_Not(m_Value(A))) && A == Op1) || - (match(Op1, m_Not(m_Value(A))) && A == Op0)) + if (match(Op0, m_Not(m_Specific(Op1))) || + match(Op1, m_Not(m_Specific(Op0)))) return Constant::getAllOnesValue(Op0->getType()); // (A & ?) | A = A + Value *A = 0, *B = 0; if (match(Op0, m_And(m_Value(A), m_Value(B))) && (A == Op1 || B == Op1)) return Op1; @@ -1206,9 +1226,8 @@ return Constant::getNullValue(Op0->getType()); // A ^ ~A = ~A ^ A = -1 - Value *A = 0; - if ((match(Op0, m_Not(m_Value(A))) && A == Op1) || - (match(Op1, m_Not(m_Value(A))) && A == Op0)) + if (match(Op0, m_Not(m_Specific(Op1))) || + match(Op1, m_Not(m_Specific(Op0)))) return Constant::getAllOnesValue(Op0->getType()); // Try some generic simplifications for associative operations. @@ -1794,21 +1813,25 @@ const TargetData *TD, const DominatorTree *DT, unsigned MaxRecurse) { switch (Opcode) { - case Instruction::Add: return SimplifyAddInst(LHS, RHS, /* isNSW */ false, - /* isNUW */ false, TD, DT, - MaxRecurse); - case Instruction::Sub: return SimplifySubInst(LHS, RHS, /* isNSW */ false, - /* isNUW */ false, TD, DT, - MaxRecurse); - case Instruction::Mul: return SimplifyMulInst(LHS, RHS, TD, DT, MaxRecurse); + case Instruction::Add: + return SimplifyAddInst(LHS, RHS, /* isNSW */ false, /* isNUW */ false, + TD, DT, MaxRecurse); + case Instruction::Sub: + return SimplifySubInst(LHS, RHS, /* isNSW */ false, /* isNUW */ false, + TD, DT, MaxRecurse); + case Instruction::Mul: return SimplifyMulInst (LHS, RHS, TD, DT, MaxRecurse); case Instruction::SDiv: return SimplifySDivInst(LHS, RHS, TD, DT, MaxRecurse); case Instruction::UDiv: return SimplifyUDivInst(LHS, RHS, TD, DT, MaxRecurse); case Instruction::FDiv: return SimplifyFDivInst(LHS, RHS, TD, DT, MaxRecurse); - case Instruction::Shl: return SimplifyShlInst(LHS, RHS, TD, DT, MaxRecurse); - case Instruction::LShr: return SimplifyLShrInst(LHS, RHS, TD, DT, MaxRecurse); - case Instruction::AShr: return SimplifyAShrInst(LHS, RHS, TD, DT, MaxRecurse); + case Instruction::Shl: + return SimplifyShlInst(LHS, RHS, /*NSW*/false, /*NUW*/false, + TD, DT, MaxRecurse); + case Instruction::LShr: + return SimplifyLShrInst(LHS, RHS, /*isexact*/ false, TD, DT, MaxRecurse); + case Instruction::AShr: + return SimplifyAShrInst(LHS, RHS, /*isexact*/false, TD, DT, MaxRecurse); case Instruction::And: return SimplifyAndInst(LHS, RHS, TD, DT, MaxRecurse); - case Instruction::Or: return SimplifyOrInst(LHS, RHS, TD, DT, MaxRecurse); + case Instruction::Or: return SimplifyOrInst (LHS, RHS, TD, DT, MaxRecurse); case Instruction::Xor: return SimplifyXorInst(LHS, RHS, TD, DT, MaxRecurse); default: if (Constant *CLHS = dyn_cast(LHS)) @@ -1895,13 +1918,20 @@ Result = SimplifyFDivInst(I->getOperand(0), I->getOperand(1), TD, DT); break; case Instruction::Shl: - Result = SimplifyShlInst(I->getOperand(0), I->getOperand(1), TD, DT); + Result = SimplifyShlInst(I->getOperand(0), I->getOperand(1), + cast(I)->hasNoSignedWrap(), + cast(I)->hasNoUnsignedWrap(), + TD, DT); break; case Instruction::LShr: - Result = SimplifyLShrInst(I->getOperand(0), I->getOperand(1), TD, DT); + Result = SimplifyLShrInst(I->getOperand(0), I->getOperand(1), + cast(I)->isExact(), + TD, DT); break; case Instruction::AShr: - Result = SimplifyAShrInst(I->getOperand(0), I->getOperand(1), TD, DT); + Result = SimplifyAShrInst(I->getOperand(0), I->getOperand(1), + cast(I)->isExact(), + TD, DT); break; case Instruction::And: Result = SimplifyAndInst(I->getOperand(0), I->getOperand(1), TD, DT); Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp?rev=125196&r1=125195&r2=125196&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp Wed Feb 9 11:15:04 2011 @@ -617,13 +617,16 @@ } Instruction *InstCombiner::visitShl(BinaryOperator &I) { - if (Value *V = SimplifyShlInst(I.getOperand(0), I.getOperand(1), TD)) + if (Value *V = SimplifyShlInst(I.getOperand(0), I.getOperand(1), + I.hasNoSignedWrap(), I.hasNoUnsignedWrap(), + TD)) return ReplaceInstUsesWith(I, V); return commonShiftTransforms(I); } Instruction *InstCombiner::visitLShr(BinaryOperator &I) { - if (Value *V = SimplifyLShrInst(I.getOperand(0), I.getOperand(1), TD)) + if (Value *V = SimplifyLShrInst(I.getOperand(0), I.getOperand(1), + I.isExact(), TD)) return ReplaceInstUsesWith(I, V); if (Instruction *R = commonShiftTransforms(I)) @@ -652,7 +655,8 @@ } Instruction *InstCombiner::visitAShr(BinaryOperator &I) { - if (Value *V = SimplifyAShrInst(I.getOperand(0), I.getOperand(1), TD)) + if (Value *V = SimplifyAShrInst(I.getOperand(0), I.getOperand(1), + I.isExact(), TD)) return ReplaceInstUsesWith(I, V); if (Instruction *R = commonShiftTransforms(I)) Added: llvm/trunk/test/Transforms/InstSimplify/exact-nsw-nuw.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstSimplify/exact-nsw-nuw.ll?rev=125196&view=auto ============================================================================== --- llvm/trunk/test/Transforms/InstSimplify/exact-nsw-nuw.ll (added) +++ llvm/trunk/test/Transforms/InstSimplify/exact-nsw-nuw.ll Wed Feb 9 11:15:04 2011 @@ -0,0 +1,44 @@ +; RUN: opt < %s -instsimplify -S | FileCheck %s + +; PR8862 + +; CHECK: @shift1 +; CHECK: ret i32 %A +define i32 @shift1(i32 %A, i32 %B) { + %C = lshr exact i32 %A, %B + %D = shl nuw i32 %C, %B + ret i32 %D +} + +; CHECK: @shift2 +; CHECK: lshr +; CHECK: ret i32 %D +define i32 @shift2(i32 %A, i32 %B) { + %C = lshr i32 %A, %B + %D = shl nuw i32 %C, %B + ret i32 %D +} + +; CHECK: @shift3 +; CHECK: ret i32 %A +define i32 @shift3(i32 %A, i32 %B) { + %C = ashr exact i32 %A, %B + %D = shl nuw i32 %C, %B + ret i32 %D +} + +; CHECK: @shift4 +; CHECK: ret i32 %A +define i32 @shift4(i32 %A, i32 %B) { + %C = shl nuw i32 %A, %B + %D = lshr i32 %C, %B + ret i32 %D +} + +; CHECK: @shift5 +; CHECK: ret i32 %A +define i32 @shift5(i32 %A, i32 %B) { + %C = shl nsw i32 %A, %B + %D = ashr i32 %C, %B + ret i32 %D +} From david_dean at apple.com Wed Feb 9 11:35:38 2011 From: david_dean at apple.com (David Dean) Date: Wed, 09 Feb 2011 17:35:38 -0000 Subject: [llvm-commits] [zorg] r125197 - /zorg/trunk/buildbot/llvmlab/master/config/builders.py Message-ID: <20110209173538.AE8CD2A6C12C@llvm.org> Author: ddean Date: Wed Feb 9 11:35:38 2011 New Revision: 125197 URL: http://llvm.org/viewvc/llvm-project?rev=125197&view=rev Log: remove pulling and building llvm/clang and use the new --without-llvm* options Modified: zorg/trunk/buildbot/llvmlab/master/config/builders.py Modified: zorg/trunk/buildbot/llvmlab/master/config/builders.py URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/buildbot/llvmlab/master/config/builders.py?rev=125197&r1=125196&r2=125197&view=diff ============================================================================== --- zorg/trunk/buildbot/llvmlab/master/config/builders.py (original) +++ zorg/trunk/buildbot/llvmlab/master/config/builders.py Wed Feb 9 11:35:38 2011 @@ -299,29 +299,7 @@ description=['sanity test'], env={'PATH': WithProperties('%(use_path)s:${PATH}')})) # Pull source code. - f = pullllvm(f) - f = pullClang(f) f = pulltest_suite(f) - # It is currently necessary to build llvm in order for nightly tests to build and run. - # TODO: build less of llvm. - f.addStep(buildbot.steps.shell.ShellCommand( - name='configure.with.host', - command=[ - '../llvm/configure', '--enable-optimized', '--disable-bindings', - '--with-llvmcc=clang', '--without-llvmgcc', '--without-llvmgxx', - WithProperties('CC=%(use_path)s/clang'), - WithProperties('CXX=%(use_path)s/clang++')], - haltOnFailure=True, - description=['configure'], - env={'PATH': WithProperties('%(use_path)s:${PATH}')}, - workdir='llvm.obj')) - f.addStep(buildbot.steps.shell.ShellCommand( - name='make', - command=['make', 'tools-only', '-j', WithProperties('%(jobs)s')], - env={'PATH': WithProperties('%(use_path)s:${PATH}')}, - haltOnFailure=True, - description=['make'], - workdir='llvm.obj')) # Clean up. if clean: f.addStep(buildbot.steps.shell.ShellCommand( @@ -338,8 +316,7 @@ WithProperties('CXX=%(use_path)s/clang++'), 'CFLAGS='+options, 'CXXFLAGS='+options, - WithProperties('--with-llvmsrc=%(builddir)s/llvm'), - WithProperties('--with-llvmobj=%(builddir)s/llvm.obj')], + '--without-llvmsrc', '--without-llvmobj'], haltOnFailure=True, description=['configure tests'], env={'PATH': WithProperties('%(use_path)s:${PATH}')}, From baldrick at free.fr Wed Feb 9 11:40:19 2011 From: baldrick at free.fr (Duncan Sands) Date: Wed, 09 Feb 2011 17:40:19 -0000 Subject: [llvm-commits] [dragonegg] r125198 - /dragonegg/trunk/llvm-convert.cpp Message-ID: <20110209174019.66E222A6C12C@llvm.org> Author: baldrick Date: Wed Feb 9 11:40:19 2011 New Revision: 125198 URL: http://llvm.org/viewvc/llvm-project?rev=125198&view=rev Log: Simplify using the new isExact argument to Create*Div. Modified: dragonegg/trunk/llvm-convert.cpp Modified: dragonegg/trunk/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/llvm-convert.cpp?rev=125198&r1=125197&r2=125198&view=diff ============================================================================== --- dragonegg/trunk/llvm-convert.cpp (original) +++ dragonegg/trunk/llvm-convert.cpp Wed Feb 9 11:40:19 2011 @@ -6664,17 +6664,10 @@ } assert(LHS->getType()->isIntOrIntVectorTy() && "TRUNC_DIV_EXPR not integer!"); - if (TYPE_UNSIGNED(type)) { - if (isExact) - return Builder.CreateExactUDiv(LHS, RHS); - else - return Builder.CreateUDiv(LHS, RHS); - } else { - if (isExact) - return Builder.CreateExactSDiv(LHS, RHS); - else - return Builder.CreateSDiv(LHS, RHS); - } + if (TYPE_UNSIGNED(type)) + return Builder.CreateUDiv(LHS, RHS, "", isExact); + else + return Builder.CreateSDiv(LHS, RHS, "", isExact); } Value *TreeToLLVM::EmitReg_TRUNC_MOD_EXPR(tree op0, tree op1) { From baldrick at free.fr Wed Feb 9 11:45:03 2011 From: baldrick at free.fr (Duncan Sands) Date: Wed, 09 Feb 2011 17:45:03 -0000 Subject: [llvm-commits] [llvm] r125200 - /llvm/trunk/lib/Analysis/InstructionSimplify.cpp Message-ID: <20110209174504.043962A6C12C@llvm.org> Author: baldrick Date: Wed Feb 9 11:45:03 2011 New Revision: 125200 URL: http://llvm.org/viewvc/llvm-project?rev=125200&view=rev Log: Formatting and comment tweaks. Modified: llvm/trunk/lib/Analysis/InstructionSimplify.cpp Modified: llvm/trunk/lib/Analysis/InstructionSimplify.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/InstructionSimplify.cpp?rev=125200&r1=125199&r2=125200&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/InstructionSimplify.cpp (original) +++ llvm/trunk/lib/Analysis/InstructionSimplify.cpp Wed Feb 9 11:45:03 2011 @@ -1814,22 +1814,22 @@ unsigned MaxRecurse) { switch (Opcode) { case Instruction::Add: - return SimplifyAddInst(LHS, RHS, /* isNSW */ false, /* isNUW */ false, + return SimplifyAddInst(LHS, RHS, /*isNSW*/false, /*isNUW*/false, TD, DT, MaxRecurse); case Instruction::Sub: - return SimplifySubInst(LHS, RHS, /* isNSW */ false, /* isNUW */ false, + return SimplifySubInst(LHS, RHS, /*isNSW*/false, /*isNUW*/false, TD, DT, MaxRecurse); case Instruction::Mul: return SimplifyMulInst (LHS, RHS, TD, DT, MaxRecurse); case Instruction::SDiv: return SimplifySDivInst(LHS, RHS, TD, DT, MaxRecurse); case Instruction::UDiv: return SimplifyUDivInst(LHS, RHS, TD, DT, MaxRecurse); case Instruction::FDiv: return SimplifyFDivInst(LHS, RHS, TD, DT, MaxRecurse); case Instruction::Shl: - return SimplifyShlInst(LHS, RHS, /*NSW*/false, /*NUW*/false, + return SimplifyShlInst(LHS, RHS, /*isNSW*/false, /*isNUW*/false, TD, DT, MaxRecurse); case Instruction::LShr: - return SimplifyLShrInst(LHS, RHS, /*isexact*/ false, TD, DT, MaxRecurse); + return SimplifyLShrInst(LHS, RHS, /*isExact*/false, TD, DT, MaxRecurse); case Instruction::AShr: - return SimplifyAShrInst(LHS, RHS, /*isexact*/false, TD, DT, MaxRecurse); + return SimplifyAShrInst(LHS, RHS, /*isExact*/false, TD, DT, MaxRecurse); case Instruction::And: return SimplifyAndInst(LHS, RHS, TD, DT, MaxRecurse); case Instruction::Or: return SimplifyOrInst (LHS, RHS, TD, DT, MaxRecurse); case Instruction::Xor: return SimplifyXorInst(LHS, RHS, TD, DT, MaxRecurse); From idadesub at users.sourceforge.net Wed Feb 9 12:32:02 2011 From: idadesub at users.sourceforge.net (Erick Tryzelaar) Date: Wed, 09 Feb 2011 18:32:02 -0000 Subject: [llvm-commits] [llvm] r125202 - in /llvm/trunk: bindings/ocaml/Makefile.ocaml examples/OCaml-Kaleidoscope/Chapter6/Makefile examples/OCaml-Kaleidoscope/Chapter7/Makefile Message-ID: <20110209183202.9D5132A6C12C@llvm.org> Author: erickt Date: Wed Feb 9 12:32:02 2011 New Revision: 125202 URL: http://llvm.org/viewvc/llvm-project?rev=125202&view=rev Log: Fix compiling the ocaml kaleidoscope tutorials Modified: llvm/trunk/bindings/ocaml/Makefile.ocaml llvm/trunk/examples/OCaml-Kaleidoscope/Chapter6/Makefile llvm/trunk/examples/OCaml-Kaleidoscope/Chapter7/Makefile Modified: llvm/trunk/bindings/ocaml/Makefile.ocaml URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/Makefile.ocaml?rev=125202&r1=125201&r2=125202&view=diff ============================================================================== --- llvm/trunk/bindings/ocaml/Makefile.ocaml (original) +++ llvm/trunk/bindings/ocaml/Makefile.ocaml Wed Feb 9 12:32:02 2011 @@ -73,8 +73,13 @@ endif # Source files +ifndef OcamlSources1 OcamlSources1 := $(sort $(wildcard $(PROJ_SRC_DIR)/*.ml)) +endif + +ifndef OcamlHeaders1 OcamlHeaders1 := $(sort $(wildcard $(PROJ_SRC_DIR)/*.mli)) +endif OcamlSources2 := $(filter-out $(ExcludeSources),$(OcamlSources1)) OcamlHeaders2 := $(filter-out $(ExcludeHeaders),$(OcamlHeaders1)) @@ -352,11 +357,11 @@ ifndef OCAMLOPT $(ToolEXE): $(ObjectsCMO) $(OcamlDir)/.dir $(Echo) "Archiving $(notdir $@) for $(BuildMode) build" - $(Verb) $(Archive.EXE) $@ $< + $(Verb) $(Archive.EXE) $@ $(ObjectsCMO) else $(ToolEXE): $(ObjectsCMX) $(OcamlDir)/.dir $(Echo) "Archiving $(notdir $@) for $(BuildMode) build" - $(Verb) $(Archive.EXE) $@ $< + $(Verb) $(Archive.EXE) $@ $(ObjectsCMX) endif endif Modified: llvm/trunk/examples/OCaml-Kaleidoscope/Chapter6/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/examples/OCaml-Kaleidoscope/Chapter6/Makefile?rev=125202&r1=125201&r2=125202&view=diff ============================================================================== --- llvm/trunk/examples/OCaml-Kaleidoscope/Chapter6/Makefile (original) +++ llvm/trunk/examples/OCaml-Kaleidoscope/Chapter6/Makefile Wed Feb 9 12:32:02 2011 @@ -20,6 +20,15 @@ OCAMLCFLAGS += -pp camlp4of +OcamlSources1 = \ + $(PROJ_SRC_DIR)/ast.ml \ + $(PROJ_SRC_DIR)/parser.ml \ + $(PROJ_SRC_DIR)/codegen.ml \ + $(PROJ_SRC_DIR)/lexer.ml \ + $(PROJ_SRC_DIR)/token.ml \ + $(PROJ_SRC_DIR)/toplevel.ml \ + $(PROJ_SRC_DIR)/toy.ml + ExcludeSources = $(PROJ_SRC_DIR)/myocamlbuild.ml include $(LEVEL)/bindings/ocaml/Makefile.ocaml Modified: llvm/trunk/examples/OCaml-Kaleidoscope/Chapter7/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/examples/OCaml-Kaleidoscope/Chapter7/Makefile?rev=125202&r1=125201&r2=125202&view=diff ============================================================================== --- llvm/trunk/examples/OCaml-Kaleidoscope/Chapter7/Makefile (original) +++ llvm/trunk/examples/OCaml-Kaleidoscope/Chapter7/Makefile Wed Feb 9 12:32:02 2011 @@ -20,6 +20,15 @@ OCAMLCFLAGS += -pp camlp4of +OcamlSources1 = \ + $(PROJ_SRC_DIR)/ast.ml \ + $(PROJ_SRC_DIR)/parser.ml \ + $(PROJ_SRC_DIR)/codegen.ml \ + $(PROJ_SRC_DIR)/lexer.ml \ + $(PROJ_SRC_DIR)/token.ml \ + $(PROJ_SRC_DIR)/toplevel.ml \ + $(PROJ_SRC_DIR)/toy.ml + ExcludeSources = $(PROJ_SRC_DIR)/myocamlbuild.ml include $(LEVEL)/bindings/ocaml/Makefile.ocaml From idadesub at users.sourceforge.net Wed Feb 9 12:32:05 2011 From: idadesub at users.sourceforge.net (Erick Tryzelaar) Date: Wed, 09 Feb 2011 18:32:05 -0000 Subject: [llvm-commits] [llvm] r125203 - /llvm/trunk/docs/Makefile Message-ID: <20110209183205.102752A6C12D@llvm.org> Author: erickt Date: Wed Feb 9 12:32:04 2011 New Revision: 125203 URL: http://llvm.org/viewvc/llvm-project?rev=125203&view=rev Log: Don't run ocamldoc if it's not installed Modified: llvm/trunk/docs/Makefile Modified: llvm/trunk/docs/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/Makefile?rev=125203&r1=125202&r2=125203&view=diff ============================================================================== --- llvm/trunk/docs/Makefile (original) +++ llvm/trunk/docs/Makefile Wed Feb 9 12:32:04 2011 @@ -37,14 +37,21 @@ ifeq ($(ENABLE_DOXYGEN),1) install_targets += install-doxygen endif +ifdef OCAMLDOC ifneq (,$(filter ocaml,$(BINDINGS_TO_BUILD))) install_targets += install-ocamldoc endif +endif install-local:: $(install_targets) +generated_targets := doxygen +ifdef OCAMLDOC +generated_targets += ocamldoc +endif + # Live documentation is generated for the web site using this target: # 'make generated BUILD_FOR_WEBSITE=1' -generated:: doxygen ocamldoc +generated:: $(generated_targets) install-html: $(PROJ_OBJ_DIR)/html.tar.gz $(Echo) Installing HTML documentation From gohman at apple.com Wed Feb 9 13:25:31 2011 From: gohman at apple.com (Dan Gohman) Date: Wed, 09 Feb 2011 19:25:31 -0000 Subject: [llvm-commits] [llvm] r125211 - /llvm/trunk/include/llvm/ADT/PostOrderIterator.h Message-ID: <20110209192531.5A2FA2A6C12C@llvm.org> Author: djg Date: Wed Feb 9 13:25:31 2011 New Revision: 125211 URL: http://llvm.org/viewvc/llvm-project?rev=125211&view=rev Log: Optimize po_iterator: don't do redundant lookups. Modified: llvm/trunk/include/llvm/ADT/PostOrderIterator.h Modified: llvm/trunk/include/llvm/ADT/PostOrderIterator.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/PostOrderIterator.h?rev=125211&r1=125210&r2=125211&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/PostOrderIterator.h (original) +++ llvm/trunk/include/llvm/ADT/PostOrderIterator.h Wed Feb 9 13:25:31 2011 @@ -56,8 +56,7 @@ void traverseChild() { while (VisitStack.back().second != GT::child_end(VisitStack.back().first)) { NodeType *BB = *VisitStack.back().second++; - if (!this->Visited.count(BB)) { // If the block is not visited... - this->Visited.insert(BB); + if (this->Visited.insert(BB)) { // If the block is not visited... VisitStack.push_back(std::make_pair(BB, GT::child_begin(BB))); } } @@ -72,8 +71,7 @@ inline po_iterator(NodeType *BB, SetType &S) : po_iterator_storage(S) { - if(!S.count(BB)) { - this->Visited.insert(BB); + if (this->Visited.insert(BB)) { VisitStack.push_back(std::make_pair(BB, GT::child_begin(BB))); traverseChild(); } From joerg at britannica.bec.de Wed Feb 9 14:28:52 2011 From: joerg at britannica.bec.de (Joerg Sonnenberger) Date: Wed, 9 Feb 2011 21:28:52 +0100 Subject: [llvm-commits] [PATCH] [MC] .pushsection / .popsection support Message-ID: <20110209202852.GA10573@britannica.bec.de> Hi all, attached patch is the initial support for .pushsection / .popsection. To do this properly requires a change in the MCStreamer API. One approach is attached. I think a better idea would be to split the current SwitchSection() into two parts: the common code to manage CurSection / PrevSection and a virtual function ChangeSection that gets called if the new CurSection differs from the old one. There are a bunch of bugs with the handling of changing to the current section again. Joerg -------------- next part -------------- A non-text attachment was scrubbed... Name: section-stack.diff Type: text/x-diff Size: 14255 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110209/474bdbe3/attachment.bin From ssen at apple.com Wed Feb 9 15:03:19 2011 From: ssen at apple.com (Shantonu Sen) Date: Wed, 09 Feb 2011 21:03:19 -0000 Subject: [llvm-commits] [llvm] r125215 - /llvm/trunk/lib/MC/MCDisassembler/EDDisassembler.h Message-ID: <20110209210319.9B7F02A6C12C@llvm.org> Author: ssen Date: Wed Feb 9 15:03:19 2011 New Revision: 125215 URL: http://llvm.org/viewvc/llvm-project?rev=125215&view=rev Log: Fix comparator used for looking up previously instantiated EDDisassemblers. Now, Syntax is only used as a tie-breaker if the Arch matches. Previously, a request for x86_64 disassembler followed by the i386 disassembler in a single process would return the cached x86_64 disassembler. Fixes Modified: llvm/trunk/lib/MC/MCDisassembler/EDDisassembler.h Modified: llvm/trunk/lib/MC/MCDisassembler/EDDisassembler.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCDisassembler/EDDisassembler.h?rev=125215&r1=125214&r2=125215&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCDisassembler/EDDisassembler.h (original) +++ llvm/trunk/lib/MC/MCDisassembler/EDDisassembler.h Wed Feb 9 15:03:19 2011 @@ -89,8 +89,10 @@ bool operator<(const CPUKey &key) const { if(Arch > key.Arch) return false; - if(Syntax >= key.Syntax) - return false; + else if (Arch == key.Arch) { + if(Syntax > key.Syntax) + return false; + } return true; } }; From nlewycky at google.com Wed Feb 9 15:29:23 2011 From: nlewycky at google.com (Nick Lewycky) Date: Wed, 9 Feb 2011 13:29:23 -0800 Subject: [llvm-commits] [PATCH] [MC] .pushsection / .popsection support In-Reply-To: <20110209202852.GA10573@britannica.bec.de> References: <20110209202852.GA10573@britannica.bec.de> Message-ID: On 9 February 2011 12:28, Joerg Sonnenberger wrote: > Hi all, > attached patch is the initial support for .pushsection / .popsection. > To do this properly requires a change in the MCStreamer API. One > approach is attached. I think a better idea would be to split the > current SwitchSection() into two parts: the common code to manage > CurSection / PrevSection and a virtual function ChangeSection that gets > called if the new CurSection differs from the old one. There are a bunch > of bugs with the handling of changing to the current section again. > Why does this need a second SwitchSection method and why does it need to take the previous as an argument? Why not just take the current one, then switch to the new one? Also, did you check that a .s which consists entirely of ".previous" gives a nice error? GAS says: x.s:1: Warning: .previous without corresponding .section; ignored Nick -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110209/c99abcda/attachment.html From joerg at britannica.bec.de Wed Feb 9 15:40:37 2011 From: joerg at britannica.bec.de (Joerg Sonnenberger) Date: Wed, 9 Feb 2011 22:40:37 +0100 Subject: [llvm-commits] [PATCH] [MC] .pushsection / .popsection support In-Reply-To: References: <20110209202852.GA10573@britannica.bec.de> Message-ID: <20110209214037.GA14074@britannica.bec.de> On Wed, Feb 09, 2011 at 01:29:23PM -0800, Nick Lewycky wrote: > On 9 February 2011 12:28, Joerg Sonnenberger wrote: > > > Hi all, > > attached patch is the initial support for .pushsection / .popsection. > > To do this properly requires a change in the MCStreamer API. One > > approach is attached. I think a better idea would be to split the > > current SwitchSection() into two parts: the common code to manage > > CurSection / PrevSection and a virtual function ChangeSection that gets > > called if the new CurSection differs from the old one. There are a bunch > > of bugs with the handling of changing to the current section again. > > > > Why does this need a second SwitchSection method and why does it need to > take the previous as an argument? Why not just take the current one, then > switch to the new one? Because .popstack changes both the current and last section. More importantly, it can set the previous section to NULL, so it can't just be emulated with two calls to SwitchSection. Splitting the current SwitchSection would be cleaner and fix some issues as I mentioned. > Also, did you check that a .s which consists entirely of ".previous" gives a > nice error? GAS says: > x.s:1: Warning: .previous without corresponding .section; ignored I haven't touched .previous and don't plan to do it for this patch. It is an unrelated issue. Joerg From stoklund at 2pi.dk Wed Feb 9 15:52:04 2011 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Wed, 09 Feb 2011 21:52:04 -0000 Subject: [llvm-commits] [llvm] r125224 - in /llvm/trunk/lib/CodeGen: LiveIntervalUnion.cpp LiveIntervalUnion.h Message-ID: <20110209215204.2A6ED2A6C12C@llvm.org> Author: stoklund Date: Wed Feb 9 15:52:03 2011 New Revision: 125224 URL: http://llvm.org/viewvc/llvm-project?rev=125224&view=rev Log: Add tags to live interval unions to avoid using stale queries. The tag is updated whenever the live interval union is changed, and it is tested before using cached information. Modified: llvm/trunk/lib/CodeGen/LiveIntervalUnion.cpp llvm/trunk/lib/CodeGen/LiveIntervalUnion.h Modified: llvm/trunk/lib/CodeGen/LiveIntervalUnion.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalUnion.cpp?rev=125224&r1=125223&r2=125224&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LiveIntervalUnion.cpp (original) +++ llvm/trunk/lib/CodeGen/LiveIntervalUnion.cpp Wed Feb 9 15:52:03 2011 @@ -28,6 +28,7 @@ void LiveIntervalUnion::unify(LiveInterval &VirtReg) { if (VirtReg.empty()) return; + ++Tag; // Insert each of the virtual register's live segments into the map. LiveInterval::iterator RegPos = VirtReg.begin(); @@ -46,6 +47,7 @@ void LiveIntervalUnion::extract(LiveInterval &VirtReg) { if (VirtReg.empty()) return; + ++Tag; // Remove each of the virtual register's live segments from the map. LiveInterval::iterator RegPos = VirtReg.begin(); Modified: llvm/trunk/lib/CodeGen/LiveIntervalUnion.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalUnion.h?rev=125224&r1=125223&r2=125224&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LiveIntervalUnion.h (original) +++ llvm/trunk/lib/CodeGen/LiveIntervalUnion.h Wed Feb 9 15:52:03 2011 @@ -64,10 +64,12 @@ private: const unsigned RepReg; // representative register number + unsigned Tag; // unique tag for current contents. LiveSegments Segments; // union of virtual reg segments public: - LiveIntervalUnion(unsigned r, Allocator &a) : RepReg(r), Segments(a) {} + LiveIntervalUnion(unsigned r, Allocator &a) : RepReg(r), Tag(0), Segments(a) + {} // Iterate over all segments in the union of live virtual registers ordered // by their starting position. @@ -81,6 +83,12 @@ typedef LiveSegments Map; const Map &getMap() { return Segments; } + /// getTag - Return an opaque tag representing the current state of the union. + unsigned getTag() const { return Tag; } + + /// changedSince - Return true if the union change since getTag returned tag. + bool changedSince(unsigned tag) const { return tag != Tag; } + // Add a live virtual register to this union and merge its segments. void unify(LiveInterval &VirtReg); @@ -155,6 +163,7 @@ bool CheckedFirstInterference; bool SeenAllInterferences; bool SeenUnspillableVReg; + unsigned Tag; public: Query(): LiveUnion(), VirtReg() {} @@ -171,17 +180,19 @@ CheckedFirstInterference = false; SeenAllInterferences = false; SeenUnspillableVReg = false; + Tag = 0; } void init(LiveInterval *VReg, LiveIntervalUnion *LIU) { assert(VReg && LIU && "Invalid arguments"); - if (VirtReg == VReg && LiveUnion == LIU) { + if (VirtReg == VReg && LiveUnion == LIU && !LIU->changedSince(Tag)) { // Retain cached results, e.g. firstInterference. return; } clear(); LiveUnion = LIU; VirtReg = VReg; + Tag = LIU->getTag(); } LiveInterval &virtReg() const { From stoklund at 2pi.dk Wed Feb 9 15:52:06 2011 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Wed, 09 Feb 2011 21:52:06 -0000 Subject: [llvm-commits] [llvm] r125225 - /llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp Message-ID: <20110209215206.D7C8F2A6C12D@llvm.org> Author: stoklund Date: Wed Feb 9 15:52:06 2011 New Revision: 125225 URL: http://llvm.org/viewvc/llvm-project?rev=125225&view=rev Log: Assert on bad jump tables. Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp?rev=125225&r1=125224&r2=125225&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp (original) +++ llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp Wed Feb 9 15:52:06 2011 @@ -1033,6 +1033,7 @@ void AsmPrinter::EmitJumpTableEntry(const MachineJumpTableInfo *MJTI, const MachineBasicBlock *MBB, unsigned UID) const { + assert(MBB && MBB->getNumber() >= 0 && "Invalid basic block"); const MCExpr *Value = 0; switch (MJTI->getEntryKind()) { case MachineJumpTableInfo::EK_Inline: From stoklund at 2pi.dk Wed Feb 9 15:52:09 2011 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Wed, 09 Feb 2011 21:52:09 -0000 Subject: [llvm-commits] [llvm] r125226 - /llvm/trunk/lib/CodeGen/SplitKit.cpp Message-ID: <20110209215209.64EAD2A6C12E@llvm.org> Author: stoklund Date: Wed Feb 9 15:52:09 2011 New Revision: 125226 URL: http://llvm.org/viewvc/llvm-project?rev=125226&view=rev Log: Ignore uses when analyzing and rewriting. Modified: llvm/trunk/lib/CodeGen/SplitKit.cpp Modified: llvm/trunk/lib/CodeGen/SplitKit.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SplitKit.cpp?rev=125226&r1=125225&r2=125226&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SplitKit.cpp (original) +++ llvm/trunk/lib/CodeGen/SplitKit.cpp Wed Feb 9 15:52:09 2011 @@ -64,8 +64,12 @@ /// analyzeUses - Count instructions, basic blocks, and loops using CurLI. void SplitAnalysis::analyzeUses() { const MachineRegisterInfo &MRI = MF.getRegInfo(); - for (MachineRegisterInfo::reg_iterator I = MRI.reg_begin(CurLI->reg); - MachineInstr *MI = I.skipInstruction();) { + for (MachineRegisterInfo::reg_iterator I = MRI.reg_begin(CurLI->reg), + E = MRI.reg_end(); I != E; ++I) { + MachineOperand &MO = I.getOperand(); + if (MO.isUse() && MO.isUndef()) + continue; + MachineInstr *MI = MO.getParent(); if (MI->isDebugValue() || !UsingInstrs.insert(MI)) continue; UseSlots.push_back(LIS.getInstructionIndex(MI).getDefIndex()); @@ -918,6 +922,14 @@ MO.setReg(0); continue; } + + // operands don't really read the register, so just assign them to + // the complement. + if (MO.isUse() && MO.isUndef()) { + MO.setReg(Edit.get(0)->reg); + continue; + } + SlotIndex Idx = LIS.getInstructionIndex(MI); Idx = MO.isUse() ? Idx.getUseIndex() : Idx.getDefIndex(); From nadav.rotem at intel.com Wed Feb 9 15:56:55 2011 From: nadav.rotem at intel.com (Rotem, Nadav) Date: Wed, 9 Feb 2011 23:56:55 +0200 Subject: [llvm-commits] A patch fixing # 9173 In-Reply-To: <4D52BE4A.10103@free.fr> References: <6594DDFF12B03D4E89690887C24869940270CCA569@hasmsx504.ger.corp.intel.com> <4D52BE4A.10103@free.fr> Message-ID: <6594DDFF12B03D4E89690887C24869940270CCA661@hasmsx504.ger.corp.intel.com> Hi Duncan, Thank you for the quick review. I made the corrections and added two regression tests. Patch attached. Thanks, Nadav -----Original Message----- From: llvm-commits-bounces at cs.uiuc.edu [mailto:llvm-commits-bounces at cs.uiuc.edu] On Behalf Of Duncan Sands Sent: Wednesday, February 09, 2011 18:18 To: llvm-commits at cs.uiuc.edu Subject: Re: [llvm-commits] A patch fixing # 9173 Hi Nadav, @@ -132,11 +132,27 @@ if (const VectorType *SrcTy = dyn_cast(V->getType())) { assert(DestPTy->getBitWidth() == SrcTy->getBitWidth() && "Not cast between same sized vectors!"); - SrcTy = NULL; // First, check for null. Undef is already handled. if (isa(V)) return Constant::getNullValue(DestTy); + // In case of all-one vector, create a new all-one of dst type If you are only going to do this when the source is an all-ones vector then logic belongs in BitCastConstantVector. You could also handle the case when the source is an all-ones integer in which case at least that part belongs here. + if (ConstantVector* CV = dyn_cast(V)) { + bool AllOne = true; + for (unsigned int i=0; i< SrcTy->getNumElements() ; ++i) { + ConstantInt *ci = dyn_cast(CV->getOperand(i)); + if (! ci) { + AllOne = false; + break; + } + if (! ci->isAllOnesValue()) { + AllOne = false; + break; + } + } This test for all-ones can be replaced with: CV->isAllOnesValue() + if (AllOne) Constant::getAllOnesValue(DestPTy); Looks like you are missing the "return" keyword. @@ -694,15 +710,37 @@ if (isa(Cond)) return V1; if (V1 == V2) return V1; + if (Cond->isNullValue()) return V2; You could also check if CondV->isAllOnesValue() here and if so return V1. You could also replace the ConstantInt Cond check at the start of this method with something that checks isNullValue and isAllOnesValue. + + if (ConstantVector* CondV = dyn_cast(Cond)) { + const VectorType *VTy = CondV->getType(); + ConstantVector *CP1 = dyn_cast(V1); + ConstantVector *CP2 = dyn_cast(V2); + + if ((CP1 != NULL || isa(V1)) && + (CP2 != NULL || isa(V2))) { Is it possible for this check to fail? If not, it should be an assertion. + + const Type *EltTy = V1->getType(); + std::vector Res; You know the size that Res will be so you can reserve the right amount of space here. + for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) { + ConstantInt* c = dyn_cast(CondV->getOperand(i)); What if CondV->getOperand(i) is a ConstantExpr and not a ConstantInt? Then you will get null here and crash below doing c->getZExtValue(). + Constant *C1 = CP1 ? CP1->getOperand(i) : Constant::getNullValue(EltTy); + Constant *C2 = CP2 ? CP2->getOperand(i) : Constant::getNullValue(EltTy); + Res.push_back(c->getZExtValue() ? C1 : C2); + } + return ConstantVector::get(Res); + } + } + if (ConstantExpr *TrueVal = dyn_cast(V1)) { if (TrueVal->getOpcode() == Instruction::Select) if (TrueVal->getOperand(0) == Cond) - return ConstantExpr::getSelect(Cond, TrueVal->getOperand(1), V2); + return ConstantExpr::getSelect(Cond, TrueVal->getOperand(1), V2); What's the reason for changing this line? } if (ConstantExpr *FalseVal = dyn_cast(V2)) { if (FalseVal->getOpcode() == Instruction::Select) if (FalseVal->getOperand(0) == Cond) - return ConstantExpr::getSelect(Cond, V1, FalseVal->getOperand(2)); + return ConstantExpr::getSelect(Cond, V1, FalseVal->getOperand(2)); Likewise. Ciao, Duncan. _______________________________________________ llvm-commits mailing list llvm-commits at cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits --------------------------------------------------------------------- Intel Israel (74) Limited This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). Any review or distribution by others is strictly prohibited. If you are not the intended recipient, please contact the sender and delete all copies. -------------- next part -------------- A non-text attachment was scrubbed... Name: constant_fold_cast.diff Type: application/octet-stream Size: 4392 bytes Desc: constant_fold_cast.diff Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110209/cab4a367/attachment.obj From dgregor at apple.com Wed Feb 9 16:11:23 2011 From: dgregor at apple.com (Douglas Gregor) Date: Wed, 09 Feb 2011 22:11:23 -0000 Subject: [llvm-commits] [llvm] r125228 - in /llvm/trunk: include/llvm/Support/PathV2.h lib/Support/Unix/PathV2.inc Message-ID: <20110209221123.804C22A6C12C@llvm.org> Author: dgregor Date: Wed Feb 9 16:11:23 2011 New Revision: 125228 URL: http://llvm.org/viewvc/llvm-project?rev=125228&view=rev Log: Add llvm::sys::path::canonical(), which provides the canonicalized name of a path, after resolving symbolic links and eliminating excess path elements such as "foo/../" and "./". This routine still needs a Windows implementation, but I don't have a Windows machine available. Help? Please? Modified: llvm/trunk/include/llvm/Support/PathV2.h llvm/trunk/lib/Support/Unix/PathV2.inc Modified: llvm/trunk/include/llvm/Support/PathV2.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/PathV2.h?rev=125228&r1=125227&r2=125228&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/PathV2.h (original) +++ llvm/trunk/include/llvm/Support/PathV2.h Wed Feb 9 16:11:23 2011 @@ -244,6 +244,15 @@ /// @result The stem of \a path. const StringRef stem(StringRef path); +/// Convert path to a canonical form, resolving symbolic links and removing +/// unnecessary path elements (e.g., "foo/../", "./"). +/// +/// @param path A path that is going to be canonicalized by resolving symlinks +/// and removing unnecessary path elements (e.g., "./"). +/// +/// @param buffer The resulting canonical path. +void canonical(const char *path, SmallVectorImpl &result); + /// @brief Get extension. /// /// If filename contains a dot but not solely one or two dots, result is the Modified: llvm/trunk/lib/Support/Unix/PathV2.inc URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Unix/PathV2.inc?rev=125228&r1=125227&r2=125228&view=diff ============================================================================== --- llvm/trunk/lib/Support/Unix/PathV2.inc (original) +++ llvm/trunk/lib/Support/Unix/PathV2.inc Wed Feb 9 16:11:23 2011 @@ -503,5 +503,35 @@ } } // end namespace fs + +namespace path { + +void canonical(const char *path, SmallVectorImpl &buffer) { + buffer.resize(PATH_MAX); + char *result = realpath(path, buffer.data()); + if (result) { + buffer.resize(strlen(result)); + return; + } + + // A common extension is to support memory allocation of the result when + // passing NULL as the second argument. + result = realpath(path, 0); + if (result) { + size_t length = strlen(result); + buffer.resize(length); + memcpy(buffer.data(), result, length); + free(result); + return buffer.data(); + } + + size_t length = strlen(path); + buffer.resize(length); + memcpy(buffer.data(), path, length); + return path; +} + +} // end namespace path + } // end namespace sys } // end namespace llvm From enderby at apple.com Wed Feb 9 16:41:47 2011 From: enderby at apple.com (Kevin Enderby) Date: Wed, 9 Feb 2011 14:41:47 -0800 Subject: [llvm-commits] [llvm] r125228 - in /llvm/trunk: include/llvm/Support/PathV2.h lib/Support/Unix/PathV2.inc In-Reply-To: <20110209221123.804C22A6C12C@llvm.org> References: <20110209221123.804C22A6C12C@llvm.org> Message-ID: <237969C7-5157-4DBB-90B4-0EAAAB7A3EED@apple.com> Hi Doug, Looks like two of the returns with arguments are causing problems for the build bots: /Users/buildslave/zorg/buildbot/smooshlab/slave/build.llvm-gcc-i386-darwin9/llvm.src/lib/Support/Unix/PathV2.inc: In function 'void llvm::sys::path::canonical(const char*, llvm::SmallVectorImpl&)': /Users/buildslave/zorg/buildbot/smooshlab/slave/build.llvm-gcc-i386-darwin9/llvm.src/lib/Support/Unix/PathV2.inc:525: error: return-statement with a value, in function returning 'void' /Users/buildslave/zorg/buildbot/smooshlab/slave/build.llvm-gcc-i386-darwin9/llvm.src/lib/Support/Unix/PathV2.inc:531: error: return-statement with a value, in function returning 'void' On Feb 9, 2011, at 2:11 PM, Douglas Gregor wrote: > Author: dgregor > Date: Wed Feb 9 16:11:23 2011 > New Revision: 125228 > > URL: http://llvm.org/viewvc/llvm-project?rev=125228&view=rev > Log: > Add llvm::sys::path::canonical(), which provides the canonicalized > name of a path, after resolving symbolic links and eliminating excess > path elements such as "foo/../" and "./". > > This routine still needs a Windows implementation, but I don't have a > Windows machine available. Help? Please? > > Modified: > llvm/trunk/include/llvm/Support/PathV2.h > llvm/trunk/lib/Support/Unix/PathV2.inc > > Modified: llvm/trunk/include/llvm/Support/PathV2.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/PathV2.h?rev=125228&r1=125227&r2=125228&view=diff > ============================================================================== > --- llvm/trunk/include/llvm/Support/PathV2.h (original) > +++ llvm/trunk/include/llvm/Support/PathV2.h Wed Feb 9 16:11:23 2011 > @@ -244,6 +244,15 @@ > /// @result The stem of \a path. > const StringRef stem(StringRef path); > > +/// Convert path to a canonical form, resolving symbolic links and removing > +/// unnecessary path elements (e.g., "foo/../", "./"). > +/// > +/// @param path A path that is going to be canonicalized by resolving symlinks > +/// and removing unnecessary path elements (e.g., "./"). > +/// > +/// @param buffer The resulting canonical path. > +void canonical(const char *path, SmallVectorImpl &result); > + > /// @brief Get extension. > /// > /// If filename contains a dot but not solely one or two dots, result is the > > Modified: llvm/trunk/lib/Support/Unix/PathV2.inc > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Unix/PathV2.inc?rev=125228&r1=125227&r2=125228&view=diff > ============================================================================== > --- llvm/trunk/lib/Support/Unix/PathV2.inc (original) > +++ llvm/trunk/lib/Support/Unix/PathV2.inc Wed Feb 9 16:11:23 2011 > @@ -503,5 +503,35 @@ > } > > } // end namespace fs > + > +namespace path { > + > +void canonical(const char *path, SmallVectorImpl &buffer) { > + buffer.resize(PATH_MAX); > + char *result = realpath(path, buffer.data()); > + if (result) { > + buffer.resize(strlen(result)); > + return; > + } > + > + // A common extension is to support memory allocation of the result when > + // passing NULL as the second argument. > + result = realpath(path, 0); > + if (result) { > + size_t length = strlen(result); > + buffer.resize(length); > + memcpy(buffer.data(), result, length); > + free(result); > + return buffer.data(); > + } > + > + size_t length = strlen(path); > + buffer.resize(length); > + memcpy(buffer.data(), path, length); > + return path; > +} > + > +} // end namespace path > + > } // end namespace sys > } // end namespace llvm > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110209/27aa64fa/attachment.html From stoklund at 2pi.dk Wed Feb 9 16:50:26 2011 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Wed, 09 Feb 2011 22:50:26 -0000 Subject: [llvm-commits] [llvm] r125231 - in /llvm/trunk: include/llvm/CodeGen/LiveIntervalAnalysis.h lib/CodeGen/LiveIntervalAnalysis.cpp lib/CodeGen/RegAllocGreedy.cpp lib/CodeGen/SplitKit.cpp lib/CodeGen/SplitKit.h Message-ID: <20110209225026.C1E502A6C12C@llvm.org> Author: stoklund Date: Wed Feb 9 16:50:26 2011 New Revision: 125231 URL: http://llvm.org/viewvc/llvm-project?rev=125231&view=rev Log: Move calcLiveBlockInfo() and the BlockInfo struct into SplitAnalysis. No functional changes intended. Modified: llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp llvm/trunk/lib/CodeGen/SplitKit.cpp llvm/trunk/lib/CodeGen/SplitKit.h Modified: llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h?rev=125231&r1=125230&r2=125231&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h (original) +++ llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h Wed Feb 9 16:50:26 2011 @@ -318,7 +318,7 @@ /// spilling and splitting code. This is the first terminator, or the call /// instruction if li is live into a landing pad successor. MachineBasicBlock::iterator getLastSplitPoint(const LiveInterval &li, - MachineBasicBlock *mbb); + MachineBasicBlock *mbb) const; /// addKillFlags - Add kill flags to any instruction that kills a virtual /// register. Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=125231&r1=125230&r2=125231&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original) +++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Wed Feb 9 16:50:26 2011 @@ -870,7 +870,7 @@ MachineBasicBlock::iterator LiveIntervals::getLastSplitPoint(const LiveInterval &li, - MachineBasicBlock *mbb) { + MachineBasicBlock *mbb) const { const MachineBasicBlock *lpad = mbb->getLandingPadSuccessor(); // If li is not live into a landing pad, we can insert spill code before the Modified: llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp?rev=125231&r1=125230&r2=125231&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp (original) +++ llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp Wed Feb 9 16:50:26 2011 @@ -72,38 +72,6 @@ /// All basic blocks where the current register is live. SmallVector SpillConstraints; - /// Additional information about basic blocks where the current variable is - /// live. Such a block will look like one of these templates: - /// - /// 1. | o---x | Internal to block. Variable is only live in this block. - /// 2. |---x | Live-in, kill. - /// 3. | o---| Def, live-out. - /// 4. |---x o---| Live-in, kill, def, live-out. - /// 5. |---o---o---| Live-through with uses or defs. - /// 6. |-----------| Live-through without uses. Transparent. - /// - struct BlockInfo { - MachineBasicBlock *MBB; - SlotIndex FirstUse; ///< First instr using current reg. - SlotIndex LastUse; ///< Last instr using current reg. - SlotIndex Kill; ///< Interval end point inside block. - SlotIndex Def; ///< Interval start point inside block. - /// Last possible point for splitting live ranges. - SlotIndex LastSplitPoint; - bool Uses; ///< Current reg has uses or defs in block. - bool LiveThrough; ///< Live in whole block (Templ 5. or 6. above). - bool LiveIn; ///< Current reg is live in. - bool LiveOut; ///< Current reg is live out. - - // Per-interference pattern scratch data. - bool OverlapEntry; ///< Interference overlaps entering interval. - bool OverlapExit; ///< Interference overlaps exiting interval. - }; - - /// Basic blocks where var is live. This array is parallel to - /// SpillConstraints. - SmallVector LiveBlocks; - public: RAGreedy(); @@ -134,7 +102,6 @@ LiveInterval *getSingleInterference(LiveInterval&, unsigned); bool reassignVReg(LiveInterval &InterferingVReg, unsigned OldPhysReg); float calcInterferenceWeight(LiveInterval&, unsigned); - void calcLiveBlockInfo(LiveInterval&); float calcInterferenceInfo(LiveInterval&, unsigned); float calcGlobalSplitCost(const BitVector&); void splitAroundRegion(LiveInterval&, unsigned, const BitVector&, @@ -342,98 +309,6 @@ // Region Splitting //===----------------------------------------------------------------------===// -/// calcLiveBlockInfo - Fill the LiveBlocks array with information about blocks -/// where VirtReg is live. -/// The SpillConstraints array is minimally initialized with MBB->getNumber(). -void RAGreedy::calcLiveBlockInfo(LiveInterval &VirtReg) { - LiveBlocks.clear(); - SpillConstraints.clear(); - - assert(!VirtReg.empty() && "Cannot allocate an empty interval"); - LiveInterval::const_iterator LVI = VirtReg.begin(); - LiveInterval::const_iterator LVE = VirtReg.end(); - - SmallVectorImpl::const_iterator UseI, UseE; - UseI = SA->UseSlots.begin(); - UseE = SA->UseSlots.end(); - - // Loop over basic blocks where VirtReg is live. - MachineFunction::iterator MFI = Indexes->getMBBFromIndex(LVI->start); - for (;;) { - // Block constraints depend on the interference pattern. - // Just allocate them here, don't compute anything. - SpillPlacement::BlockConstraint BC; - BC.Number = MFI->getNumber(); - SpillConstraints.push_back(BC); - - BlockInfo BI; - BI.MBB = MFI; - SlotIndex Start, Stop; - tie(Start, Stop) = Indexes->getMBBRange(BI.MBB); - - // The last split point is the latest possible insertion point that dominates - // all successor blocks. If interference reaches LastSplitPoint, it is not - // possible to insert a split or reload that makes VirtReg live in the - // outgoing bundle. - MachineBasicBlock::iterator LSP = LIS->getLastSplitPoint(VirtReg, BI.MBB); - if (LSP == BI.MBB->end()) - BI.LastSplitPoint = Stop; - else - BI.LastSplitPoint = Indexes->getInstructionIndex(LSP); - - // LVI is the first live segment overlapping MBB. - BI.LiveIn = LVI->start <= Start; - if (!BI.LiveIn) - BI.Def = LVI->start; - - // Find the first and last uses in the block. - BI.Uses = SA->hasUses(MFI); - if (BI.Uses && UseI != UseE) { - BI.FirstUse = *UseI; - assert(BI.FirstUse >= Start); - do ++UseI; - while (UseI != UseE && *UseI < Stop); - BI.LastUse = UseI[-1]; - assert(BI.LastUse < Stop); - } - - // Look for gaps in the live range. - bool hasGap = false; - BI.LiveOut = true; - while (LVI->end < Stop) { - SlotIndex LastStop = LVI->end; - if (++LVI == LVE || LVI->start >= Stop) { - BI.Kill = LastStop; - BI.LiveOut = false; - break; - } - if (LastStop < LVI->start) { - hasGap = true; - BI.Kill = LastStop; - BI.Def = LVI->start; - } - } - - // Don't set LiveThrough when the block has a gap. - BI.LiveThrough = !hasGap && BI.LiveIn && BI.LiveOut; - LiveBlocks.push_back(BI); - - // LVI is now at LVE or LVI->end >= Stop. - if (LVI == LVE) - break; - - // Live segment ends exactly at Stop. Move to the next segment. - if (LVI->end == Stop && ++LVI == LVE) - break; - - // Pick the next basic block. - if (LVI->start < Stop) - ++MFI; - else - MFI = Indexes->getMBBFromIndex(LVI->start); - } -} - /// calcInterferenceInfo - Compute per-block outgoing and ingoing constraints /// when considering interference from PhysReg. Also compute an optimistic local /// cost of this interference pattern. @@ -443,9 +318,11 @@ /// float RAGreedy::calcInterferenceInfo(LiveInterval &VirtReg, unsigned PhysReg) { // Reset interference dependent info. - for (unsigned i = 0, e = LiveBlocks.size(); i != e; ++i) { - BlockInfo &BI = LiveBlocks[i]; + SpillConstraints.resize(SA->LiveBlocks.size()); + for (unsigned i = 0, e = SA->LiveBlocks.size(); i != e; ++i) { + SplitAnalysis::BlockInfo &BI = SA->LiveBlocks[i]; SpillPlacement::BlockConstraint &BC = SpillConstraints[i]; + BC.Number = BI.MBB->getNumber(); BC.Entry = (BI.Uses && BI.LiveIn) ? SpillPlacement::PrefReg : SpillPlacement::DontCare; BC.Exit = (BI.Uses && BI.LiveOut) ? @@ -464,8 +341,8 @@ // Determine which blocks have interference live in or after the last split // point. - for (unsigned i = 0, e = LiveBlocks.size(); i != e; ++i) { - BlockInfo &BI = LiveBlocks[i]; + for (unsigned i = 0, e = SA->LiveBlocks.size(); i != e; ++i) { + SplitAnalysis::BlockInfo &BI = SA->LiveBlocks[i]; SpillPlacement::BlockConstraint &BC = SpillConstraints[i]; SlotIndex Start, Stop; tie(Start, Stop) = Indexes->getMBBRange(BI.MBB); @@ -496,8 +373,8 @@ // Rewind iterator and check other interferences. IntI.find(VirtReg.beginIndex()); - for (unsigned i = 0, e = LiveBlocks.size(); i != e; ++i) { - BlockInfo &BI = LiveBlocks[i]; + for (unsigned i = 0, e = SA->LiveBlocks.size(); i != e; ++i) { + SplitAnalysis::BlockInfo &BI = SA->LiveBlocks[i]; SpillPlacement::BlockConstraint &BC = SpillConstraints[i]; SlotIndex Start, Stop; tie(Start, Stop) = Indexes->getMBBRange(BI.MBB); @@ -573,8 +450,8 @@ // Accumulate a local cost of this interference pattern. float LocalCost = 0; - for (unsigned i = 0, e = LiveBlocks.size(); i != e; ++i) { - BlockInfo &BI = LiveBlocks[i]; + for (unsigned i = 0, e = SA->LiveBlocks.size(); i != e; ++i) { + SplitAnalysis::BlockInfo &BI = SA->LiveBlocks[i]; if (!BI.Uses) continue; SpillPlacement::BlockConstraint &BC = SpillConstraints[i]; @@ -604,7 +481,7 @@ /// float RAGreedy::calcGlobalSplitCost(const BitVector &LiveBundles) { float GlobalCost = 0; - for (unsigned i = 0, e = LiveBlocks.size(); i != e; ++i) { + for (unsigned i = 0, e = SpillConstraints.size(); i != e; ++i) { SpillPlacement::BlockConstraint &BC = SpillConstraints[i]; unsigned Inserts = 0; // Broken entry preference? @@ -614,7 +491,8 @@ Inserts += LiveBundles[Bundles->getBundle(BC.Number, 1)] != (BC.Exit == SpillPlacement::PrefReg); if (Inserts) - GlobalCost += Inserts * SpillPlacer->getBlockFrequency(LiveBlocks[i].MBB); + GlobalCost += + Inserts * SpillPlacer->getBlockFrequency(SA->LiveBlocks[i].MBB); } DEBUG(dbgs() << "Global cost = " << GlobalCost << '\n'); return GlobalCost; @@ -641,7 +519,7 @@ // First compute interference ranges in the live blocks. typedef std::pair IndexPair; SmallVector InterferenceRanges; - InterferenceRanges.resize(LiveBlocks.size()); + InterferenceRanges.resize(SA->LiveBlocks.size()); for (const unsigned *AI = TRI->getOverlaps(PhysReg); *AI; ++AI) { if (!query(VirtReg, *AI).checkInterference()) continue; @@ -649,8 +527,8 @@ PhysReg2LiveUnion[*AI].find(VirtReg.beginIndex()); if (!IntI.valid()) continue; - for (unsigned i = 0, e = LiveBlocks.size(); i != e; ++i) { - const BlockInfo &BI = LiveBlocks[i]; + for (unsigned i = 0, e = SA->LiveBlocks.size(); i != e; ++i) { + const SplitAnalysis::BlockInfo &BI = SA->LiveBlocks[i]; IndexPair &IP = InterferenceRanges[i]; SlotIndex Start, Stop; tie(Start, Stop) = Indexes->getMBBRange(BI.MBB); @@ -690,8 +568,8 @@ SE.openIntv(); // First add all defs that are live out of a block. - for (unsigned i = 0, e = LiveBlocks.size(); i != e; ++i) { - BlockInfo &BI = LiveBlocks[i]; + for (unsigned i = 0, e = SA->LiveBlocks.size(); i != e; ++i) { + SplitAnalysis::BlockInfo &BI = SA->LiveBlocks[i]; bool RegIn = LiveBundles[Bundles->getBundle(BI.MBB->getNumber(), 0)]; bool RegOut = LiveBundles[Bundles->getBundle(BI.MBB->getNumber(), 1)]; @@ -786,8 +664,8 @@ } // Now all defs leading to live bundles are handled, do everything else. - for (unsigned i = 0, e = LiveBlocks.size(); i != e; ++i) { - BlockInfo &BI = LiveBlocks[i]; + for (unsigned i = 0, e = SA->LiveBlocks.size(); i != e; ++i) { + SplitAnalysis::BlockInfo &BI = SA->LiveBlocks[i]; bool RegIn = LiveBundles[Bundles->getBundle(BI.MBB->getNumber(), 0)]; bool RegOut = LiveBundles[Bundles->getBundle(BI.MBB->getNumber(), 1)]; @@ -926,7 +804,6 @@ unsigned RAGreedy::tryRegionSplit(LiveInterval &VirtReg, AllocationOrder &Order, SmallVectorImpl &NewVRegs) { - calcLiveBlockInfo(VirtReg); BitVector LiveBundles, BestBundles; float BestCost = 0; unsigned BestReg = 0; Modified: llvm/trunk/lib/CodeGen/SplitKit.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SplitKit.cpp?rev=125231&r1=125230&r2=125231&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SplitKit.cpp (original) +++ llvm/trunk/lib/CodeGen/SplitKit.cpp Wed Feb 9 16:50:26 2011 @@ -52,6 +52,7 @@ UsingInstrs.clear(); UsingBlocks.clear(); UsingLoops.clear(); + LiveBlocks.clear(); CurLI = 0; } @@ -81,12 +82,97 @@ UsingLoops[Loop]++; } array_pod_sort(UseSlots.begin(), UseSlots.end()); + calcLiveBlockInfo(); DEBUG(dbgs() << " counted " << UsingInstrs.size() << " instrs, " << UsingBlocks.size() << " blocks, " << UsingLoops.size() << " loops.\n"); } +/// calcLiveBlockInfo - Fill the LiveBlocks array with information about blocks +/// where CurLI is live. +void SplitAnalysis::calcLiveBlockInfo() { + if (CurLI->empty()) + return; + + LiveInterval::const_iterator LVI = CurLI->begin(); + LiveInterval::const_iterator LVE = CurLI->end(); + + SmallVectorImpl::const_iterator UseI, UseE; + UseI = UseSlots.begin(); + UseE = UseSlots.end(); + + // Loop over basic blocks where CurLI is live. + MachineFunction::iterator MFI = LIS.getMBBFromIndex(LVI->start); + for (;;) { + BlockInfo BI; + BI.MBB = MFI; + SlotIndex Start, Stop; + tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB); + + // The last split point is the latest possible insertion point that dominates + // all successor blocks. If interference reaches LastSplitPoint, it is not + // possible to insert a split or reload that makes CurLI live in the + // outgoing bundle. + MachineBasicBlock::iterator LSP = LIS.getLastSplitPoint(*CurLI, BI.MBB); + if (LSP == BI.MBB->end()) + BI.LastSplitPoint = Stop; + else + BI.LastSplitPoint = LIS.getInstructionIndex(LSP); + + // LVI is the first live segment overlapping MBB. + BI.LiveIn = LVI->start <= Start; + if (!BI.LiveIn) + BI.Def = LVI->start; + + // Find the first and last uses in the block. + BI.Uses = hasUses(MFI); + if (BI.Uses && UseI != UseE) { + BI.FirstUse = *UseI; + assert(BI.FirstUse >= Start); + do ++UseI; + while (UseI != UseE && *UseI < Stop); + BI.LastUse = UseI[-1]; + assert(BI.LastUse < Stop); + } + + // Look for gaps in the live range. + bool hasGap = false; + BI.LiveOut = true; + while (LVI->end < Stop) { + SlotIndex LastStop = LVI->end; + if (++LVI == LVE || LVI->start >= Stop) { + BI.Kill = LastStop; + BI.LiveOut = false; + break; + } + if (LastStop < LVI->start) { + hasGap = true; + BI.Kill = LastStop; + BI.Def = LVI->start; + } + } + + // Don't set LiveThrough when the block has a gap. + BI.LiveThrough = !hasGap && BI.LiveIn && BI.LiveOut; + LiveBlocks.push_back(BI); + + // LVI is now at LVE or LVI->end >= Stop. + if (LVI == LVE) + break; + + // Live segment ends exactly at Stop. Move to the next segment. + if (LVI->end == Stop && ++LVI == LVE) + break; + + // Pick the next basic block. + if (LVI->start < Stop) + ++MFI; + else + MFI = LIS.getMBBFromIndex(LVI->start); + } +} + void SplitAnalysis::print(const BlockPtrSet &B, raw_ostream &OS) const { for (BlockPtrSet::const_iterator I = B.begin(), E = B.end(); I != E; ++I) { unsigned count = UsingBlocks.lookup(*I); Modified: llvm/trunk/lib/CodeGen/SplitKit.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SplitKit.h?rev=125231&r1=125230&r2=125231&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SplitKit.h (original) +++ llvm/trunk/lib/CodeGen/SplitKit.h Wed Feb 9 16:50:26 2011 @@ -63,6 +63,38 @@ typedef DenseMap LoopCountMap; LoopCountMap UsingLoops; + /// Additional information about basic blocks where the current variable is + /// live. Such a block will look like one of these templates: + /// + /// 1. | o---x | Internal to block. Variable is only live in this block. + /// 2. |---x | Live-in, kill. + /// 3. | o---| Def, live-out. + /// 4. |---x o---| Live-in, kill, def, live-out. + /// 5. |---o---o---| Live-through with uses or defs. + /// 6. |-----------| Live-through without uses. Transparent. + /// + struct BlockInfo { + MachineBasicBlock *MBB; + SlotIndex FirstUse; ///< First instr using current reg. + SlotIndex LastUse; ///< Last instr using current reg. + SlotIndex Kill; ///< Interval end point inside block. + SlotIndex Def; ///< Interval start point inside block. + /// Last possible point for splitting live ranges. + SlotIndex LastSplitPoint; + bool Uses; ///< Current reg has uses or defs in block. + bool LiveThrough; ///< Live in whole block (Templ 5. or 6. above). + bool LiveIn; ///< Current reg is live in. + bool LiveOut; ///< Current reg is live out. + + // Per-interference pattern scratch data. + bool OverlapEntry; ///< Interference overlaps entering interval. + bool OverlapExit; ///< Interference overlaps exiting interval. + }; + + /// Basic blocks where var is live. This array is parallel to + /// SpillConstraints. + SmallVector LiveBlocks; + private: // Current live interval. const LiveInterval *CurLI; @@ -70,6 +102,9 @@ // Sumarize statistics by counting instructions using CurLI. void analyzeUses(); + /// calcLiveBlockInfo - Compute per-block information about CurLI. + void calcLiveBlockInfo(); + /// canAnalyzeBranch - Return true if MBB ends in a branch that can be /// analyzed. bool canAnalyzeBranch(const MachineBasicBlock *MBB); From foldr at codedgers.com Wed Feb 9 16:55:48 2011 From: foldr at codedgers.com (Mikhail Glushenkov) Date: Wed, 09 Feb 2011 22:55:48 -0000 Subject: [llvm-commits] [llvm] r125232 - /llvm/trunk/lib/CodeGen/CriticalAntiDepBreaker.h Message-ID: <20110209225548.B3D672A6C12C@llvm.org> Author: foldr Date: Wed Feb 9 16:55:48 2011 New Revision: 125232 URL: http://llvm.org/viewvc/llvm-project?rev=125232&view=rev Log: Typo. Modified: llvm/trunk/lib/CodeGen/CriticalAntiDepBreaker.h Modified: llvm/trunk/lib/CodeGen/CriticalAntiDepBreaker.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/CriticalAntiDepBreaker.h?rev=125232&r1=125231&r2=125232&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/CriticalAntiDepBreaker.h (original) +++ llvm/trunk/lib/CodeGen/CriticalAntiDepBreaker.h Wed Feb 9 16:55:48 2011 @@ -48,7 +48,7 @@ /// pointer. std::vector Classes; - /// RegRegs - Map registers to all their references within a live range. + /// RegRefs - Map registers to all their references within a live range. std::multimap RegRefs; typedef std::multimap::const_iterator RegRefIter; From daniel at zuster.org Wed Feb 9 16:55:55 2011 From: daniel at zuster.org (Daniel Dunbar) Date: Wed, 09 Feb 2011 22:55:55 -0000 Subject: [llvm-commits] [zorg] r125233 - /zorg/trunk/lnt/lnt/util/ImportData.py Message-ID: <20110209225555.BBBA02A6C12C@llvm.org> Author: ddunbar Date: Wed Feb 9 16:55:55 2011 New Revision: 125233 URL: http://llvm.org/viewvc/llvm-project?rev=125233&view=rev Log: LNT/ImportData: Allow import to function without a config object. Modified: zorg/trunk/lnt/lnt/util/ImportData.py Modified: zorg/trunk/lnt/lnt/util/ImportData.py URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/lnt/lnt/util/ImportData.py?rev=125233&r1=125232&r2=125233&view=diff ============================================================================== --- zorg/trunk/lnt/lnt/util/ImportData.py (original) +++ zorg/trunk/lnt/lnt/util/ImportData.py Wed Feb 9 16:55:55 2011 @@ -47,7 +47,7 @@ # Find the email address for this machine's results. toAddress = email_config = None - if not disable_email: + if config and not disable_email: email_config = config.databases[db_name].email_config if email_config.enabled: # Find the machine name. @@ -75,8 +75,11 @@ reportStartTime = time.time() result['report_to_address'] = toAddress - NTEmailReport.emailReport(result, db, run, - "%s/db_%s/" % (config.zorgURL, db_name), + if config: + report_url = "%s/db_%s/" % (config.zorgURL, db_name) + else: + report_url = 'localhost' + NTEmailReport.emailReport(result, db, run, report_url, email_config, toAddress, success, commit) result['added_machines'] = db.getNumMachines() - numMachines From daniel at zuster.org Wed Feb 9 16:55:58 2011 From: daniel at zuster.org (Daniel Dunbar) Date: Wed, 09 Feb 2011 22:55:58 -0000 Subject: [llvm-commits] [zorg] r125234 - /zorg/trunk/lnt/lnt/lnttool/__init__.py Message-ID: <20110209225558.2A8B72A6C12D@llvm.org> Author: ddunbar Date: Wed Feb 9 16:55:57 2011 New Revision: 125234 URL: http://llvm.org/viewvc/llvm-project?rev=125234&view=rev Log: LNT/runtest: Allow 'lnt runtest' to still generate reports even when a server is not in use by creating an in memory instance and "submitting" to that. Modified: zorg/trunk/lnt/lnt/lnttool/__init__.py Modified: zorg/trunk/lnt/lnt/lnttool/__init__.py URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/lnt/lnt/lnttool/__init__.py?rev=125234&r1=125233&r2=125234&view=diff ============================================================================== --- zorg/trunk/lnt/lnt/lnttool/__init__.py (original) +++ zorg/trunk/lnt/lnt/lnttool/__init__.py Wed Feb 9 16:55:57 2011 @@ -132,6 +132,24 @@ from lnt.util import ServerUtil io = StringIO.StringIO(report.render(indent=None)) ServerUtil.submitFile(opts.submit_url, io, True, opts.verbose) + else: + # Simulate a submission to retrieve the results report. + import lnt.viewer + from lnt.util import ImportData + import tempfile + + # Save the report to a temporary file. + tmp = tempfile.NamedTemporaryFile(suffix='.json') + print >>tmp, report.render() + tmp.flush() + + # Construct a temporary database and import the result. + db = lnt.viewer.PerfDB.PerfDB("sqlite:///:memory:") + result = ImportData.import_and_report( + None, None, db, tmp.name, 'json', commit = True) + ImportData.print_report_result(result, sys.stdout, opts.verbose) + + tmp.close() def action_showtests(name, args): """show the available built-in tests""" From zwarich at apple.com Wed Feb 9 17:02:15 2011 From: zwarich at apple.com (Cameron Zwarich) Date: Wed, 09 Feb 2011 23:02:15 -0000 Subject: [llvm-commits] [llvm] r125236 - /llvm/trunk/lib/Support/Unix/PathV2.inc Message-ID: <20110209230215.2D3012A6C12C@llvm.org> Author: zwarich Date: Wed Feb 9 17:02:14 2011 New Revision: 125236 URL: http://llvm.org/viewvc/llvm-project?rev=125236&view=rev Log: Attempt to fix the build after r125228. Modified: llvm/trunk/lib/Support/Unix/PathV2.inc Modified: llvm/trunk/lib/Support/Unix/PathV2.inc URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Unix/PathV2.inc?rev=125236&r1=125235&r2=125236&view=diff ============================================================================== --- llvm/trunk/lib/Support/Unix/PathV2.inc (original) +++ llvm/trunk/lib/Support/Unix/PathV2.inc Wed Feb 9 17:02:14 2011 @@ -522,13 +522,13 @@ buffer.resize(length); memcpy(buffer.data(), result, length); free(result); - return buffer.data(); + return; } size_t length = strlen(path); buffer.resize(length); memcpy(buffer.data(), path, length); - return path; + return; } } // end namespace path From zwarich at apple.com Wed Feb 9 17:07:08 2011 From: zwarich at apple.com (Cameron Zwarich) Date: Wed, 9 Feb 2011 15:07:08 -0800 Subject: [llvm-commits] [llvm] r125228 - in /llvm/trunk: include/llvm/Support/PathV2.h lib/Support/Unix/PathV2.inc In-Reply-To: <237969C7-5157-4DBB-90B4-0EAAAB7A3EED@apple.com> References: <20110209221123.804C22A6C12C@llvm.org> <237969C7-5157-4DBB-90B4-0EAAAB7A3EED@apple.com> Message-ID: <8518386B-CFC6-4696-B3E4-2456F1E59169@apple.com> I did the obvious thing to fix this in r125236. On Feb 9, 2011, at 2:41 PM, Kevin Enderby wrote: > Hi Doug, > > Looks like two of the returns with arguments are causing problems for the build bots: > > /Users/buildslave/zorg/buildbot/smooshlab/slave/build.llvm-gcc-i386-darwin9/llvm.src/lib/Support/Unix/PathV2.inc: In function 'void llvm::sys::path::canonical(const char*, llvm::SmallVectorImpl&)': > /Users/buildslave/zorg/buildbot/smooshlab/slave/build.llvm-gcc-i386-darwin9/llvm.src/lib/Support/Unix/PathV2.inc:525: error: return-statement with a value, in function returning 'void' > /Users/buildslave/zorg/buildbot/smooshlab/slave/build.llvm-gcc-i386-darwin9/llvm.src/lib/Support/Unix/PathV2.inc:531: error: return-statement with a value, in function returning 'void' > On Feb 9, 2011, at 2:11 PM, Douglas Gregor wrote: > >> Author: dgregor >> Date: Wed Feb 9 16:11:23 2011 >> New Revision: 125228 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=125228&view=rev >> Log: >> Add llvm::sys::path::canonical(), which provides the canonicalized >> name of a path, after resolving symbolic links and eliminating excess >> path elements such as "foo/../" and "./". >> >> This routine still needs a Windows implementation, but I don't have a >> Windows machine available. Help? Please? >> >> Modified: >> llvm/trunk/include/llvm/Support/PathV2.h >> llvm/trunk/lib/Support/Unix/PathV2.inc >> >> Modified: llvm/trunk/include/llvm/Support/PathV2.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/PathV2.h?rev=125228&r1=125227&r2=125228&view=diff >> ============================================================================== >> --- llvm/trunk/include/llvm/Support/PathV2.h (original) >> +++ llvm/trunk/include/llvm/Support/PathV2.h Wed Feb 9 16:11:23 2011 >> @@ -244,6 +244,15 @@ >> /// @result The stem of \a path. >> const StringRef stem(StringRef path); >> >> +/// Convert path to a canonical form, resolving symbolic links and removing >> +/// unnecessary path elements (e.g., "foo/../", "./"). >> +/// >> +/// @param path A path that is going to be canonicalized by resolving symlinks >> +/// and removing unnecessary path elements (e.g., "./"). >> +/// >> +/// @param buffer The resulting canonical path. >> +void canonical(const char *path, SmallVectorImpl &result); >> + >> /// @brief Get extension. >> /// >> /// If filename contains a dot but not solely one or two dots, result is the >> >> Modified: llvm/trunk/lib/Support/Unix/PathV2.inc >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Unix/PathV2.inc?rev=125228&r1=125227&r2=125228&view=diff >> ============================================================================== >> --- llvm/trunk/lib/Support/Unix/PathV2.inc (original) >> +++ llvm/trunk/lib/Support/Unix/PathV2.inc Wed Feb 9 16:11:23 2011 >> @@ -503,5 +503,35 @@ >> } >> >> } // end namespace fs >> + >> +namespace path { >> + >> +void canonical(const char *path, SmallVectorImpl &buffer) { >> + buffer.resize(PATH_MAX); >> + char *result = realpath(path, buffer.data()); >> + if (result) { >> + buffer.resize(strlen(result)); >> + return; >> + } >> + >> + // A common extension is to support memory allocation of the result when >> + // passing NULL as the second argument. >> + result = realpath(path, 0); >> + if (result) { >> + size_t length = strlen(result); >> + buffer.resize(length); >> + memcpy(buffer.data(), result, length); >> + free(result); >> + return buffer.data(); >> + } >> + >> + size_t length = strlen(path); >> + buffer.resize(length); >> + memcpy(buffer.data(), path, length); >> + return path; >> +} >> + >> +} // end namespace path >> + >> } // end namespace sys >> } // end namespace llvm >> >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110209/6e0bcd1b/attachment.html From undingen at gmail.com Wed Feb 9 17:25:25 2011 From: undingen at gmail.com (Marius Wachtler) Date: Thu, 10 Feb 2011 00:25:25 +0100 Subject: [llvm-commits] [llvm] r125228 - in /llvm/trunk: include/llvm/Support/PathV2.h lib/Support/Unix/PathV2.inc In-Reply-To: <8518386B-CFC6-4696-B3E4-2456F1E59169@apple.com> References: <20110209221123.804C22A6C12C@llvm.org> <237969C7-5157-4DBB-90B4-0EAAAB7A3EED@apple.com> <8518386B-CFC6-4696-B3E4-2456F1E59169@apple.com> Message-ID: Hello I think something like this should work for windows: void canonical(const char *path, SmallVectorImpl &buffer) { buffer.resize(MAX_PATH); if (PathCanonicalize(buffer.data(), path)) { buffer.resize(strlen(buffer.data())+1); } } But the problem is this adds an additional dependency on the "shlwapi.lib" library. I dont't know if this is okay that's way I haven't attached a full patch... Another thing shouldn't the resize be length+1 to include the null character? >size_t length = strlen(result); >buffer.resize(length) -- Marius From stoklund at 2pi.dk Wed Feb 9 17:30:25 2011 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Wed, 09 Feb 2011 23:30:25 -0000 Subject: [llvm-commits] [llvm] r125237 - in /llvm/trunk/lib/CodeGen: SplitKit.cpp SplitKit.h Message-ID: <20110209233025.3E5692A6C12C@llvm.org> Author: stoklund Date: Wed Feb 9 17:30:25 2011 New Revision: 125237 URL: http://llvm.org/viewvc/llvm-project?rev=125237&view=rev Log: Use the LiveBLocks array for SplitEditor::splitSingleBlocks() as well. This fixes a bug where splitSingleBlocks() could split a live range after a terminator instruction. Modified: llvm/trunk/lib/CodeGen/SplitKit.cpp llvm/trunk/lib/CodeGen/SplitKit.h Modified: llvm/trunk/lib/CodeGen/SplitKit.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SplitKit.cpp?rev=125237&r1=125236&r2=125237&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SplitKit.cpp (original) +++ llvm/trunk/lib/CodeGen/SplitKit.cpp Wed Feb 9 17:30:25 2011 @@ -954,6 +954,25 @@ return VNI->def; } +SlotIndex SplitEditor::leaveIntvBefore(SlotIndex Idx) { + assert(OpenIdx && "openIntv not called before leaveIntvBefore"); + DEBUG(dbgs() << " leaveIntvBefore " << Idx); + + // The interval must be live into the instruction at Idx. + Idx = Idx.getBoundaryIndex(); + VNInfo *ParentVNI = Edit.getParent().getVNInfoAt(Idx); + if (!ParentVNI) { + DEBUG(dbgs() << ": not live\n"); + return Idx.getNextSlot(); + } + DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n'); + + MachineInstr *MI = LIS.getInstructionFromIndex(Idx); + assert(MI && "No instruction at index"); + VNInfo *VNI = defFromParent(0, ParentVNI, Idx, *MI->getParent(), MI); + return VNI->def; +} + SlotIndex SplitEditor::leaveIntvAtTop(MachineBasicBlock &MBB) { assert(OpenIdx && "openIntv not called before leaveIntvAtTop"); SlotIndex Start = LIS.getMBBStartIdx(&MBB); @@ -1211,28 +1230,20 @@ /// may be an advantage to split CurLI for the duration of the block. bool SplitAnalysis::getMultiUseBlocks(BlockPtrSet &Blocks) { // If CurLI is local to one block, there is no point to splitting it. - if (UsingBlocks.size() <= 1) + if (LiveBlocks.size() <= 1) return false; // Add blocks with multiple uses. - for (BlockCountMap::iterator I = UsingBlocks.begin(), E = UsingBlocks.end(); - I != E; ++I) - switch (I->second) { - case 0: - case 1: + for (unsigned i = 0, e = LiveBlocks.size(); i != e; ++i) { + const BlockInfo &BI = LiveBlocks[i]; + if (!BI.Uses) continue; - case 2: { - // When there are only two uses and CurLI is both live in and live out, - // we don't really win anything by isolating the block since we would be - // inserting two copies. - // The remaing register would still have two uses in the block. (Unless it - // separates into disconnected components). - if (LIS.isLiveInToMBB(*CurLI, I->first) && - LIS.isLiveOutOfMBB(*CurLI, I->first)) - continue; - } // Fall through. - default: - Blocks.insert(I->first); - } + unsigned Instrs = UsingBlocks.lookup(BI.MBB); + if (Instrs <= 1) + continue; + if (Instrs == 2 && BI.LiveIn && BI.LiveOut && !BI.LiveThrough) + continue; + Blocks.insert(BI.MBB); + } return !Blocks.empty(); } @@ -1240,34 +1251,22 @@ /// basic block in Blocks. void SplitEditor::splitSingleBlocks(const SplitAnalysis::BlockPtrSet &Blocks) { DEBUG(dbgs() << " splitSingleBlocks for " << Blocks.size() << " blocks.\n"); - // Determine the first and last instruction using CurLI in each block. - typedef std::pair IndexPair; - typedef DenseMap IndexPairMap; - IndexPairMap MBBRange; - for (SplitAnalysis::InstrPtrSet::const_iterator I = sa_.UsingInstrs.begin(), - E = sa_.UsingInstrs.end(); I != E; ++I) { - const MachineBasicBlock *MBB = (*I)->getParent(); - if (!Blocks.count(MBB)) + + for (unsigned i = 0, e = sa_.LiveBlocks.size(); i != e; ++i) { + const SplitAnalysis::BlockInfo &BI = sa_.LiveBlocks[i]; + if (!BI.Uses || !Blocks.count(BI.MBB)) continue; - SlotIndex Idx = LIS.getInstructionIndex(*I); - DEBUG(dbgs() << " BB#" << MBB->getNumber() << '\t' << Idx << '\t' << **I); - IndexPair &IP = MBBRange[MBB]; - if (!IP.first.isValid() || Idx < IP.first) - IP.first = Idx; - if (!IP.second.isValid() || Idx > IP.second) - IP.second = Idx; - } - - // Create a new interval for each block. - for (SplitAnalysis::BlockPtrSet::const_iterator I = Blocks.begin(), - E = Blocks.end(); I != E; ++I) { - IndexPair &IP = MBBRange[*I]; - DEBUG(dbgs() << " splitting for BB#" << (*I)->getNumber() << ": [" - << IP.first << ';' << IP.second << ")\n"); - assert(IP.first.isValid() && IP.second.isValid()); openIntv(); - useIntv(enterIntvBefore(IP.first), leaveIntvAfter(IP.second)); + SlotIndex SegStart = enterIntvBefore(BI.FirstUse); + if (BI.LastUse < BI.LastSplitPoint) { + useIntv(SegStart, leaveIntvAfter(BI.LastUse)); + } else { + // THe last use os after tha last valid split point. + SlotIndex SegStop = leaveIntvBefore(BI.LastSplitPoint); + useIntv(SegStart, SegStop); + overlapIntv(SegStop, BI.LastUse); + } closeIntv(); } finish(); Modified: llvm/trunk/lib/CodeGen/SplitKit.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SplitKit.h?rev=125237&r1=125236&r2=125237&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SplitKit.h (original) +++ llvm/trunk/lib/CodeGen/SplitKit.h Wed Feb 9 17:30:25 2011 @@ -407,6 +407,10 @@ /// Return the end of the live range. SlotIndex leaveIntvAfter(SlotIndex Idx); + /// leaveIntvBefore - Leave the open interval before the instruction at Idx. + /// Return the end of the live range. + SlotIndex leaveIntvBefore(SlotIndex Idx); + /// leaveIntvAtTop - Leave the interval at the top of MBB. /// Add liveness from the MBB top to the copy. /// Return the end of the live range. From stoklund at 2pi.dk Wed Feb 9 17:33:02 2011 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Wed, 09 Feb 2011 23:33:02 -0000 Subject: [llvm-commits] [llvm] r125238 - /llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp Message-ID: <20110209233302.B478E2A6C12C@llvm.org> Author: stoklund Date: Wed Feb 9 17:33:02 2011 New Revision: 125238 URL: http://llvm.org/viewvc/llvm-project?rev=125238&view=rev Log: Simplify using the new leaveIntvBefore() Modified: llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp Modified: llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp?rev=125238&r1=125237&r2=125238&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp (original) +++ llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp Wed Feb 9 17:33:02 2011 @@ -714,19 +714,8 @@ // indirect jump. DEBUG(dbgs() << ", uses at " << BI.LastUse << " after split point " << BI.LastSplitPoint << ", stack-out.\n"); - SlotIndex SegEnd; - // Find the last real instruction before the split point. - MachineBasicBlock::iterator SplitI = - LIS->getInstructionFromIndex(BI.LastSplitPoint); - MachineBasicBlock::iterator I = SplitI, B = BI.MBB->begin(); - while (I != B && (--I)->isDebugValue()) - ; - if (I == SplitI) - SegEnd = SE.leaveIntvAtTop(*BI.MBB); - else { - SegEnd = SE.leaveIntvAfter(LIS->getInstructionIndex(I)); - SE.useIntv(Start, SegEnd); - } + SlotIndex SegEnd = SE.leaveIntvBefore(BI.LastSplitPoint); + SE.useIntv(Start, SegEnd); // Run a double interval from the split to the last use. // This makes it possible to spill the complement without affecting the // indirect branch. From dgregor at apple.com Wed Feb 9 17:33:15 2011 From: dgregor at apple.com (Douglas Gregor) Date: Wed, 09 Feb 2011 23:33:15 -0000 Subject: [llvm-commits] [llvm] r125239 - in /llvm/trunk: include/llvm/Support/PathV2.h lib/Support/Unix/PathV2.inc Message-ID: <20110209233315.B575F2A6C12C@llvm.org> Author: dgregor Date: Wed Feb 9 17:33:15 2011 New Revision: 125239 URL: http://llvm.org/viewvc/llvm-project?rev=125239&view=rev Log: Rip out realpath() support. It's expensive, and often a bad idea, and I have another way to achieve the same goal. Modified: llvm/trunk/include/llvm/Support/PathV2.h llvm/trunk/lib/Support/Unix/PathV2.inc Modified: llvm/trunk/include/llvm/Support/PathV2.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/PathV2.h?rev=125239&r1=125238&r2=125239&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/PathV2.h (original) +++ llvm/trunk/include/llvm/Support/PathV2.h Wed Feb 9 17:33:15 2011 @@ -244,15 +244,6 @@ /// @result The stem of \a path. const StringRef stem(StringRef path); -/// Convert path to a canonical form, resolving symbolic links and removing -/// unnecessary path elements (e.g., "foo/../", "./"). -/// -/// @param path A path that is going to be canonicalized by resolving symlinks -/// and removing unnecessary path elements (e.g., "./"). -/// -/// @param buffer The resulting canonical path. -void canonical(const char *path, SmallVectorImpl &result); - /// @brief Get extension. /// /// If filename contains a dot but not solely one or two dots, result is the Modified: llvm/trunk/lib/Support/Unix/PathV2.inc URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Unix/PathV2.inc?rev=125239&r1=125238&r2=125239&view=diff ============================================================================== --- llvm/trunk/lib/Support/Unix/PathV2.inc (original) +++ llvm/trunk/lib/Support/Unix/PathV2.inc Wed Feb 9 17:33:15 2011 @@ -503,35 +503,5 @@ } } // end namespace fs - -namespace path { - -void canonical(const char *path, SmallVectorImpl &buffer) { - buffer.resize(PATH_MAX); - char *result = realpath(path, buffer.data()); - if (result) { - buffer.resize(strlen(result)); - return; - } - - // A common extension is to support memory allocation of the result when - // passing NULL as the second argument. - result = realpath(path, 0); - if (result) { - size_t length = strlen(result); - buffer.resize(length); - memcpy(buffer.data(), result, length); - free(result); - return; - } - - size_t length = strlen(path); - buffer.resize(length); - memcpy(buffer.data(), path, length); - return; -} - -} // end namespace path - } // end namespace sys } // end namespace llvm From dgregor at apple.com Wed Feb 9 17:37:27 2011 From: dgregor at apple.com (Douglas Gregor) Date: Wed, 9 Feb 2011 15:37:27 -0800 Subject: [llvm-commits] [llvm] r125228 - in /llvm/trunk: include/llvm/Support/PathV2.h lib/Support/Unix/PathV2.inc In-Reply-To: <8518386B-CFC6-4696-B3E4-2456F1E59169@apple.com> References: <20110209221123.804C22A6C12C@llvm.org> <237969C7-5157-4DBB-90B4-0EAAAB7A3EED@apple.com> <8518386B-CFC6-4696-B3E4-2456F1E59169@apple.com> Message-ID: <91CC8967-36E8-4C1A-BA3A-57EBDCDF33A1@apple.com> Thanks! On Feb 9, 2011, at 3:07 PM, Cameron Zwarich wrote: > I did the obvious thing to fix this in r125236. > > On Feb 9, 2011, at 2:41 PM, Kevin Enderby wrote: > >> Hi Doug, >> >> Looks like two of the returns with arguments are causing problems for the build bots: >> >> /Users/buildslave/zorg/buildbot/smooshlab/slave/build.llvm-gcc-i386-darwin9/llvm.src/lib/Support/Unix/PathV2.inc: In function 'void llvm::sys::path::canonical(const char*, llvm::SmallVectorImpl&)': >> /Users/buildslave/zorg/buildbot/smooshlab/slave/build.llvm-gcc-i386-darwin9/llvm.src/lib/Support/Unix/PathV2.inc:525: error: return-statement with a value, in function returning 'void' >> /Users/buildslave/zorg/buildbot/smooshlab/slave/build.llvm-gcc-i386-darwin9/llvm.src/lib/Support/Unix/PathV2.inc:531: error: return-statement with a value, in function returning 'void' >> On Feb 9, 2011, at 2:11 PM, Douglas Gregor wrote: >> >>> Author: dgregor >>> Date: Wed Feb 9 16:11:23 2011 >>> New Revision: 125228 >>> >>> URL: http://llvm.org/viewvc/llvm-project?rev=125228&view=rev >>> Log: >>> Add llvm::sys::path::canonical(), which provides the canonicalized >>> name of a path, after resolving symbolic links and eliminating excess >>> path elements such as "foo/../" and "./". >>> >>> This routine still needs a Windows implementation, but I don't have a >>> Windows machine available. Help? Please? >>> >>> Modified: >>> llvm/trunk/include/llvm/Support/PathV2.h >>> llvm/trunk/lib/Support/Unix/PathV2.inc >>> >>> Modified: llvm/trunk/include/llvm/Support/PathV2.h >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/PathV2.h?rev=125228&r1=125227&r2=125228&view=diff >>> ============================================================================== >>> --- llvm/trunk/include/llvm/Support/PathV2.h (original) >>> +++ llvm/trunk/include/llvm/Support/PathV2.h Wed Feb 9 16:11:23 2011 >>> @@ -244,6 +244,15 @@ >>> /// @result The stem of \a path. >>> const StringRef stem(StringRef path); >>> >>> +/// Convert path to a canonical form, resolving symbolic links and removing >>> +/// unnecessary path elements (e.g., "foo/../", "./"). >>> +/// >>> +/// @param path A path that is going to be canonicalized by resolving symlinks >>> +/// and removing unnecessary path elements (e.g., "./"). >>> +/// >>> +/// @param buffer The resulting canonical path. >>> +void canonical(const char *path, SmallVectorImpl &result); >>> + >>> /// @brief Get extension. >>> /// >>> /// If filename contains a dot but not solely one or two dots, result is the >>> >>> Modified: llvm/trunk/lib/Support/Unix/PathV2.inc >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Unix/PathV2.inc?rev=125228&r1=125227&r2=125228&view=diff >>> ============================================================================== >>> --- llvm/trunk/lib/Support/Unix/PathV2.inc (original) >>> +++ llvm/trunk/lib/Support/Unix/PathV2.inc Wed Feb 9 16:11:23 2011 >>> @@ -503,5 +503,35 @@ >>> } >>> >>> } // end namespace fs >>> + >>> +namespace path { >>> + >>> +void canonical(const char *path, SmallVectorImpl &buffer) { >>> + buffer.resize(PATH_MAX); >>> + char *result = realpath(path, buffer.data()); >>> + if (result) { >>> + buffer.resize(strlen(result)); >>> + return; >>> + } >>> + >>> + // A common extension is to support memory allocation of the result when >>> + // passing NULL as the second argument. >>> + result = realpath(path, 0); >>> + if (result) { >>> + size_t length = strlen(result); >>> + buffer.resize(length); >>> + memcpy(buffer.data(), result, length); >>> + free(result); >>> + return buffer.data(); >>> + } >>> + >>> + size_t length = strlen(path); >>> + buffer.resize(length); >>> + memcpy(buffer.data(), path, length); >>> + return path; >>> +} >>> + >>> +} // end namespace path >>> + >>> } // end namespace sys >>> } // end namespace llvm >>> >>> >>> _______________________________________________ >>> llvm-commits mailing list >>> llvm-commits at cs.uiuc.edu >>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110209/1ce2e1ba/attachment.html From nlewycky at google.com Wed Feb 9 17:38:56 2011 From: nlewycky at google.com (Nick Lewycky) Date: Wed, 9 Feb 2011 15:38:56 -0800 Subject: [llvm-commits] [PATCH] [MC] .pushsection / .popsection support In-Reply-To: <20110209214037.GA14074@britannica.bec.de> References: <20110209202852.GA10573@britannica.bec.de> <20110209214037.GA14074@britannica.bec.de> Message-ID: On 9 February 2011 13:40, Joerg Sonnenberger wrote: > On Wed, Feb 09, 2011 at 01:29:23PM -0800, Nick Lewycky wrote: > > On 9 February 2011 12:28, Joerg Sonnenberger >wrote: > > > > > Hi all, > > > attached patch is the initial support for .pushsection / .popsection. > > > To do this properly requires a change in the MCStreamer API. One > > > approach is attached. I think a better idea would be to split the > > > current SwitchSection() into two parts: the common code to manage > > > CurSection / PrevSection and a virtual function ChangeSection that gets > > > called if the new CurSection differs from the old one. There are a > bunch > > > of bugs with the handling of changing to the current section again. > > > > > > > Why does this need a second SwitchSection method and why does it need to > > take the previous as an argument? Why not just take the current one, then > > switch to the new one? > > Because .popstack changes both the current and last section. More > importantly, it can set the previous section to NULL, so it can't just > be emulated with two calls to SwitchSection. > Right, I realize that it can't, but the MCStreamer API is supposed to mirror the set of directives actually supported. SwitchSection maps to ".section" but SwitchSection2 doesn't as there's no directive which set the current and previous section to any strings you want. The MCStreamer implementations can just modify CurSection and PrevSection directly, they don't need an API for it. Splitting the current SwitchSection would be cleaner and fix some issues > as I mentioned. > Sure, feel free to refactor but please make them protected methods. Currently CurSection and PrevSection are protected. I'd suggest replacing those with the stacks and then get{Current,Previous}Section return the top of the stack. > Also, did you check that a .s which consists entirely of ".previous" gives > a > > nice error? GAS says: > > x.s:1: Warning: .previous without corresponding .section; ignored > > I haven't touched .previous and don't plan to do it for this patch. > It is an unrelated issue. > Good point! Nick -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110209/60701347/attachment.html From stoklund at 2pi.dk Wed Feb 9 17:56:18 2011 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Wed, 09 Feb 2011 23:56:18 -0000 Subject: [llvm-commits] [llvm] r125243 - in /llvm/trunk/lib/CodeGen: SplitKit.cpp SplitKit.h Message-ID: <20110209235619.051052A6C12C@llvm.org> Author: stoklund Date: Wed Feb 9 17:56:18 2011 New Revision: 125243 URL: http://llvm.org/viewvc/llvm-project?rev=125243&view=rev Log: Delete unused code for analyzing and splitting around loops. Loop splitting is better handled by the more generic global region splitting based on the edge bundle graph. Modified: llvm/trunk/lib/CodeGen/SplitKit.cpp llvm/trunk/lib/CodeGen/SplitKit.h Modified: llvm/trunk/lib/CodeGen/SplitKit.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SplitKit.cpp?rev=125243&r1=125242&r2=125243&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SplitKit.cpp (original) +++ llvm/trunk/lib/CodeGen/SplitKit.cpp Wed Feb 9 17:56:18 2011 @@ -20,7 +20,6 @@ #include "llvm/CodeGen/LiveIntervalAnalysis.h" #include "llvm/CodeGen/MachineDominators.h" #include "llvm/CodeGen/MachineInstrBuilder.h" -#include "llvm/CodeGen/MachineLoopInfo.h" #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/Debug.h" @@ -51,7 +50,6 @@ UseSlots.clear(); UsingInstrs.clear(); UsingBlocks.clear(); - UsingLoops.clear(); LiveBlocks.clear(); CurLI = 0; } @@ -75,18 +73,13 @@ continue; UseSlots.push_back(LIS.getInstructionIndex(MI).getDefIndex()); MachineBasicBlock *MBB = MI->getParent(); - if (UsingBlocks[MBB]++) - continue; - for (MachineLoop *Loop = Loops.getLoopFor(MBB); Loop; - Loop = Loop->getParentLoop()) - UsingLoops[Loop]++; + UsingBlocks[MBB]++; } array_pod_sort(UseSlots.begin(), UseSlots.end()); calcLiveBlockInfo(); DEBUG(dbgs() << " counted " << UsingInstrs.size() << " instrs, " - << UsingBlocks.size() << " blocks, " - << UsingLoops.size() << " loops.\n"); + << UsingBlocks.size() << " blocks.\n"); } /// calcLiveBlockInfo - Fill the LiveBlocks array with information about blocks @@ -182,271 +175,12 @@ } } -// Get three sets of basic blocks surrounding a loop: Blocks inside the loop, -// predecessor blocks, and exit blocks. -void SplitAnalysis::getLoopBlocks(const MachineLoop *Loop, LoopBlocks &Blocks) { - Blocks.clear(); - - // Blocks in the loop. - Blocks.Loop.insert(Loop->block_begin(), Loop->block_end()); - - // Predecessor blocks. - const MachineBasicBlock *Header = Loop->getHeader(); - for (MachineBasicBlock::const_pred_iterator I = Header->pred_begin(), - E = Header->pred_end(); I != E; ++I) - if (!Blocks.Loop.count(*I)) - Blocks.Preds.insert(*I); - - // Exit blocks. - for (MachineLoop::block_iterator I = Loop->block_begin(), - E = Loop->block_end(); I != E; ++I) { - const MachineBasicBlock *MBB = *I; - for (MachineBasicBlock::const_succ_iterator SI = MBB->succ_begin(), - SE = MBB->succ_end(); SI != SE; ++SI) - if (!Blocks.Loop.count(*SI)) - Blocks.Exits.insert(*SI); - } -} - -void SplitAnalysis::print(const LoopBlocks &B, raw_ostream &OS) const { - OS << "Loop:"; - print(B.Loop, OS); - OS << ", preds:"; - print(B.Preds, OS); - OS << ", exits:"; - print(B.Exits, OS); -} - -/// analyzeLoopPeripheralUse - Return an enum describing how CurLI is used in -/// and around the Loop. -SplitAnalysis::LoopPeripheralUse SplitAnalysis:: -analyzeLoopPeripheralUse(const SplitAnalysis::LoopBlocks &Blocks) { - LoopPeripheralUse use = ContainedInLoop; - for (BlockCountMap::iterator I = UsingBlocks.begin(), E = UsingBlocks.end(); - I != E; ++I) { - const MachineBasicBlock *MBB = I->first; - // Is this a peripheral block? - if (use < MultiPeripheral && - (Blocks.Preds.count(MBB) || Blocks.Exits.count(MBB))) { - if (I->second > 1) use = MultiPeripheral; - else use = SinglePeripheral; - continue; - } - // Is it a loop block? - if (Blocks.Loop.count(MBB)) - continue; - // It must be an unrelated block. - DEBUG(dbgs() << ", outside: BB#" << MBB->getNumber()); - return OutsideLoop; - } - return use; -} - -/// getCriticalExits - It may be necessary to partially break critical edges -/// leaving the loop if an exit block has predecessors from outside the loop -/// periphery. -void SplitAnalysis::getCriticalExits(const SplitAnalysis::LoopBlocks &Blocks, - BlockPtrSet &CriticalExits) { - CriticalExits.clear(); - - // A critical exit block has CurLI live-in, and has a predecessor that is not - // in the loop nor a loop predecessor. For such an exit block, the edges - // carrying the new variable must be moved to a new pre-exit block. - for (BlockPtrSet::iterator I = Blocks.Exits.begin(), E = Blocks.Exits.end(); - I != E; ++I) { - const MachineBasicBlock *Exit = *I; - // A single-predecessor exit block is definitely not a critical edge. - if (Exit->pred_size() == 1) - continue; - // This exit may not have CurLI live in at all. No need to split. - if (!LIS.isLiveInToMBB(*CurLI, Exit)) - continue; - // Does this exit block have a predecessor that is not a loop block or loop - // predecessor? - for (MachineBasicBlock::const_pred_iterator PI = Exit->pred_begin(), - PE = Exit->pred_end(); PI != PE; ++PI) { - const MachineBasicBlock *Pred = *PI; - if (Blocks.Loop.count(Pred) || Blocks.Preds.count(Pred)) - continue; - // This is a critical exit block, and we need to split the exit edge. - CriticalExits.insert(Exit); - break; - } - } -} - -void SplitAnalysis::getCriticalPreds(const SplitAnalysis::LoopBlocks &Blocks, - BlockPtrSet &CriticalPreds) { - CriticalPreds.clear(); - - // A critical predecessor block has CurLI live-out, and has a successor that - // has CurLI live-in and is not in the loop nor a loop exit block. For such a - // predecessor block, we must carry the value in both the 'inside' and - // 'outside' registers. - for (BlockPtrSet::iterator I = Blocks.Preds.begin(), E = Blocks.Preds.end(); - I != E; ++I) { - const MachineBasicBlock *Pred = *I; - // Definitely not a critical edge. - if (Pred->succ_size() == 1) - continue; - // This block may not have CurLI live out at all if there is a PHI. - if (!LIS.isLiveOutOfMBB(*CurLI, Pred)) - continue; - // Does this block have a successor outside the loop? - for (MachineBasicBlock::const_pred_iterator SI = Pred->succ_begin(), - SE = Pred->succ_end(); SI != SE; ++SI) { - const MachineBasicBlock *Succ = *SI; - if (Blocks.Loop.count(Succ) || Blocks.Exits.count(Succ)) - continue; - if (!LIS.isLiveInToMBB(*CurLI, Succ)) - continue; - // This is a critical predecessor block. - CriticalPreds.insert(Pred); - break; - } - } -} - -/// canSplitCriticalExits - Return true if it is possible to insert new exit -/// blocks before the blocks in CriticalExits. -bool -SplitAnalysis::canSplitCriticalExits(const SplitAnalysis::LoopBlocks &Blocks, - BlockPtrSet &CriticalExits) { - // If we don't allow critical edge splitting, require no critical exits. - if (!AllowSplit) - return CriticalExits.empty(); - - for (BlockPtrSet::iterator I = CriticalExits.begin(), E = CriticalExits.end(); - I != E; ++I) { - const MachineBasicBlock *Succ = *I; - // We want to insert a new pre-exit MBB before Succ, and change all the - // in-loop blocks to branch to the pre-exit instead of Succ. - // Check that all the in-loop predecessors can be changed. - for (MachineBasicBlock::const_pred_iterator PI = Succ->pred_begin(), - PE = Succ->pred_end(); PI != PE; ++PI) { - const MachineBasicBlock *Pred = *PI; - // The external predecessors won't be altered. - if (!Blocks.Loop.count(Pred) && !Blocks.Preds.count(Pred)) - continue; - if (!canAnalyzeBranch(Pred)) - return false; - } - - // If Succ's layout predecessor falls through, that too must be analyzable. - // We need to insert the pre-exit block in the gap. - MachineFunction::const_iterator MFI = Succ; - if (MFI == MF.begin()) - continue; - if (!canAnalyzeBranch(--MFI)) - return false; - } - // No problems found. - return true; -} - void SplitAnalysis::analyze(const LiveInterval *li) { clear(); CurLI = li; analyzeUses(); } -void SplitAnalysis::getSplitLoops(LoopPtrSet &Loops) { - assert(CurLI && "Call analyze() before getSplitLoops"); - if (UsingLoops.empty()) - return; - - LoopBlocks Blocks; - BlockPtrSet CriticalExits; - - // We split around loops where CurLI is used outside the periphery. - for (LoopCountMap::const_iterator I = UsingLoops.begin(), - E = UsingLoops.end(); I != E; ++I) { - const MachineLoop *Loop = I->first; - getLoopBlocks(Loop, Blocks); - DEBUG({ dbgs() << " "; print(Blocks, dbgs()); }); - - switch(analyzeLoopPeripheralUse(Blocks)) { - case OutsideLoop: - break; - case MultiPeripheral: - // FIXME: We could split a live range with multiple uses in a peripheral - // block and still make progress. However, it is possible that splitting - // another live range will insert copies into a peripheral block, and - // there is a small chance we can enter an infinite loop, inserting copies - // forever. - // For safety, stick to splitting live ranges with uses outside the - // periphery. - DEBUG(dbgs() << ": multiple peripheral uses"); - break; - case ContainedInLoop: - DEBUG(dbgs() << ": fully contained\n"); - continue; - case SinglePeripheral: - DEBUG(dbgs() << ": single peripheral use\n"); - continue; - } - // Will it be possible to split around this loop? - getCriticalExits(Blocks, CriticalExits); - DEBUG(dbgs() << ": " << CriticalExits.size() << " critical exits\n"); - if (!canSplitCriticalExits(Blocks, CriticalExits)) - continue; - // This is a possible split. - Loops.insert(Loop); - } - - DEBUG(dbgs() << " getSplitLoops found " << Loops.size() - << " candidate loops.\n"); -} - -const MachineLoop *SplitAnalysis::getBestSplitLoop() { - LoopPtrSet Loops; - getSplitLoops(Loops); - if (Loops.empty()) - return 0; - - // Pick the earliest loop. - // FIXME: Are there other heuristics to consider? - const MachineLoop *Best = 0; - SlotIndex BestIdx; - for (LoopPtrSet::const_iterator I = Loops.begin(), E = Loops.end(); I != E; - ++I) { - SlotIndex Idx = LIS.getMBBStartIdx((*I)->getHeader()); - if (!Best || Idx < BestIdx) - Best = *I, BestIdx = Idx; - } - DEBUG(dbgs() << " getBestSplitLoop found " << *Best); - return Best; -} - -/// isBypassLoop - Return true if CurLI is live through Loop and has no uses -/// inside the loop. Bypass loops are candidates for splitting because it can -/// prevent interference inside the loop. -bool SplitAnalysis::isBypassLoop(const MachineLoop *Loop) { - // If CurLI is live into the loop header and there are no uses in the loop, it - // must be live in the entire loop and live on at least one exiting edge. - return !UsingLoops.count(Loop) && - LIS.isLiveInToMBB(*CurLI, Loop->getHeader()); -} - -/// getBypassLoops - Get all the maximal bypass loops. These are the bypass -/// loops whose parent is not a bypass loop. -void SplitAnalysis::getBypassLoops(LoopPtrSet &BypassLoops) { - SmallVector Todo(Loops.begin(), Loops.end()); - while (!Todo.empty()) { - MachineLoop *Loop = Todo.pop_back_val(); - if (!UsingLoops.count(Loop)) { - // This is either a bypass loop or completely irrelevant. - if (LIS.isLiveInToMBB(*CurLI, Loop->getHeader())) - BypassLoops.insert(Loop); - // Either way, skip the child loops. - continue; - } - - // The child loops may be bypass loops. - Todo.append(Loop->begin(), Loop->end()); - } -} - //===----------------------------------------------------------------------===// // LiveIntervalMap @@ -1176,53 +910,6 @@ //===----------------------------------------------------------------------===// -// Loop Splitting -//===----------------------------------------------------------------------===// - -void SplitEditor::splitAroundLoop(const MachineLoop *Loop) { - SplitAnalysis::LoopBlocks Blocks; - sa_.getLoopBlocks(Loop, Blocks); - - DEBUG({ - dbgs() << " splitAround"; sa_.print(Blocks, dbgs()); dbgs() << '\n'; - }); - - // Break critical edges as needed. - SplitAnalysis::BlockPtrSet CriticalExits; - sa_.getCriticalExits(Blocks, CriticalExits); - assert(CriticalExits.empty() && "Cannot break critical exits yet"); - - // Create new live interval for the loop. - openIntv(); - - // Insert copies in the predecessors if live-in to the header. - if (LIS.isLiveInToMBB(Edit.getParent(), Loop->getHeader())) { - for (SplitAnalysis::BlockPtrSet::iterator I = Blocks.Preds.begin(), - E = Blocks.Preds.end(); I != E; ++I) { - MachineBasicBlock &MBB = const_cast(**I); - enterIntvAtEnd(MBB); - } - } - - // Switch all loop blocks. - for (SplitAnalysis::BlockPtrSet::iterator I = Blocks.Loop.begin(), - E = Blocks.Loop.end(); I != E; ++I) - useIntv(**I); - - // Insert back copies in the exit blocks. - for (SplitAnalysis::BlockPtrSet::iterator I = Blocks.Exits.begin(), - E = Blocks.Exits.end(); I != E; ++I) { - MachineBasicBlock &MBB = const_cast(**I); - leaveIntvAtTop(MBB); - } - - // Done. - closeIntv(); - finish(); -} - - -//===----------------------------------------------------------------------===// // Single Block Splitting //===----------------------------------------------------------------------===// Modified: llvm/trunk/lib/CodeGen/SplitKit.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SplitKit.h?rev=125243&r1=125242&r2=125243&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SplitKit.h (original) +++ llvm/trunk/lib/CodeGen/SplitKit.h Wed Feb 9 17:56:18 2011 @@ -24,7 +24,6 @@ class LiveIntervals; class LiveRangeEdit; class MachineInstr; -class MachineLoop; class MachineLoopInfo; class MachineRegisterInfo; class TargetInstrInfo; @@ -59,10 +58,6 @@ typedef DenseMap BlockCountMap; BlockCountMap UsingBlocks; - // The number of basic block using CurLI in each loop. - typedef DenseMap LoopCountMap; - LoopCountMap UsingLoops; - /// Additional information about basic blocks where the current variable is /// live. Such a block will look like one of these templates: /// @@ -127,75 +122,10 @@ } typedef SmallPtrSet BlockPtrSet; - typedef SmallPtrSet LoopPtrSet; // Print a set of blocks with use counts. void print(const BlockPtrSet&, raw_ostream&) const; - // Sets of basic blocks surrounding a machine loop. - struct LoopBlocks { - BlockPtrSet Loop; // Blocks in the loop. - BlockPtrSet Preds; // Loop predecessor blocks. - BlockPtrSet Exits; // Loop exit blocks. - - void clear() { - Loop.clear(); - Preds.clear(); - Exits.clear(); - } - }; - - // Print loop blocks with use counts. - void print(const LoopBlocks&, raw_ostream&) const; - - // Calculate the block sets surrounding the loop. - void getLoopBlocks(const MachineLoop *Loop, LoopBlocks &Blocks); - - /// LoopPeripheralUse - how is a variable used in and around a loop? - /// Peripheral blocks are the loop predecessors and exit blocks. - enum LoopPeripheralUse { - ContainedInLoop, // All uses are inside the loop. - SinglePeripheral, // At most one instruction per peripheral block. - MultiPeripheral, // Multiple instructions in some peripheral blocks. - OutsideLoop // Uses outside loop periphery. - }; - - /// analyzeLoopPeripheralUse - Return an enum describing how CurLI is used in - /// and around the Loop. - LoopPeripheralUse analyzeLoopPeripheralUse(const LoopBlocks&); - - /// getCriticalExits - It may be necessary to partially break critical edges - /// leaving the loop if an exit block has phi uses of CurLI. Collect the exit - /// blocks that need special treatment into CriticalExits. - void getCriticalExits(const LoopBlocks &Blocks, BlockPtrSet &CriticalExits); - - /// canSplitCriticalExits - Return true if it is possible to insert new exit - /// blocks before the blocks in CriticalExits. - bool canSplitCriticalExits(const LoopBlocks &Blocks, - BlockPtrSet &CriticalExits); - - /// getCriticalPreds - Get the set of loop predecessors with critical edges to - /// blocks outside the loop that have CurLI live in. We don't have to break - /// these edges, but they do require special treatment. - void getCriticalPreds(const LoopBlocks &Blocks, BlockPtrSet &CriticalPreds); - - /// getSplitLoops - Get the set of loops that have CurLI uses and would be - /// profitable to split. - void getSplitLoops(LoopPtrSet&); - - /// getBestSplitLoop - Return the loop where CurLI may best be split to a - /// separate register, or NULL. - const MachineLoop *getBestSplitLoop(); - - /// isBypassLoop - Return true if CurLI is live through Loop and has no uses - /// inside the loop. Bypass loops are candidates for splitting because it can - /// prevent interference inside the loop. - bool isBypassLoop(const MachineLoop *Loop); - - /// getBypassLoops - Get all the maximal bypass loops. These are the bypass - /// loops whose parent is not a bypass loop. - void getBypassLoops(LoopPtrSet&); - /// getMultiUseBlocks - Add basic blocks to Blocks that may benefit from /// having CurLI split to a new live interval. Return true if Blocks can be /// passed to SplitEditor::splitSingleBlocks. @@ -441,10 +371,6 @@ // ===--- High level methods ---=== - /// splitAroundLoop - Split CurLI into a separate live interval inside - /// the loop. - void splitAroundLoop(const MachineLoop*); - /// splitSingleBlocks - Split CurLI into a separate live interval inside each /// basic block in Blocks. void splitSingleBlocks(const SplitAnalysis::BlockPtrSet &Blocks); From grosbach at apple.com Wed Feb 9 18:08:28 2011 From: grosbach at apple.com (Jim Grosbach) Date: Thu, 10 Feb 2011 00:08:28 -0000 Subject: [llvm-commits] [llvm] r125245 - in /llvm/trunk: test/MC/ARM/simple-fp-encoding.s utils/TableGen/AsmMatcherEmitter.cpp Message-ID: <20110210000828.62DCD2A6C12C@llvm.org> Author: grosbach Date: Wed Feb 9 18:08:28 2011 New Revision: 125245 URL: http://llvm.org/viewvc/llvm-project?rev=125245&view=rev Log: Do AsmMatcher operand classification per-opcode. When matching operands for a candidate opcode match in the auto-generated AsmMatcher, check each operand against the expected operand match class. Previously, operands were classified independently of the opcode being handled, which led to difficulties when operand match classes were more complicated than simple subclass relationships. Modified: llvm/trunk/test/MC/ARM/simple-fp-encoding.s llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp Modified: llvm/trunk/test/MC/ARM/simple-fp-encoding.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/simple-fp-encoding.s?rev=125245&r1=125244&r2=125245&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/simple-fp-encoding.s (original) +++ llvm/trunk/test/MC/ARM/simple-fp-encoding.s Wed Feb 9 18:08:28 2011 @@ -1,5 +1,4 @@ @ RUN: llvm-mc -mcpu=cortex-a8 -triple armv7-apple-darwin -show-encoding < %s | FileCheck %s -@ XFAIL: * @ CHECK: vadd.f64 d16, d17, d16 @ encoding: [0xa0,0x0b,0x71,0xee] vadd.f64 d16, d17, d16 Modified: llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp?rev=125245&r1=125244&r2=125245&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp Wed Feb 9 18:08:28 2011 @@ -1621,37 +1621,35 @@ OS << "}\n\n"; } -/// EmitClassifyOperand - Emit the function to classify an operand. -static void EmitClassifyOperand(AsmMatcherInfo &Info, - raw_ostream &OS) { - OS << "static MatchClassKind ClassifyOperand(MCParsedAsmOperand *GOp) {\n" - << " " << Info.Target.getName() << "Operand &Operand = *(" +/// EmitValidateOperandClass - Emit the function to validate an operand class. +static void EmitValidateOperandClass(AsmMatcherInfo &Info, + raw_ostream &OS) { + OS << "static bool ValidateOperandClass(MCParsedAsmOperand *GOp, " + << "MatchClassKind Kind) {\n"; + OS << " " << Info.Target.getName() << "Operand &Operand = *(" << Info.Target.getName() << "Operand*)GOp;\n"; - // Classify tokens. + // Check for Token operands first. OS << " if (Operand.isToken())\n"; - OS << " return MatchTokenString(Operand.getToken());\n\n"; + OS << " return MatchTokenString(Operand.getToken()) == Kind;\n\n"; - // Classify registers. - // - // FIXME: Don't hardcode isReg, getReg. + // Check for register operands, including sub-classes. OS << " if (Operand.isReg()) {\n"; + OS << " MatchClassKind OpKind;\n"; OS << " switch (Operand.getReg()) {\n"; - OS << " default: return InvalidMatchClass;\n"; + OS << " default: OpKind = InvalidMatchClass; break;\n"; for (std::map::iterator it = Info.RegisterClasses.begin(), ie = Info.RegisterClasses.end(); it != ie; ++it) OS << " case " << Info.Target.getName() << "::" - << it->first->getName() << ": return " << it->second->Name << ";\n"; + << it->first->getName() << ": OpKind = " << it->second->Name + << "; break;\n"; OS << " }\n"; + OS << " return IsSubclass(OpKind, Kind);\n"; OS << " }\n\n"; - // Classify user defined operands. To do so, we need to perform a topological - // sort of the superclass relationship graph so that we always match the - // narrowest type first. - - // Collect the incoming edge counts for each class. - std::map IncomingEdges; + // Check the user classes. We don't care what order since we're only + // actually matching against one of them. for (std::vector::iterator it = Info.Classes.begin(), ie = Info.Classes.end(); it != ie; ++it) { ClassInfo &CI = **it; @@ -1659,58 +1657,14 @@ if (!CI.isUserClass()) continue; - for (std::vector::iterator SI = CI.SuperClasses.begin(), - SE = CI.SuperClasses.end(); SI != SE; ++SI) - ++IncomingEdges[*SI]; - } - - // Initialize a worklist of classes with no incoming edges. - std::vector LeafClasses; - for (std::vector::iterator it = Info.Classes.begin(), - ie = Info.Classes.end(); it != ie; ++it) { - if (!IncomingEdges[*it]) - LeafClasses.push_back(*it); - } - - // Iteratively pop the list, process that class, and update the incoming - // edge counts for its super classes. When a superclass reaches zero - // incoming edges, push it onto the worklist for processing. - while (!LeafClasses.empty()) { - ClassInfo &CI = *LeafClasses.back(); - LeafClasses.pop_back(); - - if (!CI.isUserClass()) - continue; - - OS << " // '" << CI.ClassName << "' class"; - if (!CI.SuperClasses.empty()) { - OS << ", subclass of "; - for (unsigned i = 0, e = CI.SuperClasses.size(); i != e; ++i) { - if (i) OS << ", "; - OS << "'" << CI.SuperClasses[i]->ClassName << "'"; - assert(CI < *CI.SuperClasses[i] && "Invalid class relation!"); - - --IncomingEdges[CI.SuperClasses[i]]; - if (!IncomingEdges[CI.SuperClasses[i]]) - LeafClasses.push_back(CI.SuperClasses[i]); - } - } - OS << "\n"; - - OS << " if (Operand." << CI.PredicateMethod << "()) {\n"; - - // Validate subclass relationships. - if (!CI.SuperClasses.empty()) { - for (unsigned i = 0, e = CI.SuperClasses.size(); i != e; ++i) - OS << " assert(Operand." << CI.SuperClasses[i]->PredicateMethod - << "() && \"Invalid class relationship!\");\n"; - } - - OS << " return " << CI.Name << ";\n"; + OS << " // '" << CI.ClassName << "' class\n"; + OS << " if (Kind == " << CI.Name + << " && Operand." << CI.PredicateMethod << "()) {\n"; + OS << " return true;\n"; OS << " }\n\n"; } - OS << " return InvalidMatchClass;\n"; + OS << " return false;\n"; OS << "}\n\n"; } @@ -2215,12 +2169,12 @@ // Emit the routine to match token strings to their match class. EmitMatchTokenString(Target, Info.Classes, OS); - // Emit the routine to classify an operand. - EmitClassifyOperand(Info, OS); - // Emit the subclass predicate routine. EmitIsSubclass(Target, Info.Classes, OS); + // Emit the routine to validate an operand against a match class. + EmitValidateOperandClass(Info, OS); + // Emit the available features compute function. EmitComputeAvailableFeatures(Info, OS); @@ -2335,23 +2289,6 @@ OS << " return Match_InvalidOperand;\n"; OS << " }\n\n"; - OS << " // Compute the class list for this operand vector.\n"; - OS << " MatchClassKind Classes[" << MaxNumOperands << "];\n"; - OS << " for (unsigned i = 1, e = Operands.size(); i != e; ++i) {\n"; - OS << " Classes[i-1] = ClassifyOperand(Operands[i]);\n\n"; - - OS << " // Check for invalid operands before matching.\n"; - OS << " if (Classes[i-1] == InvalidMatchClass) {\n"; - OS << " ErrorInfo = i;\n"; - OS << " return Match_InvalidOperand;\n"; - OS << " }\n"; - OS << " }\n\n"; - - OS << " // Mark unused classes.\n"; - OS << " for (unsigned i = Operands.size()-1, e = " << MaxNumOperands << "; " - << "i != e; ++i)\n"; - OS << " Classes[i] = InvalidMatchClass;\n\n"; - OS << " // Some state to try to produce better error messages.\n"; OS << " bool HadMatchOtherThanFeatures = false;\n\n"; OS << " // Set ErrorInfo to the operand that mismatches if it is \n"; @@ -2378,7 +2315,11 @@ // Emit check that the subclasses match. OS << " bool OperandsValid = true;\n"; OS << " for (unsigned i = 0; i != " << MaxNumOperands << "; ++i) {\n"; - OS << " if (IsSubclass(Classes[i], it->Classes[i]))\n"; + OS << " if (i + 1 >= Operands.size()) {\n"; + OS << " OperandsValid = (it->Classes[i] == " <<"InvalidMatchClass);\n"; + OS << " break;"; + OS << " }\n"; + OS << " if (ValidateOperandClass(Operands[i+1], it->Classes[i]))\n"; OS << " continue;\n"; OS << " // If this operand is broken for all of the instances of this\n"; OS << " // mnemonic, keep track of it so we can report loc info.\n"; From david_dean at apple.com Wed Feb 9 18:12:05 2011 From: david_dean at apple.com (David Dean) Date: Thu, 10 Feb 2011 00:12:05 -0000 Subject: [llvm-commits] [zorg] r125246 - /zorg/trunk/buildbot/llvmlab/master/config/builders.py Message-ID: <20110210001205.43DAD2A6C12C@llvm.org> Author: ddean Date: Wed Feb 9 18:12:05 2011 New Revision: 125246 URL: http://llvm.org/viewvc/llvm-project?rev=125246&view=rev Log: add make tools to NightlyFactory and switch to TEST=simple until the planned improvements are implemented; normalize usage of quotes in NightlyFactory Modified: zorg/trunk/buildbot/llvmlab/master/config/builders.py Modified: zorg/trunk/buildbot/llvmlab/master/config/builders.py URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/buildbot/llvmlab/master/config/builders.py?rev=125246&r1=125245&r2=125246&view=diff ============================================================================== --- zorg/trunk/buildbot/llvmlab/master/config/builders.py (original) +++ zorg/trunk/buildbot/llvmlab/master/config/builders.py Wed Feb 9 18:12:05 2011 @@ -321,14 +321,22 @@ description=['configure tests'], env={'PATH': WithProperties('%(use_path)s:${PATH}')}, workdir='test-suite-build')) + # You need to make the tools target. + f.addStep(buildbot.steps.shell.ShellCommand( + name='make.tools', + command=['make', 'tools', WithProperties('-j%(jobs)s')], + env={'PATH': WithProperties('%(use_path)s:${PATH}')}, + haltOnFailure=True, + description=['Make', 'tools'], + workdir='test-suite-build')) # Build and test. f.addStep(NightlyTestCommand( name='run.fast.nightly.tests', command=['make', WithProperties('-j%(jobs)s'), 'ENABLE_PARALLEL_REPORT=1', - 'DISABLE_CBE=1', 'DISABLE_JIT=1', 'TEST=nightly', 'report'], + 'DISABLE_CBE=1', 'DISABLE_JIT=1', 'TEST=simple', 'report'], env={'PATH': WithProperties('%(use_path)s:${PATH}')}, haltOnFailure=True, - description=["run", "test-suite"], + description=['run', 'test-suite'], workdir='test-suite-build', logfiles={ 'report' : 'report.nightly.txt'}, xfails=xfails)) From aggarwa4 at illinois.edu Wed Feb 9 18:37:53 2011 From: aggarwa4 at illinois.edu (Arushi Aggarwal) Date: Thu, 10 Feb 2011 00:37:53 -0000 Subject: [llvm-commits] [poolalloc] r125247 - /poolalloc/trunk/lib/DSA/StdLibPass.cpp Message-ID: <20110210003753.36D7C2A6C12C@llvm.org> Author: aggarwa4 Date: Wed Feb 9 18:37:53 2011 New Revision: 125247 URL: http://llvm.org/viewvc/llvm-project?rev=125247&view=rev Log: Added a few more functions. Mostly string functions used by SPECINT2000. Modified: poolalloc/trunk/lib/DSA/StdLibPass.cpp Modified: poolalloc/trunk/lib/DSA/StdLibPass.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/StdLibPass.cpp?rev=125247&r1=125246&r2=125247&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/StdLibPass.cpp (original) +++ poolalloc/trunk/lib/DSA/StdLibPass.cpp Wed Feb 9 18:37:53 2011 @@ -99,14 +99,14 @@ {"gets", {NRET_NARGS, YRET_YARGS, NRET_NARGS, YRET_YNARGS, false}}, {"fgets", {NRET_NYARGS, YRET_YNARGS, NRET_NARGS, YRET_YNARGS, false}}, {"getc", {NRET_YNARGS, YRET_YNARGS, NRET_NARGS, NRET_NARGS, false}}, + {"_IO_getc", {NRET_YNARGS, YRET_YNARGS, NRET_NARGS, NRET_NARGS, false}}, {"fgetc", {NRET_YNARGS, YRET_YNARGS, NRET_NARGS, NRET_NARGS, false}}, - {"_IO_getc", {NRET_NARGS, YRET_YARGS, NRET_NARGS, YRET_YNARGS, false}}, {"putc", {NRET_NARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, + {"_IO_putc", {NRET_NARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, {"putchar", {NRET_NARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, {"fputs", {NRET_YARGS, NRET_NYARGS, NRET_NARGS, NRET_NARGS, false}}, {"fputc", {NRET_YARGS, NRET_NYARGS, NRET_NARGS, NRET_NARGS, false}}, {"feof", {NRET_YARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, - {"calloc", {NRET_NARGS, YRET_NARGS, YRET_NARGS, NRET_NARGS, false}}, {"malloc", {NRET_NARGS, YRET_NARGS, YRET_NARGS, NRET_NARGS, false}}, {"valloc", {NRET_NARGS, YRET_NARGS, YRET_NARGS, NRET_NARGS, false}}, @@ -147,24 +147,28 @@ {"strcat", {YRET_YARGS, YRET_YARGS, NRET_NARGS, YRET_YNARGS, true}}, {"strncat", {YRET_YARGS, YRET_YARGS, NRET_NARGS, YRET_YNARGS, true}}, - {"strcpy", {YRET_YARGS, YRET_YARGS, NRET_NARGS, YRET_YNARGS, true}}, + {"strcpy", {NRET_YARGS, YRET_YARGS, NRET_NARGS, YRET_YNARGS, true}}, + {"strstr", {NRET_YARGS, YRET_NARGS, NRET_NARGS, YRET_YNARGS, true}}, + {"strspn", {NRET_YARGS, YRET_NARGS, NRET_NARGS, NRET_NARGS, true}}, + {"strtok", {NRET_YARGS, YRET_YARGS, NRET_NARGS, YRET_YNARGS, true}}, {"strncpy", {YRET_YARGS, YRET_YARGS, NRET_NARGS, YRET_YNARGS, true}}, {"memccpy", {YRET_YARGS, YRET_YARGS, NRET_NARGS, YRET_YNARGS, true}}, - {"memcpy", {YRET_YARGS, YRET_YARGS, NRET_NARGS, YRET_YNARGS, true}}, + {"memcpy", {YRET_YARGS, YRET_YARGS, NRET_NARGS, YRET_YNARGS, true}}, {"memmove", {YRET_YARGS, YRET_YARGS, NRET_NARGS, YRET_YNARGS, true}}, {"wmemccpy", {YRET_YARGS, YRET_YARGS, NRET_NARGS, YRET_YNARGS, true}}, {"wcscpy", {YRET_YARGS, YRET_YARGS, NRET_NARGS, YRET_YNARGS, true}}, {"wcsncpy", {YRET_YARGS, YRET_YARGS, NRET_NARGS, YRET_YNARGS, true}}, - {"fwrite", {NRET_YARGS, NRET_NYARGS, NRET_NARGS, NRET_NARGS, false}}, - {"write", {NRET_YARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, - {"fread", {NRET_NYARGS, NRET_YARGS, NRET_NARGS, NRET_NARGS, false}}, - {"fflush", {NRET_YARGS, NRET_YARGS, NRET_NARGS, NRET_NARGS, false}}, - {"fclose", {NRET_YARGS, NRET_YARGS, NRET_NARGS, NRET_NARGS, false}}, - {"fopen", {NRET_YARGS, YRET_NARGS, YRET_NARGS, NRET_NARGS, false}}, - {"open", {NRET_YARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, - {"fileno", {NRET_YARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, - {"unlink", {NRET_YARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, + {"fwrite", {NRET_YARGS, NRET_NYARGS, NRET_NARGS, NRET_NARGS, false}}, + {"write", {NRET_YARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, + {"fread", {NRET_NYARGS, NRET_YARGS, NRET_NARGS, NRET_NARGS, false}}, + {"fseek", {NRET_YARGS, YRET_YNARGS, NRET_NARGS, NRET_NARGS, false}}, + {"fflush", {NRET_YARGS, NRET_YARGS, NRET_NARGS, NRET_NARGS, false}}, + {"fclose", {NRET_YARGS, NRET_YARGS, NRET_NARGS, NRET_NARGS, false}}, + {"fopen", {NRET_YARGS, YRET_NARGS, YRET_NARGS, NRET_NARGS, false}}, + {"open", {NRET_YARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, + {"fileno", {NRET_YARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, + {"unlink", {NRET_YARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, {"perror", {NRET_YARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, From aggarwa4 at illinois.edu Wed Feb 9 18:39:08 2011 From: aggarwa4 at illinois.edu (Arushi Aggarwal) Date: Thu, 10 Feb 2011 00:39:08 -0000 Subject: [llvm-commits] [poolalloc] r125248 - /poolalloc/trunk/lib/DSA/TopDownClosure.cpp Message-ID: <20110210003908.631682A6C12C@llvm.org> Author: aggarwa4 Date: Wed Feb 9 18:39:08 2011 New Revision: 125248 URL: http://llvm.org/viewvc/llvm-project?rev=125248&view=rev Log: removeDeadNodes updates the globals graph with the flags on globals in the local graph. Hence, compute the flags before calling removeDeadNodes. Modified: poolalloc/trunk/lib/DSA/TopDownClosure.cpp Modified: poolalloc/trunk/lib/DSA/TopDownClosure.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/TopDownClosure.cpp?rev=125248&r1=125247&r2=125248&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/TopDownClosure.cpp (original) +++ poolalloc/trunk/lib/DSA/TopDownClosure.cpp Wed Feb 9 18:39:08 2011 @@ -177,11 +177,11 @@ cloneGlobalsInto(Graph, DSGraph::DontCloneCallNodes | DSGraph::DontCloneAuxCallNodes); - // Clean up uninteresting nodes - Graph->removeDeadNodes(0); Graph->computeExternalFlags(DSGraph::DontMarkFormalsExternal); Graph->computeIntPtrFlags(); + // Clean up uninteresting nodes + Graph->removeDeadNodes(0); } } From dpatel at apple.com Wed Feb 9 18:41:14 2011 From: dpatel at apple.com (Devang Patel) Date: Thu, 10 Feb 2011 00:41:14 -0000 Subject: [llvm-commits] [debuginfo-tests] r125250 - /debuginfo-tests/trunk/sret.cpp Message-ID: <20110210004114.9CAC52A6C12C@llvm.org> Author: dpatel Date: Wed Feb 9 18:41:14 2011 New Revision: 125250 URL: http://llvm.org/viewvc/llvm-project?rev=125250&view=rev Log: test case for r125249. Added: debuginfo-tests/trunk/sret.cpp Added: debuginfo-tests/trunk/sret.cpp URL: http://llvm.org/viewvc/llvm-project/debuginfo-tests/trunk/sret.cpp?rev=125250&view=auto ============================================================================== --- debuginfo-tests/trunk/sret.cpp (added) +++ debuginfo-tests/trunk/sret.cpp Wed Feb 9 18:41:14 2011 @@ -0,0 +1,70 @@ +// RUN: %clangxx -O0 -g %s -c -o %t.o +// RUN: %clangxx %t.o -o %t.out +// RUN: %test_debuginfo %s %t.out +// Radar 8775834 +// DEBUGGER: break 60 +// DEBUGGER: r +// DEBUGGER: p a +// CHECK: $1 = (A &) +// CHECK: _vptr$A = +// CHECK: m_int = 12 + +class A +{ +public: + A (int i=0); + A (const A& rhs); + const A& + operator= (const A& rhs); + virtual ~A() {} + + int get_int(); + +protected: + int m_int; +}; + +A::A (int i) : + m_int(i) +{ +} + +A::A (const A& rhs) : + m_int (rhs.m_int) +{ +} + +const A & +A::operator =(const A& rhs) +{ + m_int = rhs.m_int; +} + +int A::get_int() +{ + return m_int; +} + +class B +{ +public: + B () {} + + A AInstance(); +}; + +A +B::AInstance() +{ + A a(12); + return a; +} + +int main (int argc, char const *argv[]) +{ + B b; + int return_val = b.AInstance().get_int(); + + A a(b.AInstance()); + return return_val; +} From zwarich at apple.com Wed Feb 9 19:07:54 2011 From: zwarich at apple.com (Cameron Zwarich) Date: Thu, 10 Feb 2011 01:07:54 -0000 Subject: [llvm-commits] [llvm] r125254 - /llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Message-ID: <20110210010754.6F4152A6C12C@llvm.org> Author: zwarich Date: Wed Feb 9 19:07:54 2011 New Revision: 125254 URL: http://llvm.org/viewvc/llvm-project?rev=125254&view=rev Log: Turn this pass ordering: Natural Loop Information Loop Pass Manager Canonicalize natural loops Scalar Evolution Analysis Loop Pass Manager Induction Variable Users Canonicalize natural loops Induction Variable Users Loop Strength Reduction into this: Scalar Evolution Analysis Loop Pass Manager Canonicalize natural loops Induction Variable Users Loop Strength Reduction This fixes . I also filed PR9184 on doing this sort of thing automatically, but it seems easier to just change the ordering of the passes if this is the only case. Modified: llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Modified: llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp?rev=125254&r1=125253&r2=125254&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Wed Feb 9 19:07:54 2011 @@ -3815,15 +3815,15 @@ void LoopStrengthReduce::getAnalysisUsage(AnalysisUsage &AU) const { // We split critical edges, so we change the CFG. However, we do update // many analyses if they are around. - AU.addPreservedID(LoopSimplifyID); - AU.addRequired(); - AU.addPreserved(); - AU.addRequiredID(LoopSimplifyID); AU.addRequired(); AU.addPreserved(); AU.addRequired(); AU.addPreserved(); + AU.addRequired(); + AU.addPreserved(); + AU.addRequiredID(LoopSimplifyID); + AU.addPreservedID(LoopSimplifyID); AU.addRequired(); AU.addPreserved(); } From isanbard at gmail.com Wed Feb 9 19:28:26 2011 From: isanbard at gmail.com (Bill Wendling) Date: Thu, 10 Feb 2011 01:28:26 -0000 Subject: [llvm-commits] [llvm] r125256 - /llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp Message-ID: <20110210012827.1D2962A6C12C@llvm.org> Author: void Date: Wed Feb 9 19:28:26 2011 New Revision: 125256 URL: http://llvm.org/viewvc/llvm-project?rev=125256&view=rev Log: Don't return before calling the post-processing function(s). Modified: llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp Modified: llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp?rev=125256&r1=125255&r2=125256&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp Wed Feb 9 19:28:26 2011 @@ -2345,7 +2345,6 @@ << " it->Opcode, Operands))\n"; OS << " return Match_ConversionFail;\n"; OS << "\n"; - OS << " return Match_Success;\n"; // Call the post-processing function, if used. std::string InsnCleanupFn = From echristo at apple.com Wed Feb 9 19:48:24 2011 From: echristo at apple.com (Eric Christopher) Date: Thu, 10 Feb 2011 01:48:24 -0000 Subject: [llvm-commits] [llvm] r125257 - /llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Message-ID: <20110210014824.EC09E2A6C12C@llvm.org> Author: echristo Date: Wed Feb 9 19:48:24 2011 New Revision: 125257 URL: http://llvm.org/viewvc/llvm-project?rev=125257&view=rev Log: Revert this in an attempt to bring the builders back. Modified: llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Modified: llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp?rev=125257&r1=125256&r2=125257&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Wed Feb 9 19:48:24 2011 @@ -3815,15 +3815,15 @@ void LoopStrengthReduce::getAnalysisUsage(AnalysisUsage &AU) const { // We split critical edges, so we change the CFG. However, we do update // many analyses if they are around. + AU.addPreservedID(LoopSimplifyID); + AU.addRequired(); + AU.addPreserved(); + AU.addRequiredID(LoopSimplifyID); AU.addRequired(); AU.addPreserved(); AU.addRequired(); AU.addPreserved(); - AU.addRequired(); - AU.addPreserved(); - AU.addRequiredID(LoopSimplifyID); - AU.addPreservedID(LoopSimplifyID); AU.addRequired(); AU.addPreserved(); } From echristo at apple.com Wed Feb 9 19:52:23 2011 From: echristo at apple.com (Eric Christopher) Date: Wed, 9 Feb 2011 17:52:23 -0800 Subject: [llvm-commits] [llvm] r125254 - /llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp In-Reply-To: <20110210010754.6F4152A6C12C@llvm.org> References: <20110210010754.6F4152A6C12C@llvm.org> Message-ID: Hey Cameron, I reverted this in an attempt to bring the builders back. Thanks! -eric On Feb 9, 2011, at 5:07 PM, Cameron Zwarich wrote: > Author: zwarich > Date: Wed Feb 9 19:07:54 2011 > New Revision: 125254 > > URL: http://llvm.org/viewvc/llvm-project?rev=125254&view=rev > Log: > Turn this pass ordering: > > Natural Loop Information > Loop Pass Manager > Canonicalize natural loops > Scalar Evolution Analysis > Loop Pass Manager > Induction Variable Users > Canonicalize natural loops > Induction Variable Users > Loop Strength Reduction > > into this: > > Scalar Evolution Analysis > Loop Pass Manager > Canonicalize natural loops > Induction Variable Users > Loop Strength Reduction > > This fixes . I also filed PR9184 on doing this sort of > thing automatically, but it seems easier to just change the ordering of the > passes if this is the only case. > > Modified: > llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp > > Modified: llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp?rev=125254&r1=125253&r2=125254&view=diff > ============================================================================== > --- llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp (original) > +++ llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Wed Feb 9 19:07:54 2011 > @@ -3815,15 +3815,15 @@ > void LoopStrengthReduce::getAnalysisUsage(AnalysisUsage &AU) const { > // We split critical edges, so we change the CFG. However, we do update > // many analyses if they are around. > - AU.addPreservedID(LoopSimplifyID); > > - AU.addRequired(); > - AU.addPreserved(); > - AU.addRequiredID(LoopSimplifyID); > AU.addRequired(); > AU.addPreserved(); > AU.addRequired(); > AU.addPreserved(); > + AU.addRequired(); > + AU.addPreserved(); > + AU.addRequiredID(LoopSimplifyID); > + AU.addPreservedID(LoopSimplifyID); > AU.addRequired(); > AU.addPreserved(); > } > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110209/ef85b513/attachment.html From evan.cheng at apple.com Wed Feb 9 20:20:55 2011 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 10 Feb 2011 02:20:55 -0000 Subject: [llvm-commits] [llvm] r125259 - in /llvm/trunk: lib/CodeGen/TwoAddressInstructionPass.cpp test/CodeGen/X86/twoaddr-lea.ll Message-ID: <20110210022055.8CC182A6C12C@llvm.org> Author: evancheng Date: Wed Feb 9 20:20:55 2011 New Revision: 125259 URL: http://llvm.org/viewvc/llvm-project?rev=125259&view=rev Log: After 3-addressifying a two-address instruction, update the register maps; add a missing check when considering whether it's profitable to commute. rdar://8977508. Modified: llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp llvm/trunk/test/CodeGen/X86/twoaddr-lea.ll Modified: llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp?rev=125259&r1=125258&r2=125259&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp (original) +++ llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp Wed Feb 9 20:20:55 2011 @@ -110,7 +110,7 @@ bool ConvertInstTo3Addr(MachineBasicBlock::iterator &mi, MachineBasicBlock::iterator &nmi, MachineFunction::iterator &mbbi, - unsigned RegB, unsigned Dist); + unsigned RegA, unsigned RegB, unsigned Dist); typedef std::pair, MachineInstr*> NewKill; bool canUpdateDeletedKills(SmallVector &Kills, @@ -550,7 +550,7 @@ unsigned FromRegC = getMappedReg(regC, SrcRegMap); unsigned ToRegB = getMappedReg(regB, DstRegMap); unsigned ToRegC = getMappedReg(regC, DstRegMap); - if (!regsAreCompatible(FromRegB, ToRegB, TRI) && + if ((FromRegB && ToRegB && !regsAreCompatible(FromRegB, ToRegB, TRI)) && ((!FromRegC && !ToRegC) || regsAreCompatible(FromRegB, ToRegC, TRI) || regsAreCompatible(FromRegC, ToRegB, TRI))) @@ -633,7 +633,8 @@ TwoAddressInstructionPass::ConvertInstTo3Addr(MachineBasicBlock::iterator &mi, MachineBasicBlock::iterator &nmi, MachineFunction::iterator &mbbi, - unsigned RegB, unsigned Dist) { + unsigned RegA, unsigned RegB, + unsigned Dist) { MachineInstr *NewMI = TII->convertToThreeAddress(mbbi, mi, LV); if (NewMI) { DEBUG(dbgs() << "2addr: CONVERTING 2-ADDR: " << *mi); @@ -653,6 +654,10 @@ mi = NewMI; nmi = llvm::next(mi); } + + // Update source and destination register maps. + SrcRegMap.erase(RegA); + DstRegMap.erase(RegB); return true; } @@ -887,7 +892,7 @@ // three-address instruction. Check if it is profitable. if (!regBKilled || isProfitableToConv3Addr(regA)) { // Try to convert it. - if (ConvertInstTo3Addr(mi, nmi, mbbi, regB, Dist)) { + if (ConvertInstTo3Addr(mi, nmi, mbbi, regA, regB, Dist)) { ++NumConvertedTo3Addr; return true; // Done with this instruction. } Modified: llvm/trunk/test/CodeGen/X86/twoaddr-lea.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/twoaddr-lea.ll?rev=125259&r1=125258&r2=125259&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/twoaddr-lea.ll (original) +++ llvm/trunk/test/CodeGen/X86/twoaddr-lea.ll Wed Feb 9 20:20:55 2011 @@ -5,20 +5,32 @@ ;; allocator turns the shift into an LEA. This also occurs for ADD. ; Check that the shift gets turned into an LEA. -; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \ -; RUN: not grep {mov E.X, E.X} +; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s - at G = external global i32 ; [#uses=3] + at G = external global i32 -define i32 @test1(i32 %X, i32 %Y) { - %Z = add i32 %X, %Y ; [#uses=1] - volatile store i32 %Y, i32* @G +define i32 @test1(i32 %X) nounwind { +; CHECK: test1: +; CHECK-NOT: mov +; CHECK: leal 1(%rdi) + %Z = add i32 %X, 1 volatile store i32 %Z, i32* @G ret i32 %X } -define i32 @test2(i32 %X) { - %Z = add i32 %X, 1 ; [#uses=1] - volatile store i32 %Z, i32* @G - ret i32 %X +; rdar://8977508 +; The second add should not be transformed to leal nor should it be +; commutted (which would require inserting a copy). +define i32 @test2(i32 inreg %a, i32 inreg %b, i32 %c, i32 %d) nounwind { +entry: +; CHECK: test2: +; CHECK: leal +; CHECK-NOT: leal +; CHECK-NOT: mov +; CHECK-NEXT: addl +; CHECK-NEXT: ret + %add = add i32 %b, %a + %add3 = add i32 %add, %c + %add5 = add i32 %add3, %d + ret i32 %add5 } From zwarich at apple.com Wed Feb 9 22:08:47 2011 From: zwarich at apple.com (Cameron Zwarich) Date: Wed, 9 Feb 2011 20:08:47 -0800 Subject: [llvm-commits] [llvm] r125254 - /llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp In-Reply-To: References: <20110210010754.6F4152A6C12C@llvm.org> Message-ID: <791E68A1-2111-4A08-A1DD-DE73CAAAFD77@apple.com> Thanks. I managed to bugpoint a test case from test-suite and am investigating now. Cameron On Feb 9, 2011, at 5:52 PM, Eric Christopher wrote: > Hey Cameron, > > I reverted this in an attempt to bring the builders back. > > Thanks! > > -eric > > On Feb 9, 2011, at 5:07 PM, Cameron Zwarich wrote: > >> Author: zwarich >> Date: Wed Feb 9 19:07:54 2011 >> New Revision: 125254 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=125254&view=rev >> Log: >> Turn this pass ordering: >> >> Natural Loop Information >> Loop Pass Manager >> Canonicalize natural loops >> Scalar Evolution Analysis >> Loop Pass Manager >> Induction Variable Users >> Canonicalize natural loops >> Induction Variable Users >> Loop Strength Reduction >> >> into this: >> >> Scalar Evolution Analysis >> Loop Pass Manager >> Canonicalize natural loops >> Induction Variable Users >> Loop Strength Reduction >> >> This fixes . I also filed PR9184 on doing this sort of >> thing automatically, but it seems easier to just change the ordering of the >> passes if this is the only case. >> >> Modified: >> llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp >> >> Modified: llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp?rev=125254&r1=125253&r2=125254&view=diff >> ============================================================================== >> --- llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp (original) >> +++ llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Wed Feb 9 19:07:54 2011 >> @@ -3815,15 +3815,15 @@ >> void LoopStrengthReduce::getAnalysisUsage(AnalysisUsage &AU) const { >> // We split critical edges, so we change the CFG. However, we do update >> // many analyses if they are around. >> - AU.addPreservedID(LoopSimplifyID); >> >> - AU.addRequired(); >> - AU.addPreserved(); >> - AU.addRequiredID(LoopSimplifyID); >> AU.addRequired(); >> AU.addPreserved(); >> AU.addRequired(); >> AU.addPreserved(); >> + AU.addRequired(); >> + AU.addPreserved(); >> + AU.addRequiredID(LoopSimplifyID); >> + AU.addPreservedID(LoopSimplifyID); >> AU.addRequired(); >> AU.addPreserved(); >> } >> >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110209/b0be963e/attachment.html From sabre at nondot.org Wed Feb 9 23:09:34 2011 From: sabre at nondot.org (Chris Lattner) Date: Thu, 10 Feb 2011 05:09:34 -0000 Subject: [llvm-commits] [llvm] r125263 - /llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp Message-ID: <20110210050934.65EAF2A6C12C@llvm.org> Author: lattner Date: Wed Feb 9 23:09:34 2011 New Revision: 125263 URL: http://llvm.org/viewvc/llvm-project?rev=125263&view=rev Log: teach SimplifyDemandedBits that exact shifts demand the bits they are shifting out since they do require them to be zeros. Similarly for NUW/NSW bits of shl Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp?rev=125263&r1=125262&r2=125263&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp Wed Feb 9 23:09:34 2011 @@ -576,8 +576,16 @@ break; case Instruction::Shl: if (ConstantInt *SA = dyn_cast(I->getOperand(1))) { - uint64_t ShiftAmt = SA->getLimitedValue(BitWidth); + uint64_t ShiftAmt = SA->getLimitedValue(BitWidth-1); APInt DemandedMaskIn(DemandedMask.lshr(ShiftAmt)); + + // If the shift is NUW/NSW, then it does demand the high bits. + ShlOperator *IOp = cast(I); + if (IOp->hasNoSignedWrap()) + DemandedMaskIn |= APInt::getHighBitsSet(BitWidth, ShiftAmt+1); + else if (IOp->hasNoUnsignedWrap()) + DemandedMaskIn |= APInt::getHighBitsSet(BitWidth, ShiftAmt); + if (SimplifyDemandedBits(I->getOperandUse(0), DemandedMaskIn, KnownZero, KnownOne, Depth+1)) return I; @@ -592,10 +600,16 @@ case Instruction::LShr: // For a logical shift right if (ConstantInt *SA = dyn_cast(I->getOperand(1))) { - uint64_t ShiftAmt = SA->getLimitedValue(BitWidth); + uint64_t ShiftAmt = SA->getLimitedValue(BitWidth-1); // Unsigned shift right. APInt DemandedMaskIn(DemandedMask.shl(ShiftAmt)); + + // If the shift is exact, then it does demand the low bits (and knows that + // they are zero). + if (cast(I)->isExact()) + DemandedMaskIn |= APInt::getLowBitsSet(BitWidth, ShiftAmt); + if (SimplifyDemandedBits(I->getOperandUse(0), DemandedMaskIn, KnownZero, KnownOne, Depth+1)) return I; @@ -627,7 +641,7 @@ return I->getOperand(0); if (ConstantInt *SA = dyn_cast(I->getOperand(1))) { - uint32_t ShiftAmt = SA->getLimitedValue(BitWidth); + uint32_t ShiftAmt = SA->getLimitedValue(BitWidth-1); // Signed shift right. APInt DemandedMaskIn(DemandedMask.shl(ShiftAmt)); @@ -635,6 +649,12 @@ // demanded. if (DemandedMask.countLeadingZeros() <= ShiftAmt) DemandedMaskIn.setBit(BitWidth-1); + + // If the shift is exact, then it does demand the low bits (and knows that + // they are zero). + if (cast(I)->isExact()) + DemandedMaskIn |= APInt::getLowBitsSet(BitWidth, ShiftAmt); + if (SimplifyDemandedBits(I->getOperandUse(0), DemandedMaskIn, KnownZero, KnownOne, Depth+1)) return I; From zwarich at apple.com Wed Feb 9 23:14:04 2011 From: zwarich at apple.com (Cameron Zwarich) Date: Wed, 9 Feb 2011 21:14:04 -0800 Subject: [llvm-commits] [llvm] r125254 - /llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp In-Reply-To: <791E68A1-2111-4A08-A1DD-DE73CAAAFD77@apple.com> References: <20110210010754.6F4152A6C12C@llvm.org> <791E68A1-2111-4A08-A1DD-DE73CAAAFD77@apple.com> Message-ID: I found the cause of the problem: Bug 9187 - LoopStrengthReduce violates LoopPass rules http://llvm.org/bugs/show_bug.cgi?id=9187 Cameron On Feb 9, 2011, at 8:08 PM, Cameron Zwarich wrote: > Thanks. I managed to bugpoint a test case from test-suite and am investigating now. > > Cameron > > On Feb 9, 2011, at 5:52 PM, Eric Christopher wrote: > >> Hey Cameron, >> >> I reverted this in an attempt to bring the builders back. >> >> Thanks! >> >> -eric >> >> On Feb 9, 2011, at 5:07 PM, Cameron Zwarich wrote: >> >>> Author: zwarich >>> Date: Wed Feb 9 19:07:54 2011 >>> New Revision: 125254 >>> >>> URL: http://llvm.org/viewvc/llvm-project?rev=125254&view=rev >>> Log: >>> Turn this pass ordering: >>> >>> Natural Loop Information >>> Loop Pass Manager >>> Canonicalize natural loops >>> Scalar Evolution Analysis >>> Loop Pass Manager >>> Induction Variable Users >>> Canonicalize natural loops >>> Induction Variable Users >>> Loop Strength Reduction >>> >>> into this: >>> >>> Scalar Evolution Analysis >>> Loop Pass Manager >>> Canonicalize natural loops >>> Induction Variable Users >>> Loop Strength Reduction >>> >>> This fixes . I also filed PR9184 on doing this sort of >>> thing automatically, but it seems easier to just change the ordering of the >>> passes if this is the only case. >>> >>> Modified: >>> llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp >>> >>> Modified: llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp?rev=125254&r1=125253&r2=125254&view=diff >>> ============================================================================== >>> --- llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp (original) >>> +++ llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Wed Feb 9 19:07:54 2011 >>> @@ -3815,15 +3815,15 @@ >>> void LoopStrengthReduce::getAnalysisUsage(AnalysisUsage &AU) const { >>> // We split critical edges, so we change the CFG. However, we do update >>> // many analyses if they are around. >>> - AU.addPreservedID(LoopSimplifyID); >>> >>> - AU.addRequired(); >>> - AU.addPreserved(); >>> - AU.addRequiredID(LoopSimplifyID); >>> AU.addRequired(); >>> AU.addPreserved(); >>> AU.addRequired(); >>> AU.addPreserved(); >>> + AU.addRequired(); >>> + AU.addPreserved(); >>> + AU.addRequiredID(LoopSimplifyID); >>> + AU.addPreservedID(LoopSimplifyID); >>> AU.addRequired(); >>> AU.addPreserved(); >>> } >>> >>> >>> _______________________________________________ >>> llvm-commits mailing list >>> llvm-commits at cs.uiuc.edu >>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >> > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110209/c9f8b1a8/attachment.html From sabre at nondot.org Wed Feb 9 23:14:58 2011 From: sabre at nondot.org (Chris Lattner) Date: Thu, 10 Feb 2011 05:14:58 -0000 Subject: [llvm-commits] [llvm] r125264 - /llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp Message-ID: <20110210051458.D11082A6C12C@llvm.org> Author: lattner Date: Wed Feb 9 23:14:58 2011 New Revision: 125264 URL: http://llvm.org/viewvc/llvm-project?rev=125264&view=rev Log: A bunch of cleanups and simplifications using the new PatternMatch predicates and generally tidying things up. Only very trivial functionality changes like now doing (-1 - A) -> (~A) for vectors too. InstCombineAddSub.cpp | 296 +++++++++++++++++++++----------------------------- 1 file changed, 126 insertions(+), 170 deletions(-) Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp?rev=125264&r1=125263&r2=125264&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp Wed Feb 9 23:14:58 2011 @@ -95,35 +95,26 @@ if (Value *V = SimplifyUsingDistributiveLaws(I)) return ReplaceInstUsesWith(I, V); - if (Constant *RHSC = dyn_cast(RHS)) { - if (ConstantInt *CI = dyn_cast(RHSC)) { - // X + (signbit) --> X ^ signbit - const APInt& Val = CI->getValue(); - uint32_t BitWidth = Val.getBitWidth(); - if (Val == APInt::getSignBit(BitWidth)) - return BinaryOperator::CreateXor(LHS, RHS); - - // See if SimplifyDemandedBits can simplify this. This handles stuff like - // (X & 254)+1 -> (X&254)|1 - if (SimplifyDemandedInstructionBits(I)) - return &I; - - // zext(bool) + C -> bool ? C + 1 : C - if (ZExtInst *ZI = dyn_cast(LHS)) - if (ZI->getSrcTy() == Type::getInt1Ty(I.getContext())) - return SelectInst::Create(ZI->getOperand(0), AddOne(CI), CI); - } - - if (isa(LHS)) - if (Instruction *NV = FoldOpIntoPhi(I)) - return NV; + if (ConstantInt *CI = dyn_cast(RHS)) { + // X + (signbit) --> X ^ signbit + const APInt &Val = CI->getValue(); + if (Val.isSignBit()) + return BinaryOperator::CreateXor(LHS, RHS); - ConstantInt *XorRHS = 0; - Value *XorLHS = 0; - if (isa(RHSC) && - match(LHS, m_Xor(m_Value(XorLHS), m_ConstantInt(XorRHS)))) { + // See if SimplifyDemandedBits can simplify this. This handles stuff like + // (X & 254)+1 -> (X&254)|1 + if (SimplifyDemandedInstructionBits(I)) + return &I; + + // zext(bool) + C -> bool ? C + 1 : C + if (ZExtInst *ZI = dyn_cast(LHS)) + if (ZI->getSrcTy()->isIntegerTy(1)) + return SelectInst::Create(ZI->getOperand(0), AddOne(CI), CI); + + Value *XorLHS = 0; ConstantInt *XorRHS = 0; + if (match(LHS, m_Xor(m_Value(XorLHS), m_ConstantInt(XorRHS)))) { uint32_t TySizeBits = I.getType()->getScalarSizeInBits(); - const APInt& RHSVal = cast(RHSC)->getValue(); + const APInt &RHSVal = CI->getValue(); unsigned ExtendAmt = 0; // If we have ADD(XOR(AND(X, 0xFF), 0x80), 0xF..F80), it's a sext. // If we have ADD(XOR(AND(X, 0xFF), 0xF..F80), 0x80), it's a sext. @@ -133,13 +124,13 @@ else if (XorRHS->getValue().isPowerOf2()) ExtendAmt = TySizeBits - XorRHS->getValue().logBase2() - 1; } - + if (ExtendAmt) { APInt Mask = APInt::getHighBitsSet(TySizeBits, ExtendAmt); if (!MaskedValueIsZero(XorLHS, Mask)) ExtendAmt = 0; } - + if (ExtendAmt) { Constant *ShAmt = ConstantInt::get(I.getType(), ExtendAmt); Value *NewShl = Builder->CreateShl(XorLHS, ShAmt, "sext"); @@ -148,23 +139,23 @@ } } + if (isa(RHS) && isa(LHS)) + if (Instruction *NV = FoldOpIntoPhi(I)) + return NV; + if (I.getType()->isIntegerTy(1)) return BinaryOperator::CreateXor(LHS, RHS); - if (I.getType()->isIntegerTy()) { - // X + X --> X << 1 - if (LHS == RHS) - return BinaryOperator::CreateShl(LHS, ConstantInt::get(I.getType(), 1)); - } + // X + X --> X << 1 + if (LHS == RHS && I.getType()->isIntegerTy()) + return BinaryOperator::CreateShl(LHS, ConstantInt::get(I.getType(), 1)); // -A + B --> B - A // -A + -B --> -(A + B) if (Value *LHSV = dyn_castNegVal(LHS)) { - if (LHS->getType()->isIntOrIntVectorTy()) { - if (Value *RHSV = dyn_castNegVal(RHS)) { - Value *NewAdd = Builder->CreateAdd(LHSV, RHSV, "sum"); - return BinaryOperator::CreateNeg(NewAdd); - } + if (Value *RHSV = dyn_castNegVal(RHS)) { + Value *NewAdd = Builder->CreateAdd(LHSV, RHSV, "sum"); + return BinaryOperator::CreateNeg(NewAdd); } return BinaryOperator::CreateSub(RHS, LHSV); @@ -209,7 +200,7 @@ } // W*X + Y*Z --> W * (X+Z) iff W == Y - if (I.getType()->isIntOrIntVectorTy()) { + { Value *W, *X, *Y, *Z; if (match(LHS, m_Mul(m_Value(W), m_Value(X))) && match(RHS, m_Mul(m_Value(Y), m_Value(Z)))) { @@ -238,24 +229,22 @@ // (X & FF00) + xx00 -> (X+xx00) & FF00 if (LHS->hasOneUse() && - match(LHS, m_And(m_Value(X), m_ConstantInt(C2)))) { - Constant *Anded = ConstantExpr::getAnd(CRHS, C2); - if (Anded == CRHS) { - // See if all bits from the first bit set in the Add RHS up are included - // in the mask. First, get the rightmost bit. - const APInt &AddRHSV = CRHS->getValue(); - - // Form a mask of all bits from the lowest bit added through the top. - APInt AddRHSHighBits(~((AddRHSV & -AddRHSV)-1)); - - // See if the and mask includes all of these bits. - APInt AddRHSHighBitsAnd(AddRHSHighBits & C2->getValue()); - - if (AddRHSHighBits == AddRHSHighBitsAnd) { - // Okay, the xform is safe. Insert the new add pronto. - Value *NewAdd = Builder->CreateAdd(X, CRHS, LHS->getName()); - return BinaryOperator::CreateAnd(NewAdd, C2); - } + match(LHS, m_And(m_Value(X), m_ConstantInt(C2))) && + CRHS->getValue() == (CRHS->getValue() & C2->getValue())) { + // See if all bits from the first bit set in the Add RHS up are included + // in the mask. First, get the rightmost bit. + const APInt &AddRHSV = CRHS->getValue(); + + // Form a mask of all bits from the lowest bit added through the top. + APInt AddRHSHighBits(~((AddRHSV & -AddRHSV)-1)); + + // See if the and mask includes all of these bits. + APInt AddRHSHighBitsAnd(AddRHSHighBits & C2->getValue()); + + if (AddRHSHighBits == AddRHSHighBitsAnd) { + // Okay, the xform is safe. Insert the new add pronto. + Value *NewAdd = Builder->CreateAdd(X, CRHS, LHS->getName()); + return BinaryOperator::CreateAnd(NewAdd, C2); } } @@ -280,12 +269,11 @@ // Can we fold the add into the argument of the select? // We check both true and false select arguments for a matching subtract. - if (match(FV, m_Zero()) && - match(TV, m_Sub(m_Value(N), m_Specific(A)))) + if (match(FV, m_Zero()) && match(TV, m_Sub(m_Value(N), m_Specific(A)))) // Fold the add into the true select value. return SelectInst::Create(SI->getCondition(), N, A); - if (match(TV, m_Zero()) && - match(FV, m_Sub(m_Value(N), m_Specific(A)))) + + if (match(TV, m_Zero()) && match(FV, m_Sub(m_Value(N), m_Specific(A)))) // Fold the add into the false select value. return SelectInst::Create(SI->getCondition(), A, N); } @@ -550,12 +538,12 @@ if (I.getType()->isIntegerTy(1)) return BinaryOperator::CreateXor(Op0, Op1); + + // Replace (-1 - A) with (~A). + if (match(Op0, m_AllOnes())) + return BinaryOperator::CreateNot(Op1); if (ConstantInt *C = dyn_cast(Op0)) { - // Replace (-1 - A) with (~A). - if (C->isAllOnesValue()) - return BinaryOperator::CreateNot(Op1); - // C - ~X == X + (1+C) Value *X = 0; if (match(Op1, m_Not(m_Value(X)))) @@ -564,29 +552,16 @@ // -(X >>u 31) -> (X >>s 31) // -(X >>s 31) -> (X >>u 31) if (C->isZero()) { - if (BinaryOperator *SI = dyn_cast(Op1)) { - if (SI->getOpcode() == Instruction::LShr) { - if (ConstantInt *CU = dyn_cast(SI->getOperand(1))) { - // Check to see if we are shifting out everything but the sign bit. - if (CU->getLimitedValue(SI->getType()->getPrimitiveSizeInBits()) == - SI->getType()->getPrimitiveSizeInBits()-1) { - // Ok, the transformation is safe. Insert AShr. - return BinaryOperator::Create(Instruction::AShr, - SI->getOperand(0), CU, SI->getName()); - } - } - } else if (SI->getOpcode() == Instruction::AShr) { - if (ConstantInt *CU = dyn_cast(SI->getOperand(1))) { - // Check to see if we are shifting out everything but the sign bit. - if (CU->getLimitedValue(SI->getType()->getPrimitiveSizeInBits()) == - SI->getType()->getPrimitiveSizeInBits()-1) { - // Ok, the transformation is safe. Insert LShr. - return BinaryOperator::CreateLShr( - SI->getOperand(0), CU, SI->getName()); - } - } - } - } + Value *X; ConstantInt *CI; + if (match(Op1, m_LShr(m_Value(X), m_ConstantInt(CI))) && + // Verify we are shifting out everything but the sign bit. + CI->getValue() == I.getType()->getPrimitiveSizeInBits()-1) + return BinaryOperator::CreateAShr(X, CI); + + if (match(Op1, m_AShr(m_Value(X), m_ConstantInt(CI))) && + // Verify we are shifting out everything but the sign bit. + CI->getValue() == I.getType()->getPrimitiveSizeInBits()-1) + return BinaryOperator::CreateLShr(X, CI); } // Try to fold constant sub into select arguments. @@ -596,99 +571,80 @@ // C - zext(bool) -> bool ? C - 1 : C if (ZExtInst *ZI = dyn_cast(Op1)) - if (ZI->getSrcTy() == Type::getInt1Ty(I.getContext())) + if (ZI->getSrcTy()->isIntegerTy(1)) return SelectInst::Create(ZI->getOperand(0), SubOne(C), C); - } - if (BinaryOperator *Op1I = dyn_cast(Op1)) { - if (Op1I->getOpcode() == Instruction::Add) { - if (Op1I->getOperand(0) == Op0) // X-(X+Y) == -Y - return BinaryOperator::CreateNeg(Op1I->getOperand(1), - I.getName()); - else if (Op1I->getOperand(1) == Op0) // X-(Y+X) == -Y - return BinaryOperator::CreateNeg(Op1I->getOperand(0), - I.getName()); - else if (ConstantInt *CI1 = dyn_cast(I.getOperand(0))) { - if (ConstantInt *CI2 = dyn_cast(Op1I->getOperand(1))) - // C1-(X+C2) --> (C1-C2)-X - return BinaryOperator::CreateSub( - ConstantExpr::getSub(CI1, CI2), Op1I->getOperand(0)); - } - } - - if (Op1I->hasOneUse()) { - // Replace (x - (y - z)) with (x + (z - y)) if the (y - z) subexpression - // is not used by anyone else... - // - if (Op1I->getOpcode() == Instruction::Sub) { - // Swap the two operands of the subexpr... - Value *IIOp0 = Op1I->getOperand(0), *IIOp1 = Op1I->getOperand(1); - Op1I->setOperand(0, IIOp1); - Op1I->setOperand(1, IIOp0); - - // Create the new top level add instruction... - return BinaryOperator::CreateAdd(Op0, Op1); - } - - // Replace (A - (A & B)) with (A & ~B) if this is the only use of (A&B)... - // - if (Op1I->getOpcode() == Instruction::And && - (Op1I->getOperand(0) == Op0 || Op1I->getOperand(1) == Op0)) { - Value *OtherOp = Op1I->getOperand(Op1I->getOperand(0) == Op0); - - Value *NewNot = Builder->CreateNot(OtherOp, "B.not"); - return BinaryOperator::CreateAnd(Op0, NewNot); - } - - // 0 - (X sdiv C) -> (X sdiv -C) - if (Op1I->getOpcode() == Instruction::SDiv) - if (ConstantInt *CSI = dyn_cast(Op0)) - if (CSI->isZero()) - if (Constant *DivRHS = dyn_cast(Op1I->getOperand(1))) - return BinaryOperator::CreateSDiv(Op1I->getOperand(0), - ConstantExpr::getNeg(DivRHS)); - - // 0 - (C << X) -> (-C << X) - if (Op1I->getOpcode() == Instruction::Shl) - if (ConstantInt *CSI = dyn_cast(Op0)) - if (CSI->isZero()) - if (Value *ShlLHSNeg = dyn_castNegVal(Op1I->getOperand(0))) - return BinaryOperator::CreateShl(ShlLHSNeg, Op1I->getOperand(1)); - - // X - X*C --> X * (1-C) - ConstantInt *C2 = 0; - if (dyn_castFoldableMul(Op1I, C2) == Op0) { - Constant *CP1 = - ConstantExpr::getSub(ConstantInt::get(I.getType(), 1), - C2); - return BinaryOperator::CreateMul(Op0, CP1); - } - - // X - A*-B -> X + A*B - // X - -A*B -> X + A*B - Value *A, *B; - if (match(Op1I, m_Mul(m_Value(A), m_Neg(m_Value(B)))) || - match(Op1I, m_Mul(m_Neg(m_Value(A)), m_Value(B)))) { - Value *NewMul = Builder->CreateMul(A, B); - return BinaryOperator::CreateAdd(Op0, NewMul); - } - - // X - A*Cst -> X + A*-Cst - // X - Cst*A -> X + A*-Cst - ConstantInt *BCst; - if (match(Op1I, m_Mul(m_Value(A), m_ConstantInt(BCst))) || - match(Op1I, m_Mul(m_ConstantInt(BCst), m_Value(A)))) { - Value *NewMul = Builder->CreateMul(A, ConstantExpr::getNeg(BCst)); - return BinaryOperator::CreateAdd(Op0, NewMul); - } - } + // C-(X+C2) --> (C-C2)-X + ConstantInt *C2; + if (match(Op1, m_Add(m_Value(X), m_ConstantInt(C2)))) + return BinaryOperator::CreateSub(ConstantExpr::getSub(C, C2), X); } - if (BinaryOperator *Op0I = dyn_cast(Op0)) { - if (Op0I->getOpcode() == Instruction::Sub) { - if (Op0I->getOperand(0) == Op1) // (X-Y)-X == -Y - return BinaryOperator::CreateNeg(Op0I->getOperand(1), - I.getName()); + + { Value *Y; + // X-(X+Y) == -Y X-(Y+X) == -Y + if (match(Op1, m_Add(m_Specific(Op0), m_Value(Y))) || + match(Op1, m_Add(m_Value(Y), m_Specific(Op0)))) + return BinaryOperator::CreateNeg(Y); + + // (X-Y)-X == -Y + if (match(Op0, m_Sub(m_Specific(Op1), m_Value(Y)))) + return BinaryOperator::CreateNeg(Y); + } + + if (Op1->hasOneUse()) { + Value *X = 0, *Y = 0, *Z = 0; + Constant *C = 0; + ConstantInt *CI = 0; + + // (X - (Y - Z)) --> (X + (Z - Y)). + if (match(Op1, m_Sub(m_Value(Y), m_Value(Z)))) + return BinaryOperator::CreateAdd(Op0, + Builder->CreateSub(Z, Y, Op1->getName())); + + // (X - (X & Y)) --> (X & ~Y) + // + if (match(Op1, m_And(m_Value(Y), m_Specific(Op0))) || + match(Op1, m_And(m_Specific(Op0), m_Value(Y)))) + return BinaryOperator::CreateAnd(Op0, + Builder->CreateNot(Y, Y->getName() + ".not")); + + // 0 - (X sdiv C) -> (X sdiv -C) + if (match(Op1, m_SDiv(m_Value(X), m_Constant(C))) && + match(Op0, m_Zero())) + return BinaryOperator::CreateSDiv(X, ConstantExpr::getNeg(C)); + + // 0 - (X << Y) -> (-X << Y) when X is freely negatable. + if (match(Op1, m_Shl(m_Value(X), m_Value(Y))) && match(Op0, m_Zero())) + if (Value *XNeg = dyn_castNegVal(X)) + return BinaryOperator::CreateShl(XNeg, Y); + + // X - X*C --> X * (1-C) + if (match(Op1, m_Mul(m_Specific(Op0), m_ConstantInt(CI)))) { + Constant *CP1 = ConstantExpr::getSub(ConstantInt::get(I.getType(),1), CI); + return BinaryOperator::CreateMul(Op0, CP1); + } + + // X - X< X * (1-(1< X + A*B + // X - -A*B -> X + A*B + Value *A, *B; + if (match(Op1, m_Mul(m_Value(A), m_Neg(m_Value(B)))) || + match(Op1, m_Mul(m_Neg(m_Value(A)), m_Value(B)))) + return BinaryOperator::CreateAdd(Op0, Builder->CreateMul(A, B)); + + // X - A*CI -> X + A*-CI + // X - CI*A -> X + A*-CI + if (match(Op1, m_Mul(m_Value(A), m_ConstantInt(CI))) || + match(Op1, m_Mul(m_ConstantInt(CI), m_Value(A)))) { + Value *NewMul = Builder->CreateMul(A, ConstantExpr::getNeg(CI)); + return BinaryOperator::CreateAdd(Op0, NewMul); } } From sabre at nondot.org Wed Feb 9 23:17:27 2011 From: sabre at nondot.org (Chris Lattner) Date: Thu, 10 Feb 2011 05:17:27 -0000 Subject: [llvm-commits] [llvm] r125265 - in /llvm/trunk: lib/Transforms/InstCombine/InstCombineAndOrXor.cpp test/Transforms/InstCombine/sub.ll Message-ID: <20110210051727.C0D532A6C12C@llvm.org> Author: lattner Date: Wed Feb 9 23:17:27 2011 New Revision: 125265 URL: http://llvm.org/viewvc/llvm-project?rev=125265&view=rev Log: more cleanups, notably bitcast isn't used for "signed to unsigned type conversions". :) Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp llvm/trunk/test/Transforms/InstCombine/sub.ll Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp?rev=125265&r1=125264&r2=125265&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp Wed Feb 9 23:17:27 2011 @@ -703,9 +703,9 @@ // whole construct if (!MCst->isZero()) return 0; - Value* newOr1 = Builder->CreateOr(B, D); - Value* newOr2 = ConstantExpr::getOr(CCst, ECst); - Value* newAnd = Builder->CreateAnd(A, newOr1); + Value *newOr1 = Builder->CreateOr(B, D); + Value *newOr2 = ConstantExpr::getOr(CCst, ECst); + Value *newAnd = Builder->CreateAnd(A, newOr1); return Builder->CreateICmp(NEWCC, newAnd, newOr2); } return 0; @@ -729,12 +729,9 @@ } } - { - // handle (roughly): - // (icmp eq (A & B), C) & (icmp eq (A & D), E) - Value* fold = foldLogOpOfMaskedICmps(LHS, RHS, ICmpInst::ICMP_EQ, Builder); - if (fold) return fold; - } + // handle (roughly): (icmp eq (A & B), C) & (icmp eq (A & D), E) + if (Value *V = foldLogOpOfMaskedICmps(LHS, RHS, ICmpInst::ICMP_EQ, Builder)) + return V; // This only handles icmp of constants: (icmp1 A, C1) & (icmp2 B, C2). Value *Val = LHS->getOperand(0), *Val2 = RHS->getOperand(0); @@ -997,7 +994,6 @@ if (ConstantInt *AndRHS = dyn_cast(Op1)) { const APInt &AndRHSMask = AndRHS->getValue(); - APInt NotAndRHS(~AndRHSMask); // Optimize a variety of ((val OP C1) & C2) combinations... if (BinaryOperator *Op0I = dyn_cast(Op0)) { @@ -1006,10 +1002,11 @@ switch (Op0I->getOpcode()) { default: break; case Instruction::Xor: - case Instruction::Or: + case Instruction::Or: { // If the mask is only needed on one incoming arm, push it up. if (!Op0I->hasOneUse()) break; + APInt NotAndRHS(~AndRHSMask); if (MaskedValueIsZero(Op0LHS, NotAndRHS)) { // Not masking anything out for the LHS, move to RHS. Value *NewRHS = Builder->CreateAnd(Op0RHS, AndRHS, @@ -1025,6 +1022,7 @@ } break; + } case Instruction::Add: // ((A & N) + B) & AndRHS -> (A + B) & AndRHS iff N&AndRHS == AndRHS. // ((A | N) + B) & AndRHS -> (A + B) & AndRHS iff N&AndRHS == 0 @@ -1044,14 +1042,12 @@ // (A - N) & AndRHS -> -N & AndRHS iff A&AndRHS==0 and AndRHS // has 1's for all bits that the subtraction with A might affect. - if (Op0I->hasOneUse()) { + if (Op0I->hasOneUse() && !match(Op0LHS, m_Zero())) { uint32_t BitWidth = AndRHSMask.getBitWidth(); uint32_t Zeros = AndRHSMask.countLeadingZeros(); APInt Mask = APInt::getLowBitsSet(BitWidth, BitWidth - Zeros); - ConstantInt *A = dyn_cast(Op0LHS); - if (!(A && A->isZero()) && // avoid infinite recursion. - MaskedValueIsZero(Op0LHS, Mask)) { + if (MaskedValueIsZero(Op0LHS, Mask)) { Value *NewNeg = Builder->CreateNeg(Op0RHS); return BinaryOperator::CreateAnd(NewNeg, AndRHS); } @@ -1073,35 +1069,21 @@ if (ConstantInt *Op0CI = dyn_cast(Op0I->getOperand(1))) if (Instruction *Res = OptAndOp(Op0I, Op0CI, AndRHS, I)) return Res; - } else if (CastInst *CI = dyn_cast(Op0)) { - // If this is an integer truncation or change from signed-to-unsigned, and - // if the source is an and/or with immediate, transform it. This - // frequently occurs for bitfield accesses. - if (Instruction *CastOp = dyn_cast(CI->getOperand(0))) { - if ((isa(CI) || isa(CI)) && - CastOp->getNumOperands() == 2) - if (ConstantInt *AndCI =dyn_cast(CastOp->getOperand(1))){ - if (CastOp->getOpcode() == Instruction::And) { - // Change: and (cast (and X, C1) to T), C2 - // into : and (cast X to T), trunc_or_bitcast(C1)&C2 - // This will fold the two constants together, which may allow - // other simplifications. - Value *NewCast = Builder->CreateTruncOrBitCast( - CastOp->getOperand(0), I.getType(), - CastOp->getName()+".shrunk"); - // trunc_or_bitcast(C1)&C2 - Constant *C3 = ConstantExpr::getTruncOrBitCast(AndCI,I.getType()); - C3 = ConstantExpr::getAnd(C3, AndRHS); - return BinaryOperator::CreateAnd(NewCast, C3); - } else if (CastOp->getOpcode() == Instruction::Or) { - // Change: and (cast (or X, C1) to T), C2 - // into : trunc(C1)&C2 iff trunc(C1)&C2 == C2 - Constant *C3 = ConstantExpr::getTruncOrBitCast(AndCI,I.getType()); - if (ConstantExpr::getAnd(C3, AndRHS) == AndRHS) - // trunc(C1)&C2 - return ReplaceInstUsesWith(I, AndRHS); - } - } + } + + // If this is an integer truncation, and if the source is an 'and' with + // immediate, transform it. This frequently occurs for bitfield accesses. + { + Value *X = 0; ConstantInt *YC = 0; + if (match(Op0, m_Trunc(m_And(m_Value(X), m_ConstantInt(YC))))) { + // Change: and (trunc (and X, YC) to T), C2 + // into : and (trunc X to T), trunc(YC) & C2 + // This will fold the two constants together, which may allow + // other simplifications. + Value *NewCast = Builder->CreateTrunc(X, I.getType(), "and.shrunk"); + Constant *C3 = ConstantExpr::getTrunc(YC, I.getType()); + C3 = ConstantExpr::getAnd(C3, AndRHS); + return BinaryOperator::CreateAnd(NewCast, C3); } } @@ -1123,7 +1105,7 @@ I.getName()+".demorgan"); return BinaryOperator::CreateNot(Or); } - + { Value *A = 0, *B = 0, *C = 0, *D = 0; // (A|B) & ~(A&B) -> A^B Modified: llvm/trunk/test/Transforms/InstCombine/sub.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/sub.ll?rev=125265&r1=125264&r2=125265&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/sub.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/sub.ll Wed Feb 9 23:17:27 2011 @@ -40,7 +40,7 @@ %E = sub i32 %A, %D ret i32 %E ; CHECK: @test5 -; CHECK: %D = sub i32 %C, %B +; CHECK: %D1 = sub i32 %C, %B ; CHECK: %E = add ; CHECK: ret i32 %E } From sabre at nondot.org Wed Feb 9 23:23:05 2011 From: sabre at nondot.org (Chris Lattner) Date: Thu, 10 Feb 2011 05:23:05 -0000 Subject: [llvm-commits] [llvm] r125266 - in /llvm/trunk: lib/Transforms/InstCombine/InstCombineCompares.cpp test/Transforms/InstCombine/exact.ll test/Transforms/InstCombine/nsw.ll Message-ID: <20110210052305.6CBB02A6C12C@llvm.org> Author: lattner Date: Wed Feb 9 23:23:05 2011 New Revision: 125266 URL: http://llvm.org/viewvc/llvm-project?rev=125266&view=rev Log: Enhance the "compare with shift" and "compare with div" optimizations to be much more aggressive in the face of exact/nsw/nuw div and shifts. For example, these (which are the same except the first is 'exact' sdiv: define i1 @sdiv_icmp4_exact(i64 %X) nounwind { %A = sdiv exact i64 %X, -5 ; X/-5 == 0 --> x == 0 %B = icmp eq i64 %A, 0 ret i1 %B } define i1 @sdiv_icmp4(i64 %X) nounwind { %A = sdiv i64 %X, -5 ; X/-5 == 0 --> x == 0 %B = icmp eq i64 %A, 0 ret i1 %B } compile down to: define i1 @sdiv_icmp4_exact(i64 %X) nounwind { %1 = icmp eq i64 %X, 0 ret i1 %1 } define i1 @sdiv_icmp4(i64 %X) nounwind { %X.off = add i64 %X, 4 %1 = icmp ult i64 %X.off, 9 ret i1 %1 } This happens when you do something like: (ptr1-ptr2) == 42 where the pointers are pointers to non-unit types. Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp llvm/trunk/test/Transforms/InstCombine/exact.ll llvm/trunk/test/Transforms/InstCombine/nsw.ll Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp?rev=125266&r1=125265&r2=125266&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp Wed Feb 9 23:23:05 2011 @@ -22,13 +22,17 @@ using namespace llvm; using namespace PatternMatch; +static ConstantInt *getOne(Constant *C) { + return ConstantInt::get(cast(C->getType()), 1); +} + /// AddOne - Add one to a ConstantInt static Constant *AddOne(Constant *C) { return ConstantExpr::getAdd(C, ConstantInt::get(C->getType(), 1)); } /// SubOne - Subtract one from a ConstantInt -static Constant *SubOne(ConstantInt *C) { - return ConstantExpr::getSub(C, ConstantInt::get(C->getType(), 1)); +static Constant *SubOne(Constant *C) { + return ConstantExpr::getSub(C, ConstantInt::get(C->getType(), 1)); } static ConstantInt *ExtractElement(Constant *V, Constant *Idx) { @@ -782,7 +786,7 @@ // results than (x /s C1) getOpcode() == Instruction::SDiv; if (!ICI.isEquality() && DivIsSigned != ICI.isSigned()) return 0; @@ -809,6 +813,10 @@ // Get the ICmp opcode ICmpInst::Predicate Pred = ICI.getPredicate(); + /// If the division is known to be exact, then there is no remainder from the + /// divide, so the covered range size is unit, otherwise it is the divisor. + ConstantInt *RangeSize = DivI->isExact() ? getOne(Prod) : DivRHS; + // Figure out the interval that is being checked. For example, a comparison // like "X /u 5 == 0" is really checking that X is in the interval [0, 5). // Compute this interval based on the constants involved and the signedness of @@ -818,38 +826,43 @@ // -1 if overflowed off the bottom end, or +1 if overflowed off the top end. int LoOverflow = 0, HiOverflow = 0; Constant *LoBound = 0, *HiBound = 0; - + if (!DivIsSigned) { // udiv // e.g. X/5 op 3 --> [15, 20) LoBound = Prod; HiOverflow = LoOverflow = ProdOV; - if (!HiOverflow) - HiOverflow = AddWithOverflow(HiBound, LoBound, DivRHS, false); + if (!HiOverflow) { + // If this is not an exact divide, then many values in the range collapse + // to the same result value. + HiOverflow = AddWithOverflow(HiBound, LoBound, RangeSize, false); + } + } else if (DivRHS->getValue().isStrictlyPositive()) { // Divisor is > 0. if (CmpRHSV == 0) { // (X / pos) op 0 // Can't overflow. e.g. X/2 op 0 --> [-1, 2) - LoBound = cast(ConstantExpr::getNeg(SubOne(DivRHS))); - HiBound = DivRHS; + LoBound = ConstantExpr::getNeg(SubOne(RangeSize)); + HiBound = RangeSize; } else if (CmpRHSV.isStrictlyPositive()) { // (X / pos) op pos LoBound = Prod; // e.g. X/5 op 3 --> [15, 20) HiOverflow = LoOverflow = ProdOV; if (!HiOverflow) - HiOverflow = AddWithOverflow(HiBound, Prod, DivRHS, true); + HiOverflow = AddWithOverflow(HiBound, Prod, RangeSize, true); } else { // (X / pos) op neg // e.g. X/5 op -3 --> [-15-4, -15+1) --> [-19, -14) HiBound = AddOne(Prod); LoOverflow = HiOverflow = ProdOV ? -1 : 0; if (!LoOverflow) { - ConstantInt* DivNeg = - cast(ConstantExpr::getNeg(DivRHS)); + ConstantInt *DivNeg =cast(ConstantExpr::getNeg(RangeSize)); LoOverflow = AddWithOverflow(LoBound, HiBound, DivNeg, true) ? -1 : 0; - } + } } } else if (DivRHS->getValue().isNegative()) { // Divisor is < 0. + if (DivI->isExact()) + RangeSize = cast(ConstantExpr::getNeg(RangeSize)); if (CmpRHSV == 0) { // (X / neg) op 0 // e.g. X/-5 op 0 --> [-4, 5) - LoBound = AddOne(DivRHS); - HiBound = cast(ConstantExpr::getNeg(DivRHS)); + LoBound = AddOne(RangeSize); + HiBound = cast(ConstantExpr::getNeg(RangeSize)); if (HiBound == DivRHS) { // -INTMIN = INTMIN HiOverflow = 1; // [INTMIN+1, overflow) HiBound = 0; // e.g. X/INTMIN = 0 --> X > INTMIN @@ -859,12 +872,12 @@ HiBound = AddOne(Prod); HiOverflow = LoOverflow = ProdOV ? -1 : 0; if (!LoOverflow) - LoOverflow = AddWithOverflow(LoBound, HiBound, DivRHS, true) ? -1 : 0; + LoOverflow = AddWithOverflow(LoBound, HiBound, RangeSize, true) ? -1:0; } else { // (X / neg) op neg LoBound = Prod; // e.g. X/-5 op -3 --> [15, 20) LoOverflow = HiOverflow = ProdOV; if (!HiOverflow) - HiOverflow = SubWithOverflow(HiBound, Prod, DivRHS, true); + HiOverflow = SubWithOverflow(HiBound, Prod, RangeSize, true); } // Dividing by a negative swaps the condition. LT <-> GT @@ -883,9 +896,8 @@ if (LoOverflow) return new ICmpInst(DivIsSigned ? ICmpInst::ICMP_SLT : ICmpInst::ICMP_ULT, X, HiBound); - return ReplaceInstUsesWith(ICI, - InsertRangeTest(X, LoBound, HiBound, DivIsSigned, - true)); + return ReplaceInstUsesWith(ICI, InsertRangeTest(X, LoBound, HiBound, + DivIsSigned, true)); case ICmpInst::ICMP_NE: if (LoOverflow && HiOverflow) return ReplaceInstUsesWith(ICI, ConstantInt::getTrue(ICI.getContext())); @@ -908,12 +920,11 @@ case ICmpInst::ICMP_SGT: if (HiOverflow == +1) // High bound greater than input range. return ReplaceInstUsesWith(ICI, ConstantInt::getFalse(ICI.getContext())); - else if (HiOverflow == -1) // High bound less than input range. + if (HiOverflow == -1) // High bound less than input range. return ReplaceInstUsesWith(ICI, ConstantInt::getTrue(ICI.getContext())); if (Pred == ICmpInst::ICMP_UGT) return new ICmpInst(ICmpInst::ICMP_UGE, X, HiBound); - else - return new ICmpInst(ICmpInst::ICMP_SGE, X, HiBound); + return new ICmpInst(ICmpInst::ICMP_SGE, X, HiBound); } } @@ -1182,6 +1193,12 @@ return ReplaceInstUsesWith(ICI, Cst); } + // If the shift is NUW, then it is just shifting out zeros, no need for an + // AND. + if (cast(LHSI)->hasNoUnsignedWrap()) + return new ICmpInst(ICI.getPredicate(), LHSI->getOperand(0), + ConstantExpr::getLShr(RHS, ShAmt)); + if (LHSI->hasOneUse()) { // Otherwise strength reduce the shift into an and. uint32_t ShAmtVal = (uint32_t)ShAmt->getLimitedValue(TypeBits); @@ -1192,8 +1209,7 @@ Value *And = Builder->CreateAnd(LHSI->getOperand(0),Mask, LHSI->getName()+".mask"); return new ICmpInst(ICI.getPredicate(), And, - ConstantInt::get(ICI.getContext(), - RHSV.lshr(ShAmtVal))); + ConstantExpr::getLShr(RHS, ShAmt)); } } @@ -1222,10 +1238,9 @@ // undefined shifts. When the shift is visited it will be // simplified. uint32_t TypeBits = RHSV.getBitWidth(); - if (ShAmt->uge(TypeBits)) - break; - uint32_t ShAmtVal = (uint32_t)ShAmt->getLimitedValue(TypeBits); + if (ShAmtVal >= TypeBits) + break; // If we are comparing against bits always shifted out, the // comparison cannot succeed. @@ -1245,13 +1260,10 @@ // Otherwise, check to see if the bits shifted out are known to be zero. // If so, we can compare against the unshifted value: // (X & 4) >> 1 == 2 --> (X & 4) == 4. - if (LHSI->hasOneUse() && - MaskedValueIsZero(LHSI->getOperand(0), - APInt::getLowBitsSet(Comp.getBitWidth(), ShAmtVal))) { + if (LHSI->hasOneUse() && cast(LHSI)->isExact()) return new ICmpInst(ICI.getPredicate(), LHSI->getOperand(0), ConstantExpr::getShl(RHS, ShAmt)); - } - + if (LHSI->hasOneUse()) { // Otherwise strength reduce the shift into an and. APInt Val(APInt::getHighBitsSet(TypeBits, TypeBits - ShAmtVal)); @@ -1911,14 +1923,12 @@ // If the LHS is 8 >>u x, and we know the result is a power of 2 like 1, // then turn "((8 >>u x)&1) == 0" into "x != 3". - ConstantInt *CI = 0; + const APInt *CI; if (Op0KnownZeroInverted == 1 && - match(LHS, m_LShr(m_ConstantInt(CI), m_Value(X))) && - CI->getValue().isPowerOf2()) { - unsigned CmpVal = CI->getValue().countTrailingZeros(); + match(LHS, m_LShr(m_Power2(CI), m_Value(X)))) return new ICmpInst(ICmpInst::ICMP_NE, X, - ConstantInt::get(X->getType(), CmpVal)); - } + ConstantInt::get(X->getType(), + CI->countTrailingZeros())); } break; @@ -1950,14 +1960,12 @@ // If the LHS is 8 >>u x, and we know the result is a power of 2 like 1, // then turn "((8 >>u x)&1) != 0" into "x == 3". - ConstantInt *CI = 0; + const APInt *CI; if (Op0KnownZeroInverted == 1 && - match(LHS, m_LShr(m_ConstantInt(CI), m_Value(X))) && - CI->getValue().isPowerOf2()) { - unsigned CmpVal = CI->getValue().countTrailingZeros(); + match(LHS, m_LShr(m_Power2(CI), m_Value(X)))) return new ICmpInst(ICmpInst::ICMP_EQ, X, - ConstantInt::get(X->getType(), CmpVal)); - } + ConstantInt::get(X->getType(), + CI->countTrailingZeros())); } break; Modified: llvm/trunk/test/Transforms/InstCombine/exact.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/exact.ll?rev=125266&r1=125265&r2=125266&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/exact.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/exact.ll Wed Feb 9 23:23:05 2011 @@ -1,60 +1,119 @@ ; RUN: opt < %s -instcombine -S | FileCheck %s -; CHECK: define i32 @foo +; CHECK: @sdiv1 ; CHECK: sdiv i32 %x, 8 -define i32 @foo(i32 %x) { +define i32 @sdiv1(i32 %x) { %y = sdiv i32 %x, 8 ret i32 %y } -; CHECK: define i32 @bar -; CHECK: ashr i32 %x, 3 -define i32 @bar(i32 %x) { - %y = sdiv exact i32 %x, 8 - ret i32 %y -} - -; CHECK: i32 @a0 +; CHECK: @sdiv3 ; CHECK: %y = srem i32 %x, 3 ; CHECK: %z = sub i32 %x, %y ; CHECK: ret i32 %z -define i32 @a0(i32 %x) { +define i32 @sdiv3(i32 %x) { %y = sdiv i32 %x, 3 %z = mul i32 %y, 3 ret i32 %z } -; CHECK: i32 @b0 +; CHECK: @sdiv4 ; CHECK: ret i32 %x -define i32 @b0(i32 %x) { +define i32 @sdiv4(i32 %x) { %y = sdiv exact i32 %x, 3 %z = mul i32 %y, 3 ret i32 %z } -; CHECK: i32 @a1 +; CHECK: i32 @sdiv5 ; CHECK: %y = srem i32 %x, 3 ; CHECK: %z = sub i32 %y, %x ; CHECK: ret i32 %z -define i32 @a1(i32 %x) { +define i32 @sdiv5(i32 %x) { %y = sdiv i32 %x, 3 %z = mul i32 %y, -3 ret i32 %z } -; CHECK: i32 @b1 +; CHECK: @sdiv6 ; CHECK: %z = sub i32 0, %x ; CHECK: ret i32 %z -define i32 @b1(i32 %x) { +define i32 @sdiv6(i32 %x) { %y = sdiv exact i32 %x, 3 %z = mul i32 %y, -3 ret i32 %z } -; CHECK: i32 @b2 +; CHECK: @udiv1 ; CHECK: ret i32 %x -define i32 @b2(i32 %x, i32 %w) { +define i32 @udiv1(i32 %x, i32 %w) { %y = udiv exact i32 %x, %w %z = mul i32 %y, %w ret i32 %z } + +; CHECK: @ashr_icmp +; CHECK: %B = icmp eq i64 %X, 0 +; CHECK: ret i1 %B +define i1 @ashr_icmp(i64 %X) nounwind { + %A = ashr exact i64 %X, 2 ; X/4 + %B = icmp eq i64 %A, 0 + ret i1 %B +} + +; CHECK: @udiv_icmp1 +; CHECK: icmp ne i64 %X, 0 +define i1 @udiv_icmp1(i64 %X) nounwind { + %A = udiv exact i64 %X, 5 ; X/5 + %B = icmp ne i64 %A, 0 + ret i1 %B +} + +; CHECK: @sdiv_icmp1 +; CHECK: icmp eq i64 %X, 0 +define i1 @sdiv_icmp1(i64 %X) nounwind { + %A = sdiv exact i64 %X, 5 ; X/5 == 0 --> x == 0 + %B = icmp eq i64 %A, 0 + ret i1 %B +} + +; CHECK: @sdiv_icmp2 +; CHECK: icmp eq i64 %X, 5 +define i1 @sdiv_icmp2(i64 %X) nounwind { + %A = sdiv exact i64 %X, 5 ; X/5 == 1 --> x == 5 + %B = icmp eq i64 %A, 1 + ret i1 %B +} + +; CHECK: @sdiv_icmp3 +; CHECK: icmp eq i64 %X, -5 +define i1 @sdiv_icmp3(i64 %X) nounwind { + %A = sdiv exact i64 %X, 5 ; X/5 == -1 --> x == -5 + %B = icmp eq i64 %A, -1 + ret i1 %B +} + +; CHECK: @sdiv_icmp4 +; CHECK: icmp eq i64 %X, 0 +define i1 @sdiv_icmp4(i64 %X) nounwind { + %A = sdiv exact i64 %X, -5 ; X/-5 == 0 --> x == 0 + %B = icmp eq i64 %A, 0 + ret i1 %B +} + +; CHECK: @sdiv_icmp5 +; CHECK: icmp eq i64 %X, -5 +define i1 @sdiv_icmp5(i64 %X) nounwind { + %A = sdiv exact i64 %X, -5 ; X/-5 == 1 --> x == -5 + %B = icmp eq i64 %A, 1 + ret i1 %B +} + +; CHECK: @sdiv_icmp6 +; CHECK: icmp eq i64 %X, 5 +define i1 @sdiv_icmp6(i64 %X) nounwind { + %A = sdiv exact i64 %X, -5 ; X/-5 == 1 --> x == 5 + %B = icmp eq i64 %A, -1 + ret i1 %B +} + Modified: llvm/trunk/test/Transforms/InstCombine/nsw.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/nsw.ll?rev=125266&r1=125265&r2=125266&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/nsw.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/nsw.ll Wed Feb 9 23:23:05 2011 @@ -1,20 +1,30 @@ ; RUN: opt < %s -instcombine -S | FileCheck %s -; CHECK: define i32 @foo -; %y = sub i32 0, %x -; %z = sdiv i32 %y, 337 -; ret i32 %y -define i32 @foo(i32 %x) { +; CHECK: @sub1 +; CHECK: %y = sub i32 0, %x +; CHECK: %z = sdiv i32 %y, 337 +; CHECK: ret i32 %z +define i32 @sub1(i32 %x) { %y = sub i32 0, %x %z = sdiv i32 %y, 337 - ret i32 %y + ret i32 %z } -; CHECK: define i32 @bar -; %y = sdiv i32 %x, -337 -; ret i32 %y -define i32 @bar(i32 %x) { +; CHECK: @sub2 +; CHECK: %z = sdiv i32 %x, -337 +; CHECK: ret i32 %z +define i32 @sub2(i32 %x) { %y = sub nsw i32 0, %x %z = sdiv i32 %y, 337 - ret i32 %y + ret i32 %z } + +; CHECK: @shl_icmp +; CHECK: %B = icmp eq i64 %X, 0 +; CHECK: ret i1 %B +define i1 @shl_icmp(i64 %X) nounwind { + %A = shl nuw i64 %X, 2 ; X/4 + %B = icmp eq i64 %A, 0 + ret i1 %B +} + From sabre at nondot.org Wed Feb 9 23:36:31 2011 From: sabre at nondot.org (Chris Lattner) Date: Thu, 10 Feb 2011 05:36:31 -0000 Subject: [llvm-commits] [llvm] r125267 - in /llvm/trunk: lib/Transforms/InstCombine/ test/Transforms/InstCombine/ Message-ID: <20110210053631.825F92A6C12C@llvm.org> Author: lattner Date: Wed Feb 9 23:36:31 2011 New Revision: 125267 URL: http://llvm.org/viewvc/llvm-project?rev=125267&view=rev Log: Enhance a bunch of transformations in instcombine to start generating exact/nsw/nuw shifts and have instcombine infer them when it can prove that the relevant properties are true for a given shift without them. Also, a variety of refactoring to use the new patternmatch logic thrown in for good luck. I believe that this takes care of a bunch of related code quality issues attached to PR8862. Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp llvm/trunk/test/Transforms/InstCombine/2006-04-28-ShiftShiftLongLong.ll llvm/trunk/test/Transforms/InstCombine/2007-03-26-BadShiftMask.ll llvm/trunk/test/Transforms/InstCombine/cast.ll llvm/trunk/test/Transforms/InstCombine/exact.ll llvm/trunk/test/Transforms/InstCombine/nsw.ll llvm/trunk/test/Transforms/InstCombine/pr8547.ll llvm/trunk/test/Transforms/InstCombine/sext.ll llvm/trunk/test/Transforms/InstCombine/shift.ll llvm/trunk/test/Transforms/InstCombine/signext.ll llvm/trunk/test/Transforms/InstCombine/trunc.ll Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp?rev=125267&r1=125266&r2=125267&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp Wed Feb 9 23:36:31 2011 @@ -19,11 +19,6 @@ using namespace llvm; using namespace PatternMatch; -/// SubOne - Subtract one from a ConstantInt. -static Constant *SubOne(ConstantInt *C) { - return ConstantInt::get(C->getContext(), C->getValue()-1); -} - /// MultiplyOverflows - True if the multiply can not be expressed in an int /// this size. static bool MultiplyOverflows(ConstantInt *C1, ConstantInt *C2, bool sign) { @@ -57,52 +52,39 @@ if (Value *V = SimplifyUsingDistributiveLaws(I)) return ReplaceInstUsesWith(I, V); - // Simplify mul instructions with a constant RHS. - if (Constant *Op1C = dyn_cast(Op1)) { - if (ConstantInt *CI = dyn_cast(Op1C)) { - - // ((X << C1)*C2) == (X * (C2 << C1)) - if (BinaryOperator *SI = dyn_cast(Op0)) - if (SI->getOpcode() == Instruction::Shl) - if (Constant *ShOp = dyn_cast(SI->getOperand(1))) - return BinaryOperator::CreateMul(SI->getOperand(0), - ConstantExpr::getShl(CI, ShOp)); - - if (CI->isAllOnesValue()) // X * -1 == 0 - X - return BinaryOperator::CreateNeg(Op0, I.getName()); - - const APInt& Val = cast(CI)->getValue(); - if (Val.isPowerOf2()) { // Replace X*(2^C) with X << C - return BinaryOperator::CreateShl(Op0, - ConstantInt::get(Op0->getType(), Val.logBase2())); - } - } else if (Op1C->getType()->isVectorTy()) { - if (Op1C->isNullValue()) - return ReplaceInstUsesWith(I, Op1C); - - if (ConstantVector *Op1V = dyn_cast(Op1C)) { - if (Op1V->isAllOnesValue()) // X * -1 == 0 - X - return BinaryOperator::CreateNeg(Op0, I.getName()); - - // As above, vector X*splat(1.0) -> X in all defined cases. - if (Constant *Splat = Op1V->getSplatValue()) { - if (ConstantInt *CI = dyn_cast(Splat)) - if (CI->equalsInt(1)) - return ReplaceInstUsesWith(I, Op0); - } - } + if (match(Op1, m_AllOnes())) // X * -1 == 0 - X + return BinaryOperator::CreateNeg(Op0, I.getName()); + + if (ConstantInt *CI = dyn_cast(Op1)) { + + // ((X << C1)*C2) == (X * (C2 << C1)) + if (BinaryOperator *SI = dyn_cast(Op0)) + if (SI->getOpcode() == Instruction::Shl) + if (Constant *ShOp = dyn_cast(SI->getOperand(1))) + return BinaryOperator::CreateMul(SI->getOperand(0), + ConstantExpr::getShl(CI, ShOp)); + + const APInt &Val = CI->getValue(); + if (Val.isPowerOf2()) { // Replace X*(2^C) with X << C + Constant *NewCst = ConstantInt::get(Op0->getType(), Val.logBase2()); + BinaryOperator *Shl = BinaryOperator::CreateShl(Op0, NewCst); + if (I.hasNoSignedWrap()) Shl->setHasNoSignedWrap(); + if (I.hasNoUnsignedWrap()) Shl->setHasNoUnsignedWrap(); + return Shl; } - if (BinaryOperator *Op0I = dyn_cast(Op0)) - if (Op0I->getOpcode() == Instruction::Add && Op0I->hasOneUse() && - isa(Op0I->getOperand(1)) && isa(Op1C)) { - // Canonicalize (X+C1)*C2 -> X*C2+C1*C2. - Value *Add = Builder->CreateMul(Op0I->getOperand(0), Op1C, "tmp"); - Value *C1C2 = Builder->CreateMul(Op1C, Op0I->getOperand(1)); - return BinaryOperator::CreateAdd(Add, C1C2); - + // Canonicalize (X+C1)*CI -> X*CI+C1*CI. + { Value *X; ConstantInt *C1; + if (Op0->hasOneUse() && + match(Op0, m_Add(m_Value(X), m_ConstantInt(C1)))) { + Value *Add = Builder->CreateMul(X, CI, "tmp"); + return BinaryOperator::CreateAdd(Add, Builder->CreateMul(C1, CI)); } - + } + } + + // Simplify mul instructions with a constant RHS. + if (isa(Op1)) { // Try to fold constant mul into select arguments. if (SelectInst *SI = dyn_cast(Op0)) if (Instruction *R = FoldOpIntoSelect(I, SI)) @@ -324,9 +306,8 @@ if (MultiplyOverflows(RHS, LHSRHS, I.getOpcode()==Instruction::SDiv)) return ReplaceInstUsesWith(I, Constant::getNullValue(I.getType())); - else - return BinaryOperator::Create(I.getOpcode(), LHS->getOperand(0), - ConstantExpr::getMul(RHS, LHSRHS)); + return BinaryOperator::Create(I.getOpcode(), LHS->getOperand(0), + ConstantExpr::getMul(RHS, LHSRHS)); } if (!RHS->isZero()) { // avoid X udiv 0 @@ -365,54 +346,50 @@ // X udiv 2^C -> X >> C // Check to see if this is an unsigned division with an exact power of 2, // if so, convert to a right shift. - if (C->getValue().isPowerOf2()) // 0 not included in isPowerOf2 - return BinaryOperator::CreateLShr(Op0, + if (C->getValue().isPowerOf2()) { // 0 not included in isPowerOf2 + BinaryOperator *LShr = + BinaryOperator::CreateLShr(Op0, ConstantInt::get(Op0->getType(), C->getValue().logBase2())); + if (I.isExact()) LShr->setIsExact(); + return LShr; + } // X udiv C, where C >= signbit if (C->getValue().isNegative()) { - Value *IC = Builder->CreateICmpULT( Op0, C); + Value *IC = Builder->CreateICmpULT(Op0, C); return SelectInst::Create(IC, Constant::getNullValue(I.getType()), ConstantInt::get(I.getType(), 1)); } } // X udiv (C1 << N), where C1 is "1< X >> (N+C2) - if (BinaryOperator *RHSI = dyn_cast(I.getOperand(1))) { - if (RHSI->getOpcode() == Instruction::Shl && - isa(RHSI->getOperand(0))) { - const APInt& C1 = cast(RHSI->getOperand(0))->getValue(); - if (C1.isPowerOf2()) { - Value *N = RHSI->getOperand(1); - const Type *NTy = N->getType(); - if (uint32_t C2 = C1.logBase2()) - N = Builder->CreateAdd(N, ConstantInt::get(NTy, C2), "tmp"); - return BinaryOperator::CreateLShr(Op0, N); - } + { const APInt *CI; Value *N; + if (match(Op1, m_Shl(m_Power2(CI), m_Value(N)))) { + if (*CI != 1) + N = Builder->CreateAdd(N, ConstantInt::get(I.getType(), CI->logBase2()), + "tmp"); + if (I.isExact()) + return BinaryOperator::CreateExactLShr(Op0, N); + return BinaryOperator::CreateLShr(Op0, N); } } // udiv X, (Select Cond, C1, C2) --> Select Cond, (shr X, C1), (shr X, C2) // where C1&C2 are powers of two. - if (SelectInst *SI = dyn_cast(Op1)) - if (ConstantInt *STO = dyn_cast(SI->getOperand(1))) - if (ConstantInt *SFO = dyn_cast(SI->getOperand(2))) { - const APInt &TVA = STO->getValue(), &FVA = SFO->getValue(); - if (TVA.isPowerOf2() && FVA.isPowerOf2()) { - // Compute the shift amounts - uint32_t TSA = TVA.logBase2(), FSA = FVA.logBase2(); - // Construct the "on true" case of the select - Constant *TC = ConstantInt::get(Op0->getType(), TSA); - Value *TSI = Builder->CreateLShr(Op0, TC, SI->getName()+".t"); - - // Construct the "on false" case of the select - Constant *FC = ConstantInt::get(Op0->getType(), FSA); - Value *FSI = Builder->CreateLShr(Op0, FC, SI->getName()+".f"); - - // construct the select instruction and return it. - return SelectInst::Create(SI->getOperand(0), TSI, FSI, SI->getName()); - } - } + { Value *Cond; const APInt *C1, *C2; + if (match(Op1, m_Select(m_Value(Cond), m_Power2(C1), m_Power2(C2)))) { + // Construct the "on true" case of the select + Value *TSI = Builder->CreateLShr(Op0, C1->logBase2(), Op1->getName()+".t", + I.isExact()); + + // Construct the "on false" case of the select + Value *FSI = Builder->CreateLShr(Op0, C2->logBase2(), Op1->getName()+".f", + I.isExact()); + + // construct the select instruction and return it. + return SelectInst::Create(Cond, TSI, FSI); + } + } return 0; } @@ -431,20 +408,17 @@ if (RHS->isAllOnesValue()) return BinaryOperator::CreateNeg(Op0); - // sdiv X, C --> ashr X, log2(C) - if (cast(&I)->isExact() && - RHS->getValue().isNonNegative() && + // sdiv X, C --> ashr exact X, log2(C) + if (I.isExact() && RHS->getValue().isNonNegative() && RHS->getValue().isPowerOf2()) { Value *ShAmt = llvm::ConstantInt::get(RHS->getType(), RHS->getValue().exactLogBase2()); - return BinaryOperator::CreateAShr(Op0, ShAmt, I.getName()); + return BinaryOperator::CreateExactAShr(Op0, ShAmt, I.getName()); } // -X/C --> X/-C provided the negation doesn't overflow. if (SubOperator *Sub = dyn_cast(Op0)) - if (isa(Sub->getOperand(0)) && - cast(Sub->getOperand(0))->isNullValue() && - Sub->hasNoSignedWrap()) + if (match(Sub->getOperand(0), m_Zero()) && Sub->hasNoSignedWrap()) return BinaryOperator::CreateSDiv(Sub->getOperand(1), ConstantExpr::getNeg(RHS)); } @@ -458,9 +432,8 @@ // X sdiv Y -> X udiv Y, iff X and Y don't have sign bit set return BinaryOperator::CreateUDiv(Op0, Op1, I.getName()); } - ConstantInt *ShiftedInt; - if (match(Op1, m_Shl(m_ConstantInt(ShiftedInt), m_Value())) && - ShiftedInt->getValue().isPowerOf2()) { + + if (match(Op1, m_Shl(m_Power2(), m_Value()))) { // X sdiv (1 << Y) -> X udiv (1 << Y) ( -> X u>> Y) // Safe because the only negative value (1 << Y) can take on is // INT_MIN, and X sdiv INT_MIN == X udiv INT_MIN == 0 if X doesn't have @@ -555,43 +528,30 @@ if (Instruction *common = commonIRemTransforms(I)) return common; - if (ConstantInt *RHS = dyn_cast(Op1)) { - // X urem C^2 -> X and C - // Check to see if this is an unsigned remainder with an exact power of 2, - // if so, convert to a bitwise and. - if (ConstantInt *C = dyn_cast(RHS)) - if (C->getValue().isPowerOf2()) - return BinaryOperator::CreateAnd(Op0, SubOne(C)); - } - - if (Instruction *RHSI = dyn_cast(I.getOperand(1))) { - // Turn A % (C << N), where C is 2^k, into A & ((C << N)-1) - if (RHSI->getOpcode() == Instruction::Shl && - isa(RHSI->getOperand(0))) { - if (cast(RHSI->getOperand(0))->getValue().isPowerOf2()) { - Constant *N1 = Constant::getAllOnesValue(I.getType()); - Value *Add = Builder->CreateAdd(RHSI, N1, "tmp"); - return BinaryOperator::CreateAnd(Op0, Add); - } + // X urem C^2 -> X and C-1 + { const APInt *C; + if (match(Op1, m_Power2(C))) + return BinaryOperator::CreateAnd(Op0, + ConstantInt::get(I.getType(), *C-1)); + } + + // Turn A % (C << N), where C is 2^k, into A & ((C << N)-1) + if (match(Op1, m_Shl(m_Power2(), m_Value()))) { + Constant *N1 = Constant::getAllOnesValue(I.getType()); + Value *Add = Builder->CreateAdd(Op1, N1, "tmp"); + return BinaryOperator::CreateAnd(Op0, Add); + } + + // urem X, (select Cond, 2^C1, 2^C2) --> + // select Cond, (and X, C1-1), (and X, C2-1) + // when C1&C2 are powers of two. + { Value *Cond; const APInt *C1, *C2; + if (match(Op1, m_Select(m_Value(Cond), m_Power2(C1), m_Power2(C2)))) { + Value *TrueAnd = Builder->CreateAnd(Op0, *C1-1, Op1->getName()+".t"); + Value *FalseAnd = Builder->CreateAnd(Op0, *C2-1, Op1->getName()+".f"); + return SelectInst::Create(Cond, TrueAnd, FalseAnd); } } - - // urem X, (select Cond, 2^C1, 2^C2) --> select Cond, (and X, C1), (and X, C2) - // where C1&C2 are powers of two. - if (SelectInst *SI = dyn_cast(Op1)) { - if (ConstantInt *STO = dyn_cast(SI->getOperand(1))) - if (ConstantInt *SFO = dyn_cast(SI->getOperand(2))) { - // STO == 0 and SFO == 0 handled above. - if ((STO->getValue().isPowerOf2()) && - (SFO->getValue().isPowerOf2())) { - Value *TrueAnd = Builder->CreateAnd(Op0, SubOne(STO), - SI->getName()+".t"); - Value *FalseAnd = Builder->CreateAnd(Op0, SubOne(SFO), - SI->getName()+".f"); - return SelectInst::Create(SI->getOperand(0), TrueAnd, FalseAnd); - } - } - } return 0; } Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp?rev=125267&r1=125266&r2=125267&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp Wed Feb 9 23:36:31 2011 @@ -37,17 +37,18 @@ return Res; // X shift (A srem B) -> X shift (A and B-1) iff B is a power of 2. - // Because shifts by negative values are undefined. - if (BinaryOperator *BO = dyn_cast(Op1)) - if (BO->hasOneUse() && BO->getOpcode() == Instruction::SRem) - if (ConstantInt *CI = dyn_cast(BO->getOperand(1))) - if (CI->getValue().isPowerOf2()) { - Constant *C = ConstantInt::get(BO->getType(), CI->getValue()-1); - Value *Rem = Builder->CreateAnd(BO->getOperand(0), C, BO->getName()); - I.setOperand(1, Rem); - return &I; - } - + // Because shifts by negative values (which could occur if A were negative) + // are undefined. + Value *A; const APInt *B; + if (Op1->hasOneUse() && match(Op1, m_SRem(m_Value(A), m_Power2(B)))) { + // FIXME: Should this get moved into SimplifyDemandedBits by saying we don't + // demand the sign bit (and many others) here?? + Value *Rem = Builder->CreateAnd(A, ConstantInt::get(I.getType(), *B-1), + Op1->getName()); + I.setOperand(1, Rem); + return &I; + } + return 0; } @@ -621,7 +622,30 @@ I.hasNoSignedWrap(), I.hasNoUnsignedWrap(), TD)) return ReplaceInstUsesWith(I, V); - return commonShiftTransforms(I); + + if (Instruction *V = commonShiftTransforms(I)) + return V; + + if (ConstantInt *Op1C = dyn_cast(I.getOperand(1))) { + unsigned ShAmt = Op1C->getZExtValue(); + + // If the shifted-out value is known-zero, then this is a NUW shift. + if (!I.hasNoUnsignedWrap() && + MaskedValueIsZero(I.getOperand(0), + APInt::getHighBitsSet(Op1C->getBitWidth(), ShAmt))) { + I.setHasNoUnsignedWrap(); + return &I; + } + + // If the shifted out value is all signbits, this is a NSW shift. + if (!I.hasNoSignedWrap() && + ComputeNumSignBits(I.getOperand(0)) > ShAmt) { + I.setHasNoSignedWrap(); + return &I; + } + } + + return 0; } Instruction *InstCombiner::visitLShr(BinaryOperator &I) { @@ -634,7 +658,9 @@ Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); - if (ConstantInt *Op1C = dyn_cast(Op1)) + if (ConstantInt *Op1C = dyn_cast(Op1)) { + unsigned ShAmt = Op1C->getZExtValue(); + if (IntrinsicInst *II = dyn_cast(Op0)) { unsigned BitWidth = Op0->getType()->getScalarSizeInBits(); // ctlz.i32(x)>>5 --> zext(x == 0) @@ -643,7 +669,7 @@ if ((II->getIntrinsicID() == Intrinsic::ctlz || II->getIntrinsicID() == Intrinsic::cttz || II->getIntrinsicID() == Intrinsic::ctpop) && - isPowerOf2_32(BitWidth) && Log2_32(BitWidth) == Op1C->getZExtValue()){ + isPowerOf2_32(BitWidth) && Log2_32(BitWidth) == ShAmt) { bool isCtPop = II->getIntrinsicID() == Intrinsic::ctpop; Constant *RHS = ConstantInt::getSigned(Op0->getType(), isCtPop ? -1:0); Value *Cmp = Builder->CreateICmpEQ(II->getArgOperand(0), RHS); @@ -651,6 +677,14 @@ } } + // If the shifted-out value is known-zero, then this is an exact shift. + if (!I.isExact() && + MaskedValueIsZero(Op0,APInt::getLowBitsSet(Op1C->getBitWidth(),ShAmt))){ + I.setIsExact(); + return &I; + } + } + return 0; } @@ -665,13 +699,15 @@ Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); if (ConstantInt *Op1C = dyn_cast(Op1)) { + unsigned ShAmt = Op1C->getZExtValue(); + // If the input is a SHL by the same constant (ashr (shl X, C), C), then we // have a sign-extend idiom. Value *X; if (match(Op0, m_Shl(m_Value(X), m_Specific(Op1)))) { - // If the input value is known to already be sign extended enough, delete - // the extension. - if (ComputeNumSignBits(X) > Op1C->getZExtValue()) + // If the left shift is just shifting out partial signbits, delete the + // extension. + if (cast(Op0)->hasNoSignedWrap()) return ReplaceInstUsesWith(I, X); // If the input is an extension from the shifted amount value, e.g. @@ -686,6 +722,13 @@ return new SExtInst(ZI->getOperand(0), ZI->getType()); } } + + // If the shifted-out value is known-zero, then this is an exact shift. + if (!I.isExact() && + MaskedValueIsZero(Op0,APInt::getLowBitsSet(Op1C->getBitWidth(),ShAmt))){ + I.setIsExact(); + return &I; + } } // See if we can turn a signed shr into an unsigned shr. Modified: llvm/trunk/test/Transforms/InstCombine/2006-04-28-ShiftShiftLongLong.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2006-04-28-ShiftShiftLongLong.ll?rev=125267&r1=125266&r2=125267&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/2006-04-28-ShiftShiftLongLong.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/2006-04-28-ShiftShiftLongLong.ll Wed Feb 9 23:36:31 2011 @@ -6,7 +6,7 @@ %Y = shl i64 %X, 16 ; [#uses=1] ; CHECK: %Y = shl i64 %X, 16 %Z = ashr i64 %Y, 16 ; [#uses=1] -; CHECK: %Z = ashr i64 %Y, 16 +; CHECK: %Z = ashr exact i64 %Y, 16 ret i64 %Z ; CHECK: ret i64 %Z } Modified: llvm/trunk/test/Transforms/InstCombine/2007-03-26-BadShiftMask.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2007-03-26-BadShiftMask.ll?rev=125267&r1=125266&r2=125267&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/2007-03-26-BadShiftMask.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/2007-03-26-BadShiftMask.ll Wed Feb 9 23:36:31 2011 @@ -1,7 +1,6 @@ ; PR1271 ; RUN: opt < %s -instcombine -S | \ -; RUN: grep {ashr i32 %.mp137, 2} -; END. +; RUN: grep {ashr exact i32 %.mp137, 2} target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" target triple = "i686-pc-linux-gnu" Modified: llvm/trunk/test/Transforms/InstCombine/cast.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/cast.ll?rev=125267&r1=125266&r2=125267&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/cast.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/cast.ll Wed Feb 9 23:36:31 2011 @@ -452,7 +452,7 @@ ; CHECK: @test48 ; CHECK-NEXT: %b = zext i8 %a to i64 ; CHECK-NEXT: %B = zext i8 %A to i64 -; CHECK-NEXT: %C = shl i64 %B, 8 +; CHECK-NEXT: %C = shl nuw nsw i64 %B, 8 ; CHECK-NEXT: %D = or i64 %C, %b ; CHECK-NEXT: ret i64 %D } @@ -464,7 +464,7 @@ ret i64 %D ; CHECK: @test49 ; CHECK-NEXT: %C = shl i64 %A, 32 -; CHECK-NEXT: ashr i64 %C, 32 +; CHECK-NEXT: ashr exact i64 %C, 32 ; CHECK-NEXT: %D = or i64 {{.*}}, 1 ; CHECK-NEXT: ret i64 %D } @@ -478,8 +478,8 @@ ; CHECK: @test50 ; CHECK-NEXT: shl i64 %A, 30 ; CHECK-NEXT: add i64 {{.*}}, -4294967296 -; CHECK-NEXT: %E = ashr i64 {{.*}}, 32 -; CHECK-NEXT: ret i64 %E +; CHECK-NEXT: %sext = ashr i64 {{.*}}, 32 +; CHECK-NEXT: ret i64 %sext } define i64 @test51(i64 %A, i1 %cond) { Modified: llvm/trunk/test/Transforms/InstCombine/exact.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/exact.ll?rev=125267&r1=125266&r2=125267&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/exact.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/exact.ll Wed Feb 9 23:36:31 2011 @@ -7,6 +7,13 @@ ret i32 %y } +; CHECK: @sdiv2 +; CHECK: ashr exact i32 %x, 3 +define i32 @sdiv2(i32 %x) { + %y = sdiv exact i32 %x, 8 + ret i32 %y +} + ; CHECK: @sdiv3 ; CHECK: %y = srem i32 %x, 3 ; CHECK: %z = sub i32 %x, %y @@ -52,6 +59,24 @@ ret i32 %z } +; CHECK: @udiv2 +; CHECK: %z = lshr exact i32 %x, %w +; CHECK: ret i32 %z +define i32 @udiv2(i32 %x, i32 %w) { + %y = shl i32 1, %w + %z = udiv exact i32 %x, %y + ret i32 %z +} + +; CHECK: @ashr1 +; CHECK: %B = ashr exact i64 %A, 2 +; CHECK: ret i64 %B +define i64 @ashr1(i64 %X) nounwind { + %A = shl i64 %X, 8 + %B = ashr i64 %A, 2 ; X/4 + ret i64 %B +} + ; CHECK: @ashr_icmp ; CHECK: %B = icmp eq i64 %X, 0 ; CHECK: ret i1 %B Modified: llvm/trunk/test/Transforms/InstCombine/nsw.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/nsw.ll?rev=125267&r1=125266&r2=125267&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/nsw.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/nsw.ll Wed Feb 9 23:36:31 2011 @@ -28,3 +28,12 @@ ret i1 %B } +; CHECK: @shl1 +; CHECK: %B = shl nuw nsw i64 %A, 8 +; CHECK: ret i64 %B +define i64 @shl1(i64 %X, i64* %P) nounwind { + %A = and i64 %X, 312 + store i64 %A, i64* %P ; multiple uses of A. + %B = shl i64 %A, 8 + ret i64 %B +} Modified: llvm/trunk/test/Transforms/InstCombine/pr8547.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/pr8547.ll?rev=125267&r1=125266&r2=125267&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/pr8547.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/pr8547.ll Wed Feb 9 23:36:31 2011 @@ -15,7 +15,7 @@ store i32 %storemerge, i32* @g_2, align 4 %shl = shl i32 %storemerge, 30 %conv2 = lshr i32 %shl, 24 -; CHECK: %0 = shl i32 %storemerge, 6 +; CHECK: %0 = shl nuw nsw i32 %storemerge, 6 ; CHECK: %conv2 = and i32 %0, 64 %tobool = icmp eq i32 %conv2, 0 br i1 %tobool, label %for.cond, label %codeRepl2 Modified: llvm/trunk/test/Transforms/InstCombine/sext.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/sext.ll?rev=125267&r1=125266&r2=125267&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/sext.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/sext.ll Wed Feb 9 23:36:31 2011 @@ -110,7 +110,7 @@ ret i32 %b ; CHECK: @test10 ; CHECK: shl i32 %i, 30 -; CHECK-NEXT: ashr i32 +; CHECK-NEXT: ashr exact i32 ; CHECK-NEXT: ret i32 } Modified: llvm/trunk/test/Transforms/InstCombine/shift.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/shift.ll?rev=125267&r1=125266&r2=125267&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/shift.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/shift.ll Wed Feb 9 23:36:31 2011 @@ -451,7 +451,7 @@ ret i64 %tmp46 ; CHECK: @test37 -; CHECK: %tmp23 = shl i128 %tmp22, 32 +; CHECK: %tmp23 = shl nuw nsw i128 %tmp22, 32 ; CHECK: %ins = or i128 %tmp23, %A ; CHECK: %tmp46 = trunc i128 %ins to i64 } Modified: llvm/trunk/test/Transforms/InstCombine/signext.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/signext.ll?rev=125267&r1=125266&r2=125267&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/signext.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/signext.ll Wed Feb 9 23:36:31 2011 @@ -9,7 +9,7 @@ ret i32 %tmp.3 ; CHECK: @test1 ; CHECK: %sext = shl i32 %x, 16 -; CHECK: %tmp.3 = ashr i32 %sext, 16 +; CHECK: %tmp.3 = ashr exact i32 %sext, 16 ; CHECK: ret i32 %tmp.3 } @@ -20,7 +20,7 @@ ret i32 %tmp.3 ; CHECK: @test2 ; CHECK: %sext = shl i32 %x, 16 -; CHECK: %tmp.3 = ashr i32 %sext, 16 +; CHECK: %tmp.3 = ashr exact i32 %sext, 16 ; CHECK: ret i32 %tmp.3 } @@ -51,7 +51,7 @@ ret i32 %tmp.3 ; CHECK: @test5 ; CHECK: %sext = shl i32 %x, 24 -; CHECK: %tmp.3 = ashr i32 %sext, 24 +; CHECK: %tmp.3 = ashr exact i32 %sext, 24 ; CHECK: ret i32 %tmp.3 } @@ -61,7 +61,7 @@ ret i32 %tmp.4 ; CHECK: @test6 ; CHECK: %tmp.2 = shl i32 %x, 16 -; CHECK: %tmp.4 = ashr i32 %tmp.2, 16 +; CHECK: %tmp.4 = ashr exact i32 %tmp.2, 16 ; CHECK: ret i32 %tmp.4 } @@ -82,6 +82,6 @@ %sub = add i32 %xor, -67108864 ; [#uses=1] ret i32 %sub ; CHECK: @test8 -; CHECK: %sub = ashr i32 %x, 5 -; CHECK: ret i32 %sub +; CHECK: %shr = ashr i32 %x, 5 +; CHECK: ret i32 %shr } Modified: llvm/trunk/test/Transforms/InstCombine/trunc.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/trunc.ll?rev=125267&r1=125266&r2=125267&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/trunc.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/trunc.ll Wed Feb 9 23:36:31 2011 @@ -24,7 +24,7 @@ ret i64 %d ; CHECK: @test2 ; CHECK: shl i64 %a, 36 -; CHECK: %d = ashr i64 {{.*}}, 36 +; CHECK: %d = ashr exact i64 {{.*}}, 36 ; CHECK: ret i64 %d } define i64 @test3(i64 %a) { @@ -92,7 +92,7 @@ ; CHECK: @test8 ; CHECK: %tmp38 = zext i32 %A to i64 ; CHECK: %tmp32 = zext i32 %B to i64 -; CHECK: %tmp33 = shl i64 %tmp32, 32 +; CHECK: %tmp33 = shl nuw i64 %tmp32, 32 ; CHECK: %ins35 = or i64 %tmp33, %tmp38 ; CHECK: ret i64 %ins35 } From sabre at nondot.org Thu Feb 10 01:01:55 2011 From: sabre at nondot.org (Chris Lattner) Date: Thu, 10 Feb 2011 07:01:55 -0000 Subject: [llvm-commits] [llvm] r125270 - in /llvm/trunk: include/llvm/Constants.h include/llvm/Support/ConstantFolder.h include/llvm/Support/IRBuilder.h include/llvm/Support/TargetFolder.h lib/VMCore/Constants.cpp Message-ID: <20110210070155.67A062A6C12C@llvm.org> Author: lattner Date: Thu Feb 10 01:01:55 2011 New Revision: 125270 URL: http://llvm.org/viewvc/llvm-project?rev=125270&view=rev Log: switch the constantexpr, target folder, and IRBuilder interfaces for NSW/NUW binops to follow the pattern of exact binops. This allows someone to use Builder.CreateAdd(x, y, "tmp", MaybeNUW); Modified: llvm/trunk/include/llvm/Constants.h llvm/trunk/include/llvm/Support/ConstantFolder.h llvm/trunk/include/llvm/Support/IRBuilder.h llvm/trunk/include/llvm/Support/TargetFolder.h llvm/trunk/lib/VMCore/Constants.cpp Modified: llvm/trunk/include/llvm/Constants.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Constants.h?rev=125270&r1=125269&r2=125270&view=diff ============================================================================== --- llvm/trunk/include/llvm/Constants.h (original) +++ llvm/trunk/include/llvm/Constants.h Thu Feb 10 01:01:55 2011 @@ -664,32 +664,35 @@ /// getAlignOf constant expr - computes the alignment of a type in a target /// independent way (Note: the return type is an i64). - static Constant *getAlignOf(const Type* Ty); + static Constant *getAlignOf(const Type *Ty); /// getSizeOf constant expr - computes the (alloc) size of a type (in /// address-units, not bits) in a target independent way (Note: the return /// type is an i64). /// - static Constant *getSizeOf(const Type* Ty); + static Constant *getSizeOf(const Type *Ty); /// getOffsetOf constant expr - computes the offset of a struct field in a /// target independent way (Note: the return type is an i64). /// - static Constant *getOffsetOf(const StructType* STy, unsigned FieldNo); + static Constant *getOffsetOf(const StructType *STy, unsigned FieldNo); /// getOffsetOf constant expr - This is a generalized form of getOffsetOf, /// which supports any aggregate type, and any Constant index. /// - static Constant *getOffsetOf(const Type* Ty, Constant *FieldNo); + static Constant *getOffsetOf(const Type *Ty, Constant *FieldNo); - static Constant *getNeg(Constant *C); + static Constant *getNeg(Constant *C, bool HasNUW = false, bool HasNSW =false); static Constant *getFNeg(Constant *C); static Constant *getNot(Constant *C); - static Constant *getAdd(Constant *C1, Constant *C2); + static Constant *getAdd(Constant *C1, Constant *C2, + bool HasNUW = false, bool HasNSW = false); static Constant *getFAdd(Constant *C1, Constant *C2); - static Constant *getSub(Constant *C1, Constant *C2); + static Constant *getSub(Constant *C1, Constant *C2, + bool HasNUW = false, bool HasNSW = false); static Constant *getFSub(Constant *C1, Constant *C2); - static Constant *getMul(Constant *C1, Constant *C2); + static Constant *getMul(Constant *C1, Constant *C2, + bool HasNUW = false, bool HasNSW = false); static Constant *getFMul(Constant *C1, Constant *C2); static Constant *getUDiv(Constant *C1, Constant *C2, bool isExact = false); static Constant *getSDiv(Constant *C1, Constant *C2, bool isExact = false); @@ -700,7 +703,8 @@ static Constant *getAnd(Constant *C1, Constant *C2); static Constant *getOr(Constant *C1, Constant *C2); static Constant *getXor(Constant *C1, Constant *C2); - static Constant *getShl(Constant *C1, Constant *C2); + static Constant *getShl(Constant *C1, Constant *C2, + bool HasNUW = false, bool HasNSW = false); static Constant *getLShr(Constant *C1, Constant *C2, bool isExact = false); static Constant *getAShr(Constant *C1, Constant *C2, bool isExact = false); static Constant *getTrunc (Constant *C, const Type *Ty); @@ -716,16 +720,32 @@ static Constant *getIntToPtr(Constant *C, const Type *Ty); static Constant *getBitCast (Constant *C, const Type *Ty); - static Constant *getNSWNeg(Constant *C); - static Constant *getNUWNeg(Constant *C); - static Constant *getNSWAdd(Constant *C1, Constant *C2); - static Constant *getNUWAdd(Constant *C1, Constant *C2); - static Constant *getNSWSub(Constant *C1, Constant *C2); - static Constant *getNUWSub(Constant *C1, Constant *C2); - static Constant *getNSWMul(Constant *C1, Constant *C2); - static Constant *getNUWMul(Constant *C1, Constant *C2); - static Constant *getNSWShl(Constant *C1, Constant *C2); - static Constant *getNUWShl(Constant *C1, Constant *C2); + static Constant *getNSWNeg(Constant *C) { return getNeg(C, false, true); } + static Constant *getNUWNeg(Constant *C) { return getNeg(C, true, false); } + static Constant *getNSWAdd(Constant *C1, Constant *C2) { + return getAdd(C1, C2, false, true); + } + static Constant *getNUWAdd(Constant *C1, Constant *C2) { + return getAdd(C1, C2, true, false); + } + static Constant *getNSWSub(Constant *C1, Constant *C2) { + return getSub(C1, C2, false, true); + } + static Constant *getNUWSub(Constant *C1, Constant *C2) { + return getSub(C1, C2, true, false); + } + static Constant *getNSWMul(Constant *C1, Constant *C2) { + return getMul(C1, C2, false, true); + } + static Constant *getNUWMul(Constant *C1, Constant *C2) { + return getMul(C1, C2, true, false); + } + static Constant *getNSWShl(Constant *C1, Constant *C2) { + return getShl(C1, C2, false, true); + } + static Constant *getNUWShl(Constant *C1, Constant *C2) { + return getShl(C1, C2, true, false); + } static Constant *getExactSDiv(Constant *C1, Constant *C2) { return getSDiv(C1, C2, true); } Modified: llvm/trunk/include/llvm/Support/ConstantFolder.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/ConstantFolder.h?rev=125270&r1=125269&r2=125270&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/ConstantFolder.h (original) +++ llvm/trunk/include/llvm/Support/ConstantFolder.h Thu Feb 10 01:01:55 2011 @@ -33,38 +33,23 @@ // Binary Operators //===--------------------------------------------------------------------===// - Constant *CreateAdd(Constant *LHS, Constant *RHS) const { - return ConstantExpr::getAdd(LHS, RHS); - } - Constant *CreateNSWAdd(Constant *LHS, Constant *RHS) const { - return ConstantExpr::getNSWAdd(LHS, RHS); - } - Constant *CreateNUWAdd(Constant *LHS, Constant *RHS) const { - return ConstantExpr::getNUWAdd(LHS, RHS); + Constant *CreateAdd(Constant *LHS, Constant *RHS, + bool HasNUW = false, bool HasNSW = false) const { + return ConstantExpr::getAdd(LHS, RHS, HasNUW, HasNSW); } Constant *CreateFAdd(Constant *LHS, Constant *RHS) const { return ConstantExpr::getFAdd(LHS, RHS); } - Constant *CreateSub(Constant *LHS, Constant *RHS) const { - return ConstantExpr::getSub(LHS, RHS); - } - Constant *CreateNSWSub(Constant *LHS, Constant *RHS) const { - return ConstantExpr::getNSWSub(LHS, RHS); - } - Constant *CreateNUWSub(Constant *LHS, Constant *RHS) const { - return ConstantExpr::getNUWSub(LHS, RHS); + Constant *CreateSub(Constant *LHS, Constant *RHS, + bool HasNUW = false, bool HasNSW = false) const { + return ConstantExpr::getSub(LHS, RHS, HasNUW, HasNSW); } Constant *CreateFSub(Constant *LHS, Constant *RHS) const { return ConstantExpr::getFSub(LHS, RHS); } - Constant *CreateMul(Constant *LHS, Constant *RHS) const { - return ConstantExpr::getMul(LHS, RHS); - } - Constant *CreateNSWMul(Constant *LHS, Constant *RHS) const { - return ConstantExpr::getNSWMul(LHS, RHS); - } - Constant *CreateNUWMul(Constant *LHS, Constant *RHS) const { - return ConstantExpr::getNUWMul(LHS, RHS); + Constant *CreateMul(Constant *LHS, Constant *RHS, + bool HasNUW = false, bool HasNSW = false) const { + return ConstantExpr::getMul(LHS, RHS, HasNUW, HasNSW); } Constant *CreateFMul(Constant *LHS, Constant *RHS) const { return ConstantExpr::getFMul(LHS, RHS); @@ -89,8 +74,9 @@ Constant *CreateFRem(Constant *LHS, Constant *RHS) const { return ConstantExpr::getFRem(LHS, RHS); } - Constant *CreateShl(Constant *LHS, Constant *RHS) const { - return ConstantExpr::getShl(LHS, RHS); + Constant *CreateShl(Constant *LHS, Constant *RHS, + bool HasNUW = false, bool HasNSW = false) const { + return ConstantExpr::getShl(LHS, RHS, HasNUW, HasNSW); } Constant *CreateLShr(Constant *LHS, Constant *RHS, bool isExact = false) const { @@ -119,14 +105,9 @@ // Unary Operators //===--------------------------------------------------------------------===// - Constant *CreateNeg(Constant *C) const { - return ConstantExpr::getNeg(C); - } - Constant *CreateNSWNeg(Constant *C) const { - return ConstantExpr::getNSWNeg(C); - } - Constant *CreateNUWNeg(Constant *C) const { - return ConstantExpr::getNUWNeg(C); + Constant *CreateNeg(Constant *C, + bool HasNUW = false, bool HasNSW = false) const { + return ConstantExpr::getNeg(C, HasNUW, HasNSW); } Constant *CreateFNeg(Constant *C) const { return ConstantExpr::getFNeg(C); Modified: llvm/trunk/include/llvm/Support/IRBuilder.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/IRBuilder.h?rev=125270&r1=125269&r2=125270&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/IRBuilder.h (original) +++ llvm/trunk/include/llvm/Support/IRBuilder.h Thu Feb 10 01:01:55 2011 @@ -448,24 +448,30 @@ //===--------------------------------------------------------------------===// // Instruction creation methods: Binary Operators //===--------------------------------------------------------------------===// - - Value *CreateAdd(Value *LHS, Value *RHS, const Twine &Name = "") { +private: + BinaryOperator *CreateInsertNUWNSWBinOp(BinaryOperator::BinaryOps Opc, + Value *LHS, Value *RHS, + const Twine &Name, + bool HasNUW, bool HasNSW) { + BinaryOperator *BO = Insert(BinaryOperator::Create(Opc, LHS, RHS), Name); + if (HasNUW) BO->setHasNoUnsignedWrap(); + if (HasNSW) BO->setHasNoSignedWrap(); + return BO; + } +public: + Value *CreateAdd(Value *LHS, Value *RHS, const Twine &Name = "", + bool HasNUW = false, bool HasNSW = false) { if (Constant *LC = dyn_cast(LHS)) if (Constant *RC = dyn_cast(RHS)) - return Insert(Folder.CreateAdd(LC, RC), Name); - return Insert(BinaryOperator::CreateAdd(LHS, RHS), Name); + return Insert(Folder.CreateAdd(LC, RC, HasNUW, HasNSW), Name); + return CreateInsertNUWNSWBinOp(Instruction::Add, LHS, RHS, Name, + HasNUW, HasNSW); } Value *CreateNSWAdd(Value *LHS, Value *RHS, const Twine &Name = "") { - if (Constant *LC = dyn_cast(LHS)) - if (Constant *RC = dyn_cast(RHS)) - return Insert(Folder.CreateNSWAdd(LC, RC), Name); - return Insert(BinaryOperator::CreateNSWAdd(LHS, RHS), Name); + return CreateAdd(LHS, RHS, Name, false, true); } Value *CreateNUWAdd(Value *LHS, Value *RHS, const Twine &Name = "") { - if (Constant *LC = dyn_cast(LHS)) - if (Constant *RC = dyn_cast(RHS)) - return Insert(Folder.CreateNUWAdd(LC, RC), Name); - return Insert(BinaryOperator::CreateNUWAdd(LHS, RHS), Name); + return CreateAdd(LHS, RHS, Name, true, false); } Value *CreateFAdd(Value *LHS, Value *RHS, const Twine &Name = "") { if (Constant *LC = dyn_cast(LHS)) @@ -473,23 +479,19 @@ return Insert(Folder.CreateFAdd(LC, RC), Name); return Insert(BinaryOperator::CreateFAdd(LHS, RHS), Name); } - Value *CreateSub(Value *LHS, Value *RHS, const Twine &Name = "") { + Value *CreateSub(Value *LHS, Value *RHS, const Twine &Name = "", + bool HasNUW = false, bool HasNSW = false) { if (Constant *LC = dyn_cast(LHS)) if (Constant *RC = dyn_cast(RHS)) return Insert(Folder.CreateSub(LC, RC), Name); - return Insert(BinaryOperator::CreateSub(LHS, RHS), Name); + return CreateInsertNUWNSWBinOp(Instruction::Sub, LHS, RHS, Name, + HasNUW, HasNSW); } Value *CreateNSWSub(Value *LHS, Value *RHS, const Twine &Name = "") { - if (Constant *LC = dyn_cast(LHS)) - if (Constant *RC = dyn_cast(RHS)) - return Insert(Folder.CreateNSWSub(LC, RC), Name); - return Insert(BinaryOperator::CreateNSWSub(LHS, RHS), Name); + return CreateSub(LHS, RHS, Name, false, true); } Value *CreateNUWSub(Value *LHS, Value *RHS, const Twine &Name = "") { - if (Constant *LC = dyn_cast(LHS)) - if (Constant *RC = dyn_cast(RHS)) - return Insert(Folder.CreateNUWSub(LC, RC), Name); - return Insert(BinaryOperator::CreateNUWSub(LHS, RHS), Name); + return CreateSub(LHS, RHS, Name, true, false); } Value *CreateFSub(Value *LHS, Value *RHS, const Twine &Name = "") { if (Constant *LC = dyn_cast(LHS)) @@ -497,23 +499,19 @@ return Insert(Folder.CreateFSub(LC, RC), Name); return Insert(BinaryOperator::CreateFSub(LHS, RHS), Name); } - Value *CreateMul(Value *LHS, Value *RHS, const Twine &Name = "") { + Value *CreateMul(Value *LHS, Value *RHS, const Twine &Name = "", + bool HasNUW = false, bool HasNSW = false) { if (Constant *LC = dyn_cast(LHS)) if (Constant *RC = dyn_cast(RHS)) return Insert(Folder.CreateMul(LC, RC), Name); - return Insert(BinaryOperator::CreateMul(LHS, RHS), Name); + return CreateInsertNUWNSWBinOp(Instruction::Mul, LHS, RHS, Name, + HasNUW, HasNSW); } Value *CreateNSWMul(Value *LHS, Value *RHS, const Twine &Name = "") { - if (Constant *LC = dyn_cast(LHS)) - if (Constant *RC = dyn_cast(RHS)) - return Insert(Folder.CreateNSWMul(LC, RC), Name); - return Insert(BinaryOperator::CreateNSWMul(LHS, RHS), Name); + return CreateMul(LHS, RHS, Name, false, true); } Value *CreateNUWMul(Value *LHS, Value *RHS, const Twine &Name = "") { - if (Constant *LC = dyn_cast(LHS)) - if (Constant *RC = dyn_cast(RHS)) - return Insert(Folder.CreateNUWMul(LC, RC), Name); - return Insert(BinaryOperator::CreateNUWMul(LHS, RHS), Name); + return CreateMul(LHS, RHS, Name, true, false); } Value *CreateFMul(Value *LHS, Value *RHS, const Twine &Name = "") { if (Constant *LC = dyn_cast(LHS)) @@ -570,17 +568,23 @@ return Insert(BinaryOperator::CreateFRem(LHS, RHS), Name); } - Value *CreateShl(Value *LHS, Value *RHS, const Twine &Name = "") { + Value *CreateShl(Value *LHS, Value *RHS, const Twine &Name = "", + bool HasNUW = false, bool HasNSW = false) { if (Constant *LC = dyn_cast(LHS)) if (Constant *RC = dyn_cast(RHS)) - return Insert(Folder.CreateShl(LC, RC), Name); - return Insert(BinaryOperator::CreateShl(LHS, RHS), Name); - } - Value *CreateShl(Value *LHS, const APInt &RHS, const Twine &Name = "") { - return CreateShl(LHS, ConstantInt::get(LHS->getType(), RHS), Name); - } - Value *CreateShl(Value *LHS, uint64_t RHS, const Twine &Name = "") { - return CreateShl(LHS, ConstantInt::get(LHS->getType(), RHS), Name); + return Insert(Folder.CreateShl(LC, RC, HasNUW, HasNSW), Name); + return CreateInsertNUWNSWBinOp(Instruction::Shl, LHS, RHS, Name, + HasNUW, HasNSW); + } + Value *CreateShl(Value *LHS, const APInt &RHS, const Twine &Name = "", + bool HasNUW = false, bool HasNSW = false) { + return CreateShl(LHS, ConstantInt::get(LHS->getType(), RHS), Name, + HasNUW, HasNSW); + } + Value *CreateShl(Value *LHS, uint64_t RHS, const Twine &Name = "", + bool HasNUW = false, bool HasNSW = false) { + return CreateShl(LHS, ConstantInt::get(LHS->getType(), RHS), Name, + HasNUW, HasNSW); } Value *CreateLShr(Value *LHS, Value *RHS, const Twine &Name = "", @@ -672,20 +676,20 @@ return Insert(BinaryOperator::Create(Opc, LHS, RHS), Name); } - Value *CreateNeg(Value *V, const Twine &Name = "") { + Value *CreateNeg(Value *V, const Twine &Name = "", + bool HasNUW = false, bool HasNSW = false) { if (Constant *VC = dyn_cast(V)) - return Insert(Folder.CreateNeg(VC), Name); - return Insert(BinaryOperator::CreateNeg(V), Name); + return Insert(Folder.CreateNeg(VC, HasNUW, HasNSW), Name); + BinaryOperator *BO = Insert(BinaryOperator::CreateNeg(V), Name); + if (HasNUW) BO->setHasNoUnsignedWrap(); + if (HasNSW) BO->setHasNoSignedWrap(); + return BO; } Value *CreateNSWNeg(Value *V, const Twine &Name = "") { - if (Constant *VC = dyn_cast(V)) - return Insert(Folder.CreateNSWNeg(VC), Name); - return Insert(BinaryOperator::CreateNSWNeg(V), Name); + return CreateNeg(V, Name, false, true); } Value *CreateNUWNeg(Value *V, const Twine &Name = "") { - if (Constant *VC = dyn_cast(V)) - return Insert(Folder.CreateNUWNeg(VC), Name); - return Insert(BinaryOperator::CreateNUWNeg(V), Name); + return CreateNeg(V, Name, true, false); } Value *CreateFNeg(Value *V, const Twine &Name = "") { if (Constant *VC = dyn_cast(V)) Modified: llvm/trunk/include/llvm/Support/TargetFolder.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/TargetFolder.h?rev=125270&r1=125269&r2=125270&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/TargetFolder.h (original) +++ llvm/trunk/include/llvm/Support/TargetFolder.h Thu Feb 10 01:01:55 2011 @@ -46,38 +46,23 @@ // Binary Operators //===--------------------------------------------------------------------===// - Constant *CreateAdd(Constant *LHS, Constant *RHS) const { - return Fold(ConstantExpr::getAdd(LHS, RHS)); - } - Constant *CreateNSWAdd(Constant *LHS, Constant *RHS) const { - return Fold(ConstantExpr::getNSWAdd(LHS, RHS)); - } - Constant *CreateNUWAdd(Constant *LHS, Constant *RHS) const { - return Fold(ConstantExpr::getNUWAdd(LHS, RHS)); + Constant *CreateAdd(Constant *LHS, Constant *RHS, + bool HasNUW = false, bool HasNSW = false) const { + return Fold(ConstantExpr::getAdd(LHS, RHS, HasNUW, HasNSW)); } Constant *CreateFAdd(Constant *LHS, Constant *RHS) const { return Fold(ConstantExpr::getFAdd(LHS, RHS)); } - Constant *CreateSub(Constant *LHS, Constant *RHS) const { - return Fold(ConstantExpr::getSub(LHS, RHS)); - } - Constant *CreateNSWSub(Constant *LHS, Constant *RHS) const { - return Fold(ConstantExpr::getNSWSub(LHS, RHS)); - } - Constant *CreateNUWSub(Constant *LHS, Constant *RHS) const { - return Fold(ConstantExpr::getNUWSub(LHS, RHS)); + Constant *CreateSub(Constant *LHS, Constant *RHS, + bool HasNUW = false, bool HasNSW = false) const { + return Fold(ConstantExpr::getSub(LHS, RHS, HasNUW, HasNSW)); } Constant *CreateFSub(Constant *LHS, Constant *RHS) const { return Fold(ConstantExpr::getFSub(LHS, RHS)); } - Constant *CreateMul(Constant *LHS, Constant *RHS) const { - return Fold(ConstantExpr::getMul(LHS, RHS)); - } - Constant *CreateNSWMul(Constant *LHS, Constant *RHS) const { - return Fold(ConstantExpr::getNSWMul(LHS, RHS)); - } - Constant *CreateNUWMul(Constant *LHS, Constant *RHS) const { - return Fold(ConstantExpr::getNUWMul(LHS, RHS)); + Constant *CreateMul(Constant *LHS, Constant *RHS, + bool HasNUW = false, bool HasNSW = false) const { + return Fold(ConstantExpr::getMul(LHS, RHS, HasNUW, HasNSW)); } Constant *CreateFMul(Constant *LHS, Constant *RHS) const { return Fold(ConstantExpr::getFMul(LHS, RHS)); @@ -100,8 +85,9 @@ Constant *CreateFRem(Constant *LHS, Constant *RHS) const { return Fold(ConstantExpr::getFRem(LHS, RHS)); } - Constant *CreateShl(Constant *LHS, Constant *RHS) const { - return Fold(ConstantExpr::getShl(LHS, RHS)); + Constant *CreateShl(Constant *LHS, Constant *RHS, + bool HasNUW = false, bool HasNSW = false) const { + return Fold(ConstantExpr::getShl(LHS, RHS, HasNUW, HasNSW)); } Constant *CreateLShr(Constant *LHS, Constant *RHS, bool isExact = false)const{ return Fold(ConstantExpr::getLShr(LHS, RHS, isExact)); @@ -128,14 +114,9 @@ // Unary Operators //===--------------------------------------------------------------------===// - Constant *CreateNeg(Constant *C) const { - return Fold(ConstantExpr::getNeg(C)); - } - Constant *CreateNSWNeg(Constant *C) const { - return Fold(ConstantExpr::getNSWNeg(C)); - } - Constant *CreateNUWNeg(Constant *C) const { - return Fold(ConstantExpr::getNUWNeg(C)); + Constant *CreateNeg(Constant *C, + bool HasNUW = false, bool HasNSW = false) const { + return Fold(ConstantExpr::getNeg(C, HasNUW, HasNSW)); } Constant *CreateFNeg(Constant *C) const { return Fold(ConstantExpr::getFNeg(C)); Modified: llvm/trunk/lib/VMCore/Constants.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Constants.cpp?rev=125270&r1=125269&r2=125270&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Constants.cpp (original) +++ llvm/trunk/lib/VMCore/Constants.cpp Thu Feb 10 01:01:55 2011 @@ -639,58 +639,6 @@ return get(std::vector(Vals, Vals+NumVals)); } -Constant *ConstantExpr::getNSWNeg(Constant *C) { - assert(C->getType()->isIntOrIntVectorTy() && - "Cannot NEG a nonintegral value!"); - return getNSWSub(ConstantFP::getZeroValueForNegation(C->getType()), C); -} - -Constant *ConstantExpr::getNUWNeg(Constant *C) { - assert(C->getType()->isIntOrIntVectorTy() && - "Cannot NEG a nonintegral value!"); - return getNUWSub(ConstantFP::getZeroValueForNegation(C->getType()), C); -} - -Constant *ConstantExpr::getNSWAdd(Constant *C1, Constant *C2) { - return getTy(C1->getType(), Instruction::Add, C1, C2, - OverflowingBinaryOperator::NoSignedWrap); -} - -Constant *ConstantExpr::getNUWAdd(Constant *C1, Constant *C2) { - return getTy(C1->getType(), Instruction::Add, C1, C2, - OverflowingBinaryOperator::NoUnsignedWrap); -} - -Constant *ConstantExpr::getNSWSub(Constant *C1, Constant *C2) { - return getTy(C1->getType(), Instruction::Sub, C1, C2, - OverflowingBinaryOperator::NoSignedWrap); -} - -Constant *ConstantExpr::getNUWSub(Constant *C1, Constant *C2) { - return getTy(C1->getType(), Instruction::Sub, C1, C2, - OverflowingBinaryOperator::NoUnsignedWrap); -} - -Constant *ConstantExpr::getNSWMul(Constant *C1, Constant *C2) { - return getTy(C1->getType(), Instruction::Mul, C1, C2, - OverflowingBinaryOperator::NoSignedWrap); -} - -Constant *ConstantExpr::getNUWMul(Constant *C1, Constant *C2) { - return getTy(C1->getType(), Instruction::Mul, C1, C2, - OverflowingBinaryOperator::NoUnsignedWrap); -} - -Constant *ConstantExpr::getNSWShl(Constant *C1, Constant *C2) { - return getTy(C1->getType(), Instruction::Shl, C1, C2, - OverflowingBinaryOperator::NoSignedWrap); -} - -Constant *ConstantExpr::getNUWShl(Constant *C1, Constant *C2) { - return getTy(C1->getType(), Instruction::Shl, C1, C2, - OverflowingBinaryOperator::NoUnsignedWrap); -} - // Utility function for determining if a ConstantExpr is a CastOp or not. This // can't be inline because we don't want to #include Instruction.h into // Constant.h @@ -1823,20 +1771,17 @@ return getExtractValueTy(ReqTy, Agg, IdxList, NumIdx); } -Constant *ConstantExpr::getNeg(Constant *C) { +Constant *ConstantExpr::getNeg(Constant *C, bool HasNUW, bool HasNSW) { assert(C->getType()->isIntOrIntVectorTy() && "Cannot NEG a nonintegral value!"); - return get(Instruction::Sub, - ConstantFP::getZeroValueForNegation(C->getType()), - C); + return getSub(ConstantFP::getZeroValueForNegation(C->getType()), + C, HasNUW, HasNSW); } Constant *ConstantExpr::getFNeg(Constant *C) { assert(C->getType()->isFPOrFPVectorTy() && "Cannot FNEG a non-floating-point value!"); - return get(Instruction::FSub, - ConstantFP::getZeroValueForNegation(C->getType()), - C); + return getFSub(ConstantFP::getZeroValueForNegation(C->getType()), C); } Constant *ConstantExpr::getNot(Constant *C) { @@ -1845,24 +1790,33 @@ return get(Instruction::Xor, C, Constant::getAllOnesValue(C->getType())); } -Constant *ConstantExpr::getAdd(Constant *C1, Constant *C2) { - return get(Instruction::Add, C1, C2); +Constant *ConstantExpr::getAdd(Constant *C1, Constant *C2, + bool HasNUW, bool HasNSW) { + unsigned Flags = (HasNUW ? OverflowingBinaryOperator::NoUnsignedWrap : 0) | + (HasNSW ? OverflowingBinaryOperator::NoSignedWrap : 0); + return get(Instruction::Add, C1, C2, Flags); } Constant *ConstantExpr::getFAdd(Constant *C1, Constant *C2) { return get(Instruction::FAdd, C1, C2); } -Constant *ConstantExpr::getSub(Constant *C1, Constant *C2) { - return get(Instruction::Sub, C1, C2); +Constant *ConstantExpr::getSub(Constant *C1, Constant *C2, + bool HasNUW, bool HasNSW) { + unsigned Flags = (HasNUW ? OverflowingBinaryOperator::NoUnsignedWrap : 0) | + (HasNSW ? OverflowingBinaryOperator::NoSignedWrap : 0); + return get(Instruction::Sub, C1, C2, Flags); } Constant *ConstantExpr::getFSub(Constant *C1, Constant *C2) { return get(Instruction::FSub, C1, C2); } -Constant *ConstantExpr::getMul(Constant *C1, Constant *C2) { - return get(Instruction::Mul, C1, C2); +Constant *ConstantExpr::getMul(Constant *C1, Constant *C2, + bool HasNUW, bool HasNSW) { + unsigned Flags = (HasNUW ? OverflowingBinaryOperator::NoUnsignedWrap : 0) | + (HasNSW ? OverflowingBinaryOperator::NoSignedWrap : 0); + return get(Instruction::Mul, C1, C2, Flags); } Constant *ConstantExpr::getFMul(Constant *C1, Constant *C2) { @@ -1907,8 +1861,11 @@ return get(Instruction::Xor, C1, C2); } -Constant *ConstantExpr::getShl(Constant *C1, Constant *C2) { - return get(Instruction::Shl, C1, C2); +Constant *ConstantExpr::getShl(Constant *C1, Constant *C2, + bool HasNUW, bool HasNSW) { + unsigned Flags = (HasNUW ? OverflowingBinaryOperator::NoUnsignedWrap : 0) | + (HasNSW ? OverflowingBinaryOperator::NoSignedWrap : 0); + return get(Instruction::Shl, C1, C2, Flags); } Constant *ConstantExpr::getLShr(Constant *C1, Constant *C2, bool isExact) { From sabre at nondot.org Thu Feb 10 01:11:16 2011 From: sabre at nondot.org (Chris Lattner) Date: Thu, 10 Feb 2011 07:11:16 -0000 Subject: [llvm-commits] [llvm] r125271 - in /llvm/trunk: lib/Transforms/InstCombine/InstCombineAddSub.cpp test/Transforms/InstCombine/icmp.ll test/Transforms/InstCombine/sub.ll Message-ID: <20110210071116.834F02A6C12C@llvm.org> Author: lattner Date: Thu Feb 10 01:11:16 2011 New Revision: 125271 URL: http://llvm.org/viewvc/llvm-project?rev=125271&view=rev Log: implement the first part of PR8882: when lowering an inbounds gep to explicit addressing, we know that none of the intermediate computation overflows. This could use review: it seems that the shifts certainly wouldn't overflow, but could the intermediate adds overflow if there is a negative index? Previously the testcase would instcombine to: define i1 @test(i64 %i) { %p1.idx.mask = and i64 %i, 4611686018427387903 %cmp = icmp eq i64 %p1.idx.mask, 1000 ret i1 %cmp } now we get: define i1 @test(i64 %i) { %cmp = icmp eq i64 %i, 1000 ret i1 %cmp } Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp llvm/trunk/test/Transforms/InstCombine/icmp.ll llvm/trunk/test/Transforms/InstCombine/sub.ll Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp?rev=125271&r1=125270&r2=125271&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp Thu Feb 10 01:11:16 2011 @@ -399,6 +399,10 @@ const Type *IntPtrTy = TD.getIntPtrType(GEP->getContext()); Value *Result = Constant::getNullValue(IntPtrTy); + // If the GEP is inbounds, we know that none of the addressing operations will + // overflow in an unsigned sense. + bool isInBounds = cast(GEP)->isInBounds(); + // Build a mask for high order bits. unsigned IntPtrWidth = TD.getPointerSizeInBits(); uint64_t PtrSizeMask = ~0ULL >> (64-IntPtrWidth); @@ -414,31 +418,34 @@ if (const StructType *STy = dyn_cast(*GTI)) { Size = TD.getStructLayout(STy)->getElementOffset(OpC->getZExtValue()); - Result = Builder->CreateAdd(Result, - ConstantInt::get(IntPtrTy, Size), - GEP->getName()+".offs"); + if (Size) + Result = Builder->CreateAdd(Result, ConstantInt::get(IntPtrTy, Size), + GEP->getName()+".offs", + isInBounds /*NUW*/); continue; } Constant *Scale = ConstantInt::get(IntPtrTy, Size); Constant *OC = ConstantExpr::getIntegerCast(OpC, IntPtrTy, true /*SExt*/); - Scale = ConstantExpr::getMul(OC, Scale); + Scale = ConstantExpr::getMul(OC, Scale, isInBounds/*NUW*/); // Emit an add instruction. - Result = Builder->CreateAdd(Result, Scale, GEP->getName()+".offs"); + Result = Builder->CreateAdd(Result, Scale, GEP->getName()+".offs", + isInBounds /*NUW*/); continue; } // Convert to correct type. if (Op->getType() != IntPtrTy) Op = Builder->CreateIntCast(Op, IntPtrTy, true, Op->getName()+".c"); if (Size != 1) { - Constant *Scale = ConstantInt::get(IntPtrTy, Size); // We'll let instcombine(mul) convert this to a shl if possible. - Op = Builder->CreateMul(Op, Scale, GEP->getName()+".idx"); + Op = Builder->CreateMul(Op, ConstantInt::get(IntPtrTy, Size), + GEP->getName()+".idx", isInBounds /*NUW*/); } // Emit an add instruction. - Result = Builder->CreateAdd(Op, Result, GEP->getName()+".offs"); + Result = Builder->CreateAdd(Op, Result, GEP->getName()+".offs", + isInBounds /*NUW*/); } return Result; } Modified: llvm/trunk/test/Transforms/InstCombine/icmp.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/icmp.ll?rev=125271&r1=125270&r2=125271&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/icmp.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/icmp.ll Thu Feb 10 01:11:16 2011 @@ -1,5 +1,8 @@ ; RUN: opt < %s -instcombine -S | FileCheck %s +target datalayout = +"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" + define i32 @test1(i32 %X) { entry: icmp slt i32 %X, 0 ; :0 [#uses=1] @@ -218,3 +221,16 @@ %i4 = icmp eq i32 %i3, -1 ret i1 %i4 } + + at X = global [1000 x i32] zeroinitializer + +; PR8882 +; CHECK: @test24 +; CHECK: %cmp = icmp eq i64 %i, 1000 +; CHECK: ret i1 %cmp +define i1 @test24(i64 %i) { + %p1 = getelementptr inbounds i32* getelementptr inbounds ([1000 x i32]* @X, i64 0, i64 0), i64 %i + %cmp = icmp eq i32* %p1, getelementptr inbounds ([1000 x i32]* @X, i64 1, i64 0) + ret i1 %cmp +} + Modified: llvm/trunk/test/Transforms/InstCombine/sub.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/sub.ll?rev=125271&r1=125270&r2=125271&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/sub.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/sub.ll Thu Feb 10 01:11:16 2011 @@ -256,7 +256,7 @@ %G = sub i64 %C, ptrtoint ([42 x i16]* @Arr to i64) ret i64 %G ; CHECK: @test24b -; CHECK-NEXT: shl i64 %A, 1 +; CHECK-NEXT: shl nuw i64 %A, 1 ; CHECK-NEXT: ret i64 } @@ -267,7 +267,7 @@ %G = sub i64 %C, ptrtoint (i16* getelementptr ([42 x i16]* @Arr, i64 1, i64 0) to i64) ret i64 %G ; CHECK: @test25 -; CHECK-NEXT: shl i64 %A, 1 +; CHECK-NEXT: shl nuw i64 %A, 1 ; CHECK-NEXT: add i64 {{.*}}, -84 ; CHECK-NEXT: ret i64 } From geek4civic at gmail.com Thu Feb 10 01:20:41 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Thu, 10 Feb 2011 16:20:41 +0900 Subject: [llvm-commits] [PATCH] CMake: LLVM_NO_RTTI must be obsolete now! Message-ID: I guess "set(LLVM_NO_RTTI 1)" might be obsolete. May I eliminate them from CMakeLists.txt? ...Takumi -------------- next part -------------- From 0f3cc07919e38c6f439d1b4c937819e21f47117b Mon Sep 17 00:00:00 2001 From: NAKAMURA Takumi Date: Mon, 20 Dec 2010 15:22:57 +0900 Subject: [PATCH] CMake: LLVM_NO_RTTI must be obsolete now! MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="------------1.7.1.GIT" This is a multi-part message in MIME format. --------------1.7.1.GIT Content-Type: text/plain; charset=UTF-8; format=fixed Content-Transfer-Encoding: 8bit --- tools/edis/CMakeLists.txt | 2 -- 1 files changed, 0 insertions(+), 2 deletions(-) --------------1.7.1.GIT Content-Type: text/x-patch; name="0001-CMake-LLVM_NO_RTTI-must-be-obsolete-now.patch.txt" Content-Transfer-Encoding: 8bit Content-Disposition: attachment; filename="0001-CMake-LLVM_NO_RTTI-must-be-obsolete-now.patch.txt" diff --git a/tools/edis/CMakeLists.txt b/tools/edis/CMakeLists.txt index 2019995..5037f9f 100644 --- a/tools/edis/CMakeLists.txt +++ b/tools/edis/CMakeLists.txt @@ -1,5 +1,3 @@ -set(LLVM_NO_RTTI 1) - include_directories(${CMAKE_CURRENT_BINARY_DIR}) add_llvm_library(EnhancedDisassembly --------------1.7.1.GIT-- -------------- next part -------------- From 76cb1ea282174ed5557ad563c15d962aae023123 Mon Sep 17 00:00:00 2001 From: NAKAMURA Takumi Date: Mon, 20 Dec 2010 15:23:27 +0900 Subject: [PATCH] CMake: LLVM_NO_RTTI must be obsolete now! MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="------------1.7.1.GIT" This is a multi-part message in MIME format. --------------1.7.1.GIT Content-Type: text/plain; charset=UTF-8; format=fixed Content-Transfer-Encoding: 8bit --- examples/PrintFunctionNames/CMakeLists.txt | 2 -- examples/clang-interpreter/CMakeLists.txt | 2 -- examples/wpa/CMakeLists.txt | 2 -- lib/AST/CMakeLists.txt | 2 -- lib/Analysis/CMakeLists.txt | 2 -- lib/Basic/CMakeLists.txt | 2 -- lib/CodeGen/CMakeLists.txt | 2 -- lib/Driver/CMakeLists.txt | 2 -- lib/Frontend/CMakeLists.txt | 2 -- lib/FrontendTool/CMakeLists.txt | 2 -- lib/Index/CMakeLists.txt | 2 -- lib/Lex/CMakeLists.txt | 2 -- lib/Parse/CMakeLists.txt | 2 -- lib/Rewrite/CMakeLists.txt | 2 -- lib/Sema/CMakeLists.txt | 2 -- lib/Serialization/CMakeLists.txt | 2 -- lib/StaticAnalyzer/Checkers/CMakeLists.txt | 2 -- lib/StaticAnalyzer/Core/CMakeLists.txt | 2 -- tools/c-index-test/CMakeLists.txt | 2 -- tools/driver/CMakeLists.txt | 2 -- tools/libclang/CMakeLists.txt | 2 -- 21 files changed, 0 insertions(+), 42 deletions(-) --------------1.7.1.GIT Content-Type: text/x-patch; name="0001-CMake-LLVM_NO_RTTI-must-be-obsolete-now.patch.txt" Content-Transfer-Encoding: 8bit Content-Disposition: attachment; filename="0001-CMake-LLVM_NO_RTTI-must-be-obsolete-now.patch.txt" diff --git a/examples/PrintFunctionNames/CMakeLists.txt b/examples/PrintFunctionNames/CMakeLists.txt index edfbcb5..d442ff9 100644 --- a/examples/PrintFunctionNames/CMakeLists.txt +++ b/examples/PrintFunctionNames/CMakeLists.txt @@ -1,7 +1,5 @@ set(MODULE TRUE) -set(LLVM_NO_RTTI 1) - set( LLVM_USED_LIBS clangFrontendTool clangFrontend diff --git a/examples/clang-interpreter/CMakeLists.txt b/examples/clang-interpreter/CMakeLists.txt index 21c5afd..c8e907e 100644 --- a/examples/clang-interpreter/CMakeLists.txt +++ b/examples/clang-interpreter/CMakeLists.txt @@ -1,5 +1,3 @@ -set(LLVM_NO_RTTI 1) - set(LLVM_USED_LIBS clangFrontend clangSerialization diff --git a/examples/wpa/CMakeLists.txt b/examples/wpa/CMakeLists.txt index e3aaf1d..c997c69 100644 --- a/examples/wpa/CMakeLists.txt +++ b/examples/wpa/CMakeLists.txt @@ -1,5 +1,3 @@ -set(LLVM_NO_RTTI 1) - set(LLVM_USED_LIBS clangIndex clangFrontend diff --git a/lib/AST/CMakeLists.txt b/lib/AST/CMakeLists.txt index b49b89e..e767ebc 100644 --- a/lib/AST/CMakeLists.txt +++ b/lib/AST/CMakeLists.txt @@ -1,5 +1,3 @@ -set(LLVM_NO_RTTI 1) - set(LLVM_USED_LIBS clangBasic) add_clang_library(clangAST diff --git a/lib/Analysis/CMakeLists.txt b/lib/Analysis/CMakeLists.txt index a7bd8c1..0912f3c 100644 --- a/lib/Analysis/CMakeLists.txt +++ b/lib/Analysis/CMakeLists.txt @@ -1,5 +1,3 @@ -set(LLVM_NO_RTTI 1) - set(LLVM_USED_LIBS clangBasic clangAST clangIndex) add_clang_library(clangAnalysis diff --git a/lib/Basic/CMakeLists.txt b/lib/Basic/CMakeLists.txt index 12bc7d4..0a28fbc 100644 --- a/lib/Basic/CMakeLists.txt +++ b/lib/Basic/CMakeLists.txt @@ -1,5 +1,3 @@ -set(LLVM_NO_RTTI 1) - add_clang_library(clangBasic Builtins.cpp ConvertUTF.c diff --git a/lib/CodeGen/CMakeLists.txt b/lib/CodeGen/CMakeLists.txt index 4da6368..7aa6b15 100644 --- a/lib/CodeGen/CMakeLists.txt +++ b/lib/CodeGen/CMakeLists.txt @@ -1,5 +1,3 @@ -set(LLVM_NO_RTTI 1) - set(LLVM_USED_LIBS clangBasic clangAST clangFrontend) add_clang_library(clangCodeGen diff --git a/lib/Driver/CMakeLists.txt b/lib/Driver/CMakeLists.txt index 9d41b55..ee7ded9 100644 --- a/lib/Driver/CMakeLists.txt +++ b/lib/Driver/CMakeLists.txt @@ -1,5 +1,3 @@ -set(LLVM_NO_RTTI 1) - set(LLVM_USED_LIBS clangBasic clangAST clangParse) add_clang_library(clangDriver diff --git a/lib/Frontend/CMakeLists.txt b/lib/Frontend/CMakeLists.txt index ceb9fcd..9a53ad6 100644 --- a/lib/Frontend/CMakeLists.txt +++ b/lib/Frontend/CMakeLists.txt @@ -1,5 +1,3 @@ -set(LLVM_NO_RTTI 1) - set( LLVM_USED_LIBS clangDriver clangParse diff --git a/lib/FrontendTool/CMakeLists.txt b/lib/FrontendTool/CMakeLists.txt index 31983df..c367695 100644 --- a/lib/FrontendTool/CMakeLists.txt +++ b/lib/FrontendTool/CMakeLists.txt @@ -1,5 +1,3 @@ -set(LLVM_NO_RTTI 1) - set(LLVM_USED_LIBS clangDriver clangFrontend clangRewrite clangCodeGen clangStaticAnalyzerCheckers clangStaticAnalyzerCore) diff --git a/lib/Index/CMakeLists.txt b/lib/Index/CMakeLists.txt index 4dd4f46..0a3f7cb 100644 --- a/lib/Index/CMakeLists.txt +++ b/lib/Index/CMakeLists.txt @@ -1,5 +1,3 @@ -set(LLVM_NO_RTTI 1) - set(LLVM_USED_LIBS clangBasic clangAST) add_clang_library(clangIndex diff --git a/lib/Lex/CMakeLists.txt b/lib/Lex/CMakeLists.txt index aa2c93a..417ad96 100644 --- a/lib/Lex/CMakeLists.txt +++ b/lib/Lex/CMakeLists.txt @@ -1,5 +1,3 @@ -set(LLVM_NO_RTTI 1) - # TODO: Add -maltivec when ARCH is PowerPC. set(LLVM_USED_LIBS clangBasic) diff --git a/lib/Parse/CMakeLists.txt b/lib/Parse/CMakeLists.txt index 5b75a66..6bf5e64 100644 --- a/lib/Parse/CMakeLists.txt +++ b/lib/Parse/CMakeLists.txt @@ -1,5 +1,3 @@ -set(LLVM_NO_RTTI 1) - set(LLVM_USED_LIBS clangBasic clangAST clangLex clangSema) add_clang_library(clangParse diff --git a/lib/Rewrite/CMakeLists.txt b/lib/Rewrite/CMakeLists.txt index 853a9c0..ee4cba2 100644 --- a/lib/Rewrite/CMakeLists.txt +++ b/lib/Rewrite/CMakeLists.txt @@ -1,5 +1,3 @@ -set(LLVM_NO_RTTI 1) - set(LLVM_USED_LIBS clangBasic clangAST clangParse clangFrontend) add_clang_library(clangRewrite diff --git a/lib/Sema/CMakeLists.txt b/lib/Sema/CMakeLists.txt index af9c2f4..0d66e25 100644 --- a/lib/Sema/CMakeLists.txt +++ b/lib/Sema/CMakeLists.txt @@ -1,5 +1,3 @@ -set(LLVM_NO_RTTI 1) - set(LLVM_USED_LIBS clangBasic clangAST clangLex clangAnalysis) add_clang_library(clangSema diff --git a/lib/Serialization/CMakeLists.txt b/lib/Serialization/CMakeLists.txt index a378218..f8c6798 100644 --- a/lib/Serialization/CMakeLists.txt +++ b/lib/Serialization/CMakeLists.txt @@ -1,5 +1,3 @@ -set(LLVM_NO_RTTI 1) - set(LLVM_USED_LIBS clangFrontend) add_clang_library(clangSerialization diff --git a/lib/StaticAnalyzer/Checkers/CMakeLists.txt b/lib/StaticAnalyzer/Checkers/CMakeLists.txt index 9a6ad7f..48e5b63 100644 --- a/lib/StaticAnalyzer/Checkers/CMakeLists.txt +++ b/lib/StaticAnalyzer/Checkers/CMakeLists.txt @@ -1,5 +1,3 @@ -set(LLVM_NO_RTTI 1) - set(LLVM_USED_LIBS clangBasic clangAST) add_clang_library(clangStaticAnalyzerCheckers diff --git a/lib/StaticAnalyzer/Core/CMakeLists.txt b/lib/StaticAnalyzer/Core/CMakeLists.txt index 5fc72fb..8286130 100644 --- a/lib/StaticAnalyzer/Core/CMakeLists.txt +++ b/lib/StaticAnalyzer/Core/CMakeLists.txt @@ -1,5 +1,3 @@ -set(LLVM_NO_RTTI 1) - set(LLVM_USED_LIBS clangBasic clangLex clangAST clangFrontend clangRewrite) add_clang_library(clangStaticAnalyzerCore diff --git a/tools/c-index-test/CMakeLists.txt b/tools/c-index-test/CMakeLists.txt index 0cda6c4..9169fc7 100644 --- a/tools/c-index-test/CMakeLists.txt +++ b/tools/c-index-test/CMakeLists.txt @@ -1,5 +1,3 @@ -set(LLVM_NO_RTTI 1) - set(LLVM_USED_LIBS libclang) set( LLVM_LINK_COMPONENTS diff --git a/tools/driver/CMakeLists.txt b/tools/driver/CMakeLists.txt index 083b8c0..e38bb37 100644 --- a/tools/driver/CMakeLists.txt +++ b/tools/driver/CMakeLists.txt @@ -1,5 +1,3 @@ -set(LLVM_NO_RTTI 1) - set( LLVM_USED_LIBS clangFrontendTool clangFrontend diff --git a/tools/libclang/CMakeLists.txt b/tools/libclang/CMakeLists.txt index e901621..661fddd 100644 --- a/tools/libclang/CMakeLists.txt +++ b/tools/libclang/CMakeLists.txt @@ -1,7 +1,5 @@ set(SHARED_LIBRARY TRUE) -set(LLVM_NO_RTTI 1) - set(LLVM_USED_LIBS clangFrontend clangDriver --------------1.7.1.GIT-- From geek4civic at gmail.com Thu Feb 10 02:01:06 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Thu, 10 Feb 2011 17:01:06 +0900 Subject: [llvm-commits] [PATCH][Review request] Tweak tests for Mingw MSYS bash Message-ID: Hello Daniel, I will send following 4 patches for LLVM and 2 patches for clang. - Working with MSYS bash and Python/w32 together. To tweak DOSish pathstring quirk. - Capability for lit to execute bash tests on Python/w32. Please take a look into them, thank you. Checked on my hosts for months! ...Takumi [llvm] https://github.com/chapuni/LLVM/commits/msys-bash/20110210/ NAKAMURA Takumi (4): utils/lit/lit/TestRunner.py: bash is available with MSYS on Python/W32. Then we can execute "bash tests". Makefile.rules: Introduce $(ECHOPATH) to print DOSish path string on MSYS bash for alternative of $(ECHO). test/Makefile: Use $(ECHOPATH) to make lit.site.cfg(s). Use $(ECHOPATH) to make llvm-lit from llvm-lit.in. Makefile.rules | 18 ++++++++++++++++++ test/Makefile | 34 ++++++++++++++++++---------------- utils/lit/lit/TestRunner.py | 15 ++++++++++----- utils/llvm-lit/Makefile | 9 +++++---- 4 files changed, 51 insertions(+), 25 deletions(-) [clang] https://github.com/chapuni/clang/commits/msys-bash/20110210/ NAKAMURA Takumi (2): test/Makefile: Use $(ECHOPATH) to make lit.site.cfg(s). test/lit.cfg: bash is available on MSYS. test/Makefile | 42 ++++++++++++++++++++++-------------------- test/lit.cfg | 5 +++-- 2 files changed, 25 insertions(+), 22 deletions(-) From geek4civic at gmail.com Thu Feb 10 02:01:23 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Thu, 10 Feb 2011 17:01:23 +0900 Subject: [llvm-commits] [PATCH 1/4] utils/lit/lit/TestRunner.py: bash is available with MSYS on Python/W32. Then we can execute "bash tests". Message-ID: --- utils/lit/lit/TestRunner.py | 15 ++++++++++----- 1 files changed, 10 insertions(+), 5 deletions(-) -------------- next part -------------- A non-text attachment was scrubbed... Name: 0001-utils-lit-lit-TestRunner.py-bash-is-available-with-M.patch Type: text/x-patch Size: 1610 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110210/bee607fc/attachment.bin From geek4civic at gmail.com Thu Feb 10 02:01:32 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Thu, 10 Feb 2011 17:01:32 +0900 Subject: [llvm-commits] [PATCH 2/4] Makefile.rules: Introduce $(ECHOPATH) to print DOSish path string on MSYS bash for alternative of $(ECHO). Message-ID: --- Makefile.rules | 18 ++++++++++++++++++ 1 files changed, 18 insertions(+), 0 deletions(-) -------------- next part -------------- A non-text attachment was scrubbed... Name: 0002-Makefile.rules-Introduce-ECHOPATH-to-print-DOSish-pa.patch Type: text/x-patch Size: 1137 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110210/74b2e6ac/attachment.bin From geek4civic at gmail.com Thu Feb 10 02:01:42 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Thu, 10 Feb 2011 17:01:42 +0900 Subject: [llvm-commits] [PATCH 3/4] test/Makefile: Use $(ECHOPATH) to make lit.site.cfg(s). Message-ID: --- test/Makefile | 34 ++++++++++++++++++---------------- 1 files changed, 18 insertions(+), 16 deletions(-) -------------- next part -------------- A non-text attachment was scrubbed... Name: 0003-test-Makefile-Use-ECHOPATH-to-make-lit.site.cfg-s.patch Type: text/x-patch Size: 2123 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110210/6ed541d3/attachment-0001.bin From geek4civic at gmail.com Thu Feb 10 02:01:49 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Thu, 10 Feb 2011 17:01:49 +0900 Subject: [llvm-commits] [PATCH 4/4] Use $(ECHOPATH) to make llvm-lit from llvm-lit.in. Message-ID: --- utils/llvm-lit/Makefile | 9 +++++---- 1 files changed, 5 insertions(+), 4 deletions(-) -------------- next part -------------- A non-text attachment was scrubbed... Name: 0004-Use-ECHOPATH-to-make-llvm-lit-from-llvm-lit.in.patch Type: text/x-patch Size: 749 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110210/8ac3d8e4/attachment.bin From baldrick at free.fr Thu Feb 10 03:08:03 2011 From: baldrick at free.fr (Duncan Sands) Date: Thu, 10 Feb 2011 10:08:03 +0100 Subject: [llvm-commits] [llvm] r125267 - in /llvm/trunk: lib/Transforms/InstCombine/ test/Transforms/InstCombine/ In-Reply-To: <20110210053631.825F92A6C12C@llvm.org> References: <20110210053631.825F92A6C12C@llvm.org> Message-ID: <4D53AAF3.6070808@free.fr> Hi Chris, > Enhance a bunch of transformations in instcombine to start generating > exact/nsw/nuw shifts and have instcombine infer them when it can prove > that the relevant properties are true for a given shift without them. I didn't have time to read the patch, but as a general comment you need to be careful when inferring exact/nw flags not to make use of undef. The danger is that an undef value causes the creation of a trap value. For example, suppose you have a lshr x, 1 and you try to prove that this is exact. If you can show that bit 0 is undefined (due to an undef value somewhere upstream in the definition of x) then it would tempting but wrong to say that you are allowed to assume that the bit is zero and flag the shift as being exact. The danger is that other optimizers decide to resolve the undef to a specific value which causes bit 0 of x to become 1. The optimizers will then see that the result of the shift is a trap value and may do something nasty. Ciao, Duncan. From geek4civic at gmail.com Thu Feb 10 03:11:48 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Thu, 10 Feb 2011 09:11:48 -0000 Subject: [llvm-commits] [llvm] r125272 - /llvm/trunk/utils/lit/lit/Util.py Message-ID: <20110210091148.843A32A6C12D@llvm.org> Author: chapuni Date: Thu Feb 10 03:11:48 2011 New Revision: 125272 URL: http://llvm.org/viewvc/llvm-project?rev=125272&view=rev Log: lit/Util.py: On Cygwin, 'PATHEXT' may exist but it should not be used. Modified: llvm/trunk/utils/lit/lit/Util.py Modified: llvm/trunk/utils/lit/lit/Util.py URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/lit/lit/Util.py?rev=125272&r1=125271&r2=125272&view=diff ============================================================================== --- llvm/trunk/utils/lit/lit/Util.py (original) +++ llvm/trunk/utils/lit/lit/Util.py Thu Feb 10 03:11:48 2011 @@ -64,7 +64,11 @@ paths = os.defpath # Get suffixes to search. - pathext = os.environ.get('PATHEXT', '').split(os.pathsep) + # On Cygwin, 'PATHEXT' may exist but it should not be used. + if os.pathsep == ';': + pathext = os.environ.get('PATHEXT', '').split(';') + else: + pathext = [''] # Search the paths... for path in paths.split(os.pathsep): From geek4civic at gmail.com Thu Feb 10 03:11:57 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Thu, 10 Feb 2011 09:11:57 -0000 Subject: [llvm-commits] [llvm] r125273 - /llvm/trunk/utils/lit/lit/TestFormats.py Message-ID: <20110210091157.DDEF62A6C12D@llvm.org> Author: chapuni Date: Thu Feb 10 03:11:57 2011 New Revision: 125273 URL: http://llvm.org/viewvc/llvm-project?rev=125273&view=rev Log: lit/TestFormats.py: Unittests may be found with suffix .exe also on Cygwin. Modified: llvm/trunk/utils/lit/lit/TestFormats.py Modified: llvm/trunk/utils/lit/lit/TestFormats.py URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/lit/lit/TestFormats.py?rev=125273&r1=125272&r2=125273&view=diff ============================================================================== --- llvm/trunk/utils/lit/lit/TestFormats.py (original) +++ llvm/trunk/utils/lit/lit/TestFormats.py Thu Feb 10 03:11:57 2011 @@ -1,11 +1,11 @@ import os -import platform +import sys import Test import TestRunner import Util -kIsWindows = platform.system() == 'Windows' +kIsWindows = sys.platform in ['win32', 'cygwin'] class GoogleTest(object): def __init__(self, test_sub_dir, test_suffix): From geek4civic at gmail.com Thu Feb 10 03:13:39 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Thu, 10 Feb 2011 09:13:39 -0000 Subject: [llvm-commits] [llvm] r125274 - /llvm/trunk/tools/edis/CMakeLists.txt Message-ID: <20110210091339.6F62C2A6C12D@llvm.org> Author: chapuni Date: Thu Feb 10 03:13:39 2011 New Revision: 125274 URL: http://llvm.org/viewvc/llvm-project?rev=125274&view=rev Log: CMake: LLVM_NO_RTTI must be obsolete now! Modified: llvm/trunk/tools/edis/CMakeLists.txt Modified: llvm/trunk/tools/edis/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/edis/CMakeLists.txt?rev=125274&r1=125273&r2=125274&view=diff ============================================================================== --- llvm/trunk/tools/edis/CMakeLists.txt (original) +++ llvm/trunk/tools/edis/CMakeLists.txt Thu Feb 10 03:13:39 2011 @@ -1,5 +1,3 @@ -set(LLVM_NO_RTTI 1) - include_directories(${CMAKE_CURRENT_BINARY_DIR}) add_llvm_library(EnhancedDisassembly From baldrick at free.fr Thu Feb 10 04:21:31 2011 From: baldrick at free.fr (Duncan Sands) Date: Thu, 10 Feb 2011 10:21:31 -0000 Subject: [llvm-commits] [dragonegg] r125276 - /dragonegg/trunk/llvm-convert.cpp Message-ID: <20110210102131.522E12A6C12C@llvm.org> Author: baldrick Date: Thu Feb 10 04:21:31 2011 New Revision: 125276 URL: http://llvm.org/viewvc/llvm-project?rev=125276&view=rev Log: Fix the dragonegg build subsequent to changes Chris made to the target folder interface. Modified: dragonegg/trunk/llvm-convert.cpp Modified: dragonegg/trunk/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/llvm-convert.cpp?rev=125276&r1=125275&r2=125276&view=diff ============================================================================== --- dragonegg/trunk/llvm-convert.cpp (original) +++ dragonegg/trunk/llvm-convert.cpp Thu Feb 10 04:21:31 2011 @@ -126,6 +126,18 @@ return align ? align : 1; } +/// hasNUW - Return whether overflowing unsigned operations on this type result +/// in undefined behaviour. +static bool hasNUW(tree type) { + return TYPE_UNSIGNED(type) && !TYPE_OVERFLOW_WRAPS(type); +} + +/// hasNSW - Return whether overflowing signed operations on this type result +/// in undefined behaviour. +static bool hasNSW(tree type) { + return !TYPE_UNSIGNED(type) && !TYPE_OVERFLOW_WRAPS(type); +} + /// getSSAPlaceholder - A fake value associated with an SSA name when the name /// is used before being defined (this can occur because basic blocks are not /// output in dominator order). Replaced with the correct value when the SSA @@ -8849,9 +8861,9 @@ Constant *IndexVal = Convert(Index); tree LowerBound = array_ref_low_bound(exp); if (!integer_zerop(LowerBound)) - IndexVal = TYPE_UNSIGNED(TREE_TYPE(Index)) ? - TheFolder->CreateSub(IndexVal, Convert(LowerBound)) : - TheFolder->CreateNSWSub(IndexVal, Convert(LowerBound)); + IndexVal = TheFolder->CreateSub(IndexVal, Convert(LowerBound), + /*HasNUW*/hasNUW(TREE_TYPE(Index)), + /*HasNSW*/hasNSW(TREE_TYPE(Index))); const Type *IntPtrTy = getTargetData().getIntPtrType(Context); IndexVal = TheFolder->CreateIntCast(IndexVal, IntPtrTy, From geek4civic at gmail.com Thu Feb 10 04:29:42 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Thu, 10 Feb 2011 10:29:42 -0000 Subject: [llvm-commits] [llvm] r125277 - /llvm/trunk/cmake/modules/HandleLLVMOptions.cmake Message-ID: <20110210102942.AE8772A6C12C@llvm.org> Author: chapuni Date: Thu Feb 10 04:29:42 2011 New Revision: 125277 URL: http://llvm.org/viewvc/llvm-project?rev=125277&view=rev Log: CMake: LLVM_LIT_TOOLS_DIR is needed only on Win32 hosts to use GnuWin32 tools. Unixen and Cygwin do not need it. Modified: llvm/trunk/cmake/modules/HandleLLVMOptions.cmake Modified: llvm/trunk/cmake/modules/HandleLLVMOptions.cmake URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/cmake/modules/HandleLLVMOptions.cmake?rev=125277&r1=125276&r2=125277&view=diff ============================================================================== --- llvm/trunk/cmake/modules/HandleLLVMOptions.cmake (original) +++ llvm/trunk/cmake/modules/HandleLLVMOptions.cmake Thu Feb 10 04:29:42 2011 @@ -21,8 +21,6 @@ set(LLVM_LIT_ARGS "${LIT_ARGS_DEFAULT}" CACHE STRING "Default options for lit") -set(LLVM_LIT_TOOLS_DIR "" CACHE PATH "Path to GnuWin32 tools") - if( LLVM_ENABLE_ASSERTIONS ) # MSVC doesn't like _DEBUG on release builds. See PR 4379. if( NOT MSVC ) @@ -48,6 +46,9 @@ else(CYGWIN) set(LLVM_ON_WIN32 1) set(LLVM_ON_UNIX 0) + + # This is effective only on Win32 hosts to use gnuwin32 tools. + set(LLVM_LIT_TOOLS_DIR "" CACHE PATH "Path to GnuWin32 tools") endif(CYGWIN) set(LTDL_SHLIB_EXT ".dll") set(EXEEXT ".exe") From baldrick at free.fr Thu Feb 10 04:37:33 2011 From: baldrick at free.fr (Duncan Sands) Date: Thu, 10 Feb 2011 10:37:33 -0000 Subject: [llvm-commits] [dragonegg] r125278 - /dragonegg/trunk/llvm-convert.cpp Message-ID: <20110210103733.179472A6C12C@llvm.org> Author: baldrick Date: Thu Feb 10 04:37:32 2011 New Revision: 125278 URL: http://llvm.org/viewvc/llvm-project?rev=125278&view=rev Log: Cleanup NUW/NSW handling. Modified: dragonegg/trunk/llvm-convert.cpp Modified: dragonegg/trunk/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/llvm-convert.cpp?rev=125278&r1=125277&r2=125278&view=diff ============================================================================== --- dragonegg/trunk/llvm-convert.cpp (original) +++ dragonegg/trunk/llvm-convert.cpp Thu Feb 10 04:37:32 2011 @@ -1349,11 +1349,7 @@ Value *TreeToLLVM::CreateAnyAdd(Value *LHS, Value *RHS, tree_node *type) { if (FLOAT_TYPE_P(type)) return Builder.CreateFAdd(LHS, RHS); - if (TYPE_OVERFLOW_WRAPS(type)) - return Builder.CreateAdd(LHS, RHS); - if (TYPE_UNSIGNED(type)) - return Builder.CreateNUWAdd(LHS, RHS); - return Builder.CreateNSWAdd(LHS, RHS); + return Builder.CreateAdd(LHS, RHS, "", hasNUW(type), hasNSW(type)); } /// CreateAnyMul - Multiply two LLVM scalar values with the given GCC type. @@ -1361,11 +1357,7 @@ Value *TreeToLLVM::CreateAnyMul(Value *LHS, Value *RHS, tree_node *type) { if (FLOAT_TYPE_P(type)) return Builder.CreateFMul(LHS, RHS); - if (TYPE_OVERFLOW_WRAPS(type)) - return Builder.CreateMul(LHS, RHS); - if (TYPE_UNSIGNED(type)) - return Builder.CreateNUWMul(LHS, RHS); - return Builder.CreateNSWMul(LHS, RHS); + return Builder.CreateMul(LHS, RHS, "", hasNUW(type), hasNSW(type)); } /// CreateAnyNeg - Negate an LLVM scalar value with the given GCC type. Does @@ -1373,11 +1365,7 @@ Value *TreeToLLVM::CreateAnyNeg(Value *V, tree_node *type) { if (FLOAT_TYPE_P(type)) return Builder.CreateFNeg(V); - if (TYPE_OVERFLOW_WRAPS(type)) - return Builder.CreateNeg(V); - if (TYPE_UNSIGNED(type)) - return Builder.CreateNUWNeg(V); - return Builder.CreateNSWNeg(V); + return Builder.CreateNeg(V, "", hasNUW(type), hasNSW(type)); } /// CreateAnySub - Subtract two LLVM scalar values with the given GCC type. @@ -1385,11 +1373,7 @@ Value *TreeToLLVM::CreateAnySub(Value *LHS, Value *RHS, tree_node *type) { if (FLOAT_TYPE_P(type)) return Builder.CreateFSub(LHS, RHS); - if (TYPE_OVERFLOW_WRAPS(type)) - return Builder.CreateSub(LHS, RHS); - if (TYPE_UNSIGNED(type)) - return Builder.CreateNUWSub(LHS, RHS); - return Builder.CreateNSWSub(LHS, RHS); + return Builder.CreateSub(LHS, RHS, "", hasNUW(type), hasNSW(type)); } /// CreateTemporary - Create a new alloca instruction of the specified type, @@ -5356,9 +5340,9 @@ Value *IndexVal = EmitRegister(Index); tree LowerBound = array_ref_low_bound(exp); if (!integer_zerop(LowerBound)) - IndexVal = TYPE_UNSIGNED(TREE_TYPE(Index)) ? - Builder.CreateSub(IndexVal, EmitRegister(LowerBound)) : - Builder.CreateNSWSub(IndexVal, EmitRegister(LowerBound)); + IndexVal = Builder.CreateSub(IndexVal, EmitRegister(LowerBound), "", + hasNUW(TREE_TYPE(Index)), + hasNSW(TREE_TYPE(Index))); LValue ArrayAddrLV = EmitLV(Array); assert(!ArrayAddrLV.isBitfield() && "Arrays cannot be bitfields!"); @@ -8862,8 +8846,8 @@ tree LowerBound = array_ref_low_bound(exp); if (!integer_zerop(LowerBound)) IndexVal = TheFolder->CreateSub(IndexVal, Convert(LowerBound), - /*HasNUW*/hasNUW(TREE_TYPE(Index)), - /*HasNSW*/hasNSW(TREE_TYPE(Index))); + hasNUW(TREE_TYPE(Index)), + hasNSW(TREE_TYPE(Index))); const Type *IntPtrTy = getTargetData().getIntPtrType(Context); IndexVal = TheFolder->CreateIntCast(IndexVal, IntPtrTy, From geek4civic at gmail.com Thu Feb 10 05:52:09 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Thu, 10 Feb 2011 20:52:09 +0900 Subject: [llvm-commits] [LLVMdev] LLVM on Cygwin: why tests don't run In-Reply-To: References: Message-ID: Csaba, committed in r125272 and r125273, thank you! ...Takumi From geek4civic at gmail.com Thu Feb 10 06:04:46 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Thu, 10 Feb 2011 21:04:46 +0900 Subject: [llvm-commits] [PATCH] CMake: LLVM_NO_RTTI must be obsolete now! In-Reply-To: <87fwrwnwsd.fsf@wanadoo.es> References: <87fwrwnwsd.fsf@wanadoo.es> Message-ID: Fixed in llvm r125274 and clang r125275. On Thu, Feb 10, 2011 at 5:01 PM, ?scar Fuentes wrote: > It has no effect on the build and there is no equivalent on the > Makefile's, so it seems safe to remove it. BTW do you know when it was used? ...Takumi From clchiou at gmail.com Thu Feb 10 06:01:25 2011 From: clchiou at gmail.com (Che-Liang Chiou) Date: Thu, 10 Feb 2011 12:01:25 -0000 Subject: [llvm-commits] [llvm] r125279 - in /llvm/trunk: lib/Target/PTX/PTXAsmPrinter.cpp lib/Target/PTX/PTXISelDAGToDAG.cpp lib/Target/PTX/PTXISelLowering.cpp lib/Target/PTX/PTXISelLowering.h lib/Target/PTX/PTXInstrInfo.h lib/Target/PTX/PTXInstrInfo.td lib/Target/PTX/PTXMFInfoExtract.cpp lib/Target/PTX/PTXMachineFunctionInfo.h test/CodeGen/PTX/exit.ll Message-ID: <20110210120125.2CCE92A6C12C@llvm.org> Author: clchiou Date: Thu Feb 10 06:01:24 2011 New Revision: 125279 URL: http://llvm.org/viewvc/llvm-project?rev=125279&view=rev Log: ptx: add passing parameter to kernel functions Modified: llvm/trunk/lib/Target/PTX/PTXAsmPrinter.cpp llvm/trunk/lib/Target/PTX/PTXISelDAGToDAG.cpp llvm/trunk/lib/Target/PTX/PTXISelLowering.cpp llvm/trunk/lib/Target/PTX/PTXISelLowering.h llvm/trunk/lib/Target/PTX/PTXInstrInfo.h llvm/trunk/lib/Target/PTX/PTXInstrInfo.td llvm/trunk/lib/Target/PTX/PTXMFInfoExtract.cpp llvm/trunk/lib/Target/PTX/PTXMachineFunctionInfo.h llvm/trunk/test/CodeGen/PTX/exit.ll Modified: llvm/trunk/lib/Target/PTX/PTXAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXAsmPrinter.cpp?rev=125279&r1=125278&r2=125279&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/PTX/PTXAsmPrinter.cpp Thu Feb 10 06:01:24 2011 @@ -38,12 +38,11 @@ using namespace llvm; static cl::opt -OptPTXVersion("ptx-version", cl::desc("Set PTX version"), - cl::init("1.4")); +OptPTXVersion("ptx-version", cl::desc("Set PTX version"), cl::init("1.4")); static cl::opt OptPTXTarget("ptx-target", cl::desc("Set GPU target (comma-separated list)"), - cl::init("sm_10")); + cl::init("sm_10")); namespace { class PTXAsmPrinter : public AsmPrinter { @@ -67,6 +66,8 @@ void printOperand(const MachineInstr *MI, int opNum, raw_ostream &OS); void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &OS, const char *Modifier = 0); + void printParamOperand(const MachineInstr *MI, int opNum, raw_ostream &OS, + const char *Modifier = 0); // autogen'd. void printInstruction(const MachineInstr *MI, raw_ostream &OS); @@ -231,6 +232,11 @@ printOperand(MI, opNum+1, OS); } +void PTXAsmPrinter::printParamOperand(const MachineInstr *MI, int opNum, + raw_ostream &OS, const char *Modifier) { + OS << PARAM_PREFIX << (int) MI->getOperand(opNum).getImm() + 1; +} + void PTXAsmPrinter::EmitVariableDeclaration(const GlobalVariable *gv) { // Check to see if this is a special global used by LLVM, if so, emit it. if (EmitSpecialLLVMGlobal(gv)) Modified: llvm/trunk/lib/Target/PTX/PTXISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXISelDAGToDAG.cpp?rev=125279&r1=125278&r2=125279&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/PTX/PTXISelDAGToDAG.cpp Thu Feb 10 06:01:24 2011 @@ -40,6 +40,8 @@ #include "PTXGenDAGISel.inc" private: + SDNode *SelectREAD_PARAM(SDNode *Node); + bool isImm(const SDValue &operand); bool SelectImm(const SDValue &operand, SDValue &imm); }; // class PTXDAGToDAGISel @@ -57,8 +59,21 @@ : SelectionDAGISel(TM, OptLevel) {} SDNode *PTXDAGToDAGISel::Select(SDNode *Node) { - // SelectCode() is auto'gened - return SelectCode(Node); + if (Node->getOpcode() == PTXISD::READ_PARAM) + return SelectREAD_PARAM(Node); + else + return SelectCode(Node); +} + +SDNode *PTXDAGToDAGISel::SelectREAD_PARAM(SDNode *Node) { + SDValue index = Node->getOperand(1); + DebugLoc dl = Node->getDebugLoc(); + + if (index.getOpcode() != ISD::TargetConstant) + llvm_unreachable("READ_PARAM: index is not ISD::TargetConstant"); + + return PTXInstrInfo:: + GetPTXMachineNode(CurDAG, PTX::LDpi, dl, MVT::i32, index); } // Match memory operand of the form [reg+reg] Modified: llvm/trunk/lib/Target/PTX/PTXISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXISelLowering.cpp?rev=125279&r1=125278&r2=125279&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXISelLowering.cpp (original) +++ llvm/trunk/lib/Target/PTX/PTXISelLowering.cpp Thu Feb 10 06:01:24 2011 @@ -47,9 +47,14 @@ const char *PTXTargetLowering::getTargetNodeName(unsigned Opcode) const { switch (Opcode) { - default: llvm_unreachable("Unknown opcode"); - case PTXISD::EXIT: return "PTXISD::EXIT"; - case PTXISD::RET: return "PTXISD::RET"; + default: + llvm_unreachable("Unknown opcode"); + case PTXISD::READ_PARAM: + return "PTXISD::READ_PARAM"; + case PTXISD::EXIT: + return "PTXISD::EXIT"; + case PTXISD::RET: + return "PTXISD::RET"; } } @@ -86,42 +91,6 @@ }; } // end anonymous namespace -static SDValue lower_kernel_argument(int i, - SDValue Chain, - DebugLoc dl, - MVT::SimpleValueType VT, - argmap_entry *entry, - SelectionDAG &DAG, - unsigned *argreg) { - // TODO - llvm_unreachable("Not implemented yet"); -} - -static SDValue lower_device_argument(int i, - SDValue Chain, - DebugLoc dl, - MVT::SimpleValueType VT, - argmap_entry *entry, - SelectionDAG &DAG, - unsigned *argreg) { - MachineRegisterInfo &RegInfo = DAG.getMachineFunction().getRegInfo(); - - unsigned preg = *++(entry->loc); // allocate start from register 1 - unsigned vreg = RegInfo.createVirtualRegister(entry->RC); - RegInfo.addLiveIn(preg, vreg); - - *argreg = preg; - return DAG.getCopyFromReg(Chain, dl, vreg, VT); -} - -typedef SDValue (*lower_argument_func)(int i, - SDValue Chain, - DebugLoc dl, - MVT::SimpleValueType VT, - argmap_entry *entry, - SelectionDAG &DAG, - unsigned *argreg); - SDValue PTXTargetLowering:: LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, @@ -135,22 +104,22 @@ MachineFunction &MF = DAG.getMachineFunction(); PTXMachineFunctionInfo *MFI = MF.getInfo(); - lower_argument_func lower_argument; - switch (CallConv) { default: llvm_unreachable("Unsupported calling convention"); break; case CallingConv::PTX_Kernel: - MFI->setKernel(); - lower_argument = lower_kernel_argument; + MFI->setKernel(true); break; case CallingConv::PTX_Device: MFI->setKernel(false); - lower_argument = lower_device_argument; break; } + // Make sure we don't add argument registers twice + if (MFI->isDoneAddArg()) + llvm_unreachable("cannot add argument registers twice"); + // Reset argmap before allocation for (struct argmap_entry *i = argmap, *e = argmap + array_lengthof(argmap); i != e; ++ i) @@ -164,17 +133,27 @@ if (entry == argmap + array_lengthof(argmap)) llvm_unreachable("Type of argument is not supported"); - unsigned reg; - SDValue arg = lower_argument(i, Chain, dl, VT, entry, DAG, ®); - InVals.push_back(arg); + if (MFI->isKernel() && entry->RC == PTX::PredsRegisterClass) + llvm_unreachable("cannot pass preds to kernel"); + + MachineRegisterInfo &RegInfo = DAG.getMachineFunction().getRegInfo(); - if (!MFI->isDoneAddArg()) - MFI->addArgReg(reg); + unsigned preg = *++(entry->loc); // allocate start from register 1 + unsigned vreg = RegInfo.createVirtualRegister(entry->RC); + RegInfo.addLiveIn(preg, vreg); + + MFI->addArgReg(preg); + + SDValue inval; + if (MFI->isKernel()) + inval = DAG.getNode(PTXISD::READ_PARAM, dl, VT, Chain, + DAG.getTargetConstant(i, MVT::i32)); + else + inval = DAG.getCopyFromReg(Chain, dl, vreg, VT); + InVals.push_back(inval); } - // Make sure we don't add argument registers twice - if (!MFI->isDoneAddArg()) - MFI->doneAddArg(); + MFI->doneAddArg(); return Chain; } Modified: llvm/trunk/lib/Target/PTX/PTXISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXISelLowering.h?rev=125279&r1=125278&r2=125279&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXISelLowering.h (original) +++ llvm/trunk/lib/Target/PTX/PTXISelLowering.h Thu Feb 10 06:01:24 2011 @@ -24,6 +24,7 @@ namespace PTXISD { enum NodeType { FIRST_NUMBER = ISD::BUILTIN_OP_END, + READ_PARAM, EXIT, RET }; Modified: llvm/trunk/lib/Target/PTX/PTXInstrInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXInstrInfo.h?rev=125279&r1=125278&r2=125279&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXInstrInfo.h (original) +++ llvm/trunk/lib/Target/PTX/PTXInstrInfo.h Thu Feb 10 06:01:24 2011 @@ -15,6 +15,8 @@ #define PTX_INSTR_INFO_H #include "PTXRegisterInfo.h" +#include "llvm/CodeGen/SelectionDAG.h" +#include "llvm/CodeGen/SelectionDAGNodes.h" #include "llvm/Target/TargetInstrInfo.h" namespace llvm { @@ -45,6 +47,28 @@ virtual bool isMoveInstr(const MachineInstr& MI, unsigned &SrcReg, unsigned &DstReg, unsigned &SrcSubIdx, unsigned &DstSubIdx) const; + + // static helper routines + + static MachineSDNode *GetPTXMachineNode(SelectionDAG *DAG, unsigned Opcode, + DebugLoc dl, EVT VT, + SDValue Op1) { + SDValue pred_reg = DAG->getRegister(0, MVT::i1); + SDValue pred_imm = DAG->getTargetConstant(0, MVT::i32); + SDValue ops[] = { Op1, pred_reg, pred_imm }; + return DAG->getMachineNode(Opcode, dl, VT, ops, array_lengthof(ops)); + } + + static MachineSDNode *GetPTXMachineNode(SelectionDAG *DAG, unsigned Opcode, + DebugLoc dl, EVT VT, + SDValue Op1, + SDValue Op2) { + SDValue pred_reg = DAG->getRegister(0, MVT::i1); + SDValue pred_imm = DAG->getTargetConstant(0, MVT::i32); + SDValue ops[] = { Op1, Op2, pred_reg, pred_imm }; + return DAG->getMachineNode(Opcode, dl, VT, ops, array_lengthof(ops)); + } + }; // class PTXInstrInfo } // namespace llvm Modified: llvm/trunk/lib/Target/PTX/PTXInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXInstrInfo.td?rev=125279&r1=125278&r2=125279&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXInstrInfo.td (original) +++ llvm/trunk/lib/Target/PTX/PTXInstrInfo.td Thu Feb 10 06:01:24 2011 @@ -120,6 +120,10 @@ let PrintMethod = "printMemOperand"; let MIOperandInfo = (ops i32imm, i32imm); } +def MEMpi : Operand { + let PrintMethod = "printParamOperand"; + let MIOperandInfo = (ops i32imm); +} //===----------------------------------------------------------------------===// // PTX Specific Node Definitions @@ -236,9 +240,13 @@ defm LDp : PTX_LD<"ld.param", RRegs32, load_parameter>; defm LDs : PTX_LD<"ld.shared", RRegs32, load_shared>; +def LDpi : InstPTX<(outs RRegs32:$d), (ins MEMpi:$a), + "ld.param.%type\t$d, [$a]", []>; + defm STg : PTX_ST<"st.global", RRegs32, store_global>; defm STl : PTX_ST<"st.local", RRegs32, store_local>; -defm STp : PTX_ST<"st.param", RRegs32, store_parameter>; +// Store to parameter state space requires PTX 2.0 or higher? +// defm STp : PTX_ST<"st.param", RRegs32, store_parameter>; defm STs : PTX_ST<"st.shared", RRegs32, store_shared>; ///===- Control Flow Instructions -----------------------------------------===// Modified: llvm/trunk/lib/Target/PTX/PTXMFInfoExtract.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXMFInfoExtract.cpp?rev=125279&r1=125278&r2=125279&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXMFInfoExtract.cpp (original) +++ llvm/trunk/lib/Target/PTX/PTXMFInfoExtract.cpp Thu Feb 10 06:01:24 2011 @@ -67,7 +67,9 @@ // FIXME: This is a slow linear scanning for (unsigned reg = PTX::NoRegister + 1; reg < PTX::NUM_TARGET_REGS; ++reg) - if (MRI.isPhysRegUsed(reg) && reg != retreg && !MFI->isArgReg(reg)) + if (MRI.isPhysRegUsed(reg) && + reg != retreg && + (MFI->isKernel() || !MFI->isArgReg(reg))) MFI->addLocalVarReg(reg); // Notify MachineFunctionInfo that I've done adding local var reg Modified: llvm/trunk/lib/Target/PTX/PTXMachineFunctionInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXMachineFunctionInfo.h?rev=125279&r1=125278&r2=125279&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXMachineFunctionInfo.h (original) +++ llvm/trunk/lib/Target/PTX/PTXMachineFunctionInfo.h Thu Feb 10 06:01:24 2011 @@ -31,8 +31,8 @@ public: PTXMachineFunctionInfo(MachineFunction &MF) : is_kernel(false), reg_ret(PTX::NoRegister), _isDoneAddArg(false) { - reg_arg.reserve(32); - reg_local_var.reserve(64); + reg_arg.reserve(8); + reg_local_var.reserve(32); } void setKernel(bool _is_kernel=true) { is_kernel = _is_kernel; } Modified: llvm/trunk/test/CodeGen/PTX/exit.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PTX/exit.ll?rev=125279&r1=125278&r2=125279&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PTX/exit.ll (original) +++ llvm/trunk/test/CodeGen/PTX/exit.ll Thu Feb 10 06:01:24 2011 @@ -3,5 +3,12 @@ define ptx_kernel void @t1() { ; CHECK: exit; ; CHECK-NOT: ret; - ret void + ret void +} + +define ptx_kernel void @t2(i32* %p, i32 %x) { + store i32 %x, i32* %p +; CHECK: exit; +; CHECK-NOT: ret; + ret void } From reid.kleckner at gmail.com Thu Feb 10 10:08:25 2011 From: reid.kleckner at gmail.com (Reid Kleckner) Date: Thu, 10 Feb 2011 11:08:25 -0500 Subject: [llvm-commits] PATCH: Add encodings for fxsave64 and fxrstor64 Message-ID: These instructions are just fxsave and fxrstor with REX_W prefixes. The difference is that some pointers in dumped register map come out as 64-bit values instead of 32-bit values. If you don't use the prefix in 64-bit mode, you'll get 32-bit values instead of 64-bit. I needed this patch to build DynamoRIO with clang with the integrated assembler. It has some inline assembly with these instructions for context switching on signals. Please review. I can commit the patch. Thanks, Reid -------------- next part -------------- A non-text attachment was scrubbed... Name: fxsave64.diff Type: application/octet-stream Size: 1350 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110210/a1efbabf/attachment.obj From greened at obbligato.org Thu Feb 10 10:57:36 2011 From: greened at obbligato.org (David Greene) Date: Thu, 10 Feb 2011 16:57:36 -0000 Subject: [llvm-commits] [llvm] r125284 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Message-ID: <20110210165736.7B4042A6C12C@llvm.org> Author: greened Date: Thu Feb 10 10:57:36 2011 New Revision: 125284 URL: http://llvm.org/viewvc/llvm-project?rev=125284&view=rev Log: [AVX] Implement 256-bit vector lowering for EXTRACT_VECTOR_ELT. Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=125284&r1=125283&r2=125284&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Feb 10 10:57:36 2011 @@ -80,7 +80,9 @@ /// Generate a DAG to grab 128-bits from a vector > 128 bits. This /// sets things up to match to an AVX VEXTRACTF128 instruction or a -/// simple subregister reference. +/// simple subregister reference. Idx is an index in the 128 bits we +/// want. It need not be aligned to a 128-bit bounday. That makes +/// lowering EXTRACT_VECTOR_ELT operations easier. static SDValue Extract128BitVector(SDValue Vec, SDValue Idx, SelectionDAG &DAG, @@ -5917,6 +5919,38 @@ if (!isa(Op.getOperand(1))) return SDValue(); + SDValue Vec = Op.getOperand(0); + EVT VecVT = Vec.getValueType(); + + // If this is a 256-bit vector result, first extract the 128-bit + // vector and then extract from the 128-bit vector. + if (VecVT.getSizeInBits() > 128) { + DebugLoc dl = Op.getNode()->getDebugLoc(); + unsigned NumElems = VecVT.getVectorNumElements(); + SDValue Idx = Op.getOperand(1); + + if (!isa(Idx)) + return SDValue(); + + unsigned ExtractNumElems = NumElems / (VecVT.getSizeInBits() / 128); + unsigned IdxVal = cast(Idx)->getZExtValue(); + + // Get the 128-bit vector. + bool Upper = IdxVal >= ExtractNumElems; + Vec = Extract128BitVector(Vec, Idx, DAG, dl); + + // Extract from it. + SDValue ScaledIdx = Idx; + if (Upper) + ScaledIdx = DAG.getNode(ISD::SUB, dl, Idx.getValueType(), Idx, + DAG.getConstant(ExtractNumElems, + Idx.getValueType())); + return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, Op.getValueType(), Vec, + ScaledIdx); + } + + assert(Vec.getValueSizeInBits() <= 128 && "Unexpected vector length"); + if (Subtarget->hasSSE41()) { SDValue Res = LowerEXTRACT_VECTOR_ELT_SSE4(Op, DAG); if (Res.getNode()) From clattner at apple.com Thu Feb 10 11:37:50 2011 From: clattner at apple.com (Chris Lattner) Date: Thu, 10 Feb 2011 09:37:50 -0800 Subject: [llvm-commits] [dragonegg] r125276 - /dragonegg/trunk/llvm-convert.cpp In-Reply-To: <20110210102131.522E12A6C12C@llvm.org> References: <20110210102131.522E12A6C12C@llvm.org> Message-ID: <66E08EF7-1493-40FC-9A4F-27D624841DF1@apple.com> Thanks Duncan! -Chris On Feb 10, 2011, at 2:21 AM, Duncan Sands wrote: > Author: baldrick > Date: Thu Feb 10 04:21:31 2011 > New Revision: 125276 > > URL: http://llvm.org/viewvc/llvm-project?rev=125276&view=rev > Log: > Fix the dragonegg build subsequent to changes Chris made to the target > folder interface. > > Modified: > dragonegg/trunk/llvm-convert.cpp > > Modified: dragonegg/trunk/llvm-convert.cpp > URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/llvm-convert.cpp?rev=125276&r1=125275&r2=125276&view=diff > ============================================================================== > --- dragonegg/trunk/llvm-convert.cpp (original) > +++ dragonegg/trunk/llvm-convert.cpp Thu Feb 10 04:21:31 2011 > @@ -126,6 +126,18 @@ > return align ? align : 1; > } > > +/// hasNUW - Return whether overflowing unsigned operations on this type result > +/// in undefined behaviour. > +static bool hasNUW(tree type) { > + return TYPE_UNSIGNED(type) && !TYPE_OVERFLOW_WRAPS(type); > +} > + > +/// hasNSW - Return whether overflowing signed operations on this type result > +/// in undefined behaviour. > +static bool hasNSW(tree type) { > + return !TYPE_UNSIGNED(type) && !TYPE_OVERFLOW_WRAPS(type); > +} > + > /// getSSAPlaceholder - A fake value associated with an SSA name when the name > /// is used before being defined (this can occur because basic blocks are not > /// output in dominator order). Replaced with the correct value when the SSA > @@ -8849,9 +8861,9 @@ > Constant *IndexVal = Convert(Index); > tree LowerBound = array_ref_low_bound(exp); > if (!integer_zerop(LowerBound)) > - IndexVal = TYPE_UNSIGNED(TREE_TYPE(Index)) ? > - TheFolder->CreateSub(IndexVal, Convert(LowerBound)) : > - TheFolder->CreateNSWSub(IndexVal, Convert(LowerBound)); > + IndexVal = TheFolder->CreateSub(IndexVal, Convert(LowerBound), > + /*HasNUW*/hasNUW(TREE_TYPE(Index)), > + /*HasNSW*/hasNSW(TREE_TYPE(Index))); > > const Type *IntPtrTy = getTargetData().getIntPtrType(Context); > IndexVal = TheFolder->CreateIntCast(IndexVal, IntPtrTy, > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From bruno.cardoso at gmail.com Thu Feb 10 12:05:10 2011 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Thu, 10 Feb 2011 18:05:10 -0000 Subject: [llvm-commits] [llvm] r125292 - in /llvm/trunk: lib/Target/Mips/MipsISelLowering.cpp test/CodeGen/Mips/o32-cc.ll Message-ID: <20110210180511.011ED2A6C12C@llvm.org> Author: bruno Date: Thu Feb 10 12:05:10 2011 New Revision: 125292 URL: http://llvm.org/viewvc/llvm-project?rev=125292&view=rev Log: Fix a lot of o32 CC issues and add a bunch of tests. Patch by Akira Hatanaka with some small modifications by me. Added: llvm/trunk/test/CodeGen/Mips/o32-cc.ll Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=125292&r1=125291&r2=125292&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Thu Feb 10 12:05:10 2011 @@ -179,11 +179,11 @@ // (addc multLo, Lo0), (adde multHi, Hi0), // where, // multHi/Lo: product of multiplication -// Lo0: initial value of Lo register -// Hi0: initial value of Hi register +// Lo0: initial value of Lo register +// Hi0: initial value of Hi register // Return true if mattern matching was successful. static bool SelectMadd(SDNode* ADDENode, SelectionDAG* CurDAG) { - // ADDENode's second operand must be a flag output of an ADDC node in order + // ADDENode's second operand must be a flag output of an ADDC node in order // for the matching to be successful. SDNode* ADDCNode = ADDENode->getOperand(2).getNode(); @@ -192,7 +192,7 @@ SDValue MultHi = ADDENode->getOperand(0); SDValue MultLo = ADDCNode->getOperand(0); - SDNode* MultNode = MultHi.getNode(); + SDNode* MultNode = MultHi.getNode(); unsigned MultOpc = MultHi.getOpcode(); // MultHi and MultLo must be generated by the same node, @@ -202,39 +202,39 @@ // and it must be a multiplication. if (MultOpc != ISD::SMUL_LOHI && MultOpc != ISD::UMUL_LOHI) return false; - - // MultLo amd MultHi must be the first and second output of MultNode - // respectively. + + // MultLo amd MultHi must be the first and second output of MultNode + // respectively. if (MultHi.getResNo() != 1 || MultLo.getResNo() != 0) return false; - // Transform this to a MADD only if ADDENode and ADDCNode are the only users + // Transform this to a MADD only if ADDENode and ADDCNode are the only users // of the values of MultNode, in which case MultNode will be removed in later // phases. // If there exist users other than ADDENode or ADDCNode, this function returns - // here, which will result in MultNode being mapped to a single MULT - // instruction node rather than a pair of MULT and MADD instructions being + // here, which will result in MultNode being mapped to a single MULT + // instruction node rather than a pair of MULT and MADD instructions being // produced. if (!MultHi.hasOneUse() || !MultLo.hasOneUse()) return false; - SDValue Chain = CurDAG->getEntryNode(); + SDValue Chain = CurDAG->getEntryNode(); DebugLoc dl = ADDENode->getDebugLoc(); // create MipsMAdd(u) node MultOpc = MultOpc == ISD::UMUL_LOHI ? MipsISD::MAddu : MipsISD::MAdd; - + SDValue MAdd = CurDAG->getNode(MultOpc, dl, MVT::Glue, MultNode->getOperand(0),// Factor 0 MultNode->getOperand(1),// Factor 1 - ADDCNode->getOperand(1),// Lo0 + ADDCNode->getOperand(1),// Lo0 ADDENode->getOperand(1));// Hi0 // create CopyFromReg nodes SDValue CopyFromLo = CurDAG->getCopyFromReg(Chain, dl, Mips::LO, MVT::i32, MAdd); - SDValue CopyFromHi = CurDAG->getCopyFromReg(CopyFromLo.getValue(1), dl, + SDValue CopyFromHi = CurDAG->getCopyFromReg(CopyFromLo.getValue(1), dl, Mips::HI, MVT::i32, CopyFromLo.getValue(2)); @@ -245,7 +245,7 @@ if (!SDValue(ADDENode, 0).use_empty()) CurDAG->ReplaceAllUsesOfValueWith(SDValue(ADDENode, 0), CopyFromHi); - return true; + return true; } // SelectMsub - @@ -253,11 +253,11 @@ // (addc Lo0, multLo), (sube Hi0, multHi), // where, // multHi/Lo: product of multiplication -// Lo0: initial value of Lo register -// Hi0: initial value of Hi register +// Lo0: initial value of Lo register +// Hi0: initial value of Hi register // Return true if mattern matching was successful. static bool SelectMsub(SDNode* SUBENode, SelectionDAG* CurDAG) { - // SUBENode's second operand must be a flag output of an SUBC node in order + // SUBENode's second operand must be a flag output of an SUBC node in order // for the matching to be successful. SDNode* SUBCNode = SUBENode->getOperand(2).getNode(); @@ -266,7 +266,7 @@ SDValue MultHi = SUBENode->getOperand(1); SDValue MultLo = SUBCNode->getOperand(1); - SDNode* MultNode = MultHi.getNode(); + SDNode* MultNode = MultHi.getNode(); unsigned MultOpc = MultHi.getOpcode(); // MultHi and MultLo must be generated by the same node, @@ -330,9 +330,9 @@ if (Subtarget->isMips32() && SelectMadd(N, &DAG)) return SDValue(N, 0); - + return SDValue(); -} +} static SDValue PerformSUBECombine(SDNode *N, SelectionDAG& DAG, TargetLowering::DAGCombinerInfo &DCI, @@ -342,11 +342,11 @@ if (Subtarget->isMips32() && SelectMsub(N, &DAG)) return SDValue(N, 0); - + return SDValue(); -} +} -SDValue MipsTargetLowering::PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) +SDValue MipsTargetLowering::PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const { SelectionDAG &DAG = DCI.DAG; unsigned opc = N->getOpcode(); @@ -842,9 +842,15 @@ Mips::D6, Mips::D7 }; - unsigned Reg=0; - unsigned UnallocIntReg = State.getFirstUnallocated(IntRegs, IntRegsSize); - bool IntRegUsed = (IntRegs[UnallocIntReg] != (unsigned (Mips::A0))); + unsigned Reg = 0; + static bool IntRegUsed = false; + + // This must be the first arg of the call if no regs have been allocated. + // Initialize IntRegUsed in that case. + if (IntRegs[State.getFirstUnallocated(IntRegs, IntRegsSize)] == Mips::A0 && + F32Regs[State.getFirstUnallocated(F32Regs, FloatRegsSize)] == Mips::F12 && + F64Regs[State.getFirstUnallocated(F64Regs, FloatRegsSize)] == Mips::D6) + IntRegUsed = false; // Promote i8 and i16 if (LocVT == MVT::i8 || LocVT == MVT::i16) { @@ -857,30 +863,48 @@ LocInfo = CCValAssign::AExt; } - if (ValVT == MVT::i32 || (ValVT == MVT::f32 && IntRegUsed)) { + if (ValVT == MVT::i32) { Reg = State.AllocateReg(IntRegs, IntRegsSize); IntRegUsed = true; - LocVT = MVT::i32; - } - - if (ValVT.isFloatingPoint() && !IntRegUsed) { - if (ValVT == MVT::f32) - Reg = State.AllocateReg(F32Regs, FloatRegsSize); - else - Reg = State.AllocateReg(F64Regs, FloatRegsSize); - } + } else if (ValVT == MVT::f32) { + // An int reg has to be marked allocated regardless of whether or not + // IntRegUsed is true. + Reg = State.AllocateReg(IntRegs, IntRegsSize); - if (ValVT == MVT::f64 && IntRegUsed) { - if (UnallocIntReg != IntRegsSize) { - // If we hit register A3 as the first not allocated, we must - // mark it as allocated (shadow) and use the stack instead. - if (IntRegs[UnallocIntReg] != (unsigned (Mips::A3))) - Reg = Mips::A2; - for (;UnallocIntReg < IntRegsSize; ++UnallocIntReg) - State.AllocateReg(UnallocIntReg); + if (IntRegUsed) { + if (Reg) // Int reg is available + LocVT = MVT::i32; + } else { + unsigned FReg = State.AllocateReg(F32Regs, FloatRegsSize); + if (FReg) // F32 reg is available + Reg = FReg; + else if (Reg) // No F32 regs are available, but an int reg is available. + LocVT = MVT::i32; } - LocVT = MVT::i32; - } + } else if (ValVT == MVT::f64) { + // Int regs have to be marked allocated regardless of whether or not + // IntRegUsed is true. + Reg = State.AllocateReg(IntRegs, IntRegsSize); + if (Reg == Mips::A1) + Reg = State.AllocateReg(IntRegs, IntRegsSize); + else if (Reg == Mips::A3) + Reg = 0; + State.AllocateReg(IntRegs, IntRegsSize); + + // At this point, Reg is A0, A2 or 0, and all the unavailable integer regs + // are marked as allocated. + if (IntRegUsed) { + if (Reg)// if int reg is available + LocVT = MVT::i32; + } else { + unsigned FReg = State.AllocateReg(F64Regs, FloatRegsSize); + if (FReg) // F64 reg is available. + Reg = FReg; + else if (Reg) // No F64 regs are available, but an int reg is available. + LocVT = MVT::i32; + } + } else + assert(false && "cannot handle this ValVT"); if (!Reg) { unsigned SizeInBytes = ValVT.getSizeInBits() >> 3; Added: llvm/trunk/test/CodeGen/Mips/o32-cc.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/o32-cc.ll?rev=125292&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Mips/o32-cc.ll (added) +++ llvm/trunk/test/CodeGen/Mips/o32-cc.ll Thu Feb 10 12:05:10 2011 @@ -0,0 +1,321 @@ +; RUN: llc -march=mips -mcpu=4ke < %s | FileCheck %s + +; $f12, $f14 +; CHECK: ldc1 $f12, %lo($CPI0_0)($2) +; CHECK: ldc1 $f14, %lo($CPI0_1)($3) +define void @testlowercall0() nounwind { +entry: + tail call void @f0(double 5.000000e+00, double 6.000000e+00) nounwind + ret void +} + +declare void @f0(double, double) + +; $f12, $f14 +; CHECK: lwc1 $f12, %lo($CPI1_0)($2) +; CHECK: lwc1 $f14, %lo($CPI1_1)($3) +define void @testlowercall1() nounwind { +entry: + tail call void @f1(float 8.000000e+00, float 9.000000e+00) nounwind + ret void +} + +declare void @f1(float, float) + +; $f12, $f14 +; CHECK: lwc1 $f12, %lo($CPI2_0)($2) +; CHECK: ldc1 $f14, %lo($CPI2_1)($3) +define void @testlowercall2() nounwind { +entry: + tail call void @f2(float 8.000000e+00, double 6.000000e+00) nounwind + ret void +} + +declare void @f2(float, double) + +; $f12, $f14 +; CHECK: ldc1 $f12, %lo($CPI3_0)($2) +; CHECK: lwc1 $f14, %lo($CPI3_1)($3) +define void @testlowercall3() nounwind { +entry: + tail call void @f3(double 5.000000e+00, float 9.000000e+00) nounwind + ret void +} + +declare void @f3(double, float) + +; $4, $5, $6, $7 +; CHECK: addiu $4, $zero, 12 +; CHECK: addiu $5, $zero, 13 +; CHECK: addiu $6, $zero, 14 +; CHECK: addiu $7, $zero, 15 +define void @testlowercall4() nounwind { +entry: + tail call void @f4(i32 12, i32 13, i32 14, i32 15) nounwind + ret void +} + +declare void @f4(i32, i32, i32, i32) + +; $f12, $6, stack +; CHECK: sw $2, 16($sp) +; CHECK: sw $zero, 20($sp) +; CHECK: ldc1 $f12, %lo($CPI5_0)($3) +; CHECK: addiu $6, $zero, 23 +define void @testlowercall5() nounwind { +entry: + tail call void @f5(double 1.500000e+01, i32 23, double 1.700000e+01) nounwind + ret void +} + +declare void @f5(double, i32, double) + +; $f12, $6, $7 +; CHECK: ldc1 $f12, %lo($CPI6_0)($2) +; CHECK: addiu $6, $zero, 33 +; CHECK: addiu $7, $zero, 24 +define void @testlowercall6() nounwind { +entry: + tail call void @f6(double 2.500000e+01, i32 33, i32 24) nounwind + ret void +} + +declare void @f6(double, i32, i32) + +; $f12, $5, $6 +; CHECK: lwc1 $f12, %lo($CPI7_0)($2) +; CHECK: addiu $5, $zero, 43 +; CHECK: addiu $6, $zero, 34 +define void @testlowercall7() nounwind { +entry: + tail call void @f7(float 1.800000e+01, i32 43, i32 34) nounwind + ret void +} + +declare void @f7(float, i32, i32) + +; $4, $5, $6, stack +; CHECK: sw $2, 16($sp) +; CHECK: sw $zero, 20($sp) +; CHECK: addiu $4, $zero, 22 +; CHECK: addiu $5, $zero, 53 +; CHECK: addiu $6, $zero, 44 +define void @testlowercall8() nounwind { +entry: + tail call void @f8(i32 22, i32 53, i32 44, double 4.000000e+00) nounwind + ret void +} + +declare void @f8(i32, i32, i32, double) + +; $4, $5, $6, $7 +; CHECK: addiu $4, $zero, 32 +; CHECK: addiu $5, $zero, 63 +; CHECK: addiu $6, $zero, 54 +; CHECK: ori $7, $2, 0 +define void @testlowercall9() nounwind { +entry: + tail call void @f9(i32 32, i32 63, i32 54, float 1.100000e+01) nounwind + ret void +} + +declare void @f9(i32, i32, i32, float) + +; $4, $5, ($6, $7) +; CHECK: addiu $4, $zero, 42 +; CHECK: addiu $5, $zero, 73 +; CHECK: addiu $6, $zero, 0 +; CHECK: ori $7, $2, 0 +define void @testlowercall10() nounwind { +entry: + tail call void @f10(i32 42, i32 73, double 2.700000e+01) nounwind + ret void +} + +declare void @f10(i32, i32, double) + +; $4, ($6, $7) +; CHECK: addiu $4, $zero, 52 +; CHECK: addiu $6, $zero, 0 +; CHECK: ori $7, $2, 0 +define void @testlowercall11() nounwind { +entry: + tail call void @f11(i32 52, double 1.600000e+01) nounwind + ret void +} + +declare void @f11(i32, double) + +; $f12, $f14, $6, $7 +; CHECK: lwc1 $f12, %lo($CPI12_0)($2) +; CHECK: lwc1 $f14, %lo($CPI12_1)($3) +; CHECK: ori $6, $4, 0 +; CHECK: ori $7, $5, 0 +define void @testlowercall12() nounwind { +entry: + tail call void @f12(float 2.800000e+01, float 1.900000e+01, float 1.000000e+01, float 2.100000e+01) nounwind + ret void +} + +declare void @f12(float, float, float, float) + +; $f12, $5, $6, $7 +; CHECK: lwc1 $f12, %lo($CPI13_0)($2) +; CHECK: addiu $5, $zero, 83 +; CHECK: ori $6, $3, 0 +; CHECK: addiu $7, $zero, 25 +define void @testlowercall13() nounwind { +entry: + tail call void @f13(float 3.800000e+01, i32 83, float 2.000000e+01, i32 25) nounwind + ret void +} + + +declare void @f13(float, i32, float, i32) + +; $f12, $f14, $7 +; CHECK: ldc1 $f12, %lo($CPI14_0)($2) +; CHECK: lwc1 $f14, %lo($CPI14_1)($3) +; CHECK: ori $7, $4, 0 +define void @testlowercall14() nounwind { +entry: + tail call void @f14(double 3.500000e+01, float 2.900000e+01, float 3.000000e+01) nounwind + ret void +} + +declare void @f14(double, float, float) + +; $f12, $f14, ($6, $7) +; CHECK: lwc1 $f12, %lo($CPI15_0)($2) +; CHECK: lwc1 $f14, %lo($CPI15_1)($3) +; CHECK: addiu $6, $zero, 0 +; CHECK: ori $7, $4, 32768 +define void @testlowercall15() nounwind { +entry: + tail call void @f15(float 4.800000e+01, float 3.900000e+01, double 3.700000e+01) nounwind + ret void +} + +declare void @f15(float, float, double) + +; $4, $5, $6, $7 +; CHECK: addiu $4, $zero, 62 +; CHECK: ori $5, $2, 0 +; CHECK: addiu $6, $zero, 64 +; CHECK: ori $7, $3, 0 +define void @testlowercall16() nounwind { +entry: + tail call void @f16(i32 62, float 4.900000e+01, i32 64, float 3.100000e+01) nounwind + ret void +} + +declare void @f16(i32, float, i32, float) + +; $4, $5, $6, $7 +; CHECK: addiu $4, $zero, 72 +; CHECK: ori $5, $2, 0 +; CHECK: addiu $6, $zero, 74 +; CHECK: addiu $7, $zero, 35 +define void @testlowercall17() nounwind { +entry: + tail call void @f17(i32 72, float 5.900000e+01, i32 74, i32 35) nounwind + ret void +} + +declare void @f17(i32, float, i32, i32) + +; $4, $5, $6, $7 +; CHECK: addiu $4, $zero, 82 +; CHECK: addiu $5, $zero, 93 +; CHECK: ori $6, $2, 0 +; CHECK: addiu $7, $zero, 45 +define void @testlowercall18() nounwind { +entry: + tail call void @f18(i32 82, i32 93, float 4.000000e+01, i32 45) nounwind + ret void +} + +declare void @f18(i32, i32, float, i32) + + +; $4, ($6, $7), stack +; CHECK: sw $2, 16($sp) +; CHECK: sw $zero, 20($sp) +; CHECK: addiu $4, $zero, 92 +; CHECK: addiu $6, $zero, 0 +; CHECK: ori $7, $3, 0 +define void @testlowercall20() nounwind { +entry: + tail call void @f20(i32 92, double 2.600000e+01, double 4.700000e+01) nounwind + ret void +} + +declare void @f20(i32, double, double) + +; $f12, $5 +; CHECK: lwc1 $f12, %lo($CPI20_0)($2) +; CHECK: addiu $5, $zero, 103 +define void @testlowercall21() nounwind { +entry: + tail call void @f21(float 5.800000e+01, i32 103) nounwind + ret void +} + +declare void @f21(float, i32) + +; $f12, $5, ($6, $7) +; CHECK: lwc1 $f12, %lo($CPI21_0)($2) +; CHECK: addiu $5, $zero, 113 +; CHECK: addiu $6, $zero, 0 +; CHECK: ori $7, $3, 32768 +define void @testlowercall22() nounwind { +entry: + tail call void @f22(float 6.800000e+01, i32 113, double 5.700000e+01) nounwind + ret void +} + +declare void @f22(float, i32, double) + +; $f12, f6 +; CHECK: ldc1 $f12, %lo($CPI22_0)($2) +; CHECK: addiu $6, $zero, 123 +define void @testlowercall23() nounwind { +entry: + tail call void @f23(double 4.500000e+01, i32 123) nounwind + ret void +} + +declare void @f23(double, i32) + +; $f12,$6, stack +; CHECK: sw $2, 16($sp) +; CHECK: sw $zero, 20($sp) +; CHECK: ldc1 $f12, %lo($CPI23_0)($3) +; CHECK: addiu $6, $zero, 133 +define void @testlowercall24() nounwind { +entry: + tail call void @f24(double 5.500000e+01, i32 133, double 6.700000e+01) nounwind + ret void +} + +declare void @f24(double, i32, double) + +; CHECK: lwc1 $f12, %lo($CPI24_0)($2) +; CHECK: lwc1 $f14, %lo($CPI24_1)($3) +; CHECK: ori $6, $4, 0 +; CHECK: ori $7, $5, 0 +; CHECK: lwc1 $f12, %lo($CPI24_2)($2) +; CHECK: addiu $5, $zero, 83 +; CHECK: ori $6, $3, 0 +; CHECK: addiu $7, $zero, 25 +; CHECK: addiu $4, $zero, 82 +; CHECK: addiu $5, $zero, 93 +; CHECK: ori $6, $2, 0 +; CHECK: addiu $7, $zero, 45 +define void @testlowercall25() nounwind { +entry: + tail call void @f12(float 2.800000e+01, float 1.900000e+01, float 1.000000e+01, float 2.100000e+01) nounwind + tail call void @f13(float 3.800000e+01, i32 83, float 2.000000e+01, i32 25) nounwind + tail call void @f18(i32 82, i32 93, float 4.000000e+01, i32 45) nounwind + ret void +} From resistor at mac.com Thu Feb 10 13:56:24 2011 From: resistor at mac.com (Owen Anderson) Date: Thu, 10 Feb 2011 19:56:24 -0000 Subject: [llvm-commits] [llvm] r125304 - /llvm/trunk/include/llvm/Target/Target.td Message-ID: <20110210195624.178D62A6C12C@llvm.org> Author: resistor Date: Thu Feb 10 13:56:23 2011 New Revision: 125304 URL: http://llvm.org/viewvc/llvm-project?rev=125304&view=rev Log: Clean trailing whitespace. Modified: llvm/trunk/include/llvm/Target/Target.td Modified: llvm/trunk/include/llvm/Target/Target.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/Target.td?rev=125304&r1=125303&r2=125304&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/Target.td (original) +++ llvm/trunk/include/llvm/Target/Target.td Thu Feb 10 13:56:23 2011 @@ -1,10 +1,10 @@ //===- Target.td - Target Independent TableGen interface ---*- tablegen -*-===// -// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file defines the target-independent interfaces which should be @@ -47,7 +47,7 @@ // modification of this register can potentially read or modify the aliased // registers. list Aliases = []; - + // SubRegs - A list of registers that are parts of this register. Note these // are "immediate" sub-registers and the registers within the list do not // themselves overlap. e.g. For X86, EAX's SubRegs list contains only [AX], @@ -84,7 +84,7 @@ // need to specify sub-registers. // List "subregs" specifies which registers are sub-registers to this one. This // is used to populate the SubRegs and AliasSet fields of TargetRegisterDesc. -// This allows the code generator to be careful not to put two values with +// This allows the code generator to be careful not to put two values with // overlapping live ranges into registers which alias. class RegisterWithSubRegs subregs> : Register { let SubRegs = subregs; @@ -101,7 +101,7 @@ // RegType - Specify the list ValueType of the registers in this register // class. Note that all registers in a register class must have the same - // ValueTypes. This is a list because some targets permit storing different + // ValueTypes. This is a list because some targets permit storing different // types in same register, for example vector values with 128-bit total size, // but different count/size of items, like SSE on x86. // @@ -127,13 +127,13 @@ // allocation used by the register allocator. // list MemberList = regList; - + // SubRegClasses - Specify the register class of subregisters as a list of // dags: (RegClass SubRegIndex, SubRegindex, ...) list SubRegClasses = []; // MethodProtos/MethodBodies - These members can be used to insert arbitrary - // code into a generated register class. The normal usage of this is to + // code into a generated register class. The normal usage of this is to // overload virtual methods. code MethodProtos = [{}]; code MethodBodies = [{}]; @@ -261,7 +261,7 @@ /// selector matching code. Currently each predicate is just a string. class Predicate { string CondString = cond; - + /// AssemblerMatcherPredicate - If this feature can be used by the assembler /// matcher, this is true. Targets should set this by inheriting their /// feature from the AssemblerPredicate class in addition to Predicate. @@ -352,7 +352,7 @@ def ImmAsmOperand : AsmOperandClass { let Name = "Imm"; } - + /// Operand Types - These provide the built-in operand types that may be used /// by a target. Targets can optionally provide their own operand types as /// needed, though this should not be needed for RISC targets. @@ -580,7 +580,7 @@ class MnemonicAlias { string FromMnemonic = From; string ToMnemonic = To; - + // Predicates - Predicates that must be true for this remapping to happen. list Predicates = []; } @@ -591,7 +591,7 @@ class InstAlias { string AsmString = Asm; // The .s format to match the instruction with. dag ResultInst = Result; // The MCInst to generate. - + // Predicates - Predicates that must be true for this to match. list Predicates = []; } @@ -616,15 +616,15 @@ // will specify which alternative to use. For example "{x|y|z}" with Variant // == 1, will expand to "y". int Variant = 0; - - + + // FirstOperandColumn/OperandSpacing - If the assembler syntax uses a columnar // layout, the asmwriter can actually generate output in this columns (in // verbose-asm mode). These two values indicate the width of the first column // (the "opcode" area) and the width to reserve for subsequent operands. When // verbose asm mode is enabled, operands will be indented to respect this. int FirstOperandColumn = -1; - + // OperandSpacing - Space between operand columns. int OperandSpacing = -1; @@ -659,15 +659,15 @@ // appropriate target chip. // string Name = n; - + // Attribute - Attribute to be set by feature. // string Attribute = a; - + // Value - Value the attribute to be set to by feature. // string Value = v; - + // Desc - Feature description. Used by command line (-mattr=) to display help // information. // @@ -689,12 +689,12 @@ // appropriate target chip. // string Name = n; - + // ProcItin - The scheduling information for the target processor. // ProcessorItineraries ProcItin = pi; - - // Features - list of + + // Features - list of list Features = f; } From bruno.cardoso at gmail.com Thu Feb 10 14:10:17 2011 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Thu, 10 Feb 2011 20:10:17 -0000 Subject: [llvm-commits] [llvm] r125305 - /llvm/trunk/test/CodeGen/Mips/o32-cc.ll Message-ID: <20110210201017.2DE392A6C12C@llvm.org> Author: bruno Date: Thu Feb 10 14:10:17 2011 New Revision: 125305 URL: http://llvm.org/viewvc/llvm-project?rev=125305&view=rev Log: Remove the test to silence the buildbot, will check it in again with a proper fix soon Removed: llvm/trunk/test/CodeGen/Mips/o32-cc.ll Removed: llvm/trunk/test/CodeGen/Mips/o32-cc.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/o32-cc.ll?rev=125304&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Mips/o32-cc.ll (original) +++ llvm/trunk/test/CodeGen/Mips/o32-cc.ll (removed) @@ -1,321 +0,0 @@ -; RUN: llc -march=mips -mcpu=4ke < %s | FileCheck %s - -; $f12, $f14 -; CHECK: ldc1 $f12, %lo($CPI0_0)($2) -; CHECK: ldc1 $f14, %lo($CPI0_1)($3) -define void @testlowercall0() nounwind { -entry: - tail call void @f0(double 5.000000e+00, double 6.000000e+00) nounwind - ret void -} - -declare void @f0(double, double) - -; $f12, $f14 -; CHECK: lwc1 $f12, %lo($CPI1_0)($2) -; CHECK: lwc1 $f14, %lo($CPI1_1)($3) -define void @testlowercall1() nounwind { -entry: - tail call void @f1(float 8.000000e+00, float 9.000000e+00) nounwind - ret void -} - -declare void @f1(float, float) - -; $f12, $f14 -; CHECK: lwc1 $f12, %lo($CPI2_0)($2) -; CHECK: ldc1 $f14, %lo($CPI2_1)($3) -define void @testlowercall2() nounwind { -entry: - tail call void @f2(float 8.000000e+00, double 6.000000e+00) nounwind - ret void -} - -declare void @f2(float, double) - -; $f12, $f14 -; CHECK: ldc1 $f12, %lo($CPI3_0)($2) -; CHECK: lwc1 $f14, %lo($CPI3_1)($3) -define void @testlowercall3() nounwind { -entry: - tail call void @f3(double 5.000000e+00, float 9.000000e+00) nounwind - ret void -} - -declare void @f3(double, float) - -; $4, $5, $6, $7 -; CHECK: addiu $4, $zero, 12 -; CHECK: addiu $5, $zero, 13 -; CHECK: addiu $6, $zero, 14 -; CHECK: addiu $7, $zero, 15 -define void @testlowercall4() nounwind { -entry: - tail call void @f4(i32 12, i32 13, i32 14, i32 15) nounwind - ret void -} - -declare void @f4(i32, i32, i32, i32) - -; $f12, $6, stack -; CHECK: sw $2, 16($sp) -; CHECK: sw $zero, 20($sp) -; CHECK: ldc1 $f12, %lo($CPI5_0)($3) -; CHECK: addiu $6, $zero, 23 -define void @testlowercall5() nounwind { -entry: - tail call void @f5(double 1.500000e+01, i32 23, double 1.700000e+01) nounwind - ret void -} - -declare void @f5(double, i32, double) - -; $f12, $6, $7 -; CHECK: ldc1 $f12, %lo($CPI6_0)($2) -; CHECK: addiu $6, $zero, 33 -; CHECK: addiu $7, $zero, 24 -define void @testlowercall6() nounwind { -entry: - tail call void @f6(double 2.500000e+01, i32 33, i32 24) nounwind - ret void -} - -declare void @f6(double, i32, i32) - -; $f12, $5, $6 -; CHECK: lwc1 $f12, %lo($CPI7_0)($2) -; CHECK: addiu $5, $zero, 43 -; CHECK: addiu $6, $zero, 34 -define void @testlowercall7() nounwind { -entry: - tail call void @f7(float 1.800000e+01, i32 43, i32 34) nounwind - ret void -} - -declare void @f7(float, i32, i32) - -; $4, $5, $6, stack -; CHECK: sw $2, 16($sp) -; CHECK: sw $zero, 20($sp) -; CHECK: addiu $4, $zero, 22 -; CHECK: addiu $5, $zero, 53 -; CHECK: addiu $6, $zero, 44 -define void @testlowercall8() nounwind { -entry: - tail call void @f8(i32 22, i32 53, i32 44, double 4.000000e+00) nounwind - ret void -} - -declare void @f8(i32, i32, i32, double) - -; $4, $5, $6, $7 -; CHECK: addiu $4, $zero, 32 -; CHECK: addiu $5, $zero, 63 -; CHECK: addiu $6, $zero, 54 -; CHECK: ori $7, $2, 0 -define void @testlowercall9() nounwind { -entry: - tail call void @f9(i32 32, i32 63, i32 54, float 1.100000e+01) nounwind - ret void -} - -declare void @f9(i32, i32, i32, float) - -; $4, $5, ($6, $7) -; CHECK: addiu $4, $zero, 42 -; CHECK: addiu $5, $zero, 73 -; CHECK: addiu $6, $zero, 0 -; CHECK: ori $7, $2, 0 -define void @testlowercall10() nounwind { -entry: - tail call void @f10(i32 42, i32 73, double 2.700000e+01) nounwind - ret void -} - -declare void @f10(i32, i32, double) - -; $4, ($6, $7) -; CHECK: addiu $4, $zero, 52 -; CHECK: addiu $6, $zero, 0 -; CHECK: ori $7, $2, 0 -define void @testlowercall11() nounwind { -entry: - tail call void @f11(i32 52, double 1.600000e+01) nounwind - ret void -} - -declare void @f11(i32, double) - -; $f12, $f14, $6, $7 -; CHECK: lwc1 $f12, %lo($CPI12_0)($2) -; CHECK: lwc1 $f14, %lo($CPI12_1)($3) -; CHECK: ori $6, $4, 0 -; CHECK: ori $7, $5, 0 -define void @testlowercall12() nounwind { -entry: - tail call void @f12(float 2.800000e+01, float 1.900000e+01, float 1.000000e+01, float 2.100000e+01) nounwind - ret void -} - -declare void @f12(float, float, float, float) - -; $f12, $5, $6, $7 -; CHECK: lwc1 $f12, %lo($CPI13_0)($2) -; CHECK: addiu $5, $zero, 83 -; CHECK: ori $6, $3, 0 -; CHECK: addiu $7, $zero, 25 -define void @testlowercall13() nounwind { -entry: - tail call void @f13(float 3.800000e+01, i32 83, float 2.000000e+01, i32 25) nounwind - ret void -} - - -declare void @f13(float, i32, float, i32) - -; $f12, $f14, $7 -; CHECK: ldc1 $f12, %lo($CPI14_0)($2) -; CHECK: lwc1 $f14, %lo($CPI14_1)($3) -; CHECK: ori $7, $4, 0 -define void @testlowercall14() nounwind { -entry: - tail call void @f14(double 3.500000e+01, float 2.900000e+01, float 3.000000e+01) nounwind - ret void -} - -declare void @f14(double, float, float) - -; $f12, $f14, ($6, $7) -; CHECK: lwc1 $f12, %lo($CPI15_0)($2) -; CHECK: lwc1 $f14, %lo($CPI15_1)($3) -; CHECK: addiu $6, $zero, 0 -; CHECK: ori $7, $4, 32768 -define void @testlowercall15() nounwind { -entry: - tail call void @f15(float 4.800000e+01, float 3.900000e+01, double 3.700000e+01) nounwind - ret void -} - -declare void @f15(float, float, double) - -; $4, $5, $6, $7 -; CHECK: addiu $4, $zero, 62 -; CHECK: ori $5, $2, 0 -; CHECK: addiu $6, $zero, 64 -; CHECK: ori $7, $3, 0 -define void @testlowercall16() nounwind { -entry: - tail call void @f16(i32 62, float 4.900000e+01, i32 64, float 3.100000e+01) nounwind - ret void -} - -declare void @f16(i32, float, i32, float) - -; $4, $5, $6, $7 -; CHECK: addiu $4, $zero, 72 -; CHECK: ori $5, $2, 0 -; CHECK: addiu $6, $zero, 74 -; CHECK: addiu $7, $zero, 35 -define void @testlowercall17() nounwind { -entry: - tail call void @f17(i32 72, float 5.900000e+01, i32 74, i32 35) nounwind - ret void -} - -declare void @f17(i32, float, i32, i32) - -; $4, $5, $6, $7 -; CHECK: addiu $4, $zero, 82 -; CHECK: addiu $5, $zero, 93 -; CHECK: ori $6, $2, 0 -; CHECK: addiu $7, $zero, 45 -define void @testlowercall18() nounwind { -entry: - tail call void @f18(i32 82, i32 93, float 4.000000e+01, i32 45) nounwind - ret void -} - -declare void @f18(i32, i32, float, i32) - - -; $4, ($6, $7), stack -; CHECK: sw $2, 16($sp) -; CHECK: sw $zero, 20($sp) -; CHECK: addiu $4, $zero, 92 -; CHECK: addiu $6, $zero, 0 -; CHECK: ori $7, $3, 0 -define void @testlowercall20() nounwind { -entry: - tail call void @f20(i32 92, double 2.600000e+01, double 4.700000e+01) nounwind - ret void -} - -declare void @f20(i32, double, double) - -; $f12, $5 -; CHECK: lwc1 $f12, %lo($CPI20_0)($2) -; CHECK: addiu $5, $zero, 103 -define void @testlowercall21() nounwind { -entry: - tail call void @f21(float 5.800000e+01, i32 103) nounwind - ret void -} - -declare void @f21(float, i32) - -; $f12, $5, ($6, $7) -; CHECK: lwc1 $f12, %lo($CPI21_0)($2) -; CHECK: addiu $5, $zero, 113 -; CHECK: addiu $6, $zero, 0 -; CHECK: ori $7, $3, 32768 -define void @testlowercall22() nounwind { -entry: - tail call void @f22(float 6.800000e+01, i32 113, double 5.700000e+01) nounwind - ret void -} - -declare void @f22(float, i32, double) - -; $f12, f6 -; CHECK: ldc1 $f12, %lo($CPI22_0)($2) -; CHECK: addiu $6, $zero, 123 -define void @testlowercall23() nounwind { -entry: - tail call void @f23(double 4.500000e+01, i32 123) nounwind - ret void -} - -declare void @f23(double, i32) - -; $f12,$6, stack -; CHECK: sw $2, 16($sp) -; CHECK: sw $zero, 20($sp) -; CHECK: ldc1 $f12, %lo($CPI23_0)($3) -; CHECK: addiu $6, $zero, 133 -define void @testlowercall24() nounwind { -entry: - tail call void @f24(double 5.500000e+01, i32 133, double 6.700000e+01) nounwind - ret void -} - -declare void @f24(double, i32, double) - -; CHECK: lwc1 $f12, %lo($CPI24_0)($2) -; CHECK: lwc1 $f14, %lo($CPI24_1)($3) -; CHECK: ori $6, $4, 0 -; CHECK: ori $7, $5, 0 -; CHECK: lwc1 $f12, %lo($CPI24_2)($2) -; CHECK: addiu $5, $zero, 83 -; CHECK: ori $6, $3, 0 -; CHECK: addiu $7, $zero, 25 -; CHECK: addiu $4, $zero, 82 -; CHECK: addiu $5, $zero, 93 -; CHECK: ori $6, $2, 0 -; CHECK: addiu $7, $zero, 45 -define void @testlowercall25() nounwind { -entry: - tail call void @f12(float 2.800000e+01, float 1.900000e+01, float 1.000000e+01, float 2.100000e+01) nounwind - tail call void @f13(float 3.800000e+01, i32 83, float 2.000000e+01, i32 25) nounwind - tail call void @f18(i32 82, i32 93, float 4.000000e+01, i32 45) nounwind - ret void -} From criswell at uiuc.edu Thu Feb 10 14:24:10 2011 From: criswell at uiuc.edu (John Criswell) Date: Thu, 10 Feb 2011 20:24:10 -0000 Subject: [llvm-commits] [poolalloc] r125308 - /poolalloc/trunk/LICENSE.TXT Message-ID: <20110210202410.1B6A12A6C12C@llvm.org> Author: criswell Date: Thu Feb 10 14:24:09 2011 New Revision: 125308 URL: http://llvm.org/viewvc/llvm-project?rev=125308&view=rev Log: Updated copyright year. Modified: poolalloc/trunk/LICENSE.TXT Modified: poolalloc/trunk/LICENSE.TXT URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/LICENSE.TXT?rev=125308&r1=125307&r2=125308&view=diff ============================================================================== --- poolalloc/trunk/LICENSE.TXT (original) +++ poolalloc/trunk/LICENSE.TXT Thu Feb 10 14:24:09 2011 @@ -4,7 +4,7 @@ University of Illinois/NCSA Open Source License -Copyright (c) 2003-2010 University of Illinois at Urbana-Champaign. +Copyright (c) 2003-2011 University of Illinois at Urbana-Champaign. All rights reserved. Developed by: From joerg at britannica.bec.de Thu Feb 10 15:14:33 2011 From: joerg at britannica.bec.de (Joerg Sonnenberger) Date: Thu, 10 Feb 2011 22:14:33 +0100 Subject: [llvm-commits] [PATCH] [MC] .pushsection / .popsection support In-Reply-To: References: <20110209202852.GA10573@britannica.bec.de> <20110209214037.GA14074@britannica.bec.de> Message-ID: <20110210211433.GA27552@britannica.bec.de> On Wed, Feb 09, 2011 at 03:38:56PM -0800, Nick Lewycky wrote: > On 9 February 2011 13:40, Joerg Sonnenberger wrote: > > > Because .popstack changes both the current and last section. More > > importantly, it can set the previous section to NULL, so it can't just > > be emulated with two calls to SwitchSection. > > > > Right, I realize that it can't, but the MCStreamer API is supposed to mirror > the set of directives actually supported. SwitchSection maps to ".section" > but SwitchSection2 doesn't as there's no directive which set the current and > previous section to any strings you want. The MCStreamer implementations can > just modify CurSection and PrevSection directly, they don't need an API for > it. I think the handling of push/pop/section can and should be isolated from the "backend" view of changing the active section. Attached patch is a newer version which makes push/pop/switch non-virtual. The actual implementation overrides ChangeSection, which gets called whenever there is an actual section change. The only case left is the logging streamer, which would now only log this specific event. I'm not sure if that is a regression or not. > Splitting the current SwitchSection would be cleaner and fix some issues > > as I mentioned. > > > > Sure, feel free to refactor but please make them protected methods. > Currently CurSection and PrevSection are protected. I'd suggest replacing > those with the stacks and then get{Current,Previous}Section return the top > of the stack. I've kept them separate as the stack manipulation is a separate path. > > Also, did you check that a .s which consists entirely of ".previous" gives > > a > > > nice error? GAS says: > > > x.s:1: Warning: .previous without corresponding .section; ignored > > > > I haven't touched .previous and don't plan to do it for this patch. > > It is an unrelated issue. > > > > Good point! I've fixed it with the handling of .ident, which is using the new push/pop primitives to ensure that it doesn't clobber PrevSection. Joerg -------------- next part -------------- A non-text attachment was scrubbed... Name: section-stack.diff Type: text/x-diff Size: 15186 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110210/5d86e78c/attachment.bin From viridia at gmail.com Thu Feb 10 15:40:20 2011 From: viridia at gmail.com (Talin) Date: Thu, 10 Feb 2011 13:40:20 -0800 Subject: [llvm-commits] PATCH: Additional convenience methods for ConstantStruct, ConstantArray, and ConstantVector. Message-ID: This patch adds a new "get" method to ConstantStruct, ConstantArray and ConstantVector. The new method accepts a pair of RandomAccessIterators, similar to other LLVM method signatures. This allows constants to be build using a small vector or other sequential container type more easily. In addition, I've also added an END_WITH_NULL variant for ConstantStruct::get(). I only added it to ConstantStruct because I figured that it would be an uncommon use case for arrays and vectors, whereas the creation of small constant structs of predetermined length is fairly common. -- -- Talin -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110210/1a402d23/attachment.html -------------- next part -------------- A non-text attachment was scrubbed... Name: ConstantStruct.patch Type: text/x-patch Size: 3349 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110210/1a402d23/attachment.bin From ofv at wanadoo.es Thu Feb 10 16:27:27 2011 From: ofv at wanadoo.es (=?utf-8?Q?=C3=93scar_Fuentes?=) Date: Thu, 10 Feb 2011 23:27:27 +0100 Subject: [llvm-commits] [PATCH] CMake: LLVM_NO_RTTI must be obsolete now! In-Reply-To: (NAKAMURA Takumi's message of "Thu, 10 Feb 2011 21:04:46 +0900") References: <87fwrwnwsd.fsf@wanadoo.es> Message-ID: <87aai3o78w.fsf@wanadoo.es> NAKAMURA Takumi writes: > Fixed in llvm r125274 and clang r125275. > > On Thu, Feb 10, 2011 at 5:01 PM, ?scar Fuentes wrote: >> It has no effect on the build and there is no equivalent on the >> Makefile's, so it seems safe to remove it. > > BTW do you know when it was used? AFAIR, never. From nadav.rotem at intel.com Thu Feb 10 16:27:05 2011 From: nadav.rotem at intel.com (Rotem, Nadav) Date: Fri, 11 Feb 2011 00:27:05 +0200 Subject: [llvm-commits] Patch review for bug 9190 Message-ID: <6594DDFF12B03D4E89690887C24869940270CCAB45@hasmsx504.ger.corp.intel.com> http://llvm.org/bugs/show_bug.cgi?id=9190 The bug happens when the DAGCombiner attempts to optimize one of the patterns of the SUB opcode. It tries to create a zero of type v2i64. This type is legal on 32bit machines, but the initializer is target dependent. Currently, the initializer attempts to create an i64 zero constant, which fails. Added a flag to tell the DAGCombiner to create a legal zero, if we require that the pass would generate legal types. Index: lib/CodeGen/SelectionDAG/DAGCombiner.cpp =================================================================== --- lib/CodeGen/SelectionDAG/DAGCombiner.cpp (revision 124985) +++ lib/CodeGen/SelectionDAG/DAGCombiner.cpp (working copy) @@ -1533,7 +1533,7 @@ // fold (sub x, x) -> 0 if (N0 == N1) - return DAG.getConstant(0, N->getValueType(0)); + return DAG.getConstant(0, N->getValueType(0), LegalTypes); // fold (sub c1, c2) -> c1-c2 if (N0C && N1C) return DAG.FoldConstantArithmetic(ISD::SUB, VT, N0C, N1C); Cheers, Nadav --------------------------------------------------------------------- Intel Israel (74) Limited This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). Any review or distribution by others is strictly prohibited. If you are not the intended recipient, please contact the sender and delete all copies. -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110211/67917b5c/attachment.html From greened at obbligato.org Thu Feb 10 17:11:29 2011 From: greened at obbligato.org (David Greene) Date: Thu, 10 Feb 2011 23:11:29 -0000 Subject: [llvm-commits] [llvm] r125315 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Message-ID: <20110210231130.173F52A6C12C@llvm.org> Author: greened Date: Thu Feb 10 17:11:29 2011 New Revision: 125315 URL: http://llvm.org/viewvc/llvm-project?rev=125315&view=rev Log: [AVX] Implement 256-bit vector lowering for SCALAR_TO_VECTOR. This largely completes support for 128-bit fallback lowering for code that is not 256-bit ready. Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=125315&r1=125314&r2=125315&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Feb 10 17:11:29 2011 @@ -6116,7 +6116,25 @@ SDValue X86TargetLowering::LowerSCALAR_TO_VECTOR(SDValue Op, SelectionDAG &DAG) const { + LLVMContext *Context = DAG.getContext(); DebugLoc dl = Op.getDebugLoc(); + EVT OpVT = Op.getValueType(); + + // If this is a 256-bit vector result, first insert into a 128-bit + // vector and then insert into the 256-bit vector. + if (OpVT.getSizeInBits() > 128) { + // Insert into a 128-bit vector. + EVT VT128 = EVT::getVectorVT(*Context, + OpVT.getVectorElementType(), + OpVT.getVectorNumElements() / 2); + + Op = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT128, Op.getOperand(0)); + + // Insert the 128-bit vector. + return Insert128BitVector(DAG.getNode(ISD::UNDEF, dl, OpVT), Op, + DAG.getConstant(0, MVT::i32), + DAG, dl); + } if (Op.getValueType() == MVT::v1i64 && Op.getOperand(0).getValueType() == MVT::i64) From bruno.cardoso at gmail.com Thu Feb 10 17:37:20 2011 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Thu, 10 Feb 2011 23:37:20 -0000 Subject: [llvm-commits] [llvm] r125316 - /llvm/trunk/test/CodeGen/Mips/o32_cc.ll Message-ID: <20110210233720.96AAE2A6C12C@llvm.org> Author: bruno Date: Thu Feb 10 17:37:20 2011 New Revision: 125316 URL: http://llvm.org/viewvc/llvm-project?rev=125316&view=rev Log: Add mips o32 tests again with the hope that the buildbot won't complaint again Added: llvm/trunk/test/CodeGen/Mips/o32_cc.ll Added: llvm/trunk/test/CodeGen/Mips/o32_cc.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/o32_cc.ll?rev=125316&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Mips/o32_cc.ll (added) +++ llvm/trunk/test/CodeGen/Mips/o32_cc.ll Thu Feb 10 17:37:20 2011 @@ -0,0 +1,322 @@ +; RUN: llc -march=mips -mcpu=4ke < %s | FileCheck %s + +; $f12, $f14 +; CHECK: ldc1 $f12, %lo +; CHECK: ldc1 $f14, %lo +define void @testlowercall0() nounwind { +entry: + tail call void @f0(double 5.000000e+00, double 6.000000e+00) nounwind + ret void +} + +declare void @f0(double, double) + +; $f12, $f14 +; CHECK: lwc1 $f12, %lo +; CHECK: lwc1 $f14, %lo +define void @testlowercall1() nounwind { +entry: + tail call void @f1(float 8.000000e+00, float 9.000000e+00) nounwind + ret void +} + +declare void @f1(float, float) + +; $f12, $f14 +; CHECK: lwc1 $f12, %lo +; CHECK: ldc1 $f14, %lo +define void @testlowercall2() nounwind { +entry: + tail call void @f2(float 8.000000e+00, double 6.000000e+00) nounwind + ret void +} + +declare void @f2(float, double) + +; $f12, $f14 +; CHECK: ldc1 $f12, %lo +; CHECK: lwc1 $f14, %lo +define void @testlowercall3() nounwind { +entry: + tail call void @f3(double 5.000000e+00, float 9.000000e+00) nounwind + ret void +} + +declare void @f3(double, float) + +; $4, $5, $6, $7 +; CHECK: addiu $4, $zero, 12 +; CHECK: addiu $5, $zero, 13 +; CHECK: addiu $6, $zero, 14 +; CHECK: addiu $7, $zero, 15 +define void @testlowercall4() nounwind { +entry: + tail call void @f4(i32 12, i32 13, i32 14, i32 15) nounwind + ret void +} + +declare void @f4(i32, i32, i32, i32) + +; $f12, $6, stack +; CHECK: sw $2, 16($sp) +; CHECK: sw $zero, 20($sp) +; CHECK: ldc1 $f12, %lo +; CHECK: addiu $6, $zero, 23 +define void @testlowercall5() nounwind { +entry: + tail call void @f5(double 1.500000e+01, i32 23, double 1.700000e+01) nounwind + ret void +} + +declare void @f5(double, i32, double) + +; $f12, $6, $7 +; CHECK: ldc1 $f12, %lo +; CHECK: addiu $6, $zero, 33 +; CHECK: addiu $7, $zero, 24 +define void @testlowercall6() nounwind { +entry: + tail call void @f6(double 2.500000e+01, i32 33, i32 24) nounwind + ret void +} + +declare void @f6(double, i32, i32) + +; $f12, $5, $6 +; CHECK: lwc1 $f12, %lo +; CHECK: addiu $5, $zero, 43 +; CHECK: addiu $6, $zero, 34 +define void @testlowercall7() nounwind { +entry: + tail call void @f7(float 1.800000e+01, i32 43, i32 34) nounwind + ret void +} + +declare void @f7(float, i32, i32) + +; $4, $5, $6, stack +; CHECK: sw $2, 16($sp) +; CHECK: sw $zero, 20($sp) +; CHECK: addiu $4, $zero, 22 +; CHECK: addiu $5, $zero, 53 +; CHECK: addiu $6, $zero, 44 +define void @testlowercall8() nounwind { +entry: + tail call void @f8(i32 22, i32 53, i32 44, double 4.000000e+00) nounwind + ret void +} + +declare void @f8(i32, i32, i32, double) + +; $4, $5, $6, $7 +; CHECK: addiu $4, $zero, 32 +; CHECK: addiu $5, $zero, 63 +; CHECK: addiu $6, $zero, 54 +; CHECK: ori $7, $2, 0 +define void @testlowercall9() nounwind { +entry: + tail call void @f9(i32 32, i32 63, i32 54, float 1.100000e+01) nounwind + ret void +} + +declare void @f9(i32, i32, i32, float) + +; $4, $5, ($6, $7) +; CHECK: addiu $4, $zero, 42 +; CHECK: addiu $5, $zero, 73 +; CHECK: addiu $6, $zero, 0 +; CHECK: ori $7, $2, 0 +define void @testlowercall10() nounwind { +entry: + tail call void @f10(i32 42, i32 73, double 2.700000e+01) nounwind + ret void +} + +declare void @f10(i32, i32, double) + +; $4, ($6, $7) +; CHECK: addiu $4, $zero, 52 +; CHECK: addiu $6, $zero, 0 +; CHECK: ori $7, $2, 0 +define void @testlowercall11() nounwind { +entry: + tail call void @f11(i32 52, double 1.600000e+01) nounwind + ret void +} + +declare void @f11(i32, double) + +; $f12, $f14, $6, $7 +; CHECK: lwc1 $f12, %lo +; CHECK: lwc1 $f14, %lo +; CHECK: ori $6, $4, 0 +; CHECK: ori $7, $5, 0 +define void @testlowercall12() nounwind { +entry: + tail call void @f12(float 2.800000e+01, float 1.900000e+01, float 1.000000e+01, float 2.100000e+01) nounwind + ret void +} + +declare void @f12(float, float, float, float) + +; $f12, $5, $6, $7 +; CHECK: lwc1 $f12, %lo +; CHECK: addiu $5, $zero, 83 +; CHECK: ori $6, $3, 0 +; CHECK: addiu $7, $zero, 25 +define void @testlowercall13() nounwind { +entry: + tail call void @f13(float 3.800000e+01, i32 83, float 2.000000e+01, i32 25) nounwind + ret void +} + + +declare void @f13(float, i32, float, i32) + +; $f12, $f14, $7 +; CHECK: ldc1 $f12, %lo +; CHECK: lwc1 $f14, %lo +; CHECK: ori $7, $4, 0 +define void @testlowercall14() nounwind { +entry: + tail call void @f14(double 3.500000e+01, float 2.900000e+01, float 3.000000e+01) nounwind + ret void +} + +declare void @f14(double, float, float) + +; $f12, $f14, ($6, $7) +; CHECK: lwc1 $f12, %lo +; CHECK: lwc1 $f14, %lo +; CHECK: addiu $6, $zero, 0 +; CHECK: ori $7, $4, 32768 +define void @testlowercall15() nounwind { +entry: + tail call void @f15(float 4.800000e+01, float 3.900000e+01, double 3.700000e+01) nounwind + ret void +} + +declare void @f15(float, float, double) + +; $4, $5, $6, $7 +; CHECK: addiu $4, $zero, 62 +; CHECK: ori $5, $2, 0 +; CHECK: addiu $6, $zero, 64 +; CHECK: ori $7, $3, 0 +define void @testlowercall16() nounwind { +entry: + tail call void @f16(i32 62, float 4.900000e+01, i32 64, float 3.100000e+01) nounwind + ret void +} + +declare void @f16(i32, float, i32, float) + +; $4, $5, $6, $7 +; CHECK: addiu $4, $zero, 72 +; CHECK: ori $5, $2, 0 +; CHECK: addiu $6, $zero, 74 +; CHECK: addiu $7, $zero, 35 +define void @testlowercall17() nounwind { +entry: + tail call void @f17(i32 72, float 5.900000e+01, i32 74, i32 35) nounwind + ret void +} + +declare void @f17(i32, float, i32, i32) + +; $4, $5, $6, $7 +; CHECK: addiu $4, $zero, 82 +; CHECK: addiu $5, $zero, 93 +; CHECK: ori $6, $2, 0 +; CHECK: addiu $7, $zero, 45 +define void @testlowercall18() nounwind { +entry: + tail call void @f18(i32 82, i32 93, float 4.000000e+01, i32 45) nounwind + ret void +} + +declare void @f18(i32, i32, float, i32) + + +; $4, ($6, $7), stack +; CHECK: sw $2, 16($sp) +; CHECK: sw $zero, 20($sp) +; CHECK: addiu $4, $zero, 92 +; CHECK: addiu $6, $zero, 0 +; CHECK: ori $7, $3, 0 +define void @testlowercall20() nounwind { +entry: + tail call void @f20(i32 92, double 2.600000e+01, double 4.700000e+01) nounwind + ret void +} + +declare void @f20(i32, double, double) + +; $f12, $5 +; CHECK: lwc1 $f12, %lo +; CHECK: addiu $5, $zero, 103 +define void @testlowercall21() nounwind { +entry: + tail call void @f21(float 5.800000e+01, i32 103) nounwind + ret void +} + +declare void @f21(float, i32) + +; $f12, $5, ($6, $7) +; CHECK: lwc1 $f12, %lo +; CHECK: addiu $5, $zero, 113 +; CHECK: addiu $6, $zero, 0 +; CHECK: ori $7, $3, 32768 +define void @testlowercall22() nounwind { +entry: + tail call void @f22(float 6.800000e+01, i32 113, double 5.700000e+01) nounwind + ret void +} + +declare void @f22(float, i32, double) + +; $f12, f6 +; CHECK: ldc1 $f12, %lo +; CHECK: addiu $6, $zero, 123 +define void @testlowercall23() nounwind { +entry: + tail call void @f23(double 4.500000e+01, i32 123) nounwind + ret void +} + +declare void @f23(double, i32) + +; $f12,$6, stack +; CHECK: sw $2, 16($sp) +; CHECK: sw $zero, 20($sp) +; CHECK: ldc1 $f12, %lo +; CHECK: addiu $6, $zero, 133 +define void @testlowercall24() nounwind { +entry: + tail call void @f24(double 5.500000e+01, i32 133, double 6.700000e+01) nounwind + ret void +} + +declare void @f24(double, i32, double) + +; CHECK: lwc1 $f12, %lo +; lwc1 $f12, %lo +; CHECK: lwc1 $f14, %lo +; CHECK: ori $6, $4, 0 +; CHECK: ori $7, $5, 0 +; CHECK: lwc1 $f12, %lo +; CHECK: addiu $5, $zero, 83 +; CHECK: ori $6, $3, 0 +; CHECK: addiu $7, $zero, 25 +; CHECK: addiu $4, $zero, 82 +; CHECK: addiu $5, $zero, 93 +; CHECK: ori $6, $2, 0 +; CHECK: addiu $7, $zero, 45 +define void @testlowercall25() nounwind { +entry: + tail call void @f12(float 2.800000e+01, float 1.900000e+01, float 1.000000e+01, float 2.100000e+01) nounwind + tail call void @f13(float 3.800000e+01, i32 83, float 2.000000e+01, i32 25) nounwind + tail call void @f18(i32 82, i32 93, float 4.000000e+01, i32 45) nounwind + ret void +} From zwarich at apple.com Thu Feb 10 17:38:11 2011 From: zwarich at apple.com (Cameron Zwarich) Date: Thu, 10 Feb 2011 23:38:11 -0000 Subject: [llvm-commits] [llvm] r125317 - in /llvm/trunk: lib/Transforms/Utils/ test/Transforms/LCSSA/ test/Transforms/LICM/ test/Transforms/LoopSimplify/ test/Transforms/LoopUnroll/ Message-ID: <20110210233811.35C042A6C12C@llvm.org> Author: zwarich Date: Thu Feb 10 17:38:10 2011 New Revision: 125317 URL: http://llvm.org/viewvc/llvm-project?rev=125317&view=rev Log: Rename 'loopsimplify' to 'loop-simplify'. Modified: llvm/trunk/lib/Transforms/Utils/LoopSimplify.cpp llvm/trunk/test/Transforms/LCSSA/2006-06-03-IncorrectIDFPhis.ll llvm/trunk/test/Transforms/LICM/2003-02-27-NestedLoopExitBlocks.ll llvm/trunk/test/Transforms/LoopSimplify/2003-04-25-AssertFail.ll llvm/trunk/test/Transforms/LoopSimplify/2003-05-12-PreheaderExitOfChild.ll llvm/trunk/test/Transforms/LoopSimplify/2004-02-05-DominatorInfoCorruption.ll llvm/trunk/test/Transforms/LoopSimplify/2004-03-15-IncorrectDomUpdate.ll llvm/trunk/test/Transforms/LoopSimplify/2004-04-01-IncorrectDomUpdate.ll llvm/trunk/test/Transforms/LoopSimplify/2004-04-12-LoopSimplify-SwitchBackedges.ll llvm/trunk/test/Transforms/LoopSimplify/2004-04-13-LoopSimplifyUpdateDomFrontier.ll llvm/trunk/test/Transforms/LoopSimplify/2007-10-28-InvokeCrash.ll llvm/trunk/test/Transforms/LoopSimplify/2010-07-15-IncorrectDomFrontierUpdate.ll llvm/trunk/test/Transforms/LoopSimplify/2010-12-26-PHIInfiniteLoop.ll llvm/trunk/test/Transforms/LoopSimplify/basictest.ll llvm/trunk/test/Transforms/LoopSimplify/hardertest.ll llvm/trunk/test/Transforms/LoopSimplify/indirectbr-backedge.ll llvm/trunk/test/Transforms/LoopSimplify/indirectbr.ll llvm/trunk/test/Transforms/LoopSimplify/merge-exits.ll llvm/trunk/test/Transforms/LoopSimplify/phi-node-simplify.ll llvm/trunk/test/Transforms/LoopSimplify/unreachable-loop-pred.ll llvm/trunk/test/Transforms/LoopUnroll/2005-03-06-BadLoopInfoUpdate.ll Modified: llvm/trunk/lib/Transforms/Utils/LoopSimplify.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/LoopSimplify.cpp?rev=125317&r1=125316&r2=125317&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/LoopSimplify.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/LoopSimplify.cpp Thu Feb 10 17:38:10 2011 @@ -37,7 +37,7 @@ // //===----------------------------------------------------------------------===// -#define DEBUG_TYPE "loopsimplify" +#define DEBUG_TYPE "loop-simplify" #include "llvm/Transforms/Scalar.h" #include "llvm/Constants.h" #include "llvm/Instructions.h" @@ -108,11 +108,11 @@ } char LoopSimplify::ID = 0; -INITIALIZE_PASS_BEGIN(LoopSimplify, "loopsimplify", +INITIALIZE_PASS_BEGIN(LoopSimplify, "loop-simplify", "Canonicalize natural loops", true, false) INITIALIZE_PASS_DEPENDENCY(DominatorTree) INITIALIZE_PASS_DEPENDENCY(LoopInfo) -INITIALIZE_PASS_END(LoopSimplify, "loopsimplify", +INITIALIZE_PASS_END(LoopSimplify, "loop-simplify", "Canonicalize natural loops", true, false) // Publically exposed interface to pass... Modified: llvm/trunk/test/Transforms/LCSSA/2006-06-03-IncorrectIDFPhis.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LCSSA/2006-06-03-IncorrectIDFPhis.ll?rev=125317&r1=125316&r2=125317&view=diff ============================================================================== --- llvm/trunk/test/Transforms/LCSSA/2006-06-03-IncorrectIDFPhis.ll (original) +++ llvm/trunk/test/Transforms/LCSSA/2006-06-03-IncorrectIDFPhis.ll Thu Feb 10 17:38:10 2011 @@ -1,6 +1,6 @@ -; RUN: opt < %s -loopsimplify -lcssa -S | \ +; RUN: opt < %s -loop-simplify -lcssa -S | \ ; RUN: grep {%%SJE.0.0.lcssa = phi .struct.SetJmpMapEntry} -; RUN: opt < %s -loopsimplify -lcssa -S | \ +; RUN: opt < %s -loop-simplify -lcssa -S | \ ; RUN: grep {%%SJE.0.0.lcssa1 = phi .struct.SetJmpMapEntry} %struct.SetJmpMapEntry = type { i8*, i32, %struct.SetJmpMapEntry* } Modified: llvm/trunk/test/Transforms/LICM/2003-02-27-NestedLoopExitBlocks.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LICM/2003-02-27-NestedLoopExitBlocks.ll?rev=125317&r1=125316&r2=125317&view=diff ============================================================================== --- llvm/trunk/test/Transforms/LICM/2003-02-27-NestedLoopExitBlocks.ll (original) +++ llvm/trunk/test/Transforms/LICM/2003-02-27-NestedLoopExitBlocks.ll Thu Feb 10 17:38:10 2011 @@ -1,6 +1,6 @@ ; Exit blocks need to be updated for all nested loops... -; RUN: opt < %s -loopsimplify +; RUN: opt < %s -loop-simplify define i32 @yyparse() { bb0: Modified: llvm/trunk/test/Transforms/LoopSimplify/2003-04-25-AssertFail.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/2003-04-25-AssertFail.ll?rev=125317&r1=125316&r2=125317&view=diff ============================================================================== --- llvm/trunk/test/Transforms/LoopSimplify/2003-04-25-AssertFail.ll (original) +++ llvm/trunk/test/Transforms/LoopSimplify/2003-04-25-AssertFail.ll Thu Feb 10 17:38:10 2011 @@ -1,7 +1,7 @@ ; This testcase exposed a problem with the loop identification pass (LoopInfo). ; Basically, it was incorrectly calculating the loop nesting information. ; -; RUN: opt < %s -loopsimplify +; RUN: opt < %s -loop-simplify define i32 @yylex() { br label %loopentry.0 Modified: llvm/trunk/test/Transforms/LoopSimplify/2003-05-12-PreheaderExitOfChild.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/2003-05-12-PreheaderExitOfChild.ll?rev=125317&r1=125316&r2=125317&view=diff ============================================================================== --- llvm/trunk/test/Transforms/LoopSimplify/2003-05-12-PreheaderExitOfChild.ll (original) +++ llvm/trunk/test/Transforms/LoopSimplify/2003-05-12-PreheaderExitOfChild.ll Thu Feb 10 17:38:10 2011 @@ -2,7 +2,7 @@ ; inserted for the "fail" loop, but the exit block of a loop is not updated ; to be the preheader instead of the exit loop itself. -; RUN: opt < %s -loopsimplify +; RUN: opt < %s -loop-simplify define i32 @re_match_2() { br label %loopentry.1 loopentry.1: ; preds = %endif.82, %0 Modified: llvm/trunk/test/Transforms/LoopSimplify/2004-02-05-DominatorInfoCorruption.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/2004-02-05-DominatorInfoCorruption.ll?rev=125317&r1=125316&r2=125317&view=diff ============================================================================== --- llvm/trunk/test/Transforms/LoopSimplify/2004-02-05-DominatorInfoCorruption.ll (original) +++ llvm/trunk/test/Transforms/LoopSimplify/2004-02-05-DominatorInfoCorruption.ll Thu Feb 10 17:38:10 2011 @@ -1,4 +1,4 @@ -; RUN: opt < %s -loopsimplify -verify -licm -disable-output +; RUN: opt < %s -loop-simplify -verify -licm -disable-output define void @.subst_48() { entry: Modified: llvm/trunk/test/Transforms/LoopSimplify/2004-03-15-IncorrectDomUpdate.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/2004-03-15-IncorrectDomUpdate.ll?rev=125317&r1=125316&r2=125317&view=diff ============================================================================== --- llvm/trunk/test/Transforms/LoopSimplify/2004-03-15-IncorrectDomUpdate.ll (original) +++ llvm/trunk/test/Transforms/LoopSimplify/2004-03-15-IncorrectDomUpdate.ll Thu Feb 10 17:38:10 2011 @@ -1,4 +1,4 @@ -; RUN: opt < %s -loopsimplify -licm -disable-output +; RUN: opt < %s -loop-simplify -licm -disable-output define void @main() { entry: br i1 false, label %Out, label %loop Modified: llvm/trunk/test/Transforms/LoopSimplify/2004-04-01-IncorrectDomUpdate.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/2004-04-01-IncorrectDomUpdate.ll?rev=125317&r1=125316&r2=125317&view=diff ============================================================================== --- llvm/trunk/test/Transforms/LoopSimplify/2004-04-01-IncorrectDomUpdate.ll (original) +++ llvm/trunk/test/Transforms/LoopSimplify/2004-04-01-IncorrectDomUpdate.ll Thu Feb 10 17:38:10 2011 @@ -1,4 +1,4 @@ -; RUN: opt < %s -loopsimplify -licm -disable-output +; RUN: opt < %s -loop-simplify -licm -disable-output ; This is PR306 Modified: llvm/trunk/test/Transforms/LoopSimplify/2004-04-12-LoopSimplify-SwitchBackedges.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/2004-04-12-LoopSimplify-SwitchBackedges.ll?rev=125317&r1=125316&r2=125317&view=diff ============================================================================== --- llvm/trunk/test/Transforms/LoopSimplify/2004-04-12-LoopSimplify-SwitchBackedges.ll (original) +++ llvm/trunk/test/Transforms/LoopSimplify/2004-04-12-LoopSimplify-SwitchBackedges.ll Thu Feb 10 17:38:10 2011 @@ -1,4 +1,4 @@ -; RUN: opt < %s -loopsimplify -disable-output +; RUN: opt < %s -loop-simplify -disable-output define void @test() { loopentry.0: Modified: llvm/trunk/test/Transforms/LoopSimplify/2004-04-13-LoopSimplifyUpdateDomFrontier.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/2004-04-13-LoopSimplifyUpdateDomFrontier.ll?rev=125317&r1=125316&r2=125317&view=diff ============================================================================== --- llvm/trunk/test/Transforms/LoopSimplify/2004-04-13-LoopSimplifyUpdateDomFrontier.ll (original) +++ llvm/trunk/test/Transforms/LoopSimplify/2004-04-13-LoopSimplifyUpdateDomFrontier.ll Thu Feb 10 17:38:10 2011 @@ -1,4 +1,4 @@ -; RUN: opt < %s -scalarrepl -loopsimplify -licm -disable-output -verify-dom-info -verify-loop-info +; RUN: opt < %s -scalarrepl -loop-simplify -licm -disable-output -verify-dom-info -verify-loop-info define void @inflate() { entry: Modified: llvm/trunk/test/Transforms/LoopSimplify/2007-10-28-InvokeCrash.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/2007-10-28-InvokeCrash.ll?rev=125317&r1=125316&r2=125317&view=diff ============================================================================== --- llvm/trunk/test/Transforms/LoopSimplify/2007-10-28-InvokeCrash.ll (original) +++ llvm/trunk/test/Transforms/LoopSimplify/2007-10-28-InvokeCrash.ll Thu Feb 10 17:38:10 2011 @@ -1,4 +1,4 @@ -; RUN: opt < %s -loopsimplify -disable-output +; RUN: opt < %s -loop-simplify -disable-output ; PR1752 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-s0:0:64-f80:32:32" target triple = "i686-pc-mingw32" Modified: llvm/trunk/test/Transforms/LoopSimplify/2010-07-15-IncorrectDomFrontierUpdate.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/2010-07-15-IncorrectDomFrontierUpdate.ll?rev=125317&r1=125316&r2=125317&view=diff ============================================================================== --- llvm/trunk/test/Transforms/LoopSimplify/2010-07-15-IncorrectDomFrontierUpdate.ll (original) +++ llvm/trunk/test/Transforms/LoopSimplify/2010-07-15-IncorrectDomFrontierUpdate.ll Thu Feb 10 17:38:10 2011 @@ -1,4 +1,4 @@ -; RUN: opt < %s -domfrontier -loopsimplify -domfrontier -verify-dom-info -analyze +; RUN: opt < %s -domfrontier -loop-simplify -domfrontier -verify-dom-info -analyze define void @a() nounwind { Modified: llvm/trunk/test/Transforms/LoopSimplify/2010-12-26-PHIInfiniteLoop.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/2010-12-26-PHIInfiniteLoop.ll?rev=125317&r1=125316&r2=125317&view=diff ============================================================================== --- llvm/trunk/test/Transforms/LoopSimplify/2010-12-26-PHIInfiniteLoop.ll (original) +++ llvm/trunk/test/Transforms/LoopSimplify/2010-12-26-PHIInfiniteLoop.ll Thu Feb 10 17:38:10 2011 @@ -1,4 +1,4 @@ -; RUN: opt < %s -loopsimplify -S +; RUN: opt < %s -loop-simplify -S ; PR8702 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" target triple = "x86_64-unknown-freebsd9.0" Modified: llvm/trunk/test/Transforms/LoopSimplify/basictest.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/basictest.ll?rev=125317&r1=125316&r2=125317&view=diff ============================================================================== --- llvm/trunk/test/Transforms/LoopSimplify/basictest.ll (original) +++ llvm/trunk/test/Transforms/LoopSimplify/basictest.ll Thu Feb 10 17:38:10 2011 @@ -1,4 +1,4 @@ -; RUN: opt < %s -loopsimplify +; RUN: opt < %s -loop-simplify ; This function should get a preheader inserted before BB3, that is jumped ; to by BB1 & BB2 Modified: llvm/trunk/test/Transforms/LoopSimplify/hardertest.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/hardertest.ll?rev=125317&r1=125316&r2=125317&view=diff ============================================================================== --- llvm/trunk/test/Transforms/LoopSimplify/hardertest.ll (original) +++ llvm/trunk/test/Transforms/LoopSimplify/hardertest.ll Thu Feb 10 17:38:10 2011 @@ -1,4 +1,4 @@ -; RUN: opt < %s -loopsimplify +; RUN: opt < %s -loop-simplify define void @foo(i1 %C) { br i1 %C, label %T, label %F Modified: llvm/trunk/test/Transforms/LoopSimplify/indirectbr-backedge.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/indirectbr-backedge.ll?rev=125317&r1=125316&r2=125317&view=diff ============================================================================== --- llvm/trunk/test/Transforms/LoopSimplify/indirectbr-backedge.ll (original) +++ llvm/trunk/test/Transforms/LoopSimplify/indirectbr-backedge.ll Thu Feb 10 17:38:10 2011 @@ -1,4 +1,4 @@ -; RUN: opt -loopsimplify -S < %s | FileCheck %s +; RUN: opt -loop-simplify -S < %s | FileCheck %s ; LoopSimplify shouldn't split loop backedges that use indirectbr. Modified: llvm/trunk/test/Transforms/LoopSimplify/indirectbr.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/indirectbr.ll?rev=125317&r1=125316&r2=125317&view=diff ============================================================================== --- llvm/trunk/test/Transforms/LoopSimplify/indirectbr.ll (original) +++ llvm/trunk/test/Transforms/LoopSimplify/indirectbr.ll Thu Feb 10 17:38:10 2011 @@ -1,4 +1,4 @@ -; RUN: opt < %s -loopsimplify -lcssa -verify-loop-info -verify-dom-info -S \ +; RUN: opt < %s -loop-simplify -lcssa -verify-loop-info -verify-dom-info -S \ ; RUN: | grep -F {indirectbr i8* %x, \[label %L0, label %L1\]} \ ; RUN: | count 6 Modified: llvm/trunk/test/Transforms/LoopSimplify/merge-exits.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/merge-exits.ll?rev=125317&r1=125316&r2=125317&view=diff ============================================================================== --- llvm/trunk/test/Transforms/LoopSimplify/merge-exits.ll (original) +++ llvm/trunk/test/Transforms/LoopSimplify/merge-exits.ll Thu Feb 10 17:38:10 2011 @@ -1,4 +1,4 @@ -; RUN: opt < %s -loopsimplify -loop-rotate -instcombine -indvars -S -verify-loop-info -verify-dom-info > %t +; RUN: opt < %s -loop-simplify -loop-rotate -instcombine -indvars -S -verify-loop-info -verify-dom-info > %t ; RUN: not grep sext %t ; RUN: grep {phi i64} %t | count 1 Modified: llvm/trunk/test/Transforms/LoopSimplify/phi-node-simplify.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/phi-node-simplify.ll?rev=125317&r1=125316&r2=125317&view=diff ============================================================================== --- llvm/trunk/test/Transforms/LoopSimplify/phi-node-simplify.ll (original) +++ llvm/trunk/test/Transforms/LoopSimplify/phi-node-simplify.ll Thu Feb 10 17:38:10 2011 @@ -1,5 +1,5 @@ ; Loop Simplify should turn phi nodes like X = phi [X, Y] into just Y, eliminating them. -; RUN: opt < %s -loopsimplify -S | grep phi | count 6 +; RUN: opt < %s -loop-simplify -S | grep phi | count 6 @A = weak global [3000000 x i32] zeroinitializer ; <[3000000 x i32]*> [#uses=1] @B = weak global [20000 x i32] zeroinitializer ; <[20000 x i32]*> [#uses=1] Modified: llvm/trunk/test/Transforms/LoopSimplify/unreachable-loop-pred.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/unreachable-loop-pred.ll?rev=125317&r1=125316&r2=125317&view=diff ============================================================================== --- llvm/trunk/test/Transforms/LoopSimplify/unreachable-loop-pred.ll (original) +++ llvm/trunk/test/Transforms/LoopSimplify/unreachable-loop-pred.ll Thu Feb 10 17:38:10 2011 @@ -1,4 +1,4 @@ -; RUN: opt -S -loopsimplify -disable-output -verify-loop-info -verify-dom-info < %s +; RUN: opt -S -loop-simplify -disable-output -verify-loop-info -verify-dom-info < %s ; PR5235 ; When loopsimplify inserts a preheader for this loop, it should add the new Modified: llvm/trunk/test/Transforms/LoopUnroll/2005-03-06-BadLoopInfoUpdate.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopUnroll/2005-03-06-BadLoopInfoUpdate.ll?rev=125317&r1=125316&r2=125317&view=diff ============================================================================== --- llvm/trunk/test/Transforms/LoopUnroll/2005-03-06-BadLoopInfoUpdate.ll (original) +++ llvm/trunk/test/Transforms/LoopUnroll/2005-03-06-BadLoopInfoUpdate.ll Thu Feb 10 17:38:10 2011 @@ -1,4 +1,4 @@ -; RUN: opt < %s -loop-unroll -loopsimplify -disable-output +; RUN: opt < %s -loop-unroll -loop-simplify -disable-output define void @print_board() { entry: From zwarich at apple.com Thu Feb 10 17:53:14 2011 From: zwarich at apple.com (Cameron Zwarich) Date: Thu, 10 Feb 2011 23:53:14 -0000 Subject: [llvm-commits] [llvm] r125318 - /llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Message-ID: <20110210235314.309802A6C12C@llvm.org> Author: zwarich Date: Thu Feb 10 17:53:14 2011 New Revision: 125318 URL: http://llvm.org/viewvc/llvm-project?rev=125318&view=rev Log: If we can't avoid running loop-simplify twice for now, at least avoid running iv-users twice. Modified: llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Modified: llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp?rev=125318&r1=125317&r2=125318&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Thu Feb 10 17:53:14 2011 @@ -3824,6 +3824,9 @@ AU.addPreserved(); AU.addRequired(); AU.addPreserved(); + // Requiring LoopSimplify a second time here prevents IVUsers from running + // twice, since LoopSimplify was invalidated by running ScalarEvolution. + AU.addRequiredID(LoopSimplifyID); AU.addRequired(); AU.addPreserved(); } From nicholas at mxc.ca Thu Feb 10 17:54:10 2011 From: nicholas at mxc.ca (Nick Lewycky) Date: Thu, 10 Feb 2011 23:54:10 -0000 Subject: [llvm-commits] [llvm] r125319 - in /llvm/trunk: lib/Analysis/ValueTracking.cpp test/Transforms/JumpThreading/degenerate-phi.ll Message-ID: <20110210235410.768AF2A6C12C@llvm.org> Author: nicholas Date: Thu Feb 10 17:54:10 2011 New Revision: 125319 URL: http://llvm.org/viewvc/llvm-project?rev=125319&view=rev Log: Tolerate degenerate phi nodes that can occur in the middle of optimization passes. Fixes PR9112. Patch by Jakub Staszak! Added: llvm/trunk/test/Transforms/JumpThreading/degenerate-phi.ll Modified: llvm/trunk/lib/Analysis/ValueTracking.cpp Modified: llvm/trunk/lib/Analysis/ValueTracking.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ValueTracking.cpp?rev=125319&r1=125318&r2=125319&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ValueTracking.cpp (original) +++ llvm/trunk/lib/Analysis/ValueTracking.cpp Thu Feb 10 17:54:10 2011 @@ -590,6 +590,10 @@ } } + // Unreachable blocks may have zero-operand PHI nodes. + if (P->getNumIncomingValues() == 0) + return; + // Otherwise take the unions of the known bit sets of the operands, // taking conservative care to avoid excessive recursion. if (Depth < MaxDepth - 1 && !KnownZero && !KnownOne) { Added: llvm/trunk/test/Transforms/JumpThreading/degenerate-phi.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/JumpThreading/degenerate-phi.ll?rev=125319&view=auto ============================================================================== --- llvm/trunk/test/Transforms/JumpThreading/degenerate-phi.ll (added) +++ llvm/trunk/test/Transforms/JumpThreading/degenerate-phi.ll Thu Feb 10 17:54:10 2011 @@ -0,0 +1,24 @@ +; RUN: opt -jump-threading -disable-output %s +; PR9112 + +; This is actually a test for value tracking. Jump threading produces +; "%phi = phi i16" when it removes all edges leading to %unreachable. +; The .ll parser won't let us write that directly since it's invalid code. + +define void @func() nounwind { +entry: + br label %bb + +bb: + br label %bb + +unreachable: + %phi = phi i16 [ %add, %unreachable ], [ 0, %next ] + %add = add i16 0, %phi + %cmp = icmp slt i16 %phi, 0 + br i1 %cmp, label %unreachable, label %next + +next: + br label %unreachable +} + From zwarich at apple.com Thu Feb 10 18:49:28 2011 From: zwarich at apple.com (Cameron Zwarich) Date: Fri, 11 Feb 2011 00:49:28 -0000 Subject: [llvm-commits] [llvm] r125325 - /llvm/trunk/test/Transforms/LoopStrengthReduce/hoist-parent-preheader.ll Message-ID: <20110211004928.1BEB82A6C12C@llvm.org> Author: zwarich Date: Thu Feb 10 18:49:27 2011 New Revision: 125325 URL: http://llvm.org/viewvc/llvm-project?rev=125325&view=rev Log: Add a test for the LSR issue exposed by r125254. Added: llvm/trunk/test/Transforms/LoopStrengthReduce/hoist-parent-preheader.ll Added: llvm/trunk/test/Transforms/LoopStrengthReduce/hoist-parent-preheader.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/hoist-parent-preheader.ll?rev=125325&view=auto ============================================================================== --- llvm/trunk/test/Transforms/LoopStrengthReduce/hoist-parent-preheader.ll (added) +++ llvm/trunk/test/Transforms/LoopStrengthReduce/hoist-parent-preheader.ll Thu Feb 10 18:49:27 2011 @@ -0,0 +1,32 @@ +; RUN: opt < %s -loop-reduce -verify +target triple = "x86_64-apple-darwin10" + +define void @myquicksort(i8* %a) nounwind ssp { +entry: + br i1 undef, label %loop1, label %return + +loop1: ; preds = %bb13.loopexit, %entry + %indvar419 = phi i64 [ %indvar.next420, %loop2.exit ], [ 0, %entry ] + %tmp474 = shl i64 %indvar419, 2 + %tmp484 = add i64 %tmp474, 4 + br label %loop2 + +loop2: ; preds = %loop1, %loop2.backedge + %indvar414 = phi i64 [ %indvar.next415, %loop2.backedge ], [ 0, %loop1 ] + %tmp473 = mul i64 %indvar414, -4 + %tmp485 = add i64 %tmp484, %tmp473 + %storemerge4 = getelementptr i8* %a, i64 %tmp485 + %0 = icmp ugt i8* %storemerge4, %a + br i1 false, label %loop2.exit, label %loop2.backedge + +loop2.backedge: ; preds = %loop2 + %indvar.next415 = add i64 %indvar414, 1 + br label %loop2 + +loop2.exit: ; preds = %loop2 + %indvar.next420 = add i64 %indvar419, 1 + br i1 undef, label %loop1, label %return + +return: ; preds = %loop2.exit, %entry + ret void +} From grosbach at apple.com Thu Feb 10 19:21:00 2011 From: grosbach at apple.com (Jim Grosbach) Date: Fri, 11 Feb 2011 01:21:00 -0000 Subject: [llvm-commits] [llvm] r125327 - in /llvm/trunk/include/llvm/MC/MCParser: MCAsmLexer.h MCAsmParser.h MCParsedAsmOperand.h Message-ID: <20110211012100.9128B2A6C12C@llvm.org> Author: grosbach Date: Thu Feb 10 19:21:00 2011 New Revision: 125327 URL: http://llvm.org/viewvc/llvm-project?rev=125327&view=rev Log: Remove trailing whitespace. Modified: llvm/trunk/include/llvm/MC/MCParser/MCAsmLexer.h llvm/trunk/include/llvm/MC/MCParser/MCAsmParser.h llvm/trunk/include/llvm/MC/MCParser/MCParsedAsmOperand.h Modified: llvm/trunk/include/llvm/MC/MCParser/MCAsmLexer.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCParser/MCAsmLexer.h?rev=125327&r1=125326&r2=125327&view=diff ============================================================================== --- llvm/trunk/include/llvm/MC/MCParser/MCAsmLexer.h (original) +++ llvm/trunk/include/llvm/MC/MCParser/MCAsmLexer.h Thu Feb 10 19:21:00 2011 @@ -29,16 +29,16 @@ // String values. Identifier, String, - + // Integer values. Integer, - + // Real values. Real, - + // Register values (stored in IntVal). Only used by TargetAsmLexer. Register, - + // No-value. EndOfStatement, Colon, @@ -46,8 +46,8 @@ Slash, // '/' LParen, RParen, LBrac, RBrac, LCurly, RCurly, Star, Dot, Comma, Dollar, Equal, EqualEqual, - - Pipe, PipePipe, Caret, + + Pipe, PipePipe, Caret, Amp, AmpAmp, Exclaim, ExclaimEqual, Percent, Hash, Less, LessEqual, LessLess, LessGreater, Greater, GreaterEqual, GreaterGreater, At @@ -73,7 +73,7 @@ SMLoc getLoc() const; /// getStringContents - Get the contents of a string token (without quotes). - StringRef getStringContents() const { + StringRef getStringContents() const { assert(Kind == String && "This token isn't a string!"); return Str.slice(1, Str.size() - 1); } @@ -98,11 +98,11 @@ // FIXME: Don't compute this in advance, it makes every token larger, and is // also not generally what we want (it is nicer for recovery etc. to lex 123br // as a single token, then diagnose as an invalid number). - int64_t getIntVal() const { + int64_t getIntVal() const { assert(Kind == Integer && "This token isn't an integer!"); - return IntVal; + return IntVal; } - + /// getRegVal - Get the register number for the current token, which should /// be a register. unsigned getRegVal() const { @@ -116,7 +116,7 @@ class MCAsmLexer { /// The current token, stored in the base class for faster access. AsmToken CurTok; - + /// The location and description of the current error SMLoc ErrLoc; std::string Err; @@ -129,12 +129,12 @@ MCAsmLexer(); virtual AsmToken LexToken() = 0; - + void SetError(const SMLoc &errLoc, const std::string &err) { ErrLoc = errLoc; Err = err; } - + public: virtual ~MCAsmLexer(); @@ -155,12 +155,12 @@ const AsmToken &getTok() { return CurTok; } - + /// getErrLoc - Get the current error location const SMLoc &getErrLoc() { return ErrLoc; } - + /// getErr - Get the current error string const std::string &getErr() { return Err; Modified: llvm/trunk/include/llvm/MC/MCParser/MCAsmParser.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCParser/MCAsmParser.h?rev=125327&r1=125326&r2=125327&view=diff ============================================================================== --- llvm/trunk/include/llvm/MC/MCParser/MCAsmParser.h (original) +++ llvm/trunk/include/llvm/MC/MCParser/MCAsmParser.h Thu Feb 10 19:21:00 2011 @@ -102,7 +102,7 @@ /// EatToEndOfStatement - Skip to the end of the current statement, for error /// recovery. virtual void EatToEndOfStatement() = 0; - + /// ParseExpression - Parse an arbitrary expression. /// /// @param Res - The value of the expression. The result is undefined Modified: llvm/trunk/include/llvm/MC/MCParser/MCParsedAsmOperand.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCParser/MCParsedAsmOperand.h?rev=125327&r1=125326&r2=125327&view=diff ============================================================================== --- llvm/trunk/include/llvm/MC/MCParser/MCParsedAsmOperand.h (original) +++ llvm/trunk/include/llvm/MC/MCParser/MCParsedAsmOperand.h Thu Feb 10 19:21:00 2011 @@ -19,10 +19,10 @@ /// base class is used by target-independent clients and is the interface /// between parsing an asm instruction and recognizing it. class MCParsedAsmOperand { -public: +public: MCParsedAsmOperand() {} virtual ~MCParsedAsmOperand() {} - + /// getStartLoc - Get the location of the first token of this operand. virtual SMLoc getStartLoc() const = 0; /// getEndLoc - Get the location of the last token of this operand. From evan.cheng at apple.com Thu Feb 10 20:28:55 2011 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 11 Feb 2011 02:28:55 -0000 Subject: [llvm-commits] [llvm] r125357 - in /llvm/trunk: lib/Target/ARM/ARMISelLowering.cpp test/CodeGen/ARM/fcopysign.ll Message-ID: <20110211022855.E909E2A6C12C@llvm.org> Author: evancheng Date: Thu Feb 10 20:28:55 2011 New Revision: 125357 URL: http://llvm.org/viewvc/llvm-project?rev=125357&view=rev Log: Fix buggy fcopysign lowering. This define float @foo(float %x, float %y) nounwind readnone { entry: %0 = tail call float @copysignf(float %x, float %y) nounwind readnone ret float %0 } Was compiled to: vmov s0, r1 bic r0, r0, #-2147483648 vmov s1, r0 vcmpe.f32 s0, #0 vmrs apsr_nzcv, fpscr it lt vneglt.f32 s1, s1 vmov r0, s1 bx lr This fails to copy the sign of -0.0f because it's lost during the float to int conversion. Also, it's sub-optimal when the inputs are in GPR registers. Now it uses integer and + or operations when it's profitable. And it's correct! lsrs r1, r1, #31 bfi r0, r1, #31, #1 bx lr rdar://8984306 Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp llvm/trunk/test/CodeGen/ARM/fcopysign.ll Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=125357&r1=125356&r2=125357&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Thu Feb 10 20:28:55 2011 @@ -2833,12 +2833,46 @@ DebugLoc dl = Op.getDebugLoc(); EVT VT = Op.getValueType(); EVT SrcVT = Tmp1.getValueType(); - SDValue AbsVal = DAG.getNode(ISD::FABS, dl, VT, Tmp0); - SDValue ARMcc = DAG.getConstant(ARMCC::LT, MVT::i32); - SDValue FP0 = DAG.getConstantFP(0.0, SrcVT); - SDValue Cmp = getVFPCmp(Tmp1, FP0, DAG, dl); + bool F2IisFast = Subtarget->isCortexA9() || + Tmp0.getOpcode() == ISD::BITCAST || Tmp0.getOpcode() == ARMISD::VMOVDRR; + + // Bitcast operand 1 to i32. + if (SrcVT == MVT::f64) + Tmp1 = DAG.getNode(ARMISD::VMOVRRD, dl, DAG.getVTList(MVT::i32, MVT::i32), + &Tmp1, 1).getValue(1); + Tmp1 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, Tmp1); + + // If float to int conversion isn't going to be super expensive, then simply + // or in the signbit. + if (F2IisFast) { + SDValue Mask1 = DAG.getConstant(0x80000000, MVT::i32); + SDValue Mask2 = DAG.getConstant(0x7fffffff, MVT::i32); + Tmp1 = DAG.getNode(ISD::AND, dl, MVT::i32, Tmp1, Mask1); + if (VT == MVT::f32) { + Tmp0 = DAG.getNode(ISD::AND, dl, MVT::i32, + DAG.getNode(ISD::BITCAST, dl, MVT::i32, Tmp0), Mask2); + return DAG.getNode(ISD::BITCAST, dl, MVT::f32, + DAG.getNode(ISD::OR, dl, MVT::i32, Tmp0, Tmp1)); + } + + // f64: Or the high part with signbit and then combine two parts. + Tmp0 = DAG.getNode(ARMISD::VMOVRRD, dl, DAG.getVTList(MVT::i32, MVT::i32), + &Tmp0, 1); + SDValue Lo = Tmp0.getValue(0); + SDValue Hi = DAG.getNode(ISD::AND, dl, MVT::i32, Tmp0.getValue(1), Mask2); + Hi = DAG.getNode(ISD::OR, dl, MVT::i32, Hi, Tmp1); + return DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi); + } + + // Remove the signbit of operand 0. + Tmp0 = DAG.getNode(ISD::FABS, dl, VT, Tmp0); + + // If operand 1 signbit is one, then negate operand 0. + SDValue ARMcc; + SDValue Cmp = getARMCmp(Tmp1, DAG.getConstant(0, MVT::i32), + ISD::SETLT, ARMcc, DAG, dl); SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); - return DAG.getNode(ARMISD::CNEG, dl, VT, AbsVal, AbsVal, ARMcc, CCR, Cmp); + return DAG.getNode(ARMISD::CNEG, dl, VT, Tmp0, Tmp0, ARMcc, CCR, Cmp); } SDValue ARMTargetLowering::LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const{ Modified: llvm/trunk/test/CodeGen/ARM/fcopysign.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fcopysign.ll?rev=125357&r1=125356&r2=125357&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/fcopysign.ll (original) +++ llvm/trunk/test/CodeGen/ARM/fcopysign.ll Thu Feb 10 20:28:55 2011 @@ -1,18 +1,45 @@ -; RUN: llc < %s -march=arm | grep bic | count 2 -; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 | \ -; RUN: grep vneg | count 2 - -define float @test1(float %x, double %y) { - %tmp = fpext float %x to double - %tmp2 = tail call double @copysign( double %tmp, double %y ) - %tmp3 = fptrunc double %tmp2 to float - ret float %tmp3 +; RUN: llc < %s -mtriple=armv7-apple-darwin -mcpu=cortex-a8 | FileCheck %s -check-prefix=SOFT +; RUN: llc < %s -mtriple=armv7-gnueabi -float-abi=hard -mcpu=cortex-a8 | FileCheck %s -check-prefix=HARD + +; rdar://8984306 +define float @test1(float %x, float %y) nounwind { +entry: +; SOFT: test1: +; SOFT: lsr r1, r1, #31 +; SOFT: bfi r0, r1, #31, #1 + +; HARD: test1: +; HARD: vabs.f32 d0, d0 +; HARD: cmp r0, #0 +; HARD: vneglt.f32 s0, s0 + %0 = tail call float @copysignf(float %x, float %y) nounwind + ret float %0 +} + +define double @test2(double %x, double %y) nounwind { +entry: +; SOFT: test2: +; SOFT: lsr r2, r3, #31 +; SOFT: bfi r1, r2, #31, #1 + +; HARD: test2: +; HARD: vabs.f64 d0, d0 +; HARD: cmp r1, #0 +; HARD: vneglt.f64 d0, d0 + %0 = tail call double @copysign(double %x, double %y) nounwind + ret double %0 } -define double @test2(double %x, float %y) { - %tmp = fpext float %y to double - %tmp2 = tail call double @copysign( double %x, double %tmp ) - ret double %tmp2 +define double @test3(double %x, double %y, double %z) nounwind { +entry: +; SOFT: test3: +; SOFT: vabs.f64 +; SOFT: cmp {{.*}}, #0 +; SOFT: vneglt.f64 + %0 = fmul double %x, %y + %1 = tail call double @copysign(double %0, double %z) nounwind + ret double %1 } -declare double @copysign(double, double) +declare double @copysign(double, double) nounwind +declare float @copysignf(float, float) nounwind From aggarwa4 at illinois.edu Thu Feb 10 20:37:48 2011 From: aggarwa4 at illinois.edu (Arushi Aggarwal) Date: Fri, 11 Feb 2011 02:37:48 -0000 Subject: [llvm-commits] [poolalloc] r125358 - /poolalloc/trunk/lib/DSA/StdLibPass.cpp Message-ID: <20110211023748.36E3B2A6C12C@llvm.org> Author: aggarwa4 Date: Thu Feb 10 20:37:48 2011 New Revision: 125358 URL: http://llvm.org/viewvc/llvm-project?rev=125358&view=rev Log: Add a few more functions. Also, since some functions, like memcopy, copy over the contents from src to dest, those 2 nodes, need to be merged to maintain the outgoing pointers. Modified: poolalloc/trunk/lib/DSA/StdLibPass.cpp Modified: poolalloc/trunk/lib/DSA/StdLibPass.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/StdLibPass.cpp?rev=125358&r1=125357&r2=125358&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/StdLibPass.cpp (original) +++ poolalloc/trunk/lib/DSA/StdLibPass.cpp Thu Feb 10 20:37:48 2011 @@ -93,8 +93,10 @@ {"scanf", {NRET_YARGS, YRET_NYARGS, NRET_NARGS, NRET_NARGS, false}}, {"fscanf", {NRET_YARGS, YRET_NYARGS, NRET_NARGS, NRET_NARGS, false}}, {"fprintf", {NRET_YARGS, NRET_YNARGS, NRET_NARGS, NRET_NARGS, false}}, + {"fprintf", {NRET_YARGS, NRET_YNARGS, NRET_NARGS, NRET_NYARGS, false}}, {"sprintf", {NRET_YARGS, NRET_YNARGS, NRET_NARGS, NRET_NARGS, false}}, {"snprintf", {NRET_YARGS, NRET_YNARGS, NRET_NARGS, NRET_NARGS, false}}, + {"vsnprintf", {NRET_YARGS, YRET_YNARGS, NRET_NARGS, YRET_YARGS, false}}, {"puts", {NRET_YARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, {"gets", {NRET_NARGS, YRET_YARGS, NRET_NARGS, YRET_YNARGS, false}}, {"fgets", {NRET_NYARGS, YRET_YNARGS, NRET_NARGS, YRET_YNARGS, false}}, @@ -115,14 +117,16 @@ {"posix_memalign", {NRET_YARGS, YRET_YNARGS, NRET_NARGS, NRET_NARGS, false}}, {"free", {NRET_NARGS, NRET_NARGS, NRET_YNARGS, NRET_NARGS, false}}, - {"strdup", {NRET_YARGS, YRET_NARGS, YRET_NARGS, NRET_NARGS, false}}, - {"wcsdup", {NRET_YARGS, YRET_NARGS, YRET_NARGS, NRET_NARGS, false}}, + {"strdup", {NRET_YARGS, YRET_NARGS, YRET_NARGS, YRET_YARGS, false}}, + {"__strdup", {NRET_YARGS, YRET_NARGS, YRET_NARGS, YRET_YARGS, false}}, + {"wcsdup", {NRET_YARGS, YRET_NARGS, YRET_NARGS, YRET_YARGS, false}}, {"atoi", {NRET_YARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, {"atof", {NRET_YARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, {"atol", {NRET_YARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, {"atoll", {NRET_YARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, {"atoq", {NRET_YARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, + {"memcmp", {NRET_YARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, {"strcmp", {NRET_YARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, @@ -144,31 +148,32 @@ {"strrchr", {YRET_YARGS, NRET_NARGS, NRET_NARGS, YRET_YNARGS, true}}, {"wcsrchr", {YRET_YARGS, NRET_NARGS, NRET_NARGS, YRET_YNARGS, true}}, {"strchrhul", {YRET_YARGS, NRET_NARGS, NRET_NARGS, YRET_YNARGS, true}}, - {"strcat", {YRET_YARGS, YRET_YARGS, NRET_NARGS, YRET_YNARGS, true}}, - {"strncat", {YRET_YARGS, YRET_YARGS, NRET_NARGS, YRET_YNARGS, true}}, + {"strcat", {YRET_YARGS, YRET_YARGS, NRET_NARGS, YRET_YARGS, true}}, + {"strncat", {YRET_YARGS, YRET_YARGS, NRET_NARGS, YRET_YARGS, true}}, - {"strcpy", {NRET_YARGS, YRET_YARGS, NRET_NARGS, YRET_YNARGS, true}}, + {"strcpy", {NRET_YARGS, YRET_YARGS, NRET_NARGS, YRET_YARGS, true}}, {"strstr", {NRET_YARGS, YRET_NARGS, NRET_NARGS, YRET_YNARGS, true}}, {"strspn", {NRET_YARGS, YRET_NARGS, NRET_NARGS, NRET_NARGS, true}}, {"strtok", {NRET_YARGS, YRET_YARGS, NRET_NARGS, YRET_YNARGS, true}}, - {"strncpy", {YRET_YARGS, YRET_YARGS, NRET_NARGS, YRET_YNARGS, true}}, - {"memccpy", {YRET_YARGS, YRET_YARGS, NRET_NARGS, YRET_YNARGS, true}}, - {"memcpy", {YRET_YARGS, YRET_YARGS, NRET_NARGS, YRET_YNARGS, true}}, - {"memmove", {YRET_YARGS, YRET_YARGS, NRET_NARGS, YRET_YNARGS, true}}, - {"wmemccpy", {YRET_YARGS, YRET_YARGS, NRET_NARGS, YRET_YNARGS, true}}, - {"wcscpy", {YRET_YARGS, YRET_YARGS, NRET_NARGS, YRET_YNARGS, true}}, - {"wcsncpy", {YRET_YARGS, YRET_YARGS, NRET_NARGS, YRET_YNARGS, true}}, - - {"fwrite", {NRET_YARGS, NRET_NYARGS, NRET_NARGS, NRET_NARGS, false}}, - {"write", {NRET_YARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, - {"fread", {NRET_NYARGS, NRET_YARGS, NRET_NARGS, NRET_NARGS, false}}, + {"strncpy", {YRET_YARGS, YRET_YARGS, NRET_NARGS, YRET_YARGS, true}}, + {"memccpy", {YRET_YARGS, YRET_YARGS, NRET_NARGS, YRET_YARGS, true}}, + {"memcpy", {YRET_YARGS, YRET_YARGS, NRET_NARGS, YRET_YARGS, true}}, + {"memmove", {YRET_YARGS, YRET_YARGS, NRET_NARGS, YRET_YARGS, true}}, + {"bcopy", {NRET_YARGS, NRET_YARGS, NRET_NARGS, NRET_YARGS, true}}, + {"wmemccpy", {YRET_YARGS, YRET_YARGS, NRET_NARGS, YRET_YARGS, true}}, + {"wcscpy", {YRET_YARGS, YRET_YARGS, NRET_NARGS, YRET_YARGS, true}}, + {"wcsncpy", {YRET_YARGS, YRET_YARGS, NRET_NARGS, YRET_YARGS, true}}, + + {"fwrite", {NRET_YARGS, NRET_NYARGS, NRET_NARGS, NRET_NARGS, false}}, + {"write", {NRET_YARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, + {"fread", {NRET_NYARGS, NRET_YARGS, NRET_NARGS, NRET_NARGS, false}}, {"fseek", {NRET_YARGS, YRET_YNARGS, NRET_NARGS, NRET_NARGS, false}}, - {"fflush", {NRET_YARGS, NRET_YARGS, NRET_NARGS, NRET_NARGS, false}}, - {"fclose", {NRET_YARGS, NRET_YARGS, NRET_NARGS, NRET_NARGS, false}}, - {"fopen", {NRET_YARGS, YRET_NARGS, YRET_NARGS, NRET_NARGS, false}}, - {"open", {NRET_YARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, - {"fileno", {NRET_YARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, - {"unlink", {NRET_YARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, + {"fflush", {NRET_YARGS, NRET_YARGS, NRET_NARGS, NRET_NARGS, false}}, + {"fclose", {NRET_YARGS, NRET_YARGS, NRET_NARGS, NRET_NARGS, false}}, + {"fopen", {NRET_YARGS, YRET_NARGS, YRET_NARGS, NRET_NARGS, false}}, + {"open", {NRET_YARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, + {"fileno", {NRET_YARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, + {"unlink", {NRET_YARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, {"perror", {NRET_YARGS, NRET_NARGS, NRET_NARGS, NRET_NARGS, false}}, @@ -203,7 +208,6 @@ {"pipe", {false, false, false, false, true, false, false, false, false}}, {"wait", {false, false, false, false, true, false, false, false, false}}, {"getrusage", {false, false, false, false, true, false, false, false, false}}, - {"bcopy", {false, false, false, true, true, false, true, false, true}}, {"getcwd", { true, true, true, true, true, true, false, true, true}}, #endif From daniel at zuster.org Thu Feb 10 20:47:12 2011 From: daniel at zuster.org (Daniel Dunbar) Date: Fri, 11 Feb 2011 02:47:12 -0000 Subject: [llvm-commits] [zorg] r125359 - /zorg/trunk/zorg/buildbot/util/InformativeMailNotifier.py Message-ID: <20110211024712.BCFE32A6C12C@llvm.org> Author: ddunbar Date: Thu Feb 10 20:47:12 2011 New Revision: 125359 URL: http://llvm.org/viewvc/llvm-project?rev=125359&view=rev Log: buildbot: Adapt InformativeMailNotifier to work with 0.8.3. Modified: zorg/trunk/zorg/buildbot/util/InformativeMailNotifier.py Modified: zorg/trunk/zorg/buildbot/util/InformativeMailNotifier.py URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/zorg/buildbot/util/InformativeMailNotifier.py?rev=125359&r1=125358&r2=125359&view=diff ============================================================================== --- zorg/trunk/zorg/buildbot/util/InformativeMailNotifier.py (original) +++ zorg/trunk/zorg/buildbot/util/InformativeMailNotifier.py Thu Feb 10 20:47:12 2011 @@ -23,6 +23,10 @@ self.num_lines = num_lines self.only_failure_logs = only_failure_logs + # Adapt to work with 0.8.3... + if not hasattr(self, 'defaultMessage'): + self.defaultMessage = mail.defaultMessage + def informative_formatter(self, mode, name, build, results, status): # Get the standard message. data = self.defaultMessage(mode, name, build, results, status)['body'] From daniel at zuster.org Thu Feb 10 20:59:09 2011 From: daniel at zuster.org (Daniel Dunbar) Date: Fri, 11 Feb 2011 02:59:09 -0000 Subject: [llvm-commits] [llvm] r125361 - /llvm/trunk/test/CodeGen/Mips/o32_cc.ll Message-ID: <20110211025909.1C6AE2A6C12C@llvm.org> Author: ddunbar Date: Thu Feb 10 20:59:08 2011 New Revision: 125361 URL: http://llvm.org/viewvc/llvm-project?rev=125361&view=rev Log: Disable this test for now... Modified: llvm/trunk/test/CodeGen/Mips/o32_cc.ll Modified: llvm/trunk/test/CodeGen/Mips/o32_cc.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/o32_cc.ll?rev=125361&r1=125360&r2=125361&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Mips/o32_cc.ll (original) +++ llvm/trunk/test/CodeGen/Mips/o32_cc.ll Thu Feb 10 20:59:08 2011 @@ -1,5 +1,8 @@ ; RUN: llc -march=mips -mcpu=4ke < %s | FileCheck %s +; FIXME: Disabled because it unpredictably fails on certain platforms. +; REQUIRES: disabled + ; $f12, $f14 ; CHECK: ldc1 $f12, %lo ; CHECK: ldc1 $f14, %lo From ben at meyerhome.net Thu Feb 10 09:05:56 2011 From: ben at meyerhome.net (Benjamin Meyer) Date: Thu, 10 Feb 2011 10:05:56 -0500 Subject: [llvm-commits] [PATCH] A small tweak to the documentation Message-ID: <2ECA47BD-B5A4-4721-96A5-A156910BFBB3@meyerhome.net> I have been working my way through the tutorial and have a small patch that fixes up a sentence for review. -------------- next part -------------- A non-text attachment was scrubbed... Name: 0001-A-small-tweak-to-the-documentation-about-the-module-.patch Type: application/octet-stream Size: 1114 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110210/ce9413c7/attachment.obj -------------- next part -------------- -Benjamin Meyer From kubastaszak at gmail.com Thu Feb 10 09:07:19 2011 From: kubastaszak at gmail.com (Jakub Staszak) Date: Thu, 10 Feb 2011 16:07:19 +0100 Subject: [llvm-commits] pr9112 Message-ID: Hello, This simple patch fixes PR9112: Index: lib/Analysis/ValueTracking.cpp =================================================================== --- lib/Analysis/ValueTracking.cpp (revision 125281) +++ lib/Analysis/ValueTracking.cpp (working copy) @@ -593,6 +593,8 @@ // Otherwise take the unions of the known bit sets of the operands, // taking conservative care to avoid excessive recursion. if (Depth < MaxDepth - 1 && !KnownZero && !KnownOne) { + if (!P->getNumIncomingValues()) + return; KnownZero = APInt::getAllOnesValue(BitWidth); KnownOne = APInt::getAllOnesValue(BitWidth); for (unsigned i = 0, e = P->getNumIncomingValues(); i != e; ++i) { -- Jakub Staszak From kubastaszak at gmail.com Thu Feb 10 12:24:59 2011 From: kubastaszak at gmail.com (Jakub Staszak) Date: Thu, 10 Feb 2011 19:24:59 +0100 Subject: [llvm-commits] pr9112 Message-ID: Hello, This simple patch fixes PR9112: Index: lib/Analysis/ValueTracking.cpp =================================================================== --- lib/Analysis/ValueTracking.cpp (revision 125281) +++ lib/Analysis/ValueTracking.cpp (working copy) @@ -593,6 +593,8 @@ // Otherwise take the unions of the known bit sets of the operands, // taking conservative care to avoid excessive recursion. if (Depth < MaxDepth - 1 && !KnownZero && !KnownOne) { + if (!P->getNumIncomingValues()) + return; KnownZero = APInt::getAllOnesValue(BitWidth); KnownOne = APInt::getAllOnesValue(BitWidth); for (unsigned i = 0, e = P->getNumIncomingValues(); i != e; ++i) { -- Jakub Staszak From jaykang10 at imrc.kist.re.kr Thu Feb 10 18:56:29 2011 From: jaykang10 at imrc.kist.re.kr (Jin Gu Kang) Date: Fri, 11 Feb 2011 09:56:29 +0900 Subject: [llvm-commits] ConstantExpr::replaceUsesOfWithOnConstant() function for GetElementPtrConstantExpr Message-ID: <3E94D039A2B82544B3E7D48F924B0B25DFA3D87FE3@base.imrc.kist.re.kr> Hi llvm-commits members when making replacement for GetElementPtr, I think inbounds factor is missed so, I made a patch to consider inbounds factor as follows: Index: lib/VMCore/Constants.cpp =================================================================== --- lib/VMCore/Constants.cpp (revision 125324) +++ lib/VMCore/Constants.cpp (working copy) @@ -2106,8 +2106,12 @@ if (Val == From) Val = To; Indices.push_back(Val); } - Replacement = ConstantExpr::getGetElementPtr(Pointer, - &Indices[0], Indices.size()); + if(cast(this)->isInBounds()) + Replacement = ConstantExpr::getInBoundsGetElementPtr(Pointer, + &Indices[0], Indices.size()); + else + Replacement = ConstantExpr::getGetElementPtr(Pointer, + &Indices[0], Indices.size()); } else if (getOpcode() == Instruction::ExtractValue) { Constant *Agg = getOperand(0); if (Agg == From) Agg = To; Please review the attached patch. Thank you, Jin-Gu Kang -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110211/97b09662/attachment.html -------------- next part -------------- An embedded and charset-unspecified text was scrubbed... Name: patch Url: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110211/97b09662/attachment.pl From rafael.espindola at gmail.com Thu Feb 10 23:23:09 2011 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Fri, 11 Feb 2011 05:23:09 -0000 Subject: [llvm-commits] [llvm] r125363 - in /llvm/trunk: include/llvm/Target/Mangler.h lib/Target/Mangler.cpp tools/lto/LTOCodeGenerator.cpp tools/lto/LTOModule.cpp Message-ID: <20110211052309.939E72A6C12C@llvm.org> Author: rafael Date: Thu Feb 10 23:23:09 2011 New Revision: 125363 URL: http://llvm.org/viewvc/llvm-project?rev=125363&view=rev Log: Remove std::string version of getNameWithPrefix. Modified: llvm/trunk/include/llvm/Target/Mangler.h llvm/trunk/lib/Target/Mangler.cpp llvm/trunk/tools/lto/LTOCodeGenerator.cpp llvm/trunk/tools/lto/LTOModule.cpp Modified: llvm/trunk/include/llvm/Target/Mangler.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/Mangler.h?rev=125363&r1=125362&r2=125363&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/Mangler.h (original) +++ llvm/trunk/include/llvm/Target/Mangler.h Thu Feb 10 23:23:09 2011 @@ -15,7 +15,6 @@ #define LLVM_SUPPORT_MANGLER_H #include "llvm/ADT/DenseMap.h" -#include namespace llvm { class StringRef; @@ -69,12 +68,6 @@ /// empty. void getNameWithPrefix(SmallVectorImpl &OutName, const Twine &GVName, ManglerPrefixTy PrefixTy = Mangler::Default); - - /// getNameWithPrefix - Return the name of the appropriate prefix - /// and the specified global variable's name. If the global variable doesn't - /// have a name, this fills in a unique name for the global. - std::string getNameWithPrefix(const GlobalValue *GV, - bool isImplicitlyPrivate = false); }; } // End llvm namespace Modified: llvm/trunk/lib/Target/Mangler.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mangler.cpp?rev=125363&r1=125362&r2=125363&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mangler.cpp (original) +++ llvm/trunk/lib/Target/Mangler.cpp Thu Feb 10 23:23:09 2011 @@ -224,16 +224,6 @@ } } -/// getNameWithPrefix - Fill OutName with the name of the appropriate prefix -/// and the specified global variable's name. If the global variable doesn't -/// have a name, this fills in a unique name for the global. -std::string Mangler::getNameWithPrefix(const GlobalValue *GV, - bool isImplicitlyPrivate) { - SmallString<64> Buf; - getNameWithPrefix(Buf, GV, isImplicitlyPrivate); - return std::string(Buf.begin(), Buf.end()); -} - /// getSymbol - Return the MCSymbol for the specified global value. This /// symbol is the main label that is the address of the global. MCSymbol *Mangler::getSymbol(const GlobalValue *GV) { Modified: llvm/trunk/tools/lto/LTOCodeGenerator.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto/LTOCodeGenerator.cpp?rev=125363&r1=125362&r2=125363&view=diff ============================================================================== --- llvm/trunk/tools/lto/LTOCodeGenerator.cpp (original) +++ llvm/trunk/tools/lto/LTOCodeGenerator.cpp Thu Feb 10 23:23:09 2011 @@ -350,16 +350,19 @@ MCContext Context(*_target->getMCAsmInfo(), NULL); Mangler mangler(Context, *_target->getTargetData()); std::vector mustPreserveList; + SmallString<64> Buffer; for (Module::iterator f = mergedModule->begin(), e = mergedModule->end(); f != e; ++f) { + mangler.getNameWithPrefix(Buffer, f, false); if (!f->isDeclaration() && - _mustPreserveSymbols.count(mangler.getNameWithPrefix(f))) + _mustPreserveSymbols.count(Buffer)) mustPreserveList.push_back(::strdup(f->getNameStr().c_str())); } for (Module::global_iterator v = mergedModule->global_begin(), e = mergedModule->global_end(); v != e; ++v) { + mangler.getNameWithPrefix(Buffer, v, false); if (!v->isDeclaration() && - _mustPreserveSymbols.count(mangler.getNameWithPrefix(v))) + _mustPreserveSymbols.count(Buffer)) mustPreserveList.push_back(::strdup(v->getNameStr().c_str())); } passes.add(createInternalizePass(mustPreserveList)); Modified: llvm/trunk/tools/lto/LTOModule.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto/LTOModule.cpp?rev=125363&r1=125362&r2=125363&view=diff ============================================================================== --- llvm/trunk/tools/lto/LTOModule.cpp (original) +++ llvm/trunk/tools/lto/LTOModule.cpp Thu Feb 10 23:23:09 2011 @@ -320,7 +320,9 @@ return; // string is owned by _defines - const char *symbolName = ::strdup(mangler.getNameWithPrefix(def).c_str()); + SmallString<64> Buffer; + mangler.getNameWithPrefix(Buffer, def, false); + const char *symbolName = ::strdup(Buffer.c_str()); // set alignment part log2() can have rounding errors uint32_t align = def->getAlignment(); @@ -395,7 +397,8 @@ if (isa(decl)) return; - std::string name = mangler.getNameWithPrefix(decl); + SmallString<64> name; + mangler.getNameWithPrefix(name, decl, false); // we already have the symbol if (_undefines.find(name) != _undefines.end()) From sabre at nondot.org Thu Feb 10 23:34:33 2011 From: sabre at nondot.org (Chris Lattner) Date: Fri, 11 Feb 2011 05:34:33 -0000 Subject: [llvm-commits] [llvm] r125365 - in /llvm/trunk: include/llvm/Constants.h lib/VMCore/Constants.cpp Message-ID: <20110211053433.62F732A6C12C@llvm.org> Author: lattner Date: Thu Feb 10 23:34:33 2011 New Revision: 125365 URL: http://llvm.org/viewvc/llvm-project?rev=125365&view=rev Log: make the constantexpr interfaces for inbounds GEPs follow the same style as other constantexpr flags, reducing redundancy. Modified: llvm/trunk/include/llvm/Constants.h llvm/trunk/lib/VMCore/Constants.cpp Modified: llvm/trunk/include/llvm/Constants.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Constants.h?rev=125365&r1=125364&r2=125365&view=diff ============================================================================== --- llvm/trunk/include/llvm/Constants.h (original) +++ llvm/trunk/include/llvm/Constants.h Thu Feb 10 23:34:33 2011 @@ -631,11 +631,8 @@ Constant *C1, Constant *C2, Constant *C3); template static Constant *getGetElementPtrTy(const Type *Ty, Constant *C, - IndexTy const *Idxs, unsigned NumIdxs); - template - static Constant *getInBoundsGetElementPtrTy(const Type *Ty, Constant *C, - IndexTy const *Idxs, - unsigned NumIdxs); + IndexTy const *Idxs, unsigned NumIdxs, + bool InBounds); static Constant *getExtractElementTy(const Type *Ty, Constant *Val, Constant *Idx); static Constant *getInsertElementTy(const Type *Ty, Constant *Val, @@ -650,11 +647,7 @@ template static Constant *getGetElementPtrImpl(Constant *C, IndexTy const *IdxList, - unsigned NumIdx); - template - static Constant *getInBoundsGetElementPtrImpl(Constant *C, - IndexTy const *IdxList, - unsigned NumIdx); + unsigned NumIdx, bool InBounds); public: // Static methods to construct a ConstantExpr of different kinds. Note that @@ -849,18 +842,24 @@ /// all elements must be Constant's. /// static Constant *getGetElementPtr(Constant *C, - Constant *const *IdxList, unsigned NumIdx); + Constant *const *IdxList, unsigned NumIdx, + bool InBounds = false); static Constant *getGetElementPtr(Constant *C, - Value* const *IdxList, unsigned NumIdx); + Value *const *IdxList, unsigned NumIdx, + bool InBounds = false); /// Create an "inbounds" getelementptr. See the documentation for the /// "inbounds" flag in LangRef.html for details. static Constant *getInBoundsGetElementPtr(Constant *C, Constant *const *IdxList, - unsigned NumIdx); + unsigned NumIdx) { + return getGetElementPtr(C, IdxList, NumIdx, true); + } static Constant *getInBoundsGetElementPtr(Constant *C, Value* const *IdxList, - unsigned NumIdx); + unsigned NumIdx) { + return getGetElementPtr(C, IdxList, NumIdx, true); + } static Constant *getExtractElement(Constant *Vec, Constant *Idx); static Constant *getInsertElement(Constant *Vec, Constant *Elt,Constant *Idx); Modified: llvm/trunk/lib/VMCore/Constants.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Constants.cpp?rev=125365&r1=125364&r2=125365&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Constants.cpp (original) +++ llvm/trunk/lib/VMCore/Constants.cpp Thu Feb 10 23:34:33 2011 @@ -1502,43 +1502,14 @@ template Constant *ConstantExpr::getGetElementPtrTy(const Type *ReqTy, Constant *C, IndexTy const *Idxs, - unsigned NumIdx) { + unsigned NumIdx, bool InBounds) { assert(GetElementPtrInst::getIndexedType(C->getType(), Idxs, Idxs+NumIdx) == cast(ReqTy)->getElementType() && "GEP indices invalid!"); - if (Constant *FC = ConstantFoldGetElementPtr(C, /*inBounds=*/false, - Idxs, NumIdx)) - return FC; // Fold a few common cases... - - assert(C->getType()->isPointerTy() && - "Non-pointer type for constant GetElementPtr expression"); - // Look up the constant in the table first to ensure uniqueness - std::vector ArgVec; - ArgVec.reserve(NumIdx+1); - ArgVec.push_back(C); - for (unsigned i = 0; i != NumIdx; ++i) - ArgVec.push_back(cast(Idxs[i])); - const ExprMapKeyType Key(Instruction::GetElementPtr, ArgVec); - - LLVMContextImpl *pImpl = ReqTy->getContext().pImpl; - return pImpl->ExprConstants.getOrCreate(ReqTy, Key); -} - -template -Constant *ConstantExpr::getInBoundsGetElementPtrTy(const Type *ReqTy, - Constant *C, - IndexTy const *Idxs, - unsigned NumIdx) { - assert(GetElementPtrInst::getIndexedType(C->getType(), Idxs, - Idxs+NumIdx) == - cast(ReqTy)->getElementType() && - "GEP indices invalid!"); - - if (Constant *FC = ConstantFoldGetElementPtr(C, /*inBounds=*/true, - Idxs, NumIdx)) - return FC; // Fold a few common cases... + if (Constant *FC = ConstantFoldGetElementPtr(C, InBounds, Idxs, NumIdx)) + return FC; // Fold a few common cases. assert(C->getType()->isPointerTy() && "Non-pointer type for constant GetElementPtr expression"); @@ -1549,7 +1520,7 @@ for (unsigned i = 0; i != NumIdx; ++i) ArgVec.push_back(cast(Idxs[i])); const ExprMapKeyType Key(Instruction::GetElementPtr, ArgVec, 0, - GEPOperator::IsInBounds); + InBounds ? GEPOperator::IsInBounds : 0); LLVMContextImpl *pImpl = ReqTy->getContext().pImpl; return pImpl->ExprConstants.getOrCreate(ReqTy, Key); @@ -1557,47 +1528,23 @@ template Constant *ConstantExpr::getGetElementPtrImpl(Constant *C, IndexTy const *Idxs, - unsigned NumIdx) { + unsigned NumIdx, bool InBounds) { // Get the result type of the getelementptr! const Type *Ty = GetElementPtrInst::getIndexedType(C->getType(), Idxs, Idxs+NumIdx); assert(Ty && "GEP indices invalid!"); unsigned As = cast(C->getType())->getAddressSpace(); - return getGetElementPtrTy(PointerType::get(Ty, As), C, Idxs, NumIdx); -} - -template -Constant *ConstantExpr::getInBoundsGetElementPtrImpl(Constant *C, - IndexTy const *Idxs, - unsigned NumIdx) { - // Get the result type of the getelementptr! - const Type *Ty = - GetElementPtrInst::getIndexedType(C->getType(), Idxs, Idxs+NumIdx); - assert(Ty && "GEP indices invalid!"); - unsigned As = cast(C->getType())->getAddressSpace(); - return getInBoundsGetElementPtrTy(PointerType::get(Ty, As), C, Idxs, NumIdx); + return getGetElementPtrTy(PointerType::get(Ty, As), C, Idxs, NumIdx,InBounds); } Constant *ConstantExpr::getGetElementPtr(Constant *C, Value* const *Idxs, - unsigned NumIdx) { - return getGetElementPtrImpl(C, Idxs, NumIdx); + unsigned NumIdx, bool InBounds) { + return getGetElementPtrImpl(C, Idxs, NumIdx, InBounds); } Constant *ConstantExpr::getGetElementPtr(Constant *C, Constant *const *Idxs, - unsigned NumIdx) { - return getGetElementPtrImpl(C, Idxs, NumIdx); -} - -Constant *ConstantExpr::getInBoundsGetElementPtr(Constant *C, - Value* const *Idxs, - unsigned NumIdx) { - return getInBoundsGetElementPtrImpl(C, Idxs, NumIdx); -} - -Constant *ConstantExpr::getInBoundsGetElementPtr(Constant *C, - Constant *const *Idxs, - unsigned NumIdx) { - return getInBoundsGetElementPtrImpl(C, Idxs, NumIdx); + unsigned NumIdx, bool InBounds) { + return getGetElementPtrImpl(C, Idxs, NumIdx, InBounds); } Constant * From sabre at nondot.org Thu Feb 10 23:37:21 2011 From: sabre at nondot.org (Chris Lattner) Date: Fri, 11 Feb 2011 05:37:21 -0000 Subject: [llvm-commits] [llvm] r125366 - /llvm/trunk/lib/VMCore/Constants.cpp Message-ID: <20110211053721.A03722A6C12C@llvm.org> Author: lattner Date: Thu Feb 10 23:37:21 2011 New Revision: 125366 URL: http://llvm.org/viewvc/llvm-project?rev=125366&view=rev Log: make ConstantExpr::replaceUsesOfWithOnConstant preserve the inbounds flag. Noticed by Jin Gu Kang! Modified: llvm/trunk/lib/VMCore/Constants.cpp Modified: llvm/trunk/lib/VMCore/Constants.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Constants.cpp?rev=125366&r1=125365&r2=125366&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Constants.cpp (original) +++ llvm/trunk/lib/VMCore/Constants.cpp Thu Feb 10 23:37:21 2011 @@ -2054,7 +2054,8 @@ Indices.push_back(Val); } Replacement = ConstantExpr::getGetElementPtr(Pointer, - &Indices[0], Indices.size()); + &Indices[0], Indices.size(), + cast(this)->isInBounds()); } else if (getOpcode() == Instruction::ExtractValue) { Constant *Agg = getOperand(0); if (Agg == From) Agg = To; From clattner at apple.com Thu Feb 10 23:41:19 2011 From: clattner at apple.com (Chris Lattner) Date: Thu, 10 Feb 2011 21:41:19 -0800 Subject: [llvm-commits] ConstantExpr::replaceUsesOfWithOnConstant() function for GetElementPtrConstantExpr In-Reply-To: <3E94D039A2B82544B3E7D48F924B0B25DFA3D87FE3@base.imrc.kist.re.kr> References: <3E94D039A2B82544B3E7D48F924B0B25DFA3D87FE3@base.imrc.kist.re.kr> Message-ID: <0E0FE0EF-FED4-473D-92A0-D011393052EE@apple.com> On Feb 10, 2011, at 4:56 PM, Jin Gu Kang wrote: > Hi llvm-commits members > > when making replacement for GetElementPtr, I think inbounds factor is missed > so, I made a patch to consider inbounds factor as follows: Great catch. I reworked the constantexpr interfaces to make this a bit easier (125365) and then fixed the bug in (125366). Thanks! -Chris > > Index: lib/VMCore/Constants.cpp > =================================================================== > --- lib/VMCore/Constants.cpp (revision 125324) > +++ lib/VMCore/Constants.cpp (working copy) > @@ -2106,8 +2106,12 @@ > if (Val == From) Val = To; > Indices.push_back(Val); > } > - Replacement = ConstantExpr::getGetElementPtr(Pointer, > - &Indices[0], Indices.size()); > + if(cast(this)->isInBounds()) > + Replacement = ConstantExpr::getInBoundsGetElementPtr(Pointer, > + &Indices[0], Indices.size()); > + else > + Replacement = ConstantExpr::getGetElementPtr(Pointer, > + &Indices[0], Indices.size()); > } else if (getOpcode() == Instruction::ExtractValue) { > Constant *Agg = getOperand(0); > if (Agg == From) Agg = To; > Please review the attached patch. > Thank you, > Jin-Gu Kang > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110210/19aabf8f/attachment.html From housel at acm.org Thu Feb 10 23:50:02 2011 From: housel at acm.org (Peter Housel) Date: Thu, 10 Feb 2011 21:50:02 -0800 Subject: [llvm-commits] [PATCH] Fix for llvm-bcanalyzer Message-ID: METADATA_ATTACHMENT2 records appear in METADATA_ATTACHMENT blocks, not in METADATA blocks: Index: tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp =================================================================== --- tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp (revision 125330) +++ tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp (working copy) @@ -263,6 +263,7 @@ switch(CodeID) { default:return 0; case bitc::METADATA_ATTACHMENT: return "METADATA_ATTACHMENT"; + case bitc::METADATA_ATTACHMENT2: return "METADATA_ATTACHMENT2"; } case bitc::METADATA_BLOCK_ID: switch(CodeID) { @@ -277,7 +278,6 @@ case bitc::METADATA_NODE2: return "METADATA_NODE2"; case bitc::METADATA_FN_NODE2: return "METADATA_FN_NODE2"; case bitc::METADATA_NAMED_NODE2: return "METADATA_NAMED_NODE2"; - case bitc::METADATA_ATTACHMENT2: return "METADATA_ATTACHMENT2"; } } } -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110210/ea219704/attachment.html From clattner at apple.com Thu Feb 10 23:51:48 2011 From: clattner at apple.com (Chris Lattner) Date: Thu, 10 Feb 2011 21:51:48 -0800 Subject: [llvm-commits] [llvm] r125357 - in /llvm/trunk: lib/Target/ARM/ARMISelLowering.cpp test/CodeGen/ARM/fcopysign.ll In-Reply-To: <20110211022855.E909E2A6C12C@llvm.org> References: <20110211022855.E909E2A6C12C@llvm.org> Message-ID: On Feb 10, 2011, at 6:28 PM, Evan Cheng wrote: > Author: evancheng > Date: Thu Feb 10 20:28:55 2011 > New Revision: 125357 > > URL: http://llvm.org/viewvc/llvm-project?rev=125357&view=rev > Log: > Fix buggy fcopysign lowering. > This > define float @foo(float %x, float %y) nounwind readnone { > entry: > %0 = tail call float @copysignf(float %x, float %y) nounwind readnone > ret float %0 > } Hey Evan, Is there something wrong with the generic lowering code for copysign? Why does arm have its own implementation? -Chris From sabre at nondot.org Thu Feb 10 23:50:01 2011 From: sabre at nondot.org (Chris Lattner) Date: Fri, 11 Feb 2011 05:50:01 -0000 Subject: [llvm-commits] [llvm] r125367 - /llvm/trunk/tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp Message-ID: <20110211055001.783E72A6C12C@llvm.org> Author: lattner Date: Thu Feb 10 23:50:01 2011 New Revision: 125367 URL: http://llvm.org/viewvc/llvm-project?rev=125367&view=rev Log: fix dumping of METADATA_ATTACHMENT2 names, patch by Peter Housel! Modified: llvm/trunk/tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp Modified: llvm/trunk/tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp?rev=125367&r1=125366&r2=125367&view=diff ============================================================================== --- llvm/trunk/tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp (original) +++ llvm/trunk/tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp Thu Feb 10 23:50:01 2011 @@ -263,6 +263,7 @@ switch(CodeID) { default:return 0; case bitc::METADATA_ATTACHMENT: return "METADATA_ATTACHMENT"; + case bitc::METADATA_ATTACHMENT2: return "METADATA_ATTACHMENT2"; } case bitc::METADATA_BLOCK_ID: switch(CodeID) { @@ -277,7 +278,6 @@ case bitc::METADATA_NODE2: return "METADATA_NODE2"; case bitc::METADATA_FN_NODE2: return "METADATA_FN_NODE2"; case bitc::METADATA_NAMED_NODE2: return "METADATA_NAMED_NODE2"; - case bitc::METADATA_ATTACHMENT2: return "METADATA_ATTACHMENT2"; } } } From clattner at apple.com Thu Feb 10 23:53:41 2011 From: clattner at apple.com (Chris Lattner) Date: Thu, 10 Feb 2011 21:53:41 -0800 Subject: [llvm-commits] [PATCH] Fix for llvm-bcanalyzer In-Reply-To: References: Message-ID: <38CCA373-4AE5-4288-AD6F-19ED3033C255@apple.com> Applied in r125367, thanks! On Feb 10, 2011, at 9:50 PM, Peter Housel wrote: > METADATA_ATTACHMENT2 records appear in METADATA_ATTACHMENT blocks, not in METADATA blocks: > > Index: tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp > =================================================================== > --- tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp (revision 125330) > +++ tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp (working copy) > @@ -263,6 +263,7 @@ > switch(CodeID) { > default:return 0; > case bitc::METADATA_ATTACHMENT: return "METADATA_ATTACHMENT"; > + case bitc::METADATA_ATTACHMENT2: return "METADATA_ATTACHMENT2"; > } > case bitc::METADATA_BLOCK_ID: > switch(CodeID) { > @@ -277,7 +278,6 @@ > case bitc::METADATA_NODE2: return "METADATA_NODE2"; > case bitc::METADATA_FN_NODE2: return "METADATA_FN_NODE2"; > case bitc::METADATA_NAMED_NODE2: return "METADATA_NAMED_NODE2"; > - case bitc::METADATA_ATTACHMENT2: return "METADATA_ATTACHMENT2"; > } > } > } > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110210/bed24c47/attachment.html From zwarich at apple.com Fri Feb 11 00:08:26 2011 From: zwarich at apple.com (Cameron Zwarich) Date: Fri, 11 Feb 2011 06:08:26 -0000 Subject: [llvm-commits] [llvm] r125368 - /llvm/trunk/lib/Transforms/Scalar/LoopInstSimplify.cpp Message-ID: <20110211060826.263842A6C12C@llvm.org> Author: zwarich Date: Fri Feb 11 00:08:25 2011 New Revision: 125368 URL: http://llvm.org/viewvc/llvm-project?rev=125368&view=rev Log: LoopInstSimplify preserves ScalarEvolution. Modified: llvm/trunk/lib/Transforms/Scalar/LoopInstSimplify.cpp Modified: llvm/trunk/lib/Transforms/Scalar/LoopInstSimplify.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopInstSimplify.cpp?rev=125368&r1=125367&r2=125368&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LoopInstSimplify.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LoopInstSimplify.cpp Fri Feb 11 00:08:25 2011 @@ -42,6 +42,7 @@ AU.addRequiredID(LoopSimplifyID); AU.addPreservedID(LoopSimplifyID); AU.addPreservedID(LCSSAID); + AU.addPreserved("scalar-evolution"); } }; } From zwarich at apple.com Fri Feb 11 00:08:28 2011 From: zwarich at apple.com (Cameron Zwarich) Date: Fri, 11 Feb 2011 06:08:28 -0000 Subject: [llvm-commits] [llvm] r125369 - /llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp Message-ID: <20110211060829.002992A6C12D@llvm.org> Author: zwarich Date: Fri Feb 11 00:08:28 2011 New Revision: 125369 URL: http://llvm.org/viewvc/llvm-project?rev=125369&view=rev Log: Make LoopUnswitch preserve ScalarEvolution by just forgetting everything about a loop when unswitching it. It only does this in the complex case, because everything should be fine already in the simple case. Modified: llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp Modified: llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp?rev=125369&r1=125368&r2=125369&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp Fri Feb 11 00:08:28 2011 @@ -37,6 +37,7 @@ #include "llvm/Analysis/LoopInfo.h" #include "llvm/Analysis/LoopPass.h" #include "llvm/Analysis/Dominators.h" +#include "llvm/Analysis/ScalarEvolution.h" #include "llvm/Transforms/Utils/Cloning.h" #include "llvm/Transforms/Utils/Local.h" #include "llvm/Transforms/Utils/BasicBlockUtils.h" @@ -110,6 +111,7 @@ AU.addRequiredID(LCSSAID); AU.addPreservedID(LCSSAID); AU.addPreserved(); + AU.addPreserved(); } private: @@ -574,6 +576,9 @@ << " blocks] in Function " << F->getName() << " when '" << *Val << "' == " << *LIC << "\n"); + if (ScalarEvolution *SE = getAnalysisIfAvailable()) + SE->forgetLoop(L); + LoopBlocks.clear(); NewBlocks.clear(); From baldrick at free.fr Fri Feb 11 01:37:26 2011 From: baldrick at free.fr (Duncan Sands) Date: Fri, 11 Feb 2011 08:37:26 +0100 Subject: [llvm-commits] Patch review for bug 9190 In-Reply-To: <6594DDFF12B03D4E89690887C24869940270CCAB45@hasmsx504.ger.corp.intel.com> References: <6594DDFF12B03D4E89690887C24869940270CCAB45@hasmsx504.ger.corp.intel.com> Message-ID: <4D54E736.2000407@free.fr> Hi Nadav, this makes sense to me. Ciao, Duncan. > http://llvm.org/bugs/show_bug.cgi?id=9190 > > The bug happens when the DAGCombiner attempts to optimize one of the patterns of > the SUB opcode. It tries to create a zero of type v2i64. This type is legal on > 32bit machines, but the initializer is target dependent. Currently, the > initializer attempts to create an i64 zero constant, which fails. > > Added a flag to tell the DAGCombiner to create a legal zero, if we require that > the pass would generate legal types. > > Index: lib/CodeGen/SelectionDAG/DAGCombiner.cpp > > =================================================================== > > --- lib/CodeGen/SelectionDAG/DAGCombiner.cpp (revision 124985) > > +++ lib/CodeGen/SelectionDAG/DAGCombiner.cpp (working copy) > > @@ -1533,7 +1533,7 @@ > > // fold (sub x, x) -> 0 > > if (N0 == N1) > > - return DAG.getConstant(0, N->getValueType(0)); > > + return DAG.getConstant(0, N->getValueType(0), LegalTypes); > > // fold (sub c1, c2) -> c1-c2 > > if (N0C && N1C) > > return DAG.FoldConstantArithmetic(ISD::SUB, VT, N0C, N1C); > > Cheers, > > Nadav > > --------------------------------------------------------------------- > Intel Israel (74) Limited > > This e-mail and any attachments may contain confidential material for > the sole use of the intended recipient(s). Any review or distribution > by others is strictly prohibited. If you are not the intended > recipient, please contact the sender and delete all copies. > > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From baldrick at free.fr Fri Feb 11 01:41:03 2011 From: baldrick at free.fr (Duncan Sands) Date: Fri, 11 Feb 2011 08:41:03 +0100 Subject: [llvm-commits] [llvm] r125319 - in /llvm/trunk: lib/Analysis/ValueTracking.cpp test/Transforms/JumpThreading/degenerate-phi.ll In-Reply-To: <20110210235410.768AF2A6C12C@llvm.org> References: <20110210235410.768AF2A6C12C@llvm.org> Message-ID: <4D54E80F.2090806@free.fr> Hi Nick, > --- llvm/trunk/lib/Analysis/ValueTracking.cpp (original) > +++ llvm/trunk/lib/Analysis/ValueTracking.cpp Thu Feb 10 17:54:10 2011 > @@ -590,6 +590,10 @@ > } > } > > + // Unreachable blocks may have zero-operand PHI nodes. > + if (P->getNumIncomingValues() == 0) > + return; the LangRef says that zero operand phis are not allowed. I'm pretty sure that there is some code in InstructionSimplify (which is calling ValueTracking here) which assumes that phi nodes have at least one operand. Who knows where else this assumption is made? I think it would be better to have jump-threading zap any zero operand phis when it makes them, rather than changing all analyses to support them. Ciao, Duncan. > + > // Otherwise take the unions of the known bit sets of the operands, > // taking conservative care to avoid excessive recursion. > if (Depth< MaxDepth - 1&& !KnownZero&& !KnownOne) { > > Added: llvm/trunk/test/Transforms/JumpThreading/degenerate-phi.ll > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/JumpThreading/degenerate-phi.ll?rev=125319&view=auto > ============================================================================== > --- llvm/trunk/test/Transforms/JumpThreading/degenerate-phi.ll (added) > +++ llvm/trunk/test/Transforms/JumpThreading/degenerate-phi.ll Thu Feb 10 17:54:10 2011 > @@ -0,0 +1,24 @@ > +; RUN: opt -jump-threading -disable-output %s > +; PR9112 > + > +; This is actually a test for value tracking. Jump threading produces > +; "%phi = phi i16" when it removes all edges leading to %unreachable. > +; The .ll parser won't let us write that directly since it's invalid code. > + > +define void @func() nounwind { > +entry: > + br label %bb > + > +bb: > + br label %bb > + > +unreachable: > + %phi = phi i16 [ %add, %unreachable ], [ 0, %next ] > + %add = add i16 0, %phi > + %cmp = icmp slt i16 %phi, 0 > + br i1 %cmp, label %unreachable, label %next > + > +next: > + br label %unreachable > +} > + > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From nicholas at mxc.ca Fri Feb 11 02:25:48 2011 From: nicholas at mxc.ca (Nick Lewycky) Date: Fri, 11 Feb 2011 00:25:48 -0800 Subject: [llvm-commits] [llvm] r125319 - in /llvm/trunk: lib/Analysis/ValueTracking.cpp test/Transforms/JumpThreading/degenerate-phi.ll In-Reply-To: <4D54E80F.2090806@free.fr> References: <20110210235410.768AF2A6C12C@llvm.org> <4D54E80F.2090806@free.fr> Message-ID: <4D54F28C.7030901@mxc.ca> Duncan Sands wrote: > Hi Nick, > >> --- llvm/trunk/lib/Analysis/ValueTracking.cpp (original) >> +++ llvm/trunk/lib/Analysis/ValueTracking.cpp Thu Feb 10 17:54:10 2011 >> @@ -590,6 +590,10 @@ >> } >> } >> >> + // Unreachable blocks may have zero-operand PHI nodes. >> + if (P->getNumIncomingValues() == 0) >> + return; > > the LangRef says that zero operand phis are not allowed. I'm pretty sure that > there is some code in InstructionSimplify (which is calling ValueTracking here) > which assumes that phi nodes have at least one operand. Who knows where else > this assumption is made? I think it would be better to have jump-threading zap > any zero operand phis when it makes them, rather than changing all analyses to > support them. It doesn't create them, it calls BasicBlock::removePredecessor. This code already has to handle the case where you make a query about a value and one of the possible inputs (say, through a select) comes from an unreachable block which contains a "%x = add %x, %x" instruction. Nick > > Ciao, Duncan. > >> + >> // Otherwise take the unions of the known bit sets of the operands, >> // taking conservative care to avoid excessive recursion. >> if (Depth< MaxDepth - 1&& !KnownZero&& !KnownOne) { >> >> Added: llvm/trunk/test/Transforms/JumpThreading/degenerate-phi.ll >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/JumpThreading/degenerate-phi.ll?rev=125319&view=auto >> ============================================================================== >> --- llvm/trunk/test/Transforms/JumpThreading/degenerate-phi.ll (added) >> +++ llvm/trunk/test/Transforms/JumpThreading/degenerate-phi.ll Thu Feb 10 17:54:10 2011 >> @@ -0,0 +1,24 @@ >> +; RUN: opt -jump-threading -disable-output %s >> +; PR9112 >> + >> +; This is actually a test for value tracking. Jump threading produces >> +; "%phi = phi i16" when it removes all edges leading to %unreachable. >> +; The .ll parser won't let us write that directly since it's invalid code. >> + >> +define void @func() nounwind { >> +entry: >> + br label %bb >> + >> +bb: >> + br label %bb >> + >> +unreachable: >> + %phi = phi i16 [ %add, %unreachable ], [ 0, %next ] >> + %add = add i16 0, %phi >> + %cmp = icmp slt i16 %phi, 0 >> + br i1 %cmp, label %unreachable, label %next >> + >> +next: >> + br label %unreachable >> +} >> + >> >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > From baldrick at free.fr Fri Feb 11 02:28:18 2011 From: baldrick at free.fr (Duncan Sands) Date: Fri, 11 Feb 2011 09:28:18 +0100 Subject: [llvm-commits] [llvm] r125319 - in /llvm/trunk: lib/Analysis/ValueTracking.cpp test/Transforms/JumpThreading/degenerate-phi.ll In-Reply-To: <4D54F28C.7030901@mxc.ca> References: <20110210235410.768AF2A6C12C@llvm.org> <4D54E80F.2090806@free.fr> <4D54F28C.7030901@mxc.ca> Message-ID: <4D54F322.8020602@free.fr> Hi Nick, >>> --- llvm/trunk/lib/Analysis/ValueTracking.cpp (original) >>> +++ llvm/trunk/lib/Analysis/ValueTracking.cpp Thu Feb 10 17:54:10 2011 >>> @@ -590,6 +590,10 @@ >>> } >>> } >>> >>> + // Unreachable blocks may have zero-operand PHI nodes. >>> + if (P->getNumIncomingValues() == 0) >>> + return; >> >> the LangRef says that zero operand phis are not allowed. I'm pretty sure that >> there is some code in InstructionSimplify (which is calling ValueTracking here) >> which assumes that phi nodes have at least one operand. Who knows where else >> this assumption is made? I think it would be better to have jump-threading zap >> any zero operand phis when it makes them, rather than changing all analyses to >> support them. > > It doesn't create them, it calls BasicBlock::removePredecessor. clearly it must clean them up somewhere (since phi nodes with no operands are invalid), so can't it just clean them up earlier? > This code already has to handle the case where you make a query about a value > and one of the possible inputs (say, through a select) comes from an unreachable > block which contains a "%x = add %x, %x" instruction. The big difference is that unreachable blocks are not invalid according to the LangRef. Ciao, Duncan. > > Nick > >> >> Ciao, Duncan. >> >>> + >>> // Otherwise take the unions of the known bit sets of the operands, >>> // taking conservative care to avoid excessive recursion. >>> if (Depth< MaxDepth - 1&& !KnownZero&& !KnownOne) { >>> >>> Added: llvm/trunk/test/Transforms/JumpThreading/degenerate-phi.ll >>> URL: >>> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/JumpThreading/degenerate-phi.ll?rev=125319&view=auto >>> >>> ============================================================================== >>> --- llvm/trunk/test/Transforms/JumpThreading/degenerate-phi.ll (added) >>> +++ llvm/trunk/test/Transforms/JumpThreading/degenerate-phi.ll Thu Feb 10 >>> 17:54:10 2011 >>> @@ -0,0 +1,24 @@ >>> +; RUN: opt -jump-threading -disable-output %s >>> +; PR9112 >>> + >>> +; This is actually a test for value tracking. Jump threading produces >>> +; "%phi = phi i16" when it removes all edges leading to %unreachable. >>> +; The .ll parser won't let us write that directly since it's invalid code. >>> + >>> +define void @func() nounwind { >>> +entry: >>> + br label %bb >>> + >>> +bb: >>> + br label %bb >>> + >>> +unreachable: >>> + %phi = phi i16 [ %add, %unreachable ], [ 0, %next ] >>> + %add = add i16 0, %phi >>> + %cmp = icmp slt i16 %phi, 0 >>> + br i1 %cmp, label %unreachable, label %next >>> + >>> +next: >>> + br label %unreachable >>> +} >>> + >>> >>> >>> _______________________________________________ >>> llvm-commits mailing list >>> llvm-commits at cs.uiuc.edu >>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >> > From dgregor at apple.com Fri Feb 11 12:13:20 2011 From: dgregor at apple.com (Douglas Gregor) Date: Fri, 11 Feb 2011 18:13:20 -0000 Subject: [llvm-commits] [llvm] r125380 - /llvm/trunk/include/llvm/ADT/Optional.h Message-ID: <20110211181320.E720F2A6C12C@llvm.org> Author: dgregor Date: Fri Feb 11 12:13:20 2011 New Revision: 125380 URL: http://llvm.org/viewvc/llvm-project?rev=125380&view=rev Log: Poison the relational operators ==, !=, <, <=, >=, > on llvm::Optional objects, since they'll end up using the implicit conversion to "bool" and causing some very "fun" surprises. Modified: llvm/trunk/include/llvm/ADT/Optional.h Modified: llvm/trunk/include/llvm/ADT/Optional.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/Optional.h?rev=125380&r1=125379&r2=125380&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/Optional.h (original) +++ llvm/trunk/include/llvm/ADT/Optional.h Fri Feb 11 12:13:20 2011 @@ -61,6 +61,60 @@ struct simplify_type > : public simplify_type > {}; +/// \brief Poison comparison between two \c Optional objects. Clients needs to +/// explicitly compare the underlying values and account for empty \c Optional +/// objects. +/// +/// This routine will never be defined. It returns \c void to help diagnose +/// errors at compile time. +template +void operator==(const Optional &X, const Optional &Y); + +/// \brief Poison comparison between two \c Optional objects. Clients needs to +/// explicitly compare the underlying values and account for empty \c Optional +/// objects. +/// +/// This routine will never be defined. It returns \c void to help diagnose +/// errors at compile time. +template +void operator!=(const Optional &X, const Optional &Y); + +/// \brief Poison comparison between two \c Optional objects. Clients needs to +/// explicitly compare the underlying values and account for empty \c Optional +/// objects. +/// +/// This routine will never be defined. It returns \c void to help diagnose +/// errors at compile time. +template +void operator<(const Optional &X, const Optional &Y); + +/// \brief Poison comparison between two \c Optional objects. Clients needs to +/// explicitly compare the underlying values and account for empty \c Optional +/// objects. +/// +/// This routine will never be defined. It returns \c void to help diagnose +/// errors at compile time. +template +void operator<=(const Optional &X, const Optional &Y); + +/// \brief Poison comparison between two \c Optional objects. Clients needs to +/// explicitly compare the underlying values and account for empty \c Optional +/// objects. +/// +/// This routine will never be defined. It returns \c void to help diagnose +/// errors at compile time. +template +void operator>=(const Optional &X, const Optional &Y); + +/// \brief Poison comparison between two \c Optional objects. Clients needs to +/// explicitly compare the underlying values and account for empty \c Optional +/// objects. +/// +/// This routine will never be defined. It returns \c void to help diagnose +/// errors at compile time. +template +void operator>(const Optional &X, const Optional &Y); + } // end llvm namespace #endif From grosbach at apple.com Fri Feb 11 12:45:44 2011 From: grosbach at apple.com (Jim Grosbach) Date: Fri, 11 Feb 2011 18:45:44 -0000 Subject: [llvm-commits] [llvm] r125385 - /llvm/trunk/include/llvm/MC/MCParser/AsmLexer.h Message-ID: <20110211184544.6357C2A6C12C@llvm.org> Author: grosbach Date: Fri Feb 11 12:45:44 2011 New Revision: 125385 URL: http://llvm.org/viewvc/llvm-project?rev=125385&view=rev Log: Remove trailing whitespace. Modified: llvm/trunk/include/llvm/MC/MCParser/AsmLexer.h Modified: llvm/trunk/include/llvm/MC/MCParser/AsmLexer.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCParser/AsmLexer.h?rev=125385&r1=125384&r2=125385&view=diff ============================================================================== --- llvm/trunk/include/llvm/MC/MCParser/AsmLexer.h (original) +++ llvm/trunk/include/llvm/MC/MCParser/AsmLexer.h Fri Feb 11 12:45:44 2011 @@ -29,10 +29,10 @@ /// AsmLexer - Lexer class for assembly files. class AsmLexer : public MCAsmLexer { const MCAsmInfo &MAI; - + const char *CurPtr; const MemoryBuffer *CurBuf; - + void operator=(const AsmLexer&); // DO NOT IMPLEMENT AsmLexer(const AsmLexer&); // DO NOT IMPLEMENT @@ -43,13 +43,13 @@ public: AsmLexer(const MCAsmInfo &MAI); ~AsmLexer(); - + void setBuffer(const MemoryBuffer *buf, const char *ptr = NULL); - + virtual StringRef LexUntilEndOfStatement(); bool isAtStartOfComment(char Char); - + const MCAsmInfo &getMAI() const { return MAI; } private: @@ -64,7 +64,7 @@ AsmToken LexQuote(); AsmToken LexFloatLiteral(); }; - + } // end namespace llvm #endif From grosbach at apple.com Fri Feb 11 13:05:56 2011 From: grosbach at apple.com (Jim Grosbach) Date: Fri, 11 Feb 2011 19:05:56 -0000 Subject: [llvm-commits] [llvm] r125388 - in /llvm/trunk/lib/MC/MCParser: AsmLexer.cpp AsmParser.cpp Message-ID: <20110211190556.3898E2A6C12C@llvm.org> Author: grosbach Date: Fri Feb 11 13:05:56 2011 New Revision: 125388 URL: http://llvm.org/viewvc/llvm-project?rev=125388&view=rev Log: More whitespace cleanup... Modified: llvm/trunk/lib/MC/MCParser/AsmLexer.cpp llvm/trunk/lib/MC/MCParser/AsmParser.cpp Modified: llvm/trunk/lib/MC/MCParser/AsmLexer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCParser/AsmLexer.cpp?rev=125388&r1=125387&r2=125388&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCParser/AsmLexer.cpp (original) +++ llvm/trunk/lib/MC/MCParser/AsmLexer.cpp Fri Feb 11 13:05:56 2011 @@ -31,12 +31,12 @@ void AsmLexer::setBuffer(const MemoryBuffer *buf, const char *ptr) { CurBuf = buf; - + if (ptr) CurPtr = ptr; else CurPtr = CurBuf->getBufferStart(); - + TokStart = 0; } @@ -44,7 +44,7 @@ /// location. This is defined to always return AsmToken::Error. AsmToken AsmLexer::ReturnError(const char *Loc, const std::string &Msg) { SetError(SMLoc::getFromPointer(Loc), Msg); - + return AsmToken(AsmToken::Error, StringRef(Loc, 0)); } @@ -58,9 +58,9 @@ // a random nul in the file. Disambiguate that here. if (CurPtr-1 != CurBuf->getBufferEnd()) return 0; // Just whitespace. - + // Otherwise, return end of file. - --CurPtr; // Another call to lex will return EOF again. + --CurPtr; // Another call to lex will return EOF again. return EOF; } } @@ -106,11 +106,11 @@ while (IsIdentifierChar(*CurPtr)) ++CurPtr; - + // Handle . as a special case. if (CurPtr == TokStart+1 && TokStart[0] == '.') return AsmToken(AsmToken::Dot, StringRef(TokStart, 1)); - + return AsmToken(AsmToken::Identifier, StringRef(TokStart, CurPtr - TokStart)); } @@ -133,7 +133,7 @@ case '*': // End of the comment? if (CurPtr[0] != '/') break; - + ++CurPtr; // End the */. return LexToken(); } @@ -148,7 +148,7 @@ int CurChar = getNextChar(); while (CurChar != '\n' && CurChar != '\n' && CurChar != EOF) CurChar = getNextChar(); - + if (CurChar == EOF) return AsmToken(AsmToken::Eof, StringRef(CurPtr, 0)); return AsmToken(AsmToken::EndOfStatement, StringRef(CurPtr, 0)); @@ -191,14 +191,14 @@ return ReturnError(TokStart, "invalid decimal number"); Value = (long long)UValue; } - + // The darwin/x86 (and x86-64) assembler accepts and ignores ULL and LL // suffixes on integer literals. SkipIgnoredIntegerSuffix(CurPtr); - + return AsmToken(AsmToken::Integer, Result, Value); } - + if (*CurPtr == 'b') { ++CurPtr; // See if we actually have "0b" as part of something like "jmp 0b\n" @@ -210,30 +210,30 @@ const char *NumStart = CurPtr; while (CurPtr[0] == '0' || CurPtr[0] == '1') ++CurPtr; - + // Requires at least one binary digit. if (CurPtr == NumStart) return ReturnError(TokStart, "Invalid binary number"); - + StringRef Result(TokStart, CurPtr - TokStart); - + long long Value; if (Result.substr(2).getAsInteger(2, Value)) return ReturnError(TokStart, "Invalid binary number"); - + // The darwin/x86 (and x86-64) assembler accepts and ignores ULL and LL // suffixes on integer literals. SkipIgnoredIntegerSuffix(CurPtr); - + return AsmToken(AsmToken::Integer, Result, Value); } - + if (*CurPtr == 'x') { ++CurPtr; const char *NumStart = CurPtr; while (isxdigit(CurPtr[0])) ++CurPtr; - + // Requires at least one hex digit. if (CurPtr == NumStart) return ReturnError(CurPtr-2, "Invalid hexadecimal number"); @@ -241,28 +241,28 @@ unsigned long long Result; if (StringRef(TokStart, CurPtr - TokStart).getAsInteger(0, Result)) return ReturnError(TokStart, "Invalid hexadecimal number"); - + // The darwin/x86 (and x86-64) assembler accepts and ignores ULL and LL // suffixes on integer literals. SkipIgnoredIntegerSuffix(CurPtr); - + return AsmToken(AsmToken::Integer, StringRef(TokStart, CurPtr - TokStart), (int64_t)Result); } - + // Must be an octal number, it starts with 0. while (*CurPtr >= '0' && *CurPtr <= '7') ++CurPtr; - + StringRef Result(TokStart, CurPtr - TokStart); long long Value; if (Result.getAsInteger(8, Value)) return ReturnError(TokStart, "Invalid octal number"); - + // The darwin/x86 (and x86-64) assembler accepts and ignores ULL and LL // suffixes on integer literals. SkipIgnoredIntegerSuffix(CurPtr); - + return AsmToken(AsmToken::Integer, Result, Value); } @@ -298,7 +298,7 @@ } else Value = TokStart[1]; - return AsmToken(AsmToken::Integer, Res, Value); + return AsmToken(AsmToken::Integer, Res, Value); } @@ -311,13 +311,13 @@ // Allow \", etc. CurChar = getNextChar(); } - + if (CurChar == EOF) return ReturnError(TokStart, "unterminated string constant"); CurChar = getNextChar(); } - + return AsmToken(AsmToken::String, StringRef(TokStart, CurPtr - TokStart)); } @@ -343,7 +343,7 @@ TokStart = CurPtr; // This always consumes at least one character. int CurChar = getNextChar(); - + if (isAtStartOfComment(CurChar)) return LexLineComment(); @@ -352,7 +352,7 @@ // Handle identifier: [a-zA-Z_.][a-zA-Z0-9_$.@]* if (isalpha(CurChar) || CurChar == '_' || CurChar == '.') return LexIdentifier(); - + // Unknown character, emit an error. return ReturnError(TokStart, "invalid character in input"); case EOF: return AsmToken(AsmToken::Eof, StringRef(TokStart, 0)); @@ -378,20 +378,20 @@ case ',': return AsmToken(AsmToken::Comma, StringRef(TokStart, 1)); case '$': return AsmToken(AsmToken::Dollar, StringRef(TokStart, 1)); case '@': return AsmToken(AsmToken::At, StringRef(TokStart, 1)); - case '=': + case '=': if (*CurPtr == '=') return ++CurPtr, AsmToken(AsmToken::EqualEqual, StringRef(TokStart, 2)); return AsmToken(AsmToken::Equal, StringRef(TokStart, 1)); - case '|': + case '|': if (*CurPtr == '|') return ++CurPtr, AsmToken(AsmToken::PipePipe, StringRef(TokStart, 2)); return AsmToken(AsmToken::Pipe, StringRef(TokStart, 1)); case '^': return AsmToken(AsmToken::Caret, StringRef(TokStart, 1)); - case '&': + case '&': if (*CurPtr == '&') return ++CurPtr, AsmToken(AsmToken::AmpAmp, StringRef(TokStart, 2)); return AsmToken(AsmToken::Amp, StringRef(TokStart, 1)); - case '!': + case '!': if (*CurPtr == '=') return ++CurPtr, AsmToken(AsmToken::ExclaimEqual, StringRef(TokStart, 2)); return AsmToken(AsmToken::Exclaim, StringRef(TokStart, 1)); @@ -405,23 +405,23 @@ return LexDigit(); case '<': switch (*CurPtr) { - case '<': return ++CurPtr, AsmToken(AsmToken::LessLess, + case '<': return ++CurPtr, AsmToken(AsmToken::LessLess, StringRef(TokStart, 2)); - case '=': return ++CurPtr, AsmToken(AsmToken::LessEqual, + case '=': return ++CurPtr, AsmToken(AsmToken::LessEqual, StringRef(TokStart, 2)); - case '>': return ++CurPtr, AsmToken(AsmToken::LessGreater, + case '>': return ++CurPtr, AsmToken(AsmToken::LessGreater, StringRef(TokStart, 2)); default: return AsmToken(AsmToken::Less, StringRef(TokStart, 1)); } case '>': switch (*CurPtr) { - case '>': return ++CurPtr, AsmToken(AsmToken::GreaterGreater, + case '>': return ++CurPtr, AsmToken(AsmToken::GreaterGreater, StringRef(TokStart, 2)); - case '=': return ++CurPtr, AsmToken(AsmToken::GreaterEqual, + case '=': return ++CurPtr, AsmToken(AsmToken::GreaterEqual, StringRef(TokStart, 2)); default: return AsmToken(AsmToken::Greater, StringRef(TokStart, 1)); } - + // TODO: Quoted identifiers (objc methods etc) // local labels: [0-9][:] // Forward/backward labels: [0-9][fb] Modified: llvm/trunk/lib/MC/MCParser/AsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCParser/AsmParser.cpp?rev=125388&r1=125387&r2=125388&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCParser/AsmParser.cpp (original) +++ llvm/trunk/lib/MC/MCParser/AsmParser.cpp Fri Feb 11 13:05:56 2011 @@ -2233,7 +2233,7 @@ Register = getContext().getTargetAsmInfo().getDwarfRegNum(RegNo, true); } else return getParser().ParseAbsoluteExpression(Register); - + return false; } From nadav.rotem at intel.com Fri Feb 11 13:11:57 2011 From: nadav.rotem at intel.com (Nadav Rotem) Date: Fri, 11 Feb 2011 19:11:57 -0000 Subject: [llvm-commits] [llvm] r125389 - /llvm/trunk/README.txt Message-ID: <20110211191157.394712A6C12C@llvm.org> Author: nadav Date: Fri Feb 11 13:11:57 2011 New Revision: 125389 URL: http://llvm.org/viewvc/llvm-project?rev=125389&view=rev Log: Test commit. Modified: llvm/trunk/README.txt Modified: llvm/trunk/README.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/README.txt?rev=125389&r1=125388&r2=125389&view=diff ============================================================================== --- llvm/trunk/README.txt (original) +++ llvm/trunk/README.txt Fri Feb 11 13:11:57 2011 @@ -1,4 +1,4 @@ -\Low Level Virtual Machine (LLVM) +Low Level Virtual Machine (LLVM) ================================ This directory and its subdirectories contain source code for the Low Level From nadav.rotem at intel.com Fri Feb 11 13:20:38 2011 From: nadav.rotem at intel.com (Nadav Rotem) Date: Fri, 11 Feb 2011 19:20:38 -0000 Subject: [llvm-commits] [llvm] r125391 - /llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Message-ID: <20110211192038.217262A6C12C@llvm.org> Author: nadav Date: Fri Feb 11 13:20:37 2011 New Revision: 125391 URL: http://llvm.org/viewvc/llvm-project?rev=125391&view=rev Log: Fix #9190 The bug happens when the DAGCombiner attempts to optimize one of the patterns of the SUB opcode. It tries to create a zero of type v2i64. This type is legal on 32bit machines, but the initializer of this vector (i64) is target dependent. Currently, the initializer attempts to create an i64 zero constant, which fails. Added a flag to tell the DAGCombiner to create a legal zero, if we require that the pass would generate legal types. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=125391&r1=125390&r2=125391&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Fri Feb 11 13:20:37 2011 @@ -1533,7 +1533,7 @@ // fold (sub x, x) -> 0 if (N0 == N1) - return DAG.getConstant(0, N->getValueType(0)); + return DAG.getConstant(0, N->getValueType(0), LegalTypes); // fold (sub c1, c2) -> c1-c2 if (N0C && N1C) return DAG.FoldConstantArithmetic(ISD::SUB, VT, N0C, N1C); From nadav.rotem at intel.com Fri Feb 11 13:39:34 2011 From: nadav.rotem at intel.com (Rotem, Nadav) Date: Fri, 11 Feb 2011 21:39:34 +0200 Subject: [llvm-commits] Patch review #9165 Message-ID: <6594DDFF12B03D4E89690887C24869940270CCABBB@hasmsx504.ger.corp.intel.com> Hi, This is a fix for #9165. http://llvm.org/bugs/show_bug.cgi?id=9165 The problem appeared between 2.7 and 2.8 and is still in the LLVM trunk. After the 2.7 release some code was added in X86ISelLowering: // For SSE 4.1, use insertps to put the high elements into the low element. if (getSubtarget()->hasSSE41()) { ... This optimization created a new pattern, which was previously unexpected. The pattern was a lowering of the BUILD_VECTOR operation to a sequence of simple BUILD_VECTOR (all zero or undef) and a sequence of insert-elements. The next stage, the DAGCombining, is the last stage before the instruction selection. This phase found the new pattern and created a complex BUILD_VECTOR, which was illegal. The last-phase dag-combining is only allowed to create legal instructions. In my patch I added a check that the new pattern is only optimized if we are in the LegalOperations mode, which is allowed to crate illegal instructions such as the one we encountered. Patch: Index: DAGCombiner.cpp =================================================================== --- DAGCombiner.cpp (revision 124985) +++ DAGCombiner.cpp (working copy) @@ -6377,7 +6377,8 @@ // If the invec is a BUILD_VECTOR and if EltNo is a constant, build a new // vector with the inserted element. - if (InVec.getOpcode() == ISD::BUILD_VECTOR && isa(EltNo)) { + if (!LegalOperations && InVec.getOpcode() == ISD::BUILD_VECTOR && + isa(EltNo)) { unsigned Elt = cast(EltNo)->getZExtValue(); SmallVector Ops(InVec.getNode()->op_begin(), InVec.getNode()->op_end()); --------------------------------------------------------------------- Intel Israel (74) Limited This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). Any review or distribution by others is strictly prohibited. If you are not the intended recipient, please contact the sender and delete all copies. -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110211/3057bcab/attachment.html From nadav.rotem at intel.com Fri Feb 11 13:37:55 2011 From: nadav.rotem at intel.com (Nadav Rotem) Date: Fri, 11 Feb 2011 19:37:55 -0000 Subject: [llvm-commits] [llvm] r125393 - in /llvm/trunk: lib/VMCore/ConstantFold.cpp test/Transforms/InstCombine/bitcast-vec-uniform.ll test/Transforms/InstCombine/fold-vector-select.ll Message-ID: <20110211193756.00C782A6C12C@llvm.org> Author: nadav Date: Fri Feb 11 13:37:55 2011 New Revision: 125393 URL: http://llvm.org/viewvc/llvm-project?rev=125393&view=rev Log: Fix 9173. Add more folding patterns to constant expressions of vector selects and vector bitcasts. Added: llvm/trunk/test/Transforms/InstCombine/bitcast-vec-uniform.ll (with props) llvm/trunk/test/Transforms/InstCombine/fold-vector-select.ll (with props) Modified: llvm/trunk/lib/VMCore/ConstantFold.cpp Modified: llvm/trunk/lib/VMCore/ConstantFold.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/ConstantFold.cpp?rev=125393&r1=125392&r2=125393&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/ConstantFold.cpp (original) +++ llvm/trunk/lib/VMCore/ConstantFold.cpp Fri Feb 11 13:37:55 2011 @@ -42,6 +42,10 @@ /// input vector constant are all simple integer or FP values. static Constant *BitCastConstantVector(ConstantVector *CV, const VectorType *DstTy) { + + if (CV->isAllOnesValue()) return Constant::getAllOnesValue(DstTy); + if (CV->isNullValue()) return Constant::getNullValue(DstTy); + // If this cast changes element count then we can't handle it here: // doing so requires endianness information. This should be handled by // Analysis/ConstantFolding.cpp @@ -689,6 +693,42 @@ if (ConstantInt *CB = dyn_cast(Cond)) return CB->getZExtValue() ? V1 : V2; + // Check for zero aggregate and ConstantVector of zeros + if (Cond->isNullValue()) return V2; + + if (ConstantVector* CondV = dyn_cast(Cond)) { + + if (CondV->isAllOnesValue()) return V1; + + const VectorType *VTy = cast(V1->getType()); + ConstantVector *CP1 = dyn_cast(V1); + ConstantVector *CP2 = dyn_cast(V2); + + if ((CP1 || isa(V1)) && + (CP2 || isa(V2))) { + + // Find the element type of the returned vector + const Type *EltTy = VTy->getElementType(); + unsigned NumElem = VTy->getNumElements(); + std::vector Res(NumElem); + + bool Valid = true; + for (unsigned i = 0; i < NumElem; ++i) { + ConstantInt* c = dyn_cast(CondV->getOperand(i)); + if (!c) { + Valid = false; + break; + } + Constant *C1 = CP1 ? CP1->getOperand(i) : Constant::getNullValue(EltTy); + Constant *C2 = CP2 ? CP2->getOperand(i) : Constant::getNullValue(EltTy); + Res[i] = c->getZExtValue() ? C1 : C2; + } + // If we were able to build the vector, return it + if (Valid) return ConstantVector::get(Res); + } + } + + if (isa(V1)) return V2; if (isa(V2)) return V1; if (isa(Cond)) return V1; Added: llvm/trunk/test/Transforms/InstCombine/bitcast-vec-uniform.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/bitcast-vec-uniform.ll?rev=125393&view=auto ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/bitcast-vec-uniform.ll (added) +++ llvm/trunk/test/Transforms/InstCombine/bitcast-vec-uniform.ll Fri Feb 11 13:37:55 2011 @@ -0,0 +1,14 @@ +; RUN: opt < %s -instcombine -S | not grep bitcast + +define <4 x i32> @a(<1 x i64> %y) { + %c = bitcast <2 x i64> to <4 x i32> + ret <4 x i32> %c +} + +define <4 x i32> @b(<1 x i64> %y) { + %c = bitcast <2 x i64> to <4 x i32> + ret <4 x i32> %c +} + + + Propchange: llvm/trunk/test/Transforms/InstCombine/bitcast-vec-uniform.ll ------------------------------------------------------------------------------ svn:eol-style = native Added: llvm/trunk/test/Transforms/InstCombine/fold-vector-select.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/fold-vector-select.ll?rev=125393&view=auto ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/fold-vector-select.ll (added) +++ llvm/trunk/test/Transforms/InstCombine/fold-vector-select.ll Fri Feb 11 13:37:55 2011 @@ -0,0 +1,13 @@ +; RUN: opt < %s -instcombine -S | not grep select + +define void @foo(<4 x i32> *%A, <4 x i32> *%B, <4 x i32> *%C, <4 x i32> *%D) { + %r = select <4 x i1> , <4 x i32> , <4 x i32> zeroinitializer + %g = select <4 x i1> , <4 x i32> zeroinitializer, <4 x i32> + %b = select <4 x i1> , <4 x i32> zeroinitializer, <4 x i32> + %a = select <4 x i1> zeroinitializer, <4 x i32> zeroinitializer, <4 x i32> + store <4 x i32> %r, <4 x i32>* %A + store <4 x i32> %g, <4 x i32>* %B + store <4 x i32> %b, <4 x i32>* %C + store <4 x i32> %a, <4 x i32>* %D + ret void +} Propchange: llvm/trunk/test/Transforms/InstCombine/fold-vector-select.ll ------------------------------------------------------------------------------ svn:eol-style = native From rafael.espindola at gmail.com Fri Feb 11 13:59:54 2011 From: rafael.espindola at gmail.com (Rafael Avila de Espindola) Date: Fri, 11 Feb 2011 14:59:54 -0500 Subject: [llvm-commits] [patch] Refactoring of the llvm mangler Message-ID: <4D55953A.2070809@gmail.com> My first idea for fixing PR9177 involved having clang know all about assembly names. Anton pointed me at how llvm-gcc does it and I think a similar hack might be sufficient. In any case, I wrote a refactoring patch for the llvm mangler that might be a good thing even if it is not needed for PR9177. The patch changes the mangler to use streams and explicitly separates the add prefix, mangle the name proper and add suffix steps. This makes it easier to identify (and maybe drop) some of its strange features. It also fixes the "FIXME: This logic seems unlikely to be right." :-) Cheers, Rafael -------------- next part -------------- A non-text attachment was scrubbed... Name: refactor.patch Type: text/x-patch Size: 22547 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110211/6418fa49/attachment.bin From nadav.rotem at intel.com Fri Feb 11 13:57:47 2011 From: nadav.rotem at intel.com (Nadav Rotem) Date: Fri, 11 Feb 2011 19:57:47 -0000 Subject: [llvm-commits] [llvm] r125398 - /llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Message-ID: <20110211195748.091E32A6C12C@llvm.org> Author: nadav Date: Fri Feb 11 13:57:47 2011 New Revision: 125398 URL: http://llvm.org/viewvc/llvm-project?rev=125398&view=rev Log: SimplifySelectOps can only handle selects with a scalar condition. Add a check that the condition is not a vector. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=125398&r1=125397&r2=125398&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Fri Feb 11 13:57:47 2011 @@ -6872,6 +6872,9 @@ bool DAGCombiner::SimplifySelectOps(SDNode *TheSelect, SDValue LHS, SDValue RHS) { + // Cannot simplify select with vector condition + if (TheSelect->getOperand(0).getValueType().isVector()) return false; + // If this is a select from two identical things, try to pull the operation // through the select. if (LHS.getOpcode() != RHS.getOpcode() || From baldrick at free.fr Fri Feb 11 14:27:46 2011 From: baldrick at free.fr (Duncan Sands) Date: Fri, 11 Feb 2011 21:27:46 +0100 Subject: [llvm-commits] [llvm] r125398 - /llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp In-Reply-To: <20110211195748.091E32A6C12C@llvm.org> References: <20110211195748.091E32A6C12C@llvm.org> Message-ID: <4D559BC2.1050300@free.fr> > SimplifySelectOps can only handle selects with a scalar condition. Add a check > that the condition is not a vector. Testcase? Ciao, Duncan. From rafael.espindola at gmail.com Fri Feb 11 14:34:34 2011 From: rafael.espindola at gmail.com (Rafael Avila de Espindola) Date: Fri, 11 Feb 2011 15:34:34 -0500 Subject: [llvm-commits] [PATCH] [MC] .pushsection / .popsection support In-Reply-To: <20110210211433.GA27552@britannica.bec.de> References: <20110209202852.GA10573@britannica.bec.de> <20110209214037.GA14074@britannica.bec.de> <20110210211433.GA27552@britannica.bec.de> Message-ID: <4D559D5A.5060607@gmail.com> Can CurSection and PrevSection be removed and the getters just return the top of the stacks? I like the factoring that the SwitchSection/ChangeSection split introduces. ChangeSection has to be public because of the logging streamer, right? The patch is OK. Daniel, do you think that the Logging streamer is still a useful feature? > Joerg Cheers, Rafael From natebegeman at mac.com Fri Feb 11 14:53:29 2011 From: natebegeman at mac.com (Nate Begeman) Date: Fri, 11 Feb 2011 20:53:29 -0000 Subject: [llvm-commits] [llvm] r125402 - in /llvm/trunk: lib/Target/ARM/ARMISelLowering.cpp test/CodeGen/ARM/neon_div.ll Message-ID: <20110211205329.C21222A6C12C@llvm.org> Author: sampo Date: Fri Feb 11 14:53:29 2011 New Revision: 125402 URL: http://llvm.org/viewvc/llvm-project?rev=125402&view=rev Log: Implement sdiv & udiv for <4 x i16> and <8 x i8> NEON vector types. This avoids moving each element to the integer register file and calling __divsi3 etc. on it. Added: llvm/trunk/test/CodeGen/ARM/neon_div.ll Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=125402&r1=125401&r2=125402&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Fri Feb 11 14:53:29 2011 @@ -454,6 +454,11 @@ setOperationAction(ISD::MUL, MVT::v8i16, Custom); setOperationAction(ISD::MUL, MVT::v4i32, Custom); setOperationAction(ISD::MUL, MVT::v2i64, Custom); + // Custom handling for some vector types to avoid expensive expansions + setOperationAction(ISD::SDIV, MVT::v4i16, Custom); + setOperationAction(ISD::SDIV, MVT::v8i8, Custom); + setOperationAction(ISD::UDIV, MVT::v4i16, Custom); + setOperationAction(ISD::UDIV, MVT::v8i8, Custom); setOperationAction(ISD::VSETCC, MVT::v1i64, Expand); setOperationAction(ISD::VSETCC, MVT::v2i64, Expand); @@ -4285,6 +4290,181 @@ return DAG.getNode(NewOpc, DL, VT, Op0, Op1); } +static SDValue +LowerSDIV_v4i8(SDValue X, SDValue Y, DebugLoc dl, SelectionDAG &DAG) { + // Convert to float + // float4 xf = vcvt_f32_s32(vmovl_s16(a.lo)); + // float4 yf = vcvt_f32_s32(vmovl_s16(b.lo)); + X = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v4i32, X); + Y = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v4i32, Y); + X = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, X); + Y = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, Y); + // Get reciprocal estimate. + // float4 recip = vrecpeq_f32(yf); + Y = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, + DAG.getConstant(Intrinsic::arm_neon_vrecpe, MVT::i32), Y); + // Because char has a smaller range than uchar, we can actually get away + // without any newton steps. This requires that we use a weird bias + // of 0xb000, however (again, this has been exhaustively tested). + // float4 result = as_float4(as_int4(xf*recip) + 0xb000); + X = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, X, Y); + X = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, X); + Y = DAG.getConstant(0xb000, MVT::i32); + Y = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32, Y, Y, Y, Y); + X = DAG.getNode(ISD::ADD, dl, MVT::v4i32, X, Y); + X = DAG.getNode(ISD::BITCAST, dl, MVT::v4f32, X); + // Convert back to short. + X = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::v4i32, X); + X = DAG.getNode(ISD::TRUNCATE, dl, MVT::v4i16, X); + return X; +} + +static SDValue +LowerSDIV_v4i16(SDValue N0, SDValue N1, DebugLoc dl, SelectionDAG &DAG) { + SDValue N2; + // Convert to float. + // float4 yf = vcvt_f32_s32(vmovl_s16(y)); + // float4 xf = vcvt_f32_s32(vmovl_s16(x)); + N0 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v4i32, N0); + N1 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v4i32, N1); + N0 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N0); + N1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N1); + + // Use reciprocal estimate and one refinement step. + // float4 recip = vrecpeq_f32(yf); + // recip *= vrecpsq_f32(yf, recip); + N2 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, + DAG.getConstant(Intrinsic::arm_neon_vrecpe, MVT::i32), N1); + N1 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, + DAG.getConstant(Intrinsic::arm_neon_vrecps, MVT::i32), + N1, N2); + N2 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N1, N2); + // Because short has a smaller range than ushort, we can actually get away + // with only a single newton step. This requires that we use a weird bias + // of 89, however (again, this has been exhaustively tested). + // float4 result = as_float4(as_int4(xf*recip) + 89); + N0 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N0, N2); + N0 = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, N0); + N1 = DAG.getConstant(89, MVT::i32); + N1 = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32, N1, N1, N1, N1); + N0 = DAG.getNode(ISD::ADD, dl, MVT::v4i32, N0, N1); + N0 = DAG.getNode(ISD::BITCAST, dl, MVT::v4f32, N0); + // Convert back to integer and return. + // return vmovn_s32(vcvt_s32_f32(result)); + N0 = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::v4i32, N0); + N0 = DAG.getNode(ISD::TRUNCATE, dl, MVT::v4i16, N0); + return N0; +} + +static SDValue LowerSDIV(SDValue Op, SelectionDAG &DAG) { + EVT VT = Op.getValueType(); + assert((VT == MVT::v4i16 || VT == MVT::v8i8) && + "unexpected type for custom-lowering ISD::SDIV"); + + DebugLoc dl = Op.getDebugLoc(); + SDValue N0 = Op.getOperand(0); + SDValue N1 = Op.getOperand(1); + SDValue N2, N3; + + if (VT == MVT::v8i8) { + N0 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v8i16, N0); + N1 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v8i16, N1); + + N2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0, + DAG.getIntPtrConstant(4)); + N3 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1, + DAG.getIntPtrConstant(4)); + N0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0, + DAG.getIntPtrConstant(0)); + N1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1, + DAG.getIntPtrConstant(0)); + + N0 = LowerSDIV_v4i8(N0, N1, dl, DAG); // v4i16 + N2 = LowerSDIV_v4i8(N2, N3, dl, DAG); // v4i16 + + N0 = DAG.getNode(ISD::CONCAT_VECTORS, dl, MVT::v8i16, N0, N2); + N0 = LowerCONCAT_VECTORS(N0, DAG); + + N0 = DAG.getNode(ISD::TRUNCATE, dl, MVT::v8i8, N0); + return N0; + } + return LowerSDIV_v4i16(N0, N1, dl, DAG); +} + +static SDValue LowerUDIV(SDValue Op, SelectionDAG &DAG) { + EVT VT = Op.getValueType(); + assert((VT == MVT::v4i16 || VT == MVT::v8i8) && + "unexpected type for custom-lowering ISD::UDIV"); + + DebugLoc dl = Op.getDebugLoc(); + SDValue N0 = Op.getOperand(0); + SDValue N1 = Op.getOperand(1); + SDValue N2, N3; + + if (VT == MVT::v8i8) { + N0 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::v8i16, N0); + N1 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::v8i16, N1); + + N2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0, + DAG.getIntPtrConstant(4)); + N3 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1, + DAG.getIntPtrConstant(4)); + N0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0, + DAG.getIntPtrConstant(0)); + N1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1, + DAG.getIntPtrConstant(0)); + + N0 = LowerSDIV_v4i16(N0, N1, dl, DAG); // v4i16 + N2 = LowerSDIV_v4i16(N2, N3, dl, DAG); // v4i16 + + N0 = DAG.getNode(ISD::CONCAT_VECTORS, dl, MVT::v8i16, N0, N2); + N0 = LowerCONCAT_VECTORS(N0, DAG); + + N0 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v8i8, + DAG.getConstant(Intrinsic::arm_neon_vqmovnsu, MVT::i32), + N0); + return N0; + } + + // v4i16 sdiv ... Convert to float. + // float4 yf = vcvt_f32_s32(vmovl_u16(y)); + // float4 xf = vcvt_f32_s32(vmovl_u16(x)); + N0 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::v4i32, N0); + N1 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::v4i32, N1); + N0 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N0); + N1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N1); + + // Use reciprocal estimate and two refinement steps. + // float4 recip = vrecpeq_f32(yf); + // recip *= vrecpsq_f32(yf, recip); + // recip *= vrecpsq_f32(yf, recip); + N2 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, + DAG.getConstant(Intrinsic::arm_neon_vrecpe, MVT::i32), N1); + N1 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, + DAG.getConstant(Intrinsic::arm_neon_vrecps, MVT::i32), + N1, N2); + N2 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N1, N2); + N1 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, + DAG.getConstant(Intrinsic::arm_neon_vrecps, MVT::i32), + N1, N2); + N2 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N1, N2); + // Simply multiplying by the reciprocal estimate can leave us a few ulps + // too low, so we add 2 ulps (exhaustive testing shows that this is enough, + // and that it will never cause us to return an answer too large). + // float4 result = as_float4(as_int4(xf*recip) + 89); + N0 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N0, N2); + N0 = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, N0); + N1 = DAG.getConstant(2, MVT::i32); + N1 = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32, N1, N1, N1, N1); + N0 = DAG.getNode(ISD::ADD, dl, MVT::v4i32, N0, N1); + N0 = DAG.getNode(ISD::BITCAST, dl, MVT::v4f32, N0); + // Convert back to integer and return. + // return vmovn_u32(vcvt_s32_f32(result)); + N0 = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::v4i32, N0); + N0 = DAG.getNode(ISD::TRUNCATE, dl, MVT::v4i16, N0); + return N0; +} + SDValue ARMTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const { switch (Op.getOpcode()) { default: llvm_unreachable("Don't know how to custom lower this!"); @@ -4329,6 +4509,8 @@ case ISD::CONCAT_VECTORS: return LowerCONCAT_VECTORS(Op, DAG); case ISD::FLT_ROUNDS_: return LowerFLT_ROUNDS_(Op, DAG); case ISD::MUL: return LowerMUL(Op, DAG); + case ISD::SDIV: return LowerSDIV(Op, DAG); + case ISD::UDIV: return LowerUDIV(Op, DAG); } return SDValue(); } Added: llvm/trunk/test/CodeGen/ARM/neon_div.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/neon_div.ll?rev=125402&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/ARM/neon_div.ll (added) +++ llvm/trunk/test/CodeGen/ARM/neon_div.ll Fri Feb 11 14:53:29 2011 @@ -0,0 +1,48 @@ +; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s + +define <8 x i8> @sdivi8(<8 x i8>* %A, <8 x i8>* %B) nounwind { +;CHECK: vrecpe.f32 +;CHECK: vrecpe.f32 +;CHECK: vmovn.i32 +;CHECK: vmovn.i32 +;CHECK: vmovn.i16 + %tmp1 = load <8 x i8>* %A + %tmp2 = load <8 x i8>* %B + %tmp3 = sdiv <8 x i8> %tmp1, %tmp2 + ret <8 x i8> %tmp3 +} + +define <8 x i8> @udivi8(<8 x i8>* %A, <8 x i8>* %B) nounwind { +;CHECK: vrecpe.f32 +;CHECK: vrecps.f32 +;CHECK: vrecpe.f32 +;CHECK: vrecps.f32 +;CHECK: vmovn.i32 +;CHECK: vmovn.i32 +;CHECK: vqmovun.s16 + %tmp1 = load <8 x i8>* %A + %tmp2 = load <8 x i8>* %B + %tmp3 = udiv <8 x i8> %tmp1, %tmp2 + ret <8 x i8> %tmp3 +} + +define <4 x i16> @sdivi16(<4 x i16>* %A, <4 x i16>* %B) nounwind { +;CHECK: vrecpe.f32 +;CHECK: vrecps.f32 +;CHECK: vmovn.i32 + %tmp1 = load <4 x i16>* %A + %tmp2 = load <4 x i16>* %B + %tmp3 = sdiv <4 x i16> %tmp1, %tmp2 + ret <4 x i16> %tmp3 +} + +define <4 x i16> @udivi16(<4 x i16>* %A, <4 x i16>* %B) nounwind { +;CHECK: vrecpe.f32 +;CHECK: vrecps.f32 +;CHECK: vrecps.f32 +;CHECK: vmovn.i32 + %tmp1 = load <4 x i16>* %A + %tmp2 = load <4 x i16>* %B + %tmp3 = udiv <4 x i16> %tmp1, %tmp2 + ret <4 x i16> %tmp3 +} From daniel at zuster.org Fri Feb 11 15:03:41 2011 From: daniel at zuster.org (Daniel Dunbar) Date: Fri, 11 Feb 2011 21:03:41 -0000 Subject: [llvm-commits] [zorg] r125404 - /zorg/trunk/zorg/buildbot/builders/ClangBuilder.py Message-ID: <20110211210341.DF3F82A6C12C@llvm.org> Author: ddunbar Date: Fri Feb 11 15:03:41 2011 New Revision: 125404 URL: http://llvm.org/viewvc/llvm-project?rev=125404&view=rev Log: buildbot: Tweak buildbot configs for working with clang-tests repo. Modified: zorg/trunk/zorg/buildbot/builders/ClangBuilder.py Modified: zorg/trunk/zorg/buildbot/builders/ClangBuilder.py URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/zorg/buildbot/builders/ClangBuilder.py?rev=125404&r1=125403&r2=125404&view=diff ============================================================================== --- zorg/trunk/zorg/buildbot/builders/ClangBuilder.py (original) +++ zorg/trunk/zorg/buildbot/builders/ClangBuilder.py Fri Feb 11 15:03:41 2011 @@ -12,7 +12,7 @@ from zorg.buildbot.commands.BatchFileDownload import BatchFileDownload from zorg.buildbot.commands import DejaGNUCommand -from Util import getConfigArgs +from zorg.buildbot.builders.Util import getConfigArgs def getClangBuildFactory(triple=None, clean=True, test=True, package_dst=None, run_cxx_tests=False, examples=False, valgrind=False, @@ -346,16 +346,17 @@ return f -def addClangTests(f, ignores={}): +def addClangTests(f, ignores={}, install_prefix="%(builddir)s/llvm.install", + languages = ('gcc', 'g++', 'objc', 'obj-c++')): make_vars = [WithProperties( - 'CC_UNDER_TEST=%(builddir)s/llvm.install/bin/clang'), + 'CC_UNDER_TEST=%s/bin/clang' % install_prefix), WithProperties( - 'CXX_UNDER_TEST=%(builddir)s/llvm.install/bin/clang++')] + 'CXX_UNDER_TEST=%s/bin/clang++' % install_prefix)] f.addStep(SVN(name='svn-clang-tests', mode='update', baseURL='http://llvm.org/svn/llvm-project/clang-tests/', defaultBranch='trunk', workdir='clang-tests')) gcc_dg_ignores = ignores.get('gcc-4_2-testsuite', {}) - for lang in ('gcc', 'g++', 'objc', 'obj-c++'): + for lang in languages: f.addStep(DejaGNUCommand.DejaGNUCommand( name='test-gcc-4_2-testsuite-%s' % lang, command=["make", "-k", "check-%s" % lang] + make_vars, @@ -363,3 +364,27 @@ workdir='clang-tests/gcc-4_2-testsuite', logfiles={ 'dg.sum' : 'obj/%s/%s.sum' % (lang, lang) }, ignore=gcc_dg_ignores.get(lang, []))) + +def getClangTestsIgnoresFromPath(path, key): + def readList(path): + if not os.path.exists(path): + return [] + + f = open(path) + lines = [ln.strip() for ln in f] + f.close() + return lines + + ignores = {} + + gcc_dg_ignores = {} + for lang in ('gcc', 'g++', 'objc', 'obj-c++'): + lang_path = os.path.join(path, 'gcc-4_2-testsuite', 'expected_results', + key, lang) + gcc_dg_ignores[lang] = ( + readList(os.path.join(lang_path, 'FAIL.txt')) + + readList(os.path.join(lang_path, 'UNRESOLVED.txt')) + + readList(os.path.join(lang_path, 'XPASS.txt'))) + ignores['gcc-4_2-testsuite' ] = gcc_dg_ignores + + return ignores From evan.cheng at apple.com Fri Feb 11 15:13:03 2011 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 11 Feb 2011 13:13:03 -0800 Subject: [llvm-commits] [llvm] r125357 - in /llvm/trunk: lib/Target/ARM/ARMISelLowering.cpp test/CodeGen/ARM/fcopysign.ll In-Reply-To: References: <20110211022855.E909E2A6C12C@llvm.org> Message-ID: <822BB772-9148-488D-A914-67F484BBB1DF@apple.com> On Feb 10, 2011, at 9:51 PM, Chris Lattner wrote: > > On Feb 10, 2011, at 6:28 PM, Evan Cheng wrote: > >> Author: evancheng >> Date: Thu Feb 10 20:28:55 2011 >> New Revision: 125357 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=125357&view=rev >> Log: >> Fix buggy fcopysign lowering. >> This >> define float @foo(float %x, float %y) nounwind readnone { >> entry: >> %0 = tail call float @copysignf(float %x, float %y) nounwind readnone >> ret float %0 >> } > > Hey Evan, > > Is there something wrong with the generic lowering code for copysign? Why does arm have its own implementation? > > -Chris The generic implementation isn't going to be performant. The custom lowering make use of ARM specific nodes to split / combine D registers to / from GPRs when it's profitable. Evan From wan at google.com Fri Feb 11 15:24:40 2011 From: wan at google.com (Zhanyong Wan) Date: Fri, 11 Feb 2011 21:24:40 -0000 Subject: [llvm-commits] [llvm] r125406 - in /llvm/trunk: include/llvm/Support/PathV2.h lib/Support/PathV2.cpp unittests/Support/Path.cpp Message-ID: <20110211212440.88A712A6C12C@llvm.org> Author: wan Date: Fri Feb 11 15:24:40 2011 New Revision: 125406 URL: http://llvm.org/viewvc/llvm-project?rev=125406&view=rev Log: Adds llvm::sys::path::is_separator() to test whether a char is a path separator on the host OS. Reviewed by dgregor. Modified: llvm/trunk/include/llvm/Support/PathV2.h llvm/trunk/lib/Support/PathV2.cpp llvm/trunk/unittests/Support/Path.cpp Modified: llvm/trunk/include/llvm/Support/PathV2.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/PathV2.h?rev=125406&r1=125405&r2=125406&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/PathV2.h (original) +++ llvm/trunk/include/llvm/Support/PathV2.h Fri Feb 11 15:24:40 2011 @@ -258,6 +258,12 @@ /// @result The extension of \a path. const StringRef extension(StringRef path); +/// @brief Check whether the given char is a path separator on the host OS. +/// +/// @param value a character +/// @result true if \a value is a path separator character on the host OS +bool is_separator(char value); + /// @brief Has root name? /// /// root_name != "" Modified: llvm/trunk/lib/Support/PathV2.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/PathV2.cpp?rev=125406&r1=125405&r2=125406&view=diff ============================================================================== --- llvm/trunk/lib/Support/PathV2.cpp (original) +++ llvm/trunk/lib/Support/PathV2.cpp Fri Feb 11 15:24:40 2011 @@ -20,16 +20,7 @@ namespace { using llvm::StringRef; - - bool is_separator(const char value) { - switch(value) { -#ifdef LLVM_ON_WIN32 - case '\\': // fall through -#endif - case '/': return true; - default: return false; - } - } + using llvm::sys::path::is_separator; #ifdef LLVM_ON_WIN32 const StringRef separators = "\\/"; @@ -154,7 +145,7 @@ return end_pos; } -} +} // end unnamed namespace namespace llvm { namespace sys { @@ -483,6 +474,16 @@ return fname.substr(pos); } +bool is_separator(char value) { + switch(value) { +#ifdef LLVM_ON_WIN32 + case '\\': // fall through +#endif + case '/': return true; + default: return false; + } +} + bool has_root_name(const Twine &path) { SmallString<128> path_storage; StringRef p = path.toStringRef(path_storage); @@ -737,7 +738,7 @@ return success; } -} +} // end unnamed namespace error_code remove_all(const Twine &path, uint32_t &num_removed) { SmallString<128> path_storage; Modified: llvm/trunk/unittests/Support/Path.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/Support/Path.cpp?rev=125406&r1=125405&r2=125406&view=diff ============================================================================== --- llvm/trunk/unittests/Support/Path.cpp (original) +++ llvm/trunk/unittests/Support/Path.cpp Fri Feb 11 15:24:40 2011 @@ -29,6 +29,19 @@ namespace { +TEST(is_separator, Works) { + EXPECT_TRUE(path::is_separator('/')); + EXPECT_FALSE(path::is_separator('\0')); + EXPECT_FALSE(path::is_separator('-')); + EXPECT_FALSE(path::is_separator(' ')); + +#ifdef LLVM_ON_WIN32 + EXPECT_TRUE(path::is_separator('\\')); +#else + EXPECT_FALSE(path::is_separator('\\')); +#endif +} + TEST(Support, Path) { SmallVector paths; paths.push_back(""); From grosbach at apple.com Fri Feb 11 15:31:55 2011 From: grosbach at apple.com (Jim Grosbach) Date: Fri, 11 Feb 2011 21:31:55 -0000 Subject: [llvm-commits] [llvm] r125408 - /llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp Message-ID: <20110211213155.4DA542A6C12C@llvm.org> Author: grosbach Date: Fri Feb 11 15:31:55 2011 New Revision: 125408 URL: http://llvm.org/viewvc/llvm-project?rev=125408&view=rev Log: Tidy out asm matcher .inc output. Modified: llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp Modified: llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp?rev=125408&r1=125407&r2=125408&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp Fri Feb 11 15:31:55 2011 @@ -2110,7 +2110,7 @@ // Information for the class declaration. OS << "\n#ifdef GET_ASSEMBLER_HEADER\n"; OS << "#undef GET_ASSEMBLER_HEADER\n"; - OS << " // This should be included into the middle of the declaration of \n"; + OS << " // This should be included into the middle of the declaration of\n"; OS << " // your subclasses implementation of TargetAsmParser.\n"; OS << " unsigned ComputeAvailableFeatures(const " << Target.getName() << "Subtarget *Subtarget) const;\n"; @@ -2291,7 +2291,7 @@ OS << " // Some state to try to produce better error messages.\n"; OS << " bool HadMatchOtherThanFeatures = false;\n\n"; - OS << " // Set ErrorInfo to the operand that mismatches if it is \n"; + OS << " // Set ErrorInfo to the operand that mismatches if it is\n"; OS << " // wrong for all instances of the instruction.\n"; OS << " ErrorInfo = ~0U;\n"; From sabre at nondot.org Fri Feb 11 15:37:43 2011 From: sabre at nondot.org (Chris Lattner) Date: Fri, 11 Feb 2011 21:37:43 -0000 Subject: [llvm-commits] [llvm] r125409 - /llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp Message-ID: <20110211213743.407C62A6C12C@llvm.org> Author: lattner Date: Fri Feb 11 15:37:43 2011 New Revision: 125409 URL: http://llvm.org/viewvc/llvm-project?rev=125409&view=rev Log: When lowering an inbounds gep, the intermediate adds can have unsigned overflow (e.g. due to a negative array index), but the scales on array size multiplications are known to not sign wrap. Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp?rev=125409&r1=125408&r2=125409&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp Fri Feb 11 15:37:43 2011 @@ -420,8 +420,7 @@ if (Size) Result = Builder->CreateAdd(Result, ConstantInt::get(IntPtrTy, Size), - GEP->getName()+".offs", - isInBounds /*NUW*/); + GEP->getName()+".offs"); continue; } @@ -430,8 +429,7 @@ ConstantExpr::getIntegerCast(OpC, IntPtrTy, true /*SExt*/); Scale = ConstantExpr::getMul(OC, Scale, isInBounds/*NUW*/); // Emit an add instruction. - Result = Builder->CreateAdd(Result, Scale, GEP->getName()+".offs", - isInBounds /*NUW*/); + Result = Builder->CreateAdd(Result, Scale, GEP->getName()+".offs"); continue; } // Convert to correct type. @@ -444,8 +442,7 @@ } // Emit an add instruction. - Result = Builder->CreateAdd(Op, Result, GEP->getName()+".offs", - isInBounds /*NUW*/); + Result = Builder->CreateAdd(Op, Result, GEP->getName()+".offs"); } return Result; } From sabre at nondot.org Fri Feb 11 15:43:33 2011 From: sabre at nondot.org (Chris Lattner) Date: Fri, 11 Feb 2011 21:43:33 -0000 Subject: [llvm-commits] [llvm] r125410 - in /llvm/trunk: lib/Analysis/ScalarEvolution.cpp test/Analysis/ScalarEvolution/nsw.ll Message-ID: <20110211214333.C017F2A6C12C@llvm.org> Author: lattner Date: Fri Feb 11 15:43:33 2011 New Revision: 125410 URL: http://llvm.org/viewvc/llvm-project?rev=125410&view=rev Log: Per discussion with Dan G, inbounds geps *certainly* can have unsigned overflow (e.g. "gep P, -1"), and while they can have signed wrap in theoretical situations, modelling an AddRec as not having signed wrap is going enough for any case we can think of today. In the future if this isn't enough, we can revisit this. Modeling them as having NUW isn't causing any known problems either FWIW. Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp llvm/trunk/test/Analysis/ScalarEvolution/nsw.ll Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=125410&r1=125409&r2=125410&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original) +++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Fri Feb 11 15:43:33 2011 @@ -2785,10 +2785,21 @@ HasNSW = true; } else if (const GEPOperator *GEP = dyn_cast(BEValueV)) { - // If the increment is a GEP, then we know it won't perform an - // unsigned overflow, because the address space cannot be + // If the increment is a GEP, then we know it won't perform a + // signed overflow, because the address space cannot be // wrapped around. - HasNUW |= GEP->isInBounds(); + // + // NOTE: This isn't strictly true, because you could have an + // object straddling the 2G address boundary in a 32-bit address + // space (for example). We really want to model this as a "has + // no signed/unsigned wrap" where the base pointer is treated as + // unsigned and the increment is known to not have signed + // wrapping. + // + // This is a highly theoretical concern though, and this is good + // enough for all cases we know of at this point. :) + // + HasNSW |= GEP->isInBounds(); } const SCEV *StartVal = getSCEV(StartValueV); Modified: llvm/trunk/test/Analysis/ScalarEvolution/nsw.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/ScalarEvolution/nsw.ll?rev=125410&r1=125409&r2=125410&view=diff ============================================================================== --- llvm/trunk/test/Analysis/ScalarEvolution/nsw.ll (original) +++ llvm/trunk/test/Analysis/ScalarEvolution/nsw.ll Fri Feb 11 15:43:33 2011 @@ -62,11 +62,11 @@ for.body.i.i: ; preds = %for.body.i.i, %for.body.lr.ph.i.i %__first.addr.02.i.i = phi i32* [ %begin, %for.body.lr.ph.i.i ], [ %ptrincdec.i.i, %for.body.i.i ] ; CHECK: %__first.addr.02.i.i -; CHECK-NEXT: --> {%begin,+,4}<%for.body.i.i> +; CHECK-NEXT: --> {%begin,+,4}<%for.body.i.i> store i32 0, i32* %__first.addr.02.i.i, align 4 %ptrincdec.i.i = getelementptr inbounds i32* %__first.addr.02.i.i, i64 1 ; CHECK: %ptrincdec.i.i -; CHECK-NEXT: --> {(4 + %begin),+,4}<%for.body.i.i> +; CHECK-NEXT: --> {(4 + %begin),+,4}<%for.body.i.i> %cmp.i.i = icmp eq i32* %ptrincdec.i.i, %end br i1 %cmp.i.i, label %for.cond.for.end_crit_edge.i.i, label %for.body.i.i From anton at korobeynikov.info Fri Feb 11 15:48:00 2011 From: anton at korobeynikov.info (Anton Korobeynikov) Date: Sat, 12 Feb 2011 00:48:00 +0300 Subject: [llvm-commits] [llvm] r125357 - in /llvm/trunk: lib/Target/ARM/ARMISelLowering.cpp test/CodeGen/ARM/fcopysign.ll In-Reply-To: <822BB772-9148-488D-A914-67F484BBB1DF@apple.com> References: <20110211022855.E909E2A6C12C@llvm.org> <822BB772-9148-488D-A914-67F484BBB1DF@apple.com> Message-ID: > The generic implementation isn't going to be performant. The custom lowering make use of ARM specific nodes to split / combine D registers to / from GPRs when it's profitable. Why you named it 'buggy' then? -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University From benny.kra at googlemail.com Fri Feb 11 15:46:49 2011 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Fri, 11 Feb 2011 21:46:49 -0000 Subject: [llvm-commits] [llvm] r125411 - in /llvm/trunk: lib/Transforms/InstCombine/InstCombineCompares.cpp test/Transforms/InstCombine/add.ll Message-ID: <20110211214649.246332A6C12C@llvm.org> Author: d0k Date: Fri Feb 11 15:46:48 2011 New Revision: 125411 URL: http://llvm.org/viewvc/llvm-project?rev=125411&view=rev Log: Also fold (A+B) == A -> B == 0 when the add is commuted. Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp llvm/trunk/test/Transforms/InstCombine/add.ll Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp?rev=125411&r1=125410&r2=125411&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp Fri Feb 11 15:46:48 2011 @@ -2351,12 +2351,14 @@ Constant::getNullValue(B->getType())); // (A+B) == A -> B == 0 - if (match(Op0, m_Add(m_Specific(Op1), m_Value(B)))) + if (match(Op0, m_Add(m_Specific(Op1), m_Value(B))) || + match(Op0, m_Add(m_Value(B), m_Specific(Op1)))) return new ICmpInst(I.getPredicate(), B, Constant::getNullValue(B->getType())); // A == (A+B) -> B == 0 - if (match(Op1, m_Add(m_Specific(Op0), m_Value(B)))) + if (match(Op1, m_Add(m_Specific(Op0), m_Value(B))) || + match(Op1, m_Add(m_Value(B), m_Specific(Op0)))) return new ICmpInst(I.getPredicate(), B, Constant::getNullValue(B->getType())); Modified: llvm/trunk/test/Transforms/InstCombine/add.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/add.ll?rev=125411&r1=125410&r2=125411&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/add.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/add.ll Fri Feb 11 15:46:48 2011 @@ -276,18 +276,26 @@ ret i32 %q } -define i32 @test37(i32 %a, i32 %b) nounwind readnone { -entry: - %add = add nsw i32 %a, %b +define i1 @test37(i32 %a, i32 %b) nounwind readnone { + %add = add i32 %a, %b %cmp = icmp eq i32 %add, %a - %conv = zext i1 %cmp to i32 - ret i32 %conv + ret i1 %cmp } -define i32 @test38(i32 %a, i32 %b) nounwind readnone { -entry: - %add = add nsw i32 %a, %b +define i1 @test38(i32 %a, i32 %b) nounwind readnone { + %add = add i32 %a, %b + %cmp = icmp eq i32 %add, %b + ret i1 %cmp +} + +define i1 @test39(i32 %a, i32 %b) nounwind readnone { + %add = add i32 %b, %a %cmp = icmp eq i32 %add, %a - %conv = zext i1 %cmp to i32 - ret i32 %conv + ret i1 %cmp +} + +define i1 @test40(i32 %a, i32 %b) nounwind readnone { + %add = add i32 %b, %a + %cmp = icmp eq i32 %add, %b + ret i1 %cmp } From sabre at nondot.org Fri Feb 11 15:50:52 2011 From: sabre at nondot.org (Chris Lattner) Date: Fri, 11 Feb 2011 21:50:52 -0000 Subject: [llvm-commits] [llvm] r125412 - /llvm/trunk/docs/GetElementPtr.html Message-ID: <20110211215052.BAAB92A6C12C@llvm.org> Author: lattner Date: Fri Feb 11 15:50:52 2011 New Revision: 125412 URL: http://llvm.org/viewvc/llvm-project?rev=125412&view=rev Log: attempt to capture recent discussion about overflow and inbounds geps. Modified: llvm/trunk/docs/GetElementPtr.html Modified: llvm/trunk/docs/GetElementPtr.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/GetElementPtr.html?rev=125412&r1=125411&r2=125412&view=diff ============================================================================== --- llvm/trunk/docs/GetElementPtr.html (original) +++ llvm/trunk/docs/GetElementPtr.html Fri Feb 11 15:50:52 2011 @@ -598,13 +598,27 @@ What happens if a GEP computation overflows?

      -

      If the GEP has the inbounds keyword, the result value is - undefined.

      - -

      Otherwise, the result value is the result from evaluating the implied - two's complement integer computation. However, since there's no - guarantee of where an object will be allocated in the address space, - such values have limited meaning.

      +

      If the GEP lacks the inbounds keyword, the value is the result + from evaluating the implied two's complement integer computation. However, + since there's no guarantee of where an object will be allocated in the + address space, such values have limited meaning.

      + +

      If the GEP has the inbounds keyword, the result value is + undefined (a "trap value") if the GEP + overflows (i.e. wraps around the end of the address space).

      + +

      As such, there are some ramifications of this for inbounds GEPs: scales + implied by array/vector/pointer indices are always known to be "nsw" since + they are signed values that are scaled by the element size. These values + are also allowed to be negative (e.g. "gep i32 *%P, i32 -1") but the + pointer itself is logically treated as an unsigned value. This means that + GEPs have an asymmetric relation between the pointer base (which is treated + as unsigned) and the offset applied to it (which is treated as signed). The + result of the additions within the offset calculation cannot have signed + overflow, but when applied to the base pointer, there can be signed + overflow. +

      +
      From evan.cheng at apple.com Fri Feb 11 16:14:41 2011 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 11 Feb 2011 14:14:41 -0800 Subject: [llvm-commits] [llvm] r125357 - in /llvm/trunk: lib/Target/ARM/ARMISelLowering.cpp test/CodeGen/ARM/fcopysign.ll In-Reply-To: References: <20110211022855.E909E2A6C12C@llvm.org> <822BB772-9148-488D-A914-67F484BBB1DF@apple.com> Message-ID: <568CCF93-83EC-4081-A105-2DF85A64D347@apple.com> On Feb 11, 2011, at 1:48 PM, Anton Korobeynikov wrote: >> The generic implementation isn't going to be performant. The custom lowering make use of ARM specific nodes to split / combine D registers to / from GPRs when it's profitable. > Why you named it 'buggy' then? Huh? The old custom lowering code was buggy. Evan > > -- > With best regards, Anton Korobeynikov > Faculty of Mathematics and Mechanics, Saint Petersburg State University From clattner at apple.com Fri Feb 11 16:19:14 2011 From: clattner at apple.com (Chris Lattner) Date: Fri, 11 Feb 2011 14:19:14 -0800 Subject: [llvm-commits] [llvm] r125357 - in /llvm/trunk: lib/Target/ARM/ARMISelLowering.cpp test/CodeGen/ARM/fcopysign.ll In-Reply-To: <822BB772-9148-488D-A914-67F484BBB1DF@apple.com> References: <20110211022855.E909E2A6C12C@llvm.org> <822BB772-9148-488D-A914-67F484BBB1DF@apple.com> Message-ID: <0D8CC8F8-7448-4671-9529-6C9FB8D39846@apple.com> On Feb 11, 2011, at 1:13 PM, Evan Cheng wrote: >> Is there something wrong with the generic lowering code for copysign? Why does arm have its own implementation? >> >> -Chris > > The generic implementation isn't going to be performant. The custom lowering make use of ARM specific nodes to split / combine D registers to / from GPRs when it's profitable. Doesn't bitcast(i64->f64) do the right thing (getting legalized into split/combine d regs) on ARM? -Chris From anton at korobeynikov.info Fri Feb 11 16:19:26 2011 From: anton at korobeynikov.info (Anton Korobeynikov) Date: Sat, 12 Feb 2011 01:19:26 +0300 Subject: [llvm-commits] [llvm] r125357 - in /llvm/trunk: lib/Target/ARM/ARMISelLowering.cpp test/CodeGen/ARM/fcopysign.ll In-Reply-To: <568CCF93-83EC-4081-A105-2DF85A64D347@apple.com> References: <20110211022855.E909E2A6C12C@llvm.org> <822BB772-9148-488D-A914-67F484BBB1DF@apple.com> <568CCF93-83EC-4081-A105-2DF85A64D347@apple.com> Message-ID: >>> The generic implementation isn't going to be performant. The custom lowering make use of ARM specific nodes to split / combine D registers to / from GPRs when it's profitable. >> Why you named it 'buggy' then? > Huh? The old custom lowering code was buggy. Ah, ok, I thought the generic code was buggy :) -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University From evan.cheng at apple.com Fri Feb 11 16:53:49 2011 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 11 Feb 2011 14:53:49 -0800 Subject: [llvm-commits] [llvm] r125357 - in /llvm/trunk: lib/Target/ARM/ARMISelLowering.cpp test/CodeGen/ARM/fcopysign.ll In-Reply-To: <0D8CC8F8-7448-4671-9529-6C9FB8D39846@apple.com> References: <20110211022855.E909E2A6C12C@llvm.org> <822BB772-9148-488D-A914-67F484BBB1DF@apple.com> <0D8CC8F8-7448-4671-9529-6C9FB8D39846@apple.com> Message-ID: <7155FD0D-0DB6-4129-A69B-5CC71A55CF5B@apple.com> On Feb 11, 2011, at 2:19 PM, Chris Lattner wrote: > > On Feb 11, 2011, at 1:13 PM, Evan Cheng wrote: > >>> Is there something wrong with the generic lowering code for copysign? Why does arm have its own implementation? >>> >>> -Chris >> >> The generic implementation isn't going to be performant. The custom lowering make use of ARM specific nodes to split / combine D registers to / from GPRs when it's profitable. > > Doesn't bitcast(i64->f64) do the right thing (getting legalized into split/combine d regs) on ARM? Right. But the generic lowering doesn't do that and it's not always the right thing to do. Evan > > -Chris From fvbommel at gmail.com Fri Feb 11 17:24:49 2011 From: fvbommel at gmail.com (Frits van Bommel) Date: Sat, 12 Feb 2011 00:24:49 +0100 Subject: [llvm-commits] [llvm] r125319 - in /llvm/trunk: lib/Analysis/ValueTracking.cpp test/Transforms/JumpThreading/degenerate-phi.ll In-Reply-To: <4D54F322.8020602@free.fr> References: <20110210235410.768AF2A6C12C@llvm.org> <4D54E80F.2090806@free.fr> <4D54F28C.7030901@mxc.ca> <4D54F322.8020602@free.fr> Message-ID: On Fri, Feb 11, 2011 at 9:28 AM, Duncan Sands wrote: >>> I think it would be better to have jump-threading zap >>> any zero operand phis when it makes them, rather than changing all analyses to >>> support them. >> >> It doesn't create them, it calls BasicBlock::removePredecessor. > > clearly it must clean them up somewhere (since phi nodes with no operands are > invalid), so can't it just clean them up earlier? It looks to me like the problem is that removePredecessor() respects the 'DontDeleteUselessPHIs' parameter even when the only predecessor is removed, and that JumpThreading always passes 'true' for that (even though AFAICT it doesn't have a good reason to). The best fix is probably to ignore that parameter if it's removing the last predecessor; IMHO in this case it should just replace all PHIs with undefs and then kill them, regardless of that parameter. From rafael.espindola at gmail.com Fri Feb 11 18:19:56 2011 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Sat, 12 Feb 2011 00:19:56 -0000 Subject: [llvm-commits] [llvm] r125420 - /llvm/trunk/tools/lto/LTOCodeGenerator.cpp Message-ID: <20110212001956.E70EC2A6C12C@llvm.org> Author: rafael Date: Fri Feb 11 18:19:56 2011 New Revision: 125420 URL: http://llvm.org/viewvc/llvm-project?rev=125420&view=rev Log: Fix a silly bug I introduced when dropping std::string. Modified: llvm/trunk/tools/lto/LTOCodeGenerator.cpp Modified: llvm/trunk/tools/lto/LTOCodeGenerator.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto/LTOCodeGenerator.cpp?rev=125420&r1=125419&r2=125420&view=diff ============================================================================== --- llvm/trunk/tools/lto/LTOCodeGenerator.cpp (original) +++ llvm/trunk/tools/lto/LTOCodeGenerator.cpp Fri Feb 11 18:19:56 2011 @@ -353,6 +353,7 @@ SmallString<64> Buffer; for (Module::iterator f = mergedModule->begin(), e = mergedModule->end(); f != e; ++f) { + Buffer.clear(); mangler.getNameWithPrefix(Buffer, f, false); if (!f->isDeclaration() && _mustPreserveSymbols.count(Buffer)) @@ -360,6 +361,7 @@ } for (Module::global_iterator v = mergedModule->global_begin(), e = mergedModule->global_end(); v != e; ++v) { + Buffer.clear(); mangler.getNameWithPrefix(Buffer, v, false); if (!v->isDeclaration() && _mustPreserveSymbols.count(Buffer)) From grosbach at apple.com Fri Feb 11 19:34:40 2011 From: grosbach at apple.com (Jim Grosbach) Date: Sat, 12 Feb 2011 01:34:40 -0000 Subject: [llvm-commits] [llvm] r125426 - in /llvm/trunk: lib/Target/ARM/ARMInstrFormats.td lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/AsmParser/ARMAsmParser.cpp utils/TableGen/AsmMatcherEmitter.cpp Message-ID: <20110212013440.6255D2A6C12C@llvm.org> Author: grosbach Date: Fri Feb 11 19:34:40 2011 New Revision: 125426 URL: http://llvm.org/viewvc/llvm-project?rev=125426&view=rev Log: AsmMatcher custom operand parser failure enhancements. Teach the AsmMatcher handling to distinguish between an error custom-parsing an operand and a failure to match. The former should propogate the error upwards, while the latter should continue attempting to parse with alternative matchers. Update the ARM asm parser accordingly. Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td llvm/trunk/lib/Target/ARM/ARMInstrInfo.td llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=125426&r1=125425&r2=125426&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Fri Feb 11 19:34:40 2011 @@ -152,7 +152,7 @@ def MemBarrierOptOperand : AsmOperandClass { let Name = "MemBarrierOpt"; let SuperClasses = []; - let ParserMethod = "ParseMemBarrierOptOperand"; + let ParserMethod = "tryParseMemBarrierOptOperand"; } // ARM Predicate operand. Default to 14 = always (AL). Second part is CC Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=125426&r1=125425&r2=125426&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Fri Feb 11 19:34:40 2011 @@ -591,13 +591,13 @@ def CoprocNumAsmOperand : AsmOperandClass { let Name = "CoprocNum"; let SuperClasses = []; - let ParserMethod = "ParseCoprocNumOperand"; + let ParserMethod = "tryParseCoprocNumOperand"; } def CoprocRegAsmOperand : AsmOperandClass { let Name = "CoprocReg"; let SuperClasses = []; - let ParserMethod = "ParseCoprocRegOperand"; + let ParserMethod = "tryParseCoprocRegOperand"; } def p_imm : Operand { Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp?rev=125426&r1=125425&r2=125426&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp (original) +++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Fri Feb 11 19:34:40 2011 @@ -55,10 +55,7 @@ int TryParseRegister(); virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc); bool TryParseRegisterWithWriteBack(SmallVectorImpl &); - bool ParseCoprocNumOperand(SmallVectorImpl&); - bool ParseCoprocRegOperand(SmallVectorImpl&); bool ParseRegisterList(SmallVectorImpl &); - bool ParseMemBarrierOptOperand(SmallVectorImpl &); bool ParseMemory(SmallVectorImpl &); bool ParseOperand(SmallVectorImpl &, StringRef Mnemonic); bool ParsePrefix(ARMMCExpr::VariantKind &RefKind); @@ -95,6 +92,13 @@ /// } + OperandMatchResultTy tryParseCoprocNumOperand( + SmallVectorImpl&); + OperandMatchResultTy tryParseCoprocRegOperand( + SmallVectorImpl&); + OperandMatchResultTy tryParseMemBarrierOptOperand( + SmallVectorImpl &); + public: ARMAsmParser(const Target &T, MCAsmParser &_Parser, TargetMachine &_TM) : TargetAsmParser(T), Parser(_Parser), TM(_TM) { @@ -734,40 +738,40 @@ return -1; } -/// ParseCoprocNumOperand - Try to parse an coprocessor number operand. The +/// tryParseCoprocNumOperand - Try to parse an coprocessor number operand. The /// token must be an Identifier when called, and if it is a coprocessor /// number, the token is eaten and the operand is added to the operand list. -bool ARMAsmParser:: -ParseCoprocNumOperand(SmallVectorImpl &Operands) { +ARMAsmParser::OperandMatchResultTy ARMAsmParser:: +tryParseCoprocNumOperand(SmallVectorImpl &Operands) { SMLoc S = Parser.getTok().getLoc(); const AsmToken &Tok = Parser.getTok(); assert(Tok.is(AsmToken::Identifier) && "Token is not an Identifier"); int Num = MatchCoprocessorOperandName(Tok.getString(), 'p'); if (Num == -1) - return true; + return MatchOperand_NoMatch; Parser.Lex(); // Eat identifier token. Operands.push_back(ARMOperand::CreateCoprocNum(Num, S)); - return false; + return MatchOperand_Success; } -/// ParseCoprocRegOperand - Try to parse an coprocessor register operand. The +/// tryParseCoprocRegOperand - Try to parse an coprocessor register operand. The /// token must be an Identifier when called, and if it is a coprocessor /// number, the token is eaten and the operand is added to the operand list. -bool ARMAsmParser:: -ParseCoprocRegOperand(SmallVectorImpl &Operands) { +ARMAsmParser::OperandMatchResultTy ARMAsmParser:: +tryParseCoprocRegOperand(SmallVectorImpl &Operands) { SMLoc S = Parser.getTok().getLoc(); const AsmToken &Tok = Parser.getTok(); assert(Tok.is(AsmToken::Identifier) && "Token is not an Identifier"); int Reg = MatchCoprocessorOperandName(Tok.getString(), 'c'); if (Reg == -1) - return true; + return MatchOperand_NoMatch; Parser.Lex(); // Eat identifier token. Operands.push_back(ARMOperand::CreateCoprocReg(Reg, S)); - return false; + return MatchOperand_Success; } /// Parse a register list, return it if successful else return null. The first @@ -854,9 +858,9 @@ return false; } -/// ParseMemBarrierOptOperand - Try to parse DSB/DMB data barrier options. -bool ARMAsmParser:: -ParseMemBarrierOptOperand(SmallVectorImpl &Operands) { +/// tryParseMemBarrierOptOperand - Try to parse DSB/DMB data barrier options. +ARMAsmParser::OperandMatchResultTy ARMAsmParser:: +tryParseMemBarrierOptOperand(SmallVectorImpl &Operands) { SMLoc S = Parser.getTok().getLoc(); const AsmToken &Tok = Parser.getTok(); assert(Tok.is(AsmToken::Identifier) && "Token is not an Identifier"); @@ -874,11 +878,11 @@ .Default(~0U); if (Opt == ~0U) - return true; + return MatchOperand_NoMatch; Parser.Lex(); // Eat identifier token. Operands.push_back(ARMOperand::CreateMemBarrierOpt((ARM_MB::MemBOpt)Opt, S)); - return false; + return MatchOperand_Success; } /// Parse an ARM memory expression, return false if successful else return true @@ -1105,9 +1109,14 @@ // Check if the current operand has a custom associated parser, if so, try to // custom parse the operand, or fallback to the general approach. - MatchResultTy ResTy = MatchOperandParserImpl(Operands, Mnemonic); - if (ResTy == Match_Success) + OperandMatchResultTy ResTy = MatchOperandParserImpl(Operands, Mnemonic); + if (ResTy == MatchOperand_Success) return false; + // If there wasn't a custom match, try the generic matcher below. Otherwise, + // there was a match, but an error occurred, in which case, just return that + // the operand parsing failed. + if (ResTy == MatchOperand_ParseFail) + return true; switch (getLexer().getKind()) { default: Modified: llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp?rev=125426&r1=125425&r2=125426&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp Fri Feb 11 19:34:40 2011 @@ -1974,7 +1974,8 @@ // Emit the operand class switch to call the correct custom parser for // the found operand class. - OS << "bool " << Target.getName() << ClassName << "::\n" + OS << Target.getName() << ClassName << "::OperandMatchResultTy " + << Target.getName() << ClassName << "::\n" << "TryCustomParseOperand(SmallVectorImpl" << " &Operands,\n unsigned MCK) {\n\n" << " switch(MCK) {\n"; @@ -1989,15 +1990,15 @@ } OS << " default:\n"; - OS << " return true;\n"; + OS << " return MatchOperand_NoMatch;\n"; OS << " }\n"; - OS << " return true;\n"; + OS << " return MatchOperand_NoMatch;\n"; OS << "}\n\n"; // Emit the static custom operand parser. This code is very similar with // the other matcher. Also use MatchResultTy here just in case we go for // a better error handling. - OS << Target.getName() << ClassName << "::MatchResultTy " + OS << Target.getName() << ClassName << "::OperandMatchResultTy " << Target.getName() << ClassName << "::\n" << "MatchOperandParserImpl(SmallVectorImpl" << " &Operands,\n StringRef Mnemonic) {\n"; @@ -2009,9 +2010,6 @@ OS << " // Get the next operand index.\n"; OS << " unsigned NextOpNum = Operands.size()-1;\n"; - OS << " // Some state to try to produce better error messages.\n"; - OS << " bool HadMatchOtherThanFeatures = false;\n\n"; - // Emit code to search the table. OS << " // Search the table.\n"; OS << " std::pair"; @@ -2020,9 +2018,8 @@ << Info.OperandMatchInfo.size() << ", Mnemonic,\n" << " LessOpcodeOperand());\n\n"; - OS << " // Return a more specific error code if no mnemonics match.\n"; OS << " if (MnemonicRange.first == MnemonicRange.second)\n"; - OS << " return Match_MnemonicFail;\n\n"; + OS << " return MatchOperand_NoMatch;\n\n"; OS << " for (const OperandMatchEntry *it = MnemonicRange.first,\n" << " *ie = MnemonicRange.second; it != ie; ++it) {\n"; @@ -2034,7 +2031,6 @@ OS << " // check if the available features match\n"; OS << " if ((AvailableFeatures & it->RequiredFeatures) " << "!= it->RequiredFeatures) {\n"; - OS << " HadMatchOtherThanFeatures = true;\n"; OS << " continue;\n"; OS << " }\n\n"; @@ -2045,13 +2041,14 @@ // Emit call to the custom parser method OS << " // call custom parse method to handle the operand\n"; - OS << " if (!TryCustomParseOperand(Operands, it->Class))\n"; - OS << " return Match_Success;\n"; + OS << " OperandMatchResultTy Result = "; + OS << "TryCustomParseOperand(Operands, it->Class);\n"; + OS << " if (Result != MatchOperand_NoMatch)\n"; + OS << " return Result;\n"; OS << " }\n\n"; - OS << " // Okay, we had no match. Try to return a useful error code.\n"; - OS << " if (HadMatchOtherThanFeatures) return Match_MissingFeature;\n"; - OS << " return Match_InvalidOperand;\n"; + OS << " // Okay, we had no match.\n"; + OS << " return MatchOperand_NoMatch;\n"; OS << "}\n\n"; } @@ -2131,11 +2128,16 @@ OS << " MCInst &Inst, unsigned &ErrorInfo);\n"; if (Info.OperandMatchInfo.size()) { - OS << " MatchResultTy MatchOperandParserImpl(\n"; + OS << "\n enum OperandMatchResultTy {\n"; + OS << " MatchOperand_Success, // operand matched successfully\n"; + OS << " MatchOperand_NoMatch, // operand did not match\n"; + OS << " MatchOperand_ParseFail // operand matched but had errors\n"; + OS << " };\n"; + OS << " OperandMatchResultTy MatchOperandParserImpl(\n"; OS << " SmallVectorImpl &Operands,\n"; OS << " StringRef Mnemonic);\n"; - OS << " bool TryCustomParseOperand(\n"; + OS << " OperandMatchResultTy TryCustomParseOperand(\n"; OS << " SmallVectorImpl &Operands,\n"; OS << " unsigned MCK);\n\n"; } From nadav.rotem at intel.com Sat Feb 12 08:40:33 2011 From: nadav.rotem at intel.com (Nadav Rotem) Date: Sat, 12 Feb 2011 14:40:33 -0000 Subject: [llvm-commits] [llvm] r125435 - in /llvm/trunk: lib/CodeGen/SelectionDAG/DAGCombiner.cpp test/CodeGen/Generic/2011-02-12-shuffle.ll Message-ID: <20110212144033.C6DCC2A6C12C@llvm.org> Author: nadav Date: Sat Feb 12 08:40:33 2011 New Revision: 125435 URL: http://llvm.org/viewvc/llvm-project?rev=125435&view=rev Log: A fix for 9165. The DAGCombiner created illegal BUILD_VECTOR operations. The patch added a check that either illegal operations are allowed or that the created operation is legal. Added: llvm/trunk/test/CodeGen/Generic/2011-02-12-shuffle.ll (with props) Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=125435&r1=125434&r2=125435&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Sat Feb 12 08:40:33 2011 @@ -6375,6 +6375,12 @@ if (InVal.getOpcode() == ISD::UNDEF) return InVec; + EVT VT = InVec.getValueType(); + + // If we can't generate a legal BUILD_VECTOR, exit + if (LegalOperations && !TLI.isOperationLegal(ISD::BUILD_VECTOR, VT)) + return SDValue(); + // If the invec is a BUILD_VECTOR and if EltNo is a constant, build a new // vector with the inserted element. if (InVec.getOpcode() == ISD::BUILD_VECTOR && isa(EltNo)) { @@ -6384,13 +6390,12 @@ if (Elt < Ops.size()) Ops[Elt] = InVal; return DAG.getNode(ISD::BUILD_VECTOR, N->getDebugLoc(), - InVec.getValueType(), &Ops[0], Ops.size()); + VT, &Ops[0], Ops.size()); } // If the invec is an UNDEF and if EltNo is a constant, create a new // BUILD_VECTOR with undef elements and the inserted element. - if (!LegalOperations && InVec.getOpcode() == ISD::UNDEF && + if (InVec.getOpcode() == ISD::UNDEF && isa(EltNo)) { - EVT VT = InVec.getValueType(); EVT EltVT = VT.getVectorElementType(); unsigned NElts = VT.getVectorNumElements(); SmallVector Ops(NElts, DAG.getUNDEF(EltVT)); @@ -6399,7 +6404,7 @@ if (Elt < Ops.size()) Ops[Elt] = InVal; return DAG.getNode(ISD::BUILD_VECTOR, N->getDebugLoc(), - InVec.getValueType(), &Ops[0], Ops.size()); + VT, &Ops[0], Ops.size()); } return SDValue(); } Added: llvm/trunk/test/CodeGen/Generic/2011-02-12-shuffle.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Generic/2011-02-12-shuffle.ll?rev=125435&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Generic/2011-02-12-shuffle.ll (added) +++ llvm/trunk/test/CodeGen/Generic/2011-02-12-shuffle.ll Sat Feb 12 08:40:33 2011 @@ -0,0 +1,32 @@ +; RUN: llc < %s +; PR9165 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32" +target triple = "i686-pc-win32" + +define void @m_387() nounwind { +entry: + br i1 undef, label %if.end, label %UnifiedReturnBlock + +if.end: ; preds = %entry + %tmp1067 = load <16 x i32> addrspace(1)* null, align 64 + %tmp1082 = shufflevector <16 x i32> , + <16 x i32> %tmp1067, + <16 x i32> + + %tmp1100 = shufflevector <16 x i32> %tmp1082, + <16 x i32> %tmp1067, + <16 x i32> + + %tmp1112 = shufflevector <16 x i32> %tmp1100, + <16 x i32> %tmp1067, + <16 x i32> + + store <16 x i32> %tmp1112, <16 x i32> addrspace(1)* undef, align 64 + + ret void + +UnifiedReturnBlock: ; preds = %entry + ret void +} + Propchange: llvm/trunk/test/CodeGen/Generic/2011-02-12-shuffle.ll ------------------------------------------------------------------------------ svn:eol-style = native From benny.kra at googlemail.com Sat Feb 12 11:58:16 2011 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Sat, 12 Feb 2011 17:58:16 -0000 Subject: [llvm-commits] [llvm] r125438 - /llvm/trunk/lib/Target/X86/README-SSE.txt Message-ID: <20110212175816.A97632A6C12C@llvm.org> Author: d0k Date: Sat Feb 12 11:58:16 2011 New Revision: 125438 URL: http://llvm.org/viewvc/llvm-project?rev=125438&view=rev Log: Add a note about SSE4.1 roundss/roundsd. Modified: llvm/trunk/lib/Target/X86/README-SSE.txt Modified: llvm/trunk/lib/Target/X86/README-SSE.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/README-SSE.txt?rev=125438&r1=125437&r2=125438&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/README-SSE.txt (original) +++ llvm/trunk/lib/Target/X86/README-SSE.txt Sat Feb 12 11:58:16 2011 @@ -923,4 +923,15 @@ //===---------------------------------------------------------------------===// +If SSE4.1 is available we should inline rounding functions instead of emitting +a libcall. +floor: roundsd $0x01, %xmm, %xmm +ceil: roundsd $0x02, %xmm, %xmm + +and likewise for the single precision versions. + +Currently, SelectionDAGBuilder doesn't turn calls to these functions into the +corresponding nodes and some targets (including X86) aren't ready for them. + +//===---------------------------------------------------------------------===// From rafael.espindola at gmail.com Sat Feb 12 12:03:13 2011 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Sat, 12 Feb 2011 18:03:13 -0000 Subject: [llvm-commits] [llvm] r125439 - /llvm/trunk/tools/lto/LTOCodeGenerator.cpp Message-ID: <20110212180313.D2E6F2A6C12C@llvm.org> Author: rafael Date: Sat Feb 12 12:03:13 2011 New Revision: 125439 URL: http://llvm.org/viewvc/llvm-project?rev=125439&view=rev Log: Preserve aliases if needed. Modified: llvm/trunk/tools/lto/LTOCodeGenerator.cpp Modified: llvm/trunk/tools/lto/LTOCodeGenerator.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto/LTOCodeGenerator.cpp?rev=125439&r1=125438&r2=125439&view=diff ============================================================================== --- llvm/trunk/tools/lto/LTOCodeGenerator.cpp (original) +++ llvm/trunk/tools/lto/LTOCodeGenerator.cpp Sat Feb 12 12:03:13 2011 @@ -367,6 +367,14 @@ _mustPreserveSymbols.count(Buffer)) mustPreserveList.push_back(::strdup(v->getNameStr().c_str())); } + for (Module::alias_iterator a = mergedModule->alias_begin(), + e = mergedModule->alias_end(); a != e; ++a) { + Buffer.clear(); + mangler.getNameWithPrefix(Buffer, a, false); + if (!a->isDeclaration() && + _mustPreserveSymbols.count(Buffer)) + mustPreserveList.push_back(::strdup(a->getNameStr().c_str())); + } passes.add(createInternalizePass(mustPreserveList)); } From daniel at zuster.org Sat Feb 12 12:19:53 2011 From: daniel at zuster.org (Daniel Dunbar) Date: Sat, 12 Feb 2011 18:19:53 -0000 Subject: [llvm-commits] [llvm] r125441 - /llvm/trunk/test/Transforms/SimplifyLibCalls/Printf.ll Message-ID: <20110212181953.6A87F2A6C12C@llvm.org> Author: ddunbar Date: Sat Feb 12 12:19:53 2011 New Revision: 125441 URL: http://llvm.org/viewvc/llvm-project?rev=125441&view=rev Log: tests: FileCheckize Modified: llvm/trunk/test/Transforms/SimplifyLibCalls/Printf.ll Modified: llvm/trunk/test/Transforms/SimplifyLibCalls/Printf.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/SimplifyLibCalls/Printf.ll?rev=125441&r1=125440&r2=125441&view=diff ============================================================================== --- llvm/trunk/test/Transforms/SimplifyLibCalls/Printf.ll (original) +++ llvm/trunk/test/Transforms/SimplifyLibCalls/Printf.ll Sat Feb 12 12:19:53 2011 @@ -1,6 +1,8 @@ -; RUN: opt < %s -simplify-libcalls -S | grep putchar -; RUN: opt < %s -simplify-libcalls -S | \ -; RUN: not grep {call.*printf} +; RUN: opt < %s -simplify-libcalls -S -o %t +; RUN: FileCheck < %t %s + +; CHECK-NOT: call{{.*}}printf +; CHECK: putchar @str = internal constant [13 x i8] c"hello world\0A\00" ; <[13 x i8]*> [#uses=1] @str1 = internal constant [2 x i8] c"h\00" ; <[2 x i8]*> [#uses=1] From daniel at zuster.org Sat Feb 12 12:19:57 2011 From: daniel at zuster.org (Daniel Dunbar) Date: Sat, 12 Feb 2011 18:19:57 -0000 Subject: [llvm-commits] [llvm] r125442 - in /llvm/trunk: lib/Transforms/Scalar/SimplifyLibCalls.cpp test/Transforms/SimplifyLibCalls/Printf.ll Message-ID: <20110212181957.CD4782A6C12D@llvm.org> Author: ddunbar Date: Sat Feb 12 12:19:57 2011 New Revision: 125442 URL: http://llvm.org/viewvc/llvm-project?rev=125442&view=rev Log: SimplifyLibCalls: Add missing legalize check on various printf to puts and putchar transforms, their return values are not compatible. Modified: llvm/trunk/lib/Transforms/Scalar/SimplifyLibCalls.cpp llvm/trunk/test/Transforms/SimplifyLibCalls/Printf.ll Modified: llvm/trunk/lib/Transforms/Scalar/SimplifyLibCalls.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/SimplifyLibCalls.cpp?rev=125442&r1=125441&r2=125442&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/SimplifyLibCalls.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/SimplifyLibCalls.cpp Sat Feb 12 12:19:57 2011 @@ -1092,8 +1092,13 @@ return CI->use_empty() ? (Value*)CI : ConstantInt::get(CI->getType(), 0); - // printf("x") -> putchar('x'), even for '%'. Return the result of putchar - // in case there is an error writing to stdout. + // Do not do any of the following transformations if the printf return value + // is used, in general the printf return value is not compatible with either + // putchar() or puts(). + if (!CI->use_empty()) + return 0; + + // printf("x") -> putchar('x'), even for '%'. if (FormatStr.size() == 1) { Value *Res = EmitPutChar(B.getInt32(FormatStr[0]), B, TD); if (CI->use_empty()) return CI; @@ -1126,8 +1131,7 @@ // printf("%s\n", str) --> puts(str) if (FormatStr == "%s\n" && CI->getNumArgOperands() > 1 && - CI->getArgOperand(1)->getType()->isPointerTy() && - CI->use_empty()) { + CI->getArgOperand(1)->getType()->isPointerTy()) { EmitPutS(CI->getArgOperand(1), B, TD); return CI; } @@ -1344,7 +1348,7 @@ if (!GetConstantStringInfo(CI->getArgOperand(0), Str)) return 0; - if (Str.empty()) { + if (Str.empty() && CI->use_empty()) { // puts("") -> putchar('\n') Value *Res = EmitPutChar(B.getInt32('\n'), B, TD); if (CI->use_empty()) return CI; Modified: llvm/trunk/test/Transforms/SimplifyLibCalls/Printf.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/SimplifyLibCalls/Printf.ll?rev=125442&r1=125441&r2=125442&view=diff ============================================================================== --- llvm/trunk/test/Transforms/SimplifyLibCalls/Printf.ll (original) +++ llvm/trunk/test/Transforms/SimplifyLibCalls/Printf.ll Sat Feb 12 12:19:57 2011 @@ -1,23 +1,36 @@ ; RUN: opt < %s -simplify-libcalls -S -o %t ; RUN: FileCheck < %t %s -; CHECK-NOT: call{{.*}}printf -; CHECK: putchar - @str = internal constant [13 x i8] c"hello world\0A\00" ; <[13 x i8]*> [#uses=1] @str1 = internal constant [2 x i8] c"h\00" ; <[2 x i8]*> [#uses=1] -define void @foo() { +declare i32 @printf(i8*, ...) + +; CHECK: define void @f0 +; CHECK-NOT: printf +; CHECK: } +define void @f0() { entry: %tmp1 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([13 x i8]* @str, i32 0, i32 0) ) ; [#uses=0] ret void } -declare i32 @printf(i8*, ...) - -define void @bar() { +; CHECK: define void @f1 +; CHECK-NOT: printf +; CHECK: } +define void @f1() { entry: %tmp1 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([2 x i8]* @str1, i32 0, i32 0) ) ; [#uses=0] ret void } +; Verify that we don't turn this into a putchar call (thus changing the return +; value). +; +; CHECK: define i32 @f2 +; CHECK: printf +; CHECK: } +define i32 @f2() { + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([2 x i8]* @str1, i32 0, i32 0)) + ret i32 %call +} From venkatra at cs.wisc.edu Sat Feb 12 13:02:33 2011 From: venkatra at cs.wisc.edu (Venkatraman Govindaraju) Date: Sat, 12 Feb 2011 19:02:33 -0000 Subject: [llvm-commits] [llvm] r125444 - in /llvm/trunk: lib/Target/Sparc/DelaySlotFiller.cpp test/CodeGen/SPARC/2011-01-19-DelaySlot.ll Message-ID: <20110212190233.CE7532A6C12C@llvm.org> Author: venkatra Date: Sat Feb 12 13:02:33 2011 New Revision: 125444 URL: http://llvm.org/viewvc/llvm-project?rev=125444&view=rev Log: Prevent IMPLICIT_DEF/KILL to become a delay filler instruction in SPARC backend. Modified: llvm/trunk/lib/Target/Sparc/DelaySlotFiller.cpp llvm/trunk/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll Modified: llvm/trunk/lib/Target/Sparc/DelaySlotFiller.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/DelaySlotFiller.cpp?rev=125444&r1=125443&r2=125444&view=diff ============================================================================== --- llvm/trunk/lib/Target/Sparc/DelaySlotFiller.cpp (original) +++ llvm/trunk/lib/Target/Sparc/DelaySlotFiller.cpp Sat Feb 12 13:02:33 2011 @@ -182,6 +182,9 @@ SmallSet &RegUses) { + if (candidate->isImplicitDef() || candidate->isKill()) + return true; + if (candidate->getDesc().mayLoad()) { sawLoad = true; if (sawStore) Modified: llvm/trunk/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll?rev=125444&r1=125443&r2=125444&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll (original) +++ llvm/trunk/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll Sat Feb 12 13:02:33 2011 @@ -1,4 +1,5 @@ ;RUN: llc -march=sparc < %s | FileCheck %s +;RUN: llc -march=sparc -O0 < %s | FileCheck %s -check-prefix=UNOPT define i32 @test(i32 %a) nounwind { @@ -75,3 +76,15 @@ declare i32 @foo(...) declare i32 @bar(i32) + + +define i32 @test_implicit_def() nounwind { +entry: +;UNOPT: test_implicit_def +;UNOPT: call func +;UNOPT-NEXT: nop + %0 = tail call i32 @func(i32* undef) nounwind + ret i32 0 +} + +declare i32 @func(i32*) From bruno.cardoso at gmail.com Sat Feb 12 14:44:00 2011 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Sat, 12 Feb 2011 18:44:00 -0200 Subject: [llvm-commits] PATCH: Add encodings for fxsave64 and fxrstor64 In-Reply-To: References: Message-ID: Hi Reid, On Thu, Feb 10, 2011 at 2:08 PM, Reid Kleckner wrote: > These instructions are just fxsave and fxrstor with REX_W prefixes. > The difference is that some pointers in dumped register map come out > as 64-bit values instead of 32-bit values. ?If you don't use the > prefix in 64-bit mode, you'll get 32-bit values instead of 64-bit. > > I needed this patch to build DynamoRIO with clang with the integrated > assembler. ?It has some inline assembly with these instructions for > context switching on signals. > > Please review. ?I can commit the patch. Please commit! :) -- Bruno Cardoso Lopes http://www.brunocardoso.cc From reid at kleckner.net Sat Feb 12 17:24:13 2011 From: reid at kleckner.net (Reid Kleckner) Date: Sat, 12 Feb 2011 23:24:13 -0000 Subject: [llvm-commits] [llvm] r125446 - in /llvm/trunk: lib/Target/X86/X86InstrFPStack.td test/MC/X86/x86_64-encoding.s Message-ID: <20110212232414.021692A6C12C@llvm.org> Author: rnk Date: Sat Feb 12 17:24:13 2011 New Revision: 125446 URL: http://llvm.org/viewvc/llvm-project?rev=125446&view=rev Log: Add encodings and mnemonics for FXSAVE64 and FXRSTOR64. These are just FXSAVE and FXRSTOR with REX.W prefixes. These versions use 64-bit pointer values instead of 32-bit pointer values in the memory map they dump and restore. Modified: llvm/trunk/lib/Target/X86/X86InstrFPStack.td llvm/trunk/test/MC/X86/x86_64-encoding.s Modified: llvm/trunk/lib/Target/X86/X86InstrFPStack.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFPStack.td?rev=125446&r1=125445&r2=125446&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrFPStack.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrFPStack.td Sat Feb 12 17:24:13 2011 @@ -625,8 +625,12 @@ def FXSAVE : I<0xAE, MRM0m, (outs opaque512mem:$dst), (ins), "fxsave\t$dst", []>, TB; +def FXSAVE64 : I<0xAE, MRM0m, (outs opaque512mem:$dst), (ins), + "fxsaveq\t$dst", []>, TB, REX_W, Requires<[In64BitMode]>; def FXRSTOR : I<0xAE, MRM1m, (outs), (ins opaque512mem:$src), "fxrstor\t$src", []>, TB; +def FXRSTOR64 : I<0xAE, MRM1m, (outs), (ins opaque512mem:$src), + "fxrstorq\t$src", []>, TB, REX_W, Requires<[In64BitMode]>; //===----------------------------------------------------------------------===// // Non-Instruction Patterns Modified: llvm/trunk/test/MC/X86/x86_64-encoding.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86_64-encoding.s?rev=125446&r1=125445&r2=125446&view=diff ============================================================================== --- llvm/trunk/test/MC/X86/x86_64-encoding.s (original) +++ llvm/trunk/test/MC/X86/x86_64-encoding.s Sat Feb 12 17:24:13 2011 @@ -140,3 +140,11 @@ // CHECK: encoding: [0x48,0x8b,0x04,0xe1] movq (%rcx,%riz,8), %rax +// CHECK: fxsaveq (%rax) +// CHECK: encoding: [0x48,0x0f,0xae,0x00] + fxsaveq (%rax) + +// CHECK: fxrstorq (%rax) +// CHECK: encoding: [0x48,0x0f,0xae,0x08] + fxrstorq (%rax) + From clattner at apple.com Sat Feb 12 19:59:17 2011 From: clattner at apple.com (Chris Lattner) Date: Sat, 12 Feb 2011 17:59:17 -0800 Subject: [llvm-commits] [llvm] r125319 - in /llvm/trunk: lib/Analysis/ValueTracking.cpp test/Transforms/JumpThreading/degenerate-phi.ll In-Reply-To: References: <20110210235410.768AF2A6C12C@llvm.org> <4D54E80F.2090806@free.fr> <4D54F28C.7030901@mxc.ca> <4D54F322.8020602@free.fr> Message-ID: <7E8EAEF2-1835-4E85-B065-A9D6B2C67812@apple.com> On Feb 11, 2011, at 3:24 PM, Frits van Bommel wrote: > On Fri, Feb 11, 2011 at 9:28 AM, Duncan Sands wrote: >>>> I think it would be better to have jump-threading zap >>>> any zero operand phis when it makes them, rather than changing all analyses to >>>> support them. >>> >>> It doesn't create them, it calls BasicBlock::removePredecessor. >> >> clearly it must clean them up somewhere (since phi nodes with no operands are >> invalid), so can't it just clean them up earlier? > > It looks to me like the problem is that removePredecessor() respects > the 'DontDeleteUselessPHIs' parameter even when the only predecessor > is removed, and that JumpThreading always passes 'true' for that (even > though AFAICT it doesn't have a good reason to). > > The best fix is probably to ignore that parameter if it's removing the > last predecessor; IMHO in this case it should just replace all PHIs > with undefs and then kill them, regardless of that parameter. I agree, that does seem like the right fix. -Chris From sabre at nondot.org Sat Feb 12 21:14:49 2011 From: sabre at nondot.org (Chris Lattner) Date: Sun, 13 Feb 2011 03:14:49 -0000 Subject: [llvm-commits] [llvm] r125449 - in /llvm/trunk: lib/Analysis/ScalarEvolution.cpp test/Analysis/ScalarEvolution/nsw.ll test/Analysis/ScalarEvolution/scev-aa.ll Message-ID: <20110213031449.6D3162A6C12C@llvm.org> Author: lattner Date: Sat Feb 12 21:14:49 2011 New Revision: 125449 URL: http://llvm.org/viewvc/llvm-project?rev=125449&view=rev Log: teach SCEV that the scale and addition of an inbounds gep don't NSW. This fixes a FIXME in scev-aa.ll (allowing a new no-alias result) and generally makes things more precise. Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp llvm/trunk/test/Analysis/ScalarEvolution/nsw.ll llvm/trunk/test/Analysis/ScalarEvolution/scev-aa.ll Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=125449&r1=125448&r2=125449&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original) +++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Sat Feb 12 21:14:49 2011 @@ -2870,6 +2870,7 @@ // Add expression, because the Instruction may be guarded by control flow // and the no-overflow bits may not be valid for the expression in any // context. + bool isInBounds = GEP->isInBounds(); const Type *IntPtrTy = getEffectiveSCEVType(GEP->getType()); Value *Base = GEP->getOperand(0); @@ -2898,7 +2899,8 @@ IndexS = getTruncateOrSignExtend(IndexS, IntPtrTy); // Multiply the index by the element size to compute the element offset. - const SCEV *LocalOffset = getMulExpr(IndexS, ElementSize); + const SCEV *LocalOffset = getMulExpr(IndexS, ElementSize, /*NUW*/ false, + /*NSW*/ isInBounds); // Add the element offset to the running total offset. TotalOffset = getAddExpr(TotalOffset, LocalOffset); @@ -2909,7 +2911,8 @@ const SCEV *BaseS = getSCEV(Base); // Add the total offset from all the GEP indices to the base. - return getAddExpr(BaseS, TotalOffset); + return getAddExpr(BaseS, TotalOffset, /*NUW*/ false, + /*NSW*/ isInBounds); } /// GetMinTrailingZeros - Determine the minimum number of zero bits that S is Modified: llvm/trunk/test/Analysis/ScalarEvolution/nsw.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/ScalarEvolution/nsw.ll?rev=125449&r1=125448&r2=125449&view=diff ============================================================================== --- llvm/trunk/test/Analysis/ScalarEvolution/nsw.ll (original) +++ llvm/trunk/test/Analysis/ScalarEvolution/nsw.ll Sat Feb 12 21:14:49 2011 @@ -76,3 +76,31 @@ _ZSt4fillIPiiEvT_S1_RKT0_.exit: ; preds = %entry, %for.cond.for.end_crit_edge.i.i ret void } + +; Various checks for inbounds geps. +define void @test3(i32* %begin, i32* %end) nounwind ssp { +entry: + %cmp7.i.i = icmp eq i32* %begin, %end + br i1 %cmp7.i.i, label %_ZSt4fillIPiiEvT_S1_RKT0_.exit, label %for.body.i.i + +for.body.i.i: ; preds = %entry, %for.body.i.i + %indvar.i.i = phi i64 [ %tmp, %for.body.i.i ], [ 0, %entry ] +; CHECK: %indvar.i.i +; CHECK: {0,+,1}<%for.body.i.i> + %tmp = add nsw i64 %indvar.i.i, 1 +; CHECK: %tmp = +; CHECK: {1,+,1}<%for.body.i.i> + %ptrincdec.i.i = getelementptr inbounds i32* %begin, i64 %tmp +; CHECK: %ptrincdec.i.i = +; CHECK: {(4 + %begin),+,4}<%for.body.i.i> + %__first.addr.08.i.i = getelementptr inbounds i32* %begin, i64 %indvar.i.i +; CHECK: %__first.addr.08.i.i +; CHECK: {%begin,+,4}<%for.body.i.i> + store i32 0, i32* %__first.addr.08.i.i, align 4 + %cmp.i.i = icmp eq i32* %ptrincdec.i.i, %end + br i1 %cmp.i.i, label %_ZSt4fillIPiiEvT_S1_RKT0_.exit, label %for.body.i.i +; CHECK: Loop %for.body.i.i: Unpredictable backedge-taken count. +; CHECK: Loop %for.body.i.i: Unpredictable max backedge-taken count. +_ZSt4fillIPiiEvT_S1_RKT0_.exit: ; preds = %for.body.i.i, %entry + ret void +} \ No newline at end of file Modified: llvm/trunk/test/Analysis/ScalarEvolution/scev-aa.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/ScalarEvolution/scev-aa.ll?rev=125449&r1=125448&r2=125449&view=diff ============================================================================== --- llvm/trunk/test/Analysis/ScalarEvolution/scev-aa.ll (original) +++ llvm/trunk/test/Analysis/ScalarEvolution/scev-aa.ll Sat Feb 12 21:14:49 2011 @@ -190,9 +190,8 @@ ret void } -; TODO: This is theoretically provable to be NoAlias. ; CHECK: Function: nonnegative: 2 pointers, 0 call sites -; CHECK: MayAlias: i64* %arrayidx, i64* %p +; CHECK: NoAlias: i64* %arrayidx, i64* %p define void @nonnegative(i64* %p) nounwind { entry: @@ -211,6 +210,6 @@ ret void } -; CHECK: 13 no alias responses -; CHECK: 27 may alias responses +; CHECK: 14 no alias responses +; CHECK: 26 may alias responses ; CHECK: 18 must alias responses From sabre at nondot.org Sun Feb 13 01:43:07 2011 From: sabre at nondot.org (Chris Lattner) Date: Sun, 13 Feb 2011 07:43:07 -0000 Subject: [llvm-commits] [llvm] r125451 - in /llvm/trunk/lib/Transforms/InstCombine: InstCombine.h InstCombineCompares.cpp Message-ID: <20110213074307.A68D12A6C12C@llvm.org> Author: lattner Date: Sun Feb 13 01:43:07 2011 New Revision: 125451 URL: http://llvm.org/viewvc/llvm-project?rev=125451&view=rev Log: refactor some code out into a helper method. Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombine.h llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombine.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombine.h?rev=125451&r1=125450&r2=125451&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombine.h (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombine.h Sun Feb 13 01:43:07 2011 @@ -145,6 +145,8 @@ ConstantInt *RHS); Instruction *FoldICmpDivCst(ICmpInst &ICI, BinaryOperator *DivI, ConstantInt *DivRHS); + Instruction *FoldICmpShrCst(ICmpInst &ICI, BinaryOperator *DivI, + ConstantInt *DivRHS); Instruction *FoldICmpAddOpCst(ICmpInst &ICI, Value *X, ConstantInt *CI, ICmpInst::Predicate Pred, Value *TheAdd); Instruction *FoldGEPICmp(GEPOperator *GEPLHS, Value *RHS, Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp?rev=125451&r1=125450&r2=125451&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp Sun Feb 13 01:43:07 2011 @@ -928,6 +928,55 @@ } } +/// FoldICmpShrCst - Handle "icmp(([al]shr X, cst1), cst2)". +Instruction *InstCombiner::FoldICmpShrCst(ICmpInst &ICI, BinaryOperator *Shr, + ConstantInt *ShAmt) { + if (!ICI.isEquality()) return 0; + + const APInt &CmpRHSV = cast(ICI.getOperand(1))->getValue(); + + // Check that the shift amount is in range. If not, don't perform + // undefined shifts. When the shift is visited it will be + // simplified. + uint32_t TypeBits = CmpRHSV.getBitWidth(); + uint32_t ShAmtVal = (uint32_t)ShAmt->getLimitedValue(TypeBits); + if (ShAmtVal >= TypeBits) + return 0; + + // If we are comparing against bits always shifted out, the + // comparison cannot succeed. + APInt Comp = CmpRHSV << ShAmtVal; + ConstantInt *ShiftedCmpRHS = ConstantInt::get(ICI.getContext(), Comp); + if (Shr->getOpcode() == Instruction::LShr) + Comp = Comp.lshr(ShAmtVal); + else + Comp = Comp.ashr(ShAmtVal); + + if (Comp != CmpRHSV) { // Comparing against a bit that we know is zero. + bool IsICMP_NE = ICI.getPredicate() == ICmpInst::ICMP_NE; + Constant *Cst = ConstantInt::get(Type::getInt1Ty(ICI.getContext()), + IsICMP_NE); + return ReplaceInstUsesWith(ICI, Cst); + } + + // Otherwise, check to see if the bits shifted out are known to be zero. + // If so, we can compare against the unshifted value: + // (X & 4) >> 1 == 2 --> (X & 4) == 4. + if (Shr->hasOneUse() && cast(Shr)->isExact()) + return new ICmpInst(ICI.getPredicate(), Shr->getOperand(0), ShiftedCmpRHS); + + if (Shr->hasOneUse()) { + // Otherwise strength reduce the shift into an and. + APInt Val(APInt::getHighBitsSet(TypeBits, TypeBits - ShAmtVal)); + Constant *Mask = ConstantInt::get(ICI.getContext(), Val); + + Value *And = Builder->CreateAnd(Shr->getOperand(0), + Mask, Shr->getName()+".mask"); + return new ICmpInst(ICI.getPredicate(), And, ShiftedCmpRHS); + } + return 0; +} + /// visitICmpInstWithInstAndIntCst - Handle "icmp (instr, intcst)". /// @@ -1153,7 +1202,6 @@ if (match(LHSI, m_Or(m_PtrToInt(m_Value(P)), m_PtrToInt(m_Value(Q))))) { // Simplify icmp eq (or (ptrtoint P), (ptrtoint Q)), 0 // -> and (icmp eq P, null), (icmp eq Q, null). - Value *ICIP = Builder->CreateICmp(ICI.getPredicate(), P, Constant::getNullValue(P->getType())); Value *ICIQ = Builder->CreateICmp(ICI.getPredicate(), Q, @@ -1229,53 +1277,13 @@ } case Instruction::LShr: // (icmp pred (shr X, ShAmt), CI) - case Instruction::AShr: { + case Instruction::AShr: // Only handle equality comparisons of shift-by-constant. - ConstantInt *ShAmt = dyn_cast(LHSI->getOperand(1)); - if (!ShAmt || !ICI.isEquality()) break; - - // Check that the shift amount is in range. If not, don't perform - // undefined shifts. When the shift is visited it will be - // simplified. - uint32_t TypeBits = RHSV.getBitWidth(); - uint32_t ShAmtVal = (uint32_t)ShAmt->getLimitedValue(TypeBits); - if (ShAmtVal >= TypeBits) - break; - - // If we are comparing against bits always shifted out, the - // comparison cannot succeed. - APInt Comp = RHSV << ShAmtVal; - if (LHSI->getOpcode() == Instruction::LShr) - Comp = Comp.lshr(ShAmtVal); - else - Comp = Comp.ashr(ShAmtVal); - - if (Comp != RHSV) { // Comparing against a bit that we know is zero. - bool IsICMP_NE = ICI.getPredicate() == ICmpInst::ICMP_NE; - Constant *Cst = ConstantInt::get(Type::getInt1Ty(ICI.getContext()), - IsICMP_NE); - return ReplaceInstUsesWith(ICI, Cst); - } - - // Otherwise, check to see if the bits shifted out are known to be zero. - // If so, we can compare against the unshifted value: - // (X & 4) >> 1 == 2 --> (X & 4) == 4. - if (LHSI->hasOneUse() && cast(LHSI)->isExact()) - return new ICmpInst(ICI.getPredicate(), LHSI->getOperand(0), - ConstantExpr::getShl(RHS, ShAmt)); - - if (LHSI->hasOneUse()) { - // Otherwise strength reduce the shift into an and. - APInt Val(APInt::getHighBitsSet(TypeBits, TypeBits - ShAmtVal)); - Constant *Mask = ConstantInt::get(ICI.getContext(), Val); - - Value *And = Builder->CreateAnd(LHSI->getOperand(0), - Mask, LHSI->getName()+".mask"); - return new ICmpInst(ICI.getPredicate(), And, - ConstantExpr::getShl(RHS, ShAmt)); - } + if (ConstantInt *ShAmt = dyn_cast(LHSI->getOperand(1))) + if (Instruction *Res = FoldICmpShrCst(ICI, cast(LHSI), + ShAmt)) + return Res; break; - } case Instruction::SDiv: case Instruction::UDiv: From akyrtzi at gmail.com Sun Feb 13 01:51:19 2011 From: akyrtzi at gmail.com (Argyrios Kyrtzidis) Date: Sun, 13 Feb 2011 07:51:19 -0000 Subject: [llvm-commits] [llvm] r125452 - /llvm/trunk/utils/TableGen/ClangDiagnosticsEmitter.cpp Message-ID: <20110213075119.9102E2A6C12C@llvm.org> Author: akirtzidis Date: Sun Feb 13 01:51:19 2011 New Revision: 125452 URL: http://llvm.org/viewvc/llvm-project?rev=125452&view=rev Log: Wrap the struct in an anonymous namespace. Modified: llvm/trunk/utils/TableGen/ClangDiagnosticsEmitter.cpp Modified: llvm/trunk/utils/TableGen/ClangDiagnosticsEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/ClangDiagnosticsEmitter.cpp?rev=125452&r1=125451&r2=125452&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/ClangDiagnosticsEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/ClangDiagnosticsEmitter.cpp Sun Feb 13 01:51:19 2011 @@ -187,11 +187,13 @@ // Warning Group Tables generation //===----------------------------------------------------------------------===// +namespace { struct GroupInfo { std::vector DiagsInGroup; std::vector SubGroups; unsigned IDNo; }; +} // end anonymous namespace. void ClangDiagGroupsEmitter::run(raw_ostream &OS) { // Compute a mapping from a DiagGroup to all of its parents. From sabre at nondot.org Sun Feb 13 02:04:17 2011 From: sabre at nondot.org (Chris Lattner) Date: Sun, 13 Feb 2011 08:04:17 -0000 Subject: [llvm-commits] [llvm] r125453 - /llvm/trunk/include/llvm/ADT/APInt.h Message-ID: <20110213080417.14CAA2A6C12C@llvm.org> Author: lattner Date: Sun Feb 13 02:04:16 2011 New Revision: 125453 URL: http://llvm.org/viewvc/llvm-project?rev=125453&view=rev Log: add a helper method. Modified: llvm/trunk/include/llvm/ADT/APInt.h Modified: llvm/trunk/include/llvm/ADT/APInt.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/APInt.h?rev=125453&r1=125452&r2=125453&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/APInt.h (original) +++ llvm/trunk/include/llvm/ADT/APInt.h Sun Feb 13 02:04:16 2011 @@ -431,6 +431,13 @@ /// @returns the low "numBits" bits of this APInt. APInt getLoBits(unsigned numBits) const; + /// getOneBitSet - Return an APInt with exactly one bit set in the result. + static APInt getOneBitSet(unsigned numBits, unsigned BitNo) { + APInt Res(numBits, 0); + Res.setBit(BitNo); + return Res; + } + /// Constructs an APInt value that has a contiguous range of bits set. The /// bits from loBit (inclusive) to hiBit (exclusive) will be set. All other /// bits will be zero. For example, with parameters(32, 0, 16) you would get From sabre at nondot.org Sun Feb 13 02:07:21 2011 From: sabre at nondot.org (Chris Lattner) Date: Sun, 13 Feb 2011 08:07:21 -0000 Subject: [llvm-commits] [llvm] r125454 - in /llvm/trunk: lib/Transforms/InstCombine/InstCombineCompares.cpp test/Transforms/InstCombine/exact.ll Message-ID: <20110213080721.C6CDA2A6C12C@llvm.org> Author: lattner Date: Sun Feb 13 02:07:21 2011 New Revision: 125454 URL: http://llvm.org/viewvc/llvm-project?rev=125454&view=rev Log: implement instcombine folding for things like (x >> c) < 42. We were previously simplifying divisions, but not right shifts! Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp llvm/trunk/test/Transforms/InstCombine/exact.ll Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp?rev=125454&r1=125453&r2=125454&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp Sun Feb 13 02:07:21 2011 @@ -794,9 +794,11 @@ return 0; // The ProdOV computation fails on divide by zero. if (DivIsSigned && DivRHS->isAllOnesValue()) return 0; // The overflow computation also screws up here - if (DivRHS->isOne()) - return 0; // Not worth bothering, and eliminates some funny cases - // with INT_MIN. + if (DivRHS->isOne()) { + // This eliminates some funny cases with INT_MIN. + ICI.setOperand(0, DivI->getOperand(0)); // X/1 == X. + return &ICI; + } // Compute Prod = CI * DivRHS. We are essentially solving an equation // of form X/C1=C2. We solve for X by multiplying C1 (DivRHS) and @@ -931,8 +933,6 @@ /// FoldICmpShrCst - Handle "icmp(([al]shr X, cst1), cst2)". Instruction *InstCombiner::FoldICmpShrCst(ICmpInst &ICI, BinaryOperator *Shr, ConstantInt *ShAmt) { - if (!ICI.isEquality()) return 0; - const APInt &CmpRHSV = cast(ICI.getOperand(1))->getValue(); // Check that the shift amount is in range. If not, don't perform @@ -940,9 +940,50 @@ // simplified. uint32_t TypeBits = CmpRHSV.getBitWidth(); uint32_t ShAmtVal = (uint32_t)ShAmt->getLimitedValue(TypeBits); - if (ShAmtVal >= TypeBits) + if (ShAmtVal >= TypeBits || ShAmtVal == 0) return 0; + if (!ICI.isEquality()) { + // If we have an unsigned comparison and an ashr, we can't simplify this. + // Similarly for signed comparisons with lshr. + if (ICI.isSigned() != (Shr->getOpcode() == Instruction::AShr)) + return 0; + + // Otherwise, all lshr and all exact ashr's are equivalent to a udiv/sdiv by + // a power of 2. Since we already have logic to simplify these, transform + // to div and then simplify the resultant comparison. + if (Shr->getOpcode() == Instruction::AShr && + !Shr->isExact()) + return 0; + + // Revisit the shift (to delete it). + Worklist.Add(Shr); + + Constant *DivCst = + ConstantInt::get(Shr->getType(), APInt::getOneBitSet(TypeBits, ShAmtVal)); + + Value *Tmp = + Shr->getOpcode() == Instruction::AShr ? + Builder->CreateSDiv(Shr->getOperand(0), DivCst, "", Shr->isExact()) : + Builder->CreateUDiv(Shr->getOperand(0), DivCst, "", Shr->isExact()); + + ICI.setOperand(0, Tmp); + + // If the builder folded the binop, just return it. + BinaryOperator *TheDiv = dyn_cast(Tmp); + if (TheDiv == 0) + return &ICI; + + // Otherwise, fold this div/compare. + assert(TheDiv->getOpcode() == Instruction::SDiv || + TheDiv->getOpcode() == Instruction::UDiv); + + Instruction *Res = FoldICmpDivCst(ICI, TheDiv, cast(DivCst)); + assert(Res && "This div/cst should have folded!"); + return Res; + } + + // If we are comparing against bits always shifted out, the // comparison cannot succeed. APInt Comp = CmpRHSV << ShAmtVal; @@ -1266,8 +1307,9 @@ if (LHSI->hasOneUse() && isSignBitCheck(ICI.getPredicate(), RHS, TrueIfSigned)) { // (X << 31) (X&1) != 0 - Constant *Mask = ConstantInt::get(ICI.getContext(), APInt(TypeBits, 1) << - (TypeBits-ShAmt->getZExtValue()-1)); + Constant *Mask = ConstantInt::get(LHSI->getOperand(0)->getType(), + APInt::getOneBitSet(TypeBits, + TypeBits-ShAmt->getZExtValue()-1)); Value *And = Builder->CreateAnd(LHSI->getOperand(0), Mask, LHSI->getName()+".mask"); return new ICmpInst(TrueIfSigned ? ICmpInst::ICMP_NE : ICmpInst::ICMP_EQ, Modified: llvm/trunk/test/Transforms/InstCombine/exact.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/exact.ll?rev=125454&r1=125453&r2=125454&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/exact.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/exact.ll Sun Feb 13 02:07:21 2011 @@ -77,15 +77,24 @@ ret i64 %B } -; CHECK: @ashr_icmp +; CHECK: @ashr_icmp1 ; CHECK: %B = icmp eq i64 %X, 0 ; CHECK: ret i1 %B -define i1 @ashr_icmp(i64 %X) nounwind { +define i1 @ashr_icmp1(i64 %X) nounwind { %A = ashr exact i64 %X, 2 ; X/4 %B = icmp eq i64 %A, 0 ret i1 %B } +; CHECK: @ashr_icmp2 +; CHECK: %Z = icmp slt i64 %X, 16 +; CHECK: ret i1 %Z +define i1 @ashr_icmp2(i64 %X) nounwind { + %Y = ashr exact i64 %X, 2 ; x / 4 + %Z = icmp slt i64 %Y, 4 ; x < 16 + ret i1 %Z +} + ; CHECK: @udiv_icmp1 ; CHECK: icmp ne i64 %X, 0 define i1 @udiv_icmp1(i64 %X) nounwind { From sabre at nondot.org Sun Feb 13 02:27:32 2011 From: sabre at nondot.org (Chris Lattner) Date: Sun, 13 Feb 2011 08:27:32 -0000 Subject: [llvm-commits] [llvm] r125455 - /llvm/trunk/test/Transforms/InstCombine/exact.ll Message-ID: <20110213082732.1B6C42A6C12C@llvm.org> Author: lattner Date: Sun Feb 13 02:27:31 2011 New Revision: 125455 URL: http://llvm.org/viewvc/llvm-project?rev=125455&view=rev Log: add PR# Modified: llvm/trunk/test/Transforms/InstCombine/exact.ll Modified: llvm/trunk/test/Transforms/InstCombine/exact.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/exact.ll?rev=125455&r1=125454&r2=125455&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/exact.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/exact.ll Sun Feb 13 02:27:31 2011 @@ -77,6 +77,7 @@ ret i64 %B } +; PR9120 ; CHECK: @ashr_icmp1 ; CHECK: %B = icmp eq i64 %X, 0 ; CHECK: ret i1 %B From sabre at nondot.org Sun Feb 13 02:38:44 2011 From: sabre at nondot.org (Chris Lattner) Date: Sun, 13 Feb 2011 08:38:44 -0000 Subject: [llvm-commits] [llvm] r125456 - /llvm/trunk/tools/llvm-shlib/Makefile Message-ID: <20110213083844.E23302A6C12D@llvm.org> Author: lattner Date: Sun Feb 13 02:38:44 2011 New Revision: 125456 URL: http://llvm.org/viewvc/llvm-project?rev=125456&view=rev Log: improve solaris support, from PR9109, patch by Yuri! Modified: llvm/trunk/tools/llvm-shlib/Makefile Modified: llvm/trunk/tools/llvm-shlib/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-shlib/Makefile?rev=125456&r1=125455&r2=125456&view=diff ============================================================================== --- llvm/trunk/tools/llvm-shlib/Makefile (original) +++ llvm/trunk/tools/llvm-shlib/Makefile Sun Feb 13 02:38:44 2011 @@ -73,6 +73,11 @@ LLVMLibsOptions += -Wl,--no-undefined endif +ifeq ($(HOST_OS),SunOS) + # add -z allextract ahead of other libraries on Solaris + LLVMLibsOptions := -Wl,-z -Wl,allextract $(LLVMLibsOptions) +endif + ifeq ($(HOST_OS), $(filter $(HOST_OS), Cygwin MingW)) SHLIB_STUBS := $(addprefix $(ObjDir)/, $(SHLIB_FRAG_NAMES)) From sabre at nondot.org Sun Feb 13 03:02:52 2011 From: sabre at nondot.org (Chris Lattner) Date: Sun, 13 Feb 2011 09:02:52 -0000 Subject: [llvm-commits] [llvm] r125457 - in /llvm/trunk: lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp test/CodeGen/CellSPU/shift_ops.ll test/CodeGen/MBlaze/shift.ll Message-ID: <20110213090252.45E122A6C12D@llvm.org> Author: lattner Date: Sun Feb 13 03:02:52 2011 New Revision: 125457 URL: http://llvm.org/viewvc/llvm-project?rev=125457&view=rev Log: fix visitShift to properly zero extend the shift amount if the provided operand is narrower than the shift register. Doing an anyext provides undefined bits in the top part of the register. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp llvm/trunk/test/CodeGen/CellSPU/shift_ops.ll llvm/trunk/test/CodeGen/MBlaze/shift.ll Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=125457&r1=125456&r2=125457&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Sun Feb 13 03:02:52 2011 @@ -2424,31 +2424,30 @@ void SelectionDAGBuilder::visitShift(const User &I, unsigned Opcode) { SDValue Op1 = getValue(I.getOperand(0)); SDValue Op2 = getValue(I.getOperand(1)); - if (!I.getType()->isVectorTy() && - Op2.getValueType() != TLI.getShiftAmountTy()) { + + MVT ShiftTy = TLI.getShiftAmountTy(); + unsigned ShiftSize = ShiftTy.getSizeInBits(); + unsigned Op2Size = Op2.getValueType().getSizeInBits(); + + // Coerce the shift amount to the right type if we can. + if (!I.getType()->isVectorTy() && Op2.getValueType() != ShiftTy) { + DebugLoc DL = getCurDebugLoc(); + // If the operand is smaller than the shift count type, promote it. - EVT PTy = TLI.getPointerTy(); - EVT STy = TLI.getShiftAmountTy(); - if (STy.bitsGT(Op2.getValueType())) - Op2 = DAG.getNode(ISD::ANY_EXTEND, getCurDebugLoc(), - TLI.getShiftAmountTy(), Op2); + MVT PtrTy = TLI.getPointerTy(); + if (ShiftSize > Op2Size) + Op2 = DAG.getNode(ISD::ZERO_EXTEND, DL, ShiftTy, Op2); + // If the operand is larger than the shift count type but the shift // count type has enough bits to represent any shift value, truncate // it now. This is a common case and it exposes the truncate to // optimization early. - else if (STy.getSizeInBits() >= - Log2_32_Ceil(Op2.getValueType().getSizeInBits())) - Op2 = DAG.getNode(ISD::TRUNCATE, getCurDebugLoc(), - TLI.getShiftAmountTy(), Op2); - // Otherwise we'll need to temporarily settle for some other - // convenient type; type legalization will make adjustments as - // needed. - else if (PTy.bitsLT(Op2.getValueType())) - Op2 = DAG.getNode(ISD::TRUNCATE, getCurDebugLoc(), - TLI.getPointerTy(), Op2); - else if (PTy.bitsGT(Op2.getValueType())) - Op2 = DAG.getNode(ISD::ANY_EXTEND, getCurDebugLoc(), - TLI.getPointerTy(), Op2); + else if (ShiftSize >= Log2_32_Ceil(Op2.getValueType().getSizeInBits())) + Op2 = DAG.getNode(ISD::TRUNCATE, DL, ShiftTy, Op2); + // Otherwise we'll need to temporarily settle for some other convenient + // type. Type legalization will make adjustments as needed. + else + Op2 = DAG.getZExtOrTrunc(Op2, DL, PtrTy); } setValue(&I, DAG.getNode(Opcode, getCurDebugLoc(), Modified: llvm/trunk/test/CodeGen/CellSPU/shift_ops.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/shift_ops.ll?rev=125457&r1=125456&r2=125457&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/shift_ops.ll (original) +++ llvm/trunk/test/CodeGen/CellSPU/shift_ops.ll Sun Feb 13 03:02:52 2011 @@ -4,7 +4,7 @@ ; RUN: grep {shl } %t1.s | count 9 ; RUN: grep {shli } %t1.s | count 3 ; RUN: grep {xshw } %t1.s | count 5 -; RUN: grep {and } %t1.s | count 5 +; RUN: grep {and } %t1.s | count 14 ; RUN: grep {andi } %t1.s | count 2 ; RUN: grep {rotmi } %t1.s | count 2 ; RUN: grep {rotqmbyi } %t1.s | count 1 Modified: llvm/trunk/test/CodeGen/MBlaze/shift.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MBlaze/shift.ll?rev=125457&r1=125456&r2=125457&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/MBlaze/shift.ll (original) +++ llvm/trunk/test/CodeGen/MBlaze/shift.ll Sun Feb 13 03:02:52 2011 @@ -13,7 +13,6 @@ ; FUN: andi ; FUN: add ; FUN: bnei - ; SHT-NOT: andi ; SHT-NOT: bnei ret i8 %tmp.1 @@ -50,7 +49,6 @@ ; FUN: andi ; FUN: add ; FUN: bnei - ; SHT-NOT: andi ; SHT-NOT: bnei ret i16 %tmp.1 From sabre at nondot.org Sun Feb 13 03:10:56 2011 From: sabre at nondot.org (Chris Lattner) Date: Sun, 13 Feb 2011 09:10:56 -0000 Subject: [llvm-commits] [llvm] r125458 - in /llvm/trunk: lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp test/CodeGen/X86/crash.ll Message-ID: <20110213091056.BAB752A6C12D@llvm.org> Author: lattner Date: Sun Feb 13 03:10:56 2011 New Revision: 125458 URL: http://llvm.org/viewvc/llvm-project?rev=125458&view=rev Log: when legalizing extremely wide shifts, make sure that the shift amounts are in a suitably wide type so that we don't generate out of range constant shift amounts. This fixes PR9028. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp llvm/trunk/test/CodeGen/X86/crash.ll Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp?rev=125458&r1=125457&r2=125458&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Sun Feb 13 03:10:56 2011 @@ -1167,13 +1167,19 @@ unsigned NVTBits = NVT.getSizeInBits(); EVT ShTy = N->getOperand(1).getValueType(); + // If this is a large integer being legalized (e.g. an i512) then plop the + // shift amount down as a fixed i32. The target shift amount may be something + // like i8, but this isn't enough to represent the shift amount. + if (NVTBits > 256) + ShTy = MVT::i32; + if (N->getOpcode() == ISD::SHL) { if (Amt > VTBits) { Lo = Hi = DAG.getConstant(0, NVT); } else if (Amt > NVTBits) { Lo = DAG.getConstant(0, NVT); Hi = DAG.getNode(ISD::SHL, dl, - NVT, InL, DAG.getConstant(Amt-NVTBits,ShTy)); + NVT, InL, DAG.getConstant(Amt-NVTBits, ShTy)); } else if (Amt == NVTBits) { Lo = DAG.getConstant(0, NVT); Hi = InL; Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=125458&r1=125457&r2=125458&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Sun Feb 13 03:10:56 2011 @@ -2426,11 +2426,11 @@ SDValue Op2 = getValue(I.getOperand(1)); MVT ShiftTy = TLI.getShiftAmountTy(); - unsigned ShiftSize = ShiftTy.getSizeInBits(); - unsigned Op2Size = Op2.getValueType().getSizeInBits(); // Coerce the shift amount to the right type if we can. if (!I.getType()->isVectorTy() && Op2.getValueType() != ShiftTy) { + unsigned ShiftSize = ShiftTy.getSizeInBits(); + unsigned Op2Size = Op2.getValueType().getSizeInBits(); DebugLoc DL = getCurDebugLoc(); // If the operand is smaller than the shift count type, promote it. Modified: llvm/trunk/test/CodeGen/X86/crash.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/crash.ll?rev=125458&r1=125457&r2=125458&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/crash.ll (original) +++ llvm/trunk/test/CodeGen/X86/crash.ll Sun Feb 13 03:10:56 2011 @@ -187,3 +187,15 @@ %add46 = add i32 %l_74.0, 1 br label %for.body } + +; PR9028 +define void @f(i64 %A) nounwind { +entry: + %0 = zext i64 %A to i160 + %1 = shl i160 %0, 64 + %2 = zext i160 %1 to i576 + %3 = zext i96 undef to i576 + %4 = or i576 %3, %2 + store i576 %4, i576* undef, align 8 + ret void +} From fvbommel at gmail.com Sun Feb 13 04:18:26 2011 From: fvbommel at gmail.com (Frits van Bommel) Date: Sun, 13 Feb 2011 11:18:26 +0100 Subject: [llvm-commits] [llvm] r125451 - in /llvm/trunk/lib/Transforms/InstCombine: InstCombine.h InstCombineCompares.cpp In-Reply-To: <20110213074307.A68D12A6C12C@llvm.org> References: <20110213074307.A68D12A6C12C@llvm.org> Message-ID: On Sun, Feb 13, 2011 at 8:43 AM, Chris Lattner wrote: > +/// FoldICmpShrCst - Handle "icmp(([al]shr X, cst1), cst2)". > +Instruction *InstCombiner::FoldICmpShrCst(ICmpInst &ICI, BinaryOperator *Shr, > + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?ConstantInt *ShAmt) { ... > + ?if (Shr->hasOneUse() && cast(Shr)->isExact()) Shr is already a BinaryOperator* here. From baldrick at free.fr Sun Feb 13 05:28:51 2011 From: baldrick at free.fr (Duncan Sands) Date: Sun, 13 Feb 2011 12:28:51 +0100 Subject: [llvm-commits] [llvm] r125458 - in /llvm/trunk: lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp test/CodeGen/X86/crash.ll In-Reply-To: <20110213091056.BAB752A6C12D@llvm.org> References: <20110213091056.BAB752A6C12D@llvm.org> Message-ID: <4D57C073.50106@free.fr> Hi Chris, > when legalizing extremely wide shifts, make sure that > the shift amounts are in a suitably wide type so that > we don't generate out of range constant shift amounts. ... > --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original) > +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Sun Feb 13 03:10:56 2011 > @@ -1167,13 +1167,19 @@ > unsigned NVTBits = NVT.getSizeInBits(); > EVT ShTy = N->getOperand(1).getValueType(); > > + // If this is a large integer being legalized (e.g. an i512) then plop the > + // shift amount down as a fixed i32. The target shift amount may be something > + // like i8, but this isn't enough to represent the shift amount. > + if (NVTBits> 256) > + ShTy = MVT::i32; I'm confused as to why this helps. ShTy was defined (see above) to be N->getOperand(1).getValueType() How can that ever be too small? Ciao, Duncan. From benny.kra at googlemail.com Sun Feb 13 08:25:11 2011 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Sun, 13 Feb 2011 15:25:11 +0100 Subject: [llvm-commits] [llvm] r125393 - in /llvm/trunk: lib/VMCore/ConstantFold.cpp test/Transforms/InstCombine/bitcast-vec-uniform.ll test/Transforms/InstCombine/fold-vector-select.ll In-Reply-To: <20110211193756.00C782A6C12C@llvm.org> References: <20110211193756.00C782A6C12C@llvm.org> Message-ID: <33543FF9-1ACE-4D44-8E7F-6D73B5F52D06@googlemail.com> On 11.02.2011, at 20:37, Nadav Rotem wrote: > Author: nadav > Date: Fri Feb 11 13:37:55 2011 > New Revision: 125393 > > URL: http://llvm.org/viewvc/llvm-project?rev=125393&view=rev > Log: > Fix 9173. > > Add more folding patterns to constant expressions of vector selects and vector > bitcasts. > > > Added: > llvm/trunk/test/Transforms/InstCombine/bitcast-vec-uniform.ll (with props) > llvm/trunk/test/Transforms/InstCombine/fold-vector-select.ll (with props) > Modified: > llvm/trunk/lib/VMCore/ConstantFold.cpp > > Modified: llvm/trunk/lib/VMCore/ConstantFold.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/ConstantFold.cpp?rev=125393&r1=125392&r2=125393&view=diff > ============================================================================== > --- llvm/trunk/lib/VMCore/ConstantFold.cpp (original) > +++ llvm/trunk/lib/VMCore/ConstantFold.cpp Fri Feb 11 13:37:55 2011 > @@ -42,6 +42,10 @@ > /// input vector constant are all simple integer or FP values. > static Constant *BitCastConstantVector(ConstantVector *CV, > const VectorType *DstTy) { > + > + if (CV->isAllOnesValue()) return Constant::getAllOnesValue(DstTy); > + if (CV->isNullValue()) return Constant::getNullValue(DstTy); > + Hi Nadav, it looks like this change caused a crash in MultiSource/Benchmarks/Bullet in the test-suite, here's a reduced test case: define <2 x float> @foo() { %cast = bitcast i64 -1 to <2 x float> ret <2 x float> %cast } the test hits an assertion with "opt -std-compile-opts" because Constant::getAllOnesValue doesn't know how to handle floats. - Benjamin From nadav.rotem at intel.com Sun Feb 13 09:16:01 2011 From: nadav.rotem at intel.com (Rotem, Nadav) Date: Sun, 13 Feb 2011 17:16:01 +0200 Subject: [llvm-commits] [llvm] r125393 - in /llvm/trunk: lib/VMCore/ConstantFold.cpp test/Transforms/InstCombine/bitcast-vec-uniform.ll test/Transforms/InstCombine/fold-vector-select.ll In-Reply-To: <33543FF9-1ACE-4D44-8E7F-6D73B5F52D06@googlemail.com> References: <20110211193756.00C782A6C12C@llvm.org> <33543FF9-1ACE-4D44-8E7F-6D73B5F52D06@googlemail.com> Message-ID: <6594DDFF12B03D4E89690887C24869940270CCB0D6@hasmsx504.ger.corp.intel.com> Hi Benjamin, Thank you for catching this. The patch below fixes the problem. If it looks good to you I will commit it. Thanks, Nadav Details: 1. Added a test to reproduce the problem. 2. Added a check that the vector is of integer type. Index: ../llvm/test/Transforms/InstCombine/bitcast-vec-uniform.ll =================================================================== --- ../llvm/test/Transforms/InstCombine/bitcast-vec-uniform.ll (revision 125450) +++ ../llvm/test/Transforms/InstCombine/bitcast-vec-uniform.ll (working copy) @@ -1,14 +1,30 @@ -; RUN: opt < %s -instcombine -S | not grep bitcast +; RUN: opt < %s -instcombine -S | FileCheck %s +; CHECK: @a +; CHECK-NOT: bitcast +; CHECK: ret define <4 x i32> @a(<1 x i64> %y) { %c = bitcast <2 x i64> to <4 x i32> ret <4 x i32> %c } +; CHECK: @b +; CHECK-NOT: bitcast +; CHECK: ret + define <4 x i32> @b(<1 x i64> %y) { %c = bitcast <2 x i64> to <4 x i32> ret <4 x i32> %c } +; CHECK: @foo +; CHECK: bitcast +; from MultiSource/Benchmarks/Bullet +define <2 x float> @foo() { + %cast = bitcast i64 -1 to <2 x float> + ret <2 x float> %cast +} Index: ../llvm/lib/VMCore/ConstantFold.cpp =================================================================== --- ../llvm/lib/VMCore/ConstantFold.cpp (revision 125450) +++ ../llvm/lib/VMCore/ConstantFold.cpp (working copy) @@ -43,7 +43,8 @@ static Constant *BitCastConstantVector(ConstantVector *CV, const VectorType *DstTy) { - if (CV->isAllOnesValue()) return Constant::getAllOnesValue(DstTy); + if (CV->isAllOnesValue() && DstTy->getElementType()->isIntegerTy()) + return Constant::getAllOnesValue(DstTy); if (CV->isNullValue()) return Constant::getNullValue(DstTy); -----Original Message----- From: Benjamin Kramer [mailto:benny.kra at googlemail.com] Sent: Sunday, February 13, 2011 16:25 To: Rotem, Nadav Cc: llvm-commits at cs.uiuc.edu Subject: Re: [llvm-commits] [llvm] r125393 - in /llvm/trunk: lib/VMCore/ConstantFold.cpp test/Transforms/InstCombine/bitcast-vec-uniform.ll test/Transforms/InstCombine/fold-vector-select.ll On 11.02.2011, at 20:37, Nadav Rotem wrote: > Author: nadav > Date: Fri Feb 11 13:37:55 2011 > New Revision: 125393 > > URL: http://llvm.org/viewvc/llvm-project?rev=125393&view=rev > Log: > Fix 9173. > > Add more folding patterns to constant expressions of vector selects and vector > bitcasts. > > > Added: > llvm/trunk/test/Transforms/InstCombine/bitcast-vec-uniform.ll (with props) > llvm/trunk/test/Transforms/InstCombine/fold-vector-select.ll (with props) > Modified: > llvm/trunk/lib/VMCore/ConstantFold.cpp > > Modified: llvm/trunk/lib/VMCore/ConstantFold.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/ConstantFold.cpp?rev=125393&r1=125392&r2=125393&view=diff > ============================================================================== > --- llvm/trunk/lib/VMCore/ConstantFold.cpp (original) > +++ llvm/trunk/lib/VMCore/ConstantFold.cpp Fri Feb 11 13:37:55 2011 > @@ -42,6 +42,10 @@ > /// input vector constant are all simple integer or FP values. > static Constant *BitCastConstantVector(ConstantVector *CV, > const VectorType *DstTy) { > + > + if (CV->isAllOnesValue()) return Constant::getAllOnesValue(DstTy); > + if (CV->isNullValue()) return Constant::getNullValue(DstTy); > + Hi Nadav, it looks like this change caused a crash in MultiSource/Benchmarks/Bullet in the test-suite, here's a reduced test case: define <2 x float> @foo() { %cast = bitcast i64 -1 to <2 x float> ret <2 x float> %cast } the test hits an assertion with "opt -std-compile-opts" because Constant::getAllOnesValue doesn't know how to handle floats. - Benjamin --------------------------------------------------------------------- Intel Israel (74) Limited This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). Any review or distribution by others is strictly prohibited. If you are not the intended recipient, please contact the sender and delete all copies. From benny.kra at googlemail.com Sun Feb 13 09:37:33 2011 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Sun, 13 Feb 2011 16:37:33 +0100 Subject: [llvm-commits] [llvm] r125393 - in /llvm/trunk: lib/VMCore/ConstantFold.cpp test/Transforms/InstCombine/bitcast-vec-uniform.ll test/Transforms/InstCombine/fold-vector-select.ll In-Reply-To: <6594DDFF12B03D4E89690887C24869940270CCB0D6@hasmsx504.ger.corp.intel.com> References: <20110211193756.00C782A6C12C@llvm.org> <33543FF9-1ACE-4D44-8E7F-6D73B5F52D06@googlemail.com> <6594DDFF12B03D4E89690887C24869940270CCB0D6@hasmsx504.ger.corp.intel.com> Message-ID: <696A0629-8FF2-49E8-B271-7764249B3326@googlemail.com> On 13.02.2011, at 16:16, Rotem, Nadav wrote: > Hi Benjamin, > > Thank you for catching this. > > The patch below fixes the problem. If it looks good to you I will commit it. > > Thanks, > Nadav > > Details: > 1. Added a test to reproduce the problem. > 2. Added a check that the vector is of integer type. > > > Index: ../llvm/test/Transforms/InstCombine/bitcast-vec-uniform.ll > =================================================================== > --- ../llvm/test/Transforms/InstCombine/bitcast-vec-uniform.ll (revision 125450) > +++ ../llvm/test/Transforms/InstCombine/bitcast-vec-uniform.ll (working copy) > @@ -1,14 +1,30 @@ > -; RUN: opt < %s -instcombine -S | not grep bitcast > +; RUN: opt < %s -instcombine -S | FileCheck %s > > +; CHECK: @a > +; CHECK-NOT: bitcast > +; CHECK: ret > define <4 x i32> @a(<1 x i64> %y) { > %c = bitcast <2 x i64> to <4 x i32> > ret <4 x i32> %c > } > > +; CHECK: @b > +; CHECK-NOT: bitcast > +; CHECK: ret > + > define <4 x i32> @b(<1 x i64> %y) { > %c = bitcast <2 x i64> to <4 x i32> > ret <4 x i32> %c > } > > +; CHECK: @foo > +; CHECK: bitcast > > +; from MultiSource/Benchmarks/Bullet > +define <2 x float> @foo() { > + %cast = bitcast i64 -1 to <2 x float> > + ret <2 x float> %cast > +} > > > Index: ../llvm/lib/VMCore/ConstantFold.cpp > =================================================================== > --- ../llvm/lib/VMCore/ConstantFold.cpp (revision 125450) > +++ ../llvm/lib/VMCore/ConstantFold.cpp (working copy) > @@ -43,7 +43,8 @@ > static Constant *BitCastConstantVector(ConstantVector *CV, > const VectorType *DstTy) { > > - if (CV->isAllOnesValue()) return Constant::getAllOnesValue(DstTy); > + if (CV->isAllOnesValue() && DstTy->getElementType()->isIntegerTy()) > + return Constant::getAllOnesValue(DstTy); > if (CV->isNullValue()) return Constant::getNullValue(DstTy); Looks good to me! From nadav.rotem at intel.com Sun Feb 13 09:45:34 2011 From: nadav.rotem at intel.com (Nadav Rotem) Date: Sun, 13 Feb 2011 15:45:34 -0000 Subject: [llvm-commits] [llvm] r125459 - in /llvm/trunk: lib/VMCore/ConstantFold.cpp test/Transforms/InstCombine/bitcast-vec-uniform.ll Message-ID: <20110213154534.E0CEF2A6C12C@llvm.org> Author: nadav Date: Sun Feb 13 09:45:34 2011 New Revision: 125459 URL: http://llvm.org/viewvc/llvm-project?rev=125459&view=rev Log: Fix a regression from r125393; It caused a crash in MultiSource/Benchmarks/Bullet. Opt hit an assertion with "opt -std-compile-opts" because Constant::getAllOnesValue doesn't know how to handle floats. This patch added a test to reproduce the problem and a check that the destination vector is of integer type. Thank you Benjamin! Modified: llvm/trunk/lib/VMCore/ConstantFold.cpp llvm/trunk/test/Transforms/InstCombine/bitcast-vec-uniform.ll Modified: llvm/trunk/lib/VMCore/ConstantFold.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/ConstantFold.cpp?rev=125459&r1=125458&r2=125459&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/ConstantFold.cpp (original) +++ llvm/trunk/lib/VMCore/ConstantFold.cpp Sun Feb 13 09:45:34 2011 @@ -43,7 +43,8 @@ static Constant *BitCastConstantVector(ConstantVector *CV, const VectorType *DstTy) { - if (CV->isAllOnesValue()) return Constant::getAllOnesValue(DstTy); + if (CV->isAllOnesValue() && DstTy->getElementType()->isIntegerTy()) + return Constant::getAllOnesValue(DstTy); if (CV->isNullValue()) return Constant::getNullValue(DstTy); // If this cast changes element count then we can't handle it here: Modified: llvm/trunk/test/Transforms/InstCombine/bitcast-vec-uniform.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/bitcast-vec-uniform.ll?rev=125459&r1=125458&r2=125459&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/bitcast-vec-uniform.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/bitcast-vec-uniform.ll Sun Feb 13 09:45:34 2011 @@ -1,14 +1,30 @@ -; RUN: opt < %s -instcombine -S | not grep bitcast +; RUN: opt < %s -instcombine -S | FileCheck %s +; CHECK: @a +; CHECK-NOT: bitcast +; CHECK: ret define <4 x i32> @a(<1 x i64> %y) { %c = bitcast <2 x i64> to <4 x i32> ret <4 x i32> %c } +; CHECK: @b +; CHECK: bitcast +; CHECK: ret + define <4 x i32> @b(<1 x i64> %y) { %c = bitcast <2 x i64> to <4 x i32> ret <4 x i32> %c } +; CHECK: @foo +; CHECK: bitcast + +; from MultiSource/Benchmarks/Bullet +define <2 x float> @foo() { + %cast = bitcast i64 -1 to <2 x float> + ret <2 x float> %cast +} + From nadav.rotem at intel.com Sun Feb 13 10:13:16 2011 From: nadav.rotem at intel.com (Nadav Rotem) Date: Sun, 13 Feb 2011 16:13:16 -0000 Subject: [llvm-commits] [llvm] r125460 - /llvm/trunk/test/Transforms/InstCombine/bitcast-vec-uniform.ll Message-ID: <20110213161316.E509E2A6C12C@llvm.org> Author: nadav Date: Sun Feb 13 10:13:16 2011 New Revision: 125460 URL: http://llvm.org/viewvc/llvm-project?rev=125460&view=rev Log: Fix test Modified: llvm/trunk/test/Transforms/InstCombine/bitcast-vec-uniform.ll Modified: llvm/trunk/test/Transforms/InstCombine/bitcast-vec-uniform.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/bitcast-vec-uniform.ll?rev=125460&r1=125459&r2=125460&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/bitcast-vec-uniform.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/bitcast-vec-uniform.ll Sun Feb 13 10:13:16 2011 @@ -9,7 +9,7 @@ } ; CHECK: @b -; CHECK: bitcast +; CHECK-NOT: bitcast ; CHECK: ret define <4 x i32> @b(<1 x i64> %y) { From baldrick at free.fr Sun Feb 13 11:02:43 2011 From: baldrick at free.fr (Duncan Sands) Date: Sun, 13 Feb 2011 18:02:43 +0100 Subject: [llvm-commits] [llvm] r125393 - in /llvm/trunk: lib/VMCore/ConstantFold.cpp test/Transforms/InstCombine/bitcast-vec-uniform.ll test/Transforms/InstCombine/fold-vector-select.ll In-Reply-To: <6594DDFF12B03D4E89690887C24869940270CCB0D6@hasmsx504.ger.corp.intel.com> References: <20110211193756.00C782A6C12C@llvm.org> <33543FF9-1ACE-4D44-8E7F-6D73B5F52D06@googlemail.com> <6594DDFF12B03D4E89690887C24869940270CCB0D6@hasmsx504.ger.corp.intel.com> Message-ID: <4D580EB3.2070701@free.fr> Hi Nadav, > Thank you for catching this. > > The patch below fixes the problem. If it looks good to you I will commit it. why not teach getAllOnesValue to handle floating point types instead? Ciao, Duncan. From baldrick at free.fr Sun Feb 13 11:15:40 2011 From: baldrick at free.fr (Duncan Sands) Date: Sun, 13 Feb 2011 17:15:40 -0000 Subject: [llvm-commits] [llvm] r125462 - in /llvm/trunk: lib/Analysis/InstructionSimplify.cpp test/Transforms/InstSimplify/2011-01-18-Compare.ll test/Transforms/InstSimplify/compare.ll Message-ID: <20110213171540.E756B2A6C12C@llvm.org> Author: baldrick Date: Sun Feb 13 11:15:40 2011 New Revision: 125462 URL: http://llvm.org/viewvc/llvm-project?rev=125462&view=rev Log: Teach instsimplify that X+Y>=X+Z is the same as Y>=Z if neither side overflows, plus some variations of this. According to my auto-simplifier this occurs a lot but usually in combination with max/min idioms. Because max/min aren't handled yet this unfortunately doesn't have much effect in the testsuite. Added: llvm/trunk/test/Transforms/InstSimplify/compare.ll - copied, changed from r125369, llvm/trunk/test/Transforms/InstSimplify/2011-01-18-Compare.ll Removed: llvm/trunk/test/Transforms/InstSimplify/2011-01-18-Compare.ll Modified: llvm/trunk/lib/Analysis/InstructionSimplify.cpp Modified: llvm/trunk/lib/Analysis/InstructionSimplify.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/InstructionSimplify.cpp?rev=125462&r1=125461&r2=125462&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/InstructionSimplify.cpp (original) +++ llvm/trunk/lib/Analysis/InstructionSimplify.cpp Sun Feb 13 11:15:40 2011 @@ -986,7 +986,7 @@ if (match(Op0, m_Shl(m_Value(X), m_Specific(Op1))) && cast(Op0)->hasNoUnsignedWrap()) return X; - + return 0; } @@ -1016,7 +1016,7 @@ if (match(Op0, m_Shl(m_Value(X), m_Specific(Op1))) && cast(Op0)->hasNoSignedWrap()) return X; - + return 0; } @@ -1588,6 +1588,53 @@ } } + // Special logic for binary operators. + BinaryOperator *LBO = dyn_cast(LHS); + BinaryOperator *RBO = dyn_cast(RHS); + if (MaxRecurse && (LBO || RBO)) { + + // Analyze the case when either LHS or RHS is an add instruction. + Value *A = 0, *B = 0, *C = 0, *D = 0; + // LHS = A + B (or A and B are null); RHS = C + D (or C and D are null). + bool NoLHSWrapProblem = false, NoRHSWrapProblem = false; + if (LBO && LBO->getOpcode() == Instruction::Add) { + A = LBO->getOperand(0); B = LBO->getOperand(1); + NoLHSWrapProblem = ICmpInst::isEquality(Pred) || + (CmpInst::isUnsigned(Pred) && LBO->hasNoUnsignedWrap()) || + (CmpInst::isSigned(Pred) && LBO->hasNoSignedWrap()); + } + if (RBO && RBO->getOpcode() == Instruction::Add) { + C = RBO->getOperand(0); D = RBO->getOperand(1); + NoRHSWrapProblem = ICmpInst::isEquality(Pred) || + (CmpInst::isUnsigned(Pred) && RBO->hasNoUnsignedWrap()) || + (CmpInst::isSigned(Pred) && RBO->hasNoSignedWrap()); + } + + // icmp (X+Y), X -> icmp Y, 0 for equalities or if there is no overflow. + if ((A == RHS || B == RHS) && NoLHSWrapProblem) + if (Value *V = SimplifyICmpInst(Pred, A == RHS ? B : A, + Constant::getNullValue(RHS->getType()), + TD, DT, MaxRecurse-1)) + return V; + + // icmp X, (X+Y) -> icmp 0, Y for equalities or if there is no overflow. + if ((C == LHS || D == LHS) && NoRHSWrapProblem) + if (Value *V = SimplifyICmpInst(Pred, + Constant::getNullValue(LHS->getType()), + C == LHS ? D : C, TD, DT, MaxRecurse-1)) + return V; + + // icmp (X+Y), (X+Z) -> icmp Y,Z for equalities or if there is no overflow. + if (A && C && (A == C || A == D || B == C || B == D) && + NoLHSWrapProblem && NoRHSWrapProblem) { + // Determine Y and Z in the form icmp (X+Y), (X+Z). + Value *Y = (A == C || A == D) ? B : A; + Value *Z = (C == A || C == B) ? D : C; + if (Value *V = SimplifyICmpInst(Pred, Y, Z, TD, DT, MaxRecurse-1)) + return V; + } + } + // If the comparison is with the result of a select instruction, check whether // comparing with either branch of the select always yields the same value. if (isa(LHS) || isa(RHS)) Removed: llvm/trunk/test/Transforms/InstSimplify/2011-01-18-Compare.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstSimplify/2011-01-18-Compare.ll?rev=125461&view=auto ============================================================================== --- llvm/trunk/test/Transforms/InstSimplify/2011-01-18-Compare.ll (original) +++ llvm/trunk/test/Transforms/InstSimplify/2011-01-18-Compare.ll (removed) @@ -1,169 +0,0 @@ -; RUN: opt < %s -instsimplify -S | FileCheck %s -target datalayout = "p:32:32" - -define i1 @ptrtoint() { -; CHECK: @ptrtoint - %a = alloca i8 - %tmp = ptrtoint i8* %a to i32 - %r = icmp eq i32 %tmp, 0 - ret i1 %r -; CHECK: ret i1 false -} - -define i1 @zext(i32 %x) { -; CHECK: @zext - %e1 = zext i32 %x to i64 - %e2 = zext i32 %x to i64 - %r = icmp eq i64 %e1, %e2 - ret i1 %r -; CHECK: ret i1 true -} - -define i1 @zext2(i1 %x) { -; CHECK: @zext2 - %e = zext i1 %x to i32 - %c = icmp ne i32 %e, 0 - ret i1 %c -; CHECK: ret i1 %x -} - -define i1 @zext3() { -; CHECK: @zext3 - %e = zext i1 1 to i32 - %c = icmp ne i32 %e, 0 - ret i1 %c -; CHECK: ret i1 true -} - -define i1 @sext(i32 %x) { -; CHECK: @sext - %e1 = sext i32 %x to i64 - %e2 = sext i32 %x to i64 - %r = icmp eq i64 %e1, %e2 - ret i1 %r -; CHECK: ret i1 true -} - -define i1 @sext2(i1 %x) { -; CHECK: @sext2 - %e = sext i1 %x to i32 - %c = icmp ne i32 %e, 0 - ret i1 %c -; CHECK: ret i1 %x -} - -define i1 @sext3() { -; CHECK: @sext3 - %e = sext i1 1 to i32 - %c = icmp ne i32 %e, 0 - ret i1 %c -; CHECK: ret i1 true -} - -define i1 @add(i32 %x, i32 %y) { -; CHECK: @add - %l = lshr i32 %x, 1 - %q = lshr i32 %y, 1 - %r = or i32 %q, 1 - %s = add i32 %l, %r - %c = icmp eq i32 %s, 0 - ret i1 %c -; CHECK: ret i1 false -} - -define i1 @add2(i8 %x, i8 %y) { -; CHECK: @add2 - %l = or i8 %x, 128 - %r = or i8 %y, 129 - %s = add i8 %l, %r - %c = icmp eq i8 %s, 0 - ret i1 %c -; CHECK: ret i1 false -} - -define i1 @add3(i8 %x, i8 %y) { -; CHECK: @add3 - %l = zext i8 %x to i32 - %r = zext i8 %y to i32 - %s = add i32 %l, %r - %c = icmp eq i32 %s, 0 - ret i1 %c -; CHECK: ret i1 %c -} - -define i1 @addpowtwo(i32 %x, i32 %y) { -; CHECK: @addpowtwo - %l = lshr i32 %x, 1 - %r = shl i32 1, %y - %s = add i32 %l, %r - %c = icmp eq i32 %s, 0 - ret i1 %c -; CHECK: ret i1 false -} - -define i1 @or(i32 %x) { -; CHECK: @or - %o = or i32 %x, 1 - %c = icmp eq i32 %o, 0 - ret i1 %c -; CHECK: ret i1 false -} - -define i1 @shl(i32 %x) { -; CHECK: @shl - %s = shl i32 1, %x - %c = icmp eq i32 %s, 0 - ret i1 %c -; CHECK: ret i1 false -} - -define i1 @lshr(i32 %x) { -; CHECK: @lshr - %s = lshr i32 -1, %x - %c = icmp eq i32 %s, 0 - ret i1 %c -; CHECK: ret i1 false -} - -define i1 @ashr(i32 %x) { -; CHECK: @ashr - %s = ashr i32 -1, %x - %c = icmp eq i32 %s, 0 - ret i1 %c -; CHECK: ret i1 false -} - -define i1 @select1(i1 %cond) { -; CHECK: @select1 - %s = select i1 %cond, i32 1, i32 0 - %c = icmp eq i32 %s, 1 - ret i1 %c -; CHECK: ret i1 %cond -} - -define i1 @select2(i1 %cond) { -; CHECK: @select2 - %x = zext i1 %cond to i32 - %s = select i1 %cond, i32 %x, i32 0 - %c = icmp ne i32 %s, 0 - ret i1 %c -; CHECK: ret i1 %cond -} - -define i1 @select3(i1 %cond) { -; CHECK: @select3 - %x = zext i1 %cond to i32 - %s = select i1 %cond, i32 1, i32 %x - %c = icmp ne i32 %s, 0 - ret i1 %c -; CHECK: ret i1 %cond -} - -define i1 @select4(i1 %cond) { -; CHECK: @select4 - %invert = xor i1 %cond, 1 - %s = select i1 %invert, i32 0, i32 1 - %c = icmp ne i32 %s, 0 - ret i1 %c -; CHECK: ret i1 %cond -} Copied: llvm/trunk/test/Transforms/InstSimplify/compare.ll (from r125369, llvm/trunk/test/Transforms/InstSimplify/2011-01-18-Compare.ll) URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstSimplify/compare.ll?p2=llvm/trunk/test/Transforms/InstSimplify/compare.ll&p1=llvm/trunk/test/Transforms/InstSimplify/2011-01-18-Compare.ll&r1=125369&r2=125462&rev=125462&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstSimplify/2011-01-18-Compare.ll (original) +++ llvm/trunk/test/Transforms/InstSimplify/compare.ll Sun Feb 13 11:15:40 2011 @@ -91,6 +91,26 @@ ; CHECK: ret i1 %c } +define i1 @add4(i32 %x, i32 %y) { +; CHECK: @add4 + %z = add nsw i32 %y, 1 + %s1 = add nsw i32 %x, %y + %s2 = add nsw i32 %x, %z + %c = icmp slt i32 %s1, %s2 + ret i1 %c +; CHECK: ret i1 true +} + +define i1 @add5(i32 %x, i32 %y) { +; CHECK: @add5 + %z = add nuw i32 %y, 1 + %s1 = add nuw i32 %x, %z + %s2 = add nuw i32 %x, %y + %c = icmp ugt i32 %s1, %s2 + ret i1 %c +; CHECK: ret i1 true +} + define i1 @addpowtwo(i32 %x, i32 %y) { ; CHECK: @addpowtwo %l = lshr i32 %x, 1 From baldrick at free.fr Sun Feb 13 12:11:05 2011 From: baldrick at free.fr (Duncan Sands) Date: Sun, 13 Feb 2011 18:11:05 -0000 Subject: [llvm-commits] [llvm] r125463 - /llvm/trunk/lib/Analysis/InstructionSimplify.cpp Message-ID: <20110213181105.E1A9D2A6C12C@llvm.org> Author: baldrick Date: Sun Feb 13 12:11:05 2011 New Revision: 125463 URL: http://llvm.org/viewvc/llvm-project?rev=125463&view=rev Log: Remove pointless blank line. Modified: llvm/trunk/lib/Analysis/InstructionSimplify.cpp Modified: llvm/trunk/lib/Analysis/InstructionSimplify.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/InstructionSimplify.cpp?rev=125463&r1=125462&r2=125463&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/InstructionSimplify.cpp (original) +++ llvm/trunk/lib/Analysis/InstructionSimplify.cpp Sun Feb 13 12:11:05 2011 @@ -1592,7 +1592,6 @@ BinaryOperator *LBO = dyn_cast(LHS); BinaryOperator *RBO = dyn_cast(RHS); if (MaxRecurse && (LBO || RBO)) { - // Analyze the case when either LHS or RHS is an add instruction. Value *A = 0, *B = 0, *C = 0, *D = 0; // LHS = A + B (or A and B are null); RHS = C + D (or C and D are null). From sabre at nondot.org Sun Feb 13 12:30:09 2011 From: sabre at nondot.org (Chris Lattner) Date: Sun, 13 Feb 2011 18:30:09 -0000 Subject: [llvm-commits] [llvm] r125464 - /llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp Message-ID: <20110213183009.AEE1F2A6C12C@llvm.org> Author: lattner Date: Sun Feb 13 12:30:09 2011 New Revision: 125464 URL: http://llvm.org/viewvc/llvm-project?rev=125464&view=rev Log: remove a now-unneccesary cast. Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp?rev=125464&r1=125463&r2=125464&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp Sun Feb 13 12:30:09 2011 @@ -1003,7 +1003,7 @@ // Otherwise, check to see if the bits shifted out are known to be zero. // If so, we can compare against the unshifted value: // (X & 4) >> 1 == 2 --> (X & 4) == 4. - if (Shr->hasOneUse() && cast(Shr)->isExact()) + if (Shr->hasOneUse() && Shr->isExact()) return new ICmpInst(ICI.getPredicate(), Shr->getOperand(0), ShiftedCmpRHS); if (Shr->hasOneUse()) { From pawel.kunio at gmail.com Sun Feb 13 06:43:13 2011 From: pawel.kunio at gmail.com (pawel kunio) Date: Sun, 13 Feb 2011 13:43:13 +0100 Subject: [llvm-commits] Patch for #9067 Message-ID: I attached a fix to #9067. Brief description: references to symbols following stdcall naming convention stringid@ get confused by AsmParser with id at GOT or id at PLT identifiers. User gets rather mean "invalid variant" error and parser fails. Patch attached. -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110213/ac3a99e9/attachment.html -------------- next part -------------- A non-text attachment was scrubbed... Name: wincoff_stdcall_id_parsing.diff Type: application/octet-stream Size: 2574 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110213/ac3a99e9/attachment.obj From clattner at apple.com Sun Feb 13 13:03:13 2011 From: clattner at apple.com (Chris Lattner) Date: Sun, 13 Feb 2011 11:03:13 -0800 Subject: [llvm-commits] [llvm] r125458 - in /llvm/trunk: lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp test/CodeGen/X86/crash.ll In-Reply-To: <4D57C073.50106@free.fr> References: <20110213091056.BAB752A6C12D@llvm.org> <4D57C073.50106@free.fr> Message-ID: <7A9527E7-2ED1-42A2-B349-76170C8ABB02@apple.com> On Feb 13, 2011, at 3:28 AM, Duncan Sands wrote: >> --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original) >> +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Sun Feb 13 03:10:56 2011 >> @@ -1167,13 +1167,19 @@ >> unsigned NVTBits = NVT.getSizeInBits(); >> EVT ShTy = N->getOperand(1).getValueType(); >> >> + // If this is a large integer being legalized (e.g. an i512) then plop the >> + // shift amount down as a fixed i32. The target shift amount may be something >> + // like i8, but this isn't enough to represent the shift amount. >> + if (NVTBits> 256) >> + ShTy = MVT::i32; > > I'm confused as to why this helps. ShTy was defined (see above) to be > N->getOperand(1).getValueType() How can that ever be too small? You're right, there is a more general and quite pervasive problem here. I'll revisit this. -Chris From sabre at nondot.org Sun Feb 13 13:09:16 2011 From: sabre at nondot.org (Chris Lattner) Date: Sun, 13 Feb 2011 19:09:16 -0000 Subject: [llvm-commits] [llvm] r125465 - in /llvm/trunk: include/llvm/CodeGen/ISDOpcodes.h lib/CodeGen/SelectionDAG/DAGCombiner.cpp lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp lib/CodeGen/SelectionDAG/SelectionDAG.cpp lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Message-ID: <20110213190917.1D9C12A6C12C@llvm.org> Author: lattner Date: Sun Feb 13 13:09:16 2011 New Revision: 125465 URL: http://llvm.org/viewvc/llvm-project?rev=125465&view=rev Log: Revisit my fix for PR9028: the issue is that DAGCombine was generating i8 shift amounts for things like i1024 types. Add an assert in getNode to prevent this from occuring in the future, fix the buggy transformation, revert my previous patch, and document this gotcha in ISDOpcodes.h Modified: llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Modified: llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h?rev=125465&r1=125464&r2=125465&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h (original) +++ llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h Sun Feb 13 13:09:16 2011 @@ -303,13 +303,21 @@ // an unsigned/signed value of type i[2*N], then return the top part. MULHU, MULHS, - // Bitwise operators - logical and, logical or, logical xor, shift left, - // shift right algebraic (shift in sign bits), shift right logical (shift in - // zeroes), rotate left, rotate right, and byteswap. - AND, OR, XOR, SHL, SRA, SRL, ROTL, ROTR, BSWAP, + /// Bitwise operators - logical and, logical or, logical xor. + AND, OR, XOR, + + /// Shift and rotation operations. After legalization, the type of the + /// shift amount is known to be TLI.getShiftAmountTy(). Before legalization + /// the shift amount can be any type, but care must be taken to ensure it is + /// large enough. TLI.getShiftAmountTy() is i8 on some targets, but before + /// legalization, types like i1024 can occur and i8 doesn't have enough bits + /// to represent the shift amount. By convention, DAGCombine and IRBuilder + /// forces these shift amounts to i32 for simplicity. + /// + SHL, SRA, SRL, ROTL, ROTR, - // Counting operators - CTTZ, CTLZ, CTPOP, + /// Byte Swap and Counting operators. + BSWAP, CTTZ, CTLZ, CTPOP, // Select(COND, TRUEVAL, FALSEVAL). If the type of the boolean COND is not // i1 then the high bits must conform to getBooleanContents. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=125465&r1=125464&r2=125465&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Sun Feb 13 13:09:16 2011 @@ -4000,21 +4000,27 @@ isa(N0.getOperand(1)) && N0.getOperand(0).getOpcode() == ISD::ZERO_EXTEND && N0.hasOneUse()) { + SDValue ShAmt = N0.getOperand(1); + unsigned ShAmtVal = cast(ShAmt)->getZExtValue(); if (N0.getOpcode() == ISD::SHL) { + SDValue InnerZExt = N0.getOperand(0); // If the original shl may be shifting out bits, do not perform this // transformation. - unsigned ShAmt = cast(N0.getOperand(1))->getZExtValue(); - unsigned KnownZeroBits = N0.getOperand(0).getValueType().getSizeInBits() - - N0.getOperand(0).getOperand(0).getValueType().getSizeInBits(); - if (ShAmt > KnownZeroBits) + unsigned KnownZeroBits = InnerZExt.getValueType().getSizeInBits() - + InnerZExt.getOperand(0).getValueType().getSizeInBits(); + if (ShAmtVal > KnownZeroBits) return SDValue(); } - DebugLoc dl = N->getDebugLoc(); - return DAG.getNode(N0.getOpcode(), dl, VT, - DAG.getNode(ISD::ZERO_EXTEND, dl, VT, N0.getOperand(0)), - DAG.getNode(ISD::ZERO_EXTEND, dl, - N0.getOperand(1).getValueType(), - N0.getOperand(1))); + + DebugLoc DL = N->getDebugLoc(); + + // Ensure that the shift amount is wide enough for the shifted value. + if (VT.getSizeInBits() >= 256) + ShAmt = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i32, ShAmt); + + return DAG.getNode(N0.getOpcode(), DL, VT, + DAG.getNode(ISD::ZERO_EXTEND, DL, VT, N0.getOperand(0)), + ShAmt); } return SDValue(); Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp?rev=125465&r1=125464&r2=125465&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Sun Feb 13 13:09:16 2011 @@ -1157,7 +1157,7 @@ /// and the shift amount is a constant 'Amt'. Expand the operation. void DAGTypeLegalizer::ExpandShiftByConstant(SDNode *N, unsigned Amt, SDValue &Lo, SDValue &Hi) { - DebugLoc dl = N->getDebugLoc(); + DebugLoc DL = N->getDebugLoc(); // Expand the incoming operand to be shifted, so that we have its parts SDValue InL, InH; GetExpandedInteger(N->getOperand(0), InL, InH); @@ -1167,18 +1167,12 @@ unsigned NVTBits = NVT.getSizeInBits(); EVT ShTy = N->getOperand(1).getValueType(); - // If this is a large integer being legalized (e.g. an i512) then plop the - // shift amount down as a fixed i32. The target shift amount may be something - // like i8, but this isn't enough to represent the shift amount. - if (NVTBits > 256) - ShTy = MVT::i32; - if (N->getOpcode() == ISD::SHL) { if (Amt > VTBits) { Lo = Hi = DAG.getConstant(0, NVT); } else if (Amt > NVTBits) { Lo = DAG.getConstant(0, NVT); - Hi = DAG.getNode(ISD::SHL, dl, + Hi = DAG.getNode(ISD::SHL, DL, NVT, InL, DAG.getConstant(Amt-NVTBits, ShTy)); } else if (Amt == NVTBits) { Lo = DAG.getConstant(0, NVT); @@ -1189,15 +1183,15 @@ // Emit this X << 1 as X+X. SDVTList VTList = DAG.getVTList(NVT, MVT::Glue); SDValue LoOps[2] = { InL, InL }; - Lo = DAG.getNode(ISD::ADDC, dl, VTList, LoOps, 2); + Lo = DAG.getNode(ISD::ADDC, DL, VTList, LoOps, 2); SDValue HiOps[3] = { InH, InH, Lo.getValue(1) }; - Hi = DAG.getNode(ISD::ADDE, dl, VTList, HiOps, 3); + Hi = DAG.getNode(ISD::ADDE, DL, VTList, HiOps, 3); } else { - Lo = DAG.getNode(ISD::SHL, dl, NVT, InL, DAG.getConstant(Amt, ShTy)); - Hi = DAG.getNode(ISD::OR, dl, NVT, - DAG.getNode(ISD::SHL, dl, NVT, InH, + Lo = DAG.getNode(ISD::SHL, DL, NVT, InL, DAG.getConstant(Amt, ShTy)); + Hi = DAG.getNode(ISD::OR, DL, NVT, + DAG.getNode(ISD::SHL, DL, NVT, InH, DAG.getConstant(Amt, ShTy)), - DAG.getNode(ISD::SRL, dl, NVT, InL, + DAG.getNode(ISD::SRL, DL, NVT, InL, DAG.getConstant(NVTBits-Amt, ShTy))); } return; @@ -1208,43 +1202,43 @@ Lo = DAG.getConstant(0, NVT); Hi = DAG.getConstant(0, NVT); } else if (Amt > NVTBits) { - Lo = DAG.getNode(ISD::SRL, dl, + Lo = DAG.getNode(ISD::SRL, DL, NVT, InH, DAG.getConstant(Amt-NVTBits,ShTy)); Hi = DAG.getConstant(0, NVT); } else if (Amt == NVTBits) { Lo = InH; Hi = DAG.getConstant(0, NVT); } else { - Lo = DAG.getNode(ISD::OR, dl, NVT, - DAG.getNode(ISD::SRL, dl, NVT, InL, + Lo = DAG.getNode(ISD::OR, DL, NVT, + DAG.getNode(ISD::SRL, DL, NVT, InL, DAG.getConstant(Amt, ShTy)), - DAG.getNode(ISD::SHL, dl, NVT, InH, + DAG.getNode(ISD::SHL, DL, NVT, InH, DAG.getConstant(NVTBits-Amt, ShTy))); - Hi = DAG.getNode(ISD::SRL, dl, NVT, InH, DAG.getConstant(Amt, ShTy)); + Hi = DAG.getNode(ISD::SRL, DL, NVT, InH, DAG.getConstant(Amt, ShTy)); } return; } assert(N->getOpcode() == ISD::SRA && "Unknown shift!"); if (Amt > VTBits) { - Hi = Lo = DAG.getNode(ISD::SRA, dl, NVT, InH, + Hi = Lo = DAG.getNode(ISD::SRA, DL, NVT, InH, DAG.getConstant(NVTBits-1, ShTy)); } else if (Amt > NVTBits) { - Lo = DAG.getNode(ISD::SRA, dl, NVT, InH, + Lo = DAG.getNode(ISD::SRA, DL, NVT, InH, DAG.getConstant(Amt-NVTBits, ShTy)); - Hi = DAG.getNode(ISD::SRA, dl, NVT, InH, + Hi = DAG.getNode(ISD::SRA, DL, NVT, InH, DAG.getConstant(NVTBits-1, ShTy)); } else if (Amt == NVTBits) { Lo = InH; - Hi = DAG.getNode(ISD::SRA, dl, NVT, InH, + Hi = DAG.getNode(ISD::SRA, DL, NVT, InH, DAG.getConstant(NVTBits-1, ShTy)); } else { - Lo = DAG.getNode(ISD::OR, dl, NVT, - DAG.getNode(ISD::SRL, dl, NVT, InL, + Lo = DAG.getNode(ISD::OR, DL, NVT, + DAG.getNode(ISD::SRL, DL, NVT, InL, DAG.getConstant(Amt, ShTy)), - DAG.getNode(ISD::SHL, dl, NVT, InH, + DAG.getNode(ISD::SHL, DL, NVT, InH, DAG.getConstant(NVTBits-Amt, ShTy))); - Hi = DAG.getNode(ISD::SRA, dl, NVT, InH, DAG.getConstant(Amt, ShTy)); + Hi = DAG.getNode(ISD::SRA, DL, NVT, InH, DAG.getConstant(Amt, ShTy)); } } Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=125465&r1=125464&r2=125465&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Sun Feb 13 13:09:16 2011 @@ -2720,6 +2720,13 @@ "Shift operators return type must be the same as their first arg"); assert(VT.isInteger() && N2.getValueType().isInteger() && "Shifts only work on integers"); + // Verify that the shift amount VT is bit enough to hold valid shift + // amounts. This catches things like trying to shift an i1024 value by an + // i8, which is easy to fall into in generic code that uses + // TLI.getShiftAmount(). + assert(N2.getValueType().getSizeInBits() >= + Log2_32_Ceil(N1.getValueType().getSizeInBits()) && + "Invalid use of small shift amount with oversized value!"); // Always fold shifts of i1 values so the code generator doesn't need to // handle them. Since we know the size of the shift has to be less than the Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=125465&r1=125464&r2=125465&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Sun Feb 13 13:09:16 2011 @@ -2434,7 +2434,6 @@ DebugLoc DL = getCurDebugLoc(); // If the operand is smaller than the shift count type, promote it. - MVT PtrTy = TLI.getPointerTy(); if (ShiftSize > Op2Size) Op2 = DAG.getNode(ISD::ZERO_EXTEND, DL, ShiftTy, Op2); @@ -2445,9 +2444,9 @@ else if (ShiftSize >= Log2_32_Ceil(Op2.getValueType().getSizeInBits())) Op2 = DAG.getNode(ISD::TRUNCATE, DL, ShiftTy, Op2); // Otherwise we'll need to temporarily settle for some other convenient - // type. Type legalization will make adjustments as needed. + // type. Type legalization will make adjustments once the shiftee is split. else - Op2 = DAG.getZExtOrTrunc(Op2, DL, PtrTy); + Op2 = DAG.getZExtOrTrunc(Op2, DL, MVT::i32); } setValue(&I, DAG.getNode(Opcode, getCurDebugLoc(), From baldrick at free.fr Sun Feb 13 13:23:26 2011 From: baldrick at free.fr (Duncan Sands) Date: Sun, 13 Feb 2011 20:23:26 +0100 Subject: [llvm-commits] [llvm] r125465 - in /llvm/trunk: include/llvm/CodeGen/ISDOpcodes.h lib/CodeGen/SelectionDAG/DAGCombiner.cpp lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp lib/CodeGen/SelectionDAG/SelectionDAG.cpp lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp In-Reply-To: <20110213190917.1D9C12A6C12C@llvm.org> References: <20110213190917.1D9C12A6C12C@llvm.org> Message-ID: <4D582FAE.1090006@free.fr> Hi Chris, > + /// Shift and rotation operations. After legalization, the type of the > + /// shift amount is known to be TLI.getShiftAmountTy(). Before legalization > + /// the shift amount can be any type, but care must be taken to ensure it is > + /// large enough. TLI.getShiftAmountTy() is i8 on some targets, but before > + /// legalization, types like i1024 can occur and i8 doesn't have enough bits > + /// to represent the shift amount. By convention, DAGCombine and IRBuilder > + /// forces these shift amounts to i32 for simplicity. IRBuilder -> SelectionDAGBuilder. Another solution is to use the type of the first operand for the type of the shift amount (like is done in the IR). That would get rid of inelegant logic like the following: > + // Ensure that the shift amount is wide enough for the shifted value. > + if (VT.getSizeInBits()>= 256) > + ShAmt = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i32, ShAmt); Ciao, Duncan. From sabre at nondot.org Sun Feb 13 13:53:36 2011 From: sabre at nondot.org (Chris Lattner) Date: Sun, 13 Feb 2011 19:53:36 -0000 Subject: [llvm-commits] [llvm] r125466 - /llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h Message-ID: <20110213195336.91F6F2A6C12C@llvm.org> Author: lattner Date: Sun Feb 13 13:53:36 2011 New Revision: 125466 URL: http://llvm.org/viewvc/llvm-project?rev=125466&view=rev Log: fix thinko :) Modified: llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h Modified: llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h?rev=125466&r1=125465&r2=125466&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h (original) +++ llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h Sun Feb 13 13:53:36 2011 @@ -311,8 +311,8 @@ /// the shift amount can be any type, but care must be taken to ensure it is /// large enough. TLI.getShiftAmountTy() is i8 on some targets, but before /// legalization, types like i1024 can occur and i8 doesn't have enough bits - /// to represent the shift amount. By convention, DAGCombine and IRBuilder - /// forces these shift amounts to i32 for simplicity. + /// to represent the shift amount. By convention, DAGCombine and + /// SelectionDAGBuilder forces these shift amounts to i32 for simplicity. /// SHL, SRA, SRL, ROTL, ROTR, From clattner at apple.com Sun Feb 13 13:57:31 2011 From: clattner at apple.com (Chris Lattner) Date: Sun, 13 Feb 2011 11:57:31 -0800 Subject: [llvm-commits] [llvm] r125465 - in /llvm/trunk: include/llvm/CodeGen/ISDOpcodes.h lib/CodeGen/SelectionDAG/DAGCombiner.cpp lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp lib/CodeGen/SelectionDAG/SelectionDAG.cpp lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp In-Reply-To: <4D582FAE.1090006@free.fr> References: <20110213190917.1D9C12A6C12C@llvm.org> <4D582FAE.1090006@free.fr> Message-ID: On Feb 13, 2011, at 11:23 AM, Duncan Sands wrote: > Hi Chris, > >> + /// Shift and rotation operations. After legalization, the type of the >> + /// shift amount is known to be TLI.getShiftAmountTy(). Before legalization >> + /// the shift amount can be any type, but care must be taken to ensure it is >> + /// large enough. TLI.getShiftAmountTy() is i8 on some targets, but before >> + /// legalization, types like i1024 can occur and i8 doesn't have enough bits >> + /// to represent the shift amount. By convention, DAGCombine and IRBuilder >> + /// forces these shift amounts to i32 for simplicity. > > IRBuilder -> SelectionDAGBuilder. Another solution is to use the type of the > first operand for the type of the shift amount (like is done in the IR). That > would get rid of inelegant logic like the following: I considered that, the problem is that code will have to carefully consider whether its running pre or post-legalize. -Chris From grosser at fim.uni-passau.de Sun Feb 13 14:57:25 2011 From: grosser at fim.uni-passau.de (Tobias Grosser) Date: Sun, 13 Feb 2011 20:57:25 -0000 Subject: [llvm-commits] [llvm] r125469 - /llvm/trunk/docs/Passes.html Message-ID: <20110213205725.AEF762A6C12C@llvm.org> Author: grosser Date: Sun Feb 13 14:57:25 2011 New Revision: 125469 URL: http://llvm.org/viewvc/llvm-project?rev=125469&view=rev Log: Adapt docs to '-loopsimplify -> -loop-simplify' change Modified: llvm/trunk/docs/Passes.html Modified: llvm/trunk/docs/Passes.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/Passes.html?rev=125469&r1=125468&r2=125469&view=diff ============================================================================== --- llvm/trunk/docs/Passes.html (original) +++ llvm/trunk/docs/Passes.html Sun Feb 13 14:57:25 2011 @@ -166,7 +166,7 @@ -loop-rotateRotate Loops -loop-unrollUnroll loops -loop-unswitchUnswitch loops --loopsimplifyCanonicalize natural loops +-loop-simplifyCanonicalize natural loops -loweratomicLower atomic intrinsics -lowerinvokeLower invoke and unwind, for unwindless code generators -lowersetjmpLower Set Jump @@ -1491,7 +1491,7 @@

      From zwarich at apple.com Sun Feb 13 15:03:35 2011 From: zwarich at apple.com (Cameron Zwarich) Date: Sun, 13 Feb 2011 13:03:35 -0800 Subject: [llvm-commits] [llvm] r125469 - /llvm/trunk/docs/Passes.html In-Reply-To: <20110213205725.AEF762A6C12C@llvm.org> References: <20110213205725.AEF762A6C12C@llvm.org> Message-ID: <159BFC59-C86B-486F-BCC0-A16A2CAB3252@apple.com> Thanks! I forgot about this. However, the lovely edit distance help system would correct anyone. :) Cameron On Feb 13, 2011, at 12:57 PM, Tobias Grosser wrote: > Author: grosser > Date: Sun Feb 13 14:57:25 2011 > New Revision: 125469 > > URL: http://llvm.org/viewvc/llvm-project?rev=125469&view=rev > Log: > Adapt docs to '-loopsimplify -> -loop-simplify' change > > Modified: > llvm/trunk/docs/Passes.html > > Modified: llvm/trunk/docs/Passes.html > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/Passes.html?rev=125469&r1=125468&r2=125469&view=diff > ============================================================================== > --- llvm/trunk/docs/Passes.html (original) > +++ llvm/trunk/docs/Passes.html Sun Feb 13 14:57:25 2011 > @@ -166,7 +166,7 @@ > -loop-rotateRotate Loops > -loop-unrollUnroll loops > -loop-unswitchUnswitch loops > --loopsimplifyCanonicalize natural loops > +-loop-simplifyCanonicalize natural loops > -loweratomicLower atomic intrinsics > -lowerinvokeLower invoke and unwind, for unwindless code generators > -lowersetjmpLower Set Jump > @@ -1491,7 +1491,7 @@ > > >

      >
      >

      > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From grosser at fim.uni-passau.de Sun Feb 13 15:07:18 2011 From: grosser at fim.uni-passau.de (Tobias Grosser) Date: Sun, 13 Feb 2011 16:07:18 -0500 Subject: [llvm-commits] [llvm] r125469 - /llvm/trunk/docs/Passes.html In-Reply-To: <159BFC59-C86B-486F-BCC0-A16A2CAB3252@apple.com> References: <20110213205725.AEF762A6C12C@llvm.org> <159BFC59-C86B-486F-BCC0-A16A2CAB3252@apple.com> Message-ID: <4D584806.9060802@fim.uni-passau.de> On 02/13/2011 04:03 PM, Cameron Zwarich wrote: > Thanks! I forgot about this. However, the lovely edit distance help system would correct anyone. :) That's what happened to me. So it was easy to notice and fix. Thanks a lot for doing this. I always mistyped and used -loopSSimplify. The new version is clearer and helped to reduce my personal confusion. Cheers Tobi From nicholas at mxc.ca Sun Feb 13 16:05:50 2011 From: nicholas at mxc.ca (Nick Lewycky) Date: Sun, 13 Feb 2011 14:05:50 -0800 Subject: [llvm-commits] [llvm] r125393 - in /llvm/trunk: lib/VMCore/ConstantFold.cpp test/Transforms/InstCombine/bitcast-vec-uniform.ll test/Transforms/InstCombine/fold-vector-select.ll In-Reply-To: <4D580EB3.2070701@free.fr> References: <20110211193756.00C782A6C12C@llvm.org> <33543FF9-1ACE-4D44-8E7F-6D73B5F52D06@googlemail.com> <6594DDFF12B03D4E89690887C24869940270CCB0D6@hasmsx504.ger.corp.intel.com> <4D580EB3.2070701@free.fr> Message-ID: <4D5855BE.5080307@mxc.ca> Duncan Sands wrote: > Hi Nadav, > >> Thank you for catching this. >> >> The patch below fixes the problem. If it looks good to you I will commit it. > > why not teach getAllOnesValue to handle floating point types instead? Further, it seems that if we're going to have Constant::getAllOnesValue then we should also have Constant->isAllOnesValue(). Nick From sabre at nondot.org Sun Feb 13 16:25:43 2011 From: sabre at nondot.org (Chris Lattner) Date: Sun, 13 Feb 2011 22:25:43 -0000 Subject: [llvm-commits] [llvm] r125470 - in /llvm/trunk: lib/CodeGen/SelectionDAG/SelectionDAG.cpp lib/CodeGen/SelectionDAG/TargetLowering.cpp lib/Target/ARM/ARMISelDAGToDAG.cpp lib/Target/X86/X86ISelDAGToDAG.cpp lib/Target/X86/X86ISelLowering.cpp test/CodeGen/MSP430/Inst16mm.ll test/CodeGen/X86/stack-align.ll Message-ID: <20110213222543.6EBAA2A6C12C@llvm.org> Author: lattner Date: Sun Feb 13 16:25:43 2011 New Revision: 125470 URL: http://llvm.org/viewvc/llvm-project?rev=125470&view=rev Log: Enhance ComputeMaskedBits to know that aligned frameindexes have their low bits set to zero. This allows us to optimize out explicit stack alignment code like in stack-align.ll:test4 when it is redundant. Doing this causes the code generator to start turning FI+cst into FI|cst all over the place, which is general goodness (that is the canonical form) except that various pieces of the code generator don't handle OR aggressively. Fix this by introducing a new SelectionDAG::isBaseWithConstantOffset predicate, and using it in places that are looking for ADD(X,CST). The ARM backend in particular was missing a lot of addressing mode folding opportunities around OR. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp llvm/trunk/lib/Target/X86/X86ISelLowering.cpp llvm/trunk/test/CodeGen/MSP430/Inst16mm.ll llvm/trunk/test/CodeGen/X86/stack-align.ll Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=125470&r1=125469&r2=125470&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Sun Feb 13 16:25:43 2011 @@ -2040,6 +2040,15 @@ KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; return; } + case ISD::FrameIndex: + case ISD::TargetFrameIndex: + if (unsigned Align = InferPtrAlignment(Op)) { + // The low bits are known zero if the pointer is aligned. + KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align)); + return; + } + break; + default: // Allow the target to implement this method for its nodes. if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { @@ -2279,6 +2288,25 @@ return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); } +/// isBaseWithConstantOffset - Return true if the specified operand is an +/// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an +/// ISD::OR with a ConstantSDNode that is guaranteed to have the same +/// semantics as an ADD. This handles the equivalence: +/// X|Cst == X+Cst iff X&~Cst = 0. +bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const { + if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) || + !isa(Op.getOperand(1))) + return false; + + if (Op.getOpcode() == ISD::OR && + !MaskedValueIsZero(Op.getOperand(0), + cast(Op.getOperand(1))->getAPIntValue())) + return false; + + return true; +} + + bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { // If we're told that NaNs won't happen, assume they won't. if (NoNaNsFPMath) @@ -6327,11 +6355,11 @@ if (FS != BFS || FS != (int)Bytes) return false; return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); } - if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) { - ConstantSDNode *V = dyn_cast(Loc.getOperand(1)); - if (V && (V->getSExtValue() == Dist*Bytes)) - return true; - } + + // Handle X+C + if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc && + cast(Loc.getOperand(1))->getSExtValue() == Dist*Bytes) + return true; const GlobalValue *GV1 = NULL; const GlobalValue *GV2 = NULL; @@ -6372,15 +6400,14 @@ int64_t FrameOffset = 0; if (FrameIndexSDNode *FI = dyn_cast(Ptr)) { FrameIdx = FI->getIndex(); - } else if (Ptr.getOpcode() == ISD::ADD && - isa(Ptr.getOperand(1)) && + } else if (isBaseWithConstantOffset(Ptr) && isa(Ptr.getOperand(0))) { + // Handle FI+Cst FrameIdx = cast(Ptr.getOperand(0))->getIndex(); FrameOffset = Ptr.getConstantOperandVal(1); } if (FrameIdx != (1 << 31)) { - // FIXME: Handle FI+CST. const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), FrameOffset); Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=125470&r1=125469&r2=125470&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Sun Feb 13 16:25:43 2011 @@ -2467,7 +2467,7 @@ /// isGAPlusOffset - Returns true (and the GlobalValue and the offset) if the /// node is a GlobalAddress + offset. -bool TargetLowering::isGAPlusOffset(SDNode *N, const GlobalValue* &GA, +bool TargetLowering::isGAPlusOffset(SDNode *N, const GlobalValue *&GA, int64_t &Offset) const { if (isa(N)) { GlobalAddressSDNode *GASD = cast(N); @@ -2493,6 +2493,7 @@ } } } + return false; } Modified: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp?rev=125470&r1=125469&r2=125470&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp Sun Feb 13 16:25:43 2011 @@ -427,16 +427,19 @@ // Match simple R + imm12 operands. // Base only. - if (N.getOpcode() != ISD::ADD && N.getOpcode() != ISD::SUB) { + if (N.getOpcode() != ISD::ADD && N.getOpcode() != ISD::SUB && + !CurDAG->isBaseWithConstantOffset(N)) { if (N.getOpcode() == ISD::FrameIndex) { - // Match frame index... + // Match frame index. int FI = cast(N)->getIndex(); Base = CurDAG->getTargetFrameIndex(FI, TLI.getPointerTy()); OffImm = CurDAG->getTargetConstant(0, MVT::i32); return true; - } else if (N.getOpcode() == ARMISD::Wrapper && - !(Subtarget->useMovt() && - N.getOperand(0).getOpcode() == ISD::TargetGlobalAddress)) { + } + + if (N.getOpcode() == ARMISD::Wrapper && + !(Subtarget->useMovt() && + N.getOperand(0).getOpcode() == ISD::TargetGlobalAddress)) { Base = N.getOperand(0); } else Base = N; @@ -494,11 +497,13 @@ } } - if (N.getOpcode() != ISD::ADD && N.getOpcode() != ISD::SUB) + if (N.getOpcode() != ISD::ADD && N.getOpcode() != ISD::SUB && + // ISD::OR that is equivalent to an ISD::ADD. + !CurDAG->isBaseWithConstantOffset(N)) return false; // Leave simple R +/- imm12 operands for LDRi12 - if (N.getOpcode() == ISD::ADD) { + if (N.getOpcode() == ISD::ADD || N.getOpcode() == ISD::OR) { int RHSC; if (isScaledConstantInRange(N.getOperand(1), /*Scale=*/1, -0x1000+1, 0x1000, RHSC)) // 12 bits. @@ -510,7 +515,7 @@ return false; // Otherwise this is R +/- [possibly shifted] R. - ARM_AM::AddrOpc AddSub = N.getOpcode() == ISD::ADD ? ARM_AM::add:ARM_AM::sub; + ARM_AM::AddrOpc AddSub = N.getOpcode() == ISD::SUB ? ARM_AM::sub:ARM_AM::add; ARM_AM::ShiftOpc ShOpcVal = ARM_AM::getShiftOpcForNode(N.getOperand(1)); unsigned ShAmt = 0; @@ -535,7 +540,7 @@ } // Try matching (R shl C) + (R). - if (N.getOpcode() == ISD::ADD && ShOpcVal == ARM_AM::no_shift && + if (N.getOpcode() != ISD::SUB && ShOpcVal == ARM_AM::no_shift && !(Subtarget->isCortexA9() || N.getOperand(0).hasOneUse())) { ShOpcVal = ARM_AM::getShiftOpcForNode(N.getOperand(0)); if (ShOpcVal != ARM_AM::no_shift) { @@ -597,7 +602,9 @@ } } - if (N.getOpcode() != ISD::ADD && N.getOpcode() != ISD::SUB) { + if (N.getOpcode() != ISD::ADD && N.getOpcode() != ISD::SUB && + // ISD::OR that is equivalent to an ADD. + !CurDAG->isBaseWithConstantOffset(N)) { Base = N; if (N.getOpcode() == ISD::FrameIndex) { int FI = cast(N)->getIndex(); @@ -615,7 +622,7 @@ } // Match simple R +/- imm12 operands. - if (N.getOpcode() == ISD::ADD) { + if (N.getOpcode() != ISD::SUB) { int RHSC; if (isScaledConstantInRange(N.getOperand(1), /*Scale=*/1, -0x1000+1, 0x1000, RHSC)) { // 12 bits. @@ -649,7 +656,7 @@ } // Otherwise this is R +/- [possibly shifted] R. - ARM_AM::AddrOpc AddSub = N.getOpcode() == ISD::ADD ? ARM_AM::add:ARM_AM::sub; + ARM_AM::AddrOpc AddSub = N.getOpcode() != ISD::SUB ? ARM_AM::add:ARM_AM::sub; ARM_AM::ShiftOpc ShOpcVal = ARM_AM::getShiftOpcForNode(N.getOperand(1)); unsigned ShAmt = 0; @@ -674,7 +681,7 @@ } // Try matching (R shl C) + (R). - if (N.getOpcode() == ISD::ADD && ShOpcVal == ARM_AM::no_shift && + if (N.getOpcode() != ISD::SUB && ShOpcVal == ARM_AM::no_shift && !(Subtarget->isCortexA9() || N.getOperand(0).hasOneUse())) { ShOpcVal = ARM_AM::getShiftOpcForNode(N.getOperand(0)); if (ShOpcVal != ARM_AM::no_shift) { @@ -756,7 +763,7 @@ return true; } - if (N.getOpcode() != ISD::ADD) { + if (!CurDAG->isBaseWithConstantOffset(N)) { Base = N; if (N.getOpcode() == ISD::FrameIndex) { int FI = cast(N)->getIndex(); @@ -781,7 +788,7 @@ ARM_AM::AddrOpc AddSub = ARM_AM::add; if (RHSC < 0) { AddSub = ARM_AM::sub; - RHSC = - RHSC; + RHSC = -RHSC; } Opc = CurDAG->getTargetConstant(ARM_AM::getAM3Opc(AddSub, RHSC),MVT::i32); return true; @@ -815,7 +822,7 @@ bool ARMDAGToDAGISel::SelectAddrMode5(SDValue N, SDValue &Base, SDValue &Offset) { - if (N.getOpcode() != ISD::ADD) { + if (!CurDAG->isBaseWithConstantOffset(N)) { Base = N; if (N.getOpcode() == ISD::FrameIndex) { int FI = cast(N)->getIndex(); @@ -843,7 +850,7 @@ ARM_AM::AddrOpc AddSub = ARM_AM::add; if (RHSC < 0) { AddSub = ARM_AM::sub; - RHSC = - RHSC; + RHSC = -RHSC; } Offset = CurDAG->getTargetConstant(ARM_AM::getAM5Opc(AddSub, RHSC), MVT::i32); @@ -899,8 +906,7 @@ bool ARMDAGToDAGISel::SelectThumbAddrModeRR(SDValue N, SDValue &Base, SDValue &Offset){ - // FIXME dl should come from the parent load or store, not the address - if (N.getOpcode() != ISD::ADD) { + if (N.getOpcode() != ISD::ADD && !CurDAG->isBaseWithConstantOffset(N)) { ConstantSDNode *NC = dyn_cast(N); if (!NC || !NC->isNullValue()) return false; @@ -927,7 +933,7 @@ return false; // We want to select tLDRpci instead. } - if (N.getOpcode() != ISD::ADD) + if (!CurDAG->isBaseWithConstantOffset(N)) return false; // Thumb does not have [sp, r] address mode. @@ -983,7 +989,7 @@ return false; // We want to select tLDRpci instead. } - if (N.getOpcode() != ISD::ADD) { + if (!CurDAG->isBaseWithConstantOffset(N)) { if (N.getOpcode() == ARMISD::Wrapper && !(Subtarget->useMovt() && N.getOperand(0).getOpcode() == ISD::TargetGlobalAddress)) { @@ -1053,7 +1059,7 @@ return true; } - if (N.getOpcode() != ISD::ADD) + if (!CurDAG->isBaseWithConstantOffset(N)) return false; RegisterSDNode *LHSR = dyn_cast(N.getOperand(0)); @@ -1108,14 +1114,17 @@ // Match simple R + imm12 operands. // Base only. - if (N.getOpcode() != ISD::ADD && N.getOpcode() != ISD::SUB) { + if (N.getOpcode() != ISD::ADD && N.getOpcode() != ISD::SUB && + !CurDAG->isBaseWithConstantOffset(N)) { if (N.getOpcode() == ISD::FrameIndex) { - // Match frame index... + // Match frame index. int FI = cast(N)->getIndex(); Base = CurDAG->getTargetFrameIndex(FI, TLI.getPointerTy()); OffImm = CurDAG->getTargetConstant(0, MVT::i32); return true; - } else if (N.getOpcode() == ARMISD::Wrapper && + } + + if (N.getOpcode() == ARMISD::Wrapper && !(Subtarget->useMovt() && N.getOperand(0).getOpcode() == ISD::TargetGlobalAddress)) { Base = N.getOperand(0); @@ -1156,21 +1165,23 @@ bool ARMDAGToDAGISel::SelectT2AddrModeImm8(SDValue N, SDValue &Base, SDValue &OffImm) { // Match simple R - imm8 operands. - if (N.getOpcode() == ISD::ADD || N.getOpcode() == ISD::SUB) { - if (ConstantSDNode *RHS = dyn_cast(N.getOperand(1))) { - int RHSC = (int)RHS->getSExtValue(); - if (N.getOpcode() == ISD::SUB) - RHSC = -RHSC; - - if ((RHSC >= -255) && (RHSC < 0)) { // 8 bits (always negative) - Base = N.getOperand(0); - if (Base.getOpcode() == ISD::FrameIndex) { - int FI = cast(Base)->getIndex(); - Base = CurDAG->getTargetFrameIndex(FI, TLI.getPointerTy()); - } - OffImm = CurDAG->getTargetConstant(RHSC, MVT::i32); - return true; + if (N.getOpcode() != ISD::ADD && N.getOpcode() != ISD::SUB && + !CurDAG->isBaseWithConstantOffset(N)) + return false; + + if (ConstantSDNode *RHS = dyn_cast(N.getOperand(1))) { + int RHSC = (int)RHS->getSExtValue(); + if (N.getOpcode() == ISD::SUB) + RHSC = -RHSC; + + if ((RHSC >= -255) && (RHSC < 0)) { // 8 bits (always negative) + Base = N.getOperand(0); + if (Base.getOpcode() == ISD::FrameIndex) { + int FI = cast(Base)->getIndex(); + Base = CurDAG->getTargetFrameIndex(FI, TLI.getPointerTy()); } + OffImm = CurDAG->getTargetConstant(RHSC, MVT::i32); + return true; } } @@ -1198,7 +1209,7 @@ SDValue &Base, SDValue &OffReg, SDValue &ShImm) { // (R - imm8) should be handled by t2LDRi8. The rest are handled by t2LDRi12. - if (N.getOpcode() != ISD::ADD) + if (N.getOpcode() != ISD::ADD && !CurDAG->isBaseWithConstantOffset(N)) return false; // Leave (R + imm12) for t2LDRi12, (R - imm8) for t2LDRi8. Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=125470&r1=125469&r2=125470&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Sun Feb 13 16:25:43 2011 @@ -685,25 +685,6 @@ return false; } -/// isLogicallyAddWithConstant - Return true if this node is semantically an -/// add of a value with a constantint. -static bool isLogicallyAddWithConstant(SDValue V, SelectionDAG *CurDAG) { - // Check for (add x, Cst) - if (V->getOpcode() == ISD::ADD) - return isa(V->getOperand(1)); - - // Check for (or x, Cst), where Cst & x == 0. - if (V->getOpcode() != ISD::OR || - !isa(V->getOperand(1))) - return false; - - // Handle "X | C" as "X + C" iff X is known to have C bits clear. - ConstantSDNode *CN = cast(V->getOperand(1)); - - // Check to see if the LHS & C is zero. - return CurDAG->MaskedValueIsZero(V->getOperand(0), CN->getAPIntValue()); -} - bool X86DAGToDAGISel::MatchAddressRecursively(SDValue N, X86ISelAddressMode &AM, unsigned Depth) { bool is64Bit = Subtarget->is64Bit(); @@ -789,7 +770,7 @@ // Okay, we know that we have a scale by now. However, if the scaled // value is an add of something and a constant, we can fold the // constant into the disp field here. - if (isLogicallyAddWithConstant(ShVal, CurDAG)) { + if (CurDAG->isBaseWithConstantOffset(ShVal)) { AM.IndexReg = ShVal.getNode()->getOperand(0); ConstantSDNode *AddVal = cast(ShVal.getNode()->getOperand(1)); @@ -964,7 +945,7 @@ case ISD::OR: // Handle "X | C" as "X + C" iff X is known to have C bits clear. - if (isLogicallyAddWithConstant(N, CurDAG)) { + if (CurDAG->isBaseWithConstantOffset(N)) { X86ISelAddressMode Backup = AM; ConstantSDNode *CN = cast(N.getOperand(1)); uint64_t Offset = CN->getSExtValue(); Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=125470&r1=125469&r2=125470&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sun Feb 13 16:25:43 2011 @@ -4201,8 +4201,7 @@ if (FrameIndexSDNode *FINode = dyn_cast(Ptr)) { FI = FINode->getIndex(); Offset = 0; - } else if (Ptr.getOpcode() == ISD::ADD && - isa(Ptr.getOperand(1)) && + } else if (DAG.isBaseWithConstantOffset(Ptr) && isa(Ptr.getOperand(0))) { FI = cast(Ptr.getOperand(0))->getIndex(); Offset = Ptr.getConstantOperandVal(1); Modified: llvm/trunk/test/CodeGen/MSP430/Inst16mm.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MSP430/Inst16mm.ll?rev=125470&r1=125469&r2=125470&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/MSP430/Inst16mm.ll (original) +++ llvm/trunk/test/CodeGen/MSP430/Inst16mm.ll Sun Feb 13 16:25:43 2011 @@ -64,6 +64,6 @@ %0 = load i16* %retval ; [#uses=1] ret i16 %0 ; CHECK: mov2: -; CHECK: mov.w 2(r1), 6(r1) ; CHECK: mov.w 0(r1), 4(r1) +; CHECK: mov.w 2(r1), 6(r1) } Modified: llvm/trunk/test/CodeGen/X86/stack-align.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/stack-align.ll?rev=125470&r1=125469&r2=125470&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/stack-align.ll (original) +++ llvm/trunk/test/CodeGen/X86/stack-align.ll Sun Feb 13 16:25:43 2011 @@ -7,7 +7,7 @@ target triple = "i686-apple-darwin8" @G = external global double -define void @test({ double, double }* byval %z, double* %P) { +define void @test({ double, double }* byval %z, double* %P) nounwind { entry: %tmp3 = load double* @G, align 16 ; [#uses=1] %tmp4 = tail call double @fabs( double %tmp3 ) ; [#uses=1] @@ -21,14 +21,14 @@ ret void } -define void @test2() alignstack(16) { +define void @test2() alignstack(16) nounwind { entry: ; CHECK: andl{{.*}}$-16, %esp ret void } ; Use a call to force a spill. -define <2 x double> @test3(<2 x double> %x, <2 x double> %y) alignstack(32) { +define <2 x double> @test3(<2 x double> %x, <2 x double> %y) alignstack(32) nounwind { entry: ; CHECK: andl{{.*}}$-32, %esp call void @test2() @@ -38,3 +38,14 @@ declare double @fabs(double) +; The pointer is already known aligned, so and x,-16 is eliminable. +define i32 @test4() nounwind { +entry: + %buffer = alloca [2048 x i8], align 16 + %0 = ptrtoint [2048 x i8]* %buffer to i32 + %and = and i32 %0, -16 + ret i32 %and +; CHECK: test4: +; CHECK-NOT: and +; CHECK: ret +} From sabre at nondot.org Sun Feb 13 16:30:09 2011 From: sabre at nondot.org (Chris Lattner) Date: Sun, 13 Feb 2011 22:30:09 -0000 Subject: [llvm-commits] [llvm] r125471 - /llvm/trunk/include/llvm/CodeGen/SelectionDAG.h Message-ID: <20110213223009.D32DF2A6C12C@llvm.org> Author: lattner Date: Sun Feb 13 16:30:09 2011 New Revision: 125471 URL: http://llvm.org/viewvc/llvm-project?rev=125471&view=rev Log: missed a header Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAG.h Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAG.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAG.h?rev=125471&r1=125470&r2=125471&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/SelectionDAG.h (original) +++ llvm/trunk/include/llvm/CodeGen/SelectionDAG.h Sun Feb 13 16:30:09 2011 @@ -970,6 +970,13 @@ /// class to allow target nodes to be understood. unsigned ComputeNumSignBits(SDValue Op, unsigned Depth = 0) const; + /// isBaseWithConstantOffset - Return true if the specified operand is an + /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an + /// ISD::OR with a ConstantSDNode that is guaranteed to have the same + /// semantics as an ADD. This handles the equivalence: + /// X|Cst == X+Cst iff X&~Cst = 0. + bool isBaseWithConstantOffset(SDValue Op) const; + /// isKnownNeverNan - Test whether the given SDValue is known to never be NaN. bool isKnownNeverNaN(SDValue Op) const; From fvbommel at gmail.com Sun Feb 13 16:45:28 2011 From: fvbommel at gmail.com (Frits van Bommel) Date: Sun, 13 Feb 2011 23:45:28 +0100 Subject: [llvm-commits] [llvm] r125470 - in /llvm/trunk: lib/CodeGen/SelectionDAG/SelectionDAG.cpp lib/CodeGen/SelectionDAG/TargetLowering.cpp lib/Target/ARM/ARMISelDAGToDAG.cpp lib/Target/X86/X86ISelDAGToDAG.cpp lib/Target/X86/X86ISelLowering.cpp test/Co Message-ID: On Sun, Feb 13, 2011 at 11:25 PM, Chris Lattner wrote: > +/// isBaseWithConstantOffset - Return true if the specified operand is an > +/// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an > +/// ISD::OR with a ConstantSDNode that is guaranteed to have the same > +/// semantics as an ADD. This handles the equivalence: > +/// X|Cst == X+Cst iff X&~Cst = 0. I think you mean 'iff X&Cst == 0'. Ditto for the header comment added in r125471. From zwarich at apple.com Sun Feb 13 20:09:11 2011 From: zwarich at apple.com (Cameron Zwarich) Date: Mon, 14 Feb 2011 02:09:11 -0000 Subject: [llvm-commits] [llvm] r125476 - /llvm/trunk/lib/CodeGen/PHIElimination.cpp Message-ID: <20110214020911.2BEFE2A6C12C@llvm.org> Author: zwarich Date: Sun Feb 13 20:09:11 2011 New Revision: 125476 URL: http://llvm.org/viewvc/llvm-project?rev=125476&view=rev Log: Add a statistic to PHIElimination tracking the number of critical edges split. Modified: llvm/trunk/lib/CodeGen/PHIElimination.cpp Modified: llvm/trunk/lib/CodeGen/PHIElimination.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PHIElimination.cpp?rev=125476&r1=125475&r2=125476&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/PHIElimination.cpp (original) +++ llvm/trunk/lib/CodeGen/PHIElimination.cpp Sun Feb 13 20:09:11 2011 @@ -83,6 +83,7 @@ } STATISTIC(NumAtomic, "Number of atomic phis lowered"); +STATISTIC(NumCriticalEdgesSplit, "Number of critical edges split"); STATISTIC(NumReused, "Number of reused lowered phis"); char PHIElimination::ID = 0; @@ -413,8 +414,12 @@ !LV.isLiveIn(Reg, MBB) && LV.isLiveOut(Reg, *PreMBB)) { if (!MLI || !(MLI->getLoopFor(PreMBB) == MLI->getLoopFor(&MBB) && - MLI->isLoopHeader(&MBB))) - Changed |= PreMBB->SplitCriticalEdge(&MBB, this) != 0; + MLI->isLoopHeader(&MBB))) { + if (PreMBB->SplitCriticalEdge(&MBB, this)) { + Changed = true; + ++NumCriticalEdgesSplit; + } + } } } } From zwarich at apple.com Sun Feb 13 20:09:18 2011 From: zwarich at apple.com (Cameron Zwarich) Date: Mon, 14 Feb 2011 02:09:18 -0000 Subject: [llvm-commits] [llvm] r125477 - /llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp Message-ID: <20110214020918.7EDF72A6C12C@llvm.org> Author: zwarich Date: Sun Feb 13 20:09:18 2011 New Revision: 125477 URL: http://llvm.org/viewvc/llvm-project?rev=125477&view=rev Log: Add some statistics to StrongPHIElimination. Modified: llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp Modified: llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp?rev=125477&r1=125476&r2=125477&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp (original) +++ llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp Sun Feb 13 20:09:18 2011 @@ -47,6 +47,7 @@ #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/Target/TargetInstrInfo.h" +#include "llvm/ADT/Statistic.h" #include "llvm/Support/Debug.h" using namespace llvm; @@ -187,6 +188,10 @@ }; } // namespace +STATISTIC(NumPHIsLowered, "Number of PHIs lowered"); +STATISTIC(NumDestCopiesInserted, "Number of destination copies inserted"); +STATISTIC(NumSrcCopiesInserted, "Number of source copies inserted"); + char StrongPHIElimination::ID = 0; INITIALIZE_PASS_BEGIN(StrongPHIElimination, "strong-phi-node-elimination", "Eliminate PHI nodes for register allocation, intelligently", false, false) @@ -645,6 +650,7 @@ void StrongPHIElimination::InsertCopiesForPHI(MachineInstr *PHI, MachineBasicBlock *MBB) { assert(PHI->isPHI()); + ++NumPHIsLowered; unsigned PHIColor = getPHIColor(PHI); for (unsigned i = 1; i < PHI->getNumOperands(); i += 2) { @@ -694,6 +700,7 @@ TII->get(TargetOpcode::COPY), CopyReg).addReg(SrcReg, 0, SrcSubReg); LI->InsertMachineInstrInMaps(CopyInstr); + ++NumSrcCopiesInserted; // addLiveRangeToEndOfBlock() also adds the phikill flag to the VNInfo for // the newly added range. @@ -763,6 +770,7 @@ DestReg).addReg(CopyReg); LI->InsertMachineInstrInMaps(CopyInstr); PHI->getOperand(0).setReg(CopyReg); + ++NumDestCopiesInserted; // Add the region from the beginning of MBB to the copy instruction to // CopyReg's live interval, and give the VNInfo the phidef flag. From rafael.espindola at gmail.com Sun Feb 13 20:18:34 2011 From: rafael.espindola at gmail.com (=?ISO-8859-1?Q?Rafael_=C1vila_de_Esp=EDndola?=) Date: Sun, 13 Feb 2011 21:18:34 -0500 Subject: [llvm-commits] Patch for #9067 In-Reply-To: References: Message-ID: <4D5890FA.1050604@gmail.com> On 2011-02-13 07:43, pawel kunio wrote: > I attached a fix to #9067. > > Brief description: references to symbols following stdcall naming > convention > stringid@ get confused by AsmParser with id at GOT > or id at PLT identifiers. User gets rather mean "invalid variant" error > and parser fails. Please add a test and use the same style as the rest of the file: if (foo) { } else { } Are things like foo at PLT valid on windows too? I think we would still accept it with this patch. > Patch attached. Cheers, Rafael From geek4civic at gmail.com Sun Feb 13 21:22:09 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Mon, 14 Feb 2011 12:22:09 +0900 Subject: [llvm-commits] Patch for #9067 In-Reply-To: <4D5890FA.1050604@gmail.com> References: <4D5890FA.1050604@gmail.com> Message-ID: Pawel, We would be happier if you provided testcases. ;) Rafael, 2011/2/14 Rafael ?vila de Esp?ndola : > Are things like foo at PLT valid on windows too? I think we would still > accept it with this patch. In traditional stdcall(used by Win32 API), these symbols are used to export and import; AllocConsole at 0 AddAtomW at 4 @n means callee's stack rewinding factor. (ret $n) Assembler should treat whole XXXXX at n as symbol with win32. __stdcall int baz(int a, int b) {return a;} .globl _baz at 8 _baz at 8: movl 4(%esp), %eax ret $8 ...Takumi