From grosser at fim.uni-passau.de  Mon Apr  4 01:53:29 2011
From: grosser at fim.uni-passau.de (Tobias Grosser)
Date: Mon, 04 Apr 2011 02:53:29 -0400
Subject: [llvm-commits] [PATCH 1/2] Region: Check the exit region before
 use it when expanding a region.
In-Reply-To: <BANLkTimv+KNxQDpCGtZ84kkWE8g4qgoN4w@mail.gmail.com>
References: <BANLkTimv+KNxQDpCGtZ84kkWE8g4qgoN4w@mail.gmail.com>
Message-ID: <4D996AE9.5000005@fim.uni-passau.de>

On 04/03/2011 11:27 PM, ether zhhb wrote:
>> From 0c43ee6358a05b19b6b9924e5de3074216b7bcd5 Mon Sep 17 00:00:00 2001
> From: ether<etherzhhb at gmail.com>
> Date: Mon, 4 Apr 2011 11:24:37 +0800
> Subject: [PATCH 1/2] Region: Check the exit region before use it when
> expanding a region.
>
> ---
>   lib/Analysis/RegionInfo.cpp |    3 +++
>   1 files changed, 3 insertions(+), 0 deletions(-)
>
> diff --git a/lib/Analysis/RegionInfo.cpp b/lib/Analysis/RegionInfo.cpp
> index e2f6a8b..a5250cf 100644
> --- a/lib/Analysis/RegionInfo.cpp
> +++ b/lib/Analysis/RegionInfo.cpp
> @@ -394,6 +394,9 @@ Region *Region::getExpandedRegion() const {
>
>     Region *R = RI->getRegionFor(exit);
>
> +  if (!R)
> +    llvm_unreachable(("Can not find exit for region: " +
> getNameStr()).c_str());


Hey ether,

can you use an assert() here?

Cheers
Tobi

From grosser at fim.uni-passau.de  Mon Apr  4 02:19:18 2011
From: grosser at fim.uni-passau.de (Tobias Grosser)
Date: Mon, 04 Apr 2011 07:19:18 -0000
Subject: [llvm-commits] [llvm] r128808 - in /llvm/trunk:
 include/llvm/Analysis/RegionInfo.h lib/Analysis/RegionInfo.cpp
Message-ID: <20110404071918.BACEA2A6C12C@llvm.org>

Author: grosser
Date: Mon Apr  4 02:19:18 2011
New Revision: 128808

URL: http://llvm.org/viewvc/llvm-project?rev=128808&view=rev
Log:
Region: Allow user control the printing style of the print function.

Contributed by: etherzhhb at gmail.com

Modified:
    llvm/trunk/include/llvm/Analysis/RegionInfo.h
    llvm/trunk/lib/Analysis/RegionInfo.cpp

Modified: llvm/trunk/include/llvm/Analysis/RegionInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/RegionInfo.h?rev=128808&r1=128807&r2=128808&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/RegionInfo.h (original)
+++ llvm/trunk/include/llvm/Analysis/RegionInfo.h Mon Apr  4 02:19:18 2011
@@ -335,12 +335,16 @@
     return RI;
   }
 
+  /// PrintStyle - Print region in difference ways.
+  enum PrintStyle { PrintNone, PrintBB, PrintRN  };
+
   /// @brief Print the region.
   ///
   /// @param OS The output stream the Region is printed to.
   /// @param printTree Print also the tree of subregions.
   /// @param level The indentation level used for printing.
-  void print(raw_ostream& OS, bool printTree = true, unsigned level = 0) const;
+  void print(raw_ostream& OS, bool printTree = true, unsigned level = 0,
+             enum PrintStyle Style = PrintNone) const;
 
   /// @brief Print the region to stderr.
   void dump() const;

Modified: llvm/trunk/lib/Analysis/RegionInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/RegionInfo.cpp?rev=128808&r1=128807&r2=128808&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/RegionInfo.cpp (original)
+++ llvm/trunk/lib/Analysis/RegionInfo.cpp Mon Apr  4 02:19:18 2011
@@ -41,16 +41,15 @@
 STATISTIC(numRegions,       "The # of regions");
 STATISTIC(numSimpleRegions, "The # of simple regions");
 
-//===----------------------------------------------------------------------===//
-/// PrintStyle - Print region in difference ways.
-enum PrintStyle { PrintNone, PrintBB, PrintRN  };
-
-static cl::opt<enum PrintStyle> printStyle("print-region-style", cl::Hidden,
+static cl::opt<enum Region::PrintStyle> printStyle("print-region-style",
+  cl::Hidden,
   cl::desc("style of printing regions"),
   cl::values(
-    clEnumValN(PrintNone, "none",  "print no details"),
-    clEnumValN(PrintBB, "bb",  "print regions in detail with block_iterator"),
-    clEnumValN(PrintRN, "rn",  "print regions in detail with element_iterator"),
+    clEnumValN(Region::PrintNone, "none",  "print no details"),
+    clEnumValN(Region::PrintBB, "bb",
+               "print regions in detail with block_iterator"),
+    clEnumValN(Region::PrintRN, "rn",
+               "print regions in detail with element_iterator"),
     clEnumValEnd));
 //===----------------------------------------------------------------------===//
 /// Region Implementation
@@ -413,7 +412,8 @@
   return new Region(getEntry(), R->getExit(), RI, DT);
 }
 
-void Region::print(raw_ostream &OS, bool print_tree, unsigned level) const {
+void Region::print(raw_ostream &OS, bool print_tree, unsigned level,
+                   enum PrintStyle Style) const {
   if (print_tree)
     OS.indent(level*2) << "[" << level << "] " << getNameStr();
   else
@@ -422,14 +422,14 @@
   OS << "\n";
 
 
-  if (printStyle != PrintNone) {
+  if (Style != PrintNone) {
     OS.indent(level*2) << "{\n";
     OS.indent(level*2 + 2);
 
-    if (printStyle == PrintBB) {
+    if (Style == PrintBB) {
       for (const_block_iterator I = block_begin(), E = block_end(); I!=E; ++I)
         OS << **I << ", "; // TODO: remove the last ","
-    } else if (printStyle == PrintRN) {
+    } else if (Style == PrintRN) {
       for (const_element_iterator I = element_begin(), E = element_end(); I!=E; ++I)
         OS << **I << ", "; // TODO: remove the last ",
     }
@@ -439,14 +439,14 @@
 
   if (print_tree)
     for (const_iterator RI = begin(), RE = end(); RI != RE; ++RI)
-      (*RI)->print(OS, print_tree, level+1);
+      (*RI)->print(OS, print_tree, level+1, Style);
 
-  if (printStyle != PrintNone)
+  if (Style != PrintNone)
     OS.indent(level*2) << "} \n";
 }
 
 void Region::dump() const {
-  print(dbgs(), true, getDepth());
+  print(dbgs(), true, getDepth(), printStyle.getValue());
 }
 
 void Region::clearNodeCache() {
@@ -714,7 +714,7 @@
 
 void RegionInfo::print(raw_ostream &OS, const Module *) const {
   OS << "Region tree:\n";
-  TopLevelRegion->print(OS, true, 0);
+  TopLevelRegion->print(OS, true, 0, printStyle.getValue());
   OS << "End region tree\n";
 }
 



From grosser at fim.uni-passau.de  Mon Apr  4 02:25:38 2011
From: grosser at fim.uni-passau.de (Tobias Grosser)
Date: Mon, 04 Apr 2011 03:25:38 -0400
Subject: [llvm-commits] Subject: [PATCH 2/2] Region: Allow user control
 the printing style of the print function.
In-Reply-To: <BANLkTikR_kL2xEz3Cj1_1JO9B2KOhNaY4Q@mail.gmail.com>
References: <BANLkTikR_kL2xEz3Cj1_1JO9B2KOhNaY4Q@mail.gmail.com>
Message-ID: <4D997272.2040906@fim.uni-passau.de>

On 04/03/2011 11:31 PM, ether zhhb wrote:
> hi,
>
> This patch allow user to control the printing style of the Region's
> print method by calling it with a PrintStyle parameter like:
>
> R->print(dbgs(), true, 0, Region::PrintRN/*Print the region with
> hireachy style*/);
>
> best regards
> ether

Committed in: 128808

Thanks
Tobi

From jay.foad at gmail.com  Mon Apr  4 02:44:02 2011
From: jay.foad at gmail.com (Jay Foad)
Date: Mon, 04 Apr 2011 07:44:02 -0000
Subject: [llvm-commits] [llvm] r128810 - in /llvm/trunk:
 lib/Target/CBackend/CBackend.cpp
 lib/Transforms/IPO/IPConstantPropagation.cpp lib/VMCore/Verifier.cpp
 test/Assembler/aggregate-return-single-value.ll
Message-ID: <20110404074403.0F01E2A6C12D@llvm.org>

Author: foad
Date: Mon Apr  4 02:44:02 2011
New Revision: 128810

URL: http://llvm.org/viewvc/llvm-project?rev=128810&view=rev
Log:
Remove some support for ReturnInsts with multiple operands, and for
returning a scalar value in a function whose return type is a single-
element structure or array.

Modified:
    llvm/trunk/lib/Target/CBackend/CBackend.cpp
    llvm/trunk/lib/Transforms/IPO/IPConstantPropagation.cpp
    llvm/trunk/lib/VMCore/Verifier.cpp
    llvm/trunk/test/Assembler/aggregate-return-single-value.ll

Modified: llvm/trunk/lib/Target/CBackend/CBackend.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CBackend/CBackend.cpp?rev=128810&r1=128809&r2=128810&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CBackend/CBackend.cpp (original)
+++ llvm/trunk/lib/Target/CBackend/CBackend.cpp Mon Apr  4 02:44:02 2011
@@ -2440,24 +2440,6 @@
     return;
   }
 
-  if (I.getNumOperands() > 1) {
-    Out << "  {\n";
-    Out << "    ";
-    printType(Out, I.getParent()->getParent()->getReturnType());
-    Out << "   llvm_cbe_mrv_temp = {\n";
-    for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i) {
-      Out << "      ";
-      writeOperand(I.getOperand(i));
-      if (i != e - 1)
-        Out << ",";
-      Out << "\n";
-    }
-    Out << "    };\n";
-    Out << "    return llvm_cbe_mrv_temp;\n";
-    Out << "  }\n";
-    return;
-  }
-
   Out << "  return";
   if (I.getNumOperands()) {
     Out << ' ';

Modified: llvm/trunk/lib/Transforms/IPO/IPConstantPropagation.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/IPConstantPropagation.cpp?rev=128810&r1=128809&r2=128810&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/IPConstantPropagation.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/IPConstantPropagation.cpp Mon Apr  4 02:44:02 2011
@@ -186,7 +186,7 @@
         // Find the returned value
         Value *V;
         if (!STy)
-          V = RI->getOperand(i);
+          V = RI->getOperand(0);
         else
           V = FindInsertedValue(RI->getOperand(0), i);
 

Modified: llvm/trunk/lib/VMCore/Verifier.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Verifier.cpp?rev=128810&r1=128809&r2=128810&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/Verifier.cpp (original)
+++ llvm/trunk/lib/VMCore/Verifier.cpp Mon Apr  4 02:44:02 2011
@@ -826,30 +826,10 @@
     Assert2(N == 0,
             "Found return instr that returns non-void in Function of void "
             "return type!", &RI, F->getReturnType());
-  else if (N == 1 && F->getReturnType() == RI.getOperand(0)->getType()) {
-    // Exactly one return value and it matches the return type. Good.
-  } else if (const StructType *STy = dyn_cast<StructType>(F->getReturnType())) {
-    // The return type is a struct; check for multiple return values.
-    Assert2(STy->getNumElements() == N,
-            "Incorrect number of return values in ret instruction!",
-            &RI, F->getReturnType());
-    for (unsigned i = 0; i != N; ++i)
-      Assert2(STy->getElementType(i) == RI.getOperand(i)->getType(),
-              "Function return type does not match operand "
-              "type of return inst!", &RI, F->getReturnType());
-  } else if (const ArrayType *ATy = dyn_cast<ArrayType>(F->getReturnType())) {
-    // The return type is an array; check for multiple return values.
-    Assert2(ATy->getNumElements() == N,
-            "Incorrect number of return values in ret instruction!",
-            &RI, F->getReturnType());
-    for (unsigned i = 0; i != N; ++i)
-      Assert2(ATy->getElementType() == RI.getOperand(i)->getType(),
-              "Function return type does not match operand "
-              "type of return inst!", &RI, F->getReturnType());
-  } else {
-    CheckFailed("Function return type does not match operand "
-                "type of return inst!", &RI, F->getReturnType());
-  }
+  else
+    Assert2(N == 1 && F->getReturnType() == RI.getOperand(0)->getType(),
+            "Function return type does not match operand "
+            "type of return inst!", &RI, F->getReturnType());
 
   // Check to make sure that the return value has necessary properties for
   // terminators...

Modified: llvm/trunk/test/Assembler/aggregate-return-single-value.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Assembler/aggregate-return-single-value.ll?rev=128810&r1=128809&r2=128810&view=diff
==============================================================================
--- llvm/trunk/test/Assembler/aggregate-return-single-value.ll (original)
+++ llvm/trunk/test/Assembler/aggregate-return-single-value.ll Mon Apr  4 02:44:02 2011
@@ -1,14 +1,8 @@
 ; RUN: llvm-as < %s | llvm-dis
 
-define { i32 } @fooa() nounwind {
-  ret i32 0
-}
 define { i32 } @foob() nounwind {
   ret {i32}{ i32 0 }
 }
-define [1 x i32] @fooc() nounwind {
-  ret i32 0
-}
 define [1 x i32] @food() nounwind {
   ret [1 x i32][ i32 0 ]
 }



From etherzhhb at gmail.com  Mon Apr  4 04:12:56 2011
From: etherzhhb at gmail.com (ether zhhb)
Date: Mon, 4 Apr 2011 17:12:56 +0800
Subject: [llvm-commits] [PATCH 1/2] Region: Check the exit region before
 use it when expanding a region.
In-Reply-To: <4D996AE9.5000005@fim.uni-passau.de>
References: <BANLkTimv+KNxQDpCGtZ84kkWE8g4qgoN4w@mail.gmail.com>
	<4D996AE9.5000005@fim.uni-passau.de>
Message-ID: <BANLkTikmHdrPevzydR297Z3uozagasK1cw@mail.gmail.com>

>
> can you use an assert() here?
sure

---
 lib/Analysis/RegionInfo.cpp |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/lib/Analysis/RegionInfo.cpp b/lib/Analysis/RegionInfo.cpp
index e2f6a8b..a374ef9 100644
--- a/lib/Analysis/RegionInfo.cpp
+++ b/lib/Analysis/RegionInfo.cpp
@@ -394,6 +394,7 @@ Region *Region::getExpandedRegion() const {

   Region *R = RI->getRegionFor(exit);

+  assert(R && "Can not find a region for exit!");
   if (R->getEntry() != exit) {
     if (exit->getTerminator()->getNumSuccessors() == 1)
       return new Region(getEntry(), *succ_begin(exit), RI, DT);
-- 
1.7.3.3
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From fvbommel at gmail.com  Mon Apr  4 04:27:51 2011
From: fvbommel at gmail.com (Frits van Bommel)
Date: Mon, 4 Apr 2011 11:27:51 +0200
Subject: [llvm-commits] [llvm] r128801 - in /llvm/trunk:
 include/llvm/Object/MachOObject.h lib/Object/MachOObject.cpp
 tools/macho-dump/macho-dump.cpp
In-Reply-To: <20110403235148.145CA2A6C12C@llvm.org>
References: <20110403235148.145CA2A6C12C@llvm.org>
Message-ID: <BANLkTinHMAcd5--sgJuQYVXXwGLXMKRVOw@mail.gmail.com>

On Mon, Apr 4, 2011 at 1:51 AM, Eric Christopher <echristo at apple.com> wrote:
> - ?if (int Res = DumpHeader(*InputObject))
> - ? ?return Res;

This was the only use of that static function:

../trunk/tools/macho-dump/macho-dump.cpp:52:12: warning: unused
function 'DumpHeader' [-Wunused-function]
static int DumpHeader(MachOObject &Obj) {
           ^
1 warning generated.


From jay.foad at gmail.com  Mon Apr  4 04:40:20 2011
From: jay.foad at gmail.com (Jay Foad)
Date: Mon, 4 Apr 2011 10:40:20 +0100
Subject: [llvm-commits] [PATCH 1/2] Region: Check the exit region before
 use it when expanding a region.
In-Reply-To: <BANLkTikmHdrPevzydR297Z3uozagasK1cw@mail.gmail.com>
References: <BANLkTimv+KNxQDpCGtZ84kkWE8g4qgoN4w@mail.gmail.com>
	<4D996AE9.5000005@fim.uni-passau.de>
	<BANLkTikmHdrPevzydR297Z3uozagasK1cw@mail.gmail.com>
Message-ID: <BANLkTi=3_a2Fd65EGD2kw14_UViWY6NA3w@mail.gmail.com>

On 4 April 2011 10:12, ether zhhb <etherzhhb at gmail.com> wrote:
> + ?assert(R && "Can not find a region for exit!");

"Cannot" is one word.

Jay.


From baldrick at free.fr  Mon Apr  4 04:49:20 2011
From: baldrick at free.fr (Duncan Sands)
Date: Mon, 04 Apr 2011 09:49:20 -0000
Subject: [llvm-commits] [dragonegg] r128811 - /dragonegg/trunk/Constants.cpp
Message-ID: <20110404094920.B97E22A6C12C@llvm.org>

Author: baldrick
Date: Mon Apr  4 04:49:20 2011
New Revision: 128811

URL: http://llvm.org/viewvc/llvm-project?rev=128811&view=rev
Log:
Map constants to the global variable realizing them using a DenseMap
rather than a std::map.

Modified:
    dragonegg/trunk/Constants.cpp

Modified: dragonegg/trunk/Constants.cpp
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/Constants.cpp?rev=128811&r1=128810&r2=128811&view=diff
==============================================================================
--- dragonegg/trunk/Constants.cpp (original)
+++ dragonegg/trunk/Constants.cpp Mon Apr  4 04:49:20 2011
@@ -35,7 +35,6 @@
 
 // System headers
 #include <gmp.h>
-#include <map>
 
 // GCC headers
 extern "C" {
@@ -1164,7 +1163,7 @@
 
   // Cache the constants to avoid making obvious duplicates that have to be
   // folded by the optimizer.
-  static std::map<Constant*, GlobalVariable*> CSTCache;
+  static DenseMap<Constant*, GlobalVariable*> CSTCache;
   GlobalVariable *&Slot = CSTCache[Init];
   if (Slot)
     return Slot;



From etherzhhb at gmail.com  Mon Apr  4 05:20:12 2011
From: etherzhhb at gmail.com (ether zhhb)
Date: Mon, 4 Apr 2011 18:20:12 +0800
Subject: [llvm-commits] [PATCH 1/2] Region: Check the exit region before
 use it when expanding a region.
In-Reply-To: <BANLkTi=3_a2Fd65EGD2kw14_UViWY6NA3w@mail.gmail.com>
References: <BANLkTimv+KNxQDpCGtZ84kkWE8g4qgoN4w@mail.gmail.com>
	<4D996AE9.5000005@fim.uni-passau.de>
	<BANLkTikmHdrPevzydR297Z3uozagasK1cw@mail.gmail.com>
	<BANLkTi=3_a2Fd65EGD2kw14_UViWY6NA3w@mail.gmail.com>
Message-ID: <BANLkTi=t3AYSLKc-uPMd2JROt4eenkmt7Q@mail.gmail.com>

hi,

On Mon, Apr 4, 2011 at 5:40 PM, Jay Foad <jay.foad at gmail.com> wrote:
> On 4 April 2011 10:12, ether zhhb <etherzhhb at gmail.com> wrote:
>> + ?assert(R && "Can not find a region for exit!");
>
> "Cannot" is one word.
fixed
>
> Jay.
>
best regards
ether
---
 lib/Analysis/RegionInfo.cpp |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/lib/Analysis/RegionInfo.cpp b/lib/Analysis/RegionInfo.cpp
index e2f6a8b..36a4156 100644
--- a/lib/Analysis/RegionInfo.cpp
+++ b/lib/Analysis/RegionInfo.cpp
@@ -394,6 +394,7 @@ Region *Region::getExpandedRegion() const {

   Region *R = RI->getRegionFor(exit);

+  assert(R && "Cannot find a region for exit!");
   if (R->getEntry() != exit) {
     if (exit->getTerminator()->getNumSuccessors() == 1)
       return new Region(getEntry(), *succ_begin(exit), RI, DT);
-- 
1.7.3.3
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From baldrick at free.fr  Mon Apr  4 06:09:08 2011
From: baldrick at free.fr (Duncan Sands)
Date: Mon, 04 Apr 2011 11:09:08 -0000
Subject: [llvm-commits] [llvm] r128812 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <20110404110909.1C2FD2A6C12C@llvm.org>

Author: baldrick
Date: Mon Apr  4 06:09:08 2011
New Revision: 128812

URL: http://llvm.org/viewvc/llvm-project?rev=128812&view=rev
Log:
Dragonegg release notes.

Modified:
    llvm/trunk/docs/ReleaseNotes.html

Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=128812&r1=128811&r2=128812&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Mon Apr  4 06:09:08 2011
@@ -138,32 +138,32 @@
 
 <!--=========================================================================-->
 <div class="doc_subsection">
-<a name="dragonegg">DragonEgg: llvm-gcc ported to gcc-4.5</a>
+<a name="dragonegg">DragonEgg: GCC front-ends, LLVM back-end</a>
 </div>
 
 <div class="doc_text">
-NOTE: This should be written to be self-contained without referencing llvm-gcc.
-
-<p>
-<a href="http://dragonegg.llvm.org/">DragonEgg</a> is a port of llvm-gcc to
-gcc-4.5.  Unlike llvm-gcc, dragonegg in theory does not require any gcc-4.5
-modifications whatsoever (currently one small patch is needed) thanks to the
-new <a href="http://gcc.gnu.org/wiki/plugins">gcc plugin architecture</a>.
-DragonEgg is a gcc plugin that makes gcc-4.5 use the LLVM optimizers and code
-generators instead of gcc's, just like with llvm-gcc.
-</p>
-
 <p>
-DragonEgg is still a work in progress, but it is able to compile a lot of code,
-for example all of gcc, LLVM and clang.  Currently Ada, C, C++ and Fortran work
-well, while all other languages either don't work at all or only work poorly.
-For the moment only the x86-32 and x86-64 targets are supported, and only on
-linux and darwin (darwin may need additional gcc patches).
+<a href="http://dragonegg.llvm.org/">DragonEgg</a> is a
+<a href="http://gcc.gnu.org/wiki/plugins">gcc plugin</a> that replaces GCC's
+optimizers and code generators with LLVM's.
+Currently it requires a patched version of gcc-4.5.
+The plugin can target the x86-32 and x86-64 processor families and has been
+used successfully on the Darwin, FreeBSD and Linux platforms.
+The Ada, C, C++ and Fortran languages work well.
+The plugin is capable of compiling plenty of Obj-C, Obj-C++ and Java but it is
+not known whether the compiled code actually works or not!
 </p>
 
 <p>
 The 2.9 release has the following notable changes:
 <ul>
+<li>The plugin is much more stable when compiling Fortran.</li>
+<li>Inline asm where an asm output is tied to an input of a different size is
+now supported in many more cases.</li>
+<li>Basic support for the __float128 type was added.  It is now possible to
+generate LLVM IR from programs using __float128 but code generation does not
+work yet.</li>
+<li>Compiling Java programs no longer systematically crashes the plugin.</li>
 </ul>
 
 </div>



From baldrick at free.fr  Mon Apr  4 07:48:47 2011
From: baldrick at free.fr (Duncan Sands)
Date: Mon, 04 Apr 2011 12:48:47 -0000
Subject: [llvm-commits] [dragonegg] r128813 - /dragonegg/trunk/Constants.cpp
Message-ID: <20110404124847.986EA2A6C12E@llvm.org>

Author: baldrick
Date: Mon Apr  4 07:48:47 2011
New Revision: 128813

URL: http://llvm.org/viewvc/llvm-project?rev=128813&view=rev
Log:
Mostly cosmetic changes.  The only functionality change is that when
compiling Ada an empty constructor results in an undefined initial
value being used rather than an initial value of zero.

Modified:
    dragonegg/trunk/Constants.cpp

Modified: dragonegg/trunk/Constants.cpp
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/Constants.cpp?rev=128813&r1=128812&r2=128813&view=diff
==============================================================================
--- dragonegg/trunk/Constants.cpp (original)
+++ dragonegg/trunk/Constants.cpp Mon Apr  4 07:48:47 2011
@@ -133,7 +133,8 @@
   /// bits is undefined.
   BitSlice ExtendRange(SignedRange r) const;
 
-  /// ReduceRange - Reduce the slice to a smaller range.
+  /// ReduceRange - Reduce the slice to a smaller range discarding any bits that
+  /// do not belong to the new range.
   BitSlice ReduceRange(SignedRange r) const;
 
   /// Merge - Join the slice with another (which must be disjoint), forming the
@@ -239,7 +240,8 @@
   *this = BitSlice(Hull, TheFolder->CreateOr(ThisPart, OtherPart));
 }
 
-/// ReduceRange - Reduce the slice to a smaller range.
+/// ReduceRange - Reduce the slice to a smaller range discarding any bits that
+/// do not belong to the new range.
 BitSlice BitSlice::ReduceRange(SignedRange r) const {
   assert(R.contains(r) && "Not a reduction!");
   // Quick exit if the range did not actually decrease.
@@ -687,7 +689,7 @@
 
   // Zero length array.
   if (ResultElts.empty())
-    return Constant::getNullValue(ConvertType(TREE_TYPE(exp)));
+    return getDefaultValue(ConvertType(TREE_TYPE(exp)));
   assert(SomeVal && "If we had some initializer, we should have some value!");
 
   // Do a post-pass over all of the elements.  We're taking care of two things
@@ -808,7 +810,7 @@
     if (R.empty()) {
       // Return an empty array.  Remember the returned value as an optimization
       // in case we are called again.
-      C = Constant::getNullValue(GetUnitType(Context, 0));
+      C = UndefValue::get(GetUnitType(Context, 0));
       assert(isSafeToReturnContentsDirectly(TD) && "Unit over aligned?");
       return C;
     }
@@ -1007,17 +1009,15 @@
 }
 
 static Constant *ConvertCONSTRUCTOR(tree exp) {
-  // Please note, that we can have empty ctor, even if array is non-trivial (has
-  // nonzero number of entries). This situation is typical for static ctors,
-  // when array is filled during program initialization.
-  if (CONSTRUCTOR_ELTS(exp) == 0 ||
-      VEC_length(constructor_elt, CONSTRUCTOR_ELTS(exp)) == 0)  // All zeros?
-    return Constant::getNullValue(ConvertType(TREE_TYPE(exp)));
+  // If the constructor is empty then default initialize all components.  It is
+  // safe to use the LLVM type here as it covers every part of the GCC type that
+  // can be default initialized.
+  if (CONSTRUCTOR_NELTS(exp) == 0)
+    return getDefaultValue(ConvertType(TREE_TYPE(exp)));
 
   switch (TREE_CODE(TREE_TYPE(exp))) {
   default:
-    debug_tree(exp);
-    assert(0 && "Unknown ctor!");
+    DieAbjectly("Unknown constructor!", exp);
   case VECTOR_TYPE:
   case ARRAY_TYPE:  return ConvertArrayCONSTRUCTOR(exp);
   case QUAL_UNION_TYPE:



From aggarwa4 at illinois.edu  Mon Apr  4 09:23:16 2011
From: aggarwa4 at illinois.edu (Arushi Aggarwal)
Date: Mon, 04 Apr 2011 14:23:16 -0000
Subject: [llvm-commits] [poolalloc] r128814 -
	/poolalloc/trunk/lib/AssistDS/VarArgsFunc.cpp
Message-ID: <20110404142316.71B712A6C12C@llvm.org>

Author: aggarwa4
Date: Mon Apr  4 09:23:16 2011
New Revision: 128814

URL: http://llvm.org/viewvc/llvm-project?rev=128814&view=rev
Log:
DoesNotReturn attribute has the wrong meaning here.
I wanted to imply that this call instruction has
no return value. 

Modified:
    poolalloc/trunk/lib/AssistDS/VarArgsFunc.cpp

Modified: poolalloc/trunk/lib/AssistDS/VarArgsFunc.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/AssistDS/VarArgsFunc.cpp?rev=128814&r1=128813&r2=128814&view=diff
==============================================================================
--- poolalloc/trunk/lib/AssistDS/VarArgsFunc.cpp (original)
+++ poolalloc/trunk/lib/AssistDS/VarArgsFunc.cpp Mon Apr  4 09:23:16 2011
@@ -87,9 +87,7 @@
               Args.push_back(CI->getOperand(j));
             }
             CallInst *CINew = CallInst::Create(F, Args.begin(), Args.end(), "", CI);
-            if(F->getReturnType() != CI->getType()){ // means no uses
-              CINew->setDoesNotReturn();
-            } else {
+            if(F->getReturnType() == CI->getType()){ // else means no uses
               CI->replaceAllUsesWith(CINew);
             }
             CI->eraseFromParent();



From aggarwa4 at illinois.edu  Mon Apr  4 09:26:22 2011
From: aggarwa4 at illinois.edu (Arushi Aggarwal)
Date: Mon, 04 Apr 2011 14:26:22 -0000
Subject: [llvm-commits] [poolalloc] r128815 - in /poolalloc/trunk:
 include/assistDS/TypeChecks.h lib/AssistDS/TypeChecks.cpp
 lib/AssistDS/TypeChecks.h
Message-ID: <20110404142622.40CEB2A6C12C@llvm.org>

Author: aggarwa4
Date: Mon Apr  4 09:26:22 2011
New Revision: 128815

URL: http://llvm.org/viewvc/llvm-project?rev=128815&view=rev
Log:
Move header file to the include folder.

Added:
    poolalloc/trunk/include/assistDS/TypeChecks.h
Removed:
    poolalloc/trunk/lib/AssistDS/TypeChecks.h
Modified:
    poolalloc/trunk/lib/AssistDS/TypeChecks.cpp

Added: poolalloc/trunk/include/assistDS/TypeChecks.h
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/assistDS/TypeChecks.h?rev=128815&view=auto
==============================================================================
--- poolalloc/trunk/include/assistDS/TypeChecks.h (added)
+++ poolalloc/trunk/include/assistDS/TypeChecks.h Mon Apr  4 09:26:22 2011
@@ -0,0 +1,62 @@
+//===------------- TypeChecks.h - Insert runtime type checks --------------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This pass inserts checks to enforce type safety during runtime.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef TYPE_CHECKS_H
+#define TYPE_CHECKS_H
+
+#include "llvm/Instructions.h"
+#include "llvm/Pass.h"
+
+#include <map>
+
+namespace llvm {
+
+class Type;
+class Value;
+
+class TypeChecks : public ModulePass {
+private:
+  unsigned int maxType;
+  std::map<const Type *, unsigned int> UsedTypes;
+  std::map<const Value *, const Type *> UsedValues;
+
+  // Incorporate one type and all of its subtypes into the collection of used types.
+  void IncorporateType(const Type *Ty);
+
+  // Incorporate all of the types used by this value.
+  void IncorporateValue(const Value *V);
+
+public:
+  static char ID;
+  TypeChecks() : ModulePass(&ID) {}
+  virtual bool runOnModule(Module &M);
+  virtual void print(raw_ostream &OS, const Module *M) const;
+
+  virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+  }
+
+  bool initShadow(Module &M, StoreInst &SI);
+  bool initShadowLI(Module &M, LoadInst &LI);
+  bool unmapShadow(Module &M, Instruction &I);
+  bool visitLoadInst(Module &M, LoadInst &LI);
+  bool visitStoreInst(Module &M, StoreInst &SI);
+
+  // Return the map containing all of the types used in the module.
+  const std::map<const Type *, unsigned int> &getTypes() const {
+    return UsedTypes;
+  }
+};
+
+} // End llvm namespace
+
+#endif

Modified: poolalloc/trunk/lib/AssistDS/TypeChecks.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/AssistDS/TypeChecks.cpp?rev=128815&r1=128814&r2=128815&view=diff
==============================================================================
--- poolalloc/trunk/lib/AssistDS/TypeChecks.cpp (original)
+++ poolalloc/trunk/lib/AssistDS/TypeChecks.cpp Mon Apr  4 09:26:22 2011
@@ -11,7 +11,7 @@
 //
 //===----------------------------------------------------------------------===//
 
-#include "TypeChecks.h"
+#include "assistDS/TypeChecks.h"
 #include "llvm/Constants.h"
 #include "llvm/DerivedTypes.h"
 #include "llvm/Module.h"

Removed: poolalloc/trunk/lib/AssistDS/TypeChecks.h
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/AssistDS/TypeChecks.h?rev=128814&view=auto
==============================================================================
--- poolalloc/trunk/lib/AssistDS/TypeChecks.h (original)
+++ poolalloc/trunk/lib/AssistDS/TypeChecks.h (removed)
@@ -1,62 +0,0 @@
-//===------------- TypeChecks.h - Insert runtime type checks --------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This pass inserts checks to enforce type safety during runtime.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef TYPE_CHECKS_H
-#define TYPE_CHECKS_H
-
-#include "llvm/Instructions.h"
-#include "llvm/Pass.h"
-
-#include <map>
-
-namespace llvm {
-
-class Type;
-class Value;
-
-class TypeChecks : public ModulePass {
-private:
-  unsigned int maxType;
-  std::map<const Type *, unsigned int> UsedTypes;
-  std::map<const Value *, const Type *> UsedValues;
-
-  // Incorporate one type and all of its subtypes into the collection of used types.
-  void IncorporateType(const Type *Ty);
-
-  // Incorporate all of the types used by this value.
-  void IncorporateValue(const Value *V);
-
-public:
-  static char ID;
-  TypeChecks() : ModulePass(&ID) {}
-  virtual bool runOnModule(Module &M);
-  virtual void print(raw_ostream &OS, const Module *M) const;
-
-  virtual void getAnalysisUsage(AnalysisUsage &AU) const {
-  }
-
-  bool initShadow(Module &M, StoreInst &SI);
-  bool initShadowLI(Module &M, LoadInst &LI);
-  bool unmapShadow(Module &M, Instruction &I);
-  bool visitLoadInst(Module &M, LoadInst &LI);
-  bool visitStoreInst(Module &M, StoreInst &SI);
-
-  // Return the map containing all of the types used in the module.
-  const std::map<const Type *, unsigned int> &getTypes() const {
-    return UsedTypes;
-  }
-};
-
-} // End llvm namespace
-
-#endif



From aggarwa4 at illinois.edu  Mon Apr  4 09:32:53 2011
From: aggarwa4 at illinois.edu (Arushi Aggarwal)
Date: Mon, 04 Apr 2011 14:32:53 -0000
Subject: [llvm-commits] [poolalloc] r128816 -
	/poolalloc/trunk/lib/DSA/DSTest.cpp
Message-ID: <20110404143253.A26882A6C12C@llvm.org>

Author: aggarwa4
Date: Mon Apr  4 09:32:53 2011
New Revision: 128816

URL: http://llvm.org/viewvc/llvm-project?rev=128816&view=rev
Log:
Keep a reference to the module, instead of going 
through the function pointer. This is needed for
globals.

Modified:
    poolalloc/trunk/lib/DSA/DSTest.cpp

Modified: poolalloc/trunk/lib/DSA/DSTest.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/DSTest.cpp?rev=128816&r1=128815&r2=128816&view=diff
==============================================================================
--- poolalloc/trunk/lib/DSA/DSTest.cpp (original)
+++ poolalloc/trunk/lib/DSA/DSTest.cpp Mon Apr  4 09:32:53 2011
@@ -80,6 +80,7 @@
 class NodeValue {
   // Containing Function, if applicable.
   Function *F;
+  Module *ParentM;
   // Value in that graph's scalarmap that we base off of
   // (note that the NH we have below could be indexed a few times
   // from this value, only corresponds directly if no offsets)
@@ -188,6 +189,7 @@
 
       // First, find the function
       F = M->getFunction(func);
+      ParentM = const_cast<Module*>(M);
       assert(F && "Unable to find function specified!");
 
       // Now we try to find the value...
@@ -229,6 +231,7 @@
   // are a bit confusing in the context of offsets.  Make this not lame.
   Value    * getValue()     { return V;                           }
   Function * getFunction()  { return F;                           }
+  Module * getParentModule()  { return ParentM;                           }
 
   /// Helper to fetch the node from the nodehandle
   DSNode * getNode() {
@@ -273,7 +276,7 @@
 // (meant to be called as a helper)
 static void printTypesForNode(llvm::raw_ostream &O, NodeValue &NV) {
   DSNode *N = NV.getNode();
-  Module *M = NV.getFunction()->getParent();
+  Module *M = NV.getParentModule();
 
   if (N->isNodeCompletelyFolded()) {
     O << "Folded";



From aggarwa4 at illinois.edu  Mon Apr  4 09:34:12 2011
From: aggarwa4 at illinois.edu (Arushi Aggarwal)
Date: Mon, 04 Apr 2011 14:34:12 -0000
Subject: [llvm-commits] [poolalloc] r128817 -
	/poolalloc/trunk/lib/DSA/DataStructureStats.cpp
Message-ID: <20110404143412.604792A6C12C@llvm.org>

Author: aggarwa4
Date: Mon Apr  4 09:34:12 2011
New Revision: 128817

URL: http://llvm.org/viewvc/llvm-project?rev=128817&view=rev
Log:
Minor formatting changes.

Modified:
    poolalloc/trunk/lib/DSA/DataStructureStats.cpp

Modified: poolalloc/trunk/lib/DSA/DataStructureStats.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/DataStructureStats.cpp?rev=128817&r1=128816&r2=128817&view=diff
==============================================================================
--- poolalloc/trunk/lib/DSA/DataStructureStats.cpp (original)
+++ poolalloc/trunk/lib/DSA/DataStructureStats.cpp Mon Apr  4 09:34:12 2011
@@ -26,8 +26,10 @@
 using namespace llvm;
 
 namespace {
-  STATISTIC (TotalNumCallees, "Total number of callee functions at all indirect call sites");
-  STATISTIC (NumIndirectCalls, "Total number of indirect call sites in the program");
+  STATISTIC (TotalNumCallees, 
+             "Total number of callee functions at all indirect call sites");
+  STATISTIC (NumIndirectCalls, 
+             "Total number of indirect call sites in the program");
 
   // Typed/Untyped memory accesses: If DSA can infer that the types the loads
   // and stores are accessing are correct (ie, the node has not been collapsed),
@@ -130,7 +132,7 @@
         ++numIndirectCalls;
       } else {
         DEBUG(errs() << "WARNING: No callee in Function '" 
-              << F.getNameStr() << "' at call: \n"
+              << F.getNameStr() << " at call: \n"
               << *I->getCallSite().getInstruction());
       }
     }



From joerg at bec.de  Mon Apr  4 09:42:22 2011
From: joerg at bec.de (Joerg Sonnenberger)
Date: Mon, 04 Apr 2011 14:42:22 -0000
Subject: [llvm-commits] [llvm] r128818 -
	/llvm/trunk/utils/TableGen/X86DisassemblerTables.cpp
Message-ID: <20110404144222.BD56E2A6C12C@llvm.org>

Author: joerg
Date: Mon Apr  4 09:42:22 2011
New Revision: 128818

URL: http://llvm.org/viewvc/llvm-project?rev=128818&view=rev
Log:
Change loops to derive the number of tables automatically

Modified:
    llvm/trunk/utils/TableGen/X86DisassemblerTables.cpp

Modified: llvm/trunk/utils/TableGen/X86DisassemblerTables.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/X86DisassemblerTables.cpp?rev=128818&r1=128817&r2=128818&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/X86DisassemblerTables.cpp (original)
+++ llvm/trunk/utils/TableGen/X86DisassemblerTables.cpp Mon Apr  4 09:42:22 2011
@@ -267,7 +267,7 @@
 DisassemblerTables::DisassemblerTables() {
   unsigned i;
   
-  for (i = 0; i < 4; i++) {
+  for (i = 0; i < sizeof(Tables) / sizeof(Tables[0]); i++) {
     Tables[i] = new ContextDecision;
     memset(Tables[i], 0, sizeof(ContextDecision));
   }
@@ -278,7 +278,7 @@
 DisassemblerTables::~DisassemblerTables() {
   unsigned i;
   
-  for (i = 0; i < 4; i++)
+  for (i = 0; i < sizeof(Tables) / sizeof(Tables[0]); i++)
     delete Tables[i];
 }
   



From baldrick at free.fr  Mon Apr  4 09:52:32 2011
From: baldrick at free.fr (Duncan Sands)
Date: Mon, 04 Apr 2011 16:52:32 +0200
Subject: [llvm-commits] [llvm] r128818
	-	/llvm/trunk/utils/TableGen/X86DisassemblerTables.cpp
In-Reply-To: <20110404144222.BD56E2A6C12C@llvm.org>
References: <20110404144222.BD56E2A6C12C@llvm.org>
Message-ID: <4D99DB30.9040407@free.fr>

Hi Joerg,

> -  for (i = 0; i<  4; i++) {
> +  for (i = 0; i<  sizeof(Tables) / sizeof(Tables[0]); i++) {

maybe you can use array_lengthof from STLExtras.h instead.

Ciao, Duncan.

From stoklund at 2pi.dk  Mon Apr  4 10:32:11 2011
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Mon, 04 Apr 2011 15:32:11 -0000
Subject: [llvm-commits] [llvm] r128820 - /llvm/trunk/lib/CodeGen/SplitKit.h
Message-ID: <20110404153211.619052A6C12C@llvm.org>

Author: stoklund
Date: Mon Apr  4 10:32:11 2011
New Revision: 128820

URL: http://llvm.org/viewvc/llvm-project?rev=128820&view=rev
Log:
Delete leftover data members.

Modified:
    llvm/trunk/lib/CodeGen/SplitKit.h

Modified: llvm/trunk/lib/CodeGen/SplitKit.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SplitKit.h?rev=128820&r1=128819&r2=128820&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SplitKit.h (original)
+++ llvm/trunk/lib/CodeGen/SplitKit.h Mon Apr  4 10:32:11 2011
@@ -85,10 +85,6 @@
     bool LiveThrough;     ///< Live in whole block (Templ 5. or 6. above).
     bool LiveIn;          ///< Current reg is live in.
     bool LiveOut;         ///< Current reg is live out.
-
-    // Per-interference pattern scratch data.
-    bool OverlapEntry;    ///< Interference overlaps entering interval.
-    bool OverlapExit;     ///< Interference overlaps exiting interval.
   };
 
   /// Basic blocks where var is live. This array is parallel to



From stoklund at 2pi.dk  Mon Apr  4 10:32:15 2011
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Mon, 04 Apr 2011 15:32:15 -0000
Subject: [llvm-commits] [llvm] r128821 - in /llvm/trunk:
 include/llvm/CodeGen/SlotIndexes.h lib/CodeGen/RegAllocGreedy.cpp
 lib/CodeGen/SplitKit.cpp lib/CodeGen/SplitKit.h
Message-ID: <20110404153215.376352A6C12D@llvm.org>

Author: stoklund
Date: Mon Apr  4 10:32:15 2011
New Revision: 128821

URL: http://llvm.org/viewvc/llvm-project?rev=128821&view=rev
Log:
Stop caching basic block index ranges now that SlotIndexes can keep up.

Modified:
    llvm/trunk/include/llvm/CodeGen/SlotIndexes.h
    llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
    llvm/trunk/lib/CodeGen/SplitKit.cpp
    llvm/trunk/lib/CodeGen/SplitKit.h

Modified: llvm/trunk/include/llvm/CodeGen/SlotIndexes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SlotIndexes.h?rev=128821&r1=128820&r2=128821&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SlotIndexes.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SlotIndexes.h Mon Apr  4 10:32:15 2011
@@ -518,11 +518,21 @@
       return getMBBRange(MBB->getNumber());
     }
 
+    /// Returns the first index in the given basic block number.
+    SlotIndex getMBBStartIdx(unsigned Num) const {
+      return getMBBRange(Num).first;
+    }
+
     /// Returns the first index in the given basic block.
     SlotIndex getMBBStartIdx(const MachineBasicBlock *mbb) const {
       return getMBBRange(mbb).first;
     }
 
+    /// Returns the last index in the given basic block number.
+    SlotIndex getMBBEndIdx(unsigned Num) const {
+      return getMBBRange(Num).second;
+    }
+
     /// Returns the last index in the given basic block.
     SlotIndex getMBBEndIdx(const MachineBasicBlock *mbb) const {
       return getMBBRange(mbb).second;

Modified: llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp?rev=128821&r1=128820&r2=128821&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp Mon Apr  4 10:32:15 2011
@@ -433,7 +433,7 @@
 
     // Interference for the live-in value.
     if (BI.LiveIn) {
-      if (Intf.first() <= BI.Start)
+      if (Intf.first() <= Indexes->getMBBStartIdx(BC.Number))
         BC.Entry = SpillPlacement::MustSpill, Ins += BI.Uses;
       else if (!BI.Uses)
         BC.Entry = SpillPlacement::PrefSpill;
@@ -525,17 +525,19 @@
     if (!BI.LiveOut || !RegOut)
       continue;
 
+    SlotIndex Start, Stop;
+    tie(Start, Stop) = Indexes->getMBBRange(BI.MBB);
     Intf.moveToBlock(BI.MBB->getNumber());
     DEBUG(dbgs() << "BB#" << BI.MBB->getNumber() << " -> EB#"
                  << Bundles->getBundle(BI.MBB->getNumber(), 1)
-                 << " [" << BI.Start << ';' << BI.LastSplitPoint << '-'
-                 << BI.Stop << ") intf [" << Intf.first() << ';' << Intf.last()
+                 << " [" << Start << ';' << BI.LastSplitPoint << '-'
+                 << Stop << ") intf [" << Intf.first() << ';' << Intf.last()
                  << ')');
 
     // The interference interval should either be invalid or overlap MBB.
-    assert((!Intf.hasInterference() || Intf.first() < BI.Stop)
+    assert((!Intf.hasInterference() || Intf.first() < Stop)
            && "Bad interference");
-    assert((!Intf.hasInterference() || Intf.last() > BI.Start)
+    assert((!Intf.hasInterference() || Intf.last() > Start)
            && "Bad interference");
 
     // Check interference leaving the block.
@@ -553,14 +555,14 @@
       }
       if (!BI.LiveThrough) {
         DEBUG(dbgs() << ", not live-through.\n");
-        SE->useIntv(SE->enterIntvBefore(BI.Def), BI.Stop);
+        SE->useIntv(SE->enterIntvBefore(BI.Def), Stop);
         continue;
       }
       if (!RegIn) {
         // Block is live-through, but entry bundle is on the stack.
         // Reload just before the first use.
         DEBUG(dbgs() << ", not live-in, enter before first use.\n");
-        SE->useIntv(SE->enterIntvBefore(BI.FirstUse), BI.Stop);
+        SE->useIntv(SE->enterIntvBefore(BI.FirstUse), Stop);
         continue;
       }
       DEBUG(dbgs() << ", live-through.\n");
@@ -573,7 +575,7 @@
     if (!BI.LiveThrough && Intf.last() <= BI.Def) {
       // The interference doesn't reach the outgoing segment.
       DEBUG(dbgs() << " doesn't affect def from " << BI.Def << '\n');
-      SE->useIntv(BI.Def, BI.Stop);
+      SE->useIntv(BI.Def, Stop);
       continue;
     }
 
@@ -601,7 +603,7 @@
         SlotIndex SegStart = SE->enterIntvBefore(Use);
         assert(SegStart >= Intf.last() && "Couldn't avoid interference");
         assert(SegStart < BI.LastSplitPoint && "Impossible split point");
-        SE->useIntv(SegStart, BI.Stop);
+        SE->useIntv(SegStart, Stop);
         continue;
       }
     }
@@ -623,10 +625,12 @@
       continue;
 
     // We have an incoming register. Check for interference.
+    SlotIndex Start, Stop;
+    tie(Start, Stop) = Indexes->getMBBRange(BI.MBB);
     Intf.moveToBlock(BI.MBB->getNumber());
     DEBUG(dbgs() << "EB#" << Bundles->getBundle(BI.MBB->getNumber(), 0)
-                 << " -> BB#" << BI.MBB->getNumber() << " [" << BI.Start << ';'
-                 << BI.LastSplitPoint << '-' << BI.Stop << ')');
+                 << " -> BB#" << BI.MBB->getNumber() << " [" << Start << ';'
+                 << BI.LastSplitPoint << '-' << Stop << ')');
 
     // Check interference entering the block.
     if (!Intf.hasInterference()) {
@@ -637,7 +641,7 @@
         // Block is live-through without interference.
         if (RegOut) {
           DEBUG(dbgs() << ", no uses, live-through.\n");
-          SE->useIntv(BI.Start, BI.Stop);
+          SE->useIntv(Start, Stop);
         } else {
           DEBUG(dbgs() << ", no uses, stack-out.\n");
           SE->leaveIntvAtTop(*BI.MBB);
@@ -646,7 +650,7 @@
       }
       if (!BI.LiveThrough) {
         DEBUG(dbgs() << ", killed in block.\n");
-        SE->useIntv(BI.Start, SE->leaveIntvAfter(BI.Kill));
+        SE->useIntv(Start, SE->leaveIntvAfter(BI.Kill));
         continue;
       }
       if (!RegOut) {
@@ -654,7 +658,7 @@
         // Spill immediately after the last use.
         if (BI.LastUse < BI.LastSplitPoint) {
           DEBUG(dbgs() << ", uses, stack-out.\n");
-          SE->useIntv(BI.Start, SE->leaveIntvAfter(BI.LastUse));
+          SE->useIntv(Start, SE->leaveIntvAfter(BI.LastUse));
           continue;
         }
         // The last use is after the last split point, it is probably an
@@ -662,7 +666,7 @@
         DEBUG(dbgs() << ", uses at " << BI.LastUse << " after split point "
                      << BI.LastSplitPoint << ", stack-out.\n");
         SlotIndex SegEnd = SE->leaveIntvBefore(BI.LastSplitPoint);
-        SE->useIntv(BI.Start, SegEnd);
+        SE->useIntv(Start, SegEnd);
         // Run a double interval from the split to the last use.
         // This makes it possible to spill the complement without affecting the
         // indirect branch.
@@ -671,7 +675,7 @@
       }
       // Register is live-through.
       DEBUG(dbgs() << ", uses, live-through.\n");
-      SE->useIntv(BI.Start, BI.Stop);
+      SE->useIntv(Start, Stop);
       continue;
     }
 
@@ -681,7 +685,7 @@
     if (!BI.LiveThrough && Intf.first() >= BI.Kill) {
       // The interference doesn't reach the outgoing segment.
       DEBUG(dbgs() << " doesn't affect kill at " << BI.Kill << '\n');
-      SE->useIntv(BI.Start, BI.Kill);
+      SE->useIntv(Start, BI.Kill);
       continue;
     }
 
@@ -703,7 +707,7 @@
       DEBUG(dbgs() << ", free use at " << *UI << ".\n");
       SlotIndex SegEnd = SE->leaveIntvAfter(Use);
       assert(SegEnd <= Intf.first() && "Couldn't avoid interference");
-      SE->useIntv(BI.Start, SegEnd);
+      SE->useIntv(Start, SegEnd);
       continue;
     }
 

Modified: llvm/trunk/lib/CodeGen/SplitKit.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SplitKit.cpp?rev=128821&r1=128820&r2=128821&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SplitKit.cpp (original)
+++ llvm/trunk/lib/CodeGen/SplitKit.cpp Mon Apr  4 10:32:15 2011
@@ -118,7 +118,8 @@
   for (;;) {
     BlockInfo BI;
     BI.MBB = MFI;
-    tie(BI.Start, BI.Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB);
+    SlotIndex Start, Stop;
+    tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB);
 
     // The last split point is the latest possible insertion point that dominates
     // all successor blocks. If interference reaches LastSplitPoint, it is not
@@ -126,12 +127,12 @@
     // outgoing bundle.
     MachineBasicBlock::iterator LSP = LIS.getLastSplitPoint(*CurLI, BI.MBB);
     if (LSP == BI.MBB->end())
-      BI.LastSplitPoint = BI.Stop;
+      BI.LastSplitPoint = Stop;
     else
       BI.LastSplitPoint = LIS.getInstructionIndex(LSP);
 
     // LVI is the first live segment overlapping MBB.
-    BI.LiveIn = LVI->start <= BI.Start;
+    BI.LiveIn = LVI->start <= Start;
     if (!BI.LiveIn)
       BI.Def = LVI->start;
 
@@ -139,19 +140,19 @@
     BI.Uses = hasUses(MFI);
     if (BI.Uses && UseI != UseE) {
       BI.FirstUse = *UseI;
-      assert(BI.FirstUse >= BI.Start);
+      assert(BI.FirstUse >= Start);
       do ++UseI;
-      while (UseI != UseE && *UseI < BI.Stop);
+      while (UseI != UseE && *UseI < Stop);
       BI.LastUse = UseI[-1];
-      assert(BI.LastUse < BI.Stop);
+      assert(BI.LastUse < Stop);
     }
 
     // Look for gaps in the live range.
     bool hasGap = false;
     BI.LiveOut = true;
-    while (LVI->end < BI.Stop) {
+    while (LVI->end < Stop) {
       SlotIndex LastStop = LVI->end;
-      if (++LVI == LVE || LVI->start >= BI.Stop) {
+      if (++LVI == LVE || LVI->start >= Stop) {
         BI.Kill = LastStop;
         BI.LiveOut = false;
         break;
@@ -177,11 +178,11 @@
       break;
 
     // Live segment ends exactly at Stop. Move to the next segment.
-    if (LVI->end == BI.Stop && ++LVI == LVE)
+    if (LVI->end == Stop && ++LVI == LVE)
       break;
 
     // Pick the next basic block.
-    if (LVI->start < BI.Stop)
+    if (LVI->start < Stop)
       ++MFI;
     else
       MFI = LIS.getMBBFromIndex(LVI->start);

Modified: llvm/trunk/lib/CodeGen/SplitKit.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SplitKit.h?rev=128821&r1=128820&r2=128821&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SplitKit.h (original)
+++ llvm/trunk/lib/CodeGen/SplitKit.h Mon Apr  4 10:32:15 2011
@@ -73,8 +73,6 @@
   ///
   struct BlockInfo {
     MachineBasicBlock *MBB;
-    SlotIndex Start;      ///< Beginining of block.
-    SlotIndex Stop;       ///< End of block.
     SlotIndex FirstUse;   ///< First instr using current reg.
     SlotIndex LastUse;    ///< Last instr using current reg.
     SlotIndex Kill;       ///< Interval end point inside block.



From joerg at bec.de  Mon Apr  4 10:58:30 2011
From: joerg at bec.de (Joerg Sonnenberger)
Date: Mon, 04 Apr 2011 15:58:30 -0000
Subject: [llvm-commits] [llvm] r128822 - in /llvm/trunk/lib/Target/X86:
 X86InstrFormats.td X86InstrInfo.h X86MCCodeEmitter.cpp
Message-ID: <20110404155830.C21862A6C12C@llvm.org>

Author: joerg
Date: Mon Apr  4 10:58:30 2011
New Revision: 128822

URL: http://llvm.org/viewvc/llvm-project?rev=128822&view=rev
Log:
Expand Op0Mask by one bit in preparation for the PadLock prefixes.
Define most shift masks incrementally to reduce the redundant
hard-coding. Introduce new shift for the VEX flags to replace the
magic constant 32 in various places.

Modified:
    llvm/trunk/lib/Target/X86/X86InstrFormats.td
    llvm/trunk/lib/Target/X86/X86InstrInfo.h
    llvm/trunk/lib/Target/X86/X86MCCodeEmitter.cpp

Modified: llvm/trunk/lib/Target/X86/X86InstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFormats.td?rev=128822&r1=128821&r2=128822&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrFormats.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrFormats.td Mon Apr  4 10:58:30 2011
@@ -91,21 +91,21 @@
 class LOCK   { bit hasLockPrefix = 1; }
 class SegFS  { bits<2> SegOvrBits = 1; }
 class SegGS  { bits<2> SegOvrBits = 2; }
-class TB     { bits<4> Prefix = 1; }
-class REP    { bits<4> Prefix = 2; }
-class D8     { bits<4> Prefix = 3; }
-class D9     { bits<4> Prefix = 4; }
-class DA     { bits<4> Prefix = 5; }
-class DB     { bits<4> Prefix = 6; }
-class DC     { bits<4> Prefix = 7; }
-class DD     { bits<4> Prefix = 8; }
-class DE     { bits<4> Prefix = 9; }
-class DF     { bits<4> Prefix = 10; }
-class XD     { bits<4> Prefix = 11; }
-class XS     { bits<4> Prefix = 12; }
-class T8     { bits<4> Prefix = 13; }
-class TA     { bits<4> Prefix = 14; }
-class TF     { bits<4> Prefix = 15; }
+class TB     { bits<5> Prefix = 1; }
+class REP    { bits<5> Prefix = 2; }
+class D8     { bits<5> Prefix = 3; }
+class D9     { bits<5> Prefix = 4; }
+class DA     { bits<5> Prefix = 5; }
+class DB     { bits<5> Prefix = 6; }
+class DC     { bits<5> Prefix = 7; }
+class DD     { bits<5> Prefix = 8; }
+class DE     { bits<5> Prefix = 9; }
+class DF     { bits<5> Prefix = 10; }
+class XD     { bits<5> Prefix = 11; }
+class XS     { bits<5> Prefix = 12; }
+class T8     { bits<5> Prefix = 13; }
+class TA     { bits<5> Prefix = 14; }
+class TF     { bits<5> Prefix = 15; }
 class VEX    { bit hasVEXPrefix = 1; }
 class VEX_W  { bit hasVEX_WPrefix = 1; }
 class VEX_4V : VEX { bit hasVEX_4VPrefix = 1; }
@@ -136,7 +136,7 @@
   bit hasOpSizePrefix = 0;  // Does this inst have a 0x66 prefix?
   bit hasAdSizePrefix = 0;  // Does this inst have a 0x67 prefix?
 
-  bits<4> Prefix = 0;       // Which prefix byte does this inst have?
+  bits<5> Prefix = 0;       // Which prefix byte does this inst have?
   bit hasREX_WPrefix  = 0;  // Does this inst require the REX.W prefix?
   FPFormat FPForm = NotFP;  // What flavor of FP instruction is this?
   bit hasLockPrefix = 0;    // Does this inst have a 0xF0 prefix?
@@ -154,20 +154,20 @@
   let TSFlags{5-0}   = FormBits;
   let TSFlags{6}     = hasOpSizePrefix;
   let TSFlags{7}     = hasAdSizePrefix;
-  let TSFlags{11-8}  = Prefix;
-  let TSFlags{12}    = hasREX_WPrefix;
-  let TSFlags{15-13} = ImmT.Value;
-  let TSFlags{18-16} = FPForm.Value;
-  let TSFlags{19}    = hasLockPrefix;
-  let TSFlags{21-20} = SegOvrBits;
-  let TSFlags{23-22} = ExeDomain.Value;
-  let TSFlags{31-24} = Opcode;
-  let TSFlags{32}    = hasVEXPrefix;
-  let TSFlags{33}    = hasVEX_WPrefix;
-  let TSFlags{34}    = hasVEX_4VPrefix;
-  let TSFlags{35}    = hasVEX_i8ImmReg;
-  let TSFlags{36}    = hasVEX_L;
-  let TSFlags{37}    = has3DNow0F0FOpcode;
+  let TSFlags{12-8}  = Prefix;
+  let TSFlags{13}    = hasREX_WPrefix;
+  let TSFlags{16-14} = ImmT.Value;
+  let TSFlags{19-17} = FPForm.Value;
+  let TSFlags{20}    = hasLockPrefix;
+  let TSFlags{22-21} = SegOvrBits;
+  let TSFlags{24-23} = ExeDomain.Value;
+  let TSFlags{32-25} = Opcode;
+  let TSFlags{33}    = hasVEXPrefix;
+  let TSFlags{34}    = hasVEX_WPrefix;
+  let TSFlags{35}    = hasVEX_4VPrefix;
+  let TSFlags{36}    = hasVEX_i8ImmReg;
+  let TSFlags{37}    = hasVEX_L;
+  let TSFlags{38}    = has3DNow0F0FOpcode;
 }
 
 class PseudoI<dag oops, dag iops, list<dag> pattern>

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.h?rev=128822&r1=128821&r2=128822&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.h (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.h Mon Apr  4 10:58:30 2011
@@ -347,7 +347,7 @@
     // set, there is no prefix byte for obtaining a multibyte opcode.
     //
     Op0Shift    = 8,
-    Op0Mask     = 0xF << Op0Shift,
+    Op0Mask     = 0x1F << Op0Shift,
 
     // TB - TwoByte - Set if this instruction has a two byte opcode, which
     // starts with a 0x0F byte before the real opcode.
@@ -380,13 +380,13 @@
     // etc. We only cares about REX.W and REX.R bits and only the former is
     // statically determined.
     //
-    REXShift    = 12,
+    REXShift    = Op0Shift + 5,
     REX_W       = 1 << REXShift,
 
     //===------------------------------------------------------------------===//
     // This three-bit field describes the size of an immediate operand.  Zero is
     // unused so that we can tell if we forgot to set a value.
-    ImmShift = 13,
+    ImmShift = REXShift + 1,
     ImmMask    = 7 << ImmShift,
     Imm8       = 1 << ImmShift,
     Imm8PCRel  = 2 << ImmShift,
@@ -400,7 +400,7 @@
     // FP Instruction Classification...  Zero is non-fp instruction.
 
     // FPTypeMask - Mask for all of the FP types...
-    FPTypeShift = 16,
+    FPTypeShift = ImmShift + 3,
     FPTypeMask  = 7 << FPTypeShift,
 
     // NotFP - The default, set for instructions that do not use FP registers.
@@ -433,25 +433,26 @@
     SpecialFP  = 7 << FPTypeShift,
 
     // Lock prefix
-    LOCKShift = 19,
+    LOCKShift = FPTypeShift + 3,
     LOCK = 1 << LOCKShift,
 
     // Segment override prefixes. Currently we just need ability to address
     // stuff in gs and fs segments.
-    SegOvrShift = 20,
+    SegOvrShift = LOCKShift + 1,
     SegOvrMask  = 3 << SegOvrShift,
     FS          = 1 << SegOvrShift,
     GS          = 2 << SegOvrShift,
 
-    // Execution domain for SSE instructions in bits 22, 23.
-    // 0 in bits 22-23 means normal, non-SSE instruction.
-    SSEDomainShift = 22,
+    // Execution domain for SSE instructions in bits 23, 24.
+    // 0 in bits 23-24 means normal, non-SSE instruction.
+    SSEDomainShift = SegOvrShift + 2,
 
-    OpcodeShift   = 24,
+    OpcodeShift   = SSEDomainShift + 2,
     OpcodeMask    = 0xFF << OpcodeShift,
 
     //===------------------------------------------------------------------===//
     /// VEX - The opcode prefix used by AVX instructions
+    VEXShift = OpcodeShift + 8,
     VEX         = 1U << 0,
 
     /// VEX_W - Has a opcode specific functionality, but is used in the same
@@ -549,7 +550,7 @@
     case X86II::MRMDestMem:
       return 0;
     case X86II::MRMSrcMem: {
-      bool HasVEX_4V = (TSFlags >> 32) & X86II::VEX_4V;
+      bool HasVEX_4V = (TSFlags >> X86II::VEXShift) & X86II::VEX_4V;
       unsigned FirstMemOp = 1;
       if (HasVEX_4V)
         ++FirstMemOp;// Skip the register source (which is encoded in VEX_VVVV).

Modified: llvm/trunk/lib/Target/X86/X86MCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86MCCodeEmitter.cpp?rev=128822&r1=128821&r2=128822&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86MCCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86MCCodeEmitter.cpp Mon Apr  4 10:58:30 2011
@@ -382,7 +382,7 @@
                                            const TargetInstrDesc &Desc,
                                            raw_ostream &OS) const {
   bool HasVEX_4V = false;
-  if ((TSFlags >> 32) & X86II::VEX_4V)
+  if ((TSFlags >> X86II::VEXShift) & X86II::VEX_4V)
     HasVEX_4V = true;
 
   // VEX_R: opcode externsion equivalent to REX.R in
@@ -446,10 +446,10 @@
   if (TSFlags & X86II::OpSize)
     VEX_PP = 0x01;
 
-  if ((TSFlags >> 32) & X86II::VEX_W)
+  if ((TSFlags >> X86II::VEXShift) & X86II::VEX_W)
     VEX_W = 1;
 
-  if ((TSFlags >> 32) & X86II::VEX_L)
+  if ((TSFlags >> X86II::VEXShift) & X86II::VEX_L)
     VEX_L = 1;
 
   switch (TSFlags & X86II::Op0Mask) {
@@ -518,7 +518,7 @@
 
     // If the last register should be encoded in the immediate field
     // do not use any bit from VEX prefix to this register, ignore it
-    if ((TSFlags >> 32) & X86II::VEX_I8IMM)
+    if ((TSFlags >> X86II::VEXShift) & X86II::VEX_I8IMM)
       NumOps--;
 
     for (; CurOp != NumOps; ++CurOp) {
@@ -819,9 +819,9 @@
   // It uses the VEX.VVVV field?
   bool HasVEX_4V = false;
 
-  if ((TSFlags >> 32) & X86II::VEX)
+  if ((TSFlags >> X86II::VEXShift) & X86II::VEX)
     HasVEXPrefix = true;
-  if ((TSFlags >> 32) & X86II::VEX_4V)
+  if ((TSFlags >> X86II::VEXShift) & X86II::VEX_4V)
     HasVEX_4V = true;
 
   
@@ -837,7 +837,7 @@
   
   unsigned char BaseOpcode = X86II::getBaseOpcodeFor(TSFlags);
   
-  if ((TSFlags >> 32) & X86II::Has3DNow0F0FOpcode)
+  if ((TSFlags >> X86II::VEXShift) & X86II::Has3DNow0F0FOpcode)
     BaseOpcode = 0x0F;   // Weird 3DNow! encoding.
   
   unsigned SrcRegNum = 0;
@@ -994,7 +994,7 @@
   if (CurOp != NumOps) {
     // The last source register of a 4 operand instruction in AVX is encoded
     // in bits[7:4] of a immediate byte, and bits[3:0] are ignored.
-    if ((TSFlags >> 32) & X86II::VEX_I8IMM) {
+    if ((TSFlags >> X86II::VEXShift) & X86II::VEX_I8IMM) {
       const MCOperand &MO = MI.getOperand(CurOp++);
       bool IsExtReg =
         X86InstrInfo::isX86_64ExtendedReg(MO.getReg());
@@ -1017,7 +1017,7 @@
     }
   }
 
-  if ((TSFlags >> 32) & X86II::Has3DNow0F0FOpcode)
+  if ((TSFlags >> X86II::VEXShift) & X86II::Has3DNow0F0FOpcode)
     EmitByte(X86II::getBaseOpcodeFor(TSFlags), CurByte, OS);
   
 



From joerg at bec.de  Mon Apr  4 11:25:38 2011
From: joerg at bec.de (Joerg Sonnenberger)
Date: Mon, 04 Apr 2011 16:25:38 -0000
Subject: [llvm-commits] [llvm] r128823 -
	/llvm/trunk/utils/TableGen/X86DisassemblerTables.cpp
Message-ID: <20110404162538.D33A72A6C12C@llvm.org>

Author: joerg
Date: Mon Apr  4 11:25:38 2011
New Revision: 128823

URL: http://llvm.org/viewvc/llvm-project?rev=128823&view=rev
Log:
Use array_lengthof

Modified:
    llvm/trunk/utils/TableGen/X86DisassemblerTables.cpp

Modified: llvm/trunk/utils/TableGen/X86DisassemblerTables.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/X86DisassemblerTables.cpp?rev=128823&r1=128822&r2=128823&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/X86DisassemblerTables.cpp (original)
+++ llvm/trunk/utils/TableGen/X86DisassemblerTables.cpp Mon Apr  4 11:25:38 2011
@@ -18,6 +18,7 @@
 #include "X86DisassemblerTables.h"
 
 #include "TableGenBackend.h"
+#include "llvm/ADT/STLExtras.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/Format.h"
 
@@ -267,7 +268,7 @@
 DisassemblerTables::DisassemblerTables() {
   unsigned i;
   
-  for (i = 0; i < sizeof(Tables) / sizeof(Tables[0]); i++) {
+  for (i = 0; i < array_lengthof(Tables); i++) {
     Tables[i] = new ContextDecision;
     memset(Tables[i], 0, sizeof(ContextDecision));
   }
@@ -278,7 +279,7 @@
 DisassemblerTables::~DisassemblerTables() {
   unsigned i;
   
-  for (i = 0; i < sizeof(Tables) / sizeof(Tables[0]); i++)
+  for (i = 0; i < array_lengthof(Tables); i++)
     delete Tables[i];
 }
   



From baldrick at free.fr  Mon Apr  4 11:48:17 2011
From: baldrick at free.fr (Duncan Sands)
Date: Mon, 04 Apr 2011 16:48:17 -0000
Subject: [llvm-commits] [dragonegg] r128824 - /dragonegg/trunk/Convert.cpp
Message-ID: <20110404164817.655AA2A6C12C@llvm.org>

Author: baldrick
Date: Mon Apr  4 11:48:17 2011
New Revision: 128824

URL: http://llvm.org/viewvc/llvm-project?rev=128824&view=rev
Log:
Fix another class of Fortran failures: when passing 2D arrays with
unknown size two parameters are declared: a pointer to the array
and an integer holding the stride.  If the Fortran front-end knows
that the stride is not used then it doesn't bother to provide a
value for it in calls.  As far as I can see GCC doesn't try to pass
anything special (like zero) in this case: the callee just gets some
random value.  Emulate this by passing 'undef' for the missing call
argument(s).

Modified:
    dragonegg/trunk/Convert.cpp

Modified: dragonegg/trunk/Convert.cpp
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/Convert.cpp?rev=128824&r1=128823&r2=128824&view=diff
==============================================================================
--- dragonegg/trunk/Convert.cpp (original)
+++ dragonegg/trunk/Convert.cpp Mon Apr  4 11:48:17 2011
@@ -2871,6 +2871,15 @@
     }
   }
 
+  // Unlike LLVM, GCC does not require that call statements provide a value for
+  // every function argument (it passes rubbish for arguments with no value).
+  // To get the same effect we pass 'undef' for any unspecified arguments.
+  PFTy = cast<PointerType>(Callee->getType());
+  FTy = cast<FunctionType>(PFTy->getElementType());
+  if (CallOperands.size() < FTy->getNumParams())
+    for (unsigned i = CallOperands.size(), e = FTy->getNumParams(); i !=e; ++i)
+      CallOperands.push_back(UndefValue::get(FTy->getParamType(i)));
+
   Value *Call;
   if (!LandingPad) {
     Call = Builder.CreateCall(Callee, CallOperands.begin(), CallOperands.end());



From joerg at bec.de  Mon Apr  4 11:58:14 2011
From: joerg at bec.de (Joerg Sonnenberger)
Date: Mon, 04 Apr 2011 16:58:14 -0000
Subject: [llvm-commits] [llvm] r128826 - in /llvm/trunk:
 lib/Target/X86/Disassembler/X86DisassemblerDecoder.c
 lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h
 lib/Target/X86/X86CodeEmitter.cpp lib/Target/X86/X86InstrFormats.td
 lib/Target/X86/X86InstrInfo.h lib/Target/X86/X86InstrSystem.td
 lib/Target/X86/X86MCCodeEmitter.cpp test/MC/X86/padlock.s
 utils/TableGen/DisassemblerEmitter.cpp
 utils/TableGen/X86DisassemblerTables.cpp
 utils/TableGen/X86DisassemblerTables.h
 utils/TableGen/X86RecognizableInstr.cpp
Message-ID: <20110404165814.212962A6C12C@llvm.org>

Author: joerg
Date: Mon Apr  4 11:58:13 2011
New Revision: 128826

URL: http://llvm.org/viewvc/llvm-project?rev=128826&view=rev
Log:
Add support for the VIA PadLock instructions.

Added:
    llvm/trunk/test/MC/X86/padlock.s
Modified:
    llvm/trunk/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c
    llvm/trunk/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h
    llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
    llvm/trunk/lib/Target/X86/X86InstrFormats.td
    llvm/trunk/lib/Target/X86/X86InstrInfo.h
    llvm/trunk/lib/Target/X86/X86InstrSystem.td
    llvm/trunk/lib/Target/X86/X86MCCodeEmitter.cpp
    llvm/trunk/utils/TableGen/DisassemblerEmitter.cpp
    llvm/trunk/utils/TableGen/X86DisassemblerTables.cpp
    llvm/trunk/utils/TableGen/X86DisassemblerTables.h
    llvm/trunk/utils/TableGen/X86RecognizableInstr.cpp

Modified: llvm/trunk/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c?rev=128826&r1=128825&r2=128826&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c (original)
+++ llvm/trunk/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c Mon Apr  4 11:58:13 2011
@@ -75,6 +75,12 @@
   case THREEBYTE_3A:
     decision = &THREEBYTE3A_SYM;
     break;
+  case THREEBYTE_A6:
+    decision = &THREEBYTEA6_SYM;
+    break;
+  case THREEBYTE_A7:
+    decision = &THREEBYTEA7_SYM;
+    break;
   }
   
   return decision->opcodeDecisions[insnContext].modRMDecisions[opcode].
@@ -115,6 +121,12 @@
   case THREEBYTE_3A:
     dec = &THREEBYTE3A_SYM.opcodeDecisions[insnContext].modRMDecisions[opcode];
     break;
+  case THREEBYTE_A6:
+    dec = &THREEBYTEA6_SYM.opcodeDecisions[insnContext].modRMDecisions[opcode];
+    break;
+  case THREEBYTE_A7:
+    dec = &THREEBYTEA7_SYM.opcodeDecisions[insnContext].modRMDecisions[opcode];
+    break;
   }
   
   switch (dec->modrm_type) {
@@ -580,6 +592,24 @@
         return -1;
       
       insn->opcodeType = THREEBYTE_3A;
+    } else if (current == 0xa6) {
+      dbgprintf(insn, "Found a three-byte escape prefix (0x%hhx)", current);
+      
+      insn->threeByteEscape = current;
+      
+      if (consumeByte(insn, &current))
+        return -1;
+      
+      insn->opcodeType = THREEBYTE_A6;
+    } else if (current == 0xa7) {
+      dbgprintf(insn, "Found a three-byte escape prefix (0x%hhx)", current);
+      
+      insn->threeByteEscape = current;
+      
+      if (consumeByte(insn, &current))
+        return -1;
+      
+      insn->opcodeType = THREEBYTE_A7;
     } else {
       dbgprintf(insn, "Didn't find a three-byte escape prefix");
       

Modified: llvm/trunk/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h?rev=128826&r1=128825&r2=128826&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h (original)
+++ llvm/trunk/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h Mon Apr  4 11:58:13 2011
@@ -30,6 +30,8 @@
 #define TWOBYTE_SYM       x86DisassemblerTwoByteOpcodes
 #define THREEBYTE38_SYM   x86DisassemblerThreeByte38Opcodes
 #define THREEBYTE3A_SYM   x86DisassemblerThreeByte3AOpcodes
+#define THREEBYTEA6_SYM   x86DisassemblerThreeByteA6Opcodes
+#define THREEBYTEA7_SYM   x86DisassemblerThreeByteA7Opcodes
 
 #define INSTRUCTIONS_STR  "x86DisassemblerInstrSpecifiers"
 #define CONTEXTS_STR      "x86DisassemblerContexts"
@@ -37,6 +39,8 @@
 #define TWOBYTE_STR       "x86DisassemblerTwoByteOpcodes"
 #define THREEBYTE38_STR   "x86DisassemblerThreeByte38Opcodes"
 #define THREEBYTE3A_STR   "x86DisassemblerThreeByte3AOpcodes"
+#define THREEBYTEA6_STR   "x86DisassemblerThreeByteA6Opcodes"
+#define THREEBYTEA7_STR   "x86DisassemblerThreeByteA7Opcodes"
 
 /*
  * Attributes of an instruction that must be known before the opcode can be
@@ -119,7 +123,9 @@
   ONEBYTE       = 0,
   TWOBYTE       = 1,
   THREEBYTE_38  = 2,
-  THREEBYTE_3A  = 3
+  THREEBYTE_3A  = 3,
+  THREEBYTE_A6  = 4,
+  THREEBYTE_A7  = 5
 } OpcodeType;
 
 /*

Modified: llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp?rev=128826&r1=128825&r2=128826&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp Mon Apr  4 11:58:13 2011
@@ -652,6 +652,8 @@
   case X86II::TB:  // Two-byte opcode prefix
   case X86II::T8:  // 0F 38
   case X86II::TA:  // 0F 3A
+  case X86II::A6:  // 0F A6
+  case X86II::A7:  // 0F A7
     Need0FPrefix = true;
     break;
   case X86II::TF: // F2 0F 38
@@ -695,6 +697,12 @@
   case X86II::TA:    // 0F 3A
     MCE.emitByte(0x3A);
     break;
+  case X86II::A6:    // 0F A6
+    MCE.emitByte(0xA6);
+    break;
+  case X86II::A7:    // 0F A7
+    MCE.emitByte(0xA7);
+    break;
   }
 
   // If this is a two-address instruction, skip one of the register operands.

Modified: llvm/trunk/lib/Target/X86/X86InstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFormats.td?rev=128826&r1=128825&r2=128826&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrFormats.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrFormats.td Mon Apr  4 11:58:13 2011
@@ -105,7 +105,9 @@
 class XS     { bits<5> Prefix = 12; }
 class T8     { bits<5> Prefix = 13; }
 class TA     { bits<5> Prefix = 14; }
-class TF     { bits<5> Prefix = 15; }
+class A6     { bits<5> Prefix = 15; }
+class A7     { bits<5> Prefix = 16; }
+class TF     { bits<5> Prefix = 17; }
 class VEX    { bit hasVEXPrefix = 1; }
 class VEX_W  { bit hasVEX_WPrefix = 1; }
 class VEX_4V : VEX { bit hasVEX_4VPrefix = 1; }

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.h?rev=128826&r1=128825&r2=128826&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.h (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.h Mon Apr  4 11:58:13 2011
@@ -368,11 +368,12 @@
     // floating point operations performed in the SSE registers.
     XD = 11 << Op0Shift,  XS = 12 << Op0Shift,
 
-    // T8, TA - Prefix after the 0x0F prefix.
+    // T8, TA, A6, A7 - Prefix after the 0x0F prefix.
     T8 = 13 << Op0Shift,  TA = 14 << Op0Shift,
+    A6 = 15 << Op0Shift,  A7 = 16 << Op0Shift,
 
     // TF - Prefix before and after 0x0F
-    TF = 15 << Op0Shift,
+    TF = 17 << Op0Shift,
 
     //===------------------------------------------------------------------===//
     // REX_W - REX prefixes are instruction prefixes used in 64-bit mode.

Modified: llvm/trunk/lib/Target/X86/X86InstrSystem.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSystem.td?rev=128826&r1=128825&r2=128826&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrSystem.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrSystem.td Mon Apr  4 11:58:13 2011
@@ -398,3 +398,23 @@
 
 let Uses = [RDX, RAX, RCX] in
   def XSETBV : I<0x01, MRM_D1, (outs), (ins), "xsetbv", []>, TB;
+
+//===----------------------------------------------------------------------===//
+// VIA PadLock crypto instructions
+let Defs = [RAX, RDI], Uses = [RDX, RDI] in
+  def XSTORE : I<0xc0, RawFrm, (outs), (ins), "xstore", []>, A7;
+
+let Defs = [RSI, RDI], Uses = [RBX, RDX, RSI, RDI] in {
+  def XCRYPTECB : I<0xc8, RawFrm, (outs), (ins), "xcryptecb", []>, A7;
+  def XCRYPTCBC : I<0xd0, RawFrm, (outs), (ins), "xcryptcbc", []>, A7;
+  def XCRYPTCTR : I<0xd8, RawFrm, (outs), (ins), "xcryptctr", []>, A7;
+  def XCRYPTCFB : I<0xe0, RawFrm, (outs), (ins), "xcryptcfb", []>, A7;
+  def XCRYPTOFB : I<0xe8, RawFrm, (outs), (ins), "xcryptofb", []>, A7;
+}
+
+let Defs = [RAX, RSI, RDI], Uses = [RAX, RSI, RDI] in {
+  def XSHA1 : I<0xc8, RawFrm, (outs), (ins), "xsha1", []>, A6;
+  def XSHA256 : I<0xd0, RawFrm, (outs), (ins), "xsha256", []>, A6;
+}
+let Defs = [RAX, RDX, RSI], Uses = [RAX, RSI] in
+  def MONTMUL : I<0xc0, RawFrm, (outs), (ins), "montmul", []>, A6;

Modified: llvm/trunk/lib/Target/X86/X86MCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86MCCodeEmitter.cpp?rev=128826&r1=128825&r2=128826&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86MCCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86MCCodeEmitter.cpp Mon Apr  4 11:58:13 2011
@@ -470,6 +470,8 @@
   case X86II::XD:  // F2 0F
     VEX_PP = 0x3;
     break;
+  case X86II::A6:  // Bypass: Not used by VEX
+  case X86II::A7:  // Bypass: Not used by VEX
   case X86II::TB:  // Bypass: Not used by VEX
   case 0:
     break;  // No prefix!
@@ -742,6 +744,8 @@
   case X86II::TB:  // Two-byte opcode prefix
   case X86II::T8:  // 0F 38
   case X86II::TA:  // 0F 3A
+  case X86II::A6:  // 0F A6
+  case X86II::A7:  // 0F A7
     Need0FPrefix = true;
     break;
   case X86II::TF: // F2 0F 38
@@ -786,6 +790,12 @@
   case X86II::TA:    // 0F 3A
     EmitByte(0x3A, CurByte, OS);
     break;
+  case X86II::A6:    // 0F A6
+    EmitByte(0xA6, CurByte, OS);
+    break;
+  case X86II::A7:    // 0F A7
+    EmitByte(0xA7, CurByte, OS);
+    break;
   }
 }
 

Added: llvm/trunk/test/MC/X86/padlock.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/padlock.s?rev=128826&view=auto
==============================================================================
--- llvm/trunk/test/MC/X86/padlock.s (added)
+++ llvm/trunk/test/MC/X86/padlock.s Mon Apr  4 11:58:13 2011
@@ -0,0 +1,53 @@
+// RUN: llvm-mc -triple i386-unknown-unknown --show-encoding %s | FileCheck %s
+
+	xstore
+// CHECK: xstore
+// CHECK: encoding: [0x0f,0xa7,0xc0]
+
+	rep xcryptecb
+// CHECK: rep
+// CHECK: encoding: [0xf3]
+// CHECK: xcryptecb
+// CHECK: encoding: [0x0f,0xa7,0xc8]
+
+	rep xcryptcbc
+// CHECK: rep
+// CHECK: encoding: [0xf3]
+// CHECK: xcryptcbc
+// CHECK: encoding: [0x0f,0xa7,0xd0]
+
+	rep xcryptctr
+// CHECK: rep
+// CHECK: encoding: [0xf3]
+// CHECK: xcryptctr
+// CHECK: encoding: [0x0f,0xa7,0xd8]
+
+	rep xcryptcfb
+// CHECK: rep
+// CHECK: encoding: [0xf3]
+// CHECK: xcryptcfb
+// CHECK: encoding: [0x0f,0xa7,0xe0]
+
+	rep xcryptofb
+// CHECK: rep
+// CHECK: encoding: [0xf3]
+// CHECK: xcryptofb
+// CHECK: encoding: [0x0f,0xa7,0xe8]
+
+	rep xsha1
+// CHECK: rep
+// CHECK: encoding: [0xf3]
+// CHECK: xsha1
+// CHECK: encoding: [0x0f,0xa6,0xc8]
+
+	rep xsha256
+// CHECK: rep
+// CHECK: encoding: [0xf3]
+// CHECK: xsha256
+// CHECK: encoding: [0x0f,0xa6,0xd0]
+
+	rep montmul
+// CHECK: rep
+// CHECK: encoding: [0xf3]
+// CHECK: montmul
+// CHECK: encoding: [0x0f,0xa6,0xc0]

Modified: llvm/trunk/utils/TableGen/DisassemblerEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/DisassemblerEmitter.cpp?rev=128826&r1=128825&r2=128826&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/DisassemblerEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/DisassemblerEmitter.cpp Mon Apr  4 11:58:13 2011
@@ -40,12 +40,12 @@
 ///   all cases as a 64-bit instruction with only OPSIZE set.  (The XS prefix
 ///   may have effects on its execution, but does not change the instruction
 ///   returned.)  This allows considerable space savings in other tables.
-/// - Four tables (ONEBYTE_SYM, TWOBYTE_SYM, THREEBYTE38_SYM, and
-///   THREEBYTE3A_SYM) contain the hierarchy that the decoder traverses while
-///   decoding an instruction.  At the lowest level of this hierarchy are
-///   instruction UIDs, 16-bit integers that can be used to uniquely identify
-///   the instruction and correspond exactly to its position in the list of
-///   CodeGenInstructions for the target.
+/// - Six tables (ONEBYTE_SYM, TWOBYTE_SYM, THREEBYTE38_SYM, THREEBYTE3A_SYM,
+///   THREEBYTEA6_SYM, and THREEBYTEA7_SYM contain the hierarchy that the
+///   decoder traverses while decoding an instruction.  At the lowest level of
+///   this hierarchy are instruction UIDs, 16-bit integers that can be used to
+///   uniquely identify the instruction and correspond exactly to its position
+///   in the list of CodeGenInstructions for the target.
 /// - One table (INSTRUCTIONS_SYM) contains information about the operands of
 ///   each instruction and how to decode them.
 ///

Modified: llvm/trunk/utils/TableGen/X86DisassemblerTables.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/X86DisassemblerTables.cpp?rev=128826&r1=128825&r2=128826&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/X86DisassemblerTables.cpp (original)
+++ llvm/trunk/utils/TableGen/X86DisassemblerTables.cpp Mon Apr  4 11:58:13 2011
@@ -566,6 +566,8 @@
   emitContextDecision(o1, o2, i1, i2, *Tables[1], TWOBYTE_STR);
   emitContextDecision(o1, o2, i1, i2, *Tables[2], THREEBYTE38_STR);
   emitContextDecision(o1, o2, i1, i2, *Tables[3], THREEBYTE3A_STR);
+  emitContextDecision(o1, o2, i1, i2, *Tables[4], THREEBYTEA6_STR);
+  emitContextDecision(o1, o2, i1, i2, *Tables[5], THREEBYTEA7_STR);
 }
 
 void DisassemblerTables::emit(raw_ostream &o) const {

Modified: llvm/trunk/utils/TableGen/X86DisassemblerTables.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/X86DisassemblerTables.h?rev=128826&r1=128825&r2=128826&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/X86DisassemblerTables.h (original)
+++ llvm/trunk/utils/TableGen/X86DisassemblerTables.h Mon Apr  4 11:58:13 2011
@@ -39,7 +39,9 @@
   /// [1] two-byte opcodes of the form 0f __
   /// [2] three-byte opcodes of the form 0f 38 __
   /// [3] three-byte opcodes of the form 0f 3a __
-  ContextDecision* Tables[4];
+  /// [4] three-byte opcodes of the form 0f a6 __
+  /// [5] three-byte opcodes of the form 0f a7 __
+  ContextDecision* Tables[6];
   
   /// The instruction information table
   std::vector<InstructionSpecifier> InstructionSpecifiers;
@@ -141,8 +143,9 @@
   ///     }
   ///   }
   ///
-  ///   NAME is the name of the ContextDecision (typically one of the four names 
-  ///   ONEBYTE_SYM, TWOBYTE_SYM, THREEBYTE38_SYM, and THREEBYTE3A_SYM from
+  ///   NAME is the name of the ContextDecision (typically one of the four names
+  ///   ONEBYTE_SYM, TWOBYTE_SYM, THREEBYTE38_SYM, THREEBYTE3A_SYM,
+  ///   THREEBYTEA6_SYM, and THREEBYTEA7_SYM from
   ///   X86DisassemblerDecoderCommon.h).
   ///   IC is one of the contexts in InstructionContext.  There is an opcode
   ///   decision for each possible context.

Modified: llvm/trunk/utils/TableGen/X86RecognizableInstr.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/X86RecognizableInstr.cpp?rev=128826&r1=128825&r2=128826&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/X86RecognizableInstr.cpp (original)
+++ llvm/trunk/utils/TableGen/X86RecognizableInstr.cpp Mon Apr  4 11:58:13 2011
@@ -68,7 +68,7 @@
     DC = 7, DD = 8, DE = 9, DF = 10,
     XD = 11,  XS = 12,
     T8 = 13,  P_TA = 14,
-    P_0F_AE = 16, P_0F_01 = 17
+    A6 = 15,  A7 = 16
   };
 }
 
@@ -796,6 +796,22 @@
       filter = new DumbFilter();
     opcodeToSet = Opcode;
     break;
+  case X86Local::A6:
+    opcodeType = THREEBYTE_A6;
+    if (needsModRMForDecode(Form))
+      filter = new ModFilter(isRegFormat(Form));
+    else
+      filter = new DumbFilter();
+    opcodeToSet = Opcode;
+    break;
+  case X86Local::A7:
+    opcodeType = THREEBYTE_A7;
+    if (needsModRMForDecode(Form))
+      filter = new ModFilter(isRegFormat(Form));
+    else
+      filter = new DumbFilter();
+    opcodeToSet = Opcode;
+    break;
   case X86Local::D8:
   case X86Local::D9:
   case X86Local::DA:



From stoklund at 2pi.dk  Mon Apr  4 12:07:03 2011
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Mon, 04 Apr 2011 17:07:03 -0000
Subject: [llvm-commits] [llvm] r128827 - in
 /llvm/trunk/test/CodeGen/PowerPC: 2010-05-03-retaddr1.ll indirectbr.ll
Message-ID: <20110404170703.E0F762A6C12C@llvm.org>

Author: stoklund
Date: Mon Apr  4 12:07:03 2011
New Revision: 128827

URL: http://llvm.org/viewvc/llvm-project?rev=128827&view=rev
Log:
Fix PowerPC tests to be register allocator independent.

Modified:
    llvm/trunk/test/CodeGen/PowerPC/2010-05-03-retaddr1.ll
    llvm/trunk/test/CodeGen/PowerPC/indirectbr.ll

Modified: llvm/trunk/test/CodeGen/PowerPC/2010-05-03-retaddr1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/2010-05-03-retaddr1.ll?rev=128827&r1=128826&r2=128827&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/2010-05-03-retaddr1.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/2010-05-03-retaddr1.ll Mon Apr  4 12:07:03 2011
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin -mcpu=g5 | FileCheck %s
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin -mcpu=g5 -regalloc=linearscan | FileCheck %s
 
 declare i8* @llvm.frameaddress(i32) nounwind readnone
 

Modified: llvm/trunk/test/CodeGen/PowerPC/indirectbr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/indirectbr.ll?rev=128827&r1=128826&r2=128827&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/indirectbr.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/indirectbr.ll Mon Apr  4 12:07:03 2011
@@ -43,13 +43,13 @@
 
 L1:                                               ; preds = %L2, %bb2
   %res.3 = phi i32 [ %phitmp, %L2 ], [ 2, %bb2 ]  ; <i32> [#uses=1]
-; PIC: addis r4, r4, ha16(Ltmp0-L0$pb)
-; PIC: li r6, lo16(Ltmp0-L0$pb)
-; PIC: add r4, r4, r6
-; PIC: stw r4
-; STATIC: li r5, lo16(Ltmp0)
-; STATIC: addis r5, r5, ha16(Ltmp0)
-; STATIC: stw r5
+; PIC: addis r[[R0:[0-9]+]], r{{[0-9]+}}, ha16(Ltmp0-L0$pb)
+; PIC: li r[[R1:[0-9]+]], lo16(Ltmp0-L0$pb)
+; PIC: add r[[R2:[0-9]+]], r[[R0]], r[[R1]]
+; PIC: stw r[[R2]]
+; STATIC: li r[[R0:[0-9]+]], lo16(Ltmp0)
+; STATIC: addis r[[R0]], r[[R0]], ha16(Ltmp0)
+; STATIC: stw r[[R0]]
   store i8* blockaddress(@foo, %L5), i8** @nextaddr, align 4
   ret i32 %res.3
 }



From stoklund at 2pi.dk  Mon Apr  4 12:07:06 2011
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Mon, 04 Apr 2011 17:07:06 -0000
Subject: [llvm-commits] [llvm] r128828 -
	/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
Message-ID: <20110404170706.AD75A2A6C12D@llvm.org>

Author: stoklund
Date: Mon Apr  4 12:07:06 2011
New Revision: 128828

URL: http://llvm.org/viewvc/llvm-project?rev=128828&view=rev
Log:
Use X0 instead of R0 for the zero register on ppc64.

The 32-bit R0 cannot be used where a 64-bit register is expected.

Modified:
    llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp

Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=128828&r1=128827&r2=128828&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Mon Apr  4 12:07:06 2011
@@ -899,7 +899,8 @@
     short Imm;
     if (isIntS16Immediate(CN, Imm)) {
       Disp = DAG.getTargetConstant(Imm, CN->getValueType(0));
-      Base = DAG.getRegister(PPC::R0, CN->getValueType(0));
+      Base = DAG.getRegister(PPCSubTarget.isPPC64() ? PPC::X0 : PPC::R0,
+                             CN->getValueType(0));
       return true;
     }
 
@@ -947,7 +948,8 @@
   }
 
   // Otherwise, do it the hard way, using R0 as the base register.
-  Base = DAG.getRegister(PPC::R0, N.getValueType());
+  Base = DAG.getRegister(PPCSubTarget.isPPC64() ? PPC::X0 : PPC::R0,
+                         N.getValueType());
   Index = N;
   return true;
 }
@@ -4571,6 +4573,7 @@
   // registers without caring whether they're 32 or 64, but here we're
   // doing actual arithmetic on the addresses.
   bool is64bit = PPCSubTarget.isPPC64();
+  unsigned ZeroReg = is64bit ? PPC::X0 : PPC::R0;
 
   const BasicBlock *LLVM_BB = BB->getBasicBlock();
   MachineFunction *F = BB->getParent();
@@ -4634,8 +4637,7 @@
   //   bne- loopMBB
   //   fallthrough --> exitMBB
   //   srw dest, tmpDest, shift
-
-  if (ptrA!=PPC::R0) {
+  if (ptrA != ZeroReg) {
     Ptr1Reg = RegInfo.createVirtualRegister(RC);
     BuildMI(BB, dl, TII->get(is64bit ? PPC::ADD8 : PPC::ADD4), Ptr1Reg)
       .addReg(ptrA).addReg(ptrB);
@@ -4665,7 +4667,7 @@
 
   BB = loopMBB;
   BuildMI(BB, dl, TII->get(PPC::LWARX), TmpDestReg)
-    .addReg(PPC::R0).addReg(PtrReg);
+    .addReg(ZeroReg).addReg(PtrReg);
   if (BinOpcode)
     BuildMI(BB, dl, TII->get(BinOpcode), TmpReg)
       .addReg(Incr2Reg).addReg(TmpDestReg);
@@ -4676,7 +4678,7 @@
   BuildMI(BB, dl, TII->get(is64bit ? PPC::OR8 : PPC::OR), Tmp4Reg)
     .addReg(Tmp3Reg).addReg(Tmp2Reg);
   BuildMI(BB, dl, TII->get(PPC::STWCX))
-    .addReg(Tmp4Reg).addReg(PPC::R0).addReg(PtrReg);
+    .addReg(Tmp4Reg).addReg(ZeroReg).addReg(PtrReg);
   BuildMI(BB, dl, TII->get(PPC::BCC))
     .addImm(PPC::PRED_NE).addReg(PPC::CR0).addMBB(loopMBB);
   BB->addSuccessor(loopMBB);
@@ -4933,6 +4935,7 @@
     unsigned TmpDestReg = RegInfo.createVirtualRegister(RC);
     unsigned Ptr1Reg;
     unsigned TmpReg = RegInfo.createVirtualRegister(RC);
+    unsigned ZeroReg = is64bit ? PPC::X0 : PPC::R0;
     //  thisMBB:
     //   ...
     //   fallthrough --> loopMBB
@@ -4965,7 +4968,7 @@
     //   stwcx. tmpDest, ptr
     // exitBB:
     //   srw dest, tmpDest, shift
-    if (ptrA!=PPC::R0) {
+    if (ptrA != ZeroReg) {
       Ptr1Reg = RegInfo.createVirtualRegister(RC);
       BuildMI(BB, dl, TII->get(is64bit ? PPC::ADD8 : PPC::ADD4), Ptr1Reg)
         .addReg(ptrA).addReg(ptrB);
@@ -5002,7 +5005,7 @@
 
     BB = loop1MBB;
     BuildMI(BB, dl, TII->get(PPC::LWARX), TmpDestReg)
-        .addReg(PPC::R0).addReg(PtrReg);
+        .addReg(ZeroReg).addReg(PtrReg);
     BuildMI(BB, dl, TII->get(PPC::AND),TmpReg)
         .addReg(TmpDestReg).addReg(MaskReg);
     BuildMI(BB, dl, TII->get(PPC::CMPW), PPC::CR0)
@@ -5018,7 +5021,7 @@
     BuildMI(BB, dl, TII->get(PPC::OR),Tmp4Reg)
         .addReg(Tmp2Reg).addReg(NewVal3Reg);
     BuildMI(BB, dl, TII->get(PPC::STWCX)).addReg(Tmp4Reg)
-        .addReg(PPC::R0).addReg(PtrReg);
+        .addReg(ZeroReg).addReg(PtrReg);
     BuildMI(BB, dl, TII->get(PPC::BCC))
       .addImm(PPC::PRED_NE).addReg(PPC::CR0).addMBB(loop1MBB);
     BuildMI(BB, dl, TII->get(PPC::B)).addMBB(exitMBB);
@@ -5027,7 +5030,7 @@
 
     BB = midMBB;
     BuildMI(BB, dl, TII->get(PPC::STWCX)).addReg(TmpDestReg)
-      .addReg(PPC::R0).addReg(PtrReg);
+      .addReg(ZeroReg).addReg(PtrReg);
     BB->addSuccessor(exitMBB);
 
     //  exitMBB:



From stoklund at 2pi.dk  Mon Apr  4 12:07:09 2011
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Mon, 04 Apr 2011 17:07:09 -0000
Subject: [llvm-commits] [llvm] r128829 - in /llvm/trunk/lib/Target/PowerPC:
 PPCInstr64Bit.td PPCInstrInfo.td
Message-ID: <20110404170709.582CF2A6C12E@llvm.org>

Author: stoklund
Date: Mon Apr  4 12:07:09 2011
New Revision: 128829

URL: http://llvm.org/viewvc/llvm-project?rev=128829&view=rev
Log:
PowerPC atomic pseudos clobber CR0, they don't read it.

Modified:
    llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td
    llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td

Modified: llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td?rev=128829&r1=128828&r2=128829&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td Mon Apr  4 12:07:09 2011
@@ -130,7 +130,7 @@
 
 // Atomic operations
 let usesCustomInserter = 1 in {
-  let Uses = [CR0] in {
+  let Defs = [CR0] in {
     def ATOMIC_LOAD_ADD_I64 : Pseudo<
       (outs G8RC:$dst), (ins memrr:$ptr, G8RC:$incr), "",
       [(set G8RC:$dst, (atomic_load_add_64 xoaddr:$ptr, G8RC:$incr))]>;

Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td?rev=128829&r1=128828&r2=128829&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Mon Apr  4 12:07:09 2011
@@ -550,7 +550,7 @@
 
 // Atomic operations
 let usesCustomInserter = 1 in {
-  let Uses = [CR0] in {
+  let Defs = [CR0] in {
     def ATOMIC_LOAD_ADD_I8 : Pseudo<
       (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), "",
       [(set GPRC:$dst, (atomic_load_add_8 xoaddr:$ptr, GPRC:$incr))]>;



From ahatanak at gmail.com  Mon Apr  4 12:11:07 2011
From: ahatanak at gmail.com (Akira Hatanaka)
Date: Mon, 04 Apr 2011 17:11:07 -0000
Subject: [llvm-commits] [llvm] r128830 - in /llvm/trunk/lib/Target/Mips:
 MipsISelDAGToDAG.cpp MipsISelLowering.cpp
Message-ID: <20110404171107.9FF322A6C12C@llvm.org>

Author: ahatanak
Date: Mon Apr  4 12:11:07 2011
New Revision: 128830

URL: http://llvm.org/viewvc/llvm-project?rev=128830&view=rev
Log:
Move transformation of JmpLink and related nodes done during instruction selection to Legalize phase.

Modified:
    llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp
    llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp

Modified: llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp?rev=128830&r1=128829&r2=128830&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp Mon Apr  4 12:11:07 2011
@@ -122,7 +122,8 @@
     if ((Addr.getOpcode() == ISD::TargetGlobalAddress) ||
         (Addr.getOpcode() == ISD::TargetConstantPool) ||
         (Addr.getOpcode() == ISD::TargetJumpTable) ||
-        (Addr.getOpcode() == ISD::TargetBlockAddress)) {
+        (Addr.getOpcode() == ISD::TargetBlockAddress) ||
+        (Addr.getOpcode() == ISD::TargetExternalSymbol)) {
       Base   = CurDAG->getRegister(Mips::GP, MVT::i32);
       Offset = Addr;
       return true;
@@ -444,61 +445,6 @@
         return ResNode;
       // Other cases are autogenerated.
       break;
-
-    /// Handle direct and indirect calls when using PIC. On PIC, when
-    /// GOT is smaller than about 64k (small code) the GA target is
-    /// loaded with only one instruction. Otherwise GA's target must
-    /// be loaded with 3 instructions.
-    case MipsISD::JmpLink: {
-      if (TM.getRelocationModel() == Reloc::PIC_) {
-        unsigned LastOpNum = Node->getNumOperands()-1;
-
-        SDValue Chain  = Node->getOperand(0);
-        SDValue Callee = Node->getOperand(1);
-        SDValue InFlag;
-
-        // Skip the incomming flag if present
-        if (Node->getOperand(LastOpNum).getValueType() == MVT::Glue)
-          LastOpNum--;
-
-        if ( (isa<GlobalAddressSDNode>(Callee)) ||
-             (isa<ExternalSymbolSDNode>(Callee)) )
-        {
-          /// Direct call for global addresses and external symbols
-          SDValue GPReg = CurDAG->getRegister(Mips::GP, MVT::i32);
-
-          // Use load to get GOT target
-          SDValue Ops[] = { Callee, GPReg, Chain };
-          SDValue Load = SDValue(CurDAG->getMachineNode(Mips::LW, dl, MVT::i32,
-                                     MVT::Other, Ops, 3), 0);
-          Chain = Load.getValue(1);
-
-          // Call target must be on T9
-          Chain = CurDAG->getCopyToReg(Chain, dl, Mips::T9, Load, InFlag);
-        } else
-          /// Indirect call
-          Chain = CurDAG->getCopyToReg(Chain, dl, Mips::T9, Callee, InFlag);
-
-        // Map the JmpLink operands to JALR
-        SDVTList NodeTys = CurDAG->getVTList(MVT::Other, MVT::Glue);
-        SmallVector<SDValue, 8> Ops;
-        Ops.push_back(CurDAG->getRegister(Mips::T9, MVT::i32));
-
-        for (unsigned i = 2, e = LastOpNum+1; i != e; ++i)
-          Ops.push_back(Node->getOperand(i));
-        Ops.push_back(Chain);
-        Ops.push_back(Chain.getValue(1));
-
-        // Emit Jump and Link Register
-        SDNode *ResNode = CurDAG->getMachineNode(Mips::JALR, dl, NodeTys,
-                                  &Ops[0], Ops.size());
-
-        // Replace Chain and InFlag
-        ReplaceUses(SDValue(Node, 0), SDValue(ResNode, 0));
-        ReplaceUses(SDValue(Node, 1), SDValue(ResNode, 1));
-        return ResNode;
-      }
-    }
   }
 
   // Select the default instruction

Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=128830&r1=128829&r2=128830&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Mon Apr  4 12:11:07 2011
@@ -1201,12 +1201,34 @@
   // direct call is) turn it into a TargetGlobalAddress/TargetExternalSymbol
   // node so that legalize doesn't hack it.
   unsigned char OpFlag = IsPIC ? MipsII::MO_GOT_CALL : MipsII::MO_NO_FLAG;
-  if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee))
+  bool LoadSymAddr = false;
+
+  if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) {
     Callee = DAG.getTargetGlobalAddress(G->getGlobal(), dl,
-                                getPointerTy(), 0, OpFlag);
-  else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(Callee))
+                                        getPointerTy(), 0, OpFlag);
+    LoadSymAddr = true;
+  }
+  else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(Callee)) {
     Callee = DAG.getTargetExternalSymbol(S->getSymbol(),
                                 getPointerTy(), OpFlag);
+    LoadSymAddr = true;
+  }
+
+  // Create nodes that load address of callee and copy it to T9
+  if (IsPIC) {
+    if (LoadSymAddr) {
+      // load callee address
+      Callee = DAG.getLoad(MVT::i32, dl, Chain, Callee,
+                           MachinePointerInfo::getGOT(),
+                           false, false, 0);
+      Chain = Callee.getValue(1);
+    }
+
+    // copy to T9
+    Chain = DAG.getCopyToReg(Chain, dl, Mips::T9, Callee, SDValue(0, 0));
+    InFlag = Chain.getValue(1);
+    Callee = DAG.getRegister(Mips::T9, MVT::i32);
+  }
 
   // MipsJmpLink = #chain, #target_address, #opt_in_flags...
   //             = Chain, Callee, Reg#1, Reg#2, ...



From sabre at nondot.org  Mon Apr  4 12:17:57 2011
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 04 Apr 2011 17:17:57 -0000
Subject: [llvm-commits] [llvm] r128831 -
	/llvm/trunk/tools/macho-dump/macho-dump.cpp
Message-ID: <20110404171757.B4F522A6C12C@llvm.org>

Author: lattner
Date: Mon Apr  4 12:17:57 2011
New Revision: 128831

URL: http://llvm.org/viewvc/llvm-project?rev=128831&view=rev
Log:
silence an unused function warning.

Modified:
    llvm/trunk/tools/macho-dump/macho-dump.cpp

Modified: llvm/trunk/tools/macho-dump/macho-dump.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/macho-dump/macho-dump.cpp?rev=128831&r1=128830&r2=128831&view=diff
==============================================================================
--- llvm/trunk/tools/macho-dump/macho-dump.cpp (original)
+++ llvm/trunk/tools/macho-dump/macho-dump.cpp Mon Apr  4 12:17:57 2011
@@ -49,6 +49,7 @@
 
 ///
 
+#if 0
 static int DumpHeader(MachOObject &Obj) {
   // Read the header.
   const macho::Header &Hdr = Obj.getHeader();
@@ -67,6 +68,7 @@
 
   return 0;
 }
+#endif
 
 static void DumpSegmentCommandData(StringRef Name,
                                    uint64_t VMAddr, uint64_t VMSize,



From bruno.cardoso at gmail.com  Mon Apr  4 12:18:19 2011
From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes)
Date: Mon, 04 Apr 2011 17:18:19 -0000
Subject: [llvm-commits] [llvm] r128832 - in /llvm/trunk:
 lib/Target/ARM/ARMAddressingModes.h lib/Target/ARM/ARMInstrFormats.td
 lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/AsmParser/ARMAsmParser.cpp
 lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
 lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
 lib/Target/ARM/InstPrinter/ARMInstPrinter.h test/MC/ARM/arm_addrmode3.s
Message-ID: <20110404171819.6B84C2A6C12C@llvm.org>

Author: bruno
Date: Mon Apr  4 12:18:19 2011
New Revision: 128832

URL: http://llvm.org/viewvc/llvm-project?rev=128832&view=rev
Log:
- Implement asm parsing support for LDRSBT, LDRHT, LDRSHT and STRHT
  also fix the encoding of the later.
- Add a new encoding bit to describe the index mode used in AM3.
- Teach printAddrMode3Operand to check by the addressing mode which
  index mode to print.
- Testcases.

Added:
    llvm/trunk/test/MC/ARM/arm_addrmode3.s
Modified:
    llvm/trunk/lib/Target/ARM/ARMAddressingModes.h
    llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
    llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
    llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
    llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.h

Modified: llvm/trunk/lib/Target/ARM/ARMAddressingModes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAddressingModes.h?rev=128832&r1=128831&r2=128832&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMAddressingModes.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMAddressingModes.h Mon Apr  4 12:18:19 2011
@@ -409,7 +409,7 @@
   // The first operand is always a Reg.  The second operand is a reg if in
   // reg/reg form, otherwise it's reg#0.  The third field encodes the operation
   // in bit 12, the immediate in bits 0-11, and the shift op in 13-15. The
-  // forth operand 16-17 encodes the index mode.
+  // fourth operand 16-17 encodes the index mode.
   //
   // If this addressing mode is a frame index (before prolog/epilog insertion
   // and code rewriting), this operand will have the form:  FI#, reg0, <offs>
@@ -446,12 +446,14 @@
   //
   // The first operand is always a Reg.  The second operand is a reg if in
   // reg/reg form, otherwise it's reg#0.  The third field encodes the operation
-  // in bit 8, the immediate in bits 0-7.
+  // in bit 8, the immediate in bits 0-7. The fourth operand 9-10 encodes the
+  // index mode.
 
   /// getAM3Opc - This function encodes the addrmode3 opc field.
-  static inline unsigned getAM3Opc(AddrOpc Opc, unsigned char Offset) {
+  static inline unsigned getAM3Opc(AddrOpc Opc, unsigned char Offset,
+                                   unsigned IdxMode = 0) {
     bool isSub = Opc == sub;
-    return ((int)isSub << 8) | Offset;
+    return ((int)isSub << 8) | Offset | (IdxMode << 9);
   }
   static inline unsigned char getAM3Offset(unsigned AM3Opc) {
     return AM3Opc & 0xFF;
@@ -459,6 +461,9 @@
   static inline AddrOpc getAM3Op(unsigned AM3Opc) {
     return ((AM3Opc >> 8) & 1) ? sub : add;
   }
+  static inline unsigned getAM3IdxMode(unsigned AM3Opc) {
+    return (AM3Opc >> 9);
+  }
 
   //===--------------------------------------------------------------------===//
   // Addressing Mode #4

Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=128832&r1=128831&r2=128832&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Mon Apr  4 12:18:19 2011
@@ -577,6 +577,34 @@
   let Inst{15-12} = Rt;           // Rt
   let Inst{7-4}   = op;
 }
+
+// FIXME: Merge with the above class when addrmode2 gets used for LDR, LDRB
+// but for now use this class for LDRSBT, LDRHT, LDSHT.
+class AI3ldstidxT<bits<4> op, bit op20, bit isLd, bit isPre, dag oops, dag iops,
+                  IndexMode im, Format f, InstrItinClass itin, string opc,
+                  string asm, string cstr, list<dag> pattern>
+  : I<oops, iops, AddrMode3, Size4Bytes, im, f, itin,
+      opc, asm, cstr, pattern> {
+  // {13}     1 == imm8, 0 == Rm
+  // {12-9}   Rn
+  // {8}      isAdd
+  // {7-4}    imm7_4/zero
+  // {3-0}    imm3_0/Rm
+  bits<14> addr;
+  bits<4> Rt;
+  let Inst{27-25} = 0b000;
+  let Inst{24}    = isPre;        // P bit
+  let Inst{23}    = addr{8};      // U bit
+  let Inst{22}    = addr{13};     // 1 == imm8, 0 == Rm
+  let Inst{20}    = op20;         // L bit
+  let Inst{19-16} = addr{12-9};   // Rn
+  let Inst{15-12} = Rt;           // Rt
+  let Inst{11-8}  = addr{7-4};    // imm7_4/zero
+  let Inst{7-4}   = op;
+  let Inst{3-0}   = addr{3-0};    // imm3_0/Rm
+  let AsmMatchConverter = "CvtLdWriteBackRegAddrMode3";
+}
+
 class AI3stridx<bits<4> op, bit isByte, bit isPre, dag oops, dag iops,
                 IndexMode im, Format f, InstrItinClass itin, string opc,
                 string asm, string cstr, list<dag> pattern>
@@ -649,12 +677,25 @@
                string opc, string asm, string cstr, list<dag> pattern>
   : I<oops, iops, AddrMode3, Size4Bytes, IndexModePost, f, itin,
       opc, asm, cstr,pattern> {
+  // {13}     1 == imm8, 0 == Rm
+  // {12-9}   Rn
+  // {8}      isAdd
+  // {7-4}    imm7_4/zero
+  // {3-0}    imm3_0/Rm
+  bits<14> addr;
+  bits<4> Rt;
+  let Inst{3-0}   = addr{3-0};    // imm3_0/Rm
   let Inst{4}     = 1;
   let Inst{5}     = 1; // H bit
   let Inst{6}     = 0; // S bit
   let Inst{7}     = 1;
+  let Inst{11-8}  = addr{7-4};    // imm7_4/zero
+  let Inst{15-12} = Rt;           // Rt
+  let Inst{19-16} = addr{12-9};   // Rn
   let Inst{20}    = 0; // L bit
   let Inst{21}    = 0; // W bit
+  let Inst{22}    = addr{13};     // 1 == imm8, 0 == Rm
+  let Inst{23}    = addr{8};      // U bit
   let Inst{24}    = 0; // P bit
   let Inst{27-25} = 0b000;
 }

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=128832&r1=128831&r2=128832&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Mon Apr  4 12:18:19 2011
@@ -475,6 +475,17 @@
 
 // Define ARM specific addressing modes.
 
+def MemMode2AsmOperand : AsmOperandClass {
+  let Name = "MemMode2";
+  let SuperClasses = [];
+  let ParserMethod = "tryParseMemMode2Operand";
+}
+
+def MemMode3AsmOperand : AsmOperandClass {
+  let Name = "MemMode3";
+  let SuperClasses = [];
+  let ParserMethod = "tryParseMemMode3Operand";
+}
 
 // addrmode_imm12 := reg +/- imm12
 //
@@ -498,12 +509,6 @@
   let MIOperandInfo = (ops GPR:$base, GPR:$offsreg, i32imm:$offsimm);
 }
 
-def MemMode2AsmOperand : AsmOperandClass {
-  let Name = "MemMode2";
-  let SuperClasses = [];
-  let ParserMethod = "tryParseMemMode2Operand";
-}
-
 // addrmode2 := reg +/- imm12
 //           := reg +/- reg shop imm
 //
@@ -530,6 +535,7 @@
                 ComplexPattern<i32, 3, "SelectAddrMode3", []> {
   let EncoderMethod = "getAddrMode3OpValue";
   let PrintMethod = "printAddrMode3Operand";
+  let ParserMatchClass = MemMode3AsmOperand;
   let MIOperandInfo = (ops GPR:$base, GPR:$offsreg, i32imm:$offsimm);
 }
 
@@ -1763,22 +1769,19 @@
   let Inst{11-0} = addr{11-0};
   let AsmMatchConverter = "CvtLdWriteBackRegAddrMode2";
 }
-def LDRSBT : AI3ldstidx<0b1101, 1, 1, 0, (outs GPR:$dst, GPR:$base_wb),
-                 (ins GPR:$base, am3offset:$offset), IndexModePost,
-                 LdMiscFrm, IIC_iLoad_bh_ru,
-                 "ldrsbt", "\t$dst, [$base], $offset", "$base = $base_wb", []> {
+def LDRSBT : AI3ldstidxT<0b1101, 1, 1, 0, (outs GPR:$Rt, GPR:$base_wb),
+             (ins addrmode3:$addr), IndexModePost, LdMiscFrm, IIC_iLoad_bh_ru,
+             "ldrsbt", "\t$Rt, $addr", "$addr.base = $base_wb", []> {
   let Inst{21} = 1; // overwrite
 }
-def LDRHT : AI3ldstidx<0b1011, 1, 1, 0, (outs GPR:$dst, GPR:$base_wb),
-                 (ins GPR:$base, am3offset:$offset), IndexModePost,
-                 LdMiscFrm, IIC_iLoad_bh_ru,
-                 "ldrht", "\t$dst, [$base], $offset", "$base = $base_wb", []> {
+def LDRHT  : AI3ldstidxT<0b1011, 1, 1, 0, (outs GPR:$Rt, GPR:$base_wb),
+             (ins addrmode3:$addr), IndexModePost, LdMiscFrm, IIC_iLoad_bh_ru,
+             "ldrht", "\t$Rt, $addr", "$addr.base = $base_wb", []> {
   let Inst{21} = 1; // overwrite
 }
-def LDRSHT : AI3ldstidx<0b1111, 1, 1, 0, (outs GPR:$dst, GPR:$base_wb),
-                 (ins GPR:$base, am3offset:$offset), IndexModePost,
-                 LdMiscFrm, IIC_iLoad_bh_ru,
-                 "ldrsht", "\t$dst, [$base], $offset", "$base = $base_wb", []> {
+def LDRSHT : AI3ldstidxT<0b1111, 1, 1, 0, (outs GPR:$Rt, GPR:$base_wb),
+             (ins addrmode3:$addr), IndexModePost, LdMiscFrm, IIC_iLoad_bh_ru,
+             "ldrsht", "\t$Rt, $addr", "$addr.base = $base_wb", []> {
   let Inst{21} = 1; // overwrite
 }
 }
@@ -1870,12 +1873,12 @@
   let AsmMatchConverter = "CvtStWriteBackRegAddrMode2";
 }
 
-def STRHT: AI3sthpo<(outs GPR:$base_wb),
-                    (ins GPR:$src, GPR:$base,am3offset:$offset),
+def STRHT: AI3sthpo<(outs GPR:$base_wb), (ins GPR:$Rt, addrmode3:$addr),
                     StMiscFrm, IIC_iStore_bh_ru,
-                    "strht", "\t$src, [$base], $offset", "$base = $base_wb",
+                    "strht", "\t$Rt, $addr", "$addr.base = $base_wb",
                     [/* For disassembly only; pattern left blank */]> {
   let Inst{21} = 1; // overwrite
+  let AsmMatchConverter = "CvtStWriteBackRegAddrMode3";
 }
 
 //===----------------------------------------------------------------------===//

Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp?rev=128832&r1=128831&r2=128832&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Mon Apr  4 12:18:19 2011
@@ -98,12 +98,18 @@
     SmallVectorImpl<MCParsedAsmOperand*>&);
   OperandMatchResultTy tryParseMemMode2Operand(
     SmallVectorImpl<MCParsedAsmOperand*>&);
+  OperandMatchResultTy tryParseMemMode3Operand(
+    SmallVectorImpl<MCParsedAsmOperand*>&);
 
   // Asm Match Converter Methods
   bool CvtLdWriteBackRegAddrMode2(MCInst &Inst, unsigned Opcode,
                                   const SmallVectorImpl<MCParsedAsmOperand*> &);
   bool CvtStWriteBackRegAddrMode2(MCInst &Inst, unsigned Opcode,
                                   const SmallVectorImpl<MCParsedAsmOperand*> &);
+  bool CvtLdWriteBackRegAddrMode3(MCInst &Inst, unsigned Opcode,
+                                  const SmallVectorImpl<MCParsedAsmOperand*> &);
+  bool CvtStWriteBackRegAddrMode3(MCInst &Inst, unsigned Opcode,
+                                  const SmallVectorImpl<MCParsedAsmOperand*> &);
 
 public:
   ARMAsmParser(const Target &T, MCAsmParser &_Parser, TargetMachine &_TM)
@@ -371,6 +377,30 @@
 
     return true;
   }
+  bool isMemMode3() const {
+    if (getMemAddrMode() != ARMII::AddrMode3)
+      return false;
+
+    if (getMemOffsetIsReg()) {
+      if (getMemOffsetRegShifted())
+        return false; // No shift with offset reg allowed
+      return true;
+    }
+
+    if (getMemNegative() &&
+        !(getMemPostindexed() || getMemPreindexed()))
+      return false;
+
+    const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getMemOffset());
+    if (!CE) return false;
+    int64_t Value = CE->getValue();
+
+    // The offset must be in the range 0-255 (imm8).
+    if (Value > 255 || Value < -255)
+      return false;
+
+    return true;
+  }
   bool isMemMode5() const {
     if (!isMemory() || getMemOffsetIsReg() || getMemWriteback() ||
         getMemNegative())
@@ -539,6 +569,37 @@
                                           -Offset, ARM_AM::no_shift, IdxMode)));
   }
 
+  void addMemMode3Operands(MCInst &Inst, unsigned N) const {
+    assert(isMemMode3() && "Invalid mode or number of operands!");
+    Inst.addOperand(MCOperand::CreateReg(getMemBaseRegNum()));
+    unsigned IdxMode = (getMemPreindexed() | getMemPostindexed() << 1);
+
+    if (getMemOffsetIsReg()) {
+      Inst.addOperand(MCOperand::CreateReg(getMemOffsetRegNum()));
+
+      ARM_AM::AddrOpc AMOpc = getMemNegative() ? ARM_AM::sub : ARM_AM::add;
+      Inst.addOperand(MCOperand::CreateImm(ARM_AM::getAM3Opc(AMOpc, 0,
+                                                             IdxMode)));
+      return;
+    }
+
+    // Create a operand placeholder to always yield the same number of operands.
+    Inst.addOperand(MCOperand::CreateReg(0));
+
+    // FIXME: #-0 is encoded differently than #0. Does the parser preserve
+    // the difference?
+    const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getMemOffset());
+    assert(CE && "Non-constant mode 3 offset operand!");
+    int64_t Offset = CE->getValue();
+
+    if (Offset >= 0)
+      Inst.addOperand(MCOperand::CreateImm(ARM_AM::getAM3Opc(ARM_AM::add,
+                                           Offset, IdxMode)));
+    else
+      Inst.addOperand(MCOperand::CreateImm(ARM_AM::getAM3Opc(ARM_AM::sub,
+                                           -Offset, IdxMode)));
+  }
+
   void addMemMode5Operands(MCInst &Inst, unsigned N) const {
     assert(N == 2 && isMemMode5() && "Invalid number of operands!");
 
@@ -1219,6 +1280,17 @@
   return MatchOperand_Success;
 }
 
+/// tryParseMemMode3Operand - Try to parse memory addressing mode 3 operand.
+ARMAsmParser::OperandMatchResultTy ARMAsmParser::
+tryParseMemMode3Operand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
+  assert(Parser.getTok().is(AsmToken::LBrac) && "Token is not a \"[\"");
+
+  if (ParseMemory(Operands, ARMII::AddrMode3))
+    return MatchOperand_NoMatch;
+
+  return MatchOperand_Success;
+}
+
 /// CvtLdWriteBackRegAddrMode2 - Convert parsed operands to MCInst.
 /// Needed here because the Asm Gen Matcher can't handle properly tied operands
 /// when they refer multiple MIOperands inside a single one.
@@ -1249,6 +1321,36 @@
   return true;
 }
 
+/// CvtLdWriteBackRegAddrMode3 - Convert parsed operands to MCInst.
+/// Needed here because the Asm Gen Matcher can't handle properly tied operands
+/// when they refer multiple MIOperands inside a single one.
+bool ARMAsmParser::
+CvtLdWriteBackRegAddrMode3(MCInst &Inst, unsigned Opcode,
+                         const SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
+  ((ARMOperand*)Operands[2])->addRegOperands(Inst, 1);
+
+  // Create a writeback register dummy placeholder.
+  Inst.addOperand(MCOperand::CreateImm(0));
+
+  ((ARMOperand*)Operands[3])->addMemMode3Operands(Inst, 3);
+  ((ARMOperand*)Operands[1])->addCondCodeOperands(Inst, 2);
+  return true;
+}
+
+/// CvtStWriteBackRegAddrMode3 - Convert parsed operands to MCInst.
+/// Needed here because the Asm Gen Matcher can't handle properly tied operands
+/// when they refer multiple MIOperands inside a single one.
+bool ARMAsmParser::
+CvtStWriteBackRegAddrMode3(MCInst &Inst, unsigned Opcode,
+                         const SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
+  // Create a writeback register dummy placeholder.
+  Inst.addOperand(MCOperand::CreateImm(0));
+  ((ARMOperand*)Operands[2])->addRegOperands(Inst, 1);
+  ((ARMOperand*)Operands[3])->addMemMode3Operands(Inst, 3);
+  ((ARMOperand*)Operands[1])->addCondCodeOperands(Inst, 2);
+  return true;
+}
+
 /// Parse an ARM memory expression, return false if successful else return true
 /// or an error.  The first token must be a '[' when called.
 ///
@@ -1310,6 +1412,10 @@
 
     const AsmToken &ExclaimTok = Parser.getTok();
     if (ExclaimTok.is(AsmToken::Exclaim)) {
+      // None of addrmode3 instruction uses "!"
+      if (AddrMode == ARMII::AddrMode3)
+        return true;
+
       WBOp = ARMOperand::CreateToken(ExclaimTok.getString(),
                                      ExclaimTok.getLoc());
       Writeback = true;
@@ -1350,6 +1456,11 @@
   if (!OffsetIsReg) {
     if (!Offset)
       Offset = MCConstantExpr::Create(0, getContext());
+  } else {
+    if (AddrMode == ARMII::AddrMode3 && OffsetRegShifted) {
+      Error(E, "shift amount not supported");
+      return true;
+    }
   }
 
   Operands.push_back(ARMOperand::CreateMem(AddrMode, BaseRegNum, OffsetIsReg,

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp?rev=128832&r1=128831&r2=128832&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp Mon Apr  4 12:18:19 2011
@@ -1237,19 +1237,22 @@
          "Expect 1 reg operand followed by 1 imm operand");
 
   ARM_AM::AddrOpc AddrOpcode = getUBit(insn) ? ARM_AM::add : ARM_AM::sub;
+  unsigned IndexMode =
+                  (TID.TSFlags & ARMII::IndexModeMask) >> ARMII::IndexModeShift;
   if (getAM3IBit(insn) == 1) {
     MI.addOperand(MCOperand::CreateReg(0));
 
     // Disassemble the 8-bit immediate offset.
     unsigned Imm4H = (insn >> ARMII::ImmHiShift) & 0xF;
     unsigned Imm4L = insn & 0xF;
-    unsigned Offset = ARM_AM::getAM3Opc(AddrOpcode, (Imm4H << 4) | Imm4L);
+    unsigned Offset = ARM_AM::getAM3Opc(AddrOpcode, (Imm4H << 4) | Imm4L,
+                                        IndexMode);
     MI.addOperand(MCOperand::CreateImm(Offset));
   } else {
     // Disassemble the offset reg (Rm).
     MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRm(insn))));
-    unsigned Offset = ARM_AM::getAM3Opc(AddrOpcode, 0);
+    unsigned Offset = ARM_AM::getAM3Opc(AddrOpcode, 0, IndexMode);
     MI.addOperand(MCOperand::CreateImm(Offset));
   }
   OpIdx += 2;

Modified: llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp?rev=128832&r1=128831&r2=128832&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp Mon Apr  4 12:18:19 2011
@@ -181,6 +181,10 @@
   }
 }
 
+//===--------------------------------------------------------------------===//
+// Addressing Mode #2
+//===--------------------------------------------------------------------===//
+
 void ARMInstPrinter::printAM2PreOrOffsetIndexOp(const MCInst *MI, unsigned Op,
                                                 raw_ostream &O) {
   const MCOperand &MO1 = MI->getOperand(Op);
@@ -276,11 +280,35 @@
     << " #" << ShImm;
 }
 
-void ARMInstPrinter::printAddrMode3Operand(const MCInst *MI, unsigned OpNum,
-                                           raw_ostream &O) {
-  const MCOperand &MO1 = MI->getOperand(OpNum);
-  const MCOperand &MO2 = MI->getOperand(OpNum+1);
-  const MCOperand &MO3 = MI->getOperand(OpNum+2);
+//===--------------------------------------------------------------------===//
+// Addressing Mode #3
+//===--------------------------------------------------------------------===//
+
+void ARMInstPrinter::printAM3PostIndexOp(const MCInst *MI, unsigned Op,
+                                         raw_ostream &O) {
+  const MCOperand &MO1 = MI->getOperand(Op);
+  const MCOperand &MO2 = MI->getOperand(Op+1);
+  const MCOperand &MO3 = MI->getOperand(Op+2);
+
+  O << "[" << getRegisterName(MO1.getReg()) << "], ";
+
+  if (MO2.getReg()) {
+    O << (char)ARM_AM::getAM3Op(MO3.getImm())
+    << getRegisterName(MO2.getReg());
+    return;
+  }
+
+  unsigned ImmOffs = ARM_AM::getAM3Offset(MO3.getImm());
+  O << '#'
+    << ARM_AM::getAddrOpcStr(ARM_AM::getAM3Op(MO3.getImm()))
+    << ImmOffs;
+}
+
+void ARMInstPrinter::printAM3PreOrOffsetIndexOp(const MCInst *MI, unsigned Op,
+                                                raw_ostream &O) {
+  const MCOperand &MO1 = MI->getOperand(Op);
+  const MCOperand &MO2 = MI->getOperand(Op+1);
+  const MCOperand &MO3 = MI->getOperand(Op+2);
 
   O << '[' << getRegisterName(MO1.getReg());
 
@@ -297,6 +325,18 @@
   O << ']';
 }
 
+void ARMInstPrinter::printAddrMode3Operand(const MCInst *MI, unsigned Op,
+                                           raw_ostream &O) {
+  const MCOperand &MO3 = MI->getOperand(Op+2);
+  unsigned IdxMode = ARM_AM::getAM3IdxMode(MO3.getImm());
+
+  if (IdxMode == ARMII::IndexModePost) {
+    printAM3PostIndexOp(MI, Op, O);
+    return;
+  }
+  printAM3PreOrOffsetIndexOp(MI, Op, O);
+}
+
 void ARMInstPrinter::printAddrMode3OffsetOperand(const MCInst *MI,
                                                  unsigned OpNum,
                                                  raw_ostream &O) {

Modified: llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.h?rev=128832&r1=128831&r2=128832&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.h (original)
+++ llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.h Mon Apr  4 12:18:19 2011
@@ -49,9 +49,14 @@
                                   raw_ostream &O);
   void printAddrMode2OffsetOperand(const MCInst *MI, unsigned OpNum,
                                    raw_ostream &O);
+
   void printAddrMode3Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
+  void printAM3PostIndexOp(const MCInst *MI, unsigned OpNum, raw_ostream &O);
+  void printAM3PreOrOffsetIndexOp(const MCInst *MI, unsigned OpNum,
+                                  raw_ostream &O);
   void printAddrMode3OffsetOperand(const MCInst *MI, unsigned OpNum,
                                    raw_ostream &O);
+
   void printLdStmModeOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
   void printAddrMode5Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
   void printAddrMode6Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O);

Added: llvm/trunk/test/MC/ARM/arm_addrmode3.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/arm_addrmode3.s?rev=128832&view=auto
==============================================================================
--- llvm/trunk/test/MC/ARM/arm_addrmode3.s (added)
+++ llvm/trunk/test/MC/ARM/arm_addrmode3.s Mon Apr  4 12:18:19 2011
@@ -0,0 +1,18 @@
+@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding %s | FileCheck %s
+
+@ CHECK: ldrsbt  r1, [r0], +r2 @ encoding: [0xd2,0x10,0xb0,0xe0]
+@ CHECK: ldrsbt  r1, [r0], #4 @ encoding: [0xd4,0x10,0xf0,0xe0]
+@ CHECK: ldrsht  r1, [r0], +r2 @ encoding: [0xf2,0x10,0xb0,0xe0]
+@ CHECK: ldrsht  r1, [r0], #4 @ encoding: [0xf4,0x10,0xf0,0xe0]
+@ CHECK: ldrht  r1, [r0], +r2 @ encoding: [0xb2,0x10,0xb0,0xe0]
+@ CHECK: ldrht  r1, [r0], #4 @ encoding: [0xb4,0x10,0xf0,0xe0]
+@ CHECK: strht  r1, [r0], +r2 @ encoding: [0xb2,0x10,0xa0,0xe0]
+@ CHECK: strht  r1, [r0], #4 @ encoding: [0xb4,0x10,0xe0,0xe0]
+        ldrsbt  r1, [r0], r2
+        ldrsbt  r1, [r0], #4
+        ldrsht  r1, [r0], r2
+        ldrsht  r1, [r0], #4
+        ldrht  r1, [r0], r2
+        ldrht  r1, [r0], #4
+        strht  r1, [r0], r2
+        strht  r1, [r0], #4



From echristo at apple.com  Mon Apr  4 12:36:11 2011
From: echristo at apple.com (Eric Christopher)
Date: Mon, 04 Apr 2011 17:36:11 -0000
Subject: [llvm-commits] [llvm] r128834 -
	/llvm/trunk/tools/macho-dump/macho-dump.cpp
Message-ID: <20110404173611.566A62A6C12C@llvm.org>

Author: echristo
Date: Mon Apr  4 12:36:11 2011
New Revision: 128834

URL: http://llvm.org/viewvc/llvm-project?rev=128834&view=rev
Log:
Remove unused function.

Modified:
    llvm/trunk/tools/macho-dump/macho-dump.cpp

Modified: llvm/trunk/tools/macho-dump/macho-dump.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/macho-dump/macho-dump.cpp?rev=128834&r1=128833&r2=128834&view=diff
==============================================================================
--- llvm/trunk/tools/macho-dump/macho-dump.cpp (original)
+++ llvm/trunk/tools/macho-dump/macho-dump.cpp Mon Apr  4 12:36:11 2011
@@ -49,27 +49,6 @@
 
 ///
 
-#if 0
-static int DumpHeader(MachOObject &Obj) {
-  // Read the header.
-  const macho::Header &Hdr = Obj.getHeader();
-  outs() << "('cputype', " << Hdr.CPUType << ")\n";
-  outs() << "('cpusubtype', " << Hdr.CPUSubtype << ")\n";
-  outs() << "('filetype', " << Hdr.FileType << ")\n";
-  outs() << "('num_load_commands', " << Hdr.NumLoadCommands << ")\n";
-  outs() << "('load_commands_size', " << Hdr.SizeOfLoadCommands << ")\n";
-  outs() << "('flag', " << Hdr.Flags << ")\n";
-
-  // Print extended header if 64-bit.
-  if (Obj.is64Bit()) {
-    const macho::Header64Ext &Hdr64 = Obj.getHeader64Ext();
-    outs() << "('reserved', " << Hdr64.Reserved << ")\n";
-  }
-
-  return 0;
-}
-#endif
-
 static void DumpSegmentCommandData(StringRef Name,
                                    uint64_t VMAddr, uint64_t VMSize,
                                    uint64_t FileOffset, uint64_t FileSize,



From echristo at apple.com  Mon Apr  4 12:41:04 2011
From: echristo at apple.com (Eric Christopher)
Date: Mon, 04 Apr 2011 10:41:04 -0700
Subject: [llvm-commits] [llvm] r128831 -
 /llvm/trunk/tools/macho-dump/macho-dump.cpp
In-Reply-To: <20110404171757.B4F522A6C12C@llvm.org>
References: <20110404171757.B4F522A6C12C@llvm.org>
Message-ID: <83413884-FCB3-4907-AA69-5C39448CC62B@apple.com>


On Apr 4, 2011, at 10:17 AM, Chris Lattner wrote:

> Author: lattner
> Date: Mon Apr  4 12:17:57 2011
> New Revision: 128831
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=128831&view=rev
> Log:
> silence an unused function warning.

Thanks :)

I've removed the function in r128834.

-eric

From echristo at apple.com  Mon Apr  4 12:41:37 2011
From: echristo at apple.com (Eric Christopher)
Date: Mon, 04 Apr 2011 10:41:37 -0700
Subject: [llvm-commits] [llvm] r128801 - in /llvm/trunk:
 include/llvm/Object/MachOObject.h lib/Object/MachOObject.cpp
 tools/macho-dump/macho-dump.cpp
In-Reply-To: <BANLkTinHMAcd5--sgJuQYVXXwGLXMKRVOw@mail.gmail.com>
References: <20110403235148.145CA2A6C12C@llvm.org>
	<BANLkTinHMAcd5--sgJuQYVXXwGLXMKRVOw@mail.gmail.com>
Message-ID: <83CA3D7A-4984-4542-9E17-FAEA492DA9DB@apple.com>


On Apr 4, 2011, at 2:27 AM, Frits van Bommel wrote:

> On Mon, Apr 4, 2011 at 1:51 AM, Eric Christopher <echristo at apple.com> wrote:
>> -  if (int Res = DumpHeader(*InputObject))
>> -    return Res;
> 
> This was the only use of that static function:
> 
> ../trunk/tools/macho-dump/macho-dump.cpp:52:12: warning: unused
> function 'DumpHeader' [-Wunused-function]
> static int DumpHeader(MachOObject &Obj) {
>           ^
> 1 warning generated.

Sorry about that. Fixed in r128834.

-eric

From stoklund at 2pi.dk  Mon Apr  4 12:57:26 2011
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Mon, 04 Apr 2011 17:57:26 -0000
Subject: [llvm-commits] [llvm] r128835 -
	/llvm/trunk/test/CodeGen/PowerPC/Atomics-64.ll
Message-ID: <20110404175726.CAB492A6C12C@llvm.org>

Author: stoklund
Date: Mon Apr  4 12:57:26 2011
New Revision: 128835

URL: http://llvm.org/viewvc/llvm-project?rev=128835&view=rev
Log:
Disable the PowerPC/Atomics-64 test.

The code inserted by PPCTargetLowering::EmitInstrWithCustomInserter for ppc64 is
wrong, and I don't know how to fix it. It seems to be using the correct register
classes for pointers, but it inserts all 32-bit instructions.

Modified:
    llvm/trunk/test/CodeGen/PowerPC/Atomics-64.ll

Modified: llvm/trunk/test/CodeGen/PowerPC/Atomics-64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/Atomics-64.ll?rev=128835&r1=128834&r2=128835&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/Atomics-64.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/Atomics-64.ll Mon Apr  4 12:57:26 2011
@@ -1,5 +1,11 @@
-; RUN: llc < %s -march=ppc64
-; ModuleID = 'Atomics.c'
+; RUN: llc < %s -march=ppc64 -verify-machineinstrs
+;
+; This test is disabled until PPCISelLowering learns to insert proper 64-bit
+; code for ATOMIC_CMP_SWAP. Currently, it is inserting 32-bit instructions with
+; 64-bit operands which causes the machine code verifier to throw a tantrum.
+;
+; XFAIL: *
+
 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
 target triple = "powerpc64-apple-darwin9"
 @sc = common global i8 0		; <i8*> [#uses=52]



From stoklund at 2pi.dk  Mon Apr  4 12:57:29 2011
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Mon, 04 Apr 2011 17:57:29 -0000
Subject: [llvm-commits] [llvm] r128836 -
	/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
Message-ID: <20110404175729.8DB192A6C12D@llvm.org>

Author: stoklund
Date: Mon Apr  4 12:57:29 2011
New Revision: 128836

URL: http://llvm.org/viewvc/llvm-project?rev=128836&view=rev
Log:
Insert code in the right location when lowering PowerPC atomics.

This causes defs to dominate uses, no instructions after terminators, and other
goodness.

Modified:
    llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp

Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=128836&r1=128835&r2=128836&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Mon Apr  4 12:57:29 2011
@@ -4687,7 +4687,8 @@
   //  exitMBB:
   //   ...
   BB = exitMBB;
-  BuildMI(BB, dl, TII->get(PPC::SRW), dest).addReg(TmpDestReg).addReg(ShiftReg);
+  BuildMI(*BB, BB->begin(), dl, TII->get(PPC::SRW), dest).addReg(TmpDestReg)
+    .addReg(ShiftReg);
   return BB;
 }
 
@@ -5036,7 +5037,8 @@
     //  exitMBB:
     //   ...
     BB = exitMBB;
-    BuildMI(BB, dl, TII->get(PPC::SRW),dest).addReg(TmpReg).addReg(ShiftReg);
+    BuildMI(*BB, BB->begin(), dl, TII->get(PPC::SRW),dest).addReg(TmpReg)
+      .addReg(ShiftReg);
   } else {
     llvm_unreachable("Unexpected instr type to insert");
   }



From dpatel at apple.com  Mon Apr  4 14:51:17 2011
From: dpatel at apple.com (Devang Patel)
Date: Mon, 04 Apr 2011 19:51:17 -0000
Subject: [llvm-commits] [llvm] r128839 - /llvm/trunk/tools/opt/opt.cpp
Message-ID: <20110404195117.56EC22A6C12C@llvm.org>

Author: dpatel
Date: Mon Apr  4 14:51:17 2011
New Revision: 128839

URL: http://llvm.org/viewvc/llvm-project?rev=128839&view=rev
Log:
Update BreakpointPrinter to emit original function names only. 

Modified:
    llvm/trunk/tools/opt/opt.cpp

Modified: llvm/trunk/tools/opt/opt.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/opt/opt.cpp?rev=128839&r1=128838&r2=128839&view=diff
==============================================================================
--- llvm/trunk/tools/opt/opt.cpp (original)
+++ llvm/trunk/tools/opt/opt.cpp Mon Apr  4 14:51:17 2011
@@ -26,6 +26,7 @@
 #include "llvm/Target/TargetData.h"
 #include "llvm/Target/TargetLibraryInfo.h"
 #include "llvm/Target/TargetMachine.h"
+#include "llvm/ADT/StringSet.h"
 #include "llvm/ADT/Triple.h"
 #include "llvm/Support/PassNameParser.h"
 #include "llvm/Support/Signals.h"
@@ -342,28 +343,43 @@
 
 char BasicBlockPassPrinter::ID = 0;
 
-struct BreakpointPrinter : public FunctionPass {
+struct BreakpointPrinter : public ModulePass {
   raw_ostream &Out;
   static char ID;
 
   BreakpointPrinter(raw_ostream &out)
-    : FunctionPass(ID), Out(out) {
+    : ModulePass(ID), Out(out) {
     }
 
-  virtual bool runOnFunction(Function &F) {
-    BasicBlock &EntryBB = F.getEntryBlock();
-    BasicBlock::const_iterator BI = EntryBB.end();
-    --BI;
-    do {
-      const Instruction *In = BI;
-      const DebugLoc DL = In->getDebugLoc();
-      if (!DL.isUnknown()) {
-        DIScope S(DL.getScope(getGlobalContext()));
-        Out << S.getFilename() << " " << DL.getLine() << "\n";
-        break;
+  void getContextName(DIDescriptor Context, std::string &N) {
+    if (Context.isNameSpace()) {
+      DINameSpace NS(Context);
+      if (!NS.getName().empty()) {
+        getContextName(NS.getContext(), N);
+        N = N + NS.getName().str() + "::";
+      }
+    } else if (Context.isType()) {
+      DIType TY(Context);
+      if (!TY.getName().empty()) {
+        getContextName(TY.getContext(), N);
+        N = N + TY.getName().str() + "::";
+      }
+    }
+  }
+
+  virtual bool runOnModule(Module &M) {
+    StringSet<> Processed;
+    if (NamedMDNode *NMD = M.getNamedMetadata("llvm.dbg.sp"))
+      for (unsigned i = 0, e = NMD->getNumOperands(); i != e; ++i) {
+        std::string Name;
+        DISubprogram SP(NMD->getOperand(i));
+        if (SP.Verify())
+          getContextName(SP.getContext(), Name);
+        Name = Name + SP.getDisplayName().str();
+        if (!Name.empty() && Processed.insert(Name)) {
+          Out << Name << "\n";
+        }
       }
-      --BI;
-    } while (BI != EntryBB.begin());
     return false;
   }
 



From nadav.rotem at intel.com  Mon Apr  4 15:06:18 2011
From: nadav.rotem at intel.com (Rotem, Nadav)
Date: Mon, 4 Apr 2011 23:06:18 +0300
Subject: [llvm-commits] [patch] Instcombine bug - transforms GEP/Bitcast on
 different address spaces
Message-ID: <6594DDFF12B03D4E89690887C248699402787A62CF@hasmsx504.ger.corp.intel.com>

Hi,

Please review the attached patch.

The attached patch fixes a bug in InstCombine. The pass optimizes gep(bitcast ) even when the bitcasts casts away address space info. We crash with an assert in this case.

The attached patch checks that the address space of the bitcasted pointer is the same as the gep ptr.

Nadav
---------------------------------------------------------------------
Intel Israel (74) Limited

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by others is strictly prohibited. If you are not the intended
recipient, please contact the sender and delete all copies.
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From johnny.chen at apple.com  Mon Apr  4 15:35:31 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Mon, 04 Apr 2011 20:35:31 -0000
Subject: [llvm-commits] [llvm] r128841 - in /llvm/trunk:
 lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
 test/MC/Disassembler/ARM/neon-tests.txt
Message-ID: <20110404203531.CD5492A6C12C@llvm.org>

Author: johnny
Date: Mon Apr  4 15:35:31 2011
New Revision: 128841

URL: http://llvm.org/viewvc/llvm-project?rev=128841&view=rev
Log:
Fix incorrect alignment for NEON VST2b32_UPD.

rdar://problem/9225433

Modified:
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
    llvm/trunk/test/MC/Disassembler/ARM/neon-tests.txt

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp?rev=128841&r1=128840&r2=128841&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp Mon Apr  4 15:35:31 2011
@@ -2167,7 +2167,7 @@
 // Correctly set VLD*/VST*'s TIED_TO GPR, as the asm printer needs it.
 static bool DisassembleNLdSt0(MCInst &MI, unsigned Opcode, uint32_t insn,
     unsigned short NumOps, unsigned &NumOpsAdded, bool Store, bool DblSpaced,
-    BO B) {
+    unsigned alignment, BO B) {
 
   const TargetInstrDesc &TID = ARMInsts[Opcode];
   const TargetOperandInfo *OpInfo = TID.OpInfo;
@@ -2211,9 +2211,10 @@
 
     assert((OpIdx+1) < NumOps && OpInfo[OpIdx].RegClass == ARM::GPRRegClassID &&
            OpInfo[OpIdx + 1].RegClass < 0 && "Addrmode #6 Operands expected");
+    // addrmode6 := (ops GPR:$addr, i32imm)
     MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        Rn)));
-    MI.addOperand(MCOperand::CreateImm(0)); // Alignment ignored?
+    MI.addOperand(MCOperand::CreateImm(alignment)); // Alignment
     OpIdx += 2;
 
     if (WB) {
@@ -2261,9 +2262,10 @@
 
     assert((OpIdx+1) < NumOps && OpInfo[OpIdx].RegClass == ARM::GPRRegClassID &&
            OpInfo[OpIdx + 1].RegClass < 0 && "Addrmode #6 Operands expected");
+    // addrmode6 := (ops GPR:$addr, i32imm)
     MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        Rn)));
-    MI.addOperand(MCOperand::CreateImm(0)); // Alignment ignored?
+    MI.addOperand(MCOperand::CreateImm(alignment)); // Alignment
     OpIdx += 2;
 
     if (WB) {
@@ -2294,6 +2296,92 @@
   return true;
 }
 
+// A8.6.308, A8.6.311, A8.6.314, A8.6.317.
+static bool Align4OneLaneInst(unsigned elem, unsigned size,
+    unsigned index_align, unsigned & alignment) {
+  unsigned bits = 0;
+  switch (elem) {
+  default:
+    return false;
+  case 1:
+    // A8.6.308
+    if (size == 0)
+      return slice(index_align, 0, 0) == 0;
+    else if (size == 1) {
+      bits = slice(index_align, 1, 0);
+      if (bits != 0 && bits != 1)
+        return false;
+      if (bits == 1)
+        alignment = 16;
+      return true;
+    } else if (size == 2) {
+      bits = slice(index_align, 2, 0);
+      if (bits != 0 && bits != 3)
+        return false;
+      if (bits == 3)
+        alignment = 32;
+      return true;;
+    }
+    return true;
+  case 2:
+    // A8.6.311
+    if (size == 0) {
+      if (slice(index_align, 0, 0) == 1)
+        alignment = 16;
+      return true;
+    } if (size == 1) {
+      if (slice(index_align, 0, 0) == 1)
+        alignment = 32;
+      return true;
+    } else if (size == 2) {
+      if (slice(index_align, 1, 1) != 0)
+        return false;
+      if (slice(index_align, 0, 0) == 1)
+        alignment = 64;
+      return true;;
+    }
+    return true;
+  case 3:
+    // A8.6.314
+    if (size == 0) {
+      if (slice(index_align, 0, 0) != 0)
+        return false;
+      return true;
+    } if (size == 1) {
+      if (slice(index_align, 0, 0) != 0)
+        return false;
+      return true;
+      return true;
+    } else if (size == 2) {
+      if (slice(index_align, 1, 0) != 0)
+        return false;
+      return true;;
+    }
+    return true;
+  case 4:
+    // A8.6.317
+    if (size == 0) {
+      if (slice(index_align, 0, 0) == 1)
+        alignment = 32;
+      return true;
+    } if (size == 1) {
+      if (slice(index_align, 0, 0) == 1)
+        alignment = 64;
+      return true;
+    } else if (size == 2) {
+      bits = slice(index_align, 1, 0);
+      if (bits == 3)
+        return false;
+      if (bits == 1)
+        alignment = 64;
+      else if (bits == 2)
+        alignment = 128;
+      return true;;
+    }
+    return true;
+  }
+}
+
 // A7.7
 // If L (Inst{21}) == 0, store instructions.
 // Find out about double-spaced-ness of the Opcode and pass it on to
@@ -2303,11 +2391,33 @@
 
   const StringRef Name = ARMInsts[Opcode].Name;
   bool DblSpaced = false;
+  // 0 represents standard alignment, i.e., unaligned data access.
+  unsigned alignment = 0;
 
   if (Name.find("LN") != std::string::npos) {
     // To one lane instructions.
     // See, for example, 8.6.317 VLD4 (single 4-element structure to one lane).
 
+    unsigned elem = 0; // legal values: {1, 2, 3, 4}
+    if (Name.startswith("VST1") || Name.startswith("VLD1"))
+      elem = 1;
+
+    if (Name.startswith("VST2") || Name.startswith("VLD2"))
+      elem = 2;
+
+    if (Name.startswith("VST3") || Name.startswith("VLD3"))
+      elem = 3;
+
+    if (Name.startswith("VST4") || Name.startswith("VLD4"))
+      elem = 4;
+
+    // Utility function takes number of elements, size, and index_align.
+    if (!Align4OneLaneInst(elem,
+                           slice(insn, 11, 10),
+                           slice(insn, 7, 4),
+                           alignment))
+      return false;
+
     // <size> == 16 && Inst{5} == 1 --> DblSpaced = true
     if (Name.endswith("16") || Name.endswith("16_UPD"))
       DblSpaced = slice(insn, 5, 5) == 1;
@@ -2315,26 +2425,41 @@
     // <size> == 32 && Inst{6} == 1 --> DblSpaced = true
     if (Name.endswith("32") || Name.endswith("32_UPD"))
       DblSpaced = slice(insn, 6, 6) == 1;
-
   } else {
     // Multiple n-element structures with type encoded as Inst{11-8}.
     // See, for example, A8.6.316 VLD4 (multiple 4-element structures).
 
+    // Inst{5-4} encodes alignment.
+    switch (slice(insn, 5, 4)) {
+    default:
+      break;
+    case 1:
+      alignment = 64; break;
+    case 2:
+      alignment = 128; break;
+    case 3:
+      alignment = 256; break;
+    }
+
     // n == 2 && type == 0b1001 -> DblSpaced = true
     if (Name.startswith("VST2") || Name.startswith("VLD2"))
       DblSpaced = slice(insn, 11, 8) == 9;
 
     // n == 3 && type == 0b0101 -> DblSpaced = true
-    if (Name.startswith("VST3") || Name.startswith("VLD3"))
+    if (Name.startswith("VST3") || Name.startswith("VLD3")) {
+      // A8.6.313 & A8.6.395
+      if (slice(insn, 7, 6) == 3 && slice(insn, 5, 5) == 1)
+        return false;
+
       DblSpaced = slice(insn, 11, 8) == 5;
+    }
 
     // n == 4 && type == 0b0001 -> DblSpaced = true
     if (Name.startswith("VST4") || Name.startswith("VLD4"))
       DblSpaced = slice(insn, 11, 8) == 1;
-
   }
   return DisassembleNLdSt0(MI, Opcode, insn, NumOps, NumOpsAdded,
-                           slice(insn, 21, 21) == 0, DblSpaced, B);
+                           slice(insn, 21, 21) == 0, DblSpaced, alignment/8, B);
 }
 
 // VMOV (immediate)

Modified: llvm/trunk/test/MC/Disassembler/ARM/neon-tests.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/neon-tests.txt?rev=128841&r1=128840&r2=128841&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/neon-tests.txt (original)
+++ llvm/trunk/test/MC/Disassembler/ARM/neon-tests.txt Mon Apr  4 15:35:31 2011
@@ -68,3 +68,6 @@
 
 # CHECK:	vbic.i32	q2, #0xA900
 0x79 0x53 0x82 0xf3
+
+# CHECK:	vst2.32	{d16, d18}, [r2, :64], r2
+0x92 0x9 0x42 0xf4



From ahatanak at gmail.com  Mon Apr  4 16:00:10 2011
From: ahatanak at gmail.com (Akira Hatanaka)
Date: Mon, 4 Apr 2011 14:00:10 -0700
Subject: [llvm-commits] MIPS patch
In-Reply-To: <BANLkTi=4kbTWqgOgKBBBrmoBZDmFo5uyYw@mail.gmail.com>
References: <BANLkTi=4kbTWqgOgKBBBrmoBZDmFo5uyYw@mail.gmail.com>
Message-ID: <BANLkTi=-=4eOnSxQUSSyq_DhroxhutbRew@mail.gmail.com>

This patch fixes handling of functions with internal linkage.
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From stoklund at 2pi.dk  Mon Apr  4 16:00:00 2011
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Mon, 04 Apr 2011 21:00:00 -0000
Subject: [llvm-commits] [llvm] r128844 - in /llvm/trunk/lib/CodeGen:
 SimpleRegisterCoalescing.cpp SimpleRegisterCoalescing.h
Message-ID: <20110404210000.1038C2A6C12C@llvm.org>

Author: stoklund
Date: Mon Apr  4 15:59:59 2011
New Revision: 128844

URL: http://llvm.org/viewvc/llvm-project?rev=128844&view=rev
Log:
Extract physreg joining policy to a separate method.

Modified:
    llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
    llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h

Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=128844&r1=128843&r2=128844&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original)
+++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Mon Apr  4 15:59:59 2011
@@ -913,6 +913,50 @@
   return removeIntervalIfEmpty(li, li_, tri_);
 }
 
+/// shouldJoinPhys - Return true if a copy involving a physreg should be joined.
+/// We need to be careful about coalescing a source physical register with a
+/// virtual register. Once the coalescing is done, it cannot be broken and these
+/// are not spillable! If the destination interval uses are far away, think
+/// twice about coalescing them!
+bool SimpleRegisterCoalescing::shouldJoinPhys(CoalescerPair &CP) {
+  if (DisablePhysicalJoin) {
+    DEBUG(dbgs() << "\tPhysreg joins disabled.\n");
+    return false;
+  }
+
+  // Only coalesce to allocatable physreg.
+  if (!li_->isAllocatable(CP.getDstReg())) {
+    DEBUG(dbgs() << "\tRegister is an unallocatable physreg.\n");
+    return false;  // Not coalescable.
+  }
+
+  // Don't join with physregs that have a ridiculous number of live
+  // ranges. The data structure performance is really bad when that
+  // happens.
+  if (li_->hasInterval(CP.getDstReg()) &&
+      li_->getInterval(CP.getDstReg()).ranges.size() > 1000) {
+    ++numAborts;
+    DEBUG(dbgs()
+          << "\tPhysical register live interval too complicated, abort!\n");
+    return false;
+  }
+
+  // FIXME: Why are we skipping this test for partial copies?
+  //        CodeGen/X86/phys_subreg_coalesce-3.ll needs it.
+  if (!CP.isPartial()) {
+    LiveInterval &JoinVInt = li_->getInterval(CP.getSrcReg());
+
+    const TargetRegisterClass *RC = mri_->getRegClass(CP.getSrcReg());
+    unsigned Threshold = allocatableRCRegs_[RC].count() * 2;
+    unsigned Length = li_->getApproximateInstructionCount(JoinVInt);
+    if (Length > Threshold) {
+      ++numAborts;
+      DEBUG(dbgs() << "\tMay tie down a physical register, abort!\n");
+      return false;
+    }
+  }
+  return true;
+}
 
 /// isWinToJoinCrossClass - Return true if it's profitable to coalesce
 /// two virtual registers from different register classes.
@@ -985,27 +1029,25 @@
     return false;  // Not coalescable.
   }
 
-  if (DisablePhysicalJoin && CP.isPhys()) {
-    DEBUG(dbgs() << "\tPhysical joins disabled.\n");
-    return false;
-  }
-
-  DEBUG(dbgs() << "\tConsidering merging " << PrintReg(CP.getSrcReg(), tri_));
+  DEBUG(dbgs() << "\tConsidering merging " << PrintReg(CP.getSrcReg(), tri_)
+               << " with " << PrintReg(CP.getDstReg(), tri_, CP.getSubIdx())
+               << "\n");
 
   // Enforce policies.
   if (CP.isPhys()) {
-    DEBUG(dbgs() <<" with physreg " << PrintReg(CP.getDstReg(), tri_) << "\n");
-    // Only coalesce to allocatable physreg.
-    if (!li_->isAllocatable(CP.getDstReg())) {
-      DEBUG(dbgs() << "\tRegister is an unallocatable physreg.\n");
-      return false;  // Not coalescable.
+    if (!shouldJoinPhys(CP)) {
+      // Before giving up coalescing, if definition of source is defined by
+      // trivial computation, try rematerializing it.
+      if (!CP.isFlipped() &&
+          ReMaterializeTrivialDef(li_->getInterval(CP.getSrcReg()), true,
+                                  CP.getDstReg(), 0, CopyMI))
+        return true;
+      return false;
     }
   } else {
-    DEBUG(dbgs() << " with " << PrintReg(CP.getDstReg(), tri_, CP.getSubIdx())
-                 << " to " << CP.getNewRC()->getName() << "\n");
-
     // Avoid constraining virtual register regclass too much.
     if (CP.isCrossClass()) {
+      DEBUG(dbgs() << "\tCross-class to " << CP.getNewRC()->getName() << ".\n");
       if (DisableCrossClassJoin) {
         DEBUG(dbgs() << "\tCross-class joins disabled.\n");
         return false;
@@ -1014,8 +1056,7 @@
                                  mri_->getRegClass(CP.getSrcReg()),
                                  mri_->getRegClass(CP.getDstReg()),
                                  CP.getNewRC())) {
-        DEBUG(dbgs() << "\tAvoid coalescing to constrained register class: "
-                     << CP.getNewRC()->getName() << ".\n");
+        DEBUG(dbgs() << "\tAvoid coalescing to constrained register class.\n");
         Again = true;  // May be possible to coalesce later.
         return false;
       }
@@ -1027,43 +1068,6 @@
       CP.flip();
   }
 
-  // We need to be careful about coalescing a source physical register with a
-  // virtual register. Once the coalescing is done, it cannot be broken and
-  // these are not spillable! If the destination interval uses are far away,
-  // think twice about coalescing them!
-  // FIXME: Why are we skipping this test for partial copies?
-  //        CodeGen/X86/phys_subreg_coalesce-3.ll needs it.
-  if (!CP.isPartial() && CP.isPhys()) {
-    LiveInterval &JoinVInt = li_->getInterval(CP.getSrcReg());
-
-    // Don't join with physregs that have a ridiculous number of live
-    // ranges. The data structure performance is really bad when that
-    // happens.
-    if (li_->hasInterval(CP.getDstReg()) &&
-        li_->getInterval(CP.getDstReg()).ranges.size() > 1000) {
-      ++numAborts;
-      DEBUG(dbgs()
-           << "\tPhysical register live interval too complicated, abort!\n");
-      return false;
-    }
-
-    const TargetRegisterClass *RC = mri_->getRegClass(CP.getSrcReg());
-    unsigned Threshold = allocatableRCRegs_[RC].count() * 2;
-    unsigned Length = li_->getApproximateInstructionCount(JoinVInt);
-    if (Length > Threshold) {
-      // Before giving up coalescing, if definition of source is defined by
-      // trivial computation, try rematerializing it.
-      if (!CP.isFlipped() &&
-          ReMaterializeTrivialDef(JoinVInt, true, CP.getDstReg(), 0, CopyMI))
-        return true;
-
-      ++numAborts;
-      DEBUG(dbgs() << "\tMay tie down a physical register, abort!\n");
-      Again = true;  // May be possible to coalesce later.
-      return false;
-    }
-  }
-
   // Okay, attempt to join these two intervals.  On failure, this returns false.
   // Otherwise, if one of the intervals being joined is a physreg, this method
   // always canonicalizes DstInt to be it.  The output "SrcInt" will not have

Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h?rev=128844&r1=128843&r2=128844&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h (original)
+++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h Mon Apr  4 15:59:59 2011
@@ -138,6 +138,9 @@
                                  unsigned DstReg, unsigned DstSubIdx,
                                  MachineInstr *CopyMI);
 
+    /// shouldJoinPhys - Return true if a physreg copy should be joined.
+    bool shouldJoinPhys(CoalescerPair &CP);
+
     /// isWinToJoinCrossClass - Return true if it's profitable to coalesce
     /// two virtual registers from different register classes.
     bool isWinToJoinCrossClass(unsigned SrcReg,



From stoklund at 2pi.dk  Mon Apr  4 16:00:03 2011
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Mon, 04 Apr 2011 21:00:03 -0000
Subject: [llvm-commits] [llvm] r128845 - in /llvm/trunk:
 lib/CodeGen/LiveIntervalAnalysis.cpp lib/CodeGen/RegAllocLinearScan.cpp
 lib/CodeGen/SimpleRegisterCoalescing.cpp
 test/CodeGen/X86/2008-08-05-SpillerBug.ll
 test/CodeGen/X86/mcinst-lowering-cmp0.ll
Message-ID: <20110404210003.981302A6C12D@llvm.org>

Author: stoklund
Date: Mon Apr  4 16:00:03 2011
New Revision: 128845

URL: http://llvm.org/viewvc/llvm-project?rev=128845&view=rev
Log:
Allow coalescing with reserved physregs in certain cases:

When a virtual register has a single value that is defined as a copy of a
reserved register, permit that copy to be joined. These virtual register are
usually copies of the stack pointer:

  %vreg75<def> = COPY %ESP; GR32:%vreg75
  MOV32mr %vreg75, 1, %noreg, 0, %noreg, %vreg74<kill>
  MOV32mi %vreg75, 1, %noreg, 8, %noreg, 0
  MOV32mi %vreg75<kill>, 1, %noreg, 4, %noreg, 0
  CALLpcrel32 ...

Coalescing these virtual registers early decreases register pressure.
Previously, they were coalesced by RALinScan::attemptTrivialCoalescing after
register allocation was completed.

The lower register pressure causes the mcinst-lowering-cmp0.ll test case to fail
because it depends on linear scan spilling a particular register.

I am deleting 2008-08-05-SpillerBug.ll because it is counting the number of
instructions emitted, and its revision history shows the 'correct' count being
edited many times.

Removed:
    llvm/trunk/test/CodeGen/X86/2008-08-05-SpillerBug.ll
    llvm/trunk/test/CodeGen/X86/mcinst-lowering-cmp0.ll
Modified:
    llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
    llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp
    llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp

Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=128845&r1=128844&r2=128845&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Mon Apr  4 16:00:03 2011
@@ -572,7 +572,7 @@
   if (TargetRegisterInfo::isVirtualRegister(MO.getReg()))
     handleVirtualRegisterDef(MBB, MI, MIIdx, MO, MOIdx,
                              getOrCreateInterval(MO.getReg()));
-  else if (allocatableRegs_[MO.getReg()]) {
+  else {
     MachineInstr *CopyMI = NULL;
     if (MI->isCopyLike())
       CopyMI = MI;

Modified: llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp?rev=128845&r1=128844&r2=128845&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp Mon Apr  4 16:00:03 2011
@@ -572,7 +572,7 @@
 
   for (LiveIntervals::iterator i = li_->begin(), e = li_->end(); i != e; ++i) {
     if (TargetRegisterInfo::isPhysicalRegister(i->second->reg)) {
-      if (!i->second->empty()) {
+      if (!i->second->empty() && allocatableRegs_.test(i->second->reg)) {
         mri_->setPhysRegUsed(i->second->reg);
         fixed_.push_back(std::make_pair(i->second, i->second->begin()));
       }

Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=128845&r1=128844&r2=128845&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original)
+++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Mon Apr  4 16:00:03 2011
@@ -919,13 +919,23 @@
 /// are not spillable! If the destination interval uses are far away, think
 /// twice about coalescing them!
 bool SimpleRegisterCoalescing::shouldJoinPhys(CoalescerPair &CP) {
+  bool Allocatable = li_->isAllocatable(CP.getDstReg());
+  LiveInterval &JoinVInt = li_->getInterval(CP.getSrcReg());
+
+  /// Always join simple intervals that are defined by a single copy from a
+  /// reserved register. This doesn't increase register pressure, so it is
+  /// always beneficial.
+  if (!Allocatable && CP.isFlipped() && JoinVInt.containsOneValue())
+    return true;
+
   if (DisablePhysicalJoin) {
     DEBUG(dbgs() << "\tPhysreg joins disabled.\n");
     return false;
   }
 
-  // Only coalesce to allocatable physreg.
-  if (!li_->isAllocatable(CP.getDstReg())) {
+  // Only coalesce to allocatable physreg, we don't want to risk modifying
+  // reserved registers.
+  if (!Allocatable) {
     DEBUG(dbgs() << "\tRegister is an unallocatable physreg.\n");
     return false;  // Not coalescable.
   }
@@ -944,8 +954,6 @@
   // FIXME: Why are we skipping this test for partial copies?
   //        CodeGen/X86/phys_subreg_coalesce-3.ll needs it.
   if (!CP.isPartial()) {
-    LiveInterval &JoinVInt = li_->getInterval(CP.getSrcReg());
-
     const TargetRegisterClass *RC = mri_->getRegClass(CP.getSrcReg());
     unsigned Threshold = allocatableRCRegs_[RC].count() * 2;
     unsigned Length = li_->getApproximateInstructionCount(JoinVInt);

Removed: llvm/trunk/test/CodeGen/X86/2008-08-05-SpillerBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-08-05-SpillerBug.ll?rev=128844&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-08-05-SpillerBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-08-05-SpillerBug.ll (removed)
@@ -1,44 +0,0 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah -pre-RA-sched=list-burr -disable-fp-elim -stats |& grep asm-printer | grep 55
-; PR2568
-
- at g_3 = external global i16		; <i16*> [#uses=1]
- at g_5 = external global i32		; <i32*> [#uses=3]
-
-declare i32 @func_15(i16 signext , i16 signext , i32) nounwind 
-
-define void @func_9_entry_2E_ce(i8 %p_11) nounwind {
-newFuncRoot:
-	br label %entry.ce
-
-entry.ce.ret.exitStub:		; preds = %entry.ce
-	ret void
-
-entry.ce:		; preds = %newFuncRoot
-	load i16* @g_3, align 2		; <i16>:0 [#uses=1]
-	icmp sgt i16 %0, 0		; <i1>:1 [#uses=1]
-	zext i1 %1 to i32		; <i32>:2 [#uses=1]
-	load i32* @g_5, align 4		; <i32>:3 [#uses=4]
-	icmp ugt i32 %2, %3		; <i1>:4 [#uses=1]
-	zext i1 %4 to i32		; <i32>:5 [#uses=1]
-	icmp eq i32 %3, 0		; <i1>:6 [#uses=1]
-	%.0 = select i1 %6, i32 1, i32 %3		; <i32> [#uses=1]
-	urem i32 1, %.0		; <i32>:7 [#uses=2]
-	sext i8 %p_11 to i16		; <i16>:8 [#uses=1]
-	trunc i32 %3 to i16		; <i16>:9 [#uses=1]
-	tail call i32 @func_15( i16 signext  %8, i16 signext  %9, i32 1 ) nounwind 		; <i32>:10 [#uses=0]
-	load i32* @g_5, align 4		; <i32>:11 [#uses=1]
-	trunc i32 %11 to i16		; <i16>:12 [#uses=1]
-	tail call i32 @func_15( i16 signext  %12, i16 signext  1, i32 %7 ) nounwind 		; <i32>:13 [#uses=0]
-	sext i8 %p_11 to i32		; <i32>:14 [#uses=1]
-	%p_11.lobit = lshr i8 %p_11, 7		; <i8> [#uses=1]
-	%tmp = zext i8 %p_11.lobit to i32		; <i32> [#uses=1]
-	%tmp.not = xor i32 %tmp, 1		; <i32> [#uses=1]
-	%.015 = ashr i32 %14, %tmp.not		; <i32> [#uses=2]
-	icmp eq i32 %.015, 0		; <i1>:15 [#uses=1]
-	%.016 = select i1 %15, i32 1, i32 %.015		; <i32> [#uses=1]
-	udiv i32 %7, %.016		; <i32>:16 [#uses=1]
-	icmp ult i32 %5, %16		; <i1>:17 [#uses=1]
-	zext i1 %17 to i32		; <i32>:18 [#uses=1]
-	store i32 %18, i32* @g_5, align 4
-	br label %entry.ce.ret.exitStub
-}

Removed: llvm/trunk/test/CodeGen/X86/mcinst-lowering-cmp0.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mcinst-lowering-cmp0.ll?rev=128844&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mcinst-lowering-cmp0.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mcinst-lowering-cmp0.ll (removed)
@@ -1,68 +0,0 @@
-; RUN: llc --show-mc-encoding -relocation-model=pic -disable-fp-elim -O3 < %s | FileCheck %s
-
-target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
-target triple = "i386-apple-darwin10.0.0"
-
-%struct.NSConstantString = type { i32*, i32, i8*, i32 }
-%struct._objc_module = type { i32, i32, i8*, %struct._objc_symtab* }
-%struct._objc_symtab = type { i32, i8*, i16, i16, [0 x i8*] }
-
-@"\01L_OBJC_IMAGE_INFO" = internal constant [2 x i32] [i32 0, i32 16], section "__OBJC, __image_info,regular" ; <[2 x i32]*> [#uses=1]
-@"\01L_OBJC_METH_VAR_NAME_" = internal global [4 x i8] c"foo\00", section "__TEXT,__cstring,cstring_literals", align 1 ; <[4 x i8]*> [#uses=1]
-@"\01L_OBJC_SELECTOR_REFERENCES_" = internal global i8* getelementptr inbounds ([4 x i8]* @"\01L_OBJC_METH_VAR_NAME_", i32 0, i32 0), section "__OBJC,__message_refs,literal_pointers,no_dead_strip", align 4 ; <i8**> [#uses=3]
- at __CFConstantStringClassReference = external global [0 x i32] ; <[0 x i32]*> [#uses=1]
- at .str = private constant [3 x i8] c"||\00"        ; <[3 x i8]*> [#uses=1]
- at _unnamed_cfstring_ = private constant %struct.NSConstantString { i32* getelementptr inbounds ([0 x i32]* @__CFConstantStringClassReference, i32 0, i32 0), i32 1992, i8* getelementptr inbounds ([3 x i8]* @.str, i32 0, i32 0), i32 2 }, section "__DATA,__cfstring" ; <%struct.NSConstantString*> [#uses=1]
-@"\01L_OBJC_METH_VAR_NAME_1" = internal global [5 x i8] c"baz:\00", section "__TEXT,__cstring,cstring_literals", align 1 ; <[5 x i8]*> [#uses=1]
-@"\01L_OBJC_SELECTOR_REFERENCES_2" = internal global i8* getelementptr inbounds ([5 x i8]* @"\01L_OBJC_METH_VAR_NAME_1", i32 0, i32 0), section "__OBJC,__message_refs,literal_pointers,no_dead_strip", align 4 ; <i8**> [#uses=2]
-@"\01L_OBJC_METH_VAR_NAME_3" = internal global [4 x i8] c"bar\00", section "__TEXT,__cstring,cstring_literals", align 1 ; <[4 x i8]*> [#uses=1]
-@"\01L_OBJC_SELECTOR_REFERENCES_4" = internal global i8* getelementptr inbounds ([4 x i8]* @"\01L_OBJC_METH_VAR_NAME_3", i32 0, i32 0), section "__OBJC,__message_refs,literal_pointers,no_dead_strip", align 4 ; <i8**> [#uses=2]
-@"\01L_OBJC_CLASS_NAME_" = internal global [1 x i8] zeroinitializer, section "__TEXT,__cstring,cstring_literals", align 1 ; <[1 x i8]*> [#uses=1]
-@"\01L_OBJC_MODULES" = internal global %struct._objc_module { i32 7, i32 16, i8* getelementptr inbounds ([1 x i8]* @"\01L_OBJC_CLASS_NAME_", i32 0, i32 0), %struct._objc_symtab* null }, section "__OBJC,__module_info,regular,no_dead_strip", align 4 ; <%struct._objc_module*> [#uses=1]
- at llvm.used = appending global [9 x i8*] [i8* bitcast ([2 x i32]* @"\01L_OBJC_IMAGE_INFO" to i8*), i8* getelementptr inbounds ([4 x i8]* @"\01L_OBJC_METH_VAR_NAME_", i32 0, i32 0), i8* bitcast (i8** @"\01L_OBJC_SELECTOR_REFERENCES_" to i8*), i8* getelementptr inbounds ([5 x i8]* @"\01L_OBJC_METH_VAR_NAME_1", i32 0, i32 0), i8* bitcast (i8** @"\01L_OBJC_SELECTOR_REFERENCES_2" to i8*), i8* getelementptr inbounds ([4 x i8]* @"\01L_OBJC_METH_VAR_NAME_3", i32 0, i32 0), i8* bitcast (i8** @"\01L_OBJC_SELECTOR_REFERENCES_4" to i8*), i8* getelementptr inbounds ([1 x i8]* @"\01L_OBJC_CLASS_NAME_", i32 0, i32 0), i8* bitcast (%struct._objc_module* @"\01L_OBJC_MODULES" to i8*)], section "llvm.metadata" ; <[9 x i8*]*> [#uses=0]
-
-define void @f0(i8* nocapture %a, i8* nocapture %b) nounwind optsize ssp {
-entry:
-  %call = tail call i32 (...)* @get_name() nounwind optsize ; <i32> [#uses=2]
-  %conv = inttoptr i32 %call to i8*               ; <i8*> [#uses=1]
-  %call1 = tail call i32 (...)* @get_dict() nounwind optsize ; <i32> [#uses=2]
-  %conv2 = inttoptr i32 %call1 to i8*             ; <i8*> [#uses=2]
-
-; Check that we lower to the short form of cmpl, which has an 8-bit immediate.
-;
-; CHECK: cmpl  $0, -16(%ebp)           ## 4-byte Folded Reload
-; CHECK:                               ## encoding: [0x83,0x7d,0xf0,0x00]
-; rdar://7999130
-  %cmp = icmp eq i32 %call1, 0                    ; <i1> [#uses=1]
-  br i1 %cmp, label %if.end, label %if.then
-
-if.then:                                          ; preds = %entry
-  %tmp5 = load i8** @"\01L_OBJC_SELECTOR_REFERENCES_" ; <i8*> [#uses=1]
-  %call6 = tail call i8* (i8*, i8*, ...)* @objc_msgSend(i8* %conv2, i8* %tmp5) nounwind optsize ; <i8*> [#uses=1]
-  %tmp7 = load i8** @"\01L_OBJC_SELECTOR_REFERENCES_2" ; <i8*> [#uses=1]
-  %call820 = tail call i8* (i8*, i8*, ...)* @objc_msgSend(i8* %call6, i8* %tmp7, i8* bitcast (%struct.NSConstantString* @_unnamed_cfstring_ to i8*)) nounwind optsize ; <i8*> [#uses=0]
-  br label %if.end
-
-if.end:                                           ; preds = %entry, %if.then
-  %tmp10 = load i8** @"\01L_OBJC_SELECTOR_REFERENCES_" ; <i8*> [#uses=1]
-  %call11 = tail call i8* (i8*, i8*, ...)* @objc_msgSend(i8* %conv2, i8* %tmp10) nounwind optsize ; <i8*> [#uses=1]
-  %tmp12 = load i8** @"\01L_OBJC_SELECTOR_REFERENCES_4" ; <i8*> [#uses=1]
-  %call13 = tail call i8* (i8*, i8*, ...)* @objc_msgSend(i8* %call11, i8* %tmp12) nounwind optsize ; <i8*> [#uses=0]
-  %cmp15 = icmp eq i32 %call, 0                   ; <i1> [#uses=1]
-  br i1 %cmp15, label %if.end19, label %if.then17
-
-if.then17:                                        ; preds = %if.end
-  tail call void (...)* @f1(i8* %conv) nounwind optsize
-  ret void
-
-if.end19:                                         ; preds = %if.end
-  ret void
-}
-
-declare i32 @get_name(...) optsize
-
-declare i32 @get_dict(...) optsize
-
-declare i8* @objc_msgSend(i8*, i8*, ...)
-
-declare void @f1(...) optsize



From stoklund at 2pi.dk  Mon Apr  4 16:07:46 2011
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Mon, 04 Apr 2011 14:07:46 -0700
Subject: [llvm-commits] [llvm] r128822 - in /llvm/trunk/lib/Target/X86:
 X86InstrFormats.td X86InstrInfo.h X86MCCodeEmitter.cpp
In-Reply-To: <20110404155830.C21862A6C12C@llvm.org>
References: <20110404155830.C21862A6C12C@llvm.org>
Message-ID: <74E52A33-43D2-4E7D-BBF5-7CF75C486C3A@2pi.dk>


On Apr 4, 2011, at 8:58 AM, Joerg Sonnenberger wrote:

> -    OpcodeShift   = 24,
> +    OpcodeShift   = SSEDomainShift + 2,
>     OpcodeMask    = 0xFF << OpcodeShift,

This shift now overflows an unsigned. Please use a 64-bit immediate.

/jakob


From joerg at bec.de  Mon Apr  4 16:38:17 2011
From: joerg at bec.de (Joerg Sonnenberger)
Date: Mon, 04 Apr 2011 21:38:17 -0000
Subject: [llvm-commits] [llvm] r128847 -
	/llvm/trunk/lib/Target/X86/X86InstrInfo.h
Message-ID: <20110404213817.C8C942A6C12C@llvm.org>

Author: joerg
Date: Mon Apr  4 16:38:17 2011
New Revision: 128847

URL: http://llvm.org/viewvc/llvm-project?rev=128847&view=rev
Log:
Make OpcodeMask an unsigned long long literal to deal with overflow.

Modified:
    llvm/trunk/lib/Target/X86/X86InstrInfo.h

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.h?rev=128847&r1=128846&r2=128847&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.h (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.h Mon Apr  4 16:38:17 2011
@@ -449,7 +449,7 @@
     SSEDomainShift = SegOvrShift + 2,
 
     OpcodeShift   = SSEDomainShift + 2,
-    OpcodeMask    = 0xFF << OpcodeShift,
+    OpcodeMask    = 0xFFULL << OpcodeShift,
 
     //===------------------------------------------------------------------===//
     /// VEX - The opcode prefix used by AVX instructions



From jgu222 at gmail.com  Mon Apr  4 15:47:23 2011
From: jgu222 at gmail.com (Junjie Gu)
Date: Mon, 4 Apr 2011 13:47:23 -0700
Subject: [llvm-commits] Minor change to LoopUnroll's ctor
Message-ID: <BANLkTikLEQpmn+pGGGFn-DaEDMfys3BxDA@mail.gmail.com>

I'd like to change the loop unroll so that the
threshold/count/allowpartial can be passed as parameters to
LoopUnroll's ctor. The reason for doing so is that static options
(-unroll-threshold, -unroll-count, -unroll-allow-partial) are not good
for an environment (OpenCL) in which multiple llvm context may be
present at the same time. And each llvm context may have its own
optimization options, and thus options cannot be shared.

With this patch, a user can create a loop unroll by the following:

          createLoopUnrollPass(Threshold, Count, AllowPartial);

And the previous API
          createLoopUnrollPass()
will work as before.

Please review it. I do have commit access so I can check in by myself
after reviewing.

Thanks
Junjie
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From grosbach at apple.com  Mon Apr  4 18:04:39 2011
From: grosbach at apple.com (Jim Grosbach)
Date: Mon, 04 Apr 2011 23:04:39 -0000
Subject: [llvm-commits] [llvm] r128851 - in /llvm/trunk:
 include/llvm/ExecutionEngine/RuntimeDyld.h
 lib/ExecutionEngine/MCJIT/MCJIT.cpp lib/ExecutionEngine/MCJIT/MCJIT.h
 lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp
 tools/llvm-rtdyld/llvm-rtdyld.cpp
Message-ID: <20110404230440.101662A6C12C@llvm.org>

Author: grosbach
Date: Mon Apr  4 18:04:39 2011
New Revision: 128851

URL: http://llvm.org/viewvc/llvm-project?rev=128851&view=rev
Log:
Layer the memory manager between the JIT and the runtime Dyld.

The JITMemory manager references LLVM IR constructs directly, while the
runtime Dyld works at a lower level and can handle objects which may not
originate from LLVM IR. Introduce a new layer for the memory manager to
handle the interface between them. For the MCJIT, this layer will be almost
entirely simply a call-through w/ translation between the IR objects and
symbol names.

Modified:
    llvm/trunk/include/llvm/ExecutionEngine/RuntimeDyld.h
    llvm/trunk/lib/ExecutionEngine/MCJIT/MCJIT.cpp
    llvm/trunk/lib/ExecutionEngine/MCJIT/MCJIT.h
    llvm/trunk/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp
    llvm/trunk/tools/llvm-rtdyld/llvm-rtdyld.cpp

Modified: llvm/trunk/include/llvm/ExecutionEngine/RuntimeDyld.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ExecutionEngine/RuntimeDyld.h?rev=128851&r1=128850&r2=128851&view=diff
==============================================================================
--- llvm/trunk/include/llvm/ExecutionEngine/RuntimeDyld.h (original)
+++ llvm/trunk/include/llvm/ExecutionEngine/RuntimeDyld.h Mon Apr  4 18:04:39 2011
@@ -21,7 +21,29 @@
 
 class RuntimeDyldImpl;
 class MemoryBuffer;
-class JITMemoryManager;
+
+// RuntimeDyld clients often want to handle the memory management of
+// what gets placed where. For JIT clients, this is an abstraction layer
+// over the JITMemoryManager, which references objects by their source
+// representations in LLVM IR.
+// FIXME: As the RuntimeDyld fills out, additional routines will be needed
+//        for the varying types of objects to be allocated.
+class RTDyldMemoryManager {
+  RTDyldMemoryManager(const RTDyldMemoryManager&);  // DO NOT IMPLEMENT
+  void operator=(const RTDyldMemoryManager&);       // DO NOT IMPLEMENT
+public:
+  RTDyldMemoryManager() {}
+
+  // Allocate ActualSize bytes, or more, for the named function. Return
+  // a pointer to the allocated memory and update Size to reflect how much
+  // memory was acutally allocated.
+  virtual uint64_t startFunctionBody(const char *Name, uintptr_t &Size) = 0;
+
+  // Mark the end of the function, including how much of the allocated
+  // memory was actually used.
+  virtual void endFunctionBody(const char *Name, uint64_t FunctionStart,
+                               uint64_t FunctionEnd) = 0;
+};
 
 class RuntimeDyld {
   RuntimeDyld(const RuntimeDyld &);     // DO NOT IMPLEMENT
@@ -31,11 +53,12 @@
   // interface.
   RuntimeDyldImpl *Dyld;
 public:
-  RuntimeDyld(JITMemoryManager*);
+  RuntimeDyld(RTDyldMemoryManager*);
   ~RuntimeDyld();
 
   bool loadObject(MemoryBuffer *InputBuffer);
-  void *getSymbolAddress(StringRef Name);
+  uint64_t getSymbolAddress(StringRef Name);
+  void reassignSymbolAddress(StringRef Name, uint64_t Addr);
   // FIXME: Should be parameterized to get the memory block associated with
   // a particular loaded object.
   sys::MemoryBlock getMemoryBlock();

Modified: llvm/trunk/lib/ExecutionEngine/MCJIT/MCJIT.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/MCJIT/MCJIT.cpp?rev=128851&r1=128850&r2=128851&view=diff
==============================================================================
--- llvm/trunk/lib/ExecutionEngine/MCJIT/MCJIT.cpp (original)
+++ llvm/trunk/lib/ExecutionEngine/MCJIT/MCJIT.cpp Mon Apr  4 18:04:39 2011
@@ -8,6 +8,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "MCJIT.h"
+#include "MCJITMemoryManager.h"
 #include "llvm/DerivedTypes.h"
 #include "llvm/Function.h"
 #include "llvm/ExecutionEngine/GenericValue.h"
@@ -57,7 +58,8 @@
 
   // If the target supports JIT code generation, create the JIT.
   if (TargetJITInfo *TJ = TM->getJITInfo())
-    return new MCJIT(M, TM, *TJ, JMM, OptLevel, GVsWithCode);
+    return new MCJIT(M, TM, *TJ, new MCJITMemoryManager(JMM), OptLevel,
+                     GVsWithCode);
 
   if (ErrorStr)
     *ErrorStr = "target does not support JIT code generation";
@@ -65,9 +67,9 @@
 }
 
 MCJIT::MCJIT(Module *m, TargetMachine *tm, TargetJITInfo &tji,
-             JITMemoryManager *JMM, CodeGenOpt::Level OptLevel,
+             RTDyldMemoryManager *MM, CodeGenOpt::Level OptLevel,
              bool AllocateGVsWithCode)
-  : ExecutionEngine(m), TM(tm), M(m), OS(Buffer), Dyld(JMM) {
+  : ExecutionEngine(m), TM(tm), MemMgr(MM), M(m), OS(Buffer), Dyld(MM) {
 
   PM.add(new TargetData(*TM->getTargetData()));
 
@@ -94,6 +96,7 @@
 }
 
 MCJIT::~MCJIT() {
+  delete MemMgr;
 }
 
 void *MCJIT::getPointerToBasicBlock(BasicBlock *BB) {
@@ -110,7 +113,7 @@
   }
 
   Twine Name = TM->getMCAsmInfo()->getGlobalPrefix() + F->getName();
-  return Dyld.getSymbolAddress(Name.str());
+  return (void*)Dyld.getSymbolAddress(Name.str());
 }
 
 void *MCJIT::recompileAndRelinkFunction(Function *F) {

Modified: llvm/trunk/lib/ExecutionEngine/MCJIT/MCJIT.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/MCJIT/MCJIT.h?rev=128851&r1=128850&r2=128851&view=diff
==============================================================================
--- llvm/trunk/lib/ExecutionEngine/MCJIT/MCJIT.h (original)
+++ llvm/trunk/lib/ExecutionEngine/MCJIT/MCJIT.h Mon Apr  4 18:04:39 2011
@@ -24,11 +24,12 @@
 
 class MCJIT : public ExecutionEngine {
   MCJIT(Module *M, TargetMachine *tm, TargetJITInfo &tji,
-        JITMemoryManager *JMM, CodeGenOpt::Level OptLevel,
+        RTDyldMemoryManager *MemMgr, CodeGenOpt::Level OptLevel,
         bool AllocateGVsWithCode);
 
   TargetMachine *TM;
   MCContext *Ctx;
+  RTDyldMemoryManager *MemMgr;
 
   // FIXME: These may need moved to a separate 'jitstate' member like the
   // non-MC JIT does for multithreading and such. Just keep them here for now.

Modified: llvm/trunk/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp?rev=128851&r1=128850&r2=128851&view=diff
==============================================================================
--- llvm/trunk/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp (original)
+++ llvm/trunk/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp Mon Apr  4 18:04:39 2011
@@ -18,7 +18,6 @@
 #include "llvm/ADT/StringRef.h"
 #include "llvm/ADT/Twine.h"
 #include "llvm/ExecutionEngine/RuntimeDyld.h"
-#include "llvm/ExecutionEngine/JITMemoryManager.h"
 #include "llvm/Object/MachOObject.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/ErrorHandling.h"
@@ -35,12 +34,12 @@
   unsigned CPUType;
   unsigned CPUSubtype;
 
-  // The JITMemoryManager to load objects into.
-  JITMemoryManager *JMM;
+  // The MemoryManager to load objects into.
+  RTDyldMemoryManager *MemMgr;
 
   // Master symbol table. As modules are loaded and external symbols are
   // resolved, their addresses are stored here.
-  StringMap<void*> SymbolTable;
+  StringMap<uint64_t> SymbolTable;
 
   // FIXME: Should have multiple data blocks, one for each loaded chunk of
   //        compiled code.
@@ -72,11 +71,11 @@
                      const InMemoryStruct<macho::SymtabLoadCommand> &SymtabLC);
 
 public:
-  RuntimeDyldImpl(JITMemoryManager *jmm) : JMM(jmm), HasError(false) {}
+  RuntimeDyldImpl(RTDyldMemoryManager *mm) : MemMgr(mm), HasError(false) {}
 
   bool loadObject(MemoryBuffer *InputBuffer);
 
-  void *getSymbolAddress(StringRef Name) {
+  uint64_t getSymbolAddress(StringRef Name) {
     // Use lookup() rather than [] because we don't want to add an entry
     // if there isn't one already, which the [] operator does.
     return SymbolTable.lookup(Name);
@@ -314,7 +313,7 @@
     void *SectionBase = SectionBases[Index];
 
     // Get the symbol address.
-    void *Address = (char*) SectionBase + STE->Value;
+    uint64_t Address = (uint64_t)SectionBase + STE->Value;
 
     // FIXME: Check the symbol type and flags.
     if (STE->Type != 0xF)
@@ -335,7 +334,7 @@
   }
 
   // We've loaded the section; now mark the functions in it as executable.
-  // FIXME: We really should use the JITMemoryManager for this.
+  // FIXME: We really should use the MemoryManager for this.
   sys::Memory::setRangeExecutable(Data.base(), Data.size());
 
   return false;
@@ -414,7 +413,7 @@
     void *SectionBase = SectionBases[Index];
 
     // Get the symbol address.
-    void *Address = (char*) SectionBase + STE->Value;
+    uint64_t Address = (uint64_t) SectionBase + STE->Value;
 
     // FIXME: Check the symbol type and flags.
     if (STE->Type != 0xF)
@@ -434,7 +433,7 @@
   }
 
   // We've loaded the section; now mark the functions in it as executable.
-  // FIXME: We really should use the JITMemoryManager for this.
+  // FIXME: We really should use the MemoryManager for this.
   sys::Memory::setRangeExecutable(Data.base(), Data.size());
 
   return false;
@@ -530,8 +529,8 @@
 
 //===----------------------------------------------------------------------===//
 // RuntimeDyld class implementation
-RuntimeDyld::RuntimeDyld(JITMemoryManager *JMM) {
-  Dyld = new RuntimeDyldImpl(JMM);
+RuntimeDyld::RuntimeDyld(RTDyldMemoryManager *MM) {
+  Dyld = new RuntimeDyldImpl(MM);
 }
 
 RuntimeDyld::~RuntimeDyld() {
@@ -542,7 +541,7 @@
   return Dyld->loadObject(InputBuffer);
 }
 
-void *RuntimeDyld::getSymbolAddress(StringRef Name) {
+uint64_t RuntimeDyld::getSymbolAddress(StringRef Name) {
   return Dyld->getSymbolAddress(Name);
 }
 

Modified: llvm/trunk/tools/llvm-rtdyld/llvm-rtdyld.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-rtdyld/llvm-rtdyld.cpp?rev=128851&r1=128850&r2=128851&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-rtdyld/llvm-rtdyld.cpp (original)
+++ llvm/trunk/tools/llvm-rtdyld/llvm-rtdyld.cpp Mon Apr  4 18:04:39 2011
@@ -13,7 +13,6 @@
 
 #include "llvm/ADT/StringMap.h"
 #include "llvm/ADT/OwningPtr.h"
-#include "llvm/ExecutionEngine/JITMemoryManager.h"
 #include "llvm/ExecutionEngine/RuntimeDyld.h"
 #include "llvm/Object/MachOObject.h"
 #include "llvm/Support/CommandLine.h"
@@ -41,6 +40,20 @@
 
 /* *** */
 
+// A trivial memory manager that doesn't do anything fancy, just uses the
+// support library allocation routines directly.
+class TrivialMemoryManager : public RTDyldMemoryManager {
+public:
+  uint64_t startFunctionBody(const char *Name, uintptr_t &Size);
+  void endFunctionBody(const char *Name, uint64_t FunctionStart,
+                       uint64_t FunctionEnd) {}
+};
+
+uint64_t TrivialMemoryManager::startFunctionBody(const char *Name,
+                                                 uintptr_t &Size) {
+  return (uint64_t)sys::Memory::AllocateRWX(Size, 0, 0).base();
+}
+
 static const char *ProgramName;
 
 static void Message(const char *Type, const Twine &Msg) {
@@ -61,7 +74,7 @@
     return Error("unable to read input: '" + ec.message() + "'");
 
   // Instantiate a dynamic linker.
-  RuntimeDyld Dyld(JITMemoryManager::CreateDefaultMemManager());
+  RuntimeDyld Dyld(new TrivialMemoryManager);
 
   // Load the object file into it.
   if (Dyld.loadObject(InputBuffer.take())) {
@@ -69,7 +82,7 @@
   }
 
   // Get the address of "_main".
-  void *MainAddress = Dyld.getSymbolAddress("_main");
+  uint64_t MainAddress = Dyld.getSymbolAddress("_main");
   if (MainAddress == 0)
     return Error("no definition for '_main'");
 
@@ -83,7 +96,7 @@
     return Error("unable to mark function executable: '" + ErrorStr + "'");
 
   // Dispatch to _main().
-  errs() << "loaded '_main' at: " << MainAddress << "\n";
+  errs() << "loaded '_main' at: " << (void*)MainAddress << "\n";
 
   int (*Main)(int, const char**) =
     (int(*)(int,const char**)) uintptr_t(MainAddress);



From grosbach at apple.com  Mon Apr  4 18:20:40 2011
From: grosbach at apple.com (Jim Grosbach)
Date: Mon, 04 Apr 2011 23:20:40 -0000
Subject: [llvm-commits] [llvm] r128856 -
	/llvm/trunk/lib/ExecutionEngine/MCJIT/MCJITMemoryManager.h
Message-ID: <20110404232040.BC03C2A6C12C@llvm.org>

Author: grosbach
Date: Mon Apr  4 18:20:40 2011
New Revision: 128856

URL: http://llvm.org/viewvc/llvm-project?rev=128856&view=rev
Log:
Add missing file from r128851.

Added:
    llvm/trunk/lib/ExecutionEngine/MCJIT/MCJITMemoryManager.h

Added: llvm/trunk/lib/ExecutionEngine/MCJIT/MCJITMemoryManager.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/MCJIT/MCJITMemoryManager.h?rev=128856&view=auto
==============================================================================
--- llvm/trunk/lib/ExecutionEngine/MCJIT/MCJITMemoryManager.h (added)
+++ llvm/trunk/lib/ExecutionEngine/MCJIT/MCJITMemoryManager.h Mon Apr  4 18:20:40 2011
@@ -0,0 +1,58 @@
+//===-- MCJITMemoryManager.h - Definition for the Memory Manager ---C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_LIB_EXECUTIONENGINE_MCJITMEMORYMANAGER_H
+#define LLVM_LIB_EXECUTIONENGINE_MCJITMEMORYMANAGER_H
+
+#include "llvm/Module.h"
+#include "llvm/ExecutionEngine/JITMemoryManager.h"
+#include "llvm/ExecutionEngine/RuntimeDyld.h"
+#include <assert.h>
+
+namespace llvm {
+
+// The MCJIT memory manager is a layer between the standard JITMemoryManager
+// and the RuntimeDyld interface that maps objects, by name, onto their
+// matching LLVM IR counterparts in the module(s) being compiled.
+class MCJITMemoryManager : public RTDyldMemoryManager {
+  JITMemoryManager *JMM;
+
+  // FIXME: Multiple modules.
+  Module *M;
+public:
+  MCJITMemoryManager(JITMemoryManager *jmm) : JMM(jmm) {}
+
+  // Allocate ActualSize bytes, or more, for the named function. Return
+  // a pointer to the allocated memory and update Size to reflect how much
+  // memory was acutally allocated.
+  uint64_t startFunctionBody(const char *Name, uintptr_t &Size) {
+    Function *F = M->getFunction(Name);
+    assert(F && "No matching function in JIT IR Module!");
+    return (uint64_t)JMM->startFunctionBody(F, Size);
+  }
+
+  // Mark the end of the function, including how much of the allocated
+  // memory was actually used.
+  void endFunctionBody(const char *Name, uint64_t FunctionStart,
+                       uint64_t FunctionEnd) {
+    Function *F = M->getFunction(Name);
+    assert(F && "No matching function in JIT IR Module!");
+    // The JITMemoryManager interface makes the unfortunate assumption that
+    // the address space/sizes we're compiling on are the same as what we're
+    // compiling for, so it uses pointer types for its addresses. Explicit
+    // casts between them to deal with that.
+    return JMM->endFunctionBody(F, (uint8_t*)FunctionStart,
+                                (uint8_t*)FunctionEnd);
+  }
+
+};
+
+} // End llvm namespace
+
+#endif



From pichet2000 at gmail.com  Mon Apr  4 18:29:48 2011
From: pichet2000 at gmail.com (Francois Pichet)
Date: Mon, 4 Apr 2011 19:29:48 -0400
Subject: [llvm-commits] [llvm] r128851 - in /llvm/trunk:
 include/llvm/ExecutionEngine/RuntimeDyld.h
 lib/ExecutionEngine/MCJIT/MCJIT.cpp lib/ExecutionEngine/MCJIT/MCJIT.h
 lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp
 tools/llvm-rtdyld/llvm-rtdyld.cpp
In-Reply-To: <20110404230440.101662A6C12C@llvm.org>
References: <20110404230440.101662A6C12C@llvm.org>
Message-ID: <BANLkTin=KvLSvQunEgrZ8NKomic=p2rp9g@mail.gmail.com>

On Mon, Apr 4, 2011 at 7:04 PM, Jim Grosbach <grosbach at apple.com> wrote:
> Author: grosbach
> Date: Mon Apr ?4 18:04:39 2011
> New Revision: 128851
>
> URL: http://llvm.org/viewvc/llvm-project?rev=128851&view=rev
> Log:
> Layer the memory manager between the JIT and the runtime Dyld.
>
> The JITMemory manager references LLVM IR constructs directly, while the
> runtime Dyld works at a lower level and can handle objects which may not
> originate from LLVM IR. Introduce a new layer for the memory manager to
> handle the interface between them. For the MCJIT, this layer will be almost
> entirely simply a call-through w/ translation between the IR objects and
> symbol names.
>
> Modified:
> ? ?llvm/trunk/include/llvm/ExecutionEngine/RuntimeDyld.h
> ? ?llvm/trunk/lib/ExecutionEngine/MCJIT/MCJIT.cpp
> ? ?llvm/trunk/lib/ExecutionEngine/MCJIT/MCJIT.h
> ? ?llvm/trunk/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp
> ? ?llvm/trunk/tools/llvm-rtdyld/llvm-rtdyld.cpp
>


where is MCJITMemoryManager.h?


From grosbach at apple.com  Mon Apr  4 18:31:44 2011
From: grosbach at apple.com (Jim Grosbach)
Date: Mon, 04 Apr 2011 16:31:44 -0700
Subject: [llvm-commits] [llvm] r128851 - in /llvm/trunk:
 include/llvm/ExecutionEngine/RuntimeDyld.h
 lib/ExecutionEngine/MCJIT/MCJIT.cpp lib/ExecutionEngine/MCJIT/MCJIT.h
 lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp
 tools/llvm-rtdyld/llvm-rtdyld.cpp
In-Reply-To: <BANLkTin=KvLSvQunEgrZ8NKomic=p2rp9g@mail.gmail.com>
References: <20110404230440.101662A6C12C@llvm.org>
	<BANLkTin=KvLSvQunEgrZ8NKomic=p2rp9g@mail.gmail.com>
Message-ID: <428F67B7-2917-417B-B311-847B2266ED1D@apple.com>


On Apr 4, 2011, at 4:29 PM, Francois Pichet wrote:

> On Mon, Apr 4, 2011 at 7:04 PM, Jim Grosbach <grosbach at apple.com> wrote:
>> Author: grosbach
>> Date: Mon Apr  4 18:04:39 2011
>> New Revision: 128851
>> 
>> URL: http://llvm.org/viewvc/llvm-project?rev=128851&view=rev
>> Log:
>> Layer the memory manager between the JIT and the runtime Dyld.
>> 
>> The JITMemory manager references LLVM IR constructs directly, while the
>> runtime Dyld works at a lower level and can handle objects which may not
>> originate from LLVM IR. Introduce a new layer for the memory manager to
>> handle the interface between them. For the MCJIT, this layer will be almost
>> entirely simply a call-through w/ translation between the IR objects and
>> symbol names.
>> 
>> Modified:
>>    llvm/trunk/include/llvm/ExecutionEngine/RuntimeDyld.h
>>    llvm/trunk/lib/ExecutionEngine/MCJIT/MCJIT.cpp
>>    llvm/trunk/lib/ExecutionEngine/MCJIT/MCJIT.h
>>    llvm/trunk/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp
>>    llvm/trunk/tools/llvm-rtdyld/llvm-rtdyld.cpp
>> 
> 
> 
> where is MCJITMemoryManager.h?

Running late to the party due to suffering from my moving back and forth between git and svn.

i.e., I forgot to "svn add" it before hitting commit.  Fixed in 128856.

From johnny.chen at apple.com  Mon Apr  4 18:39:08 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Mon, 04 Apr 2011 23:39:08 -0000
Subject: [llvm-commits] [llvm] r128859 - in /llvm/trunk/lib/Target/ARM:
 ARMInstrInfo.td Disassembler/ARMDisassemblerCore.cpp
 Disassembler/ARMDisassemblerCore.h
Message-ID: <20110404233908.CFBD72A6C12C@llvm.org>

Author: johnny
Date: Mon Apr  4 18:39:08 2011
New Revision: 128859

URL: http://llvm.org/viewvc/llvm-project?rev=128859&view=rev
Log:
RFE encoding should also specify the "should be" encoding bits.

rdar://problem/9229922 ARM disassembler discrepancy: erroneously accepting RFE

Also LDC/STC instructions are predicated while LDC2/STC2 instructions are not, fixed while
doing regression testings.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.h

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=128859&r1=128858&r2=128859&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Mon Apr  4 18:39:08 2011
@@ -1604,6 +1604,7 @@
                 [/* For disassembly only; pattern left blank */]> {
   let Inst{31-28} = 0b1111;
   let Inst{22-20} = 0b011; // W = 1
+  let Inst{15-0} = 0x0a00;
 }
 
 def RFE  : ABXI<{1,0,0,?}, (outs), (ins ldstm_mode:$amode, GPR:$base),
@@ -1611,6 +1612,7 @@
                 [/* For disassembly only; pattern left blank */]> {
   let Inst{31-28} = 0b1111;
   let Inst{22-20} = 0b001; // W = 0
+  let Inst{15-0} = 0x0a00;
 }
 } // isCodeGenOnly = 1
 
@@ -3434,16 +3436,16 @@
 
 class ACI<dag oops, dag iops, string opc, string asm,
           IndexMode im = IndexModeNone>
-  : I<oops, iops, AddrModeNone, Size4Bytes, im, BrFrm, NoItinerary,
-      opc, asm, "", [/* For disassembly only; pattern left blank */]> {
+  : InoP<oops, iops, AddrModeNone, Size4Bytes, im, BrFrm, NoItinerary,
+         opc, asm, "", [/* For disassembly only; pattern left blank */]> {
   let Inst{27-25} = 0b110;
 }
 
-multiclass LdStCop<bits<4> op31_28, bit load, string opc> {
+multiclass LdStCop<bits<4> op31_28, bit load, dag ops, string opc, string cond>{
 
   def _OFFSET : ACI<(outs),
-      (ins nohash_imm:$cop, nohash_imm:$CRd, addrmode2:$addr),
-      opc, "\tp$cop, cr$CRd, $addr"> {
+      !con((ins nohash_imm:$cop, nohash_imm:$CRd, addrmode2:$addr), ops),
+      !strconcat(opc, cond), "\tp$cop, cr$CRd, $addr"> {
     let Inst{31-28} = op31_28;
     let Inst{24} = 1; // P = 1
     let Inst{21} = 0; // W = 0
@@ -3452,8 +3454,8 @@
   }
 
   def _PRE : ACI<(outs),
-      (ins nohash_imm:$cop, nohash_imm:$CRd, addrmode2:$addr),
-      opc, "\tp$cop, cr$CRd, $addr!", IndexModePre> {
+      !con((ins nohash_imm:$cop, nohash_imm:$CRd, addrmode2:$addr), ops),
+      !strconcat(opc, cond), "\tp$cop, cr$CRd, $addr!", IndexModePre> {
     let Inst{31-28} = op31_28;
     let Inst{24} = 1; // P = 1
     let Inst{21} = 1; // W = 1
@@ -3462,8 +3464,8 @@
   }
 
   def _POST : ACI<(outs),
-      (ins nohash_imm:$cop, nohash_imm:$CRd, addrmode2:$addr),
-      opc, "\tp$cop, cr$CRd, $addr", IndexModePost> {
+      !con((ins nohash_imm:$cop, nohash_imm:$CRd, addrmode2:$addr), ops),
+      !strconcat(opc, cond), "\tp$cop, cr$CRd, $addr", IndexModePost> {
     let Inst{31-28} = op31_28;
     let Inst{24} = 0; // P = 0
     let Inst{21} = 1; // W = 1
@@ -3472,8 +3474,9 @@
   }
 
   def _OPTION : ACI<(outs),
-      (ins nohash_imm:$cop, nohash_imm:$CRd, GPR:$base, nohash_imm:$option),
-      opc, "\tp$cop, cr$CRd, [$base], \\{$option\\}"> {
+      !con((ins nohash_imm:$cop,nohash_imm:$CRd,GPR:$base, nohash_imm:$option),
+            ops),
+      !strconcat(opc, cond), "\tp$cop, cr$CRd, [$base], \\{$option\\}"> {
     let Inst{31-28} = op31_28;
     let Inst{24} = 0; // P = 0
     let Inst{23} = 1; // U = 1
@@ -3483,8 +3486,8 @@
   }
 
   def L_OFFSET : ACI<(outs),
-      (ins nohash_imm:$cop, nohash_imm:$CRd, addrmode2:$addr),
-      !strconcat(opc, "l"), "\tp$cop, cr$CRd, $addr"> {
+      !con((ins nohash_imm:$cop, nohash_imm:$CRd, addrmode2:$addr), ops),
+      !strconcat(!strconcat(opc, "l"), cond), "\tp$cop, cr$CRd, $addr"> {
     let Inst{31-28} = op31_28;
     let Inst{24} = 1; // P = 1
     let Inst{21} = 0; // W = 0
@@ -3493,8 +3496,9 @@
   }
 
   def L_PRE : ACI<(outs),
-      (ins nohash_imm:$cop, nohash_imm:$CRd, addrmode2:$addr),
-      !strconcat(opc, "l"), "\tp$cop, cr$CRd, $addr!", IndexModePre> {
+      !con((ins nohash_imm:$cop, nohash_imm:$CRd, addrmode2:$addr), ops),
+      !strconcat(!strconcat(opc, "l"), cond), "\tp$cop, cr$CRd, $addr!",
+      IndexModePre> {
     let Inst{31-28} = op31_28;
     let Inst{24} = 1; // P = 1
     let Inst{21} = 1; // W = 1
@@ -3503,8 +3507,9 @@
   }
 
   def L_POST : ACI<(outs),
-      (ins nohash_imm:$cop, nohash_imm:$CRd, addrmode2:$addr),
-      !strconcat(opc, "l"), "\tp$cop, cr$CRd, $addr", IndexModePost> {
+      !con((ins nohash_imm:$cop, nohash_imm:$CRd, addrmode2:$addr), ops),
+      !strconcat(!strconcat(opc, "l"), cond), "\tp$cop, cr$CRd, $addr",
+      IndexModePost> {
     let Inst{31-28} = op31_28;
     let Inst{24} = 0; // P = 0
     let Inst{21} = 1; // W = 1
@@ -3513,8 +3518,10 @@
   }
 
   def L_OPTION : ACI<(outs),
-      (ins nohash_imm:$cop, nohash_imm:$CRd, GPR:$base, nohash_imm:$option),
-      !strconcat(opc, "l"), "\tp$cop, cr$CRd, [$base], \\{$option\\}"> {
+      !con((ins nohash_imm:$cop, nohash_imm:$CRd,GPR:$base,nohash_imm:$option),
+            ops),
+      !strconcat(!strconcat(opc, "l"), cond),
+      "\tp$cop, cr$CRd, [$base], \\{$option\\}"> {
     let Inst{31-28} = op31_28;
     let Inst{24} = 0; // P = 0
     let Inst{23} = 1; // U = 1
@@ -3524,10 +3531,10 @@
   }
 }
 
-defm LDC  : LdStCop<{?,?,?,?}, 1, "ldc">;
-defm LDC2 : LdStCop<0b1111,    1, "ldc2">;
-defm STC  : LdStCop<{?,?,?,?}, 0, "stc">;
-defm STC2 : LdStCop<0b1111,    0, "stc2">;
+defm LDC  : LdStCop<{?,?,?,?}, 1, (ins pred:$p), "ldc",  "${p}">;
+defm LDC2 : LdStCop<0b1111,    1, (ins),         "ldc2", "">;
+defm STC  : LdStCop<{?,?,?,?}, 0, (ins pred:$p), "stc",  "${p}">;
+defm STC2 : LdStCop<0b1111,    0, (ins),         "stc2", "">;
 
 //===----------------------------------------------------------------------===//
 // Move between coprocessor and ARM core register -- for disassembly only

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp?rev=128859&r1=128858&r2=128859&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp Mon Apr  4 18:39:08 2011
@@ -618,7 +618,7 @@
 static bool DisassembleCoprocessor(MCInst &MI, unsigned Opcode, uint32_t insn,
     unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
-  assert(NumOps >= 5 && "Num of operands >= 5 for coprocessor instr");
+  assert(NumOps >= 4 && "Num of operands >= 4 for coprocessor instr");
 
   unsigned &OpIdx = NumOpsAdded;
   bool OneCopOpc = (Opcode == ARM::MCRR || Opcode == ARM::MCRR2 ||
@@ -1296,8 +1296,10 @@
   MI.addOperand(MCOperand::CreateReg(Base));
 
   // Handling the two predicate operands before the reglist.
-  int64_t CondVal = insn >> ARMII::CondShift;
-  MI.addOperand(MCOperand::CreateImm(CondVal == 0xF ? 0xE : CondVal));
+  int64_t CondVal = getCondField(insn);
+  if (CondVal == 0xF)
+    return false;
+  MI.addOperand(MCOperand::CreateImm(CondVal));
   MI.addOperand(MCOperand::CreateReg(ARM::CPSR));
 
   NumOpsAdded += 3;
@@ -1863,8 +1865,10 @@
   MI.addOperand(MCOperand::CreateReg(Base));
 
   // Handling the two predicate operands before the reglist.
-  int64_t CondVal = insn >> ARMII::CondShift;
-  MI.addOperand(MCOperand::CreateImm(CondVal == 0xF ? 0xE : CondVal));
+  int64_t CondVal = getCondField(insn);
+  if (CondVal == 0xF)
+    return false;
+  MI.addOperand(MCOperand::CreateImm(CondVal));
   MI.addOperand(MCOperand::CreateReg(ARM::CPSR));
 
   OpIdx += 3;
@@ -3357,6 +3361,7 @@
   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
   const std::string &Name = ARMInsts[Opcode].Name;
   unsigned Idx = MI.getNumOperands();
+  uint64_t TSFlags = ARMInsts[Opcode].TSFlags;
 
   // First, we check whether this instr specifies the PredicateOperand through
   // a pair of TargetOperandInfos with isPredicate() property.
@@ -3384,6 +3389,9 @@
           MI.addOperand(MCOperand::CreateImm(ARMCC::AL));
       } else {
         // ARM instructions get their condition field from Inst{31-28}.
+        // We should reject Inst{31-28} = 0b1111 as invalid encoding.
+        if (!isNEONDomain(TSFlags) && getCondField(insn) == 0xF)
+          return false;
         MI.addOperand(MCOperand::CreateImm(CondCode(getCondField(insn))));
       }
     }

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.h?rev=128859&r1=128858&r2=128859&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.h (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.h Mon Apr  4 18:39:08 2011
@@ -141,6 +141,12 @@
   return (TSFlags & ARMII::UnaryDP);
 }
 
+/// A NEON Domain instruction has cond field (Inst{31-28}) as 0b1111.
+static inline bool isNEONDomain(uint64_t TSFlags) {
+  return (TSFlags & ARMII::DomainNEON) ||
+         (TSFlags & ARMII::DomainNEONA8);
+}
+
 /// This four-bit field describes the addressing mode used.
 /// See also ARMBaseInstrInfo.h.
 static inline unsigned getAddrMode(uint64_t TSFlags) {



From isanbard at gmail.com  Mon Apr  4 18:42:51 2011
From: isanbard at gmail.com (Bill Wendling)
Date: Mon, 04 Apr 2011 23:42:51 -0000
Subject: [llvm-commits] [llvm] r128860 - /llvm/trunk/docs/GettingStarted.html
Message-ID: <20110404234251.B5C012A6C12C@llvm.org>

Author: void
Date: Mon Apr  4 18:42:51 2011
New Revision: 128860

URL: http://llvm.org/viewvc/llvm-project?rev=128860&view=rev
Log:
Add info on where to get 2.9 final svn sources.

Modified:
    llvm/trunk/docs/GettingStarted.html

Modified: llvm/trunk/docs/GettingStarted.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/GettingStarted.html?rev=128860&r1=128859&r2=128860&view=diff
==============================================================================
--- llvm/trunk/docs/GettingStarted.html (original)
+++ llvm/trunk/docs/GettingStarted.html Mon Apr  4 18:42:51 2011
@@ -743,6 +743,7 @@
 subdirectories of the '<tt>tags</tt>' directory:</p>
 
 <ul>
+<li>Release 2.9: <b>RELEASE_29/final</b></li>
 <li>Release 2.8: <b>RELEASE_28</b></li>
 <li>Release 2.7: <b>RELEASE_27</b></li>
 <li>Release 2.6: <b>RELEASE_26</b></li>



From johnny.chen at apple.com  Mon Apr  4 18:57:05 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Mon, 04 Apr 2011 23:57:05 -0000
Subject: [llvm-commits] [llvm] r128862 -
	/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
Message-ID: <20110404235705.6D3A22A6C12C@llvm.org>

Author: johnny
Date: Mon Apr  4 18:57:05 2011
New Revision: 128862

URL: http://llvm.org/viewvc/llvm-project?rev=128862&view=rev
Log:
A8.6.105 MUL
Inst{15-12} should be specified as 0b0000.

rdar://problem/9231168 ARM disassembler discrepancy: erroneously accepting MUL

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=128862&r1=128861&r2=128862&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Mon Apr  4 18:57:05 2011
@@ -2687,7 +2687,9 @@
 def MUL  : AsMul1I32<0b0000000, (outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm),
                    IIC_iMUL32, "mul", "\t$Rd, $Rn, $Rm",
                    [(set GPR:$Rd, (mul GPR:$Rn, GPR:$Rm))]>,
-                   Requires<[IsARM, HasV6]>;
+                   Requires<[IsARM, HasV6]> {
+  let Inst{15-12} = 0b0000;
+}
 }
 
 let Constraints = "@earlyclobber $Rd" in



From nlewycky at google.com  Mon Apr  4 19:16:01 2011
From: nlewycky at google.com (Nick Lewycky)
Date: Mon, 4 Apr 2011 17:16:01 -0700
Subject: [llvm-commits] [llvm] r123704 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
In-Reply-To: <20110118000928.2D35C2A6C12C@llvm.org>
References: <20110118000928.2D35C2A6C12C@llvm.org>
Message-ID: <BANLkTimWE1eNZU+cuCtqfcyix_GMyhjH+Q@mail.gmail.com>

On 17 January 2011 16:09, Stuart Hastings <stuart at apple.com> wrote:

> Author: stuart
> Date: Mon Jan 17 18:09:27 2011
> New Revision: 123704
>
> URL: http://llvm.org/viewvc/llvm-project?rev=123704&view=rev
> Log:
> Remove checking that prevented overlapping CALLSEQ_START/CALLSEQ_END
> ranges, add legalizer support for nested calls.  Necessary for ARM
> byval support.  Radar 7662569.
>
> Modified:
>    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=123704&r1=123703&r2=123704&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Mon Jan 17 18:09:27
> 2011
> @@ -66,11 +66,6 @@
>   /// against each other, including inserted libcalls.
>   SDValue LastCALLSEQ_END;
>
> -  /// IsLegalizingCall - This member is used *only* for purposes of
> providing
> -  /// helpful assertions that a libcall isn't created while another call
> is
> -  /// being legalized (which could lead to non-serialized call sequences).
> -  bool IsLegalizingCall;
> -
>   enum LegalizeAction {
>     Legal,      // The target natively supports this operation.
>     Promote,    // This operation should be executed in a larger type.
> @@ -225,7 +220,6 @@
>
>  void SelectionDAGLegalize::LegalizeDAG() {
>   LastCALLSEQ_END = DAG.getEntryNode();
> -  IsLegalizingCall = false;
>
>   // The legalize process is inherently a bottom-up recursive process
> (users
>   // legalize their uses before themselves).  Given infinite stack space,
> we
> @@ -1024,6 +1018,7 @@
>     }
>     break;
>   case ISD::CALLSEQ_START: {
> +    static int depth = 0;
>

Hi Stuart, this breaks using llvm from multiple threads. Please don't use
non-constant statics.

Nick


>     SDNode *CallEnd = FindCallEndFromCallStart(Node);
>
>     // Recursively Legalize all of the inputs of the call end that do not
> lead
> @@ -1041,7 +1036,7 @@
>
>     // Merge in the last call to ensure that this call starts after the
> last
>     // call ended.
> -    if (LastCALLSEQ_END.getOpcode() != ISD::EntryToken) {
> +    if (LastCALLSEQ_END.getOpcode() != ISD::EntryToken && depth == 0) {
>       Tmp1 = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
>                          Tmp1, LastCALLSEQ_END);
>       Tmp1 = LegalizeOp(Tmp1);
> @@ -1064,14 +1059,18 @@
>     // sequence have been legalized, legalize the call itself.  During this
>     // process, no libcalls can/will be inserted, guaranteeing that no
> calls
>     // can overlap.
> -    assert(!IsLegalizingCall && "Inconsistent sequentialization of
> calls!");
> +
> +    SDValue Saved_LastCALLSEQ_END = LastCALLSEQ_END ;
>     // Note that we are selecting this call!
>     LastCALLSEQ_END = SDValue(CallEnd, 0);
> -    IsLegalizingCall = true;
>
> +    depth++;
>     // Legalize the call, starting from the CALLSEQ_END.
>     LegalizeOp(LastCALLSEQ_END);
> -    assert(!IsLegalizingCall && "CALLSEQ_END should have cleared this!");
> +    depth--;
> +    assert(depth >= 0 && "Un-matched CALLSEQ_START?");
> +    if (depth > 0)
> +      LastCALLSEQ_END = Saved_LastCALLSEQ_END;
>     return Result;
>   }
>   case ISD::CALLSEQ_END:
> @@ -1110,10 +1109,7 @@
>                          Result.getResNo());
>       }
>     }
> -    assert(IsLegalizingCall && "Call sequence imbalance between
> start/end?");
>     // This finishes up call legalization.
> -    IsLegalizingCall = false;
> -
>     // If the CALLSEQ_END node has a flag, remember that we legalized it.
>     AddLegalizedOperand(SDValue(Node, 0), Result.getValue(0));
>     if (Node->getNumValues() == 2)
> @@ -1949,7 +1945,6 @@
>  // and leave the Hi part unset.
>  SDValue SelectionDAGLegalize::ExpandLibCall(RTLIB::Libcall LC, SDNode
> *Node,
>                                             bool isSigned) {
> -  assert(!IsLegalizingCall && "Cannot overlap legalization of calls!");
>   // The input chain to this libcall is the entry node of the function.
>   // Legalizing the call will automatically add the previous call to the
>   // dependence.
> @@ -1997,7 +1992,6 @@
>  SelectionDAGLegalize::ExpandChainLibCall(RTLIB::Libcall LC,
>                                          SDNode *Node,
>                                          bool isSigned) {
> -  assert(!IsLegalizingCall && "Cannot overlap legalization of calls!");
>   SDValue InChain = Node->getOperand(0);
>
>   TargetLowering::ArgListTy Args;
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
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From johnny.chen at apple.com  Mon Apr  4 19:16:18 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Tue, 05 Apr 2011 00:16:18 -0000
Subject: [llvm-commits] [llvm] r128864 - in /llvm/trunk:
 lib/Target/ARM/ARMInstrInfo.td
 test/MC/Disassembler/ARM/invalid-RFEorLDMIA-arm.txt
 test/MC/Disassembler/ARM/invalid-SRS-arm.txt
Message-ID: <20110405001618.4F4262A6C12C@llvm.org>

Author: johnny
Date: Mon Apr  4 19:16:18 2011
New Revision: 128864

URL: http://llvm.org/viewvc/llvm-project?rev=128864&view=rev
Log:
Fix SRS/SRSW encoding bits.
rdar://problem/9230801 ARM disassembler discrepancy: erroneously accepting SRS

Plus add invalid-RFEorLDMIA-arm.txt test which should have been checked in with
http://llvm.org/viewvc/llvm-project?view=rev&revision=128859.

Added:
    llvm/trunk/test/MC/Disassembler/ARM/invalid-RFEorLDMIA-arm.txt
    llvm/trunk/test/MC/Disassembler/ARM/invalid-SRS-arm.txt
Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=128864&r1=128863&r2=128864&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Mon Apr  4 19:16:18 2011
@@ -1589,6 +1589,8 @@
                 [/* For disassembly only; pattern left blank */]> {
   let Inst{31-28} = 0b1111;
   let Inst{22-20} = 0b110; // W = 1
+  let Inst{19-8} = 0xd05;
+  let Inst{7-5} = 0b000;
 }
 
 def SRS  : ABXI<{1,0,0,?}, (outs), (ins ldstm_mode:$amode, i32imm:$mode),
@@ -1596,6 +1598,8 @@
                 [/* For disassembly only; pattern left blank */]> {
   let Inst{31-28} = 0b1111;
   let Inst{22-20} = 0b100; // W = 0
+  let Inst{19-8} = 0xd05;
+  let Inst{7-5} = 0b000;
 }
 
 // Return From Exception is a system instruction -- for disassembly only

Added: llvm/trunk/test/MC/Disassembler/ARM/invalid-RFEorLDMIA-arm.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/invalid-RFEorLDMIA-arm.txt?rev=128864&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/invalid-RFEorLDMIA-arm.txt (added)
+++ llvm/trunk/test/MC/Disassembler/ARM/invalid-RFEorLDMIA-arm.txt Mon Apr  4 19:16:18 2011
@@ -0,0 +1,11 @@
+# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding}
+
+# Opcode=134 Name=LDMIA Format=ARM_FORMAT_LDSTMULFRM(10)
+# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
+# -------------------------------------------------------------------------------------------------
+# | 1: 1: 1: 1| 1: 0: 0: 0| 1: 0: 0: 1| 1: 0: 0: 1| 1: 0: 1: 1| 0: 0: 0: 1| 0: 0: 1: 1| 0: 0: 1: 0|
+# -------------------------------------------------------------------------------------------------
+#
+# B6.1.8 RFE has Inst{15-0} as 0x0a00 ==> Not an RFE instruction
+# A8.6.53 LDM/LDMIA/LDMFD is predicated with Inst{31-28} as cond ==> Not an LDMIA instruction
+0x32 0xb1 0x99 0xf8

Added: llvm/trunk/test/MC/Disassembler/ARM/invalid-SRS-arm.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/invalid-SRS-arm.txt?rev=128864&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/invalid-SRS-arm.txt (added)
+++ llvm/trunk/test/MC/Disassembler/ARM/invalid-SRS-arm.txt Mon Apr  4 19:16:18 2011
@@ -0,0 +1,13 @@
+# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding}
+
+# Opcode=0 Name=PHI Format=(42)
+#  31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
+# -------------------------------------------------------------------------------------------------
+# | 1: 1: 1: 1| 1: 0: 0: 0| 1: 1: 0: 0| 0: 1: 0: 1| 0: 0: 0: 1| 1: 1: 0: 0| 1: 0: 0: 0| 0: 0: 1: 1|
+# -------------------------------------------------------------------------------------------------
+# Unknown format
+#
+# B6.1.10 SRS
+# Inst{19-8} = 0xd05
+# Inst{7-5} = 0b000
+0x83 0x1c 0xc5 0xf8



From echristo at apple.com  Mon Apr  4 19:30:54 2011
From: echristo at apple.com (Eric Christopher)
Date: Mon, 04 Apr 2011 17:30:54 -0700
Subject: [llvm-commits] [PATCH] Use predicates more often when
	optimizing	for size
In-Reply-To: <20110403045626.GA27536@flcl.lan>
References: <20110403045626.GA27536@flcl.lan>
Message-ID: <A69A404A-D4E6-4FAE-8257-F1B5428BA665@apple.com>


On Apr 2, 2011, at 9:56 PM, Sean Bartell wrote:

> When optimizing for size, we want to use predicates instead of branches
> to save a few instructions. Predicates are used when the resulting code
> is at least 1/2 as fast as with branching; this includes almost all
> cases where predicates can be used. There are, of course, other
> heuristics--I think GCC just uses a limit of 8 instructions.
> 
> Tested with make check in LLVM. I'd appreciate any feedback, since if
> I'm accepted into GSoC I'll be doing this much more often :).

Right now optimizing for size in llvm is generally "optimize for size
without penalizing performance" instead of "optimize for size at all
costs".

Otherwise the patch itself looked just fine :)

-eric

From stoklund at 2pi.dk  Mon Apr  4 19:32:44 2011
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Tue, 05 Apr 2011 00:32:44 -0000
Subject: [llvm-commits] [llvm] r128867 - /llvm/trunk/test/CodeGen/X86/
Message-ID: <20110405003244.AAAB02A6C12C@llvm.org>

Author: stoklund
Date: Mon Apr  4 19:32:44 2011
New Revision: 128867

URL: http://llvm.org/viewvc/llvm-project?rev=128867&view=rev
Log:
Fix register-dependent X86 tests.

Modified:
    llvm/trunk/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll
    llvm/trunk/test/CodeGen/X86/2009-02-20-PreAllocSplit-Crash.ll
    llvm/trunk/test/CodeGen/X86/2009-04-21-NoReloadImpDef.ll
    llvm/trunk/test/CodeGen/X86/fold-pcmpeqd-0.ll
    llvm/trunk/test/CodeGen/X86/fold-pcmpeqd-2.ll
    llvm/trunk/test/CodeGen/X86/isel-sink3.ll
    llvm/trunk/test/CodeGen/X86/loop-strength-reduce4.ll
    llvm/trunk/test/CodeGen/X86/lsr-reuse-trunc.ll
    llvm/trunk/test/CodeGen/X86/mmx-copy-gprs.ll
    llvm/trunk/test/CodeGen/X86/optimize-max-3.ll
    llvm/trunk/test/CodeGen/X86/or-address.ll
    llvm/trunk/test/CodeGen/X86/postra-licm.ll
    llvm/trunk/test/CodeGen/X86/pr3495-2.ll
    llvm/trunk/test/CodeGen/X86/pr3495.ll
    llvm/trunk/test/CodeGen/X86/pre-split1.ll
    llvm/trunk/test/CodeGen/X86/pre-split10.ll
    llvm/trunk/test/CodeGen/X86/pre-split11.ll
    llvm/trunk/test/CodeGen/X86/pre-split2.ll
    llvm/trunk/test/CodeGen/X86/pre-split3.ll
    llvm/trunk/test/CodeGen/X86/pre-split4.ll
    llvm/trunk/test/CodeGen/X86/pre-split5.ll
    llvm/trunk/test/CodeGen/X86/pre-split6.ll
    llvm/trunk/test/CodeGen/X86/pre-split7.ll
    llvm/trunk/test/CodeGen/X86/pre-split8.ll
    llvm/trunk/test/CodeGen/X86/pre-split9.ll
    llvm/trunk/test/CodeGen/X86/sse2.ll
    llvm/trunk/test/CodeGen/X86/sse3.ll
    llvm/trunk/test/CodeGen/X86/tail-opts.ll
    llvm/trunk/test/CodeGen/X86/tailcallstack64.ll
    llvm/trunk/test/CodeGen/X86/win64_alloca_dynalloca.ll

Modified: llvm/trunk/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll?rev=128867&r1=128866&r2=128867&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll Mon Apr  4 19:32:44 2011
@@ -1,6 +1,8 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx | grep {movd	%rsi, %mm0}
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx | grep {movd	%rdi, %mm1}
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx | grep {paddusw	%mm0, %mm1}
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx | FileCheck %s
+
+; CHECK: movd %rsi, [[MM0:%mm[0-9]+]]
+; CHECK: movd %rdi, [[MM1:%mm[0-9]+]]
+; CHECK: paddusw [[MM0]], [[MM1]]
 
 @R = external global x86_mmx		; <x86_mmx*> [#uses=1]
 

Modified: llvm/trunk/test/CodeGen/X86/2009-02-20-PreAllocSplit-Crash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-02-20-PreAllocSplit-Crash.ll?rev=128867&r1=128866&r2=128867&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-02-20-PreAllocSplit-Crash.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-02-20-PreAllocSplit-Crash.ll Mon Apr  4 19:32:44 2011
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mtriple=i386-apple-darwin8 -pre-alloc-split
+; RUN: llc < %s -march=x86 -mtriple=i386-apple-darwin8 -pre-alloc-split -regalloc=linearscan
 
 define i32 @main() nounwind {
 bb4.i.thread:

Modified: llvm/trunk/test/CodeGen/X86/2009-04-21-NoReloadImpDef.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-04-21-NoReloadImpDef.ll?rev=128867&r1=128866&r2=128867&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-04-21-NoReloadImpDef.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-04-21-NoReloadImpDef.ll Mon Apr  4 19:32:44 2011
@@ -1,5 +1,5 @@
 ; RUN: llc -mtriple=i386-apple-darwin10.0 -relocation-model=pic -asm-verbose=false \
-; RUN:     -disable-fp-elim -mattr=-sse41,-sse3,+sse2 -post-RA-scheduler=false < %s | \
+; RUN:     -disable-fp-elim -mattr=-sse41,-sse3,+sse2 -post-RA-scheduler=false -regalloc=linearscan < %s | \
 ; RUN:   FileCheck %s
 ; rdar://6808032
 

Modified: llvm/trunk/test/CodeGen/X86/fold-pcmpeqd-0.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fold-pcmpeqd-0.ll?rev=128867&r1=128866&r2=128867&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fold-pcmpeqd-0.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fold-pcmpeqd-0.ll Mon Apr  4 19:32:44 2011
@@ -1,11 +1,21 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah  | not grep pcmpeqd
-; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah  | grep orps | grep CPI0_2  | count 2
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep pcmpeqd | count 1
+; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah -regalloc=linearscan | FileCheck --check-prefix=I386 %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck --check-prefix=X86-64 %s
 
 ; This testcase shouldn't need to spill the -1 value,
 ; so it should just use pcmpeqd to materialize an all-ones vector.
 ; For i386, cp load of -1 are folded.
 
+; With -regalloc=greedy, the live range is split before spilling, so the first
+; pcmpeq doesn't get folded as a constant pool load.
+
+; I386-NOT: pcmpeqd
+; I386: orps LCPI0_2, %xmm
+; I386-NOT: pcmpeqd
+; I386: orps LCPI0_2, %xmm
+
+; X86-64: pcmpeqd
+; X86-64-NOT: pcmpeqd
+
 	%struct.__ImageExecInfo = type <{ <4 x i32>, <4 x float>, <2 x i64>, i8*, i8*, i8*, i32, i32, i32, i32, i32 }>
 	%struct._cl_image_format_t = type <{ i32, i32, i32 }>
 	%struct._image2d_t = type <{ i8*, %struct._cl_image_format_t, i32, i32, i32, i32, i32, i32 }>

Modified: llvm/trunk/test/CodeGen/X86/fold-pcmpeqd-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fold-pcmpeqd-2.ll?rev=128867&r1=128866&r2=128867&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fold-pcmpeqd-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fold-pcmpeqd-2.ll Mon Apr  4 19:32:44 2011
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah -regalloc=linearscan | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -regalloc=linearscan | FileCheck %s
 
 ; This testcase should need to spill the -1 value on both x86-32 and x86-64,
 ; so it shouldn't use pcmpeqd to materialize an all-ones vector; it

Modified: llvm/trunk/test/CodeGen/X86/isel-sink3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/isel-sink3.ll?rev=128867&r1=128866&r2=128867&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/isel-sink3.ll (original)
+++ llvm/trunk/test/CodeGen/X86/isel-sink3.ll Mon Apr  4 19:32:44 2011
@@ -1,9 +1,11 @@
-; RUN: llc < %s | grep {addl.\$4, %ecx}
-; RUN: llc < %s | not grep leal
+; RUN: llc < %s | FileCheck %s
 ; this should not sink %1 into bb1, that would increase reg pressure.
 
 ; rdar://6399178
 
+; CHECK: addl $4,
+; CHECK-NOT: leal
+
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
 target triple = "i386-apple-darwin7"
 

Modified: llvm/trunk/test/CodeGen/X86/loop-strength-reduce4.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/loop-strength-reduce4.ll?rev=128867&r1=128866&r2=128867&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/loop-strength-reduce4.ll (original)
+++ llvm/trunk/test/CodeGen/X86/loop-strength-reduce4.ll Mon Apr  4 19:32:44 2011
@@ -4,10 +4,10 @@
 ; By starting the IV at -64 instead of 0, a cmp is eliminated,
 ; as the flags from the add can be used directly.
 
-; STATIC: movl    $-64, %ecx
+; STATIC: movl    $-64, [[ECX:%e..]]
 
-; STATIC: movl    %eax, _state+76(%ecx)
-; STATIC: addl    $16, %ecx
+; STATIC: movl    [[EAX:%e..]], _state+76([[ECX]])
+; STATIC: addl    $16, [[ECX]]
 ; STATIC: jne
 
 ; In PIC mode the symbol can't be folded, so the change-compare-stride

Modified: llvm/trunk/test/CodeGen/X86/lsr-reuse-trunc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/lsr-reuse-trunc.ll?rev=128867&r1=128866&r2=128867&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/lsr-reuse-trunc.ll (original)
+++ llvm/trunk/test/CodeGen/X86/lsr-reuse-trunc.ll Mon Apr  4 19:32:44 2011
@@ -4,8 +4,9 @@
 ; Full strength reduction wouldn't reduce register pressure, so LSR should
 ; stick with indexing here.
 
-; CHECK: movaps        (%{{rsi|rdx}},%rax,4), %xmm3
-; CHECK: movaps        %xmm3, (%{{rdi|rcx}},%rax,4)
+; CHECK: movaps        (%{{rsi|rdx}},%rax,4), [[X3:%xmm[0-9]+]]
+; CHECK: movaps
+; CHECK:        [[X3]], (%{{rdi|rcx}},%rax,4)
 ; CHECK: addq  $4, %rax
 ; CHECK: cmpl  %eax, (%{{rdx|r8}})
 ; CHECK-NEXT: jg

Modified: llvm/trunk/test/CodeGen/X86/mmx-copy-gprs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mmx-copy-gprs.ll?rev=128867&r1=128866&r2=128867&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mmx-copy-gprs.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mmx-copy-gprs.ll Mon Apr  4 19:32:44 2011
@@ -1,14 +1,12 @@
-; RUN: llc < %s -mtriple=x86_64-linux   | FileCheck %s -check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-win32   | FileCheck %s -check-prefix=X64
-; X64: movq ({{%rsi|%rdx}}), %rax
-; RUN: llc < %s -march=x86 -mattr=-sse2 | FileCheck %s -check-prefix=X32
-; X32: movl 4(%eax),
-; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s -check-prefix=XMM
-; XMM: movsd (%eax),
+; RUN: llc < %s -mtriple=x86_64-linux   | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-win32   | FileCheck %s
+; RUN: llc < %s -march=x86 -mattr=-sse2 | FileCheck %s
+; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s
 
 ; This test should use GPRs to copy the mmx value, not MMX regs.  Using mmx regs,
 ; increases the places that need to use emms.
-
+; CHECK-NOT: %mm
+; CHECK-NOT: emms
 ; rdar://5741668
 
 define void @foo(<1 x i64>* %x, <1 x i64>* %y) nounwind  {

Modified: llvm/trunk/test/CodeGen/X86/optimize-max-3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/optimize-max-3.ll?rev=128867&r1=128866&r2=128867&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/optimize-max-3.ll (original)
+++ llvm/trunk/test/CodeGen/X86/optimize-max-3.ll Mon Apr  4 19:32:44 2011
@@ -45,8 +45,8 @@
 ; CHECK-NEXT:         align
 ; CHECK-NEXT: BB1_2:
 ; CHECK-NEXT:         callq
-; CHECK-NEXT:         incl    [[BX:%ebx|%esi]]
-; CHECK-NEXT:         cmpl    [[R14:%r14d|%edi]], [[BX]]
+; CHECK-NEXT:         incl    [[BX:%[a-z0-9]+]]
+; CHECK-NEXT:         cmpl    [[R14:%[a-z0-9]+]], [[BX]]
 ; CHECK-NEXT:         movq    %rax, %r{{di|cx}}
 ; CHECK-NEXT:         jl
 

Modified: llvm/trunk/test/CodeGen/X86/or-address.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/or-address.ll?rev=128867&r1=128866&r2=128867&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/or-address.ll (original)
+++ llvm/trunk/test/CodeGen/X86/or-address.ll Mon Apr  4 19:32:44 2011
@@ -4,10 +4,10 @@
 target triple = "x86_64-apple-darwin10.3"
 
 
-; CHECK: 	movl	%{{.*}},   (%rdi,%rdx,4)
-; CHECK:	movl	%{{.*}},  8(%rdi,%rdx,4)
-; CHECK:	movl	%{{.*}},  4(%rdi,%rdx,4)
-; CHECK:	movl	%{{.*}}, 12(%rdi,%rdx,4)
+; CHECK: 	movl	%{{.*}},   (%rdi,[[R0:.+]],4)
+; CHECK:	movl	%{{.*}},  8(%rdi,[[R0]],4)
+; CHECK:	movl	%{{.*}},  4(%rdi,[[R0]],4)
+; CHECK:	movl	%{{.*}}, 12(%rdi,[[R0]],4)
 
 define void @test(i32* nocapture %array, i32 %r0) nounwind ssp noredzone {
 bb.nph:

Modified: llvm/trunk/test/CodeGen/X86/postra-licm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/postra-licm.ll?rev=128867&r1=128866&r2=128867&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/postra-licm.ll (original)
+++ llvm/trunk/test/CodeGen/X86/postra-licm.ll Mon Apr  4 19:32:44 2011
@@ -2,6 +2,7 @@
 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -relocation-model=pic -disable-fp-elim | FileCheck %s -check-prefix=X86-64
 
 ; MachineLICM should be able to hoist loop invariant reload out of the loop.
+; Only linear scan needs this, -regalloc=greedy sinks the spill instead.
 ; rdar://7233099
 
 %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
@@ -68,10 +69,12 @@
 
 bb23:                                             ; preds = %imix_test.exit
   unreachable
+; Verify that there are no loads inside the loop.
 ; X86-32: %bb26.preheader
-; X86-32: movl -16(%ebp),
-; X86-32-NEXT: .align 4
-; X86-32-NEXT: %bb28
+; X86-32: .align 4
+; X86-32-NOT: (%esp),
+; X86-32-NOT: (%ebp),
+; X86-32: jmp
 
 bb28:                                             ; preds = %bb28, %bb26.preheader
   %counter.035 = phi i32 [ %3, %bb28 ], [ 0, %bb26.preheader ] ; <i32> [#uses=2]

Modified: llvm/trunk/test/CodeGen/X86/pr3495-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr3495-2.ll?rev=128867&r1=128866&r2=128867&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr3495-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr3495-2.ll Mon Apr  4 19:32:44 2011
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -relocation-model=pic -disable-fp-elim -stats |& grep {Number of loads added} | grep 1
+; RUN: llc < %s -march=x86 -relocation-model=pic -disable-fp-elim -stats -regalloc=linearscan |& grep {Number of loads added} | grep 1
 ; PR3495
 ;
 ; This test may not be testing what it was supposed to test.

Modified: llvm/trunk/test/CodeGen/X86/pr3495.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr3495.ll?rev=128867&r1=128866&r2=128867&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr3495.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr3495.ll Mon Apr  4 19:32:44 2011
@@ -1,6 +1,6 @@
-; RUN: llc < %s -march=x86 -stats |& grep {Number of loads added} | grep 2
-; RUN: llc < %s -march=x86 -stats |& grep {Number of register spills} | grep 1
-; RUN: llc < %s -march=x86 -stats |& grep {Number of machine instrs printed} | grep 34
+; RUN: llc < %s -march=x86 -stats -regalloc=linearscan |& grep {Number of loads added} | grep 2
+; RUN: llc < %s -march=x86 -stats -regalloc=linearscan |& grep {Number of register spills} | grep 1
+; RUN: llc < %s -march=x86 -stats -regalloc=linearscan |& grep {Number of machine instrs printed} | grep 34
 ; PR3495
 
 target triple = "i386-pc-linux-gnu"

Modified: llvm/trunk/test/CodeGen/X86/pre-split1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pre-split1.ll?rev=128867&r1=128866&r2=128867&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pre-split1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pre-split1.ll Mon Apr  4 19:32:44 2011
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \
+; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -regalloc=linearscan -stats |& \
 ; RUN:   grep {pre-alloc-split} | grep {Number of intervals split} | grep 1
 ; XFAIL: *
 

Modified: llvm/trunk/test/CodeGen/X86/pre-split10.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pre-split10.ll?rev=128867&r1=128866&r2=128867&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pre-split10.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pre-split10.ll Mon Apr  4 19:32:44 2011
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split
+; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -regalloc=linearscan
 
 define i32 @main(i32 %argc, i8** %argv) nounwind {
 entry:

Modified: llvm/trunk/test/CodeGen/X86/pre-split11.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pre-split11.ll?rev=128867&r1=128866&r2=128867&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pre-split11.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pre-split11.ll Mon Apr  4 19:32:44 2011
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+sse2 -pre-alloc-split | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+sse2 -pre-alloc-split -regalloc=linearscan | FileCheck %s
 
 @.str = private constant [28 x i8] c"\0A\0ADOUBLE            D = %f\0A\00", align 1 ; <[28 x i8]*> [#uses=1]
 @.str1 = private constant [37 x i8] c"double to long    l1 = %ld\09\09(0x%lx)\0A\00", align 8 ; <[37 x i8]*> [#uses=1]

Modified: llvm/trunk/test/CodeGen/X86/pre-split2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pre-split2.ll?rev=128867&r1=128866&r2=128867&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pre-split2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pre-split2.ll Mon Apr  4 19:32:44 2011
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \
+; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -stats -regalloc=linearscan |& \
 ; RUN:   grep {pre-alloc-split} | count 2
 
 define i32 @t(i32 %arg) {

Modified: llvm/trunk/test/CodeGen/X86/pre-split3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pre-split3.ll?rev=128867&r1=128866&r2=128867&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pre-split3.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pre-split3.ll Mon Apr  4 19:32:44 2011
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \
+; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -regalloc=linearscan -stats |& \
 ; RUN:   grep {pre-alloc-split} | grep {Number of intervals split} | grep 1
 
 define i32 @t(i32 %arg) {

Modified: llvm/trunk/test/CodeGen/X86/pre-split4.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pre-split4.ll?rev=128867&r1=128866&r2=128867&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pre-split4.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pre-split4.ll Mon Apr  4 19:32:44 2011
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \
+; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -regalloc=linearscan -stats |& \
 ; RUN:   grep {pre-alloc-split} | grep {Number of intervals split} | grep 2
 
 define i32 @main(i32 %argc, i8** %argv) nounwind {

Modified: llvm/trunk/test/CodeGen/X86/pre-split5.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pre-split5.ll?rev=128867&r1=128866&r2=128867&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pre-split5.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pre-split5.ll Mon Apr  4 19:32:44 2011
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split
+; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -regalloc=linearscan
 
 target triple = "i386-apple-darwin9.5"
 	%struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }

Modified: llvm/trunk/test/CodeGen/X86/pre-split6.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pre-split6.ll?rev=128867&r1=128866&r2=128867&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pre-split6.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pre-split6.ll Mon Apr  4 19:32:44 2011
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -pre-alloc-split | grep {divsd	24} | count 1
+; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -pre-alloc-split -regalloc=linearscan | grep {divsd	24} | count 1
 
 @current_surfaces.b = external global i1		; <i1*> [#uses=1]
 

Modified: llvm/trunk/test/CodeGen/X86/pre-split7.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pre-split7.ll?rev=128867&r1=128866&r2=128867&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pre-split7.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pre-split7.ll Mon Apr  4 19:32:44 2011
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split
+; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -regalloc=linearscan
 
 @object_distance = external global double, align 8		; <double*> [#uses=1]
 @axis_slope_angle = external global double, align 8		; <double*> [#uses=1]

Modified: llvm/trunk/test/CodeGen/X86/pre-split8.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pre-split8.ll?rev=128867&r1=128866&r2=128867&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pre-split8.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pre-split8.ll Mon Apr  4 19:32:44 2011
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \
+; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -regalloc=linearscan -stats |& \
 ; RUN:   grep {pre-alloc-split} | grep {Number of intervals split} | grep 1
 
 @current_surfaces.b = external global i1		; <i1*> [#uses=1]

Modified: llvm/trunk/test/CodeGen/X86/pre-split9.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pre-split9.ll?rev=128867&r1=128866&r2=128867&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pre-split9.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pre-split9.ll Mon Apr  4 19:32:44 2011
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \
+; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -regalloc=linearscan -stats |& \
 ; RUN:   grep {pre-alloc-split} | grep {Number of intervals split} | grep 1
 
 @current_surfaces.b = external global i1		; <i1*> [#uses=1]

Modified: llvm/trunk/test/CodeGen/X86/sse2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse2.ll?rev=128867&r1=128866&r2=128867&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse2.ll Mon Apr  4 19:32:44 2011
@@ -178,9 +178,9 @@
         %tmp27 = shufflevector <4 x float> %tmp9, <4 x float> %tmp21, <4 x i32> < i32 0, i32 1, i32 4, i32 5 >                ; <<4 x float>> [#uses=1]
         ret <4 x float> %tmp27
 ; CHECK: test14:
-; CHECK: 	addps	%xmm1, %xmm0
-; CHECK: 	subps	%xmm1, %xmm2
-; CHECK: 	movlhps	%xmm2, %xmm0
+; CHECK: 	addps	[[X1:%xmm[0-9]+]], [[X0:%xmm[0-9]+]]
+; CHECK: 	subps	[[X1]], [[X2:%xmm[0-9]+]]
+; CHECK: 	movlhps	[[X2]], [[X0]]
 }
 
 define <4 x float> @test15(<4 x float>* %x, <4 x float>* %y) nounwind {

Modified: llvm/trunk/test/CodeGen/X86/sse3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse3.ll?rev=128867&r1=128866&r2=128867&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse3.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse3.ll Mon Apr  4 19:32:44 2011
@@ -168,12 +168,12 @@
         store <4 x i16> %6, <4 x i16>* @g2, align 8
         ret void
 ; X64: 	t10:
-; X64: 		pextrw	$4, %xmm0, %eax
-; X64: 		unpcklpd %xmm1, %xmm1
-; X64: 		pshuflw	$8, %xmm1, %xmm1
-; X64: 		pinsrw	$2, %eax, %xmm1
-; X64: 		pextrw	$6, %xmm0, %eax
-; X64: 		pinsrw	$3, %eax, %xmm1
+; X64: 		pextrw	$4, [[X0:%xmm[0-9]+]], %eax
+; X64: 		unpcklpd [[X1:%xmm[0-9]+]]
+; X64: 		pshuflw	$8, [[X1]], [[X1]]
+; X64: 		pinsrw	$2, %eax, [[X1]]
+; X64: 		pextrw	$6, [[X0]], %eax
+; X64: 		pinsrw	$3, %eax, [[X1]]
 }
 
 

Modified: llvm/trunk/test/CodeGen/X86/tail-opts.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tail-opts.ll?rev=128867&r1=128866&r2=128867&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tail-opts.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tail-opts.ll Mon Apr  4 19:32:44 2011
@@ -153,16 +153,20 @@
 ; an unconditional jump to complete a two-way conditional branch.
 
 ; CHECK: c_expand_expr_stmt:
-; CHECK:        jmp .LBB3_11
-; CHECK-NEXT: .LBB3_9:
-; CHECK-NEXT:   movq 8(%rax), %rax
-; CHECK-NEXT:   xorb %dl, %dl
-; CHECK-NEXT:   movb 16(%rax), %al
-; CHECK-NEXT:   cmpb $16, %al
-; CHECK-NEXT:   je .LBB3_11
-; CHECK-NEXT:   cmpb $23, %al
-; CHECK-NEXT:   jne .LBB3_14
-; CHECK-NEXT: .LBB3_11:
+;
+; This test only works when register allocation happens to use %rax for both
+; load addresses.
+;
+; CHE:        jmp .LBB3_11
+; CHE-NEXT: .LBB3_9:
+; CHE-NEXT:   movq 8(%rax), %rax
+; CHE-NEXT:   xorb %dl, %dl
+; CHE-NEXT:   movb 16(%rax), %al
+; CHE-NEXT:   cmpb $16, %al
+; CHE-NEXT:   je .LBB3_11
+; CHE-NEXT:   cmpb $23, %al
+; CHE-NEXT:   jne .LBB3_14
+; CHE-NEXT: .LBB3_11:
 
 %0 = type { %struct.rtx_def* }
 %struct.lang_decl = type opaque

Modified: llvm/trunk/test/CodeGen/X86/tailcallstack64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tailcallstack64.ll?rev=128867&r1=128866&r2=128867&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tailcallstack64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tailcallstack64.ll Mon Apr  4 19:32:44 2011
@@ -6,15 +6,15 @@
 
 ; Check that lowered arguments on the stack do not overwrite each other.
 ; Add %in1 %p1 to a different temporary register (%eax).
-; CHECK: movl  [[A1:32|144]](%rsp), %eax
+; CHECK: movl  [[A1:32|144]](%rsp), [[R1:%e..]]
 ; Move param %in1 to temp register (%r10d).
-; CHECK: movl  [[A2:40|152]](%rsp), %r10d
+; CHECK: movl  [[A2:40|152]](%rsp), [[R2:%[a-z0-9]+]]
 ; Add %in1 %p1 to a different temporary register (%eax).
-; CHECK: addl {{%edi|%ecx}}, %eax
+; CHECK: addl {{%edi|%ecx}}, [[R1]]
 ; Move param %in2 to stack.
-; CHECK: movl  %r10d, [[A1]](%rsp)
+; CHECK: movl  [[R2]], [[A1]](%rsp)
 ; Move result of addition to stack.
-; CHECK: movl  %eax, [[A2]](%rsp)
+; CHECK: movl  [[R1]], [[A2]](%rsp)
 ; Eventually, do a TAILCALL
 ; CHECK: TAILCALL
 

Modified: llvm/trunk/test/CodeGen/X86/win64_alloca_dynalloca.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/win64_alloca_dynalloca.ll?rev=128867&r1=128866&r2=128867&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/win64_alloca_dynalloca.ll (original)
+++ llvm/trunk/test/CodeGen/X86/win64_alloca_dynalloca.ll Mon Apr  4 19:32:44 2011
@@ -40,10 +40,10 @@
 ; W64: subq  %rax, %rsp
 ; W64: movq  %rsp, %rax
 
-; EFI: leaq  15(%rcx), %rax
-; EFI: andq  $-16, %rax
+; EFI: leaq  15(%rcx), [[R1:%r..]]
+; EFI: andq  $-16, [[R1]]
 ; EFI: movq  %rsp, [[R64:%r..]]
-; EFI: subq  %rax, [[R64]]
+; EFI: subq  [[R1]], [[R64]]
 ; EFI: movq  [[R64]], %rsp
 
   %r = call i64 @bar(i64 %n, i64 %x, i64 %n, i8* %buf0, i8* %buf1) nounwind



From stuart at apple.com  Mon Apr  4 19:37:28 2011
From: stuart at apple.com (Stuart Hastings)
Date: Tue, 05 Apr 2011 00:37:28 -0000
Subject: [llvm-commits] [llvm] r128868 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Message-ID: <20110405003728.98F5F2A6C12C@llvm.org>

Author: stuart
Date: Mon Apr  4 19:37:28 2011
New Revision: 128868

URL: http://llvm.org/viewvc/llvm-project?rev=128868&view=rev
Log:
Revert 123704; it broke threaded LLVM.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=128868&r1=128867&r2=128868&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Mon Apr  4 19:37:28 2011
@@ -66,6 +66,11 @@
   /// against each other, including inserted libcalls.
   SDValue LastCALLSEQ_END;
 
+  /// IsLegalizingCall - This member is used *only* for purposes of providing
+  /// helpful assertions that a libcall isn't created while another call is
+  /// being legalized (which could lead to non-serialized call sequences).
+  bool IsLegalizingCall;
+
   enum LegalizeAction {
     Legal,      // The target natively supports this operation.
     Promote,    // This operation should be executed in a larger type.
@@ -225,6 +230,7 @@
 
 void SelectionDAGLegalize::LegalizeDAG() {
   LastCALLSEQ_END = DAG.getEntryNode();
+  IsLegalizingCall = false;
 
   // The legalize process is inherently a bottom-up recursive process (users
   // legalize their uses before themselves).  Given infinite stack space, we
@@ -1027,7 +1033,6 @@
     }
     break;
   case ISD::CALLSEQ_START: {
-    static int depth = 0;
     SDNode *CallEnd = FindCallEndFromCallStart(Node);
 
     // Recursively Legalize all of the inputs of the call end that do not lead
@@ -1045,7 +1050,7 @@
 
     // Merge in the last call to ensure that this call starts after the last
     // call ended.
-    if (LastCALLSEQ_END.getOpcode() != ISD::EntryToken && depth == 0) {
+    if (LastCALLSEQ_END.getOpcode() != ISD::EntryToken) {
       Tmp1 = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
                          Tmp1, LastCALLSEQ_END);
       Tmp1 = LegalizeOp(Tmp1);
@@ -1068,18 +1073,14 @@
     // sequence have been legalized, legalize the call itself.  During this
     // process, no libcalls can/will be inserted, guaranteeing that no calls
     // can overlap.
-
-    SDValue Saved_LastCALLSEQ_END = LastCALLSEQ_END ;
+    assert(!IsLegalizingCall && "Inconsistent sequentialization of calls!");
     // Note that we are selecting this call!
     LastCALLSEQ_END = SDValue(CallEnd, 0);
+    IsLegalizingCall = true;
 
-    depth++;
     // Legalize the call, starting from the CALLSEQ_END.
     LegalizeOp(LastCALLSEQ_END);
-    depth--;
-    assert(depth >= 0 && "Un-matched CALLSEQ_START?");
-    if (depth > 0)
-      LastCALLSEQ_END = Saved_LastCALLSEQ_END;
+    assert(!IsLegalizingCall && "CALLSEQ_END should have cleared this!");
     return Result;
   }
   case ISD::CALLSEQ_END:
@@ -1118,7 +1119,10 @@
                          Result.getResNo());
       }
     }
+    assert(IsLegalizingCall && "Call sequence imbalance between start/end?");
     // This finishes up call legalization.
+    IsLegalizingCall = false;
+
     // If the CALLSEQ_END node has a flag, remember that we legalized it.
     AddLegalizedOperand(SDValue(Node, 0), Result.getValue(0));
     if (Node->getNumValues() == 2)
@@ -2003,6 +2007,7 @@
 // and leave the Hi part unset.
 SDValue SelectionDAGLegalize::ExpandLibCall(RTLIB::Libcall LC, SDNode *Node,
                                             bool isSigned) {
+  assert(!IsLegalizingCall && "Cannot overlap legalization of calls!");
   // The input chain to this libcall is the entry node of the function.
   // Legalizing the call will automatically add the previous call to the
   // dependence.
@@ -2050,6 +2055,7 @@
 SelectionDAGLegalize::ExpandChainLibCall(RTLIB::Libcall LC,
                                          SDNode *Node,
                                          bool isSigned) {
+  assert(!IsLegalizingCall && "Cannot overlap legalization of calls!");
   SDValue InChain = Node->getOperand(0);
 
   TargetLowering::ArgListTy Args;



From stuart at apple.com  Mon Apr  4 19:43:12 2011
From: stuart at apple.com (Stuart Hastings)
Date: Mon, 04 Apr 2011 17:43:12 -0700
Subject: [llvm-commits] [llvm] r123704 -
 /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
In-Reply-To: <BANLkTimWE1eNZU+cuCtqfcyix_GMyhjH+Q@mail.gmail.com>
References: <20110118000928.2D35C2A6C12C@llvm.org>
	<BANLkTimWE1eNZU+cuCtqfcyix_GMyhjH+Q@mail.gmail.com>
Message-ID: <19ECF639-A131-4947-8331-EF5CE7921E5E@apple.com>


On Apr 4, 2011, at 5:16 PM, Nick Lewycky wrote:

> On 17 January 2011 16:09, Stuart Hastings <stuart at apple.com> wrote:
> Author: stuart
> Date: Mon Jan 17 18:09:27 2011
> New Revision: 123704
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=123704&view=rev
> Log:
> Remove checking that prevented overlapping CALLSEQ_START/CALLSEQ_END
> ranges, add legalizer support for nested calls.  Necessary for ARM
> byval support.  Radar 7662569.
> 
> Modified:
>    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
> 
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=123704&r1=123703&r2=123704&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Mon Jan 17 18:09:27 2011
> @@ -66,11 +66,6 @@
>   /// against each other, including inserted libcalls.
>   SDValue LastCALLSEQ_END;
> 
> -  /// IsLegalizingCall - This member is used *only* for purposes of providing
> -  /// helpful assertions that a libcall isn't created while another call is
> -  /// being legalized (which could lead to non-serialized call sequences).
> -  bool IsLegalizingCall;
> -
>   enum LegalizeAction {
>     Legal,      // The target natively supports this operation.
>     Promote,    // This operation should be executed in a larger type.
> @@ -225,7 +220,6 @@
> 
>  void SelectionDAGLegalize::LegalizeDAG() {
>   LastCALLSEQ_END = DAG.getEntryNode();
> -  IsLegalizingCall = false;
> 
>   // The legalize process is inherently a bottom-up recursive process (users
>   // legalize their uses before themselves).  Given infinite stack space, we
> @@ -1024,6 +1018,7 @@
>     }
>     break;
>   case ISD::CALLSEQ_START: {
> +    static int depth = 0;
> 
> Hi Stuart, this breaks using llvm from multiple threads. Please don't use non-constant statics.

Reverted at 128868.

Sorry for your trouble,

stuart

> 
> Nick
>  
>     SDNode *CallEnd = FindCallEndFromCallStart(Node);
> 
>     // Recursively Legalize all of the inputs of the call end that do not lead
> @@ -1041,7 +1036,7 @@
> 
>     // Merge in the last call to ensure that this call starts after the last
>     // call ended.
> -    if (LastCALLSEQ_END.getOpcode() != ISD::EntryToken) {
> +    if (LastCALLSEQ_END.getOpcode() != ISD::EntryToken && depth == 0) {
>       Tmp1 = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
>                          Tmp1, LastCALLSEQ_END);
>       Tmp1 = LegalizeOp(Tmp1);
> @@ -1064,14 +1059,18 @@
>     // sequence have been legalized, legalize the call itself.  During this
>     // process, no libcalls can/will be inserted, guaranteeing that no calls
>     // can overlap.
> -    assert(!IsLegalizingCall && "Inconsistent sequentialization of calls!");
> +
> +    SDValue Saved_LastCALLSEQ_END = LastCALLSEQ_END ;
>     // Note that we are selecting this call!
>     LastCALLSEQ_END = SDValue(CallEnd, 0);
> -    IsLegalizingCall = true;
> 
> +    depth++;
>     // Legalize the call, starting from the CALLSEQ_END.
>     LegalizeOp(LastCALLSEQ_END);
> -    assert(!IsLegalizingCall && "CALLSEQ_END should have cleared this!");
> +    depth--;
> +    assert(depth >= 0 && "Un-matched CALLSEQ_START?");
> +    if (depth > 0)
> +      LastCALLSEQ_END = Saved_LastCALLSEQ_END;
>     return Result;
>   }
>   case ISD::CALLSEQ_END:
> @@ -1110,10 +1109,7 @@
>                          Result.getResNo());
>       }
>     }
> -    assert(IsLegalizingCall && "Call sequence imbalance between start/end?");
>     // This finishes up call legalization.
> -    IsLegalizingCall = false;
> -
>     // If the CALLSEQ_END node has a flag, remember that we legalized it.
>     AddLegalizedOperand(SDValue(Node, 0), Result.getValue(0));
>     if (Node->getNumValues() == 2)
> @@ -1949,7 +1945,6 @@
>  // and leave the Hi part unset.
>  SDValue SelectionDAGLegalize::ExpandLibCall(RTLIB::Libcall LC, SDNode *Node,
>                                             bool isSigned) {
> -  assert(!IsLegalizingCall && "Cannot overlap legalization of calls!");
>   // The input chain to this libcall is the entry node of the function.
>   // Legalizing the call will automatically add the previous call to the
>   // dependence.
> @@ -1997,7 +1992,6 @@
>  SelectionDAGLegalize::ExpandChainLibCall(RTLIB::Libcall LC,
>                                          SDNode *Node,
>                                          bool isSigned) {
> -  assert(!IsLegalizingCall && "Cannot overlap legalization of calls!");
>   SDValue InChain = Node->getOperand(0);
> 
>   TargetLowering::ArgListTy Args;
> 
> 
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
> 

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From echristo at apple.com  Mon Apr  4 19:39:26 2011
From: echristo at apple.com (Eric Christopher)
Date: Tue, 05 Apr 2011 00:39:26 -0000
Subject: [llvm-commits] [llvm] r128869 -
	/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp
Message-ID: <20110405003926.A97DD2A6C12C@llvm.org>

Author: echristo
Date: Mon Apr  4 19:39:26 2011
New Revision: 128869

URL: http://llvm.org/viewvc/llvm-project?rev=128869&view=rev
Log:
Just use BL all the time. It's safer that way.

Fixes rdar://9184526

Modified:
    llvm/trunk/lib/Target/ARM/ARMFastISel.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp?rev=128869&r1=128868&r2=128869&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMFastISel.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Mon Apr  4 19:39:26 2011
@@ -1690,17 +1690,9 @@
 
 unsigned ARMFastISel::ARMSelectCallOp(const GlobalValue *GV) {
 
-  // Depend our opcode for thumb on whether or not we're targeting an
-  // externally callable function. For libcalls we'll just pass a NULL GV
-  // in here.
-  bool isExternal = false;
-  if (!GV || GV->hasExternalLinkage()) isExternal = true;
-  
   // Darwin needs the r9 versions of the opcodes.
   bool isDarwin = Subtarget->isTargetDarwin();
-  if (isThumb && isExternal) {
-    return isDarwin ? ARM::tBLXi_r9 : ARM::tBLXi;
-  } else if (isThumb) {
+  if (isThumb) {
     return isDarwin ? ARM::tBLr9 : ARM::tBL;
   } else  {
     return isDarwin ? ARM::BLr9 : ARM::BL;



From echristo at apple.com  Mon Apr  4 19:56:01 2011
From: echristo at apple.com (Eric Christopher)
Date: Tue, 05 Apr 2011 00:56:01 -0000
Subject: [llvm-commits] [llvm] r128870 -
	/llvm/trunk/test/CodeGen/ARM/fast-isel-static.ll
Message-ID: <20110405005601.6315E2A6C12C@llvm.org>

Author: echristo
Date: Mon Apr  4 19:56:01 2011
New Revision: 128870

URL: http://llvm.org/viewvc/llvm-project?rev=128870&view=rev
Log:
Fix up testcase for previous commit.

Modified:
    llvm/trunk/test/CodeGen/ARM/fast-isel-static.ll

Modified: llvm/trunk/test/CodeGen/ARM/fast-isel-static.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fast-isel-static.ll?rev=128870&r1=128869&r2=128870&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/fast-isel-static.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/fast-isel-static.ll Mon Apr  4 19:56:01 2011
@@ -24,7 +24,7 @@
   store float 0.000000e+00, float* %ztot, align 4
   store float 1.000000e+00, float* %z, align 4
 ; CHECK-LONG: blx     r2
-; CHECK-NORM: blx     _myadd
+; CHECK-NORM: bl      _myadd
   call void @myadd(float* %ztot, float* %z)
   ret i32 0
 }



From aggarwa4 at illinois.edu  Mon Apr  4 20:36:02 2011
From: aggarwa4 at illinois.edu (Arushi Aggarwal)
Date: Tue, 05 Apr 2011 01:36:02 -0000
Subject: [llvm-commits] [poolalloc] r128872 -
	/poolalloc/trunk/lib/AssistDS/ArgSimplify.cpp
Message-ID: <20110405013602.3F8B42A6C12C@llvm.org>

Author: aggarwa4
Date: Mon Apr  4 20:36:02 2011
New Revision: 128872

URL: http://llvm.org/viewvc/llvm-project?rev=128872&view=rev
Log:
Handle cases where the Type to cast from is an integer.

Modified:
    poolalloc/trunk/lib/AssistDS/ArgSimplify.cpp

Modified: poolalloc/trunk/lib/AssistDS/ArgSimplify.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/AssistDS/ArgSimplify.cpp?rev=128872&r1=128871&r2=128872&view=diff
==============================================================================
--- poolalloc/trunk/lib/AssistDS/ArgSimplify.cpp (original)
+++ poolalloc/trunk/lib/AssistDS/ArgSimplify.cpp Mon Apr  4 20:36:02 2011
@@ -93,14 +93,16 @@
                           Value *CastedVal;
                           BasicBlock* entryBB = BasicBlock::
                             Create (M->getContext(), "entry", NewF);
-                        
-                          if(type->isIntegerTy()){
-                            CastedVal = new PtrToIntInst(fargs.at(arg_count), 
+                       
+                          const Type *FromTy = fargs.at(arg_count)->getType();
+                          if(FromTy->isPointerTy()) {
+                            CastedVal = CastInst::CreatePointerCast(fargs.at(arg_count), 
                                                          type, "castd", entryBB);
                           } else {
-                            CastedVal = new BitCastInst(fargs.at(arg_count), 
-                                                        type, "castd", entryBB);
+                            CastedVal = CastInst::CreateIntegerCast(fargs.at(arg_count), 
+                                                                    type, false, "casted", entryBB);
                           }
+
                           SmallVector<Value*, 8> Args;
                           for(Function::arg_iterator ai = NewF->arg_begin(),
                               ae= NewF->arg_end(); ai != ae; ++ai) {
@@ -109,14 +111,14 @@
                             else 
                               Args.push_back(ai);
                           }
-                          
+
                           CallInst * CallI = CallInst::Create(F,Args.begin(), 
                                                               Args.end(),"", entryBB);
                           if(CallI->getType()->isVoidTy())
                             ReturnInst::Create(M->getContext(), entryBB);
                           else 
                             ReturnInst::Create(M->getContext(), CallI, entryBB);
-                          
+
                           CI->setCalledFunction(NewF);
                           numTransformable++;
                         }
@@ -131,14 +133,14 @@
       }
     }
   }
-  
+
   class ArgSimplify : public ModulePass {
   public:
     static char ID;
     ArgSimplify() : ModulePass(&ID) {}
 
     bool runOnModule(Module& M) {
-    
+
       for (Module::iterator I = M.begin(); I != M.end(); ++I) 
         if (!I->isDeclaration() && !I->mayBeOverridden()) {
           if(I->getNameStr() == "main")
@@ -162,7 +164,7 @@
             }
           }
         }
-      
+
 
       return true;
     }



From isanbard at gmail.com  Mon Apr  4 20:37:43 2011
From: isanbard at gmail.com (Bill Wendling)
Date: Tue, 05 Apr 2011 01:37:43 -0000
Subject: [llvm-commits] [llvm] r128873 - in /llvm/trunk:
 include/llvm/Intrinsics.td lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
 lib/CodeGen/SjLjEHPrepare.cpp lib/Target/ARM/ARMISelLowering.cpp
 lib/Target/ARM/ARMInstrInfo.td
Message-ID: <20110405013743.DEBED2A6C12C@llvm.org>

Author: void
Date: Mon Apr  4 20:37:43 2011
New Revision: 128873

URL: http://llvm.org/viewvc/llvm-project?rev=128873&view=rev
Log:
Revamp the SjLj "dispatch setup" intrinsic.

It needed to be moved closer to the setjmp statement, because the code directly
after the setjmp needs to know about values that are on the stack. Also, the
'bitcast' of the function context was causing a dead load. This wouldn't be too
horrible, except that at -O0 it wasn't optimized out, and because it wasn't
using the correct base pointer (if there is a VLA), it would try to access a
value from a garbage address.
<rdar://problem/9130540>

Modified:
    llvm/trunk/include/llvm/Intrinsics.td
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    llvm/trunk/lib/CodeGen/SjLjEHPrepare.cpp
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

Modified: llvm/trunk/include/llvm/Intrinsics.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Intrinsics.td?rev=128873&r1=128872&r2=128873&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Intrinsics.td (original)
+++ llvm/trunk/include/llvm/Intrinsics.td Mon Apr  4 20:37:43 2011
@@ -307,7 +307,7 @@
   def int_eh_sjlj_lsda    : Intrinsic<[llvm_ptr_ty]>;
   def int_eh_sjlj_callsite: Intrinsic<[], [llvm_i32_ty]>;
 }
-def int_eh_sjlj_dispatch_setup : Intrinsic<[], [llvm_ptr_ty]>;
+def int_eh_sjlj_dispatch_setup : Intrinsic<[], []>;
 def int_eh_sjlj_setjmp  : Intrinsic<[llvm_i32_ty], [llvm_ptr_ty]>;
 def int_eh_sjlj_longjmp : Intrinsic<[], [llvm_ptr_ty]>;
 

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=128873&r1=128872&r2=128873&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Mon Apr  4 20:37:43 2011
@@ -4403,7 +4403,7 @@
   }
   case Intrinsic::eh_sjlj_dispatch_setup: {
     DAG.setRoot(DAG.getNode(ISD::EH_SJLJ_DISPATCHSETUP, dl, MVT::Other,
-                            getRoot(), getValue(I.getArgOperand(0))));
+                            getRoot()));
     return 0;
   }
 

Modified: llvm/trunk/lib/CodeGen/SjLjEHPrepare.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SjLjEHPrepare.cpp?rev=128873&r1=128872&r2=128873&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SjLjEHPrepare.cpp (original)
+++ llvm/trunk/lib/CodeGen/SjLjEHPrepare.cpp Mon Apr  4 20:37:43 2011
@@ -442,14 +442,6 @@
   BasicBlock *DispatchBlock =
     BasicBlock::Create(F.getContext(), "eh.sjlj.setjmp.catch", &F);
 
-  // Add a call to dispatch_setup at the start of the dispatch block. This is
-  // expanded to any target-specific setup that needs to be done.
-  Value *SetupArg =
-    CastInst::Create(Instruction::BitCast, FunctionContext,
-                     Type::getInt8PtrTy(F.getContext()), "",
-                     DispatchBlock);
-  CallInst::Create(DispatchSetupFn, SetupArg, "", DispatchBlock);
-
   // Insert a load of the callsite in the dispatch block, and a switch on its
   // value.  By default, we go to a block that just does an unwind (which is the
   // correct action for a standard call).
@@ -524,6 +516,11 @@
   Value *DispatchVal = CallInst::Create(BuiltinSetjmpFn, SetjmpArg,
                                         "dispatch",
                                         EntryBB->getTerminator());
+
+  // Add a call to dispatch_setup after the setjmp call. This is expanded to any
+  // target-specific setup that needs to be done.
+  CallInst::Create(DispatchSetupFn, "", EntryBB->getTerminator());
+
   // check the return value of the setjmp. non-zero goes to dispatcher.
   Value *IsNormal = new ICmpInst(EntryBB->getTerminator(),
                                  ICmpInst::ICMP_EQ, DispatchVal, Zero,

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=128873&r1=128872&r2=128873&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Mon Apr  4 20:37:43 2011
@@ -2113,7 +2113,7 @@
   const {
   DebugLoc dl = Op.getDebugLoc();
   return DAG.getNode(ARMISD::EH_SJLJ_DISPATCHSETUP, dl, MVT::Other,
-                     Op.getOperand(0), Op.getOperand(1));
+                     Op.getOperand(0));
 }
 
 SDValue

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=128873&r1=128872&r2=128873&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Mon Apr  4 20:37:43 2011
@@ -58,7 +58,7 @@
                                                  SDTCisInt<2>]>;
 def SDT_ARMEH_SJLJ_Longjmp: SDTypeProfile<0, 2, [SDTCisPtrTy<0>, SDTCisInt<1>]>;
 
-def SDT_ARMEH_SJLJ_DispatchSetup: SDTypeProfile<0, 1, [SDTCisPtrTy<0>]>;
+def SDT_ARMEH_SJLJ_DispatchSetup: SDTypeProfile<0, 0, []>;
 
 def SDT_ARMMEMBARRIER     : SDTypeProfile<0, 1, [SDTCisInt<0>]>;
 
@@ -3777,8 +3777,8 @@
 // that need the instruction size).
 let isBarrier = 1, hasSideEffects = 1 in
 def Int_eh_sjlj_dispatchsetup :
- PseudoInst<(outs), (ins GPR:$src), NoItinerary,
-            [(ARMeh_sjlj_dispatchsetup GPR:$src)]>,
+ PseudoInst<(outs), (ins), NoItinerary,
+            [(ARMeh_sjlj_dispatchsetup)]>,
               Requires<[IsDarwin]>;
 
 //===----------------------------------------------------------------------===//



From stoklund at 2pi.dk  Mon Apr  4 23:20:27 2011
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Tue, 05 Apr 2011 04:20:27 -0000
Subject: [llvm-commits] [llvm] r128874 - in /llvm/trunk:
 include/llvm/CodeGen/MachineBasicBlock.h lib/CodeGen/SplitKit.cpp
 lib/CodeGen/SplitKit.h
Message-ID: <20110405042027.458722A6C12C@llvm.org>

Author: stoklund
Date: Mon Apr  4 23:20:27 2011
New Revision: 128874

URL: http://llvm.org/viewvc/llvm-project?rev=128874&view=rev
Log:
Cache the fairly expensive last split point computation and provide a fast
inlined path for the common case.

Most basic blocks don't contain a call that may throw, so the last split point
os simply the first terminator.

Modified:
    llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h
    llvm/trunk/lib/CodeGen/SplitKit.cpp
    llvm/trunk/lib/CodeGen/SplitKit.h

Modified: llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h?rev=128874&r1=128873&r2=128874&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h Mon Apr  4 23:20:27 2011
@@ -305,6 +305,10 @@
   /// it returns end()
   iterator getFirstTerminator();
 
+  const_iterator getFirstTerminator() const {
+    return const_cast<MachineBasicBlock*>(this)->getFirstTerminator();
+  }
+
   /// getLastNonDebugInstr - returns an iterator to the last non-debug
   /// instruction in the basic block, or end()
   iterator getLastNonDebugInstr();

Modified: llvm/trunk/lib/CodeGen/SplitKit.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SplitKit.cpp?rev=128874&r1=128873&r2=128874&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SplitKit.cpp (original)
+++ llvm/trunk/lib/CodeGen/SplitKit.cpp Mon Apr  4 23:20:27 2011
@@ -48,7 +48,8 @@
     LIS(lis),
     Loops(mli),
     TII(*MF.getTarget().getInstrInfo()),
-    CurLI(0) {}
+    CurLI(0),
+    LastSplitPoint(MF.getNumBlockIDs()) {}
 
 void SplitAnalysis::clear() {
   UseSlots.clear();
@@ -58,10 +59,39 @@
   CurLI = 0;
 }
 
-bool SplitAnalysis::canAnalyzeBranch(const MachineBasicBlock *MBB) {
-  MachineBasicBlock *T, *F;
-  SmallVector<MachineOperand, 4> Cond;
-  return !TII.AnalyzeBranch(const_cast<MachineBasicBlock&>(*MBB), T, F, Cond);
+SlotIndex SplitAnalysis::computeLastSplitPoint(unsigned Num) {
+  const MachineBasicBlock *MBB = MF.getBlockNumbered(Num);
+  const MachineBasicBlock *LPad = MBB->getLandingPadSuccessor();
+  std::pair<SlotIndex, SlotIndex> &LSP = LastSplitPoint[Num];
+
+  // Compute split points on the first call. The pair is independent of the
+  // current live interval.
+  if (!LSP.first.isValid()) {
+    MachineBasicBlock::const_iterator FirstTerm = MBB->getFirstTerminator();
+    if (FirstTerm == MBB->end())
+      LSP.first = LIS.getMBBEndIdx(MBB);
+    else
+      LSP.first = LIS.getInstructionIndex(FirstTerm);
+
+    // If there is a landing pad successor, also find the call instruction.
+    if (!LPad)
+      return LSP.first;
+    // There may not be a call instruction (?) in which case we ignore LPad.
+    LSP.second = LSP.first;
+    for (MachineBasicBlock::const_iterator I = FirstTerm, E = MBB->begin();
+         I != E; --I)
+      if (I->getDesc().isCall()) {
+        LSP.second = LIS.getInstructionIndex(I);
+        break;
+      }
+  }
+
+  // If CurLI is live into a landing pad successor, move the last split point
+  // back to the call that may throw.
+  if (LPad && LSP.second.isValid() && !LIS.isLiveInToMBB(*CurLI, LPad))
+    return LSP.second;
+  else
+    return LSP.first;
 }
 
 /// analyzeUses - Count instructions, basic blocks, and loops using CurLI.
@@ -125,11 +155,7 @@
     // all successor blocks. If interference reaches LastSplitPoint, it is not
     // possible to insert a split or reload that makes CurLI live in the
     // outgoing bundle.
-    MachineBasicBlock::iterator LSP = LIS.getLastSplitPoint(*CurLI, BI.MBB);
-    if (LSP == BI.MBB->end())
-      BI.LastSplitPoint = Stop;
-    else
-      BI.LastSplitPoint = LIS.getInstructionIndex(LSP);
+    BI.LastSplitPoint = getLastSplitPoint(BI.MBB->getNumber());
 
     // LVI is the first live segment overlapping MBB.
     BI.LiveIn = LVI->start <= Start;

Modified: llvm/trunk/lib/CodeGen/SplitKit.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SplitKit.h?rev=128874&r1=128873&r2=128874&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SplitKit.h (original)
+++ llvm/trunk/lib/CodeGen/SplitKit.h Mon Apr  4 23:20:27 2011
@@ -93,16 +93,20 @@
   // Current live interval.
   const LiveInterval *CurLI;
 
+  /// LastSplitPoint - Last legal split point in each basic block in the current
+  /// function. The first entry is the first terminator, the second entry is the
+  /// last valid split point for a variable that is live in to a landing pad
+  /// successor.
+  SmallVector<std::pair<SlotIndex, SlotIndex>, 8> LastSplitPoint;
+
+  SlotIndex computeLastSplitPoint(unsigned Num);
+
   // Sumarize statistics by counting instructions using CurLI.
   void analyzeUses();
 
   /// calcLiveBlockInfo - Compute per-block information about CurLI.
   bool calcLiveBlockInfo();
 
-  /// canAnalyzeBranch - Return true if MBB ends in a branch that can be
-  /// analyzed.
-  bool canAnalyzeBranch(const MachineBasicBlock *MBB);
-
 public:
   SplitAnalysis(const VirtRegMap &vrm, const LiveIntervals &lis,
                 const MachineLoopInfo &mli);
@@ -118,6 +122,16 @@
   /// getParent - Return the last analyzed interval.
   const LiveInterval &getParent() const { return *CurLI; }
 
+  /// getLastSplitPoint - Return that base index of the last valid split point
+  /// in the basic block numbered Num.
+  SlotIndex getLastSplitPoint(unsigned Num) {
+    // Inline the common simple case.
+    if (LastSplitPoint[Num].first.isValid() &&
+        !LastSplitPoint[Num].second.isValid())
+      return LastSplitPoint[Num].first;
+    return computeLastSplitPoint(Num);
+  }
+
   /// hasUses - Return true if MBB has any uses of CurLI.
   bool hasUses(const MachineBasicBlock *MBB) const {
     return UsingBlocks.lookup(MBB);



From stoklund at 2pi.dk  Mon Apr  4 23:20:29 2011
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Tue, 05 Apr 2011 04:20:29 -0000
Subject: [llvm-commits] [llvm] r128875 - in /llvm/trunk/lib/CodeGen:
 RegAllocGreedy.cpp SplitKit.cpp SplitKit.h
Message-ID: <20110405042030.0A16F2A6C12D@llvm.org>

Author: stoklund
Date: Mon Apr  4 23:20:29 2011
New Revision: 128875

URL: http://llvm.org/viewvc/llvm-project?rev=128875&view=rev
Log:
Stop precomputing last split points, query the SplitAnalysis cache on demand.

Modified:
    llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
    llvm/trunk/lib/CodeGen/SplitKit.cpp
    llvm/trunk/lib/CodeGen/SplitKit.h

Modified: llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp?rev=128875&r1=128874&r2=128875&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp Mon Apr  4 23:20:29 2011
@@ -445,7 +445,7 @@
 
     // Interference for the live-out value.
     if (BI.LiveOut) {
-      if (Intf.last() >= BI.LastSplitPoint)
+      if (Intf.last() >= SA->getLastSplitPoint(BC.Number))
         BC.Exit = SpillPlacement::MustSpill, Ins += BI.Uses;
       else if (!BI.Uses)
         BC.Exit = SpillPlacement::PrefSpill;
@@ -530,9 +530,9 @@
     Intf.moveToBlock(BI.MBB->getNumber());
     DEBUG(dbgs() << "BB#" << BI.MBB->getNumber() << " -> EB#"
                  << Bundles->getBundle(BI.MBB->getNumber(), 1)
-                 << " [" << Start << ';' << BI.LastSplitPoint << '-'
-                 << Stop << ") intf [" << Intf.first() << ';' << Intf.last()
-                 << ')');
+                 << " [" << Start << ';'
+                 << SA->getLastSplitPoint(BI.MBB->getNumber()) << '-' << Stop
+                 << ") intf [" << Intf.first() << ';' << Intf.last() << ')');
 
     // The interference interval should either be invalid or overlap MBB.
     assert((!Intf.hasInterference() || Intf.first() < Stop)
@@ -588,6 +588,7 @@
       continue;
     }
 
+    SlotIndex LastSplitPoint = SA->getLastSplitPoint(BI.MBB->getNumber());
     if (Intf.last().getBoundaryIndex() < BI.LastUse) {
       // There are interference-free uses at the end of the block.
       // Find the first use that can get the live-out register.
@@ -598,11 +599,11 @@
       SlotIndex Use = *UI;
       assert(Use <= BI.LastUse && "Couldn't find last use");
       // Only attempt a split befroe the last split point.
-      if (Use.getBaseIndex() <= BI.LastSplitPoint) {
+      if (Use.getBaseIndex() <= LastSplitPoint) {
         DEBUG(dbgs() << ", free use at " << Use << ".\n");
         SlotIndex SegStart = SE->enterIntvBefore(Use);
         assert(SegStart >= Intf.last() && "Couldn't avoid interference");
-        assert(SegStart < BI.LastSplitPoint && "Impossible split point");
+        assert(SegStart < LastSplitPoint && "Impossible split point");
         SE->useIntv(SegStart, Stop);
         continue;
       }
@@ -630,7 +631,8 @@
     Intf.moveToBlock(BI.MBB->getNumber());
     DEBUG(dbgs() << "EB#" << Bundles->getBundle(BI.MBB->getNumber(), 0)
                  << " -> BB#" << BI.MBB->getNumber() << " [" << Start << ';'
-                 << BI.LastSplitPoint << '-' << Stop << ')');
+                 << SA->getLastSplitPoint(BI.MBB->getNumber()) << '-' << Stop
+                 << ')');
 
     // Check interference entering the block.
     if (!Intf.hasInterference()) {
@@ -654,9 +656,10 @@
         continue;
       }
       if (!RegOut) {
+        SlotIndex LastSplitPoint = SA->getLastSplitPoint(BI.MBB->getNumber());
         // Block is live-through, but exit bundle is on the stack.
         // Spill immediately after the last use.
-        if (BI.LastUse < BI.LastSplitPoint) {
+        if (BI.LastUse < LastSplitPoint) {
           DEBUG(dbgs() << ", uses, stack-out.\n");
           SE->useIntv(Start, SE->leaveIntvAfter(BI.LastUse));
           continue;
@@ -664,8 +667,8 @@
         // The last use is after the last split point, it is probably an
         // indirect jump.
         DEBUG(dbgs() << ", uses at " << BI.LastUse << " after split point "
-                     << BI.LastSplitPoint << ", stack-out.\n");
-        SlotIndex SegEnd = SE->leaveIntvBefore(BI.LastSplitPoint);
+                     << LastSplitPoint << ", stack-out.\n");
+        SlotIndex SegEnd = SE->leaveIntvBefore(LastSplitPoint);
         SE->useIntv(Start, SegEnd);
         // Run a double interval from the split to the last use.
         // This makes it possible to spill the complement without affecting the

Modified: llvm/trunk/lib/CodeGen/SplitKit.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SplitKit.cpp?rev=128875&r1=128874&r2=128875&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SplitKit.cpp (original)
+++ llvm/trunk/lib/CodeGen/SplitKit.cpp Mon Apr  4 23:20:29 2011
@@ -151,12 +151,6 @@
     SlotIndex Start, Stop;
     tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB);
 
-    // The last split point is the latest possible insertion point that dominates
-    // all successor blocks. If interference reaches LastSplitPoint, it is not
-    // possible to insert a split or reload that makes CurLI live in the
-    // outgoing bundle.
-    BI.LastSplitPoint = getLastSplitPoint(BI.MBB->getNumber());
-
     // LVI is the first live segment overlapping MBB.
     BI.LiveIn = LVI->start <= Start;
     if (!BI.LiveIn)
@@ -947,13 +941,14 @@
       continue;
 
     openIntv();
+    SlotIndex LastSplitPoint = SA.getLastSplitPoint(BI.MBB->getNumber());
     SlotIndex SegStart = enterIntvBefore(std::min(BI.FirstUse,
-                                                  BI.LastSplitPoint));
-    if (!BI.LiveOut || BI.LastUse < BI.LastSplitPoint) {
+                                                  LastSplitPoint));
+    if (!BI.LiveOut || BI.LastUse < LastSplitPoint) {
       useIntv(SegStart, leaveIntvAfter(BI.LastUse));
     } else {
       // The last use is after the last valid split point.
-      SlotIndex SegStop = leaveIntvBefore(BI.LastSplitPoint);
+      SlotIndex SegStop = leaveIntvBefore(LastSplitPoint);
       useIntv(SegStart, SegStop);
       overlapIntv(SegStop, BI.LastUse);
     }

Modified: llvm/trunk/lib/CodeGen/SplitKit.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SplitKit.h?rev=128875&r1=128874&r2=128875&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SplitKit.h (original)
+++ llvm/trunk/lib/CodeGen/SplitKit.h Mon Apr  4 23:20:29 2011
@@ -77,8 +77,6 @@
     SlotIndex LastUse;    ///< Last instr using current reg.
     SlotIndex Kill;       ///< Interval end point inside block.
     SlotIndex Def;        ///< Interval start point inside block.
-    /// Last possible point for splitting live ranges.
-    SlotIndex LastSplitPoint;
     bool Uses;            ///< Current reg has uses or defs in block.
     bool LiveThrough;     ///< Live in whole block (Templ 5. or 6. above).
     bool LiveIn;          ///< Current reg is live in.



From sabre at nondot.org  Tue Apr  5 02:19:28 2011
From: sabre at nondot.org (Chris Lattner)
Date: Tue, 05 Apr 2011 07:19:28 -0000
Subject: [llvm-commits] [llvm] r128879 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <20110405071928.42F822A6C12C@llvm.org>

Author: lattner
Date: Tue Apr  5 02:19:28 2011
New Revision: 128879

URL: http://llvm.org/viewvc/llvm-project?rev=128879&view=rev
Log:
add a bunch of notes to myself, this is not intended to be gramatic or
make sense to anyone else.

Modified:
    llvm/trunk/docs/ReleaseNotes.html

Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=128879&r1=128878&r2=128879&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Tue Apr  5 02:19:28 2011
@@ -61,8 +61,6 @@
 
 </div>
 
-<!-- NOTE: last release for llvm-gcc --> 
-
 <!--
 Almost dead code.
   lib/Transforms/IPO/MergeFunctions.cpp => consider for 3.0.
@@ -73,7 +71,6 @@
   combiner-aa?
   strong phi elim
   loop dependence analysis
-  TBAA
   CorrelatedValuePropagation
  -->
  
@@ -111,7 +108,18 @@
 production-quality compiler for C, Objective-C, C++ and Objective-C++ on x86
 (32- and 64-bit), and for darwin-arm targets.</p>
 
-<p>In the LLVM 2.9 time-frame, the Clang team has made many improvements:</p>
+<p>In the LLVM 2.9 time-frame, the Clang team has made many improvements in C,
+C++ and Objective-C support.  C++ support is now generally rock solid, has
+been exercised on a broad variety of code, and has several new C++'0x features
+implemented (such as rvalue references and variadic templates).  LLVM 2.9 has
+also brought in a large range of bug fixes and minor features (e.g. __label__
+support), and is much more compatible with the Linux Kernel.</p>  
+  
+<p>If Clang rejects your code that is built with another compiler, please take a
+look at the <a href="http://clang.llvm.org/compatibility.html">language
+compatibility</a> guide to make sure the issue isn't intentional or a known
+issue.
+</p>
 
 <ul>
 </ul>
@@ -119,25 +127,6 @@
 
 <!--=========================================================================-->
 <div class="doc_subsection">
-<a name="clangsa">Clang Static Analyzer</a>
-</div>
-
-<div class="doc_text">
-
-<p>The <a href="http://clang-analyzer.llvm.org/">Clang Static Analyzer</a>
-   project is an effort to use static source code analysis techniques to
-   automatically find bugs in C and Objective-C programs (and hopefully <a
-   href="http://clang-analyzer.llvm.org/dev_cxx.html">C++ in the
-   future</a>!).  The tool is very good at finding bugs that occur on specific
-   paths through code, such as on error conditions.</p>
-
-<p>The LLVM 2.9 release... 
-</p>
-
-</div>
-
-<!--=========================================================================-->
-<div class="doc_subsection">
 <a name="dragonegg">DragonEgg: GCC front-ends, LLVM back-end</a>
 </div>
 
@@ -170,21 +159,6 @@
 
 <!--=========================================================================-->
 <div class="doc_subsection">
-<a name="vmkit">VMKit: JVM Virtual Machine Implementation</a>
-</div>
-
-<div class="doc_text">
-<p>
-The <a href="http://vmkit.llvm.org/">VMKit project</a> is an implementation of
-a Java Virtual Machine (Java VM or JVM) that uses LLVM for static and
-just-in-time compilation.
-
-UPDATE.
-</p>
-</div>
-
-<!--=========================================================================-->
-<div class="doc_subsection">
 <a name="compiler-rt">compiler-rt: Compiler Runtime Library</a>
 </div>
 
@@ -203,7 +177,9 @@
 All of the code in the compiler-rt project is available under the standard LLVM
 License, a "BSD-style" license.  
 
-NEW: MIT License as well.
+compiler_rt is now dual licensed under MIT and UIUC license
+  
+Several minor changes for better ARM support.
 
 New in LLVM 2.9,  UPDATE</p>
 
@@ -224,8 +200,9 @@
 
 <p>
 LLDB is in early development and not included as part of the LLVM 2.9 release,
-UPDATE!
 
+  
+  
 <!--
 but is mature enough to support basic debugging scenarios on Mac OS X in C,
 Objective-C and C++.  We'd really like help extending and expanding LLDB to 
@@ -249,6 +226,8 @@
 <p>
 As of the LLVM 2.9 release, UPDATE!
 
+libc++ is now dual licensed under MIT and UIUC license
+  
 <!--libc++ is virtually feature complete, but would
 benefit from more testing and better integration with Clang++.  It is also
 looking forward to the C++ committee finalizing the C++'0x standard.-->
@@ -318,7 +297,70 @@
 <p>LLVM 2.9 includes several major new capabilities:</p>
 
 <ul>
+  last release for llvm-gcc
+TBAA
+Triple::normalize is new, llvm triples are always stored in normalized form internally.
+
+MC Assembler: X86 now generates much better diagnostics for common errors,
+    is much faster at matching instructions, is much more bug-compatible with
+    the GAS assembler, and is now generally useful for a broad range of X86
+    assembly.
+  
+New Nvidia PTX backend, not generally useful in 2.9 though.
+
+Much better debug info generated, particularly in optimized code situations.
+
+ARM Fast ISel
+
+ELF MC support
+
+X86: Reimplemented all of MMX to introduce a new LLVM IR x86_mmx type.  Now
+  random types like &lt;2 x i32&gt; are not iseld to mmx without emms.
+
+Some basic <a href="CodeGenerator.html#mc">internals documentation</a> for MC. 
+  
+MC Assembler support for .file and .loc.
+  
+  
+inline asm multiple alternative constraint support.
+  
+LoopIdiom: memset/memcpy formation
+  
+  
+X86 support for FS/GS relative loads and stores using address space 256/257 are
+  reliable now.
+  
+ARM: New code placement pass.
+  
+  
+PointerTracking has been removed from mainline, moved to ClamAV.
+  
+EarlyCSE pass.
+
+
+ARM: Improved code generation for Cortex-A8 and Cortex-A9 CPUs.
+  
+Scheduler now models operand latency and pipeline forwarding.
+  
+Major regalloc rewrite, not on by default for 2.9.
+MC assembler support for 3dNow! and 3DNowA instructions.
+  
+LoopIndexSplit pass was removed, unmaintained.
+  
+ 
+COFF support in the MC assembler has made a lot of progress in the 2.9
+  timeframe, but is still not generally useful.  Please see 
+  "http://llvm.org/bugs/showdependencytree.cgi?id=9100&amp;hide_resolved=1" for open bugs"?
+
+New <a href="WritingAnLLVMPass.html#RegionPass">RegionPass</a> infrastructure
+  for region-based optimizations.
+  
+MicroBlaze: major updates for aggressive delay slot filler, MC-based assembly
+   printing, assembly instruction parsing, ELF .o file emission, and MC
+   instruction disassembler.
 </ul>
+  
+Still todo: [101025-110228]
 
 </div>
 



From geek4civic at gmail.com  Tue Apr  5 03:24:16 2011
From: geek4civic at gmail.com (NAKAMURA Takumi)
Date: Tue, 05 Apr 2011 08:24:16 -0000
Subject: [llvm-commits] [llvm] r128881 - /llvm/trunk/docs/GettingStarted.html
Message-ID: <20110405082416.5A7C92A6C12D@llvm.org>

Author: chapuni
Date: Tue Apr  5 03:24:15 2011
New Revision: 128881

URL: http://llvm.org/viewvc/llvm-project?rev=128881&view=rev
Log:
docs/GettingStarted.html: FIXME: dg, lit, and source tree layout.

Modified:
    llvm/trunk/docs/GettingStarted.html

Modified: llvm/trunk/docs/GettingStarted.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/GettingStarted.html?rev=128881&r1=128880&r2=128881&view=diff
==============================================================================
--- llvm/trunk/docs/GettingStarted.html (original)
+++ llvm/trunk/docs/GettingStarted.html Tue Apr  5 03:24:15 2011
@@ -404,6 +404,11 @@
       <td>Subversion access to LLVM<sup><a href="#sf2">2</a></sup></td>
     </tr>
 
+    <!-- FIXME:
+    Do we support dg?
+    Are DejaGnu and expect obsolete?
+    Shall we mention Python? -->
+
     <tr>
       <td><a href="http://savannah.gnu.org/projects/dejagnu">DejaGnu</a></td>
       <td>1.4.2</td>
@@ -1335,6 +1340,10 @@
   <dd> This directory contains the major parts of the code generator: Instruction 
   Selector, Instruction Scheduling, and Register Allocation.</dd>
 
+  <dt><tt><b>llvm/lib/MC/</b></tt></dt>
+  <dd>(FIXME: T.B.D.)</dd>
+
+  <!--FIXME: obsoleted -->
   <dt><tt><b>llvm/lib/Debugger/</b></tt></dt>
   <dd> This directory contains the source level debugger library that makes 
   it possible to instrument LLVM programs so that a debugger could identify 
@@ -1348,6 +1357,7 @@
   <dd> This directory contains the source code that corresponds to the header 
   files located in <tt>llvm/include/Support/</tt>.</dd>
 
+  <!--FIXME: obsoleted -->
   <dt><tt><b>llvm/lib/System/</b></tt></dt>
   <dd>This directory contains the operating system abstraction layer that
   shields LLVM from platform-specific coding.</dd>



From geek4civic at gmail.com  Tue Apr  5 03:24:22 2011
From: geek4civic at gmail.com (NAKAMURA Takumi)
Date: Tue, 05 Apr 2011 08:24:22 -0000
Subject: [llvm-commits] [llvm] r128882 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <20110405082422.AFD6A2A6C12E@llvm.org>

Author: chapuni
Date: Tue Apr  5 03:24:22 2011
New Revision: 128882

URL: http://llvm.org/viewvc/llvm-project?rev=128882&view=rev
Log:
docs/ReleaseNotes.html: Add a few notes to MCCOFF and x64. FIXME: fixme!

Modified:
    llvm/trunk/docs/ReleaseNotes.html

Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=128882&r1=128881&r2=128882&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Tue Apr  5 03:24:22 2011
@@ -297,10 +297,13 @@
 <p>LLVM 2.9 includes several major new capabilities:</p>
 
 <ul>
+<li><pre>
   last release for llvm-gcc
 TBAA
 Triple::normalize is new, llvm triples are always stored in normalized form internally.
 
+Triple x86_64--mingw64 is obsoleted. Use x86_64--mingw32 instead.
+
 MC Assembler: X86 now generates much better diagnostics for common errors,
     is much faster at matching instructions, is much more bug-compatible with
     the GAS assembler, and is now generally useful for a broad range of X86
@@ -348,9 +351,9 @@
 LoopIndexSplit pass was removed, unmaintained.
   
  
-COFF support in the MC assembler has made a lot of progress in the 2.9
+Win32 PE-COFF support in the MC assembler has made a lot of progress in the 2.9
   timeframe, but is still not generally useful.  Please see 
-  "http://llvm.org/bugs/showdependencytree.cgi?id=9100&amp;hide_resolved=1" for open bugs"?
+  "http://llvm.org/bugs/showdependencytree.cgi?id=9100&amp;hide_resolved=1" for open bugs?
 
 New <a href="WritingAnLLVMPass.html#RegionPass">RegionPass</a> infrastructure
   for region-based optimizations.
@@ -358,6 +361,7 @@
 MicroBlaze: major updates for aggressive delay slot filler, MC-based assembly
    printing, assembly instruction parsing, ELF .o file emission, and MC
    instruction disassembler.
+</pre></li>
 </ul>
   
 Still todo: [101025-110228]
@@ -431,8 +435,7 @@
 LLVM MC Project Blog Post</a>.
 </p>
 
-</div>	
-
+</div>
 
 <!--=========================================================================-->
 <div class="doc_subsection">
@@ -461,6 +464,7 @@
 </p>
 
 <ul>
+  <li>Several bugs have been fixed for Windows x64 code generator.</li>
 </ul>
 
 </div>
@@ -569,13 +573,23 @@
     all <a href="http://llvm.org/PR879">inline assembly that uses the X86
     floating point stack</a>.  It supports the 'f' and 't' constraints, but not
     'u'.</li>
-  <li>Win64 code generation wasn't widely tested. Everything should work, but we
-    expect small issues to happen. Also, llvm-gcc cannot build the mingw64
-    runtime currently due to lack of support for the 'u' inline assembly
-    constraint and for X87 floating point inline assembly.</li>
   <li>The X86-64 backend does not yet support the LLVM IR instruction
       <tt>va_arg</tt>. Currently, front-ends support variadic
       argument constructs on X86-64 by lowering them manually.</li>
+  <li>Windows x64 (aka Win64) code generator has a few issues.
+    <ul>
+      <li>llvm-gcc cannot build the mingw-w64 runtime currently
+       due to lack of support for the 'u' inline assembly
+       constraint and for X87 floating point inline assembly.</li>
+      <li>On mingw-w64, you will see unresolved symbol <tt>__chkstk</tt>
+       due to <a href="http://llvm.org/bugs/show_bug.cgi?id=8919">Bug 8919</a>.
+       It is fixed in <a href="http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20110321/118499.html">r128206</a>.</li>
+      <li>Miss-aligned MOVDQA might crash your program. It is due to
+       <a href="http://llvm.org/bugs/show_bug.cgi?id=9483">Bug 9483</a>,
+       lack of handling aligned internal globals.</li>
+      </ul>
+  </li>
+
 </ul>
 
 </div>



From geek4civic at gmail.com  Tue Apr  5 04:29:57 2011
From: geek4civic at gmail.com (NAKAMURA Takumi)
Date: Tue, 5 Apr 2011 18:29:57 +0900
Subject: [llvm-commits] [PATCH] docs/ReleaseNotes.html: Please use proper
 *Heading* elements instead of classified div.
Message-ID: <BANLkTik-eNUpXP_ahaNOVa3X349tieZKwg@mail.gmail.com>

It would be better to browse without stylesheet. (eg. on ViewVC)
---
 docs/ReleaseNotes.html |  122 ++++++++++++++++++++++++------------------------
 1 files changed, 61 insertions(+), 61 deletions(-)
-------------- next part --------------
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From baldrick at free.fr  Tue Apr  5 05:56:02 2011
From: baldrick at free.fr (Duncan Sands)
Date: Tue, 05 Apr 2011 10:56:02 -0000
Subject: [llvm-commits] [dragonegg] r128883 -
	/dragonegg/trunk/gcc_revision_tested_with
Message-ID: <20110405105602.592892A6C12C@llvm.org>

Author: baldrick
Date: Tue Apr  5 05:56:02 2011
New Revision: 128883

URL: http://llvm.org/viewvc/llvm-project?rev=128883&view=rev
Log:
Move the builders to a more recent gcc-4.5 revision.

Modified:
    dragonegg/trunk/gcc_revision_tested_with

Modified: dragonegg/trunk/gcc_revision_tested_with
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/gcc_revision_tested_with?rev=128883&r1=128882&r2=128883&view=diff
==============================================================================
--- dragonegg/trunk/gcc_revision_tested_with (original)
+++ dragonegg/trunk/gcc_revision_tested_with Tue Apr  5 05:56:02 2011
@@ -1 +1 @@
-168940
+171979



From baldrick at free.fr  Tue Apr  5 09:17:40 2011
From: baldrick at free.fr (Duncan Sands)
Date: Tue, 05 Apr 2011 16:17:40 +0200
Subject: [llvm-commits] [patch] Instcombine bug - transforms GEP/Bitcast
 on different address spaces
In-Reply-To: <6594DDFF12B03D4E89690887C248699402787A62CF@hasmsx504.ger.corp.intel.com>
References: <6594DDFF12B03D4E89690887C248699402787A62CF@hasmsx504.ger.corp.intel.com>
Message-ID: <4D9B2484.7050102@free.fr>

Hi Nadav,

> Index: test/Transforms/InstCombine/gep-addrspace.ll
> ===================================================================
> --- test/Transforms/InstCombine/gep-addrspace.ll	(revision 0)
> +++ test/Transforms/InstCombine/gep-addrspace.ll	(revision 0)
> @@ -0,0 +1,18 @@
> +; RUN: opt < %s -instcombine -S | FileCheck %s

piping to FileCheck is not needed.

> +
> +%myStruct = type { float, [3 x float], [4 x float], i32 }
> +
> +; make sure that we are not crashing when creating an illegal type
> +; CHECK:   @func

This CHECK line is pointless.

Otherwise it looks OK to me.

Ciao, Duncan.

From nadav.rotem at intel.com  Tue Apr  5 09:29:52 2011
From: nadav.rotem at intel.com (Nadav Rotem)
Date: Tue, 05 Apr 2011 14:29:52 -0000
Subject: [llvm-commits] [llvm] r128884 - in /llvm/trunk:
 lib/Transforms/InstCombine/InstructionCombining.cpp
 test/Transforms/InstCombine/gep-addrspace.ll
Message-ID: <20110405142952.A548C2A6C12C@llvm.org>

Author: nadav
Date: Tue Apr  5 09:29:52 2011
New Revision: 128884

URL: http://llvm.org/viewvc/llvm-project?rev=128884&view=rev
Log:
InstCombine optimizes gep(bitcast(x)) even when the bitcasts casts away address
space info. We crash with an assert in this case. This change checks that the
address space of the bitcasted pointer is the same as the gep ptr.


Added:
    llvm/trunk/test/Transforms/InstCombine/gep-addrspace.ll
Modified:
    llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp

Modified: llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp?rev=128884&r1=128883&r2=128884&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp Tue Apr  5 09:29:52 2011
@@ -849,22 +849,23 @@
         GetElementPtrInst::Create(Src->getOperand(0), Indices.begin(),
                                   Indices.end(), GEP.getName());
   }
-  
+
   // Handle gep(bitcast x) and gep(gep x, 0, 0, 0).
   Value *StrippedPtr = PtrOp->stripPointerCasts();
-  if (StrippedPtr != PtrOp) {
-    const PointerType *StrippedPtrTy =cast<PointerType>(StrippedPtr->getType());
+  const PointerType *StrippedPtrTy =cast<PointerType>(StrippedPtr->getType());
+  if (StrippedPtr != PtrOp &&
+    StrippedPtrTy->getAddressSpace() == GEP.getPointerAddressSpace()) {
 
     bool HasZeroPointerIndex = false;
     if (ConstantInt *C = dyn_cast<ConstantInt>(GEP.getOperand(1)))
       HasZeroPointerIndex = C->isZero();
-    
+
     // Transform: GEP (bitcast [10 x i8]* X to [0 x i8]*), i32 0, ...
     // into     : GEP [10 x i8]* X, i32 0, ...
     //
     // Likewise, transform: GEP (bitcast i8* X to [0 x i8]*), i32 0, ...
     //           into     : GEP i8* X, ...
-    // 
+    //
     // This occurs when the program declares an array extern like "int X[];"
     if (HasZeroPointerIndex) {
       const PointerType *CPTy = cast<PointerType>(PtrOp->getType());
@@ -975,7 +976,7 @@
       }
     }
   }
-  
+
   /// See if we can simplify:
   ///   X = bitcast A* to B*
   ///   Y = gep X, <...constant indices...>
@@ -983,12 +984,14 @@
   /// analysis of unions.  If "A" is also a bitcast, wait for A/X to be merged.
   if (BitCastInst *BCI = dyn_cast<BitCastInst>(PtrOp)) {
     if (TD &&
-        !isa<BitCastInst>(BCI->getOperand(0)) && GEP.hasAllConstantIndices()) {
+        !isa<BitCastInst>(BCI->getOperand(0)) && GEP.hasAllConstantIndices() &&
+        StrippedPtrTy->getAddressSpace() == GEP.getPointerAddressSpace()) {
+
       // Determine how much the GEP moves the pointer.  We are guaranteed to get
       // a constant back from EmitGEPOffset.
       ConstantInt *OffsetV = cast<ConstantInt>(EmitGEPOffset(&GEP));
       int64_t Offset = OffsetV->getSExtValue();
-      
+
       // If this GEP instruction doesn't move the pointer, just replace the GEP
       // with a bitcast of the real input to the dest type.
       if (Offset == 0) {

Added: llvm/trunk/test/Transforms/InstCombine/gep-addrspace.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/gep-addrspace.ll?rev=128884&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/gep-addrspace.ll (added)
+++ llvm/trunk/test/Transforms/InstCombine/gep-addrspace.ll Tue Apr  5 09:29:52 2011
@@ -0,0 +1,16 @@
+; RUN: opt < %s -instcombine -S
+
+%myStruct = type { float, [3 x float], [4 x float], i32 }
+
+; make sure that we are not crashing when creating an illegal type
+define void @func(%myStruct addrspace(1)* nocapture %p) nounwind {
+ST:
+  %A = getelementptr inbounds %myStruct addrspace(1)* %p, i64 0
+  %B = bitcast %myStruct addrspace(1)* %A to %myStruct*
+  %C = getelementptr inbounds %myStruct* %B, i32 0, i32 1
+  %D = getelementptr inbounds [3 x float]* %C, i32 0, i32 2
+  %E = load float* %D, align 4
+  %F = fsub float %E, undef
+  ret void
+}
+



From stoklund at 2pi.dk  Tue Apr  5 10:18:18 2011
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Tue, 05 Apr 2011 15:18:18 -0000
Subject: [llvm-commits] [llvm] r128886 - in /llvm/trunk:
 include/llvm/CodeGen/SlotIndexes.h lib/CodeGen/SplitKit.cpp
 lib/CodeGen/SplitKit.h
Message-ID: <20110405151818.D22052A6C12C@llvm.org>

Author: stoklund
Date: Tue Apr  5 10:18:18 2011
New Revision: 128886

URL: http://llvm.org/viewvc/llvm-project?rev=128886&view=rev
Log:
Use std::unique instead of a SmallPtrSet to ensure unique instructions in UseSlots.

This allows us to always keep the smaller slot for an instruction which is what
we want when a register has early clobber defines.

Drop the UsingInstrs set and the UsingBlocks map. They are no longer needed.

Modified:
    llvm/trunk/include/llvm/CodeGen/SlotIndexes.h
    llvm/trunk/lib/CodeGen/SplitKit.cpp
    llvm/trunk/lib/CodeGen/SplitKit.h

Modified: llvm/trunk/include/llvm/CodeGen/SlotIndexes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SlotIndexes.h?rev=128886&r1=128885&r2=128886&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SlotIndexes.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SlotIndexes.h Tue Apr  5 10:18:18 2011
@@ -178,6 +178,11 @@
       return getIndex() >= other.getIndex();
     }
 
+    /// isSameInstr - Return true if A and B refer to the same instruction.
+    static bool isSameInstr(SlotIndex A, SlotIndex B) {
+      return A.lie.getPointer() == B.lie.getPointer();
+    }
+
     /// Return the distance from this index to the given one.
     int distance(SlotIndex other) const {
       return other.getIndex() - getIndex();

Modified: llvm/trunk/lib/CodeGen/SplitKit.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SplitKit.cpp?rev=128886&r1=128885&r2=128886&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SplitKit.cpp (original)
+++ llvm/trunk/lib/CodeGen/SplitKit.cpp Tue Apr  5 10:18:18 2011
@@ -21,7 +21,6 @@
 #include "llvm/CodeGen/MachineDominators.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
-#include "llvm/Support/CommandLine.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/Target/TargetInstrInfo.h"
@@ -29,10 +28,6 @@
 
 using namespace llvm;
 
-static cl::opt<bool>
-AllowSplit("spiller-splits-edges",
-           cl::desc("Allow critical edge splitting during spilling"));
-
 STATISTIC(NumFinished, "Number of splits finished");
 STATISTIC(NumSimple,   "Number of splits that were simple");
 
@@ -53,8 +48,6 @@
 
 void SplitAnalysis::clear() {
   UseSlots.clear();
-  UsingInstrs.clear();
-  UsingBlocks.clear();
   LiveBlocks.clear();
   CurLI = 0;
 }
@@ -96,21 +89,31 @@
 
 /// analyzeUses - Count instructions, basic blocks, and loops using CurLI.
 void SplitAnalysis::analyzeUses() {
+  assert(UseSlots.empty() && "Call clear first");
+
+  // First get all the defs from the interval values. This provides the correct
+  // slots for early clobbers.
+  for (LiveInterval::const_vni_iterator I = CurLI->vni_begin(),
+       E = CurLI->vni_end(); I != E; ++I)
+    if (!(*I)->isPHIDef() && !(*I)->isUnused())
+      UseSlots.push_back((*I)->def);
+
+  // Get use slots form the use-def chain.
   const MachineRegisterInfo &MRI = MF.getRegInfo();
-  for (MachineRegisterInfo::reg_iterator I = MRI.reg_begin(CurLI->reg),
-       E = MRI.reg_end(); I != E; ++I) {
-    MachineOperand &MO = I.getOperand();
-    if (MO.isUse() && MO.isUndef())
-      continue;
-    MachineInstr *MI = MO.getParent();
-    if (MI->isDebugValue() || !UsingInstrs.insert(MI))
-      continue;
-    UseSlots.push_back(LIS.getInstructionIndex(MI).getDefIndex());
-    MachineBasicBlock *MBB = MI->getParent();
-    UsingBlocks[MBB]++;
-  }
+  for (MachineRegisterInfo::use_nodbg_iterator
+       I = MRI.use_nodbg_begin(CurLI->reg), E = MRI.use_nodbg_end(); I != E;
+       ++I)
+    if (!I.getOperand().isUndef())
+      UseSlots.push_back(LIS.getInstructionIndex(&*I).getDefIndex());
+
   array_pod_sort(UseSlots.begin(), UseSlots.end());
 
+  // Remove duplicates, keeping the smaller slot for each instruction.
+  // That is what we want for early clobbers.
+  UseSlots.erase(std::unique(UseSlots.begin(), UseSlots.end(),
+                             SlotIndex::isSameInstr),
+                 UseSlots.end());
+
   // Compute per-live block info.
   if (!calcLiveBlockInfo()) {
     // FIXME: calcLiveBlockInfo found inconsistencies in the live range.
@@ -125,8 +128,7 @@
   }
 
   DEBUG(dbgs() << "Analyze counted "
-               << UsingInstrs.size() << " instrs, "
-               << UsingBlocks.size() << " blocks, "
+               << UseSlots.size() << " instrs, "
                << LiveBlocks.size() << " spanned.\n");
 }
 
@@ -157,8 +159,8 @@
       BI.Def = LVI->start;
 
     // Find the first and last uses in the block.
-    BI.Uses = hasUses(MFI);
-    if (BI.Uses && UseI != UseE) {
+    BI.Uses = UseI != UseE && *UseI < Stop;
+    if (BI.Uses) {
       BI.FirstUse = *UseI;
       assert(BI.FirstUse >= Start);
       do ++UseI;
@@ -224,15 +226,6 @@
   return I != Orig.begin() && (--I)->end == Idx;
 }
 
-void SplitAnalysis::print(const BlockPtrSet &B, raw_ostream &OS) const {
-  for (BlockPtrSet::const_iterator I = B.begin(), E = B.end(); I != E; ++I) {
-    unsigned count = UsingBlocks.lookup(*I);
-    OS << " BB#" << (*I)->getNumber();
-    if (count)
-      OS << '(' << count << ')';
-  }
-}
-
 void SplitAnalysis::analyze(const LiveInterval *li) {
   clear();
   CurLI = li;
@@ -918,12 +911,7 @@
   // Add blocks with multiple uses.
   for (unsigned i = 0, e = LiveBlocks.size(); i != e; ++i) {
     const BlockInfo &BI = LiveBlocks[i];
-    if (!BI.Uses)
-      continue;
-    unsigned Instrs = UsingBlocks.lookup(BI.MBB);
-    if (Instrs <= 1)
-      continue;
-    if (Instrs == 2 && BI.LiveIn && BI.LiveOut && !BI.LiveThrough)
+    if (!BI.Uses || BI.FirstUse == BI.LastUse)
       continue;
     Blocks.insert(BI.MBB);
   }

Modified: llvm/trunk/lib/CodeGen/SplitKit.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SplitKit.h?rev=128886&r1=128885&r2=128886&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SplitKit.h (original)
+++ llvm/trunk/lib/CodeGen/SplitKit.h Tue Apr  5 10:18:18 2011
@@ -50,17 +50,9 @@
   const MachineLoopInfo &Loops;
   const TargetInstrInfo &TII;
 
-  // Instructions using the the current register.
-  typedef SmallPtrSet<const MachineInstr*, 16> InstrPtrSet;
-  InstrPtrSet UsingInstrs;
-
   // Sorted slot indexes of using instructions.
   SmallVector<SlotIndex, 8> UseSlots;
 
-  // The number of instructions using CurLI in each basic block.
-  typedef DenseMap<const MachineBasicBlock*, unsigned> BlockCountMap;
-  BlockCountMap UsingBlocks;
-
   /// Additional information about basic blocks where the current variable is
   /// live. Such a block will look like one of these templates:
   ///
@@ -130,11 +122,6 @@
     return computeLastSplitPoint(Num);
   }
 
-  /// hasUses - Return true if MBB has any uses of CurLI.
-  bool hasUses(const MachineBasicBlock *MBB) const {
-    return UsingBlocks.lookup(MBB);
-  }
-
   /// isOriginalEndpoint - Return true if the original live range was killed or
   /// (re-)defined at Idx. Idx should be the 'def' slot for a normal kill/def,
   /// and 'use' for an early-clobber def.
@@ -144,9 +131,6 @@
 
   typedef SmallPtrSet<const MachineBasicBlock*, 16> BlockPtrSet;
 
-  // Print a set of blocks with use counts.
-  void print(const BlockPtrSet&, raw_ostream&) const;
-
   /// getMultiUseBlocks - Add basic blocks to Blocks that may benefit from
   /// having CurLI split to a new live interval. Return true if Blocks can be
   /// passed to SplitEditor::splitSingleBlocks.



From rafael.espindola at gmail.com  Tue Apr  5 10:51:32 2011
From: rafael.espindola at gmail.com (Rafael Espindola)
Date: Tue, 05 Apr 2011 15:51:32 -0000
Subject: [llvm-commits] [llvm] r128887 - in /llvm/trunk:
 lib/CodeGen/AsmPrinter/AsmPrinter.cpp test/CodeGen/X86/visibility.ll
Message-ID: <20110405155132.B34D92A6C12C@llvm.org>

Author: rafael
Date: Tue Apr  5 10:51:32 2011
New Revision: 128887

URL: http://llvm.org/viewvc/llvm-project?rev=128887&view=rev
Log:
Print visibility info for external variables.

Modified:
    llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
    llvm/trunk/test/CodeGen/X86/visibility.ll

Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp?rev=128887&r1=128886&r2=128887&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp (original)
+++ llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp Tue Apr  5 10:51:32 2011
@@ -253,22 +253,24 @@
 
 /// EmitGlobalVariable - Emit the specified global variable to the .s file.
 void AsmPrinter::EmitGlobalVariable(const GlobalVariable *GV) {
-  if (!GV->hasInitializer())   // External globals require no code.
-    return;
-
-  // Check to see if this is a special global used by LLVM, if so, emit it.
-  if (EmitSpecialLLVMGlobal(GV))
-    return;
+  if (GV->hasInitializer()) {
+    // Check to see if this is a special global used by LLVM, if so, emit it.
+    if (EmitSpecialLLVMGlobal(GV))
+      return;
 
-  if (isVerbose()) {
-    WriteAsOperand(OutStreamer.GetCommentOS(), GV,
-                   /*PrintType=*/false, GV->getParent());
-    OutStreamer.GetCommentOS() << '\n';
+    if (isVerbose()) {
+      WriteAsOperand(OutStreamer.GetCommentOS(), GV,
+                     /*PrintType=*/false, GV->getParent());
+      OutStreamer.GetCommentOS() << '\n';
+    }
   }
 
   MCSymbol *GVSym = Mang->getSymbol(GV);
   EmitVisibility(GVSym, GV->getVisibility());
 
+  if (!GV->hasInitializer())   // External globals require no extra code.
+    return;
+
   if (MAI->hasDotTypeDotSizeDirective())
     OutStreamer.EmitSymbolAttribute(GVSym, MCSA_ELF_TypeObject);
 

Modified: llvm/trunk/test/CodeGen/X86/visibility.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/visibility.ll?rev=128887&r1=128886&r2=128887&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/visibility.ll (original)
+++ llvm/trunk/test/CodeGen/X86/visibility.ll Tue Apr  5 10:51:32 2011
@@ -1,11 +1,14 @@
 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu %s -o - | FileCheck %s
 
+ at zed = external hidden constant i32
+
 define hidden void @foo() nounwind {
 entry:
-  call void @bar()
+  call void @bar(i32* @zed)
   ret void
 }
 
-declare hidden void @bar()
+declare hidden void @bar(i32*)
 
+;CHECK: .hidden	zed
 ;CHECK: .hidden	bar



From stoklund at 2pi.dk  Tue Apr  5 11:53:50 2011
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Tue, 05 Apr 2011 16:53:50 -0000
Subject: [llvm-commits] [llvm] r128888 - in /llvm/trunk:
 lib/CodeGen/MachineInstr.cpp test/CodeGen/X86/coalescer-cross.ll
Message-ID: <20110405165350.B9E8C2A6C12C@llvm.org>

Author: stoklund
Date: Tue Apr  5 11:53:50 2011
New Revision: 128888

URL: http://llvm.org/viewvc/llvm-project?rev=128888&view=rev
Log:
Ensure all defs referring to a virtual register are marked dead by addRegisterDead().

There can be multiple defs for a single virtual register when they are defining
sub-registers.

The missing <dead> flag was stopping the inline spiller from eliminating dead
code after rematerialization.

Modified:
    llvm/trunk/lib/CodeGen/MachineInstr.cpp
    llvm/trunk/test/CodeGen/X86/coalescer-cross.ll

Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=128888&r1=128887&r2=128888&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Tue Apr  5 11:53:50 2011
@@ -1543,13 +1543,8 @@
       continue;
 
     if (Reg == IncomingReg) {
-      if (!Found) {
-        if (MO.isDead())
-          // The register is already marked dead.
-          return true;
-        MO.setIsDead();
-        Found = true;
-      }
+      MO.setIsDead();
+      Found = true;
     } else if (hasAliases && MO.isDead() &&
                TargetRegisterInfo::isPhysicalRegister(Reg)) {
       // There exists a super-register that's marked dead.

Modified: llvm/trunk/test/CodeGen/X86/coalescer-cross.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/coalescer-cross.ll?rev=128888&r1=128887&r2=128888&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/coalescer-cross.ll (original)
+++ llvm/trunk/test/CodeGen/X86/coalescer-cross.ll Tue Apr  5 11:53:50 2011
@@ -1,6 +1,10 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin10 | not grep movaps
+; RUN: llc < %s -mtriple=i386-apple-darwin10 | FileCheck %s
+; RUN: llc < %s -mtriple=i386-apple-darwin10 -regalloc=basic | FileCheck %s
 ; rdar://6509240
 
+; CHECK: os_clock
+; CHECK-NOT: movaps
+
 	type { %struct.TValue }		; type %0
 	type { %struct.L_Umaxalign, i32, %struct.Node* }		; type %1
 	%struct.CallInfo = type { %struct.TValue*, %struct.TValue*, %struct.TValue*, i32*, i32, i32 }



From ofv at wanadoo.es  Tue Apr  5 12:02:48 2011
From: ofv at wanadoo.es (Oscar Fuentes)
Date: Tue, 05 Apr 2011 17:02:48 -0000
Subject: [llvm-commits] [llvm] r128889 - in /llvm/trunk:
 cmake/modules/AddLLVM.cmake cmake/modules/CMakeLists.txt
 cmake/modules/LLVM-Config.cmake cmake/modules/LLVM.cmake
 cmake/modules/LLVMConfig.cmake tools/llvm-config/CMakeLists.txt
Message-ID: <20110405170248.483032A6C12C@llvm.org>

Author: ofv
Date: Tue Apr  5 12:02:48 2011
New Revision: 128889

URL: http://llvm.org/viewvc/llvm-project?rev=128889&view=rev
Log:
Rename LLVMConfig.cmake to LLVM-Config.cmake. The *Config.cmake naming
scheme is used by the functionality related to find_package.

Added:
    llvm/trunk/cmake/modules/LLVM-Config.cmake
      - copied, changed from r128887, llvm/trunk/cmake/modules/LLVMConfig.cmake
Removed:
    llvm/trunk/cmake/modules/LLVMConfig.cmake
Modified:
    llvm/trunk/cmake/modules/AddLLVM.cmake
    llvm/trunk/cmake/modules/CMakeLists.txt
    llvm/trunk/cmake/modules/LLVM.cmake
    llvm/trunk/tools/llvm-config/CMakeLists.txt

Modified: llvm/trunk/cmake/modules/AddLLVM.cmake
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/cmake/modules/AddLLVM.cmake?rev=128889&r1=128888&r2=128889&view=diff
==============================================================================
--- llvm/trunk/cmake/modules/AddLLVM.cmake (original)
+++ llvm/trunk/cmake/modules/AddLLVM.cmake Tue Apr  5 12:02:48 2011
@@ -1,5 +1,5 @@
 include(LLVMProcessSources)
-include(LLVMConfig)
+include(LLVM-Config)
 
 macro(add_llvm_library name)
   llvm_process_sources( ALL_FILES ${ARGN} )

Modified: llvm/trunk/cmake/modules/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/cmake/modules/CMakeLists.txt?rev=128889&r1=128888&r2=128889&view=diff
==============================================================================
--- llvm/trunk/cmake/modules/CMakeLists.txt (original)
+++ llvm/trunk/cmake/modules/CMakeLists.txt Tue Apr  5 12:02:48 2011
@@ -9,7 +9,7 @@
 
 install(FILES
   ${llvm_cmake_builddir}/LLVM.cmake
-  LLVMConfig.cmake
+  LLVM-Config.cmake
   LLVMLibDeps.cmake
   DESTINATION share/llvm/cmake)
 
@@ -18,7 +18,7 @@
   FILES_MATCHING PATTERN *.cmake
   PATTERN .svn EXCLUDE
   PATTERN LLVM.cmake EXCLUDE
-  PATTERN LLVMConfig.cmake EXCLUDE
+  PATTERN LLVM-Config.cmake EXCLUDE
   PATTERN LLVMLibDeps.cmake EXCLUDE
   PATTERN FindBison.cmake EXCLUDE
   PATTERN GetTargetTriple.cmake EXCLUDE
@@ -27,6 +27,6 @@
 
 install(FILES
   ${llvm_cmake_builddir}/LLVM.cmake
-  LLVMConfig.cmake
+  LLVM-Config.cmake
   LLVMLibDeps.cmake
   DESTINATION share/llvm/cmake)

Copied: llvm/trunk/cmake/modules/LLVM-Config.cmake (from r128887, llvm/trunk/cmake/modules/LLVMConfig.cmake)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/cmake/modules/LLVM-Config.cmake?p2=llvm/trunk/cmake/modules/LLVM-Config.cmake&p1=llvm/trunk/cmake/modules/LLVMConfig.cmake&r1=128887&r2=128889&rev=128889&view=diff
==============================================================================
    (empty)

Modified: llvm/trunk/cmake/modules/LLVM.cmake
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/cmake/modules/LLVM.cmake?rev=128889&r1=128888&r2=128889&view=diff
==============================================================================
--- llvm/trunk/cmake/modules/LLVM.cmake (original)
+++ llvm/trunk/cmake/modules/LLVM.cmake Tue Apr  5 12:02:48 2011
@@ -28,13 +28,13 @@
 # We try to include using the current setting of CMAKE_MODULE_PATH,
 # which suppossedly was filled by the user with the directory where
 # this file was installed:
-include( LLVMConfig OPTIONAL RESULT_VARIABLE LLVMCONFIG_INCLUDED )
+include( LLVM-Config OPTIONAL RESULT_VARIABLE LLVMCONFIG_INCLUDED )
 
 # If failed, we assume that this is an un-installed build:
 if( NOT LLVMCONFIG_INCLUDED )
   set(CMAKE_MODULE_PATH
     ${CMAKE_MODULE_PATH}
     "@LLVM_SOURCE_DIR@/cmake/modules")
-  include( LLVMConfig )
+  include( LLVM-Config )
 endif()
 

Removed: llvm/trunk/cmake/modules/LLVMConfig.cmake
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/cmake/modules/LLVMConfig.cmake?rev=128888&view=auto
==============================================================================
--- llvm/trunk/cmake/modules/LLVMConfig.cmake (original)
+++ llvm/trunk/cmake/modules/LLVMConfig.cmake (removed)
@@ -1,203 +0,0 @@
-function(get_system_libs return_var)
-  # Returns in `return_var' a list of system libraries used by LLVM.
-  if( NOT MSVC )
-    if( MINGW )
-      set(system_libs ${system_libs} imagehlp psapi)
-    elseif( CMAKE_HOST_UNIX )
-      if( HAVE_LIBDL )
-	set(system_libs ${system_libs} ${CMAKE_DL_LIBS})
-      endif()
-      if( LLVM_ENABLE_THREADS AND HAVE_LIBPTHREAD )
-	set(system_libs ${system_libs} pthread)
-      endif()
-    endif( MINGW )
-  endif( NOT MSVC )
-  set(${return_var} ${system_libs} PARENT_SCOPE)
-endfunction(get_system_libs)
-
-
-function(link_system_libs target)
-  get_system_libs(llvm_system_libs)
-  target_link_libraries(${target} ${llvm_system_libs})
-endfunction(link_system_libs)
-
-
-function(is_llvm_target_library library return_var)
-  # Sets variable `return_var' to ON if `library' corresponds to a
-  # LLVM supported target. To OFF if it doesn't.
-  set(${return_var} OFF PARENT_SCOPE)
-  string(TOUPPER "${library}" capitalized_lib)
-  string(TOUPPER "${LLVM_ALL_TARGETS}" targets)
-  foreach(t ${targets})
-    if( capitalized_lib STREQUAL t OR
-	capitalized_lib STREQUAL "LLVM${t}" OR
-	capitalized_lib STREQUAL "LLVM${t}CODEGEN" OR
-	capitalized_lib STREQUAL "LLVM${t}ASMPARSER" OR
-	capitalized_lib STREQUAL "LLVM${t}ASMPRINTER" OR
-	capitalized_lib STREQUAL "LLVM${t}DISASSEMBLER" OR
-	capitalized_lib STREQUAL "LLVM${t}INFO" )
-      set(${return_var} ON PARENT_SCOPE)
-      break()
-    endif()
-  endforeach()
-endfunction(is_llvm_target_library)
-
-
-macro(llvm_config executable)
-  explicit_llvm_config(${executable} ${ARGN})
-endmacro(llvm_config)
-
-
-function(explicit_llvm_config executable)
-  set( link_components ${ARGN} )
-
-  explicit_map_components_to_libraries(LIBRARIES ${link_components})
-  target_link_libraries(${executable} ${LIBRARIES})
-endfunction(explicit_llvm_config)
-
-
-# This is a variant intended for the final user:
-function(llvm_map_components_to_libraries OUT_VAR)
-  explicit_map_components_to_libraries(result ${ARGN})
-  get_system_libs(sys_result)
-  set( ${OUT_VAR} ${result} ${sys_result} PARENT_SCOPE )
-endfunction(llvm_map_components_to_libraries)
-
-
-function(explicit_map_components_to_libraries out_libs)
-  set( link_components ${ARGN} )
-  get_property(llvm_libs GLOBAL PROPERTY LLVM_LIBS)
-  string(TOUPPER "${llvm_libs}" capitalized_libs)
-
-  # Expand some keywords:
-  list(FIND LLVM_TARGETS_TO_BUILD "${LLVM_NATIVE_ARCH}" have_native_backend)
-  list(FIND link_components "engine" engine_required)
-  if( NOT engine_required EQUAL -1 )
-    list(FIND LLVM_TARGETS_WITH_JIT "${LLVM_NATIVE_ARCH}" have_jit)
-    if( NOT have_native_backend EQUAL -1 AND NOT have_jit EQUAL -1 )
-      list(APPEND link_components "jit")
-      list(APPEND link_components "native")
-    else()
-      list(APPEND link_components "interpreter")
-    endif()
-  endif()
-  list(FIND link_components "native" native_required)
-  if( NOT native_required EQUAL -1 )
-    if( NOT have_native_backend EQUAL -1 )
-      list(APPEND link_components ${LLVM_NATIVE_ARCH})
-    endif()
-  endif()
-
-  # Translate symbolic component names to real libraries:
-  foreach(c ${link_components})
-    # add codegen, asmprinter, asmparser, disassembler
-    list(FIND LLVM_TARGETS_TO_BUILD ${c} idx)
-    if( NOT idx LESS 0 )
-      list(FIND llvm_libs "LLVM${c}CodeGen" idx)
-      if( NOT idx LESS 0 )
-	list(APPEND expanded_components "LLVM${c}CodeGen")
-      else()
-	list(FIND llvm_libs "LLVM${c}" idx)
-	if( NOT idx LESS 0 )
-	  list(APPEND expanded_components "LLVM${c}")
-	else()
-	  message(FATAL_ERROR "Target ${c} is not in the set of libraries.")
-	endif()
-      endif()
-      list(FIND llvm_libs "LLVM${c}AsmPrinter" asmidx)
-      if( NOT asmidx LESS 0 )
-        list(APPEND expanded_components "LLVM${c}AsmPrinter")
-      endif()
-      list(FIND llvm_libs "LLVM${c}AsmParser" asmidx)
-      if( NOT asmidx LESS 0 )
-        list(APPEND expanded_components "LLVM${c}AsmParser")
-      endif()
-      list(FIND llvm_libs "LLVM${c}Info" asmidx)
-      if( NOT asmidx LESS 0 )
-        list(APPEND expanded_components "LLVM${c}Info")
-      endif()
-      list(FIND llvm_libs "LLVM${c}Disassembler" asmidx)
-      if( NOT asmidx LESS 0 )
-        list(APPEND expanded_components "LLVM${c}Disassembler")
-      endif()
-    elseif( c STREQUAL "native" )
-      # already processed
-    elseif( c STREQUAL "nativecodegen" )
-      list(APPEND expanded_components "LLVM${LLVM_NATIVE_ARCH}CodeGen")
-    elseif( c STREQUAL "backend" )
-      # same case as in `native'.
-    elseif( c STREQUAL "engine" )
-      # already processed
-    elseif( c STREQUAL "all" )
-      list(APPEND expanded_components ${llvm_libs})
-    else( NOT idx LESS 0 )
-      # Canonize the component name:
-      string(TOUPPER "${c}" capitalized)
-      list(FIND capitalized_libs LLVM${capitalized} lib_idx)
-      if( lib_idx LESS 0 )
-	# The component is unkown. Maybe is an ommitted target?
-	is_llvm_target_library(${c} iltl_result)
-	if( NOT iltl_result )
-	  message(FATAL_ERROR "Library `${c}' not found in list of llvm libraries.")
-	endif()
-      else( lib_idx LESS 0 )
-	list(GET llvm_libs ${lib_idx} canonical_lib)
-	list(APPEND expanded_components ${canonical_lib})
-      endif( lib_idx LESS 0 )
-    endif( NOT idx LESS 0 )
-  endforeach(c)
-  # Expand dependencies while topologically sorting the list of libraries:
-  list(LENGTH expanded_components lst_size)
-  set(cursor 0)
-  set(processed)
-  while( cursor LESS lst_size )
-    list(GET expanded_components ${cursor} lib)
-    list(APPEND expanded_components ${MSVC_LIB_DEPS_${lib}})
-    # Remove duplicates at the front:
-    list(REVERSE expanded_components)
-    list(REMOVE_DUPLICATES expanded_components)
-    list(REVERSE expanded_components)
-    list(APPEND processed ${lib})
-    # Find the maximum index that doesn't have to be re-processed:
-    while(NOT "${expanded_components}" MATCHES "^${processed}.*" )
-      list(REMOVE_AT processed -1)
-    endwhile()
-    list(LENGTH processed cursor)
-    list(LENGTH expanded_components lst_size)
-  endwhile( cursor LESS lst_size )
-  # Return just the libraries included in this build:
-  set(result)
-  foreach(c ${expanded_components})
-    list(FIND llvm_libs ${c} lib_idx)
-    if( NOT lib_idx LESS 0 )
-      set(result ${result} ${c})
-    endif()
-  endforeach(c)
-  set(${out_libs} ${result} PARENT_SCOPE)
-endfunction(explicit_map_components_to_libraries)
-
-
-# The library dependency data is contained in the file
-# LLVMLibDeps.cmake on this directory. It is automatically generated
-# by tools/llvm-config/CMakeLists.txt when the build comprises all the
-# targets and we are on a environment Posix enough to build the
-# llvm-config script. This, in practice, just excludes MSVC.
-
-# When you remove or rename a library from the build, be sure to
-# remove its file from lib/ as well, or the GenLibDeps.pl script will
-# include it on its analysis!
-
-# The format generated by GenLibDeps.pl
-
-# LLVMARMAsmPrinter.o: LLVMARMCodeGen.o libLLVMAsmPrinter.a libLLVMCodeGen.a libLLVMCore.a libLLVMSupport.a libLLVMTarget.a
-
-# is translated to:
-
-# set(MSVC_LIB_DEPS_LLVMARMAsmPrinter LLVMARMCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMSupport LLVMTarget)
-
-# It is necessary to remove the `lib' prefix and the `.a'.
-
-# This 'sed' script should do the trick:
-# sed -e s'#\.a##g' -e 's#libLLVM#LLVM#g' -e 's#: # #' -e 's#\(.*\)#set(MSVC_LIB_DEPS_\1)#' ~/llvm/tools/llvm-config/LibDeps.txt
-
-include(LLVMLibDeps)

Modified: llvm/trunk/tools/llvm-config/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-config/CMakeLists.txt?rev=128889&r1=128888&r2=128889&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-config/CMakeLists.txt (original)
+++ llvm/trunk/tools/llvm-config/CMakeLists.txt Tue Apr  5 12:02:48 2011
@@ -142,7 +142,7 @@
 
 # Regeneration of library dependencies.
 
-# See the comments at the end of cmake/modules/LLVMConfig.cmake for
+# See the comments at the end of cmake/modules/LLVM-Config.cmake for
 # notes and guidelines.
 
 set(LLVMLibDeps ${LLVM_MAIN_SRC_DIR}/cmake/modules/LLVMLibDeps.cmake)



From clattner at apple.com  Tue Apr  5 12:11:01 2011
From: clattner at apple.com (Chris Lattner)
Date: Tue, 05 Apr 2011 10:11:01 -0700
Subject: [llvm-commits] [PATCH] docs/ReleaseNotes.html: Please use
 proper *Heading* elements instead of classified div.
In-Reply-To: <BANLkTik-eNUpXP_ahaNOVa3X349tieZKwg@mail.gmail.com>
References: <BANLkTik-eNUpXP_ahaNOVa3X349tieZKwg@mail.gmail.com>
Message-ID: <4B9D9A41-EE99-4B4E-B054-51FAE437AA45@apple.com>

Sure, go for it!

-Chris

On Apr 5, 2011, at 2:29 AM, NAKAMURA Takumi wrote:

> It would be better to browse without stylesheet. (eg. on ViewVC)
> ---
> docs/ReleaseNotes.html |  122 ++++++++++++++++++++++++------------------------
> 1 files changed, 61 insertions(+), 61 deletions(-)
> <0001-docs-ReleaseNotes.html-Please-use-proper-Heading.patch.txt>_______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits


From stuart at apple.com  Tue Apr  5 12:16:21 2011
From: stuart at apple.com (Stuart Hastings)
Date: Tue, 05 Apr 2011 17:16:21 -0000
Subject: [llvm-commits] [llvm] r128891 -
	/llvm/trunk/test/CodeGen/Generic/2010-11-04-BigByval.ll
Message-ID: <20110405171621.8A1A42A6C12C@llvm.org>

Author: stuart
Date: Tue Apr  5 12:16:21 2011
New Revision: 128891

URL: http://llvm.org/viewvc/llvm-project?rev=128891&view=rev
Log:
ARM doesn't support byval yet.  XFAIL this test until it does.

Modified:
    llvm/trunk/test/CodeGen/Generic/2010-11-04-BigByval.ll

Modified: llvm/trunk/test/CodeGen/Generic/2010-11-04-BigByval.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Generic/2010-11-04-BigByval.ll?rev=128891&r1=128890&r2=128891&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Generic/2010-11-04-BigByval.ll (original)
+++ llvm/trunk/test/CodeGen/Generic/2010-11-04-BigByval.ll Tue Apr  5 12:16:21 2011
@@ -1,5 +1,6 @@
 ; RUN: llc < %s
 ; PR7170
+; XFAIL: arm
 
 %big = type [131072 x i8]
 



From gohman at apple.com  Tue Apr  5 12:26:30 2011
From: gohman at apple.com (Dan Gohman)
Date: Tue, 05 Apr 2011 10:26:30 -0700
Subject: [llvm-commits] [llvm] r128884 - in /llvm/trunk:
 lib/Transforms/InstCombine/InstructionCombining.cpp
 test/Transforms/InstCombine/gep-addrspace.ll
In-Reply-To: <20110405142952.A548C2A6C12C@llvm.org>
References: <20110405142952.A548C2A6C12C@llvm.org>
Message-ID: <011C9916-CAA2-4F38-84BB-2E2AC1378B3C@apple.com>

On Apr 5, 2011, at 7:29 AM, Nadav Rotem wrote:
> 
> --- llvm/trunk/test/Transforms/InstCombine/gep-addrspace.ll (added)
> +++ llvm/trunk/test/Transforms/InstCombine/gep-addrspace.ll Tue Apr  5 09:29:52 2011
> @@ -0,0 +1,16 @@
> +; RUN: opt < %s -instcombine -S
> +
> +%myStruct = type { float, [3 x float], [4 x float], i32 }
> +
> +; make sure that we are not crashing when creating an illegal type
> +define void @func(%myStruct addrspace(1)* nocapture %p) nounwind {
> +ST:
> +  %A = getelementptr inbounds %myStruct addrspace(1)* %p, i64 0
> +  %B = bitcast %myStruct addrspace(1)* %A to %myStruct*
> +  %C = getelementptr inbounds %myStruct* %B, i32 0, i32 1
> +  %D = getelementptr inbounds [3 x float]* %C, i32 0, i32 2
> +  %E = load float* %D, align 4
> +  %F = fsub float %E, undef
> +  ret void
> +}

Hello,

This testcase passes without the fix.

Dan

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From resistor at mac.com  Tue Apr  5 12:24:25 2011
From: resistor at mac.com (Owen Anderson)
Date: Tue, 05 Apr 2011 17:24:25 -0000
Subject: [llvm-commits] [llvm] r128892 - in /llvm/trunk/lib/Target/ARM:
 ARMExpandPseudoInsts.cpp ARMInstrInfo.td
Message-ID: <20110405172425.4B26D2A6C12C@llvm.org>

Author: resistor
Date: Tue Apr  5 12:24:25 2011
New Revision: 128892

URL: http://llvm.org/viewvc/llvm-project?rev=128892&view=rev
Log:
Convert ADCS and SBCS instructions into pseudos that are expanded to the ADC/ABC with the appropriate S-bit input value.

Modified:
    llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

Modified: llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp?rev=128892&r1=128891&r2=128892&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp Tue Apr  5 12:24:25 2011
@@ -55,6 +55,7 @@
     void ExpandVLD(MachineBasicBlock::iterator &MBBI);
     void ExpandVST(MachineBasicBlock::iterator &MBBI);
     void ExpandLaneOp(MachineBasicBlock::iterator &MBBI);
+    void ExpandSBitOp(MachineBasicBlock::iterator &MBBI);
     void ExpandVTBL(MachineBasicBlock::iterator &MBBI,
                     unsigned Opc, bool IsExt, unsigned NumRegs);
     void ExpandMOV32BitImm(MachineBasicBlock &MBB,
@@ -629,6 +630,43 @@
   MI.eraseFromParent();
 }
 
+void ARMExpandPseudo::ExpandSBitOp(MachineBasicBlock::iterator &MBBI) {
+  MachineInstr &MI = *MBBI;
+  MachineBasicBlock &MBB = *MI.getParent();
+  unsigned OldOpc = MI.getOpcode();
+  unsigned Opc = 0;
+  switch (OldOpc) {
+    case ARM::ADCSSrr:
+      Opc = ARM::ADCrr;
+      break;
+    case ARM::ADCSSri:
+      Opc = ARM::ADCri;
+      break;
+    case ARM::ADCSSrs:
+      Opc = ARM::ADCrs;
+      break;
+    case ARM::SBCSSrr:
+      Opc = ARM::SBCrr;
+      break;
+    case ARM::SBCSSri:
+      Opc = ARM::SBCri;
+      break;
+    case ARM::SBCSSrs:
+      Opc = ARM::SBCrs;
+      break;
+    default:
+      llvm_unreachable("Unknown opcode?");
+  }
+
+  MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc));
+  MIB.addOperand(MachineOperand::CreateImm(0)); // Predicate
+  MIB.addOperand(MachineOperand::CreateImm(0)); // S bit
+  for (unsigned i = 0; i < MI.getNumOperands(); ++i)
+    MIB.addOperand(MI.getOperand(i));
+  TransferImpOps(MI, MIB, MIB);
+  MI.eraseFromParent();
+}
+
 void ARMExpandPseudo::ExpandMOV32BitImm(MachineBasicBlock &MBB,
                                         MachineBasicBlock::iterator &MBBI) {
   MachineInstr &MI = *MBBI;
@@ -941,6 +979,15 @@
       ExpandMOV32BitImm(MBB, MBBI);
       return true;
 
+    case ARM::ADCSSri:
+    case ARM::ADCSSrr:
+    case ARM::ADCSSrs:
+    case ARM::SBCSSri:
+    case ARM::SBCSSrr:
+    case ARM::SBCSSrs:
+      ExpandSBitOp(MBBI);
+      return true;
+
     case ARM::VMOVQQ: {
       unsigned DstReg = MI.getOperand(0).getReg();
       bool DstIsDead = MI.getOperand(0).isDead();

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=128892&r1=128891&r2=128892&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Tue Apr  5 12:24:25 2011
@@ -938,50 +938,18 @@
 let isCodeGenOnly = 1, Defs = [CPSR] in {
 multiclass AI1_adde_sube_s_irs<bits<4> opcod, string opc, PatFrag opnode,
                              bit Commutable = 0> {
-  def Sri : AXI1<opcod, (outs GPR:$Rd), (ins GPR:$Rn, so_imm:$imm),
-                DPFrm, IIC_iALUi, !strconcat(opc, "\t$Rd, $Rn, $imm"),
+  def Sri : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, so_imm:$imm),
+                Size4Bytes, IIC_iALUi,
                [(set GPR:$Rd, (opnode GPR:$Rn, so_imm:$imm))]>,
-               Requires<[IsARM]> {
-    bits<4> Rd;
-    bits<4> Rn;
-    bits<12> imm;
-    let Inst{31-27} = 0b1110; // non-predicated
-    let Inst{15-12} = Rd;
-    let Inst{19-16} = Rn;
-    let Inst{11-0} = imm;
-    let Inst{20} = 1;
-    let Inst{25} = 1;
-  }
-  def Srr : AXI1<opcod, (outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm),
-                DPFrm, IIC_iALUr, !strconcat(opc, "\t$Rd, $Rn, $Rm"),
+               Requires<[IsARM]>;
+  def Srr : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm),
+                Size4Bytes, IIC_iALUr,
                [(set GPR:$Rd, (opnode GPR:$Rn, GPR:$Rm))]>,
-               Requires<[IsARM]> {
-    bits<4> Rd;
-    bits<4> Rn;
-    bits<4> Rm;
-    let Inst{31-27} = 0b1110; // non-predicated
-    let Inst{11-4} = 0b00000000;
-    let isCommutable = Commutable;
-    let Inst{3-0} = Rm;
-    let Inst{15-12} = Rd;
-    let Inst{19-16} = Rn;
-    let Inst{20} = 1;
-    let Inst{25} = 0;
-  }
-  def Srs : AXI1<opcod, (outs GPR:$Rd), (ins GPR:$Rn, so_reg:$shift),
-                DPSoRegFrm, IIC_iALUsr, !strconcat(opc, "\t$Rd, $Rn, $shift"),
+               Requires<[IsARM]>;
+  def Srs : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, so_reg:$shift),
+                Size4Bytes, IIC_iALUsr,
                [(set GPR:$Rd, (opnode GPR:$Rn, so_reg:$shift))]>,
-               Requires<[IsARM]> {
-    bits<4> Rd;
-    bits<4> Rn;
-    bits<12> shift;
-    let Inst{31-27} = 0b1110; // non-predicated
-    let Inst{11-0} = shift;
-    let Inst{15-12} = Rd;
-    let Inst{19-16} = Rn;
-    let Inst{20} = 1;
-    let Inst{25} = 0;
-  }
+               Requires<[IsARM]>;
 }
 }
 }



From johnny.chen at apple.com  Tue Apr  5 12:43:10 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Tue, 05 Apr 2011 17:43:10 -0000
Subject: [llvm-commits] [llvm] r128895 - in /llvm/trunk:
 lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
 test/MC/Disassembler/ARM/invalid-UMAAL-arm.txt
Message-ID: <20110405174310.904252A6C12C@llvm.org>

Author: johnny
Date: Tue Apr  5 12:43:10 2011
New Revision: 128895

URL: http://llvm.org/viewvc/llvm-project?rev=128895&view=rev
Log:
Check for invalid register encodings for UMAAL and friends where:
    if dLo == 15 || dHi == 15 || n == 15 || m == 15 then UNPREDICTABLE;
    if dHi == dLo then UNPREDICTABLE;

rdar://problem/9230202

Added:
    llvm/trunk/test/MC/Disassembler/ARM/invalid-UMAAL-arm.txt
Modified:
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp?rev=128895&r1=128894&r2=128895&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp Tue Apr  5 12:43:10 2011
@@ -497,14 +497,57 @@
   return false;
 }
 
+// A8.6.94 MLA
+// if d == 15 || n == 15 || m == 15 || a == 15 then UNPREDICTABLE;
+//
+// A8.6.105 MUL
+// if d == 15 || n == 15 || m == 15 then UNPREDICTABLE;
+//
+// A8.6.246 UMULL
+// if dLo == 15 || dHi == 15 || n == 15 || m == 15 then UNPREDICTABLE;
+// if dHi == dLo then UNPREDICTABLE;
+static bool BadRegsMulFrm(unsigned Opcode, uint32_t insn) {
+  unsigned R19_16 = slice(insn, 19, 16);
+  unsigned R15_12 = slice(insn, 15, 12);
+  unsigned R11_8  = slice(insn, 11, 8);
+  unsigned R3_0   = slice(insn, 3, 0);
+  switch (Opcode) {
+  default:
+    // Did we miss an opcode?
+    assert(0 && "Unexpected opcode!");
+    return false;
+  case ARM::MLA:     case ARM::MLS:     case ARM::SMLABB:  case ARM::SMLABT:
+  case ARM::SMLATB:  case ARM::SMLATT:  case ARM::SMLAWB:  case ARM::SMLAWT:
+  case ARM::SMMLA:   case ARM::SMMLS:   case ARM::SMLSD:   case ARM::SMLSDX:
+    if (R19_16 == 15 || R15_12 == 15 || R11_8 == 15 || R3_0 == 15)
+      return true;
+    return false;
+  case ARM::MUL:     case ARM::SMMUL:   case ARM::SMULBB:  case ARM::SMULBT:
+  case ARM::SMULTB:  case ARM::SMULTT:  case ARM::SMULWB:  case ARM::SMULWT:
+    if (R19_16 == 15 || R11_8 == 15 || R3_0 == 15)
+      return true;
+    return false;
+  case ARM::SMLAL:   case ARM::SMULL:   case ARM::UMAAL:   case ARM::UMLAL:
+  case ARM::UMULL:   case ARM::SMLALBB: case ARM::SMLALBT: case ARM::SMLALTB:
+  case ARM::SMLALTT: case ARM::SMLSLD:
+    if (R19_16 == 15 || R15_12 == 15 || R11_8 == 15 || R3_0 == 15)
+      return true;
+    if (R19_16 == R15_12)
+      return true;
+    return false;;
+  }
+}
+
 // Multiply Instructions.
-// MLA, MLS, SMLABB, SMLABT, SMLATB, SMLATT, SMLAWB, SMLAWT, SMMLA, SMMLS:
+// MLA, MLS, SMLABB, SMLABT, SMLATB, SMLATT, SMLAWB, SMLAWT, SMMLA, SMMLS,
+// SMLSD, SMLSDX:
 //     Rd{19-16} Rn{3-0} Rm{11-8} Ra{15-12}
 //
 // MUL, SMMUL, SMULBB, SMULBT, SMULTB, SMULTT, SMULWB, SMULWT:
 //     Rd{19-16} Rn{3-0} Rm{11-8}
 //
-// SMLAL, SMULL, UMAAL, UMLAL, UMULL, SMLALBB, SMLALBT, SMLALTB, SMLALTT:
+// SMLAL, SMULL, UMAAL, UMLAL, UMULL, SMLALBB, SMLALBT, SMLALTB, SMLALTT,
+// SMLSLD
 //     RdLo{15-12} RdHi{19-16} Rn{3-0} Rm{11-8}
 //
 // The mapping of the multiply registers to the "regular" ARM registers, where
@@ -531,6 +574,10 @@
          && OpInfo[2].RegClass == ARM::GPRRegClassID
          && "Expect three register operands");
 
+  // Sanity check for the register encodings.
+  if (BadRegsMulFrm(Opcode, insn))
+    return false;
+
   // Instructions with two destination registers have RdLo{15-12} first.
   if (NumDefs == 2) {
     assert(NumOps >= 4 && OpInfo[3].RegClass == ARM::GPRRegClassID &&

Added: llvm/trunk/test/MC/Disassembler/ARM/invalid-UMAAL-arm.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/invalid-UMAAL-arm.txt?rev=128895&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/invalid-UMAAL-arm.txt (added)
+++ llvm/trunk/test/MC/Disassembler/ARM/invalid-UMAAL-arm.txt Tue Apr  5 12:43:10 2011
@@ -0,0 +1,11 @@
+# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding}
+
+# Opcode=419 Name=UMAAL Format=ARM_FORMAT_MULFRM(1)
+#  31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
+# -------------------------------------------------------------------------------------------------
+# | 1: 1: 1: 1| 0: 0: 0: 0| 0: 1: 0: 0| 1: 1: 1: 1| 1: 0: 1: 1| 1: 1: 1: 1| 1: 0: 0: 1| 1: 0: 0: 0|
+# -------------------------------------------------------------------------------------------------
+#
+# A8.6.244 UMAAL
+# if dLo == 15 || dHi == 15 || n == 15 || m == 15 then UNPREDICTABLE;
+0x98 0xbf 0x4f 0xf0 



From johnny.chen at apple.com  Tue Apr  5 13:02:46 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Tue, 05 Apr 2011 18:02:46 -0000
Subject: [llvm-commits] [llvm] r128897 - in /llvm/trunk:
 lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
 test/MC/ARM/simple-encoding.ll test/MC/Disassembler/ARM/arm-tests.txt
Message-ID: <20110405180246.D92582A6C12C@llvm.org>

Author: johnny
Date: Tue Apr  5 13:02:46 2011
New Revision: 128897

URL: http://llvm.org/viewvc/llvm-project?rev=128897&view=rev
Log:
Constants with multiple encodings (ARM):
An alternative syntax is available for a modified immediate constant that permits the programmer to specify
the encoding directly. In this syntax, #<const> is instead written as #<byte>,#<rot>, where:

    <byte> is the numeric value of abcdefgh, in the range 0-255
    <rot> is twice the numeric value of rotation, an even number in the range 0-30.

Modified:
    llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
    llvm/trunk/test/MC/ARM/simple-encoding.ll
    llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt

Modified: llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp?rev=128897&r1=128896&r2=128897&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp Tue Apr  5 13:02:46 2011
@@ -136,9 +136,10 @@
   unsigned Rot = ARM_AM::getSOImmValRot(V);
 
   // Print low-level immediate formation info, per
-  // A5.1.3: "Data-processing operands - Immediate".
+  // A5.2.3: Data-processing (immediate), and
+  // A5.2.4: Modified immediate constants in ARM instructions
   if (Rot) {
-    O << "#" << Imm << ", " << Rot;
+    O << "#" << Imm << ", #" << Rot;
     // Pretty printed version.
     if (CommentStream)
       *CommentStream << (int)ARM_AM::rotr32(Imm, Rot) << "\n";

Modified: llvm/trunk/test/MC/ARM/simple-encoding.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/simple-encoding.ll?rev=128897&r1=128896&r2=128897&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/simple-encoding.ll (original)
+++ llvm/trunk/test/MC/ARM/simple-encoding.ll Tue Apr  5 13:02:46 2011
@@ -39,7 +39,7 @@
 
 define i32 @f4(i32 %a, i32 %b) {
 ; CHECK: f4
-; CHECK: add r0, r0, #254, 28         @ encoding: [0xfe,0x0e,0x80,0xe2]
+; CHECK: add r0, r0, #254, #28        @ encoding: [0xfe,0x0e,0x80,0xe2]
 ; CHECK:                              @ 4064
 ; CHECK: bx lr                        @ encoding: [0x1e,0xff,0x2f,0xe1]
   %add = add nsw i32 %a, 4064
@@ -118,7 +118,7 @@
 define i64 @f13() {
 ; CHECK: f13:
 ; CHECK: mvn r0, #0                   @ encoding: [0x00,0x00,0xe0,0xe3]
-; CHECK: mvn r1, #2, 2                @ encoding: [0x02,0x11,0xe0,0xe3]
+; CHECK: mvn r1, #2, #2               @ encoding: [0x02,0x11,0xe0,0xe3]
         ret i64 9223372036854775807
 }
 
@@ -229,7 +229,7 @@
 
 define void @f24(i32 %a) {
 ; CHECK: f24
-; CHECK: cmp r0, #1, 16               @ encoding: [0x01,0x08,0x50,0xe3]
+; CHECK: cmp r0, #1, #16               @ encoding: [0x01,0x08,0x50,0xe3]
         %b = icmp ugt i32 %a, 65536
         br i1 %b, label %r, label %r
 r:

Modified: llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt?rev=128897&r1=128896&r2=128897&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt (original)
+++ llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt Tue Apr  5 13:02:46 2011
@@ -1,6 +1,6 @@
 # RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 | FileCheck %s
 
-# CHECK:	addpl	r4, pc, #19, 8
+# CHECK:	addpl	r4, pc, #19, #8
 0x4c 0x45 0x8f 0x52
 
 # CHECK:	b	#0
@@ -66,7 +66,7 @@
 # CHECK:	movt	r8, #65535
 0xff 0x8f 0x4f 0xe3
 
-# CHECK:	mvnspl	r7, #245, 2
+# CHECK:	mvnspl	r7, #245, #2
 0xf5 0x71 0xf0 0x53
 
 # CHECK-NOT:	orr	r7, r8, r7, rrx #0
@@ -143,7 +143,7 @@
 # CHECK: msr cpsr_fc, r0
 0x00 0xf0 0x29 0xe1
 
-# CHECK:	msrmi	cpsr_c, #241, 8
+# CHECK:	msrmi	cpsr_c, #241, #8
 0xf1 0xf4 0x21 0x43
 
 # CHECK: rsbs r6, r7, r8



From grosbach at apple.com  Tue Apr  5 13:13:53 2011
From: grosbach at apple.com (Jim Grosbach)
Date: Tue, 05 Apr 2011 11:13:53 -0700
Subject: [llvm-commits] [llvm] r128892 - in /llvm/trunk/lib/Target/ARM:
 ARMExpandPseudoInsts.cpp ARMInstrInfo.td
In-Reply-To: <20110405172425.4B26D2A6C12C@llvm.org>
References: <20110405172425.4B26D2A6C12C@llvm.org>
Message-ID: <EFC241F3-4B2D-48E7-AF79-12F8D3F4E820@apple.com>

Nice! Thanks for doing this.

Couple of comments inline.

On Apr 5, 2011, at 10:24 AM, Owen Anderson wrote:

> Author: resistor
> Date: Tue Apr  5 12:24:25 2011
> New Revision: 128892
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=128892&view=rev
> Log:
> Convert ADCS and SBCS instructions into pseudos that are expanded to the ADC/ABC with the appropriate S-bit input value.
> 
> Modified:
>    llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp

Would it perhaps be better to handle these via a custom inserter instead of in the expansion pass? That way the real instruction is added earlier in translation and all of the machine instr passes will see them, not the pseudos. The expand-pseudos pass is a post-regalloc lowering.

This should have the added benefit of exposing these instructions to the if-conversion pass since they are predicable (and the pseudos are not).

>    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
> 
> Modified: llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp?rev=128892&r1=128891&r2=128892&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp Tue Apr  5 12:24:25 2011
> @@ -55,6 +55,7 @@
>     void ExpandVLD(MachineBasicBlock::iterator &MBBI);
>     void ExpandVST(MachineBasicBlock::iterator &MBBI);
>     void ExpandLaneOp(MachineBasicBlock::iterator &MBBI);
> +    void ExpandSBitOp(MachineBasicBlock::iterator &MBBI);
>     void ExpandVTBL(MachineBasicBlock::iterator &MBBI,
>                     unsigned Opc, bool IsExt, unsigned NumRegs);
>     void ExpandMOV32BitImm(MachineBasicBlock &MBB,
> @@ -629,6 +630,43 @@
>   MI.eraseFromParent();
> }
> 
> +void ARMExpandPseudo::ExpandSBitOp(MachineBasicBlock::iterator &MBBI) {
> +  MachineInstr &MI = *MBBI;
> +  MachineBasicBlock &MBB = *MI.getParent();
> +  unsigned OldOpc = MI.getOpcode();
> +  unsigned Opc = 0;
> +  switch (OldOpc) {
> +    case ARM::ADCSSrr:
> +      Opc = ARM::ADCrr;
> +      break;
> +    case ARM::ADCSSri:
> +      Opc = ARM::ADCri;
> +      break;
> +    case ARM::ADCSSrs:
> +      Opc = ARM::ADCrs;
> +      break;
> +    case ARM::SBCSSrr:
> +      Opc = ARM::SBCrr;
> +      break;
> +    case ARM::SBCSSri:
> +      Opc = ARM::SBCri;
> +      break;
> +    case ARM::SBCSSrs:
> +      Opc = ARM::SBCrs;
> +      break;
> +    default:
> +      llvm_unreachable("Unknown opcode?");
> +  }
> +
> +  MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc));
> +  MIB.addOperand(MachineOperand::CreateImm(0)); // Predicate

The predicate operand is actually two operands, a immediate (the condition code) and a register (either reg0 for unpredicated or CPSR for predicated).

> +  MIB.addOperand(MachineOperand::CreateImm(0)); // S bit

Likewise, the 's' bit operand is a register operand of reg0 or CPSR.


> +  for (unsigned i = 0; i < MI.getNumOperands(); ++i)
> +    MIB.addOperand(MI.getOperand(i));

The predicate and 's' bit operands come at the end of the operand list, not the beginning, right? So this should happen before adding the predicate and 's' bit operands.

> +  TransferImpOps(MI, MIB, MIB);
> +  MI.eraseFromParent();
> +}
> +
> void ARMExpandPseudo::ExpandMOV32BitImm(MachineBasicBlock &MBB,
>                                         MachineBasicBlock::iterator &MBBI) {
>   MachineInstr &MI = *MBBI;
> @@ -941,6 +979,15 @@
>       ExpandMOV32BitImm(MBB, MBBI);
>       return true;
> 
> +    case ARM::ADCSSri:
> +    case ARM::ADCSSrr:
> +    case ARM::ADCSSrs:
> +    case ARM::SBCSSri:
> +    case ARM::SBCSSrr:
> +    case ARM::SBCSSrs:
> +      ExpandSBitOp(MBBI);
> +      return true;
> +
>     case ARM::VMOVQQ: {
>       unsigned DstReg = MI.getOperand(0).getReg();
>       bool DstIsDead = MI.getOperand(0).isDead();
> 
> Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=128892&r1=128891&r2=128892&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
> +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Tue Apr  5 12:24:25 2011
> @@ -938,50 +938,18 @@
> let isCodeGenOnly = 1, Defs = [CPSR] in {
> multiclass AI1_adde_sube_s_irs<bits<4> opcod, string opc, PatFrag opnode,
>                              bit Commutable = 0> {
> -  def Sri : AXI1<opcod, (outs GPR:$Rd), (ins GPR:$Rn, so_imm:$imm),
> -                DPFrm, IIC_iALUi, !strconcat(opc, "\t$Rd, $Rn, $imm"),
> +  def Sri : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, so_imm:$imm),
> +                Size4Bytes, IIC_iALUi,
>                [(set GPR:$Rd, (opnode GPR:$Rn, so_imm:$imm))]>,
> -               Requires<[IsARM]> {
> -    bits<4> Rd;
> -    bits<4> Rn;
> -    bits<12> imm;
> -    let Inst{31-27} = 0b1110; // non-predicated
> -    let Inst{15-12} = Rd;
> -    let Inst{19-16} = Rn;
> -    let Inst{11-0} = imm;
> -    let Inst{20} = 1;
> -    let Inst{25} = 1;
> -  }
> -  def Srr : AXI1<opcod, (outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm),
> -                DPFrm, IIC_iALUr, !strconcat(opc, "\t$Rd, $Rn, $Rm"),
> +               Requires<[IsARM]>;
> +  def Srr : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm),
> +                Size4Bytes, IIC_iALUr,
>                [(set GPR:$Rd, (opnode GPR:$Rn, GPR:$Rm))]>,
> -               Requires<[IsARM]> {
> -    bits<4> Rd;
> -    bits<4> Rn;
> -    bits<4> Rm;
> -    let Inst{31-27} = 0b1110; // non-predicated
> -    let Inst{11-4} = 0b00000000;
> -    let isCommutable = Commutable;
> -    let Inst{3-0} = Rm;
> -    let Inst{15-12} = Rd;
> -    let Inst{19-16} = Rn;
> -    let Inst{20} = 1;
> -    let Inst{25} = 0;
> -  }
> -  def Srs : AXI1<opcod, (outs GPR:$Rd), (ins GPR:$Rn, so_reg:$shift),
> -                DPSoRegFrm, IIC_iALUsr, !strconcat(opc, "\t$Rd, $Rn, $shift"),
> +               Requires<[IsARM]>;
> +  def Srs : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, so_reg:$shift),
> +                Size4Bytes, IIC_iALUsr,
>                [(set GPR:$Rd, (opnode GPR:$Rn, so_reg:$shift))]>,
> -               Requires<[IsARM]> {
> -    bits<4> Rd;
> -    bits<4> Rn;
> -    bits<12> shift;
> -    let Inst{31-27} = 0b1110; // non-predicated
> -    let Inst{11-0} = shift;
> -    let Inst{15-12} = Rd;
> -    let Inst{19-16} = Rn;
> -    let Inst{20} = 1;
> -    let Inst{25} = 0;
> -  }
> +               Requires<[IsARM]>;
> }
> }
> }
> 
> 
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits


From daniel at zuster.org  Tue Apr  5 13:23:18 2011
From: daniel at zuster.org (Daniel Dunbar)
Date: Tue, 05 Apr 2011 18:23:18 -0000
Subject: [llvm-commits] [test-suite] r128900 -
	/test-suite/trunk/tools/get-report-time
Message-ID: <20110405182318.61F462A6C12C@llvm.org>

Author: ddunbar
Date: Tue Apr  5 13:23:18 2011
New Revision: 128900

URL: http://llvm.org/viewvc/llvm-project?rev=128900&view=rev
Log:
Add a trivial script to extract the times from *.report.txt files.

Added:
    test-suite/trunk/tools/get-report-time   (with props)

Added: test-suite/trunk/tools/get-report-time
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/tools/get-report-time?rev=128900&view=auto
==============================================================================
--- test-suite/trunk/tools/get-report-time (added)
+++ test-suite/trunk/tools/get-report-time Tue Apr  5 13:23:18 2011
@@ -0,0 +1,27 @@
+#!/usr/bin/env python
+
+import re
+import optparse
+
+def main():
+    parser = optparse.OptionParser("""\
+usage: %prog [options] <path>
+
+Reads the file at the given path and extracts any "program times" as used by the
+LLVM test-suite Makefiles.""")
+    opts,args = parser.parse_args()
+    if len(args) != 1:
+        parser.error('invalid number of arguments')
+       
+    file = open(args[0])
+    try:
+       re_pattern = re.compile(r"program ([0-9]+\.[0-9]+)")
+
+       data = file.read()
+       for match in re_pattern.finditer(data):
+          print match.group(1)
+    finally:
+       file.close()
+
+if __name__ == '__main__':
+   main()

Propchange: test-suite/trunk/tools/get-report-time
------------------------------------------------------------------------------
    svn:executable = *



From sabre at nondot.org  Tue Apr  5 13:38:45 2011
From: sabre at nondot.org (Chris Lattner)
Date: Tue, 05 Apr 2011 18:38:45 -0000
Subject: [llvm-commits] [llvm] r128902 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <20110405183845.DFA1C2A6C12C@llvm.org>

Author: lattner
Date: Tue Apr  5 13:38:45 2011
New Revision: 128902

URL: http://llvm.org/viewvc/llvm-project?rev=128902&view=rev
Log:
more notes to self.

Modified:
    llvm/trunk/docs/ReleaseNotes.html

Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=128902&r1=128901&r2=128902&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Tue Apr  5 13:38:45 2011
@@ -238,6 +238,7 @@
 
 
 <!--=========================================================================-->
+<!--
 <div class="doc_subsection">
 <a name="klee">KLEE: A Symbolic Execution Virtual Machine</a>
 </div>
@@ -252,8 +253,7 @@
 </p>
 
 <p>UPDATE!</p>
-
-</div>
+</div>-->
 
 
 <!-- *********************************************************************** -->
@@ -299,7 +299,9 @@
 <ul>
 <li><pre>
   last release for llvm-gcc
-TBAA
+TBAA: On by default in clang.  Disable it with -fno-strict-aliasing.
+  Could be more aggressive for structs.
+  
 Triple::normalize is new, llvm triples are always stored in normalized form internally.
 
 Triple x86_64--mingw64 is obsoleted. Use x86_64--mingw32 instead.
@@ -315,7 +317,8 @@
 
 ARM Fast ISel
 
-ELF MC support
+ELF MC support: on by default in clang.  There are still known missing features
+  for human written assembly.
 
 X86: Reimplemented all of MMX to introduce a new LLVM IR x86_mmx type.  Now
   random types like &lt;2 x i32&gt; are not iseld to mmx without emms.
@@ -340,16 +343,57 @@
   
 EarlyCSE pass.
 
+- DIBuilder provides simpler interface for front ends like Clang to encode debug info in LLVM IR.
+  - This interface hides implementation details (e.g. DIDerivedType, existence of compile unit etc..) that any front end should not know about.
+  For example,
+  Ty = DebugFactory.CreateDerivedType(DW_TAG_volatile_type,
+  findRegion(TYPE_CONTEXT(type)),
+  StringRef(),
+  getOrCreateFile(main_input_filename),
+  0 /*line no*/,
+  NodeSizeInBits(type),
+  NodeAlignInBits(type),
+  0 /*offset */,
+  0 /* flags */,
+  MainTy);
+  can be replaced by
+  DbgTy = DBuilder.createQualifiedType(DW_TAG_volatile_type, MainTy); 
+  
+PPC: Switched to MCInstPrinter, and MCCodeEmitter.  Ready to implement support
+  for directly writing out mach-o object files, but noone seems interested.
 
 ARM: Improved code generation for Cortex-A8 and Cortex-A9 CPUs.
   
 Scheduler now models operand latency and pipeline forwarding.
   
-Major regalloc rewrite, not on by default for 2.9.
+error_code + libsystem + PathV2 changes
+
+new macho-dump tool
+
+Major regalloc rewrite, not on by default for 2.9 and not advised to use it.
+ * New basic register allocator that can be used as a safe fallback when
+   debugging. Enable with -regalloc=basic.
+ * New infrastructure for live range splitting. SplitKit can break a live
+   interval into smaller pieces while preserving SSA form, and SpillPlacement
+   can help find the best split points. This is a work in progress so the API
+   is changing quickly.
+ * The inline spiller has learned to clean up after live range splitting. It
+   can hoist spills out of loops, and it can eliminate redundant spills.
+   Rematerialization works with live range splitting.
+ * New greedy register allocator using live range splitting. This will be the
+   default register allocator in the next LLVM release, but it is not turned on
+   by default in 2.9.
+
+ARM: __builtin_prefetch turns into prefetch instructions.
+  
 MC assembler support for 3dNow! and 3DNowA instructions.
   
+tblgen support for assembler aliases: <a 
+  href="CodeGenerator.html#na_instparsing">MnemonicAlias and InstAlias</a>
+  
 LoopIndexSplit pass was removed, unmaintained.
   
+include/llvm/System merged into include/llvm/Support.
  
 Win32 PE-COFF support in the MC assembler has made a lot of progress in the 2.9
   timeframe, but is still not generally useful.  Please see 
@@ -361,10 +405,19 @@
 MicroBlaze: major updates for aggressive delay slot filler, MC-based assembly
    printing, assembly instruction parsing, ELF .o file emission, and MC
    instruction disassembler.
+  
+Countless ARM microoptimizations.
+
+Speedups to various mid-level passes:
+  GVN is much faster on functions with deep dominator trees / lots of BBs.
+  DomTree and DominatorFrontier are much faster to compute.
+  
+  
+new 'hotpatch' attribute: LangRef.html#fnattrs
 </pre></li>
 </ul>
   
-Still todo: [101025-110228]
+Still todo: [101129-110228]
 
 </div>
 



From grosbach at apple.com  Tue Apr  5 13:40:13 2011
From: grosbach at apple.com (Jim Grosbach)
Date: Tue, 05 Apr 2011 18:40:13 -0000
Subject: [llvm-commits] [llvm] r128903 - in /llvm/trunk/lib/Target/ARM:
 ARMInstrInfo.td Disassembler/ARMDisassemblerCore.cpp
Message-ID: <20110405184013.66EFC2A6C12C@llvm.org>

Author: grosbach
Date: Tue Apr  5 13:40:13 2011
New Revision: 128903

URL: http://llvm.org/viewvc/llvm-project?rev=128903&view=rev
Log:
Make second source operand of LDRD pre/post explicit.

Finish what r128736 started.


Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=128903&r1=128902&r2=128903&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Tue Apr  5 13:40:13 2011
@@ -1632,7 +1632,7 @@
                    IIC_iLoad_bh_r, "ldrsb", "\t$Rt, $addr",
                    [(set GPR:$Rt, (sextloadi8 addrmode3:$addr))]>;
 
-let mayLoad = 1, neverHasSideEffects = 1, hasExtraDefRegAllocReq = 1 in {
+let mayLoad = 1, neverHasSideEffects = 1 in {
 // Load doubleword
 def LDRD : AI3ld<0b1101, 0, (outs GPR:$Rd, GPR:$dst2),
                  (ins addrmode3:$addr), LdMiscFrm,
@@ -1707,8 +1707,31 @@
 defm LDRH  : AI3_ldridx<0b1011, 1, "ldrh", IIC_iLoad_bh_ru>;
 defm LDRSH : AI3_ldridx<0b1111, 1, "ldrsh", IIC_iLoad_bh_ru>;
 defm LDRSB : AI3_ldridx<0b1101, 1, "ldrsb", IIC_iLoad_bh_ru>;
-let hasExtraDefRegAllocReq = 1, isCodeGenOnly = 1 in
-defm LDRD :  AI3_ldridx<0b1101, 0, "ldrd", IIC_iLoad_d_ru>;
+def LDRD_PRE : AI3ldstidx<0b1101, 0, 1, 1, (outs GPR:$Rt, GPR:$Rt2, GPR:$Rn_wb),
+                          (ins addrmode3:$addr), IndexModePre,
+                          LdMiscFrm, IIC_iLoad_d_ru,
+                          "ldrd", "\t$Rt, $Rt2, $addr!",
+                          "$addr.base = $Rn_wb", []> {
+  bits<14> addr;
+  let Inst{23}    = addr{8};      // U bit
+  let Inst{22}    = addr{13};     // 1 == imm8, 0 == Rm
+  let Inst{19-16} = addr{12-9};   // Rn
+  let Inst{11-8}  = addr{7-4};    // imm7_4/zero
+  let Inst{3-0}   = addr{3-0};    // imm3_0/Rm
+}
+def LDRD_POST: AI3ldstidx<0b1101, 0, 1, 0, (outs GPR:$Rt, GPR:$Rt2, GPR:$Rn_wb),
+                          (ins GPR:$Rn, am3offset:$offset), IndexModePost,
+                          LdMiscFrm, IIC_iLoad_d_ru,
+                          "ldrd", "\t$Rt, $Rt2, [$Rn], $offset",
+                          "$Rn = $Rn_wb", []> {
+  bits<10> offset;
+  bits<4> Rn;
+  let Inst{23}    = offset{8};      // U bit
+  let Inst{22}    = offset{9};      // 1 == imm8, 0 == Rm
+  let Inst{19-16} = Rn;
+  let Inst{11-8}  = offset{7-4};    // imm7_4/zero
+  let Inst{3-0}   = offset{3-0};    // imm3_0/Rm
+}
 } // mayLoad = 1, neverHasSideEffects = 1
 
 // LDRT, LDRBT, LDRSBT, LDRHT, LDRSHT are for disassembly only.

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp?rev=128903&r1=128902&r2=128903&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp Tue Apr  5 13:40:13 2011
@@ -1232,8 +1232,6 @@
     ++OpIdx;
   }
 
-  bool DualReg = HasDualReg(Opcode);
-
   // Disassemble the dst/src operand.
   if (OpIdx >= NumOps)
     return false;
@@ -1244,9 +1242,8 @@
                                                      decodeRd(insn))));
   ++OpIdx;
 
-  // Fill in LDRD and STRD's second operand, but only if it's offset mode OR we
-  // have a pre-or-post-indexed store operation.
-  if (DualReg && (!isPrePost || isStore)) {
+  // Fill in LDRD and STRD's second operand Rt operand.
+  if (HasDualReg(Opcode)) {
     MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRd(insn) + 1)));
     ++OpIdx;



From ssen at apple.com  Tue Apr  5 13:40:45 2011
From: ssen at apple.com (Shantonu Sen)
Date: Tue, 05 Apr 2011 18:40:45 -0000
Subject: [llvm-commits] [llvm] r128904 -
	/llvm/trunk/lib/MC/MCDisassembler/EDDisassembler.cpp
Message-ID: <20110405184045.68D762A6C12C@llvm.org>

Author: ssen
Date: Tue Apr  5 13:40:45 2011
New Revision: 128904

URL: http://llvm.org/viewvc/llvm-project?rev=128904&view=rev
Log:
An MCDisassembler has the option to not implement
getEDInfo(), in which case this code would dereference
NULL. EDInst can already handle NULL info, so avoid
the dereference and pass NULL through.

Reviewed by Sean Callanan

Modified:
    llvm/trunk/lib/MC/MCDisassembler/EDDisassembler.cpp

Modified: llvm/trunk/lib/MC/MCDisassembler/EDDisassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCDisassembler/EDDisassembler.cpp?rev=128904&r1=128903&r2=128904&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MCDisassembler/EDDisassembler.cpp (original)
+++ llvm/trunk/lib/MC/MCDisassembler/EDDisassembler.cpp Tue Apr  5 13:40:45 2011
@@ -254,9 +254,11 @@
     delete inst;
     return NULL;
   } else {
-    const llvm::EDInstInfo *thisInstInfo;
+    const llvm::EDInstInfo *thisInstInfo = NULL;
 
-    thisInstInfo = &InstInfos[inst->getOpcode()];
+    if (InstInfos) {
+      thisInstInfo = &InstInfos[inst->getOpcode()];
+    }
     
     EDInst* sdInst = new EDInst(inst, byteSize, *this, thisInstInfo);
     return sdInst;



From atrick at apple.com  Tue Apr  5 13:41:31 2011
From: atrick at apple.com (Andrew Trick)
Date: Tue, 05 Apr 2011 18:41:31 -0000
Subject: [llvm-commits] [llvm] r128905 - in /llvm/trunk/tools: llc/llc.cpp
	opt/opt.cpp
Message-ID: <20110405184131.5CDA12A6C12C@llvm.org>

Author: atrick
Date: Tue Apr  5 13:41:31 2011
New Revision: 128905

URL: http://llvm.org/viewvc/llvm-project?rev=128905&view=rev
Log:
whitespace

Modified:
    llvm/trunk/tools/llc/llc.cpp
    llvm/trunk/tools/opt/opt.cpp

Modified: llvm/trunk/tools/llc/llc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llc/llc.cpp?rev=128905&r1=128904&r2=128905&view=diff
==============================================================================
--- llvm/trunk/tools/llc/llc.cpp (original)
+++ llvm/trunk/tools/llc/llc.cpp Tue Apr  5 13:41:31 2011
@@ -207,7 +207,7 @@
   InitializeAllAsmParsers();
 
   cl::ParseCommandLineOptions(argc, argv, "llvm system compiler\n");
-  
+
   // Load the module to be compiled...
   SMDiagnostic Err;
   std::auto_ptr<Module> M;
@@ -271,7 +271,7 @@
     FeaturesStr = Features.getString();
   }
 
-  std::auto_ptr<TargetMachine> 
+  std::auto_ptr<TargetMachine>
     target(TheTarget->createTargetMachine(TheTriple.getTriple(), FeaturesStr));
   assert(target.get() && "Could not allocate target machine!");
   TargetMachine &Target = *target.get();

Modified: llvm/trunk/tools/opt/opt.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/opt/opt.cpp?rev=128905&r1=128904&r2=128905&view=diff
==============================================================================
--- llvm/trunk/tools/opt/opt.cpp (original)
+++ llvm/trunk/tools/opt/opt.cpp Tue Apr  5 13:41:31 2011
@@ -133,11 +133,11 @@
 AnalyzeOnly("analyze", cl::desc("Only perform analysis, no optimization"));
 
 static cl::opt<bool>
-PrintBreakpoints("print-breakpoints-for-testing", 
+PrintBreakpoints("print-breakpoints-for-testing",
                  cl::desc("Print select breakpoints location for testing"));
 
 static cl::opt<std::string>
-DefaultDataLayout("default-data-layout", 
+DefaultDataLayout("default-data-layout",
           cl::desc("data layout string to use if not specified by module"),
           cl::value_desc("layout-string"), cl::init(""));
 
@@ -328,7 +328,7 @@
           << "': Pass " << PassToPrint->getPassName() << ":\n";
 
     // Get and print pass...
-    getAnalysisID<Pass>(PassToPrint->getTypeInfo()).print(Out, 
+    getAnalysisID<Pass>(PassToPrint->getTypeInfo()).print(Out,
             BB.getParent()->getParent());
     return false;
   }
@@ -479,7 +479,7 @@
 
   llvm_shutdown_obj Y;  // Call llvm_shutdown() on exit.
   LLVMContext &Context = getGlobalContext();
-  
+
   // Initialize passes
   PassRegistry &Registry = *PassRegistry::getPassRegistry();
   initializeCore(Registry);
@@ -491,7 +491,7 @@
   initializeInstCombine(Registry);
   initializeInstrumentation(Registry);
   initializeTarget(Registry);
-  
+
   cl::ParseCommandLineOptions(argc, argv,
     "llvm .bc -> .bc modular optimizer and analysis printer\n");
 
@@ -549,12 +549,12 @@
 
   // Add an appropriate TargetLibraryInfo pass for the module's triple.
   TargetLibraryInfo *TLI = new TargetLibraryInfo(Triple(M->getTargetTriple()));
-  
+
   // The -disable-simplify-libcalls flag actually disables all builtin optzns.
   if (DisableSimplifyLibCalls)
     TLI->disableAllFunctions();
   Passes.add(TLI);
-  
+
   // Add an appropriate TargetData instance for this module.
   TargetData *TD = 0;
   const std::string &ModuleDataLayout = M.get()->getDataLayout();
@@ -578,7 +578,7 @@
     if (!Out) {
       if (OutputFilename.empty())
         OutputFilename = "-";
-      
+
       std::string ErrorInfo;
       Out.reset(new tool_output_file(OutputFilename.c_str(), ErrorInfo,
                                      raw_fd_ostream::F_Binary));



From johnny.chen at apple.com  Tue Apr  5 13:41:40 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Tue, 05 Apr 2011 18:41:40 -0000
Subject: [llvm-commits] [llvm] r128906 - in /llvm/trunk/test/CodeGen/ARM:
 constants.ll fp.ll long.ll select-imm.ll select_xform.ll sub.ll
Message-ID: <20110405184141.0AD492A6C12C@llvm.org>

Author: johnny
Date: Tue Apr  5 13:41:40 2011
New Revision: 128906

URL: http://llvm.org/viewvc/llvm-project?rev=128906&view=rev
Log:
Fix test-llvm failures.

Modified:
    llvm/trunk/test/CodeGen/ARM/constants.ll
    llvm/trunk/test/CodeGen/ARM/fp.ll
    llvm/trunk/test/CodeGen/ARM/long.ll
    llvm/trunk/test/CodeGen/ARM/select-imm.ll
    llvm/trunk/test/CodeGen/ARM/select_xform.ll
    llvm/trunk/test/CodeGen/ARM/sub.ll

Modified: llvm/trunk/test/CodeGen/ARM/constants.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/constants.ll?rev=128906&r1=128905&r2=128906&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/constants.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/constants.ll Tue Apr  5 13:41:40 2011
@@ -14,31 +14,31 @@
 
 define i32 @f3() {
 ; CHECK: f3
-; CHECK: mov r0, #1, 24
+; CHECK: mov r0, #1, #24
         ret i32 256
 }
 
 define i32 @f4() {
 ; CHECK: f4
-; CHECK: orr{{.*}}#1, 24
+; CHECK: orr{{.*}}#1, #24
         ret i32 257
 }
 
 define i32 @f5() {
 ; CHECK: f5
-; CHECK: mov r0, #255, 2
+; CHECK: mov r0, #255, #2
         ret i32 -1073741761
 }
 
 define i32 @f6() {
 ; CHECK: f6
-; CHECK: mov r0, #63, 28
+; CHECK: mov r0, #63, #28
         ret i32 1008
 }
 
 define void @f7(i32 %a) {
 ; CHECK: f7
-; CHECK: cmp r0, #1, 16
+; CHECK: cmp r0, #1, #16
         %b = icmp ugt i32 %a, 65536
         br i1 %b, label %r, label %r
 r:

Modified: llvm/trunk/test/CodeGen/ARM/fp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fp.ll?rev=128906&r1=128905&r2=128906&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/fp.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/fp.ll Tue Apr  5 13:41:40 2011
@@ -51,7 +51,7 @@
 
 define float @h2() {
 ;CHECK: h2:
-;CHECK: mov r0, #254, 10
+;CHECK: mov r0, #254, #10
 entry:
         ret float 1.000000e+00
 }

Modified: llvm/trunk/test/CodeGen/ARM/long.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/long.ll?rev=128906&r1=128905&r2=128906&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/long.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/long.ll Tue Apr  5 13:41:40 2011
@@ -14,14 +14,14 @@
 
 define i64 @f3() {
 ; CHECK: f3:
-; CHECK: mvn r0, #2, 2
+; CHECK: mvn r0, #2, #2
 entry:
         ret i64 2147483647
 }
 
 define i64 @f4() {
 ; CHECK: f4:
-; CHECK: mov r0, #2, 2
+; CHECK: mov r0, #2, #2
 entry:
         ret i64 2147483648
 }
@@ -29,7 +29,7 @@
 define i64 @f5() {
 ; CHECK: f5:
 ; CHECK: mvn r0, #0
-; CHECK: mvn r1, #2, 2
+; CHECK: mvn r1, #2, #2
 entry:
         ret i64 9223372036854775807
 }

Modified: llvm/trunk/test/CodeGen/ARM/select-imm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/select-imm.ll?rev=128906&r1=128905&r2=128906&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/select-imm.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/select-imm.ll Tue Apr  5 13:41:40 2011
@@ -6,7 +6,7 @@
 entry:
 ; ARM: t1:
 ; ARM: mov r1, #101
-; ARM: orr r1, r1, #1, 24
+; ARM: orr r1, r1, #1, #24
 ; ARM: movgt r0, #123
 
 ; ARMT2: t1:
@@ -27,7 +27,7 @@
 ; ARM: t2:
 ; ARM: mov r0, #123
 ; ARM: movgt r0, #101
-; ARM: orrgt r0, r0, #1, 24
+; ARM: orrgt r0, r0, #1, #24
 
 ; ARMT2: t2:
 ; ARMT2: mov r0, #123

Modified: llvm/trunk/test/CodeGen/ARM/select_xform.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/select_xform.ll?rev=128906&r1=128905&r2=128906&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/select_xform.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/select_xform.ll Tue Apr  5 13:41:40 2011
@@ -4,7 +4,7 @@
 
 define i32 @t1(i32 %a, i32 %b, i32 %c) nounwind {
 ; ARM: t1:
-; ARM: sub r0, r1, #6, 2
+; ARM: sub r0, r1, #6, #2
 ; ARM: movgt r0, r1
 
 ; T2: t1:

Modified: llvm/trunk/test/CodeGen/ARM/sub.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/sub.ll?rev=128906&r1=128905&r2=128906&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/sub.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/sub.ll Tue Apr  5 13:41:40 2011
@@ -12,7 +12,7 @@
 ; 66846720 = 0x03fc0000
 define i64 @f2(i64 %a) {
 ; CHECK: f2
-; CHECK: subs r0, r0, #255, 14
+; CHECK: subs r0, r0, #255, #14
 ; CHECK: sbc r1, r1, #0
     %tmp = sub i64 %a, 66846720
     ret i64 %tmp



From bob.wilson at apple.com  Tue Apr  5 13:54:52 2011
From: bob.wilson at apple.com (Bob Wilson)
Date: Tue, 05 Apr 2011 11:54:52 -0700
Subject: [llvm-commits] [llvm] r128897 - in /llvm/trunk:
 lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
 test/MC/ARM/simple-encoding.ll test/MC/Disassembler/ARM/arm-tests.txt
In-Reply-To: <20110405180246.D92582A6C12C@llvm.org>
References: <20110405180246.D92582A6C12C@llvm.org>
Message-ID: <5CB8B13B-E6F1-4C6F-9DD8-2D3B3FE68C36@apple.com>

This is breaking a bunch of tests for me:

Failing Tests (6):
    LLVM :: CodeGen/ARM/constants.ll
    LLVM :: CodeGen/ARM/fp.ll
    LLVM :: CodeGen/ARM/long.ll
    LLVM :: CodeGen/ARM/select-imm.ll
    LLVM :: CodeGen/ARM/select_xform.ll
    LLVM :: CodeGen/ARM/sub.ll

Please fix or revert ASAP.

On Apr 5, 2011, at 11:02 AM, Johnny Chen wrote:

> Author: johnny
> Date: Tue Apr  5 13:02:46 2011
> New Revision: 128897
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=128897&view=rev
> Log:
> Constants with multiple encodings (ARM):
> An alternative syntax is available for a modified immediate constant that permits the programmer to specify
> the encoding directly. In this syntax, #<const> is instead written as #<byte>,#<rot>, where:
> 
>    <byte> is the numeric value of abcdefgh, in the range 0-255
>    <rot> is twice the numeric value of rotation, an even number in the range 0-30.
> 
> Modified:
>    llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
>    llvm/trunk/test/MC/ARM/simple-encoding.ll
>    llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt
> 
> Modified: llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp?rev=128897&r1=128896&r2=128897&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp Tue Apr  5 13:02:46 2011
> @@ -136,9 +136,10 @@
>   unsigned Rot = ARM_AM::getSOImmValRot(V);
> 
>   // Print low-level immediate formation info, per
> -  // A5.1.3: "Data-processing operands - Immediate".
> +  // A5.2.3: Data-processing (immediate), and
> +  // A5.2.4: Modified immediate constants in ARM instructions
>   if (Rot) {
> -    O << "#" << Imm << ", " << Rot;
> +    O << "#" << Imm << ", #" << Rot;
>     // Pretty printed version.
>     if (CommentStream)
>       *CommentStream << (int)ARM_AM::rotr32(Imm, Rot) << "\n";
> 
> Modified: llvm/trunk/test/MC/ARM/simple-encoding.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/simple-encoding.ll?rev=128897&r1=128896&r2=128897&view=diff
> ==============================================================================
> --- llvm/trunk/test/MC/ARM/simple-encoding.ll (original)
> +++ llvm/trunk/test/MC/ARM/simple-encoding.ll Tue Apr  5 13:02:46 2011
> @@ -39,7 +39,7 @@
> 
> define i32 @f4(i32 %a, i32 %b) {
> ; CHECK: f4
> -; CHECK: add r0, r0, #254, 28         @ encoding: [0xfe,0x0e,0x80,0xe2]
> +; CHECK: add r0, r0, #254, #28        @ encoding: [0xfe,0x0e,0x80,0xe2]
> ; CHECK:                              @ 4064
> ; CHECK: bx lr                        @ encoding: [0x1e,0xff,0x2f,0xe1]
>   %add = add nsw i32 %a, 4064
> @@ -118,7 +118,7 @@
> define i64 @f13() {
> ; CHECK: f13:
> ; CHECK: mvn r0, #0                   @ encoding: [0x00,0x00,0xe0,0xe3]
> -; CHECK: mvn r1, #2, 2                @ encoding: [0x02,0x11,0xe0,0xe3]
> +; CHECK: mvn r1, #2, #2               @ encoding: [0x02,0x11,0xe0,0xe3]
>         ret i64 9223372036854775807
> }
> 
> @@ -229,7 +229,7 @@
> 
> define void @f24(i32 %a) {
> ; CHECK: f24
> -; CHECK: cmp r0, #1, 16               @ encoding: [0x01,0x08,0x50,0xe3]
> +; CHECK: cmp r0, #1, #16               @ encoding: [0x01,0x08,0x50,0xe3]
>         %b = icmp ugt i32 %a, 65536
>         br i1 %b, label %r, label %r
> r:
> 
> Modified: llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt?rev=128897&r1=128896&r2=128897&view=diff
> ==============================================================================
> --- llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt (original)
> +++ llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt Tue Apr  5 13:02:46 2011
> @@ -1,6 +1,6 @@
> # RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 | FileCheck %s
> 
> -# CHECK:	addpl	r4, pc, #19, 8
> +# CHECK:	addpl	r4, pc, #19, #8
> 0x4c 0x45 0x8f 0x52
> 
> # CHECK:	b	#0
> @@ -66,7 +66,7 @@
> # CHECK:	movt	r8, #65535
> 0xff 0x8f 0x4f 0xe3
> 
> -# CHECK:	mvnspl	r7, #245, 2
> +# CHECK:	mvnspl	r7, #245, #2
> 0xf5 0x71 0xf0 0x53
> 
> # CHECK-NOT:	orr	r7, r8, r7, rrx #0
> @@ -143,7 +143,7 @@
> # CHECK: msr cpsr_fc, r0
> 0x00 0xf0 0x29 0xe1
> 
> -# CHECK:	msrmi	cpsr_c, #241, 8
> +# CHECK:	msrmi	cpsr_c, #241, #8
> 0xf1 0xf4 0x21 0x43
> 
> # CHECK: rsbs r6, r7, r8
> 
> 
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits


From johnny.chen at apple.com  Tue Apr  5 13:53:14 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Tue, 05 Apr 2011 18:53:14 -0000
Subject: [llvm-commits] [llvm] r128909 -
	/llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt
Message-ID: <20110405185314.6F89A2A6C12C@llvm.org>

Author: johnny
Date: Tue Apr  5 13:53:14 2011
New Revision: 128909

URL: http://llvm.org/viewvc/llvm-project?rev=128909&view=rev
Log:
LDRD now prints out two dst registers.

Modified:
    llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt

Modified: llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt?rev=128909&r1=128908&r2=128909&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt (original)
+++ llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt Tue Apr  5 13:53:14 2011
@@ -179,7 +179,7 @@
 # CHECK:	strdeq	r2, r3, [r0], -r8
 0xf8 0x24 0x00 0x00
 
-# CHECK:	ldrdeq	r2, [r0], -r12
+# CHECK:	ldrdeq	r2, r3, [r0], -r12
 0xdc 0x24 0x00 0x00
 
 # CHECK:	ldrbt	r3, [r4], -r5, lsl #12



From atrick at apple.com  Tue Apr  5 13:54:36 2011
From: atrick at apple.com (Andrew Trick)
Date: Tue, 05 Apr 2011 18:54:36 -0000
Subject: [llvm-commits] [llvm] r128910 - in /llvm/trunk:
 include/llvm/Support/CommandLine.h lib/Support/CommandLine.cpp
 tools/llc/llc.cpp tools/opt/opt.cpp
Message-ID: <20110405185436.B29042A6C12C@llvm.org>

Author: atrick
Date: Tue Apr  5 13:54:36 2011
New Revision: 128910

URL: http://llvm.org/viewvc/llvm-project?rev=128910&view=rev
Log:
Added *hidden* flags -print-options and -print-all-options so
developers can see if their driver changed any cl::Option's. The
current implementation isn't perfect but handles most kinds of
options. This is nice to have when decomposing the stages of
compilation and moving between different drivers. It's also a good
sanity check when comparing results produced by different command line
invocations that are expected to produce the comparable results.

Note: This is not an attempt to prolong the life of cl::Option. On the
contrary, it's a placeholder for a feature that must exist when
cl::Option is replaced by a more appropriate framework. A new
framework needs: a central option registry, dynamic name lookup,
non-global containers of option values (e.g. per-module,
per-function), *and* the ability to print options values and their defaults at
any point during compilation.

Modified:
    llvm/trunk/include/llvm/Support/CommandLine.h
    llvm/trunk/lib/Support/CommandLine.cpp
    llvm/trunk/tools/llc/llc.cpp
    llvm/trunk/tools/opt/opt.cpp

Modified: llvm/trunk/include/llvm/Support/CommandLine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/CommandLine.h?rev=128910&r1=128909&r2=128910&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/CommandLine.h (original)
+++ llvm/trunk/include/llvm/Support/CommandLine.h Tue Apr  5 13:54:36 2011
@@ -60,6 +60,12 @@
 void SetVersionPrinter(void (*func)());
 
 
+// PrintOptionValues - Print option values.
+// With -print-options print the difference between option values and defaults.
+// With -print-all-options print all option values.
+// (Currently not perfect, but best-effort.)
+void PrintOptionValues();
+
 // MarkOptionsChanged - Internal helper function.
 void MarkOptionsChanged();
 
@@ -230,6 +236,8 @@
   //
   virtual void printOptionInfo(size_t GlobalWidth) const = 0;
 
+  virtual void printOptionValue(size_t GlobalWidth, bool Force) const = 0;
+
   virtual void getExtraOptionNames(SmallVectorImpl<const char*> &) {}
 
   // addOccurrence - Wrapper around handleOccurrence that enforces Flags.
@@ -303,6 +311,120 @@
 
 
 //===----------------------------------------------------------------------===//
+// OptionValue class
+
+// Support value comparison outside the template.
+struct GenericOptionValue {
+  virtual ~GenericOptionValue() {}
+  virtual bool compare(const GenericOptionValue &V) const = 0;
+};
+
+template<class DataType> struct OptionValue;
+
+// The default value safely does nothing. Option value printing is only
+// best-effort.
+template<class DataType, bool isClass>
+struct OptionValueBase : public GenericOptionValue {
+  // Temporary storage for argument passing.
+  typedef OptionValue<DataType> WrapperType;
+
+  bool hasValue() const { return false; }
+
+  const DataType &getValue() const { assert(false && "no default value"); }
+
+  // Some options may take their value from a different data type.
+  template<class DT>
+  void setValue(const DT& V) {}
+
+  bool compare(const DataType &V) const { return false; }
+
+  virtual bool compare(const GenericOptionValue& V) const { return false; }
+};
+
+// Simple copy of the option value.
+template<class DataType>
+class OptionValueCopy : public GenericOptionValue {
+  DataType Value;
+  bool Valid;
+public:
+  OptionValueCopy() : Valid(false) {}
+
+  bool hasValue() const { return Valid; }
+
+  const DataType &getValue() const {
+    assert(Valid && "invalid option value");
+    return Value;
+  }
+
+  void setValue(const DataType &V) { Valid = true; Value = V; }
+
+  bool compare(const DataType &V) const {
+    return Valid && (Value != V);
+  }
+
+  virtual bool compare(const GenericOptionValue &V) const {
+    const OptionValueCopy<DataType> &VC =
+      static_cast< const OptionValueCopy<DataType>& >(V);
+    if (!VC.hasValue) return false;
+    return compare(VC.getValue());
+  }
+};
+
+// Non-class option values.
+template<class DataType>
+struct OptionValueBase<DataType, false> : OptionValueCopy<DataType> {
+  typedef DataType WrapperType;
+};
+
+// Top-level option class.
+template<class DataType>
+struct OptionValue : OptionValueBase<DataType, is_class<DataType>::value> {
+  OptionValue() {}
+
+  OptionValue(const DataType& V) {
+    this->setValue(V);
+  }
+  // Some options may take their value from a different data type.
+  template<class DT>
+  OptionValue<DataType> &operator=(const DT& V) {
+    this->setValue(V);
+    return *this;
+  }
+};
+
+// Other safe-to-copy-by-value common option types.
+enum boolOrDefault { BOU_UNSET, BOU_TRUE, BOU_FALSE };
+template<>
+struct OptionValue<cl::boolOrDefault> : OptionValueCopy<cl::boolOrDefault> {
+  typedef cl::boolOrDefault WrapperType;
+
+  OptionValue() {}
+
+  OptionValue(const cl::boolOrDefault& V) {
+    this->setValue(V);
+  }
+  OptionValue<cl::boolOrDefault> &operator=(const cl::boolOrDefault& V) {
+    setValue(V);
+    return *this;
+  }
+};
+
+template<>
+struct OptionValue<std::string> : OptionValueCopy<std::string> {
+  typedef StringRef WrapperType;
+
+  OptionValue() {}
+
+  OptionValue(const std::string& V) {
+    this->setValue(V);
+  }
+  OptionValue<std::string> &operator=(const std::string& V) {
+    setValue(V);
+    return *this;
+  }
+};
+
+//===----------------------------------------------------------------------===//
 // Enum valued command line option
 //
 #define clEnumVal(ENUMVAL, DESC) #ENUMVAL, int(ENUMVAL), DESC
@@ -355,7 +477,6 @@
     return Vals;
 }
 
-
 //===----------------------------------------------------------------------===//
 // parser class - Parameterizable parser for different data types.  By default,
 // known data types (string, int, bool) have specialized parsers, that do what
@@ -368,7 +489,16 @@
 // not need replicated for every instance of the generic parser.  This also
 // allows us to put stuff into CommandLine.cpp
 //
-struct generic_parser_base {
+class generic_parser_base {
+protected:
+  class GenericOptionInfo {
+  public:
+    GenericOptionInfo(const char *name, const char *helpStr) :
+      Name(name), HelpStr(helpStr) {}
+    const char *Name;
+    const char *HelpStr;
+  };
+public:
   virtual ~generic_parser_base() {}  // Base class should have virtual-dtor
 
   // getNumOptions - Virtual function implemented by generic subclass to
@@ -385,11 +515,28 @@
   // Return the width of the option tag for printing...
   virtual size_t getOptionWidth(const Option &O) const;
 
+  virtual const GenericOptionValue &getOptionValue(unsigned N) const = 0;
+
   // printOptionInfo - Print out information about this option.  The
   // to-be-maintained width is specified.
   //
   virtual void printOptionInfo(const Option &O, size_t GlobalWidth) const;
 
+  void printGenericOptionDiff(const Option &O, const GenericOptionValue &V,
+                              const GenericOptionValue &Default,
+                              size_t GlobalWidth) const;
+
+  // printOptionDiff - print the value of an option and it's default.
+  //
+  // Template definition ensures that the option and default have the same
+  // DataType (via the same AnyOptionValue).
+  template<class AnyOptionValue>
+  void printOptionDiff(const Option &O, const AnyOptionValue &V,
+                       const AnyOptionValue &Default,
+                       size_t GlobalWidth) const {
+    printGenericOptionDiff(O, V, Default, GlobalWidth);
+  }
+
   void initialize(Option &O) {
     // All of the modifiers for the option have been processed by now, so the
     // argstr field should be stable, copy it down now.
@@ -443,13 +590,11 @@
 template <class DataType>
 class parser : public generic_parser_base {
 protected:
-  class OptionInfo {
+  class OptionInfo : public GenericOptionInfo {
   public:
     OptionInfo(const char *name, DataType v, const char *helpStr) :
-      Name(name), V(v), HelpStr(helpStr) {}
-    const char *Name;
-    DataType V;
-    const char *HelpStr;
+      GenericOptionInfo(name, helpStr), V(v) {}
+    OptionValue<DataType> V;
   };
   SmallVector<OptionInfo, 8> Values;
 public:
@@ -462,6 +607,11 @@
     return Values[N].HelpStr;
   }
 
+  // getOptionValue - Return the value of option name N.
+  virtual const GenericOptionValue &getOptionValue(unsigned N) const {
+    return Values[N].V;
+  }
+
   // parse - Return true on error.
   bool parse(Option &O, StringRef ArgName, StringRef Arg, DataType &V) {
     StringRef ArgVal;
@@ -473,7 +623,7 @@
     for (unsigned i = 0, e = static_cast<unsigned>(Values.size());
          i != e; ++i)
       if (Values[i].Name == ArgVal) {
-        V = Values[i].V;
+        V = Values[i].V.getValue();
         return false;
       }
 
@@ -522,11 +672,19 @@
   //
   void printOptionInfo(const Option &O, size_t GlobalWidth) const;
 
+  // printOptionNoValue - Print a placeholder for options that don't yet support
+  // printOptionDiff().
+  void printOptionNoValue(const Option &O, size_t GlobalWidth) const;
+
   // getValueName - Overload in subclass to provide a better default value.
   virtual const char *getValueName() const { return "value"; }
 
   // An out-of-line virtual method to provide a 'home' for this class.
   virtual void anchor();
+
+protected:
+  // A helper for basic_parser::printOptionDiff.
+  void printOptionName(const Option &O, size_t GlobalWidth) const;
 };
 
 // basic_parser - The real basic parser is just a template wrapper that provides
@@ -536,6 +694,7 @@
 class basic_parser : public basic_parser_impl {
 public:
   typedef DataType parser_data_type;
+  typedef OptionValue<DataType> OptVal;
 };
 
 //--------------------------------------------------
@@ -561,6 +720,9 @@
   // getValueName - Do not print =<value> at all.
   virtual const char *getValueName() const { return 0; }
 
+  void printOptionDiff(const Option &O, bool V, OptVal Default,
+                       size_t GlobalWidth) const;
+
   // An out-of-line virtual method to provide a 'home' for this class.
   virtual void anchor();
 };
@@ -569,7 +731,6 @@
 
 //--------------------------------------------------
 // parser<boolOrDefault>
-enum boolOrDefault { BOU_UNSET, BOU_TRUE, BOU_FALSE };
 template<>
 class parser<boolOrDefault> : public basic_parser<boolOrDefault> {
 public:
@@ -583,6 +744,9 @@
   // getValueName - Do not print =<value> at all.
   virtual const char *getValueName() const { return 0; }
 
+  void printOptionDiff(const Option &O, boolOrDefault V, OptVal Default,
+                       size_t GlobalWidth) const;
+
   // An out-of-line virtual method to provide a 'home' for this class.
   virtual void anchor();
 };
@@ -601,6 +765,9 @@
   // getValueName - Overload in subclass to provide a better default value.
   virtual const char *getValueName() const { return "int"; }
 
+  void printOptionDiff(const Option &O, int V, OptVal Default,
+                       size_t GlobalWidth) const;
+
   // An out-of-line virtual method to provide a 'home' for this class.
   virtual void anchor();
 };
@@ -620,6 +787,9 @@
   // getValueName - Overload in subclass to provide a better default value.
   virtual const char *getValueName() const { return "uint"; }
 
+  void printOptionDiff(const Option &O, unsigned V, OptVal Default,
+                       size_t GlobalWidth) const;
+
   // An out-of-line virtual method to provide a 'home' for this class.
   virtual void anchor();
 };
@@ -638,6 +808,9 @@
   // getValueName - Overload in subclass to provide a better default value.
   virtual const char *getValueName() const { return "number"; }
 
+  void printOptionDiff(const Option &O, double V, OptVal Default,
+                       size_t GlobalWidth) const;
+
   // An out-of-line virtual method to provide a 'home' for this class.
   virtual void anchor();
 };
@@ -656,6 +829,9 @@
   // getValueName - Overload in subclass to provide a better default value.
   virtual const char *getValueName() const { return "number"; }
 
+  void printOptionDiff(const Option &O, float V, OptVal Default,
+                       size_t GlobalWidth) const;
+
   // An out-of-line virtual method to provide a 'home' for this class.
   virtual void anchor();
 };
@@ -677,6 +853,9 @@
   // getValueName - Overload in subclass to provide a better default value.
   virtual const char *getValueName() const { return "string"; }
 
+  void printOptionDiff(const Option &O, StringRef V, OptVal Default,
+                       size_t GlobalWidth) const;
+
   // An out-of-line virtual method to provide a 'home' for this class.
   virtual void anchor();
 };
@@ -698,12 +877,63 @@
   // getValueName - Overload in subclass to provide a better default value.
   virtual const char *getValueName() const { return "char"; }
 
+  void printOptionDiff(const Option &O, char V, OptVal Default,
+                       size_t GlobalWidth) const;
+
   // An out-of-line virtual method to provide a 'home' for this class.
   virtual void anchor();
 };
 
 EXTERN_TEMPLATE_INSTANTIATION(class basic_parser<char>);
 
+//--------------------------------------------------
+// PrintOptionDiff
+//
+// This collection of wrappers is the intermediary between class opt and class
+// parser to handle all the template nastiness.
+
+// This overloaded function is selected by the generic parser.
+template<class ParserClass, class DT>
+void printOptionDiff(const Option &O, const generic_parser_base &P, const DT &V,
+                     const OptionValue<DT> &Default, size_t GlobalWidth) {
+  OptionValue<DT> OV = V;
+  P.printOptionDiff(O, OV, Default, GlobalWidth);
+}
+
+// This is instantiated for basic parsers when the parsed value has a different
+// type than the option value. e.g. HelpPrinter.
+template<class ParserDT, class ValDT>
+struct OptionDiffPrinter {
+  void print(const Option &O, const parser<ParserDT> P, const ValDT &V,
+             const OptionValue<ValDT> &Default, size_t GlobalWidth) {
+    P.printOptionNoValue(O, GlobalWidth);
+  }
+};
+
+// This is instantiated for basic parsers when the parsed value has the same
+// type as the option value.
+template<class DT>
+struct OptionDiffPrinter<DT, DT> {
+  void print(const Option &O, const parser<DT> P, const DT &V,
+             const OptionValue<DT> &Default, size_t GlobalWidth) {
+    P.printOptionDiff(O, V, Default, GlobalWidth);
+  }
+};
+
+// This overloaded function is selected by the basic parser, which may parse a
+// different type than the option type.
+template<class ParserClass, class ValDT>
+void printOptionDiff(
+  const Option &O,
+  const basic_parser<typename ParserClass::parser_data_type> &P,
+  const ValDT &V, const OptionValue<ValDT> &Default,
+  size_t GlobalWidth) {
+
+  OptionDiffPrinter<typename ParserClass::parser_data_type, ValDT> printer;
+  printer.print(O, static_cast<const ParserClass&>(P), V, Default,
+                GlobalWidth);
+}
+
 //===----------------------------------------------------------------------===//
 // applicator class - This class is used because we must use partial
 // specialization to handle literal string arguments specially (const char* does
@@ -753,7 +983,6 @@
   applicator<Mod>::opt(M, *O);
 }
 
-
 //===----------------------------------------------------------------------===//
 // opt_storage class
 
@@ -764,6 +993,7 @@
 template<class DataType, bool ExternalStorage, bool isClass>
 class opt_storage {
   DataType *Location;   // Where to store the object...
+  OptionValue<DataType> Default;
 
   void check() const {
     assert(Location != 0 && "cl::location(...) not specified for a command "
@@ -777,21 +1007,25 @@
     if (Location)
       return O.error("cl::location(x) specified more than once!");
     Location = &L;
+    Default = L;
     return false;
   }
 
   template<class T>
-  void setValue(const T &V) {
+  void setValue(const T &V, bool initial = false) {
     check();
     *Location = V;
+    if (initial)
+      Default = V;
   }
 
   DataType &getValue() { check(); return *Location; }
   const DataType &getValue() const { check(); return *Location; }
 
   operator DataType() const { return this->getValue(); }
-};
 
+  const OptionValue<DataType> &getDefault() const { return Default; }
+};
 
 // Define how to hold a class type object, such as a string.  Since we can
 // inherit from a class, we do so.  This makes us exactly compatible with the
@@ -800,11 +1034,19 @@
 template<class DataType>
 class opt_storage<DataType,false,true> : public DataType {
 public:
+  OptionValue<DataType> Default;
+
   template<class T>
-  void setValue(const T &V) { DataType::operator=(V); }
+  void setValue(const T &V, bool initial = false) {
+    DataType::operator=(V);
+    if (initial)
+      Default = V;
+  }
 
   DataType &getValue() { return *this; }
   const DataType &getValue() const { return *this; }
+
+  const OptionValue<DataType> &getDefault() const { return Default; }
 };
 
 // Define a partial specialization to handle things we cannot inherit from.  In
@@ -815,16 +1057,23 @@
 class opt_storage<DataType, false, false> {
 public:
   DataType Value;
+  OptionValue<DataType> Default;
 
   // Make sure we initialize the value with the default constructor for the
   // type.
   opt_storage() : Value(DataType()) {}
 
   template<class T>
-  void setValue(const T &V) { Value = V; }
+  void setValue(const T &V, bool initial = false) {
+    Value = V;
+    if (initial)
+      Default = V;
+  }
   DataType &getValue() { return Value; }
   DataType getValue() const { return Value; }
 
+  const OptionValue<DataType> &getDefault() const { return Default; }
+
   operator DataType() const { return getValue(); }
 
   // If the datatype is a pointer, support -> on it.
@@ -866,13 +1115,20 @@
     Parser.printOptionInfo(*this, GlobalWidth);
   }
 
+  virtual void printOptionValue(size_t GlobalWidth, bool Force) const {
+    if (Force || this->getDefault().compare(this->getValue())) {
+      cl::printOptionDiff<ParserClass>(
+        *this, Parser, this->getValue(), this->getDefault(), GlobalWidth);
+    }
+  }
+
   void done() {
     addArgument();
     Parser.initialize(*this);
   }
 public:
   // setInitialValue - Used by the cl::init modifier...
-  void setInitialValue(const DataType &V) { this->setValue(V); }
+  void setInitialValue(const DataType &V) { this->setValue(V, true); }
 
   ParserClass &getParser() { return Parser; }
 
@@ -1030,6 +1286,9 @@
     Parser.printOptionInfo(*this, GlobalWidth);
   }
 
+  // Unimplemented: list options don't currently store their default value.
+  virtual void printOptionValue(size_t GlobalWidth, bool Force) const {}
+
   void done() {
     addArgument();
     Parser.initialize(*this);
@@ -1229,6 +1488,9 @@
     Parser.printOptionInfo(*this, GlobalWidth);
   }
 
+  // Unimplemented: bits options don't currently store their default values.
+  virtual void printOptionValue(size_t GlobalWidth, bool Force) const {}
+
   void done() {
     addArgument();
     Parser.initialize(*this);
@@ -1320,6 +1582,9 @@
   virtual size_t getOptionWidth() const;
   virtual void printOptionInfo(size_t GlobalWidth) const;
 
+  // Aliases do not need to print their values.
+  virtual void printOptionValue(size_t GlobalWidth, bool Force) const {}
+
   void done() {
     if (!hasArgStr())
       error("cl::alias must have argument name specified!");

Modified: llvm/trunk/lib/Support/CommandLine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/CommandLine.cpp?rev=128910&r1=128909&r2=128910&view=diff
==============================================================================
--- llvm/trunk/lib/Support/CommandLine.cpp (original)
+++ llvm/trunk/lib/Support/CommandLine.cpp Tue Apr  5 13:54:36 2011
@@ -908,8 +908,6 @@
   errs().indent(GlobalWidth-L-6) << " - " << HelpStr << "\n";
 }
 
-
-
 //===----------------------------------------------------------------------===//
 // Parser Implementation code...
 //
@@ -939,7 +937,11 @@
   outs().indent(GlobalWidth-getOptionWidth(O)) << " - " << O.HelpStr << '\n';
 }
 
-
+void basic_parser_impl::printOptionName(const Option &O,
+                                        size_t GlobalWidth) const {
+  outs() << "  -" << O.ArgStr;
+  outs().indent(GlobalWidth-std::strlen(O.ArgStr));
+}
 
 
 // parser<bool> implementation
@@ -1083,6 +1085,89 @@
   }
 }
 
+static const size_t MaxOptWidth = 8; // arbitrary spacing for printOptionDiff
+
+// printGenericOptionDiff - Print the value of this option and it's default.
+//
+// "Generic" options have each value mapped to a name.
+void generic_parser_base::
+printGenericOptionDiff(const Option &O, const GenericOptionValue &Value,
+                       const GenericOptionValue &Default,
+                       size_t GlobalWidth) const {
+  outs() << "  -" << O.ArgStr;
+  outs().indent(GlobalWidth-std::strlen(O.ArgStr));
+
+  unsigned NumOpts = getNumOptions();
+  for (unsigned i = 0; i != NumOpts; ++i) {
+    if (Value.compare(getOptionValue(i)))
+      continue;
+
+    outs() << "= " << getOption(i);
+    size_t L = std::strlen(getOption(i));
+    size_t NumSpaces = MaxOptWidth > L ? MaxOptWidth - L : 0;
+    outs().indent(NumSpaces) << " (default: ";
+    for (unsigned j = 0; j != NumOpts; ++j) {
+      if (Default.compare(getOptionValue(j)))
+        continue;
+      outs() << getOption(j);
+      break;
+    }
+    outs() << ")\n";
+    return;
+  }
+  outs() << "= *unknown option value*\n";
+}
+
+// printOptionDiff - Specializations for printing basic value types.
+//
+#define PRINT_OPT_DIFF(T)                                               \
+  void parser<T>::                                                      \
+  printOptionDiff(const Option &O, T V, OptionValue<T> D,               \
+                  size_t GlobalWidth) const {                           \
+    printOptionName(O, GlobalWidth);                                    \
+    std::string Str;                                                    \
+    {                                                                   \
+      raw_string_ostream SS(Str);                                       \
+      SS << V;                                                          \
+    }                                                                   \
+    outs() << "= " << Str;                                              \
+    size_t NumSpaces = MaxOptWidth > Str.size() ? MaxOptWidth - Str.size() : 0;\
+    outs().indent(NumSpaces) << " (default: ";                          \
+    if (D.hasValue())                                                   \
+      outs() << D.getValue();                                           \
+    else                                                                \
+      outs() << "*no default*";                                         \
+    outs() << ")\n";                                                    \
+  }                                                                     \
+
+PRINT_OPT_DIFF(bool);
+PRINT_OPT_DIFF(boolOrDefault);
+PRINT_OPT_DIFF(int);
+PRINT_OPT_DIFF(unsigned);
+PRINT_OPT_DIFF(double);
+PRINT_OPT_DIFF(float);
+PRINT_OPT_DIFF(char);
+
+void parser<std::string>::
+printOptionDiff(const Option &O, StringRef V, OptionValue<std::string> D,
+                size_t GlobalWidth) const {
+  printOptionName(O, GlobalWidth);
+  outs() << "= " << V;
+  size_t NumSpaces = MaxOptWidth > V.size() ? MaxOptWidth - V.size() : 0;
+  outs().indent(NumSpaces) << " (default: ";
+  if (D.hasValue())
+    outs() << D.getValue();
+  else
+    outs() << "*no default*";
+  outs() << ")\n";
+}
+
+// Print a placeholder for options that don't yet support printOptionDiff().
+void basic_parser_impl::
+printOptionNoValue(const Option &O, size_t GlobalWidth) const {
+  printOptionName(O, GlobalWidth);
+  outs() << "= *cannot print option value*\n";
+}
 
 //===----------------------------------------------------------------------===//
 // -help and -help-hidden option implementation
@@ -1094,6 +1179,35 @@
   return strcmp(((pair_ty*)LHS)->first, ((pair_ty*)RHS)->first);
 }
 
+// Copy Options into a vector so we can sort them as we like.
+static void
+sortOpts(StringMap<Option*> &OptMap,
+         SmallVectorImpl< std::pair<const char *, Option*> > &Opts,
+         bool ShowHidden) {
+  SmallPtrSet<Option*, 128> OptionSet;  // Duplicate option detection.
+
+  for (StringMap<Option*>::iterator I = OptMap.begin(), E = OptMap.end();
+       I != E; ++I) {
+    // Ignore really-hidden options.
+    if (I->second->getOptionHiddenFlag() == ReallyHidden)
+      continue;
+
+    // Unless showhidden is set, ignore hidden flags.
+    if (I->second->getOptionHiddenFlag() == Hidden && !ShowHidden)
+      continue;
+
+    // If we've already seen this option, don't add it to the list again.
+    if (!OptionSet.insert(I->second))
+      continue;
+
+    Opts.push_back(std::pair<const char *, Option*>(I->getKey().data(),
+                                                    I->second));
+  }
+
+  // Sort the options list alphabetically.
+  qsort(Opts.data(), Opts.size(), sizeof(Opts[0]), OptNameCompare);
+}
+
 namespace {
 
 class HelpPrinter {
@@ -1115,30 +1229,8 @@
     StringMap<Option*> OptMap;
     GetOptionInfo(PositionalOpts, SinkOpts, OptMap);
 
-    // Copy Options into a vector so we can sort them as we like.
     SmallVector<std::pair<const char *, Option*>, 128> Opts;
-    SmallPtrSet<Option*, 128> OptionSet;  // Duplicate option detection.
-
-    for (StringMap<Option*>::iterator I = OptMap.begin(), E = OptMap.end();
-         I != E; ++I) {
-      // Ignore really-hidden options.
-      if (I->second->getOptionHiddenFlag() == ReallyHidden)
-        continue;
-
-      // Unless showhidden is set, ignore hidden flags.
-      if (I->second->getOptionHiddenFlag() == Hidden && !ShowHidden)
-        continue;
-
-      // If we've already seen this option, don't add it to the list again.
-      if (!OptionSet.insert(I->second))
-        continue;
-
-      Opts.push_back(std::pair<const char *, Option*>(I->getKey().data(),
-                                                      I->second));
-    }
-
-    // Sort the options list alphabetically.
-    qsort(Opts.data(), Opts.size(), sizeof(Opts[0]), OptNameCompare);
+    sortOpts(OptMap, Opts, ShowHidden);
 
     if (ProgramOverview)
       outs() << "OVERVIEW: " << ProgramOverview << "\n";
@@ -1197,6 +1289,38 @@
 HHOp("help-hidden", cl::desc("Display all available options"),
      cl::location(HiddenPrinter), cl::Hidden, cl::ValueDisallowed);
 
+static cl::opt<bool>
+PrintOptions("print-options",
+             cl::desc("Print non-default options after command line parsing"),
+             cl::Hidden, cl::init(false));
+
+static cl::opt<bool>
+PrintAllOptions("print-all-options",
+                cl::desc("Print all option values after command line parsing"),
+                cl::Hidden, cl::init(false));
+
+// Print the value of each option.
+void cl::PrintOptionValues() {
+  if (!PrintOptions && !PrintAllOptions) return;
+
+  // Get all the options.
+  SmallVector<Option*, 4> PositionalOpts;
+  SmallVector<Option*, 4> SinkOpts;
+  StringMap<Option*> OptMap;
+  GetOptionInfo(PositionalOpts, SinkOpts, OptMap);
+
+  SmallVector<std::pair<const char *, Option*>, 128> Opts;
+  sortOpts(OptMap, Opts, /*ShowHidden*/true);
+
+  // Compute the maximum argument length...
+  size_t MaxArgLen = 0;
+  for (size_t i = 0, e = Opts.size(); i != e; ++i)
+    MaxArgLen = std::max(MaxArgLen, Opts[i].second->getOptionWidth());
+
+  for (size_t i = 0, e = Opts.size(); i != e; ++i)
+    Opts[i].second->printOptionValue(MaxArgLen, PrintAllOptions);
+}
+
 static void (*OverrideVersionPrinter)() = 0;
 
 static int TargetArraySortFn(const void *LHS, const void *RHS) {

Modified: llvm/trunk/tools/llc/llc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llc/llc.cpp?rev=128910&r1=128909&r2=128910&view=diff
==============================================================================
--- llvm/trunk/tools/llc/llc.cpp (original)
+++ llvm/trunk/tools/llc/llc.cpp Tue Apr  5 13:54:36 2011
@@ -338,6 +338,9 @@
       return 1;
     }
 
+    // Before executing passes, print the final values of the LLVM options.
+    cl::PrintOptionValues();
+
     PM.run(mod);
   }
 

Modified: llvm/trunk/tools/opt/opt.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/opt/opt.cpp?rev=128910&r1=128909&r2=128910&view=diff
==============================================================================
--- llvm/trunk/tools/opt/opt.cpp (original)
+++ llvm/trunk/tools/opt/opt.cpp Tue Apr  5 13:54:36 2011
@@ -701,6 +701,9 @@
       Passes.add(createBitcodeWriterPass(Out->os()));
   }
 
+  // Before executing passes, print the final values of the LLVM options.
+  cl::PrintOptionValues();
+
   // Now that we have all of the passes ready, run them.
   Passes.run(*M.get());
 



From johnny.chen at apple.com  Tue Apr  5 14:09:07 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Tue, 05 Apr 2011 12:09:07 -0700
Subject: [llvm-commits] [llvm] r128897 - in /llvm/trunk:
 lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
 test/MC/ARM/simple-encoding.ll test/MC/Disassembler/ARM/arm-tests.txt
In-Reply-To: <5CB8B13B-E6F1-4C6F-9DD8-2D3B3FE68C36@apple.com>
References: <20110405180246.D92582A6C12C@llvm.org>
	<5CB8B13B-E6F1-4C6F-9DD8-2D3B3FE68C36@apple.com>
Message-ID: <8E8EDE1F-0A82-4C29-BCB9-FBB0880F77C2@apple.com>

Fixed in http://llvm.org/viewvc/llvm-project?view=rev&revision=128906.
Sorry about that.
On Apr 5, 2011, at 11:54 AM, Bob Wilson wrote:

> This is breaking a bunch of tests for me:
> 
> Failing Tests (6):
>    LLVM :: CodeGen/ARM/constants.ll
>    LLVM :: CodeGen/ARM/fp.ll
>    LLVM :: CodeGen/ARM/long.ll
>    LLVM :: CodeGen/ARM/select-imm.ll
>    LLVM :: CodeGen/ARM/select_xform.ll
>    LLVM :: CodeGen/ARM/sub.ll
> 
> Please fix or revert ASAP.
> 
> On Apr 5, 2011, at 11:02 AM, Johnny Chen wrote:
> 
>> Author: johnny
>> Date: Tue Apr  5 13:02:46 2011
>> New Revision: 128897
>> 
>> URL: http://llvm.org/viewvc/llvm-project?rev=128897&view=rev
>> Log:
>> Constants with multiple encodings (ARM):
>> An alternative syntax is available for a modified immediate constant that permits the programmer to specify
>> the encoding directly. In this syntax, #<const> is instead written as #<byte>,#<rot>, where:
>> 
>>   <byte> is the numeric value of abcdefgh, in the range 0-255
>>   <rot> is twice the numeric value of rotation, an even number in the range 0-30.
>> 
>> Modified:
>>   llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
>>   llvm/trunk/test/MC/ARM/simple-encoding.ll
>>   llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt
>> 
>> Modified: llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp?rev=128897&r1=128896&r2=128897&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp (original)
>> +++ llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp Tue Apr  5 13:02:46 2011
>> @@ -136,9 +136,10 @@
>>  unsigned Rot = ARM_AM::getSOImmValRot(V);
>> 
>>  // Print low-level immediate formation info, per
>> -  // A5.1.3: "Data-processing operands - Immediate".
>> +  // A5.2.3: Data-processing (immediate), and
>> +  // A5.2.4: Modified immediate constants in ARM instructions
>>  if (Rot) {
>> -    O << "#" << Imm << ", " << Rot;
>> +    O << "#" << Imm << ", #" << Rot;
>>    // Pretty printed version.
>>    if (CommentStream)
>>      *CommentStream << (int)ARM_AM::rotr32(Imm, Rot) << "\n";
>> 
>> Modified: llvm/trunk/test/MC/ARM/simple-encoding.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/simple-encoding.ll?rev=128897&r1=128896&r2=128897&view=diff
>> ==============================================================================
>> --- llvm/trunk/test/MC/ARM/simple-encoding.ll (original)
>> +++ llvm/trunk/test/MC/ARM/simple-encoding.ll Tue Apr  5 13:02:46 2011
>> @@ -39,7 +39,7 @@
>> 
>> define i32 @f4(i32 %a, i32 %b) {
>> ; CHECK: f4
>> -; CHECK: add r0, r0, #254, 28         @ encoding: [0xfe,0x0e,0x80,0xe2]
>> +; CHECK: add r0, r0, #254, #28        @ encoding: [0xfe,0x0e,0x80,0xe2]
>> ; CHECK:                              @ 4064
>> ; CHECK: bx lr                        @ encoding: [0x1e,0xff,0x2f,0xe1]
>>  %add = add nsw i32 %a, 4064
>> @@ -118,7 +118,7 @@
>> define i64 @f13() {
>> ; CHECK: f13:
>> ; CHECK: mvn r0, #0                   @ encoding: [0x00,0x00,0xe0,0xe3]
>> -; CHECK: mvn r1, #2, 2                @ encoding: [0x02,0x11,0xe0,0xe3]
>> +; CHECK: mvn r1, #2, #2               @ encoding: [0x02,0x11,0xe0,0xe3]
>>        ret i64 9223372036854775807
>> }
>> 
>> @@ -229,7 +229,7 @@
>> 
>> define void @f24(i32 %a) {
>> ; CHECK: f24
>> -; CHECK: cmp r0, #1, 16               @ encoding: [0x01,0x08,0x50,0xe3]
>> +; CHECK: cmp r0, #1, #16               @ encoding: [0x01,0x08,0x50,0xe3]
>>        %b = icmp ugt i32 %a, 65536
>>        br i1 %b, label %r, label %r
>> r:
>> 
>> Modified: llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt?rev=128897&r1=128896&r2=128897&view=diff
>> ==============================================================================
>> --- llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt (original)
>> +++ llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt Tue Apr  5 13:02:46 2011
>> @@ -1,6 +1,6 @@
>> # RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 | FileCheck %s
>> 
>> -# CHECK:	addpl	r4, pc, #19, 8
>> +# CHECK:	addpl	r4, pc, #19, #8
>> 0x4c 0x45 0x8f 0x52
>> 
>> # CHECK:	b	#0
>> @@ -66,7 +66,7 @@
>> # CHECK:	movt	r8, #65535
>> 0xff 0x8f 0x4f 0xe3
>> 
>> -# CHECK:	mvnspl	r7, #245, 2
>> +# CHECK:	mvnspl	r7, #245, #2
>> 0xf5 0x71 0xf0 0x53
>> 
>> # CHECK-NOT:	orr	r7, r8, r7, rrx #0
>> @@ -143,7 +143,7 @@
>> # CHECK: msr cpsr_fc, r0
>> 0x00 0xf0 0x29 0xe1
>> 
>> -# CHECK:	msrmi	cpsr_c, #241, 8
>> +# CHECK:	msrmi	cpsr_c, #241, #8
>> 0xf1 0xf4 0x21 0x43
>> 
>> # CHECK: rsbs r6, r7, r8
>> 
>> 
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
> 


From atrick at apple.com  Tue Apr  5 14:13:11 2011
From: atrick at apple.com (Andrew Trick)
Date: Tue, 05 Apr 2011 19:13:11 -0000
Subject: [llvm-commits] [llvm] r128912 -
	/llvm/trunk/include/llvm/Support/CommandLine.h
Message-ID: <20110405191311.3A6542A6C12C@llvm.org>

Author: atrick
Date: Tue Apr  5 14:13:11 2011
New Revision: 128912

URL: http://llvm.org/viewvc/llvm-project?rev=128912&view=rev
Log:
Fix a typo.

Modified:
    llvm/trunk/include/llvm/Support/CommandLine.h

Modified: llvm/trunk/include/llvm/Support/CommandLine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/CommandLine.h?rev=128912&r1=128911&r2=128912&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/CommandLine.h (original)
+++ llvm/trunk/include/llvm/Support/CommandLine.h Tue Apr  5 14:13:11 2011
@@ -365,7 +365,7 @@
   virtual bool compare(const GenericOptionValue &V) const {
     const OptionValueCopy<DataType> &VC =
       static_cast< const OptionValueCopy<DataType>& >(V);
-    if (!VC.hasValue) return false;
+    if (!VC.hasValue()) return false;
     return compare(VC.getValue());
   }
 };



From johnny.chen at apple.com  Tue Apr  5 14:42:11 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Tue, 05 Apr 2011 19:42:11 -0000
Subject: [llvm-commits] [llvm] r128913 - in /llvm/trunk:
 lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
 test/MC/Disassembler/ARM/thumb-printf.txt
 test/MC/Disassembler/ARM/thumb-tests.txt
Message-ID: <20110405194211.728E72A6C12C@llvm.org>

Author: johnny
Date: Tue Apr  5 14:42:11 2011
New Revision: 128913

URL: http://llvm.org/viewvc/llvm-project?rev=128913&view=rev
Log:
ARM disassembler should flag (rGPRRegClassID, r13|r15) as an error.

Modified:
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
    llvm/trunk/test/MC/Disassembler/ARM/thumb-printf.txt
    llvm/trunk/test/MC/Disassembler/ARM/thumb-tests.txt

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp?rev=128913&r1=128912&r2=128913&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp Tue Apr  5 14:42:11 2011
@@ -82,8 +82,16 @@
 // FIXME: Auto-gened?
 static unsigned
 getRegisterEnum(BO B, unsigned RegClassID, unsigned RawRegister) {
-  // For this purpose, we can treat rGPR as if it were GPR.
-  if (RegClassID == ARM::rGPRRegClassID) RegClassID = ARM::GPRRegClassID;
+  if (RegClassID == ARM::rGPRRegClassID) {
+    // Check for The register numbers 13 and 15 that are not permitted for many
+    // Thumb register specifiers.
+    if (RawRegister == 13 || RawRegister == 15) {
+      B->SetErr(-1);
+      return 0;
+    }
+    // For this purpose, we can treat rGPR as if it were GPR.
+    RegClassID = ARM::GPRRegClassID;
+  }
 
   // See also decodeNEONRd(), decodeNEONRn(), decodeNEONRm().
   unsigned RegNum =

Modified: llvm/trunk/test/MC/Disassembler/ARM/thumb-printf.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/thumb-printf.txt?rev=128913&r1=128912&r2=128913&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/thumb-printf.txt (original)
+++ llvm/trunk/test/MC/Disassembler/ARM/thumb-printf.txt Tue Apr  5 14:42:11 2011
@@ -26,7 +26,8 @@
 # CHECK-NEXT:	mov	r2, r5
 # CHECK-NEXT:	ldr	r3, [sp]
 # CHECK-NEXT:	bl	#-8390
-# CHECK-NEXT:	sub.w	sp, r7, #8
+# Data bytes (corresponds to an invalid instruction)
+# But not:	sub.w	sp, r7, #8
 # CHECK-NEXT:	pop.w	{r4, r5, r7, lr}
 # CHECK-NEXT:	add	sp, #16
 # CHECK-NEXT:	bx	lr
@@ -63,7 +64,7 @@
 0x2a	0x46
 0x00	0x9b
 0xfd	0xf7	0x9d	0xff
-0xa7	0xf1	0x08	0x0d
+# 0xa7	0xf1	0x08	0x0d
 0xbd	0xe8	0xb0	0x40
 0x04	0xb0
 0x70	0x47

Modified: llvm/trunk/test/MC/Disassembler/ARM/thumb-tests.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/thumb-tests.txt?rev=128913&r1=128912&r2=128913&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/thumb-tests.txt (original)
+++ llvm/trunk/test/MC/Disassembler/ARM/thumb-tests.txt Tue Apr  5 14:42:11 2011
@@ -42,8 +42,8 @@
 # CHECK:	ldrd	r0, r1, [r7, #64]!
 0xf7 0xe9 0x10 0x01
 
-# CHECK:	lsls.w	r0, pc, #1
-0x5f 0xea 0x4f 0x00
+# CHECK:	lsls.w	r0, r5, #1
+0x5f 0xea 0x45 0x00
 
 # CHECK:	mov	r11, r7
 0xbb 0x46



From rdivacky at freebsd.org  Tue Apr  5 15:14:21 2011
From: rdivacky at freebsd.org (Roman Divacky)
Date: Tue, 5 Apr 2011 22:14:21 +0200
Subject: [llvm-commits] [PATCH]: SandyBridge detection
Message-ID: <20110405201421.GA39134@freebsd.org>

ok to commit?

Index: lib/Support/Host.cpp
===================================================================
--- lib/Support/Host.cpp	(revision 128883)
+++ lib/Support/Host.cpp	(working copy)
@@ -214,6 +214,8 @@
                // As found in a Summer 2010 model iMac.
       case 37: // Intel Core i7, laptop version.
         return "corei7";
+      case 42: // SandyBridge
+        return "sandybridge";
 
       case 28: // Intel Atom processor. All processors are manufactured using
                // the 45 nm process

From dpatel at apple.com  Tue Apr  5 15:14:13 2011
From: dpatel at apple.com (Devang Patel)
Date: Tue, 05 Apr 2011 20:14:13 -0000
Subject: [llvm-commits] [llvm] r128914 -
	/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
Message-ID: <20110405201413.D2D382A6C12C@llvm.org>

Author: dpatel
Date: Tue Apr  5 15:14:13 2011
New Revision: 128914

URL: http://llvm.org/viewvc/llvm-project?rev=128914&view=rev
Log:
Do not emit empty name.

Modified:
    llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp

Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp?rev=128914&r1=128913&r2=128914&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp (original)
+++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp Tue Apr  5 15:14:13 2011
@@ -1225,7 +1225,8 @@
 
   ParamDIE = new DIE(dwarf::DW_TAG_template_value_parameter);
   addType(ParamDIE, TPV.getType());
-  addString(ParamDIE, dwarf::DW_AT_name, dwarf::DW_FORM_string, TPV.getName());
+  if (!TPV.getName().empty())
+    addString(ParamDIE, dwarf::DW_AT_name, dwarf::DW_FORM_string, TPV.getName());
   addUInt(ParamDIE, dwarf::DW_AT_const_value, dwarf::DW_FORM_udata, 
           TPV.getValue());
   return ParamDIE;



From clattner at apple.com  Tue Apr  5 15:23:54 2011
From: clattner at apple.com (Chris Lattner)
Date: Tue, 05 Apr 2011 13:23:54 -0700
Subject: [llvm-commits] [PATCH]: SandyBridge detection
In-Reply-To: <20110405201421.GA39134@freebsd.org>
References: <20110405201421.GA39134@freebsd.org>
Message-ID: <AE14ABC6-06E6-483C-ACC4-AEFEDEF3540C@apple.com>

Yes, please do.

-Chris

On Apr 5, 2011, at 1:14 PM, Roman Divacky wrote:

> ok to commit?
> 
> Index: lib/Support/Host.cpp
> ===================================================================
> --- lib/Support/Host.cpp	(revision 128883)
> +++ lib/Support/Host.cpp	(working copy)
> @@ -214,6 +214,8 @@
>                // As found in a Summer 2010 model iMac.
>       case 37: // Intel Core i7, laptop version.
>         return "corei7";
> +      case 42: // SandyBridge
> +        return "sandybridge";
> 
>       case 28: // Intel Atom processor. All processors are manufactured using
>                // the 45 nm process
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits


From stoklund at 2pi.dk  Tue Apr  5 15:20:26 2011
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Tue, 05 Apr 2011 20:20:26 -0000
Subject: [llvm-commits] [llvm] r128918 - in /llvm/trunk:
 lib/CodeGen/LiveRangeEdit.cpp lib/CodeGen/LiveRangeEdit.h
 test/CodeGen/X86/constant-pool-remat-0.ll
Message-ID: <20110405202026.3D2B22A6C12D@llvm.org>

Author: stoklund
Date: Tue Apr  5 15:20:26 2011
New Revision: 128918

URL: http://llvm.org/viewvc/llvm-project?rev=128918&view=rev
Log:
When dead code elimination removes all but one use, try to fold the single def into the remaining use.

Rematerialization can leave single-use loads behind that we might as well fold whenever possible.

Modified:
    llvm/trunk/lib/CodeGen/LiveRangeEdit.cpp
    llvm/trunk/lib/CodeGen/LiveRangeEdit.h
    llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll

Modified: llvm/trunk/lib/CodeGen/LiveRangeEdit.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveRangeEdit.cpp?rev=128918&r1=128917&r2=128918&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/LiveRangeEdit.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveRangeEdit.cpp Tue Apr  5 15:20:26 2011
@@ -149,6 +149,54 @@
     LIS.removeInterval(Reg);
 }
 
+bool LiveRangeEdit::foldAsLoad(LiveInterval *LI,
+                               SmallVectorImpl<MachineInstr*> &Dead,
+                               MachineRegisterInfo &MRI,
+                               LiveIntervals &LIS,
+                               const TargetInstrInfo &TII) {
+  MachineInstr *DefMI = 0, *UseMI = 0;
+
+  // Check that there is a single def and a single use.
+  for (MachineRegisterInfo::reg_nodbg_iterator I = MRI.reg_nodbg_begin(LI->reg),
+       E = MRI.reg_nodbg_end(); I != E; ++I) {
+    MachineOperand &MO = I.getOperand();
+    MachineInstr *MI = MO.getParent();
+    if (MO.isDef()) {
+      if (DefMI && DefMI != MI)
+        return false;
+      if (!MI->getDesc().canFoldAsLoad())
+        return false;
+      DefMI = MI;
+    } else if (!MO.isUndef()) {
+      if (UseMI && UseMI != MI)
+        return false;
+      // FIXME: Targets don't know how to fold subreg uses.
+      if (MO.getSubReg())
+        return false;
+      UseMI = MI;
+    }
+  }
+  if (!DefMI || !UseMI)
+    return false;
+
+  DEBUG(dbgs() << "Try to fold single def: " << *DefMI
+               << "       into single use: " << *UseMI);
+
+  SmallVector<unsigned, 8> Ops;
+  if (UseMI->readsWritesVirtualRegister(LI->reg, &Ops).second)
+    return false;
+
+  MachineInstr *FoldMI = TII.foldMemoryOperand(UseMI, Ops, DefMI);
+  if (!FoldMI)
+    return false;
+  DEBUG(dbgs() << "                folded: " << *FoldMI);
+  LIS.ReplaceMachineInstrInMaps(UseMI, FoldMI);
+  UseMI->eraseFromParent();
+  DefMI->addRegisterDead(LI->reg, 0);
+  Dead.push_back(DefMI);
+  return true;
+}
+
 void LiveRangeEdit::eliminateDeadDefs(SmallVectorImpl<MachineInstr*> &Dead,
                                       LiveIntervals &LIS, VirtRegMap &VRM,
                                       const TargetInstrInfo &TII) {
@@ -218,6 +266,8 @@
     // Shrink just one live interval. Then delete new dead defs.
     LiveInterval *LI = ToShrink.back();
     ToShrink.pop_back();
+    if (foldAsLoad(LI, Dead, VRM.getRegInfo(), LIS, TII))
+      continue;
     if (delegate_)
       delegate_->LRE_WillShrinkVirtReg(LI->reg);
     if (!LIS.shrinkToUses(LI, &Dead))

Modified: llvm/trunk/lib/CodeGen/LiveRangeEdit.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveRangeEdit.h?rev=128918&r1=128917&r2=128918&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/LiveRangeEdit.h (original)
+++ llvm/trunk/lib/CodeGen/LiveRangeEdit.h Tue Apr  5 15:20:26 2011
@@ -80,6 +80,11 @@
   bool allUsesAvailableAt(const MachineInstr *OrigMI, SlotIndex OrigIdx,
                           SlotIndex UseIdx, LiveIntervals &lis);
 
+  /// foldAsLoad - If LI has a single use and a single def that can be folded as
+  /// a load, eliminate the register by folding the def into the use.
+  bool foldAsLoad(LiveInterval *LI, SmallVectorImpl<MachineInstr*> &Dead,
+                  MachineRegisterInfo&, LiveIntervals&, const TargetInstrInfo&);
+
 public:
   /// Create a LiveRangeEdit for breaking down parent into smaller pieces.
   /// @param parent The register being spilled or split.

Modified: llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll?rev=128918&r1=128917&r2=128918&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll (original)
+++ llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll Tue Apr  5 15:20:26 2011
@@ -1,4 +1,5 @@
 ; RUN: llc < %s -mtriple=x86_64-linux   | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-linux -regalloc=greedy | FileCheck %s
 ; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s
 ; CHECK:     LCPI
 ; CHECK:     LCPI



From stoklund at 2pi.dk  Tue Apr  5 15:20:30 2011
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Tue, 05 Apr 2011 20:20:30 -0000
Subject: [llvm-commits] [llvm] r128919 - in /llvm/trunk/test/CodeGen/X86:
 2008-02-22-ReMatBug.ll 2008-03-18-CoalescerBug.ll
 2008-09-18-inline-asm-2.ll 2009-03-16-SpillerBug.ll
 2010-02-19-TailCallRetAddrBug.ll 2010-04-23-mmx-movdq2q.ll
 2010-05-03-CoalescerSubRegClobber.ll 2010-09-17-SideEffectsInChain.ll
 abi-isel.ll
Message-ID: <20110405202030.78AD22A6C12E@llvm.org>

Author: stoklund
Date: Tue Apr  5 15:20:30 2011
New Revision: 128919

URL: http://llvm.org/viewvc/llvm-project?rev=128919&view=rev
Log:
Fix one more batch of X86 tests to be register allocation dependent.

Modified:
    llvm/trunk/test/CodeGen/X86/2008-02-22-ReMatBug.ll
    llvm/trunk/test/CodeGen/X86/2008-03-18-CoalescerBug.ll
    llvm/trunk/test/CodeGen/X86/2008-09-18-inline-asm-2.ll
    llvm/trunk/test/CodeGen/X86/2009-03-16-SpillerBug.ll
    llvm/trunk/test/CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll
    llvm/trunk/test/CodeGen/X86/2010-04-23-mmx-movdq2q.ll
    llvm/trunk/test/CodeGen/X86/2010-05-03-CoalescerSubRegClobber.ll
    llvm/trunk/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll
    llvm/trunk/test/CodeGen/X86/abi-isel.ll

Modified: llvm/trunk/test/CodeGen/X86/2008-02-22-ReMatBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-02-22-ReMatBug.ll?rev=128919&r1=128918&r2=128919&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-02-22-ReMatBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-02-22-ReMatBug.ll Tue Apr  5 15:20:30 2011
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -stats |& grep {Number of re-materialization} | grep 2
+; RUN: llc < %s -march=x86 -stats -regalloc=linearscan |& grep {Number of re-materialization} | grep 2
 ; rdar://5761454
 
 	%struct.quad_struct = type { i32, i32, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct* }

Modified: llvm/trunk/test/CodeGen/X86/2008-03-18-CoalescerBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-03-18-CoalescerBug.ll?rev=128919&r1=128918&r2=128919&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-03-18-CoalescerBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-03-18-CoalescerBug.ll Tue Apr  5 15:20:30 2011
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -disable-fp-elim | grep movss | count 1
-; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -disable-fp-elim -stats |& grep {Number of re-materialization} | grep 1
+; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -disable-fp-elim -regalloc=linearscan | grep movss | count 1
+; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -disable-fp-elim -regalloc=linearscan -stats |& grep {Number of re-materialization} | grep 1
 
 	%struct..0objc_object = type opaque
 	%struct.OhBoy = type {  }

Modified: llvm/trunk/test/CodeGen/X86/2008-09-18-inline-asm-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-09-18-inline-asm-2.ll?rev=128919&r1=128918&r2=128919&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-09-18-inline-asm-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-09-18-inline-asm-2.ll Tue Apr  5 15:20:30 2011
@@ -1,5 +1,7 @@
-; RUN: llc < %s -march=x86 | grep "#%ebp %edi %ebx 8(%esi) %eax %dl"
-; RUN: llc < %s -march=x86 -regalloc=fast  | grep "#%ebx %esi %edi 8(%ebp) %eax %dl"
+; RUN: llc < %s -march=x86 -regalloc=linearscan | grep "#%ebp %edi %ebx 8(%esi) %eax %dl"
+; RUN: llc < %s -march=x86 -regalloc=fast       | grep "#%ebx %esi %edi 8(%ebp) %eax %dl"
+; RUN: llc < %s -march=x86 -regalloc=basic      | grep "#%ebp %esi %edx 8(%edi) %eax %bl"
+; RUN: llc < %s -march=x86 -regalloc=greedy     | grep "#%edx %edi %ebp 8(%esi) %eax %bl"
 
 ; The 1st, 2nd, 3rd and 5th registers above must all be different.  The registers
 ; referenced in the 4th and 6th operands must not be the same as the 1st or 5th

Modified: llvm/trunk/test/CodeGen/X86/2009-03-16-SpillerBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-03-16-SpillerBug.ll?rev=128919&r1=128918&r2=128919&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-03-16-SpillerBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-03-16-SpillerBug.ll Tue Apr  5 15:20:30 2011
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin -stats |& grep virtregrewriter | not grep {stores unfolded}
+; RUN: llc < %s -mtriple=i386-apple-darwin -regalloc=linearscan -stats |& grep virtregrewriter | not grep {stores unfolded}
 ; rdar://6682365
 
 ; Do not clobber a register if another spill slot is available in it and it's marked "do not clobber".

Modified: llvm/trunk/test/CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll?rev=128919&r1=128918&r2=128919&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll Tue Apr  5 15:20:30 2011
@@ -11,7 +11,7 @@
 ; Move return address (76(%esp)) to a temporary register (%ebp)
 ; CHECK: movl 76(%esp), [[REGISTER:%[a-z]+]]
 ; Overwrite return addresss
-; CHECK: movl %ebx, 76(%esp)
+; CHECK: movl [[EBX:%[a-z]+]], 76(%esp)
 ; Move return address from temporary register (%ebp) to new stack location (60(%esp))
 ; CHECK: movl [[REGISTER]], 60(%esp)
 

Modified: llvm/trunk/test/CodeGen/X86/2010-04-23-mmx-movdq2q.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-04-23-mmx-movdq2q.ll?rev=128919&r1=128918&r2=128919&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2010-04-23-mmx-movdq2q.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2010-04-23-mmx-movdq2q.ll Tue Apr  5 15:20:30 2011
@@ -31,18 +31,19 @@
         ret void
 }
 
+; CHECK: ti64
 define void @ti64(double %a, double %b) nounwind {
 entry:
         %tmp1 = bitcast double %a to <1 x i64>
         %tmp2 = bitcast double %b to <1 x i64>
         %tmp3 = add <1 x i64> %tmp1, %tmp2
-; CHECK:  addq  %rax, %rcx
+; CHECK:  addq
         store <1 x i64> %tmp3, <1 x i64>* null
         ret void
 }
 
 ; MMX intrinsics calls get us MMX instructions.
-
+; CHECK: ti8a
 define void @ti8a(double %a, double %b) nounwind {
 entry:
         %tmp1 = bitcast double %a to x86_mmx

Modified: llvm/trunk/test/CodeGen/X86/2010-05-03-CoalescerSubRegClobber.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-05-03-CoalescerSubRegClobber.ll?rev=128919&r1=128918&r2=128919&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2010-05-03-CoalescerSubRegClobber.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2010-05-03-CoalescerSubRegClobber.ll Tue Apr  5 15:20:30 2011
@@ -22,8 +22,8 @@
   %conv = zext i32 %v to i64                      ; <i64> [#uses=1]
   %conv14 = zext i32 %div11 to i64                ; <i64> [#uses=1]
 ; Verify that we don't clobber %eax after putting the imulq result in %rax
-; CHECK: imulq	%r{{.}}x, %r[[RES:.]]x
-; CHECK-NOT: movl	{{.*}}, %e[[RES]]x
+; CHECK: imulq	%r{{.}}x, %r[[RES:..]]
+; CHECK-NOT: movl	{{.*}}, %e[[RES]]
 ; CHECK: div
   %mul = mul i64 %conv14, %conv                   ; <i64> [#uses=1]
   %conv16 = zext i32 %div to i64                  ; <i64> [#uses=1]

Modified: llvm/trunk/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll?rev=128919&r1=128918&r2=128919&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll Tue Apr  5 15:20:30 2011
@@ -19,8 +19,8 @@
 }
 
 ; CHECK: movq	___stack_chk_guard at GOTPCREL(%rip), %rax
-; CHECK: movb   38(%rsp), %bl
-; CHECK: movb   8(%rsp), %dl
-; CHECK: movb   %dl, 8(%rsp)
-; CHECK: movb   %bl, 38(%rsp)
+; CHECK: movb   38(%rsp), [[R0:%.+]]
+; CHECK: movb   8(%rsp), [[R1:%.+]]
+; CHECK: movb   [[R1]], 8(%rsp)
+; CHECK: movb   [[R0]], 38(%rsp)
 ; CHECK: callq	___stack_chk_fail

Modified: llvm/trunk/test/CodeGen/X86/abi-isel.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/abi-isel.ll?rev=128919&r1=128918&r2=128919&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/abi-isel.ll (original)
+++ llvm/trunk/test/CodeGen/X86/abi-isel.ll Tue Apr  5 15:20:30 2011
@@ -12,6 +12,17 @@
 ; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=dynamic-no-pic -code-model=small | FileCheck %s -check-prefix=DARWIN-64-DYNAMIC
 ; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=pic -code-model=small | FileCheck %s -check-prefix=DARWIN-64-PIC
 
+; RUN: llc < %s -asm-verbose=0 -regalloc=basic -mtriple=i686-unknown-linux-gnu -march=x86 -relocation-model=static -code-model=small | FileCheck %s -check-prefix=LINUX-32-STATIC
+; RUN: llc < %s -asm-verbose=0 -regalloc=basic -mtriple=i686-unknown-linux-gnu -march=x86 -relocation-model=static -code-model=small | FileCheck %s -check-prefix=LINUX-32-PIC
+; RUN: llc < %s -asm-verbose=0 -regalloc=basic -mtriple=x86_64-unknown-linux-gnu -march=x86-64 -relocation-model=static -code-model=small | FileCheck %s -check-prefix=LINUX-64-STATIC
+; RUN: llc < %s -asm-verbose=0 -regalloc=basic -mtriple=x86_64-unknown-linux-gnu -march=x86-64 -relocation-model=pic -code-model=small | FileCheck %s -check-prefix=LINUX-64-PIC
+; RUN: llc < %s -asm-verbose=0 -regalloc=basic -mtriple=i686-apple-darwin -march=x86 -relocation-model=static -code-model=small | FileCheck %s -check-prefix=DARWIN-32-STATIC
+; RUN: llc < %s -asm-verbose=0 -regalloc=basic -mtriple=i686-apple-darwin -march=x86 -relocation-model=dynamic-no-pic -code-model=small | FileCheck %s -check-prefix=DARWIN-32-DYNAMIC
+; RUN: llc < %s -asm-verbose=0 -regalloc=basic -mtriple=i686-apple-darwin -march=x86 -relocation-model=pic -code-model=small | FileCheck %s -check-prefix=DARWIN-32-PIC
+; RUN: llc < %s -asm-verbose=0 -regalloc=basic -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=static -code-model=small | FileCheck %s -check-prefix=DARWIN-64-STATIC
+; RUN: llc < %s -asm-verbose=0 -regalloc=basic -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=dynamic-no-pic -code-model=small | FileCheck %s -check-prefix=DARWIN-64-DYNAMIC
+; RUN: llc < %s -asm-verbose=0 -regalloc=basic -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=pic -code-model=small | FileCheck %s -check-prefix=DARWIN-64-PIC
+
 @src = external global [131072 x i32]
 @dst = external global [131072 x i32]
 @xsrc = external global [32 x i32]
@@ -38,68 +49,68 @@
 	ret void
 
 ; LINUX-64-STATIC: foo00:
-; LINUX-64-STATIC: movl	src(%rip), %eax
-; LINUX-64-STATIC: movl	%eax, dst
+; LINUX-64-STATIC: movl	src(%rip), [[EAX:%e.x]]
+; LINUX-64-STATIC: movl	[[EAX]], dst
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: foo00:
-; LINUX-32-STATIC: 	movl	src, %eax
-; LINUX-32-STATIC-NEXT: 	movl	%eax, dst
+; LINUX-32-STATIC: 	movl	src, [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[EAX]], dst
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: foo00:
-; LINUX-32-PIC: 	movl	src, %eax
-; LINUX-32-PIC-NEXT: 	movl	%eax, dst
+; LINUX-32-PIC: 	movl	src, [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[EAX]], dst
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: foo00:
-; LINUX-64-PIC: 	movq	src at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	(%rax), %eax
-; LINUX-64-PIC-NEXT: 	movq	dst at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, (%rcx)
+; LINUX-64-PIC: 	movq	src at GOTPCREL(%rip), [[RAX:%r..]]
+; LINUX-64-PIC-NEXT: 	movl	([[RAX]]), [[EAX:%e..]]
+; LINUX-64-PIC-NEXT: 	movq	dst at GOTPCREL(%rip), [[RCX:%r..]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], ([[RCX]])
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _foo00:
-; DARWIN-32-STATIC: 	movl	_src, %eax
-; DARWIN-32-STATIC-NEXT: 	movl	%eax, _dst
+; DARWIN-32-STATIC: 	movl	_src, [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[EAX]], _dst
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _foo00:
-; DARWIN-32-DYNAMIC: 	movl	L_src$non_lazy_ptr, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	(%eax), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_dst$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, (%ecx)
+; DARWIN-32-DYNAMIC: 	movl	L_src$non_lazy_ptr, [[EAX:%e..]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	([[EAX]]), [[EAX:%e..]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_dst$non_lazy_ptr, [[ECX:%e..]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], ([[ECX]])
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _foo00:
 ; DARWIN-32-PIC: 	calll	L0$pb
 ; DARWIN-32-PIC-NEXT: L0$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	L_src$non_lazy_ptr-L0$pb(%eax), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	(%ecx), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_dst$non_lazy_ptr-L0$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, (%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e..]]
+; DARWIN-32-PIC-NEXT: 	movl	L_src$non_lazy_ptr-L0$pb([[EAX]]), [[ECX:%e..]]
+; DARWIN-32-PIC-NEXT: 	movl	([[ECX]]), [[ECX:%e..]]
+; DARWIN-32-PIC-NEXT: 	movl	L_dst$non_lazy_ptr-L0$pb([[EAX]]), [[EAX:%e..]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], ([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _foo00:
-; DARWIN-64-STATIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movl	(%rax), %eax
-; DARWIN-64-STATIC-NEXT: 	movq	_dst at GOTPCREL(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, (%rcx)
+; DARWIN-64-STATIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r..]]
+; DARWIN-64-STATIC-NEXT: 	movl	([[RAX]]), [[EAX:%e..]]
+; DARWIN-64-STATIC-NEXT: 	movq	_dst at GOTPCREL(%rip), [[RCX:%r..]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], ([[RCX]])
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _foo00:
-; DARWIN-64-DYNAMIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	(%rax), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_dst at GOTPCREL(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, (%rcx)
+; DARWIN-64-DYNAMIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r..]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	([[RAX]]), [[EAX:%e..]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_dst at GOTPCREL(%rip), [[RCX:%r..]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], ([[RCX]])
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _foo00:
-; DARWIN-64-PIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movl	(%rax), %eax
-; DARWIN-64-PIC-NEXT: 	movq	_dst at GOTPCREL(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, (%rcx)
+; DARWIN-64-PIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r..]]
+; DARWIN-64-PIC-NEXT: 	movl	([[RAX]]), [[EAX:%e..]]
+; DARWIN-64-PIC-NEXT: 	movq	_dst at GOTPCREL(%rip), [[RCX:%r..]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], ([[RCX]])
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -110,68 +121,68 @@
 	ret void
 
 ; LINUX-64-STATIC: fxo00:
-; LINUX-64-STATIC: movl	xsrc(%rip), %eax
-; LINUX-64-STATIC: movl	%eax, xdst
+; LINUX-64-STATIC: movl	xsrc(%rip), [[EAX:%e.x]]
+; LINUX-64-STATIC: movl	[[EAX]], xdst
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: fxo00:
-; LINUX-32-STATIC: 	movl	xsrc, %eax
-; LINUX-32-STATIC-NEXT: 	movl	%eax, xdst
+; LINUX-32-STATIC: 	movl	xsrc, [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[EAX]], xdst
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: fxo00:
-; LINUX-32-PIC: 	movl	xsrc, %eax
-; LINUX-32-PIC-NEXT: 	movl	%eax, xdst
+; LINUX-32-PIC: 	movl	xsrc, [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[EAX]], xdst
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: fxo00:
-; LINUX-64-PIC: 	movq	xsrc at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	(%rax), %eax
-; LINUX-64-PIC-NEXT: 	movq	xdst at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, (%rcx)
+; LINUX-64-PIC: 	movq	xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	([[RAX]]), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	xdst at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], ([[RCX]])
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _fxo00:
-; DARWIN-32-STATIC: 	movl	_xsrc, %eax
-; DARWIN-32-STATIC-NEXT: 	movl	%eax, _xdst
+; DARWIN-32-STATIC: 	movl	_xsrc, [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[EAX]], _xdst
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _fxo00:
-; DARWIN-32-DYNAMIC: 	movl	L_xsrc$non_lazy_ptr, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	(%eax), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_xdst$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, (%ecx)
+; DARWIN-32-DYNAMIC: 	movl	L_xsrc$non_lazy_ptr, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_xdst$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], ([[ECX]])
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _fxo00:
 ; DARWIN-32-PIC: 	calll	L1$pb
 ; DARWIN-32-PIC-NEXT: L1$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	L_xsrc$non_lazy_ptr-L1$pb(%eax), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	(%ecx), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_xdst$non_lazy_ptr-L1$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, (%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_xsrc$non_lazy_ptr-L1$pb([[EAX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	([[ECX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_xdst$non_lazy_ptr-L1$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], ([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _fxo00:
-; DARWIN-64-STATIC: 	movq	_xsrc at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movl	(%rax), %eax
-; DARWIN-64-STATIC-NEXT: 	movq	_xdst at GOTPCREL(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, (%rcx)
+; DARWIN-64-STATIC: 	movq	_xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	([[RAX]]), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_xdst at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], ([[RCX]])
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _fxo00:
-; DARWIN-64-DYNAMIC: 	movq	_xsrc at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	(%rax), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_xdst at GOTPCREL(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, (%rcx)
+; DARWIN-64-DYNAMIC: 	movq	_xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	([[RAX]]), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_xdst at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], ([[RCX]])
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _fxo00:
-; DARWIN-64-PIC: 	movq	_xsrc at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movl	(%rax), %eax
-; DARWIN-64-PIC-NEXT: 	movq	_xdst at GOTPCREL(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, (%rcx)
+; DARWIN-64-PIC: 	movq	_xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	([[RAX]]), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_xdst at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], ([[RCX]])
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -192,9 +203,9 @@
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: foo01:
-; LINUX-64-PIC: 	movq	dst at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movq	%rax, (%rcx)
+; LINUX-64-PIC: 	movq	dst at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _foo01:
@@ -202,36 +213,36 @@
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _foo01:
-; DARWIN-32-DYNAMIC: 	movl	L_dst$non_lazy_ptr, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, (%ecx)
+; DARWIN-32-DYNAMIC: 	movl	L_dst$non_lazy_ptr, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], ([[ECX]])
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _foo01:
 ; DARWIN-32-PIC: 	calll	L2$pb
 ; DARWIN-32-PIC-NEXT: L2$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	L_dst$non_lazy_ptr-L2$pb(%eax), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L2$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, (%eax)
+; DARWIN-32-PIC-NEXT: 	popl
+; DARWIN-32-PIC-NEXT: 	movl	L_dst$non_lazy_ptr-L2$pb(
+; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L2$pb(
+; DARWIN-32-PIC-NEXT: 	movl
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _foo01:
-; DARWIN-64-STATIC: 	movq	_dst at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movq	%rax, (%rcx)
+; DARWIN-64-STATIC: 	movq	_dst at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _foo01:
-; DARWIN-64-DYNAMIC: 	movq	_dst at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movq	%rax, (%rcx)
+; DARWIN-64-DYNAMIC: 	movq	_dst at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _foo01:
-; DARWIN-64-PIC: 	movq	_dst at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movq	%rax, (%rcx)
+; DARWIN-64-PIC: 	movq	_dst at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -252,9 +263,9 @@
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: fxo01:
-; LINUX-64-PIC: 	movq	xdst at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movq	%rax, (%rcx)
+; LINUX-64-PIC: 	movq	xdst at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _fxo01:
@@ -262,36 +273,36 @@
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _fxo01:
-; DARWIN-32-DYNAMIC: 	movl	L_xdst$non_lazy_ptr, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, (%ecx)
+; DARWIN-32-DYNAMIC: 	movl	L_xdst$non_lazy_ptr, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], ([[ECX]])
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _fxo01:
 ; DARWIN-32-PIC: 	calll	L3$pb
 ; DARWIN-32-PIC-NEXT: L3$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	L_xdst$non_lazy_ptr-L3$pb(%eax), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L3$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, (%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[R0:%e..]]
+; DARWIN-32-PIC-NEXT: 	movl	L_xdst$non_lazy_ptr-L3$pb([[R0]]), [[R1:%e..]]
+; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L3$pb([[R0]]), [[R2:%e..]]
+; DARWIN-32-PIC-NEXT: 	movl	[[R1:%e..]], ([[R2]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _fxo01:
-; DARWIN-64-STATIC: 	movq	_xdst at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movq	%rax, (%rcx)
+; DARWIN-64-STATIC: 	movq	_xdst at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _fxo01:
-; DARWIN-64-DYNAMIC: 	movq	_xdst at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movq	%rax, (%rcx)
+; DARWIN-64-DYNAMIC: 	movq	_xdst at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _fxo01:
-; DARWIN-64-PIC: 	movq	_xdst at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movq	%rax, (%rcx)
+; DARWIN-64-PIC: 	movq	_xdst at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -308,72 +319,72 @@
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: foo02:
-; LINUX-32-STATIC: 	movl	src, %eax
-; LINUX-32-STATIC-NEXT: 	movl	ptr, %ecx
-; LINUX-32-STATIC-NEXT: 	movl	%eax, (%ecx)
+; LINUX-32-STATIC: 	movl	src, [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	ptr, [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[EAX]], ([[ECX]])
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: foo02:
-; LINUX-32-PIC: 	movl	src, %eax
-; LINUX-32-PIC-NEXT: 	movl	ptr, %ecx
-; LINUX-32-PIC-NEXT: 	movl	%eax, (%ecx)
+; LINUX-32-PIC: 	movl	src, [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	ptr, [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[EAX]], ([[ECX]])
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: foo02:
-; LINUX-64-PIC: 	movq	src at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	(%rax), %eax
-; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movq	(%rcx), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, (%rcx)
+; LINUX-64-PIC: 	movq	src at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	([[RAX]]), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], ([[RCX]])
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _foo02:
-; DARWIN-32-STATIC: 	movl	_src, %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_ptr, %ecx
-; DARWIN-32-STATIC-NEXT: 	movl	%eax, (%ecx)
+; DARWIN-32-STATIC: 	movl	_src, [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_ptr, [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[EAX]], ([[ECX]])
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _foo02:
-; DARWIN-32-DYNAMIC: 	movl	L_src$non_lazy_ptr, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	(%eax), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	(%ecx), %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, (%ecx)
+; DARWIN-32-DYNAMIC: 	movl	L_src$non_lazy_ptr, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	([[ECX]]), [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], ([[ECX]])
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _foo02:
 ; DARWIN-32-PIC: 	calll	L4$pb
 ; DARWIN-32-PIC-NEXT: L4$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	L_src$non_lazy_ptr-L4$pb(%eax), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	(%ecx), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L4$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, (%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[R0:%e..]]
+; DARWIN-32-PIC-NEXT: 	movl	L_src$non_lazy_ptr-L4$pb([[R0]]), [[R1:%e..]]
+; DARWIN-32-PIC-NEXT: 	movl	([[R1]]), [[R2:%e..]]
+; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L4$pb([[R0]]), [[R3:%e..]]
+; DARWIN-32-PIC-NEXT: 	movl	([[R3]]), [[R4:%e..]]
+; DARWIN-32-PIC-NEXT: 	movl	[[R2]], ([[R4]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _foo02:
-; DARWIN-64-STATIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movl	(%rax), %eax
-; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movq	(%rcx), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, (%rcx)
+; DARWIN-64-STATIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	([[RAX]]), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], ([[RCX]])
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _foo02:
-; DARWIN-64-DYNAMIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	(%rax), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movq	(%rcx), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, (%rcx)
+; DARWIN-64-DYNAMIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	([[RAX]]), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], ([[RCX]])
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _foo02:
-; DARWIN-64-PIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movl	(%rax), %eax
-; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movq	(%rcx), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, (%rcx)
+; DARWIN-64-PIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	([[RAX]]), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], ([[RCX]])
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -389,73 +400,73 @@
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: fxo02:
-; LINUX-32-STATIC: 	movl	xsrc, %eax
-; LINUX-32-STATIC-NEXT: 	movl	ptr, %ecx
-; LINUX-32-STATIC-NEXT: 	movl	%eax, (%ecx)
+; LINUX-32-STATIC: 	movl	xsrc, [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	ptr, [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[EAX]], ([[ECX]])
 ; LINUX-32-STATIC-NEXT: 	ret
 	ret void
 
 ; LINUX-32-PIC: fxo02:
-; LINUX-32-PIC: 	movl	xsrc, %eax
-; LINUX-32-PIC-NEXT: 	movl	ptr, %ecx
-; LINUX-32-PIC-NEXT: 	movl	%eax, (%ecx)
+; LINUX-32-PIC: 	movl	xsrc, [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	ptr, [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[EAX]], ([[ECX]])
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: fxo02:
-; LINUX-64-PIC: 	movq	xsrc at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	(%rax), %eax
-; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movq	(%rcx), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, (%rcx)
+; LINUX-64-PIC: 	movq	xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	([[RAX]]), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], ([[RCX]])
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _fxo02:
-; DARWIN-32-STATIC: 	movl	_xsrc, %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_ptr, %ecx
-; DARWIN-32-STATIC-NEXT: 	movl	%eax, (%ecx)
+; DARWIN-32-STATIC: 	movl	_xsrc, [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_ptr, [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[EAX]], ([[ECX]])
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _fxo02:
-; DARWIN-32-DYNAMIC: 	movl	L_xsrc$non_lazy_ptr, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	(%eax), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	(%ecx), %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, (%ecx)
+; DARWIN-32-DYNAMIC: 	movl	L_xsrc$non_lazy_ptr, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	([[ECX]]), [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], ([[ECX]])
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _fxo02:
 ; DARWIN-32-PIC: 	calll	L5$pb
 ; DARWIN-32-PIC-NEXT: L5$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	L_xsrc$non_lazy_ptr-L5$pb(%eax), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	(%ecx), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L5$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, (%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_xsrc$non_lazy_ptr-L5$pb([[EAX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	([[ECX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L5$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], ([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _fxo02:
-; DARWIN-64-STATIC: 	movq	_xsrc at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movl	(%rax), %eax
-; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movq	(%rcx), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, (%rcx)
+; DARWIN-64-STATIC: 	movq	_xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	([[RAX]]), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], ([[RCX]])
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _fxo02:
-; DARWIN-64-DYNAMIC: 	movq	_xsrc at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	(%rax), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movq	(%rcx), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, (%rcx)
+; DARWIN-64-DYNAMIC: 	movq	_xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	([[RAX]]), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], ([[RCX]])
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _fxo02:
-; DARWIN-64-PIC: 	movq	_xsrc at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movl	(%rax), %eax
-; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movq	(%rcx), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, (%rcx)
+; DARWIN-64-PIC: 	movq	_xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	([[RAX]]), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], ([[RCX]])
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -465,58 +476,58 @@
 	store i32 %0, i32* getelementptr ([131072 x i32]* @ddst, i32 0, i64 0), align 32
 	ret void
 ; LINUX-64-STATIC: foo03:
-; LINUX-64-STATIC: movl    dsrc(%rip), %eax
-; LINUX-64-STATIC: movl    %eax, ddst
+; LINUX-64-STATIC: movl    dsrc(%rip), [[EAX:%e.x]]
+; LINUX-64-STATIC: movl    [[EAX]], ddst
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: foo03:
-; LINUX-32-STATIC: 	movl	dsrc, %eax
-; LINUX-32-STATIC-NEXT: 	movl	%eax, ddst
+; LINUX-32-STATIC: 	movl	dsrc, [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[EAX]], ddst
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: foo03:
-; LINUX-32-PIC: 	movl	dsrc, %eax
-; LINUX-32-PIC-NEXT: 	movl	%eax, ddst
+; LINUX-32-PIC: 	movl	dsrc, [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[EAX]], ddst
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: foo03:
-; LINUX-64-PIC: 	movq	dsrc at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	(%rax), %eax
-; LINUX-64-PIC-NEXT: 	movq	ddst at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, (%rcx)
+; LINUX-64-PIC: 	movq	dsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	([[RAX]]), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	ddst at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], ([[RCX]])
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _foo03:
-; DARWIN-32-STATIC: 	movl	_dsrc, %eax
-; DARWIN-32-STATIC-NEXT: 	movl	%eax, _ddst
+; DARWIN-32-STATIC: 	movl	_dsrc, [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[EAX]], _ddst
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _foo03:
-; DARWIN-32-DYNAMIC: 	movl	_dsrc, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, _ddst
+; DARWIN-32-DYNAMIC: 	movl	_dsrc, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], _ddst
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _foo03:
 ; DARWIN-32-PIC: 	calll	L6$pb
 ; DARWIN-32-PIC-NEXT: L6$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	_dsrc-L6$pb(%eax), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, _ddst-L6$pb(%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	_dsrc-L6$pb([[EAX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], _ddst-L6$pb([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _foo03:
-; DARWIN-64-STATIC: 	movl	_dsrc(%rip), %eax
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, _ddst(%rip)
+; DARWIN-64-STATIC: 	movl	_dsrc(%rip), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], _ddst(%rip)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _foo03:
-; DARWIN-64-DYNAMIC: 	movl	_dsrc(%rip), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, _ddst(%rip)
+; DARWIN-64-DYNAMIC: 	movl	_dsrc(%rip), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], _ddst(%rip)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _foo03:
-; DARWIN-64-PIC: 	movl	_dsrc(%rip), %eax
-; DARWIN-64-PIC-NEXT: 	movl	%eax, _ddst(%rip)
+; DARWIN-64-PIC: 	movl	_dsrc(%rip), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], _ddst(%rip)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -537,9 +548,9 @@
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: foo04:
-; LINUX-64-PIC: 	movq	ddst at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movq	dptr at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movq	%rax, (%rcx)
+; LINUX-64-PIC: 	movq	ddst at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	dptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _foo04:
@@ -553,24 +564,24 @@
 ; DARWIN-32-PIC: _foo04:
 ; DARWIN-32-PIC: 	calll	L7$pb
 ; DARWIN-32-PIC-NEXT: L7$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	leal	_ddst-L7$pb(%eax), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, _dptr-L7$pb(%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	_ddst-L7$pb([[EAX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], _dptr-L7$pb([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _foo04:
-; DARWIN-64-STATIC: 	leaq	_ddst(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movq	%rax, _dptr(%rip)
+; DARWIN-64-STATIC: 	leaq	_ddst(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	[[RAX]], _dptr(%rip)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _foo04:
-; DARWIN-64-DYNAMIC: 	leaq	_ddst(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	%rax, _dptr(%rip)
+; DARWIN-64-DYNAMIC: 	leaq	_ddst(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	[[RAX]], _dptr(%rip)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _foo04:
-; DARWIN-64-PIC: 	leaq	_ddst(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movq	%rax, _dptr(%rip)
+; DARWIN-64-PIC: 	leaq	_ddst(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	[[RAX]], _dptr(%rip)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -587,62 +598,62 @@
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: foo05:
-; LINUX-32-STATIC: 	movl	dsrc, %eax
-; LINUX-32-STATIC-NEXT: 	movl	dptr, %ecx
-; LINUX-32-STATIC-NEXT: 	movl	%eax, (%ecx)
+; LINUX-32-STATIC: 	movl	dsrc, [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	dptr, [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[EAX]], ([[ECX]])
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: foo05:
-; LINUX-32-PIC: 	movl	dsrc, %eax
-; LINUX-32-PIC-NEXT: 	movl	dptr, %ecx
-; LINUX-32-PIC-NEXT: 	movl	%eax, (%ecx)
+; LINUX-32-PIC: 	movl	dsrc, [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	dptr, [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[EAX]], ([[ECX]])
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: foo05:
-; LINUX-64-PIC: 	movq	dsrc at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	(%rax), %eax
-; LINUX-64-PIC-NEXT: 	movq	dptr at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movq	(%rcx), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, (%rcx)
+; LINUX-64-PIC: 	movq	dsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	([[RAX]]), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	dptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], ([[RCX]])
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _foo05:
-; DARWIN-32-STATIC: 	movl	_dsrc, %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_dptr, %ecx
-; DARWIN-32-STATIC-NEXT: 	movl	%eax, (%ecx)
+; DARWIN-32-STATIC: 	movl	_dsrc, [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_dptr, [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[EAX]], ([[ECX]])
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _foo05:
-; DARWIN-32-DYNAMIC: 	movl	_dsrc, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	_dptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, (%ecx)
+; DARWIN-32-DYNAMIC: 	movl	_dsrc, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	_dptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], ([[ECX]])
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _foo05:
 ; DARWIN-32-PIC: 	calll	L8$pb
 ; DARWIN-32-PIC-NEXT: L8$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	_dsrc-L8$pb(%eax), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	_dptr-L8$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, (%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	_dsrc-L8$pb([[EAX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	_dptr-L8$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], ([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _foo05:
-; DARWIN-64-STATIC: 	movl	_dsrc(%rip), %eax
-; DARWIN-64-STATIC-NEXT: 	movq	_dptr(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, (%rcx)
+; DARWIN-64-STATIC: 	movl	_dsrc(%rip), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_dptr(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], ([[RCX]])
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _foo05:
-; DARWIN-64-DYNAMIC: 	movl	_dsrc(%rip), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_dptr(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, (%rcx)
+; DARWIN-64-DYNAMIC: 	movl	_dsrc(%rip), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_dptr(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], ([[RCX]])
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _foo05:
-; DARWIN-64-PIC: 	movl	_dsrc(%rip), %eax
-; DARWIN-64-PIC-NEXT: 	movq	_dptr(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, (%rcx)
+; DARWIN-64-PIC: 	movl	_dsrc(%rip), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_dptr(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], ([[RCX]])
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -652,56 +663,56 @@
 	store i32 %0, i32* getelementptr ([131072 x i32]* @ldst, i32 0, i64 0), align 4
 	ret void
 ; LINUX-64-STATIC: foo06:
-; LINUX-64-STATIC: movl    lsrc(%rip), %eax
-; LINUX-64-STATIC: movl    %eax, ldst(%rip)
+; LINUX-64-STATIC: movl    lsrc(%rip), [[EAX:%e.x]]
+; LINUX-64-STATIC: movl    [[EAX]], ldst(%rip)
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: foo06:
-; LINUX-32-STATIC: 	movl	lsrc, %eax
-; LINUX-32-STATIC-NEXT: 	movl	%eax, ldst
+; LINUX-32-STATIC: 	movl	lsrc, [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[EAX]], ldst
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: foo06:
-; LINUX-32-PIC: 	movl	lsrc, %eax
-; LINUX-32-PIC-NEXT: 	movl	%eax, ldst
+; LINUX-32-PIC: 	movl	lsrc, [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[EAX]], ldst
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: foo06:
-; LINUX-64-PIC: 	movl	lsrc(%rip), %eax
-; LINUX-64-PIC-NEXT: 	movl	%eax, ldst(%rip)
+; LINUX-64-PIC: 	movl	lsrc(%rip), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], ldst(%rip)
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _foo06:
-; DARWIN-32-STATIC: 	movl	_lsrc, %eax
-; DARWIN-32-STATIC-NEXT: 	movl	%eax, _ldst
+; DARWIN-32-STATIC: 	movl	_lsrc, [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[EAX]], _ldst
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _foo06:
-; DARWIN-32-DYNAMIC: 	movl	_lsrc, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, _ldst
+; DARWIN-32-DYNAMIC: 	movl	_lsrc, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], _ldst
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _foo06:
 ; DARWIN-32-PIC: 	calll	L9$pb
 ; DARWIN-32-PIC-NEXT: L9$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	_lsrc-L9$pb(%eax), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, _ldst-L9$pb(%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	_lsrc-L9$pb([[EAX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], _ldst-L9$pb([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _foo06:
-; DARWIN-64-STATIC: 	movl	_lsrc(%rip), %eax
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, _ldst(%rip)
+; DARWIN-64-STATIC: 	movl	_lsrc(%rip), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], _ldst(%rip)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _foo06:
-; DARWIN-64-DYNAMIC: 	movl	_lsrc(%rip), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, _ldst(%rip)
+; DARWIN-64-DYNAMIC: 	movl	_lsrc(%rip), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], _ldst(%rip)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _foo06:
-; DARWIN-64-PIC: 	movl	_lsrc(%rip), %eax
-; DARWIN-64-PIC-NEXT: 	movl	%eax, _ldst(%rip)
+; DARWIN-64-PIC: 	movl	_lsrc(%rip), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], _ldst(%rip)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -722,8 +733,8 @@
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: foo07:
-; LINUX-64-PIC: 	leaq	ldst(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movq	%rax, lptr(%rip)
+; LINUX-64-PIC: 	leaq	ldst(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	[[RAX]], lptr(%rip)
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _foo07:
@@ -737,24 +748,24 @@
 ; DARWIN-32-PIC: _foo07:
 ; DARWIN-32-PIC: 	calll	L10$pb
 ; DARWIN-32-PIC-NEXT: L10$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	leal	_ldst-L10$pb(%eax), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, _lptr-L10$pb(%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	_ldst-L10$pb([[EAX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], _lptr-L10$pb([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _foo07:
-; DARWIN-64-STATIC: 	leaq	_ldst(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movq	%rax, _lptr(%rip)
+; DARWIN-64-STATIC: 	leaq	_ldst(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	[[RAX]], _lptr(%rip)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _foo07:
-; DARWIN-64-DYNAMIC: 	leaq	_ldst(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	%rax, _lptr(%rip)
+; DARWIN-64-DYNAMIC: 	leaq	_ldst(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	[[RAX]], _lptr(%rip)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _foo07:
-; DARWIN-64-PIC: 	leaq	_ldst(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movq	%rax, _lptr(%rip)
+; DARWIN-64-PIC: 	leaq	_ldst(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	[[RAX]], _lptr(%rip)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -771,60 +782,60 @@
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: foo08:
-; LINUX-32-STATIC: 	movl	lsrc, %eax
-; LINUX-32-STATIC-NEXT: 	movl	lptr, %ecx
-; LINUX-32-STATIC-NEXT: 	movl	%eax, (%ecx)
+; LINUX-32-STATIC: 	movl	lsrc, [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	lptr, [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[EAX]], ([[ECX]])
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: foo08:
-; LINUX-32-PIC: 	movl	lsrc, %eax
-; LINUX-32-PIC-NEXT: 	movl	lptr, %ecx
-; LINUX-32-PIC-NEXT: 	movl	%eax, (%ecx)
+; LINUX-32-PIC: 	movl	lsrc, [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	lptr, [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[EAX]], ([[ECX]])
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: foo08:
-; LINUX-64-PIC: 	movl	lsrc(%rip), %eax
-; LINUX-64-PIC-NEXT: 	movq	lptr(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, (%rcx)
+; LINUX-64-PIC: 	movl	lsrc(%rip), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	lptr(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], ([[RCX]])
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _foo08:
-; DARWIN-32-STATIC: 	movl	_lsrc, %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_lptr, %ecx
-; DARWIN-32-STATIC-NEXT: 	movl	%eax, (%ecx)
+; DARWIN-32-STATIC: 	movl	_lsrc, [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_lptr, [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[EAX]], ([[ECX]])
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _foo08:
-; DARWIN-32-DYNAMIC: 	movl	_lsrc, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	_lptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, (%ecx)
+; DARWIN-32-DYNAMIC: 	movl	_lsrc, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	_lptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], ([[ECX]])
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _foo08:
 ; DARWIN-32-PIC: 	calll	L11$pb
 ; DARWIN-32-PIC-NEXT: L11$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	_lsrc-L11$pb(%eax), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	_lptr-L11$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, (%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	_lsrc-L11$pb([[EAX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	_lptr-L11$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], ([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _foo08:
-; DARWIN-64-STATIC: 	movl	_lsrc(%rip), %eax
-; DARWIN-64-STATIC-NEXT: 	movq	_lptr(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, (%rcx)
+; DARWIN-64-STATIC: 	movl	_lsrc(%rip), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_lptr(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], ([[RCX]])
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _foo08:
-; DARWIN-64-DYNAMIC: 	movl	_lsrc(%rip), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_lptr(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, (%rcx)
+; DARWIN-64-DYNAMIC: 	movl	_lsrc(%rip), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_lptr(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], ([[RCX]])
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _foo08:
-; DARWIN-64-PIC: 	movl	_lsrc(%rip), %eax
-; DARWIN-64-PIC-NEXT: 	movq	_lptr(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, (%rcx)
+; DARWIN-64-PIC: 	movl	_lsrc(%rip), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_lptr(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], ([[RCX]])
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -834,68 +845,68 @@
 	store i32 %0, i32* getelementptr ([131072 x i32]* @dst, i32 0, i64 16), align 4
 	ret void
 ; LINUX-64-STATIC: qux00:
-; LINUX-64-STATIC: movl    src+64(%rip), %eax
-; LINUX-64-STATIC: movl    %eax, dst+64(%rip)
+; LINUX-64-STATIC: movl    src+64(%rip), [[EAX:%e.x]]
+; LINUX-64-STATIC: movl    [[EAX]], dst+64(%rip)
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: qux00:
-; LINUX-32-STATIC: 	movl	src+64, %eax
-; LINUX-32-STATIC-NEXT: 	movl	%eax, dst+64
+; LINUX-32-STATIC: 	movl	src+64, [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[EAX]], dst+64
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: qux00:
-; LINUX-32-PIC: 	movl	src+64, %eax
-; LINUX-32-PIC-NEXT: 	movl	%eax, dst+64
+; LINUX-32-PIC: 	movl	src+64, [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[EAX]], dst+64
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: qux00:
-; LINUX-64-PIC: 	movq	src at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	64(%rax), %eax
-; LINUX-64-PIC-NEXT: 	movq	dst at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, 64(%rcx)
+; LINUX-64-PIC: 	movq	src at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	64([[RAX]]), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	dst at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], 64([[RCX]])
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _qux00:
-; DARWIN-32-STATIC: 	movl	_src+64, %eax
-; DARWIN-32-STATIC-NEXT: 	movl	%eax, _dst+64
+; DARWIN-32-STATIC: 	movl	_src+64, [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[EAX]], _dst+64
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _qux00:
-; DARWIN-32-DYNAMIC: 	movl	L_src$non_lazy_ptr, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	64(%eax), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_dst$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, 64(%ecx)
+; DARWIN-32-DYNAMIC: 	movl	L_src$non_lazy_ptr, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	64([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_dst$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], 64([[ECX]])
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _qux00:
 ; DARWIN-32-PIC: 	calll	L12$pb
 ; DARWIN-32-PIC-NEXT: L12$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	L_src$non_lazy_ptr-L12$pb(%eax), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	64(%ecx), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_dst$non_lazy_ptr-L12$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, 64(%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_src$non_lazy_ptr-L12$pb([[EAX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	64([[ECX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_dst$non_lazy_ptr-L12$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], 64([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _qux00:
-; DARWIN-64-STATIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movl	64(%rax), %eax
-; DARWIN-64-STATIC-NEXT: 	movq	_dst at GOTPCREL(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, 64(%rcx)
+; DARWIN-64-STATIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	64([[RAX]]), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_dst at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], 64([[RCX]])
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _qux00:
-; DARWIN-64-DYNAMIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	64(%rax), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_dst at GOTPCREL(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, 64(%rcx)
+; DARWIN-64-DYNAMIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	64([[RAX]]), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_dst at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], 64([[RCX]])
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _qux00:
-; DARWIN-64-PIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movl	64(%rax), %eax
-; DARWIN-64-PIC-NEXT: 	movq	_dst at GOTPCREL(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, 64(%rcx)
+; DARWIN-64-PIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	64([[RAX]]), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_dst at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], 64([[RCX]])
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -905,68 +916,68 @@
 	store i32 %0, i32* getelementptr ([32 x i32]* @xdst, i32 0, i64 16), align 4
 	ret void
 ; LINUX-64-STATIC: qxx00:
-; LINUX-64-STATIC: movl    xsrc+64(%rip), %eax
-; LINUX-64-STATIC: movl    %eax, xdst+64(%rip)
+; LINUX-64-STATIC: movl    xsrc+64(%rip), [[EAX:%e.x]]
+; LINUX-64-STATIC: movl    [[EAX]], xdst+64(%rip)
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: qxx00:
-; LINUX-32-STATIC: 	movl	xsrc+64, %eax
-; LINUX-32-STATIC-NEXT: 	movl	%eax, xdst+64
+; LINUX-32-STATIC: 	movl	xsrc+64, [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[EAX]], xdst+64
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: qxx00:
-; LINUX-32-PIC: 	movl	xsrc+64, %eax
-; LINUX-32-PIC-NEXT: 	movl	%eax, xdst+64
+; LINUX-32-PIC: 	movl	xsrc+64, [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[EAX]], xdst+64
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: qxx00:
-; LINUX-64-PIC: 	movq	xsrc at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	64(%rax), %eax
-; LINUX-64-PIC-NEXT: 	movq	xdst at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, 64(%rcx)
+; LINUX-64-PIC: 	movq	xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	64([[RAX]]), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	xdst at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], 64([[RCX]])
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _qxx00:
-; DARWIN-32-STATIC: 	movl	_xsrc+64, %eax
-; DARWIN-32-STATIC-NEXT: 	movl	%eax, _xdst+64
+; DARWIN-32-STATIC: 	movl	_xsrc+64, [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[EAX]], _xdst+64
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _qxx00:
-; DARWIN-32-DYNAMIC: 	movl	L_xsrc$non_lazy_ptr, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	64(%eax), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_xdst$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, 64(%ecx)
+; DARWIN-32-DYNAMIC: 	movl	L_xsrc$non_lazy_ptr, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	64([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_xdst$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], 64([[ECX]])
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _qxx00:
 ; DARWIN-32-PIC: 	calll	L13$pb
 ; DARWIN-32-PIC-NEXT: L13$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	L_xsrc$non_lazy_ptr-L13$pb(%eax), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	64(%ecx), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_xdst$non_lazy_ptr-L13$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, 64(%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_xsrc$non_lazy_ptr-L13$pb([[EAX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	64([[ECX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_xdst$non_lazy_ptr-L13$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], 64([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _qxx00:
-; DARWIN-64-STATIC: 	movq	_xsrc at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movl	64(%rax), %eax
-; DARWIN-64-STATIC-NEXT: 	movq	_xdst at GOTPCREL(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, 64(%rcx)
+; DARWIN-64-STATIC: 	movq	_xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	64([[RAX]]), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_xdst at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], 64([[RCX]])
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _qxx00:
-; DARWIN-64-DYNAMIC: 	movq	_xsrc at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	64(%rax), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_xdst at GOTPCREL(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, 64(%rcx)
+; DARWIN-64-DYNAMIC: 	movq	_xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	64([[RAX]]), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_xdst at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], 64([[RCX]])
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _qxx00:
-; DARWIN-64-PIC: 	movq	_xsrc at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movl	64(%rax), %eax
-; DARWIN-64-PIC-NEXT: 	movq	_xdst at GOTPCREL(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, 64(%rcx)
+; DARWIN-64-PIC: 	movq	_xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	64([[RAX]]), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_xdst at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], 64([[RCX]])
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -987,10 +998,10 @@
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: qux01:
-; LINUX-64-PIC: 	movq	dst at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	addq	$64, %rax
-; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movq	%rax, (%rcx)
+; LINUX-64-PIC: 	movq	dst at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	addq	$64, [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _qux01:
@@ -998,41 +1009,41 @@
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _qux01:
-; DARWIN-32-DYNAMIC: 	movl	L_dst$non_lazy_ptr, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	addl	$64, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, (%ecx)
+; DARWIN-32-DYNAMIC: 	movl	L_dst$non_lazy_ptr, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	addl	$64, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], ([[ECX]])
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _qux01:
 ; DARWIN-32-PIC: 	calll	L14$pb
 ; DARWIN-32-PIC-NEXT: L14$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	L_dst$non_lazy_ptr-L14$pb(%eax), %ecx
-; DARWIN-32-PIC-NEXT: 	addl	$64, %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L14$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, (%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_dst$non_lazy_ptr-L14$pb([[EAX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	addl	$64, [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L14$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], ([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _qux01:
-; DARWIN-64-STATIC: 	movq	_dst at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	addq	$64, %rax
-; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movq	%rax, (%rcx)
+; DARWIN-64-STATIC: 	movq	_dst at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	addq	$64, [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _qux01:
-; DARWIN-64-DYNAMIC: 	movq	_dst at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	addq	$64, %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movq	%rax, (%rcx)
+; DARWIN-64-DYNAMIC: 	movq	_dst at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	addq	$64, [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _qux01:
-; DARWIN-64-PIC: 	movq	_dst at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	addq	$64, %rax
-; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movq	%rax, (%rcx)
+; DARWIN-64-PIC: 	movq	_dst at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	addq	$64, [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -1053,10 +1064,10 @@
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: qxx01:
-; LINUX-64-PIC: 	movq	xdst at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	addq	$64, %rax
-; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movq	%rax, (%rcx)
+; LINUX-64-PIC: 	movq	xdst at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	addq	$64, [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _qxx01:
@@ -1064,41 +1075,41 @@
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _qxx01:
-; DARWIN-32-DYNAMIC: 	movl	L_xdst$non_lazy_ptr, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	addl	$64, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, (%ecx)
+; DARWIN-32-DYNAMIC: 	movl	L_xdst$non_lazy_ptr, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	addl	$64, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], ([[ECX]])
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _qxx01:
 ; DARWIN-32-PIC: 	calll	L15$pb
 ; DARWIN-32-PIC-NEXT: L15$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	L_xdst$non_lazy_ptr-L15$pb(%eax), %ecx
-; DARWIN-32-PIC-NEXT: 	addl	$64, %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L15$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, (%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_xdst$non_lazy_ptr-L15$pb([[EAX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	addl	$64, [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L15$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], ([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _qxx01:
-; DARWIN-64-STATIC: 	movq	_xdst at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	addq	$64, %rax
-; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movq	%rax, (%rcx)
+; DARWIN-64-STATIC: 	movq	_xdst at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	addq	$64, [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _qxx01:
-; DARWIN-64-DYNAMIC: 	movq	_xdst at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	addq	$64, %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movq	%rax, (%rcx)
+; DARWIN-64-DYNAMIC: 	movq	_xdst at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	addq	$64, [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _qxx01:
-; DARWIN-64-PIC: 	movq	_xdst at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	addq	$64, %rax
-; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movq	%rax, (%rcx)
+; DARWIN-64-PIC: 	movq	_xdst at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	addq	$64, [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -1109,79 +1120,79 @@
 	%2 = getelementptr i32* %0, i64 16
 	store i32 %1, i32* %2, align 4
 ; LINUX-64-STATIC: qux02:
-; LINUX-64-STATIC: movl    src+64(%rip), %eax
-; LINUX-64-STATIC: movq    ptr(%rip), %rcx
-; LINUX-64-STATIC: movl    %eax, 64(%rcx)
+; LINUX-64-STATIC: movl    src+64(%rip), [[EAX:%e.x]]
+; LINUX-64-STATIC: movq    ptr(%rip), [[RCX:%r.x]]
+; LINUX-64-STATIC: movl    [[EAX]], 64([[RCX]])
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: qux02:
-; LINUX-32-STATIC: 	movl	src+64, %eax
-; LINUX-32-STATIC-NEXT: 	movl	ptr, %ecx
-; LINUX-32-STATIC-NEXT: 	movl	%eax, 64(%ecx)
+; LINUX-32-STATIC: 	movl	src+64, [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	ptr, [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[EAX]], 64([[ECX]])
 ; LINUX-32-STATIC-NEXT: 	ret
 	ret void
 
 ; LINUX-32-PIC: qux02:
-; LINUX-32-PIC: 	movl	src+64, %eax
-; LINUX-32-PIC-NEXT: 	movl	ptr, %ecx
-; LINUX-32-PIC-NEXT: 	movl	%eax, 64(%ecx)
+; LINUX-32-PIC: 	movl	src+64, [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	ptr, [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[EAX]], 64([[ECX]])
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: qux02:
-; LINUX-64-PIC: 	movq	src at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	64(%rax), %eax
-; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movq	(%rcx), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, 64(%rcx)
+; LINUX-64-PIC: 	movq	src at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	64([[RAX]]), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], 64([[RCX]])
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _qux02:
-; DARWIN-32-STATIC: 	movl	_src+64, %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_ptr, %ecx
-; DARWIN-32-STATIC-NEXT: 	movl	%eax, 64(%ecx)
+; DARWIN-32-STATIC: 	movl	_src+64, [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_ptr, [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[EAX]], 64([[ECX]])
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _qux02:
-; DARWIN-32-DYNAMIC: 	movl	L_src$non_lazy_ptr, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	64(%eax), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	(%ecx), %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, 64(%ecx)
+; DARWIN-32-DYNAMIC: 	movl	L_src$non_lazy_ptr, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	64([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	([[ECX]]), [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], 64([[ECX]])
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _qux02:
 ; DARWIN-32-PIC: 	calll	L16$pb
 ; DARWIN-32-PIC-NEXT: L16$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	L_src$non_lazy_ptr-L16$pb(%eax), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	64(%ecx), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L16$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, 64(%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_src$non_lazy_ptr-L16$pb([[EAX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	64([[ECX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L16$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], 64([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _qux02:
-; DARWIN-64-STATIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movl	64(%rax), %eax
-; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movq	(%rcx), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, 64(%rcx)
+; DARWIN-64-STATIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	64([[RAX]]), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], 64([[RCX]])
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _qux02:
-; DARWIN-64-DYNAMIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	64(%rax), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movq	(%rcx), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, 64(%rcx)
+; DARWIN-64-DYNAMIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	64([[RAX]]), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], 64([[RCX]])
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _qux02:
-; DARWIN-64-PIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movl	64(%rax), %eax
-; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movq	(%rcx), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, 64(%rcx)
+; DARWIN-64-PIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	64([[RAX]]), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], 64([[RCX]])
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -1192,79 +1203,79 @@
 	%2 = getelementptr i32* %0, i64 16
 	store i32 %1, i32* %2, align 4
 ; LINUX-64-STATIC: qxx02:
-; LINUX-64-STATIC: movl    xsrc+64(%rip), %eax
-; LINUX-64-STATIC: movq    ptr(%rip), %rcx
-; LINUX-64-STATIC: movl    %eax, 64(%rcx)
+; LINUX-64-STATIC: movl    xsrc+64(%rip), [[EAX:%e.x]]
+; LINUX-64-STATIC: movq    ptr(%rip), [[RCX:%r.x]]
+; LINUX-64-STATIC: movl    [[EAX]], 64([[RCX]])
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: qxx02:
-; LINUX-32-STATIC: 	movl	xsrc+64, %eax
-; LINUX-32-STATIC-NEXT: 	movl	ptr, %ecx
-; LINUX-32-STATIC-NEXT: 	movl	%eax, 64(%ecx)
+; LINUX-32-STATIC: 	movl	xsrc+64, [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	ptr, [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[EAX]], 64([[ECX]])
 ; LINUX-32-STATIC-NEXT: 	ret
 	ret void
 
 ; LINUX-32-PIC: qxx02:
-; LINUX-32-PIC: 	movl	xsrc+64, %eax
-; LINUX-32-PIC-NEXT: 	movl	ptr, %ecx
-; LINUX-32-PIC-NEXT: 	movl	%eax, 64(%ecx)
+; LINUX-32-PIC: 	movl	xsrc+64, [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	ptr, [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[EAX]], 64([[ECX]])
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: qxx02:
-; LINUX-64-PIC: 	movq	xsrc at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	64(%rax), %eax
-; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movq	(%rcx), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, 64(%rcx)
+; LINUX-64-PIC: 	movq	xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	64([[RAX]]), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], 64([[RCX]])
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _qxx02:
-; DARWIN-32-STATIC: 	movl	_xsrc+64, %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_ptr, %ecx
-; DARWIN-32-STATIC-NEXT: 	movl	%eax, 64(%ecx)
+; DARWIN-32-STATIC: 	movl	_xsrc+64, [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_ptr, [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[EAX]], 64([[ECX]])
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _qxx02:
-; DARWIN-32-DYNAMIC: 	movl	L_xsrc$non_lazy_ptr, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	64(%eax), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	(%ecx), %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, 64(%ecx)
+; DARWIN-32-DYNAMIC: 	movl	L_xsrc$non_lazy_ptr, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	64([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	([[ECX]]), [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], 64([[ECX]])
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _qxx02:
 ; DARWIN-32-PIC: 	calll	L17$pb
 ; DARWIN-32-PIC-NEXT: L17$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	L_xsrc$non_lazy_ptr-L17$pb(%eax), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	64(%ecx), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L17$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, 64(%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_xsrc$non_lazy_ptr-L17$pb([[EAX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	64([[ECX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L17$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], 64([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _qxx02:
-; DARWIN-64-STATIC: 	movq	_xsrc at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movl	64(%rax), %eax
-; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movq	(%rcx), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, 64(%rcx)
+; DARWIN-64-STATIC: 	movq	_xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	64([[RAX]]), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], 64([[RCX]])
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _qxx02:
-; DARWIN-64-DYNAMIC: 	movq	_xsrc at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	64(%rax), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movq	(%rcx), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, 64(%rcx)
+; DARWIN-64-DYNAMIC: 	movq	_xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	64([[RAX]]), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], 64([[RCX]])
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _qxx02:
-; DARWIN-64-PIC: 	movq	_xsrc at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movl	64(%rax), %eax
-; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movq	(%rcx), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, 64(%rcx)
+; DARWIN-64-PIC: 	movq	_xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	64([[RAX]]), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], 64([[RCX]])
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -1274,58 +1285,58 @@
 	store i32 %0, i32* getelementptr ([131072 x i32]* @ddst, i32 0, i64 16), align 32
 	ret void
 ; LINUX-64-STATIC: qux03:
-; LINUX-64-STATIC: movl    dsrc+64(%rip), %eax
-; LINUX-64-STATIC: movl    %eax, ddst+64(%rip)
+; LINUX-64-STATIC: movl    dsrc+64(%rip), [[EAX:%e.x]]
+; LINUX-64-STATIC: movl    [[EAX]], ddst+64(%rip)
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: qux03:
-; LINUX-32-STATIC: 	movl	dsrc+64, %eax
-; LINUX-32-STATIC-NEXT: 	movl	%eax, ddst+64
+; LINUX-32-STATIC: 	movl	dsrc+64, [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[EAX]], ddst+64
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: qux03:
-; LINUX-32-PIC: 	movl	dsrc+64, %eax
-; LINUX-32-PIC-NEXT: 	movl	%eax, ddst+64
+; LINUX-32-PIC: 	movl	dsrc+64, [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[EAX]], ddst+64
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: qux03:
-; LINUX-64-PIC: 	movq	dsrc at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	64(%rax), %eax
-; LINUX-64-PIC-NEXT: 	movq	ddst at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, 64(%rcx)
+; LINUX-64-PIC: 	movq	dsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	64([[RAX]]), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	ddst at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], 64([[RCX]])
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _qux03:
-; DARWIN-32-STATIC: 	movl	_dsrc+64, %eax
-; DARWIN-32-STATIC-NEXT: 	movl	%eax, _ddst+64
+; DARWIN-32-STATIC: 	movl	_dsrc+64, [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[EAX]], _ddst+64
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _qux03:
-; DARWIN-32-DYNAMIC: 	movl	_dsrc+64, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, _ddst+64
+; DARWIN-32-DYNAMIC: 	movl	_dsrc+64, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], _ddst+64
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _qux03:
 ; DARWIN-32-PIC: 	calll	L18$pb
 ; DARWIN-32-PIC-NEXT: L18$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	(_dsrc-L18$pb)+64(%eax), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, (_ddst-L18$pb)+64(%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	(_dsrc-L18$pb)+64([[EAX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], (_ddst-L18$pb)+64([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _qux03:
-; DARWIN-64-STATIC: 	movl	_dsrc+64(%rip), %eax
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, _ddst+64(%rip)
+; DARWIN-64-STATIC: 	movl	_dsrc+64(%rip), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], _ddst+64(%rip)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _qux03:
-; DARWIN-64-DYNAMIC: 	movl	_dsrc+64(%rip), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, _ddst+64(%rip)
+; DARWIN-64-DYNAMIC: 	movl	_dsrc+64(%rip), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], _ddst+64(%rip)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _qux03:
-; DARWIN-64-PIC: 	movl	_dsrc+64(%rip), %eax
-; DARWIN-64-PIC-NEXT: 	movl	%eax, _ddst+64(%rip)
+; DARWIN-64-PIC: 	movl	_dsrc+64(%rip), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], _ddst+64(%rip)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -1346,10 +1357,10 @@
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: qux04:
-; LINUX-64-PIC: 	movq	ddst at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	addq	$64, %rax
-; LINUX-64-PIC-NEXT: 	movq	dptr at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movq	%rax, (%rcx)
+; LINUX-64-PIC: 	movq	ddst at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	addq	$64, [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	dptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _qux04:
@@ -1363,24 +1374,24 @@
 ; DARWIN-32-PIC: _qux04:
 ; DARWIN-32-PIC: 	calll	L19$pb
 ; DARWIN-32-PIC-NEXT: L19$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	leal	(_ddst-L19$pb)+64(%eax), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, _dptr-L19$pb(%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	(_ddst-L19$pb)+64([[EAX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], _dptr-L19$pb([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _qux04:
-; DARWIN-64-STATIC: 	leaq	_ddst+64(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movq	%rax, _dptr(%rip)
+; DARWIN-64-STATIC: 	leaq	_ddst+64(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	[[RAX]], _dptr(%rip)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _qux04:
-; DARWIN-64-DYNAMIC: 	leaq	_ddst+64(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	%rax, _dptr(%rip)
+; DARWIN-64-DYNAMIC: 	leaq	_ddst+64(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	[[RAX]], _dptr(%rip)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _qux04:
-; DARWIN-64-PIC: 	leaq	_ddst+64(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movq	%rax, _dptr(%rip)
+; DARWIN-64-PIC: 	leaq	_ddst+64(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	[[RAX]], _dptr(%rip)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -1391,69 +1402,69 @@
 	%2 = getelementptr i32* %0, i64 16
 	store i32 %1, i32* %2, align 4
 ; LINUX-64-STATIC: qux05:
-; LINUX-64-STATIC: movl    dsrc+64(%rip), %eax
-; LINUX-64-STATIC: movq    dptr(%rip), %rcx
-; LINUX-64-STATIC: movl    %eax, 64(%rcx)
+; LINUX-64-STATIC: movl    dsrc+64(%rip), [[EAX:%e.x]]
+; LINUX-64-STATIC: movq    dptr(%rip), [[RCX:%r.x]]
+; LINUX-64-STATIC: movl    [[EAX]], 64([[RCX]])
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: qux05:
-; LINUX-32-STATIC: 	movl	dsrc+64, %eax
-; LINUX-32-STATIC-NEXT: 	movl	dptr, %ecx
-; LINUX-32-STATIC-NEXT: 	movl	%eax, 64(%ecx)
+; LINUX-32-STATIC: 	movl	dsrc+64, [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	dptr, [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[EAX]], 64([[ECX]])
 ; LINUX-32-STATIC-NEXT: 	ret
 	ret void
 
 ; LINUX-32-PIC: qux05:
-; LINUX-32-PIC: 	movl	dsrc+64, %eax
-; LINUX-32-PIC-NEXT: 	movl	dptr, %ecx
-; LINUX-32-PIC-NEXT: 	movl	%eax, 64(%ecx)
+; LINUX-32-PIC: 	movl	dsrc+64, [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	dptr, [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[EAX]], 64([[ECX]])
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: qux05:
-; LINUX-64-PIC: 	movq	dsrc at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	64(%rax), %eax
-; LINUX-64-PIC-NEXT: 	movq	dptr at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movq	(%rcx), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, 64(%rcx)
+; LINUX-64-PIC: 	movq	dsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	64([[RAX]]), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	dptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], 64([[RCX]])
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _qux05:
-; DARWIN-32-STATIC: 	movl	_dsrc+64, %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_dptr, %ecx
-; DARWIN-32-STATIC-NEXT: 	movl	%eax, 64(%ecx)
+; DARWIN-32-STATIC: 	movl	_dsrc+64, [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_dptr, [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[EAX]], 64([[ECX]])
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _qux05:
-; DARWIN-32-DYNAMIC: 	movl	_dsrc+64, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	_dptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, 64(%ecx)
+; DARWIN-32-DYNAMIC: 	movl	_dsrc+64, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	_dptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], 64([[ECX]])
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _qux05:
 ; DARWIN-32-PIC: 	calll	L20$pb
 ; DARWIN-32-PIC-NEXT: L20$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	(_dsrc-L20$pb)+64(%eax), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	_dptr-L20$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, 64(%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	(_dsrc-L20$pb)+64([[EAX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	_dptr-L20$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], 64([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _qux05:
-; DARWIN-64-STATIC: 	movl	_dsrc+64(%rip), %eax
-; DARWIN-64-STATIC-NEXT: 	movq	_dptr(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, 64(%rcx)
+; DARWIN-64-STATIC: 	movl	_dsrc+64(%rip), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_dptr(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], 64([[RCX]])
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _qux05:
-; DARWIN-64-DYNAMIC: 	movl	_dsrc+64(%rip), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_dptr(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, 64(%rcx)
+; DARWIN-64-DYNAMIC: 	movl	_dsrc+64(%rip), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_dptr(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], 64([[RCX]])
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _qux05:
-; DARWIN-64-PIC: 	movl	_dsrc+64(%rip), %eax
-; DARWIN-64-PIC-NEXT: 	movq	_dptr(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, 64(%rcx)
+; DARWIN-64-PIC: 	movl	_dsrc+64(%rip), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_dptr(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], 64([[RCX]])
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -1463,56 +1474,56 @@
 	store i32 %0, i32* getelementptr ([131072 x i32]* @ldst, i32 0, i64 16), align 4
 	ret void
 ; LINUX-64-STATIC: qux06:
-; LINUX-64-STATIC: movl    lsrc+64(%rip), %eax
-; LINUX-64-STATIC: movl    %eax, ldst+64
+; LINUX-64-STATIC: movl    lsrc+64(%rip), [[EAX:%e.x]]
+; LINUX-64-STATIC: movl    [[EAX]], ldst+64
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: qux06:
-; LINUX-32-STATIC: 	movl	lsrc+64, %eax
-; LINUX-32-STATIC-NEXT: 	movl	%eax, ldst+64
+; LINUX-32-STATIC: 	movl	lsrc+64, [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[EAX]], ldst+64
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: qux06:
-; LINUX-32-PIC: 	movl	lsrc+64, %eax
-; LINUX-32-PIC-NEXT: 	movl	%eax, ldst+64
+; LINUX-32-PIC: 	movl	lsrc+64, [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[EAX]], ldst+64
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: qux06:
-; LINUX-64-PIC: 	movl	lsrc+64(%rip), %eax
-; LINUX-64-PIC-NEXT: 	movl	%eax, ldst+64(%rip)
+; LINUX-64-PIC: 	movl	lsrc+64(%rip), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], ldst+64(%rip)
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _qux06:
-; DARWIN-32-STATIC: 	movl	_lsrc+64, %eax
-; DARWIN-32-STATIC-NEXT: 	movl	%eax, _ldst+64
+; DARWIN-32-STATIC: 	movl	_lsrc+64, [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[EAX]], _ldst+64
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _qux06:
-; DARWIN-32-DYNAMIC: 	movl	_lsrc+64, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, _ldst+64
+; DARWIN-32-DYNAMIC: 	movl	_lsrc+64, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], _ldst+64
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _qux06:
 ; DARWIN-32-PIC: 	calll	L21$pb
 ; DARWIN-32-PIC-NEXT: L21$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	(_lsrc-L21$pb)+64(%eax), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, (_ldst-L21$pb)+64(%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	(_lsrc-L21$pb)+64([[EAX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], (_ldst-L21$pb)+64([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _qux06:
-; DARWIN-64-STATIC: 	movl	_lsrc+64(%rip), %eax
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, _ldst+64(%rip)
+; DARWIN-64-STATIC: 	movl	_lsrc+64(%rip), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], _ldst+64(%rip)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _qux06:
-; DARWIN-64-DYNAMIC: 	movl	_lsrc+64(%rip), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, _ldst+64(%rip)
+; DARWIN-64-DYNAMIC: 	movl	_lsrc+64(%rip), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], _ldst+64(%rip)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _qux06:
-; DARWIN-64-PIC: 	movl	_lsrc+64(%rip), %eax
-; DARWIN-64-PIC-NEXT: 	movl	%eax, _ldst+64(%rip)
+; DARWIN-64-PIC: 	movl	_lsrc+64(%rip), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], _ldst+64(%rip)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -1533,8 +1544,8 @@
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: qux07:
-; LINUX-64-PIC: 	leaq	ldst+64(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movq	%rax, lptr(%rip)
+; LINUX-64-PIC: 	leaq	ldst+64(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	[[RAX]], lptr(%rip)
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _qux07:
@@ -1548,24 +1559,24 @@
 ; DARWIN-32-PIC: _qux07:
 ; DARWIN-32-PIC: 	calll	L22$pb
 ; DARWIN-32-PIC-NEXT: L22$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	leal	(_ldst-L22$pb)+64(%eax), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, _lptr-L22$pb(%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	(_ldst-L22$pb)+64([[EAX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], _lptr-L22$pb([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _qux07:
-; DARWIN-64-STATIC: 	leaq	_ldst+64(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movq	%rax, _lptr(%rip)
+; DARWIN-64-STATIC: 	leaq	_ldst+64(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	[[RAX]], _lptr(%rip)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _qux07:
-; DARWIN-64-DYNAMIC: 	leaq	_ldst+64(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	%rax, _lptr(%rip)
+; DARWIN-64-DYNAMIC: 	leaq	_ldst+64(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	[[RAX]], _lptr(%rip)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _qux07:
-; DARWIN-64-PIC: 	leaq	_ldst+64(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movq	%rax, _lptr(%rip)
+; DARWIN-64-PIC: 	leaq	_ldst+64(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	[[RAX]], _lptr(%rip)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -1576,67 +1587,67 @@
 	%2 = getelementptr i32* %0, i64 16
 	store i32 %1, i32* %2, align 4
 ; LINUX-64-STATIC: qux08:
-; LINUX-64-STATIC: movl    lsrc+64(%rip), %eax
-; LINUX-64-STATIC: movq    lptr(%rip), %rcx
-; LINUX-64-STATIC: movl    %eax, 64(%rcx)
+; LINUX-64-STATIC: movl    lsrc+64(%rip), [[EAX:%e.x]]
+; LINUX-64-STATIC: movq    lptr(%rip), [[RCX:%r.x]]
+; LINUX-64-STATIC: movl    [[EAX]], 64([[RCX]])
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: qux08:
-; LINUX-32-STATIC: 	movl	lsrc+64, %eax
-; LINUX-32-STATIC-NEXT: 	movl	lptr, %ecx
-; LINUX-32-STATIC-NEXT: 	movl	%eax, 64(%ecx)
+; LINUX-32-STATIC: 	movl	lsrc+64, [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	lptr, [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[EAX]], 64([[ECX]])
 ; LINUX-32-STATIC-NEXT: 	ret
 	ret void
 
 ; LINUX-32-PIC: qux08:
-; LINUX-32-PIC: 	movl	lsrc+64, %eax
-; LINUX-32-PIC-NEXT: 	movl	lptr, %ecx
-; LINUX-32-PIC-NEXT: 	movl	%eax, 64(%ecx)
+; LINUX-32-PIC: 	movl	lsrc+64, [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	lptr, [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[EAX]], 64([[ECX]])
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: qux08:
-; LINUX-64-PIC: 	movl	lsrc+64(%rip), %eax
-; LINUX-64-PIC-NEXT: 	movq	lptr(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, 64(%rcx)
+; LINUX-64-PIC: 	movl	lsrc+64(%rip), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	lptr(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], 64([[RCX]])
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _qux08:
-; DARWIN-32-STATIC: 	movl	_lsrc+64, %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_lptr, %ecx
-; DARWIN-32-STATIC-NEXT: 	movl	%eax, 64(%ecx)
+; DARWIN-32-STATIC: 	movl	_lsrc+64, [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_lptr, [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[EAX]], 64([[ECX]])
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _qux08:
-; DARWIN-32-DYNAMIC: 	movl	_lsrc+64, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	_lptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, 64(%ecx)
+; DARWIN-32-DYNAMIC: 	movl	_lsrc+64, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	_lptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], 64([[ECX]])
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _qux08:
 ; DARWIN-32-PIC: 	calll	L23$pb
 ; DARWIN-32-PIC-NEXT: L23$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	(_lsrc-L23$pb)+64(%eax), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	_lptr-L23$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, 64(%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	(_lsrc-L23$pb)+64([[EAX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	_lptr-L23$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], 64([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _qux08:
-; DARWIN-64-STATIC: 	movl	_lsrc+64(%rip), %eax
-; DARWIN-64-STATIC-NEXT: 	movq	_lptr(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, 64(%rcx)
+; DARWIN-64-STATIC: 	movl	_lsrc+64(%rip), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_lptr(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], 64([[RCX]])
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _qux08:
-; DARWIN-64-DYNAMIC: 	movl	_lsrc+64(%rip), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_lptr(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, 64(%rcx)
+; DARWIN-64-DYNAMIC: 	movl	_lsrc+64(%rip), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_lptr(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], 64([[RCX]])
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _qux08:
-; DARWIN-64-PIC: 	movl	_lsrc+64(%rip), %eax
-; DARWIN-64-PIC-NEXT: 	movq	_lptr(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, 64(%rcx)
+; DARWIN-64-PIC: 	movl	_lsrc+64(%rip), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_lptr(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], 64([[RCX]])
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -1648,73 +1659,73 @@
 	store i32 %1, i32* %2, align 4
 	ret void
 ; LINUX-64-STATIC: ind00:
-; LINUX-64-STATIC: movl    src(,%rdi,4), %eax
-; LINUX-64-STATIC: movl    %eax, dst(,%rdi,4)
+; LINUX-64-STATIC: movl    src(,%rdi,4), [[EAX:%e.x]]
+; LINUX-64-STATIC: movl    [[EAX]], dst(,%rdi,4)
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: ind00:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	movl	src(,%eax,4), %ecx
-; LINUX-32-STATIC-NEXT: 	movl	%ecx, dst(,%eax,4)
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	src(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[ECX]], dst(,[[EAX]],4)
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: ind00:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	movl	src(,%eax,4), %ecx
-; LINUX-32-PIC-NEXT: 	movl	%ecx, dst(,%eax,4)
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	src(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[ECX]], dst(,[[EAX]],4)
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: ind00:
-; LINUX-64-PIC: 	movq	src at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	(%rax,%rdi,4), %eax
-; LINUX-64-PIC-NEXT: 	movq	dst at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, (%rcx,%rdi,4)
+; LINUX-64-PIC: 	movq	src at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	([[RAX]],%rdi,4), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	dst at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], ([[RCX]],%rdi,4)
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _ind00:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_src(,%eax,4), %ecx
-; DARWIN-32-STATIC-NEXT: 	movl	%ecx, _dst(,%eax,4)
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_src(,[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[ECX]], _dst(,[[EAX]],4)
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _ind00:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_src$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	(%ecx,%eax,4), %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_dst$non_lazy_ptr, %edx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%ecx, (%edx,%eax,4)
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_src$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	([[ECX]],[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_dst$non_lazy_ptr, [[EDX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[ECX]], ([[EDX]],[[EAX]],4)
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _ind00:
 ; DARWIN-32-PIC: 	calll	L24$pb
 ; DARWIN-32-PIC-NEXT: L24$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_src$non_lazy_ptr-L24$pb(%eax), %edx
-; DARWIN-32-PIC-NEXT: 	movl	(%edx,%ecx,4), %edx
-; DARWIN-32-PIC-NEXT: 	movl	L_dst$non_lazy_ptr-L24$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%edx, (%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_src$non_lazy_ptr-L24$pb([[EAX]]), [[EDX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	([[EDX]],[[ECX]],4), [[EDX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_dst$non_lazy_ptr-L24$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[EDX]], ([[EAX]],[[ECX]],4)
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _ind00:
-; DARWIN-64-STATIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movl	(%rax,%rdi,4), %eax
-; DARWIN-64-STATIC-NEXT: 	movq	_dst at GOTPCREL(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, (%rcx,%rdi,4)
+; DARWIN-64-STATIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_dst at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], ([[RCX]],%rdi,4)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _ind00:
-; DARWIN-64-DYNAMIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	(%rax,%rdi,4), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_dst at GOTPCREL(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, (%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_dst at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], ([[RCX]],%rdi,4)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _ind00:
-; DARWIN-64-PIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movl	(%rax,%rdi,4), %eax
-; DARWIN-64-PIC-NEXT: 	movq	_dst at GOTPCREL(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, (%rcx,%rdi,4)
+; DARWIN-64-PIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_dst at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], ([[RCX]],%rdi,4)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -1726,73 +1737,73 @@
 	store i32 %1, i32* %2, align 4
 	ret void
 ; LINUX-64-STATIC: ixd00:
-; LINUX-64-STATIC: movl    xsrc(,%rdi,4), %eax
-; LINUX-64-STATIC: movl    %eax, xdst(,%rdi,4)
+; LINUX-64-STATIC: movl    xsrc(,%rdi,4), [[EAX:%e.x]]
+; LINUX-64-STATIC: movl    [[EAX]], xdst(,%rdi,4)
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: ixd00:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	movl	xsrc(,%eax,4), %ecx
-; LINUX-32-STATIC-NEXT: 	movl	%ecx, xdst(,%eax,4)
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	xsrc(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[ECX]], xdst(,[[EAX]],4)
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: ixd00:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	movl	xsrc(,%eax,4), %ecx
-; LINUX-32-PIC-NEXT: 	movl	%ecx, xdst(,%eax,4)
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	xsrc(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[ECX]], xdst(,[[EAX]],4)
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: ixd00:
-; LINUX-64-PIC: 	movq	xsrc at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	(%rax,%rdi,4), %eax
-; LINUX-64-PIC-NEXT: 	movq	xdst at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, (%rcx,%rdi,4)
+; LINUX-64-PIC: 	movq	xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	([[RAX]],%rdi,4), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	xdst at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], ([[RCX]],%rdi,4)
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _ixd00:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_xsrc(,%eax,4), %ecx
-; DARWIN-32-STATIC-NEXT: 	movl	%ecx, _xdst(,%eax,4)
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_xsrc(,[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[ECX]], _xdst(,[[EAX]],4)
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _ixd00:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_xsrc$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	(%ecx,%eax,4), %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_xdst$non_lazy_ptr, %edx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%ecx, (%edx,%eax,4)
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_xsrc$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	([[ECX]],[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_xdst$non_lazy_ptr, [[EDX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[ECX]], ([[EDX]],[[EAX]],4)
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _ixd00:
 ; DARWIN-32-PIC: 	calll	L25$pb
 ; DARWIN-32-PIC-NEXT: L25$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_xsrc$non_lazy_ptr-L25$pb(%eax), %edx
-; DARWIN-32-PIC-NEXT: 	movl	(%edx,%ecx,4), %edx
-; DARWIN-32-PIC-NEXT: 	movl	L_xdst$non_lazy_ptr-L25$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%edx, (%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_xsrc$non_lazy_ptr-L25$pb([[EAX]]), [[EDX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	([[EDX]],[[ECX]],4), [[EDX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_xdst$non_lazy_ptr-L25$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[EDX]], ([[EAX]],[[ECX]],4)
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _ixd00:
-; DARWIN-64-STATIC: 	movq	_xsrc at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movl	(%rax,%rdi,4), %eax
-; DARWIN-64-STATIC-NEXT: 	movq	_xdst at GOTPCREL(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, (%rcx,%rdi,4)
+; DARWIN-64-STATIC: 	movq	_xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_xdst at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], ([[RCX]],%rdi,4)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _ixd00:
-; DARWIN-64-DYNAMIC: 	movq	_xsrc at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	(%rax,%rdi,4), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_xdst at GOTPCREL(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, (%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC: 	movq	_xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_xdst at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], ([[RCX]],%rdi,4)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _ixd00:
-; DARWIN-64-PIC: 	movq	_xsrc at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movl	(%rax,%rdi,4), %eax
-; DARWIN-64-PIC-NEXT: 	movq	_xdst at GOTPCREL(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, (%rcx,%rdi,4)
+; DARWIN-64-PIC: 	movq	_xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_xdst at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], ([[RCX]],%rdi,4)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -1802,73 +1813,73 @@
 	store i32* %0, i32** @ptr, align 8
 	ret void
 ; LINUX-64-STATIC: ind01:
-; LINUX-64-STATIC: leaq    dst(,%rdi,4), %rax
-; LINUX-64-STATIC: movq    %rax, ptr
+; LINUX-64-STATIC: leaq    dst(,%rdi,4), [[RAX:%r.x]]
+; LINUX-64-STATIC: movq    [[RAX]], ptr
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: ind01:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	leal	dst(,%eax,4), %eax
-; LINUX-32-STATIC-NEXT: 	movl	%eax, ptr
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	leal	dst(,[[EAX]],4), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[EAX]], ptr
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: ind01:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	leal	dst(,%eax,4), %eax
-; LINUX-32-PIC-NEXT: 	movl	%eax, ptr
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	leal	dst(,[[EAX]],4), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[EAX]], ptr
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: ind01:
 ; LINUX-64-PIC: 	shlq	$2, %rdi
 ; LINUX-64-PIC-NEXT: 	addq	dst at GOTPCREL(%rip), %rdi
-; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movq	%rdi, (%rax)
+; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	%rdi, ([[RAX]])
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _ind01:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	leal	_dst(,%eax,4), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	%eax, _ptr
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	leal	_dst(,[[EAX]],4), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[EAX]], _ptr
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _ind01:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	shll	$2, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	addl	L_dst$non_lazy_ptr, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, (%ecx)
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	shll	$2, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	addl	L_dst$non_lazy_ptr, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], ([[ECX]])
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _ind01:
 ; DARWIN-32-PIC: 	calll	L26$pb
 ; DARWIN-32-PIC-NEXT: L26$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	shll	$2, %ecx
-; DARWIN-32-PIC-NEXT: 	addl	L_dst$non_lazy_ptr-L26$pb(%eax), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L26$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, (%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	shll	$2, [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	addl	L_dst$non_lazy_ptr-L26$pb([[EAX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L26$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], ([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _ind01:
 ; DARWIN-64-STATIC: 	shlq	$2, %rdi
 ; DARWIN-64-STATIC-NEXT: 	addq	_dst at GOTPCREL(%rip), %rdi
-; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movq	%rdi, (%rax)
+; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	%rdi, ([[RAX]])
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _ind01:
 ; DARWIN-64-DYNAMIC: 	shlq	$2, %rdi
 ; DARWIN-64-DYNAMIC-NEXT: 	addq	_dst at GOTPCREL(%rip), %rdi
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	%rdi, (%rax)
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	%rdi, ([[RAX]])
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _ind01:
 ; DARWIN-64-PIC: 	shlq	$2, %rdi
 ; DARWIN-64-PIC-NEXT: 	addq	_dst at GOTPCREL(%rip), %rdi
-; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movq	%rdi, (%rax)
+; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	%rdi, ([[RAX]])
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -1878,73 +1889,73 @@
 	store i32* %0, i32** @ptr, align 8
 	ret void
 ; LINUX-64-STATIC: ixd01:
-; LINUX-64-STATIC: leaq    xdst(,%rdi,4), %rax
-; LINUX-64-STATIC: movq    %rax, ptr
+; LINUX-64-STATIC: leaq    xdst(,%rdi,4), [[RAX:%r.x]]
+; LINUX-64-STATIC: movq    [[RAX]], ptr
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: ixd01:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	leal	xdst(,%eax,4), %eax
-; LINUX-32-STATIC-NEXT: 	movl	%eax, ptr
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	leal	xdst(,[[EAX]],4), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[EAX]], ptr
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: ixd01:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	leal	xdst(,%eax,4), %eax
-; LINUX-32-PIC-NEXT: 	movl	%eax, ptr
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	leal	xdst(,[[EAX]],4), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[EAX]], ptr
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: ixd01:
 ; LINUX-64-PIC: 	shlq	$2, %rdi
 ; LINUX-64-PIC-NEXT: 	addq	xdst at GOTPCREL(%rip), %rdi
-; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movq	%rdi, (%rax)
+; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	%rdi, ([[RAX]])
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _ixd01:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	leal	_xdst(,%eax,4), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	%eax, _ptr
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	leal	_xdst(,[[EAX]],4), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[EAX]], _ptr
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _ixd01:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	shll	$2, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	addl	L_xdst$non_lazy_ptr, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, (%ecx)
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	shll	$2, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	addl	L_xdst$non_lazy_ptr, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], ([[ECX]])
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _ixd01:
 ; DARWIN-32-PIC: 	calll	L27$pb
 ; DARWIN-32-PIC-NEXT: L27$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	shll	$2, %ecx
-; DARWIN-32-PIC-NEXT: 	addl	L_xdst$non_lazy_ptr-L27$pb(%eax), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L27$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, (%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	shll	$2, [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	addl	L_xdst$non_lazy_ptr-L27$pb([[EAX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L27$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], ([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _ixd01:
 ; DARWIN-64-STATIC: 	shlq	$2, %rdi
 ; DARWIN-64-STATIC-NEXT: 	addq	_xdst at GOTPCREL(%rip), %rdi
-; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movq	%rdi, (%rax)
+; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	%rdi, ([[RAX]])
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _ixd01:
 ; DARWIN-64-DYNAMIC: 	shlq	$2, %rdi
 ; DARWIN-64-DYNAMIC-NEXT: 	addq	_xdst at GOTPCREL(%rip), %rdi
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	%rdi, (%rax)
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	%rdi, ([[RAX]])
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _ixd01:
 ; DARWIN-64-PIC: 	shlq	$2, %rdi
 ; DARWIN-64-PIC-NEXT: 	addq	_xdst at GOTPCREL(%rip), %rdi
-; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movq	%rdi, (%rax)
+; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	%rdi, ([[RAX]])
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -1957,83 +1968,83 @@
 	store i32 %2, i32* %3, align 4
 	ret void
 ; LINUX-64-STATIC: ind02:
-; LINUX-64-STATIC: movl    src(,%rdi,4), %eax
-; LINUX-64-STATIC: movq    ptr(%rip), %rcx
-; LINUX-64-STATIC: movl    %eax, (%rcx,%rdi,4)
+; LINUX-64-STATIC: movl    src(,%rdi,4), [[EAX:%e.x]]
+; LINUX-64-STATIC: movq    ptr(%rip), [[RCX:%r.x]]
+; LINUX-64-STATIC: movl    [[EAX]], ([[RCX]],%rdi,4)
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: ind02:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	movl	src(,%eax,4), %ecx
-; LINUX-32-STATIC-NEXT: 	movl	ptr, %edx
-; LINUX-32-STATIC-NEXT: 	movl	%ecx, (%edx,%eax,4)
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	src(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	ptr, [[EDX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[ECX]], ([[EDX]],[[EAX]],4)
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: ind02:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	movl	src(,%eax,4), %ecx
-; LINUX-32-PIC-NEXT: 	movl	ptr, %edx
-; LINUX-32-PIC-NEXT: 	movl	%ecx, (%edx,%eax,4)
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	src(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	ptr, [[EDX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[ECX]], ([[EDX]],[[EAX]],4)
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: ind02:
-; LINUX-64-PIC: 	movq	src at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	(%rax,%rdi,4), %eax
-; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movq	(%rcx), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, (%rcx,%rdi,4)
+; LINUX-64-PIC: 	movq	src at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	([[RAX]],%rdi,4), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], ([[RCX]],%rdi,4)
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _ind02:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_src(,%eax,4), %ecx
-; DARWIN-32-STATIC-NEXT: 	movl	_ptr, %edx
-; DARWIN-32-STATIC-NEXT: 	movl	%ecx, (%edx,%eax,4)
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_src(,[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_ptr, [[EDX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[ECX]], ([[EDX]],[[EAX]],4)
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _ind02:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_src$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	(%ecx,%eax,4), %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, %edx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	(%edx), %edx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%ecx, (%edx,%eax,4)
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_src$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	([[ECX]],[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, [[EDX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	([[EDX]]), [[EDX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[ECX]], ([[EDX]],[[EAX]],4)
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _ind02:
 ; DARWIN-32-PIC: 	calll	L28$pb
 ; DARWIN-32-PIC-NEXT: L28$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_src$non_lazy_ptr-L28$pb(%eax), %edx
-; DARWIN-32-PIC-NEXT: 	movl	(%edx,%ecx,4), %edx
-; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L28$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%edx, (%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_src$non_lazy_ptr-L28$pb([[EAX]]), [[EDX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	([[EDX]],[[ECX]],4), [[EDX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L28$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[EDX]], ([[EAX]],[[ECX]],4)
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _ind02:
-; DARWIN-64-STATIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movl	(%rax,%rdi,4), %eax
-; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movq	(%rcx), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, (%rcx,%rdi,4)
+; DARWIN-64-STATIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], ([[RCX]],%rdi,4)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _ind02:
-; DARWIN-64-DYNAMIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	(%rax,%rdi,4), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movq	(%rcx), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, (%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], ([[RCX]],%rdi,4)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _ind02:
-; DARWIN-64-PIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movl	(%rax,%rdi,4), %eax
-; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movq	(%rcx), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, (%rcx,%rdi,4)
+; DARWIN-64-PIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], ([[RCX]],%rdi,4)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -2046,83 +2057,83 @@
 	store i32 %2, i32* %3, align 4
 	ret void
 ; LINUX-64-STATIC: ixd02:
-; LINUX-64-STATIC: movl    xsrc(,%rdi,4), %eax
-; LINUX-64-STATIC: movq    ptr(%rip), %rcx
-; LINUX-64-STATIC: movl    %eax, (%rcx,%rdi,4)
+; LINUX-64-STATIC: movl    xsrc(,%rdi,4), [[EAX:%e.x]]
+; LINUX-64-STATIC: movq    ptr(%rip), [[RCX:%r.x]]
+; LINUX-64-STATIC: movl    [[EAX]], ([[RCX]],%rdi,4)
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: ixd02:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	movl	xsrc(,%eax,4), %ecx
-; LINUX-32-STATIC-NEXT: 	movl	ptr, %edx
-; LINUX-32-STATIC-NEXT: 	movl	%ecx, (%edx,%eax,4)
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	xsrc(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	ptr, [[EDX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[ECX]], ([[EDX]],[[EAX]],4)
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: ixd02:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	movl	xsrc(,%eax,4), %ecx
-; LINUX-32-PIC-NEXT: 	movl	ptr, %edx
-; LINUX-32-PIC-NEXT: 	movl	%ecx, (%edx,%eax,4)
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	xsrc(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	ptr, [[EDX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[ECX]], ([[EDX]],[[EAX]],4)
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: ixd02:
-; LINUX-64-PIC: 	movq	xsrc at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	(%rax,%rdi,4), %eax
-; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movq	(%rcx), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, (%rcx,%rdi,4)
+; LINUX-64-PIC: 	movq	xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	([[RAX]],%rdi,4), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], ([[RCX]],%rdi,4)
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _ixd02:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_xsrc(,%eax,4), %ecx
-; DARWIN-32-STATIC-NEXT: 	movl	_ptr, %edx
-; DARWIN-32-STATIC-NEXT: 	movl	%ecx, (%edx,%eax,4)
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_xsrc(,[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_ptr, [[EDX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[ECX]], ([[EDX]],[[EAX]],4)
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _ixd02:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_xsrc$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	(%ecx,%eax,4), %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, %edx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	(%edx), %edx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%ecx, (%edx,%eax,4)
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_xsrc$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	([[ECX]],[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, [[EDX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	([[EDX]]), [[EDX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[ECX]], ([[EDX]],[[EAX]],4)
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _ixd02:
 ; DARWIN-32-PIC: 	calll	L29$pb
 ; DARWIN-32-PIC-NEXT: L29$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_xsrc$non_lazy_ptr-L29$pb(%eax), %edx
-; DARWIN-32-PIC-NEXT: 	movl	(%edx,%ecx,4), %edx
-; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L29$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%edx, (%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_xsrc$non_lazy_ptr-L29$pb([[EAX]]), [[EDX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	([[EDX]],[[ECX]],4), [[EDX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L29$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[EDX]], ([[EAX]],[[ECX]],4)
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _ixd02:
-; DARWIN-64-STATIC: 	movq	_xsrc at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movl	(%rax,%rdi,4), %eax
-; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movq	(%rcx), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, (%rcx,%rdi,4)
+; DARWIN-64-STATIC: 	movq	_xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], ([[RCX]],%rdi,4)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _ixd02:
-; DARWIN-64-DYNAMIC: 	movq	_xsrc at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	(%rax,%rdi,4), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movq	(%rcx), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, (%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC: 	movq	_xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], ([[RCX]],%rdi,4)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _ixd02:
-; DARWIN-64-PIC: 	movq	_xsrc at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movl	(%rax,%rdi,4), %eax
-; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movq	(%rcx), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, (%rcx,%rdi,4)
+; DARWIN-64-PIC: 	movq	_xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], ([[RCX]],%rdi,4)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -2134,69 +2145,69 @@
 	store i32 %1, i32* %2, align 4
 	ret void
 ; LINUX-64-STATIC: ind03:
-; LINUX-64-STATIC: movl    dsrc(,%rdi,4), %eax
-; LINUX-64-STATIC: movl    %eax, ddst(,%rdi,4)
+; LINUX-64-STATIC: movl    dsrc(,%rdi,4), [[EAX:%e.x]]
+; LINUX-64-STATIC: movl    [[EAX]], ddst(,%rdi,4)
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: ind03:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	movl	dsrc(,%eax,4), %ecx
-; LINUX-32-STATIC-NEXT: 	movl	%ecx, ddst(,%eax,4)
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	dsrc(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[ECX]], ddst(,[[EAX]],4)
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: ind03:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	movl	dsrc(,%eax,4), %ecx
-; LINUX-32-PIC-NEXT: 	movl	%ecx, ddst(,%eax,4)
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	dsrc(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[ECX]], ddst(,[[EAX]],4)
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: ind03:
-; LINUX-64-PIC: 	movq	dsrc at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	(%rax,%rdi,4), %eax
-; LINUX-64-PIC-NEXT: 	movq	ddst at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, (%rcx,%rdi,4)
+; LINUX-64-PIC: 	movq	dsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	([[RAX]],%rdi,4), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	ddst at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], ([[RCX]],%rdi,4)
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _ind03:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_dsrc(,%eax,4), %ecx
-; DARWIN-32-STATIC-NEXT: 	movl	%ecx, _ddst(,%eax,4)
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_dsrc(,[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[ECX]], _ddst(,[[EAX]],4)
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _ind03:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	_dsrc(,%eax,4), %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%ecx, _ddst(,%eax,4)
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	_dsrc(,[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[ECX]], _ddst(,[[EAX]],4)
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _ind03:
 ; DARWIN-32-PIC: 	calll	L30$pb
 ; DARWIN-32-PIC-NEXT: L30$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	_dsrc-L30$pb(%eax,%ecx,4), %edx
-; DARWIN-32-PIC-NEXT: 	movl	%edx, _ddst-L30$pb(%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	_dsrc-L30$pb([[EAX]],[[ECX]],4), [[EDX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[EDX]], _ddst-L30$pb([[EAX]],[[ECX]],4)
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _ind03:
-; DARWIN-64-STATIC: 	leaq	_dsrc(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movl	(%rax,%rdi,4), %eax
-; DARWIN-64-STATIC-NEXT: 	leaq	_ddst(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, (%rcx,%rdi,4)
+; DARWIN-64-STATIC: 	leaq	_dsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	_ddst(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], ([[RCX]],%rdi,4)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _ind03:
-; DARWIN-64-DYNAMIC: 	leaq	_dsrc(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	(%rax,%rdi,4), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	_ddst(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, (%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC: 	leaq	_dsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	_ddst(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], ([[RCX]],%rdi,4)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _ind03:
-; DARWIN-64-PIC: 	leaq	_dsrc(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movl	(%rax,%rdi,4), %eax
-; DARWIN-64-PIC-NEXT: 	leaq	_ddst(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, (%rcx,%rdi,4)
+; DARWIN-64-PIC: 	leaq	_dsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	_ddst(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], ([[RCX]],%rdi,4)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -2206,66 +2217,66 @@
 	store i32* %0, i32** @dptr, align 8
 	ret void
 ; LINUX-64-STATIC: ind04:
-; LINUX-64-STATIC: leaq    ddst(,%rdi,4), %rax
-; LINUX-64-STATIC: movq    %rax, dptr
+; LINUX-64-STATIC: leaq    ddst(,%rdi,4), [[RAX:%r.x]]
+; LINUX-64-STATIC: movq    [[RAX]], dptr
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: ind04:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	leal	ddst(,%eax,4), %eax
-; LINUX-32-STATIC-NEXT: 	movl	%eax, dptr
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	leal	ddst(,[[EAX]],4), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[EAX]], dptr
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: ind04:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	leal	ddst(,%eax,4), %eax
-; LINUX-32-PIC-NEXT: 	movl	%eax, dptr
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	leal	ddst(,[[EAX]],4), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[EAX]], dptr
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: ind04:
 ; LINUX-64-PIC: 	shlq	$2, %rdi
 ; LINUX-64-PIC-NEXT: 	addq	ddst at GOTPCREL(%rip), %rdi
-; LINUX-64-PIC-NEXT: 	movq	dptr at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movq	%rdi, (%rax)
+; LINUX-64-PIC-NEXT: 	movq	dptr at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	%rdi, ([[RAX]])
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _ind04:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	leal	_ddst(,%eax,4), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	%eax, _dptr
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	leal	_ddst(,[[EAX]],4), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[EAX]], _dptr
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _ind04:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	leal	_ddst(,%eax,4), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, _dptr
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	leal	_ddst(,[[EAX]],4), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], _dptr
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _ind04:
 ; DARWIN-32-PIC: 	calll	L31$pb
 ; DARWIN-32-PIC-NEXT: L31$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	leal	_ddst-L31$pb(%eax,%ecx,4), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, _dptr-L31$pb(%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	_ddst-L31$pb([[EAX]],[[ECX]],4), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], _dptr-L31$pb([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _ind04:
-; DARWIN-64-STATIC: 	leaq	_ddst(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	leaq	(%rax,%rdi,4), %rax
-; DARWIN-64-STATIC-NEXT: 	movq	%rax, _dptr(%rip)
+; DARWIN-64-STATIC: 	leaq	_ddst(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	([[RAX]],%rdi,4), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	[[RAX]], _dptr(%rip)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _ind04:
-; DARWIN-64-DYNAMIC: 	leaq	_ddst(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	(%rax,%rdi,4), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	%rax, _dptr(%rip)
+; DARWIN-64-DYNAMIC: 	leaq	_ddst(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	([[RAX]],%rdi,4), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	[[RAX]], _dptr(%rip)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _ind04:
-; DARWIN-64-PIC: 	leaq	_ddst(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	leaq	(%rax,%rdi,4), %rax
-; DARWIN-64-PIC-NEXT: 	movq	%rax, _dptr(%rip)
+; DARWIN-64-PIC: 	leaq	_ddst(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	([[RAX]],%rdi,4), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	[[RAX]], _dptr(%rip)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -2278,76 +2289,76 @@
 	store i32 %2, i32* %3, align 4
 	ret void
 ; LINUX-64-STATIC: ind05:
-; LINUX-64-STATIC: movl    dsrc(,%rdi,4), %eax
-; LINUX-64-STATIC: movq    dptr(%rip), %rcx
-; LINUX-64-STATIC: movl    %eax, (%rcx,%rdi,4)
+; LINUX-64-STATIC: movl    dsrc(,%rdi,4), [[EAX:%e.x]]
+; LINUX-64-STATIC: movq    dptr(%rip), [[RCX:%r.x]]
+; LINUX-64-STATIC: movl    [[EAX]], ([[RCX]],%rdi,4)
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: ind05:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	movl	dsrc(,%eax,4), %ecx
-; LINUX-32-STATIC-NEXT: 	movl	dptr, %edx
-; LINUX-32-STATIC-NEXT: 	movl	%ecx, (%edx,%eax,4)
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	dsrc(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	dptr, [[EDX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[ECX]], ([[EDX]],[[EAX]],4)
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: ind05:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	movl	dsrc(,%eax,4), %ecx
-; LINUX-32-PIC-NEXT: 	movl	dptr, %edx
-; LINUX-32-PIC-NEXT: 	movl	%ecx, (%edx,%eax,4)
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	dsrc(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	dptr, [[EDX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[ECX]], ([[EDX]],[[EAX]],4)
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: ind05:
-; LINUX-64-PIC: 	movq	dsrc at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	(%rax,%rdi,4), %eax
-; LINUX-64-PIC-NEXT: 	movq	dptr at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movq	(%rcx), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, (%rcx,%rdi,4)
+; LINUX-64-PIC: 	movq	dsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	([[RAX]],%rdi,4), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	dptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], ([[RCX]],%rdi,4)
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _ind05:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_dsrc(,%eax,4), %ecx
-; DARWIN-32-STATIC-NEXT: 	movl	_dptr, %edx
-; DARWIN-32-STATIC-NEXT: 	movl	%ecx, (%edx,%eax,4)
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_dsrc(,[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_dptr, [[EDX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[ECX]], ([[EDX]],[[EAX]],4)
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _ind05:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	_dsrc(,%eax,4), %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	_dptr, %edx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%ecx, (%edx,%eax,4)
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	_dsrc(,[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	_dptr, [[EDX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[ECX]], ([[EDX]],[[EAX]],4)
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _ind05:
 ; DARWIN-32-PIC: 	calll	L32$pb
 ; DARWIN-32-PIC-NEXT: L32$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	_dsrc-L32$pb(%eax,%ecx,4), %edx
-; DARWIN-32-PIC-NEXT: 	movl	_dptr-L32$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%edx, (%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	_dsrc-L32$pb([[EAX]],[[ECX]],4), [[EDX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	_dptr-L32$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[EDX]], ([[EAX]],[[ECX]],4)
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _ind05:
-; DARWIN-64-STATIC: 	leaq	_dsrc(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movl	(%rax,%rdi,4), %eax
-; DARWIN-64-STATIC-NEXT: 	movq	_dptr(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, (%rcx,%rdi,4)
+; DARWIN-64-STATIC: 	leaq	_dsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_dptr(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], ([[RCX]],%rdi,4)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _ind05:
-; DARWIN-64-DYNAMIC: 	leaq	_dsrc(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	(%rax,%rdi,4), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_dptr(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, (%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC: 	leaq	_dsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_dptr(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], ([[RCX]],%rdi,4)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _ind05:
-; DARWIN-64-PIC: 	leaq	_dsrc(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movl	(%rax,%rdi,4), %eax
-; DARWIN-64-PIC-NEXT: 	movq	_dptr(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, (%rcx,%rdi,4)
+; DARWIN-64-PIC: 	leaq	_dsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_dptr(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], ([[RCX]],%rdi,4)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -2359,69 +2370,69 @@
 	store i32 %1, i32* %2, align 4
 	ret void
 ; LINUX-64-STATIC: ind06:
-; LINUX-64-STATIC: movl    lsrc(,%rdi,4), %eax
-; LINUX-64-STATIC: movl    %eax, ldst(,%rdi,4)
+; LINUX-64-STATIC: movl    lsrc(,%rdi,4), [[EAX:%e.x]]
+; LINUX-64-STATIC: movl    [[EAX]], ldst(,%rdi,4)
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: ind06:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	movl	lsrc(,%eax,4), %ecx
-; LINUX-32-STATIC-NEXT: 	movl	%ecx, ldst(,%eax,4)
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	lsrc(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[ECX]], ldst(,[[EAX]],4)
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: ind06:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	movl	lsrc(,%eax,4), %ecx
-; LINUX-32-PIC-NEXT: 	movl	%ecx, ldst(,%eax,4)
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	lsrc(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[ECX]], ldst(,[[EAX]],4)
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: ind06:
-; LINUX-64-PIC: 	leaq	lsrc(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	(%rax,%rdi,4), %eax
-; LINUX-64-PIC-NEXT: 	leaq	ldst(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, (%rcx,%rdi,4)
+; LINUX-64-PIC: 	leaq	lsrc(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	([[RAX]],%rdi,4), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	leaq	ldst(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], ([[RCX]],%rdi,4)
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _ind06:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_lsrc(,%eax,4), %ecx
-; DARWIN-32-STATIC-NEXT: 	movl	%ecx, _ldst(,%eax,4)
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_lsrc(,[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[ECX]], _ldst(,[[EAX]],4)
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _ind06:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	_lsrc(,%eax,4), %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%ecx, _ldst(,%eax,4)
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	_lsrc(,[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[ECX]], _ldst(,[[EAX]],4)
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _ind06:
 ; DARWIN-32-PIC: 	calll	L33$pb
 ; DARWIN-32-PIC-NEXT: L33$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	_lsrc-L33$pb(%eax,%ecx,4), %edx
-; DARWIN-32-PIC-NEXT: 	movl	%edx, _ldst-L33$pb(%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	_lsrc-L33$pb([[EAX]],[[ECX]],4), [[EDX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[EDX]], _ldst-L33$pb([[EAX]],[[ECX]],4)
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _ind06:
-; DARWIN-64-STATIC: 	leaq	_lsrc(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movl	(%rax,%rdi,4), %eax
-; DARWIN-64-STATIC-NEXT: 	leaq	_ldst(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, (%rcx,%rdi,4)
+; DARWIN-64-STATIC: 	leaq	_lsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	_ldst(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], ([[RCX]],%rdi,4)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _ind06:
-; DARWIN-64-DYNAMIC: 	leaq	_lsrc(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	(%rax,%rdi,4), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	_ldst(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, (%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC: 	leaq	_lsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	_ldst(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], ([[RCX]],%rdi,4)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _ind06:
-; DARWIN-64-PIC: 	leaq	_lsrc(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movl	(%rax,%rdi,4), %eax
-; DARWIN-64-PIC-NEXT: 	leaq	_ldst(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, (%rcx,%rdi,4)
+; DARWIN-64-PIC: 	leaq	_lsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	_ldst(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], ([[RCX]],%rdi,4)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -2431,65 +2442,65 @@
 	store i32* %0, i32** @lptr, align 8
 	ret void
 ; LINUX-64-STATIC: ind07:
-; LINUX-64-STATIC: leaq    ldst(,%rdi,4), %rax
-; LINUX-64-STATIC: movq    %rax, lptr
+; LINUX-64-STATIC: leaq    ldst(,%rdi,4), [[RAX:%r.x]]
+; LINUX-64-STATIC: movq    [[RAX]], lptr
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: ind07:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	leal	ldst(,%eax,4), %eax
-; LINUX-32-STATIC-NEXT: 	movl	%eax, lptr
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	leal	ldst(,[[EAX]],4), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[EAX]], lptr
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: ind07:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	leal	ldst(,%eax,4), %eax
-; LINUX-32-PIC-NEXT: 	movl	%eax, lptr
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	leal	ldst(,[[EAX]],4), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[EAX]], lptr
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: ind07:
-; LINUX-64-PIC: 	leaq	ldst(%rip), %rax
-; LINUX-64-PIC-NEXT: 	leaq	(%rax,%rdi,4), %rax
-; LINUX-64-PIC-NEXT: 	movq	%rax, lptr(%rip)
+; LINUX-64-PIC: 	leaq	ldst(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	leaq	([[RAX]],%rdi,4), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	[[RAX]], lptr(%rip)
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _ind07:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	leal	_ldst(,%eax,4), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	%eax, _lptr
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	leal	_ldst(,[[EAX]],4), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[EAX]], _lptr
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _ind07:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	leal	_ldst(,%eax,4), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, _lptr
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	leal	_ldst(,[[EAX]],4), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], _lptr
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _ind07:
 ; DARWIN-32-PIC: 	calll	L34$pb
 ; DARWIN-32-PIC-NEXT: L34$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	leal	_ldst-L34$pb(%eax,%ecx,4), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, _lptr-L34$pb(%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	_ldst-L34$pb([[EAX]],[[ECX]],4), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], _lptr-L34$pb([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _ind07:
-; DARWIN-64-STATIC: 	leaq	_ldst(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	leaq	(%rax,%rdi,4), %rax
-; DARWIN-64-STATIC-NEXT: 	movq	%rax, _lptr(%rip)
+; DARWIN-64-STATIC: 	leaq	_ldst(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	([[RAX]],%rdi,4), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	[[RAX]], _lptr(%rip)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _ind07:
-; DARWIN-64-DYNAMIC: 	leaq	_ldst(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	(%rax,%rdi,4), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	%rax, _lptr(%rip)
+; DARWIN-64-DYNAMIC: 	leaq	_ldst(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	([[RAX]],%rdi,4), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	[[RAX]], _lptr(%rip)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _ind07:
-; DARWIN-64-PIC: 	leaq	_ldst(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	leaq	(%rax,%rdi,4), %rax
-; DARWIN-64-PIC-NEXT: 	movq	%rax, _lptr(%rip)
+; DARWIN-64-PIC: 	leaq	_ldst(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	([[RAX]],%rdi,4), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	[[RAX]], _lptr(%rip)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -2502,75 +2513,75 @@
 	store i32 %2, i32* %3, align 4
 	ret void
 ; LINUX-64-STATIC: ind08:
-; LINUX-64-STATIC: movl    lsrc(,%rdi,4), %eax
-; LINUX-64-STATIC: movq    lptr(%rip), %rcx
-; LINUX-64-STATIC: movl    %eax, (%rcx,%rdi,4)
+; LINUX-64-STATIC: movl    lsrc(,%rdi,4), [[EAX:%e.x]]
+; LINUX-64-STATIC: movq    lptr(%rip), [[RCX:%r.x]]
+; LINUX-64-STATIC: movl    [[EAX]], ([[RCX]],%rdi,4)
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: ind08:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	movl	lsrc(,%eax,4), %ecx
-; LINUX-32-STATIC-NEXT: 	movl	lptr, %edx
-; LINUX-32-STATIC-NEXT: 	movl	%ecx, (%edx,%eax,4)
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	lsrc(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	lptr, [[EDX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[ECX]], ([[EDX]],[[EAX]],4)
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: ind08:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	movl	lsrc(,%eax,4), %ecx
-; LINUX-32-PIC-NEXT: 	movl	lptr, %edx
-; LINUX-32-PIC-NEXT: 	movl	%ecx, (%edx,%eax,4)
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	lsrc(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	lptr, [[EDX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[ECX]], ([[EDX]],[[EAX]],4)
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: ind08:
-; LINUX-64-PIC: 	leaq	lsrc(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	(%rax,%rdi,4), %eax
-; LINUX-64-PIC-NEXT: 	movq	lptr(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, (%rcx,%rdi,4)
+; LINUX-64-PIC: 	leaq	lsrc(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	([[RAX]],%rdi,4), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	lptr(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], ([[RCX]],%rdi,4)
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _ind08:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_lsrc(,%eax,4), %ecx
-; DARWIN-32-STATIC-NEXT: 	movl	_lptr, %edx
-; DARWIN-32-STATIC-NEXT: 	movl	%ecx, (%edx,%eax,4)
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_lsrc(,[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_lptr, [[EDX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[ECX]], ([[EDX]],[[EAX]],4)
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _ind08:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	_lsrc(,%eax,4), %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	_lptr, %edx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%ecx, (%edx,%eax,4)
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	_lsrc(,[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	_lptr, [[EDX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[ECX]], ([[EDX]],[[EAX]],4)
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _ind08:
 ; DARWIN-32-PIC: 	calll	L35$pb
 ; DARWIN-32-PIC-NEXT: L35$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	_lsrc-L35$pb(%eax,%ecx,4), %edx
-; DARWIN-32-PIC-NEXT: 	movl	_lptr-L35$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%edx, (%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	_lsrc-L35$pb([[EAX]],[[ECX]],4), [[EDX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	_lptr-L35$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[EDX]], ([[EAX]],[[ECX]],4)
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _ind08:
-; DARWIN-64-STATIC: 	leaq	_lsrc(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movl	(%rax,%rdi,4), %eax
-; DARWIN-64-STATIC-NEXT: 	movq	_lptr(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, (%rcx,%rdi,4)
+; DARWIN-64-STATIC: 	leaq	_lsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_lptr(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], ([[RCX]],%rdi,4)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _ind08:
-; DARWIN-64-DYNAMIC: 	leaq	_lsrc(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	(%rax,%rdi,4), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_lptr(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, (%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC: 	leaq	_lsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_lptr(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], ([[RCX]],%rdi,4)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _ind08:
-; DARWIN-64-PIC: 	leaq	_lsrc(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movl	(%rax,%rdi,4), %eax
-; DARWIN-64-PIC-NEXT: 	movq	_lptr(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, (%rcx,%rdi,4)
+; DARWIN-64-PIC: 	leaq	_lsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_lptr(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], ([[RCX]],%rdi,4)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -2583,73 +2594,73 @@
 	store i32 %2, i32* %3, align 4
 	ret void
 ; LINUX-64-STATIC: off00:
-; LINUX-64-STATIC: movl    src+64(,%rdi,4), %eax
-; LINUX-64-STATIC: movl    %eax, dst+64(,%rdi,4)
+; LINUX-64-STATIC: movl    src+64(,%rdi,4), [[EAX:%e.x]]
+; LINUX-64-STATIC: movl    [[EAX]], dst+64(,%rdi,4)
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: off00:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	movl	src+64(,%eax,4), %ecx
-; LINUX-32-STATIC-NEXT: 	movl	%ecx, dst+64(,%eax,4)
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	src+64(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[ECX]], dst+64(,[[EAX]],4)
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: off00:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	movl	src+64(,%eax,4), %ecx
-; LINUX-32-PIC-NEXT: 	movl	%ecx, dst+64(,%eax,4)
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	src+64(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[ECX]], dst+64(,[[EAX]],4)
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: off00:
-; LINUX-64-PIC: 	movq	src at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	64(%rax,%rdi,4), %eax
-; LINUX-64-PIC-NEXT: 	movq	dst at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, 64(%rcx,%rdi,4)
+; LINUX-64-PIC: 	movq	src at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	64([[RAX]],%rdi,4), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	dst at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], 64([[RCX]],%rdi,4)
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _off00:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_src+64(,%eax,4), %ecx
-; DARWIN-32-STATIC-NEXT: 	movl	%ecx, _dst+64(,%eax,4)
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_src+64(,[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[ECX]], _dst+64(,[[EAX]],4)
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _off00:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_src$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	64(%ecx,%eax,4), %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_dst$non_lazy_ptr, %edx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%ecx, 64(%edx,%eax,4)
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_src$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	64([[ECX]],[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_dst$non_lazy_ptr, [[EDX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[ECX]], 64([[EDX]],[[EAX]],4)
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _off00:
 ; DARWIN-32-PIC: 	calll	L36$pb
 ; DARWIN-32-PIC-NEXT: L36$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_src$non_lazy_ptr-L36$pb(%eax), %edx
-; DARWIN-32-PIC-NEXT: 	movl	64(%edx,%ecx,4), %edx
-; DARWIN-32-PIC-NEXT: 	movl	L_dst$non_lazy_ptr-L36$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%edx, 64(%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_src$non_lazy_ptr-L36$pb([[EAX]]), [[EDX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	64([[EDX]],[[ECX]],4), [[EDX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_dst$non_lazy_ptr-L36$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[EDX]], 64([[EAX]],[[ECX]],4)
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _off00:
-; DARWIN-64-STATIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movl	64(%rax,%rdi,4), %eax
-; DARWIN-64-STATIC-NEXT: 	movq	_dst at GOTPCREL(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, 64(%rcx,%rdi,4)
+; DARWIN-64-STATIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	64([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_dst at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], 64([[RCX]],%rdi,4)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _off00:
-; DARWIN-64-DYNAMIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	64(%rax,%rdi,4), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_dst at GOTPCREL(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, 64(%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	64([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_dst at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], 64([[RCX]],%rdi,4)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _off00:
-; DARWIN-64-PIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movl	64(%rax,%rdi,4), %eax
-; DARWIN-64-PIC-NEXT: 	movq	_dst at GOTPCREL(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, 64(%rcx,%rdi,4)
+; DARWIN-64-PIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	64([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_dst at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], 64([[RCX]],%rdi,4)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -2662,73 +2673,73 @@
 	store i32 %2, i32* %3, align 4
 	ret void
 ; LINUX-64-STATIC: oxf00:
-; LINUX-64-STATIC: movl    xsrc+64(,%rdi,4), %eax
-; LINUX-64-STATIC: movl    %eax, xdst+64(,%rdi,4)
+; LINUX-64-STATIC: movl    xsrc+64(,%rdi,4), [[EAX:%e.x]]
+; LINUX-64-STATIC: movl    [[EAX]], xdst+64(,%rdi,4)
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: oxf00:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	movl	xsrc+64(,%eax,4), %ecx
-; LINUX-32-STATIC-NEXT: 	movl	%ecx, xdst+64(,%eax,4)
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	xsrc+64(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[ECX]], xdst+64(,[[EAX]],4)
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: oxf00:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	movl	xsrc+64(,%eax,4), %ecx
-; LINUX-32-PIC-NEXT: 	movl	%ecx, xdst+64(,%eax,4)
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	xsrc+64(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[ECX]], xdst+64(,[[EAX]],4)
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: oxf00:
-; LINUX-64-PIC: 	movq	xsrc at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	64(%rax,%rdi,4), %eax
-; LINUX-64-PIC-NEXT: 	movq	xdst at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, 64(%rcx,%rdi,4)
+; LINUX-64-PIC: 	movq	xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	64([[RAX]],%rdi,4), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	xdst at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], 64([[RCX]],%rdi,4)
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _oxf00:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_xsrc+64(,%eax,4), %ecx
-; DARWIN-32-STATIC-NEXT: 	movl	%ecx, _xdst+64(,%eax,4)
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_xsrc+64(,[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[ECX]], _xdst+64(,[[EAX]],4)
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _oxf00:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_xsrc$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	64(%ecx,%eax,4), %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_xdst$non_lazy_ptr, %edx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%ecx, 64(%edx,%eax,4)
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_xsrc$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	64([[ECX]],[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_xdst$non_lazy_ptr, [[EDX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[ECX]], 64([[EDX]],[[EAX]],4)
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _oxf00:
 ; DARWIN-32-PIC: 	calll	L37$pb
 ; DARWIN-32-PIC-NEXT: L37$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_xsrc$non_lazy_ptr-L37$pb(%eax), %edx
-; DARWIN-32-PIC-NEXT: 	movl	64(%edx,%ecx,4), %edx
-; DARWIN-32-PIC-NEXT: 	movl	L_xdst$non_lazy_ptr-L37$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%edx, 64(%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_xsrc$non_lazy_ptr-L37$pb([[EAX]]), [[EDX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	64([[EDX]],[[ECX]],4), [[EDX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_xdst$non_lazy_ptr-L37$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[EDX]], 64([[EAX]],[[ECX]],4)
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _oxf00:
-; DARWIN-64-STATIC: 	movq	_xsrc at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movl	64(%rax,%rdi,4), %eax
-; DARWIN-64-STATIC-NEXT: 	movq	_xdst at GOTPCREL(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, 64(%rcx,%rdi,4)
+; DARWIN-64-STATIC: 	movq	_xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	64([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_xdst at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], 64([[RCX]],%rdi,4)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _oxf00:
-; DARWIN-64-DYNAMIC: 	movq	_xsrc at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	64(%rax,%rdi,4), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_xdst at GOTPCREL(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, 64(%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC: 	movq	_xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	64([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_xdst at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], 64([[RCX]],%rdi,4)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _oxf00:
-; DARWIN-64-PIC: 	movq	_xsrc at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movl	64(%rax,%rdi,4), %eax
-; DARWIN-64-PIC-NEXT: 	movq	_xdst at GOTPCREL(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, 64(%rcx,%rdi,4)
+; DARWIN-64-PIC: 	movq	_xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	64([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_xdst at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], 64([[RCX]],%rdi,4)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -2739,73 +2750,73 @@
 	store i32* %0, i32** @ptr, align 8
 	ret void
 ; LINUX-64-STATIC: off01:
-; LINUX-64-STATIC: leaq    dst+64(,%rdi,4), %rax
-; LINUX-64-STATIC: movq    %rax, ptr
+; LINUX-64-STATIC: leaq    dst+64(,%rdi,4), [[RAX:%r.x]]
+; LINUX-64-STATIC: movq    [[RAX]], ptr
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: off01:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	leal	dst+64(,%eax,4), %eax
-; LINUX-32-STATIC-NEXT: 	movl	%eax, ptr
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	leal	dst+64(,[[EAX]],4), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[EAX]], ptr
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: off01:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	leal	dst+64(,%eax,4), %eax
-; LINUX-32-PIC-NEXT: 	movl	%eax, ptr
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	leal	dst+64(,[[EAX]],4), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[EAX]], ptr
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: off01:
-; LINUX-64-PIC: 	movq	dst at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
-; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movq	%rax, (%rcx)
+; LINUX-64-PIC: 	movq	dst at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	leaq	64([[RAX]],%rdi,4), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _off01:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	leal	_dst+64(,%eax,4), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	%eax, _ptr
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	leal	_dst+64(,[[EAX]],4), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[EAX]], _ptr
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _off01:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_dst$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	leal	64(%ecx,%eax,4), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, (%ecx)
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_dst$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	leal	64([[ECX]],[[EAX]],4), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], ([[ECX]])
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _off01:
 ; DARWIN-32-PIC: 	calll	L38$pb
 ; DARWIN-32-PIC-NEXT: L38$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_dst$non_lazy_ptr-L38$pb(%eax), %edx
-; DARWIN-32-PIC-NEXT: 	leal	64(%edx,%ecx,4), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L38$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, (%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_dst$non_lazy_ptr-L38$pb([[EAX]]), [[EDX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	64([[EDX]],[[ECX]],4), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L38$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], ([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _off01:
-; DARWIN-64-STATIC: 	movq	_dst at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
-; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movq	%rax, (%rcx)
+; DARWIN-64-STATIC: 	movq	_dst at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	64([[RAX]],%rdi,4), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _off01:
-; DARWIN-64-DYNAMIC: 	movq	_dst at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movq	%rax, (%rcx)
+; DARWIN-64-DYNAMIC: 	movq	_dst at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	64([[RAX]],%rdi,4), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _off01:
-; DARWIN-64-PIC: 	movq	_dst at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
-; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movq	%rax, (%rcx)
+; DARWIN-64-PIC: 	movq	_dst at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	64([[RAX]],%rdi,4), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -2816,73 +2827,73 @@
 	store i32* %0, i32** @ptr, align 8
 	ret void
 ; LINUX-64-STATIC: oxf01:
-; LINUX-64-STATIC: leaq    xdst+64(,%rdi,4), %rax
-; LINUX-64-STATIC: movq    %rax, ptr
+; LINUX-64-STATIC: leaq    xdst+64(,%rdi,4), [[RAX:%r.x]]
+; LINUX-64-STATIC: movq    [[RAX]], ptr
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: oxf01:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	leal	xdst+64(,%eax,4), %eax
-; LINUX-32-STATIC-NEXT: 	movl	%eax, ptr
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	leal	xdst+64(,[[EAX]],4), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[EAX]], ptr
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: oxf01:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	leal	xdst+64(,%eax,4), %eax
-; LINUX-32-PIC-NEXT: 	movl	%eax, ptr
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	leal	xdst+64(,[[EAX]],4), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[EAX]], ptr
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: oxf01:
-; LINUX-64-PIC: 	movq	xdst at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
-; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movq	%rax, (%rcx)
+; LINUX-64-PIC: 	movq	xdst at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	leaq	64([[RAX]],%rdi,4), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _oxf01:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	leal	_xdst+64(,%eax,4), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	%eax, _ptr
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	leal	_xdst+64(,[[EAX]],4), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[EAX]], _ptr
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _oxf01:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_xdst$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	leal	64(%ecx,%eax,4), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, (%ecx)
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_xdst$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	leal	64([[ECX]],[[EAX]],4), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], ([[ECX]])
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _oxf01:
 ; DARWIN-32-PIC: 	calll	L39$pb
 ; DARWIN-32-PIC-NEXT: L39$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_xdst$non_lazy_ptr-L39$pb(%eax), %edx
-; DARWIN-32-PIC-NEXT: 	leal	64(%edx,%ecx,4), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L39$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, (%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_xdst$non_lazy_ptr-L39$pb([[EAX]]), [[EDX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	64([[EDX]],[[ECX]],4), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L39$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], ([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _oxf01:
-; DARWIN-64-STATIC: 	movq	_xdst at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
-; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movq	%rax, (%rcx)
+; DARWIN-64-STATIC: 	movq	_xdst at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	64([[RAX]],%rdi,4), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _oxf01:
-; DARWIN-64-DYNAMIC: 	movq	_xdst at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movq	%rax, (%rcx)
+; DARWIN-64-DYNAMIC: 	movq	_xdst at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	64([[RAX]],%rdi,4), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _oxf01:
-; DARWIN-64-PIC: 	movq	_xdst at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
-; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movq	%rax, (%rcx)
+; DARWIN-64-PIC: 	movq	_xdst at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	64([[RAX]],%rdi,4), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -2896,83 +2907,83 @@
 	store i32 %3, i32* %4, align 4
 	ret void
 ; LINUX-64-STATIC: off02:
-; LINUX-64-STATIC: movl    src+64(,%rdi,4), %eax
-; LINUX-64-STATIC: movq    ptr(%rip), %rcx
-; LINUX-64-STATIC: movl    %eax, 64(%rcx,%rdi,4)
+; LINUX-64-STATIC: movl    src+64(,%rdi,4), [[EAX:%e.x]]
+; LINUX-64-STATIC: movq    ptr(%rip), [[RCX:%r.x]]
+; LINUX-64-STATIC: movl    [[EAX]], 64([[RCX]],%rdi,4)
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: off02:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	movl	src+64(,%eax,4), %ecx
-; LINUX-32-STATIC-NEXT: 	movl	ptr, %edx
-; LINUX-32-STATIC-NEXT: 	movl	%ecx, 64(%edx,%eax,4)
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	src+64(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	ptr, [[EDX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[ECX]], 64([[EDX]],[[EAX]],4)
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: off02:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	movl	src+64(,%eax,4), %ecx
-; LINUX-32-PIC-NEXT: 	movl	ptr, %edx
-; LINUX-32-PIC-NEXT: 	movl	%ecx, 64(%edx,%eax,4)
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	src+64(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	ptr, [[EDX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[ECX]], 64([[EDX]],[[EAX]],4)
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: off02:
-; LINUX-64-PIC: 	movq	src at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	64(%rax,%rdi,4), %eax
-; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movq	(%rcx), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, 64(%rcx,%rdi,4)
+; LINUX-64-PIC: 	movq	src at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	64([[RAX]],%rdi,4), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], 64([[RCX]],%rdi,4)
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _off02:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_src+64(,%eax,4), %ecx
-; DARWIN-32-STATIC-NEXT: 	movl	_ptr, %edx
-; DARWIN-32-STATIC-NEXT: 	movl	%ecx, 64(%edx,%eax,4)
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_src+64(,[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_ptr, [[EDX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[ECX]], 64([[EDX]],[[EAX]],4)
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _off02:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_src$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	64(%ecx,%eax,4), %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, %edx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	(%edx), %edx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%ecx, 64(%edx,%eax,4)
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_src$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	64([[ECX]],[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, [[EDX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	([[EDX]]), [[EDX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[ECX]], 64([[EDX]],[[EAX]],4)
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _off02:
 ; DARWIN-32-PIC: 	calll	L40$pb
 ; DARWIN-32-PIC-NEXT: L40$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_src$non_lazy_ptr-L40$pb(%eax), %edx
-; DARWIN-32-PIC-NEXT: 	movl	64(%edx,%ecx,4), %edx
-; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L40$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%edx, 64(%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_src$non_lazy_ptr-L40$pb([[EAX]]), [[EDX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	64([[EDX]],[[ECX]],4), [[EDX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L40$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[EDX]], 64([[EAX]],[[ECX]],4)
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _off02:
-; DARWIN-64-STATIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movl	64(%rax,%rdi,4), %eax
-; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movq	(%rcx), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, 64(%rcx,%rdi,4)
+; DARWIN-64-STATIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	64([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], 64([[RCX]],%rdi,4)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _off02:
-; DARWIN-64-DYNAMIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	64(%rax,%rdi,4), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movq	(%rcx), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, 64(%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	64([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], 64([[RCX]],%rdi,4)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _off02:
-; DARWIN-64-PIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movl	64(%rax,%rdi,4), %eax
-; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movq	(%rcx), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, 64(%rcx,%rdi,4)
+; DARWIN-64-PIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	64([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], 64([[RCX]],%rdi,4)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -2986,83 +2997,83 @@
 	store i32 %3, i32* %4, align 4
 	ret void
 ; LINUX-64-STATIC: oxf02:
-; LINUX-64-STATIC: movl    xsrc+64(,%rdi,4), %eax
-; LINUX-64-STATIC: movq    ptr(%rip), %rcx
-; LINUX-64-STATIC: movl    %eax, 64(%rcx,%rdi,4)
+; LINUX-64-STATIC: movl    xsrc+64(,%rdi,4), [[EAX:%e.x]]
+; LINUX-64-STATIC: movq    ptr(%rip), [[RCX:%r.x]]
+; LINUX-64-STATIC: movl    [[EAX]], 64([[RCX]],%rdi,4)
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: oxf02:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	movl	xsrc+64(,%eax,4), %ecx
-; LINUX-32-STATIC-NEXT: 	movl	ptr, %edx
-; LINUX-32-STATIC-NEXT: 	movl	%ecx, 64(%edx,%eax,4)
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	xsrc+64(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	ptr, [[EDX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[ECX]], 64([[EDX]],[[EAX]],4)
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: oxf02:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	movl	xsrc+64(,%eax,4), %ecx
-; LINUX-32-PIC-NEXT: 	movl	ptr, %edx
-; LINUX-32-PIC-NEXT: 	movl	%ecx, 64(%edx,%eax,4)
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	xsrc+64(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	ptr, [[EDX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[ECX]], 64([[EDX]],[[EAX]],4)
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: oxf02:
-; LINUX-64-PIC: 	movq	xsrc at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	64(%rax,%rdi,4), %eax
-; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movq	(%rcx), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, 64(%rcx,%rdi,4)
+; LINUX-64-PIC: 	movq	xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	64([[RAX]],%rdi,4), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], 64([[RCX]],%rdi,4)
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _oxf02:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_xsrc+64(,%eax,4), %ecx
-; DARWIN-32-STATIC-NEXT: 	movl	_ptr, %edx
-; DARWIN-32-STATIC-NEXT: 	movl	%ecx, 64(%edx,%eax,4)
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_xsrc+64(,[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_ptr, [[EDX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[ECX]], 64([[EDX]],[[EAX]],4)
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _oxf02:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_xsrc$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	64(%ecx,%eax,4), %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, %edx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	(%edx), %edx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%ecx, 64(%edx,%eax,4)
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_xsrc$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	64([[ECX]],[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, [[EDX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	([[EDX]]), [[EDX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[ECX]], 64([[EDX]],[[EAX]],4)
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _oxf02:
 ; DARWIN-32-PIC: 	calll	L41$pb
 ; DARWIN-32-PIC-NEXT: L41$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_xsrc$non_lazy_ptr-L41$pb(%eax), %edx
-; DARWIN-32-PIC-NEXT: 	movl	64(%edx,%ecx,4), %edx
-; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L41$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%edx, 64(%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_xsrc$non_lazy_ptr-L41$pb([[EAX]]), [[EDX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	64([[EDX]],[[ECX]],4), [[EDX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L41$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[EDX]], 64([[EAX]],[[ECX]],4)
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _oxf02:
-; DARWIN-64-STATIC: 	movq	_xsrc at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movl	64(%rax,%rdi,4), %eax
-; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movq	(%rcx), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, 64(%rcx,%rdi,4)
+; DARWIN-64-STATIC: 	movq	_xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	64([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], 64([[RCX]],%rdi,4)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _oxf02:
-; DARWIN-64-DYNAMIC: 	movq	_xsrc at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	64(%rax,%rdi,4), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movq	(%rcx), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, 64(%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC: 	movq	_xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	64([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], 64([[RCX]],%rdi,4)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _oxf02:
-; DARWIN-64-PIC: 	movq	_xsrc at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movl	64(%rax,%rdi,4), %eax
-; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movq	(%rcx), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, 64(%rcx,%rdi,4)
+; DARWIN-64-PIC: 	movq	_xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	64([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], 64([[RCX]],%rdi,4)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -3075,69 +3086,69 @@
 	store i32 %2, i32* %3, align 4
 	ret void
 ; LINUX-64-STATIC: off03:
-; LINUX-64-STATIC: movl    dsrc+64(,%rdi,4), %eax
-; LINUX-64-STATIC: movl    %eax, ddst+64(,%rdi,4)
+; LINUX-64-STATIC: movl    dsrc+64(,%rdi,4), [[EAX:%e.x]]
+; LINUX-64-STATIC: movl    [[EAX]], ddst+64(,%rdi,4)
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: off03:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	movl	dsrc+64(,%eax,4), %ecx
-; LINUX-32-STATIC-NEXT: 	movl	%ecx, ddst+64(,%eax,4)
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	dsrc+64(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[ECX]], ddst+64(,[[EAX]],4)
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: off03:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	movl	dsrc+64(,%eax,4), %ecx
-; LINUX-32-PIC-NEXT: 	movl	%ecx, ddst+64(,%eax,4)
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	dsrc+64(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[ECX]], ddst+64(,[[EAX]],4)
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: off03:
-; LINUX-64-PIC: 	movq	dsrc at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	64(%rax,%rdi,4), %eax
-; LINUX-64-PIC-NEXT: 	movq	ddst at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, 64(%rcx,%rdi,4)
+; LINUX-64-PIC: 	movq	dsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	64([[RAX]],%rdi,4), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	ddst at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], 64([[RCX]],%rdi,4)
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _off03:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_dsrc+64(,%eax,4), %ecx
-; DARWIN-32-STATIC-NEXT: 	movl	%ecx, _ddst+64(,%eax,4)
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_dsrc+64(,[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[ECX]], _ddst+64(,[[EAX]],4)
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _off03:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	_dsrc+64(,%eax,4), %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%ecx, _ddst+64(,%eax,4)
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	_dsrc+64(,[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[ECX]], _ddst+64(,[[EAX]],4)
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _off03:
 ; DARWIN-32-PIC: 	calll	L42$pb
 ; DARWIN-32-PIC-NEXT: L42$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	(_dsrc-L42$pb)+64(%eax,%ecx,4), %edx
-; DARWIN-32-PIC-NEXT: 	movl	%edx, (_ddst-L42$pb)+64(%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	(_dsrc-L42$pb)+64([[EAX]],[[ECX]],4), [[EDX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[EDX]], (_ddst-L42$pb)+64([[EAX]],[[ECX]],4)
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _off03:
-; DARWIN-64-STATIC: 	leaq	_dsrc(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movl	64(%rax,%rdi,4), %eax
-; DARWIN-64-STATIC-NEXT: 	leaq	_ddst(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, 64(%rcx,%rdi,4)
+; DARWIN-64-STATIC: 	leaq	_dsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	64([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	_ddst(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], 64([[RCX]],%rdi,4)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _off03:
-; DARWIN-64-DYNAMIC: 	leaq	_dsrc(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	64(%rax,%rdi,4), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	_ddst(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, 64(%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC: 	leaq	_dsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	64([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	_ddst(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], 64([[RCX]],%rdi,4)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _off03:
-; DARWIN-64-PIC: 	leaq	_dsrc(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movl	64(%rax,%rdi,4), %eax
-; DARWIN-64-PIC-NEXT: 	leaq	_ddst(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, 64(%rcx,%rdi,4)
+; DARWIN-64-PIC: 	leaq	_dsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	64([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	_ddst(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], 64([[RCX]],%rdi,4)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -3148,66 +3159,66 @@
 	store i32* %0, i32** @dptr, align 8
 	ret void
 ; LINUX-64-STATIC: off04:
-; LINUX-64-STATIC: leaq    ddst+64(,%rdi,4), %rax
-; LINUX-64-STATIC: movq    %rax, dptr
+; LINUX-64-STATIC: leaq    ddst+64(,%rdi,4), [[RAX:%r.x]]
+; LINUX-64-STATIC: movq    [[RAX]], dptr
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: off04:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	leal	ddst+64(,%eax,4), %eax
-; LINUX-32-STATIC-NEXT: 	movl	%eax, dptr
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	leal	ddst+64(,[[EAX]],4), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[EAX]], dptr
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: off04:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	leal	ddst+64(,%eax,4), %eax
-; LINUX-32-PIC-NEXT: 	movl	%eax, dptr
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	leal	ddst+64(,[[EAX]],4), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[EAX]], dptr
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: off04:
-; LINUX-64-PIC: 	movq	ddst at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
-; LINUX-64-PIC-NEXT: 	movq	dptr at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movq	%rax, (%rcx)
+; LINUX-64-PIC: 	movq	ddst at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	leaq	64([[RAX]],%rdi,4), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	dptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _off04:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	leal	_ddst+64(,%eax,4), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	%eax, _dptr
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	leal	_ddst+64(,[[EAX]],4), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[EAX]], _dptr
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _off04:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	leal	_ddst+64(,%eax,4), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, _dptr
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	leal	_ddst+64(,[[EAX]],4), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], _dptr
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _off04:
 ; DARWIN-32-PIC: 	calll	L43$pb
 ; DARWIN-32-PIC-NEXT: L43$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	leal	(_ddst-L43$pb)+64(%eax,%ecx,4), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, _dptr-L43$pb(%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	(_ddst-L43$pb)+64([[EAX]],[[ECX]],4), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], _dptr-L43$pb([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _off04:
-; DARWIN-64-STATIC: 	leaq	_ddst(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
-; DARWIN-64-STATIC-NEXT: 	movq	%rax, _dptr(%rip)
+; DARWIN-64-STATIC: 	leaq	_ddst(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	64([[RAX]],%rdi,4), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	[[RAX]], _dptr(%rip)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _off04:
-; DARWIN-64-DYNAMIC: 	leaq	_ddst(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	%rax, _dptr(%rip)
+; DARWIN-64-DYNAMIC: 	leaq	_ddst(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	64([[RAX]],%rdi,4), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	[[RAX]], _dptr(%rip)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _off04:
-; DARWIN-64-PIC: 	leaq	_ddst(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
-; DARWIN-64-PIC-NEXT: 	movq	%rax, _dptr(%rip)
+; DARWIN-64-PIC: 	leaq	_ddst(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	64([[RAX]],%rdi,4), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	[[RAX]], _dptr(%rip)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -3221,76 +3232,76 @@
 	store i32 %3, i32* %4, align 4
 	ret void
 ; LINUX-64-STATIC: off05:
-; LINUX-64-STATIC: movl    dsrc+64(,%rdi,4), %eax
-; LINUX-64-STATIC: movq    dptr(%rip), %rcx
-; LINUX-64-STATIC: movl    %eax, 64(%rcx,%rdi,4)
+; LINUX-64-STATIC: movl    dsrc+64(,%rdi,4), [[EAX:%e.x]]
+; LINUX-64-STATIC: movq    dptr(%rip), [[RCX:%r.x]]
+; LINUX-64-STATIC: movl    [[EAX]], 64([[RCX]],%rdi,4)
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: off05:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	movl	dsrc+64(,%eax,4), %ecx
-; LINUX-32-STATIC-NEXT: 	movl	dptr, %edx
-; LINUX-32-STATIC-NEXT: 	movl	%ecx, 64(%edx,%eax,4)
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	dsrc+64(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	dptr, [[EDX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[ECX]], 64([[EDX]],[[EAX]],4)
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: off05:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	movl	dsrc+64(,%eax,4), %ecx
-; LINUX-32-PIC-NEXT: 	movl	dptr, %edx
-; LINUX-32-PIC-NEXT: 	movl	%ecx, 64(%edx,%eax,4)
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	dsrc+64(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	dptr, [[EDX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[ECX]], 64([[EDX]],[[EAX]],4)
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: off05:
-; LINUX-64-PIC: 	movq	dsrc at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	64(%rax,%rdi,4), %eax
-; LINUX-64-PIC-NEXT: 	movq	dptr at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movq	(%rcx), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, 64(%rcx,%rdi,4)
+; LINUX-64-PIC: 	movq	dsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	64([[RAX]],%rdi,4), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	dptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], 64([[RCX]],%rdi,4)
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _off05:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_dsrc+64(,%eax,4), %ecx
-; DARWIN-32-STATIC-NEXT: 	movl	_dptr, %edx
-; DARWIN-32-STATIC-NEXT: 	movl	%ecx, 64(%edx,%eax,4)
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_dsrc+64(,[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_dptr, [[EDX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[ECX]], 64([[EDX]],[[EAX]],4)
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _off05:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	_dsrc+64(,%eax,4), %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	_dptr, %edx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%ecx, 64(%edx,%eax,4)
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	_dsrc+64(,[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	_dptr, [[EDX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[ECX]], 64([[EDX]],[[EAX]],4)
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _off05:
 ; DARWIN-32-PIC: 	calll	L44$pb
 ; DARWIN-32-PIC-NEXT: L44$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	(_dsrc-L44$pb)+64(%eax,%ecx,4), %edx
-; DARWIN-32-PIC-NEXT: 	movl	_dptr-L44$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%edx, 64(%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	(_dsrc-L44$pb)+64([[EAX]],[[ECX]],4), [[EDX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	_dptr-L44$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[EDX]], 64([[EAX]],[[ECX]],4)
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _off05:
-; DARWIN-64-STATIC: 	leaq	_dsrc(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movl	64(%rax,%rdi,4), %eax
-; DARWIN-64-STATIC-NEXT: 	movq	_dptr(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, 64(%rcx,%rdi,4)
+; DARWIN-64-STATIC: 	leaq	_dsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	64([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_dptr(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], 64([[RCX]],%rdi,4)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _off05:
-; DARWIN-64-DYNAMIC: 	leaq	_dsrc(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	64(%rax,%rdi,4), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_dptr(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, 64(%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC: 	leaq	_dsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	64([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_dptr(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], 64([[RCX]],%rdi,4)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _off05:
-; DARWIN-64-PIC: 	leaq	_dsrc(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movl	64(%rax,%rdi,4), %eax
-; DARWIN-64-PIC-NEXT: 	movq	_dptr(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, 64(%rcx,%rdi,4)
+; DARWIN-64-PIC: 	leaq	_dsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	64([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_dptr(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], 64([[RCX]],%rdi,4)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -3303,69 +3314,69 @@
 	store i32 %2, i32* %3, align 4
 	ret void
 ; LINUX-64-STATIC: off06:
-; LINUX-64-STATIC: movl    lsrc+64(,%rdi,4), %eax
-; LINUX-64-STATIC: movl    %eax, ldst+64(,%rdi,4)
+; LINUX-64-STATIC: movl    lsrc+64(,%rdi,4), [[EAX:%e.x]]
+; LINUX-64-STATIC: movl    [[EAX]], ldst+64(,%rdi,4)
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: off06:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	movl	lsrc+64(,%eax,4), %ecx
-; LINUX-32-STATIC-NEXT: 	movl	%ecx, ldst+64(,%eax,4)
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	lsrc+64(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[ECX]], ldst+64(,[[EAX]],4)
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: off06:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	movl	lsrc+64(,%eax,4), %ecx
-; LINUX-32-PIC-NEXT: 	movl	%ecx, ldst+64(,%eax,4)
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	lsrc+64(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[ECX]], ldst+64(,[[EAX]],4)
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: off06:
-; LINUX-64-PIC: 	leaq	lsrc(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	64(%rax,%rdi,4), %eax
-; LINUX-64-PIC-NEXT: 	leaq	ldst(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, 64(%rcx,%rdi,4)
+; LINUX-64-PIC: 	leaq	lsrc(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	64([[RAX]],%rdi,4), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	leaq	ldst(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], 64([[RCX]],%rdi,4)
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _off06:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_lsrc+64(,%eax,4), %ecx
-; DARWIN-32-STATIC-NEXT: 	movl	%ecx, _ldst+64(,%eax,4)
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_lsrc+64(,[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[ECX]], _ldst+64(,[[EAX]],4)
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _off06:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	_lsrc+64(,%eax,4), %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%ecx, _ldst+64(,%eax,4)
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	_lsrc+64(,[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[ECX]], _ldst+64(,[[EAX]],4)
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _off06:
 ; DARWIN-32-PIC: 	calll	L45$pb
 ; DARWIN-32-PIC-NEXT: L45$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	(_lsrc-L45$pb)+64(%eax,%ecx,4), %edx
-; DARWIN-32-PIC-NEXT: 	movl	%edx, (_ldst-L45$pb)+64(%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	(_lsrc-L45$pb)+64([[EAX]],[[ECX]],4), [[EDX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[EDX]], (_ldst-L45$pb)+64([[EAX]],[[ECX]],4)
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _off06:
-; DARWIN-64-STATIC: 	leaq	_lsrc(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movl	64(%rax,%rdi,4), %eax
-; DARWIN-64-STATIC-NEXT: 	leaq	_ldst(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, 64(%rcx,%rdi,4)
+; DARWIN-64-STATIC: 	leaq	_lsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	64([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	_ldst(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], 64([[RCX]],%rdi,4)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _off06:
-; DARWIN-64-DYNAMIC: 	leaq	_lsrc(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	64(%rax,%rdi,4), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	_ldst(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, 64(%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC: 	leaq	_lsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	64([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	_ldst(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], 64([[RCX]],%rdi,4)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _off06:
-; DARWIN-64-PIC: 	leaq	_lsrc(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movl	64(%rax,%rdi,4), %eax
-; DARWIN-64-PIC-NEXT: 	leaq	_ldst(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, 64(%rcx,%rdi,4)
+; DARWIN-64-PIC: 	leaq	_lsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	64([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	_ldst(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], 64([[RCX]],%rdi,4)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -3376,65 +3387,65 @@
 	store i32* %0, i32** @lptr, align 8
 	ret void
 ; LINUX-64-STATIC: off07:
-; LINUX-64-STATIC: leaq    ldst+64(,%rdi,4), %rax
-; LINUX-64-STATIC: movq    %rax, lptr
+; LINUX-64-STATIC: leaq    ldst+64(,%rdi,4), [[RAX:%r.x]]
+; LINUX-64-STATIC: movq    [[RAX]], lptr
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: off07:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	leal	ldst+64(,%eax,4), %eax
-; LINUX-32-STATIC-NEXT: 	movl	%eax, lptr
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	leal	ldst+64(,[[EAX]],4), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[EAX]], lptr
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: off07:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	leal	ldst+64(,%eax,4), %eax
-; LINUX-32-PIC-NEXT: 	movl	%eax, lptr
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	leal	ldst+64(,[[EAX]],4), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[EAX]], lptr
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: off07:
-; LINUX-64-PIC: 	leaq	ldst(%rip), %rax
-; LINUX-64-PIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
-; LINUX-64-PIC-NEXT: 	movq	%rax, lptr(%rip)
+; LINUX-64-PIC: 	leaq	ldst(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	leaq	64([[RAX]],%rdi,4), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	[[RAX]], lptr(%rip)
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _off07:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	leal	_ldst+64(,%eax,4), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	%eax, _lptr
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	leal	_ldst+64(,[[EAX]],4), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[EAX]], _lptr
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _off07:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	leal	_ldst+64(,%eax,4), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, _lptr
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	leal	_ldst+64(,[[EAX]],4), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], _lptr
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _off07:
 ; DARWIN-32-PIC: 	calll	L46$pb
 ; DARWIN-32-PIC-NEXT: L46$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	leal	(_ldst-L46$pb)+64(%eax,%ecx,4), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, _lptr-L46$pb(%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	(_ldst-L46$pb)+64([[EAX]],[[ECX]],4), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], _lptr-L46$pb([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _off07:
-; DARWIN-64-STATIC: 	leaq	_ldst(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
-; DARWIN-64-STATIC-NEXT: 	movq	%rax, _lptr(%rip)
+; DARWIN-64-STATIC: 	leaq	_ldst(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	64([[RAX]],%rdi,4), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	[[RAX]], _lptr(%rip)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _off07:
-; DARWIN-64-DYNAMIC: 	leaq	_ldst(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	%rax, _lptr(%rip)
+; DARWIN-64-DYNAMIC: 	leaq	_ldst(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	64([[RAX]],%rdi,4), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	[[RAX]], _lptr(%rip)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _off07:
-; DARWIN-64-PIC: 	leaq	_ldst(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
-; DARWIN-64-PIC-NEXT: 	movq	%rax, _lptr(%rip)
+; DARWIN-64-PIC: 	leaq	_ldst(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	64([[RAX]],%rdi,4), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	[[RAX]], _lptr(%rip)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -3448,75 +3459,75 @@
 	store i32 %3, i32* %4, align 4
 	ret void
 ; LINUX-64-STATIC: off08:
-; LINUX-64-STATIC: movl    lsrc+64(,%rdi,4), %eax
-; LINUX-64-STATIC: movq    lptr(%rip), %rcx
-; LINUX-64-STATIC: movl    %eax, 64(%rcx,%rdi,4)
+; LINUX-64-STATIC: movl    lsrc+64(,%rdi,4), [[EAX:%e.x]]
+; LINUX-64-STATIC: movq    lptr(%rip), [[RCX:%r.x]]
+; LINUX-64-STATIC: movl    [[EAX]], 64([[RCX]],%rdi,4)
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: off08:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	movl	lsrc+64(,%eax,4), %ecx
-; LINUX-32-STATIC-NEXT: 	movl	lptr, %edx
-; LINUX-32-STATIC-NEXT: 	movl	%ecx, 64(%edx,%eax,4)
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	lsrc+64(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	lptr, [[EDX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[ECX]], 64([[EDX]],[[EAX]],4)
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: off08:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	movl	lsrc+64(,%eax,4), %ecx
-; LINUX-32-PIC-NEXT: 	movl	lptr, %edx
-; LINUX-32-PIC-NEXT: 	movl	%ecx, 64(%edx,%eax,4)
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	lsrc+64(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	lptr, [[EDX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[ECX]], 64([[EDX]],[[EAX]],4)
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: off08:
-; LINUX-64-PIC: 	leaq	lsrc(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	64(%rax,%rdi,4), %eax
-; LINUX-64-PIC-NEXT: 	movq	lptr(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, 64(%rcx,%rdi,4)
+; LINUX-64-PIC: 	leaq	lsrc(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	64([[RAX]],%rdi,4), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	lptr(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], 64([[RCX]],%rdi,4)
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _off08:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_lsrc+64(,%eax,4), %ecx
-; DARWIN-32-STATIC-NEXT: 	movl	_lptr, %edx
-; DARWIN-32-STATIC-NEXT: 	movl	%ecx, 64(%edx,%eax,4)
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_lsrc+64(,[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_lptr, [[EDX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[ECX]], 64([[EDX]],[[EAX]],4)
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _off08:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	_lsrc+64(,%eax,4), %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	_lptr, %edx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%ecx, 64(%edx,%eax,4)
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	_lsrc+64(,[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	_lptr, [[EDX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[ECX]], 64([[EDX]],[[EAX]],4)
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _off08:
 ; DARWIN-32-PIC: 	calll	L47$pb
 ; DARWIN-32-PIC-NEXT: L47$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	(_lsrc-L47$pb)+64(%eax,%ecx,4), %edx
-; DARWIN-32-PIC-NEXT: 	movl	_lptr-L47$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%edx, 64(%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	(_lsrc-L47$pb)+64([[EAX]],[[ECX]],4), [[EDX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	_lptr-L47$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[EDX]], 64([[EAX]],[[ECX]],4)
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _off08:
-; DARWIN-64-STATIC: 	leaq	_lsrc(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movl	64(%rax,%rdi,4), %eax
-; DARWIN-64-STATIC-NEXT: 	movq	_lptr(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, 64(%rcx,%rdi,4)
+; DARWIN-64-STATIC: 	leaq	_lsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	64([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_lptr(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], 64([[RCX]],%rdi,4)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _off08:
-; DARWIN-64-DYNAMIC: 	leaq	_lsrc(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	64(%rax,%rdi,4), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_lptr(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, 64(%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC: 	leaq	_lsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	64([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_lptr(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], 64([[RCX]],%rdi,4)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _off08:
-; DARWIN-64-PIC: 	leaq	_lsrc(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movl	64(%rax,%rdi,4), %eax
-; DARWIN-64-PIC-NEXT: 	movq	_lptr(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, 64(%rcx,%rdi,4)
+; DARWIN-64-PIC: 	leaq	_lsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	64([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_lptr(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], 64([[RCX]],%rdi,4)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -3526,68 +3537,68 @@
 	store i32 %0, i32* getelementptr ([131072 x i32]* @dst, i32 0, i64 65536), align 4
 	ret void
 ; LINUX-64-STATIC: moo00:
-; LINUX-64-STATIC: movl    src+262144(%rip), %eax
-; LINUX-64-STATIC: movl    %eax, dst+262144(%rip)
+; LINUX-64-STATIC: movl    src+262144(%rip), [[EAX:%e.x]]
+; LINUX-64-STATIC: movl    [[EAX]], dst+262144(%rip)
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: moo00:
-; LINUX-32-STATIC: 	movl	src+262144, %eax
-; LINUX-32-STATIC-NEXT: 	movl	%eax, dst+262144
+; LINUX-32-STATIC: 	movl	src+262144, [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[EAX]], dst+262144
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: moo00:
-; LINUX-32-PIC: 	movl	src+262144, %eax
-; LINUX-32-PIC-NEXT: 	movl	%eax, dst+262144
+; LINUX-32-PIC: 	movl	src+262144, [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[EAX]], dst+262144
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: moo00:
-; LINUX-64-PIC: 	movq	src at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	262144(%rax), %eax
-; LINUX-64-PIC-NEXT: 	movq	dst at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, 262144(%rcx)
+; LINUX-64-PIC: 	movq	src at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	262144([[RAX]]), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	dst at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], 262144([[RCX]])
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _moo00:
-; DARWIN-32-STATIC: 	movl	_src+262144, %eax
-; DARWIN-32-STATIC-NEXT: 	movl	%eax, _dst+262144
+; DARWIN-32-STATIC: 	movl	_src+262144, [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[EAX]], _dst+262144
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _moo00:
-; DARWIN-32-DYNAMIC: 	movl	L_src$non_lazy_ptr, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	262144(%eax), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_dst$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, 262144(%ecx)
+; DARWIN-32-DYNAMIC: 	movl	L_src$non_lazy_ptr, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	262144([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_dst$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], 262144([[ECX]])
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _moo00:
 ; DARWIN-32-PIC: 	calll	L48$pb
 ; DARWIN-32-PIC-NEXT: L48$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	L_src$non_lazy_ptr-L48$pb(%eax), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	262144(%ecx), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_dst$non_lazy_ptr-L48$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, 262144(%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_src$non_lazy_ptr-L48$pb([[EAX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	262144([[ECX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_dst$non_lazy_ptr-L48$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], 262144([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _moo00:
-; DARWIN-64-STATIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movl	262144(%rax), %eax
-; DARWIN-64-STATIC-NEXT: 	movq	_dst at GOTPCREL(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, 262144(%rcx)
+; DARWIN-64-STATIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	262144([[RAX]]), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_dst at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], 262144([[RCX]])
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _moo00:
-; DARWIN-64-DYNAMIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	262144(%rax), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_dst at GOTPCREL(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, 262144(%rcx)
+; DARWIN-64-DYNAMIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	262144([[RAX]]), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_dst at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], 262144([[RCX]])
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _moo00:
-; DARWIN-64-PIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movl	262144(%rax), %eax
-; DARWIN-64-PIC-NEXT: 	movq	_dst at GOTPCREL(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, 262144(%rcx)
+; DARWIN-64-PIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	262144([[RAX]]), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_dst at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], 262144([[RCX]])
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -3608,10 +3619,10 @@
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: moo01:
-; LINUX-64-PIC: 	movl	$262144, %eax
-; LINUX-64-PIC-NEXT: 	addq	dst at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movq	%rax, (%rcx)
+; LINUX-64-PIC: 	movl	$262144, [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	addq	dst at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _moo01:
@@ -3619,41 +3630,41 @@
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _moo01:
-; DARWIN-32-DYNAMIC: 	movl	$262144, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	addl	L_dst$non_lazy_ptr, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, (%ecx)
+; DARWIN-32-DYNAMIC: 	movl	$262144, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	addl	L_dst$non_lazy_ptr, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], ([[ECX]])
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _moo01:
 ; DARWIN-32-PIC: 	calll	L49$pb
 ; DARWIN-32-PIC-NEXT: L49$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	$262144, %ecx
-; DARWIN-32-PIC-NEXT: 	addl	L_dst$non_lazy_ptr-L49$pb(%eax), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L49$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, (%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	$262144, [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	addl	L_dst$non_lazy_ptr-L49$pb([[EAX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L49$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], ([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _moo01:
-; DARWIN-64-STATIC: 	movl	$262144, %eax
-; DARWIN-64-STATIC-NEXT: 	addq	_dst at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movq	%rax, (%rcx)
+; DARWIN-64-STATIC: 	movl	$262144, [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	addq	_dst at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _moo01:
-; DARWIN-64-DYNAMIC: 	movl	$262144, %eax
-; DARWIN-64-DYNAMIC-NEXT: 	addq	_dst at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movq	%rax, (%rcx)
+; DARWIN-64-DYNAMIC: 	movl	$262144, [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	addq	_dst at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _moo01:
-; DARWIN-64-PIC: 	movl	$262144, %eax
-; DARWIN-64-PIC-NEXT: 	addq	_dst at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movq	%rax, (%rcx)
+; DARWIN-64-PIC: 	movl	$262144, [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	addq	_dst at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -3665,78 +3676,78 @@
 	store i32 %1, i32* %2, align 4
 	ret void
 ; LINUX-64-STATIC: moo02:
-; LINUX-64-STATIC: movl    src+262144(%rip), %eax
-; LINUX-64-STATIC: movq    ptr(%rip), %rcx
-; LINUX-64-STATIC: movl    %eax, 262144(%rcx)
+; LINUX-64-STATIC: movl    src+262144(%rip), [[EAX:%e.x]]
+; LINUX-64-STATIC: movq    ptr(%rip), [[RCX:%r.x]]
+; LINUX-64-STATIC: movl    [[EAX]], 262144([[RCX]])
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: moo02:
-; LINUX-32-STATIC: 	movl	src+262144, %eax
-; LINUX-32-STATIC-NEXT: 	movl	ptr, %ecx
-; LINUX-32-STATIC-NEXT: 	movl	%eax, 262144(%ecx)
+; LINUX-32-STATIC: 	movl	src+262144, [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	ptr, [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[EAX]], 262144([[ECX]])
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: moo02:
-; LINUX-32-PIC: 	movl	src+262144, %eax
-; LINUX-32-PIC-NEXT: 	movl	ptr, %ecx
-; LINUX-32-PIC-NEXT: 	movl	%eax, 262144(%ecx)
+; LINUX-32-PIC: 	movl	src+262144, [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	ptr, [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[EAX]], 262144([[ECX]])
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: moo02:
-; LINUX-64-PIC: 	movq	src at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	262144(%rax), %eax
-; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movq	(%rcx), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, 262144(%rcx)
+; LINUX-64-PIC: 	movq	src at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	262144([[RAX]]), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], 262144([[RCX]])
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _moo02:
-; DARWIN-32-STATIC: 	movl	_src+262144, %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_ptr, %ecx
-; DARWIN-32-STATIC-NEXT: 	movl	%eax, 262144(%ecx)
+; DARWIN-32-STATIC: 	movl	_src+262144, [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_ptr, [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[EAX]], 262144([[ECX]])
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _moo02:
-; DARWIN-32-DYNAMIC: 	movl	L_src$non_lazy_ptr, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	262144(%eax), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	(%ecx), %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, 262144(%ecx)
+; DARWIN-32-DYNAMIC: 	movl	L_src$non_lazy_ptr, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	262144([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	([[ECX]]), [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], 262144([[ECX]])
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _moo02:
 ; DARWIN-32-PIC: 	calll	L50$pb
 ; DARWIN-32-PIC-NEXT: L50$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	L_src$non_lazy_ptr-L50$pb(%eax), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	262144(%ecx), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L50$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, 262144(%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_src$non_lazy_ptr-L50$pb([[EAX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	262144([[ECX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L50$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], 262144([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _moo02:
-; DARWIN-64-STATIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movl	262144(%rax), %eax
-; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movq	(%rcx), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, 262144(%rcx)
+; DARWIN-64-STATIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	262144([[RAX]]), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], 262144([[RCX]])
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _moo02:
-; DARWIN-64-DYNAMIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	262144(%rax), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movq	(%rcx), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, 262144(%rcx)
+; DARWIN-64-DYNAMIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	262144([[RAX]]), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], 262144([[RCX]])
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _moo02:
-; DARWIN-64-PIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movl	262144(%rax), %eax
-; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movq	(%rcx), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, 262144(%rcx)
+; DARWIN-64-PIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	262144([[RAX]]), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], 262144([[RCX]])
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -3746,58 +3757,58 @@
 	store i32 %0, i32* getelementptr ([131072 x i32]* @ddst, i32 0, i64 65536), align 32
 	ret void
 ; LINUX-64-STATIC: moo03:
-; LINUX-64-STATIC: movl    dsrc+262144(%rip), %eax
-; LINUX-64-STATIC: movl    %eax, ddst+262144(%rip)
+; LINUX-64-STATIC: movl    dsrc+262144(%rip), [[EAX:%e.x]]
+; LINUX-64-STATIC: movl    [[EAX]], ddst+262144(%rip)
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: moo03:
-; LINUX-32-STATIC: 	movl	dsrc+262144, %eax
-; LINUX-32-STATIC-NEXT: 	movl	%eax, ddst+262144
+; LINUX-32-STATIC: 	movl	dsrc+262144, [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[EAX]], ddst+262144
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: moo03:
-; LINUX-32-PIC: 	movl	dsrc+262144, %eax
-; LINUX-32-PIC-NEXT: 	movl	%eax, ddst+262144
+; LINUX-32-PIC: 	movl	dsrc+262144, [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[EAX]], ddst+262144
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: moo03:
-; LINUX-64-PIC: 	movq	dsrc at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	262144(%rax), %eax
-; LINUX-64-PIC-NEXT: 	movq	ddst at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, 262144(%rcx)
+; LINUX-64-PIC: 	movq	dsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	262144([[RAX]]), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	ddst at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], 262144([[RCX]])
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _moo03:
-; DARWIN-32-STATIC: 	movl	_dsrc+262144, %eax
-; DARWIN-32-STATIC-NEXT: 	movl	%eax, _ddst+262144
+; DARWIN-32-STATIC: 	movl	_dsrc+262144, [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[EAX]], _ddst+262144
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _moo03:
-; DARWIN-32-DYNAMIC: 	movl	_dsrc+262144, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, _ddst+262144
+; DARWIN-32-DYNAMIC: 	movl	_dsrc+262144, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], _ddst+262144
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _moo03:
 ; DARWIN-32-PIC: 	calll	L51$pb
 ; DARWIN-32-PIC-NEXT: L51$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	(_dsrc-L51$pb)+262144(%eax), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, (_ddst-L51$pb)+262144(%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	(_dsrc-L51$pb)+262144([[EAX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], (_ddst-L51$pb)+262144([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _moo03:
-; DARWIN-64-STATIC: 	movl	_dsrc+262144(%rip), %eax
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, _ddst+262144(%rip)
+; DARWIN-64-STATIC: 	movl	_dsrc+262144(%rip), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], _ddst+262144(%rip)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _moo03:
-; DARWIN-64-DYNAMIC: 	movl	_dsrc+262144(%rip), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, _ddst+262144(%rip)
+; DARWIN-64-DYNAMIC: 	movl	_dsrc+262144(%rip), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], _ddst+262144(%rip)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _moo03:
-; DARWIN-64-PIC: 	movl	_dsrc+262144(%rip), %eax
-; DARWIN-64-PIC-NEXT: 	movl	%eax, _ddst+262144(%rip)
+; DARWIN-64-PIC: 	movl	_dsrc+262144(%rip), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], _ddst+262144(%rip)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -3818,10 +3829,10 @@
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: moo04:
-; LINUX-64-PIC: 	movl	$262144, %eax
-; LINUX-64-PIC-NEXT: 	addq	ddst at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movq	dptr at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movq	%rax, (%rcx)
+; LINUX-64-PIC: 	movl	$262144, [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	addq	ddst at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	dptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _moo04:
@@ -3835,24 +3846,24 @@
 ; DARWIN-32-PIC: _moo04:
 ; DARWIN-32-PIC: 	calll	L52$pb
 ; DARWIN-32-PIC-NEXT: L52$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	leal	(_ddst-L52$pb)+262144(%eax), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, _dptr-L52$pb(%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	(_ddst-L52$pb)+262144([[EAX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], _dptr-L52$pb([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _moo04:
-; DARWIN-64-STATIC: 	leaq	_ddst+262144(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movq	%rax, _dptr(%rip)
+; DARWIN-64-STATIC: 	leaq	_ddst+262144(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	[[RAX]], _dptr(%rip)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _moo04:
-; DARWIN-64-DYNAMIC: 	leaq	_ddst+262144(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	%rax, _dptr(%rip)
+; DARWIN-64-DYNAMIC: 	leaq	_ddst+262144(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	[[RAX]], _dptr(%rip)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _moo04:
-; DARWIN-64-PIC: 	leaq	_ddst+262144(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movq	%rax, _dptr(%rip)
+; DARWIN-64-PIC: 	leaq	_ddst+262144(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	[[RAX]], _dptr(%rip)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -3864,68 +3875,68 @@
 	store i32 %1, i32* %2, align 4
 	ret void
 ; LINUX-64-STATIC: moo05:
-; LINUX-64-STATIC: movl    dsrc+262144(%rip), %eax
-; LINUX-64-STATIC: movq    dptr(%rip), %rcx
-; LINUX-64-STATIC: movl    %eax, 262144(%rcx)
+; LINUX-64-STATIC: movl    dsrc+262144(%rip), [[EAX:%e.x]]
+; LINUX-64-STATIC: movq    dptr(%rip), [[RCX:%r.x]]
+; LINUX-64-STATIC: movl    [[EAX]], 262144([[RCX]])
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: moo05:
-; LINUX-32-STATIC: 	movl	dsrc+262144, %eax
-; LINUX-32-STATIC-NEXT: 	movl	dptr, %ecx
-; LINUX-32-STATIC-NEXT: 	movl	%eax, 262144(%ecx)
+; LINUX-32-STATIC: 	movl	dsrc+262144, [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	dptr, [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[EAX]], 262144([[ECX]])
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: moo05:
-; LINUX-32-PIC: 	movl	dsrc+262144, %eax
-; LINUX-32-PIC-NEXT: 	movl	dptr, %ecx
-; LINUX-32-PIC-NEXT: 	movl	%eax, 262144(%ecx)
+; LINUX-32-PIC: 	movl	dsrc+262144, [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	dptr, [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[EAX]], 262144([[ECX]])
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: moo05:
-; LINUX-64-PIC: 	movq	dsrc at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	262144(%rax), %eax
-; LINUX-64-PIC-NEXT: 	movq	dptr at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movq	(%rcx), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, 262144(%rcx)
+; LINUX-64-PIC: 	movq	dsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	262144([[RAX]]), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	dptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], 262144([[RCX]])
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _moo05:
-; DARWIN-32-STATIC: 	movl	_dsrc+262144, %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_dptr, %ecx
-; DARWIN-32-STATIC-NEXT: 	movl	%eax, 262144(%ecx)
+; DARWIN-32-STATIC: 	movl	_dsrc+262144, [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_dptr, [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[EAX]], 262144([[ECX]])
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _moo05:
-; DARWIN-32-DYNAMIC: 	movl	_dsrc+262144, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	_dptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, 262144(%ecx)
+; DARWIN-32-DYNAMIC: 	movl	_dsrc+262144, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	_dptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], 262144([[ECX]])
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _moo05:
 ; DARWIN-32-PIC: 	calll	L53$pb
 ; DARWIN-32-PIC-NEXT: L53$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	(_dsrc-L53$pb)+262144(%eax), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	_dptr-L53$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, 262144(%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	(_dsrc-L53$pb)+262144([[EAX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	_dptr-L53$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], 262144([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _moo05:
-; DARWIN-64-STATIC: 	movl	_dsrc+262144(%rip), %eax
-; DARWIN-64-STATIC-NEXT: 	movq	_dptr(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, 262144(%rcx)
+; DARWIN-64-STATIC: 	movl	_dsrc+262144(%rip), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_dptr(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], 262144([[RCX]])
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _moo05:
-; DARWIN-64-DYNAMIC: 	movl	_dsrc+262144(%rip), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_dptr(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, 262144(%rcx)
+; DARWIN-64-DYNAMIC: 	movl	_dsrc+262144(%rip), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_dptr(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], 262144([[RCX]])
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _moo05:
-; DARWIN-64-PIC: 	movl	_dsrc+262144(%rip), %eax
-; DARWIN-64-PIC-NEXT: 	movq	_dptr(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, 262144(%rcx)
+; DARWIN-64-PIC: 	movl	_dsrc+262144(%rip), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_dptr(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], 262144([[RCX]])
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -3935,56 +3946,56 @@
 	store i32 %0, i32* getelementptr ([131072 x i32]* @ldst, i32 0, i64 65536), align 4
 	ret void
 ; LINUX-64-STATIC: moo06:
-; LINUX-64-STATIC: movl    lsrc+262144(%rip), %eax
-; LINUX-64-STATIC: movl    %eax, ldst+262144(%rip)
+; LINUX-64-STATIC: movl    lsrc+262144(%rip), [[EAX:%e.x]]
+; LINUX-64-STATIC: movl    [[EAX]], ldst+262144(%rip)
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: moo06:
-; LINUX-32-STATIC: 	movl	lsrc+262144, %eax
-; LINUX-32-STATIC-NEXT: 	movl	%eax, ldst+262144
+; LINUX-32-STATIC: 	movl	lsrc+262144, [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[EAX]], ldst+262144
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: moo06:
-; LINUX-32-PIC: 	movl	lsrc+262144, %eax
-; LINUX-32-PIC-NEXT: 	movl	%eax, ldst+262144
+; LINUX-32-PIC: 	movl	lsrc+262144, [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[EAX]], ldst+262144
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: moo06:
-; LINUX-64-PIC: 	movl	lsrc+262144(%rip), %eax
-; LINUX-64-PIC-NEXT: 	movl	%eax, ldst+262144(%rip)
+; LINUX-64-PIC: 	movl	lsrc+262144(%rip), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], ldst+262144(%rip)
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _moo06:
-; DARWIN-32-STATIC: 	movl	_lsrc+262144, %eax
-; DARWIN-32-STATIC-NEXT: 	movl	%eax, _ldst+262144
+; DARWIN-32-STATIC: 	movl	_lsrc+262144, [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[EAX]], _ldst+262144
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _moo06:
-; DARWIN-32-DYNAMIC: 	movl	_lsrc+262144, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, _ldst+262144
+; DARWIN-32-DYNAMIC: 	movl	_lsrc+262144, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], _ldst+262144
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _moo06:
 ; DARWIN-32-PIC: 	calll	L54$pb
 ; DARWIN-32-PIC-NEXT: L54$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	(_lsrc-L54$pb)+262144(%eax), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, (_ldst-L54$pb)+262144(%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	(_lsrc-L54$pb)+262144([[EAX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], (_ldst-L54$pb)+262144([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _moo06:
-; DARWIN-64-STATIC: 	movl	_lsrc+262144(%rip), %eax
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, _ldst+262144(%rip)
+; DARWIN-64-STATIC: 	movl	_lsrc+262144(%rip), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], _ldst+262144(%rip)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _moo06:
-; DARWIN-64-DYNAMIC: 	movl	_lsrc+262144(%rip), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, _ldst+262144(%rip)
+; DARWIN-64-DYNAMIC: 	movl	_lsrc+262144(%rip), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], _ldst+262144(%rip)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _moo06:
-; DARWIN-64-PIC: 	movl	_lsrc+262144(%rip), %eax
-; DARWIN-64-PIC-NEXT: 	movl	%eax, _ldst+262144(%rip)
+; DARWIN-64-PIC: 	movl	_lsrc+262144(%rip), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], _ldst+262144(%rip)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -4005,8 +4016,8 @@
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: moo07:
-; LINUX-64-PIC: 	leaq	ldst+262144(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movq	%rax, lptr(%rip)
+; LINUX-64-PIC: 	leaq	ldst+262144(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	[[RAX]], lptr(%rip)
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _moo07:
@@ -4020,24 +4031,24 @@
 ; DARWIN-32-PIC: _moo07:
 ; DARWIN-32-PIC: 	calll	L55$pb
 ; DARWIN-32-PIC-NEXT: L55$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	leal	(_ldst-L55$pb)+262144(%eax), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, _lptr-L55$pb(%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	(_ldst-L55$pb)+262144([[EAX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], _lptr-L55$pb([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _moo07:
-; DARWIN-64-STATIC: 	leaq	_ldst+262144(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movq	%rax, _lptr(%rip)
+; DARWIN-64-STATIC: 	leaq	_ldst+262144(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	[[RAX]], _lptr(%rip)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _moo07:
-; DARWIN-64-DYNAMIC: 	leaq	_ldst+262144(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	%rax, _lptr(%rip)
+; DARWIN-64-DYNAMIC: 	leaq	_ldst+262144(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	[[RAX]], _lptr(%rip)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _moo07:
-; DARWIN-64-PIC: 	leaq	_ldst+262144(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movq	%rax, _lptr(%rip)
+; DARWIN-64-PIC: 	leaq	_ldst+262144(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	[[RAX]], _lptr(%rip)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -4049,66 +4060,66 @@
 	store i32 %1, i32* %2, align 4
 	ret void
 ; LINUX-64-STATIC: moo08:
-; LINUX-64-STATIC: movl    lsrc+262144(%rip), %eax
-; LINUX-64-STATIC: movq    lptr(%rip), %rcx
-; LINUX-64-STATIC: movl    %eax, 262144(%rcx)
+; LINUX-64-STATIC: movl    lsrc+262144(%rip), [[EAX:%e.x]]
+; LINUX-64-STATIC: movq    lptr(%rip), [[RCX:%r.x]]
+; LINUX-64-STATIC: movl    [[EAX]], 262144([[RCX]])
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: moo08:
-; LINUX-32-STATIC: 	movl	lsrc+262144, %eax
-; LINUX-32-STATIC-NEXT: 	movl	lptr, %ecx
-; LINUX-32-STATIC-NEXT: 	movl	%eax, 262144(%ecx)
+; LINUX-32-STATIC: 	movl	lsrc+262144, [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	lptr, [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[EAX]], 262144([[ECX]])
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: moo08:
-; LINUX-32-PIC: 	movl	lsrc+262144, %eax
-; LINUX-32-PIC-NEXT: 	movl	lptr, %ecx
-; LINUX-32-PIC-NEXT: 	movl	%eax, 262144(%ecx)
+; LINUX-32-PIC: 	movl	lsrc+262144, [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	lptr, [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[EAX]], 262144([[ECX]])
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: moo08:
-; LINUX-64-PIC: 	movl	lsrc+262144(%rip), %eax
-; LINUX-64-PIC-NEXT: 	movq	lptr(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, 262144(%rcx)
+; LINUX-64-PIC: 	movl	lsrc+262144(%rip), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	lptr(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], 262144([[RCX]])
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _moo08:
-; DARWIN-32-STATIC: 	movl	_lsrc+262144, %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_lptr, %ecx
-; DARWIN-32-STATIC-NEXT: 	movl	%eax, 262144(%ecx)
+; DARWIN-32-STATIC: 	movl	_lsrc+262144, [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_lptr, [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[EAX]], 262144([[ECX]])
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _moo08:
-; DARWIN-32-DYNAMIC: 	movl	_lsrc+262144, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	_lptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, 262144(%ecx)
+; DARWIN-32-DYNAMIC: 	movl	_lsrc+262144, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	_lptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], 262144([[ECX]])
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _moo08:
 ; DARWIN-32-PIC: 	calll	L56$pb
 ; DARWIN-32-PIC-NEXT: L56$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	(_lsrc-L56$pb)+262144(%eax), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	_lptr-L56$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, 262144(%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	(_lsrc-L56$pb)+262144([[EAX]]), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	_lptr-L56$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], 262144([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _moo08:
-; DARWIN-64-STATIC: 	movl	_lsrc+262144(%rip), %eax
-; DARWIN-64-STATIC-NEXT: 	movq	_lptr(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, 262144(%rcx)
+; DARWIN-64-STATIC: 	movl	_lsrc+262144(%rip), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_lptr(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], 262144([[RCX]])
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _moo08:
-; DARWIN-64-DYNAMIC: 	movl	_lsrc+262144(%rip), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_lptr(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, 262144(%rcx)
+; DARWIN-64-DYNAMIC: 	movl	_lsrc+262144(%rip), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_lptr(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], 262144([[RCX]])
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _moo08:
-; DARWIN-64-PIC: 	movl	_lsrc+262144(%rip), %eax
-; DARWIN-64-PIC-NEXT: 	movq	_lptr(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, 262144(%rcx)
+; DARWIN-64-PIC: 	movl	_lsrc+262144(%rip), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_lptr(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], 262144([[RCX]])
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -4121,73 +4132,73 @@
 	store i32 %2, i32* %3, align 4
 	ret void
 ; LINUX-64-STATIC: big00:
-; LINUX-64-STATIC: movl    src+262144(,%rdi,4), %eax
-; LINUX-64-STATIC: movl    %eax, dst+262144(,%rdi,4)
+; LINUX-64-STATIC: movl    src+262144(,%rdi,4), [[EAX:%e.x]]
+; LINUX-64-STATIC: movl    [[EAX]], dst+262144(,%rdi,4)
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: big00:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	movl	src+262144(,%eax,4), %ecx
-; LINUX-32-STATIC-NEXT: 	movl	%ecx, dst+262144(,%eax,4)
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	src+262144(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[ECX]], dst+262144(,[[EAX]],4)
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: big00:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	movl	src+262144(,%eax,4), %ecx
-; LINUX-32-PIC-NEXT: 	movl	%ecx, dst+262144(,%eax,4)
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	src+262144(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[ECX]], dst+262144(,[[EAX]],4)
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: big00:
-; LINUX-64-PIC: 	movq	src at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	262144(%rax,%rdi,4), %eax
-; LINUX-64-PIC-NEXT: 	movq	dst at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, 262144(%rcx,%rdi,4)
+; LINUX-64-PIC: 	movq	src at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	262144([[RAX]],%rdi,4), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	dst at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], 262144([[RCX]],%rdi,4)
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _big00:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_src+262144(,%eax,4), %ecx
-; DARWIN-32-STATIC-NEXT: 	movl	%ecx, _dst+262144(,%eax,4)
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_src+262144(,[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[ECX]], _dst+262144(,[[EAX]],4)
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _big00:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_src$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	262144(%ecx,%eax,4), %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_dst$non_lazy_ptr, %edx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%ecx, 262144(%edx,%eax,4)
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_src$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	262144([[ECX]],[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_dst$non_lazy_ptr, [[EDX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[ECX]], 262144([[EDX]],[[EAX]],4)
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _big00:
 ; DARWIN-32-PIC: 	calll	L57$pb
 ; DARWIN-32-PIC-NEXT: L57$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_src$non_lazy_ptr-L57$pb(%eax), %edx
-; DARWIN-32-PIC-NEXT: 	movl	262144(%edx,%ecx,4), %edx
-; DARWIN-32-PIC-NEXT: 	movl	L_dst$non_lazy_ptr-L57$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%edx, 262144(%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_src$non_lazy_ptr-L57$pb([[EAX]]), [[EDX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	262144([[EDX]],[[ECX]],4), [[EDX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_dst$non_lazy_ptr-L57$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[EDX]], 262144([[EAX]],[[ECX]],4)
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _big00:
-; DARWIN-64-STATIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movl	262144(%rax,%rdi,4), %eax
-; DARWIN-64-STATIC-NEXT: 	movq	_dst at GOTPCREL(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, 262144(%rcx,%rdi,4)
+; DARWIN-64-STATIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	262144([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_dst at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], 262144([[RCX]],%rdi,4)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _big00:
-; DARWIN-64-DYNAMIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	262144(%rax,%rdi,4), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_dst at GOTPCREL(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, 262144(%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	262144([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_dst at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], 262144([[RCX]],%rdi,4)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _big00:
-; DARWIN-64-PIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movl	262144(%rax,%rdi,4), %eax
-; DARWIN-64-PIC-NEXT: 	movq	_dst at GOTPCREL(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, 262144(%rcx,%rdi,4)
+; DARWIN-64-PIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	262144([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_dst at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], 262144([[RCX]],%rdi,4)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -4198,73 +4209,73 @@
 	store i32* %0, i32** @ptr, align 8
 	ret void
 ; LINUX-64-STATIC: big01:
-; LINUX-64-STATIC: leaq    dst+262144(,%rdi,4), %rax
-; LINUX-64-STATIC: movq    %rax, ptr(%rip)
+; LINUX-64-STATIC: leaq    dst+262144(,%rdi,4), [[RAX:%r.x]]
+; LINUX-64-STATIC: movq    [[RAX]], ptr(%rip)
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: big01:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	leal	dst+262144(,%eax,4), %eax
-; LINUX-32-STATIC-NEXT: 	movl	%eax, ptr
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	leal	dst+262144(,[[EAX]],4), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[EAX]], ptr
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: big01:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	leal	dst+262144(,%eax,4), %eax
-; LINUX-32-PIC-NEXT: 	movl	%eax, ptr
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	leal	dst+262144(,[[EAX]],4), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[EAX]], ptr
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: big01:
-; LINUX-64-PIC: 	movq	dst at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
-; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movq	%rax, (%rcx)
+; LINUX-64-PIC: 	movq	dst at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _big01:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	leal	_dst+262144(,%eax,4), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	%eax, _ptr
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	leal	_dst+262144(,[[EAX]],4), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[EAX]], _ptr
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _big01:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_dst$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	leal	262144(%ecx,%eax,4), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, (%ecx)
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_dst$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	leal	262144([[ECX]],[[EAX]],4), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], ([[ECX]])
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _big01:
 ; DARWIN-32-PIC: 	calll	L58$pb
 ; DARWIN-32-PIC-NEXT: L58$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_dst$non_lazy_ptr-L58$pb(%eax), %edx
-; DARWIN-32-PIC-NEXT: 	leal	262144(%edx,%ecx,4), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L58$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, (%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_dst$non_lazy_ptr-L58$pb([[EAX]]), [[EDX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	262144([[EDX]],[[ECX]],4), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L58$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], ([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _big01:
-; DARWIN-64-STATIC: 	movq	_dst at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
-; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movq	%rax, (%rcx)
+; DARWIN-64-STATIC: 	movq	_dst at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _big01:
-; DARWIN-64-DYNAMIC: 	movq	_dst at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movq	%rax, (%rcx)
+; DARWIN-64-DYNAMIC: 	movq	_dst at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _big01:
-; DARWIN-64-PIC: 	movq	_dst at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
-; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movq	%rax, (%rcx)
+; DARWIN-64-PIC: 	movq	_dst at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -4278,83 +4289,83 @@
 	store i32 %3, i32* %4, align 4
 	ret void
 ; LINUX-64-STATIC: big02:
-; LINUX-64-STATIC: movl    src+262144(,%rdi,4), %eax
-; LINUX-64-STATIC: movq    ptr(%rip), %rcx
-; LINUX-64-STATIC: movl    %eax, 262144(%rcx,%rdi,4)
+; LINUX-64-STATIC: movl    src+262144(,%rdi,4), [[EAX:%e.x]]
+; LINUX-64-STATIC: movq    ptr(%rip), [[RCX:%r.x]]
+; LINUX-64-STATIC: movl    [[EAX]], 262144([[RCX]],%rdi,4)
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: big02:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	movl	src+262144(,%eax,4), %ecx
-; LINUX-32-STATIC-NEXT: 	movl	ptr, %edx
-; LINUX-32-STATIC-NEXT: 	movl	%ecx, 262144(%edx,%eax,4)
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	src+262144(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	ptr, [[EDX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[ECX]], 262144([[EDX]],[[EAX]],4)
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: big02:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	movl	src+262144(,%eax,4), %ecx
-; LINUX-32-PIC-NEXT: 	movl	ptr, %edx
-; LINUX-32-PIC-NEXT: 	movl	%ecx, 262144(%edx,%eax,4)
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	src+262144(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	ptr, [[EDX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[ECX]], 262144([[EDX]],[[EAX]],4)
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: big02:
-; LINUX-64-PIC: 	movq	src at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	262144(%rax,%rdi,4), %eax
-; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movq	(%rcx), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, 262144(%rcx,%rdi,4)
+; LINUX-64-PIC: 	movq	src at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	262144([[RAX]],%rdi,4), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], 262144([[RCX]],%rdi,4)
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _big02:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_src+262144(,%eax,4), %ecx
-; DARWIN-32-STATIC-NEXT: 	movl	_ptr, %edx
-; DARWIN-32-STATIC-NEXT: 	movl	%ecx, 262144(%edx,%eax,4)
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_src+262144(,[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_ptr, [[EDX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[ECX]], 262144([[EDX]],[[EAX]],4)
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _big02:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_src$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	262144(%ecx,%eax,4), %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, %edx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	(%edx), %edx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%ecx, 262144(%edx,%eax,4)
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_src$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	262144([[ECX]],[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_ptr$non_lazy_ptr, [[EDX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	([[EDX]]), [[EDX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[ECX]], 262144([[EDX]],[[EAX]],4)
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _big02:
 ; DARWIN-32-PIC: 	calll	L59$pb
 ; DARWIN-32-PIC-NEXT: L59$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_src$non_lazy_ptr-L59$pb(%eax), %edx
-; DARWIN-32-PIC-NEXT: 	movl	262144(%edx,%ecx,4), %edx
-; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L59$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%edx, 262144(%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_src$non_lazy_ptr-L59$pb([[EAX]]), [[EDX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	262144([[EDX]],[[ECX]],4), [[EDX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L59$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[EDX]], 262144([[EAX]],[[ECX]],4)
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _big02:
-; DARWIN-64-STATIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movl	262144(%rax,%rdi,4), %eax
-; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movq	(%rcx), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, 262144(%rcx,%rdi,4)
+; DARWIN-64-STATIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	262144([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], 262144([[RCX]],%rdi,4)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _big02:
-; DARWIN-64-DYNAMIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	262144(%rax,%rdi,4), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movq	(%rcx), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, 262144(%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	262144([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], 262144([[RCX]],%rdi,4)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _big02:
-; DARWIN-64-PIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movl	262144(%rax,%rdi,4), %eax
-; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movq	(%rcx), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, 262144(%rcx,%rdi,4)
+; DARWIN-64-PIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	262144([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], 262144([[RCX]],%rdi,4)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -4367,69 +4378,69 @@
 	store i32 %2, i32* %3, align 4
 	ret void
 ; LINUX-64-STATIC: big03:
-; LINUX-64-STATIC: movl    dsrc+262144(,%rdi,4), %eax
-; LINUX-64-STATIC: movl    %eax, ddst+262144(,%rdi,4)
+; LINUX-64-STATIC: movl    dsrc+262144(,%rdi,4), [[EAX:%e.x]]
+; LINUX-64-STATIC: movl    [[EAX]], ddst+262144(,%rdi,4)
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: big03:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	movl	dsrc+262144(,%eax,4), %ecx
-; LINUX-32-STATIC-NEXT: 	movl	%ecx, ddst+262144(,%eax,4)
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	dsrc+262144(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[ECX]], ddst+262144(,[[EAX]],4)
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: big03:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	movl	dsrc+262144(,%eax,4), %ecx
-; LINUX-32-PIC-NEXT: 	movl	%ecx, ddst+262144(,%eax,4)
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	dsrc+262144(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[ECX]], ddst+262144(,[[EAX]],4)
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: big03:
-; LINUX-64-PIC: 	movq	dsrc at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	262144(%rax,%rdi,4), %eax
-; LINUX-64-PIC-NEXT: 	movq	ddst at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, 262144(%rcx,%rdi,4)
+; LINUX-64-PIC: 	movq	dsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	262144([[RAX]],%rdi,4), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	ddst at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], 262144([[RCX]],%rdi,4)
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _big03:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_dsrc+262144(,%eax,4), %ecx
-; DARWIN-32-STATIC-NEXT: 	movl	%ecx, _ddst+262144(,%eax,4)
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_dsrc+262144(,[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[ECX]], _ddst+262144(,[[EAX]],4)
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _big03:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	_dsrc+262144(,%eax,4), %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%ecx, _ddst+262144(,%eax,4)
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	_dsrc+262144(,[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[ECX]], _ddst+262144(,[[EAX]],4)
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _big03:
 ; DARWIN-32-PIC: 	calll	L60$pb
 ; DARWIN-32-PIC-NEXT: L60$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	(_dsrc-L60$pb)+262144(%eax,%ecx,4), %edx
-; DARWIN-32-PIC-NEXT: 	movl	%edx, (_ddst-L60$pb)+262144(%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	(_dsrc-L60$pb)+262144([[EAX]],[[ECX]],4), [[EDX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[EDX]], (_ddst-L60$pb)+262144([[EAX]],[[ECX]],4)
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _big03:
-; DARWIN-64-STATIC: 	leaq	_dsrc(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movl	262144(%rax,%rdi,4), %eax
-; DARWIN-64-STATIC-NEXT: 	leaq	_ddst(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, 262144(%rcx,%rdi,4)
+; DARWIN-64-STATIC: 	leaq	_dsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	262144([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	_ddst(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], 262144([[RCX]],%rdi,4)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _big03:
-; DARWIN-64-DYNAMIC: 	leaq	_dsrc(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	262144(%rax,%rdi,4), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	_ddst(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, 262144(%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC: 	leaq	_dsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	262144([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	_ddst(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], 262144([[RCX]],%rdi,4)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _big03:
-; DARWIN-64-PIC: 	leaq	_dsrc(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movl	262144(%rax,%rdi,4), %eax
-; DARWIN-64-PIC-NEXT: 	leaq	_ddst(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, 262144(%rcx,%rdi,4)
+; DARWIN-64-PIC: 	leaq	_dsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	262144([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	_ddst(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], 262144([[RCX]],%rdi,4)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -4440,66 +4451,66 @@
 	store i32* %0, i32** @dptr, align 8
 	ret void
 ; LINUX-64-STATIC: big04:
-; LINUX-64-STATIC: leaq    ddst+262144(,%rdi,4), %rax
-; LINUX-64-STATIC: movq    %rax, dptr
+; LINUX-64-STATIC: leaq    ddst+262144(,%rdi,4), [[RAX:%r.x]]
+; LINUX-64-STATIC: movq    [[RAX]], dptr
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: big04:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	leal	ddst+262144(,%eax,4), %eax
-; LINUX-32-STATIC-NEXT: 	movl	%eax, dptr
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	leal	ddst+262144(,[[EAX]],4), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[EAX]], dptr
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: big04:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	leal	ddst+262144(,%eax,4), %eax
-; LINUX-32-PIC-NEXT: 	movl	%eax, dptr
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	leal	ddst+262144(,[[EAX]],4), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[EAX]], dptr
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: big04:
-; LINUX-64-PIC: 	movq	ddst at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
-; LINUX-64-PIC-NEXT: 	movq	dptr at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movq	%rax, (%rcx)
+; LINUX-64-PIC: 	movq	ddst at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	dptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	[[RAX]], ([[RCX]])
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _big04:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	leal	_ddst+262144(,%eax,4), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	%eax, _dptr
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	leal	_ddst+262144(,[[EAX]],4), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[EAX]], _dptr
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _big04:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	leal	_ddst+262144(,%eax,4), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, _dptr
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	leal	_ddst+262144(,[[EAX]],4), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], _dptr
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _big04:
 ; DARWIN-32-PIC: 	calll	L61$pb
 ; DARWIN-32-PIC-NEXT: L61$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	leal	(_ddst-L61$pb)+262144(%eax,%ecx,4), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, _dptr-L61$pb(%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	(_ddst-L61$pb)+262144([[EAX]],[[ECX]],4), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], _dptr-L61$pb([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _big04:
-; DARWIN-64-STATIC: 	leaq	_ddst(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
-; DARWIN-64-STATIC-NEXT: 	movq	%rax, _dptr(%rip)
+; DARWIN-64-STATIC: 	leaq	_ddst(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	[[RAX]], _dptr(%rip)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _big04:
-; DARWIN-64-DYNAMIC: 	leaq	_ddst(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	%rax, _dptr(%rip)
+; DARWIN-64-DYNAMIC: 	leaq	_ddst(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	[[RAX]], _dptr(%rip)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _big04:
-; DARWIN-64-PIC: 	leaq	_ddst(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
-; DARWIN-64-PIC-NEXT: 	movq	%rax, _dptr(%rip)
+; DARWIN-64-PIC: 	leaq	_ddst(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	[[RAX]], _dptr(%rip)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -4513,76 +4524,76 @@
 	store i32 %3, i32* %4, align 4
 	ret void
 ; LINUX-64-STATIC: big05:
-; LINUX-64-STATIC: movl    dsrc+262144(,%rdi,4), %eax
-; LINUX-64-STATIC: movq    dptr(%rip), %rcx
-; LINUX-64-STATIC: movl    %eax, 262144(%rcx,%rdi,4)
+; LINUX-64-STATIC: movl    dsrc+262144(,%rdi,4), [[EAX:%e.x]]
+; LINUX-64-STATIC: movq    dptr(%rip), [[RCX:%r.x]]
+; LINUX-64-STATIC: movl    [[EAX]], 262144([[RCX]],%rdi,4)
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: big05:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	movl	dsrc+262144(,%eax,4), %ecx
-; LINUX-32-STATIC-NEXT: 	movl	dptr, %edx
-; LINUX-32-STATIC-NEXT: 	movl	%ecx, 262144(%edx,%eax,4)
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	dsrc+262144(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	dptr, [[EDX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[ECX]], 262144([[EDX]],[[EAX]],4)
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: big05:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	movl	dsrc+262144(,%eax,4), %ecx
-; LINUX-32-PIC-NEXT: 	movl	dptr, %edx
-; LINUX-32-PIC-NEXT: 	movl	%ecx, 262144(%edx,%eax,4)
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	dsrc+262144(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	dptr, [[EDX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[ECX]], 262144([[EDX]],[[EAX]],4)
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: big05:
-; LINUX-64-PIC: 	movq	dsrc at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	262144(%rax,%rdi,4), %eax
-; LINUX-64-PIC-NEXT: 	movq	dptr at GOTPCREL(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movq	(%rcx), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, 262144(%rcx,%rdi,4)
+; LINUX-64-PIC: 	movq	dsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	262144([[RAX]],%rdi,4), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	dptr at GOTPCREL(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	([[RCX]]), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], 262144([[RCX]],%rdi,4)
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _big05:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_dsrc+262144(,%eax,4), %ecx
-; DARWIN-32-STATIC-NEXT: 	movl	_dptr, %edx
-; DARWIN-32-STATIC-NEXT: 	movl	%ecx, 262144(%edx,%eax,4)
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_dsrc+262144(,[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_dptr, [[EDX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[ECX]], 262144([[EDX]],[[EAX]],4)
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _big05:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	_dsrc+262144(,%eax,4), %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	_dptr, %edx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%ecx, 262144(%edx,%eax,4)
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	_dsrc+262144(,[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	_dptr, [[EDX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[ECX]], 262144([[EDX]],[[EAX]],4)
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _big05:
 ; DARWIN-32-PIC: 	calll	L62$pb
 ; DARWIN-32-PIC-NEXT: L62$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	(_dsrc-L62$pb)+262144(%eax,%ecx,4), %edx
-; DARWIN-32-PIC-NEXT: 	movl	_dptr-L62$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%edx, 262144(%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	(_dsrc-L62$pb)+262144([[EAX]],[[ECX]],4), [[EDX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	_dptr-L62$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[EDX]], 262144([[EAX]],[[ECX]],4)
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _big05:
-; DARWIN-64-STATIC: 	leaq	_dsrc(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movl	262144(%rax,%rdi,4), %eax
-; DARWIN-64-STATIC-NEXT: 	movq	_dptr(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, 262144(%rcx,%rdi,4)
+; DARWIN-64-STATIC: 	leaq	_dsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	262144([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_dptr(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], 262144([[RCX]],%rdi,4)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _big05:
-; DARWIN-64-DYNAMIC: 	leaq	_dsrc(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	262144(%rax,%rdi,4), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_dptr(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, 262144(%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC: 	leaq	_dsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	262144([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_dptr(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], 262144([[RCX]],%rdi,4)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _big05:
-; DARWIN-64-PIC: 	leaq	_dsrc(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movl	262144(%rax,%rdi,4), %eax
-; DARWIN-64-PIC-NEXT: 	movq	_dptr(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, 262144(%rcx,%rdi,4)
+; DARWIN-64-PIC: 	leaq	_dsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	262144([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_dptr(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], 262144([[RCX]],%rdi,4)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -4595,69 +4606,69 @@
 	store i32 %2, i32* %3, align 4
 	ret void
 ; LINUX-64-STATIC: big06:
-; LINUX-64-STATIC: movl    lsrc+262144(,%rdi,4), %eax
-; LINUX-64-STATIC: movl    %eax, ldst+262144(,%rdi,4)
+; LINUX-64-STATIC: movl    lsrc+262144(,%rdi,4), [[EAX:%e.x]]
+; LINUX-64-STATIC: movl    [[EAX]], ldst+262144(,%rdi,4)
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: big06:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	movl	lsrc+262144(,%eax,4), %ecx
-; LINUX-32-STATIC-NEXT: 	movl	%ecx, ldst+262144(,%eax,4)
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	lsrc+262144(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[ECX]], ldst+262144(,[[EAX]],4)
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: big06:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	movl	lsrc+262144(,%eax,4), %ecx
-; LINUX-32-PIC-NEXT: 	movl	%ecx, ldst+262144(,%eax,4)
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	lsrc+262144(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[ECX]], ldst+262144(,[[EAX]],4)
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: big06:
-; LINUX-64-PIC: 	leaq	lsrc(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	262144(%rax,%rdi,4), %eax
-; LINUX-64-PIC-NEXT: 	leaq	ldst(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, 262144(%rcx,%rdi,4)
+; LINUX-64-PIC: 	leaq	lsrc(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	262144([[RAX]],%rdi,4), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	leaq	ldst(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], 262144([[RCX]],%rdi,4)
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _big06:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_lsrc+262144(,%eax,4), %ecx
-; DARWIN-32-STATIC-NEXT: 	movl	%ecx, _ldst+262144(,%eax,4)
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_lsrc+262144(,[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[ECX]], _ldst+262144(,[[EAX]],4)
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _big06:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	_lsrc+262144(,%eax,4), %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%ecx, _ldst+262144(,%eax,4)
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	_lsrc+262144(,[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[ECX]], _ldst+262144(,[[EAX]],4)
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _big06:
 ; DARWIN-32-PIC: 	calll	L63$pb
 ; DARWIN-32-PIC-NEXT: L63$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	(_lsrc-L63$pb)+262144(%eax,%ecx,4), %edx
-; DARWIN-32-PIC-NEXT: 	movl	%edx, (_ldst-L63$pb)+262144(%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	(_lsrc-L63$pb)+262144([[EAX]],[[ECX]],4), [[EDX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[EDX]], (_ldst-L63$pb)+262144([[EAX]],[[ECX]],4)
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _big06:
-; DARWIN-64-STATIC: 	leaq	_lsrc(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movl	262144(%rax,%rdi,4), %eax
-; DARWIN-64-STATIC-NEXT: 	leaq	_ldst(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, 262144(%rcx,%rdi,4)
+; DARWIN-64-STATIC: 	leaq	_lsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	262144([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	_ldst(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], 262144([[RCX]],%rdi,4)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _big06:
-; DARWIN-64-DYNAMIC: 	leaq	_lsrc(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	262144(%rax,%rdi,4), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	_ldst(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, 262144(%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC: 	leaq	_lsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	262144([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	_ldst(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], 262144([[RCX]],%rdi,4)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _big06:
-; DARWIN-64-PIC: 	leaq	_lsrc(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movl	262144(%rax,%rdi,4), %eax
-; DARWIN-64-PIC-NEXT: 	leaq	_ldst(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, 262144(%rcx,%rdi,4)
+; DARWIN-64-PIC: 	leaq	_lsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	262144([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	_ldst(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], 262144([[RCX]],%rdi,4)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -4668,65 +4679,65 @@
 	store i32* %0, i32** @lptr, align 8
 	ret void
 ; LINUX-64-STATIC: big07:
-; LINUX-64-STATIC: leaq    ldst+262144(,%rdi,4), %rax
-; LINUX-64-STATIC: movq    %rax, lptr
+; LINUX-64-STATIC: leaq    ldst+262144(,%rdi,4), [[RAX:%r.x]]
+; LINUX-64-STATIC: movq    [[RAX]], lptr
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: big07:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	leal	ldst+262144(,%eax,4), %eax
-; LINUX-32-STATIC-NEXT: 	movl	%eax, lptr
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	leal	ldst+262144(,[[EAX]],4), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[EAX]], lptr
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: big07:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	leal	ldst+262144(,%eax,4), %eax
-; LINUX-32-PIC-NEXT: 	movl	%eax, lptr
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	leal	ldst+262144(,[[EAX]],4), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[EAX]], lptr
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: big07:
-; LINUX-64-PIC: 	leaq	ldst(%rip), %rax
-; LINUX-64-PIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
-; LINUX-64-PIC-NEXT: 	movq	%rax, lptr(%rip)
+; LINUX-64-PIC: 	leaq	ldst(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	[[RAX]], lptr(%rip)
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _big07:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	leal	_ldst+262144(,%eax,4), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	%eax, _lptr
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	leal	_ldst+262144(,[[EAX]],4), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[EAX]], _lptr
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _big07:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	leal	_ldst+262144(,%eax,4), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%eax, _lptr
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	leal	_ldst+262144(,[[EAX]],4), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[EAX]], _lptr
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _big07:
 ; DARWIN-32-PIC: 	calll	L64$pb
 ; DARWIN-32-PIC-NEXT: L64$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	leal	(_ldst-L64$pb)+262144(%eax,%ecx,4), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	%ecx, _lptr-L64$pb(%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	(_ldst-L64$pb)+262144([[EAX]],[[ECX]],4), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[ECX]], _lptr-L64$pb([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _big07:
-; DARWIN-64-STATIC: 	leaq	_ldst(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
-; DARWIN-64-STATIC-NEXT: 	movq	%rax, _lptr(%rip)
+; DARWIN-64-STATIC: 	leaq	_ldst(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	[[RAX]], _lptr(%rip)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _big07:
-; DARWIN-64-DYNAMIC: 	leaq	_ldst(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	%rax, _lptr(%rip)
+; DARWIN-64-DYNAMIC: 	leaq	_ldst(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	[[RAX]], _lptr(%rip)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _big07:
-; DARWIN-64-PIC: 	leaq	_ldst(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
-; DARWIN-64-PIC-NEXT: 	movq	%rax, _lptr(%rip)
+; DARWIN-64-PIC: 	leaq	_ldst(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	[[RAX]], _lptr(%rip)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -4740,75 +4751,75 @@
 	store i32 %3, i32* %4, align 4
 	ret void
 ; LINUX-64-STATIC: big08:
-; LINUX-64-STATIC: movl    lsrc+262144(,%rdi,4), %eax
-; LINUX-64-STATIC: movq    lptr(%rip), %rcx
-; LINUX-64-STATIC: movl    %eax, 262144(%rcx,%rdi,4)
+; LINUX-64-STATIC: movl    lsrc+262144(,%rdi,4), [[EAX:%e.x]]
+; LINUX-64-STATIC: movq    lptr(%rip), [[RCX:%r.x]]
+; LINUX-64-STATIC: movl    [[EAX]], 262144([[RCX]],%rdi,4)
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: big08:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	movl	lsrc+262144(,%eax,4), %ecx
-; LINUX-32-STATIC-NEXT: 	movl	lptr, %edx
-; LINUX-32-STATIC-NEXT: 	movl	%ecx, 262144(%edx,%eax,4)
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	lsrc+262144(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	lptr, [[EDX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	[[ECX]], 262144([[EDX]],[[EAX]],4)
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: big08:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	movl	lsrc+262144(,%eax,4), %ecx
-; LINUX-32-PIC-NEXT: 	movl	lptr, %edx
-; LINUX-32-PIC-NEXT: 	movl	%ecx, 262144(%edx,%eax,4)
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	lsrc+262144(,[[EAX]],4), [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	lptr, [[EDX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	[[ECX]], 262144([[EDX]],[[EAX]],4)
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: big08:
-; LINUX-64-PIC: 	leaq	lsrc(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movl	262144(%rax,%rdi,4), %eax
-; LINUX-64-PIC-NEXT: 	movq	lptr(%rip), %rcx
-; LINUX-64-PIC-NEXT: 	movl	%eax, 262144(%rcx,%rdi,4)
+; LINUX-64-PIC: 	leaq	lsrc(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	262144([[RAX]],%rdi,4), [[EAX:%e.x]]
+; LINUX-64-PIC-NEXT: 	movq	lptr(%rip), [[RCX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movl	[[EAX]], 262144([[RCX]],%rdi,4)
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _big08:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_lsrc+262144(,%eax,4), %ecx
-; DARWIN-32-STATIC-NEXT: 	movl	_lptr, %edx
-; DARWIN-32-STATIC-NEXT: 	movl	%ecx, 262144(%edx,%eax,4)
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_lsrc+262144(,[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_lptr, [[EDX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	[[ECX]], 262144([[EDX]],[[EAX]],4)
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _big08:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	_lsrc+262144(,%eax,4), %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	_lptr, %edx
-; DARWIN-32-DYNAMIC-NEXT: 	movl	%ecx, 262144(%edx,%eax,4)
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	_lsrc+262144(,[[EAX]],4), [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	_lptr, [[EDX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	[[ECX]], 262144([[EDX]],[[EAX]],4)
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _big08:
 ; DARWIN-32-PIC: 	calll	L65$pb
 ; DARWIN-32-PIC-NEXT: L65$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	(_lsrc-L65$pb)+262144(%eax,%ecx,4), %edx
-; DARWIN-32-PIC-NEXT: 	movl	_lptr-L65$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	%edx, 262144(%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	(_lsrc-L65$pb)+262144([[EAX]],[[ECX]],4), [[EDX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	_lptr-L65$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	[[EDX]], 262144([[EAX]],[[ECX]],4)
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _big08:
-; DARWIN-64-STATIC: 	leaq	_lsrc(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movl	262144(%rax,%rdi,4), %eax
-; DARWIN-64-STATIC-NEXT: 	movq	_lptr(%rip), %rcx
-; DARWIN-64-STATIC-NEXT: 	movl	%eax, 262144(%rcx,%rdi,4)
+; DARWIN-64-STATIC: 	leaq	_lsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	262144([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_lptr(%rip), [[RCX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movl	[[EAX]], 262144([[RCX]],%rdi,4)
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _big08:
-; DARWIN-64-DYNAMIC: 	leaq	_lsrc(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movl	262144(%rax,%rdi,4), %eax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_lptr(%rip), %rcx
-; DARWIN-64-DYNAMIC-NEXT: 	movl	%eax, 262144(%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC: 	leaq	_lsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	262144([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_lptr(%rip), [[RCX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movl	[[EAX]], 262144([[RCX]],%rdi,4)
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _big08:
-; DARWIN-64-PIC: 	leaq	_lsrc(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movl	262144(%rax,%rdi,4), %eax
-; DARWIN-64-PIC-NEXT: 	movq	_lptr(%rip), %rcx
-; DARWIN-64-PIC-NEXT: 	movl	%eax, 262144(%rcx,%rdi,4)
+; DARWIN-64-PIC: 	leaq	_lsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	262144([[RAX]],%rdi,4), [[EAX:%e.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_lptr(%rip), [[RCX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movl	[[EAX]], 262144([[RCX]],%rdi,4)
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -4842,8 +4853,8 @@
 ; DARWIN-32-PIC: _bar00:
 ; DARWIN-32-PIC: 	calll	L66$pb
 ; DARWIN-32-PIC-NEXT: L66$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	L_src$non_lazy_ptr-L66$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_src$non_lazy_ptr-L66$pb([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _bar00:
@@ -4889,8 +4900,8 @@
 ; DARWIN-32-PIC: _bxr00:
 ; DARWIN-32-PIC: 	calll	L67$pb
 ; DARWIN-32-PIC-NEXT: L67$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	L_xsrc$non_lazy_ptr-L67$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_xsrc$non_lazy_ptr-L67$pb([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _bxr00:
@@ -4936,8 +4947,8 @@
 ; DARWIN-32-PIC: _bar01:
 ; DARWIN-32-PIC: 	calll	L68$pb
 ; DARWIN-32-PIC-NEXT: L68$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	L_dst$non_lazy_ptr-L68$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_dst$non_lazy_ptr-L68$pb([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _bar01:
@@ -4983,8 +4994,8 @@
 ; DARWIN-32-PIC: _bxr01:
 ; DARWIN-32-PIC: 	calll	L69$pb
 ; DARWIN-32-PIC-NEXT: L69$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	L_xdst$non_lazy_ptr-L69$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_xdst$non_lazy_ptr-L69$pb([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _bxr01:
@@ -5030,8 +5041,8 @@
 ; DARWIN-32-PIC: _bar02:
 ; DARWIN-32-PIC: 	calll	L70$pb
 ; DARWIN-32-PIC-NEXT: L70$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L70$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L70$pb([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _bar02:
@@ -5077,8 +5088,8 @@
 ; DARWIN-32-PIC: _bar03:
 ; DARWIN-32-PIC: 	calll	L71$pb
 ; DARWIN-32-PIC-NEXT: L71$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	leal	_dsrc-L71$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	_dsrc-L71$pb([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _bar03:
@@ -5124,8 +5135,8 @@
 ; DARWIN-32-PIC: _bar04:
 ; DARWIN-32-PIC: 	calll	L72$pb
 ; DARWIN-32-PIC-NEXT: L72$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	leal	_ddst-L72$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	_ddst-L72$pb([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _bar04:
@@ -5171,8 +5182,8 @@
 ; DARWIN-32-PIC: _bar05:
 ; DARWIN-32-PIC: 	calll	L73$pb
 ; DARWIN-32-PIC-NEXT: L73$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	leal	_dptr-L73$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	_dptr-L73$pb([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _bar05:
@@ -5218,8 +5229,8 @@
 ; DARWIN-32-PIC: _bar06:
 ; DARWIN-32-PIC: 	calll	L74$pb
 ; DARWIN-32-PIC-NEXT: L74$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	leal	_lsrc-L74$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	_lsrc-L74$pb([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _bar06:
@@ -5265,8 +5276,8 @@
 ; DARWIN-32-PIC: _bar07:
 ; DARWIN-32-PIC: 	calll	L75$pb
 ; DARWIN-32-PIC-NEXT: L75$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	leal	_ldst-L75$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	_ldst-L75$pb([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _bar07:
@@ -5312,8 +5323,8 @@
 ; DARWIN-32-PIC: _bar08:
 ; DARWIN-32-PIC: 	calll	L76$pb
 ; DARWIN-32-PIC-NEXT: L76$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	leal	_lptr-L76$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	_lptr-L76$pb([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _bar08:
@@ -5359,8 +5370,8 @@
 ; DARWIN-32-PIC: _har00:
 ; DARWIN-32-PIC: 	calll	L77$pb
 ; DARWIN-32-PIC-NEXT: L77$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	L_src$non_lazy_ptr-L77$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_src$non_lazy_ptr-L77$pb([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _har00:
@@ -5406,8 +5417,8 @@
 ; DARWIN-32-PIC: _hxr00:
 ; DARWIN-32-PIC: 	calll	L78$pb
 ; DARWIN-32-PIC-NEXT: L78$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	L_xsrc$non_lazy_ptr-L78$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_xsrc$non_lazy_ptr-L78$pb([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _hxr00:
@@ -5453,8 +5464,8 @@
 ; DARWIN-32-PIC: _har01:
 ; DARWIN-32-PIC: 	calll	L79$pb
 ; DARWIN-32-PIC-NEXT: L79$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	L_dst$non_lazy_ptr-L79$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_dst$non_lazy_ptr-L79$pb([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _har01:
@@ -5500,8 +5511,8 @@
 ; DARWIN-32-PIC: _hxr01:
 ; DARWIN-32-PIC: 	calll	L80$pb
 ; DARWIN-32-PIC-NEXT: L80$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	L_xdst$non_lazy_ptr-L80$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_xdst$non_lazy_ptr-L80$pb([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _hxr01:
@@ -5535,8 +5546,8 @@
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: har02:
-; LINUX-64-PIC: 	movq	ptr at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movq	(%rax), %rax
+; LINUX-64-PIC: 	movq	ptr at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	([[RAX]]), %rax
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _har02:
@@ -5544,31 +5555,31 @@
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _har02:
-; DARWIN-32-DYNAMIC: 	movl	L_ptr$non_lazy_ptr, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	(%eax), %eax
+; DARWIN-32-DYNAMIC: 	movl	L_ptr$non_lazy_ptr, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	([[EAX]]), %eax
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _har02:
 ; DARWIN-32-PIC: 	calll	L81$pb
 ; DARWIN-32-PIC-NEXT: L81$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L81$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L81$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _har02:
-; DARWIN-64-STATIC: 	movq	_ptr at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movq	(%rax), %rax
+; DARWIN-64-STATIC: 	movq	_ptr at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	([[RAX]]), %rax
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _har02:
-; DARWIN-64-DYNAMIC: 	movq	_ptr at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	(%rax), %rax
+; DARWIN-64-DYNAMIC: 	movq	_ptr at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	([[RAX]]), %rax
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _har02:
-; DARWIN-64-PIC: 	movq	_ptr at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movq	(%rax), %rax
+; DARWIN-64-PIC: 	movq	_ptr at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	([[RAX]]), %rax
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -5602,8 +5613,8 @@
 ; DARWIN-32-PIC: _har03:
 ; DARWIN-32-PIC: 	calll	L82$pb
 ; DARWIN-32-PIC-NEXT: L82$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	leal	_dsrc-L82$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	_dsrc-L82$pb([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _har03:
@@ -5649,8 +5660,8 @@
 ; DARWIN-32-PIC: _har04:
 ; DARWIN-32-PIC: 	calll	L83$pb
 ; DARWIN-32-PIC-NEXT: L83$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	leal	_ddst-L83$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	_ddst-L83$pb([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _har04:
@@ -5684,8 +5695,8 @@
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: har05:
-; LINUX-64-PIC: 	movq	dptr at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movq	(%rax), %rax
+; LINUX-64-PIC: 	movq	dptr at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	([[RAX]]), %rax
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _har05:
@@ -5699,8 +5710,8 @@
 ; DARWIN-32-PIC: _har05:
 ; DARWIN-32-PIC: 	calll	L84$pb
 ; DARWIN-32-PIC-NEXT: L84$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	_dptr-L84$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	_dptr-L84$pb([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _har05:
@@ -5746,8 +5757,8 @@
 ; DARWIN-32-PIC: _har06:
 ; DARWIN-32-PIC: 	calll	L85$pb
 ; DARWIN-32-PIC-NEXT: L85$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	leal	_lsrc-L85$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	_lsrc-L85$pb([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _har06:
@@ -5793,8 +5804,8 @@
 ; DARWIN-32-PIC: _har07:
 ; DARWIN-32-PIC: 	calll	L86$pb
 ; DARWIN-32-PIC-NEXT: L86$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	leal	_ldst-L86$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	_ldst-L86$pb([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _har07:
@@ -5842,8 +5853,8 @@
 ; DARWIN-32-PIC: _har08:
 ; DARWIN-32-PIC: 	calll	L87$pb
 ; DARWIN-32-PIC-NEXT: L87$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	_lptr-L87$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	_lptr-L87$pb([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _har08:
@@ -5891,8 +5902,8 @@
 ; DARWIN-32-PIC: _bat00:
 ; DARWIN-32-PIC: 	calll	L88$pb
 ; DARWIN-32-PIC-NEXT: L88$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	L_src$non_lazy_ptr-L88$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_src$non_lazy_ptr-L88$pb([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	addl	$64, %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
@@ -5944,8 +5955,8 @@
 ; DARWIN-32-PIC: _bxt00:
 ; DARWIN-32-PIC: 	calll	L89$pb
 ; DARWIN-32-PIC-NEXT: L89$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	L_xsrc$non_lazy_ptr-L89$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_xsrc$non_lazy_ptr-L89$pb([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	addl	$64, %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
@@ -5997,8 +6008,8 @@
 ; DARWIN-32-PIC: _bat01:
 ; DARWIN-32-PIC: 	calll	L90$pb
 ; DARWIN-32-PIC-NEXT: L90$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	L_dst$non_lazy_ptr-L90$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_dst$non_lazy_ptr-L90$pb([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	addl	$64, %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
@@ -6050,8 +6061,8 @@
 ; DARWIN-32-PIC: _bxt01:
 ; DARWIN-32-PIC: 	calll	L91$pb
 ; DARWIN-32-PIC-NEXT: L91$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	L_xdst$non_lazy_ptr-L91$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_xdst$non_lazy_ptr-L91$pb([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	addl	$64, %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
@@ -6093,8 +6104,8 @@
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: bat02:
-; LINUX-64-PIC: 	movq	ptr at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movq	(%rax), %rax
+; LINUX-64-PIC: 	movq	ptr at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	([[RAX]]), %rax
 ; LINUX-64-PIC-NEXT: 	addq	$64, %rax
 ; LINUX-64-PIC-NEXT: 	ret
 
@@ -6104,35 +6115,35 @@
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _bat02:
-; DARWIN-32-DYNAMIC: 	movl	L_ptr$non_lazy_ptr, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	(%eax), %eax
+; DARWIN-32-DYNAMIC: 	movl	L_ptr$non_lazy_ptr, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	([[EAX]]), [[EAX:%e.x]]
 ; DARWIN-32-DYNAMIC-NEXT: 	addl	$64, %eax
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _bat02:
 ; DARWIN-32-PIC: 	calll	L92$pb
 ; DARWIN-32-PIC-NEXT: L92$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L92$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L92$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	addl	$64, %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _bat02:
-; DARWIN-64-STATIC: 	movq	_ptr at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movq	(%rax), %rax
+; DARWIN-64-STATIC: 	movq	_ptr at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	([[RAX]]), %rax
 ; DARWIN-64-STATIC-NEXT: 	addq	$64, %rax
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _bat02:
-; DARWIN-64-DYNAMIC: 	movq	_ptr at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	(%rax), %rax
+; DARWIN-64-DYNAMIC: 	movq	_ptr at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	([[RAX]]), [[RAX:%r.x]]
 ; DARWIN-64-DYNAMIC-NEXT: 	addq	$64, %rax
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _bat02:
-; DARWIN-64-PIC: 	movq	_ptr at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movq	(%rax), %rax
+; DARWIN-64-PIC: 	movq	_ptr at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	([[RAX]]), %rax
 ; DARWIN-64-PIC-NEXT: 	addq	$64, %rax
 ; DARWIN-64-PIC-NEXT: 	ret
 }
@@ -6168,8 +6179,8 @@
 ; DARWIN-32-PIC: _bat03:
 ; DARWIN-32-PIC: 	calll	L93$pb
 ; DARWIN-32-PIC-NEXT: L93$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	leal	(_dsrc-L93$pb)+64(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	(_dsrc-L93$pb)+64([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _bat03:
@@ -6216,8 +6227,8 @@
 ; DARWIN-32-PIC: _bat04:
 ; DARWIN-32-PIC: 	calll	L94$pb
 ; DARWIN-32-PIC-NEXT: L94$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	leal	(_ddst-L94$pb)+64(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	(_ddst-L94$pb)+64([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _bat04:
@@ -6255,8 +6266,8 @@
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: bat05:
-; LINUX-64-PIC: 	movq	dptr at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movq	(%rax), %rax
+; LINUX-64-PIC: 	movq	dptr at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	([[RAX]]), %rax
 ; LINUX-64-PIC-NEXT: 	addq	$64, %rax
 ; LINUX-64-PIC-NEXT: 	ret
 
@@ -6273,8 +6284,8 @@
 ; DARWIN-32-PIC: _bat05:
 ; DARWIN-32-PIC: 	calll	L95$pb
 ; DARWIN-32-PIC-NEXT: L95$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	_dptr-L95$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	_dptr-L95$pb([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	addl	$64, %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
@@ -6324,8 +6335,8 @@
 ; DARWIN-32-PIC: _bat06:
 ; DARWIN-32-PIC: 	calll	L96$pb
 ; DARWIN-32-PIC-NEXT: L96$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	leal	(_lsrc-L96$pb)+64(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	(_lsrc-L96$pb)+64([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _bat06:
@@ -6371,8 +6382,8 @@
 ; DARWIN-32-PIC: _bat07:
 ; DARWIN-32-PIC: 	calll	L97$pb
 ; DARWIN-32-PIC-NEXT: L97$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	leal	(_ldst-L97$pb)+64(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	(_ldst-L97$pb)+64([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _bat07:
@@ -6427,8 +6438,8 @@
 ; DARWIN-32-PIC: _bat08:
 ; DARWIN-32-PIC: 	calll	L98$pb
 ; DARWIN-32-PIC-NEXT: L98$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	_lptr-L98$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	_lptr-L98$pb([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	addl	$64, %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
@@ -6480,9 +6491,9 @@
 ; DARWIN-32-PIC: _bam00:
 ; DARWIN-32-PIC: 	calll	L99$pb
 ; DARWIN-32-PIC-NEXT: L99$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%ecx
+; DARWIN-32-PIC-NEXT: 	popl	[[ECX:%e.x]]
 ; DARWIN-32-PIC-NEXT: 	movl	$262144, %eax
-; DARWIN-32-PIC-NEXT: 	addl	L_src$non_lazy_ptr-L99$pb(%ecx), %eax
+; DARWIN-32-PIC-NEXT: 	addl	L_src$non_lazy_ptr-L99$pb([[ECX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _bam00:
@@ -6533,9 +6544,9 @@
 ; DARWIN-32-PIC: _bam01:
 ; DARWIN-32-PIC: 	calll	L100$pb
 ; DARWIN-32-PIC-NEXT: L100$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%ecx
+; DARWIN-32-PIC-NEXT: 	popl	[[ECX:%e.x]]
 ; DARWIN-32-PIC-NEXT: 	movl	$262144, %eax
-; DARWIN-32-PIC-NEXT: 	addl	L_dst$non_lazy_ptr-L100$pb(%ecx), %eax
+; DARWIN-32-PIC-NEXT: 	addl	L_dst$non_lazy_ptr-L100$pb([[ECX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _bam01:
@@ -6586,9 +6597,9 @@
 ; DARWIN-32-PIC: _bxm01:
 ; DARWIN-32-PIC: 	calll	L101$pb
 ; DARWIN-32-PIC-NEXT: L101$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%ecx
+; DARWIN-32-PIC-NEXT: 	popl	[[ECX:%e.x]]
 ; DARWIN-32-PIC-NEXT: 	movl	$262144, %eax
-; DARWIN-32-PIC-NEXT: 	addl	L_xdst$non_lazy_ptr-L101$pb(%ecx), %eax
+; DARWIN-32-PIC-NEXT: 	addl	L_xdst$non_lazy_ptr-L101$pb([[ECX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _bxm01:
@@ -6629,9 +6640,9 @@
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: bam02:
-; LINUX-64-PIC: 	movq	ptr at GOTPCREL(%rip), %rcx
+; LINUX-64-PIC: 	movq	ptr at GOTPCREL(%rip), [[RCX:%r.x]]
 ; LINUX-64-PIC-NEXT: 	movl	$262144, %eax
-; LINUX-64-PIC-NEXT: 	addq	(%rcx), %rax
+; LINUX-64-PIC-NEXT: 	addq	([[RCX]]), %rax
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _bam02:
@@ -6640,36 +6651,36 @@
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _bam02:
-; DARWIN-32-DYNAMIC: 	movl	L_ptr$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC: 	movl	L_ptr$non_lazy_ptr, [[ECX:%e.x]]
 ; DARWIN-32-DYNAMIC-NEXT: 	movl	$262144, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	addl	(%ecx), %eax
+; DARWIN-32-DYNAMIC-NEXT: 	addl	([[ECX]]), %eax
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _bam02:
 ; DARWIN-32-PIC: 	calll	L102$pb
 ; DARWIN-32-PIC-NEXT: L102$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L102$pb(%eax), %ecx
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L102$pb([[EAX]]), [[ECX:%e.x]]
 ; DARWIN-32-PIC-NEXT: 	movl	$262144, %eax
-; DARWIN-32-PIC-NEXT: 	addl	(%ecx), %eax
+; DARWIN-32-PIC-NEXT: 	addl	([[ECX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _bam02:
-; DARWIN-64-STATIC: 	movq	_ptr at GOTPCREL(%rip), %rcx
+; DARWIN-64-STATIC: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
 ; DARWIN-64-STATIC-NEXT: 	movl	$262144, %eax
-; DARWIN-64-STATIC-NEXT: 	addq	(%rcx), %rax
+; DARWIN-64-STATIC-NEXT: 	addq	([[RCX]]), %rax
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _bam02:
-; DARWIN-64-DYNAMIC: 	movq	_ptr at GOTPCREL(%rip), %rcx
+; DARWIN-64-DYNAMIC: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
 ; DARWIN-64-DYNAMIC-NEXT: 	movl	$262144, %eax
-; DARWIN-64-DYNAMIC-NEXT: 	addq	(%rcx), %rax
+; DARWIN-64-DYNAMIC-NEXT: 	addq	([[RCX]]), %rax
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _bam02:
-; DARWIN-64-PIC: 	movq	_ptr at GOTPCREL(%rip), %rcx
+; DARWIN-64-PIC: 	movq	_ptr at GOTPCREL(%rip), [[RCX:%r.x]]
 ; DARWIN-64-PIC-NEXT: 	movl	$262144, %eax
-; DARWIN-64-PIC-NEXT: 	addq	(%rcx), %rax
+; DARWIN-64-PIC-NEXT: 	addq	([[RCX]]), %rax
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -6704,8 +6715,8 @@
 ; DARWIN-32-PIC: _bam03:
 ; DARWIN-32-PIC: 	calll	L103$pb
 ; DARWIN-32-PIC-NEXT: L103$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	leal	(_dsrc-L103$pb)+262144(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	(_dsrc-L103$pb)+262144([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _bam03:
@@ -6752,8 +6763,8 @@
 ; DARWIN-32-PIC: _bam04:
 ; DARWIN-32-PIC: 	calll	L104$pb
 ; DARWIN-32-PIC-NEXT: L104$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	leal	(_ddst-L104$pb)+262144(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	(_ddst-L104$pb)+262144([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _bam04:
@@ -6791,9 +6802,9 @@
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: bam05:
-; LINUX-64-PIC: 	movq	dptr at GOTPCREL(%rip), %rcx
+; LINUX-64-PIC: 	movq	dptr at GOTPCREL(%rip), [[RCX:%r.x]]
 ; LINUX-64-PIC-NEXT: 	movl	$262144, %eax
-; LINUX-64-PIC-NEXT: 	addq	(%rcx), %rax
+; LINUX-64-PIC-NEXT: 	addq	([[RCX]]), %rax
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _bam05:
@@ -6809,9 +6820,9 @@
 ; DARWIN-32-PIC: _bam05:
 ; DARWIN-32-PIC: 	calll	L105$pb
 ; DARWIN-32-PIC-NEXT: L105$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%ecx
+; DARWIN-32-PIC-NEXT: 	popl	[[ECX:%e.x]]
 ; DARWIN-32-PIC-NEXT: 	movl	$262144, %eax
-; DARWIN-32-PIC-NEXT: 	addl	_dptr-L105$pb(%ecx), %eax
+; DARWIN-32-PIC-NEXT: 	addl	_dptr-L105$pb([[ECX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _bam05:
@@ -6860,8 +6871,8 @@
 ; DARWIN-32-PIC: _bam06:
 ; DARWIN-32-PIC: 	calll	L106$pb
 ; DARWIN-32-PIC-NEXT: L106$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	leal	(_lsrc-L106$pb)+262144(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	(_lsrc-L106$pb)+262144([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _bam06:
@@ -6908,7 +6919,7 @@
 ; DARWIN-32-PIC: 	calll	L107$pb
 ; DARWIN-32-PIC-NEXT: L107$pb:
 ; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	leal	(_ldst-L107$pb)+262144(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	leal	(_ldst-L107$pb)+262144([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _bam07:
@@ -6963,9 +6974,9 @@
 ; DARWIN-32-PIC: _bam08:
 ; DARWIN-32-PIC: 	calll	L108$pb
 ; DARWIN-32-PIC-NEXT: L108$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%ecx
+; DARWIN-32-PIC-NEXT: 	popl	[[ECX:%e.x]]
 ; DARWIN-32-PIC-NEXT: 	movl	$262144, %eax
-; DARWIN-32-PIC-NEXT: 	addl	_lptr-L108$pb(%ecx), %eax
+; DARWIN-32-PIC-NEXT: 	addl	_lptr-L108$pb([[ECX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _bam08:
@@ -6995,53 +7006,53 @@
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: cat00:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	leal	src+64(,%eax,4), %eax
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	leal	src+64(,[[EAX]],4), %eax
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: cat00:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	leal	src+64(,%eax,4), %eax
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	leal	src+64(,[[EAX]],4), %eax
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: cat00:
-; LINUX-64-PIC: 	movq	src at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; LINUX-64-PIC: 	movq	src at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _cat00:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	leal	_src+64(,%eax,4), %eax
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	leal	_src+64(,[[EAX]],4), %eax
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _cat00:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_src$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	leal	64(%ecx,%eax,4), %eax
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_src$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	leal	64([[ECX]],[[EAX]],4), %eax
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _cat00:
 ; DARWIN-32-PIC: 	calll	L109$pb
 ; DARWIN-32-PIC-NEXT: L109$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_src$non_lazy_ptr-L109$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	leal	64(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_src$non_lazy_ptr-L109$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	64([[EAX]],[[ECX]],4), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _cat00:
-; DARWIN-64-STATIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _cat00:
-; DARWIN-64-DYNAMIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _cat00:
-; DARWIN-64-PIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; DARWIN-64-PIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -7056,53 +7067,53 @@
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: cxt00:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	leal	xsrc+64(,%eax,4), %eax
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	leal	xsrc+64(,[[EAX]],4), %eax
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: cxt00:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	leal	xsrc+64(,%eax,4), %eax
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	leal	xsrc+64(,[[EAX]],4), %eax
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: cxt00:
-; LINUX-64-PIC: 	movq	xsrc at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; LINUX-64-PIC: 	movq	xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _cxt00:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	leal	_xsrc+64(,%eax,4), %eax
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	leal	_xsrc+64(,[[EAX]],4), %eax
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _cxt00:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_xsrc$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	leal	64(%ecx,%eax,4), %eax
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_xsrc$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	leal	64([[ECX]],[[EAX]],4), %eax
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _cxt00:
 ; DARWIN-32-PIC: 	calll	L110$pb
 ; DARWIN-32-PIC-NEXT: L110$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_xsrc$non_lazy_ptr-L110$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	leal	64(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_xsrc$non_lazy_ptr-L110$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	64([[EAX]],[[ECX]],4), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _cxt00:
-; DARWIN-64-STATIC: 	movq	_xsrc at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC: 	movq	_xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _cxt00:
-; DARWIN-64-DYNAMIC: 	movq	_xsrc at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC: 	movq	_xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _cxt00:
-; DARWIN-64-PIC: 	movq	_xsrc at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; DARWIN-64-PIC: 	movq	_xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -7117,53 +7128,53 @@
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: cat01:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	leal	dst+64(,%eax,4), %eax
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	leal	dst+64(,[[EAX]],4), %eax
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: cat01:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	leal	dst+64(,%eax,4), %eax
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	leal	dst+64(,[[EAX]],4), %eax
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: cat01:
-; LINUX-64-PIC: 	movq	dst at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; LINUX-64-PIC: 	movq	dst at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _cat01:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	leal	_dst+64(,%eax,4), %eax
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	leal	_dst+64(,[[EAX]],4), %eax
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _cat01:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_dst$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	leal	64(%ecx,%eax,4), %eax
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_dst$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	leal	64([[ECX]],[[EAX]],4), %eax
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _cat01:
 ; DARWIN-32-PIC: 	calll	L111$pb
 ; DARWIN-32-PIC-NEXT: L111$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_dst$non_lazy_ptr-L111$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	leal	64(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_dst$non_lazy_ptr-L111$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	64([[EAX]],[[ECX]],4), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _cat01:
-; DARWIN-64-STATIC: 	movq	_dst at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC: 	movq	_dst at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _cat01:
-; DARWIN-64-DYNAMIC: 	movq	_dst at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC: 	movq	_dst at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _cat01:
-; DARWIN-64-PIC: 	movq	_dst at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; DARWIN-64-PIC: 	movq	_dst at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -7178,53 +7189,53 @@
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: cxt01:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	leal	xdst+64(,%eax,4), %eax
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	leal	xdst+64(,[[EAX]],4), %eax
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: cxt01:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	leal	xdst+64(,%eax,4), %eax
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	leal	xdst+64(,[[EAX]],4), %eax
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: cxt01:
-; LINUX-64-PIC: 	movq	xdst at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; LINUX-64-PIC: 	movq	xdst at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _cxt01:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	leal	_xdst+64(,%eax,4), %eax
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	leal	_xdst+64(,[[EAX]],4), %eax
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _cxt01:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_xdst$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	leal	64(%ecx,%eax,4), %eax
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_xdst$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	leal	64([[ECX]],[[EAX]],4), %eax
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _cxt01:
 ; DARWIN-32-PIC: 	calll	L112$pb
 ; DARWIN-32-PIC-NEXT: L112$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_xdst$non_lazy_ptr-L112$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	leal	64(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_xdst$non_lazy_ptr-L112$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	64([[EAX]],[[ECX]],4), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _cxt01:
-; DARWIN-64-STATIC: 	movq	_xdst at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC: 	movq	_xdst at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _cxt01:
-; DARWIN-64-DYNAMIC: 	movq	_xdst at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC: 	movq	_xdst at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _cxt01:
-; DARWIN-64-PIC: 	movq	_xdst at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; DARWIN-64-PIC: 	movq	_xdst at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -7236,67 +7247,67 @@
 	%3 = bitcast i32* %2 to i8*
 	ret i8* %3
 ; LINUX-64-STATIC: cat02:
-; LINUX-64-STATIC: movq    ptr(%rip), %rax
-; LINUX-64-STATIC: leaq    64(%rax,%rdi,4), %rax
+; LINUX-64-STATIC: movq    ptr(%rip), [[RAX:%r.x]]
+; LINUX-64-STATIC: leaq    64([[RAX]],%rdi,4), %rax
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: cat02:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	movl	ptr, %ecx
-; LINUX-32-STATIC-NEXT: 	leal	64(%ecx,%eax,4), %eax
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	ptr, [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	leal	64([[ECX]],[[EAX]],4), %eax
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: cat02:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	movl	ptr, %ecx
-; LINUX-32-PIC-NEXT: 	leal	64(%ecx,%eax,4), %eax
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	ptr, [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	leal	64([[ECX]],[[EAX]],4), %eax
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: cat02:
-; LINUX-64-PIC: 	movq	ptr at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movq	(%rax), %rax
-; LINUX-64-PIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; LINUX-64-PIC: 	movq	ptr at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	([[RAX]]), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _cat02:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_ptr, %ecx
-; DARWIN-32-STATIC-NEXT: 	leal	64(%ecx,%eax,4), %eax
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_ptr, [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	leal	64([[ECX]],[[EAX]],4), %eax
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _cat02:
-; DARWIN-32-DYNAMIC: 	movl	L_ptr$non_lazy_ptr, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	(%eax), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	leal	64(%eax,%ecx,4), %eax
+; DARWIN-32-DYNAMIC: 	movl	L_ptr$non_lazy_ptr, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	leal	64([[EAX]],[[ECX]],4), %eax
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _cat02:
 ; DARWIN-32-PIC: 	calll	L113$pb
 ; DARWIN-32-PIC-NEXT: L113$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L113$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	leal	64(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L113$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	64([[EAX]],[[ECX]],4), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _cat02:
-; DARWIN-64-STATIC: 	movq	_ptr at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movq	(%rax), %rax
-; DARWIN-64-STATIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC: 	movq	_ptr at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	([[RAX]]), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _cat02:
-; DARWIN-64-DYNAMIC: 	movq	_ptr at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	(%rax), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC: 	movq	_ptr at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	([[RAX]]), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _cat02:
-; DARWIN-64-PIC: 	movq	_ptr at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movq	(%rax), %rax
-; DARWIN-64-PIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; DARWIN-64-PIC: 	movq	_ptr at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	([[RAX]]), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -7311,51 +7322,51 @@
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: cat03:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	leal	dsrc+64(,%eax,4), %eax
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	leal	dsrc+64(,[[EAX]],4), %eax
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: cat03:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	leal	dsrc+64(,%eax,4), %eax
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	leal	dsrc+64(,[[EAX]],4), %eax
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: cat03:
-; LINUX-64-PIC: 	movq	dsrc at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; LINUX-64-PIC: 	movq	dsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _cat03:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	leal	_dsrc+64(,%eax,4), %eax
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	leal	_dsrc+64(,[[EAX]],4), %eax
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _cat03:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	leal	_dsrc+64(,%eax,4), %eax
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	leal	_dsrc+64(,[[EAX]],4), %eax
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _cat03:
 ; DARWIN-32-PIC: 	calll	L114$pb
 ; DARWIN-32-PIC-NEXT: L114$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	leal	(_dsrc-L114$pb)+64(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	(_dsrc-L114$pb)+64([[EAX]],[[ECX]],4), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _cat03:
-; DARWIN-64-STATIC: 	leaq	_dsrc(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC: 	leaq	_dsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _cat03:
-; DARWIN-64-DYNAMIC: 	leaq	_dsrc(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC: 	leaq	_dsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _cat03:
-; DARWIN-64-PIC: 	leaq	_dsrc(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; DARWIN-64-PIC: 	leaq	_dsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -7370,51 +7381,51 @@
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: cat04:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	leal	ddst+64(,%eax,4), %eax
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	leal	ddst+64(,[[EAX]],4), %eax
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: cat04:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	leal	ddst+64(,%eax,4), %eax
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	leal	ddst+64(,[[EAX]],4), %eax
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: cat04:
-; LINUX-64-PIC: 	movq	ddst at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; LINUX-64-PIC: 	movq	ddst at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _cat04:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	leal	_ddst+64(,%eax,4), %eax
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	leal	_ddst+64(,[[EAX]],4), %eax
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _cat04:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	leal	_ddst+64(,%eax,4), %eax
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	leal	_ddst+64(,[[EAX]],4), %eax
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _cat04:
 ; DARWIN-32-PIC: 	calll	L115$pb
 ; DARWIN-32-PIC-NEXT: L115$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	leal	(_ddst-L115$pb)+64(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	(_ddst-L115$pb)+64([[EAX]],[[ECX]],4), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _cat04:
-; DARWIN-64-STATIC: 	leaq	_ddst(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC: 	leaq	_ddst(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _cat04:
-; DARWIN-64-DYNAMIC: 	leaq	_ddst(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC: 	leaq	_ddst(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _cat04:
-; DARWIN-64-PIC: 	leaq	_ddst(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; DARWIN-64-PIC: 	leaq	_ddst(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -7426,62 +7437,62 @@
 	%3 = bitcast i32* %2 to i8*
 	ret i8* %3
 ; LINUX-64-STATIC: cat05:
-; LINUX-64-STATIC: movq    dptr(%rip), %rax
-; LINUX-64-STATIC: leaq    64(%rax,%rdi,4), %rax
+; LINUX-64-STATIC: movq    dptr(%rip), [[RAX:%r.x]]
+; LINUX-64-STATIC: leaq    64([[RAX]],%rdi,4), %rax
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: cat05:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	movl	dptr, %ecx
-; LINUX-32-STATIC-NEXT: 	leal	64(%ecx,%eax,4), %eax
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	dptr, [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	leal	64([[ECX]],[[EAX]],4), %eax
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: cat05:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	movl	dptr, %ecx
-; LINUX-32-PIC-NEXT: 	leal	64(%ecx,%eax,4), %eax
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	dptr, [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	leal	64([[ECX]],[[EAX]],4), %eax
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: cat05:
-; LINUX-64-PIC: 	movq	dptr at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movq	(%rax), %rax
-; LINUX-64-PIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; LINUX-64-PIC: 	movq	dptr at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	([[RAX]]), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _cat05:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_dptr, %ecx
-; DARWIN-32-STATIC-NEXT: 	leal	64(%ecx,%eax,4), %eax
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_dptr, [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	leal	64([[ECX]],[[EAX]],4), %eax
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _cat05:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	_dptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	leal	64(%ecx,%eax,4), %eax
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	_dptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	leal	64([[ECX]],[[EAX]],4), %eax
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _cat05:
 ; DARWIN-32-PIC: 	calll	L116$pb
 ; DARWIN-32-PIC-NEXT: L116$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	_dptr-L116$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	leal	64(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	_dptr-L116$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	64([[EAX]],[[ECX]],4), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _cat05:
-; DARWIN-64-STATIC: 	movq	_dptr(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC: 	movq	_dptr(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _cat05:
-; DARWIN-64-DYNAMIC: 	movq	_dptr(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC: 	movq	_dptr(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _cat05:
-; DARWIN-64-PIC: 	movq	_dptr(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; DARWIN-64-PIC: 	movq	_dptr(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -7496,51 +7507,51 @@
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: cat06:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	leal	lsrc+64(,%eax,4), %eax
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	leal	lsrc+64(,[[EAX]],4), %eax
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: cat06:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	leal	lsrc+64(,%eax,4), %eax
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	leal	lsrc+64(,[[EAX]],4), %eax
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: cat06:
-; LINUX-64-PIC: 	leaq	lsrc(%rip), %rax
-; LINUX-64-PIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; LINUX-64-PIC: 	leaq	lsrc(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _cat06:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	leal	_lsrc+64(,%eax,4), %eax
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	leal	_lsrc+64(,[[EAX]],4), %eax
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _cat06:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	leal	_lsrc+64(,%eax,4), %eax
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	leal	_lsrc+64(,[[EAX]],4), %eax
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _cat06:
 ; DARWIN-32-PIC: 	calll	L117$pb
 ; DARWIN-32-PIC-NEXT: L117$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	leal	(_lsrc-L117$pb)+64(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	(_lsrc-L117$pb)+64([[EAX]],[[ECX]],4), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _cat06:
-; DARWIN-64-STATIC: 	leaq	_lsrc(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC: 	leaq	_lsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _cat06:
-; DARWIN-64-DYNAMIC: 	leaq	_lsrc(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC: 	leaq	_lsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _cat06:
-; DARWIN-64-PIC: 	leaq	_lsrc(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; DARWIN-64-PIC: 	leaq	_lsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -7555,51 +7566,51 @@
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: cat07:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	leal	ldst+64(,%eax,4), %eax
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	leal	ldst+64(,[[EAX]],4), %eax
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: cat07:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	leal	ldst+64(,%eax,4), %eax
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	leal	ldst+64(,[[EAX]],4), %eax
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: cat07:
-; LINUX-64-PIC: 	leaq	ldst(%rip), %rax
-; LINUX-64-PIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; LINUX-64-PIC: 	leaq	ldst(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _cat07:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	leal	_ldst+64(,%eax,4), %eax
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	leal	_ldst+64(,[[EAX]],4), %eax
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _cat07:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	leal	_ldst+64(,%eax,4), %eax
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	leal	_ldst+64(,[[EAX]],4), %eax
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _cat07:
 ; DARWIN-32-PIC: 	calll	L118$pb
 ; DARWIN-32-PIC-NEXT: L118$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	leal	(_ldst-L118$pb)+64(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	(_ldst-L118$pb)+64([[EAX]],[[ECX]],4), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _cat07:
-; DARWIN-64-STATIC: 	leaq	_ldst(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC: 	leaq	_ldst(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _cat07:
-; DARWIN-64-DYNAMIC: 	leaq	_ldst(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC: 	leaq	_ldst(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _cat07:
-; DARWIN-64-PIC: 	leaq	_ldst(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; DARWIN-64-PIC: 	leaq	_ldst(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -7611,61 +7622,61 @@
 	%3 = bitcast i32* %2 to i8*
 	ret i8* %3
 ; LINUX-64-STATIC: cat08:
-; LINUX-64-STATIC: movq    lptr(%rip), %rax
-; LINUX-64-STATIC: leaq    64(%rax,%rdi,4), %rax
+; LINUX-64-STATIC: movq    lptr(%rip), [[RAX:%r.x]]
+; LINUX-64-STATIC: leaq    64([[RAX]],%rdi,4), %rax
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: cat08:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	movl	lptr, %ecx
-; LINUX-32-STATIC-NEXT: 	leal	64(%ecx,%eax,4), %eax
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	lptr, [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	leal	64([[ECX]],[[EAX]],4), %eax
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: cat08:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	movl	lptr, %ecx
-; LINUX-32-PIC-NEXT: 	leal	64(%ecx,%eax,4), %eax
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	lptr, [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	leal	64([[ECX]],[[EAX]],4), %eax
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: cat08:
-; LINUX-64-PIC: 	movq	lptr(%rip), %rax
-; LINUX-64-PIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; LINUX-64-PIC: 	movq	lptr(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _cat08:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_lptr, %ecx
-; DARWIN-32-STATIC-NEXT: 	leal	64(%ecx,%eax,4), %eax
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_lptr, [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	leal	64([[ECX]],[[EAX]],4), %eax
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _cat08:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	_lptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	leal	64(%ecx,%eax,4), %eax
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	_lptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	leal	64([[ECX]],[[EAX]],4), %eax
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _cat08:
 ; DARWIN-32-PIC: 	calll	L119$pb
 ; DARWIN-32-PIC-NEXT: L119$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	_lptr-L119$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	leal	64(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	_lptr-L119$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	64([[EAX]],[[ECX]],4), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _cat08:
-; DARWIN-64-STATIC: 	movq	_lptr(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC: 	movq	_lptr(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _cat08:
-; DARWIN-64-DYNAMIC: 	movq	_lptr(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC: 	movq	_lptr(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _cat08:
-; DARWIN-64-PIC: 	movq	_lptr(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	leaq	64(%rax,%rdi,4), %rax
+; DARWIN-64-PIC: 	movq	_lptr(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	64([[RAX]],%rdi,4), %rax
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -7680,53 +7691,53 @@
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: cam00:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	leal	src+262144(,%eax,4), %eax
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	leal	src+262144(,[[EAX]],4), %eax
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: cam00:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	leal	src+262144(,%eax,4), %eax
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	leal	src+262144(,[[EAX]],4), %eax
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: cam00:
-; LINUX-64-PIC: 	movq	src at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; LINUX-64-PIC: 	movq	src at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _cam00:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	leal	_src+262144(,%eax,4), %eax
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	leal	_src+262144(,[[EAX]],4), %eax
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _cam00:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_src$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	leal	262144(%ecx,%eax,4), %eax
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_src$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	leal	262144([[ECX]],[[EAX]],4), %eax
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _cam00:
 ; DARWIN-32-PIC: 	calll	L120$pb
 ; DARWIN-32-PIC-NEXT: L120$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_src$non_lazy_ptr-L120$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	leal	262144(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_src$non_lazy_ptr-L120$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	262144([[EAX]],[[ECX]],4), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _cam00:
-; DARWIN-64-STATIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _cam00:
-; DARWIN-64-DYNAMIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _cam00:
-; DARWIN-64-PIC: 	movq	_src at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; DARWIN-64-PIC: 	movq	_src at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -7741,53 +7752,53 @@
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: cxm00:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	leal	xsrc+262144(,%eax,4), %eax
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	leal	xsrc+262144(,[[EAX]],4), %eax
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: cxm00:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	leal	xsrc+262144(,%eax,4), %eax
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	leal	xsrc+262144(,[[EAX]],4), %eax
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: cxm00:
-; LINUX-64-PIC: 	movq	xsrc at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; LINUX-64-PIC: 	movq	xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _cxm00:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	leal	_xsrc+262144(,%eax,4), %eax
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	leal	_xsrc+262144(,[[EAX]],4), %eax
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _cxm00:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_xsrc$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	leal	262144(%ecx,%eax,4), %eax
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_xsrc$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	leal	262144([[ECX]],[[EAX]],4), %eax
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _cxm00:
 ; DARWIN-32-PIC: 	calll	L121$pb
 ; DARWIN-32-PIC-NEXT: L121$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_xsrc$non_lazy_ptr-L121$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	leal	262144(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_xsrc$non_lazy_ptr-L121$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	262144([[EAX]],[[ECX]],4), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _cxm00:
-; DARWIN-64-STATIC: 	movq	_xsrc at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC: 	movq	_xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _cxm00:
-; DARWIN-64-DYNAMIC: 	movq	_xsrc at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC: 	movq	_xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _cxm00:
-; DARWIN-64-PIC: 	movq	_xsrc at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; DARWIN-64-PIC: 	movq	_xsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -7802,53 +7813,53 @@
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: cam01:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	leal	dst+262144(,%eax,4), %eax
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	leal	dst+262144(,[[EAX]],4), %eax
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: cam01:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	leal	dst+262144(,%eax,4), %eax
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	leal	dst+262144(,[[EAX]],4), %eax
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: cam01:
-; LINUX-64-PIC: 	movq	dst at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; LINUX-64-PIC: 	movq	dst at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _cam01:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	leal	_dst+262144(,%eax,4), %eax
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	leal	_dst+262144(,[[EAX]],4), %eax
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _cam01:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_dst$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	leal	262144(%ecx,%eax,4), %eax
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_dst$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	leal	262144([[ECX]],[[EAX]],4), %eax
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _cam01:
 ; DARWIN-32-PIC: 	calll	L122$pb
 ; DARWIN-32-PIC-NEXT: L122$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_dst$non_lazy_ptr-L122$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	leal	262144(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_dst$non_lazy_ptr-L122$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	262144([[EAX]],[[ECX]],4), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _cam01:
-; DARWIN-64-STATIC: 	movq	_dst at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC: 	movq	_dst at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _cam01:
-; DARWIN-64-DYNAMIC: 	movq	_dst at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC: 	movq	_dst at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _cam01:
-; DARWIN-64-PIC: 	movq	_dst at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; DARWIN-64-PIC: 	movq	_dst at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -7864,52 +7875,52 @@
 
 ; LINUX-32-STATIC: cxm01:
 ; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	leal	xdst+262144(,%eax,4), %eax
+; LINUX-32-STATIC-NEXT: 	leal	xdst+262144(,[[EAX]],4), %eax
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: cxm01:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	leal	xdst+262144(,%eax,4), %eax
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	leal	xdst+262144(,[[EAX]],4), %eax
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: cxm01:
-; LINUX-64-PIC: 	movq	xdst at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; LINUX-64-PIC: 	movq	xdst at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _cxm01:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	leal	_xdst+262144(,%eax,4), %eax
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	leal	_xdst+262144(,[[EAX]],4), %eax
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _cxm01:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	L_xdst$non_lazy_ptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	leal	262144(%ecx,%eax,4), %eax
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	L_xdst$non_lazy_ptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	leal	262144([[ECX]],[[EAX]],4), %eax
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _cxm01:
 ; DARWIN-32-PIC: 	calll	L123$pb
 ; DARWIN-32-PIC-NEXT: L123$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	L_xdst$non_lazy_ptr-L123$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	leal	262144(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_xdst$non_lazy_ptr-L123$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	262144([[EAX]],[[ECX]],4), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _cxm01:
-; DARWIN-64-STATIC: 	movq	_xdst at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC: 	movq	_xdst at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _cxm01:
-; DARWIN-64-DYNAMIC: 	movq	_xdst at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC: 	movq	_xdst at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _cxm01:
-; DARWIN-64-PIC: 	movq	_xdst at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; DARWIN-64-PIC: 	movq	_xdst at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -7921,67 +7932,67 @@
 	%3 = bitcast i32* %2 to i8*
 	ret i8* %3
 ; LINUX-64-STATIC: cam02:
-; LINUX-64-STATIC: movq    ptr(%rip), %rax
-; LINUX-64-STATIC: leaq    262144(%rax,%rdi,4), %rax
+; LINUX-64-STATIC: movq    ptr(%rip), [[RAX:%r.x]]
+; LINUX-64-STATIC: leaq    262144([[RAX]],%rdi,4), %rax
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: cam02:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	movl	ptr, %ecx
-; LINUX-32-STATIC-NEXT: 	leal	262144(%ecx,%eax,4), %eax
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	ptr, [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	leal	262144([[ECX]],[[EAX]],4), %eax
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: cam02:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	movl	ptr, %ecx
-; LINUX-32-PIC-NEXT: 	leal	262144(%ecx,%eax,4), %eax
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	ptr, [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	leal	262144([[ECX]],[[EAX]],4), %eax
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: cam02:
-; LINUX-64-PIC: 	movq	ptr at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movq	(%rax), %rax
-; LINUX-64-PIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; LINUX-64-PIC: 	movq	ptr at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	([[RAX]]), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _cam02:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_ptr, %ecx
-; DARWIN-32-STATIC-NEXT: 	leal	262144(%ecx,%eax,4), %eax
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_ptr, [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	leal	262144([[ECX]],[[EAX]],4), %eax
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _cam02:
-; DARWIN-32-DYNAMIC: 	movl	L_ptr$non_lazy_ptr, %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	(%eax), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	leal	262144(%eax,%ecx,4), %eax
+; DARWIN-32-DYNAMIC: 	movl	L_ptr$non_lazy_ptr, [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	leal	262144([[EAX]],[[ECX]],4), %eax
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _cam02:
 ; DARWIN-32-PIC: 	calll	L124$pb
 ; DARWIN-32-PIC-NEXT: L124$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L124$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	leal	262144(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_ptr$non_lazy_ptr-L124$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	262144([[EAX]],[[ECX]],4), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _cam02:
-; DARWIN-64-STATIC: 	movq	_ptr at GOTPCREL(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	movq	(%rax), %rax
-; DARWIN-64-STATIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC: 	movq	_ptr at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	([[RAX]]), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _cam02:
-; DARWIN-64-DYNAMIC: 	movq	_ptr at GOTPCREL(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	movq	(%rax), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC: 	movq	_ptr at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	([[RAX]]), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _cam02:
-; DARWIN-64-PIC: 	movq	_ptr at GOTPCREL(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	movq	(%rax), %rax
-; DARWIN-64-PIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; DARWIN-64-PIC: 	movq	_ptr at GOTPCREL(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	([[RAX]]), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -7996,51 +8007,51 @@
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: cam03:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	leal	dsrc+262144(,%eax,4), %eax
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	leal	dsrc+262144(,[[EAX]],4), %eax
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: cam03:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	leal	dsrc+262144(,%eax,4), %eax
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	leal	dsrc+262144(,[[EAX]],4), %eax
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: cam03:
-; LINUX-64-PIC: 	movq	dsrc at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; LINUX-64-PIC: 	movq	dsrc at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _cam03:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	leal	_dsrc+262144(,%eax,4), %eax
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	leal	_dsrc+262144(,[[EAX]],4), %eax
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _cam03:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	leal	_dsrc+262144(,%eax,4), %eax
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	leal	_dsrc+262144(,[[EAX]],4), %eax
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _cam03:
 ; DARWIN-32-PIC: 	calll	L125$pb
 ; DARWIN-32-PIC-NEXT: L125$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	leal	(_dsrc-L125$pb)+262144(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	(_dsrc-L125$pb)+262144([[EAX]],[[ECX]],4), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _cam03:
-; DARWIN-64-STATIC: 	leaq	_dsrc(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC: 	leaq	_dsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _cam03:
-; DARWIN-64-DYNAMIC: 	leaq	_dsrc(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC: 	leaq	_dsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _cam03:
-; DARWIN-64-PIC: 	leaq	_dsrc(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; DARWIN-64-PIC: 	leaq	_dsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -8055,51 +8066,51 @@
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: cam04:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	leal	ddst+262144(,%eax,4), %eax
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	leal	ddst+262144(,[[EAX]],4), %eax
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: cam04:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	leal	ddst+262144(,%eax,4), %eax
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	leal	ddst+262144(,[[EAX]],4), %eax
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: cam04:
-; LINUX-64-PIC: 	movq	ddst at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; LINUX-64-PIC: 	movq	ddst at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _cam04:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	leal	_ddst+262144(,%eax,4), %eax
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	leal	_ddst+262144(,[[EAX]],4), %eax
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _cam04:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	leal	_ddst+262144(,%eax,4), %eax
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	leal	_ddst+262144(,[[EAX]],4), %eax
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _cam04:
 ; DARWIN-32-PIC: 	calll	L126$pb
 ; DARWIN-32-PIC-NEXT: L126$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	leal	(_ddst-L126$pb)+262144(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	(_ddst-L126$pb)+262144([[EAX]],[[ECX]],4), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _cam04:
-; DARWIN-64-STATIC: 	leaq	_ddst(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC: 	leaq	_ddst(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _cam04:
-; DARWIN-64-DYNAMIC: 	leaq	_ddst(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC: 	leaq	_ddst(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _cam04:
-; DARWIN-64-PIC: 	leaq	_ddst(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; DARWIN-64-PIC: 	leaq	_ddst(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -8111,62 +8122,62 @@
 	%3 = bitcast i32* %2 to i8*
 	ret i8* %3
 ; LINUX-64-STATIC: cam05:
-; LINUX-64-STATIC: movq    dptr(%rip), %rax
-; LINUX-64-STATIC: leaq    262144(%rax,%rdi,4), %rax
+; LINUX-64-STATIC: movq    dptr(%rip), [[RAX:%r.x]]
+; LINUX-64-STATIC: leaq    262144([[RAX]],%rdi,4), %rax
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: cam05:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	movl	dptr, %ecx
-; LINUX-32-STATIC-NEXT: 	leal	262144(%ecx,%eax,4), %eax
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	dptr, [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	leal	262144([[ECX]],[[EAX]],4), %eax
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: cam05:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	movl	dptr, %ecx
-; LINUX-32-PIC-NEXT: 	leal	262144(%ecx,%eax,4), %eax
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	dptr, [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	leal	262144([[ECX]],[[EAX]],4), %eax
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: cam05:
-; LINUX-64-PIC: 	movq	dptr at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	movq	(%rax), %rax
-; LINUX-64-PIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; LINUX-64-PIC: 	movq	dptr at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	([[RAX]]), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _cam05:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_dptr, %ecx
-; DARWIN-32-STATIC-NEXT: 	leal	262144(%ecx,%eax,4), %eax
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_dptr, [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	leal	262144([[ECX]],[[EAX]],4), %eax
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _cam05:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	_dptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	leal	262144(%ecx,%eax,4), %eax
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	_dptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	leal	262144([[ECX]],[[EAX]],4), %eax
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _cam05:
 ; DARWIN-32-PIC: 	calll	L127$pb
 ; DARWIN-32-PIC-NEXT: L127$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	_dptr-L127$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	leal	262144(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	_dptr-L127$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	262144([[EAX]],[[ECX]],4), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _cam05:
-; DARWIN-64-STATIC: 	movq	_dptr(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC: 	movq	_dptr(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _cam05:
-; DARWIN-64-DYNAMIC: 	movq	_dptr(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC: 	movq	_dptr(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _cam05:
-; DARWIN-64-PIC: 	movq	_dptr(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; DARWIN-64-PIC: 	movq	_dptr(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -8181,51 +8192,51 @@
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: cam06:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	leal	lsrc+262144(,%eax,4), %eax
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	leal	lsrc+262144(,[[EAX]],4), %eax
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: cam06:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	leal	lsrc+262144(,%eax,4), %eax
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	leal	lsrc+262144(,[[EAX]],4), %eax
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: cam06:
-; LINUX-64-PIC: 	leaq	lsrc(%rip), %rax
-; LINUX-64-PIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; LINUX-64-PIC: 	leaq	lsrc(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _cam06:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	leal	_lsrc+262144(,%eax,4), %eax
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	leal	_lsrc+262144(,[[EAX]],4), %eax
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _cam06:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	leal	_lsrc+262144(,%eax,4), %eax
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	leal	_lsrc+262144(,[[EAX]],4), %eax
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _cam06:
 ; DARWIN-32-PIC: 	calll	L128$pb
 ; DARWIN-32-PIC-NEXT: L128$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	leal	(_lsrc-L128$pb)+262144(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	(_lsrc-L128$pb)+262144([[EAX]],[[ECX]],4), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _cam06:
-; DARWIN-64-STATIC: 	leaq	_lsrc(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC: 	leaq	_lsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _cam06:
-; DARWIN-64-DYNAMIC: 	leaq	_lsrc(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC: 	leaq	_lsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _cam06:
-; DARWIN-64-PIC: 	leaq	_lsrc(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; DARWIN-64-PIC: 	leaq	_lsrc(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -8240,51 +8251,51 @@
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: cam07:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	leal	ldst+262144(,%eax,4), %eax
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	leal	ldst+262144(,[[EAX]],4), %eax
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: cam07:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	leal	ldst+262144(,%eax,4), %eax
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	leal	ldst+262144(,[[EAX]],4), %eax
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: cam07:
-; LINUX-64-PIC: 	leaq	ldst(%rip), %rax
-; LINUX-64-PIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; LINUX-64-PIC: 	leaq	ldst(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _cam07:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	leal	_ldst+262144(,%eax,4), %eax
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	leal	_ldst+262144(,[[EAX]],4), %eax
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _cam07:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	leal	_ldst+262144(,%eax,4), %eax
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	leal	_ldst+262144(,[[EAX]],4), %eax
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _cam07:
 ; DARWIN-32-PIC: 	calll	L129$pb
 ; DARWIN-32-PIC-NEXT: L129$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	leal	(_ldst-L129$pb)+262144(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	(_ldst-L129$pb)+262144([[EAX]],[[ECX]],4), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _cam07:
-; DARWIN-64-STATIC: 	leaq	_ldst(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC: 	leaq	_ldst(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _cam07:
-; DARWIN-64-DYNAMIC: 	leaq	_ldst(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC: 	leaq	_ldst(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _cam07:
-; DARWIN-64-PIC: 	leaq	_ldst(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; DARWIN-64-PIC: 	leaq	_ldst(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -8296,61 +8307,61 @@
 	%3 = bitcast i32* %2 to i8*
 	ret i8* %3
 ; LINUX-64-STATIC: cam08:
-; LINUX-64-STATIC: movq    lptr(%rip), %rax
-; LINUX-64-STATIC: leaq    262144(%rax,%rdi,4), %rax
+; LINUX-64-STATIC: movq    lptr(%rip), [[RAX:%r.x]]
+; LINUX-64-STATIC: leaq    262144([[RAX]],%rdi,4), %rax
 ; LINUX-64-STATIC: ret
 
 ; LINUX-32-STATIC: cam08:
-; LINUX-32-STATIC: 	movl	4(%esp), %eax
-; LINUX-32-STATIC-NEXT: 	movl	lptr, %ecx
-; LINUX-32-STATIC-NEXT: 	leal	262144(%ecx,%eax,4), %eax
+; LINUX-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	movl	lptr, [[ECX:%e.x]]
+; LINUX-32-STATIC-NEXT: 	leal	262144([[ECX]],[[EAX]],4), %eax
 ; LINUX-32-STATIC-NEXT: 	ret
 
 ; LINUX-32-PIC: cam08:
-; LINUX-32-PIC: 	movl	4(%esp), %eax
-; LINUX-32-PIC-NEXT: 	movl	lptr, %ecx
-; LINUX-32-PIC-NEXT: 	leal	262144(%ecx,%eax,4), %eax
+; LINUX-32-PIC: 	movl	4(%esp), [[EAX:%e.x]]
+; LINUX-32-PIC-NEXT: 	movl	lptr, [[ECX:%e.x]]
+; LINUX-32-PIC-NEXT: 	leal	262144([[ECX]],[[EAX]],4), %eax
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: cam08:
-; LINUX-64-PIC: 	movq	lptr(%rip), %rax
-; LINUX-64-PIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; LINUX-64-PIC: 	movq	lptr(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _cam08:
-; DARWIN-32-STATIC: 	movl	4(%esp), %eax
-; DARWIN-32-STATIC-NEXT: 	movl	_lptr, %ecx
-; DARWIN-32-STATIC-NEXT: 	leal	262144(%ecx,%eax,4), %eax
+; DARWIN-32-STATIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	movl	_lptr, [[ECX:%e.x]]
+; DARWIN-32-STATIC-NEXT: 	leal	262144([[ECX]],[[EAX]],4), %eax
 ; DARWIN-32-STATIC-NEXT: 	ret
 
 ; DARWIN-32-DYNAMIC: _cam08:
-; DARWIN-32-DYNAMIC: 	movl	4(%esp), %eax
-; DARWIN-32-DYNAMIC-NEXT: 	movl	_lptr, %ecx
-; DARWIN-32-DYNAMIC-NEXT: 	leal	262144(%ecx,%eax,4), %eax
+; DARWIN-32-DYNAMIC: 	movl	4(%esp), [[EAX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	movl	_lptr, [[ECX:%e.x]]
+; DARWIN-32-DYNAMIC-NEXT: 	leal	262144([[ECX]],[[EAX]],4), %eax
 ; DARWIN-32-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-32-PIC: _cam08:
 ; DARWIN-32-PIC: 	calll	L130$pb
 ; DARWIN-32-PIC-NEXT: L130$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	4(%esp), %ecx
-; DARWIN-32-PIC-NEXT: 	movl	_lptr-L130$pb(%eax), %eax
-; DARWIN-32-PIC-NEXT: 	leal	262144(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	4(%esp), [[ECX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	_lptr-L130$pb([[EAX]]), [[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	262144([[EAX]],[[ECX]],4), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _cam08:
-; DARWIN-64-STATIC: 	movq	_lptr(%rip), %rax
-; DARWIN-64-STATIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC: 	movq	_lptr(%rip), [[RAX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _cam08:
-; DARWIN-64-DYNAMIC: 	movq	_lptr(%rip), %rax
-; DARWIN-64-DYNAMIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC: 	movq	_lptr(%rip), [[RAX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _cam08:
-; DARWIN-64-PIC: 	movq	_lptr(%rip), %rax
-; DARWIN-64-PIC-NEXT: 	leaq	262144(%rax,%rdi,4), %rax
+; DARWIN-64-PIC: 	movq	_lptr(%rip), [[RAX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	leaq	262144([[RAX]],%rdi,4), %rax
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -8648,8 +8659,8 @@
 ; DARWIN-32-PIC: _address:
 ; DARWIN-32-PIC: 	calll	L133$pb
 ; DARWIN-32-PIC-NEXT: L133$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	L_callee$non_lazy_ptr-L133$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_callee$non_lazy_ptr-L133$pb([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _address:
@@ -8697,8 +8708,8 @@
 ; DARWIN-32-PIC: _laddress:
 ; DARWIN-32-PIC: 	calll	L134$pb
 ; DARWIN-32-PIC-NEXT: L134$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	leal	_lcallee-L134$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	_lcallee-L134$pb([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _laddress:
@@ -8744,8 +8755,8 @@
 ; DARWIN-32-PIC: _daddress:
 ; DARWIN-32-PIC: 	calll	L135$pb
 ; DARWIN-32-PIC-NEXT: L135$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	leal	_dcallee-L135$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	leal	_dcallee-L135$pb([[EAX]]), %eax
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _daddress:
@@ -9206,11 +9217,11 @@
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: icaller:
-; LINUX-64-PIC: 	pushq	%rbx
-; LINUX-64-PIC-NEXT: 	movq	ifunc at GOTPCREL(%rip), %rbx
-; LINUX-64-PIC-NEXT: 	callq	*(%rbx)
-; LINUX-64-PIC-NEXT: 	callq	*(%rbx)
-; LINUX-64-PIC-NEXT: 	popq	%rbx
+; LINUX-64-PIC: 	pushq	[[RBX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	ifunc at GOTPCREL(%rip), [[RBX:%r.x]]
+; LINUX-64-PIC-NEXT: 	callq	*([[RBX]])
+; LINUX-64-PIC-NEXT: 	callq	*([[RBX]])
+; LINUX-64-PIC-NEXT: 	popq	[[RBX:%r.x]]
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _icaller:
@@ -9235,8 +9246,8 @@
 ; DARWIN-32-PIC-NEXT: 	subl	$8, %esp
 ; DARWIN-32-PIC-NEXT: 	calll	L142$pb
 ; DARWIN-32-PIC-NEXT: L142$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	L_ifunc$non_lazy_ptr-L142$pb(%eax), %esi
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_ifunc$non_lazy_ptr-L142$pb([[EAX]]), %esi
 ; DARWIN-32-PIC-NEXT: 	calll	*(%esi)
 ; DARWIN-32-PIC-NEXT: 	calll	*(%esi)
 ; DARWIN-32-PIC-NEXT: 	addl	$8, %esp
@@ -9244,27 +9255,27 @@
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _icaller:
-; DARWIN-64-STATIC: 	pushq	%rbx
-; DARWIN-64-STATIC-NEXT: 	movq	_ifunc at GOTPCREL(%rip), %rbx
-; DARWIN-64-STATIC-NEXT: 	callq	*(%rbx)
-; DARWIN-64-STATIC-NEXT: 	callq	*(%rbx)
-; DARWIN-64-STATIC-NEXT: 	popq	%rbx
+; DARWIN-64-STATIC: 	pushq	[[RBX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_ifunc at GOTPCREL(%rip), [[RBX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	callq	*([[RBX]])
+; DARWIN-64-STATIC-NEXT: 	callq	*([[RBX]])
+; DARWIN-64-STATIC-NEXT: 	popq	[[RBX:%r.x]]
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _icaller:
-; DARWIN-64-DYNAMIC: 	pushq	%rbx
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_ifunc at GOTPCREL(%rip), %rbx
-; DARWIN-64-DYNAMIC-NEXT: 	callq	*(%rbx)
-; DARWIN-64-DYNAMIC-NEXT: 	callq	*(%rbx)
-; DARWIN-64-DYNAMIC-NEXT: 	popq	%rbx
+; DARWIN-64-DYNAMIC: 	pushq	[[RBX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_ifunc at GOTPCREL(%rip), [[RBX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	callq	*([[RBX]])
+; DARWIN-64-DYNAMIC-NEXT: 	callq	*([[RBX]])
+; DARWIN-64-DYNAMIC-NEXT: 	popq	[[RBX:%r.x]]
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _icaller:
-; DARWIN-64-PIC: 	pushq	%rbx
-; DARWIN-64-PIC-NEXT: 	movq	_ifunc at GOTPCREL(%rip), %rbx
-; DARWIN-64-PIC-NEXT: 	callq	*(%rbx)
-; DARWIN-64-PIC-NEXT: 	callq	*(%rbx)
-; DARWIN-64-PIC-NEXT: 	popq	%rbx
+; DARWIN-64-PIC: 	pushq	[[RBX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_ifunc at GOTPCREL(%rip), [[RBX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	callq	*([[RBX]])
+; DARWIN-64-PIC-NEXT: 	callq	*([[RBX]])
+; DARWIN-64-PIC-NEXT: 	popq	[[RBX:%r.x]]
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -9296,11 +9307,11 @@
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: dicaller:
-; LINUX-64-PIC: 	pushq	%rbx
-; LINUX-64-PIC-NEXT: 	movq	difunc at GOTPCREL(%rip), %rbx
-; LINUX-64-PIC-NEXT: 	callq	*(%rbx)
-; LINUX-64-PIC-NEXT: 	callq	*(%rbx)
-; LINUX-64-PIC-NEXT: 	popq	%rbx
+; LINUX-64-PIC: 	pushq	[[RBX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	difunc at GOTPCREL(%rip), [[RBX:%r.x]]
+; LINUX-64-PIC-NEXT: 	callq	*([[RBX]])
+; LINUX-64-PIC-NEXT: 	callq	*([[RBX]])
+; LINUX-64-PIC-NEXT: 	popq	[[RBX:%r.x]]
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _dicaller:
@@ -9461,11 +9472,11 @@
 ; LINUX-32-PIC-NEXT: 	ret
 
 ; LINUX-64-PIC: itailcaller:
-; LINUX-64-PIC: 	pushq	%rbx
-; LINUX-64-PIC-NEXT: 	movq	ifunc at GOTPCREL(%rip), %rbx
-; LINUX-64-PIC-NEXT: 	callq	*(%rbx)
-; LINUX-64-PIC-NEXT: 	callq	*(%rbx)
-; LINUX-64-PIC-NEXT: 	popq	%rbx
+; LINUX-64-PIC: 	pushq	[[RBX:%r.x]]
+; LINUX-64-PIC-NEXT: 	movq	ifunc at GOTPCREL(%rip), [[RBX:%r.x]]
+; LINUX-64-PIC-NEXT: 	callq	*([[RBX]])
+; LINUX-64-PIC-NEXT: 	callq	*([[RBX]])
+; LINUX-64-PIC-NEXT: 	popq	[[RBX:%r.x]]
 ; LINUX-64-PIC-NEXT: 	ret
 
 ; DARWIN-32-STATIC: _itailcaller:
@@ -9490,8 +9501,8 @@
 ; DARWIN-32-PIC-NEXT: 	subl	$8, %esp
 ; DARWIN-32-PIC-NEXT: 	calll	L145$pb
 ; DARWIN-32-PIC-NEXT: L145$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	movl	L_ifunc$non_lazy_ptr-L145$pb(%eax), %esi
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	movl	L_ifunc$non_lazy_ptr-L145$pb([[EAX]]), %esi
 ; DARWIN-32-PIC-NEXT: 	calll	*(%esi)
 ; DARWIN-32-PIC-NEXT: 	calll	*(%esi)
 ; DARWIN-32-PIC-NEXT: 	addl	$8, %esp
@@ -9499,27 +9510,27 @@
 ; DARWIN-32-PIC-NEXT: 	ret
 
 ; DARWIN-64-STATIC: _itailcaller:
-; DARWIN-64-STATIC: 	pushq	%rbx
-; DARWIN-64-STATIC-NEXT: 	movq	_ifunc at GOTPCREL(%rip), %rbx
-; DARWIN-64-STATIC-NEXT: 	callq	*(%rbx)
-; DARWIN-64-STATIC-NEXT: 	callq	*(%rbx)
-; DARWIN-64-STATIC-NEXT: 	popq	%rbx
+; DARWIN-64-STATIC: 	pushq	[[RBX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	movq	_ifunc at GOTPCREL(%rip), [[RBX:%r.x]]
+; DARWIN-64-STATIC-NEXT: 	callq	*([[RBX]])
+; DARWIN-64-STATIC-NEXT: 	callq	*([[RBX]])
+; DARWIN-64-STATIC-NEXT: 	popq	[[RBX:%r.x]]
 ; DARWIN-64-STATIC-NEXT: 	ret
 
 ; DARWIN-64-DYNAMIC: _itailcaller:
-; DARWIN-64-DYNAMIC: 	pushq	%rbx
-; DARWIN-64-DYNAMIC-NEXT: 	movq	_ifunc at GOTPCREL(%rip), %rbx
-; DARWIN-64-DYNAMIC-NEXT: 	callq	*(%rbx)
-; DARWIN-64-DYNAMIC-NEXT: 	callq	*(%rbx)
-; DARWIN-64-DYNAMIC-NEXT: 	popq	%rbx
+; DARWIN-64-DYNAMIC: 	pushq	[[RBX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	movq	_ifunc at GOTPCREL(%rip), [[RBX:%r.x]]
+; DARWIN-64-DYNAMIC-NEXT: 	callq	*([[RBX]])
+; DARWIN-64-DYNAMIC-NEXT: 	callq	*([[RBX]])
+; DARWIN-64-DYNAMIC-NEXT: 	popq	[[RBX:%r.x]]
 ; DARWIN-64-DYNAMIC-NEXT: 	ret
 
 ; DARWIN-64-PIC: _itailcaller:
-; DARWIN-64-PIC: 	pushq	%rbx
-; DARWIN-64-PIC-NEXT: 	movq	_ifunc at GOTPCREL(%rip), %rbx
-; DARWIN-64-PIC-NEXT: 	callq	*(%rbx)
-; DARWIN-64-PIC-NEXT: 	callq	*(%rbx)
-; DARWIN-64-PIC-NEXT: 	popq	%rbx
+; DARWIN-64-PIC: 	pushq	[[RBX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	movq	_ifunc at GOTPCREL(%rip), [[RBX:%r.x]]
+; DARWIN-64-PIC-NEXT: 	callq	*([[RBX]])
+; DARWIN-64-PIC-NEXT: 	callq	*([[RBX]])
+; DARWIN-64-PIC-NEXT: 	popq	[[RBX:%r.x]]
 ; DARWIN-64-PIC-NEXT: 	ret
 }
 
@@ -9547,8 +9558,8 @@
 
 ; LINUX-64-PIC: ditailcaller:
 ; LINUX-64-PIC: 	pushq
-; LINUX-64-PIC-NEXT: 	movq	difunc at GOTPCREL(%rip), %rax
-; LINUX-64-PIC-NEXT: 	callq	*(%rax)
+; LINUX-64-PIC-NEXT: 	movq	difunc at GOTPCREL(%rip), [[RAX:%r.x]]
+; LINUX-64-PIC-NEXT: 	callq	*([[RAX]])
 ; LINUX-64-PIC-NEXT: 	popq
 ; LINUX-64-PIC-NEXT: 	ret
 
@@ -9568,8 +9579,8 @@
 ; DARWIN-32-PIC: 	subl	$12, %esp
 ; DARWIN-32-PIC-NEXT: 	calll	L146$pb
 ; DARWIN-32-PIC-NEXT: L146$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	calll	*_difunc-L146$pb(%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	calll	*_difunc-L146$pb([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	addl	$12, %esp
 ; DARWIN-32-PIC-NEXT: 	ret
 
@@ -9635,8 +9646,8 @@
 ; DARWIN-32-PIC: 	subl	$12, %esp
 ; DARWIN-32-PIC-NEXT: 	calll	L147$pb
 ; DARWIN-32-PIC-NEXT: L147$pb:
-; DARWIN-32-PIC-NEXT: 	popl	%eax
-; DARWIN-32-PIC-NEXT: 	calll	*_lifunc-L147$pb(%eax)
+; DARWIN-32-PIC-NEXT: 	popl	[[EAX:%e.x]]
+; DARWIN-32-PIC-NEXT: 	calll	*_lifunc-L147$pb([[EAX]])
 ; DARWIN-32-PIC-NEXT: 	addl	$12, %esp
 ; DARWIN-32-PIC-NEXT: 	ret
 



From rdivacky at freebsd.org  Tue Apr  5 15:25:36 2011
From: rdivacky at freebsd.org (Roman Divacky)
Date: Tue, 05 Apr 2011 20:25:36 -0000
Subject: [llvm-commits] [llvm] r128920 - /llvm/trunk/lib/Support/Host.cpp
Message-ID: <20110405202536.443972A6C12D@llvm.org>

Author: rdivacky
Date: Tue Apr  5 15:25:36 2011
New Revision: 128920

URL: http://llvm.org/viewvc/llvm-project?rev=128920&view=rev
Log:
Add support for detection of Intel SandyBridge.


Modified:
    llvm/trunk/lib/Support/Host.cpp

Modified: llvm/trunk/lib/Support/Host.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Host.cpp?rev=128920&r1=128919&r2=128920&view=diff
==============================================================================
--- llvm/trunk/lib/Support/Host.cpp (original)
+++ llvm/trunk/lib/Support/Host.cpp Tue Apr  5 15:25:36 2011
@@ -214,6 +214,8 @@
                // As found in a Summer 2010 model iMac.
       case 37: // Intel Core i7, laptop version.
         return "corei7";
+      case 42: // SandyBridge
+        return "sandybridge";
 
       case 28: // Intel Atom processor. All processors are manufactured using
                // the 45 nm process



From johnny.chen at apple.com  Tue Apr  5 15:32:23 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Tue, 05 Apr 2011 20:32:23 -0000
Subject: [llvm-commits] [llvm] r128922 - in /llvm/trunk:
 lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
 test/MC/Disassembler/ARM/arm-tests.txt
Message-ID: <20110405203223.41A102A6C12D@llvm.org>

Author: johnny
Date: Tue Apr  5 15:32:23 2011
New Revision: 128922

URL: http://llvm.org/viewvc/llvm-project?rev=128922&view=rev
Log:
The r128085 checkin modified the operand ordering for MRC/MRC2 instructions.
Modify DisassembleCoprocessor() of ARMDisassemblerCore.cpp to react to the change.

rdar://problem/9236873

Modified:
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
    llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp?rev=128922&r1=128921&r2=128922&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp Tue Apr  5 15:32:23 2011
@@ -681,10 +681,17 @@
   // CDP/CDP2 has no GPR operand; the opc1 operand is also wider (Inst{23-20}).
   bool NoGPR = (Opcode == ARM::CDP || Opcode == ARM::CDP2);
   bool LdStCop = LdStCopOpcode(Opcode);
+  bool RtOut = (Opcode == ARM::MRC || Opcode == ARM::MRC2);
 
   OpIdx = 0;
 
+  if (RtOut) {
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
+                                                       decodeRd(insn))));
+    ++OpIdx;
+  }
   MI.addOperand(MCOperand::CreateImm(GetCoprocessor(insn)));
+  ++OpIdx;
 
   if (LdStCop) {
     // Unindex if P:W = 0b00 --> _OPTION variant
@@ -694,6 +701,7 @@
 
     MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRn(insn))));
+    OpIdx += 2;
 
     if (PW) {
       MI.addOperand(MCOperand::CreateReg(0));
@@ -704,19 +712,23 @@
       unsigned Offset = ARM_AM::getAM2Opc(AddrOpcode, slice(insn, 7, 0) << 2,
                                           ARM_AM::no_shift, IndexMode);
       MI.addOperand(MCOperand::CreateImm(Offset));
-      OpIdx = 5;
+      OpIdx += 2;
     } else {
       MI.addOperand(MCOperand::CreateImm(slice(insn, 7, 0)));
-      OpIdx = 4;
+      ++OpIdx;
     }
   } else {
     MI.addOperand(MCOperand::CreateImm(OneCopOpc ? GetCopOpc(insn)
                                                  : GetCopOpc1(insn, NoGPR)));
+    ++OpIdx;
 
-    MI.addOperand(NoGPR ? MCOperand::CreateImm(decodeRd(insn))
-                        : MCOperand::CreateReg(
-                            getRegisterEnum(B, ARM::GPRRegClassID,
-                                            decodeRd(insn))));
+    if (!RtOut) {
+      MI.addOperand(NoGPR ? MCOperand::CreateImm(decodeRd(insn))
+                          : MCOperand::CreateReg(
+                                getRegisterEnum(B, ARM::GPRRegClassID,
+                                                decodeRd(insn))));
+      ++OpIdx;
+    }
 
     MI.addOperand(OneCopOpc ? MCOperand::CreateReg(
                                 getRegisterEnum(B, ARM::GPRRegClassID,
@@ -725,7 +737,7 @@
 
     MI.addOperand(MCOperand::CreateImm(decodeRm(insn)));
 
-    OpIdx = 5;
+    OpIdx += 2;
 
     if (!OneCopOpc) {
       MI.addOperand(MCOperand::CreateImm(GetCopOpc2(insn)));

Modified: llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt?rev=128922&r1=128921&r2=128922&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt (original)
+++ llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt Tue Apr  5 15:32:23 2011
@@ -236,3 +236,6 @@
 
 # CHECK:	streq	r1, [sp], #-1567
 0x1f 0x16 0xd 0x4
+
+# CHECK:	mrchs	p2, #3, r11, c13, c6, #6
+0xd6 0xb2 0x7d 0x2e



From nicholas at mxc.ca  Tue Apr  5 15:39:27 2011
From: nicholas at mxc.ca (Nick Lewycky)
Date: Tue, 05 Apr 2011 20:39:27 -0000
Subject: [llvm-commits] [llvm] r128924 - in
 /llvm/trunk/lib/Transforms/Instrumentation: MaximumSpanningTree.h
 OptimalEdgeProfiling.cpp
Message-ID: <20110405203927.E36F22A6C12D@llvm.org>

Author: nicholas
Date: Tue Apr  5 15:39:27 2011
New Revision: 128924

URL: http://llvm.org/viewvc/llvm-project?rev=128924&view=rev
Log:
Fix typos. Adjust some whitespace for style. No functionality change.

Modified:
    llvm/trunk/lib/Transforms/Instrumentation/MaximumSpanningTree.h
    llvm/trunk/lib/Transforms/Instrumentation/OptimalEdgeProfiling.cpp

Modified: llvm/trunk/lib/Transforms/Instrumentation/MaximumSpanningTree.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Instrumentation/MaximumSpanningTree.h?rev=128924&r1=128923&r2=128924&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Instrumentation/MaximumSpanningTree.h (original)
+++ llvm/trunk/lib/Transforms/Instrumentation/MaximumSpanningTree.h Tue Apr  5 15:39:27 2011
@@ -7,7 +7,7 @@
 //
 //===----------------------------------------------------------------------===//
 //
-// This module privides means for calculating a maximum spanning tree for a
+// This module provides means for calculating a maximum spanning tree for a
 // given set of weighted edges. The type parameter T is the type of a node.
 //
 //===----------------------------------------------------------------------===//

Modified: llvm/trunk/lib/Transforms/Instrumentation/OptimalEdgeProfiling.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Instrumentation/OptimalEdgeProfiling.cpp?rev=128924&r1=128923&r2=128924&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Instrumentation/OptimalEdgeProfiling.cpp (original)
+++ llvm/trunk/lib/Transforms/Instrumentation/OptimalEdgeProfiling.cpp Tue Apr  5 15:39:27 2011
@@ -120,14 +120,14 @@
   NumEdgesInserted = 0;
 
   std::vector<Constant*> Initializer(NumEdges);
-  Constant* Zero = ConstantInt::get(Int32, 0);
-  Constant* Uncounted = ConstantInt::get(Int32, ProfileInfoLoader::Uncounted);
+  Constant *Zero = ConstantInt::get(Int32, 0);
+  Constant *Uncounted = ConstantInt::get(Int32, ProfileInfoLoader::Uncounted);
 
   // Instrument all of the edges not in MST...
   unsigned i = 0;
   for (Module::iterator F = M.begin(), E = M.end(); F != E; ++F) {
     if (F->isDeclaration()) continue;
-    DEBUG(dbgs()<<"Working on "<<F->getNameStr()<<"\n");
+    DEBUG(dbgs() << "Working on " << F->getNameStr() << "\n");
 
     // Calculate a Maximum Spanning Tree with the edge weights determined by
     // ProfileEstimator. ProfileEstimator also assign weights to the virtual
@@ -139,17 +139,17 @@
     ProfileInfo::EdgeWeights ECs =
       getAnalysis<ProfileInfo>(*F).getEdgeWeights(F);
     std::vector<ProfileInfo::EdgeWeight> EdgeVector(ECs.begin(), ECs.end());
-    MaximumSpanningTree<BasicBlock> MST (EdgeVector);
-    std::stable_sort(MST.begin(),MST.end());
+    MaximumSpanningTree<BasicBlock> MST(EdgeVector);
+    std::stable_sort(MST.begin(), MST.end());
 
     // Check if (0,entry) not in the MST. If not, instrument edge
     // (IncrementCounterInBlock()) and set the counter initially to zero, if
     // the edge is in the MST the counter is initialised to -1.
 
     BasicBlock *entry = &(F->getEntryBlock());
-    ProfileInfo::Edge edge = ProfileInfo::getEdge(0,entry);
+    ProfileInfo::Edge edge = ProfileInfo::getEdge(0, entry);
     if (!std::binary_search(MST.begin(), MST.end(), edge)) {
-      printEdgeCounter(edge,entry,i);
+      printEdgeCounter(edge, entry, i);
       IncrementCounterInBlock(entry, i, Counters); ++NumEdgesInserted;
       Initializer[i++] = (Zero);
     } else{
@@ -170,9 +170,9 @@
       // has no successors, the virtual edge (BB,0) is processed.
       TerminatorInst *TI = BB->getTerminator();
       if (TI->getNumSuccessors() == 0) {
-        ProfileInfo::Edge edge = ProfileInfo::getEdge(BB,0);
+        ProfileInfo::Edge edge = ProfileInfo::getEdge(BB, 0);
         if (!std::binary_search(MST.begin(), MST.end(), edge)) {
-          printEdgeCounter(edge,BB,i);
+          printEdgeCounter(edge, BB, i);
           IncrementCounterInBlock(BB, i, Counters); ++NumEdgesInserted;
           Initializer[i++] = (Zero);
         } else{
@@ -195,11 +195,11 @@
           // otherwise insert it in the successor block.
           if (TI->getNumSuccessors() == 1) {
             // Insert counter at the start of the block
-            printEdgeCounter(edge,BB,i);
+            printEdgeCounter(edge, BB, i);
             IncrementCounterInBlock(BB, i, Counters); ++NumEdgesInserted;
           } else {
             // Insert counter at the start of the block
-            printEdgeCounter(edge,Succ,i);
+            printEdgeCounter(edge, Succ, i);
             IncrementCounterInBlock(Succ, i, Counters); ++NumEdgesInserted;
           }
           Initializer[i++] = (Zero);
@@ -212,9 +212,9 @@
 
   // Check if the number of edges counted at first was the number of edges we
   // considered for instrumentation.
-  assert(i==NumEdges && "the number of edges in counting array is wrong");
+  assert(i == NumEdges && "the number of edges in counting array is wrong");
 
-  // Assing the now completely defined initialiser to the array.
+  // Assign the now completely defined initialiser to the array.
   Constant *init = ConstantArray::get(ATy, Initializer);
   Counters->setInitializer(init);
 



From bob.wilson at apple.com  Tue Apr  5 15:44:15 2011
From: bob.wilson at apple.com (Bob Wilson)
Date: Tue, 05 Apr 2011 20:44:15 -0000
Subject: [llvm-commits] [llvm] r128925 -
	/llvm/trunk/lib/CodeGen/RegisterScavenging.cpp
Message-ID: <20110405204415.D3B362A6C12D@llvm.org>

Author: bwilson
Date: Tue Apr  5 15:44:15 2011
New Revision: 128925

URL: http://llvm.org/viewvc/llvm-project?rev=128925&view=rev
Log:
Add an assertion instead of crashing when the scavenger goes past the end
of a basic block.

Modified:
    llvm/trunk/lib/CodeGen/RegisterScavenging.cpp

Modified: llvm/trunk/lib/CodeGen/RegisterScavenging.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterScavenging.cpp?rev=128925&r1=128924&r2=128925&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegisterScavenging.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegisterScavenging.cpp Tue Apr  5 15:44:15 2011
@@ -126,9 +126,10 @@
     MBBI = MBB->begin();
     Tracking = true;
   } else {
-    assert(MBBI != MBB->end() && "Already at the end of the basic block!");
+    assert(MBBI != MBB->end() && "Already past the end of the basic block!");
     MBBI = llvm::next(MBBI);
   }
+  assert(MBBI != MBB->end() && "Already at the end of the basic block!");
 
   MachineInstr *MI = MBBI;
 



From aggarwa4 at illinois.edu  Tue Apr  5 15:54:12 2011
From: aggarwa4 at illinois.edu (Arushi Aggarwal)
Date: Tue, 05 Apr 2011 20:54:12 -0000
Subject: [llvm-commits] [poolalloc] r128926 -
	/poolalloc/trunk/lib/AssistDS/VarArgsFunc.cpp
Message-ID: <20110405205412.4E1722A6C12D@llvm.org>

Author: aggarwa4
Date: Tue Apr  5 15:54:12 2011
New Revision: 128926

URL: http://llvm.org/viewvc/llvm-project?rev=128926&view=rev
Log:
Added comments and debug printing.

Modified:
    poolalloc/trunk/lib/AssistDS/VarArgsFunc.cpp

Modified: poolalloc/trunk/lib/AssistDS/VarArgsFunc.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/AssistDS/VarArgsFunc.cpp?rev=128926&r1=128925&r2=128926&view=diff
==============================================================================
--- poolalloc/trunk/lib/AssistDS/VarArgsFunc.cpp (original)
+++ poolalloc/trunk/lib/AssistDS/VarArgsFunc.cpp Tue Apr  5 15:54:12 2011
@@ -6,6 +6,12 @@
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
+// Convert calls of type 
+// call(bitcast F to (...)*) () 
+// to 
+// call F()
+// if the number and types of arguments passed matches.
+//===----------------------------------------------------------------------===//
 #define DEBUG_TYPE "varargfunc"
 
 #include "llvm/Instructions.h"
@@ -22,6 +28,7 @@
 
 using namespace llvm;
 
+// Pass statistics
 STATISTIC(numSimplified, "Number of Calls Simplified");
 
 namespace {
@@ -29,32 +36,55 @@
   public:
     static char ID;
     VarArgsFunc() : ModulePass(&ID) {}
+
+    //
+    // Method: runOnModule()
+    // Description:
+    //  Entry point for this LLVM pass. Search for functions that are
+    //  unnecessarily casted to varargs type, in a CallInst.
+    //  Replace with direct calls to the function
+    //
+    // Inputs:
+    // M - A reference to the LLVM module to transform.
+    //
+    // Outputs:
+    // M - The transformed LLVM module.
+    //
+    // Return value:
+    //  true  - The module was modified.
+    //  false - The module was not modified.
+    //
     bool runOnModule(Module& M) {
-      bool changed = false;
       std::vector<CallInst*> worklist;
+
       for (Module::iterator I = M.begin(); I != M.end(); ++I) {
-        if (!I->isDeclaration() && !I->mayBeOverridden()) {
-          //Call Sites
-          for(Value::use_iterator ui = I->use_begin(), ue = I->use_end();
-              ui != ue; ++ui) 
-            //Bitcast
-            if (Constant *C = dyn_cast<Constant>(ui)) 
-              if (ConstantExpr *CE = dyn_cast<ConstantExpr>(C)) 
-                if (CE->getOpcode() == Instruction::BitCast) 
-                  if(CE->getOperand(0) == I) 
-                    if(const FunctionType *FTy  = dyn_cast<FunctionType>
-                       ((cast<PointerType>(CE->getType()))->getElementType())) 
-                      //casting to a varargs funtion
-                      if(FTy->isVarArg()) 
-                        for(Value::use_iterator uii = CE->use_begin(),
-                            uee = CE->use_end(); uii != uee; ++uii) 
-                          if (CallInst* CI = dyn_cast<CallInst>(uii)) 
-                            if(CI->getCalledValue() == CE) 
-                               worklist.push_back(CI);
-        }
+        // Go through all the functions
+        if (I->mayBeOverridden()) 
+          continue;
+        //Uses of Function I
+        for(Value::use_iterator ui = I->use_begin(), ue = I->use_end();
+            ui != ue; ++ui) 
+          //Find all casted uses of the function
+          if (Constant *C = dyn_cast<Constant>(ui)) 
+            if (ConstantExpr *CE = dyn_cast<ConstantExpr>(C)) 
+              if (CE->getOpcode() == Instruction::BitCast) 
+                if(CE->getOperand(0) == I) 
+                  if(const FunctionType *FTy  = dyn_cast<FunctionType>
+                     ((cast<PointerType>(CE->getType()))->getElementType())) 
+                    //casting to a varargs funtion
+                    if(FTy->isVarArg()) { 
+                      // Check if bitcasted Value is used in a callInst
+                      for(Value::use_iterator uii = CE->use_begin(),
+                          uee = CE->use_end(); uii != uee; ++uii) 
+                        if (CallInst* CI = dyn_cast<CallInst>(uii)) 
+                          if(CI->getCalledValue() == CE) { 
+                            // add to a worklist to process
+                            worklist.push_back(CI);
+                          }
+                    }
       }
+      
       // process the worklist
-
       while(!worklist.empty()) {
         CallInst *CI = worklist.back();
         worklist.pop_back();
@@ -66,9 +96,8 @@
         // Or we can discard the returned value.
         if(F->getReturnType() != CI->getType()) {
           if(!CI->use_empty())
-          continue;
+            continue;
         }
-
         // Check if the parameters passed match the expected types of the 
         // formal arguments
         bool change = true;
@@ -79,28 +108,35 @@
             break;
           }
         }
-        
+
         if(change) {
-            // if we want to ignore the returned value, create a new CallInst
-            SmallVector<Value*, 8> Args;
-            for(unsigned j =1;j<CI->getNumOperands();j++) {
-              Args.push_back(CI->getOperand(j));
-            }
-            CallInst *CINew = CallInst::Create(F, Args.begin(), Args.end(), "", CI);
-            if(F->getReturnType() == CI->getType()){ // else means no uses
-              CI->replaceAllUsesWith(CINew);
-            }
-            CI->eraseFromParent();
-            // else just set the function to call the original function.
-          changed = true;
+          // if we want to ignore the returned value, create a new CallInst
+          SmallVector<Value*, 8> Args;
+          for(unsigned j =1;j<CI->getNumOperands();j++) {
+            Args.push_back(CI->getOperand(j));
+          }
+          CallInst *CINew = CallInst::Create(F, Args.begin(), Args.end(), "", CI);
+          if(F->getReturnType() == CI->getType()){ // else means no uses
+            CI->replaceAllUsesWith(CINew);
+          }
+          DEBUG(errs() << "VA:");
+          DEBUG(errs() << "ERASE:");
+          DEBUG(CI->dump());
+          DEBUG(errs() << "VA:");
+          DEBUG(errs() << "ADDED:");
+          DEBUG(CINew->dump());
+          CI->eraseFromParent();
           numSimplified++;
         }
       }
-      return changed;
+      return (numSimplified > 0 );
     }
   };
 }
 
+// Pass ID variable
 char VarArgsFunc::ID = 0;
+
+// Register the Pass
 static RegisterPass<VarArgsFunc>
-X("varargsfunc", "Specialize for ill-defined non-varargs functions");
+X("varargsfunc", "Optimize non-varargs to varargs function casts");



From stoklund at 2pi.dk  Tue Apr  5 15:56:08 2011
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Tue, 05 Apr 2011 20:56:08 -0000
Subject: [llvm-commits] [llvm] r128927 -
	/llvm/trunk/docs/ProgrammersManual.html
Message-ID: <20110405205608.9686F2A6C12D@llvm.org>

Author: stoklund
Date: Tue Apr  5 15:56:08 2011
New Revision: 128927

URL: http://llvm.org/viewvc/llvm-project?rev=128927&view=rev
Log:
Document llvm/ADT/IntEqClasses.h in ProgrammersManual.html

Modified:
    llvm/trunk/docs/ProgrammersManual.html

Modified: llvm/trunk/docs/ProgrammersManual.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ProgrammersManual.html?rev=128927&r1=128926&r2=128927&view=diff
==============================================================================
--- llvm/trunk/docs/ProgrammersManual.html (original)
+++ llvm/trunk/docs/ProgrammersManual.html Tue Apr  5 15:56:08 2011
@@ -86,6 +86,7 @@
       <li><a href="#dss_valuemap">"llvm/ADT/ValueMap.h"</a></li>
       <li><a href="#dss_intervalmap">"llvm/ADT/IntervalMap.h"</a></li>
       <li><a href="#dss_map">&lt;map&gt;</a></li>
+      <li><a href="#dss_inteqclasses">"llvm/ADT/IntEqClasses.h"</a></li>
       <li><a href="#dss_othermap">Other Map-Like Container Options</a></li>
     </ul></li>
     <li><a href="#ds_string">String-like containers</a>
@@ -1547,6 +1548,26 @@
 
 <!-- _______________________________________________________________________ -->
 <div class="doc_subsubsection">
+  <a name="dss_inteqclasses">"llvm/ADT/IntEqClasses.h"</a>
+</div>
+
+<div class="doc_text">
+
+<p>IntEqClasses provides a compact representation of equivalence classes of
+small integers. Initially, each integer in the range 0..n-1 has its own
+equivalence class. Classes can be joined by passing two class representatives to
+the join(a, b) method. Two integers are in the same class when findLeader()
+returns the same representative.</p>
+
+<p>Once all equivalence classes are formed, the map can be compressed so each
+integer 0..n-1 maps to an equivalence class number in the range 0..m-1, where m
+is the total number of equivalence classes. The map must be uncompressed before
+it can be edited again.</p>
+
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
   <a name="dss_othermap">Other Map-Like Container Options</a>
 </div>
 



From dpatel at apple.com  Tue Apr  5 16:08:24 2011
From: dpatel at apple.com (Devang Patel)
Date: Tue, 05 Apr 2011 21:08:24 -0000
Subject: [llvm-commits] [llvm] r128929 - in
 /llvm/trunk/lib/CodeGen/AsmPrinter: DwarfDebug.cpp DwarfDebug.h
Message-ID: <20110405210824.787692A6C12D@llvm.org>

Author: dpatel
Date: Tue Apr  5 16:08:24 2011
New Revision: 128929

URL: http://llvm.org/viewvc/llvm-project?rev=128929&view=rev
Log:
Refactor.

Modified:
    llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
    llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h

Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp?rev=128929&r1=128928&r2=128929&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp (original)
+++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp Tue Apr  5 16:08:24 2011
@@ -930,6 +930,20 @@
   return true;
 }
 
+/// addTemplateParams - Add template parameters in buffer.
+void DwarfDebug::addTemplateParams(DIE &Buffer, DIArray TParams) {
+  // Add template parameters.
+  for (unsigned i = 0, e = TParams.getNumElements(); i != e; ++i) {
+    DIDescriptor Element = TParams.getElement(i);
+    if (Element.isTemplateTypeParameter())
+      Buffer.addChild(getOrCreateTemplateTypeParameterDIE(
+                        DITemplateTypeParameter(Element)));
+    else if (Element.isTemplateValueParameter())
+      Buffer.addChild(getOrCreateTemplateValueParameterDIE(
+                        DITemplateValueParameter(Element)));
+  }
+
+}
 /// addToContextOwner - Add Die into the list of its context owner's children.
 void DwarfDebug::addToContextOwner(DIE *Die, DIDescriptor Context) {
   if (Context.isType()) {
@@ -1155,20 +1169,9 @@
       addToContextOwner(&Buffer, Context);
     }
 
-    if (Tag == dwarf::DW_TAG_class_type) {
-      DIArray TParams = CTy.getTemplateParams();
-      unsigned N = TParams.getNumElements();
-      // Add template parameters.
-      for (unsigned i = 0; i < N; ++i) {
-        DIDescriptor Element = TParams.getElement(i);
-        if (Element.isTemplateTypeParameter())
-          Buffer.addChild(getOrCreateTemplateTypeParameterDIE(
-                            DITemplateTypeParameter(Element)));
-        else if (Element.isTemplateValueParameter())
-          Buffer.addChild(getOrCreateTemplateValueParameterDIE(
-                            DITemplateValueParameter(Element)));
-      }
-    }
+    if (Tag == dwarf::DW_TAG_class_type) 
+      addTemplateParams(Buffer, CTy.getTemplateParams());
+
     break;
   }
   default:

Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h?rev=128929&r1=128928&r2=128929&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h (original)
+++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h Tue Apr  5 16:08:24 2011
@@ -39,7 +39,7 @@
 class DIE;
 class DIEBlock;
 class DIEEntry;
-
+class DIArray;
 class DIEnumerator;
 class DIDescriptor;
 class DIVariable;
@@ -320,6 +320,9 @@
   /// addConstantFPValue - Add constant value entry in variable DIE.
   bool addConstantFPValue(DIE *Die, const MachineOperand &MO);
 
+  /// addTemplateParams - Add template parameters in buffer.
+  void addTemplateParams(DIE &Buffer, DIArray TParams);
+
   /// addComplexAddress - Start with the address based on the location provided,
   /// and generate the DWARF information necessary to find the actual variable
   /// (navigating the extra location information encoded in the type) based on



From aggarwa4 at illinois.edu  Tue Apr  5 16:17:58 2011
From: aggarwa4 at illinois.edu (Arushi Aggarwal)
Date: Tue, 05 Apr 2011 21:17:58 -0000
Subject: [llvm-commits] [poolalloc] r128930 -
	/poolalloc/trunk/lib/AssistDS/SimplifyMRV.cpp
Message-ID: <20110405211758.70B7B2A6C12D@llvm.org>

Author: aggarwa4
Date: Tue Apr  5 16:17:58 2011
New Revision: 128930

URL: http://llvm.org/viewvc/llvm-project?rev=128930&view=rev
Log:
Added comments and debug printing.

Modified:
    poolalloc/trunk/lib/AssistDS/SimplifyMRV.cpp

Modified: poolalloc/trunk/lib/AssistDS/SimplifyMRV.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/AssistDS/SimplifyMRV.cpp?rev=128930&r1=128929&r2=128930&view=diff
==============================================================================
--- poolalloc/trunk/lib/AssistDS/SimplifyMRV.cpp (original)
+++ poolalloc/trunk/lib/AssistDS/SimplifyMRV.cpp Tue Apr  5 16:17:58 2011
@@ -6,6 +6,14 @@
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
+//
+// Remove unnecessary insertvalue/extractvalue pairs
+// The name of the pass indicates that such pairs are mostly seen when 
+// mrv(s) occur.
+//
+// Derived from InstCombine
+//
+//===----------------------------------------------------------------------===//
 #define DEBUG_TYPE "simplifymrv"
 
 #include "llvm/Instructions.h"
@@ -24,157 +32,206 @@
 
 using namespace llvm;
 
-STATISTIC(numRemoved, "Number of Instructions Deleted");
+// Pass statistic
+STATISTIC(numErased, "Number of Instructions Deleted");
 
 namespace {
   class SimplifyMRV : public ModulePass {
   public:
     static char ID;
     SimplifyMRV() : ModulePass(&ID) {}
+    //
+    // Method: runOnModule()
+    //
+    // Description:
+    //  Entry point for this LLVM pass. Search for insert/extractvalue instructions
+    //  that can be simplified.
+    //
+    // Inputs:
+    //  M - A reference to the LLVM module to transform.
+    //
+    // Outputs:
+    //  M - The transformed LLVM module.
+    //
+    // Return value:
+    // true  - The module was modified.
+    // false - The module was not modified.
+    //
     bool runOnModule(Module& M) {
-      bool changed = false;
+      // Repeat till no change
+      bool changed;
       do {
         changed = false;
         for (Module::iterator F = M.begin(); F != M.end(); ++F) {
           for (Function::iterator B = F->begin(), FE = F->end(); B != FE; ++B) {      
             for (BasicBlock::iterator I = B->begin(), BE = B->end(); I != BE;) {
-              if(ExtractValueInst *EV = dyn_cast<ExtractValueInst>(I++)) {
-                Value *Agg = EV->getAggregateOperand();
-                if (!EV->hasIndices()) {
-                  EV->replaceAllUsesWith(Agg);
+              ExtractValueInst *EV = dyn_cast<ExtractValueInst>(I++);
+              if(!EV)
+                continue;
+              Value *Agg = EV->getAggregateOperand();
+              if (!EV->hasIndices()) {
+                EV->replaceAllUsesWith(Agg);
+                DEBUG(errs() << "MRV:");
+                DEBUG(errs() << "ERASE:");
+                DEBUG(EV->dump());
+                EV->eraseFromParent();
+                numErased++;
+                changed = true;
+                continue;
+              }
+              if (Constant *C = dyn_cast<Constant>(Agg)) {
+                if (isa<UndefValue>(C)) {
+                  EV->replaceAllUsesWith(UndefValue::get(EV->getType()));
+                  DEBUG(errs() << "MRV:");
+                  DEBUG(errs() << "ERASE:");
+                  DEBUG(EV->dump());
                   EV->eraseFromParent();
-                  numRemoved++;
+                  numErased++;
                   changed = true;
                   continue;
                 }
-                if (Constant *C = dyn_cast<Constant>(Agg)) {
-                  if (isa<UndefValue>(C)) {
-                    EV->replaceAllUsesWith(UndefValue::get(EV->getType()));
-                    EV->eraseFromParent();
-                    numRemoved++;
-                    changed = true;
-                    continue;
-                  }
-                  if (isa<ConstantAggregateZero>(C)) {
-                    EV->replaceAllUsesWith(Constant::getNullValue(EV->getType()));
-                    numRemoved++;
-                    EV->eraseFromParent();
-                    changed = true;
-                    continue;
-                  }
-                  if (isa<ConstantArray>(C) || isa<ConstantStruct>(C)) {
-                    // Extract the element indexed by the first index out of the constant
-                    Value *V = C->getOperand(*EV->idx_begin());
-                    if (EV->getNumIndices() > 1) {
-                      // Extract the remaining indices out of the constant indexed by the
-                      // first index
-                      ExtractValueInst *EV_new = ExtractValueInst::Create(V, EV->idx_begin() + 1, EV->idx_end(), "", EV);
-                      EV->replaceAllUsesWith(EV_new);
-                      EV->eraseFromParent();
-                      numRemoved++;
-                      changed = true;
-                      continue;
-                    }  else {
-                      EV->replaceAllUsesWith(V);
-                      EV->eraseFromParent();
-                      numRemoved++;
-                      changed = true;
-                      continue;
-                    }
-                  }
+                if (isa<ConstantAggregateZero>(C)) {
+                  EV->replaceAllUsesWith(Constant::getNullValue(EV->getType()));
+                  DEBUG(errs() << "MRV:");
+                  DEBUG(errs() << "ERASE:");
+                  DEBUG(EV->dump());
+                  EV->eraseFromParent();
+                  numErased++;
+                  changed = true;
                   continue;
                 }
-                if (InsertValueInst *IV = dyn_cast<InsertValueInst>(Agg)) {
-                  bool done = false;
-                  // We're extracting from an insertvalue instruction, compare the indices
-                  const unsigned *exti, *exte, *insi, *inse;
-                  for (exti = EV->idx_begin(), insi = IV->idx_begin(),
-                       exte = EV->idx_end(), inse = IV->idx_end();
-                       exti != exte && insi != inse;
-                       ++exti, ++insi) {
-                    if (*insi != *exti) {
-                      // The insert and extract both reference distinctly different elements.
-                      // This means the extract is not influenced by the insert, and we can
-                      // replace the aggregate operand of the extract with the aggregate
-                      // operand of the insert. i.e., replace
-                      // %I = insertvalue { i32, { i32 } } %A, { i32 } { i32 42 }, 1
-                      // %E = extractvalue { i32, { i32 } } %I, 0
-                      // with
-                      // %E = extractvalue { i32, { i32 } } %A, 0
-                      ExtractValueInst *EV_new = ExtractValueInst::Create(IV->getAggregateOperand(),
-                                                                          EV->idx_begin(), EV->idx_end(),"", EV);
-                      EV->replaceAllUsesWith(EV_new);
-                      EV->eraseFromParent();
-                      numRemoved++;
-                      done = true;
-                      changed = true;
-                      break;
-                    }
-                  }
-                  if(done)
-                    continue;
-                  if (exti == exte && insi == inse) {
-                    // Both iterators are at the end: Index lists are identical. Replace
-                    // %B = insertvalue { i32, { i32 } } %A, i32 42, 1, 0
-                    // %C = extractvalue { i32, { i32 } } %B, 1, 0
-                    // with "i32 42"
-                    EV->replaceAllUsesWith(IV->getInsertedValueOperand());
+                if (isa<ConstantArray>(C) || isa<ConstantStruct>(C)) {
+                  // Extract the element indexed by the first index out of the constant
+                  Value *V = C->getOperand(*EV->idx_begin());
+                  if (EV->getNumIndices() > 1) {
+                    // Extract the remaining indices out of the constant indexed by the
+                    // first index
+                    ExtractValueInst *EV_new = ExtractValueInst::Create(V, 
+                                                                        EV->idx_begin() + 1, 
+                                                                        EV->idx_end(), "", EV);
+                    EV->replaceAllUsesWith(EV_new);
+                    DEBUG(errs() << "MRV:");
+                    DEBUG(errs() << "ERASE:");
+                    DEBUG(EV->dump());
                     EV->eraseFromParent();
-                    numRemoved++;
+                    numErased++;
                     changed = true;
                     continue;
-
-                  }
-                  if (exti == exte) {
-                    // The extract list is a prefix of the insert list. i.e. replace
-                    // %I = insertvalue { i32, { i32 } } %A, i32 42, 1, 0
-                    // %E = extractvalue { i32, { i32 } } %I, 1
-                    // with
-                    // %X = extractvalue { i32, { i32 } } %A, 1
-                    // %E = insertvalue { i32 } %X, i32 42, 0
-                    // by switching the order of the insert and extract (though the
-                    // insertvalue should be left in, since it may have other uses).
-                    Value *NewEV = ExtractValueInst::Create(IV->getAggregateOperand(),
-                                                            EV->idx_begin(), EV->idx_end(), "", EV);
-                    Value *NewIV = InsertValueInst::Create(NewEV, IV->getInsertedValueOperand(),
-                                                           insi, inse, "", EV);
-                    EV->replaceAllUsesWith(NewIV);
+                  }  else {
+                    EV->replaceAllUsesWith(V);
+                    DEBUG(errs() << "MRV:");
+                    DEBUG(errs() << "ERASE:");
+                    DEBUG(EV->dump());
                     EV->eraseFromParent();
-                    numRemoved++;
+                    numErased++;
                     changed = true;
                     continue;
                   }
-                  if (insi == inse) {
-                    // The insert list is a prefix of the extract list
-                    // We can simply remove the common indices from the extract and make it
-                    // operate on the inserted value instead of the insertvalue result.
-                    // i.e., replace
+                }
+                continue;
+              }
+              if (InsertValueInst *IV = dyn_cast<InsertValueInst>(Agg)) {
+                bool done = false;
+                // We're extracting from an insertvalue instruction, compare the indices
+                const unsigned *exti, *exte, *insi, *inse;
+                for (exti = EV->idx_begin(), insi = IV->idx_begin(),
+                     exte = EV->idx_end(), inse = IV->idx_end();
+                     exti != exte && insi != inse;
+                     ++exti, ++insi) {
+                  if (*insi != *exti) {
+                    // The insert and extract both reference distinctly different elements.
+                    // This means the extract is not influenced by the insert, and we can
+                    // replace the aggregate operand of the extract with the aggregate
+                    // operand of the insert. i.e., replace
                     // %I = insertvalue { i32, { i32 } } %A, { i32 } { i32 42 }, 1
-                    // %E = extractvalue { i32, { i32 } } %I, 1, 0
+                    // %E = extractvalue { i32, { i32 } } %I, 0
                     // with
-                    // %E extractvalue { i32 } { i32 42 }, 0
-                    ExtractValueInst *EV_new = ExtractValueInst::Create(IV->getInsertedValueOperand(),
-                                                                        exti, exte,"", EV);
+                    // %E = extractvalue { i32, { i32 } } %A, 0
+                    ExtractValueInst *EV_new = ExtractValueInst::Create(IV->getAggregateOperand(),
+                                                                        EV->idx_begin(), EV->idx_end(),"", EV);
                     EV->replaceAllUsesWith(EV_new);
+                    DEBUG(errs() << "MRV:");
+                    DEBUG(errs() << "ERASE:");
+                    DEBUG(EV->dump());
                     EV->eraseFromParent();
-                    numRemoved++;
+                    numErased++;
+                    done = true;
                     changed = true;
-                    continue;
+                    break;
                   }
+                }
+                if(done)
+                  continue;
+                if (exti == exte && insi == inse) {
+                  // Both iterators are at the end: Index lists are identical. Replace
+                  // %B = insertvalue { i32, { i32 } } %A, i32 42, 1, 0
+                  // %C = extractvalue { i32, { i32 } } %B, 1, 0
+                  // with "i32 42"
+                  EV->replaceAllUsesWith(IV->getInsertedValueOperand());
+                  DEBUG(errs() << "MRV:");
+                  DEBUG(errs() << "ERASE:");
+                  DEBUG(EV->dump());
+                  EV->eraseFromParent();
+                  numErased++;
+                  changed = true;
+                  continue;
 
-
-
+                }
+                if (exti == exte) {
+                  // The extract list is a prefix of the insert list. i.e. replace
+                  // %I = insertvalue { i32, { i32 } } %A, i32 42, 1, 0
+                  // %E = extractvalue { i32, { i32 } } %I, 1
+                  // with
+                  // %X = extractvalue { i32, { i32 } } %A, 1
+                  // %E = insertvalue { i32 } %X, i32 42, 0
+                  // by switching the order of the insert and extract (though the
+                  // insertvalue should be left in, since it may have other uses).
+                  Value *NewEV = ExtractValueInst::Create(IV->getAggregateOperand(),
+                                                          EV->idx_begin(), EV->idx_end(), "", EV);
+                  Value *NewIV = InsertValueInst::Create(NewEV, IV->getInsertedValueOperand(),
+                                                         insi, inse, "", EV);
+                  EV->replaceAllUsesWith(NewIV);
+                  DEBUG(errs() << "MRV:");
+                  DEBUG(errs() << "ERASE:");
+                  DEBUG(EV->dump());
+                  EV->eraseFromParent();
+                  numErased++;
+                  changed = true;
+                  continue;
+                }
+                if (insi == inse) {
+                  // The insert list is a prefix of the extract list
+                  // We can simply remove the common indices from the extract and make it
+                  // operate on the inserted value instead of the insertvalue result.
+                  // i.e., replace
+                  // %I = insertvalue { i32, { i32 } } %A, { i32 } { i32 42 }, 1
+                  // %E = extractvalue { i32, { i32 } } %I, 1, 0
+                  // with
+                  // %E extractvalue { i32 } { i32 42 }, 0
+                  ExtractValueInst *EV_new = ExtractValueInst::Create(IV->getInsertedValueOperand(),
+                                                                      exti, exte,"", EV);
+                  EV->replaceAllUsesWith(EV_new);
+                  DEBUG(errs() << "MRV:");
+                  DEBUG(errs() << "ERASE:");
+                  DEBUG(EV->dump());
+                  EV->eraseFromParent();
+                  numErased++;
+                  changed = true;
+                  continue;
                 }
               }
             }
           }
         }
       } while(changed);
-      return true;
+      return (numErased > 0);
     }
   };
 }
 
+// Pass ID variable
 char SimplifyMRV::ID = 0;
+
+// Register the pass
 static RegisterPass<SimplifyMRV>
-X("simplify-mrv", "Simplify extract/insert value insts created due to mrvs");
+X("simplify-mrv", "Simplify extract/insert value insts");



From aggarwa4 at illinois.edu  Tue Apr  5 16:29:37 2011
From: aggarwa4 at illinois.edu (Arushi Aggarwal)
Date: Tue, 05 Apr 2011 21:29:37 -0000
Subject: [llvm-commits] [poolalloc] r128931 -
	/poolalloc/trunk/lib/AssistDS/FuncSpec.cpp
Message-ID: <20110405212937.E6E3D2A6C12D@llvm.org>

Author: aggarwa4
Date: Tue Apr  5 16:29:37 2011
New Revision: 128931

URL: http://llvm.org/viewvc/llvm-project?rev=128931&view=rev
Log:
Added comments.

Modified:
    poolalloc/trunk/lib/AssistDS/FuncSpec.cpp

Modified: poolalloc/trunk/lib/AssistDS/FuncSpec.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/AssistDS/FuncSpec.cpp?rev=128931&r1=128930&r2=128931&view=diff
==============================================================================
--- poolalloc/trunk/lib/AssistDS/FuncSpec.cpp (original)
+++ poolalloc/trunk/lib/AssistDS/FuncSpec.cpp Tue Apr  5 16:29:37 2011
@@ -27,6 +27,7 @@
 
 using namespace llvm;
 
+// Pass statistics
 STATISTIC(numCloned, "Number of Functions Cloned in FuncSpec");
 STATISTIC(numReplaced, "Number of Calls Replaced");
 
@@ -35,6 +36,23 @@
   public:
     static char ID;
     FuncSpec() : ModulePass(&ID) {}
+    //
+    // Method: runOnModule()
+    //
+    // Description:
+    //  Entry point for this LLVM pass. Search for call sites, that take functions as arguments
+    //  Clone those functions, and pass the clone.
+    //
+    // Inputs:
+    //  M - A reference to the LLVM module to transform
+    //
+    // Outputs:
+    //  M - The transformed LLVM module.
+    //
+    // Return value:
+    //  true  - The module was modified.
+    //  false - The module was not modified.
+    //
     bool runOnModule(Module& M) {
       std::map<CallInst*, std::vector<std::pair<unsigned, Constant*> > > cloneSites;
       std::map<std::pair<Function*, std::vector<std::pair<unsigned, Constant*> > >, Function* > toClone;
@@ -43,26 +61,36 @@
         if (!I->isDeclaration() && !I->mayBeOverridden()) {
           std::vector<unsigned> FPArgs;
           for (Function::arg_iterator ii = I->arg_begin(), ee = I->arg_end();
-               ii != ee; ++ii)
+               ii != ee; ++ii) {
+            // check if this function has a FunctionType(or a pointer to) argument 
             if (const PointerType* Ty = dyn_cast<PointerType>(ii->getType())) {
               if (isa<FunctionType>(Ty->getElementType())) {
+                // Store the index of such an argument
                 FPArgs.push_back(ii->getArgNo());
                 DEBUG(errs() << "Eligible: " << I->getNameStr() << "\n");
               }
             } else if (isa<FunctionType>(ii->getType())) {
+              // Store the index of such an argument
               FPArgs.push_back(ii->getArgNo());
               DEBUG(errs() << "Eligible: " << I->getNameStr() << "\n");
             } 
+          }
+          // Now find all call sites that it is called from
           for(Value::use_iterator ui = I->use_begin(), ue = I->use_end();
               ui != ue; ++ui) {
             if (CallInst* CI = dyn_cast<CallInst>(ui)) {
+              // Check that it is the called value (and not an argument)
               if(CI->getCalledValue()->stripPointerCasts() == I) {
                 std::vector<std::pair<unsigned, Constant*> > Consts;
                 for (unsigned x = 0; x < FPArgs.size(); ++x)
                   if (Constant* C = dyn_cast<Constant>(ui->getOperand(FPArgs.at(x) + 1))) {
+                    // If the argument passed, at any of the locations noted earlier
+                    // is a constant function, store the pair
                     Consts.push_back(std::make_pair(FPArgs.at(x), C));
                   }
                 if (!Consts.empty()) {
+                  // If at least one of the arguments is a constant function,
+                  // we must clone the function.
                   cloneSites[CI] = Consts;
                   toClone[std::make_pair(I, Consts)] = 0;
                 }
@@ -74,14 +102,16 @@
       numCloned += toClone.size();
 
       for (std::map<std::pair<Function*, std::vector<std::pair<unsigned, Constant*> > >, Function* >::iterator I = toClone.begin(), E = toClone.end(); I != E; ++I) {
+        // Clone all the functions we need cloned
         Function* DirectF = CloneFunction(I->first.first);
         DirectF->setName(I->first.first->getNameStr() + "_SPEC");
         DirectF->setLinkage(GlobalValue::InternalLinkage);
         I->first.first->getParent()->getFunctionList().push_back(DirectF);
         I->second = DirectF;
       }
-      
+
       for (std::map<CallInst*, std::vector<std::pair<unsigned, Constant*> > >::iterator ii = cloneSites.begin(), ee = cloneSites.end(); ii != ee; ++ii) {
+        // Transform the call sites, to call the clones
         ii->first->setOperand(0, toClone[std::make_pair(cast<Function>(ii->first->getOperand(0)), ii->second)]);
         ++numReplaced;
       }



From sabre at nondot.org  Tue Apr  5 16:37:08 2011
From: sabre at nondot.org (Chris Lattner)
Date: Tue, 05 Apr 2011 21:37:08 -0000
Subject: [llvm-commits] [llvm] r128933 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <20110405213708.3DB9F2A6C12D@llvm.org>

Author: lattner
Date: Tue Apr  5 16:37:08 2011
New Revision: 128933

URL: http://llvm.org/viewvc/llvm-project?rev=128933&view=rev
Log:
only 7 more weeks to go.

Modified:
    llvm/trunk/docs/ReleaseNotes.html

Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=128933&r1=128932&r2=128933&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Tue Apr  5 16:37:08 2011
@@ -321,7 +321,8 @@
   for human written assembly.
 
 X86: Reimplemented all of MMX to introduce a new LLVM IR x86_mmx type.  Now
-  random types like &lt;2 x i32&gt; are not iseld to mmx without emms.
+  random types like &lt;2 x i32&gt; are not iseld to mmx without emms.  The
+  -disable-mmx flag is gone now.
 
 Some basic <a href="CodeGenerator.html#mc">internals documentation</a> for MC. 
   
@@ -330,18 +331,23 @@
   
 inline asm multiple alternative constraint support.
   
-LoopIdiom: memset/memcpy formation
+LoopIdiom: memset/memcpy formation.  Build with -ffreestanding or -fno-builtin
+  if your memcpy is being compiled into infinite recursion.
   
+
+TargetLibraryInfo
   
 X86 support for FS/GS relative loads and stores using address space 256/257 are
   reliable now.
   
 ARM: New code placement pass.
   
+unnamed_addr + PR8927
   
 PointerTracking has been removed from mainline, moved to ClamAV.
   
 EarlyCSE pass.
+LoopInstSimplify pass.
 
 - DIBuilder provides simpler interface for front ends like Clang to encode debug info in LLVM IR.
   - This interface hides implementation details (e.g. DIDerivedType, existence of compile unit etc..) that any front end should not know about.
@@ -367,7 +373,16 @@
 Scheduler now models operand latency and pipeline forwarding.
   
 error_code + libsystem + PathV2 changes
-
+  The system_error header from C++0x was added.
+  * Use if (error_code ec = function()) to check for error conditions
+  from functions which return it.
+  * error_code::message returns a human readable description of the error.
+  
+  PathV1 has been deprecated in favor of PathV2 (sorry I didn't finish
+  this before the release).
+  * No Path class, use a r-value convertible to a twine instead.
+  * Assumes all paths are UTF-8.
+  
 new macho-dump tool
 
 Major regalloc rewrite, not on by default for 2.9 and not advised to use it.
@@ -410,15 +425,43 @@
 
 Speedups to various mid-level passes:
   GVN is much faster on functions with deep dominator trees / lots of BBs.
-  DomTree and DominatorFrontier are much faster to compute.
+  DomTree and DominatorFrontier are much faster to compute, and preserved by
+    more passes (so they are computed less often)
   
   
 new 'hotpatch' attribute: LangRef.html#fnattrs
+
+APInt API changes, see PR5207.
+
+DSE is more aggressive with stores of different types: e.g. a large store 
+  following a small one to the same address.
+  
+New naming rules in coding standards: CodingStandards.html#ll_naming
+  
+LiveDebugVariables is a new pass that keeps track of debugging information for
+  user variables that are kept in registers in optimized builds.
+  
+We now optimize various idioms for overflow detection into check of the flag
+  register on various CPUs, e.g.:
+   unsigned long t = a+b;
+   if (t &lt; a) ...
+  into:
+  	addq	%rdi, %rbx
+  	jno	LBB0_2
+
+X86: Much better codegen for several cases using adc/sbb instead of cmovs for
+  conditional increment and other idioms.
+  
+MVT::Flag renamed to MVT::Glue
+  
+Removed the PartialSpecialization pass, it was unmaintained and buggy.
+  
 </pre></li>
 </ul>
   
-Still todo: [101129-110228]
+Still todo: [110117-110228]
 
+  
 </div>
 
 <!--=========================================================================-->



From stoklund at 2pi.dk  Tue Apr  5 16:40:37 2011
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Tue, 05 Apr 2011 21:40:37 -0000
Subject: [llvm-commits] [llvm] r128935 - in /llvm/trunk:
 lib/CodeGen/RegAllocBasic.cpp lib/CodeGen/RegAllocGreedy.cpp
 test/CodeGen/X86/2010-05-25-DotDebugLoc.ll
 test/CodeGen/X86/2010-05-26-DotDebugLoc.ll
 test/CodeGen/X86/2010-05-28-Crash.ll
 test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll
 test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll
 test/CodeGen/X86/dbg-merge-loc-entry.ll
 test/CodeGen/X86/dbg-value-inlined-parameter.ll
 test/CodeGen/X86/dbg-value-location.ll test/CodeGen/X86/dbg-value-range.ll
Message-ID: <20110405214037.AB7642A6C12D@llvm.org>

Author: stoklund
Date: Tue Apr  5 16:40:37 2011
New Revision: 128935

URL: http://llvm.org/viewvc/llvm-project?rev=128935&view=rev
Log:
Run LiveDebugVariables in RegAllocBasic and RegAllocGreedy.

Modified:
    llvm/trunk/lib/CodeGen/RegAllocBasic.cpp
    llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
    llvm/trunk/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll
    llvm/trunk/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll
    llvm/trunk/test/CodeGen/X86/2010-05-28-Crash.ll
    llvm/trunk/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll
    llvm/trunk/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll
    llvm/trunk/test/CodeGen/X86/dbg-merge-loc-entry.ll
    llvm/trunk/test/CodeGen/X86/dbg-value-inlined-parameter.ll
    llvm/trunk/test/CodeGen/X86/dbg-value-location.ll
    llvm/trunk/test/CodeGen/X86/dbg-value-range.ll

Modified: llvm/trunk/lib/CodeGen/RegAllocBasic.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocBasic.cpp?rev=128935&r1=128934&r2=128935&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocBasic.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocBasic.cpp Tue Apr  5 16:40:37 2011
@@ -13,6 +13,7 @@
 //===----------------------------------------------------------------------===//
 
 #define DEBUG_TYPE "regalloc"
+#include "LiveDebugVariables.h"
 #include "LiveIntervalUnion.h"
 #include "LiveRangeEdit.h"
 #include "RegAllocBase.h"
@@ -137,6 +138,7 @@
 } // end anonymous namespace
 
 RABasic::RABasic(): MachineFunctionPass(ID) {
+  initializeLiveDebugVariablesPass(*PassRegistry::getPassRegistry());
   initializeLiveIntervalsPass(*PassRegistry::getPassRegistry());
   initializeSlotIndexesPass(*PassRegistry::getPassRegistry());
   initializeStrongPHIEliminationPass(*PassRegistry::getPassRegistry());
@@ -155,6 +157,8 @@
   AU.addPreserved<AliasAnalysis>();
   AU.addRequired<LiveIntervals>();
   AU.addPreserved<SlotIndexes>();
+  AU.addRequired<LiveDebugVariables>();
+  AU.addPreserved<LiveDebugVariables>();
   if (StrongPHIElim)
     AU.addRequiredID(StrongPHIEliminationID);
   AU.addRequiredTransitive<RegisterCoalescer>();
@@ -543,6 +547,9 @@
   // Run rewriter
   VRM->rewrite(LIS->getSlotIndexes());
 
+  // Write out new DBG_VALUE instructions.
+  getAnalysis<LiveDebugVariables>().emitDebugValues(VRM);
+
   // The pass output is in VirtRegMap. Release all the transient data.
   releaseMemory();
 

Modified: llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp?rev=128935&r1=128934&r2=128935&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp Tue Apr  5 16:40:37 2011
@@ -15,6 +15,7 @@
 #define DEBUG_TYPE "regalloc"
 #include "AllocationOrder.h"
 #include "InterferenceCache.h"
+#include "LiveDebugVariables.h"
 #include "LiveRangeEdit.h"
 #include "RegAllocBase.h"
 #include "Spiller.h"
@@ -196,6 +197,7 @@
 }
 
 RAGreedy::RAGreedy(): MachineFunctionPass(ID), LRStage(RS_New) {
+  initializeLiveDebugVariablesPass(*PassRegistry::getPassRegistry());
   initializeSlotIndexesPass(*PassRegistry::getPassRegistry());
   initializeLiveIntervalsPass(*PassRegistry::getPassRegistry());
   initializeSlotIndexesPass(*PassRegistry::getPassRegistry());
@@ -218,6 +220,8 @@
   AU.addRequired<LiveIntervals>();
   AU.addRequired<SlotIndexes>();
   AU.addPreserved<SlotIndexes>();
+  AU.addRequired<LiveDebugVariables>();
+  AU.addPreserved<LiveDebugVariables>();
   if (StrongPHIElim)
     AU.addRequiredID(StrongPHIEliminationID);
   AU.addRequiredTransitive<RegisterCoalescer>();
@@ -1183,6 +1187,9 @@
     VRM->rewrite(Indexes);
   }
 
+  // Write out new DBG_VALUE instructions.
+  getAnalysis<LiveDebugVariables>().emitDebugValues(VRM);
+
   // The pass output is in VirtRegMap. Release all the transient data.
   releaseMemory();
 

Modified: llvm/trunk/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll?rev=128935&r1=128934&r2=128935&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll Tue Apr  5 16:40:37 2011
@@ -1,4 +1,5 @@
 ; RUN: llc -march=x86-64 -O2 < %s | FileCheck %s
+; RUN: llc -march=x86-64 -O2 -regalloc=basic < %s | FileCheck %s
 ; Test to check .debug_loc support. This test case emits many debug_loc entries.
 
 ; CHECK: Loc expr size

Modified: llvm/trunk/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll?rev=128935&r1=128934&r2=128935&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll Tue Apr  5 16:40:37 2011
@@ -1,4 +1,5 @@
 ; RUN: llc -O2 < %s | FileCheck %s
+; RUN: llc -O2 -regalloc=basic < %s | FileCheck %s
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
 target triple = "x86_64-apple-darwin"
 

Modified: llvm/trunk/test/CodeGen/X86/2010-05-28-Crash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-05-28-Crash.ll?rev=128935&r1=128934&r2=128935&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2010-05-28-Crash.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2010-05-28-Crash.ll Tue Apr  5 16:40:37 2011
@@ -1,4 +1,5 @@
 ; RUN: llc  -mtriple=x86_64-apple-darwin < %s | FileCheck %s
+; RUN: llc  -mtriple=x86_64-apple-darwin -regalloc=basic < %s | FileCheck %s
 ; Test to check separate label for inlined function argument.
 
 define i32 @foo(i32 %y) nounwind optsize ssp {

Modified: llvm/trunk/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll?rev=128935&r1=128934&r2=128935&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll Tue Apr  5 16:40:37 2011
@@ -1,4 +1,5 @@
-; RUN: llc -O2 < %s | FileCheck %s 
+; RUN: llc -O2 < %s | FileCheck %s
+; RUN: llc -O2 -regalloc=basic < %s | FileCheck %s
 ; Test to check that unused argument 'this' is not undefined in debug info.
 
 target triple = "x86_64-apple-darwin10.2"

Modified: llvm/trunk/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll?rev=128935&r1=128934&r2=128935&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll Tue Apr  5 16:40:37 2011
@@ -1,4 +1,5 @@
 ; RUN: llc < %s | FileCheck %s
+; RUN: llc < %s -regalloc=basic | FileCheck %s
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
 target triple = "x86_64-apple-darwin10.0.0"
 

Modified: llvm/trunk/test/CodeGen/X86/dbg-merge-loc-entry.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/dbg-merge-loc-entry.ll?rev=128935&r1=128934&r2=128935&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/dbg-merge-loc-entry.ll (original)
+++ llvm/trunk/test/CodeGen/X86/dbg-merge-loc-entry.ll Tue Apr  5 16:40:37 2011
@@ -1,4 +1,5 @@
 ; RUN: llc < %s | FileCheck %s
+; RUN: llc < %s -regalloc=basic | FileCheck %s
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
 target triple = "x86_64-apple-darwin8"
 

Modified: llvm/trunk/test/CodeGen/X86/dbg-value-inlined-parameter.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/dbg-value-inlined-parameter.ll?rev=128935&r1=128934&r2=128935&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/dbg-value-inlined-parameter.ll (original)
+++ llvm/trunk/test/CodeGen/X86/dbg-value-inlined-parameter.ll Tue Apr  5 16:40:37 2011
@@ -1,4 +1,5 @@
 ; RUN: llc -mtriple=x86_64-apple-darwin < %s | FileCheck %s
+; RUN: llc -mtriple=x86_64-apple-darwin -regalloc=basic < %s | FileCheck %s
 
 ;CHECK: DW_TAG_inlined_subroutine
 ;CHECK-NEXT: DW_AT_abstract_origin

Modified: llvm/trunk/test/CodeGen/X86/dbg-value-location.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/dbg-value-location.ll?rev=128935&r1=128934&r2=128935&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/dbg-value-location.ll (original)
+++ llvm/trunk/test/CodeGen/X86/dbg-value-location.ll Tue Apr  5 16:40:37 2011
@@ -1,4 +1,5 @@
 ; RUN: llc < %s | FileCheck %s
+; RUN: llc < %s -regalloc=basic | FileCheck %s
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
 target triple = "x86_64-apple-darwin10.0.0"
 ;Radar 8950491

Modified: llvm/trunk/test/CodeGen/X86/dbg-value-range.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/dbg-value-range.ll?rev=128935&r1=128934&r2=128935&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/dbg-value-range.ll (original)
+++ llvm/trunk/test/CodeGen/X86/dbg-value-range.ll Tue Apr  5 16:40:37 2011
@@ -1,4 +1,5 @@
 ; RUN: llc -mtriple=x86_64-apple-darwin < %s | FileCheck %s
+; RUN: llc -mtriple=x86_64-apple-darwin -regalloc=basic < %s | FileCheck %s
 
 %struct.a = type { i32 }
 



From stoklund at 2pi.dk  Tue Apr  5 16:40:41 2011
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Tue, 05 Apr 2011 21:40:41 -0000
Subject: [llvm-commits] [llvm] r128936 - in /llvm/trunk/test/CodeGen:
 ARM/2009-10-27-double-align.ll ARM/arm-returnaddr.ll
 Mips/2008-08-06-Alloca.ll PowerPC/2010-05-03-retaddr1.ll
 SPARC/2011-01-11-FrameAddr.ll
Message-ID: <20110405214041.AD50E2A6C12E@llvm.org>

Author: stoklund
Date: Tue Apr  5 16:40:41 2011
New Revision: 128936

URL: http://llvm.org/viewvc/llvm-project?rev=128936&view=rev
Log:
These tests no longer require linear scan because reserved register coalescing is now universal.

Modified:
    llvm/trunk/test/CodeGen/ARM/2009-10-27-double-align.ll
    llvm/trunk/test/CodeGen/ARM/arm-returnaddr.ll
    llvm/trunk/test/CodeGen/Mips/2008-08-06-Alloca.ll
    llvm/trunk/test/CodeGen/PowerPC/2010-05-03-retaddr1.ll
    llvm/trunk/test/CodeGen/SPARC/2011-01-11-FrameAddr.ll

Modified: llvm/trunk/test/CodeGen/ARM/2009-10-27-double-align.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2009-10-27-double-align.ll?rev=128936&r1=128935&r2=128936&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/2009-10-27-double-align.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/2009-10-27-double-align.ll Tue Apr  5 16:40:41 2011
@@ -1,6 +1,5 @@
-; RUN: llc < %s  -mtriple=arm-linux-gnueabi -regalloc=linearscan | FileCheck %s
-
-; This test depends on linear scan's reserved register coalescing.
+; RUN: llc < %s  -mtriple=arm-linux-gnueabi | FileCheck %s
+; RUN: llc < %s  -mtriple=arm-linux-gnueabi -regalloc=basic | FileCheck %s
 
 @.str = private constant [1 x i8] zeroinitializer, align 1
 

Modified: llvm/trunk/test/CodeGen/ARM/arm-returnaddr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/arm-returnaddr.ll?rev=128936&r1=128935&r2=128936&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/arm-returnaddr.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/arm-returnaddr.ll Tue Apr  5 16:40:41 2011
@@ -1,11 +1,10 @@
-; RUN: llc < %s -mtriple=arm-apple-darwin -regalloc=linearscan | FileCheck %s
-; RUN: llc < %s -mtriple=thumbv6-apple-darwin -regalloc=linearscan | FileCheck %s
+; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s
+; RUN: llc < %s -mtriple=thumbv6-apple-darwin | FileCheck %s
+; RUN: llc < %s -mtriple=arm-apple-darwin -regalloc=basic | FileCheck %s
+; RUN: llc < %s -mtriple=thumbv6-apple-darwin -regalloc=basic | FileCheck %s
 ; rdar://8015977
 ; rdar://8020118
 
-; This test needs the reserved register r7 to be coalesced into the ldr.
-; So far, only linear scan can do that.
-
 define i8* @rt0(i32 %x) nounwind readnone {
 entry:
 ; CHECK: rt0:

Modified: llvm/trunk/test/CodeGen/Mips/2008-08-06-Alloca.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/2008-08-06-Alloca.ll?rev=128936&r1=128935&r2=128936&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/2008-08-06-Alloca.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/2008-08-06-Alloca.ll Tue Apr  5 16:40:41 2011
@@ -1,9 +1,5 @@
-; RUN: llc < %s -march=mips -regalloc=linearscan | grep {subu.*sp} | count 2
-
-; This test depends on a linearscan optimization, joining copies from reserved
-; registers.
-; After coalescing, copies from %SP remain.
-; They are handled by RALinScan::attemptTrivialCoalescing
+; RUN: llc < %s -march=mips | grep {subu.*sp} | count 2
+; RUN: llc < %s -march=mips -regalloc=basic | grep {subu.*sp} | count 2
 
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
 target triple = "mipsallegrexel-unknown-psp-elf"

Modified: llvm/trunk/test/CodeGen/PowerPC/2010-05-03-retaddr1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/2010-05-03-retaddr1.ll?rev=128936&r1=128935&r2=128936&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/2010-05-03-retaddr1.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/2010-05-03-retaddr1.ll Tue Apr  5 16:40:41 2011
@@ -1,4 +1,5 @@
-; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin -mcpu=g5 -regalloc=linearscan | FileCheck %s
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin -mcpu=g5 | FileCheck %s
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin -mcpu=g5 -regalloc=basic | FileCheck %s
 
 declare i8* @llvm.frameaddress(i32) nounwind readnone
 

Modified: llvm/trunk/test/CodeGen/SPARC/2011-01-11-FrameAddr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SPARC/2011-01-11-FrameAddr.ll?rev=128936&r1=128935&r2=128936&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/SPARC/2011-01-11-FrameAddr.ll (original)
+++ llvm/trunk/test/CodeGen/SPARC/2011-01-11-FrameAddr.ll Tue Apr  5 16:40:41 2011
@@ -1,7 +1,7 @@
-;RUN: llc -march=sparc -regalloc=linearscan < %s | FileCheck %s -check-prefix=V8
-;RUN: llc -march=sparc -regalloc=linearscan -mattr=v9 < %s | FileCheck %s -check-prefix=V9
-
-; These tests depend on linear scan's trivial coalescer for reserved registers.
+;RUN: llc -march=sparc < %s | FileCheck %s -check-prefix=V8
+;RUN: llc -march=sparc -mattr=v9 < %s | FileCheck %s -check-prefix=V9
+;RUN: llc -march=sparc -regalloc=basic < %s | FileCheck %s -check-prefix=V8
+;RUN: llc -march=sparc -regalloc=basic -mattr=v9 < %s | FileCheck %s -check-prefix=V9
 
 define i8* @frameaddr() nounwind readnone {
 entry:



From sabre at nondot.org  Tue Apr  5 16:43:56 2011
From: sabre at nondot.org (Chris Lattner)
Date: Tue, 05 Apr 2011 21:43:56 -0000
Subject: [llvm-commits] [llvm] r128938 - in /llvm/trunk:
 docs/ReleaseNotes.html docs/WritingAnLLVMPass.html
 tools/opt/GraphPrinters.cpp
Message-ID: <20110405214356.A2B812A6C12D@llvm.org>

Author: lattner
Date: Tue Apr  5 16:43:56 2011
New Revision: 128938

URL: http://llvm.org/viewvc/llvm-project?rev=128938&view=rev
Log:
remove graphprinter support for domfrontier.

Modified:
    llvm/trunk/docs/ReleaseNotes.html
    llvm/trunk/docs/WritingAnLLVMPass.html
    llvm/trunk/tools/opt/GraphPrinters.cpp

Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=128938&r1=128937&r2=128938&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Tue Apr  5 16:43:56 2011
@@ -427,6 +427,7 @@
   GVN is much faster on functions with deep dominator trees / lots of BBs.
   DomTree and DominatorFrontier are much faster to compute, and preserved by
     more passes (so they are computed less often)
+  SRoA is also much faster and doesn't use DominanceFrontier.
   
   
 new 'hotpatch' attribute: LangRef.html#fnattrs
@@ -456,6 +457,9 @@
   
 Removed the PartialSpecialization pass, it was unmaintained and buggy.
   
+SPARC: Many improvements, including using the Y registers for multiplications
+  and addition of a simple delay slot filler.
+  
 </pre></li>
 </ul>
   

Modified: llvm/trunk/docs/WritingAnLLVMPass.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/WritingAnLLVMPass.html?rev=128938&r1=128937&r2=128938&view=diff
==============================================================================
--- llvm/trunk/docs/WritingAnLLVMPass.html (original)
+++ llvm/trunk/docs/WritingAnLLVMPass.html Tue Apr  5 16:43:56 2011
@@ -1207,17 +1207,6 @@
 <div class="doc_text">
 
 <div class="doc_code"><pre>
-  <i>// This is an example implementation from an analysis, which does not modify
-  // the program at all, yet has a prerequisite.</i>
-  <b>void</b> <a href="http://llvm.org/doxygen/classllvm_1_1PostDominanceFrontier.html">PostDominanceFrontier</a>::getAnalysisUsage(AnalysisUsage &amp;AU) <b>const</b> {
-    AU.setPreservesAll();
-    AU.addRequired&lt;<a href="http://llvm.org/doxygen/classllvm_1_1PostDominatorTree.html">PostDominatorTree</a>&gt;();
-  }
-</pre></div>
-
-<p>and:</p>
-
-<div class="doc_code"><pre>
   <i>// This example modifies the program, but does not modify the CFG</i>
   <b>void</b> <a href="http://llvm.org/doxygen/structLICM.html">LICM</a>::getAnalysisUsage(AnalysisUsage &amp;AU) <b>const</b> {
     AU.setPreservesCFG();

Modified: llvm/trunk/tools/opt/GraphPrinters.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/opt/GraphPrinters.cpp?rev=128938&r1=128937&r2=128938&view=diff
==============================================================================
--- llvm/trunk/tools/opt/GraphPrinters.cpp (original)
+++ llvm/trunk/tools/opt/GraphPrinters.cpp Tue Apr  5 16:43:56 2011
@@ -18,7 +18,7 @@
 #include "llvm/Pass.h"
 #include "llvm/Value.h"
 #include "llvm/Analysis/CallGraph.h"
-#include "llvm/Analysis/DominanceFrontier.h"
+#include "llvm/Analysis/Dominators.h"
 #include "llvm/Support/ToolOutputFile.h"
 using namespace llvm;
 
@@ -103,13 +103,11 @@
     virtual void getAnalysisUsage(AnalysisUsage &AU) const {
       AU.setPreservesAll();
       AU.addRequired<DominatorTree>();
-      AU.addRequired<DominanceFrontier>();
 
     }
 
     virtual bool runOnFunction(Function &F) {
       getAnalysis<DominatorTree>().dump();
-      getAnalysis<DominanceFrontier>().dump();
       return false;
     }
   };



From resistor at mac.com  Tue Apr  5 16:48:57 2011
From: resistor at mac.com (Owen Anderson)
Date: Tue, 05 Apr 2011 21:48:57 -0000
Subject: [llvm-commits] [llvm] r128940 - in /llvm/trunk/lib/Target/ARM:
 ARMExpandPseudoInsts.cpp ARMISelLowering.cpp ARMInstrInfo.td
Message-ID: <20110405214858.1EC0F2A6C12D@llvm.org>

Author: resistor
Date: Tue Apr  5 16:48:57 2011
New Revision: 128940

URL: http://llvm.org/viewvc/llvm-project?rev=128940&view=rev
Log:
Fix bugs in the pseuo-ization of ADCS/SBCS pointed out by Jim, as well as doing the expansion earlier (using a custom inserter) to allow for the chance of predicating these instructions.

Modified:
    llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

Modified: llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp?rev=128940&r1=128939&r2=128940&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp Tue Apr  5 16:48:57 2011
@@ -55,7 +55,6 @@
     void ExpandVLD(MachineBasicBlock::iterator &MBBI);
     void ExpandVST(MachineBasicBlock::iterator &MBBI);
     void ExpandLaneOp(MachineBasicBlock::iterator &MBBI);
-    void ExpandSBitOp(MachineBasicBlock::iterator &MBBI);
     void ExpandVTBL(MachineBasicBlock::iterator &MBBI,
                     unsigned Opc, bool IsExt, unsigned NumRegs);
     void ExpandMOV32BitImm(MachineBasicBlock &MBB,
@@ -630,43 +629,6 @@
   MI.eraseFromParent();
 }
 
-void ARMExpandPseudo::ExpandSBitOp(MachineBasicBlock::iterator &MBBI) {
-  MachineInstr &MI = *MBBI;
-  MachineBasicBlock &MBB = *MI.getParent();
-  unsigned OldOpc = MI.getOpcode();
-  unsigned Opc = 0;
-  switch (OldOpc) {
-    case ARM::ADCSSrr:
-      Opc = ARM::ADCrr;
-      break;
-    case ARM::ADCSSri:
-      Opc = ARM::ADCri;
-      break;
-    case ARM::ADCSSrs:
-      Opc = ARM::ADCrs;
-      break;
-    case ARM::SBCSSrr:
-      Opc = ARM::SBCrr;
-      break;
-    case ARM::SBCSSri:
-      Opc = ARM::SBCri;
-      break;
-    case ARM::SBCSSrs:
-      Opc = ARM::SBCrs;
-      break;
-    default:
-      llvm_unreachable("Unknown opcode?");
-  }
-
-  MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc));
-  MIB.addOperand(MachineOperand::CreateImm(0)); // Predicate
-  MIB.addOperand(MachineOperand::CreateImm(0)); // S bit
-  for (unsigned i = 0; i < MI.getNumOperands(); ++i)
-    MIB.addOperand(MI.getOperand(i));
-  TransferImpOps(MI, MIB, MIB);
-  MI.eraseFromParent();
-}
-
 void ARMExpandPseudo::ExpandMOV32BitImm(MachineBasicBlock &MBB,
                                         MachineBasicBlock::iterator &MBBI) {
   MachineInstr &MI = *MBBI;
@@ -979,15 +941,6 @@
       ExpandMOV32BitImm(MBB, MBBI);
       return true;
 
-    case ARM::ADCSSri:
-    case ARM::ADCSSrr:
-    case ARM::ADCSSrs:
-    case ARM::SBCSSri:
-    case ARM::SBCSSrr:
-    case ARM::SBCSSrs:
-      ExpandSBitOp(MBBI);
-      return true;
-
     case ARM::VMOVQQ: {
       unsigned DstReg = MI.getOperand(0).getReg();
       bool DstIsDead = MI.getOperand(0).isDead();

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=128940&r1=128939&r2=128940&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Tue Apr  5 16:48:57 2011
@@ -2390,7 +2390,7 @@
       assert(VA.getValVT() != MVT::i64 && "i64 should already be lowered");
 
       int index = ArgLocs[i].getValNo();
-      
+
       // Some Ins[] entries become multiple ArgLoc[] entries.
       // Process them only once.
       if (index != lastInsIndex)
@@ -2966,7 +2966,7 @@
     AllOnes = DAG.getNode(ARMISD::VMOVIMM, dl, MVT::v8i8, AllOnes);
     SDValue MaskNot = DAG.getNode(ISD::XOR, dl, OpVT, Mask,
                                   DAG.getNode(ISD::BITCAST, dl, OpVT, AllOnes));
-                                              
+
     SDValue Res = DAG.getNode(ISD::OR, dl, OpVT,
                               DAG.getNode(ISD::AND, dl, OpVT, Tmp1, Mask),
                               DAG.getNode(ISD::AND, dl, OpVT, Tmp0, MaskNot));
@@ -4147,7 +4147,7 @@
                        DAG.getNode(ISD::BUILD_VECTOR, DL, MVT::v8i8,
                                    &VTBLMask[0], 8));
 
-  return DAG.getNode(ARMISD::VTBL2, DL, MVT::v8i8, V1, V2, 
+  return DAG.getNode(ARMISD::VTBL2, DL, MVT::v8i8, V1, V2,
                      DAG.getNode(ISD::BUILD_VECTOR, DL, MVT::v8i8,
                                  &VTBLMask[0], 8));
 }
@@ -4520,7 +4520,7 @@
                                DAG.getNode(ISD::BITCAST, DL, Op1VT, N01), Op1));
 }
 
-static SDValue 
+static SDValue
 LowerSDIV_v4i8(SDValue X, SDValue Y, DebugLoc dl, SelectionDAG &DAG) {
   // Convert to float
   // float4 xf = vcvt_f32_s32(vmovl_s16(a.lo));
@@ -4531,7 +4531,7 @@
   Y = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, Y);
   // Get reciprocal estimate.
   // float4 recip = vrecpeq_f32(yf);
-  Y = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, 
+  Y = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32,
                    DAG.getConstant(Intrinsic::arm_neon_vrecpe, MVT::i32), Y);
   // Because char has a smaller range than uchar, we can actually get away
   // without any newton steps.  This requires that we use a weird bias
@@ -4549,7 +4549,7 @@
   return X;
 }
 
-static SDValue 
+static SDValue
 LowerSDIV_v4i16(SDValue N0, SDValue N1, DebugLoc dl, SelectionDAG &DAG) {
   SDValue N2;
   // Convert to float.
@@ -4559,13 +4559,13 @@
   N1 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v4i32, N1);
   N0 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N0);
   N1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N1);
-  
+
   // Use reciprocal estimate and one refinement step.
   // float4 recip = vrecpeq_f32(yf);
   // recip *= vrecpsq_f32(yf, recip);
-  N2 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, 
+  N2 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32,
                    DAG.getConstant(Intrinsic::arm_neon_vrecpe, MVT::i32), N1);
-  N1 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, 
+  N1 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32,
                    DAG.getConstant(Intrinsic::arm_neon_vrecps, MVT::i32),
                    N1, N2);
   N2 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N1, N2);
@@ -4595,15 +4595,15 @@
   SDValue N0 = Op.getOperand(0);
   SDValue N1 = Op.getOperand(1);
   SDValue N2, N3;
-  
+
   if (VT == MVT::v8i8) {
     N0 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v8i16, N0);
     N1 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v8i16, N1);
-    
+
     N2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0,
                      DAG.getIntPtrConstant(4));
     N3 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1,
-                     DAG.getIntPtrConstant(4)); 
+                     DAG.getIntPtrConstant(4));
     N0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0,
                      DAG.getIntPtrConstant(0));
     N1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1,
@@ -4614,7 +4614,7 @@
 
     N0 = DAG.getNode(ISD::CONCAT_VECTORS, dl, MVT::v8i16, N0, N2);
     N0 = LowerCONCAT_VECTORS(N0, DAG);
-    
+
     N0 = DAG.getNode(ISD::TRUNCATE, dl, MVT::v8i8, N0);
     return N0;
   }
@@ -4630,32 +4630,32 @@
   SDValue N0 = Op.getOperand(0);
   SDValue N1 = Op.getOperand(1);
   SDValue N2, N3;
-  
+
   if (VT == MVT::v8i8) {
     N0 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::v8i16, N0);
     N1 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::v8i16, N1);
-    
+
     N2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0,
                      DAG.getIntPtrConstant(4));
     N3 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1,
-                     DAG.getIntPtrConstant(4)); 
+                     DAG.getIntPtrConstant(4));
     N0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0,
                      DAG.getIntPtrConstant(0));
     N1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1,
                      DAG.getIntPtrConstant(0));
-    
+
     N0 = LowerSDIV_v4i16(N0, N1, dl, DAG); // v4i16
     N2 = LowerSDIV_v4i16(N2, N3, dl, DAG); // v4i16
-    
+
     N0 = DAG.getNode(ISD::CONCAT_VECTORS, dl, MVT::v8i16, N0, N2);
     N0 = LowerCONCAT_VECTORS(N0, DAG);
-    
-    N0 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v8i8, 
+
+    N0 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v8i8,
                      DAG.getConstant(Intrinsic::arm_neon_vqmovnsu, MVT::i32),
                      N0);
     return N0;
   }
-  
+
   // v4i16 sdiv ... Convert to float.
   // float4 yf = vcvt_f32_s32(vmovl_u16(y));
   // float4 xf = vcvt_f32_s32(vmovl_u16(x));
@@ -4668,13 +4668,13 @@
   // float4 recip = vrecpeq_f32(yf);
   // recip *= vrecpsq_f32(yf, recip);
   // recip *= vrecpsq_f32(yf, recip);
-  N2 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, 
+  N2 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32,
                    DAG.getConstant(Intrinsic::arm_neon_vrecpe, MVT::i32), N1);
-  N1 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, 
+  N1 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32,
                    DAG.getConstant(Intrinsic::arm_neon_vrecps, MVT::i32),
                    N1, N2);
   N2 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N1, N2);
-  N1 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, 
+  N1 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32,
                    DAG.getConstant(Intrinsic::arm_neon_vrecps, MVT::i32),
                    N1, N2);
   N2 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N1, N2);
@@ -5024,6 +5024,48 @@
   case ARM::ATOMIC_CMP_SWAP_I16: return EmitAtomicCmpSwap(MI, BB, 2);
   case ARM::ATOMIC_CMP_SWAP_I32: return EmitAtomicCmpSwap(MI, BB, 4);
 
+  case ARM::ADCSSri:
+  case ARM::ADCSSrr:
+  case ARM::ADCSSrs:
+  case ARM::SBCSSri:
+  case ARM::SBCSSrr:
+  case ARM::SBCSSrs: {
+    unsigned OldOpc = MI->getOpcode();
+    unsigned Opc = 0;
+    switch (OldOpc) {
+      case ARM::ADCSSrr:
+        Opc = ARM::ADCrr;
+        break;
+      case ARM::ADCSSri:
+        Opc = ARM::ADCri;
+        break;
+      case ARM::ADCSSrs:
+        Opc = ARM::ADCrs;
+        break;
+      case ARM::SBCSSrr:
+        Opc = ARM::SBCrr;
+        break;
+      case ARM::SBCSSri:
+        Opc = ARM::SBCri;
+        break;
+      case ARM::SBCSSrs:
+        Opc = ARM::SBCrs;
+        break;
+      default:
+        llvm_unreachable("Unknown opcode?");
+    }
+
+    MachineInstrBuilder MIB =
+      BuildMI(*BB, MI, MI->getDebugLoc(), TII->get(Opc));
+    for (unsigned i = 0; i < MI->getNumOperands(); ++i)
+      MIB.addOperand(MI->getOperand(i));
+    AddDefaultPred(MIB);
+    MIB.addReg(ARM::CPSR, RegState::Define); // S bit
+    MI->eraseFromParent();
+    return BB;
+  }
+
+
   case ARM::tMOVCCr_pseudo: {
     // To "insert" a SELECT_CC instruction, we actually have to insert the
     // diamond control-flow pattern.  The incoming instruction knows the
@@ -5326,7 +5368,7 @@
 
 static SDValue PerformANDCombine(SDNode *N,
                                 TargetLowering::DAGCombinerInfo &DCI) {
-  
+
   // Attempt to use immediate-form VBIC
   BuildVectorSDNode *BVN = dyn_cast<BuildVectorSDNode>(N->getOperand(1));
   DebugLoc dl = N->getDebugLoc();
@@ -5851,7 +5893,7 @@
     EVT VecTy;
     if (isLoad)
       VecTy = N->getValueType(0);
-    else 
+    else
       VecTy = N->getOperand(AddrOpIdx+1).getValueType();
     unsigned NumBytes = NumVecs * VecTy.getSizeInBits() / 8;
     if (isLaneOp)
@@ -5901,7 +5943,7 @@
     DCI.CombineTo(User, SDValue(UpdN.getNode(), NumResultVecs));
 
     break;
-  } 
+  }
   return SDValue();
 }
 

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=128940&r1=128939&r2=128940&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Tue Apr  5 16:48:57 2011
@@ -936,8 +936,7 @@
 }
 // Carry setting variants
 let isCodeGenOnly = 1, Defs = [CPSR] in {
-multiclass AI1_adde_sube_s_irs<bits<4> opcod, string opc, PatFrag opnode,
-                             bit Commutable = 0> {
+multiclass AI1_adde_sube_s_irs<PatFrag opnode, bit Commutable = 0> {
   def Sri : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, so_imm:$imm),
                 Size4Bytes, IIC_iALUi,
                [(set GPR:$Rd, (opnode GPR:$Rn, so_imm:$imm))]>,
@@ -2197,10 +2196,12 @@
                           BinOpFrag<(sube_dead_carry node:$LHS, node:$RHS)>>;
 
 // ADC and SUBC with 's' bit set.
-defm ADCS : AI1_adde_sube_s_irs<0b0101, "adcs",
-                          BinOpFrag<(adde_live_carry node:$LHS, node:$RHS)>, 1>;
-defm SBCS : AI1_adde_sube_s_irs<0b0110, "sbcs",
-                          BinOpFrag<(sube_live_carry node:$LHS, node:$RHS) >>;
+let usesCustomInserter = 1 in {
+defm ADCS : AI1_adde_sube_s_irs<
+              BinOpFrag<(adde_live_carry node:$LHS, node:$RHS)>, 1>;
+defm SBCS : AI1_adde_sube_s_irs<
+              BinOpFrag<(sube_live_carry node:$LHS, node:$RHS) >>;
+}
 
 def RSBri : AsI1<0b0011, (outs GPR:$Rd), (ins GPR:$Rn, so_imm:$imm), DPFrm,
                  IIC_iALUi, "rsb", "\t$Rd, $Rn, $imm",



From johnny.chen at apple.com  Tue Apr  5 16:49:44 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Tue, 05 Apr 2011 21:49:44 -0000
Subject: [llvm-commits] [llvm] r128941 - in /llvm/trunk:
 lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
 test/MC/Disassembler/ARM/invalid-MOVs-LSL-arm.txt
Message-ID: <20110405214944.A61F72A6C12D@llvm.org>

Author: johnny
Date: Tue Apr  5 16:49:44 2011
New Revision: 128941

URL: http://llvm.org/viewvc/llvm-project?rev=128941&view=rev
Log:
ARM disassembler was erroneously accepting an invalid LSL instruction.
For register-controlled shifts, we should check that the encoding constraint
Inst{7} = 0 and Inst{4} = 1 is satisfied.

rdar://problem/9237693

Added:
    llvm/trunk/test/MC/Disassembler/ARM/invalid-MOVs-LSL-arm.txt
Modified:
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp?rev=128941&r1=128940&r2=128941&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp Tue Apr  5 16:49:44 2011
@@ -1068,6 +1068,10 @@
   MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRm(insn))));
   if (Rs) {
+    // If Inst{7} != 0, we should reject this insn as an invalid encoding.
+    if (slice(insn, 7, 7))
+      return false;
+
     // Register-controlled shifts: [Rm, Rs, shift].
     MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRs(insn))));

Added: llvm/trunk/test/MC/Disassembler/ARM/invalid-MOVs-LSL-arm.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/invalid-MOVs-LSL-arm.txt?rev=128941&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/invalid-MOVs-LSL-arm.txt (added)
+++ llvm/trunk/test/MC/Disassembler/ARM/invalid-MOVs-LSL-arm.txt Tue Apr  5 16:49:44 2011
@@ -0,0 +1,9 @@
+# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding}
+
+# Opcode=196 Name=MOVs Format=ARM_FORMAT_DPSOREGFRM(5)
+#  31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
+# -------------------------------------------------------------------------------------------------
+# | 1: 1: 0: 1| 0: 0: 0: 1| 1: 0: 1: 0| 0: 0: 0: 0| 0: 1: 0: 0| 0: 0: 1: 0| 1: 0: 0: 1| 0: 0: 1: 1|
+# -------------------------------------------------------------------------------------------------
+# A8.6.89 LSL (register): Inst{7-4} = 0b0001
+0x93 0x42 0xa0 0xd1



From geek4civic at gmail.com  Tue Apr  5 16:55:14 2011
From: geek4civic at gmail.com (NAKAMURA Takumi)
Date: Tue, 05 Apr 2011 21:55:14 -0000
Subject: [llvm-commits] [llvm] r128942 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <20110405215514.C1F802A6C12D@llvm.org>

Author: chapuni
Date: Tue Apr  5 16:55:14 2011
New Revision: 128942

URL: http://llvm.org/viewvc/llvm-project?rev=128942&view=rev
Log:
docs/ReleaseNotes.html: Please use proper *Heading* elements instead of classified div.

It would be better to browse without stylesheet. (eg. on ViewVC)

Modified:
    llvm/trunk/docs/ReleaseNotes.html

Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=128942&r1=128941&r2=128942&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Tue Apr  5 16:55:14 2011
@@ -9,7 +9,7 @@
 </head>
 <body>
 
-<div class="doc_title">LLVM 2.9 Release Notes</div>
+<h1 class="doc_title">LLVM 2.9 Release Notes</h1>
 
 <img align=right src="http://llvm.org/img/DragonSmall.png"
     width="136" height="136" alt="LLVM Dragon Logo">
@@ -35,9 +35,9 @@
 Release Notes</a>.</h1>
 
 <!-- *********************************************************************** -->
-<div class="doc_section">
+<h1>
   <a name="intro">Introduction</a>
-</div>
+</h1>
 <!-- *********************************************************************** -->
 
 <div class="doc_text">
@@ -75,9 +75,9 @@
  -->
  
 <!-- *********************************************************************** -->
-<div class="doc_section">
+<h1>
   <a name="subproj">Sub-project Status Update</a>
-</div>
+</h1>
 <!-- *********************************************************************** -->
 
 <div class="doc_text">
@@ -93,9 +93,9 @@
 
 
 <!--=========================================================================-->
-<div class="doc_subsection">
+<h2>
 <a name="clang">Clang: C/C++/Objective-C Frontend Toolkit</a>
-</div>
+</h2>
 
 <div class="doc_text">
 
@@ -126,9 +126,9 @@
 </div>
 
 <!--=========================================================================-->
-<div class="doc_subsection">
+<h2>
 <a name="dragonegg">DragonEgg: GCC front-ends, LLVM back-end</a>
-</div>
+</h2>
 
 <div class="doc_text">
 <p>
@@ -158,9 +158,9 @@
 </div>
 
 <!--=========================================================================-->
-<div class="doc_subsection">
+<h2>
 <a name="compiler-rt">compiler-rt: Compiler Runtime Library</a>
-</div>
+</h2>
 
 <div class="doc_text">
 <p>
@@ -186,9 +186,9 @@
 </div>
 
 <!--=========================================================================-->
-<div class="doc_subsection">
+<h2>
 <a name="lldb">LLDB: Low Level Debugger</a>
-</div>
+</h2>
 
 <div class="doc_text">
 <p>
@@ -212,9 +212,9 @@
 </div>
 
 <!--=========================================================================-->
-<div class="doc_subsection">
+<h2>
 <a name="libc++">libc++: C++ Standard Library</a>
-</div>
+</h2>
 
 <div class="doc_text">
 <p>
@@ -239,9 +239,9 @@
 
 <!--=========================================================================-->
 <!--
-<div class="doc_subsection">
+<h2>
 <a name="klee">KLEE: A Symbolic Execution Virtual Machine</a>
-</div>
+</h2>
 
 <div class="doc_text">
 <p>
@@ -257,9 +257,9 @@
 
 
 <!-- *********************************************************************** -->
-<div class="doc_section">
+<h1>
   <a name="externalproj">External Open Source Projects Using LLVM 2.9</a>
-</div>
+</h1>
 <!-- *********************************************************************** -->
 
 <div class="doc_text">
@@ -273,9 +273,9 @@
 
 
 <!-- *********************************************************************** -->
-<div class="doc_section">
+<h1>
   <a name="whatsnew">What's New in LLVM 2.9?</a>
-</div>
+</h1>
 <!-- *********************************************************************** -->
 
 <div class="doc_text">
@@ -288,9 +288,9 @@
 </div>
 
 <!--=========================================================================-->
-<div class="doc_subsection">
+<h2>
 <a name="majorfeatures">Major New Features</a>
-</div>
+</h2>
 
 <div class="doc_text">
 
@@ -469,9 +469,9 @@
 </div>
 
 <!--=========================================================================-->
-<div class="doc_subsection">
+<h2>
 <a name="coreimprovements">LLVM IR and Core Improvements</a>
-</div>
+</h2>
 
 <div class="doc_text">
 <p>LLVM IR has several new features for better support of new targets and that
@@ -483,9 +483,9 @@
 </div>
 
 <!--=========================================================================-->
-<div class="doc_subsection">
+<h2>
 <a name="optimizer">Optimizer Improvements</a>
-</div>
+</h2>
 
 <div class="doc_text">
 
@@ -508,9 +508,9 @@
 </div>
 
 <!--=========================================================================-->
-<div class="doc_subsection">
+<h2>
 <a name="mc">MC Level Improvements</a>
-</div>
+</h2>
 
 <div class="doc_text">
 <p>
@@ -538,9 +538,9 @@
 </div>
 
 <!--=========================================================================-->
-<div class="doc_subsection">
+<h2>
 <a name="codegen">Target Independent Code Generator Improvements</a>
-</div>
+</h2>
 
 <div class="doc_text">
 
@@ -555,9 +555,9 @@
 </div>
 
 <!--=========================================================================-->
-<div class="doc_subsection">
+<h2>
 <a name="x86">X86-32 and X86-64 Target Improvements</a>
-</div>
+</h2>
 
 <div class="doc_text">
 <p>New features and major changes in the X86 target include:
@@ -570,9 +570,9 @@
 </div>
 
 <!--=========================================================================-->
-<div class="doc_subsection">
+<h2>
 <a name="ARM">ARM Target Improvements</a>
-</div>
+</h2>
 
 <div class="doc_text">
 <p>New features of the ARM target include:
@@ -584,9 +584,9 @@
 
 
 <!--=========================================================================-->
-<div class="doc_subsection">
+<h2>
 <a name="changes">Major Changes and Removed Features</a>
-</div>
+</h2>
 
 <div class="doc_text">
 
@@ -607,9 +607,9 @@
 </div>
 
 <!--=========================================================================-->
-<div class="doc_subsection">
+<h2>
 <a name="devtree_changes">Development Infrastructure Changes</a>
-</div>
+</h2>
 
 <div class="doc_text">
 
@@ -623,9 +623,9 @@
 </div>
 
 <!-- *********************************************************************** -->
-<div class="doc_section">
+<h1>
   <a name="knownproblems">Known Problems</a>
-</div>
+</h1>
 <!-- *********************************************************************** -->
 
 <div class="doc_text">
@@ -638,9 +638,9 @@
 </div>
 
 <!-- ======================================================================= -->
-<div class="doc_subsection">
+<h2>
   <a name="experimental">Experimental features included with this release</a>
-</div>
+</h2>
 
 <div class="doc_text">
 
@@ -662,9 +662,9 @@
 </div>
 
 <!-- ======================================================================= -->
-<div class="doc_subsection">
+<h2>
   <a name="x86-be">Known problems with the X86 back-end</a>
-</div>
+</h2>
 
 <div class="doc_text">
 
@@ -695,9 +695,9 @@
 </div>
 
 <!-- ======================================================================= -->
-<div class="doc_subsection">
+<h2>
   <a name="ppc-be">Known problems with the PowerPC back-end</a>
-</div>
+</h2>
 
 <div class="doc_text">
 
@@ -709,9 +709,9 @@
 </div>
 
 <!-- ======================================================================= -->
-<div class="doc_subsection">
+<h2>
   <a name="arm-be">Known problems with the ARM back-end</a>
-</div>
+</h2>
 
 <div class="doc_text">
 
@@ -726,9 +726,9 @@
 </div>
 
 <!-- ======================================================================= -->
-<div class="doc_subsection">
+<h2>
   <a name="sparc-be">Known problems with the SPARC back-end</a>
-</div>
+</h2>
 
 <div class="doc_text">
 
@@ -740,9 +740,9 @@
 </div>
 
 <!-- ======================================================================= -->
-<div class="doc_subsection">
+<h2>
   <a name="mips-be">Known problems with the MIPS back-end</a>
-</div>
+</h2>
 
 <div class="doc_text">
 
@@ -753,9 +753,9 @@
 </div>
 
 <!-- ======================================================================= -->
-<div class="doc_subsection">
+<h2>
   <a name="alpha-be">Known problems with the Alpha back-end</a>
-</div>
+</h2>
 
 <div class="doc_text">
 
@@ -768,9 +768,9 @@
 </div>
 
 <!-- ======================================================================= -->
-<div class="doc_subsection">
+<h2>
   <a name="c-be">Known problems with the C back-end</a>
-</div>
+</h2>
 
 <div class="doc_text">
 
@@ -791,9 +791,9 @@
 
 
 <!-- ======================================================================= -->
-<div class="doc_subsection">
+<h2>
   <a name="llvm-gcc">Known problems with the llvm-gcc front-end</a>
-</div>
+</h2>
 
 <div class="doc_text">
 
@@ -817,9 +817,9 @@
 </div>
 
 <!-- *********************************************************************** -->
-<div class="doc_section">
+<h1>
   <a name="additionalinfo">Additional Information</a>
-</div>
+</h1>
 <!-- *********************************************************************** -->
 
 <div class="doc_text">



From geek4civic at gmail.com  Tue Apr  5 17:00:25 2011
From: geek4civic at gmail.com (NAKAMURA Takumi)
Date: Wed, 6 Apr 2011 07:00:25 +0900
Subject: [llvm-commits] [PATCH] docs/ReleaseNotes.html: Please use
 proper *Heading* elements instead of classified div.
In-Reply-To: <4B9D9A41-EE99-4B4E-B054-51FAE437AA45@apple.com>
References: <BANLkTik-eNUpXP_ahaNOVa3X349tieZKwg@mail.gmail.com>
	<4B9D9A41-EE99-4B4E-B054-51FAE437AA45@apple.com>
Message-ID: <BANLkTimY1NhwyxHjY1TdY9bKB4PGXpe2=A@mail.gmail.com>

Applied in r128942!

From sabre at nondot.org  Tue Apr  5 16:57:17 2011
From: sabre at nondot.org (Chris Lattner)
Date: Tue, 05 Apr 2011 21:57:17 -0000
Subject: [llvm-commits] [llvm] r128943 - in /llvm/trunk:
 include/llvm/Analysis/PostDominators.h include/llvm/Analysis/RegionInfo.h
 include/llvm/InitializePasses.h include/llvm/LinkAllPasses.h
 lib/Analysis/Analysis.cpp lib/Analysis/PostDominators.cpp
 test/Analysis/PostDominators/2006-09-26-PostDominanceFrontier.ll
 test/Analysis/PostDominators/2007-04-17-PostDominanceFrontier.ll
 test/Analysis/PostDominators/2007-04-20-PostDom-Reset.ll
Message-ID: <20110405215717.E217A2A6C12D@llvm.org>

Author: lattner
Date: Tue Apr  5 16:57:17 2011
New Revision: 128943

URL: http://llvm.org/viewvc/llvm-project?rev=128943&view=rev
Log:
remove postdom frontiers, because it is dead.  Forward dom frontiers are
still used by RegionInfo :(

Removed:
    llvm/trunk/test/Analysis/PostDominators/2006-09-26-PostDominanceFrontier.ll
    llvm/trunk/test/Analysis/PostDominators/2007-04-17-PostDominanceFrontier.ll
    llvm/trunk/test/Analysis/PostDominators/2007-04-20-PostDom-Reset.ll
Modified:
    llvm/trunk/include/llvm/Analysis/PostDominators.h
    llvm/trunk/include/llvm/Analysis/RegionInfo.h
    llvm/trunk/include/llvm/InitializePasses.h
    llvm/trunk/include/llvm/LinkAllPasses.h
    llvm/trunk/lib/Analysis/Analysis.cpp
    llvm/trunk/lib/Analysis/PostDominators.cpp

Modified: llvm/trunk/include/llvm/Analysis/PostDominators.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/PostDominators.h?rev=128943&r1=128942&r2=128943&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/PostDominators.h (original)
+++ llvm/trunk/include/llvm/Analysis/PostDominators.h Tue Apr  5 16:57:17 2011
@@ -14,7 +14,7 @@
 #ifndef LLVM_ANALYSIS_POST_DOMINATORS_H
 #define LLVM_ANALYSIS_POST_DOMINATORS_H
 
-#include "llvm/Analysis/DominanceFrontier.h"
+#include "llvm/Analysis/Dominators.h"
 
 namespace llvm {
 
@@ -101,37 +101,6 @@
   }
 };
 
-/// PostDominanceFrontier Class - Concrete subclass of DominanceFrontier that is
-/// used to compute the a post-dominance frontier.
-///
-struct PostDominanceFrontier : public DominanceFrontierBase {
-  static char ID;
-  PostDominanceFrontier()
-    : DominanceFrontierBase(ID, true) {
-      initializePostDominanceFrontierPass(*PassRegistry::getPassRegistry());
-    }
-
-  virtual bool runOnFunction(Function &) {
-    Frontiers.clear();
-    PostDominatorTree &DT = getAnalysis<PostDominatorTree>();
-    Roots = DT.getRoots();
-    if (const DomTreeNode *Root = DT.getRootNode())
-      calculate(DT, Root);
-    return false;
-  }
-
-  virtual void getAnalysisUsage(AnalysisUsage &AU) const {
-    AU.setPreservesAll();
-    AU.addRequired<PostDominatorTree>();
-  }
-
-private:
-  const DomSetType &calculate(const PostDominatorTree &DT,
-                              const DomTreeNode *Node);
-};
-
-FunctionPass* createPostDomFrontier();
-
 } // End llvm namespace
 
 #endif

Modified: llvm/trunk/include/llvm/Analysis/RegionInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/RegionInfo.h?rev=128943&r1=128942&r2=128943&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/RegionInfo.h (original)
+++ llvm/trunk/include/llvm/Analysis/RegionInfo.h Tue Apr  5 16:57:17 2011
@@ -28,9 +28,10 @@
 #define LLVM_ANALYSIS_REGION_INFO_H
 
 #include "llvm/ADT/PointerIntPair.h"
-#include "llvm/Analysis/Dominators.h"
+#include "llvm/Analysis/DominanceFrontier.h"
 #include "llvm/Analysis/PostDominators.h"
 #include "llvm/Support/Allocator.h"
+#include <map>
 
 namespace llvm {
 

Modified: llvm/trunk/include/llvm/InitializePasses.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/InitializePasses.h?rev=128943&r1=128942&r2=128943&view=diff
==============================================================================
--- llvm/trunk/include/llvm/InitializePasses.h (original)
+++ llvm/trunk/include/llvm/InitializePasses.h Tue Apr  5 16:57:17 2011
@@ -168,7 +168,6 @@
 void initializePostDomOnlyViewerPass(PassRegistry&);
 void initializePostDomPrinterPass(PassRegistry&);
 void initializePostDomViewerPass(PassRegistry&);
-void initializePostDominanceFrontierPass(PassRegistry&);
 void initializePostDominatorTreePass(PassRegistry&);
 void initializePreAllocSplittingPass(PassRegistry&);
 void initializePreVerifierPass(PassRegistry&);

Modified: llvm/trunk/include/llvm/LinkAllPasses.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/LinkAllPasses.h?rev=128943&r1=128942&r2=128943&view=diff
==============================================================================
--- llvm/trunk/include/llvm/LinkAllPasses.h (original)
+++ llvm/trunk/include/llvm/LinkAllPasses.h Tue Apr  5 16:57:17 2011
@@ -134,7 +134,6 @@
       (void) llvm::createMemCpyOptPass();
       (void) llvm::createLoopDeletionPass();
       (void) llvm::createPostDomTree();
-      (void) llvm::createPostDomFrontier();
       (void) llvm::createInstructionNamerPass();
       (void) llvm::createFunctionAttrsPass();
       (void) llvm::createMergeFunctionsPass();

Modified: llvm/trunk/lib/Analysis/Analysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/Analysis.cpp?rev=128943&r1=128942&r2=128943&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/Analysis.cpp (original)
+++ llvm/trunk/lib/Analysis/Analysis.cpp Tue Apr  5 16:57:17 2011
@@ -49,7 +49,6 @@
   initializeMemoryDependenceAnalysisPass(Registry);
   initializeModuleDebugInfoPrinterPass(Registry);
   initializePostDominatorTreePass(Registry);
-  initializePostDominanceFrontierPass(Registry);
   initializeProfileEstimatorPassPass(Registry);
   initializeNoProfileInfoPass(Registry);
   initializeNoPathProfileInfoPass(Registry);

Modified: llvm/trunk/lib/Analysis/PostDominators.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/PostDominators.cpp?rev=128943&r1=128942&r2=128943&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/PostDominators.cpp (original)
+++ llvm/trunk/lib/Analysis/PostDominators.cpp Tue Apr  5 16:57:17 2011
@@ -28,7 +28,6 @@
 //===----------------------------------------------------------------------===//
 
 char PostDominatorTree::ID = 0;
-char PostDominanceFrontier::ID = 0;
 INITIALIZE_PASS(PostDominatorTree, "postdomtree",
                 "Post-Dominator Tree Construction", true, true)
 
@@ -50,53 +49,3 @@
   return new PostDominatorTree();
 }
 
-//===----------------------------------------------------------------------===//
-//  PostDominanceFrontier Implementation
-//===----------------------------------------------------------------------===//
-
-INITIALIZE_PASS_BEGIN(PostDominanceFrontier, "postdomfrontier",
-                "Post-Dominance Frontier Construction", true, true)
-INITIALIZE_PASS_DEPENDENCY(PostDominatorTree)
-INITIALIZE_PASS_END(PostDominanceFrontier, "postdomfrontier",
-                "Post-Dominance Frontier Construction", true, true)
-
-const DominanceFrontier::DomSetType &
-PostDominanceFrontier::calculate(const PostDominatorTree &DT,
-                                 const DomTreeNode *Node) {
-  // Loop over CFG successors to calculate DFlocal[Node]
-  BasicBlock *BB = Node->getBlock();
-  DomSetType &S = Frontiers[BB];       // The new set to fill in...
-  if (getRoots().empty()) return S;
-
-  if (BB)
-    for (pred_iterator SI = pred_begin(BB), SE = pred_end(BB);
-         SI != SE; ++SI) {
-      BasicBlock *P = *SI;
-      // Does Node immediately dominate this predecessor?
-      DomTreeNode *SINode = DT[P];
-      if (SINode && SINode->getIDom() != Node)
-        S.insert(P);
-    }
-
-  // At this point, S is DFlocal.  Now we union in DFup's of our children...
-  // Loop through and visit the nodes that Node immediately dominates (Node's
-  // children in the IDomTree)
-  //
-  for (DomTreeNode::const_iterator
-         NI = Node->begin(), NE = Node->end(); NI != NE; ++NI) {
-    DomTreeNode *IDominee = *NI;
-    const DomSetType &ChildDF = calculate(DT, IDominee);
-
-    DomSetType::const_iterator CDFI = ChildDF.begin(), CDFE = ChildDF.end();
-    for (; CDFI != CDFE; ++CDFI) {
-      if (!DT.properlyDominates(Node, DT[*CDFI]))
-        S.insert(*CDFI);
-    }
-  }
-
-  return S;
-}
-
-FunctionPass* llvm::createPostDomFrontier() {
-  return new PostDominanceFrontier();
-}

Removed: llvm/trunk/test/Analysis/PostDominators/2006-09-26-PostDominanceFrontier.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/PostDominators/2006-09-26-PostDominanceFrontier.ll?rev=128942&view=auto
==============================================================================
--- llvm/trunk/test/Analysis/PostDominators/2006-09-26-PostDominanceFrontier.ll (original)
+++ llvm/trunk/test/Analysis/PostDominators/2006-09-26-PostDominanceFrontier.ll (removed)
@@ -1,97 +0,0 @@
-; RUN: opt < %s -analyze -postdomfrontier \
-; RUN:   -disable-verify
-; ModuleID = '2006-09-26-PostDominanceFrontier.bc'
-target datalayout = "e-p:64:64"
-target triple = "alphaev67-unknown-linux-gnu"
-	%struct.FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct.FILE*, i32, i32, i64, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i32, [44 x i8] }
-	%struct._IO_marker = type { %struct._IO_marker*, %struct.FILE*, i32 }
- at TOP = external global i64*		; <i64**> [#uses=1]
- at BOT = external global i64*		; <i64**> [#uses=1]
- at str = external global [2 x i8]		; <[2 x i8]*> [#uses=0]
-
-declare void @fopen()
-
-define void @main(i8** %argv) {
-entry:
-	%netSelect.i507 = alloca i64, align 8		; <i64*> [#uses=0]
-	%topStart.i = alloca i64, align 8		; <i64*> [#uses=0]
-	%topEnd.i = alloca i64, align 8		; <i64*> [#uses=0]
-	%botStart.i = alloca i64, align 8		; <i64*> [#uses=0]
-	%botEnd.i = alloca i64, align 8		; <i64*> [#uses=0]
-	%c1.i154 = alloca i32, align 4		; <i32*> [#uses=0]
-	%b1.i155 = alloca i32, align 4		; <i32*> [#uses=0]
-	%t1.i156 = alloca i32, align 4		; <i32*> [#uses=0]
-	%c1.i = alloca i32, align 4		; <i32*> [#uses=0]
-	%b1.i = alloca i32, align 4		; <i32*> [#uses=0]
-	%t1.i = alloca i32, align 4		; <i32*> [#uses=0]
-	%netSelect.i5 = alloca i64, align 8		; <i64*> [#uses=0]
-	%netSelect.i = alloca i64, align 8		; <i64*> [#uses=0]
-	%tmp2.i = getelementptr i8** %argv, i32 1		; <i8**> [#uses=1]
-	%tmp3.i4 = load i8** %tmp2.i		; <i8*> [#uses=0]
-	call void @fopen( )
-	br i1 false, label %DimensionChannel.exit, label %bb.backedge.i
-
-bb.backedge.i:		; preds = %entry
-	ret void
-
-DimensionChannel.exit:		; preds = %entry
-	%tmp13.i137 = malloc i64, i32 0		; <i64*> [#uses=1]
-	%tmp610.i = malloc i64, i32 0		; <i64*> [#uses=1]
-	br label %cond_true.i143
-
-cond_true.i143:		; preds = %cond_true.i143, %DimensionChannel.exit
-	%tmp9.i140 = getelementptr i64* %tmp13.i137, i64 0		; <i64*> [#uses=0]
-	%tmp12.i = getelementptr i64* %tmp610.i, i64 0		; <i64*> [#uses=0]
-	br i1 false, label %bb18.i144, label %cond_true.i143
-
-bb18.i144:		; preds = %cond_true.i143
-	call void @fopen( )
-	%tmp76.i105 = malloc i64, i32 0		; <i64*> [#uses=3]
-	%tmp674.i = malloc i64, i32 0		; <i64*> [#uses=2]
-	%tmp1072.i = malloc i64, i32 0		; <i64*> [#uses=2]
-	%tmp1470.i = malloc i64, i32 0		; <i64*> [#uses=1]
-	br label %cond_true.i114
-
-cond_true.i114:		; preds = %cond_true.i114, %bb18.i144
-	%tmp17.i108 = getelementptr i64* %tmp76.i105, i64 0		; <i64*> [#uses=0]
-	%tmp20.i = getelementptr i64* %tmp674.i, i64 0		; <i64*> [#uses=0]
-	%tmp23.i111 = getelementptr i64* %tmp1470.i, i64 0		; <i64*> [#uses=0]
-	br i1 false, label %cond_true40.i, label %cond_true.i114
-
-cond_true40.i:		; preds = %cond_true40.i, %cond_true.i114
-	%tmp33.i115 = getelementptr i64* %tmp1072.i, i64 0		; <i64*> [#uses=0]
-	br i1 false, label %bb142.i, label %cond_true40.i
-
-cond_next54.i:		; preds = %cond_true76.i
-	%tmp57.i = getelementptr i64* %tmp55.i, i64 0		; <i64*> [#uses=0]
-	br i1 false, label %bb64.i, label %bb69.i
-
-bb64.i:		; preds = %cond_true76.i, %cond_next54.i
-	%tmp67.i117 = getelementptr i64* %tmp76.i105, i64 0		; <i64*> [#uses=0]
-	br i1 false, label %bb114.i, label %cond_true111.i
-
-bb69.i:		; preds = %cond_next54.i
-	br i1 false, label %bb79.i, label %cond_true76.i
-
-cond_true76.i:		; preds = %bb142.i, %bb69.i
-	%tmp48.i = getelementptr i64* %tmp46.i, i64 0		; <i64*> [#uses=0]
-	br i1 false, label %bb64.i, label %cond_next54.i
-
-bb79.i:		; preds = %bb69.i
-	br i1 false, label %bb114.i, label %cond_true111.i
-
-cond_true111.i:		; preds = %bb79.i, %bb64.i
-	%tmp84.i127 = getelementptr i64* %tmp46.i, i64 0		; <i64*> [#uses=0]
-	ret void
-
-bb114.i:		; preds = %bb142.i, %bb79.i, %bb64.i
-	%tmp117.i = getelementptr i64* %tmp76.i105, i64 0		; <i64*> [#uses=0]
-	%tmp132.i131 = getelementptr i64* %tmp674.i, i64 0		; <i64*> [#uses=0]
-	%tmp122.i = getelementptr i64* %tmp1072.i, i64 0		; <i64*> [#uses=0]
-	ret void
-
-bb142.i:		; preds = %cond_true40.i
-	%tmp46.i = load i64** @BOT		; <i64*> [#uses=2]
-	%tmp55.i = load i64** @TOP		; <i64*> [#uses=1]
-	br i1 false, label %bb114.i, label %cond_true76.i
-}

Removed: llvm/trunk/test/Analysis/PostDominators/2007-04-17-PostDominanceFrontier.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/PostDominators/2007-04-17-PostDominanceFrontier.ll?rev=128942&view=auto
==============================================================================
--- llvm/trunk/test/Analysis/PostDominators/2007-04-17-PostDominanceFrontier.ll (original)
+++ llvm/trunk/test/Analysis/PostDominators/2007-04-17-PostDominanceFrontier.ll (removed)
@@ -1,692 +0,0 @@
-; RUN: opt < %s -postdomfrontier -disable-output
-
-define void @SManager() {
-entry:
-	br label %bb.outer
-
-bb.outer:		; preds = %bb193, %entry
-	br label %bb.outer156
-
-bb.loopexit:		; preds = %bb442
-	br label %bb.outer156
-
-bb.outer156:		; preds = %bb.loopexit, %bb.outer
-	br label %bb
-
-bb:		; preds = %bb.backedge, %bb.outer156
-	br i1 false, label %cond_true, label %bb.cond_next_crit_edge
-
-bb.cond_next_crit_edge:		; preds = %bb
-	br label %cond_next
-
-cond_true:		; preds = %bb
-	br label %cond_next
-
-cond_next:		; preds = %cond_true, %bb.cond_next_crit_edge
-	br i1 false, label %cond_next.bb.backedge_crit_edge, label %cond_next107
-
-cond_next.bb.backedge_crit_edge:		; preds = %cond_next
-	br label %bb.backedge
-
-bb.backedge:		; preds = %cond_true112.bb.backedge_crit_edge, %cond_next.bb.backedge_crit_edge
-	br label %bb
-
-cond_next107:		; preds = %cond_next
-	br i1 false, label %cond_true112, label %cond_next197
-
-cond_true112:		; preds = %cond_next107
-	br i1 false, label %cond_true118, label %cond_true112.bb.backedge_crit_edge
-
-cond_true112.bb.backedge_crit_edge:		; preds = %cond_true112
-	br label %bb.backedge
-
-cond_true118:		; preds = %cond_true112
-	br i1 false, label %bb123.preheader, label %cond_true118.bb148_crit_edge
-
-cond_true118.bb148_crit_edge:		; preds = %cond_true118
-	br label %bb148
-
-bb123.preheader:		; preds = %cond_true118
-	br label %bb123
-
-bb123:		; preds = %bb142.bb123_crit_edge, %bb123.preheader
-	br i1 false, label %bb123.bb142_crit_edge, label %cond_next.i57
-
-bb123.bb142_crit_edge:		; preds = %bb123
-	br label %bb142
-
-cond_next.i57:		; preds = %bb123
-	br i1 false, label %cond_true135, label %cond_next.i57.bb142_crit_edge
-
-cond_next.i57.bb142_crit_edge:		; preds = %cond_next.i57
-	br label %bb142
-
-cond_true135:		; preds = %cond_next.i57
-	br label %bb142
-
-bb142:		; preds = %cond_true135, %cond_next.i57.bb142_crit_edge, %bb123.bb142_crit_edge
-	br i1 false, label %bb148.loopexit, label %bb142.bb123_crit_edge
-
-bb142.bb123_crit_edge:		; preds = %bb142
-	br label %bb123
-
-bb148.loopexit:		; preds = %bb142
-	br label %bb148
-
-bb148:		; preds = %bb148.loopexit, %cond_true118.bb148_crit_edge
-	br i1 false, label %bb151.preheader, label %bb148.bb177_crit_edge
-
-bb148.bb177_crit_edge:		; preds = %bb148
-	br label %bb177
-
-bb151.preheader:		; preds = %bb148
-	br label %bb151
-
-bb151:		; preds = %bb171.bb151_crit_edge, %bb151.preheader
-	br i1 false, label %bb151.bb171_crit_edge, label %cond_next.i49
-
-bb151.bb171_crit_edge:		; preds = %bb151
-	br label %bb171
-
-cond_next.i49:		; preds = %bb151
-	br i1 false, label %cond_true164, label %cond_next.i49.bb171_crit_edge
-
-cond_next.i49.bb171_crit_edge:		; preds = %cond_next.i49
-	br label %bb171
-
-cond_true164:		; preds = %cond_next.i49
-	br label %bb171
-
-bb171:		; preds = %cond_true164, %cond_next.i49.bb171_crit_edge, %bb151.bb171_crit_edge
-	br i1 false, label %bb177.loopexit, label %bb171.bb151_crit_edge
-
-bb171.bb151_crit_edge:		; preds = %bb171
-	br label %bb151
-
-bb177.loopexit:		; preds = %bb171
-	br label %bb177
-
-bb177:		; preds = %bb177.loopexit, %bb148.bb177_crit_edge
-	br i1 false, label %bb180.preheader, label %bb177.bb193_crit_edge
-
-bb177.bb193_crit_edge:		; preds = %bb177
-	br label %bb193
-
-bb180.preheader:		; preds = %bb177
-	br label %bb180
-
-bb180:		; preds = %bb180.bb180_crit_edge, %bb180.preheader
-	br i1 false, label %bb193.loopexit, label %bb180.bb180_crit_edge
-
-bb180.bb180_crit_edge:		; preds = %bb180
-	br label %bb180
-
-bb193.loopexit:		; preds = %bb180
-	br label %bb193
-
-bb193:		; preds = %bb193.loopexit, %bb177.bb193_crit_edge
-	br label %bb.outer
-
-cond_next197:		; preds = %cond_next107
-	br i1 false, label %cond_next210, label %cond_true205
-
-cond_true205:		; preds = %cond_next197
-	br i1 false, label %cond_true205.bb213_crit_edge, label %cond_true205.bb299_crit_edge
-
-cond_true205.bb299_crit_edge:		; preds = %cond_true205
-	br label %bb299
-
-cond_true205.bb213_crit_edge:		; preds = %cond_true205
-	br label %bb213
-
-cond_next210:		; preds = %cond_next197
-	br label %bb293
-
-bb213:		; preds = %bb293.bb213_crit_edge, %cond_true205.bb213_crit_edge
-	br i1 false, label %bb213.cond_next290_crit_edge, label %cond_true248
-
-bb213.cond_next290_crit_edge:		; preds = %bb213
-	br label %cond_next290
-
-cond_true248:		; preds = %bb213
-	br i1 false, label %cond_true248.cond_next290_crit_edge, label %cond_true255
-
-cond_true248.cond_next290_crit_edge:		; preds = %cond_true248
-	br label %cond_next290
-
-cond_true255:		; preds = %cond_true248
-	br i1 false, label %cond_true266, label %cond_true255.cond_next271_crit_edge
-
-cond_true255.cond_next271_crit_edge:		; preds = %cond_true255
-	br label %cond_next271
-
-cond_true266:		; preds = %cond_true255
-	br label %cond_next271
-
-cond_next271:		; preds = %cond_true266, %cond_true255.cond_next271_crit_edge
-	br label %cond_next290
-
-cond_next290:		; preds = %cond_next271, %cond_true248.cond_next290_crit_edge, %bb213.cond_next290_crit_edge
-	br label %bb293
-
-bb293:		; preds = %cond_next290, %cond_next210
-	br i1 false, label %bb293.bb213_crit_edge, label %bb293.bb299_crit_edge
-
-bb293.bb299_crit_edge:		; preds = %bb293
-	br label %bb299
-
-bb293.bb213_crit_edge:		; preds = %bb293
-	br label %bb213
-
-bb299:		; preds = %bb293.bb299_crit_edge, %cond_true205.bb299_crit_edge
-	br i1 false, label %bb302.preheader, label %bb299.bb390_crit_edge
-
-bb299.bb390_crit_edge:		; preds = %bb299
-	br label %bb390
-
-bb302.preheader:		; preds = %bb299
-	br label %bb302
-
-bb302:		; preds = %bb384.bb302_crit_edge, %bb302.preheader
-	br i1 false, label %bb302.bb384_crit_edge, label %cond_true339
-
-bb302.bb384_crit_edge:		; preds = %bb302
-	br label %bb384
-
-cond_true339:		; preds = %bb302
-	br i1 false, label %cond_true339.bb384_crit_edge, label %cond_true346
-
-cond_true339.bb384_crit_edge:		; preds = %cond_true339
-	br label %bb384
-
-cond_true346:		; preds = %cond_true339
-	br i1 false, label %cond_true357, label %cond_true346.cond_next361_crit_edge
-
-cond_true346.cond_next361_crit_edge:		; preds = %cond_true346
-	br label %cond_next361
-
-cond_true357:		; preds = %cond_true346
-	br label %cond_next361
-
-cond_next361:		; preds = %cond_true357, %cond_true346.cond_next361_crit_edge
-	br label %bb384
-
-bb384:		; preds = %cond_next361, %cond_true339.bb384_crit_edge, %bb302.bb384_crit_edge
-	br i1 false, label %bb390.loopexit, label %bb384.bb302_crit_edge
-
-bb384.bb302_crit_edge:		; preds = %bb384
-	br label %bb302
-
-bb390.loopexit:		; preds = %bb384
-	br label %bb390
-
-bb390:		; preds = %bb390.loopexit, %bb299.bb390_crit_edge
-	br i1 false, label %bb391.preheader, label %bb390.bb442.preheader_crit_edge
-
-bb390.bb442.preheader_crit_edge:		; preds = %bb390
-	br label %bb442.preheader
-
-bb391.preheader:		; preds = %bb390
-	br label %bb391
-
-bb391:		; preds = %bb413.bb391_crit_edge, %bb391.preheader
-	br i1 false, label %bb391.bb413_crit_edge, label %cond_next404
-
-bb391.bb413_crit_edge:		; preds = %bb391
-	br label %bb413
-
-cond_next404:		; preds = %bb391
-	br i1 false, label %cond_next404.HWrite.exit_crit_edge, label %cond_next.i13
-
-cond_next404.HWrite.exit_crit_edge:		; preds = %cond_next404
-	br label %HWrite.exit
-
-cond_next.i13:		; preds = %cond_next404
-	br i1 false, label %cond_next.i13.cond_next13.i_crit_edge, label %cond_true12.i
-
-cond_next.i13.cond_next13.i_crit_edge:		; preds = %cond_next.i13
-	br label %cond_next13.i
-
-cond_true12.i:		; preds = %cond_next.i13
-	br label %cond_next13.i
-
-cond_next13.i:		; preds = %cond_true12.i, %cond_next.i13.cond_next13.i_crit_edge
-	br i1 false, label %cond_next13.i.bb.i22_crit_edge, label %cond_next43.i
-
-cond_next13.i.bb.i22_crit_edge:		; preds = %cond_next13.i
-	br label %bb.i22
-
-cond_next43.i:		; preds = %cond_next13.i
-	br i1 false, label %cond_next43.i.bb.i22_crit_edge, label %bb60.i
-
-cond_next43.i.bb.i22_crit_edge:		; preds = %cond_next43.i
-	br label %bb.i22
-
-bb.i22:		; preds = %cond_next43.i.bb.i22_crit_edge, %cond_next13.i.bb.i22_crit_edge
-	br label %bb413
-
-bb60.i:		; preds = %cond_next43.i
-	br i1 false, label %bb60.i.HWrite.exit_crit_edge, label %cond_true81.i
-
-bb60.i.HWrite.exit_crit_edge:		; preds = %bb60.i
-	br label %HWrite.exit
-
-cond_true81.i:		; preds = %bb60.i
-	br label %bb413
-
-HWrite.exit:		; preds = %bb60.i.HWrite.exit_crit_edge, %cond_next404.HWrite.exit_crit_edge
-	br label %bb413
-
-bb413:		; preds = %HWrite.exit, %cond_true81.i, %bb.i22, %bb391.bb413_crit_edge
-	br i1 false, label %bb442.preheader.loopexit, label %bb413.bb391_crit_edge
-
-bb413.bb391_crit_edge:		; preds = %bb413
-	br label %bb391
-
-bb442.preheader.loopexit:		; preds = %bb413
-	br label %bb442.preheader
-
-bb442.preheader:		; preds = %bb442.preheader.loopexit, %bb390.bb442.preheader_crit_edge
-	br label %bb442.outer
-
-bb420:		; preds = %bb442
-	br i1 false, label %bb439.loopexit, label %cond_next433
-
-cond_next433:		; preds = %bb420
-	br i1 false, label %cond_next433.HRead.exit.loopexit_crit_edge, label %cond_next.i
-
-cond_next433.HRead.exit.loopexit_crit_edge:		; preds = %cond_next433
-	br label %HRead.exit.loopexit
-
-cond_next.i:		; preds = %cond_next433
-	br i1 false, label %cond_true9.i, label %cond_false223.i
-
-cond_true9.i:		; preds = %cond_next.i
-	switch i32 0, label %cond_false.i [
-		 i32 1, label %cond_true9.i.cond_true15.i_crit_edge
-		 i32 5, label %cond_true9.i.cond_true15.i_crit_edge9
-	]
-
-cond_true9.i.cond_true15.i_crit_edge9:		; preds = %cond_true9.i
-	br label %cond_true15.i
-
-cond_true9.i.cond_true15.i_crit_edge:		; preds = %cond_true9.i
-	br label %cond_true15.i
-
-cond_true15.i:		; preds = %cond_true9.i.cond_true15.i_crit_edge, %cond_true9.i.cond_true15.i_crit_edge9
-	br i1 false, label %cond_true15.i.cond_true44.i_crit_edge, label %cond_true15.i.cond_false49.i_crit_edge
-
-cond_true15.i.cond_false49.i_crit_edge:		; preds = %cond_true15.i
-	br label %cond_false49.i
-
-cond_true15.i.cond_true44.i_crit_edge:		; preds = %cond_true15.i
-	br label %cond_true44.i
-
-cond_false.i:		; preds = %cond_true9.i
-	br i1 false, label %cond_false.i.cond_next39.i_crit_edge, label %cond_true30.i
-
-cond_false.i.cond_next39.i_crit_edge:		; preds = %cond_false.i
-	br label %cond_next39.i
-
-cond_true30.i:		; preds = %cond_false.i
-	br label %cond_next39.i
-
-cond_next39.i:		; preds = %cond_true30.i, %cond_false.i.cond_next39.i_crit_edge
-	br i1 false, label %cond_next39.i.cond_true44.i_crit_edge, label %cond_next39.i.cond_false49.i_crit_edge
-
-cond_next39.i.cond_false49.i_crit_edge:		; preds = %cond_next39.i
-	br label %cond_false49.i
-
-cond_next39.i.cond_true44.i_crit_edge:		; preds = %cond_next39.i
-	br label %cond_true44.i
-
-cond_true44.i:		; preds = %cond_next39.i.cond_true44.i_crit_edge, %cond_true15.i.cond_true44.i_crit_edge
-	br i1 false, label %cond_true44.i.cond_next70.i_crit_edge, label %cond_true44.i.cond_true61.i_crit_edge
-
-cond_true44.i.cond_true61.i_crit_edge:		; preds = %cond_true44.i
-	br label %cond_true61.i
-
-cond_true44.i.cond_next70.i_crit_edge:		; preds = %cond_true44.i
-	br label %cond_next70.i
-
-cond_false49.i:		; preds = %cond_next39.i.cond_false49.i_crit_edge, %cond_true15.i.cond_false49.i_crit_edge
-	br i1 false, label %cond_false49.i.cond_next70.i_crit_edge, label %cond_false49.i.cond_true61.i_crit_edge
-
-cond_false49.i.cond_true61.i_crit_edge:		; preds = %cond_false49.i
-	br label %cond_true61.i
-
-cond_false49.i.cond_next70.i_crit_edge:		; preds = %cond_false49.i
-	br label %cond_next70.i
-
-cond_true61.i:		; preds = %cond_false49.i.cond_true61.i_crit_edge, %cond_true44.i.cond_true61.i_crit_edge
-	br i1 false, label %cond_true61.i.cond_next70.i_crit_edge, label %cond_true67.i
-
-cond_true61.i.cond_next70.i_crit_edge:		; preds = %cond_true61.i
-	br label %cond_next70.i
-
-cond_true67.i:		; preds = %cond_true61.i
-	br label %cond_next70.i
-
-cond_next70.i:		; preds = %cond_true67.i, %cond_true61.i.cond_next70.i_crit_edge, %cond_false49.i.cond_next70.i_crit_edge, %cond_true44.i.cond_next70.i_crit_edge
-	br i1 false, label %cond_true77.i, label %cond_next81.i
-
-cond_true77.i:		; preds = %cond_next70.i
-	br label %bb442.outer.backedge
-
-cond_next81.i:		; preds = %cond_next70.i
-	br i1 false, label %cond_true87.i, label %cond_false94.i
-
-cond_true87.i:		; preds = %cond_next81.i
-	br i1 false, label %cond_true87.i.cond_true130.i_crit_edge, label %cond_true87.i.cond_next135.i_crit_edge
-
-cond_true87.i.cond_next135.i_crit_edge:		; preds = %cond_true87.i
-	br label %cond_next135.i
-
-cond_true87.i.cond_true130.i_crit_edge:		; preds = %cond_true87.i
-	br label %cond_true130.i
-
-cond_false94.i:		; preds = %cond_next81.i
-	switch i32 0, label %cond_false94.i.cond_next125.i_crit_edge [
-		 i32 1, label %cond_false94.i.cond_true100.i_crit_edge
-		 i32 5, label %cond_false94.i.cond_true100.i_crit_edge10
-	]
-
-cond_false94.i.cond_true100.i_crit_edge10:		; preds = %cond_false94.i
-	br label %cond_true100.i
-
-cond_false94.i.cond_true100.i_crit_edge:		; preds = %cond_false94.i
-	br label %cond_true100.i
-
-cond_false94.i.cond_next125.i_crit_edge:		; preds = %cond_false94.i
-	br label %cond_next125.i
-
-cond_true100.i:		; preds = %cond_false94.i.cond_true100.i_crit_edge, %cond_false94.i.cond_true100.i_crit_edge10
-	br i1 false, label %cond_true107.i, label %cond_true100.i.cond_next109.i_crit_edge
-
-cond_true100.i.cond_next109.i_crit_edge:		; preds = %cond_true100.i
-	br label %cond_next109.i
-
-cond_true107.i:		; preds = %cond_true100.i
-	br label %cond_next109.i
-
-cond_next109.i:		; preds = %cond_true107.i, %cond_true100.i.cond_next109.i_crit_edge
-	br i1 false, label %cond_next109.i.cond_next125.i_crit_edge, label %cond_true116.i
-
-cond_next109.i.cond_next125.i_crit_edge:		; preds = %cond_next109.i
-	br label %cond_next125.i
-
-cond_true116.i:		; preds = %cond_next109.i
-	br label %cond_next125.i
-
-cond_next125.i:		; preds = %cond_true116.i, %cond_next109.i.cond_next125.i_crit_edge, %cond_false94.i.cond_next125.i_crit_edge
-	br i1 false, label %cond_next125.i.cond_true130.i_crit_edge, label %cond_next125.i.cond_next135.i_crit_edge
-
-cond_next125.i.cond_next135.i_crit_edge:		; preds = %cond_next125.i
-	br label %cond_next135.i
-
-cond_next125.i.cond_true130.i_crit_edge:		; preds = %cond_next125.i
-	br label %cond_true130.i
-
-cond_true130.i:		; preds = %cond_next125.i.cond_true130.i_crit_edge, %cond_true87.i.cond_true130.i_crit_edge
-	br label %cond_next135.i
-
-cond_next135.i:		; preds = %cond_true130.i, %cond_next125.i.cond_next135.i_crit_edge, %cond_true87.i.cond_next135.i_crit_edge
-	br i1 false, label %cond_true142.i, label %cond_next135.i.cond_next149.i_crit_edge
-
-cond_next135.i.cond_next149.i_crit_edge:		; preds = %cond_next135.i
-	br label %cond_next149.i
-
-cond_true142.i:		; preds = %cond_next135.i
-	br label %cond_next149.i
-
-cond_next149.i:		; preds = %cond_true142.i, %cond_next135.i.cond_next149.i_crit_edge
-	br i1 false, label %cond_true156.i, label %cond_next149.i.cond_next163.i_crit_edge
-
-cond_next149.i.cond_next163.i_crit_edge:		; preds = %cond_next149.i
-	br label %cond_next163.i
-
-cond_true156.i:		; preds = %cond_next149.i
-	br label %cond_next163.i
-
-cond_next163.i:		; preds = %cond_true156.i, %cond_next149.i.cond_next163.i_crit_edge
-	br i1 false, label %cond_true182.i, label %cond_next163.i.cond_next380.i_crit_edge
-
-cond_next163.i.cond_next380.i_crit_edge:		; preds = %cond_next163.i
-	br label %cond_next380.i
-
-cond_true182.i:		; preds = %cond_next163.i
-	br i1 false, label %cond_true182.i.cond_next380.i_crit_edge, label %cond_true196.i
-
-cond_true182.i.cond_next380.i_crit_edge:		; preds = %cond_true182.i
-	br label %cond_next380.i
-
-cond_true196.i:		; preds = %cond_true182.i
-	br i1 false, label %cond_true210.i, label %cond_true196.i.cond_next380.i_crit_edge
-
-cond_true196.i.cond_next380.i_crit_edge:		; preds = %cond_true196.i
-	br label %cond_next380.i
-
-cond_true210.i:		; preds = %cond_true196.i
-	br i1 false, label %cond_true216.i, label %cond_true210.i.cond_next380.i_crit_edge
-
-cond_true210.i.cond_next380.i_crit_edge:		; preds = %cond_true210.i
-	br label %cond_next380.i
-
-cond_true216.i:		; preds = %cond_true210.i
-	br label %cond_next380.i
-
-cond_false223.i:		; preds = %cond_next.i
-	br i1 false, label %cond_true229.i, label %cond_false355.i
-
-cond_true229.i:		; preds = %cond_false223.i
-	br i1 false, label %cond_true229.i.HRead.exit.loopexit_crit_edge, label %cond_next243.i
-
-cond_true229.i.HRead.exit.loopexit_crit_edge:		; preds = %cond_true229.i
-	br label %HRead.exit.loopexit
-
-cond_next243.i:		; preds = %cond_true229.i
-	br i1 false, label %cond_true248.i, label %cond_false255.i
-
-cond_true248.i:		; preds = %cond_next243.i
-	br label %cond_next260.i
-
-cond_false255.i:		; preds = %cond_next243.i
-	br label %cond_next260.i
-
-cond_next260.i:		; preds = %cond_false255.i, %cond_true248.i
-	br i1 false, label %cond_true267.i, label %cond_next273.i
-
-cond_true267.i:		; preds = %cond_next260.i
-	br label %bb442.backedge
-
-bb442.backedge:		; preds = %bb.i, %cond_true267.i
-	br label %bb442
-
-cond_next273.i:		; preds = %cond_next260.i
-	br i1 false, label %cond_true281.i, label %cond_next273.i.cond_next288.i_crit_edge
-
-cond_next273.i.cond_next288.i_crit_edge:		; preds = %cond_next273.i
-	br label %cond_next288.i
-
-cond_true281.i:		; preds = %cond_next273.i
-	br label %cond_next288.i
-
-cond_next288.i:		; preds = %cond_true281.i, %cond_next273.i.cond_next288.i_crit_edge
-	br i1 false, label %cond_true295.i, label %cond_next288.i.cond_next302.i_crit_edge
-
-cond_next288.i.cond_next302.i_crit_edge:		; preds = %cond_next288.i
-	br label %cond_next302.i
-
-cond_true295.i:		; preds = %cond_next288.i
-	br label %cond_next302.i
-
-cond_next302.i:		; preds = %cond_true295.i, %cond_next288.i.cond_next302.i_crit_edge
-	br i1 false, label %cond_next302.i.cond_next380.i_crit_edge, label %cond_true328.i
-
-cond_next302.i.cond_next380.i_crit_edge:		; preds = %cond_next302.i
-	br label %cond_next380.i
-
-cond_true328.i:		; preds = %cond_next302.i
-	br i1 false, label %cond_true343.i, label %cond_true328.i.cond_next380.i_crit_edge
-
-cond_true328.i.cond_next380.i_crit_edge:		; preds = %cond_true328.i
-	br label %cond_next380.i
-
-cond_true343.i:		; preds = %cond_true328.i
-	br i1 false, label %cond_true349.i, label %cond_true343.i.cond_next380.i_crit_edge
-
-cond_true343.i.cond_next380.i_crit_edge:		; preds = %cond_true343.i
-	br label %cond_next380.i
-
-cond_true349.i:		; preds = %cond_true343.i
-	br label %cond_next380.i
-
-cond_false355.i:		; preds = %cond_false223.i
-	br i1 false, label %cond_false355.i.bb.i_crit_edge, label %cond_next363.i
-
-cond_false355.i.bb.i_crit_edge:		; preds = %cond_false355.i
-	br label %bb.i
-
-cond_next363.i:		; preds = %cond_false355.i
-	br i1 false, label %bb377.i, label %cond_next363.i.bb.i_crit_edge
-
-cond_next363.i.bb.i_crit_edge:		; preds = %cond_next363.i
-	br label %bb.i
-
-bb.i:		; preds = %cond_next363.i.bb.i_crit_edge, %cond_false355.i.bb.i_crit_edge
-	br label %bb442.backedge
-
-bb377.i:		; preds = %cond_next363.i
-	br label %cond_next380.i
-
-cond_next380.i:		; preds = %bb377.i, %cond_true349.i, %cond_true343.i.cond_next380.i_crit_edge, %cond_true328.i.cond_next380.i_crit_edge, %cond_next302.i.cond_next380.i_crit_edge, %cond_true216.i, %cond_true210.i.cond_next380.i_crit_edge, %cond_true196.i.cond_next380.i_crit_edge, %cond_true182.i.cond_next380.i_crit_edge, %cond_next163.i.cond_next380.i_crit_edge
-	br i1 false, label %cond_next380.i.HRead.exit_crit_edge, label %cond_true391.i
-
-cond_next380.i.HRead.exit_crit_edge:		; preds = %cond_next380.i
-	br label %HRead.exit
-
-cond_true391.i:		; preds = %cond_next380.i
-	br label %bb442.outer.backedge
-
-bb442.outer.backedge:		; preds = %bb439, %cond_true391.i, %cond_true77.i
-	br label %bb442.outer
-
-HRead.exit.loopexit:		; preds = %cond_true229.i.HRead.exit.loopexit_crit_edge, %cond_next433.HRead.exit.loopexit_crit_edge
-	br label %HRead.exit
-
-HRead.exit:		; preds = %HRead.exit.loopexit, %cond_next380.i.HRead.exit_crit_edge
-	br label %bb439
-
-bb439.loopexit:		; preds = %bb420
-	br label %bb439
-
-bb439:		; preds = %bb439.loopexit, %HRead.exit
-	br label %bb442.outer.backedge
-
-bb442.outer:		; preds = %bb442.outer.backedge, %bb442.preheader
-	br label %bb442
-
-bb442:		; preds = %bb442.outer, %bb442.backedge
-	br i1 false, label %bb420, label %bb.loopexit
-}
-
-define void @Invalidate() {
-entry:
-	br i1 false, label %cond_false, label %cond_true
-
-cond_true:		; preds = %entry
-	br i1 false, label %cond_true40, label %cond_true.cond_next_crit_edge
-
-cond_true.cond_next_crit_edge:		; preds = %cond_true
-	br label %cond_next
-
-cond_true40:		; preds = %cond_true
-	br label %cond_next
-
-cond_next:		; preds = %cond_true40, %cond_true.cond_next_crit_edge
-	br i1 false, label %cond_true68, label %cond_next.cond_next73_crit_edge
-
-cond_next.cond_next73_crit_edge:		; preds = %cond_next
-	br label %cond_next73
-
-cond_true68:		; preds = %cond_next
-	br label %cond_next73
-
-cond_next73:		; preds = %cond_true68, %cond_next.cond_next73_crit_edge
-	br i1 false, label %cond_true91, label %cond_next73.cond_next96_crit_edge
-
-cond_next73.cond_next96_crit_edge:		; preds = %cond_next73
-	br label %cond_next96
-
-cond_true91:		; preds = %cond_next73
-	br label %cond_next96
-
-cond_next96:		; preds = %cond_true91, %cond_next73.cond_next96_crit_edge
-	br i1 false, label %cond_next96.cond_next112_crit_edge, label %cond_true105
-
-cond_next96.cond_next112_crit_edge:		; preds = %cond_next96
-	br label %cond_next112
-
-cond_true105:		; preds = %cond_next96
-	br label %cond_next112
-
-cond_next112:		; preds = %cond_true105, %cond_next96.cond_next112_crit_edge
-	br i1 false, label %cond_next112.cond_next127_crit_edge, label %cond_true119
-
-cond_next112.cond_next127_crit_edge:		; preds = %cond_next112
-	br label %cond_next127
-
-cond_true119:		; preds = %cond_next112
-	br label %cond_next127
-
-cond_next127:		; preds = %cond_true119, %cond_next112.cond_next127_crit_edge
-	br i1 false, label %cond_next141, label %cond_true134
-
-cond_true134:		; preds = %cond_next127
-	br i1 false, label %cond_true134.bb161_crit_edge, label %cond_true134.bb_crit_edge
-
-cond_true134.bb_crit_edge:		; preds = %cond_true134
-	br label %bb
-
-cond_true134.bb161_crit_edge:		; preds = %cond_true134
-	br label %bb161
-
-cond_next141:		; preds = %cond_next127
-	br label %bb154
-
-bb:		; preds = %bb154.bb_crit_edge, %cond_true134.bb_crit_edge
-	br label %bb154
-
-bb154:		; preds = %bb, %cond_next141
-	br i1 false, label %bb154.bb161_crit_edge, label %bb154.bb_crit_edge
-
-bb154.bb_crit_edge:		; preds = %bb154
-	br label %bb
-
-bb154.bb161_crit_edge:		; preds = %bb154
-	br label %bb161
-
-bb161:		; preds = %bb154.bb161_crit_edge, %cond_true134.bb161_crit_edge
-	br i1 false, label %bb161.cond_next201_crit_edge, label %cond_true198
-
-bb161.cond_next201_crit_edge:		; preds = %bb161
-	br label %cond_next201
-
-cond_true198:		; preds = %bb161
-	br label %cond_next201
-
-cond_next201:		; preds = %cond_true198, %bb161.cond_next201_crit_edge
-	br i1 false, label %cond_next212, label %cond_true206
-
-cond_true206:		; preds = %cond_next201
-	br label %UnifiedReturnBlock
-
-cond_false:		; preds = %entry
-	br label %UnifiedReturnBlock
-
-cond_next212:		; preds = %cond_next201
-	br label %UnifiedReturnBlock
-
-UnifiedReturnBlock:		; preds = %cond_next212, %cond_false, %cond_true206
-	ret void
-}

Removed: llvm/trunk/test/Analysis/PostDominators/2007-04-20-PostDom-Reset.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/PostDominators/2007-04-20-PostDom-Reset.ll?rev=128942&view=auto
==============================================================================
--- llvm/trunk/test/Analysis/PostDominators/2007-04-20-PostDom-Reset.ll (original)
+++ llvm/trunk/test/Analysis/PostDominators/2007-04-20-PostDom-Reset.ll (removed)
@@ -1,28 +0,0 @@
-; RUN: opt < %s -postdomfrontier -disable-output
-
-define void @args_out_of_range() {
-entry:
-	br label %bb
-
-bb:		; preds = %bb, %entry
-	br label %bb
-}
-
-define void @args_out_of_range_3() {
-entry:
-	br label %bb
-
-bb:		; preds = %bb, %entry
-	br label %bb
-}
-
-define void @Feq() {
-entry:
-	br i1 false, label %cond_true, label %cond_next
-
-cond_true:		; preds = %entry
-	unreachable
-
-cond_next:		; preds = %entry
-	unreachable
-}



From johnny.chen at apple.com  Tue Apr  5 17:18:08 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Tue, 05 Apr 2011 22:18:08 -0000
Subject: [llvm-commits] [llvm] r128945 - in /llvm/trunk:
 lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
 test/MC/Disassembler/ARM/invalid-RSC-arm.txt
Message-ID: <20110405221808.1C4872A6C12D@llvm.org>

Author: johnny
Date: Tue Apr  5 17:18:07 2011
New Revision: 128945

URL: http://llvm.org/viewvc/llvm-project?rev=128945&view=rev
Log:
ARM disassembler was erroneously accepting an invalid RSC instruction.
Added checks for regs which should not be 15.

rdar://problem/9237734

Added:
    llvm/trunk/test/MC/Disassembler/ARM/invalid-RSC-arm.txt
Modified:
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp?rev=128945&r1=128944&r2=128945&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp Tue Apr  5 17:18:07 2011
@@ -1072,6 +1072,12 @@
     if (slice(insn, 7, 7))
       return false;
 
+    // A8.6.3 ADC (register-shifted register)
+    // if d == 15 || n == 15 || m == 15 || s == 15 then UNPREDICTABLE;
+    if (decodeRd(insn) == 15 || decodeRn(insn) == 15 ||
+        decodeRm(insn) == 15 || decodeRs(insn) == 15)
+      return false;
+    
     // Register-controlled shifts: [Rm, Rs, shift].
     MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRs(insn))));

Added: llvm/trunk/test/MC/Disassembler/ARM/invalid-RSC-arm.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/invalid-RSC-arm.txt?rev=128945&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/invalid-RSC-arm.txt (added)
+++ llvm/trunk/test/MC/Disassembler/ARM/invalid-RSC-arm.txt Tue Apr  5 17:18:07 2011
@@ -0,0 +1,9 @@
+# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding}
+
+# Opcode=261 Name=RSCrs Format=ARM_FORMAT_DPSOREGFRM(5)
+#  31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
+# -------------------------------------------------------------------------------------------------
+# | 0: 0: 1: 1| 0: 0: 0: 0| 1: 1: 1: 0| 0: 1: 0: 0| 1: 1: 1: 1| 1: 0: 0: 0| 0: 1: 0: 1| 1: 1: 1: 1|
+# -------------------------------------------------------------------------------------------------
+# if d == 15 || n == 15 || m == 15 || s == 15 then UNPREDICTABLE;
+0x5f 0xf8 0xe4 0x30



From resistor at mac.com  Tue Apr  5 17:42:55 2011
From: resistor at mac.com (Owen Anderson)
Date: Tue, 05 Apr 2011 22:42:55 -0000
Subject: [llvm-commits] [llvm] r128946 - in /llvm/trunk/lib/Target/ARM:
 ARMISelLowering.cpp ARMInstrInfo.td
Message-ID: <20110405224255.2F7372A6C12D@llvm.org>

Author: resistor
Date: Tue Apr  5 17:42:54 2011
New Revision: 128946

URL: http://llvm.org/viewvc/llvm-project?rev=128946&view=rev
Log:
Give RSBS and RSCS the pseudo treatment.

Modified:
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=128946&r1=128945&r2=128946&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Tue Apr  5 17:42:54 2011
@@ -5029,7 +5029,12 @@
   case ARM::ADCSSrs:
   case ARM::SBCSSri:
   case ARM::SBCSSrr:
-  case ARM::SBCSSrs: {
+  case ARM::SBCSSrs:
+  case ARM::RSBSri:
+  case ARM::RSBSrr:
+  case ARM::RSBSrs:
+  case ARM::RSCSri:
+  case ARM::RSCSrs: {
     unsigned OldOpc = MI->getOpcode();
     unsigned Opc = 0;
     switch (OldOpc) {
@@ -5051,6 +5056,21 @@
       case ARM::SBCSSrs:
         Opc = ARM::SBCrs;
         break;
+      case ARM::RSBSri:
+        Opc = ARM::RSBri;
+        break;
+      case ARM::RSBSrr:
+        Opc = ARM::RSBrr;
+        break;
+      case ARM::RSBSrs:
+        Opc = ARM::RSBrs;
+        break;
+      case ARM::RSCSri:
+        Opc = ARM::RSCri;
+        break;
+      case ARM::RSCSrs:
+        Opc = ARM::RSCrs;
+        break;
       default:
         llvm_unreachable("Unknown opcode?");
     }

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=128946&r1=128945&r2=128946&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Tue Apr  5 17:42:54 2011
@@ -2243,44 +2243,16 @@
 }
 
 // RSB with 's' bit set.
-let isCodeGenOnly = 1, Defs = [CPSR] in {
-def RSBSri : AI1<0b0011, (outs GPR:$Rd), (ins GPR:$Rn, so_imm:$imm), DPFrm,
-                 IIC_iALUi, "rsbs", "\t$Rd, $Rn, $imm",
-                 [(set GPR:$Rd, (subc so_imm:$imm, GPR:$Rn))]> {
-  bits<4> Rd;
-  bits<4> Rn;
-  bits<12> imm;
-  let Inst{25} = 1;
-  let Inst{20} = 1;
-  let Inst{15-12} = Rd;
-  let Inst{19-16} = Rn;
-  let Inst{11-0} = imm;
-}
-def RSBSrr : AI1<0b0011, (outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm), DPFrm,
-                 IIC_iALUr, "rsbs", "\t$Rd, $Rn, $Rm",
-                 [/* For disassembly only; pattern left blank */]> {
-  bits<4> Rd;
-  bits<4> Rn;
-  bits<4> Rm;
-  let Inst{11-4} = 0b00000000;
-  let Inst{25} = 0;
-  let Inst{20} = 1;
-  let Inst{3-0} = Rm;
-  let Inst{15-12} = Rd;
-  let Inst{19-16} = Rn;
-}
-def RSBSrs : AI1<0b0011, (outs GPR:$Rd), (ins GPR:$Rn, so_reg:$shift),
-                 DPSoRegFrm, IIC_iALUsr, "rsbs", "\t$Rd, $Rn, $shift",
-                 [(set GPR:$Rd, (subc so_reg:$shift, GPR:$Rn))]> {
-  bits<4> Rd;
-  bits<4> Rn;
-  bits<12> shift;
-  let Inst{25} = 0;
-  let Inst{20} = 1;
-  let Inst{11-0} = shift;
-  let Inst{15-12} = Rd;
-  let Inst{19-16} = Rn;
-}
+let isCodeGenOnly = 1, Defs = [CPSR], usesCustomInserter = 1 in {
+def RSBSri : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, so_imm:$imm),
+                 Size4Bytes, IIC_iALUi,
+                 [(set GPR:$Rd, (subc so_imm:$imm, GPR:$Rn))]>;
+def RSBSrr : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm),
+                 Size4Bytes, IIC_iALUr,
+                 [/* For disassembly only; pattern left blank */]>;
+def RSBSrs : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, so_reg:$shift),
+                 Size4Bytes, IIC_iALUsr,
+                 [(set GPR:$Rd, (subc so_reg:$shift, GPR:$Rn))]>;
 }
 
 let Uses = [CPSR] in {
@@ -2325,33 +2297,15 @@
 }
 
 // FIXME: Allow these to be predicated.
-let isCodeGenOnly = 1, Defs = [CPSR], Uses = [CPSR] in {
-def RSCSri : AXI1<0b0111, (outs GPR:$Rd), (ins GPR:$Rn, so_imm:$imm),
-                  DPFrm, IIC_iALUi, "rscs\t$Rd, $Rn, $imm",
+let isCodeGenOnly = 1, usesCustomInserter = 1, Defs = [CPSR], Uses = [CPSR] in {
+def RSCSri : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, so_imm:$imm),
+                  Size4Bytes, IIC_iALUi,
                   [(set GPR:$Rd, (sube_dead_carry so_imm:$imm, GPR:$Rn))]>,
-                  Requires<[IsARM]> {
-  bits<4> Rd;
-  bits<4> Rn;
-  bits<12> imm;
-  let Inst{25} = 1;
-  let Inst{20} = 1;
-  let Inst{15-12} = Rd;
-  let Inst{19-16} = Rn;
-  let Inst{11-0} = imm;
-}
-def RSCSrs : AXI1<0b0111, (outs GPR:$Rd), (ins GPR:$Rn, so_reg:$shift),
-                  DPSoRegFrm, IIC_iALUsr, "rscs\t$Rd, $Rn, $shift",
+                  Requires<[IsARM]>;
+def RSCSrs : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, so_reg:$shift),
+                  Size4Bytes, IIC_iALUsr,
                   [(set GPR:$Rd, (sube_dead_carry so_reg:$shift, GPR:$Rn))]>,
-                  Requires<[IsARM]> {
-  bits<4> Rd;
-  bits<4> Rn;
-  bits<12> shift;
-  let Inst{25} = 0;
-  let Inst{20} = 1;
-  let Inst{11-0} = shift;
-  let Inst{15-12} = Rd;
-  let Inst{19-16} = Rn;
-}
+                  Requires<[IsARM]>;
 }
 
 // (sub X, imm) gets canonicalized to (add X, -imm).  Match this form.



From lattner at apple.com  Tue Apr  5 17:49:08 2011
From: lattner at apple.com (Tanya Lattner)
Date: Tue, 05 Apr 2011 15:49:08 -0700
Subject: [llvm-commits] [PATCH] ARM DAG Combine on illegal types patch
Message-ID: <6759E2AB-9942-4D0E-B418-3AB269E33DAB@apple.com>

I've attached a patch that includes a fix for 2 crashes in the ARM DAG Combiner when doing an AND or OR combine on an illegal vector type (vectors of size 3). I've also included a test case.

Please review and let me know if its ok to commit. 

Thanks,
Tanya

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From dpatel at apple.com  Tue Apr  5 17:52:06 2011
From: dpatel at apple.com (Devang Patel)
Date: Tue, 05 Apr 2011 22:52:06 -0000
Subject: [llvm-commits] [llvm] r128947 - in /llvm/trunk:
 docs/SourceLevelDebugging.html include/llvm/Analysis/DIBuilder.h
 include/llvm/Analysis/DebugInfo.h lib/Analysis/DIBuilder.cpp
 lib/CodeGen/AsmPrinter/DwarfDebug.cpp
Message-ID: <20110405225206.9F13B2A6C12D@llvm.org>

Author: dpatel
Date: Tue Apr  5 17:52:06 2011
New Revision: 128947

URL: http://llvm.org/viewvc/llvm-project?rev=128947&view=rev
Log:
Add support to encode function's template parameters.

Modified:
    llvm/trunk/docs/SourceLevelDebugging.html
    llvm/trunk/include/llvm/Analysis/DIBuilder.h
    llvm/trunk/include/llvm/Analysis/DebugInfo.h
    llvm/trunk/lib/Analysis/DIBuilder.cpp
    llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp

Modified: llvm/trunk/docs/SourceLevelDebugging.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/SourceLevelDebugging.html?rev=128947&r1=128946&r2=128947&view=diff
==============================================================================
--- llvm/trunk/docs/SourceLevelDebugging.html (original)
+++ llvm/trunk/docs/SourceLevelDebugging.html Tue Apr  5 17:52:06 2011
@@ -441,6 +441,7 @@
   i1        ;; isArtificial
   i1        ;; isOptimized
   Function *;; Pointer to LLVM function
+  metadata  ;; Lists function template parameters
 }
 </pre>
 </div>
@@ -1200,7 +1201,14 @@
   i32 1,             ;; Line number
   metadata !4,       ;; Type
   i1 false,          ;; Is local 
-  i1 true            ;; Is definition
+  i1 true,           ;; Is definition
+  i32 0,             ;; Virtuality attribute, e.g. pure virtual function
+  i32 0,             ;; Index into virtual table for C++ methods
+  i32 0,             ;; Type that holds virtual table.
+  i32 0,             ;; Flags
+  i1 false,          ;; True if this function is optimized
+  Function *,        ;; Pointer to llvm::Function
+  null               ;; Function template parameters
 }
 ;;
 ;; Define the subprogram itself.

Modified: llvm/trunk/include/llvm/Analysis/DIBuilder.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/DIBuilder.h?rev=128947&r1=128946&r2=128947&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/DIBuilder.h (original)
+++ llvm/trunk/include/llvm/Analysis/DIBuilder.h Tue Apr  5 17:52:06 2011
@@ -368,6 +368,7 @@
     ///                      This flags are used to emit dwarf attributes.
     /// @param isOptimized   True if optimization is ON.
     /// @param Fn            llvm::Function pointer.
+    /// @param TParam        Function template parameters.
     DISubprogram createFunction(DIDescriptor Scope, StringRef Name,
                                 StringRef LinkageName,
                                 DIFile File, unsigned LineNo,
@@ -375,7 +376,8 @@
                                 bool isDefinition,
                                 unsigned Flags = 0,
                                 bool isOptimized = false,
-                                Function *Fn = 0);
+                                Function *Fn = 0,
+                                MDNode *TParam = 0);
 
     /// createMethod - Create a new descriptor for the specified C++ method.
     /// See comments in DISubprogram for descriptions of these fields.
@@ -395,6 +397,7 @@
     ///                      This flags are used to emit dwarf attributes.
     /// @param isOptimized   True if optimization is ON.
     /// @param Fn            llvm::Function pointer.
+    /// @param TParam        Function template parameters.
     DISubprogram createMethod(DIDescriptor Scope, StringRef Name,
                               StringRef LinkageName,
                               DIFile File, unsigned LineNo,
@@ -404,7 +407,8 @@
                               MDNode *VTableHolder = 0,
                               unsigned Flags = 0,
                               bool isOptimized = false,
-                              Function *Fn = 0);
+                              Function *Fn = 0,
+                              MDNode *TParam = 0);
 
     /// createNameSpace - This creates new descriptor for a namespace
     /// with the specified parent scope.

Modified: llvm/trunk/include/llvm/Analysis/DebugInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/DebugInfo.h?rev=128947&r1=128946&r2=128947&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/DebugInfo.h (original)
+++ llvm/trunk/include/llvm/Analysis/DebugInfo.h Tue Apr  5 17:52:06 2011
@@ -511,6 +511,7 @@
     bool describes(const Function *F);
 
     Function *getFunction() const { return getFunctionField(16); }
+    DIArray getTemplateParams() const { return getFieldAs<DIArray>(17); }
   };
 
   /// DIGlobalVariable - This is a wrapper for a global variable.

Modified: llvm/trunk/lib/Analysis/DIBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/DIBuilder.cpp?rev=128947&r1=128946&r2=128947&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/DIBuilder.cpp (original)
+++ llvm/trunk/lib/Analysis/DIBuilder.cpp Tue Apr  5 17:52:06 2011
@@ -642,7 +642,8 @@
                                        DIType Ty,
                                        bool isLocalToUnit, bool isDefinition,
                                        unsigned Flags, bool isOptimized,
-                                       Function *Fn) {
+                                       Function *Fn,
+                                       MDNode *TParams) {
   Value *Elts[] = {
     GetTagConstant(VMContext, dwarf::DW_TAG_subprogram),
     llvm::Constant::getNullValue(Type::getInt32Ty(VMContext)),
@@ -660,7 +661,8 @@
     llvm::Constant::getNullValue(Type::getInt32Ty(VMContext)),
     ConstantInt::get(Type::getInt32Ty(VMContext), Flags),
     ConstantInt::get(Type::getInt1Ty(VMContext), isOptimized),
-    Fn
+    Fn,
+    TParams
   };
   MDNode *Node = MDNode::get(VMContext, &Elts[0], array_lengthof(Elts));
 
@@ -682,7 +684,8 @@
                                      MDNode *VTableHolder,
                                      unsigned Flags,
                                      bool isOptimized,
-                                     Function *Fn) {
+                                     Function *Fn,
+                                     MDNode *TParam) {
   Value *Elts[] = {
     GetTagConstant(VMContext, dwarf::DW_TAG_subprogram),
     llvm::Constant::getNullValue(Type::getInt32Ty(VMContext)),
@@ -700,7 +703,8 @@
     VTableHolder,
     ConstantInt::get(Type::getInt32Ty(VMContext), Flags),
     ConstantInt::get(Type::getInt1Ty(VMContext), isOptimized),
-    Fn
+    Fn,
+    TParam,
   };
   MDNode *Node = MDNode::get(VMContext, &Elts[0], array_lengthof(Elts));
 

Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp?rev=128947&r1=128946&r2=128947&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp (original)
+++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp Tue Apr  5 17:52:06 2011
@@ -1455,6 +1455,9 @@
     addUInt(SPDie, dwarf::DW_AT_APPLE_isa, dwarf::DW_FORM_flag, isa);
   }
 
+  // Add function template parameters.
+  addTemplateParams(*SPDie, SP.getTemplateParams());
+
   // DW_TAG_inlined_subroutine may refer to this DIE.
   SPCU->insertDIE(SP, SPDie);
 



From johnny.chen at apple.com  Tue Apr  5 17:57:07 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Tue, 05 Apr 2011 22:57:07 -0000
Subject: [llvm-commits] [llvm] r128949 - in /llvm/trunk:
 lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
 test/MC/Disassembler/ARM/invalid-VQADD-arm.txt
 test/MC/Disassembler/ARM/neon-tests.txt
Message-ID: <20110405225707.7DBCF2A6C12D@llvm.org>

Author: johnny
Date: Tue Apr  5 17:57:07 2011
New Revision: 128949

URL: http://llvm.org/viewvc/llvm-project?rev=128949&view=rev
Log:
A7.3 register encoding
    Qd -> bit[12] == 0
    Qn -> bit[16] == 0
    Qm -> bit[0]  == 0

If one of these bits is 1, the instruction is UNDEFINED.

rdar://problem/9238399
rdar://problem/9238445

Added:
    llvm/trunk/test/MC/Disassembler/ARM/invalid-VQADD-arm.txt
Modified:
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
    llvm/trunk/test/MC/Disassembler/ARM/neon-tests.txt

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp?rev=128949&r1=128948&r2=128949&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp Tue Apr  5 17:57:07 2011
@@ -94,6 +94,16 @@
   }
 
   // See also decodeNEONRd(), decodeNEONRn(), decodeNEONRm().
+  // A7.3 register encoding
+  //     Qd -> bit[12] == 0
+  //     Qn -> bit[16] == 0
+  //     Qm -> bit[0]  == 0
+  //
+  // If one of these bits is 1, the instruction is UNDEFINED.
+  if (RegClassID == ARM::QPRRegClassID && slice(RawRegister, 0, 0) == 1) {
+    B->SetErr(-1);
+    return 0;
+  }
   unsigned RegNum =
     RegClassID == ARM::QPRRegClassID ? RawRegister >> 1 : RawRegister;
 

Added: llvm/trunk/test/MC/Disassembler/ARM/invalid-VQADD-arm.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/invalid-VQADD-arm.txt?rev=128949&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/invalid-VQADD-arm.txt (added)
+++ llvm/trunk/test/MC/Disassembler/ARM/invalid-VQADD-arm.txt Tue Apr  5 17:57:07 2011
@@ -0,0 +1,10 @@
+# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding}
+
+# Opcode=1225 Name=VQADDsv16i8 Format=ARM_FORMAT_N3Reg(37)
+#  31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
+# -------------------------------------------------------------------------------------------------
+# | 1: 1: 1: 1| 0: 0: 1: 0| 0: 1: 0: 0| 0: 0: 0: 0| 1: 1: 1: 0| 0: 0: 0: 0| 1: 1: 0: 1| 1: 0: 1: 1|
+# -------------------------------------------------------------------------------------------------
+#
+# Qm -> bit[0] == 0, otherwise UNDEFINED
+0xdb 0xe0 0x40 0xf2

Modified: llvm/trunk/test/MC/Disassembler/ARM/neon-tests.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/neon-tests.txt?rev=128949&r1=128948&r2=128949&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/neon-tests.txt (original)
+++ llvm/trunk/test/MC/Disassembler/ARM/neon-tests.txt Tue Apr  5 17:57:07 2011
@@ -67,7 +67,7 @@
 0x5f 0xe5 0xc4 0xf2
 
 # CHECK:	vbic.i32	q2, #0xA900
-0x79 0x53 0x82 0xf3
+0x79 0x43 0x82 0xf3
 
 # CHECK:	vst2.32	{d16, d18}, [r2, :64], r2
 0x92 0x9 0x42 0xf4



From resistor at mac.com  Tue Apr  5 18:03:06 2011
From: resistor at mac.com (Owen Anderson)
Date: Tue, 05 Apr 2011 23:03:06 -0000
Subject: [llvm-commits] [llvm] r128951 - in /llvm/trunk/lib/Target/ARM:
 ARMISelLowering.cpp ARMInstrInfo.td
Message-ID: <20110405230306.BE8B72A6C12D@llvm.org>

Author: resistor
Date: Tue Apr  5 18:03:06 2011
New Revision: 128951

URL: http://llvm.org/viewvc/llvm-project?rev=128951&view=rev
Log:
Revert r128946 while I figure out why it broke the buildbots.

Modified:
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=128951&r1=128950&r2=128951&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Tue Apr  5 18:03:06 2011
@@ -5029,12 +5029,7 @@
   case ARM::ADCSSrs:
   case ARM::SBCSSri:
   case ARM::SBCSSrr:
-  case ARM::SBCSSrs:
-  case ARM::RSBSri:
-  case ARM::RSBSrr:
-  case ARM::RSBSrs:
-  case ARM::RSCSri:
-  case ARM::RSCSrs: {
+  case ARM::SBCSSrs: {
     unsigned OldOpc = MI->getOpcode();
     unsigned Opc = 0;
     switch (OldOpc) {
@@ -5056,21 +5051,6 @@
       case ARM::SBCSSrs:
         Opc = ARM::SBCrs;
         break;
-      case ARM::RSBSri:
-        Opc = ARM::RSBri;
-        break;
-      case ARM::RSBSrr:
-        Opc = ARM::RSBrr;
-        break;
-      case ARM::RSBSrs:
-        Opc = ARM::RSBrs;
-        break;
-      case ARM::RSCSri:
-        Opc = ARM::RSCri;
-        break;
-      case ARM::RSCSrs:
-        Opc = ARM::RSCrs;
-        break;
       default:
         llvm_unreachable("Unknown opcode?");
     }

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=128951&r1=128950&r2=128951&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Tue Apr  5 18:03:06 2011
@@ -2243,16 +2243,44 @@
 }
 
 // RSB with 's' bit set.
-let isCodeGenOnly = 1, Defs = [CPSR], usesCustomInserter = 1 in {
-def RSBSri : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, so_imm:$imm),
-                 Size4Bytes, IIC_iALUi,
-                 [(set GPR:$Rd, (subc so_imm:$imm, GPR:$Rn))]>;
-def RSBSrr : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm),
-                 Size4Bytes, IIC_iALUr,
-                 [/* For disassembly only; pattern left blank */]>;
-def RSBSrs : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, so_reg:$shift),
-                 Size4Bytes, IIC_iALUsr,
-                 [(set GPR:$Rd, (subc so_reg:$shift, GPR:$Rn))]>;
+let isCodeGenOnly = 1, Defs = [CPSR] in {
+def RSBSri : AI1<0b0011, (outs GPR:$Rd), (ins GPR:$Rn, so_imm:$imm), DPFrm,
+                 IIC_iALUi, "rsbs", "\t$Rd, $Rn, $imm",
+                 [(set GPR:$Rd, (subc so_imm:$imm, GPR:$Rn))]> {
+  bits<4> Rd;
+  bits<4> Rn;
+  bits<12> imm;
+  let Inst{25} = 1;
+  let Inst{20} = 1;
+  let Inst{15-12} = Rd;
+  let Inst{19-16} = Rn;
+  let Inst{11-0} = imm;
+}
+def RSBSrr : AI1<0b0011, (outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm), DPFrm,
+                 IIC_iALUr, "rsbs", "\t$Rd, $Rn, $Rm",
+                 [/* For disassembly only; pattern left blank */]> {
+  bits<4> Rd;
+  bits<4> Rn;
+  bits<4> Rm;
+  let Inst{11-4} = 0b00000000;
+  let Inst{25} = 0;
+  let Inst{20} = 1;
+  let Inst{3-0} = Rm;
+  let Inst{15-12} = Rd;
+  let Inst{19-16} = Rn;
+}
+def RSBSrs : AI1<0b0011, (outs GPR:$Rd), (ins GPR:$Rn, so_reg:$shift),
+                 DPSoRegFrm, IIC_iALUsr, "rsbs", "\t$Rd, $Rn, $shift",
+                 [(set GPR:$Rd, (subc so_reg:$shift, GPR:$Rn))]> {
+  bits<4> Rd;
+  bits<4> Rn;
+  bits<12> shift;
+  let Inst{25} = 0;
+  let Inst{20} = 1;
+  let Inst{11-0} = shift;
+  let Inst{15-12} = Rd;
+  let Inst{19-16} = Rn;
+}
 }
 
 let Uses = [CPSR] in {
@@ -2297,15 +2325,33 @@
 }
 
 // FIXME: Allow these to be predicated.
-let isCodeGenOnly = 1, usesCustomInserter = 1, Defs = [CPSR], Uses = [CPSR] in {
-def RSCSri : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, so_imm:$imm),
-                  Size4Bytes, IIC_iALUi,
+let isCodeGenOnly = 1, Defs = [CPSR], Uses = [CPSR] in {
+def RSCSri : AXI1<0b0111, (outs GPR:$Rd), (ins GPR:$Rn, so_imm:$imm),
+                  DPFrm, IIC_iALUi, "rscs\t$Rd, $Rn, $imm",
                   [(set GPR:$Rd, (sube_dead_carry so_imm:$imm, GPR:$Rn))]>,
-                  Requires<[IsARM]>;
-def RSCSrs : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, so_reg:$shift),
-                  Size4Bytes, IIC_iALUsr,
+                  Requires<[IsARM]> {
+  bits<4> Rd;
+  bits<4> Rn;
+  bits<12> imm;
+  let Inst{25} = 1;
+  let Inst{20} = 1;
+  let Inst{15-12} = Rd;
+  let Inst{19-16} = Rn;
+  let Inst{11-0} = imm;
+}
+def RSCSrs : AXI1<0b0111, (outs GPR:$Rd), (ins GPR:$Rn, so_reg:$shift),
+                  DPSoRegFrm, IIC_iALUsr, "rscs\t$Rd, $Rn, $shift",
                   [(set GPR:$Rd, (sube_dead_carry so_reg:$shift, GPR:$Rn))]>,
-                  Requires<[IsARM]>;
+                  Requires<[IsARM]> {
+  bits<4> Rd;
+  bits<4> Rn;
+  bits<12> shift;
+  let Inst{25} = 0;
+  let Inst{20} = 1;
+  let Inst{11-0} = shift;
+  let Inst{15-12} = Rd;
+  let Inst{19-16} = Rn;
+}
 }
 
 // (sub X, imm) gets canonicalized to (add X, -imm).  Match this form.



From chandlerc at gmail.com  Tue Apr  5 18:03:25 2011
From: chandlerc at gmail.com (Chandler Carruth)
Date: Tue, 05 Apr 2011 23:03:25 -0000
Subject: [llvm-commits] [llvm] r128952 -
	/llvm/trunk/include/llvm/ExecutionEngine/RuntimeDyld.h
Message-ID: <20110405230325.14D692A6C12D@llvm.org>

Author: chandlerc
Date: Tue Apr  5 18:03:24 2011
New Revision: 128952

URL: http://llvm.org/viewvc/llvm-project?rev=128952&view=rev
Log:
Provide an empty virtual destructor to go with the virtual methods in
this class. Clang was warning on this with -Wnon-virtual-dtor.

Modified:
    llvm/trunk/include/llvm/ExecutionEngine/RuntimeDyld.h

Modified: llvm/trunk/include/llvm/ExecutionEngine/RuntimeDyld.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ExecutionEngine/RuntimeDyld.h?rev=128952&r1=128951&r2=128952&view=diff
==============================================================================
--- llvm/trunk/include/llvm/ExecutionEngine/RuntimeDyld.h (original)
+++ llvm/trunk/include/llvm/ExecutionEngine/RuntimeDyld.h Tue Apr  5 18:03:24 2011
@@ -33,6 +33,7 @@
   void operator=(const RTDyldMemoryManager&);       // DO NOT IMPLEMENT
 public:
   RTDyldMemoryManager() {}
+  virtual ~RTDyldMemoryManager() {}
 
   // Allocate ActualSize bytes, or more, for the named function. Return
   // a pointer to the allocated memory and update Size to reflect how much



From bob.wilson at apple.com  Tue Apr  5 18:03:25 2011
From: bob.wilson at apple.com (Bob Wilson)
Date: Tue, 05 Apr 2011 23:03:25 -0000
Subject: [llvm-commits] [llvm] r128953 -
	/llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
Message-ID: <20110405230325.A493A2A6C12E@llvm.org>

Author: bwilson
Date: Tue Apr  5 18:03:25 2011
New Revision: 128953

URL: http://llvm.org/viewvc/llvm-project?rev=128953&view=rev
Log:
Clean up some code for clarity.

Modified:
    llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp?rev=128953&r1=128952&r2=128953&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Tue Apr  5 18:03:25 2011
@@ -454,6 +454,25 @@
   unsigned PRegNum = PMO.isUndef() ? UINT_MAX
     : getARMRegisterNumbering(PReg);
   unsigned Count = 1;
+  unsigned Limit = ~0U;
+
+  // vldm / vstm limit are 32 for S variants, 16 for D variants.
+
+  switch (Opcode) {
+  default: break;
+  case ARM::VSTRS:
+    Limit = 32;
+    break;
+  case ARM::VSTRD:
+    Limit = 16;
+    break;
+  case ARM::VLDRD:
+    Limit = 16;
+    break;
+  case ARM::VLDRS:
+    Limit = 32;
+    break;
+  }
 
   for (unsigned i = SIndex+1, e = MemOps.size(); i != e; ++i) {
     int NewOffset = MemOps[i].Offset;
@@ -461,13 +480,13 @@
     unsigned Reg = MO.getReg();
     unsigned RegNum = MO.isUndef() ? UINT_MAX
       : getARMRegisterNumbering(Reg);
-    // Register numbers must be in ascending order.  For VFP, the registers
-    // must also be consecutive and there is a limit of 16 double-word
-    // registers per instruction.
+    // Register numbers must be in ascending order. For VFP / NEON load and
+    // store multiples, the registers must also be consecutive and within the
+    // limit on the number of registers per instruction.
     if (Reg != ARM::SP &&
         NewOffset == Offset + (int)Size &&
-        ((isNotVFP && RegNum > PRegNum)
-         || ((Size < 8 || Count < 16) && RegNum == PRegNum+1))) {
+        ((isNotVFP && RegNum > PRegNum) ||
+         ((Count < Limit) && RegNum == PRegNum+1))) {
       Offset += Size;
       PRegNum = RegNum;
       ++Count;



From sabre at nondot.org  Tue Apr  5 18:18:20 2011
From: sabre at nondot.org (Chris Lattner)
Date: Tue, 05 Apr 2011 23:18:20 -0000
Subject: [llvm-commits] [llvm] r128954 -
	/llvm/trunk/docs/ProgrammersManual.html
Message-ID: <20110405231820.A2ADE2A6C12D@llvm.org>

Author: lattner
Date: Tue Apr  5 18:18:20 2011
New Revision: 128954

URL: http://llvm.org/viewvc/llvm-project?rev=128954&view=rev
Log:
mention llvm::ArrayRef, which should be use much more pervasively than
it already is.


Modified:
    llvm/trunk/docs/ProgrammersManual.html

Modified: llvm/trunk/docs/ProgrammersManual.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ProgrammersManual.html?rev=128954&r1=128953&r2=128954&view=diff
==============================================================================
--- llvm/trunk/docs/ProgrammersManual.html (original)
+++ llvm/trunk/docs/ProgrammersManual.html Tue Apr  5 18:18:20 2011
@@ -56,6 +56,7 @@
     <ul>
     <li><a href="#ds_sequential">Sequential Containers (std::vector, std::list, etc)</a>
     <ul>
+      <li><a href="#dss_arrayref">llvm/ADT/ArrayRef.h</a></li>
       <li><a href="#dss_fixedarrays">Fixed Size Arrays</a></li>
       <li><a href="#dss_heaparrays">Heap Allocated Arrays</a></li>
       <li><a href="#dss_smallvector">"llvm/ADT/SmallVector.h"</a></li>
@@ -891,6 +892,21 @@
 
 <!-- _______________________________________________________________________ -->
 <div class="doc_subsubsection">
+  <a name="dss_arrayref">llvm/ADT/ArrayRef.h</a>
+</div>
+
+<div class="doc_text">
+<p>The llvm::ArrayRef class is the preferred class to use in an interface that
+   accepts a sequential list of elements in memory and just reads from them.  By
+   taking an ArrayRef, the API can be passed a fixed size array, an std::vector,
+   an llvm::SmallVector and anything else that is contiguous in memory.
+</p>
+</div>
+
+
+  
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
   <a name="dss_fixedarrays">Fixed Size Arrays</a>
 </div>
 



From sabre at nondot.org  Tue Apr  5 18:22:33 2011
From: sabre at nondot.org (Chris Lattner)
Date: Tue, 05 Apr 2011 23:22:33 -0000
Subject: [llvm-commits] [llvm] r128955 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <20110405232233.5D18D2A6C12D@llvm.org>

Author: lattner
Date: Tue Apr  5 18:22:33 2011
New Revision: 128955

URL: http://llvm.org/viewvc/llvm-project?rev=128955&view=rev
Log:
finished my pass through all the 2.9 commits, now to make this intelligible



Modified:
    llvm/trunk/docs/ReleaseNotes.html

Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=128955&r1=128954&r2=128955&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Tue Apr  5 18:22:33 2011
@@ -60,18 +60,14 @@
 <a href="http://llvm.org/releases/">releases page</a>.</p>
 
 </div>
-
-<!--
-Almost dead code.
-  lib/Transforms/IPO/MergeFunctions.cpp => consider for 3.0.
--->
- 
    
-<!-- Features that need text if they're finished for 3.0:
+<!-- Features that need text if they're finished for 3.1:
+  ARM EHABI
   combiner-aa?
   strong phi elim
   loop dependence analysis
   CorrelatedValuePropagation
+  lib/Transforms/IPO/MergeFunctions.cpp => consider for 3.1.
  -->
  
 <!-- *********************************************************************** -->
@@ -331,8 +327,9 @@
   
 inline asm multiple alternative constraint support.
   
-LoopIdiom: memset/memcpy formation.  Build with -ffreestanding or -fno-builtin
-  if your memcpy is being compiled into infinite recursion.
+LoopIdiom: memset/memcpy formation and memset_pattern on darwin.  Build with
+  -ffreestanding or -fno-builtin if your memcpy is being compiled into infinite
+  recursion.
   
 
 TargetLibraryInfo
@@ -351,7 +348,7 @@
 
 - DIBuilder provides simpler interface for front ends like Clang to encode debug info in LLVM IR.
   - This interface hides implementation details (e.g. DIDerivedType, existence of compile unit etc..) that any front end should not know about.
-  For example,
+  For example, DIFactory DebugFactory;
   Ty = DebugFactory.CreateDerivedType(DW_TAG_volatile_type,
   findRegion(TYPE_CONTEXT(type)),
   StringRef(),
@@ -364,6 +361,7 @@
   MainTy);
   can be replaced by
   DbgTy = DBuilder.createQualifiedType(DW_TAG_volatile_type, MainTy); 
+DIFactory is gone now.
   
 PPC: Switched to MCInstPrinter, and MCCodeEmitter.  Ready to implement support
   for directly writing out mach-o object files, but noone seems interested.
@@ -372,6 +370,9 @@
   
 Scheduler now models operand latency and pipeline forwarding.
   
+Can optimize printf to iprintf when no floating point is used, for embedded
+  targets with smaller iprintf implementation.
+  
 error_code + libsystem + PathV2 changes
   The system_error header from C++0x was added.
   * Use if (error_code ec = function()) to check for error conditions
@@ -407,6 +408,7 @@
   href="CodeGenerator.html#na_instparsing">MnemonicAlias and InstAlias</a>
   
 LoopIndexSplit pass was removed, unmaintained.
+LiveValues, SimplifyHalfPowrLibCalls, and GEPSplitter were removed.
   
 include/llvm/System merged into include/llvm/Support.
  
@@ -460,12 +462,29 @@
 SPARC: Many improvements, including using the Y registers for multiplications
   and addition of a simple delay slot filler.
   
-</pre></li>
-</ul>
   
-Still todo: [110117-110228]
+udiv, ashr, lshr, shl now have exact and nuw/nsw bits: PR8862 / LangRef.html
+  
+lib/Object and llvm-objdump
 
   
+  Target Independent Code Gen:
+  The pre-register-allocation (preRA) instruction scheduler models register pressure
+  much more accurately in some cases. This allows the adoption of more
+  aggressive scheduling heuristics.
+  
+  The X86 backend has adopted a new preRA scheduling
+  mode, "list-ilp", to shorten the height of instruction schedules
+  without inducing register spills.
+  
+  The ARM backend preRA scheduler now models machine resources at cycle
+  granularity. This allows the scheduler to both accurately model
+  instruction latency and avoid overcommitting functional units.
+
+  
+</pre></li>
+</ul>
+  
 </div>
 
 <!--=========================================================================-->



From clattner at apple.com  Tue Apr  5 18:29:02 2011
From: clattner at apple.com (Chris Lattner)
Date: Tue, 05 Apr 2011 16:29:02 -0700
Subject: [llvm-commits] [llvm] r128952 -
 /llvm/trunk/include/llvm/ExecutionEngine/RuntimeDyld.h
In-Reply-To: <20110405230325.14D692A6C12D@llvm.org>
References: <20110405230325.14D692A6C12D@llvm.org>
Message-ID: <2375D85E-4855-4D89-87BC-EB36261311A7@apple.com>


On Apr 5, 2011, at 4:03 PM, Chandler Carruth wrote:

> Author: chandlerc
> Date: Tue Apr  5 18:03:24 2011
> New Revision: 128952
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=128952&view=rev
> Log:
> Provide an empty virtual destructor to go with the virtual methods in
> this class. Clang was warning on this with -Wnon-virtual-dtor.

Hi Chandler,

Please move the method out of line, since it is the only candidate for being a key function.  Thanks!

-Chris

> 
> Modified:
>    llvm/trunk/include/llvm/ExecutionEngine/RuntimeDyld.h
> 
> Modified: llvm/trunk/include/llvm/ExecutionEngine/RuntimeDyld.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ExecutionEngine/RuntimeDyld.h?rev=128952&r1=128951&r2=128952&view=diff
> ==============================================================================
> --- llvm/trunk/include/llvm/ExecutionEngine/RuntimeDyld.h (original)
> +++ llvm/trunk/include/llvm/ExecutionEngine/RuntimeDyld.h Tue Apr  5 18:03:24 2011
> @@ -33,6 +33,7 @@
>   void operator=(const RTDyldMemoryManager&);       // DO NOT IMPLEMENT
> public:
>   RTDyldMemoryManager() {}
> +  virtual ~RTDyldMemoryManager() {}
> 
>   // Allocate ActualSize bytes, or more, for the named function. Return
>   // a pointer to the allocated memory and update Size to reflect how much
> 
> 
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits


From johnny.chen at apple.com  Tue Apr  5 18:28:01 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Tue, 05 Apr 2011 23:28:01 -0000
Subject: [llvm-commits] [llvm] r128958 - in /llvm/trunk:
 lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
 test/MC/Disassembler/ARM/arm-tests.txt
Message-ID: <20110405232801.23CF72A6C12D@llvm.org>

Author: johnny
Date: Tue Apr  5 18:28:00 2011
New Revision: 128958

URL: http://llvm.org/viewvc/llvm-project?rev=128958&view=rev
Log:
Fix a typo in the handling of PKHTB opcode, plus add sanity check for illegal register
encodings for DisassembleArithMiscFrm().

rdar://problem/9238659

Modified:
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
    llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp?rev=128958&r1=128957&r2=128958&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp Tue Apr  5 18:28:00 2011
@@ -1474,6 +1474,12 @@
 
   bool ThreeReg = NumOps > 2 && OpInfo[2].RegClass == ARM::GPRRegClassID;
 
+  // Sanity check the registers, which should not be 15.
+  if (decodeRd(insn) == 15 || decodeRm(insn) == 15)
+    return false;
+  if (ThreeReg && decodeRn(insn) == 15)
+    return false;
+
   MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRd(insn))));
   ++OpIdx;
@@ -1498,7 +1504,7 @@
     ARM_AM::ShiftOpc Opc = ARM_AM::no_shift;
     if (Opcode == ARM::PKHBT)
       Opc = ARM_AM::lsl;
-    else if (Opcode == ARM::PKHBT)
+    else if (Opcode == ARM::PKHTB)
       Opc = ARM_AM::asr;
     getImmShiftSE(Opc, ShiftAmt);
     MI.addOperand(MCOperand::CreateImm(ARM_AM::getSORegOpc(Opc, ShiftAmt)));

Modified: llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt?rev=128958&r1=128957&r2=128958&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt (original)
+++ llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt Tue Apr  5 18:28:00 2011
@@ -76,9 +76,12 @@
 # CHECK:	pkhbt	r8, r9, r10, lsl #4
 0x1a 0x82 0x89 0xe6
 
-# CHECK-NOT:	pkhbtls	pc, r11, r11, lsl #0
-# CHECK:	pkhbtls	pc, r11, r11
-0x1b 0xf0 0x8b 0x96
+# CHECK-NOT:	pkhbtls	r10, r11, r11, lsl #0
+# CHECK:	pkhbtls	r10, r11, r11
+0x1b 0xa0 0x8b 0x96
+
+# CHECK:	pkhtbmi	lr, r1, r6, asr #21
+0xd6 0xea 0x81 0x46
 
 # CHECK:	pop	{r0, r2, r4, r6, r8, r10}
 0x55 0x05 0xbd 0xe8



From grosbach at apple.com  Tue Apr  5 18:39:08 2011
From: grosbach at apple.com (Jim Grosbach)
Date: Tue, 05 Apr 2011 23:39:08 -0000
Subject: [llvm-commits] [llvm] r128959 -
	/llvm/trunk/lib/ExecutionEngine/MCJIT/MCJITMemoryManager.h
Message-ID: <20110405233908.8E6E42A6C12D@llvm.org>

Author: grosbach
Date: Tue Apr  5 18:39:08 2011
New Revision: 128959

URL: http://llvm.org/viewvc/llvm-project?rev=128959&view=rev
Log:
Remove extraneous 'return'.

Modified:
    llvm/trunk/lib/ExecutionEngine/MCJIT/MCJITMemoryManager.h

Modified: llvm/trunk/lib/ExecutionEngine/MCJIT/MCJITMemoryManager.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/MCJIT/MCJITMemoryManager.h?rev=128959&r1=128958&r2=128959&view=diff
==============================================================================
--- llvm/trunk/lib/ExecutionEngine/MCJIT/MCJITMemoryManager.h (original)
+++ llvm/trunk/lib/ExecutionEngine/MCJIT/MCJITMemoryManager.h Tue Apr  5 18:39:08 2011
@@ -47,8 +47,7 @@
     // the address space/sizes we're compiling on are the same as what we're
     // compiling for, so it uses pointer types for its addresses. Explicit
     // casts between them to deal with that.
-    return JMM->endFunctionBody(F, (uint8_t*)FunctionStart,
-                                (uint8_t*)FunctionEnd);
+    JMM->endFunctionBody(F, (uint8_t*)FunctionStart, (uint8_t*)FunctionEnd);
   }
 
 };



From aggarwa4 at illinois.edu  Tue Apr  5 18:40:49 2011
From: aggarwa4 at illinois.edu (Arushi Aggarwal)
Date: Tue, 05 Apr 2011 23:40:49 -0000
Subject: [llvm-commits] [poolalloc] r128960 - in
 /poolalloc/trunk/lib/AssistDS: FuncSpec.cpp Int2PtrCmp.cpp
Message-ID: <20110405234049.B9EBB2A6C12D@llvm.org>

Author: aggarwa4
Date: Tue Apr  5 18:40:49 2011
New Revision: 128960

URL: http://llvm.org/viewvc/llvm-project?rev=128960&view=rev
Log:
Added comments.

Modified:
    poolalloc/trunk/lib/AssistDS/FuncSpec.cpp
    poolalloc/trunk/lib/AssistDS/Int2PtrCmp.cpp

Modified: poolalloc/trunk/lib/AssistDS/FuncSpec.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/AssistDS/FuncSpec.cpp?rev=128960&r1=128959&r2=128960&view=diff
==============================================================================
--- poolalloc/trunk/lib/AssistDS/FuncSpec.cpp (original)
+++ poolalloc/trunk/lib/AssistDS/FuncSpec.cpp Tue Apr  5 18:40:49 2011
@@ -121,6 +121,9 @@
   };
 }
 
+// Pass ID variable
 char FuncSpec::ID = 0;
+
+// Register the pass
 static RegisterPass<FuncSpec>
 X("funcspec", "Specialize for Function Pointers");

Modified: poolalloc/trunk/lib/AssistDS/Int2PtrCmp.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/AssistDS/Int2PtrCmp.cpp?rev=128960&r1=128959&r2=128960&view=diff
==============================================================================
--- poolalloc/trunk/lib/AssistDS/Int2PtrCmp.cpp (original)
+++ poolalloc/trunk/lib/AssistDS/Int2PtrCmp.cpp Tue Apr  5 18:40:49 2011
@@ -6,7 +6,12 @@
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
-#define DEBUG_TYPE "varargfunc"
+// Remove unnecessary inttoptr casts
+// Specially ones used in just compares
+// Most cases derived from InstCombine
+//
+//===----------------------------------------------------------------------===//
+#define DEBUG_TYPE "int2ptr-cmp"
 
 #include "llvm/Instructions.h"
 #include "llvm/Module.h"
@@ -32,31 +37,45 @@
   public:
     static char ID;
     Int2PtrCmp() : ModulePass(&ID) {}
+
+    //
+    // Method: runOnModule()
+    //
+    // Description:
+    //  Entry point for this LLVM pass.
+    //  Remove unnecessary inttoptr instructions.
+    //
+    // Inputs:
+    //  M - A reference to the LLVM module to transform
+    //
+    // Outputs:
+    //  M - The transformed LLVM module.
+    //
+    // Return value:
+    //  true  - The module was modified.
+    //  false - The module was not modified.
+    //
     bool runOnModule(Module& M) {
-    TD = &getAnalysis<TargetData>();
-      //std::vector<PtrToIntInst*> worklist;
+      TD = &getAnalysis<TargetData>();
       for (Module::iterator F = M.begin(); F != M.end(); ++F) {
         for (Function::iterator B = F->begin(), FE = F->end(); B != FE; ++B) {      
           for (BasicBlock::iterator I = B->begin(), BE = B->end(); I != BE;) {
+            // ptrtoint(inttoptr ty Y) to ty -> Y 
             if(PtrToIntInst *P2I = dyn_cast<PtrToIntInst>(I++)) {
               if(IntToPtrInst *I2P = dyn_cast<IntToPtrInst>(P2I->getOperand(0))) {
                 if(I2P->getSrcTy() == P2I->getDestTy()){
                   P2I->replaceAllUsesWith(I2P->getOperand(0));
                   P2I->eraseFromParent();
-                  if(I2P->use_empty())
+                  if(I2P->use_empty()) {
+                    // If this is the only use of the cast delete it.
                     I2P->eraseFromParent();
+                  }
                 }
-
               }
             }
           }
-        }
-      }
-      
-      //icmp pred inttoptr(X), null  -> icmp pred X 0
-      for (Module::iterator F = M.begin(); F != M.end(); ++F) {
-        for (Function::iterator B = F->begin(), FE = F->end(); B != FE; ++B) {      
           for (BasicBlock::iterator I = B->begin(), BE = B->end(); I != BE;) {
+            //icmp pred inttoptr(X), null  -> icmp pred X 0
             if(ICmpInst *CI = dyn_cast<ICmpInst>(I++)) {
               Value *Op0 = CI->getOperand(0);
               Value *Op1 = CI->getOperand(1);
@@ -68,11 +87,13 @@
                         LHSI->getOperand(0)->getType()){
                       ICmpInst *CI_new = new ICmpInst(CI, CI->getPredicate(), LHSI->getOperand(0),
                                                       Constant::getNullValue(LHSI->getOperand(0)->getType()));
-                      
+
                       CI->replaceAllUsesWith(CI_new);
                       CI->eraseFromParent();
-                      if(LHSI->use_empty())
+                      if(LHSI->use_empty()) {
+                        // If this is the only use of the cast delete it.
                         LHSI->eraseFromParent();
+                      }
                     }
                   }
                 }
@@ -98,10 +119,12 @@
                       break;
                     Value *P, *Q, *R;
                     if (match(LHSI, m_Or(m_PtrToInt(m_Value(P)), m_PtrToInt(m_Value(Q))))) {
+                      // Simplify icmp eq (or (ptrtoint P), (ptrtoint Q)), 0
+                      // -> and (icmp eq P, null), (icmp eq Q, null).
                       Value *ICIP = new ICmpInst(ICI, ICI->getPredicate(), P,
-                                                        Constant::getNullValue(P->getType()));
+                                                 Constant::getNullValue(P->getType()));
                       Value *ICIQ = new ICmpInst(ICI, ICI->getPredicate(), Q,
-                                                        Constant::getNullValue(Q->getType()));
+                                                 Constant::getNullValue(Q->getType()));
                       Instruction *Op;
                       if (ICI->getPredicate() == ICmpInst::ICMP_EQ)
                         Op = BinaryOperator::CreateAnd(ICIP, ICIQ,"",ICI);
@@ -109,13 +132,17 @@
                         Op = BinaryOperator::CreateOr(ICIP, ICIQ, "", ICI);
                       ICI->replaceAllUsesWith(Op);
 
-                    } else if(match(LHSI, m_Or(m_Or(m_PtrToInt(m_Value(P)), m_PtrToInt(m_Value(Q))), m_PtrToInt(m_Value(R))))) {
+                    } else if(match(LHSI, m_Or(m_Or(m_PtrToInt(m_Value(P)), 
+                                                    m_PtrToInt(m_Value(Q))), 
+                                               m_PtrToInt(m_Value(R))))) {
+                      // Simplify icmp eq (or (or (ptrtoint P), (ptrtoint Q)), ptrtoint(R)), 0
+                      // -> and (and (icmp eq P, null), (icmp eq Q, null)), (icmp eq R, null).
                       Value *ICIP = new ICmpInst(ICI, ICI->getPredicate(), P,
-                                                        Constant::getNullValue(P->getType()));
+                                                 Constant::getNullValue(P->getType()));
                       Value *ICIQ = new ICmpInst(ICI, ICI->getPredicate(), Q,
-                                                        Constant::getNullValue(Q->getType()));
+                                                 Constant::getNullValue(Q->getType()));
                       Value *ICIR = new ICmpInst(ICI, ICI->getPredicate(), R,
-                                                        Constant::getNullValue(R->getType()));
+                                                 Constant::getNullValue(R->getType()));
                       Instruction *Op;
                       if (ICI->getPredicate() == ICmpInst::ICMP_EQ)
                         Op = BinaryOperator::CreateAnd(ICIP, ICIQ,"",ICI);
@@ -128,13 +155,16 @@
                         Op = BinaryOperator::CreateOr(Op, ICIR, "", ICI);
                       ICI->replaceAllUsesWith(Op);
 
-                    } else if(match(LHSI, m_Or(m_PtrToInt(m_Value(Q)), m_Or(m_PtrToInt(m_Value(P)), m_PtrToInt(m_Value(R)))))) {
+                    } else if(match(LHSI, m_Or(m_PtrToInt(m_Value(Q)), m_Or(
+                            m_PtrToInt(m_Value(P)), m_PtrToInt(m_Value(R)))))) {
+                      // Simplify icmp eq (or  (ptrtoint P), or((ptrtoint Q), ptrtoint(R))), 0
+                      // -> and (icmp eq P, null), (and (icmp eq Q, null), (icmp eq R, null)).
                       Value *ICIP = new ICmpInst(ICI, ICI->getPredicate(), P,
-                                                        Constant::getNullValue(P->getType()));
+                                                 Constant::getNullValue(P->getType()));
                       Value *ICIQ = new ICmpInst(ICI, ICI->getPredicate(), Q,
-                                                        Constant::getNullValue(Q->getType()));
+                                                 Constant::getNullValue(Q->getType()));
                       Value *ICIR = new ICmpInst(ICI, ICI->getPredicate(), R,
-                                                        Constant::getNullValue(R->getType()));
+                                                 Constant::getNullValue(R->getType()));
                       Instruction *Op;
                       if (ICI->getPredicate() == ICmpInst::ICMP_EQ)
                         Op = BinaryOperator::CreateAnd(ICIP, ICIQ,"",ICI);
@@ -162,6 +192,9 @@
   };
 }
 
+// Pass ID variable
 char Int2PtrCmp::ID = 0;
+
+// Register the pass
 static RegisterPass<Int2PtrCmp>
-X("int2ptrcmp", "Simplify inttoptr/ptrtoint if derived from the other");
+X("int2ptrcmp", "Simplify inttoptr/ptrtoint insts");



From stoklund at 2pi.dk  Tue Apr  5 18:43:11 2011
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Tue, 05 Apr 2011 23:43:11 -0000
Subject: [llvm-commits] [llvm] r128961 -
	/llvm/trunk/lib/CodeGen/MachineVerifier.cpp
Message-ID: <20110405234311.DFE0C2A6C12D@llvm.org>

Author: stoklund
Date: Tue Apr  5 18:43:11 2011
New Revision: 128961

URL: http://llvm.org/viewvc/llvm-project?rev=128961&view=rev
Log:
Permit blocks to branch directly to a landing pad.

Treat the landing pad as a normal successor when that happens.

Modified:
    llvm/trunk/lib/CodeGen/MachineVerifier.cpp

Modified: llvm/trunk/lib/CodeGen/MachineVerifier.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineVerifier.cpp?rev=128961&r1=128960&r2=128961&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineVerifier.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineVerifier.cpp Tue Apr  5 18:43:11 2011
@@ -402,6 +402,11 @@
   SmallVector<MachineOperand, 4> Cond;
   if (!TII->AnalyzeBranch(*const_cast<MachineBasicBlock *>(MBB),
                           TBB, FBB, Cond)) {
+    // If the block branches directly to a landing pad successor, pretend that
+    // the landing pad is a normal block.
+    LandingPadSuccs.erase(TBB);
+    LandingPadSuccs.erase(FBB);
+
     // Ok, AnalyzeBranch thinks it knows what's going on with this block. Let's
     // check whether its answers match up with reality.
     if (!TBB && !FBB) {



From stoklund at 2pi.dk  Tue Apr  5 18:43:14 2011
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Tue, 05 Apr 2011 23:43:14 -0000
Subject: [llvm-commits] [llvm] r128962 - /llvm/trunk/lib/CodeGen/SplitKit.cpp
Message-ID: <20110405234314.2C3022A6C12E@llvm.org>

Author: stoklund
Date: Tue Apr  5 18:43:14 2011
New Revision: 128962

URL: http://llvm.org/viewvc/llvm-project?rev=128962&view=rev
Log:
Don't crash when a value is defined after the last split point.

Modified:
    llvm/trunk/lib/CodeGen/SplitKit.cpp

Modified: llvm/trunk/lib/CodeGen/SplitKit.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SplitKit.cpp?rev=128962&r1=128961&r2=128962&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SplitKit.cpp (original)
+++ llvm/trunk/lib/CodeGen/SplitKit.cpp Tue Apr  5 18:43:14 2011
@@ -673,7 +673,8 @@
          "Range cannot span basic blocks");
 
   // The complement interval will be extended as needed by extendRange().
-  markComplexMapped(0, ParentVNI);
+  if (ParentVNI)
+    markComplexMapped(0, ParentVNI);
   DEBUG(dbgs() << "    overlapIntv [" << Start << ';' << End << "):");
   RegAssign.insert(Start, End, OpenIdx);
   DEBUG(dump());



From stoklund at 2pi.dk  Tue Apr  5 18:43:16 2011
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Tue, 05 Apr 2011 23:43:16 -0000
Subject: [llvm-commits] [llvm] r128963 - /llvm/trunk/lib/CodeGen/SplitKit.cpp
Message-ID: <20110405234316.780F32A6C12F@llvm.org>

Author: stoklund
Date: Tue Apr  5 18:43:16 2011
New Revision: 128963

URL: http://llvm.org/viewvc/llvm-project?rev=128963&view=rev
Log:
Sign error

Modified:
    llvm/trunk/lib/CodeGen/SplitKit.cpp

Modified: llvm/trunk/lib/CodeGen/SplitKit.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SplitKit.cpp?rev=128963&r1=128962&r2=128963&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SplitKit.cpp (original)
+++ llvm/trunk/lib/CodeGen/SplitKit.cpp Tue Apr  5 18:43:16 2011
@@ -81,7 +81,7 @@
 
   // If CurLI is live into a landing pad successor, move the last split point
   // back to the call that may throw.
-  if (LPad && LSP.second.isValid() && !LIS.isLiveInToMBB(*CurLI, LPad))
+  if (LPad && LSP.second.isValid() && LIS.isLiveInToMBB(*CurLI, LPad))
     return LSP.second;
   else
     return LSP.first;



From chandlerc at gmail.com  Tue Apr  5 18:54:31 2011
From: chandlerc at gmail.com (Chandler Carruth)
Date: Tue, 05 Apr 2011 23:54:31 -0000
Subject: [llvm-commits] [llvm] r128964 - in /llvm/trunk:
 include/llvm/ExecutionEngine/RuntimeDyld.h
 lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp
Message-ID: <20110405235431.C02FC2A6C12D@llvm.org>

Author: chandlerc
Date: Tue Apr  5 18:54:31 2011
New Revision: 128964

URL: http://llvm.org/viewvc/llvm-project?rev=128964&view=rev
Log:
Make the virtual destructor out-of-line so we have a key function.

Modified:
    llvm/trunk/include/llvm/ExecutionEngine/RuntimeDyld.h
    llvm/trunk/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp

Modified: llvm/trunk/include/llvm/ExecutionEngine/RuntimeDyld.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ExecutionEngine/RuntimeDyld.h?rev=128964&r1=128963&r2=128964&view=diff
==============================================================================
--- llvm/trunk/include/llvm/ExecutionEngine/RuntimeDyld.h (original)
+++ llvm/trunk/include/llvm/ExecutionEngine/RuntimeDyld.h Tue Apr  5 18:54:31 2011
@@ -33,7 +33,7 @@
   void operator=(const RTDyldMemoryManager&);       // DO NOT IMPLEMENT
 public:
   RTDyldMemoryManager() {}
-  virtual ~RTDyldMemoryManager() {}
+  virtual ~RTDyldMemoryManager();
 
   // Allocate ActualSize bytes, or more, for the named function. Return
   // a pointer to the allocated memory and update Size to reflect how much

Modified: llvm/trunk/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp?rev=128964&r1=128963&r2=128964&view=diff
==============================================================================
--- llvm/trunk/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp (original)
+++ llvm/trunk/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp Tue Apr  5 18:54:31 2011
@@ -29,6 +29,9 @@
 using namespace llvm;
 using namespace llvm::object;
 
+// Empty out-of-line virtual destructor as the key function.
+RTDyldMemoryManager::~RTDyldMemoryManager() {}
+
 namespace llvm {
 class RuntimeDyldImpl {
   unsigned CPUType;



From resistor at mac.com  Tue Apr  5 18:55:28 2011
From: resistor at mac.com (Owen Anderson)
Date: Tue, 05 Apr 2011 23:55:28 -0000
Subject: [llvm-commits] [llvm] r128965 - in /llvm/trunk/lib/Target/ARM:
 ARMISelLowering.cpp ARMInstrInfo.td
Message-ID: <20110405235528.83FE42A6C12D@llvm.org>

Author: resistor
Date: Tue Apr  5 18:55:28 2011
New Revision: 128965

URL: http://llvm.org/viewvc/llvm-project?rev=128965&view=rev
Log:
Reapply r128946 (pseudoization of various instructions), and fix the extra imp-def of CPSR it was adding.

Modified:
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=128965&r1=128964&r2=128965&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Tue Apr  5 18:55:28 2011
@@ -5029,7 +5029,12 @@
   case ARM::ADCSSrs:
   case ARM::SBCSSri:
   case ARM::SBCSSrr:
-  case ARM::SBCSSrs: {
+  case ARM::SBCSSrs:
+  case ARM::RSBSri:
+  case ARM::RSBSrr:
+  case ARM::RSBSrs:
+  case ARM::RSCSri:
+  case ARM::RSCSrs: {
     unsigned OldOpc = MI->getOpcode();
     unsigned Opc = 0;
     switch (OldOpc) {
@@ -5051,6 +5056,21 @@
       case ARM::SBCSSrs:
         Opc = ARM::SBCrs;
         break;
+      case ARM::RSBSri:
+        Opc = ARM::RSBri;
+        break;
+      case ARM::RSBSrr:
+        Opc = ARM::RSBrr;
+        break;
+      case ARM::RSBSrs:
+        Opc = ARM::RSBrs;
+        break;
+      case ARM::RSCSri:
+        Opc = ARM::RSCri;
+        break;
+      case ARM::RSCSrs:
+        Opc = ARM::RSCrs;
+        break;
       default:
         llvm_unreachable("Unknown opcode?");
     }

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=128965&r1=128964&r2=128965&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Tue Apr  5 18:55:28 2011
@@ -935,7 +935,8 @@
   }
 }
 // Carry setting variants
-let isCodeGenOnly = 1, Defs = [CPSR] in {
+// NOTE: CPSR def omitted because it will be handled by the custom inserter.
+let usesCustomInserter = 1 in {
 multiclass AI1_adde_sube_s_irs<PatFrag opnode, bit Commutable = 0> {
   def Sri : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, so_imm:$imm),
                 Size4Bytes, IIC_iALUi,
@@ -2243,44 +2244,17 @@
 }
 
 // RSB with 's' bit set.
-let isCodeGenOnly = 1, Defs = [CPSR] in {
-def RSBSri : AI1<0b0011, (outs GPR:$Rd), (ins GPR:$Rn, so_imm:$imm), DPFrm,
-                 IIC_iALUi, "rsbs", "\t$Rd, $Rn, $imm",
-                 [(set GPR:$Rd, (subc so_imm:$imm, GPR:$Rn))]> {
-  bits<4> Rd;
-  bits<4> Rn;
-  bits<12> imm;
-  let Inst{25} = 1;
-  let Inst{20} = 1;
-  let Inst{15-12} = Rd;
-  let Inst{19-16} = Rn;
-  let Inst{11-0} = imm;
-}
-def RSBSrr : AI1<0b0011, (outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm), DPFrm,
-                 IIC_iALUr, "rsbs", "\t$Rd, $Rn, $Rm",
-                 [/* For disassembly only; pattern left blank */]> {
-  bits<4> Rd;
-  bits<4> Rn;
-  bits<4> Rm;
-  let Inst{11-4} = 0b00000000;
-  let Inst{25} = 0;
-  let Inst{20} = 1;
-  let Inst{3-0} = Rm;
-  let Inst{15-12} = Rd;
-  let Inst{19-16} = Rn;
-}
-def RSBSrs : AI1<0b0011, (outs GPR:$Rd), (ins GPR:$Rn, so_reg:$shift),
-                 DPSoRegFrm, IIC_iALUsr, "rsbs", "\t$Rd, $Rn, $shift",
-                 [(set GPR:$Rd, (subc so_reg:$shift, GPR:$Rn))]> {
-  bits<4> Rd;
-  bits<4> Rn;
-  bits<12> shift;
-  let Inst{25} = 0;
-  let Inst{20} = 1;
-  let Inst{11-0} = shift;
-  let Inst{15-12} = Rd;
-  let Inst{19-16} = Rn;
-}
+// NOTE: CPSR def omitted because it will be handled by the custom inserter.
+let usesCustomInserter = 1 in {
+def RSBSri : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, so_imm:$imm),
+                 Size4Bytes, IIC_iALUi,
+                 [(set GPR:$Rd, (subc so_imm:$imm, GPR:$Rn))]>;
+def RSBSrr : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm),
+                 Size4Bytes, IIC_iALUr,
+                 [/* For disassembly only; pattern left blank */]>;
+def RSBSrs : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, so_reg:$shift),
+                 Size4Bytes, IIC_iALUsr,
+                 [(set GPR:$Rd, (subc so_reg:$shift, GPR:$Rn))]>;
 }
 
 let Uses = [CPSR] in {
@@ -2325,33 +2299,16 @@
 }
 
 // FIXME: Allow these to be predicated.
-let isCodeGenOnly = 1, Defs = [CPSR], Uses = [CPSR] in {
-def RSCSri : AXI1<0b0111, (outs GPR:$Rd), (ins GPR:$Rn, so_imm:$imm),
-                  DPFrm, IIC_iALUi, "rscs\t$Rd, $Rn, $imm",
+// NOTE: CPSR def omitted because it will be handled by the custom inserter.
+let usesCustomInserter = 1, Uses = [CPSR] in {
+def RSCSri : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, so_imm:$imm),
+                  Size4Bytes, IIC_iALUi,
                   [(set GPR:$Rd, (sube_dead_carry so_imm:$imm, GPR:$Rn))]>,
-                  Requires<[IsARM]> {
-  bits<4> Rd;
-  bits<4> Rn;
-  bits<12> imm;
-  let Inst{25} = 1;
-  let Inst{20} = 1;
-  let Inst{15-12} = Rd;
-  let Inst{19-16} = Rn;
-  let Inst{11-0} = imm;
-}
-def RSCSrs : AXI1<0b0111, (outs GPR:$Rd), (ins GPR:$Rn, so_reg:$shift),
-                  DPSoRegFrm, IIC_iALUsr, "rscs\t$Rd, $Rn, $shift",
+                  Requires<[IsARM]>;
+def RSCSrs : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, so_reg:$shift),
+                  Size4Bytes, IIC_iALUsr,
                   [(set GPR:$Rd, (sube_dead_carry so_reg:$shift, GPR:$Rn))]>,
-                  Requires<[IsARM]> {
-  bits<4> Rd;
-  bits<4> Rn;
-  bits<12> shift;
-  let Inst{25} = 0;
-  let Inst{20} = 1;
-  let Inst{11-0} = shift;
-  let Inst{15-12} = Rd;
-  let Inst{19-16} = Rn;
-}
+                  Requires<[IsARM]>;
 }
 
 // (sub X, imm) gets canonicalized to (add X, -imm).  Match this form.



From chandlerc at gmail.com  Tue Apr  5 19:03:02 2011
From: chandlerc at gmail.com (Chandler Carruth)
Date: Tue, 5 Apr 2011 17:03:02 -0700
Subject: [llvm-commits] [llvm] r128952 -
	/llvm/trunk/include/llvm/ExecutionEngine/RuntimeDyld.h
In-Reply-To: <2375D85E-4855-4D89-87BC-EB36261311A7@apple.com>
References: <20110405230325.14D692A6C12D@llvm.org>
	<2375D85E-4855-4D89-87BC-EB36261311A7@apple.com>
Message-ID: <BANLkTinaGLHA+HW5R=+n7QZf2KTi4N9V1w@mail.gmail.com>

On Tue, Apr 5, 2011 at 4:29 PM, Chris Lattner <clattner at apple.com> wrote:

>
> On Apr 5, 2011, at 4:03 PM, Chandler Carruth wrote:
>
> > Author: chandlerc
> > Date: Tue Apr  5 18:03:24 2011
> > New Revision: 128952
> >
> > URL: http://llvm.org/viewvc/llvm-project?rev=128952&view=rev
> > Log:
> > Provide an empty virtual destructor to go with the virtual methods in
> > this class. Clang was warning on this with -Wnon-virtual-dtor.
>
> Hi Chandler,
>
> Please move the method out of line, since it is the only candidate for
> being a key function.  Thanks!
>

Done in r128964. Wonder if there is a feasible way to implement a warning
for *this*...


>
> -Chris
>
> >
> > Modified:
> >    llvm/trunk/include/llvm/ExecutionEngine/RuntimeDyld.h
> >
> > Modified: llvm/trunk/include/llvm/ExecutionEngine/RuntimeDyld.h
> > URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ExecutionEngine/RuntimeDyld.h?rev=128952&r1=128951&r2=128952&view=diff
> >
> ==============================================================================
> > --- llvm/trunk/include/llvm/ExecutionEngine/RuntimeDyld.h (original)
> > +++ llvm/trunk/include/llvm/ExecutionEngine/RuntimeDyld.h Tue Apr  5
> 18:03:24 2011
> > @@ -33,6 +33,7 @@
> >   void operator=(const RTDyldMemoryManager&);       // DO NOT IMPLEMENT
> > public:
> >   RTDyldMemoryManager() {}
> > +  virtual ~RTDyldMemoryManager() {}
> >
> >   // Allocate ActualSize bytes, or more, for the named function. Return
> >   // a pointer to the allocated memory and update Size to reflect how
> much
> >
> >
> > _______________________________________________
> > llvm-commits mailing list
> > llvm-commits at cs.uiuc.edu
> > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
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From aggarwa4 at illinois.edu  Tue Apr  5 19:31:27 2011
From: aggarwa4 at illinois.edu (Arushi Aggarwal)
Date: Wed, 06 Apr 2011 00:31:27 -0000
Subject: [llvm-commits] [poolalloc] r128967 - in
 /poolalloc/trunk/lib/AssistDS: MergeArrayIndexGEP.cpp MergeGEP.cpp
Message-ID: <20110406003127.0DA332A6C12D@llvm.org>

Author: aggarwa4
Date: Tue Apr  5 19:31:26 2011
New Revision: 128967

URL: http://llvm.org/viewvc/llvm-project?rev=128967&view=rev
Log:
Merged into one file.

Removed:
    poolalloc/trunk/lib/AssistDS/MergeGEP.cpp
Modified:
    poolalloc/trunk/lib/AssistDS/MergeArrayIndexGEP.cpp

Modified: poolalloc/trunk/lib/AssistDS/MergeArrayIndexGEP.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/AssistDS/MergeArrayIndexGEP.cpp?rev=128967&r1=128966&r2=128967&view=diff
==============================================================================
--- poolalloc/trunk/lib/AssistDS/MergeArrayIndexGEP.cpp (original)
+++ poolalloc/trunk/lib/AssistDS/MergeArrayIndexGEP.cpp Tue Apr  5 19:31:26 2011
@@ -35,16 +35,59 @@
       for (Module::iterator F = M.begin(); F != M.end(); ++F){
         for (Function::iterator B = F->begin(), FE = F->end(); B != FE; ++B) {      
           for (BasicBlock::iterator I = B->begin(), BE = B->end(); I != BE;) {
-            GetElementPtrInst *GEP = dyn_cast<GetElementPtrInst>(I);
-            I++;
+            GetElementPtrInst *GEP = dyn_cast<GetElementPtrInst>(I++);
             if(GEP == NULL)
               continue;
             simplifyGEP(GEP);
           }
         }
       }
+      bool changed;
+      do {
+        changed = false;
+        for (Module::iterator F = M.begin(); F != M.end(); ++F) {
+          for (Function::iterator B = F->begin(), FE = F->end(); B != FE; ++B) {      
+            for (BasicBlock::iterator I = B->begin(), BE = B->end(); I != BE;) {
+              GetElementPtrInst *GEP = dyn_cast<GetElementPtrInst>(I++);
+              if(GEP == NULL)
+                continue;
+              if(!isa<ArrayType>(GEP->getType()->getElementType()))
+                continue;
+              changed |= mergeUseGEPs(GEP);
+
+            }
+          }
+        }
+      } while(changed);
       return true;
     }
+    static bool mergeUseGEPs(GetElementPtrInst *GEP) {
+      bool changed = false;
+      std::vector<GetElementPtrInst*> worklist;
+      for (Value::use_iterator UI = GEP->use_begin(),
+           UE = GEP->use_end(); UI != UE; ++UI){
+        if(!isa<GetElementPtrInst>(UI))
+          break;
+        GetElementPtrInst *GEPUse = cast<GetElementPtrInst>(UI);
+        worklist.push_back(GEPUse);
+      }
+      while(!worklist.empty()) {
+        GetElementPtrInst *GEPUse = worklist.back();
+        worklist.pop_back();
+        SmallVector<Value*, 8> Indices;
+        Indices.append(GEP->op_begin()+1, GEP->op_end());
+        Indices.append(GEPUse->idx_begin()+1, GEPUse->idx_end());
+        GetElementPtrInst *GEPNew = GetElementPtrInst::Create(GEP->getOperand(0),
+                                                              Indices.begin(),
+                                                              Indices.end(),
+                                                              GEPUse->getName()+ "mod", 
+                                                              GEPUse);
+        GEPUse->replaceAllUsesWith(GEPNew);
+        GEPUse->eraseFromParent();        
+        changed = true;
+      }
+      return changed;
+    }
     static void simplifyGEP(GetElementPtrInst *GEP) {
       Value *PtrOp = GEP->getOperand(0);
       if (GEPOperator *Src = dyn_cast<GEPOperator>(PtrOp)) {
@@ -114,8 +157,6 @@
           GEP->eraseFromParent();
         }
       }
-
-
     }
   };
 }

Removed: poolalloc/trunk/lib/AssistDS/MergeGEP.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/AssistDS/MergeGEP.cpp?rev=128966&view=auto
==============================================================================
--- poolalloc/trunk/lib/AssistDS/MergeGEP.cpp (original)
+++ poolalloc/trunk/lib/AssistDS/MergeGEP.cpp (removed)
@@ -1,117 +0,0 @@
-//===-- MergeGEP.cpp - Merge GEPs for indexing in arrays ------------ ----===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// 
-//===----------------------------------------------------------------------===//
-#define DEBUG_TYPE "mergegep"
-
-#include "llvm/Instructions.h"
-#include "llvm/Module.h"
-#include "llvm/Pass.h"
-#include "llvm/Instructions.h"
-#include "llvm/Constants.h"
-#include "llvm/Support/GetElementPtrTypeIterator.h"
-#include "llvm/Transforms/Utils/Cloning.h"
-#include "llvm/ADT/Statistic.h"
-#include "llvm/Support/FormattedStream.h"
-#include "llvm/Support/Debug.h"
-#include <vector>
-
-using namespace llvm;
-
-
-namespace {
-  class MergeGEP : public ModulePass {
-  public:
-    static char ID;
-    MergeGEP() : ModulePass(&ID) {}
-    bool runOnModule(Module& M) {
-      bool changed = false;
-      bool found;
-      do {
-      found = false;
-      for (Module::iterator F = M.begin(); F != M.end(); ++F){
-        for (Function::iterator B = F->begin(), FE = F->end(); B != FE; ++B) {      
-          for (BasicBlock::iterator I = B->begin(), BE = B->end(); I != BE; I++) {
-            if(!(isa<GetElementPtrInst>(I)))
-              continue;
-            GetElementPtrInst *GEP = cast<GetElementPtrInst>(I);
-            if(!isa<ArrayType>(GEP->getType()->getElementType()))
-              continue;
-            std::vector<GetElementPtrInst*> worklist;
-            for (Value::use_iterator UI = GEP->use_begin(),
-                 UE = GEP->use_end(); UI != UE; ++UI){
-              if(!isa<GetElementPtrInst>(UI))
-                break;
-              GetElementPtrInst *GEPUse = cast<GetElementPtrInst>(UI);
-              worklist.push_back(GEPUse);
-            }
-            while(!worklist.empty()){
-              GetElementPtrInst *GEPUse = worklist.back();
-              worklist.pop_back();
-              SmallVector<Value*, 8> Indices;
-              Indices.append(GEP->op_begin()+1, GEP->op_end());
-              Indices.append(GEPUse->idx_begin()+1, GEPUse->idx_end());
-              GetElementPtrInst *GEPNew = GetElementPtrInst::Create(GEP->getOperand(0),
-                                                                    Indices.begin(),
-                                                                    Indices.end(),
-                                                                    GEPUse->getName()+ "moda", 
-                                                                    GEPUse);
-              GEPUse->replaceAllUsesWith(GEPNew);
-              GEPUse->eraseFromParent();        
-              found = true;
-              changed = true;                    
-            }
-          }
-        }
-        std::vector<GetElementPtrInst*> worklist;
-        for (Function::iterator B = F->begin(), FE = F->end(); B != FE; ++B) {      
-          for (BasicBlock::iterator I = B->begin(), BE = B->end(); I != BE; I++) {
-            if(!(isa<GetElementPtrInst>(I)))
-              continue;
-            GetElementPtrInst *GEP1 = cast<GetElementPtrInst>(I);
-            if(!isa<ArrayType>(GEP1->getType()->getElementType()))
-              continue;
-            if (Constant *C = dyn_cast<Constant>(GEP1->getOperand(0))) {
-              if (ConstantExpr *CE = dyn_cast<ConstantExpr>(C)) {
-                if (CE->getOpcode() == Instruction::GetElementPtr) {
-                  worklist.push_back(GEP1);
-                }
-              }
-            }
-          }
-        }
-        while(!worklist.empty()) {
-          GetElementPtrInst *GEP1 = worklist.back();
-          worklist.pop_back();
-          Constant *C = cast<Constant>(GEP1->getOperand(0));
-          ConstantExpr *CE = cast<ConstantExpr>(C);
-          SmallVector<Value*, 8> Indices;
-          Indices.append(CE->op_begin()+1, CE->op_end());
-          Indices.append(GEP1->idx_begin()+1, GEP1->idx_end());
-          GetElementPtrInst *GEPNew = GetElementPtrInst::Create(CE->getOperand(0),
-                                                                Indices.begin(),
-                                                                Indices.end(),
-                                                                GEP1->getName()+ "modb", 
-                                                                GEP1);
-          GEP1->replaceAllUsesWith(GEPNew);
-          GEP1->eraseFromParent();
-          changed = true;                    
-          found = true;
-        }
-      }
-      }while(found);
-      return changed;
-    }
-  };
-}
-
-char MergeGEP::ID = 0;
-static RegisterPass<MergeGEP>
-X("mergegep", "Merge GEPs for arrays in structs");



From grosbach at apple.com  Tue Apr  5 19:42:00 2011
From: grosbach at apple.com (Jim Grosbach)
Date: Tue, 05 Apr 2011 17:42:00 -0700
Subject: [llvm-commits] [llvm] r128965 - in /llvm/trunk/lib/Target/ARM:
 ARMISelLowering.cpp ARMInstrInfo.td
In-Reply-To: <20110405235528.83FE42A6C12D@llvm.org>
References: <20110405235528.83FE42A6C12D@llvm.org>
Message-ID: <7EBCD82E-7944-4FC5-9724-1E639BA236BE@apple.com>

Yay! All around goodness.

 A couple of trivial cleanup comments below.

On Apr 5, 2011, at 4:55 PM, Owen Anderson wrote:

> Author: resistor
> Date: Tue Apr  5 18:55:28 2011
> New Revision: 128965
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=128965&view=rev
> Log:
> Reapply r128946 (pseudoization of various instructions), and fix the extra imp-def of CPSR it was adding.
> 
> Modified:
>    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
>    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
> 
> Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=128965&r1=128964&r2=128965&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Tue Apr  5 18:55:28 2011
> @@ -5029,7 +5029,12 @@
>   case ARM::ADCSSrs:
>   case ARM::SBCSSri:
>   case ARM::SBCSSrr:
> -  case ARM::SBCSSrs: {
> +  case ARM::SBCSSrs:
> +  case ARM::RSBSri:
> +  case ARM::RSBSrr:
> +  case ARM::RSBSrs:
> +  case ARM::RSCSri:
> +  case ARM::RSCSrs: {
>     unsigned OldOpc = MI->getOpcode();
>     unsigned Opc = 0;
>     switch (OldOpc) {
> @@ -5051,6 +5056,21 @@
>       case ARM::SBCSSrs:
>         Opc = ARM::SBCrs;
>         break;
> +      case ARM::RSBSri:
> +        Opc = ARM::RSBri;
> +        break;
> +      case ARM::RSBSrr:
> +        Opc = ARM::RSBrr;
> +        break;
> +      case ARM::RSBSrs:
> +        Opc = ARM::RSBrs;
> +        break;
> +      case ARM::RSCSri:
> +        Opc = ARM::RSCri;
> +        break;
> +      case ARM::RSCSrs:
> +        Opc = ARM::RSCrs;
> +        break;
>       default:
>         llvm_unreachable("Unknown opcode?");
>     }
> 
> Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=128965&r1=128964&r2=128965&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
> +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Tue Apr  5 18:55:28 2011
> @@ -935,7 +935,8 @@
>   }
> }
> // Carry setting variants
> -let isCodeGenOnly = 1, Defs = [CPSR] in {
> +// NOTE: CPSR def omitted because it will be handled by the custom inserter.
> +let usesCustomInserter = 1 in {
> multiclass AI1_adde_sube_s_irs<PatFrag opnode, bit Commutable = 0> {
>   def Sri : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, so_imm:$imm),
>                 Size4Bytes, IIC_iALUi,
> @@ -2243,44 +2244,17 @@
> }
> 
> // RSB with 's' bit set.
> -let isCodeGenOnly = 1, Defs = [CPSR] in {
> -def RSBSri : AI1<0b0011, (outs GPR:$Rd), (ins GPR:$Rn, so_imm:$imm), DPFrm,
> -                 IIC_iALUi, "rsbs", "\t$Rd, $Rn, $imm",
> -                 [(set GPR:$Rd, (subc so_imm:$imm, GPR:$Rn))]> {
> -  bits<4> Rd;
> -  bits<4> Rn;
> -  bits<12> imm;
> -  let Inst{25} = 1;
> -  let Inst{20} = 1;
> -  let Inst{15-12} = Rd;
> -  let Inst{19-16} = Rn;
> -  let Inst{11-0} = imm;
> -}
> -def RSBSrr : AI1<0b0011, (outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm), DPFrm,
> -                 IIC_iALUr, "rsbs", "\t$Rd, $Rn, $Rm",
> -                 [/* For disassembly only; pattern left blank */]> {
> -  bits<4> Rd;
> -  bits<4> Rn;
> -  bits<4> Rm;
> -  let Inst{11-4} = 0b00000000;
> -  let Inst{25} = 0;
> -  let Inst{20} = 1;
> -  let Inst{3-0} = Rm;
> -  let Inst{15-12} = Rd;
> -  let Inst{19-16} = Rn;
> -}
> -def RSBSrs : AI1<0b0011, (outs GPR:$Rd), (ins GPR:$Rn, so_reg:$shift),
> -                 DPSoRegFrm, IIC_iALUsr, "rsbs", "\t$Rd, $Rn, $shift",
> -                 [(set GPR:$Rd, (subc so_reg:$shift, GPR:$Rn))]> {
> -  bits<4> Rd;
> -  bits<4> Rn;
> -  bits<12> shift;
> -  let Inst{25} = 0;
> -  let Inst{20} = 1;
> -  let Inst{11-0} = shift;
> -  let Inst{15-12} = Rd;
> -  let Inst{19-16} = Rn;
> -}
> +// NOTE: CPSR def omitted because it will be handled by the custom inserter.
> +let usesCustomInserter = 1 in {
> +def RSBSri : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, so_imm:$imm),
> +                 Size4Bytes, IIC_iALUi,
> +                 [(set GPR:$Rd, (subc so_imm:$imm, GPR:$Rn))]>;
> +def RSBSrr : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm),
> +                 Size4Bytes, IIC_iALUr,
> +                 [/* For disassembly only; pattern left blank */]>;
> +def RSBSrs : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, so_reg:$shift),
> +                 Size4Bytes, IIC_iALUsr,
> +                 [(set GPR:$Rd, (subc so_reg:$shift, GPR:$Rn))]>;
> }
> 
> let Uses = [CPSR] in {
> @@ -2325,33 +2299,16 @@
> }
> 
> // FIXME: Allow these to be predicated.

Can remove this FIXME now, I think. This should do just that, as well as other goodness. :)

> -let isCodeGenOnly = 1, Defs = [CPSR], Uses = [CPSR] in {
> -def RSCSri : AXI1<0b0111, (outs GPR:$Rd), (ins GPR:$Rn, so_imm:$imm),
> -                  DPFrm, IIC_iALUi, "rscs\t$Rd, $Rn, $imm",
> +// NOTE: CPSR def omitted because it will be handled by the custom inserter.
> +let usesCustomInserter = 1, Uses = [CPSR] in {
> +def RSCSri : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, so_imm:$imm),
> +                  Size4Bytes, IIC_iALUi,
>                   [(set GPR:$Rd, (sube_dead_carry so_imm:$imm, GPR:$Rn))]>,
> -                  Requires<[IsARM]> {
> -  bits<4> Rd;
> -  bits<4> Rn;
> -  bits<12> imm;
> -  let Inst{25} = 1;
> -  let Inst{20} = 1;
> -  let Inst{15-12} = Rd;
> -  let Inst{19-16} = Rn;
> -  let Inst{11-0} = imm;
> -}
> -def RSCSrs : AXI1<0b0111, (outs GPR:$Rd), (ins GPR:$Rn, so_reg:$shift),
> -                  DPSoRegFrm, IIC_iALUsr, "rscs\t$Rd, $Rn, $shift",
> +                  Requires<[IsARM]>;
> +def RSCSrs : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, so_reg:$shift),
> +                  Size4Bytes, IIC_iALUsr,
>                   [(set GPR:$Rd, (sube_dead_carry so_reg:$shift, GPR:$Rn))]>,
> -                  Requires<[IsARM]> {
> -  bits<4> Rd;
> -  bits<4> Rn;
> -  bits<12> shift;
> -  let Inst{25} = 0;
> -  let Inst{20} = 1;
> -  let Inst{11-0} = shift;
> -  let Inst{15-12} = Rd;
> -  let Inst{19-16} = Rn;
> -}
> +                  Requires<[IsARM]>;

No need for an explicit "Requires<[IsARM]>" here, as that's already added by the ARMPseudoInst base class.

> }
> 
> // (sub X, imm) gets canonicalized to (add X, -imm).  Match this form.
> 
> 
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits


From sabre at nondot.org  Tue Apr  5 19:45:11 2011
From: sabre at nondot.org (Chris Lattner)
Date: Wed, 06 Apr 2011 00:45:11 -0000
Subject: [llvm-commits] [llvm] r128968 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <20110406004511.B4D4C2A6C12D@llvm.org>

Author: lattner
Date: Tue Apr  5 19:45:11 2011
New Revision: 128968

URL: http://llvm.org/viewvc/llvm-project?rev=128968&view=rev
Log:
distribute content out to the appropriate sections

Modified:
    llvm/trunk/docs/ReleaseNotes.html

Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=128968&r1=128967&r2=128968&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Tue Apr  5 19:45:11 2011
@@ -102,7 +102,7 @@
 modular, library-based architecture that makes it suitable for creating or
 integrating with other development tools. Clang is considered a
 production-quality compiler for C, Objective-C, C++ and Objective-C++ on x86
-(32- and 64-bit), and for darwin-arm targets.</p>
+(32- and 64-bit), and for darwin/arm targets.</p>
 
 <p>In the LLVM 2.9 time-frame, the Clang team has made many improvements in C,
 C++ and Objective-C support.  C++ support is now generally rock solid, has
@@ -293,137 +293,80 @@
 <p>LLVM 2.9 includes several major new capabilities:</p>
 
 <ul>
-<li><pre>
-  last release for llvm-gcc
-TBAA: On by default in clang.  Disable it with -fno-strict-aliasing.
+  
+<li>
+  TBAA: On by default in clang.  Disable it with -fno-strict-aliasing.
   Could be more aggressive for structs.
+</li>
+
+<li>New Nvidia PTX backend, not generally useful in 2.9 though.</li>
   
-Triple::normalize is new, llvm triples are always stored in normalized form internally.
+<li>
+Much better debug info generated, particularly in optimized code situations.
+</li>
 
-Triple x86_64--mingw64 is obsoleted. Use x86_64--mingw32 instead.
+<li>
+inline asm multiple alternative constraint support.
+</li>  
+  
+<li>
+  New naming rules in coding standards: CodingStandards.html#ll_naming
+</li>
 
-MC Assembler: X86 now generates much better diagnostics for common errors,
-    is much faster at matching instructions, is much more bug-compatible with
-    the GAS assembler, and is now generally useful for a broad range of X86
-    assembly.
+</ul>
   
-New Nvidia PTX backend, not generally useful in 2.9 though.
+</div>
 
-Much better debug info generated, particularly in optimized code situations.
+<!--=========================================================================-->
+<h2>
+<a name="coreimprovements">LLVM IR and Core Improvements</a>
+</h2>
 
-ARM Fast ISel
+<div class="doc_text">
+<p>LLVM IR has several new features for better support of new targets and that
+expose new optimization opportunities:</p>
 
-ELF MC support: on by default in clang.  There are still known missing features
-  for human written assembly.
+<ul>
+<li>udiv, ashr, lshr, shl now have exact and nuw/nsw bits:
+  PR8862 / LangRef.html</li>
+  
+  unnamed_addr + PR8927
 
-X86: Reimplemented all of MMX to introduce a new LLVM IR x86_mmx type.  Now
-  random types like &lt;2 x i32&gt; are not iseld to mmx without emms.  The
-  -disable-mmx flag is gone now.
+  new 'hotpatch' attribute: LangRef.html#fnattrs
 
-Some basic <a href="CodeGenerator.html#mc">internals documentation</a> for MC. 
-  
-MC Assembler support for .file and .loc.
-  
-  
-inline asm multiple alternative constraint support.
-  
-LoopIdiom: memset/memcpy formation and memset_pattern on darwin.  Build with
-  -ffreestanding or -fno-builtin if your memcpy is being compiled into infinite
-  recursion.
-  
+</ul>
 
-TargetLibraryInfo
-  
-X86 support for FS/GS relative loads and stores using address space 256/257 are
-  reliable now.
-  
-ARM: New code placement pass.
-  
-unnamed_addr + PR8927
-  
-PointerTracking has been removed from mainline, moved to ClamAV.
-  
-EarlyCSE pass.
-LoopInstSimplify pass.
+</div>
 
-- DIBuilder provides simpler interface for front ends like Clang to encode debug info in LLVM IR.
-  - This interface hides implementation details (e.g. DIDerivedType, existence of compile unit etc..) that any front end should not know about.
-  For example, DIFactory DebugFactory;
-  Ty = DebugFactory.CreateDerivedType(DW_TAG_volatile_type,
-  findRegion(TYPE_CONTEXT(type)),
-  StringRef(),
-  getOrCreateFile(main_input_filename),
-  0 /*line no*/,
-  NodeSizeInBits(type),
-  NodeAlignInBits(type),
-  0 /*offset */,
-  0 /* flags */,
-  MainTy);
-  can be replaced by
-  DbgTy = DBuilder.createQualifiedType(DW_TAG_volatile_type, MainTy); 
-DIFactory is gone now.
-  
-PPC: Switched to MCInstPrinter, and MCCodeEmitter.  Ready to implement support
-  for directly writing out mach-o object files, but noone seems interested.
+<!--=========================================================================-->
+<h2>
+<a name="optimizer">Optimizer Improvements</a>
+</h2>
 
-ARM: Improved code generation for Cortex-A8 and Cortex-A9 CPUs.
-  
-Scheduler now models operand latency and pipeline forwarding.
-  
-Can optimize printf to iprintf when no floating point is used, for embedded
-  targets with smaller iprintf implementation.
-  
-error_code + libsystem + PathV2 changes
-  The system_error header from C++0x was added.
-  * Use if (error_code ec = function()) to check for error conditions
-  from functions which return it.
-  * error_code::message returns a human readable description of the error.
-  
-  PathV1 has been deprecated in favor of PathV2 (sorry I didn't finish
-  this before the release).
-  * No Path class, use a r-value convertible to a twine instead.
-  * Assumes all paths are UTF-8.
-  
-new macho-dump tool
+<div class="doc_text">
 
-Major regalloc rewrite, not on by default for 2.9 and not advised to use it.
- * New basic register allocator that can be used as a safe fallback when
-   debugging. Enable with -regalloc=basic.
- * New infrastructure for live range splitting. SplitKit can break a live
-   interval into smaller pieces while preserving SSA form, and SpillPlacement
-   can help find the best split points. This is a work in progress so the API
-   is changing quickly.
- * The inline spiller has learned to clean up after live range splitting. It
-   can hoist spills out of loops, and it can eliminate redundant spills.
-   Rematerialization works with live range splitting.
- * New greedy register allocator using live range splitting. This will be the
-   default register allocator in the next LLVM release, but it is not turned on
-   by default in 2.9.
+<p>In addition to a large array of minor performance tweaks and bug fixes, this
+release includes a few major enhancements and additions to the optimizers:</p>
 
-ARM: __builtin_prefetch turns into prefetch instructions.
-  
-MC assembler support for 3dNow! and 3DNowA instructions.
+<ul>
+  <li>LTO has been improved to use MC for parsing inline asm and now
+  can build large programs like Firefox 4 on both OS X and Linux.</li>
   
-tblgen support for assembler aliases: <a 
-  href="CodeGenerator.html#na_instparsing">MnemonicAlias and InstAlias</a>
   
-LoopIndexSplit pass was removed, unmaintained.
-LiveValues, SimplifyHalfPowrLibCalls, and GEPSplitter were removed.
+ LoopIdiom: memset/memcpy formation and memset_pattern on darwin.  Build with
+  -ffreestanding or -fno-builtin if your memcpy is being compiled into infinite
+  recursion.
   
-include/llvm/System merged into include/llvm/Support.
- 
-Win32 PE-COFF support in the MC assembler has made a lot of progress in the 2.9
-  timeframe, but is still not generally useful.  Please see 
-  "http://llvm.org/bugs/showdependencytree.cgi?id=9100&amp;hide_resolved=1" for open bugs?
-
+  TargetLibraryInfo
+    
+  EarlyCSE pass.
+  LoopInstSimplify pass.
+    
 New <a href="WritingAnLLVMPass.html#RegionPass">RegionPass</a> infrastructure
   for region-based optimizations.
   
-MicroBlaze: major updates for aggressive delay slot filler, MC-based assembly
-   printing, assembly instruction parsing, ELF .o file emission, and MC
-   instruction disassembler.
-  
-Countless ARM microoptimizations.
+  Can optimize printf to iprintf when no floating point is used, for embedded
+  targets with smaller iprintf implementation.
 
 Speedups to various mid-level passes:
   GVN is much faster on functions with deep dominator trees / lots of BBs.
@@ -431,18 +374,9 @@
     more passes (so they are computed less often)
   SRoA is also much faster and doesn't use DominanceFrontier.
   
-  
-new 'hotpatch' attribute: LangRef.html#fnattrs
-
-APInt API changes, see PR5207.
-
 DSE is more aggressive with stores of different types: e.g. a large store 
   following a small one to the same address.
   
-New naming rules in coding standards: CodingStandards.html#ll_naming
-  
-LiveDebugVariables is a new pass that keeps track of debugging information for
-  user variables that are kept in registers in optimized builds.
   
 We now optimize various idioms for overflow detection into check of the flag
   register on various CPUs, e.g.:
@@ -452,69 +386,7 @@
   	addq	%rdi, %rbx
   	jno	LBB0_2
 
-X86: Much better codegen for several cases using adc/sbb instead of cmovs for
-  conditional increment and other idioms.
-  
-MVT::Flag renamed to MVT::Glue
-  
-Removed the PartialSpecialization pass, it was unmaintained and buggy.
-  
-SPARC: Many improvements, including using the Y registers for multiplications
-  and addition of a simple delay slot filler.
-  
-  
-udiv, ashr, lshr, shl now have exact and nuw/nsw bits: PR8862 / LangRef.html
-  
-lib/Object and llvm-objdump
-
   
-  Target Independent Code Gen:
-  The pre-register-allocation (preRA) instruction scheduler models register pressure
-  much more accurately in some cases. This allows the adoption of more
-  aggressive scheduling heuristics.
-  
-  The X86 backend has adopted a new preRA scheduling
-  mode, "list-ilp", to shorten the height of instruction schedules
-  without inducing register spills.
-  
-  The ARM backend preRA scheduler now models machine resources at cycle
-  granularity. This allows the scheduler to both accurately model
-  instruction latency and avoid overcommitting functional units.
-
-  
-</pre></li>
-</ul>
-  
-</div>
-
-<!--=========================================================================-->
-<h2>
-<a name="coreimprovements">LLVM IR and Core Improvements</a>
-</h2>
-
-<div class="doc_text">
-<p>LLVM IR has several new features for better support of new targets and that
-expose new optimization opportunities:</p>
-
-<ul>
-</ul>
-
-</div>
-
-<!--=========================================================================-->
-<h2>
-<a name="optimizer">Optimizer Improvements</a>
-</h2>
-
-<div class="doc_text">
-
-<p>In addition to a large array of minor performance tweaks and bug fixes, this
-release includes a few major enhancements and additions to the optimizers:</p>
-
-<ul>
-  <li>TBAA.</li>
-  <li>LTO has been improved to use MC for parsing inline asm and now
-  can build large programs like Firefox 4 on both OS X and Linux.</li>
 </ul>
 
 <!--
@@ -547,6 +419,39 @@
   <li>MC supports the <tt>.cfi_*</tt> directives for producing DWARF
   frame information, but it is still not used by CodeGen by default.</li>
   <li>COFF support?</li>
+  
+  
+  MC Assembler: X86 now generates much better diagnostics for common errors,
+  is much faster at matching instructions, is much more bug-compatible with
+  the GAS assembler, and is now generally useful for a broad range of X86
+  assembly.
+  
+  
+  ELF MC support: on by default in clang.  There are still known missing features
+  for human written assembly.
+  
+  
+  Some basic <a href="CodeGenerator.html#mc">internals documentation</a> for MC. 
+  
+  MC Assembler support for .file and .loc.
+  
+  tblgen support for assembler aliases: <a 
+    href="CodeGenerator.html#na_instparsing">MnemonicAlias and InstAlias</a>
+  
+  Win32 PE-COFF support in the MC assembler has made a lot of progress in the 2.9
+  timeframe, but is still not generally useful.  Please see 
+  "http://llvm.org/bugs/showdependencytree.cgi?id=9100&amp;hide_resolved=1" for open bugs?
+  
+  
+  lib/Object and llvm-objdump
+  Experimental format independent object file manipulation library.
+  * Supports PE/COFF and ELF.
+  * llvm-nm extended to work with object files. Exactly matches
+  binutils-nm for the files I've tested.
+  * llvm-objdump added with support for disassembly (no relocations displayed).
+  
+
+
 </ul>
 
 <p>For more information, please see the <a
@@ -569,7 +474,34 @@
 
 <ul>
 <!-- SplitKit -->
-FastISel for ARM.
+  
+<li>The pre-register-allocation (preRA) instruction scheduler models register
+  pressure much more accurately in some cases. This allows the adoption of more
+    aggressive scheduling heuristics.
+</li>
+  
+  LiveDebugVariables is a new pass that keeps track of debugging information for
+  user variables that are kept in registers in optimized builds.
+  
+
+Scheduler now models operand latency and pipeline forwarding.
+  
+Major regalloc rewrite, not on by default for 2.9 and not advised to use it.
+ * New basic register allocator that can be used as a safe fallback when
+   debugging. Enable with -regalloc=basic.
+ * New infrastructure for live range splitting. SplitKit can break a live
+   interval into smaller pieces while preserving SSA form, and SpillPlacement
+   can help find the best split points. This is a work in progress so the API
+   is changing quickly.
+ * The inline spiller has learned to clean up after live range splitting. It
+   can hoist spills out of loops, and it can eliminate redundant spills.
+   Rematerialization works with live range splitting.
+ * New greedy register allocator using live range splitting. This will be the
+   default register allocator in the next LLVM release, but it is not turned on
+   by default in 2.9.
+
+
+
 </ul>
 </div>
 
@@ -583,6 +515,30 @@
 </p>
 
 <ul>
+<li>
+X86: Reimplemented all of MMX to introduce a new LLVM IR x86_mmx type.  Now
+  random types like &lt;2 x i32&gt; are not iseld to mmx without emms.  The
+  -disable-mmx flag is gone now.
+</li>
+  
+  <li>
+X86 support for FS/GS relative loads and stores using address space 256/257 are
+  reliable now.
+  </li>
+  
+    <li>
+X86: Much better codegen for several cases using adc/sbb instead of cmovs for
+  conditional increment and other idioms.
+    </li>
+
+  <li>
+  The X86 backend has adopted a new preRA scheduling
+  mode, "list-ilp", to shorten the height of instruction schedules
+  without inducing register spills.
+  </li>
+
+  MC assembler support for 3dNow! and 3DNowA instructions.
+  
   <li>Several bugs have been fixed for Windows x64 code generator.</li>
 </ul>
 
@@ -598,9 +554,39 @@
 </p>
 
 <ul>
+<li>ARM Fast ISel</li>
+<li>ARM: New code placement pass.</li>
+<li>ARM: Improved code generation for Cortex-A8 and Cortex-A9 CPUs.</li>
+<li>ARM: __builtin_prefetch turns into prefetch instructions.</li>
+<li>Countless ARM microoptimizations.</li>
+
+<li>  The ARM backend preRA scheduler now models machine resources at cycle
+  granularity. This allows the scheduler to both accurately model
+  instruction latency and avoid overcommitting functional units.</li>
+
+
 </ul>
 </div>
+  
+<!--=========================================================================-->
+<h2>
+<a name="OtherTS">Other Target Specific Improvements</a>
+</h2>
 
+<div class="doc_text">
+<ul>
+  PPC: Switched to MCInstPrinter, and MCCodeEmitter.  Ready to implement support
+  for directly writing out mach-o object files, but noone seems interested.
+  
+  MicroBlaze: major updates for aggressive delay slot filler, MC-based assembly
+  printing, assembly instruction parsing, ELF .o file emission, and MC
+  instruction disassembler.
+  
+  SPARC: Many improvements, including using the Y registers for multiplications
+  and addition of a simple delay slot filler.
+  
+</ul>
+</div>
 
 <!--=========================================================================-->
 <h2>
@@ -614,30 +600,78 @@
 from the previous release.</p>
 
 <ul>
-</ul>
+  last release for llvm-gcc
+
+- DIBuilder provides simpler interface for front ends like Clang to encode debug info in LLVM IR.
+  - This interface hides implementation details (e.g. DIDerivedType, existence of compile unit etc..) that any front end should not know about.
+  For example, DIFactory DebugFactory;
+  Ty = DebugFactory.CreateDerivedType(DW_TAG_volatile_type,
+  findRegion(TYPE_CONTEXT(type)),
+  StringRef(),
+  getOrCreateFile(main_input_filename),
+  0 /*line no*/,
+  NodeSizeInBits(type),
+  NodeAlignInBits(type),
+  0 /*offset */,
+  0 /* flags */,
+  MainTy);
+  can be replaced by
+  DbgTy = DBuilder.createQualifiedType(DW_TAG_volatile_type, MainTy); 
+DIFactory is gone now.
+  
+    
 
 
 
-<p>In addition, many APIs have changed in this release.  Some of the major LLVM
-API changes are:</p>
-<ul>
+  
+  LoopIndexSplit pass was removed, unmaintained.
+  LiveValues, SimplifyHalfPowrLibCalls, and GEPSplitter were removed.
+  Removed the PartialSpecialization pass, it was unmaintained and buggy.
+  
+  DIFactory removed, use DIBuilder instead.
+  
+  Triple::normalize is new, llvm triples are always stored in normalized form internally.
+  
+  Triple x86_64--mingw64 is obsoleted. Use x86_64--mingw32 instead.
+
+  PointerTracking has been removed from mainline, moved to ClamAV.
+
 </ul>
 
 </div>
 
 <!--=========================================================================-->
 <h2>
-<a name="devtree_changes">Development Infrastructure Changes</a>
+<a name="api_changes">Internal API Changes</a>
 </h2>
 
 <div class="doc_text">
 
-<p>This section lists changes to the LLVM development infrastructure. This
-mostly impacts users who actively work on LLVM or follow development on
-mainline, but may also impact users who leverage the LLVM build infrastructure
-or are interested in LLVM qualification.</p>
+<p>In addition, many APIs have changed in this release.  Some of the major
+  LLVM API changes are:</p>
 
 <ul>
+  
+  include/llvm/System merged into include/llvm/Support.
+  
+  
+  APInt API changes, see PR5207.
+  
+  MVT::Flag renamed to MVT::Glue
+  
+  
+  error_code + libsystem + PathV2 changes
+  The system_error header from C++0x was added.
+  * Use if (error_code ec = function()) to check for error conditions
+  from functions which return it.
+  * error_code::message returns a human readable description of the error.
+  
+  PathV1 has been deprecated in favor of PathV2 (sorry I didn't finish
+  this before the release).
+  * No Path class, use a r-value convertible to a twine instead.
+  * Assumes all paths are UTF-8.
+  
+
 </ul>
 </div>
 



From sabre at nondot.org  Tue Apr  5 19:56:12 2011
From: sabre at nondot.org (Chris Lattner)
Date: Wed, 06 Apr 2011 00:56:12 -0000
Subject: [llvm-commits] [llvm] r128969 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <20110406005612.5F77B2A6C12D@llvm.org>

Author: lattner
Date: Tue Apr  5 19:56:12 2011
New Revision: 128969

URL: http://llvm.org/viewvc/llvm-project?rev=128969&view=rev
Log:
some edits.

Modified:
    llvm/trunk/docs/ReleaseNotes.html

Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=128969&r1=128968&r2=128969&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Tue Apr  5 19:56:12 2011
@@ -106,7 +106,8 @@
 
 <p>In the LLVM 2.9 time-frame, the Clang team has made many improvements in C,
 C++ and Objective-C support.  C++ support is now generally rock solid, has
-been exercised on a broad variety of code, and has several new C++'0x features
+been exercised on a broad variety of code, and has several new <a 
+href="http://clang.llvm.org/cxx_status.html#cxx0x">C++'0x features</a>
 implemented (such as rvalue references and variadic templates).  LLVM 2.9 has
 also brought in a large range of bug fixes and minor features (e.g. __label__
 support), and is much more compatible with the Linux Kernel.</p>  
@@ -143,8 +144,8 @@
 The 2.9 release has the following notable changes:
 <ul>
 <li>The plugin is much more stable when compiling Fortran.</li>
-<li>Inline asm where an asm output is tied to an input of a different size is
-now supported in many more cases.</li>
+<li>Inline assembly where an asm output is tied to an input of a different size
+is now supported in many more cases.</li>
 <li>Basic support for the __float128 type was added.  It is now possible to
 generate LLVM IR from programs using __float128 but code generation does not
 work yet.</li>
@@ -169,15 +170,13 @@
 this and other low-level routines (some are 3x faster than the equivalent
 libgcc routines).</p>
 
-<p>
-All of the code in the compiler-rt project is available under the standard LLVM
-License, a "BSD-style" license.  
-
-compiler_rt is now dual licensed under MIT and UIUC license
-  
-Several minor changes for better ARM support.
-
-New in LLVM 2.9,  UPDATE</p>
+<p>In the LLVM 2.9 timeframe, compiler_rt has had several minor changes for
+  better ARM support, and a fairly major license change.  All of the code in the
+  compiler-rt project is now <a href="DeveloperPolicy.html#license">dual
+  licensed</a> under MIT and UIUC license, which allows you to use compiler-rt
+  in applications without the binary copyright reproduction clause.  If you
+  prefer the LLVM/UIUC license, you are free to continue using it under that
+  license as well.</p>
 
 </div>
 
@@ -195,15 +194,11 @@
 LLVM disassembler and the LLVM JIT.</p>
 
 <p>
-LLDB is in early development and not included as part of the LLVM 2.9 release,
-
-  
-  
-<!--
-but is mature enough to support basic debugging scenarios on Mac OS X in C,
-Objective-C and C++.  We'd really like help extending and expanding LLDB to 
-support new platforms, new languages, new architectures, and new features.-->
-</p>
+LLDB is has advanced by leaps and bounds in the 2.9 timeframe.  It is
+dramatically more stable and useful, and includes both a new <a 
+href="http://lldb.llvm.org/tutorial.html">tutorial</a> and a <a
+href="http://lldb.llvm.org/lldb-gdb.html">side-by-side comparison with 
+GDB</a>.</p>
 
 </div>
 



From sabre at nondot.org  Tue Apr  5 19:59:18 2011
From: sabre at nondot.org (Chris Lattner)
Date: Wed, 06 Apr 2011 00:59:18 -0000
Subject: [llvm-commits] [llvm] r128970 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <20110406005918.C29322A6C12D@llvm.org>

Author: lattner
Date: Tue Apr  5 19:59:18 2011
New Revision: 128970

URL: http://llvm.org/viewvc/llvm-project?rev=128970&view=rev
Log:
some libc++ notes.

Modified:
    llvm/trunk/docs/ReleaseNotes.html

Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=128970&r1=128969&r2=128970&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Tue Apr  5 19:59:18 2011
@@ -215,13 +215,13 @@
 delivering great performance.</p>
 
 <p>
-As of the LLVM 2.9 release, UPDATE!
-
-libc++ is now dual licensed under MIT and UIUC license
+In the LLVM 2.9 timeframe, libc++ has had numerous bugs fixed, and is now being
+co-developed with Clang's C++'0x mode.</p>
   
-<!--libc++ is virtually feature complete, but would
-benefit from more testing and better integration with Clang++.  It is also
-looking forward to the C++ committee finalizing the C++'0x standard.-->
+<p>
+Like compiler_rt, libc++ is now <a href="DeveloperPolicy.html#license">dual
+  licensed</a> under the MIT and UIUC license, allowing it to be used more
+  permissively.
 </p>
 
 </div>



From aggarwa4 at illinois.edu  Tue Apr  5 20:01:26 2011
From: aggarwa4 at illinois.edu (Arushi Aggarwal)
Date: Wed, 06 Apr 2011 01:01:26 -0000
Subject: [llvm-commits] [poolalloc] r128971 -
	/poolalloc/trunk/lib/AssistDS/SimplifyGEP.cpp
Message-ID: <20110406010126.B86C32A6C12D@llvm.org>

Author: aggarwa4
Date: Tue Apr  5 20:01:26 2011
New Revision: 128971

URL: http://llvm.org/viewvc/llvm-project?rev=128971&view=rev
Log:
Added more comments.

Modified:
    poolalloc/trunk/lib/AssistDS/SimplifyGEP.cpp

Modified: poolalloc/trunk/lib/AssistDS/SimplifyGEP.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/AssistDS/SimplifyGEP.cpp?rev=128971&r1=128970&r2=128971&view=diff
==============================================================================
--- poolalloc/trunk/lib/AssistDS/SimplifyGEP.cpp (original)
+++ poolalloc/trunk/lib/AssistDS/SimplifyGEP.cpp Tue Apr  5 20:01:26 2011
@@ -1,3 +1,17 @@
+//===--------------- SimplifyGEP.cpp - Simplify GEPs types  ---------------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// Simplify GEPs with bitcasts (mostly cloned from InstCombine)
+//
+//===----------------------------------------------------------------------===//
+
+
 #define DEBUG_TYPE "simplifygep"
 
 #include "llvm/Instructions.h"
@@ -38,10 +52,26 @@
   public:
     static char ID;
     SimplifyGEP() : ModulePass(&ID) {}
+    //
+    // Method: runOnModule()
+    //
+    // Description:
+    //  Entry point for this LLVM pass.
+    //  Find all GEPs, and simplify them.
+    //
+    // Inputs:
+    //  M - A reference to the LLVM module to transform
+    //
+    // Outputs:
+    //  M - The transformed LLVM module.
+    //
+    // Return value:
+    //  true  - The module was modified.
+    //  false - The module was not modified.
+    //
     bool runOnModule(Module& M) {
-    TD = &getAnalysis<TargetData>();
+      TD = &getAnalysis<TargetData>();
       preprocess(M);
-      //bool changed = false;
       for (Module::iterator F = M.begin(); F != M.end(); ++F){
         for (Function::iterator B = F->begin(), FE = F->end(); B != FE; ++B) {      
           for (BasicBlock::iterator I = B->begin(), BE = B->end(); I != BE; I++) {
@@ -50,16 +80,26 @@
             GetElementPtrInst *GEP = cast<GetElementPtrInst>(I);
             Value *PtrOp = GEP->getOperand(0);
             Value *StrippedPtr = PtrOp->stripPointerCasts();
+            // Check if the GEP base pointer is enclosed in a cast
             if (StrippedPtr != PtrOp) {
               const PointerType *StrippedPtrTy =cast<PointerType>(StrippedPtr->getType());
               bool HasZeroPointerIndex = false;
               if (ConstantInt *C = dyn_cast<ConstantInt>(GEP->getOperand(1)))
                 HasZeroPointerIndex = C->isZero();
+              // Transform: GEP (bitcast [10 x i8]* X to [0 x i8]*), i32 0, ...
+              // into     : GEP [10 x i8]* X, i32 0, ...
+              //
+              // Likewise, transform: GEP (bitcast i8* X to [0 x i8]*), i32 0, ...
+              //           into     : GEP i8* X, ...
+              // 
+              // This occurs when the program declares an array extern like "int X[];"
               if (HasZeroPointerIndex) {
                 const PointerType *CPTy = cast<PointerType>(PtrOp->getType());
                 if (const ArrayType *CATy =
                     dyn_cast<ArrayType>(CPTy->getElementType())) {
+                  // GEP (bitcast i8* X to [0 x i8]*), i32 0, ... ?
                   if (CATy->getElementType() == StrippedPtrTy->getElementType()) {
+                    // -> GEP i8* X, ...
                     SmallVector<Value*, 8> Idx(GEP->idx_begin()+1, GEP->idx_end());
                     GetElementPtrInst *Res =
                       GetElementPtrInst::Create(StrippedPtr, Idx.begin(),
@@ -68,10 +108,16 @@
                     GEP->replaceAllUsesWith(Res);
                     continue;
                   }
-                  
+
                   if (const ArrayType *XATy =
                       dyn_cast<ArrayType>(StrippedPtrTy->getElementType())){
+                    // GEP (bitcast [10 x i8]* X to [0 x i8]*), i32 0, ... ?
                     if (CATy->getElementType() == XATy->getElementType()) {
+                      // -> GEP [10 x i8]* X, i32 0, ...
+                      // At this point, we know that the cast source type is a pointer
+                      // to an array of the same type as the destination pointer
+                      // array.  Because the array type is never stepped over (there
+                      // is a leading zero) we can fold the cast into this GEP.
                       GEP->setOperand(0, StrippedPtr);
                       continue;
                     }
@@ -90,23 +136,23 @@
                   Idx[0] = Constant::getNullValue(Type::getInt32Ty(GEP->getContext()));
                   Idx[1] = GEP->getOperand(1);
                   Value *NewGEP = GetElementPtrInst::Create(StrippedPtr, Idx,
-                                                Idx+2, GEP->getName(), GEP);
+                                                            Idx+2, GEP->getName(), GEP);
                   // V and GEP are both pointer types --> BitCast
                   GEP->replaceAllUsesWith(new BitCastInst(NewGEP, GEP->getType(), GEP->getName(), GEP));
                   continue;
                 }
-                
+
                 // Transform things like:
                 // getelementptr i8* bitcast ([100 x double]* X to i8*), i32 %tmp
                 //   (where tmp = 8*tmp2) into:
                 // getelementptr [100 x double]* %arr, i32 0, i32 %tmp2; bitcast
-                
+
                 if (TD && SrcElTy->isArrayTy() && ResElTy->isIntegerTy(8)) {
                   uint64_t ArrayEltSize =
                     TD->getTypeAllocSize(cast<ArrayType>(SrcElTy)->getElementType());
-                  
+
                   // Check to see if "tmp" is a scale by a multiple of ArrayEltSize.  We
-                 // allow either a mul, shift, or constant here.
+                  // allow either a mul, shift, or constant here.
                   Value *NewIdx = 0;
                   ConstantInt *Scale = 0;
                   if (ArrayEltSize == 1) {
@@ -129,7 +175,7 @@
                       NewIdx = Inst->getOperand(0);
                     }
                   }
-                  
+
                   // If the index will be to exactly the right offset with the scale taken
                   // out, perform the transformation. Note, we don't know whether Scale is
                   // signed or not. We'll use unsigned version of division/modulo
@@ -143,13 +189,13 @@
                                                                  false /*ZExt*/);
                       NewIdx = BinaryOperator::Create(BinaryOperator::Mul, NewIdx, C, "idxscale");
                     }
-                    
+
                     // Insert the new GEP instruction.
                     Value *Idx[2];
                     Idx[0] = Constant::getNullValue(Type::getInt32Ty(GEP->getContext()));
                     Idx[1] = NewIdx;
                     Value *NewGEP = GetElementPtrInst::Create(StrippedPtr, Idx,
-                                                Idx+2, GEP->getName(), GEP);
+                                                              Idx+2, GEP->getName(), GEP);
                     GEP->replaceAllUsesWith(new BitCastInst(NewGEP, GEP->getType(), GEP->getName(), GEP));
                     continue;
                   }
@@ -168,6 +214,9 @@
   };
 }
 
+// Pass ID variable
 char SimplifyGEP::ID = 0;
+
+// Register the pass
 static RegisterPass<SimplifyGEP>
 X("simplifygep", "Simplify GEPs");



From aggarwa4 at illinois.edu  Tue Apr  5 20:10:35 2011
From: aggarwa4 at illinois.edu (Arushi Aggarwal)
Date: Wed, 06 Apr 2011 01:10:35 -0000
Subject: [llvm-commits] [poolalloc] r128972 -
	/poolalloc/trunk/lib/AssistDS/SimplifyGEP.cpp
Message-ID: <20110406011035.21C8E2A6C12D@llvm.org>

Author: aggarwa4
Date: Tue Apr  5 20:10:34 2011
New Revision: 128972

URL: http://llvm.org/viewvc/llvm-project?rev=128972&view=rev
Log:
Added more comments, and renamed the pass.

Modified:
    poolalloc/trunk/lib/AssistDS/SimplifyGEP.cpp

Modified: poolalloc/trunk/lib/AssistDS/SimplifyGEP.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/AssistDS/SimplifyGEP.cpp?rev=128972&r1=128971&r2=128972&view=diff
==============================================================================
--- poolalloc/trunk/lib/AssistDS/SimplifyGEP.cpp (original)
+++ poolalloc/trunk/lib/AssistDS/SimplifyGEP.cpp Tue Apr  5 20:10:34 2011
@@ -12,7 +12,7 @@
 //===----------------------------------------------------------------------===//
 
 
-#define DEBUG_TYPE "simplifygep"
+#define DEBUG_TYPE "simplify-gep"
 
 #include "llvm/Instructions.h"
 #include "llvm/Module.h"
@@ -30,6 +30,21 @@
 using namespace llvm;
 
 namespace {
+    //
+    // Method: preprocess()
+    //
+    // Description:
+    //  %p = bitcast %p1 to T1
+    //  gep(%p) ...
+    // ->
+    //  gep (bitcast %p1 to T1), ...
+    //
+    // Inputs:
+    //  M - A reference to the LLVM module to process
+    //
+    // Outputs:
+    //  M - The transformed LLVM module.
+    //
   static void preprocess(Module& M) {
     for (Module::iterator F = M.begin(); F != M.end(); ++F){
       for (Function::iterator B = F->begin(), FE = F->end(); B != FE; ++B) {      
@@ -219,4 +234,4 @@
 
 // Register the pass
 static RegisterPass<SimplifyGEP>
-X("simplifygep", "Simplify GEPs");
+X("simplify-gep", "Simplify GEPs");



From grosbach at apple.com  Tue Apr  5 20:11:05 2011
From: grosbach at apple.com (Jim Grosbach)
Date: Wed, 06 Apr 2011 01:11:05 -0000
Subject: [llvm-commits] [llvm] r128973 - in /llvm/trunk:
 include/llvm/ExecutionEngine/RuntimeDyld.h
 lib/ExecutionEngine/MCJIT/MCJITMemoryManager.h
 lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp
 tools/llvm-rtdyld/llvm-rtdyld.cpp
Message-ID: <20110406011105.857102A6C12D@llvm.org>

Author: grosbach
Date: Tue Apr  5 20:11:05 2011
New Revision: 128973

URL: http://llvm.org/viewvc/llvm-project?rev=128973&view=rev
Log:
RuntimeDyld should use the memory manager API.

Start teaching the runtime Dyld interface to use the memory manager API
for allocating space. Rather than mapping directly into the MachO object,
we extract the payload for each object and copy it into a dedicated buffer
allocated via the memory manager. For now, just do Segment64, so this works
on x86_64, but not yet on ARM.


Modified:
    llvm/trunk/include/llvm/ExecutionEngine/RuntimeDyld.h
    llvm/trunk/lib/ExecutionEngine/MCJIT/MCJITMemoryManager.h
    llvm/trunk/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp
    llvm/trunk/tools/llvm-rtdyld/llvm-rtdyld.cpp

Modified: llvm/trunk/include/llvm/ExecutionEngine/RuntimeDyld.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ExecutionEngine/RuntimeDyld.h?rev=128973&r1=128972&r2=128973&view=diff
==============================================================================
--- llvm/trunk/include/llvm/ExecutionEngine/RuntimeDyld.h (original)
+++ llvm/trunk/include/llvm/ExecutionEngine/RuntimeDyld.h Tue Apr  5 20:11:05 2011
@@ -38,12 +38,12 @@
   // Allocate ActualSize bytes, or more, for the named function. Return
   // a pointer to the allocated memory and update Size to reflect how much
   // memory was acutally allocated.
-  virtual uint64_t startFunctionBody(const char *Name, uintptr_t &Size) = 0;
+  virtual uint8_t *startFunctionBody(const char *Name, uintptr_t &Size) = 0;
 
   // Mark the end of the function, including how much of the allocated
   // memory was actually used.
-  virtual void endFunctionBody(const char *Name, uint64_t FunctionStart,
-                               uint64_t FunctionEnd) = 0;
+  virtual void endFunctionBody(const char *Name, uint8_t *FunctionStart,
+                               uint8_t *FunctionEnd) = 0;
 };
 
 class RuntimeDyld {

Modified: llvm/trunk/lib/ExecutionEngine/MCJIT/MCJITMemoryManager.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/MCJIT/MCJITMemoryManager.h?rev=128973&r1=128972&r2=128973&view=diff
==============================================================================
--- llvm/trunk/lib/ExecutionEngine/MCJIT/MCJITMemoryManager.h (original)
+++ llvm/trunk/lib/ExecutionEngine/MCJIT/MCJITMemoryManager.h Tue Apr  5 20:11:05 2011
@@ -31,23 +31,19 @@
   // Allocate ActualSize bytes, or more, for the named function. Return
   // a pointer to the allocated memory and update Size to reflect how much
   // memory was acutally allocated.
-  uint64_t startFunctionBody(const char *Name, uintptr_t &Size) {
+  uint8_t *startFunctionBody(const char *Name, uintptr_t &Size) {
     Function *F = M->getFunction(Name);
     assert(F && "No matching function in JIT IR Module!");
-    return (uint64_t)JMM->startFunctionBody(F, Size);
+    return JMM->startFunctionBody(F, Size);
   }
 
   // Mark the end of the function, including how much of the allocated
   // memory was actually used.
-  void endFunctionBody(const char *Name, uint64_t FunctionStart,
-                       uint64_t FunctionEnd) {
+  void endFunctionBody(const char *Name, uint8_t *FunctionStart,
+                       uint8_t *FunctionEnd) {
     Function *F = M->getFunction(Name);
     assert(F && "No matching function in JIT IR Module!");
-    // The JITMemoryManager interface makes the unfortunate assumption that
-    // the address space/sizes we're compiling on are the same as what we're
-    // compiling for, so it uses pointer types for its addresses. Explicit
-    // casts between them to deal with that.
-    JMM->endFunctionBody(F, (uint8_t*)FunctionStart, (uint8_t*)FunctionEnd);
+    JMM->endFunctionBody(F, FunctionStart, FunctionEnd);
   }
 
 };

Modified: llvm/trunk/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp?rev=128973&r1=128972&r2=128973&view=diff
==============================================================================
--- llvm/trunk/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp (original)
+++ llvm/trunk/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp Tue Apr  5 20:11:05 2011
@@ -16,6 +16,7 @@
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/StringMap.h"
 #include "llvm/ADT/StringRef.h"
+#include "llvm/ADT/STLExtras.h"
 #include "llvm/ADT/Twine.h"
 #include "llvm/ExecutionEngine/RuntimeDyld.h"
 #include "llvm/Object/MachOObject.h"
@@ -40,6 +41,10 @@
   // The MemoryManager to load objects into.
   RTDyldMemoryManager *MemMgr;
 
+
+  // For each function, we have a MemoryBlock of it's instruction data.
+  StringMap<sys::MemoryBlock> Functions;
+
   // Master symbol table. As modules are loaded and external symbols are
   // resolved, their addresses are stored here.
   StringMap<uint64_t> SymbolTable;
@@ -58,6 +63,8 @@
     return true;
   }
 
+  void extractFunction(StringRef Name, uint8_t *StartAddress,
+                       uint8_t *EndAddress);
   bool resolveRelocation(uint32_t BaseSection, macho::RelocationEntry RE,
                          SmallVectorImpl<void *> &SectionBases,
                          SmallVectorImpl<StringRef> &SymbolNames);
@@ -79,9 +86,9 @@
   bool loadObject(MemoryBuffer *InputBuffer);
 
   uint64_t getSymbolAddress(StringRef Name) {
-    // Use lookup() rather than [] because we don't want to add an entry
-    // if there isn't one already, which the [] operator does.
-    return SymbolTable.lookup(Name);
+    // FIXME: Just look up as a function for now. Overly simple of course.
+    // Work in progress.
+    return (uint64_t)Functions.lookup(Name).base();
   }
 
   sys::MemoryBlock getMemoryBlock() { return Data; }
@@ -96,7 +103,21 @@
   StringRef getErrorString() { return ErrorStr; }
 };
 
-// FIXME: Relocations for targets other than x86_64.
+void RuntimeDyldImpl::extractFunction(StringRef Name, uint8_t *StartAddress,
+                                       uint8_t *EndAddress) {
+  // Allocate memory for the function via the memory manager.
+  uintptr_t Size = EndAddress - StartAddress + 1;
+  uint8_t *Mem = MemMgr->startFunctionBody(Name.data(), Size);
+  assert(Size >= (uint64_t)(EndAddress - StartAddress + 1) &&
+         "Memory manager failed to allocate enough memory!");
+  // Copy the function payload into the memory block.
+  memcpy(Mem, StartAddress, EndAddress - StartAddress + 1);
+  MemMgr->endFunctionBody(Name.data(), Mem, Mem + Size);
+  // Remember where we put it.
+  Functions[Name] = sys::MemoryBlock(Mem, Size);
+  DEBUG(dbgs() << "    allocated to " << Mem << "\n");
+}
+
 bool RuntimeDyldImpl::
 resolveRelocation(uint32_t BaseSection, macho::RelocationEntry RE,
                   SmallVectorImpl<void *> &SectionBases,
@@ -273,7 +294,7 @@
   for (unsigned i = 0; i != Segment32LC->NumSections; ++i) {
     InMemoryStruct<macho::Section> Sect;
     Obj->ReadSection(*SegmentLCI, i, Sect);
-    if (!Sect)
+   if (!Sect)
       return Error("unable to load section: '" + Twine(i) + "'");
 
     // Remember any relocations the section has so we can resolve them later.
@@ -353,92 +374,72 @@
   if (!Segment64LC)
     return Error("unable to load segment load command");
 
-  // Map the segment into memory.
-  std::string ErrorStr;
-  Data = sys::Memory::AllocateRWX(Segment64LC->VMSize, 0, &ErrorStr);
-  if (!Data.base())
-    return Error("unable to allocate memory block: '" + ErrorStr + "'");
-  memcpy(Data.base(), Obj->getData(Segment64LC->FileOffset,
-                                   Segment64LC->FileSize).data(),
-         Segment64LC->FileSize);
-  memset((char*)Data.base() + Segment64LC->FileSize, 0,
-         Segment64LC->VMSize - Segment64LC->FileSize);
-
-  // Bind the section indices to addresses and record the relocations we
-  // need to resolve.
-  typedef std::pair<uint32_t, macho::RelocationEntry> RelocationMap;
-  SmallVector<RelocationMap, 64> Relocations;
-
-  SmallVector<void *, 16> SectionBases;
-  for (unsigned i = 0; i != Segment64LC->NumSections; ++i) {
+  for (unsigned SectNum = 0; SectNum != Segment64LC->NumSections; ++SectNum) {
     InMemoryStruct<macho::Section64> Sect;
-    Obj->ReadSection64(*SegmentLCI, i, Sect);
+    Obj->ReadSection64(*SegmentLCI, SectNum, Sect);
     if (!Sect)
-      return Error("unable to load section: '" + Twine(i) + "'");
-
-    // Remember any relocations the section has so we can resolve them later.
-    for (unsigned j = 0; j != Sect->NumRelocationTableEntries; ++j) {
-      InMemoryStruct<macho::RelocationEntry> RE;
-      Obj->ReadRelocationEntry(Sect->RelocationTableOffset, j, RE);
-      Relocations.push_back(RelocationMap(j, *RE));
-    }
+      return Error("unable to load section: '" + Twine(SectNum) + "'");
 
     // FIXME: Improve check.
     if (Sect->Flags != 0x80000400)
       return Error("unsupported section type!");
 
-    SectionBases.push_back((char*) Data.base() + Sect->Address);
-  }
+    // Address and names of symbols in the section.
+    typedef std::pair<uint64_t, StringRef> SymbolEntry;
+    SmallVector<SymbolEntry, 64> Symbols;
+    for (unsigned i = 0; i != SymtabLC->NumSymbolTableEntries; ++i) {
+      InMemoryStruct<macho::Symbol64TableEntry> STE;
+      Obj->ReadSymbol64TableEntry(SymtabLC->SymbolTableOffset, i, STE);
+      if (!STE)
+        return Error("unable to read symbol: '" + Twine(i) + "'");
+      if (STE->SectionIndex > Segment64LC->NumSections)
+        return Error("invalid section index for symbol: '" + Twine() + "'");
+
+      // Just skip symbols not defined in this section.
+      if (STE->SectionIndex - 1 != SectNum)
+        continue;
+
+      // Get the symbol name.
+      StringRef Name = Obj->getStringAtIndex(STE->StringIndex);
+
+      // FIXME: Check the symbol type and flags.
+      if (STE->Type != 0xF)  // external, defined in this section.
+        return Error("unexpected symbol type!");
+      if (STE->Flags != 0x0)
+        return Error("unexpected symbol type!");
 
-  // Bind all the symbols to address. Keep a record of the names for use
-  // by relocation resolution.
-  SmallVector<StringRef, 64> SymbolNames;
-  for (unsigned i = 0; i != SymtabLC->NumSymbolTableEntries; ++i) {
-    InMemoryStruct<macho::Symbol64TableEntry> STE;
-    Obj->ReadSymbol64TableEntry(SymtabLC->SymbolTableOffset, i, STE);
-    if (!STE)
-      return Error("unable to read symbol: '" + Twine(i) + "'");
-    // Get the symbol name.
-    StringRef Name = Obj->getStringAtIndex(STE->StringIndex);
-    SymbolNames.push_back(Name);
+      uint64_t BaseAddress = Sect->Address;
+      uint64_t Address = BaseAddress + STE->Value;
 
-    // Just skip undefined symbols. They'll be loaded from whatever
-    // module they come from (or system dylib) when we resolve relocations
-    // involving them.
-    if (STE->SectionIndex == 0)
-      continue;
-
-    unsigned Index = STE->SectionIndex - 1;
-    if (Index >= Segment64LC->NumSections)
-      return Error("invalid section index for symbol: '" + Twine() + "'");
-
-    // Get the section base address.
-    void *SectionBase = SectionBases[Index];
-
-    // Get the symbol address.
-    uint64_t Address = (uint64_t) SectionBase + STE->Value;
-
-    // FIXME: Check the symbol type and flags.
-    if (STE->Type != 0xF)
-      return Error("unexpected symbol type!");
-    if (STE->Flags != 0x0)
-      return Error("unexpected symbol type!");
+      // Remember the symbol.
+      Symbols.push_back(SymbolEntry(Address, Name));
 
-    DEBUG(dbgs() << "Symbol: '" << Name << "' @ " << Address << "\n");
-    SymbolTable[Name] = Address;
-  }
-
-  // Now resolve any relocations.
-  for (unsigned i = 0, e = Relocations.size(); i != e; ++i) {
-    if (resolveRelocation(Relocations[i].first, Relocations[i].second,
-                          SectionBases, SymbolNames))
-      return true;
+      DEBUG(dbgs() << "Function sym: '" << Name << "' @ " << Address << "\n");
+    }
+    // Sort the symbols by address, just in case they didn't come in that
+    // way.
+    array_pod_sort(Symbols.begin(), Symbols.end());
+
+    // Extract the function data.
+    uint8_t *Base = (uint8_t*)Obj->getData(Segment64LC->FileOffset,
+                                           Segment64LC->FileSize).data();
+    for (unsigned i = 0, e = Symbols.size() - 1; i != e; ++i) {
+      uint64_t StartOffset = Symbols[i].first;
+      uint64_t EndOffset = Symbols[i + 1].first - 1;
+      DEBUG(dbgs() << "Extracting function: " << Symbols[i].second
+                   << " from [" << StartOffset << ", " << EndOffset << "]\n");
+      extractFunction(Symbols[i].second, Base + StartOffset, Base + EndOffset);
+    }
+    // The last symbol we do after since the end address is calculated
+    // differently because there is no next symbol to reference.
+    uint64_t StartOffset = Symbols[Symbols.size() - 1].first;
+    uint64_t EndOffset = Sect->Size - 1;
+    DEBUG(dbgs() << "Extracting function: " << Symbols[Symbols.size()-1].second
+                 << " from [" << StartOffset << ", " << EndOffset << "]\n");
+    extractFunction(Symbols[Symbols.size()-1].second,
+                    Base + StartOffset, Base + EndOffset);
   }
 
-  // We've loaded the section; now mark the functions in it as executable.
-  // FIXME: We really should use the MemoryManager for this.
-  sys::Memory::setRangeExecutable(Data.base(), Data.size());
-
   return false;
 }
 

Modified: llvm/trunk/tools/llvm-rtdyld/llvm-rtdyld.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-rtdyld/llvm-rtdyld.cpp?rev=128973&r1=128972&r2=128973&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-rtdyld/llvm-rtdyld.cpp (original)
+++ llvm/trunk/tools/llvm-rtdyld/llvm-rtdyld.cpp Tue Apr  5 20:11:05 2011
@@ -44,14 +44,14 @@
 // support library allocation routines directly.
 class TrivialMemoryManager : public RTDyldMemoryManager {
 public:
-  uint64_t startFunctionBody(const char *Name, uintptr_t &Size);
-  void endFunctionBody(const char *Name, uint64_t FunctionStart,
-                       uint64_t FunctionEnd) {}
+  uint8_t *startFunctionBody(const char *Name, uintptr_t &Size);
+  void endFunctionBody(const char *Name, uint8_t *FunctionStart,
+                       uint8_t *FunctionEnd) {}
 };
 
-uint64_t TrivialMemoryManager::startFunctionBody(const char *Name,
+uint8_t *TrivialMemoryManager::startFunctionBody(const char *Name,
                                                  uintptr_t &Size) {
-  return (uint64_t)sys::Memory::AllocateRWX(Size, 0, 0).base();
+  return (uint8_t*)sys::Memory::AllocateRWX(Size, 0, 0).base();
 }
 
 static const char *ProgramName;



From sabre at nondot.org  Tue Apr  5 20:13:49 2011
From: sabre at nondot.org (Chris Lattner)
Date: Wed, 06 Apr 2011 01:13:49 -0000
Subject: [llvm-commits] [llvm] r128974 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <20110406011349.5A81C2A6C12D@llvm.org>

Author: lattner
Date: Tue Apr  5 20:13:49 2011
New Revision: 128974

URL: http://llvm.org/viewvc/llvm-project?rev=128974&view=rev
Log:
add the external users that emailed me.

Modified:
    llvm/trunk/docs/ReleaseNotes.html

Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=128974&r1=128973&r2=128974&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Tue Apr  5 20:13:49 2011
@@ -261,6 +261,116 @@
 </div>
 
 
+<!--=========================================================================-->
+<h2>Crack Programming Language</h2>
+
+<div class="doc_text">
+<p>
+<a href="http://code.google.com/p/crack-language/">Crack</a> aims to provide the
+ease of development of a scripting language with the performance of a compiled
+language. The language derives concepts from C++, Java and Python, incorporating
+object-oriented programming, operator overloading and strong typing.</p>
+</div>
+  
+  
+<!--=========================================================================-->
+<h2>TTA-based Codesign Environment (TCE)</h2>
+  
+<div class="doc_text">
+<p>TCE is a toolset for designing application-specific processors (ASP) based on
+the Transport triggered architecture (TTA). The toolset provides a complete
+co-design flow from C/C++ programs down to synthesizable VHDL and parallel
+program binaries. Processor customization points include the register files,
+function units, supported operations, and the interconnection network.</p>
+  
+<p>TCE uses Clang and LLVM for C/C++ language support, target independent
+optimizations and also for parts of code generation. It generates new LLVM-based
+code generators "on the fly" for the designed TTA processors and loads them in
+to the compiler backend as runtime libraries to avoid per-target recompilation
+of larger parts of the compiler chain.</p>
+</div>
+
+
+  
+<!--=========================================================================-->
+<h2>PinaVM</h2>
+  
+<div class="doc_text">
+<p><a href="http://gitorious.org/pinavm/pages/Home">PinaVM</a> is an open
+source, <a href="http://www.systemc.org/">SystemC</a> front-end. Unlike many
+other front-ends, PinaVM actually executes the elaboration of the
+program analyzed using LLVM's JIT infrastructure. It later enriches the
+bitcode with SystemC-specific information.</p>
+</div>
+
+<!--=========================================================================-->
+<h2>Pure</h2>
+  
+<div class="doc_text">
+<p><a href="http://pure-lang.googlecode.com/">Pure</a> is an
+  algebraic/functional
+  programming language based on term rewriting. Programs are collections
+  of equations which are used to evaluate expressions in a symbolic
+  fashion. The interpreter uses LLVM as a backend to JIT-compile Pure
+  programs to fast native code. Pure offers dynamic typing, eager and lazy
+  evaluation, lexical closures, a hygienic macro system (also based on
+  term rewriting), built-in list and matrix support (including list and
+  matrix comprehensions) and an easy-to-use interface to C and other
+  programming languages (including the ability to load LLVM bitcode
+  modules, and inline C, C++, Fortran and Faust code in Pure programs if
+  the corresponding LLVM-enabled compilers are installed).</p>
+  
+<p>Pure version 0.47 has been tested and is known to work with LLVM 2.9
+  (and continues to work with older LLVM releases &gt;= 2.5).</p>
+</div>
+
+<!--=========================================================================-->
+<h2 id="icedtea">IcedTea Java Virtual Machine Implementation</h2>
+
+<div class="doc_text">
+<p>
+<a href="http://icedtea.classpath.org/wiki/Main_Page">IcedTea</a> provides a
+harness to build OpenJDK using only free software build tools and to provide
+replacements for the not-yet free parts of OpenJDK.  One of the extensions that
+IcedTea provides is a new JIT compiler named <a
+href="http://icedtea.classpath.org/wiki/ZeroSharkFaq">Shark</a> which uses LLVM
+to provide native code generation without introducing processor-dependent
+code.
+</p>
+
+<p> OpenJDK 7 b112, IcedTea6 1.9 and IcedTea7 1.13 and later have been tested
+and are known to work with LLVM 2.9 (and continue to work with older LLVM
+releases &gt;= 2.6 as well).</p>
+</div>
+
+<!--=========================================================================-->
+<h2>Glasgow Haskell Compiler (GHC)</h2>
+  
+<div class="doc_text">
+<p>GHC is an open source, state-of-the-art programming suite for Haskell,
+a standard lazy functional programming language. It includes an
+optimizing static compiler generating good code for a variety of
+platforms, together with an interactive system for convenient, quick
+development.</p>
+
+<p>In addition to the existing C and native code generators, GHC 7.0 now
+supports an LLVM code generator. GHC supports LLVM 2.7 and later.</p>
+</div>
+
+<!--=========================================================================-->
+<h2>Polly - Polyhedral optimizations for LLVM</h2>
+  
+<div class="doc_text">
+<p>Polly is a project that aims to provide advanced memory access optimizations
+to better take advantage of SIMD units, cache hierarchies, multiple cores or
+even vector accelerators for LLVM. Built around an abstract mathematical
+description based on Z-polyhedra, it provides the infrastructure to develop
+advanced optimizations in LLVM and to connect complex external optimizers. In
+its first year of existence Polly already provides an exact value-based
+dependency analysis as well as basic SIMD and OpenMP code generation support.
+Furthermore, Polly can use PoCC(Pluto) an advanced optimizer for data-locality
+and parallelism.</p>
+</div>
 
 
 <!-- *********************************************************************** -->



From aggarwa4 at illinois.edu  Tue Apr  5 20:15:09 2011
From: aggarwa4 at illinois.edu (Arushi Aggarwal)
Date: Wed, 06 Apr 2011 01:15:09 -0000
Subject: [llvm-commits] [poolalloc] r128975 - in /poolalloc/trunk/test:
 TEST.types.Makefile TEST.types.report
Message-ID: <20110406011509.7AD1E2A6C12D@llvm.org>

Author: aggarwa4
Date: Tue Apr  5 20:15:09 2011
New Revision: 128975

URL: http://llvm.org/viewvc/llvm-project?rev=128975&view=rev
Log:
Updated to the latest passes and more stats

Modified:
    poolalloc/trunk/test/TEST.types.Makefile
    poolalloc/trunk/test/TEST.types.report

Modified: poolalloc/trunk/test/TEST.types.Makefile
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/test/TEST.types.Makefile?rev=128975&r1=128974&r2=128975&view=diff
==============================================================================
--- poolalloc/trunk/test/TEST.types.Makefile (original)
+++ poolalloc/trunk/test/TEST.types.Makefile Tue Apr  5 20:15:09 2011
@@ -32,12 +32,12 @@
 MEM := -track-memory -time-passes -disable-output
 
 #SAFE_OPTS := -internalize -scalarrepl -deadargelim -globaldce -basiccg -inline 
-#SAFE_OPTS := -internalize  -deadargelim -globaldce -basiccg -inline 
-SAFE_OPTS := -internalize  -deadargelim -globaldce 
+SAFE_OPTS := -internalize  -deadargelim -globaldce -basiccg -inline 
+#SAFE_OPTS := -internalize   -deadargelim -globaldce 
 
 $(PROGRAMS_TO_TEST:%=Output/%.linked1.bc): \
 Output/%.linked1.bc: Output/%.linked.rbc $(LOPT)
-	-$(RUNOPT) -disable-opt $(SAFE_OPTS) -dce -info-output-file=$(CURDIR)/$@.info -stats -time-passes $< -f -o $@ 
+	-$(RUNOPT) -disable-opt $(SAFE_OPTS) -mem2reg -dce -info-output-file=$(CURDIR)/$@.info -stats -time-passes $< -f -o $@ 
 
 $(PROGRAMS_TO_TEST:%=Output/%.llvm1.bc): \
 Output/%.llvm1.bc: Output/%.linked1.bc $(LLVM_LDDPROG)
@@ -46,17 +46,14 @@
 $(PROGRAMS_TO_TEST:%=Output/%.temp1.bc): \
 Output/%.temp1.bc: Output/%.llvm1.bc 
 	-$(RUNTOOLSAFELY) $(LLVMLD) -disable-opt $(SAFE_OPTS) -link-as-library $< $(PA_PRE_RT) -o $@
-$(PROGRAMS_TO_TEST:%=Output/%.opt1.bc): \
-Output/%.opt1.bc: Output/%.llvm1.bc $(LOPT) $(ASSIST_SO)
-	-$(RUNOPT) -load $(ASSIST_SO) -disable-opt -info-output-file=$(CURDIR)/$@.info -instnamer -internalize -varargsfunc -indclone -funcspec -ipsccp -deadargelim  -simplifygep -die -mergegep -mergearrgep -die -globaldce -simplifycfg -deadargelim -arg-simplify -varargsfunc -indclone -funcspec -deadargelim -globaldce -die -simplifycfg -gep-args -deadargelim -die -mergegep -die -dce -globaldce -stats -time-passes $< -f -o $@ 
 
 $(PROGRAMS_TO_TEST:%=Output/%.opt.bc): \
 Output/%.opt.bc: Output/%.llvm1.bc $(LOPT) $(ASSIST_SO)
-	-$(RUNOPT) -load $(ASSIST_SO) -disable-opt -info-output-file=$(CURDIR)/$@.info -instnamer -internalize -simplify-mrv -basiccg -inline -dce -simplify-mrv -dce -varargsfunc -indclone -funcspec -ipsccp -deadargelim  -simplifygep -die -mergegep -die -mergearrgep -die -globaldce -simplifycfg -deadargelim -arg-simplify -die -varargsfunc -die -simplifycfg -globaldce -indclone -funcspec -deadargelim -globaldce -die -simplifycfg -gep-args -deadargelim -die -mergefunc -die -mergegep -die -mergearrgep -die -globaldce -int2ptrcmp -die -dce -simplify-mrv -dce -stats -time-passes $< -f -o $@ 
+	-$(RUNOPT) -load $(ASSIST_SO) -disable-opt -info-output-file=$(CURDIR)/$@.info -instnamer -internalize -mem2reg -dce -simplify-mrv -basiccg -inline -dce -simplify-mrv -dce -varargsfunc -indclone -funcspec -ipsccp -deadargelim  -simplify-gep -die -die -mergearrgep -die -globaldce -simplifycfg -deadargelim -arg-simplify -die -varargsfunc -die -simplifycfg -globaldce -indclone -funcspec -deadargelim -globaldce -die -simplifycfg -gep-args -deadargelim -die -mergefunc -die -die -mergearrgep -die -globaldce -int2ptrcmp -die -dce -simplify-mrv -dce -inline -mem2reg -dce -arg-cast -dce -type-analysis  -stats -time-passes $< -f -o $@ 
 
 $(PROGRAMS_TO_TEST:%=Output/%.temp2.bc): \
 Output/%.temp2.bc: Output/%.temp1.bc $(LOPT) $(ASSIST_SO)
-	-$(RUNOPT) -load $(ASSIST_SO) -disable-opt -info-output-file=$(CURDIR)/$@.info -instnamer -internalize  -varargsfunc -indclone -funcspec -ipsccp -deadargelim  -mergegep -die -globaldce -stats -time-passes $< -f -o $@ 
+	-$(RUNOPT) -load $(ASSIST_SO) -disable-opt -info-output-file=$(CURDIR)/$@.info -instnamer -internalize -varargsfunc -indclone -funcspec -ipsccp -deadargelim  -mergegep -die -globaldce -stats -time-passes $< -f -o $@ 
 
 $(PROGRAMS_TO_TEST:%=Output/%.opt.s): \
 Output/%.opt.s: Output/%.opt.bc $(LLC)
@@ -111,10 +108,10 @@
 
 
 $(PROGRAMS_TO_TEST:%=Output/%.$(TEST).report.txt): \
-Output/%.$(TEST).report.txt: Output/%.opt.bc Output/%.LOC.txt $(LOPT) Output/%.out-nat Output/%.opt.diff-nat Output/%.llvm1.diff-nat
+Output/%.$(TEST).report.txt: Output/%.opt.bc Output/%.LOC.txt $(LOPT) Output/%.out-nat Output/%.opt.diff-nat
 	@# Gather data
-	-($(RUNOPT) -dsa-$(PASS) -enable-type-inference-opts -dsa-stdlib-no-fold $(ANALYZE_OPTS) $<)> $@.time.1 2>&1
-	-($(RUNOPT) -dsa-$(PASS) $(ANALYZE_OPTS) $<)> $@.time.2 2>&1
+	-($(RUNOPT)  -dsa-$(PASS) -enable-type-inference-opts -dsa-stdlib-no-fold $(ANALYZE_OPTS) $<)> $@.time.1 2>&1
+	-($(RUNOPT)  -dsa-$(PASS)  $(ANALYZE_OPTS) $<)> $@.time.2 2>&1
 	@# Emit data.
 	@echo "---------------------------------------------------------------" > $@
 	@echo ">>> ========= '$(RELDIR)/$*' Program" >> $@
@@ -152,6 +149,9 @@
 	@/bin/echo -n "ACCESSES UNTYPED: " >> $@
 	- at grep 'Number of loads/stores which are untyped' $@.time.2 >> $@
 	@echo >> $@
+	@/bin/echo -n "ACCESSES TYPED0: " >> $@
+	- at grep 'Number of loads/stores which are access a DSNode with 0 type' $@.time.1 >> $@
+	@echo >> $@
 	@/bin/echo -n "ACCESSES TYPED1: " >> $@
 	- at grep 'Number of loads/stores which are access a DSNode with 1 type' $@.time.1 >> $@
 	@echo >> $@
@@ -164,12 +164,18 @@
 	@/bin/echo -n "ACCESSES TYPED4: " >> $@
 	- at grep 'Number of loads/stores which are access a DSNode with >3 type' $@.time.1 >> $@
 	@echo >> $@
+	@/bin/echo -n "IGN: " >> $@
+	- at grep 'Number of instructions ignored' $@.time.1 >> $@
+	@echo >> $@
 	@/bin/echo -n "ACCESSES I: " >> $@
 	- at grep 'Number of loads/stores which are on incomplete nodes' $@.time.1 >> $@
 	@echo >> $@
 	@/bin/echo -n "ACCESSES E: " >> $@
 	- at grep 'Number of loads/stores which are on external nodes' $@.time.1 >> $@
 	@echo >> $@
+	@/bin/echo -n "ACCESSES F: " >> $@
+	- at grep 'Number of loads/stores which are on folded nodes' $@.time.1 >> $@
+	@echo >> $@
 	@/bin/echo -n "ACCESSES U: " >> $@
 	- at grep 'Number of loads/stores which are on unknown nodes' $@.time.1 >> $@
 	@echo >> $@
@@ -211,6 +217,15 @@
 	@/bin/echo -n "MRV: " >> $@
 	- at grep 'Number of Instructions Deleted' $<.info >> $@
 	@echo >> $@
+	@/bin/echo -n "ALLOC: " >> $@
+	- at grep 'Number of malloc-like allocators' $@.time.1 >> $@
+	@echo >> $@
+	@/bin/echo -n "DEALLOC: " >> $@
+	- at grep 'Number of free-like deallocators' $@.time.1 >> $@
+	@echo >> $@
+	@/bin/echo -n "CAST: " >> $@
+	- at grep 'Number of Args bitcasted' $<.info >> $@
+	@echo >> $@
 	@/bin/echo -n "INDCALLS: " >> $@
 	- at grep 'Number of unresolved IndCalls' $@.time.1 >> $@
 	@echo >> $@

Modified: poolalloc/trunk/test/TEST.types.report
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/test/TEST.types.report?rev=128975&r1=128974&r2=128975&view=diff
==============================================================================
--- poolalloc/trunk/test/TEST.types.report (original)
+++ poolalloc/trunk/test/TEST.types.report Tue Apr  5 20:15:09 2011
@@ -149,12 +149,15 @@
             ["NonType",  "ACCESSES UNTYPED: *([0-9]+)"],
             ["TS %" , sub { return TypeSafeRatio(@_); }],
             [],
+            ["Ign", "IGN: *([0-9]+)"],
+            ["Type0", "ACCESSES TYPED0: *([0-9]+)"],
             ["Type1", "ACCESSES TYPED1: *([0-9]+)"],
             ["Type2", "ACCESSES TYPED2: *([0-9]+)"],
             ["Type3", "ACCESSES TYPED3: *([0-9]+)"],
             ["Type4", "ACCESSES TYPED4: *([0-9]+)"],
             ["I", "ACCESSES I: *([0-9]+)"],
             ["E", "ACCESSES E: *([0-9]+)"],
+            ["F", "ACCESSES F: *([0-9]+)"],
             ["U", "ACCESSES U: *([0-9]+)"],
 # Nodes Folded
             [],
@@ -167,5 +170,8 @@
             ["I2PB", "I2PB: *([0-9]+)"],
             ["I2PS", "I2PS: *([0-9]+)"],
             ["MRV", "MRV: *([0-9]+)"],
+            ["AL", "ALLOC: *([0-9]+)"],
+            ["DE", "DEALLOC: *([0-9]+)"],
+            ["CAST", "CAST: *([0-9]+)"],
             ["Calls", "INDCALLS: *([0-9]+)"],
            );



From aggarwa4 at illinois.edu  Tue Apr  5 20:16:45 2011
From: aggarwa4 at illinois.edu (Arushi Aggarwal)
Date: Wed, 06 Apr 2011 01:16:45 -0000
Subject: [llvm-commits] [poolalloc] r128976 -
	/poolalloc/trunk/lib/AssistDS/CMakeLists.txt
Message-ID: <20110406011645.44B392A6C12D@llvm.org>

Author: aggarwa4
Date: Tue Apr  5 20:16:45 2011
New Revision: 128976

URL: http://llvm.org/viewvc/llvm-project?rev=128976&view=rev
Log:
Update to reflect that a file was deleted.

Modified:
    poolalloc/trunk/lib/AssistDS/CMakeLists.txt

Modified: poolalloc/trunk/lib/AssistDS/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/AssistDS/CMakeLists.txt?rev=128976&r1=128975&r2=128976&view=diff
==============================================================================
--- poolalloc/trunk/lib/AssistDS/CMakeLists.txt (original)
+++ poolalloc/trunk/lib/AssistDS/CMakeLists.txt Tue Apr  5 20:16:45 2011
@@ -6,7 +6,6 @@
   IndCloner.cpp
   Int2PtrCmp.cpp
   MergeArrayIndexGEP.cpp
-  MergeGEP.cpp
   SVADevirt.cpp
   SimplifyGEP.cpp
   SimplifyMRV.cpp



From johnny.chen at apple.com  Tue Apr  5 20:18:32 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Wed, 06 Apr 2011 01:18:32 -0000
Subject: [llvm-commits] [llvm] r128977 - in /llvm/trunk:
 lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
 test/MC/Disassembler/ARM/arm-tests.txt
Message-ID: <20110406011832.D7CFE2A6C12D@llvm.org>

Author: johnny
Date: Tue Apr  5 20:18:32 2011
New Revision: 128977

URL: http://llvm.org/viewvc/llvm-project?rev=128977&view=rev
Log:
Add a missing opcode (SMLSLDX) to BadRegsMulFrm() function.
Add more complete sanity check for LdStFrm instructions where if IBit (Inst{25})
is 1, Inst{4} should be 0.  Otherwise, we should reject the insn as invalid.

rdar://problem/9239347
rdar://problem/9239467

Modified:
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
    llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp?rev=128977&r1=128976&r2=128977&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp Tue Apr  5 20:18:32 2011
@@ -547,7 +547,7 @@
     return false;
   case ARM::SMLAL:   case ARM::SMULL:   case ARM::UMAAL:   case ARM::UMLAL:
   case ARM::UMULL:   case ARM::SMLALBB: case ARM::SMLALBT: case ARM::SMLALTB:
-  case ARM::SMLALTT: case ARM::SMLSLD:
+  case ARM::SMLALTT: case ARM::SMLSLD:  case ARM::SMLSLDX:
     if (R19_16 == 15 || R15_12 == 15 || R11_8 == 15 || R3_0 == 15)
       return true;
     if (R19_16 == R15_12)
@@ -1201,12 +1201,8 @@
     }
     OpIdx += 1;
   } else {
-    // The opcode ARM::LDRT actually corresponds to both Encoding A1 and A2 of
-    // A8.6.86 LDRT.  So if Inst{4} != 0 while Inst{25} (getIBit(insn)) == 1,
-    // we should reject this insn as invalid.
-    //
-    // Ditto for LDRBT.
-    if ((Opcode == ARM::LDRT || Opcode == ARM::LDRBT) && (slice(insn,4,4) == 1))
+    // If Inst{25} = 1 and Inst{4} != 0, we should reject this as invalid.
+    if (slice(insn,4,4) == 1)
       return false;
 
     // Disassemble the offset reg (Rm), shift type, and immediate shift length.

Modified: llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt?rev=128977&r1=128976&r2=128977&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt (original)
+++ llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt Tue Apr  5 20:18:32 2011
@@ -198,7 +198,7 @@
 0xa5 0xba 0xd2 0xed
 
 # CHECK:	strtvc	r5, [r3], r0, lsr #20
-0x30 0x5a 0xa3 0x76
+0x20 0x5a 0xa3 0x76
 
 # CHECK:	stmiblo	sp, {r0, r4, r8, r11, r12, pc}
 0x11 0x99 0x8d 0x39
@@ -242,3 +242,6 @@
 
 # CHECK:	mrchs	p2, #3, r11, c13, c6, #6
 0xd6 0xb2 0x7d 0x2e
+
+# CHECK:	smlsldx	r4, r12, r11, r4
+0x7b 0x44 0x4c 0xe7



From aggarwa4 at illinois.edu  Tue Apr  5 21:42:17 2011
From: aggarwa4 at illinois.edu (Arushi Aggarwal)
Date: Wed, 06 Apr 2011 02:42:17 -0000
Subject: [llvm-commits] [poolalloc] r128980 -
	/poolalloc/trunk/lib/AssistDS/MergeArrayIndexGEP.cpp
Message-ID: <20110406024217.EFA3E2A6C12D@llvm.org>

Author: aggarwa4
Date: Tue Apr  5 21:42:17 2011
New Revision: 128980

URL: http://llvm.org/viewvc/llvm-project?rev=128980&view=rev
Log:
The 2nd loop was extraneous. This covers all the cases.

Added more comments.

Modified:
    poolalloc/trunk/lib/AssistDS/MergeArrayIndexGEP.cpp

Modified: poolalloc/trunk/lib/AssistDS/MergeArrayIndexGEP.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/AssistDS/MergeArrayIndexGEP.cpp?rev=128980&r1=128979&r2=128980&view=diff
==============================================================================
--- poolalloc/trunk/lib/AssistDS/MergeArrayIndexGEP.cpp (original)
+++ poolalloc/trunk/lib/AssistDS/MergeArrayIndexGEP.cpp Tue Apr  5 21:42:17 2011
@@ -1,4 +1,4 @@
-//===-- MergeGEP.cpp - Merge GEPs for indexing in arrays ------------ ----===//
+//===-- MergeArrayIndexGEP.cpp - Merge GEPs for indexing in arrays --------===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -6,10 +6,11 @@
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
-//
 // 
+// Merge chained GEPs; Specially useful for arrays inside structs
+//
 //===----------------------------------------------------------------------===//
-#define DEBUG_TYPE "mergearraygep"
+#define DEBUG_TYPE "merge-gep"
 
 #include "llvm/Instructions.h"
 #include "llvm/Module.h"
@@ -21,73 +22,63 @@
 #include "llvm/ADT/Statistic.h"
 #include "llvm/Support/FormattedStream.h"
 #include "llvm/Support/Debug.h"
+
 #include <vector>
+// Pass statistics
+STATISTIC(numMerged, "Number of GEPs merged");
 
 using namespace llvm;
 
-
 namespace {
   class MergeArrayGEP : public ModulePass {
   public:
     static char ID;
     MergeArrayGEP() : ModulePass(&ID) {}
+    //
+    // Method: runOnModule()
+    //
+    // Description:
+    //  Entry point for this LLVM pass.
+    //  Merge chained GEPs into a single GEP
+    //
+    // Inputs:
+    //  M - A reference to the LLVM module to transform
+    //
+    // Outputs:
+    //  M - The transformed LLVM module.
+    //
+    // Return value:
+    //  true  - The module was modified.
+    //  false - The module was not modified.
+    //
     bool runOnModule(Module& M) {
-      for (Module::iterator F = M.begin(); F != M.end(); ++F){
-        for (Function::iterator B = F->begin(), FE = F->end(); B != FE; ++B) {      
-          for (BasicBlock::iterator I = B->begin(), BE = B->end(); I != BE;) {
-            GetElementPtrInst *GEP = dyn_cast<GetElementPtrInst>(I++);
-            if(GEP == NULL)
-              continue;
-            simplifyGEP(GEP);
-          }
-        }
-      }
       bool changed;
       do {
         changed = false;
-        for (Module::iterator F = M.begin(); F != M.end(); ++F) {
+        for (Module::iterator F = M.begin(); F != M.end(); ++F){
           for (Function::iterator B = F->begin(), FE = F->end(); B != FE; ++B) {      
             for (BasicBlock::iterator I = B->begin(), BE = B->end(); I != BE;) {
               GetElementPtrInst *GEP = dyn_cast<GetElementPtrInst>(I++);
               if(GEP == NULL)
                 continue;
-              if(!isa<ArrayType>(GEP->getType()->getElementType()))
-                continue;
-              changed |= mergeUseGEPs(GEP);
-
+              simplifyGEP(GEP);
             }
           }
         }
       } while(changed);
       return true;
     }
-    static bool mergeUseGEPs(GetElementPtrInst *GEP) {
-      bool changed = false;
-      std::vector<GetElementPtrInst*> worklist;
-      for (Value::use_iterator UI = GEP->use_begin(),
-           UE = GEP->use_end(); UI != UE; ++UI){
-        if(!isa<GetElementPtrInst>(UI))
-          break;
-        GetElementPtrInst *GEPUse = cast<GetElementPtrInst>(UI);
-        worklist.push_back(GEPUse);
-      }
-      while(!worklist.empty()) {
-        GetElementPtrInst *GEPUse = worklist.back();
-        worklist.pop_back();
-        SmallVector<Value*, 8> Indices;
-        Indices.append(GEP->op_begin()+1, GEP->op_end());
-        Indices.append(GEPUse->idx_begin()+1, GEPUse->idx_end());
-        GetElementPtrInst *GEPNew = GetElementPtrInst::Create(GEP->getOperand(0),
-                                                              Indices.begin(),
-                                                              Indices.end(),
-                                                              GEPUse->getName()+ "mod", 
-                                                              GEPUse);
-        GEPUse->replaceAllUsesWith(GEPNew);
-        GEPUse->eraseFromParent();        
-        changed = true;
-      }
-      return changed;
-    }
+    
+    //
+    // Method: simplifyGEP()
+    //
+    // Description:
+    //  Check if this GEP's pointer argument is a GEP(Inst/ConstExpr)
+    //  If so check if we can merge the two GEPs into a single GEP
+    //
+    // Inputs:
+    //  GEP - A pointer to the GEP to simplify
+    //
     static void simplifyGEP(GetElementPtrInst *GEP) {
       Value *PtrOp = GEP->getOperand(0);
       if (GEPOperator *Src = dyn_cast<GEPOperator>(PtrOp)) {
@@ -127,13 +118,16 @@
             // normalized.
             if (SO1->getType() != GO1->getType())
               return;
-            Sum = llvm::BinaryOperator::Create(BinaryOperator::Add,SO1, GO1, PtrOp->getName()+".sum",GEP);
+            Sum = llvm::BinaryOperator::Create(BinaryOperator::Add,
+                                               SO1, GO1, 
+                                               PtrOp->getName()+".sum",GEP);
           }
 
           // Update the GEP in place if possible.
           if (Src->getNumOperands() == 2) {
             GEP->setOperand(0, Src->getOperand(0));
             GEP->setOperand(1, Sum);
+            numMerged++;
             return;
           }
           Indices.append(Src->op_begin()+1, Src->op_end()-1);
@@ -153,6 +147,7 @@
                                               Indices.end(), GEP->getName(), GEP) :
             GetElementPtrInst::Create(Src->getOperand(0), Indices.begin(),
                                       Indices.end(), GEP->getName(), GEP);
+          numMerged++;
           GEP->replaceAllUsesWith(GEPNew);
           GEP->eraseFromParent();
         }
@@ -161,6 +156,9 @@
   };
 }
 
+// Pass ID variable
 char MergeArrayGEP::ID = 0;
+
+// Register the pass
 static RegisterPass<MergeArrayGEP>
 X("mergearrgep", "Merge GEPs for arrays indexing");



From aggarwa4 at illinois.edu  Tue Apr  5 21:55:09 2011
From: aggarwa4 at illinois.edu (Arushi Aggarwal)
Date: Wed, 06 Apr 2011 02:55:09 -0000
Subject: [llvm-commits] [poolalloc] r128981 -
	/poolalloc/trunk/lib/AssistDS/ArgCast.cpp
Message-ID: <20110406025509.C4E422A6C12D@llvm.org>

Author: aggarwa4
Date: Tue Apr  5 21:55:09 2011
New Revision: 128981

URL: http://llvm.org/viewvc/llvm-project?rev=128981&view=rev
Log:
Added comments.

Made sure we handle the integer casts correctly.


Modified:
    poolalloc/trunk/lib/AssistDS/ArgCast.cpp

Modified: poolalloc/trunk/lib/AssistDS/ArgCast.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/AssistDS/ArgCast.cpp?rev=128981&r1=128980&r2=128981&view=diff
==============================================================================
--- poolalloc/trunk/lib/AssistDS/ArgCast.cpp (original)
+++ poolalloc/trunk/lib/AssistDS/ArgCast.cpp Tue Apr  5 21:55:09 2011
@@ -1,4 +1,4 @@
-//===-- ArgSimplify.cpp - Special case for conditional ptr args ----------===//
+//===-------- ArgCast.cpp - Cast Arguments to Calls -----------------------===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -6,9 +6,16 @@
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
+// Convert 
+// call(bitcast (.., T1 arg, ...)F to(..., T2 arg, ...))(..., T2 val, ...)
+// to
+// val1 = bitcast T2 val to T1
+// call F (..., T1 val1, ...)
+//===----------------------------------------------------------------------===//
 #define DEBUG_TYPE "argcast"
 
 #include "llvm/Instructions.h"
+#include "llvm/Attributes.h"
 #include "llvm/Module.h"
 #include "llvm/Pass.h"
 #include "llvm/Transforms/Utils/Cloning.h"
@@ -22,6 +29,7 @@
 
 using namespace llvm;
 
+// Pass statistics
 STATISTIC(numChanged,   "Number of Args bitcasted");
 
 namespace {
@@ -31,14 +39,33 @@
     static char ID;
     ArgCast() : ModulePass(&ID) {}
 
+    //
+    // Method: runOnModule()
+    //
+    // Description:
+    //  Entry point for this LLVM pass.
+    //  Search for all call sites to casted functions.
+    //  Check if they only differ in an argument type
+    //  Cast the argument, and call the original function
+    //
+    // Inputs:
+    //  M - A reference to the LLVM module to transform
+    //
+    // Outputs:
+    //  M - The transformed LLVM module.
+    //
+    // Return value:
+    //  true  - The module was modified.
+    //  false - The module was not modified.
+    //
     bool runOnModule(Module& M) {
 
       std::vector<CallInst*> worklist;
-      for (Module::iterator I = M.begin(); I != M.end(); ++I) 
-        if (!I->isDeclaration() && !I->mayBeOverridden()) {
-          if(I->getNameStr() == "main")
-            continue;
+      for (Module::iterator I = M.begin(); I != M.end(); ++I)
+        if (!I->isDeclaration() && !I->mayBeOverridden())
+          // Find all uses of this function
           for(Value::use_iterator ui = I->use_begin(), ue = I->use_end(); ui != ue; ++ui)
+            // check if is ever casted to a different function type
             if (Constant *C = dyn_cast<Constant>(ui)) 
               if (ConstantExpr *CE = dyn_cast<ConstantExpr>(C)) 
                 if (CE->getOpcode() == Instruction::BitCast) 
@@ -46,52 +73,90 @@
                     if(const FunctionType *FTy  = dyn_cast<FunctionType>
                        ((cast<PointerType>(CE->getType()))->getElementType())) {
                       //casting to a varargs funtion
-                      if(FTy->isVarArg()){
+                      if(FTy->isVarArg())
                         for(Value::use_iterator uii = CE->use_begin(),
-                            uee = CE->use_end(); uii != uee; ++uii) 
+                            uee = CE->use_end(); uii != uee; ++uii) {
+                          // Find all uses of the casted value, and check if it is 
+                          // used in a Call Instruction
                           if (CallInst* CI = dyn_cast<CallInst>(uii)) {
+                            // Check that it is the called value, and not an argument
+                            if(CI->getCalledValue() != CE) 
+                              continue;
+                            // Check that the number of arguments passed, and expected
+                            // by the function are the same.
                             if(CI->getNumOperands() != I->arg_size() + 1)
                               continue;
-                            if(CI->getCalledValue() == CE) 
-                              worklist.push_back(CI);
+                            // Check that the return type of the function matches that
+                            // expected by the call inst(ensures that the reason for the
+                            // cast is not the return type).
+                            if(CI->getType() != I->getReturnType())
+                              continue;
+
+                            // If so, add to worklist
+                            worklist.push_back(CI);
                           }
+                        }
                       }
-                    }
-        }
+      
+      // Proces the worklist of potential call sites to transform
       while(!worklist.empty()) {
         CallInst *CI = worklist.back();
         worklist.pop_back();
+        // Get the called Function
         Function *F = cast<Function>(CI->getCalledValue()->stripPointerCasts());
         const FunctionType *FTy = F->getFunctionType();
-        if(F->getReturnType() != CI->getType()) {
-          continue;
-        }
 
         SmallVector<Value*, 8> Args;
         unsigned i =0;
         for(i =0; i< FTy->getNumParams(); ++i) {
           const Type *ArgType = CI->getOperand(i+1)->getType();
           const Type *FormalType = FTy->getParamType(i);
-          if(ArgType == FormalType)
+          // If the types for this argument match, just add it to the
+          // parameter list. No cast needs to be inserted.
+          if(ArgType == FormalType) {
             Args.push_back(CI->getOperand(i+1));
-
-          else if(ArgType->isPointerTy() && FormalType->isPointerTy()){
-            BitCastInst *BI = new BitCastInst(CI->getOperand(i+1), FormalType, "", CI);
-            Args.push_back(BI);
-          } else if (ArgType->isIntegerTy() && FormalType->isIntegerTy()) {
-            CastInst *CastI = CastInst::CreateIntegerCast(CI->getOperand(i+1), FormalType, true, "", CI);
+          }
+          else if(ArgType->isPointerTy() && FormalType->isPointerTy()) {
+            CastInst *CastI = CastInst::CreatePointerCast(CI->getOperand(i+1), 
+                                                          FormalType, "", CI);
             Args.push_back(CastI);
+          } else if (ArgType->isIntegerTy() && FormalType->isIntegerTy()) {
+            unsigned SrcBits = ArgType->getScalarSizeInBits();
+            unsigned DstBits = FormalType->getScalarSizeInBits();
+            if(SrcBits > DstBits) {
+              CastInst *CastI = CastInst::CreateIntegerCast(CI->getOperand(i+1), 
+                                                            FormalType, true, "", CI);
+              Args.push_back(CastI);
+            } else {
+              if(F->paramHasAttr(i+1, Attribute::SExt)) {
+                CastInst *CastI = CastInst::CreateIntegerCast(CI->getOperand(i+1), 
+                                                              FormalType, true, "", CI);
+                Args.push_back(CastI);
+              } else if(F->paramHasAttr(i+1, Attribute::ZExt)) {
+                CastInst *CastI = CastInst::CreateIntegerCast(CI->getOperand(i+1), 
+                                                              FormalType, false, "", CI);
+                Args.push_back(CastI);
+              } else {
+                //  Use ZExt in default case.
+                //  TODO: is this correct?
+                CastInst *CastI = CastInst::CreateIntegerCast(CI->getOperand(i+1), 
+                                                              FormalType, false, "", CI);
+                Args.push_back(CastI);
+                break;
+              } 
+            } 
           } else {
-            ArgType->dump();
-            FormalType->dump();
+            DEBUG(ArgType->dump());
+            DEBUG(FormalType->dump());
             break;
           }
-
         }
+
+        // If we found an argument we could not cast, try the next instruction
         if(i != FTy->getNumParams())
           continue;
 
-
+        // else replace the call instruction
         CallInst *CINew = CallInst::Create(F, Args.begin(), Args.end(), "", CI);
         CINew->setCallingConv(CI->getCallingConv());
         CINew->setAttributes(CI->getAttributes());
@@ -104,6 +169,9 @@
   };
 }
 
+// Pass ID variable
 char ArgCast::ID = 0;
+
+// Register the pass
 static RegisterPass<ArgCast>
 X("arg-cast", "Cast Arguments");



From aggarwa4 at illinois.edu  Tue Apr  5 21:57:00 2011
From: aggarwa4 at illinois.edu (Arushi Aggarwal)
Date: Wed, 06 Apr 2011 02:57:00 -0000
Subject: [llvm-commits] [poolalloc] r128982 -
	/poolalloc/trunk/lib/AssistDS/TypeAnalysis.cpp
Message-ID: <20110406025700.BC1AA2A6C12D@llvm.org>

Author: aggarwa4
Date: Tue Apr  5 21:57:00 2011
New Revision: 128982

URL: http://llvm.org/viewvc/llvm-project?rev=128982&view=rev
Log:
Updated to return the src pointer for a copying store. WIP.

Modified:
    poolalloc/trunk/lib/AssistDS/TypeAnalysis.cpp

Modified: poolalloc/trunk/lib/AssistDS/TypeAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/AssistDS/TypeAnalysis.cpp?rev=128982&r1=128981&r2=128982&view=diff
==============================================================================
--- poolalloc/trunk/lib/AssistDS/TypeAnalysis.cpp (original)
+++ poolalloc/trunk/lib/AssistDS/TypeAnalysis.cpp Tue Apr  5 21:57:00 2011
@@ -98,6 +98,37 @@
 
   return false;
 }
+
+Value *
+TypeAnalysis::getStoreSource(StoreInst *SI) {
+  if(LoadInst *LI = dyn_cast<LoadInst>(SI->getOperand(0))) {
+    return LI->getOperand(0);
+  }
+  return NULL;
+}
+
+Value *
+TypeAnalysis::getStoreSource(InsertValueInst *IVI) {
+  if(LoadInst *LI = dyn_cast<LoadInst>(IVI->getInsertedValueOperand())) {
+    return LI->getOperand(0);
+  }
+  else if(ExtractValueInst *EVI = dyn_cast<ExtractValueInst>(IVI->getInsertedValueOperand())) {
+    // TODO: create a GEPInst instead
+    /*SmallVector<Constant*, 8> Indices;
+    Indices.reserve(EVI->getNumIndices());
+
+    for (unsigned i = 1, e = EVI->getNumOperands(); i != e; ++i) {
+      Constant *Val = EVI->getOperand(i);
+      Indices.push_back(Val);
+    }
+
+    Value *GEPExpr = ConstantExpr::getGetElementPtr(EVI, &Indices[0], EVI->getNumIndices(), true);
+    return GEPExpr;*/
+    return NULL;
+  }
+  return NULL;
+}
+
 void 
 TypeAnalysis::getAnalysisUsage(AnalysisUsage &AU) const {
   AU.setPreservesAll();



From aggarwa4 at illinois.edu  Tue Apr  5 22:07:43 2011
From: aggarwa4 at illinois.edu (Arushi Aggarwal)
Date: Wed, 06 Apr 2011 03:07:43 -0000
Subject: [llvm-commits] [poolalloc] r128983 - in /poolalloc/trunk:
 include/assistDS/TypeAnalysis.h lib/AssistDS/TypeAnalysis.cpp
Message-ID: <20110406030743.525C22A6C12D@llvm.org>

Author: aggarwa4
Date: Tue Apr  5 22:07:43 2011
New Revision: 128983

URL: http://llvm.org/viewvc/llvm-project?rev=128983&view=rev
Log:
Checked in header.

Modified:
    poolalloc/trunk/include/assistDS/TypeAnalysis.h
    poolalloc/trunk/lib/AssistDS/TypeAnalysis.cpp

Modified: poolalloc/trunk/include/assistDS/TypeAnalysis.h
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/assistDS/TypeAnalysis.h?rev=128983&r1=128982&r2=128983&view=diff
==============================================================================
--- poolalloc/trunk/include/assistDS/TypeAnalysis.h (original)
+++ poolalloc/trunk/include/assistDS/TypeAnalysis.h Tue Apr  5 22:07:43 2011
@@ -39,6 +39,8 @@
     bool isCopyingLoad(ExtractValueInst *);
     bool isCopyingStore(StoreInst *);
     bool isCopyingStore(InsertValueInst *);
+    Value *getStoreSource(StoreInst *SI);
+    Value *getStoreSource(InsertValueInst *IVI);
   };
 }
 

Modified: poolalloc/trunk/lib/AssistDS/TypeAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/AssistDS/TypeAnalysis.cpp?rev=128983&r1=128982&r2=128983&view=diff
==============================================================================
--- poolalloc/trunk/lib/AssistDS/TypeAnalysis.cpp (original)
+++ poolalloc/trunk/lib/AssistDS/TypeAnalysis.cpp Tue Apr  5 22:07:43 2011
@@ -113,18 +113,16 @@
     return LI->getOperand(0);
   }
   else if(ExtractValueInst *EVI = dyn_cast<ExtractValueInst>(IVI->getInsertedValueOperand())) {
-    // TODO: create a GEPInst instead
-    /*SmallVector<Constant*, 8> Indices;
+    SmallVector<Value*, 8> Indices;
     Indices.reserve(EVI->getNumIndices());
 
     for (unsigned i = 1, e = EVI->getNumOperands(); i != e; ++i) {
-      Constant *Val = EVI->getOperand(i);
+      Value *Val = EVI->getOperand(i);
       Indices.push_back(Val);
     }
-
-    Value *GEPExpr = ConstantExpr::getGetElementPtr(EVI, &Indices[0], EVI->getNumIndices(), true);
-    return GEPExpr;*/
-    return NULL;
+    GetElementPtrInst *GEPInst =
+                      GetElementPtrInst::Create(EVI->getOperand(0), &Indices[0],&Indices[0] + EVI->getNumIndices(), "", EVI);
+    return GEPInst;
   }
   return NULL;
 }



From nlewycky at google.com  Tue Apr  5 22:45:09 2011
From: nlewycky at google.com (Nick Lewycky)
Date: Tue, 5 Apr 2011 20:45:09 -0700
Subject: [llvm-commits] patch: add DenseMapInfo specialization for DebugLoc
Message-ID: <BANLkTi=10VNsZFoUcWWMzMueSGnAEU=rEw@mail.gmail.com>

Hi,

I'd like to create a DenseMap<DebugLoc, ...>. This patch adds a
specialization to DebugLoc which allows me to do just that. Please review!

Nick
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From stoklund at 2pi.dk  Tue Apr  5 22:57:00 2011
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Wed, 06 Apr 2011 03:57:00 -0000
Subject: [llvm-commits] [llvm] r128985 - in /llvm/trunk/lib/CodeGen:
 RegAllocGreedy.cpp SplitKit.cpp SplitKit.h
Message-ID: <20110406035700.43CCF2A6C12D@llvm.org>

Author: stoklund
Date: Tue Apr  5 22:57:00 2011
New Revision: 128985

URL: http://llvm.org/viewvc/llvm-project?rev=128985&view=rev
Log:
Analyze blocks with uses separately from live-through blocks without uses.

About 90% of the relevant blocks are live-through without uses, and the only
information required about them is their number. This saves memory and enables
later optimizations that need to look at only the use-blocks.

Modified:
    llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
    llvm/trunk/lib/CodeGen/SplitKit.cpp
    llvm/trunk/lib/CodeGen/SplitKit.h

Modified: llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp?rev=128985&r1=128984&r2=128985&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp Tue Apr  5 22:57:00 2011
@@ -414,20 +414,19 @@
 /// this split, assuming that all preferences in SplitConstraints are met.
 float RAGreedy::calcSplitConstraints(unsigned PhysReg) {
   InterferenceCache::Cursor Intf(IntfCache, PhysReg);
+  ArrayRef<SplitAnalysis::BlockInfo> UseBlocks = SA->getUseBlocks();
 
   // Reset interference dependent info.
-  SplitConstraints.resize(SA->LiveBlocks.size());
+  SplitConstraints.resize(UseBlocks.size());
   float StaticCost = 0;
-  for (unsigned i = 0, e = SA->LiveBlocks.size(); i != e; ++i) {
-    SplitAnalysis::BlockInfo &BI = SA->LiveBlocks[i];
+  for (unsigned i = 0; i != UseBlocks.size(); ++i) {
+    const SplitAnalysis::BlockInfo &BI = UseBlocks[i];
     SpillPlacement::BlockConstraint &BC = SplitConstraints[i];
 
     BC.Number = BI.MBB->getNumber();
     Intf.moveToBlock(BC.Number);
-    BC.Entry = (BI.Uses && BI.LiveIn) ?
-      SpillPlacement::PrefReg : SpillPlacement::DontCare;
-    BC.Exit = (BI.Uses && BI.LiveOut) ?
-      SpillPlacement::PrefReg : SpillPlacement::DontCare;
+    BC.Entry = BI.LiveIn ? SpillPlacement::PrefReg : SpillPlacement::DontCare;
+    BC.Exit = BI.LiveOut ? SpillPlacement::PrefReg : SpillPlacement::DontCare;
 
     if (!Intf.hasInterference())
       continue;
@@ -438,9 +437,7 @@
     // Interference for the live-in value.
     if (BI.LiveIn) {
       if (Intf.first() <= Indexes->getMBBStartIdx(BC.Number))
-        BC.Entry = SpillPlacement::MustSpill, Ins += BI.Uses;
-      else if (!BI.Uses)
-        BC.Entry = SpillPlacement::PrefSpill;
+        BC.Entry = SpillPlacement::MustSpill, ++Ins;
       else if (Intf.first() < BI.FirstUse)
         BC.Entry = SpillPlacement::PrefSpill, ++Ins;
       else if (Intf.first() < (BI.LiveThrough ? BI.LastUse : BI.Kill))
@@ -450,9 +447,7 @@
     // Interference for the live-out value.
     if (BI.LiveOut) {
       if (Intf.last() >= SA->getLastSplitPoint(BC.Number))
-        BC.Exit = SpillPlacement::MustSpill, Ins += BI.Uses;
-      else if (!BI.Uses)
-        BC.Exit = SpillPlacement::PrefSpill;
+        BC.Exit = SpillPlacement::MustSpill, ++Ins;
       else if (Intf.last() > BI.LastUse)
         BC.Exit = SpillPlacement::PrefSpill, ++Ins;
       else if (Intf.last() > (BI.LiveThrough ? BI.FirstUse : BI.Def))
@@ -463,6 +458,33 @@
     if (Ins)
       StaticCost += Ins * SpillPlacer->getBlockFrequency(BC.Number);
   }
+
+  // Now handle the live-through blocks without uses.
+  ArrayRef<unsigned> ThroughBlocks = SA->getThroughBlocks();
+  SplitConstraints.resize(UseBlocks.size() + ThroughBlocks.size());
+  for (unsigned i = 0; i != ThroughBlocks.size(); ++i) {
+    SpillPlacement::BlockConstraint BC = SplitConstraints[UseBlocks.size() + i];
+    BC.Number = ThroughBlocks[i];
+    BC.Entry = SpillPlacement::DontCare;
+    BC.Exit = SpillPlacement::DontCare;
+
+    Intf.moveToBlock(BC.Number);
+    if (!Intf.hasInterference())
+      continue;
+
+    // Interference for the live-in value.
+    if (Intf.first() <= Indexes->getMBBStartIdx(BC.Number))
+      BC.Entry = SpillPlacement::MustSpill;
+    else
+      BC.Entry = SpillPlacement::PrefSpill;
+
+    // Interference for the live-out value.
+    if (Intf.last() >= SA->getLastSplitPoint(BC.Number))
+      BC.Exit = SpillPlacement::MustSpill;
+    else
+      BC.Exit = SpillPlacement::PrefSpill;
+  }
+
   return StaticCost;
 }
 
@@ -473,24 +495,31 @@
 ///
 float RAGreedy::calcGlobalSplitCost(const BitVector &LiveBundles) {
   float GlobalCost = 0;
-  for (unsigned i = 0, e = SA->LiveBlocks.size(); i != e; ++i) {
-    SplitAnalysis::BlockInfo &BI = SA->LiveBlocks[i];
+  ArrayRef<SplitAnalysis::BlockInfo> UseBlocks = SA->getUseBlocks();
+  for (unsigned i = 0; i != UseBlocks.size(); ++i) {
+    const SplitAnalysis::BlockInfo &BI = UseBlocks[i];
     SpillPlacement::BlockConstraint &BC = SplitConstraints[i];
     bool RegIn  = LiveBundles[Bundles->getBundle(BC.Number, 0)];
     bool RegOut = LiveBundles[Bundles->getBundle(BC.Number, 1)];
     unsigned Ins = 0;
 
-    if (!BI.Uses)
-      Ins += RegIn != RegOut;
-    else {
-      if (BI.LiveIn)
-        Ins += RegIn != (BC.Entry == SpillPlacement::PrefReg);
-      if (BI.LiveOut)
-        Ins += RegOut != (BC.Exit == SpillPlacement::PrefReg);
-    }
+    if (BI.LiveIn)
+      Ins += RegIn != (BC.Entry == SpillPlacement::PrefReg);
+    if (BI.LiveOut)
+      Ins += RegOut != (BC.Exit == SpillPlacement::PrefReg);
     if (Ins)
       GlobalCost += Ins * SpillPlacer->getBlockFrequency(BC.Number);
   }
+
+  ArrayRef<unsigned> ThroughBlocks = SA->getThroughBlocks();
+  SplitConstraints.resize(UseBlocks.size() + ThroughBlocks.size());
+  for (unsigned i = 0; i != ThroughBlocks.size(); ++i) {
+    unsigned Number = ThroughBlocks[i];
+    bool RegIn  = LiveBundles[Bundles->getBundle(Number, 0)];
+    bool RegOut = LiveBundles[Bundles->getBundle(Number, 1)];
+    if (RegIn != RegOut)
+      GlobalCost += SpillPlacer->getBlockFrequency(Number);
+  }
   return GlobalCost;
 }
 
@@ -520,8 +549,9 @@
   SE->openIntv();
 
   // First add all defs that are live out of a block.
-  for (unsigned i = 0, e = SA->LiveBlocks.size(); i != e; ++i) {
-    SplitAnalysis::BlockInfo &BI = SA->LiveBlocks[i];
+  ArrayRef<SplitAnalysis::BlockInfo> UseBlocks = SA->getUseBlocks();
+  for (unsigned i = 0; i != UseBlocks.size(); ++i) {
+    const SplitAnalysis::BlockInfo &BI = UseBlocks[i];
     bool RegIn  = LiveBundles[Bundles->getBundle(BI.MBB->getNumber(), 0)];
     bool RegOut = LiveBundles[Bundles->getBundle(BI.MBB->getNumber(), 1)];
 
@@ -548,15 +578,6 @@
     if (!Intf.hasInterference()) {
       // Block is interference-free.
       DEBUG(dbgs() << ", no interference");
-      if (!BI.Uses) {
-        assert(BI.LiveThrough && "No uses, but not live through block?");
-        // Block is live-through without interference.
-        DEBUG(dbgs() << ", no uses"
-                     << (RegIn ? ", live-through.\n" : ", stack in.\n"));
-        if (!RegIn)
-          SE->enterIntvAtEnd(*BI.MBB);
-        continue;
-      }
       if (!BI.LiveThrough) {
         DEBUG(dbgs() << ", not live-through.\n");
         SE->useIntv(SE->enterIntvBefore(BI.Def), Stop);
@@ -583,15 +604,6 @@
       continue;
     }
 
-
-    if (!BI.Uses) {
-      // No uses in block, avoid interference by reloading as late as possible.
-      DEBUG(dbgs() << ", no uses.\n");
-      SlotIndex SegStart = SE->enterIntvAtEnd(*BI.MBB);
-      assert(SegStart >= Intf.last() && "Couldn't avoid interference");
-      continue;
-    }
-
     SlotIndex LastSplitPoint = SA->getLastSplitPoint(BI.MBB->getNumber());
     if (Intf.last().getBoundaryIndex() < BI.LastUse) {
       // There are interference-free uses at the end of the block.
@@ -620,8 +632,8 @@
   }
 
   // Now all defs leading to live bundles are handled, do everything else.
-  for (unsigned i = 0, e = SA->LiveBlocks.size(); i != e; ++i) {
-    SplitAnalysis::BlockInfo &BI = SA->LiveBlocks[i];
+  for (unsigned i = 0; i != UseBlocks.size(); ++i) {
+    const SplitAnalysis::BlockInfo &BI = UseBlocks[i];
     bool RegIn  = LiveBundles[Bundles->getBundle(BI.MBB->getNumber(), 0)];
     bool RegOut = LiveBundles[Bundles->getBundle(BI.MBB->getNumber(), 1)];
 
@@ -642,18 +654,6 @@
     if (!Intf.hasInterference()) {
       // Block is interference-free.
       DEBUG(dbgs() << ", no interference");
-      if (!BI.Uses) {
-        assert(BI.LiveThrough && "No uses, but not live through block?");
-        // Block is live-through without interference.
-        if (RegOut) {
-          DEBUG(dbgs() << ", no uses, live-through.\n");
-          SE->useIntv(Start, Stop);
-        } else {
-          DEBUG(dbgs() << ", no uses, stack-out.\n");
-          SE->leaveIntvAtTop(*BI.MBB);
-        }
-        continue;
-      }
       if (!BI.LiveThrough) {
         DEBUG(dbgs() << ", killed in block.\n");
         SE->useIntv(Start, SE->leaveIntvAfter(BI.Kill));
@@ -696,13 +696,6 @@
       continue;
     }
 
-    if (!BI.Uses) {
-      // No uses in block, avoid interference by spilling as soon as possible.
-      DEBUG(dbgs() << ", no uses.\n");
-      SlotIndex SegEnd = SE->leaveIntvAtTop(*BI.MBB);
-      assert(SegEnd <= Intf.first() && "Couldn't avoid interference");
-      continue;
-    }
     if (Intf.first().getBaseIndex() > BI.FirstUse) {
       // There are interference-free uses at the beginning of the block.
       // Find the last use that can get the register.
@@ -724,6 +717,28 @@
     assert(SegEnd <= Intf.first() && "Couldn't avoid interference");
   }
 
+  // Handle live-through blocks.
+  ArrayRef<unsigned> ThroughBlocks = SA->getThroughBlocks();
+  for (unsigned i = 0; i != ThroughBlocks.size(); ++i) {
+    unsigned Number = ThroughBlocks[i];
+    bool RegIn  = LiveBundles[Bundles->getBundle(Number, 0)];
+    bool RegOut = LiveBundles[Bundles->getBundle(Number, 1)];
+    DEBUG(dbgs() << "Live through BB#" << Number << '\n');
+    if (RegIn && RegOut) {
+      Intf.moveToBlock(Number);
+      if (!Intf.hasInterference()) {
+        SE->useIntv(Indexes->getMBBStartIdx(Number),
+                    Indexes->getMBBEndIdx(Number));
+        continue;
+      }
+    }
+    MachineBasicBlock *MBB = MF->getBlockNumbered(Number);
+    if (RegIn)
+      SE->leaveIntvAtTop(*MBB);
+    if (RegOut)
+      SE->enterIntvAtEnd(*MBB);
+  }
+
   SE->closeIntv();
 
   // FIXME: Should we be more aggressive about splitting the stack region into
@@ -797,8 +812,8 @@
 ///
 void RAGreedy::calcGapWeights(unsigned PhysReg,
                               SmallVectorImpl<float> &GapWeight) {
-  assert(SA->LiveBlocks.size() == 1 && "Not a local interval");
-  const SplitAnalysis::BlockInfo &BI = SA->LiveBlocks.front();
+  assert(SA->getUseBlocks().size() == 1 && "Not a local interval");
+  const SplitAnalysis::BlockInfo &BI = SA->getUseBlocks().front();
   const SmallVectorImpl<SlotIndex> &Uses = SA->UseSlots;
   const unsigned NumGaps = Uses.size()-1;
 
@@ -889,8 +904,8 @@
 ///
 unsigned RAGreedy::tryLocalSplit(LiveInterval &VirtReg, AllocationOrder &Order,
                                  SmallVectorImpl<LiveInterval*> &NewVRegs) {
-  assert(SA->LiveBlocks.size() == 1 && "Not a local interval");
-  const SplitAnalysis::BlockInfo &BI = SA->LiveBlocks.front();
+  assert(SA->getUseBlocks().size() == 1 && "Not a local interval");
+  const SplitAnalysis::BlockInfo &BI = SA->getUseBlocks().front();
 
   // Note that it is possible to have an interval that is live-in or live-out
   // while only covering a single block - A phi-def can use undef values from

Modified: llvm/trunk/lib/CodeGen/SplitKit.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SplitKit.cpp?rev=128985&r1=128984&r2=128985&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SplitKit.cpp (original)
+++ llvm/trunk/lib/CodeGen/SplitKit.cpp Tue Apr  5 22:57:00 2011
@@ -48,7 +48,8 @@
 
 void SplitAnalysis::clear() {
   UseSlots.clear();
-  LiveBlocks.clear();
+  UseBlocks.clear();
+  ThroughBlocks.clear();
   CurLI = 0;
 }
 
@@ -121,15 +122,17 @@
     DEBUG(dbgs() << "*** Fixing inconsistent live interval! ***\n");
     const_cast<LiveIntervals&>(LIS)
       .shrinkToUses(const_cast<LiveInterval*>(CurLI));
-    LiveBlocks.clear();
+    UseBlocks.clear();
+    ThroughBlocks.clear();
     bool fixed = calcLiveBlockInfo();
     (void)fixed;
     assert(fixed && "Couldn't fix broken live interval");
   }
 
   DEBUG(dbgs() << "Analyze counted "
-               << UseSlots.size() << " instrs, "
-               << LiveBlocks.size() << " spanned.\n");
+               << UseSlots.size() << " instrs in "
+               << UseBlocks.size() << " blocks, through "
+               << ThroughBlocks.size() << " blocks.\n");
 }
 
 /// calcLiveBlockInfo - Fill the LiveBlocks array with information about blocks
@@ -159,8 +162,8 @@
       BI.Def = LVI->start;
 
     // Find the first and last uses in the block.
-    BI.Uses = UseI != UseE && *UseI < Stop;
-    if (BI.Uses) {
+    bool Uses = UseI != UseE && *UseI < Stop;
+    if (Uses) {
       BI.FirstUse = *UseI;
       assert(BI.FirstUse >= Start);
       do ++UseI;
@@ -188,11 +191,14 @@
 
     // Don't set LiveThrough when the block has a gap.
     BI.LiveThrough = !hasGap && BI.LiveIn && BI.LiveOut;
-    LiveBlocks.push_back(BI);
+    if (Uses)
+      UseBlocks.push_back(BI);
+    else
+      ThroughBlocks.push_back(BI.MBB->getNumber());
 
     // FIXME: This should never happen. The live range stops or starts without a
     // corresponding use. An earlier pass did something wrong.
-    if (!BI.LiveThrough && !BI.Uses)
+    if (!BI.LiveThrough && !Uses)
       return false;
 
     // LVI is now at LVE or LVI->end >= Stop.
@@ -907,12 +913,12 @@
 /// may be an advantage to split CurLI for the duration of the block.
 bool SplitAnalysis::getMultiUseBlocks(BlockPtrSet &Blocks) {
   // If CurLI is local to one block, there is no point to splitting it.
-  if (LiveBlocks.size() <= 1)
+  if (UseBlocks.size() <= 1)
     return false;
   // Add blocks with multiple uses.
-  for (unsigned i = 0, e = LiveBlocks.size(); i != e; ++i) {
-    const BlockInfo &BI = LiveBlocks[i];
-    if (!BI.Uses || BI.FirstUse == BI.LastUse)
+  for (unsigned i = 0, e = UseBlocks.size(); i != e; ++i) {
+    const BlockInfo &BI = UseBlocks[i];
+    if (BI.FirstUse == BI.LastUse)
       continue;
     Blocks.insert(BI.MBB);
   }
@@ -923,10 +929,10 @@
 /// basic block in Blocks.
 void SplitEditor::splitSingleBlocks(const SplitAnalysis::BlockPtrSet &Blocks) {
   DEBUG(dbgs() << "  splitSingleBlocks for " << Blocks.size() << " blocks.\n");
-
-  for (unsigned i = 0, e = SA.LiveBlocks.size(); i != e; ++i) {
-    const SplitAnalysis::BlockInfo &BI = SA.LiveBlocks[i];
-    if (!BI.Uses || !Blocks.count(BI.MBB))
+  ArrayRef<SplitAnalysis::BlockInfo> UseBlocks = SA.getUseBlocks();
+  for (unsigned i = 0; i != UseBlocks.size(); ++i) {
+    const SplitAnalysis::BlockInfo &BI = UseBlocks[i];
+    if (!Blocks.count(BI.MBB))
       continue;
 
     openIntv();

Modified: llvm/trunk/lib/CodeGen/SplitKit.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SplitKit.h?rev=128985&r1=128984&r2=128985&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SplitKit.h (original)
+++ llvm/trunk/lib/CodeGen/SplitKit.h Tue Apr  5 22:57:00 2011
@@ -12,6 +12,7 @@
 //
 //===----------------------------------------------------------------------===//
 
+#include "llvm/ADT/ArrayRef.h"
 #include "llvm/ADT/BitVector.h"
 #include "llvm/ADT/DenseMap.h"
 #include "llvm/ADT/IndexedMap.h"
@@ -69,16 +70,11 @@
     SlotIndex LastUse;    ///< Last instr using current reg.
     SlotIndex Kill;       ///< Interval end point inside block.
     SlotIndex Def;        ///< Interval start point inside block.
-    bool Uses;            ///< Current reg has uses or defs in block.
     bool LiveThrough;     ///< Live in whole block (Templ 5. or 6. above).
     bool LiveIn;          ///< Current reg is live in.
     bool LiveOut;         ///< Current reg is live out.
   };
 
-  /// Basic blocks where var is live. This array is parallel to
-  /// SpillConstraints.
-  SmallVector<BlockInfo, 8> LiveBlocks;
-
 private:
   // Current live interval.
   const LiveInterval *CurLI;
@@ -89,6 +85,12 @@
   /// successor.
   SmallVector<std::pair<SlotIndex, SlotIndex>, 8> LastSplitPoint;
 
+  /// UseBlocks - Blocks where CurLI has uses.
+  SmallVector<BlockInfo, 8> UseBlocks;
+
+  /// ThroughBlocks - Block numbers where CurLI is live through without uses.
+  SmallVector<unsigned, 8> ThroughBlocks;
+
   SlotIndex computeLastSplitPoint(unsigned Num);
 
   // Sumarize statistics by counting instructions using CurLI.
@@ -129,6 +131,14 @@
   /// splitting.
   bool isOriginalEndpoint(SlotIndex Idx) const;
 
+  /// getUseBlocks - Return an array of BlockInfo objects for the basic blocks
+  /// where CurLI has uses.
+  ArrayRef<BlockInfo> getUseBlocks() { return UseBlocks; }
+
+  /// getThroughBlocks - Return an array of block numbers where CurLI is live
+  /// through without uses.
+  ArrayRef<unsigned> getThroughBlocks() { return ThroughBlocks; }
+
   typedef SmallPtrSet<const MachineBasicBlock*, 16> BlockPtrSet;
 
   /// getMultiUseBlocks - Add basic blocks to Blocks that may benefit from



From stoklund at 2pi.dk  Tue Apr  5 23:07:15 2011
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Wed, 06 Apr 2011 04:07:15 -0000
Subject: [llvm-commits] [llvm] r128986 -
	/llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
Message-ID: <20110406040715.1797F2A6C12D@llvm.org>

Author: stoklund
Date: Tue Apr  5 23:07:14 2011
New Revision: 128986

URL: http://llvm.org/viewvc/llvm-project?rev=128986&view=rev
Log:
Oops. Scary.

Modified:
    llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp

Modified: llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp?rev=128986&r1=128985&r2=128986&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp Tue Apr  5 23:07:14 2011
@@ -463,7 +463,7 @@
   ArrayRef<unsigned> ThroughBlocks = SA->getThroughBlocks();
   SplitConstraints.resize(UseBlocks.size() + ThroughBlocks.size());
   for (unsigned i = 0; i != ThroughBlocks.size(); ++i) {
-    SpillPlacement::BlockConstraint BC = SplitConstraints[UseBlocks.size() + i];
+    SpillPlacement::BlockConstraint &BC = SplitConstraints[UseBlocks.size()+i];
     BC.Number = ThroughBlocks[i];
     BC.Entry = SpillPlacement::DontCare;
     BC.Exit = SpillPlacement::DontCare;



From clattner at apple.com  Tue Apr  5 23:35:21 2011
From: clattner at apple.com (Chris Lattner)
Date: Tue, 05 Apr 2011 21:35:21 -0700
Subject: [llvm-commits] patch: add DenseMapInfo specialization for
	DebugLoc
In-Reply-To: <BANLkTi=10VNsZFoUcWWMzMueSGnAEU=rEw@mail.gmail.com>
References: <BANLkTi=10VNsZFoUcWWMzMueSGnAEU=rEw@mail.gmail.com>
Message-ID: <862D6F04-245A-41E2-B148-87C30747AA3A@apple.com>


On Apr 5, 2011, at 8:45 PM, Nick Lewycky wrote:

> Hi,
> 
> I'd like to create a DenseMap<DebugLoc, ...>. This patch adds a specialization to DebugLoc which allows me to do just that. Please review!

Does TombstoneKey compile to a static constructor?  If so, please just use a function interface.  Otherwise, looks ok, thanks.

-Chris


From nlewycky at google.com  Wed Apr  6 00:40:36 2011
From: nlewycky at google.com (Nick Lewycky)
Date: Tue, 5 Apr 2011 22:40:36 -0700
Subject: [llvm-commits] patch: add DenseMapInfo specialization for
	DebugLoc
In-Reply-To: <862D6F04-245A-41E2-B148-87C30747AA3A@apple.com>
References: <BANLkTi=10VNsZFoUcWWMzMueSGnAEU=rEw@mail.gmail.com>
	<862D6F04-245A-41E2-B148-87C30747AA3A@apple.com>
Message-ID: <BANLkTikerJepn-NFEYT3jQGBaOoqm6jE=g@mail.gmail.com>

On 5 April 2011 21:35, Chris Lattner <clattner at apple.com> wrote:

>
> On Apr 5, 2011, at 8:45 PM, Nick Lewycky wrote:
>
> > Hi,
> >
> > I'd like to create a DenseMap<DebugLoc, ...>. This patch adds a
> specialization to DebugLoc which allows me to do just that. Please review!
>
> Does TombstoneKey compile to a static constructor?  If so, please just use
> a function interface.  Otherwise, looks ok, thanks.
>

Good point, done! Thanks for the quick review!

Nick
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From nicholas at mxc.ca  Wed Apr  6 00:36:52 2011
From: nicholas at mxc.ca (Nick Lewycky)
Date: Wed, 06 Apr 2011 05:36:52 -0000
Subject: [llvm-commits] [llvm] r128988 - in /llvm/trunk:
 include/llvm/Support/DebugLoc.h lib/VMCore/DebugLoc.cpp
Message-ID: <20110406053652.3B9BC2A6C12D@llvm.org>

Author: nicholas
Date: Wed Apr  6 00:36:52 2011
New Revision: 128988

URL: http://llvm.org/viewvc/llvm-project?rev=128988&view=rev
Log:
Support using DebugLoc's in a DenseMap.

Modified:
    llvm/trunk/include/llvm/Support/DebugLoc.h
    llvm/trunk/lib/VMCore/DebugLoc.cpp

Modified: llvm/trunk/include/llvm/Support/DebugLoc.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/DebugLoc.h?rev=128988&r1=128987&r2=128988&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/DebugLoc.h (original)
+++ llvm/trunk/include/llvm/Support/DebugLoc.h Wed Apr  6 00:36:52 2011
@@ -15,6 +15,8 @@
 #ifndef LLVM_SUPPORT_DEBUGLOC_H
 #define LLVM_SUPPORT_DEBUGLOC_H
 
+#include "llvm/ADT/DenseMapInfo.h"
+
 namespace llvm {
   class MDNode;
   class LLVMContext;
@@ -23,6 +25,16 @@
   /// and MachineInstr to compactly encode file/line/scope information for an
   /// operation.
   class DebugLoc {
+    friend struct DenseMapInfo<DebugLoc>;
+
+    /// getTombstoneKey() - A private constructor that returns an unknown that
+    /// is distinguishable from the usual one.
+    static DebugLoc getTombstoneKey() {
+      DebugLoc DL;
+      DL.LineCol = -1;
+      return DL;
+    }
+
     /// LineCol - This 32-bit value encodes the line and column number for the
     /// location, encoded as 24-bits for line and 8 bits for col.  A value of 0
     /// for either means unknown.
@@ -75,6 +87,14 @@
     }
     bool operator!=(const DebugLoc &DL) const { return !(*this == DL); }
   };
+
+  template <>
+  struct DenseMapInfo<DebugLoc> {
+    static DebugLoc getEmptyKey();
+    static DebugLoc getTombstoneKey();
+    static unsigned getHashValue(const DebugLoc &Key);
+    static bool isEqual(const DebugLoc &LHS, const DebugLoc &RHS);
+  };
 } // end namespace llvm
 
 #endif /* LLVM_DEBUGLOC_H */

Modified: llvm/trunk/lib/VMCore/DebugLoc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/DebugLoc.cpp?rev=128988&r1=128987&r2=128988&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/DebugLoc.cpp (original)
+++ llvm/trunk/lib/VMCore/DebugLoc.cpp Wed Apr  6 00:36:52 2011
@@ -8,6 +8,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "llvm/Support/DebugLoc.h"
+#include "llvm/ADT/DenseMapInfo.h"
 #include "LLVMContextImpl.h"
 using namespace llvm;
 
@@ -128,6 +129,29 @@
 }
 
 //===----------------------------------------------------------------------===//
+// DenseMap specialization
+//===----------------------------------------------------------------------===//
+
+DebugLoc DenseMapInfo<DebugLoc>::getEmptyKey() {
+  return DebugLoc();
+}
+
+DebugLoc DenseMapInfo<DebugLoc>::getTombstoneKey() {
+  return DebugLoc::getTombstoneKey();
+}
+
+unsigned DenseMapInfo<DebugLoc>::getHashValue(const DebugLoc &Key) {
+  FoldingSetNodeID ID;
+  ID.AddInteger(Key.LineCol);
+  ID.AddInteger(Key.ScopeIdx);
+  return ID.ComputeHash();
+}
+
+bool DenseMapInfo<DebugLoc>::isEqual(const DebugLoc &LHS, const DebugLoc &RHS) {
+  return LHS == RHS;
+}
+
+//===----------------------------------------------------------------------===//
 // LLVMContextImpl Implementation
 //===----------------------------------------------------------------------===//
 



From Brice.Lin at gmail.com  Wed Apr  6 00:39:55 2011
From: Brice.Lin at gmail.com (Brice Lin)
Date: Wed, 06 Apr 2011 05:39:55 -0000
Subject: [llvm-commits] [poolalloc] r128989 - in /poolalloc/trunk:
 include/assistDS/TypeChecks.h lib/AssistDS/TypeChecks.cpp
Message-ID: <20110406053955.BAB672A6C12D@llvm.org>

Author: bglin2
Date: Wed Apr  6 00:39:55 2011
New Revision: 128989

URL: http://llvm.org/viewvc/llvm-project?rev=128989&view=rev
Log:
Modified dynamic type checking pass to insert the shadow initialization function at the entry to main.

Modified:
    poolalloc/trunk/include/assistDS/TypeChecks.h
    poolalloc/trunk/lib/AssistDS/TypeChecks.cpp

Modified: poolalloc/trunk/include/assistDS/TypeChecks.h
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/assistDS/TypeChecks.h?rev=128989&r1=128988&r2=128989&view=diff
==============================================================================
--- poolalloc/trunk/include/assistDS/TypeChecks.h (original)
+++ poolalloc/trunk/include/assistDS/TypeChecks.h Wed Apr  6 00:39:55 2011
@@ -45,8 +45,7 @@
   virtual void getAnalysisUsage(AnalysisUsage &AU) const {
   }
 
-  bool initShadow(Module &M, StoreInst &SI);
-  bool initShadowLI(Module &M, LoadInst &LI);
+  bool initShadow(Module &M, Instruction &I);
   bool unmapShadow(Module &M, Instruction &I);
   bool visitLoadInst(Module &M, LoadInst &LI);
   bool visitStoreInst(Module &M, StoreInst &SI);

Modified: poolalloc/trunk/lib/AssistDS/TypeChecks.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/AssistDS/TypeChecks.cpp?rev=128989&r1=128988&r2=128989&view=diff
==============================================================================
--- poolalloc/trunk/lib/AssistDS/TypeChecks.cpp (original)
+++ poolalloc/trunk/lib/AssistDS/TypeChecks.cpp Wed Apr  6 00:39:55 2011
@@ -62,7 +62,6 @@
 
 bool TypeChecks::runOnModule(Module &M) {
   bool modified = false; // Flags whether we modified the module.
-  bool firstSI = true;
 
   VoidTy = IntegerType::getVoidTy(M.getContext());
   Int8Ty = IntegerType::getInt8Ty(M.getContext());
@@ -80,6 +79,14 @@
     }
   }
 
+  // Insert the shadow initialization function at the entry to main.
+  Function *MainF = M.getFunction("main");
+  if (MainF == 0 || MainF->isDeclaration())
+    return false;
+
+  inst_iterator MainI = inst_begin(MainF);
+  modified |= initShadow(M, *MainI);
+
   for (Module::iterator MI = M.begin(), ME = M.end(); MI != ME; ++MI) {
     IncorporateType(MI->getType());
     Function &F = *MI;
@@ -94,19 +101,8 @@
       }
 
       if (StoreInst *SI = dyn_cast<StoreInst>(&I)) {
-        if (firstSI) {
-          modified |= initShadow(M, *SI);
-          firstSI = false;
-        }
-
         modified |= visitStoreInst(M, *SI);
       } else if (LoadInst *LI = dyn_cast<LoadInst>(&I)) {
-        // Unlikely, but just in case
-        if (firstSI) {
-          modified |= initShadowLI(M, *LI);
-          firstSI = false;
-        }
-
         modified |= visitLoadInst(M, *LI);
       }
     }
@@ -137,19 +133,10 @@
 }
 
 // Initialize the shadow memory which contains the 1:1 mapping.
-bool TypeChecks::initShadow(Module &M, StoreInst &SI) {
+bool TypeChecks::initShadow(Module &M, Instruction &I) {
   // Create the call to the runtime initialization function and place it before the store instruction.
   Constant *F = M.getOrInsertFunction("shadowInit", VoidTy, NULL);
-  CallInst::Create(F, "", &SI);
-
-  return true;
-}
-
-// Initialize the shadow memory which contains the 1:1 mapping.
-bool TypeChecks::initShadowLI(Module &M, LoadInst &LI) {
-  // Create the call to the runtime initialization function and place it before the load instruction.
-  Constant *F = M.getOrInsertFunction("shadowInit", VoidTy, NULL);
-  CallInst::Create(F, "", &LI);
+  CallInst::Create(F, "", &I);
 
   return true;
 }



From sabre at nondot.org  Wed Apr  6 00:50:04 2011
From: sabre at nondot.org (Chris Lattner)
Date: Wed, 06 Apr 2011 05:50:04 -0000
Subject: [llvm-commits] [llvm] r128990 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <20110406055004.54E3C2A6C12D@llvm.org>

Author: lattner
Date: Wed Apr  6 00:50:04 2011
New Revision: 128990

URL: http://llvm.org/viewvc/llvm-project?rev=128990&view=rev
Log:
continue writing.

Modified:
    llvm/trunk/docs/ReleaseNotes.html

Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=128990&r1=128989&r2=128990&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Wed Apr  6 00:50:04 2011
@@ -399,25 +399,21 @@
 
 <ul>
   
-<li>
-  TBAA: On by default in clang.  Disable it with -fno-strict-aliasing.
-  Could be more aggressive for structs.
-</li>
-
-<li>New Nvidia PTX backend, not generally useful in 2.9 though.</li>
-  
-<li>
-Much better debug info generated, particularly in optimized code situations.
+<li>Type Based Alias Analysis (TBAA) is now implemented and turned on by default
+  in Clang.  This allows substantially better load/store optimization in some
+  cases.  TBAA can be disabled by passing -fno-strict-aliasing.
 </li>
 
-<li>
-inline asm multiple alternative constraint support.
-</li>  
+<li>This release has seen a continued focus on quality of debug information. 
+  LLVM now generates much higher fidelity debug information, particularly when
+  debugging optimized code.</li>
+
+<li>Inline assembly now supports multiple alternative constraints.</li>  
+
+<li>A new backend for the NVIDIA PTX virtual ISA (used to target its GPUs) is
+  under rapid development.  It is not generally useful in 2.9, but is making
+  rapid progress.</li>
   
-<li>
-  New naming rules in coding standards: CodingStandards.html#ll_naming
-</li>
-
 </ul>
   
 </div>
@@ -432,13 +428,19 @@
 expose new optimization opportunities:</p>
 
 <ul>
-<li>udiv, ashr, lshr, shl now have exact and nuw/nsw bits:
-  PR8862 / LangRef.html</li>
+<li>The <a href="LangRef.html#bitwiseops">udiv, ashr, lshr, and shl</a>
+  instructions now have support exact and nuw/nsw bits to indicate that they
+  don't overflow or shift out bits.  This is useful for optimization of <a
+    href="http://llvm.org/PR8862">pointer differences</a> and other cases.</li>
+  
+<li>LLVM IR now supports the <a href="LangRef.html#globalvars">unnamed_addr</a>
+  attribute to indicate that constant global variables with identical
+  initializers can be merged.  This fixed <a href="http://llvm.org/PR8927">an
+  issue</a> where LLVM would incorrectly merge two globals which were supposed
+  to have distinct addresses.</li>
   
-  unnamed_addr + PR8927
-
-  new 'hotpatch' attribute: LangRef.html#fnattrs
-
+<li>The new <a href="LangRef.html#fnattrs">hotpatch attribute</a> has been added
+  to allow runtime patching of functions.</li> 
 </ul>
 
 </div>
@@ -454,53 +456,61 @@
 release includes a few major enhancements and additions to the optimizers:</p>
 
 <ul>
-  <li>LTO has been improved to use MC for parsing inline asm and now
-  can build large programs like Firefox 4 on both OS X and Linux.</li>
-  
-  
- LoopIdiom: memset/memcpy formation and memset_pattern on darwin.  Build with
-  -ffreestanding or -fno-builtin if your memcpy is being compiled into infinite
-  recursion.
-  
-  TargetLibraryInfo
-    
-  EarlyCSE pass.
-  LoopInstSimplify pass.
+<li>Link Time Optimization (LTO) has been improved to use MC for parsing inline
+  assembly and now can build large programs like Firefox 4 on both Mac OS X and
+  Linux.</li>
+  
+<li>The new -loop-idiom pass recognizes memset/memcpy loops (and memset_pattern
+  on darwin), turning them into library calls, which are typically better
+  optimized than inline code.  If you are building a libc and notice that your
+  memcpy and memset functions are compiled into infinite recursion, please build
+  with -ffreestanding or -fno-builtin to disable this pass.</li>
+  
+<li>A new -early-cse pass does a fast pass over functions to fold constants,
+  simplify expressions, perform simple dead store elimination, and perform
+  common subexpression elimination.  It does a good job at catching some of the
+  trivial redundancies that exist in unoptimized code, making later passes more
+  effective.<,/li>
+
+<li>A new -loop-instsimplify pass is used to clean up loop bodies in the loop
+  optimizer.</li>
+  
+<li>The new TargetLibraryInfo interface allows mid-level optimizations to know
+  whether the current target's runtime library has certain functions.  For
+  example, the optimizer can now transform integer-only printf calls to call
+  iprintf, allowing reduced code size for embedded C libraries (e.g. newlib).
+</li>
     
-New <a href="WritingAnLLVMPass.html#RegionPass">RegionPass</a> infrastructure
-  for region-based optimizations.
-  
-  Can optimize printf to iprintf when no floating point is used, for embedded
-  targets with smaller iprintf implementation.
+<li>LLVM has a new <a href="WritingAnLLVMPass.html#RegionPass">RegionPass</a>
+  infrastructure for region-based optimizations.</li>
 
-Speedups to various mid-level passes:
-  GVN is much faster on functions with deep dominator trees / lots of BBs.
-  DomTree and DominatorFrontier are much faster to compute, and preserved by
-    more passes (so they are computed less often)
-  SRoA is also much faster and doesn't use DominanceFrontier.
-  
-DSE is more aggressive with stores of different types: e.g. a large store 
-  following a small one to the same address.
+<li>Several optimizer passes have been substantially sped up:
+  GVN is much faster on functions with deep dominator trees and lots of basic
+  blocks.  The dominator tree and dominance frontier passes are much faster to
+  compute, and preserved by more passes (so they are computed less often).  The
+  -scalar-repl pass is also much faster and doesn't use DominanceFrontier.
+</li>
+
+<li>The Dead Store Elimination pass is more aggressive optimizing stores of
+  different types: e.g. a large store following a small one to the same address.
+  The MemCpyOptimizer pass handles several new forms of memcpy elimination.</li>
   
+<li>LLVM now optimizes various idioms for overflow detection into check of the
+  flag register on various CPUs.  For example, we now compile:
   
-We now optimize various idioms for overflow detection into check of the flag
-  register on various CPUs, e.g.:
+  <pre>
    unsigned long t = a+b;
    if (t &lt; a) ...
+  </pre>
   into:
-  	addq	%rdi, %rbx
-  	jno	LBB0_2
-
+  <pre>
+   addq %rdi, %rbx
+   jno  LBB0_2
+  </pre>
+</li>
   
 </ul>
 
-<!--
-<p>In addition to these features that are done in 2.8, there is preliminary
-   support in the release for Type Based Alias Analysis 
-  Preliminary work on TBAA but not usable in 2.8.
-  New CorrelatedValuePropagation pass, not on by default in 2.8 yet.
--->
-
 </div>
 
 <!--=========================================================================-->
@@ -516,46 +526,37 @@
 in.</p>
 
 <ul>
-  <li>MC is now used by default for ELF systems on x86 and
-  x86-64.</li>
-  <li>MC supports and CodeGen uses the <tt>.loc</tt> directives for
-  producing line number debug info. This produces more compact line
-  tables.</li>
-  <li>MC supports the <tt>.cfi_*</tt> directives for producing DWARF
-  frame information, but it is still not used by CodeGen by default.</li>
-  <li>COFF support?</li>
+<li>ELF MC support has matured enough for the integrated assembler to be turned
+  on by default in Clang on X86-32 and X86-64 ELF systems.</li>
   
+<li>MC supports and CodeGen uses the <tt>.file</tt> and <tt>.loc</tt> directives
+  for producing line number debug info. This produces more compact line
+  tables and easier to read .s files.</li>
+  
+<li>MC supports the <tt>.cfi_*</tt> directives for producing DWARF
+  frame information, but it is still not used by CodeGen by default.</li>
+
   
-  MC Assembler: X86 now generates much better diagnostics for common errors,
+<li>The MC assembler now generates much better diagnostics for common errors,
   is much faster at matching instructions, is much more bug-compatible with
   the GAS assembler, and is now generally useful for a broad range of X86
-  assembly.
-  
-  
-  ELF MC support: on by default in clang.  There are still known missing features
-  for human written assembly.
-  
-  
-  Some basic <a href="CodeGenerator.html#mc">internals documentation</a> for MC. 
+  assembly.</li>
   
-  MC Assembler support for .file and .loc.
+<li>We now have some basic <a href="CodeGenerator.html#mc">internals
+  documentation</a> for MC.</li>
   
-  tblgen support for assembler aliases: <a 
-    href="CodeGenerator.html#na_instparsing">MnemonicAlias and InstAlias</a>
-  
-  Win32 PE-COFF support in the MC assembler has made a lot of progress in the 2.9
-  timeframe, but is still not generally useful.  Please see 
-  "http://llvm.org/bugs/showdependencytree.cgi?id=9100&amp;hide_resolved=1" for open bugs?
-  
-  
-  lib/Object and llvm-objdump
-  Experimental format independent object file manipulation library.
-  * Supports PE/COFF and ELF.
-  * llvm-nm extended to work with object files. Exactly matches
-  binutils-nm for the files I've tested.
-  * llvm-objdump added with support for disassembly (no relocations displayed).
+<li>.td files can now specify assembler aliases directly with the <a 
+   href="CodeGenerator.html#na_instparsing">MnemonicAlias and InstAlias</a>
+   tblgen classes.</li>
+  
+<li>LLVM now has an experimental format-independent object file manipulation
+  library (lib/Object).  It supports both PE/COFF and ELF.  The llvm-nm tool has
+  been extended to work with native object files, and the new llvm-objdump tool
+  supports disassembly of object files (but no relocations are displayed yet).
+</li>
   
-
+<li>Win32 PE-COFF support in the MC assembler has made a lot of progress in the
+  2.9 timeframe, but is still not generally useful.</li>
 
 </ul>
 
@@ -707,6 +708,12 @@
 <ul>
   last release for llvm-gcc
 
+  <li>
+    New naming rules in coding standards: CodingStandards.html#ll_naming
+  </li>
+  
+
+  
 - DIBuilder provides simpler interface for front ends like Clang to encode debug info in LLVM IR.
   - This interface hides implementation details (e.g. DIDerivedType, existence of compile unit etc..) that any front end should not know about.
   For example, DIFactory DebugFactory;



From Brice.Lin at gmail.com  Wed Apr  6 01:04:17 2011
From: Brice.Lin at gmail.com (Brice Lin)
Date: Wed, 06 Apr 2011 06:04:17 -0000
Subject: [llvm-commits] [poolalloc] r128991 - in /poolalloc/trunk:
 lib/AssistDS/TypeChecks.cpp runtime/DynamicTypeChecks/TypeRuntime.c
Message-ID: <20110406060417.907A52A6C12D@llvm.org>

Author: bglin2
Date: Wed Apr  6 01:04:17 2011
New Revision: 128991

URL: http://llvm.org/viewvc/llvm-project?rev=128991&view=rev
Log:
1. Lowered memory usage using 1:1 mapping of data to metadata (from uint32_t to uint8_t).
2. Cleaned up output.

Modified:
    poolalloc/trunk/lib/AssistDS/TypeChecks.cpp
    poolalloc/trunk/runtime/DynamicTypeChecks/TypeRuntime.c

Modified: poolalloc/trunk/lib/AssistDS/TypeChecks.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/AssistDS/TypeChecks.cpp?rev=128991&r1=128990&r2=128991&view=diff
==============================================================================
--- poolalloc/trunk/lib/AssistDS/TypeChecks.cpp (original)
+++ poolalloc/trunk/lib/AssistDS/TypeChecks.cpp Wed Apr  6 01:04:17 2011
@@ -157,10 +157,10 @@
 
   std::vector<Value *> Args;
   Args.push_back(BCI);
-  Args.push_back(ConstantInt::get(Int32Ty, UsedTypes[LI.getType()]));
+  Args.push_back(ConstantInt::get(Int8Ty, UsedTypes[LI.getType()]));
 
   // Create the call to the runtime check and place it before the load instruction.
-  Constant *F = M.getOrInsertFunction("trackLoadInst", Int32Ty, VoidPtrTy, Int32Ty, NULL);
+  Constant *F = M.getOrInsertFunction("trackLoadInst", VoidTy, VoidPtrTy, Int8Ty, NULL);
   CallInst::Create(F, Args.begin(), Args.end(), "", &LI);
 
   return true;
@@ -173,10 +173,10 @@
 
   std::vector<Value *> Args;
   Args.push_back(BCI);
-  Args.push_back(ConstantInt::get(Int32Ty, UsedTypes[SI.getOperand(0)->getType()])); // SI.getValueOperand()
+  Args.push_back(ConstantInt::get(Int8Ty, UsedTypes[SI.getOperand(0)->getType()])); // SI.getValueOperand()
 
   // Create the call to the runtime check and place it before the store instruction.
-  Constant *F = M.getOrInsertFunction("trackStoreInst", Int32Ty, VoidPtrTy, Int32Ty, NULL);
+  Constant *F = M.getOrInsertFunction("trackStoreInst", VoidTy, VoidPtrTy, Int8Ty, NULL);
   CallInst::Create(F, Args.begin(), Args.end(), "", &SI);
 
   return true;

Modified: poolalloc/trunk/runtime/DynamicTypeChecks/TypeRuntime.c
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/runtime/DynamicTypeChecks/TypeRuntime.c?rev=128991&r1=128990&r2=128991&view=diff
==============================================================================
--- poolalloc/trunk/runtime/DynamicTypeChecks/TypeRuntime.c (original)
+++ poolalloc/trunk/runtime/DynamicTypeChecks/TypeRuntime.c Wed Apr  6 01:04:17 2011
@@ -3,18 +3,25 @@
 #include <stdio.h>
 #include <sys/mman.h>
 
-#define SIZE ((size_t)(sizeof(unsigned int)) * (size_t)(4294967296))
+#define DEBUG (0)
 
-unsigned int *shadow_begin;
+#define SIZE ((size_t)(4294967296))
+
+#if 0
+/* 2^47 bits */
+#define SIZE ((size_t)(140737488355328))
+#endif
+
+uint8_t *shadow_begin;
 
 /**
  * Initialize the shadow memory which records the 1:1 mapping of addresses to types.
  */
 void shadowInit() {
-	shadow_begin = (unsigned int *)mmap(0, SIZE, PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANON | MAP_NORESERVE, -1, 0);
+	shadow_begin = (uint8_t *)mmap(0, SIZE, PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANON | MAP_NORESERVE, -1, 0);
 
 	if (shadow_begin == MAP_FAILED) {
-		fprintf(stderr, "Failed to map the shadow memory!");
+		fprintf(stderr, "Failed to map the shadow memory!\n");
 		fflush(stderr);
 		assert(0 && "MAP_FAILED");
 	}
@@ -25,36 +32,36 @@
  */
 void shadowUnmap() {
 	if (munmap(shadow_begin, SIZE) == -1) {
-		fprintf(stderr, "Failed to unmap the shadow memory!");
+		fprintf(stderr, "Failed to unmap the shadow memory!\n");
 		fflush(stderr);
 	}
 }
 
 /**
  * Check the loaded type against the type recorded in the shadow memory.
- *
- * Note: currently does not handle GEPs.
  */
-int trackLoadInst(void *ptr, unsigned int typeNumber) {
+void trackLoadInst(void *ptr, uint8_t typeNumber) {
 	uintptr_t p = (uintptr_t)ptr;
 	p &= 0xFFFFFFFF;
-	printf("Load: %p, %p = %u | expecting %u\n", ptr, (void *)p, typeNumber, shadow_begin[p]);
 
-	return 0;
+	if (typeNumber != shadow_begin[p]) {
+		printf("Type mismatch: detecting %u, expecting %u!\n", typeNumber, shadow_begin[p]);
+	}
+
+#if DEBUG
+	printf("Load: %p, %p = %u | expecting %u\n", ptr, (void *)p, typeNumber, shadow_begin[p]);
+#endif
 }
 
 /**
  * Record the stored type and address in the shadow memory.
- *
- * Note: currently does not handle GEPs.
  */
-int trackStoreInst(void *ptr, unsigned int typeNumber) {
+void trackStoreInst(void *ptr, uint8_t typeNumber) {
 	uintptr_t p = (uintptr_t)ptr;
 	p &= 0xFFFFFFFF;
 	shadow_begin[p] = typeNumber;
-#if 0
+
+#if DEBUG
 	printf("Store: %p, %p = %u\n", ptr, (void *)p, typeNumber);
 #endif
-
-	return 0;
 }



From sabre at nondot.org  Wed Apr  6 01:29:51 2011
From: sabre at nondot.org (Chris Lattner)
Date: Wed, 06 Apr 2011 06:29:51 -0000
Subject: [llvm-commits] [llvm] r128992 - in /llvm/trunk/docs:
	CodeGenerator.html ReleaseNotes.html
Message-ID: <20110406062951.353332A6C12D@llvm.org>

Author: lattner
Date: Wed Apr  6 01:29:50 2011
New Revision: 128992

URL: http://llvm.org/viewvc/llvm-project?rev=128992&view=rev
Log:
Finish up the first draft of the release notes.

improvements are welcome, please commit any changes directly to SVN.


Modified:
    llvm/trunk/docs/CodeGenerator.html
    llvm/trunk/docs/ReleaseNotes.html

Modified: llvm/trunk/docs/CodeGenerator.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CodeGenerator.html?rev=128992&r1=128991&r2=128992&view=diff
==============================================================================
--- llvm/trunk/docs/CodeGenerator.html (original)
+++ llvm/trunk/docs/CodeGenerator.html Wed Apr  6 01:29:50 2011
@@ -2532,7 +2532,7 @@
 
 <div class="doc_text">
 
-<p>x86 has an experimental feature which provides
+<p>x86 has an feature which provides
    the ability to perform loads and stores to different address spaces
    via the x86 segment registers.  A segment override prefix byte on an
    instruction causes the instruction's memory access to go to the specified

Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=128992&r1=128991&r2=128992&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Wed Apr  6 01:29:50 2011
@@ -28,11 +28,13 @@
   <p>Written by the <a href="http://llvm.org">LLVM Team</a></p>
 </div>
 
+<!--
 <h1 style="color:red">These are in-progress notes for the upcoming LLVM 2.9
 release.<br>
 You may prefer the
 <a href="http://llvm.org/releases/2.8/docs/ReleaseNotes.html">LLVM 2.8
 Release Notes</a>.</h1>
+ -->
 
 <!-- *********************************************************************** -->
 <h1>
@@ -579,35 +581,34 @@
 it run faster:</p>
 
 <ul>
-<!-- SplitKit -->
-  
 <li>The pre-register-allocation (preRA) instruction scheduler models register
   pressure much more accurately in some cases. This allows the adoption of more
-    aggressive scheduling heuristics.
+  aggressive scheduling heuristics without causing spills to be generated.
 </li>
   
-  LiveDebugVariables is a new pass that keeps track of debugging information for
-  user variables that are kept in registers in optimized builds.
-  
-
-Scheduler now models operand latency and pipeline forwarding.
-  
-Major regalloc rewrite, not on by default for 2.9 and not advised to use it.
- * New basic register allocator that can be used as a safe fallback when
-   debugging. Enable with -regalloc=basic.
- * New infrastructure for live range splitting. SplitKit can break a live
-   interval into smaller pieces while preserving SSA form, and SpillPlacement
-   can help find the best split points. This is a work in progress so the API
-   is changing quickly.
- * The inline spiller has learned to clean up after live range splitting. It
-   can hoist spills out of loops, and it can eliminate redundant spills.
-   Rematerialization works with live range splitting.
- * New greedy register allocator using live range splitting. This will be the
-   default register allocator in the next LLVM release, but it is not turned on
-   by default in 2.9.
-
+<li>LiveDebugVariables is a new pass that keeps track of debugging information
+  for user variables that are promoted to registers in optimized builds.</li>  
 
+<li>The scheduler now models operand latency and pipeline forwarding.</li>
 
+<li>A major register allocator infrastructure rewrite is underway.  It is not on
+    by default for 2.9 and you are not advised to use it, but it has made
+    substantial progress in the 2.9 timeframe:
+  <ul>
+  <li>A new -regalloc=basic "basic" register allocator can be used as a simple
+      fallback when debugging.  It uses the new infrastructure.</li>
+  <li>New infrastructure is in place for live range splitting.  "SplitKit" can
+      break a live interval into smaller pieces while preserving SSA form, and
+      SpillPlacement can help find the best split points. This is a work in
+      progress so the API is changing quickly.</li>
+   <li>The inline spiller has learned to clean up after live range splitting. It
+      can hoist spills out of loops, and it can eliminate redundant spills.</li>
+   <li>Rematerialization works with live range splitting.</li>
+   <li>The new "greedy" register allocator using live range splitting. This will
+     be the default register allocator in the next LLVM release, but it is not
+     turned on by default in 2.9.</li>
+   </ul>
+</li>
 </ul>
 </div>
 
@@ -621,31 +622,31 @@
 </p>
 
 <ul>
-<li>
-X86: Reimplemented all of MMX to introduce a new LLVM IR x86_mmx type.  Now
-  random types like &lt;2 x i32&gt; are not iseld to mmx without emms.  The
-  -disable-mmx flag is gone now.
+<li>LLVM 2.9 includes a complete reimplementation of the MMX instruction set.
+  The reimplementation uses a new LLVM IR <a 
+  href="LangRef.html#t_x86mmx">x86_mmx</a> type to ensure that MMX operations
+  are <em>only</em> generated from source that uses MMX builtin operations. With
+  this, random types like &lt;2 x i32&gt; are not turned into to MMX operations
+  (which can be catastrophic without proper "emms" insertion).  Because the X86
+  code generator always generates reliable code, the -disable-mmx flag is now
+  removed.
 </li>
   
-  <li>
-X86 support for FS/GS relative loads and stores using address space 256/257 are
-  reliable now.
-  </li>
-  
-    <li>
-X86: Much better codegen for several cases using adc/sbb instead of cmovs for
-  conditional increment and other idioms.
-    </li>
-
-  <li>
-  The X86 backend has adopted a new preRA scheduling
-  mode, "list-ilp", to shorten the height of instruction schedules
-  without inducing register spills.
-  </li>
+<li>X86 support for FS/GS relative loads and stores using <a 
+    href="CodeGenerator.html#x86_memory">address space 256/257</a> work reliably
+    now.</li>
+  
+<li>LLVM 2.9 generates much better code in several cases by using adc/sbb to
+   avoid generation of conditional move instructions for conditional increment
+   and other idioms.</li>
+
+<li>The X86 backend has adopted a new preRA scheduling mode, "list-ilp", to
+  shorten the height of instruction schedules without inducing register spills.
+</li>
 
-  MC assembler support for 3dNow! and 3DNowA instructions.
+<li>The MC assembler support for 3dNow! and 3DNowA instructions.</li>
   
-  <li>Several bugs have been fixed for Windows x64 code generator.</li>
+<li>Several bugs have been fixed for Windows x64 code generator.</li>
 </ul>
 
 </div>
@@ -660,17 +661,17 @@
 </p>
 
 <ul>
-<li>ARM Fast ISel</li>
-<li>ARM: New code placement pass.</li>
-<li>ARM: Improved code generation for Cortex-A8 and Cortex-A9 CPUs.</li>
-<li>ARM: __builtin_prefetch turns into prefetch instructions.</li>
-<li>Countless ARM microoptimizations.</li>
+<li>The ARM backend now has a fast instruction selector, which dramatically
+     improves -O0 compile times.</li>
+<li>The ARM backend has new tuning for Cortex-A8 and Cortex-A9 CPUs.</li>
+<li>The __builtin_prefetch builtin (and llvm.prefetch intrinsic) is compiled
+    into prefetch instructions instead of being discarded.</li>
 
 <li>  The ARM backend preRA scheduler now models machine resources at cycle
   granularity. This allows the scheduler to both accurately model
   instruction latency and avoid overcommitting functional units.</li>
 
-
+<li>Countless ARM microoptimizations have landed in LLVM 2.9.</li>
 </ul>
 </div>
   
@@ -681,15 +682,16 @@
 
 <div class="doc_text">
 <ul>
-  PPC: Switched to MCInstPrinter, and MCCodeEmitter.  Ready to implement support
-  for directly writing out mach-o object files, but noone seems interested.
-  
-  MicroBlaze: major updates for aggressive delay slot filler, MC-based assembly
-  printing, assembly instruction parsing, ELF .o file emission, and MC
-  instruction disassembler.
-  
-  SPARC: Many improvements, including using the Y registers for multiplications
-  and addition of a simple delay slot filler.
+<li>MicroBlaze: major updates for aggressive delay slot filler, MC-based
+  assembly printing, assembly instruction parsing, ELF .o file emission, and MC
+  instruction disassembler have landed.</li>
+
+<li>SPARC: Many improvements, including using the Y registers for
+  multiplications and addition of a simple delay slot filler.</li>
+
+<li>PowerPC: The backend has been largely MC'ized and is ready to support
+  directly writing out mach-o object files.  Noone seems interested in finishing
+  this final step though.</li>
   
 </ul>
 </div>
@@ -706,48 +708,26 @@
 from the previous release.</p>
 
 <ul>
-  last release for llvm-gcc
+<li><b>This is the last release to support the llvm-gcc frontend.</b></li>
 
-  <li>
-    New naming rules in coding standards: CodingStandards.html#ll_naming
-  </li>
+<li>LLVM has a new <a href="CodingStandards.html#ll_naming">naming
+  convention standard</a>, though the codebase hasn't fully adopted it yet.</li>
   
+<li>The new DIBuilder class provides a simpler interface for front ends to
+    encode debug info in LLVM IR, and has replaced DIFactory.</li>
 
-  
-- DIBuilder provides simpler interface for front ends like Clang to encode debug info in LLVM IR.
-  - This interface hides implementation details (e.g. DIDerivedType, existence of compile unit etc..) that any front end should not know about.
-  For example, DIFactory DebugFactory;
-  Ty = DebugFactory.CreateDerivedType(DW_TAG_volatile_type,
-  findRegion(TYPE_CONTEXT(type)),
-  StringRef(),
-  getOrCreateFile(main_input_filename),
-  0 /*line no*/,
-  NodeSizeInBits(type),
-  NodeAlignInBits(type),
-  0 /*offset */,
-  0 /* flags */,
-  MainTy);
-  can be replaced by
-  DbgTy = DBuilder.createQualifiedType(DW_TAG_volatile_type, MainTy); 
-DIFactory is gone now.
-  
-    
+<li>LLVM IR and other tools always work on normalized target triples (which have
+  been run through <tt>Triple::normalize</tt>).</li>
 
+<li>The target triple x86_64--mingw64 is obsoleted. Use x86_64--mingw32 
+  instead.</li>
 
-
-  
-  LoopIndexSplit pass was removed, unmaintained.
-  LiveValues, SimplifyHalfPowrLibCalls, and GEPSplitter were removed.
-  Removed the PartialSpecialization pass, it was unmaintained and buggy.
-  
-  DIFactory removed, use DIBuilder instead.
-  
-  Triple::normalize is new, llvm triples are always stored in normalized form internally.
-  
-  Triple x86_64--mingw64 is obsoleted. Use x86_64--mingw32 instead.
-
-  PointerTracking has been removed from mainline, moved to ClamAV.
-
+<li>The PointerTracking pass has been removed from mainline, and moved to The
+  ClamAV project (its only client).</li>
+    
+<li>The LoopIndexSplit, LiveValues, SimplifyHalfPowrLibCalls, GEPSplitter, and
+  PartialSpecialization passes were removed.  They were unmaintained,
+  buggy, or decided to be a bad idea.</li>
 </ul>
 
 </div>
@@ -763,27 +743,18 @@
   LLVM API changes are:</p>
 
 <ul>
-  
-  include/llvm/System merged into include/llvm/Support.
-  
-  
-  APInt API changes, see PR5207.
-  
-  MVT::Flag renamed to MVT::Glue
-  
-  
-  error_code + libsystem + PathV2 changes
-  The system_error header from C++0x was added.
-  * Use if (error_code ec = function()) to check for error conditions
-  from functions which return it.
-  * error_code::message returns a human readable description of the error.
-  
-  PathV1 has been deprecated in favor of PathV2 (sorry I didn't finish
-  this before the release).
-  * No Path class, use a r-value convertible to a twine instead.
-  * Assumes all paths are UTF-8.
-  
+<li>include/llvm/System merged into include/llvm/Support.</li>
+<li>The <a href="http://llvm.org/PR5207">llvm::APInt API</a> was significantly
+  cleaned up.</li>
+
+<li>In the code generator, MVT::Flag was renamed to MVT::Glue to more accurately
+  describe its behavior.</li>
 
+<li>The system_error header from C++0x was added, and is now pervasively used to
+  capture and handle i/o and other errors in LLVM.</li>
+  
+<li>The old sys::Path API has been deprecated in favor of the new PathV2 API,
+    which is more efficient and flexible.</li>
 </ul>
 </div>
 
@@ -820,7 +791,7 @@
 <li>The Alpha, Blackfin, CellSPU, MicroBlaze, MSP430, MIPS, PTX, SystemZ
     and XCore backends are experimental.</li>
 <li><tt>llc</tt> "<tt>-filetype=obj</tt>" is experimental on all targets
-    other than darwin-i386 and darwin-x86_64. FIXME: Not true on ELF anymore?</li>
+    other than darwin and ELF X86 systems.</li>
     
 </ul>
 
@@ -962,6 +933,8 @@
 
 <div class="doc_text">
 
+<p><b>LLVM 2.9 will be the last release of llvm-gcc.</b></p>
+
 <p>llvm-gcc is generally very stable for the C family of languages.  The only
    major language feature of GCC not supported by llvm-gcc is the
    <tt>__builtin_apply</tt> family of builtins.   However, some extensions



From clattner at apple.com  Wed Apr  6 01:35:53 2011
From: clattner at apple.com (Chris Lattner)
Date: Tue, 05 Apr 2011 23:35:53 -0700
Subject: [llvm-commits] [llvm] r128988 - in /llvm/trunk:
 include/llvm/Support/DebugLoc.h lib/VMCore/DebugLoc.cpp
In-Reply-To: <20110406053652.3B9BC2A6C12D@llvm.org>
References: <20110406053652.3B9BC2A6C12D@llvm.org>
Message-ID: <D9C2B620-6EF2-4A9A-979F-C1E7AD4D1EEE@apple.com>


On Apr 5, 2011, at 10:36 PM, Nick Lewycky wrote:

> Author: nicholas
> Date: Wed Apr  6 00:36:52 2011
> New Revision: 128988
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=128988&view=rev
> Log:
> Support using DebugLoc's in a DenseMap.

One other issue: DebugLoc() is a valid DebugLoc, but given your formulation, you can't store one in the densemap.  It might be best to change the representation of the empty key to -2.

-Chris

> 
> Modified:
>    llvm/trunk/include/llvm/Support/DebugLoc.h
>    llvm/trunk/lib/VMCore/DebugLoc.cpp
> 
> Modified: llvm/trunk/include/llvm/Support/DebugLoc.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/DebugLoc.h?rev=128988&r1=128987&r2=128988&view=diff
> ==============================================================================
> --- llvm/trunk/include/llvm/Support/DebugLoc.h (original)
> +++ llvm/trunk/include/llvm/Support/DebugLoc.h Wed Apr  6 00:36:52 2011
> @@ -15,6 +15,8 @@
> #ifndef LLVM_SUPPORT_DEBUGLOC_H
> #define LLVM_SUPPORT_DEBUGLOC_H
> 
> +#include "llvm/ADT/DenseMapInfo.h"
> +
> namespace llvm {
>   class MDNode;
>   class LLVMContext;
> @@ -23,6 +25,16 @@
>   /// and MachineInstr to compactly encode file/line/scope information for an
>   /// operation.
>   class DebugLoc {
> +    friend struct DenseMapInfo<DebugLoc>;
> +
> +    /// getTombstoneKey() - A private constructor that returns an unknown that
> +    /// is distinguishable from the usual one.
> +    static DebugLoc getTombstoneKey() {
> +      DebugLoc DL;
> +      DL.LineCol = -1;
> +      return DL;
> +    }
> +
>     /// LineCol - This 32-bit value encodes the line and column number for the
>     /// location, encoded as 24-bits for line and 8 bits for col.  A value of 0
>     /// for either means unknown.
> @@ -75,6 +87,14 @@
>     }
>     bool operator!=(const DebugLoc &DL) const { return !(*this == DL); }
>   };
> +
> +  template <>
> +  struct DenseMapInfo<DebugLoc> {
> +    static DebugLoc getEmptyKey();
> +    static DebugLoc getTombstoneKey();
> +    static unsigned getHashValue(const DebugLoc &Key);
> +    static bool isEqual(const DebugLoc &LHS, const DebugLoc &RHS);
> +  };
> } // end namespace llvm
> 
> #endif /* LLVM_DEBUGLOC_H */
> 
> Modified: llvm/trunk/lib/VMCore/DebugLoc.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/DebugLoc.cpp?rev=128988&r1=128987&r2=128988&view=diff
> ==============================================================================
> --- llvm/trunk/lib/VMCore/DebugLoc.cpp (original)
> +++ llvm/trunk/lib/VMCore/DebugLoc.cpp Wed Apr  6 00:36:52 2011
> @@ -8,6 +8,7 @@
> //===----------------------------------------------------------------------===//
> 
> #include "llvm/Support/DebugLoc.h"
> +#include "llvm/ADT/DenseMapInfo.h"
> #include "LLVMContextImpl.h"
> using namespace llvm;
> 
> @@ -128,6 +129,29 @@
> }
> 
> //===----------------------------------------------------------------------===//
> +// DenseMap specialization
> +//===----------------------------------------------------------------------===//
> +
> +DebugLoc DenseMapInfo<DebugLoc>::getEmptyKey() {
> +  return DebugLoc();
> +}
> +
> +DebugLoc DenseMapInfo<DebugLoc>::getTombstoneKey() {
> +  return DebugLoc::getTombstoneKey();
> +}
> +
> +unsigned DenseMapInfo<DebugLoc>::getHashValue(const DebugLoc &Key) {
> +  FoldingSetNodeID ID;
> +  ID.AddInteger(Key.LineCol);
> +  ID.AddInteger(Key.ScopeIdx);
> +  return ID.ComputeHash();
> +}
> +
> +bool DenseMapInfo<DebugLoc>::isEqual(const DebugLoc &LHS, const DebugLoc &RHS) {
> +  return LHS == RHS;
> +}
> +
> +//===----------------------------------------------------------------------===//
> // LLVMContextImpl Implementation
> //===----------------------------------------------------------------------===//
> 
> 
> 
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits


From nicholas at mxc.ca  Wed Apr  6 01:49:59 2011
From: nicholas at mxc.ca (Nick Lewycky)
Date: Wed, 06 Apr 2011 06:49:59 -0000
Subject: [llvm-commits] [llvm] r128994 - in /llvm/trunk:
 include/llvm/Support/DebugLoc.h lib/VMCore/DebugLoc.cpp
Message-ID: <20110406064959.952312A6C12D@llvm.org>

Author: nicholas
Date: Wed Apr  6 01:49:59 2011
New Revision: 128994

URL: http://llvm.org/viewvc/llvm-project?rev=128994&view=rev
Log:
Add an empty key for DebugLoc so that you can store an empty DebugLoc in a
DenseMap.

Modified:
    llvm/trunk/include/llvm/Support/DebugLoc.h
    llvm/trunk/lib/VMCore/DebugLoc.cpp

Modified: llvm/trunk/include/llvm/Support/DebugLoc.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/DebugLoc.h?rev=128994&r1=128993&r2=128994&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/DebugLoc.h (original)
+++ llvm/trunk/include/llvm/Support/DebugLoc.h Wed Apr  6 01:49:59 2011
@@ -27,11 +27,19 @@
   class DebugLoc {
     friend struct DenseMapInfo<DebugLoc>;
 
+    /// getEmptyKey() - A private constructor that returns an unknown that is
+    /// not equal to the tombstone key or DebugLoc().
+    static DebugLoc getEmptyKey() {
+      DebugLoc DL;
+      DL.LineCol = -1;
+      return DL;
+    }
+
     /// getTombstoneKey() - A private constructor that returns an unknown that
-    /// is distinguishable from the usual one.
+    /// is not equal to the empty key or DebugLoc().
     static DebugLoc getTombstoneKey() {
       DebugLoc DL;
-      DL.LineCol = -1;
+      DL.LineCol = -2;
       return DL;
     }
 

Modified: llvm/trunk/lib/VMCore/DebugLoc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/DebugLoc.cpp?rev=128994&r1=128993&r2=128994&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/DebugLoc.cpp (original)
+++ llvm/trunk/lib/VMCore/DebugLoc.cpp Wed Apr  6 01:49:59 2011
@@ -133,7 +133,7 @@
 //===----------------------------------------------------------------------===//
 
 DebugLoc DenseMapInfo<DebugLoc>::getEmptyKey() {
-  return DebugLoc();
+  return DebugLoc::getEmptyKey();
 }
 
 DebugLoc DenseMapInfo<DebugLoc>::getTombstoneKey() {



From nicholas at mxc.ca  Wed Apr  6 01:54:25 2011
From: nicholas at mxc.ca (Nick Lewycky)
Date: Tue, 05 Apr 2011 23:54:25 -0700
Subject: [llvm-commits] [llvm] r128988 - in /llvm/trunk:
 include/llvm/Support/DebugLoc.h lib/VMCore/DebugLoc.cpp
In-Reply-To: <D9C2B620-6EF2-4A9A-979F-C1E7AD4D1EEE@apple.com>
References: <20110406053652.3B9BC2A6C12D@llvm.org>
	<D9C2B620-6EF2-4A9A-979F-C1E7AD4D1EEE@apple.com>
Message-ID: <4D9C0E21.2070906@mxc.ca>

Chris Lattner wrote:
>
> On Apr 5, 2011, at 10:36 PM, Nick Lewycky wrote:
>
>> Author: nicholas
>> Date: Wed Apr  6 00:36:52 2011
>> New Revision: 128988
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=128988&view=rev
>> Log:
>> Support using DebugLoc's in a DenseMap.
>
> One other issue: DebugLoc() is a valid DebugLoc, but given your formulation, you can't store one in the densemap.  It might be best to change the representation of the empty key to -2.

Oh right. Thanks!

> -Chris
>
>>
>> Modified:
>>     llvm/trunk/include/llvm/Support/DebugLoc.h
>>     llvm/trunk/lib/VMCore/DebugLoc.cpp
>>
>> Modified: llvm/trunk/include/llvm/Support/DebugLoc.h
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/DebugLoc.h?rev=128988&r1=128987&r2=128988&view=diff
>> ==============================================================================
>> --- llvm/trunk/include/llvm/Support/DebugLoc.h (original)
>> +++ llvm/trunk/include/llvm/Support/DebugLoc.h Wed Apr  6 00:36:52 2011
>> @@ -15,6 +15,8 @@
>> #ifndef LLVM_SUPPORT_DEBUGLOC_H
>> #define LLVM_SUPPORT_DEBUGLOC_H
>>
>> +#include "llvm/ADT/DenseMapInfo.h"
>> +
>> namespace llvm {
>>    class MDNode;
>>    class LLVMContext;
>> @@ -23,6 +25,16 @@
>>    /// and MachineInstr to compactly encode file/line/scope information for an
>>    /// operation.
>>    class DebugLoc {
>> +    friend struct DenseMapInfo<DebugLoc>;
>> +
>> +    /// getTombstoneKey() - A private constructor that returns an unknown that
>> +    /// is distinguishable from the usual one.
>> +    static DebugLoc getTombstoneKey() {
>> +      DebugLoc DL;
>> +      DL.LineCol = -1;
>> +      return DL;
>> +    }
>> +
>>      /// LineCol - This 32-bit value encodes the line and column number for the
>>      /// location, encoded as 24-bits for line and 8 bits for col.  A value of 0
>>      /// for either means unknown.
>> @@ -75,6 +87,14 @@
>>      }
>>      bool operator!=(const DebugLoc&DL) const { return !(*this == DL); }
>>    };
>> +
>> +  template<>
>> +  struct DenseMapInfo<DebugLoc>  {
>> +    static DebugLoc getEmptyKey();
>> +    static DebugLoc getTombstoneKey();
>> +    static unsigned getHashValue(const DebugLoc&Key);
>> +    static bool isEqual(const DebugLoc&LHS, const DebugLoc&RHS);
>> +  };
>> } // end namespace llvm
>>
>> #endif /* LLVM_DEBUGLOC_H */
>>
>> Modified: llvm/trunk/lib/VMCore/DebugLoc.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/DebugLoc.cpp?rev=128988&r1=128987&r2=128988&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/VMCore/DebugLoc.cpp (original)
>> +++ llvm/trunk/lib/VMCore/DebugLoc.cpp Wed Apr  6 00:36:52 2011
>> @@ -8,6 +8,7 @@
>> //===----------------------------------------------------------------------===//
>>
>> #include "llvm/Support/DebugLoc.h"
>> +#include "llvm/ADT/DenseMapInfo.h"
>> #include "LLVMContextImpl.h"
>> using namespace llvm;
>>
>> @@ -128,6 +129,29 @@
>> }
>>
>> //===----------------------------------------------------------------------===//
>> +// DenseMap specialization
>> +//===----------------------------------------------------------------------===//
>> +
>> +DebugLoc DenseMapInfo<DebugLoc>::getEmptyKey() {
>> +  return DebugLoc();
>> +}
>> +
>> +DebugLoc DenseMapInfo<DebugLoc>::getTombstoneKey() {
>> +  return DebugLoc::getTombstoneKey();
>> +}
>> +
>> +unsigned DenseMapInfo<DebugLoc>::getHashValue(const DebugLoc&Key) {
>> +  FoldingSetNodeID ID;
>> +  ID.AddInteger(Key.LineCol);
>> +  ID.AddInteger(Key.ScopeIdx);
>> +  return ID.ComputeHash();
>> +}
>> +
>> +bool DenseMapInfo<DebugLoc>::isEqual(const DebugLoc&LHS, const DebugLoc&RHS) {
>> +  return LHS == RHS;
>> +}
>> +
>> +//===----------------------------------------------------------------------===//
>> // LLVMContextImpl Implementation
>> //===----------------------------------------------------------------------===//
>>
>>
>>
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
>


From baldrick at free.fr  Wed Apr  6 02:37:39 2011
From: baldrick at free.fr (Duncan Sands)
Date: Wed, 06 Apr 2011 07:37:39 -0000
Subject: [llvm-commits] [dragonegg] r128995 - /dragonegg/trunk/Convert.cpp
Message-ID: <20110406073739.D4B1E2A6C12E@llvm.org>

Author: baldrick
Date: Wed Apr  6 02:37:39 2011
New Revision: 128995

URL: http://llvm.org/viewvc/llvm-project?rev=128995&view=rev
Log:
Formatting.

Modified:
    dragonegg/trunk/Convert.cpp

Modified: dragonegg/trunk/Convert.cpp
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/Convert.cpp?rev=128995&r1=128994&r2=128995&view=diff
==============================================================================
--- dragonegg/trunk/Convert.cpp (original)
+++ dragonegg/trunk/Convert.cpp Wed Apr  6 02:37:39 2011
@@ -2877,7 +2877,7 @@
   PFTy = cast<PointerType>(Callee->getType());
   FTy = cast<FunctionType>(PFTy->getElementType());
   if (CallOperands.size() < FTy->getNumParams())
-    for (unsigned i = CallOperands.size(), e = FTy->getNumParams(); i !=e; ++i)
+    for (unsigned i = CallOperands.size(), e = FTy->getNumParams(); i != e; ++i)
       CallOperands.push_back(UndefValue::get(FTy->getParamType(i)));
 
   Value *Call;



From jay.foad at gmail.com  Wed Apr  6 02:55:30 2011
From: jay.foad at gmail.com (Jay Foad)
Date: Wed, 06 Apr 2011 07:55:30 -0000
Subject: [llvm-commits] [llvm] r128996 - in /llvm/trunk/docs:
	CodeGenerator.html ReleaseNotes.html
Message-ID: <20110406075530.AD7DD2A6C12E@llvm.org>

Author: foad
Date: Wed Apr  6 02:55:30 2011
New Revision: 128996

URL: http://llvm.org/viewvc/llvm-project?rev=128996&view=rev
Log:
Trivial typo fixes.

Modified:
    llvm/trunk/docs/CodeGenerator.html
    llvm/trunk/docs/ReleaseNotes.html

Modified: llvm/trunk/docs/CodeGenerator.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CodeGenerator.html?rev=128996&r1=128995&r2=128996&view=diff
==============================================================================
--- llvm/trunk/docs/CodeGenerator.html (original)
+++ llvm/trunk/docs/CodeGenerator.html Wed Apr  6 02:55:30 2011
@@ -2532,7 +2532,7 @@
 
 <div class="doc_text">
 
-<p>x86 has an feature which provides
+<p>x86 has a feature which provides
    the ability to perform loads and stores to different address spaces
    via the x86 segment registers.  A segment override prefix byte on an
    instruction causes the instruction's memory access to go to the specified

Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=128996&r1=128995&r2=128996&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Wed Apr  6 02:55:30 2011
@@ -633,7 +633,7 @@
 </li>
   
 <li>X86 support for FS/GS relative loads and stores using <a 
-    href="CodeGenerator.html#x86_memory">address space 256/257</a> work reliably
+    href="CodeGenerator.html#x86_memory">address space 256/257</a> works reliably
     now.</li>
   
 <li>LLVM 2.9 generates much better code in several cases by using adc/sbb to
@@ -644,7 +644,7 @@
   shorten the height of instruction schedules without inducing register spills.
 </li>
 
-<li>The MC assembler support for 3dNow! and 3DNowA instructions.</li>
+<li>The MC assembler supports 3dNow! and 3DNowA instructions.</li>
   
 <li>Several bugs have been fixed for Windows x64 code generator.</li>
 </ul>



From baldrick at free.fr  Wed Apr  6 03:07:40 2011
From: baldrick at free.fr (Duncan Sands)
Date: Wed, 06 Apr 2011 08:07:40 -0000
Subject: [llvm-commits] [llvm] r128997 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <20110406080740.8D1792A6C12E@llvm.org>

Author: baldrick
Date: Wed Apr  6 03:07:40 2011
New Revision: 128997

URL: http://llvm.org/viewvc/llvm-project?rev=128997&view=rev
Log:
Fix some typos.  Minor tweaks to how some things were expressed.

Modified:
    llvm/trunk/docs/ReleaseNotes.html

Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=128997&r1=128996&r2=128997&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Wed Apr  6 03:07:40 2011
@@ -114,10 +114,9 @@
 also brought in a large range of bug fixes and minor features (e.g. __label__
 support), and is much more compatible with the Linux Kernel.</p>  
   
-<p>If Clang rejects your code that is built with another compiler, please take a
+<p>If Clang rejects your code but another compiler accepts it, please take a
 look at the <a href="http://clang.llvm.org/compatibility.html">language
-compatibility</a> guide to make sure the issue isn't intentional or a known
-issue.
+compatibility</a> guide to make sure this is not intentional or a known issue.
 </p>
 
 <ul>
@@ -626,7 +625,7 @@
   The reimplementation uses a new LLVM IR <a 
   href="LangRef.html#t_x86mmx">x86_mmx</a> type to ensure that MMX operations
   are <em>only</em> generated from source that uses MMX builtin operations. With
-  this, random types like &lt;2 x i32&gt; are not turned into to MMX operations
+  this, random types like &lt;2 x i32&gt; are not turned into MMX operations
   (which can be catastrophic without proper "emms" insertion).  Because the X86
   code generator always generates reliable code, the -disable-mmx flag is now
   removed.
@@ -690,7 +689,7 @@
   multiplications and addition of a simple delay slot filler.</li>
 
 <li>PowerPC: The backend has been largely MC'ized and is ready to support
-  directly writing out mach-o object files.  Noone seems interested in finishing
+  directly writing out mach-o object files.  No one seems interested in finishing
   this final step though.</li>
   
 </ul>
@@ -727,7 +726,7 @@
     
 <li>The LoopIndexSplit, LiveValues, SimplifyHalfPowrLibCalls, GEPSplitter, and
   PartialSpecialization passes were removed.  They were unmaintained,
-  buggy, or decided to be a bad idea.</li>
+  buggy, or deemed to be a bad idea.</li>
 </ul>
 
 </div>



From nadav.rotem at intel.com  Wed Apr  6 06:18:29 2011
From: nadav.rotem at intel.com (Nadav Rotem)
Date: Wed, 06 Apr 2011 11:18:29 -0000
Subject: [llvm-commits] [llvm] r128999 -
	/llvm/trunk/test/Transforms/InstCombine/gep-addrspace.ll
Message-ID: <20110406111829.60DD62A6C12D@llvm.org>

Author: nadav
Date: Wed Apr  6 06:18:29 2011
New Revision: 128999

URL: http://llvm.org/viewvc/llvm-project?rev=128999&view=rev
Log:
This testcase passed even without the fix. Added the target info to make the
test fail (without the fix). Thanks Dan.


Modified:
    llvm/trunk/test/Transforms/InstCombine/gep-addrspace.ll

Modified: llvm/trunk/test/Transforms/InstCombine/gep-addrspace.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/gep-addrspace.ll?rev=128999&r1=128998&r2=128999&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/gep-addrspace.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/gep-addrspace.ll Wed Apr  6 06:18:29 2011
@@ -1,5 +1,8 @@
 ; RUN: opt < %s -instcombine -S
 
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
+target triple = "x86_64-pc-win32"
+
 %myStruct = type { float, [3 x float], [4 x float], i32 }
 
 ; make sure that we are not crashing when creating an illegal type



From fvbommel at gmail.com  Wed Apr  6 07:29:56 2011
From: fvbommel at gmail.com (Frits van Bommel)
Date: Wed, 06 Apr 2011 12:29:56 -0000
Subject: [llvm-commits] [llvm] r129002 -
	/llvm/trunk/lib/Support/CommandLine.cpp
Message-ID: <20110406122956.C85EF2A6C12D@llvm.org>

Author: fvbommel
Date: Wed Apr  6 07:29:56 2011
New Revision: 129002

URL: http://llvm.org/viewvc/llvm-project?rev=129002&view=rev
Log:
Fix a few instances of "warning: extra ';' outside of a function [-pedantic]".

Modified:
    llvm/trunk/lib/Support/CommandLine.cpp

Modified: llvm/trunk/lib/Support/CommandLine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/CommandLine.cpp?rev=129002&r1=129001&r2=129002&view=diff
==============================================================================
--- llvm/trunk/lib/Support/CommandLine.cpp (original)
+++ llvm/trunk/lib/Support/CommandLine.cpp Wed Apr  6 07:29:56 2011
@@ -1140,13 +1140,13 @@
     outs() << ")\n";                                                    \
   }                                                                     \
 
-PRINT_OPT_DIFF(bool);
-PRINT_OPT_DIFF(boolOrDefault);
-PRINT_OPT_DIFF(int);
-PRINT_OPT_DIFF(unsigned);
-PRINT_OPT_DIFF(double);
-PRINT_OPT_DIFF(float);
-PRINT_OPT_DIFF(char);
+PRINT_OPT_DIFF(bool)
+PRINT_OPT_DIFF(boolOrDefault)
+PRINT_OPT_DIFF(int)
+PRINT_OPT_DIFF(unsigned)
+PRINT_OPT_DIFF(double)
+PRINT_OPT_DIFF(float)
+PRINT_OPT_DIFF(char)
 
 void parser<std::string>::
 printOptionDiff(const Option &O, StringRef V, OptionValue<std::string> D,



From baldrick at free.fr  Wed Apr  6 10:26:34 2011
From: baldrick at free.fr (Duncan Sands)
Date: Wed, 06 Apr 2011 15:26:34 -0000
Subject: [llvm-commits] [dragonegg] r129003 - /dragonegg/trunk/Convert.cpp
Message-ID: <20110406152634.C1DEA2A6C12D@llvm.org>

Author: baldrick
Date: Wed Apr  6 10:26:34 2011
New Revision: 129003

URL: http://llvm.org/viewvc/llvm-project?rev=129003&view=rev
Log:
Elimination of old style multiple return value support broke the case of
returning an empty struct (previously it was possible to return void in
this case).

Modified:
    dragonegg/trunk/Convert.cpp

Modified: dragonegg/trunk/Convert.cpp
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/Convert.cpp?rev=129003&r1=129002&r2=129003&view=diff
==============================================================================
--- dragonegg/trunk/Convert.cpp (original)
+++ dragonegg/trunk/Convert.cpp Wed Apr  6 10:26:34 2011
@@ -943,6 +943,9 @@
           Value *E = Builder.CreateLoad(GEP, "mrv");
           RetVals.push_back(E);
         }
+        // If the return type specifies an empty struct then return one.
+        if (RetVals.empty())
+          RetVals.push_back(UndefValue::get(Fn->getReturnType()));
       } else {
         // Otherwise, this aggregate result must be something that is returned
         // in a scalar register for this target.  We must bit convert the



From mttjwl at gmail.com  Wed Apr  6 11:06:59 2011
From: mttjwl at gmail.com (Matthew Wala)
Date: Wed, 06 Apr 2011 16:06:59 -0000
Subject: [llvm-commits] [poolalloc] r129005 - in /poolalloc/trunk:
 include/poolalloc/PoolAllocate.h lib/PoolAllocate/PASimple.cpp
 lib/PoolAllocate/PoolAllocate.cpp
 lib/PoolAllocate/TransformFunctionBody.cpp
Message-ID: <20110406160659.A951B2A6C12D@llvm.org>

Author: wala1
Date: Wed Apr  6 11:06:59 2011
New Revision: 129005

URL: http://llvm.org/viewvc/llvm-project?rev=129005&view=rev
Log:
Added CStdLib function argument count information to PoolAllocate.
This consolidates previously redundant pool allocation code.


Modified:
    poolalloc/trunk/include/poolalloc/PoolAllocate.h
    poolalloc/trunk/lib/PoolAllocate/PASimple.cpp
    poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp
    poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp

Modified: poolalloc/trunk/include/poolalloc/PoolAllocate.h
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/poolalloc/PoolAllocate.h?rev=129005&r1=129004&r2=129005&view=diff
==============================================================================
--- poolalloc/trunk/include/poolalloc/PoolAllocate.h (original)
+++ poolalloc/trunk/include/poolalloc/PoolAllocate.h Wed Apr  6 11:06:59 2011
@@ -27,6 +27,7 @@
 #include "llvm/ADT/VectorExtras.h"
 #include "llvm/ADT/DenseMap.h"
 #include "llvm/ADT/DenseSet.h"
+#include "llvm/ADT/StringMap.h"
 #include "llvm/Support/CommandLine.h"
 
 #include "dsa/DataStructure.h"
@@ -208,6 +209,10 @@
   
   // Map a cloned function to its original function
   std::map<const Function*, Function*> CloneToOrigMap;
+
+  // Map a CStdLib function name to its pool argument count.
+  StringMap<unsigned> CStdLibPoolArgs;
+
 public:
 
   Constant *PoolInit, *PoolDestroy, *PoolAlloc, *PoolRealloc, *PoolMemAlign, *PoolThreadWrapper;
@@ -242,6 +247,8 @@
 		  SAFECodeEnabled = SAFECode |  PA::PA_SAFECODE;
 		  lie_preserve_passes = SAFECodeEnabled ? LIE_PRESERVE_ALL : LIE_PRESERVE_DSA;
 		  dsa_pass_to_use = SAFECodeEnabled ? PASS_EQTD : PASS_BUEQ;
+
+      InitializeCStdLibPoolArgs();
       }
 
   /*TODO: finish removing the SAFECode flag*/
@@ -264,6 +271,8 @@
   			  dsa_pass_to_use = SAFECodeEnabled ? PASS_EQTD : PASS_BUEQ;
   		  else
   			  dsa_pass_to_use = dsa_pass_to_use_;
+
+        InitializeCStdLibPoolArgs();
         }
 
   virtual bool runOnModule(Module &M);
@@ -417,6 +426,9 @@
       return I->second;
   }
 
+  // Get the initial pool argument count for a CStdLib function.
+  unsigned getCStdLibPoolArguments(StringRef funcname);
+
 protected:
   
   /// AddPoolPrototypes - Add prototypes for the pool functions to the
@@ -427,6 +439,9 @@
 
  private:
 
+  /// Initialiaze the pool argument counts.
+  void InitializeCStdLibPoolArgs();
+
   /// MicroOptimizePoolCalls - Apply any microoptimizations to calls to pool
   /// allocation function calls that we can.
   void MicroOptimizePoolCalls();

Modified: poolalloc/trunk/lib/PoolAllocate/PASimple.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/PoolAllocate/PASimple.cpp?rev=129005&r1=129004&r2=129005&view=diff
==============================================================================
--- poolalloc/trunk/lib/PoolAllocate/PASimple.cpp (original)
+++ poolalloc/trunk/lib/PoolAllocate/PASimple.cpp Wed Apr  6 11:06:59 2011
@@ -103,21 +103,6 @@
     return 1;
   }
   
-  // CStdLib functions
-
-  else if ( ( funcname == "pool_strlen"  ) ||
-            ( funcname == "pool_strchr"  ) ||
-            ( funcname == "pool_strrchr" ) ) {
-    return 1;
-  }
-  else if ( ( funcname == "pool_strcpy"  ) ||
-            ( funcname == "pool_strncat" ) ||
-            ( funcname == "pool_strcat"  ) ||
-            ( funcname == "pool_strstr"  ) ||
-            ( funcname == "pool_strpbrk" ) ) {
-    return 2;
-  }
-
   return 0;
 }
 
@@ -466,12 +451,13 @@
         // pool.
         //
         if (CF) {
-          if (unsigned count = initialPoolArguments (CF->getName())) {
+          unsigned count;
+          if ((count = initialPoolArguments(CF->getName())) || \
+                (count = getCStdLibPoolArguments(CF->getName()))) {
             Type * VoidPtrTy = PointerType::getUnqual(Int8Type);
             Value * Pool = castTo (TheGlobalPool, VoidPtrTy, "pool", ii);
-            for (unsigned index = 1; index <= count; index++ ) {
+            for (unsigned index = 1; index <= count; index++ )
               CI->setOperand (index, Pool);
-            }
           }
         }
       }

Modified: poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp?rev=129005&r1=129004&r2=129005&view=diff
==============================================================================
--- poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp (original)
+++ poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp Wed Apr  6 11:06:59 2011
@@ -1563,3 +1563,31 @@
   }
 }
 
+// Builds the StringMap that holds information about the pool
+// argument counts of C standard library functions.
+void PoolAllocate::InitializeCStdLibPoolArgs()
+{
+  CStdLibPoolArgs.GetOrCreateValue("pool_strcpy",   2);
+  CStdLibPoolArgs.GetOrCreateValue("pool_strlen",   1);
+  CStdLibPoolArgs.GetOrCreateValue("pool_strchr",   1);
+  CStdLibPoolArgs.GetOrCreateValue("pool_strrchr",  1);
+  CStdLibPoolArgs.GetOrCreateValue("pool_strcat",   2);
+  CStdLibPoolArgs.GetOrCreateValue("pool_strncat",  2);
+  CStdLibPoolArgs.GetOrCreateValue("pool_strstr",   2);
+  CStdLibPoolArgs.GetOrCreateValue("pool_strpbrk",  2);
+  //CStdLibPoolArgs.GetOrCreateValue("pool_strtok",   2);
+  //CStdLibPoolArgs.GetOrCreateValue("pool_strtok_r", 2);
+  //CStdLibPoolArgs.GetOrCreateValue("pool_strspn",   2);
+  //CStdLibPoolArgs.GetOrCreateValue("pool_strcspn",  2);
+}
+
+// Return the number of initial pool arguments for the specified CStdLib
+// function, or 0 if it is not found in the table.
+unsigned PoolAllocate::getCStdLibPoolArguments(StringRef funcname)
+{
+  StringMap<unsigned>::const_iterator argc = CStdLibPoolArgs.find(funcname);
+  if (argc != CStdLibPoolArgs.end())
+    return argc->getValue();
+  else
+    return 0;
+}

Modified: poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp?rev=129005&r1=129004&r2=129005&view=diff
==============================================================================
--- poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp (original)
+++ poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp Wed Apr  6 11:06:59 2011
@@ -56,7 +56,6 @@
                   std::multimap<AllocaInst*, CallInst*> &poolFrees)
       : PAInfo(P), G(g), FI(fi), 
         PoolUses(poolUses), PoolFrees(poolFrees) {
-      initializeCStdLibPoolArgcs();
     }
 
     template <typename InstType, typename SetType>
@@ -92,23 +91,6 @@
     Instruction *TransformAllocationInstr(Instruction *I, Value *Size);
     Instruction *InsertPoolFreeInstr(Value *V, Instruction *Where);
 
-    // Used for looking up CStdLib function names and their initial pool
-    // argument counts
-    StringMap<unsigned> CStdLibPoolArgcs;
-
-    // Initialize the map from CStdLib function name to initial pool
-    // argument counts.
-    void initializeCStdLibPoolArgcs() {
-      CStdLibPoolArgcs.GetOrCreateValue("pool_strcpy",  2);
-      CStdLibPoolArgcs.GetOrCreateValue("pool_strlen",  1);
-      CStdLibPoolArgcs.GetOrCreateValue("pool_strchr",  1);
-      CStdLibPoolArgcs.GetOrCreateValue("pool_strrchr", 1);
-      CStdLibPoolArgcs.GetOrCreateValue("pool_strcat",  2);
-      CStdLibPoolArgcs.GetOrCreateValue("pool_strncat", 2);
-      CStdLibPoolArgcs.GetOrCreateValue("pool_strstr",  2);
-      CStdLibPoolArgcs.GetOrCreateValue("pool_strpbrk", 2);
-    }
-
     //
     // Method: UpdateNewToOldValueMap()
     //
@@ -818,8 +800,7 @@
   const Function *CF = CS.getCalledFunction();
   Instruction *TheCall = CS.getInstruction();
   bool thread_creation_point = false;
-
-  StringMap<unsigned>::const_iterator pool_argc = CStdLibPoolArgcs.end();
+  unsigned argc;
 
   //
   // Get the value that is called at this call site.  Strip away any pointer
@@ -892,8 +873,8 @@
                (CF->getName() == "sc.pool_unregister") ||
                (CF->getName() == "sc.get_actual_val")) {
       visitRuntimeCheck (CS);
-    } else if ((pool_argc = CStdLibPoolArgcs.find(CF->getName())) != CStdLibPoolArgcs.end()) {
-      visitCStdLibCheck(CS, pool_argc->getValue());
+    } else if ((argc = PAInfo.getCStdLibPoolArguments(CF->getName())) > 0) {
+      visitCStdLibCheck(CS, argc);
     } else if (CF->getName() == "pthread_create") {
       thread_creation_point = true;
 



From sabre at nondot.org  Wed Apr  6 11:14:25 2011
From: sabre at nondot.org (Chris Lattner)
Date: Wed, 06 Apr 2011 16:14:25 -0000
Subject: [llvm-commits] [llvm] r129006 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <20110406161425.6B6632A6C12D@llvm.org>

Author: lattner
Date: Wed Apr  6 11:14:25 2011
New Revision: 129006

URL: http://llvm.org/viewvc/llvm-project?rev=129006&view=rev
Log:
add rubinius

Modified:
    llvm/trunk/docs/ReleaseNotes.html

Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=129006&r1=129005&r2=129006&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Wed Apr  6 11:14:25 2011
@@ -373,6 +373,19 @@
 and parallelism.</p>
 </div>
 
+<!--=========================================================================-->
+<h2>Rubinius</h2>
+
+<div class="doc_text">
+  <p><a href="http://github.com/evanphx/rubinius">Rubinius</a> is an environment
+  for running Ruby code which strives to write as much of the implementation in
+  Ruby as possible. Combined with a bytecode interpreting VM, it uses LLVM to
+  optimize and compile ruby code down to machine code. Techniques such as type
+  feedback, method inlining, and deoptimization are all used to remove dynamism
+  from ruby execution and increase performance.</p>
+</div>
+
+
 
 <!-- *********************************************************************** -->
 <h1>



From aggarwa4 at illinois.edu  Wed Apr  6 11:31:50 2011
From: aggarwa4 at illinois.edu (Arushi Aggarwal)
Date: Wed, 06 Apr 2011 16:31:50 -0000
Subject: [llvm-commits] [poolalloc] r129007 -
	/poolalloc/trunk/lib/AssistDS/ArgCast.cpp
Message-ID: <20110406163150.E24D32A6C12D@llvm.org>

Author: aggarwa4
Date: Wed Apr  6 11:31:50 2011
New Revision: 129007

URL: http://llvm.org/viewvc/llvm-project?rev=129007&view=rev
Log:
Expanded comment.

Modified:
    poolalloc/trunk/lib/AssistDS/ArgCast.cpp

Modified: poolalloc/trunk/lib/AssistDS/ArgCast.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/AssistDS/ArgCast.cpp?rev=129007&r1=129006&r2=129007&view=diff
==============================================================================
--- poolalloc/trunk/lib/AssistDS/ArgCast.cpp (original)
+++ poolalloc/trunk/lib/AssistDS/ArgCast.cpp Wed Apr  6 11:31:50 2011
@@ -137,12 +137,15 @@
                                                               FormalType, false, "", CI);
                 Args.push_back(CastI);
               } else {
-                //  Use ZExt in default case.
-                //  TODO: is this correct?
+                // Use ZExt in default case.
+                // Derived from InstCombine. Also, the only reason this should happen
+                // is mismatched prototypes.
+                // Seen in case of integer constants which get interpreted as i32, 
+                // even if being used as i64.
+                // TODO: is this correct?
                 CastInst *CastI = CastInst::CreateIntegerCast(CI->getOperand(i+1), 
                                                               FormalType, false, "", CI);
                 Args.push_back(CastI);
-                break;
               } 
             } 
           } else {



From grosbach at apple.com  Wed Apr  6 11:35:19 2011
From: grosbach at apple.com (Jim Grosbach)
Date: Wed, 06 Apr 2011 16:35:19 -0000
Subject: [llvm-commits] [llvm] r129008 -
	/llvm/trunk/include/llvm/ExecutionEngine/ExecutionEngine.h
Message-ID: <20110406163519.9FC522A6C12D@llvm.org>

Author: grosbach
Date: Wed Apr  6 11:35:19 2011
New Revision: 129008

URL: http://llvm.org/viewvc/llvm-project?rev=129008&view=rev
Log:
EngineBuilder setter method for UseMCJIT was missing return value.

Modified:
    llvm/trunk/include/llvm/ExecutionEngine/ExecutionEngine.h

Modified: llvm/trunk/include/llvm/ExecutionEngine/ExecutionEngine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ExecutionEngine/ExecutionEngine.h?rev=129008&r1=129007&r2=129008&view=diff
==============================================================================
--- llvm/trunk/include/llvm/ExecutionEngine/ExecutionEngine.h (original)
+++ llvm/trunk/include/llvm/ExecutionEngine/ExecutionEngine.h Wed Apr  6 11:35:19 2011
@@ -556,8 +556,9 @@
 
   /// setUseMCJIT - Set whether the MC-JIT implementation should be used
   /// (experimental).
-  void setUseMCJIT(bool Value) {
+  EngineBuilder &setUseMCJIT(bool Value) {
     UseMCJIT = Value;
+    return *this;
   }
 
   /// setMAttrs - Set cpu-specific attributes.



From rafael.espindola at gmail.com  Wed Apr  6 11:49:37 2011
From: rafael.espindola at gmail.com (Rafael Espindola)
Date: Wed, 06 Apr 2011 16:49:37 -0000
Subject: [llvm-commits] [llvm] r129009 - in /llvm/trunk/lib/Bitcode/Writer:
 BitcodeWriter.cpp ValueEnumerator.cpp ValueEnumerator.h
Message-ID: <20110406164937.A7A222A6C12D@llvm.org>

Author: rafael
Date: Wed Apr  6 11:49:37 2011
New Revision: 129009

URL: http://llvm.org/viewvc/llvm-project?rev=129009&view=rev
Log:
Do a topological sort of the types before writing them out.

This takes the linking of libxul on linux from 6m54.931s to 5m39.840s.

Modified:
    llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp
    llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp
    llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.h

Modified: llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp?rev=129009&r1=129008&r2=129009&view=diff
==============================================================================
--- llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp (original)
+++ llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp Wed Apr  6 11:49:37 2011
@@ -197,7 +197,7 @@
 
   // Loop over all of the types, emitting each in turn.
   for (unsigned i = 0, e = TypeList.size(); i != e; ++i) {
-    const Type *T = TypeList[i].first;
+    const Type *T = TypeList[i];
     int AbbrevToUse = 0;
     unsigned Code = 0;
 

Modified: llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp?rev=129009&r1=129008&r2=129009&view=diff
==============================================================================
--- llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp (original)
+++ llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp Wed Apr  6 11:49:37 2011
@@ -12,6 +12,8 @@
 //===----------------------------------------------------------------------===//
 
 #include "ValueEnumerator.h"
+#include "llvm/ADT/SmallPtrSet.h"
+#include "llvm/ADT/STLExtras.h"
 #include "llvm/Constants.h"
 #include "llvm/DerivedTypes.h"
 #include "llvm/Module.h"
@@ -21,22 +23,10 @@
 #include <algorithm>
 using namespace llvm;
 
-static bool isSingleValueType(const std::pair<const llvm::Type*,
-                              unsigned int> &P) {
-  return P.first->isSingleValueType();
-}
-
 static bool isIntegerValue(const std::pair<const Value*, unsigned> &V) {
   return V.first->getType()->isIntegerTy();
 }
 
-static bool CompareByFrequency(const std::pair<const llvm::Type*,
-                               unsigned int> &P1,
-                               const std::pair<const llvm::Type*,
-                               unsigned int> &P2) {
-  return P1.second > P2.second;
-}
-
 /// ValueEnumerator - Enumerate module-level information.
 ValueEnumerator::ValueEnumerator(const Module *M) {
   // Enumerate the global variables.
@@ -120,18 +110,72 @@
   // Optimize constant ordering.
   OptimizeConstants(FirstConstant, Values.size());
 
-  // Sort the type table by frequency so that most commonly used types are early
-  // in the table (have low bit-width).
-  std::stable_sort(Types.begin(), Types.end(), CompareByFrequency);
-
-  // Partition the Type ID's so that the single-value types occur before the
-  // aggregate types.  This allows the aggregate types to be dropped from the
-  // type table after parsing the global variable initializers.
-  std::partition(Types.begin(), Types.end(), isSingleValueType);
+  OptimizeTypes();
 
   // Now that we rearranged the type table, rebuild TypeMap.
   for (unsigned i = 0, e = Types.size(); i != e; ++i)
-    TypeMap[Types[i].first] = i+1;
+    TypeMap[Types[i]] = i+1;
+}
+
+struct TypeAndDeps {
+  const Type *Ty;
+  unsigned NumDeps;
+};
+
+static int CompareByDeps(const void *a, const void *b) {
+  const TypeAndDeps &ta = *(const TypeAndDeps*) a;
+  const TypeAndDeps &tb = *(const TypeAndDeps*) b;
+  return ta.NumDeps - tb.NumDeps;
+}
+
+static void VisitType(const Type *Ty, SmallPtrSet<const Type*, 16> &Visited,
+                      std::vector<const Type*> &Out) {
+  if (Visited.count(Ty))
+    return;
+
+  Visited.insert(Ty);
+
+  for (Type::subtype_iterator I2 = Ty->subtype_begin(),
+         E2 = Ty->subtype_end(); I2 != E2; ++I2) {
+    const Type *InnerType = I2->get();
+    VisitType(InnerType, Visited, Out);
+  }
+
+  Out.push_back(Ty);
+}
+
+void ValueEnumerator::OptimizeTypes(void) {
+  // If the types form a DAG, this will compute a topological sort and
+  // no forward references will be needed when reading them in.
+  // If there are cycles, this is a simple but reasonable heuristic for
+  // the minimum feedback arc set problem.
+  const unsigned NumTypes = Types.size();
+  std::vector<TypeAndDeps> TypeDeps;
+  TypeDeps.resize(NumTypes);
+
+  for (unsigned I = 0; I < NumTypes; ++I) {
+    const Type *Ty = Types[I];
+    TypeDeps[I].Ty = Ty;
+    TypeDeps[I].NumDeps = 0;
+  }
+
+  for (unsigned I = 0; I < NumTypes; ++I) {
+    const Type *Ty = TypeDeps[I].Ty;
+    for (Type::subtype_iterator I2 = Ty->subtype_begin(),
+           E2 = Ty->subtype_end(); I2 != E2; ++I2) {
+      const Type *InnerType = I2->get();
+      unsigned InnerIndex = TypeMap.lookup(InnerType) - 1;
+      TypeDeps[InnerIndex].NumDeps++;
+    }
+  }
+  array_pod_sort(TypeDeps.begin(), TypeDeps.end(), CompareByDeps);
+
+  SmallPtrSet<const Type*, 16> Visited;
+  Types.clear();
+  Types.reserve(NumTypes);
+  for (unsigned I = 0; I < NumTypes; ++I) {
+    VisitType(TypeDeps[I].Ty, Visited, Types);
+  }
 }
 
 unsigned ValueEnumerator::getInstructionID(const Instruction *Inst) const {
@@ -352,14 +396,12 @@
 void ValueEnumerator::EnumerateType(const Type *Ty) {
   unsigned &TypeID = TypeMap[Ty];
 
-  if (TypeID) {
-    // If we've already seen this type, just increase its occurrence count.
-    Types[TypeID-1].second++;
+  // We've already seen this type.
+  if (TypeID)
     return;
-  }
 
   // First time we saw this type, add it.
-  Types.push_back(std::make_pair(Ty, 1U));
+  Types.push_back(Ty);
   TypeID = Types.size();
 
   // Enumerate subtypes.

Modified: llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.h?rev=129009&r1=129008&r2=129009&view=diff
==============================================================================
--- llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.h (original)
+++ llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.h Wed Apr  6 11:49:37 2011
@@ -36,8 +36,7 @@
 
 class ValueEnumerator {
 public:
-  // For each type, we remember its Type* and occurrence frequency.
-  typedef std::vector<std::pair<const Type*, unsigned> > TypeList;
+  typedef std::vector<const Type*> TypeList;
 
   // For each value, we remember its Value* and occurrence frequency.
   typedef std::vector<std::pair<const Value*, unsigned> > ValueList;
@@ -136,6 +135,7 @@
 
 private:
   void OptimizeConstants(unsigned CstStart, unsigned CstEnd);
+  void OptimizeTypes();
     
   void EnumerateMDNodeOperands(const MDNode *N);
   void EnumerateMetadata(const Value *MD);



From dpatel at apple.com  Wed Apr  6 12:08:15 2011
From: dpatel at apple.com (Devang Patel)
Date: Wed, 06 Apr 2011 17:08:15 -0000
Subject: [llvm-commits] [llvm] r129010 -
	/llvm/trunk/lib/VMCore/DebugInfoProbe.cpp
Message-ID: <20110406170815.411172A6C12D@llvm.org>

Author: dpatel
Date: Wed Apr  6 12:08:15 2011
New Revision: 129010

URL: http://llvm.org/viewvc/llvm-project?rev=129010&view=rev
Log:
face+palm

Keep track of llvm.dbg.value intrinsics with non null values.

Modified:
    llvm/trunk/lib/VMCore/DebugInfoProbe.cpp

Modified: llvm/trunk/lib/VMCore/DebugInfoProbe.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/DebugInfoProbe.cpp?rev=129010&r1=129009&r2=129010&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/DebugInfoProbe.cpp (original)
+++ llvm/trunk/lib/VMCore/DebugInfoProbe.cpp Wed Apr  6 12:08:15 2011
@@ -99,8 +99,8 @@
         Addr = DVI->getValue();
         Node = DVI->getVariable();
       }
-      if (Addr) continue;
-      DbgVariables.insert(Node);
+      if (Addr)
+        DbgVariables.insert(Node);
     }
 }
 
@@ -154,8 +154,8 @@
         Addr = DVI->getValue();
         Node = DVI->getVariable();
       }
-      if (Addr) continue;
-      DbgVariables2.insert(Node);
+      if (Addr)
+        DbgVariables2.insert(Node);
     }
 
   for (std::set<MDNode *>::iterator I = DbgVariables.begin(), 



From rafael.espindola at gmail.com  Wed Apr  6 12:19:35 2011
From: rafael.espindola at gmail.com (Rafael Espindola)
Date: Wed, 06 Apr 2011 17:19:35 -0000
Subject: [llvm-commits] [llvm] r129011 -
	/llvm/trunk/lib/Target/X86/README.txt
Message-ID: <20110406171935.ADBA92A6C12D@llvm.org>

Author: rafael
Date: Wed Apr  6 12:19:35 2011
New Revision: 129011

URL: http://llvm.org/viewvc/llvm-project?rev=129011&view=rev
Log:
The original issue has been fixed by not doing unnecessary sign extensions.
Change the test to force a sign extension and expose the problem again.

Modified:
    llvm/trunk/lib/Target/X86/README.txt

Modified: llvm/trunk/lib/Target/X86/README.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/README.txt?rev=129011&r1=129010&r2=129011&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/README.txt (original)
+++ llvm/trunk/lib/Target/X86/README.txt Wed Apr  6 12:19:35 2011
@@ -1656,23 +1656,26 @@
 
 //===---------------------------------------------------------------------===//
 
-_Bool bar(int *x) { return *x & 1; }
+struct B {
+  unsigned char y0 : 1;
+};
 
-define zeroext i1 @bar(i32* nocapture %x) nounwind readonly {
-entry:
-  %tmp1 = load i32* %x                            ; <i32> [#uses=1]
-  %and = and i32 %tmp1, 1                         ; <i32> [#uses=1]
-  %tobool = icmp ne i32 %and, 0                   ; <i1> [#uses=1]
-  ret i1 %tobool
+int bar(struct B* a) { return a->y0; }
+
+define i32 @bar(%struct.B* nocapture %a) nounwind readonly optsize {
+  %1 = getelementptr inbounds %struct.B* %a, i64 0, i32 0
+  %2 = load i8* %1, align 1
+  %3 = and i8 %2, 1
+  %4 = zext i8 %3 to i32
+  ret i32 %4
 }
 
-bar:                                                        # @bar
-# BB#0:                                                     # %entry
-	movl	4(%esp), %eax
-	movb	(%eax), %al
-	andb	$1, %al
-	movzbl	%al, %eax
-	ret
+bar:                                    # @bar
+# BB#0:
+        movb    (%rdi), %al
+        andb    $1, %al
+        movzbl  %al, %eax
+        ret
 
 Missed optimization: should be movl+andl.
 



From rafael.espindola at gmail.com  Wed Apr  6 12:35:32 2011
From: rafael.espindola at gmail.com (Rafael Espindola)
Date: Wed, 06 Apr 2011 17:35:32 -0000
Subject: [llvm-commits] [llvm] r129012 -
	/llvm/trunk/lib/Target/X86/README.txt
Message-ID: <20110406173532.C03352A6C12D@llvm.org>

Author: rafael
Date: Wed Apr  6 12:35:32 2011
New Revision: 129012

URL: http://llvm.org/viewvc/llvm-project?rev=129012&view=rev
Log:
Add another case we are not optimizing.

Modified:
    llvm/trunk/lib/Target/X86/README.txt

Modified: llvm/trunk/lib/Target/X86/README.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/README.txt?rev=129012&r1=129011&r2=129012&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/README.txt (original)
+++ llvm/trunk/lib/Target/X86/README.txt Wed Apr  6 12:35:32 2011
@@ -1681,6 +1681,36 @@
 
 //===---------------------------------------------------------------------===//
 
+The x86_64 abi says:
+
+Booleans, when stored in a memory object, are stored as single byte objects the
+value of which is always 0 (false) or 1 (true).
+
+We are not using this fact:
+
+int bar(_Bool *a) { return *a; }
+
+define i32 @bar(i8* nocapture %a) nounwind readonly optsize {
+  %1 = load i8* %a, align 1, !tbaa !0
+  %tmp = and i8 %1, 1
+  %2 = zext i8 %tmp to i32
+  ret i32 %2
+}
+
+bar:
+        movb    (%rdi), %al
+        andb    $1, %al
+        movzbl  %al, %eax
+        ret
+
+GCC produces
+
+bar:
+        movzbl  (%rdi), %eax
+        ret
+
+//===---------------------------------------------------------------------===//
+
 Consider the following two functions compiled with clang:
 _Bool foo(int *x) { return !(*x & 4); }
 unsigned bar(int *x) { return !(*x & 4); }



From johnny.chen at apple.com  Wed Apr  6 13:27:46 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Wed, 06 Apr 2011 18:27:46 -0000
Subject: [llvm-commits] [llvm] r129015 - in /llvm/trunk:
 lib/Target/ARM/ARMInstrFormats.td
 lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
 test/MC/Disassembler/ARM/neon-tests.txt
Message-ID: <20110406182747.03A252A6C12D@llvm.org>

Author: johnny
Date: Wed Apr  6 13:27:46 2011
New Revision: 129015

URL: http://llvm.org/viewvc/llvm-project?rev=129015&view=rev
Log:
Fix a bug in the disassembly of VGETLNs8 where the lane index was wrong.
Also set the encoding bits (for A8.6.303, A8.6.328, A8.6.329) Inst{3-0} = 0b0000,
in class NVLaneOp.

rdar://problem/9240648

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
    llvm/trunk/test/MC/Disassembler/ARM/neon-tests.txt

Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=129015&r1=129014&r2=129015&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Wed Apr  6 13:27:46 2011
@@ -1850,6 +1850,8 @@
   let Inst{11-8}  = opcod2;
   let Inst{6-5}   = opcod3;
   let Inst{4}     = 1;
+  // A8.6.303, A8.6.328, A8.6.329
+  let Inst{3-0}   = 0b0000;
 
   let OutOperandList = oops;
   let InOperandList = !con(iops, (ins pred:$p));

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp?rev=129015&r1=129014&r2=129015&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp Wed Apr  6 13:27:46 2011
@@ -3037,7 +3037,7 @@
   ElemSize esize =
     Opcode == ARM::VGETLNi32 ? ESize32
       : ((Opcode == ARM::VGETLNs16 || Opcode == ARM::VGETLNu16) ? ESize16
-                                                                : ESize32);
+                                                                : ESize8);
 
   // Rt = Inst{15-12} => ARM Rd
   MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,

Modified: llvm/trunk/test/MC/Disassembler/ARM/neon-tests.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/neon-tests.txt?rev=129015&r1=129014&r2=129015&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/neon-tests.txt (original)
+++ llvm/trunk/test/MC/Disassembler/ARM/neon-tests.txt Wed Apr  6 13:27:46 2011
@@ -71,3 +71,6 @@
 
 # CHECK:	vst2.32	{d16, d18}, [r2, :64], r2
 0x92 0x9 0x42 0xf4
+
+# CHECK:	vmov.s8	r0, d8[1]
+0x30 0x0b 0x58 0xee



From rdivacky at freebsd.org  Wed Apr  6 14:12:21 2011
From: rdivacky at freebsd.org (Roman Divacky)
Date: Wed, 06 Apr 2011 19:12:21 -0000
Subject: [llvm-commits] [llvm] r129019 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <20110406191221.BB8982A6C12D@llvm.org>

Author: rdivacky
Date: Wed Apr  6 14:12:21 2011
New Revision: 129019

URL: http://llvm.org/viewvc/llvm-project?rev=129019&view=rev
Log:
Fix a typo.


Modified:
    llvm/trunk/docs/ReleaseNotes.html

Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=129019&r1=129018&r2=129019&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Wed Apr  6 14:12:21 2011
@@ -484,7 +484,7 @@
   simplify expressions, perform simple dead store elimination, and perform
   common subexpression elimination.  It does a good job at catching some of the
   trivial redundancies that exist in unoptimized code, making later passes more
-  effective.<,/li>
+  effective.</li>
 
 <li>A new -loop-instsimplify pass is used to clean up loop bodies in the loop
   optimizer.</li>



From stoklund at 2pi.dk  Wed Apr  6 14:13:57 2011
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Wed, 06 Apr 2011 19:13:57 -0000
Subject: [llvm-commits] [llvm] r129020 - in /llvm/trunk/lib/CodeGen:
 RegAllocGreedy.cpp SpillPlacement.cpp SpillPlacement.h
Message-ID: <20110406191358.007622A6C12D@llvm.org>

Author: stoklund
Date: Wed Apr  6 14:13:57 2011
New Revision: 129020

URL: http://llvm.org/viewvc/llvm-project?rev=129020&view=rev
Log:
Break the spill placement algorithm into three parts: prepare, addConstraints, and finish.

This will allow us to abort the algorithm early if it is determined to be futile.

Modified:
    llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
    llvm/trunk/lib/CodeGen/SpillPlacement.cpp
    llvm/trunk/lib/CodeGen/SpillPlacement.h

Modified: llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp?rev=129020&r1=129019&r2=129020&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp Wed Apr  6 14:13:57 2011
@@ -770,7 +770,10 @@
       continue;
     }
 
-    SpillPlacer->placeSpills(SplitConstraints, LiveBundles);
+    SpillPlacer->prepare(LiveBundles);
+    SpillPlacer->addConstraints(SplitConstraints);
+    SpillPlacer->finish();
+
     // No live bundles, defer to splitSingleBlocks().
     if (!LiveBundles.any()) {
       DEBUG(dbgs() << " no bundles.\n");

Modified: llvm/trunk/lib/CodeGen/SpillPlacement.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SpillPlacement.cpp?rev=129020&r1=129019&r2=129020&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SpillPlacement.cpp (original)
+++ llvm/trunk/lib/CodeGen/SpillPlacement.cpp Wed Apr  6 14:13:57 2011
@@ -203,11 +203,10 @@
 }
 
 
-/// prepareNodes - Compute node biases and weights from a set of constraints.
+/// addConstraints - Compute node biases and weights from a set of constraints.
 /// Set a bit in NodeMask for each active node.
-void SpillPlacement::
-prepareNodes(const SmallVectorImpl<BlockConstraint> &LiveBlocks) {
-  for (SmallVectorImpl<BlockConstraint>::const_iterator I = LiveBlocks.begin(),
+void SpillPlacement::addConstraints(ArrayRef<BlockConstraint> LiveBlocks) {
+  for (ArrayRef<BlockConstraint>::iterator I = LiveBlocks.begin(),
        E = LiveBlocks.end(); I != E; ++I) {
     float Freq = getBlockFrequency(I->Number);
 
@@ -288,21 +287,20 @@
   }
 }
 
-bool
-SpillPlacement::placeSpills(const SmallVectorImpl<BlockConstraint> &LiveBlocks,
-                            BitVector &RegBundles) {
+void SpillPlacement::prepare(BitVector &RegBundles) {
   // Reuse RegBundles as our ActiveNodes vector.
   ActiveNodes = &RegBundles;
   ActiveNodes->clear();
   ActiveNodes->resize(bundles->getNumBundles());
+}
 
-  // Compute active nodes, links and biases.
-  prepareNodes(LiveBlocks);
-
+bool
+SpillPlacement::finish() {
+  assert(ActiveNodes && "Call prepare() first");
   // Update all active nodes, and find the ones that are actually linked to
   // something so their value may change when iterating.
   SmallVector<unsigned, 8> Linked;
-  for (int n = RegBundles.find_first(); n>=0; n = RegBundles.find_next(n)) {
+  for (int n = ActiveNodes->find_first(); n>=0; n = ActiveNodes->find_next(n)) {
     nodes[n].update(nodes);
     // A node that must spill, or a node without any links is not going to
     // change its value ever again, so exclude it from iterations.
@@ -313,12 +311,13 @@
   // Iterate the network to convergence.
   iterate(Linked);
 
-  // Write preferences back to RegBundles.
+  // Write preferences back to ActiveNodes.
   bool Perfect = true;
-  for (int n = RegBundles.find_first(); n>=0; n = RegBundles.find_next(n))
+  for (int n = ActiveNodes->find_first(); n>=0; n = ActiveNodes->find_next(n))
     if (!nodes[n].preferReg()) {
-      RegBundles.reset(n);
+      ActiveNodes->reset(n);
       Perfect = false;
     }
+  ActiveNodes = 0;
   return Perfect;
 }

Modified: llvm/trunk/lib/CodeGen/SpillPlacement.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SpillPlacement.h?rev=129020&r1=129019&r2=129020&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SpillPlacement.h (original)
+++ llvm/trunk/lib/CodeGen/SpillPlacement.h Wed Apr  6 14:13:57 2011
@@ -10,8 +10,8 @@
 // This analysis computes the optimal spill code placement between basic blocks.
 //
 // The runOnMachineFunction() method only precomputes some profiling information
-// about the CFG. The real work is done by placeSpills() which is called by the
-// register allocator.
+// about the CFG. The real work is done by prepare(), addConstraints(), and
+// finish() which are called by the register allocator.
 //
 // Given a variable that is live across multiple basic blocks, and given
 // constraints on the basic blocks where the variable is live, determine which
@@ -27,6 +27,7 @@
 #ifndef LLVM_CODEGEN_SPILLPLACEMENT_H
 #define LLVM_CODEGEN_SPILLPLACEMENT_H
 
+#include "llvm/ADT/ArrayRef.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 
@@ -44,7 +45,7 @@
   const MachineLoopInfo *loops;
   Node *nodes;
 
-  // Nodes that are active in the current computation. Owned by the placeSpills
+  // Nodes that are active in the current computation. Owned by the prepare()
   // caller.
   BitVector *ActiveNodes;
 
@@ -73,24 +74,31 @@
     BorderConstraint Exit : 8;  ///< Constraint on block exit.
   };
 
-  /// placeSpills - Compute the optimal spill code placement given the
-  /// constraints. No MustSpill constraints will be violated, and the smallest
-  /// possible number of PrefX constraints will be violated, weighted by
-  /// expected execution frequencies.
-  /// @param LiveBlocks Constraints for blocks that have the variable live in or
-  ///                   live out. DontCare/DontCare means the variable is live
-  ///                   through the block. DontCare/X means the variable is live
-  ///                   out, but not live in.
+  /// prepare - Reset state and prepare for a new spill placement computation.
   /// @param RegBundles Bit vector to receive the edge bundles where the
   ///                   variable should be kept in a register. Each bit
   ///                   corresponds to an edge bundle, a set bit means the
   ///                   variable should be kept in a register through the
   ///                   bundle. A clear bit means the variable should be
-  ///                   spilled.
+  ///                   spilled. This vector is retained.
+  void prepare(BitVector &RegBundles);
+
+  /// addConstraints - Add constraints and biases. This method may be called
+  /// more than once to accumulate constraints.
+  /// @param LiveBlocks Constraints for blocks that have the variable live in or
+  ///                   live out. DontCare/DontCare means the variable is live
+  ///                   through the block. DontCare/X means the variable is live
+  ///                   out, but not live in.
+  void addConstraints(ArrayRef<BlockConstraint> LiveBlocks);
+
+  /// finish - Compute the optimal spill code placement given the
+  /// constraints. No MustSpill constraints will be violated, and the smallest
+  /// possible number of PrefX constraints will be violated, weighted by
+  /// expected execution frequencies.
+  /// The selected bundles are returned in the bitvector passed to prepare().
   /// @return True if a perfect solution was found, allowing the variable to be
   ///         in a register through all relevant bundles.
-  bool placeSpills(const SmallVectorImpl<BlockConstraint> &LiveBlocks,
-                   BitVector &RegBundles);
+  bool finish();
 
   /// getBlockFrequency - Return the estimated block execution frequency per
   /// function invocation.
@@ -104,7 +112,6 @@
   virtual void releaseMemory();
 
   void activate(unsigned);
-  void prepareNodes(const SmallVectorImpl<BlockConstraint>&);
   void iterate(const SmallVectorImpl<unsigned>&);
 };
 



From stoklund at 2pi.dk  Wed Apr  6 14:14:00 2011
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Wed, 06 Apr 2011 19:14:00 -0000
Subject: [llvm-commits] [llvm] r129021 - in /llvm/trunk/lib/CodeGen:
 RegAllocGreedy.cpp SpillPlacement.cpp SpillPlacement.h
Message-ID: <20110406191400.849C32A6C12E@llvm.org>

Author: stoklund
Date: Wed Apr  6 14:14:00 2011
New Revision: 129021

URL: http://llvm.org/viewvc/llvm-project?rev=129021&view=rev
Log:
Keep track of the number of positively biased nodes when adding constraints.

If there are no positive nodes, the algorithm can be aborted early.

Modified:
    llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
    llvm/trunk/lib/CodeGen/SpillPlacement.cpp
    llvm/trunk/lib/CodeGen/SpillPlacement.h

Modified: llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp?rev=129021&r1=129020&r2=129021&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp Wed Apr  6 14:14:00 2011
@@ -772,6 +772,7 @@
 
     SpillPlacer->prepare(LiveBundles);
     SpillPlacer->addConstraints(SplitConstraints);
+    DEBUG(dbgs() << ", " << SpillPlacer->getPositiveNodes() << " biased nodes");
     SpillPlacer->finish();
 
     // No live bundles, defer to splitSingleBlocks().

Modified: llvm/trunk/lib/CodeGen/SpillPlacement.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SpillPlacement.cpp?rev=129021&r1=129020&r2=129021&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SpillPlacement.cpp (original)
+++ llvm/trunk/lib/CodeGen/SpillPlacement.cpp Wed Apr  6 14:14:00 2011
@@ -134,10 +134,14 @@
   }
 
   /// addBias - Bias this node from an ingoing[0] or outgoing[1] link.
-  void addBias(float w, bool out) {
+  /// Return the change to the total number of positive biases.
+  int addBias(float w, bool out) {
     // Normalize w relative to all connected blocks from that direction.
     w /= Frequency[out];
+    int Before = Bias > 0;
     Bias += w;
+    int After = Bias > 0;
+    return After - Before;
   }
 
   /// update - Recompute Value from Bias and Links. Return true when node
@@ -237,14 +241,14 @@
     if (I->Entry != DontCare) {
       unsigned ib = bundles->getBundle(I->Number, 0);
       activate(ib);
-      nodes[ib].addBias(Freq * Bias[I->Entry], 1);
+      PositiveNodes += nodes[ib].addBias(Freq * Bias[I->Entry], 1);
     }
 
     // Live-out from block?
     if (I->Exit != DontCare) {
       unsigned ob = bundles->getBundle(I->Number, 1);
       activate(ob);
-      nodes[ob].addBias(Freq * Bias[I->Exit], 0);
+      PositiveNodes += nodes[ob].addBias(Freq * Bias[I->Exit], 0);
     }
   }
 }
@@ -292,6 +296,7 @@
   ActiveNodes = &RegBundles;
   ActiveNodes->clear();
   ActiveNodes->resize(bundles->getNumBundles());
+  PositiveNodes = 0;
 }
 
 bool

Modified: llvm/trunk/lib/CodeGen/SpillPlacement.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SpillPlacement.h?rev=129021&r1=129020&r2=129021&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SpillPlacement.h (original)
+++ llvm/trunk/lib/CodeGen/SpillPlacement.h Wed Apr  6 14:14:00 2011
@@ -49,6 +49,9 @@
   // caller.
   BitVector *ActiveNodes;
 
+  // The number of active nodes with a positive bias.
+  unsigned PositiveNodes;
+
   // Block frequencies are computed once. Indexed by block number.
   SmallVector<float, 4> BlockFrequency;
 
@@ -91,6 +94,10 @@
   ///                   out, but not live in.
   void addConstraints(ArrayRef<BlockConstraint> LiveBlocks);
 
+  /// getPositiveNodes - Return the total number of graph nodes with a positive
+  /// bias after adding constraints.
+  unsigned getPositiveNodes() const { return PositiveNodes; }
+
   /// finish - Compute the optimal spill code placement given the
   /// constraints. No MustSpill constraints will be violated, and the smallest
   /// possible number of PrefX constraints will be violated, weighted by



From rafael.espindola at gmail.com  Wed Apr  6 14:57:04 2011
From: rafael.espindola at gmail.com (=?ISO-8859-1?Q?Rafael_=C1vila_de_Esp=EDndola?=)
Date: Wed, 06 Apr 2011 15:57:04 -0400
Subject: [llvm-commits] [llvm] r128506 -
	/llvm/trunk/lib/Linker/LinkModules.cpp
In-Reply-To: <20110329232802.42E902A6C12C@llvm.org>
References: <20110329232802.42E902A6C12C@llvm.org>
Message-ID: <4D9CC590.2000905@gmail.com>

On 2011-03-29 19:28, Bill Wendling wrote:
> Author: void
> Date: Tue Mar 29 18:28:02 2011
> New Revision: 128506
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=128506&view=rev
> Log:
> Revert r128501. It caused test failures.

Do you have a testcase? It would be really nice to add it to test/Linker.

Thanks,
Rafael

From stuart at apple.com  Wed Apr  6 15:08:07 2011
From: stuart at apple.com (Stuart Hastings)
Date: Wed, 06 Apr 2011 20:08:07 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r129022 -
	/llvm-gcc-4.2/trunk/build_gcc
Message-ID: <20110406200808.041D12A6C12D@llvm.org>

Author: stuart
Date: Wed Apr  6 15:08:07 2011
New Revision: 129022

URL: http://llvm.org/viewvc/llvm-project?rev=129022&view=rev
Log:
Place g++ soft link in path, just like gcc. <rdar://problem/9235602>

Modified:
    llvm-gcc-4.2/trunk/build_gcc

Modified: llvm-gcc-4.2/trunk/build_gcc
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/build_gcc?rev=129022&r1=129021&r2=129022&view=diff
==============================================================================
--- llvm-gcc-4.2/trunk/build_gcc (original)
+++ llvm-gcc-4.2/trunk/build_gcc Wed Apr  6 15:08:07 2011
@@ -296,7 +296,9 @@
 # LLVM LOCAL begin Support for non /usr $DEST_ROOT
 D=$DIR/dst-$BUILD-$BUILD$DEST_ROOT/bin
 ln -f $D/llvm-gcc $D/gcc || exit 1
+ln -f $D/llvm-g++ $D/g++ || exit 1
 ln -f $D/gcc $D/$BUILD-apple-darwin$DARWIN_VERS-gcc || exit 1
+ln -f $D/g++ $D/$BUILD-apple-darwin$DARWIN_VERS-g++ || exit 1
 PATH=$DIR/dst-$BUILD-$BUILD$DEST_ROOT/bin:$PATH
 # LLVM LOCAL end Support for non /usr $DEST_ROOT
 



From nicholas at mxc.ca  Wed Apr  6 15:28:34 2011
From: nicholas at mxc.ca (Nick Lewycky)
Date: Wed, 06 Apr 2011 20:28:34 -0000
Subject: [llvm-commits] [llvm] r129024 - in /llvm/trunk:
 include/llvm/DerivedTypes.h lib/VMCore/Type.cpp lib/VMCore/TypesContext.h
Message-ID: <20110406202834.DC7222A6C12D@llvm.org>

Author: nicholas
Date: Wed Apr  6 15:28:34 2011
New Revision: 129024

URL: http://llvm.org/viewvc/llvm-project?rev=129024&view=rev
Log:
Replace const std::vector& with ArrayRef in the type creation APIs.

Modified:
    llvm/trunk/include/llvm/DerivedTypes.h
    llvm/trunk/lib/VMCore/Type.cpp
    llvm/trunk/lib/VMCore/TypesContext.h

Modified: llvm/trunk/include/llvm/DerivedTypes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/DerivedTypes.h?rev=129024&r1=129023&r2=129024&view=diff
==============================================================================
--- llvm/trunk/include/llvm/DerivedTypes.h (original)
+++ llvm/trunk/include/llvm/DerivedTypes.h Wed Apr  6 15:28:34 2011
@@ -19,6 +19,7 @@
 #define LLVM_DERIVED_TYPES_H
 
 #include "llvm/Type.h"
+#include "llvm/ADT/ArrayRef.h"
 #include "llvm/Support/DataTypes.h"
 
 namespace llvm {
@@ -147,7 +148,7 @@
 
   FunctionType(const FunctionType &);                   // Do not implement
   const FunctionType &operator=(const FunctionType &);  // Do not implement
-  FunctionType(const Type *Result, const std::vector<const Type*> &Params,
+  FunctionType(const Type *Result, ArrayRef<const Type*> Params,
                bool IsVarArgs);
 
 public:
@@ -156,7 +157,7 @@
   ///
   static FunctionType *get(
     const Type *Result, ///< The result type
-    const std::vector<const Type*> &Params, ///< The types of the parameters
+    ArrayRef<const Type*> Params, ///< The types of the parameters
     bool isVarArg  ///< Whether this is a variable argument length function
   );
 
@@ -237,14 +238,13 @@
   friend class TypeMap<StructValType, StructType>;
   StructType(const StructType &);                   // Do not implement
   const StructType &operator=(const StructType &);  // Do not implement
-  StructType(LLVMContext &C,
-             const std::vector<const Type*> &Types, bool isPacked);
+  StructType(LLVMContext &C, ArrayRef<const Type*> Types, bool isPacked);
 public:
   /// StructType::get - This static method is the primary way to create a
   /// StructType.
   ///
   static StructType *get(LLVMContext &Context, 
-                         const std::vector<const Type*> &Params,
+                         ArrayRef<const Type*> Params,
                          bool isPacked=false);
 
   /// StructType::get - Create an empty structure type.

Modified: llvm/trunk/lib/VMCore/Type.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Type.cpp?rev=129024&r1=129023&r2=129024&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/Type.cpp (original)
+++ llvm/trunk/lib/VMCore/Type.cpp Wed Apr  6 15:28:34 2011
@@ -17,6 +17,7 @@
 #include "llvm/Assembly/Writer.h"
 #include "llvm/LLVMContext.h"
 #include "llvm/Metadata.h"
+#include "llvm/ADT/ArrayRef.h"
 #include "llvm/ADT/DepthFirstIterator.h"
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/SCCIterator.h"
@@ -460,7 +461,7 @@
 }
 
 FunctionType::FunctionType(const Type *Result,
-                           const std::vector<const Type*> &Params,
+                           ArrayRef<const Type*> Params,
                            bool IsVarArgs)
   : DerivedType(Result->getContext(), FunctionTyID), isVarArgs(IsVarArgs) {
   ContainedTys = reinterpret_cast<PATypeHandle*>(this+1);
@@ -483,7 +484,7 @@
 }
 
 StructType::StructType(LLVMContext &C, 
-                       const std::vector<const Type*> &Types, bool isPacked)
+                       ArrayRef<const Type*> Types, bool isPacked)
   : CompositeType(C, StructTyID) {
   ContainedTys = reinterpret_cast<PATypeHandle*>(this + 1);
   NumContainedTys = Types.size();
@@ -838,7 +839,7 @@
 
 // FunctionType::get - The factory function for the FunctionType class...
 FunctionType *FunctionType::get(const Type *ReturnType,
-                                const std::vector<const Type*> &Params,
+                                ArrayRef<const Type*> Params,
                                 bool isVarArg) {
   FunctionValType VT(ReturnType, Params, isVarArg);
   FunctionType *FT = 0;
@@ -915,7 +916,7 @@
 //
 
 StructType *StructType::get(LLVMContext &Context,
-                            const std::vector<const Type*> &ETypes, 
+                            ArrayRef<const Type*> ETypes, 
                             bool isPacked) {
   StructValType STV(ETypes, isPacked);
   StructType *ST = 0;

Modified: llvm/trunk/lib/VMCore/TypesContext.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/TypesContext.h?rev=129024&r1=129023&r2=129024&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/TypesContext.h (original)
+++ llvm/trunk/lib/VMCore/TypesContext.h Wed Apr  6 15:28:34 2011
@@ -15,6 +15,7 @@
 #ifndef LLVM_TYPESCONTEXT_H
 #define LLVM_TYPESCONTEXT_H
 
+#include "llvm/ADT/ArrayRef.h"
 #include "llvm/ADT/STLExtras.h"
 #include <map>
 
@@ -157,8 +158,8 @@
   std::vector<const Type*> ElTypes;
   bool packed;
 public:
-  StructValType(const std::vector<const Type*> &args, bool isPacked)
-    : ElTypes(args), packed(isPacked) {}
+  StructValType(ArrayRef<const Type*> args, bool isPacked)
+    : ElTypes(args.vec()), packed(isPacked) {}
 
   static StructValType get(const StructType *ST) {
     std::vector<const Type *> ElTypes;
@@ -187,8 +188,8 @@
   std::vector<const Type*> ArgTypes;
   bool isVarArg;
 public:
-  FunctionValType(const Type *ret, const std::vector<const Type*> &args,
-                  bool isVA) : RetTy(ret), ArgTypes(args), isVarArg(isVA) {}
+  FunctionValType(const Type *ret, ArrayRef<const Type*> args, bool isVA)
+    : RetTy(ret), ArgTypes(args.vec()), isVarArg(isVA) {}
 
   static FunctionValType get(const FunctionType *FT);
 



From nicholas at mxc.ca  Wed Apr  6 15:38:44 2011
From: nicholas at mxc.ca (Nick Lewycky)
Date: Wed, 06 Apr 2011 20:38:44 -0000
Subject: [llvm-commits] [llvm] r129025 -
	/llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp
Message-ID: <20110406203844.E1E4D2A6C12D@llvm.org>

Author: nicholas
Date: Wed Apr  6 15:38:44 2011
New Revision: 129025

URL: http://llvm.org/viewvc/llvm-project?rev=129025&view=rev
Log:
Fix comment to use llvm 2.x syntax.

Modified:
    llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp

Modified: llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp?rev=129025&r1=129024&r2=129025&view=diff
==============================================================================
--- llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp (original)
+++ llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp Wed Apr  6 15:38:44 2011
@@ -311,7 +311,7 @@
   // it.
   if (!GV || GV->isDeclaration() || GV->hasLocalLinkage()) return;
 
-  // Should be an array of '{ int, void ()* }' structs.  The first value is
+  // Should be an array of '{ i32, void ()* }' structs.  The first value is
   // the init priority, which we ignore.
   ConstantArray *InitList = dyn_cast<ConstantArray>(GV->getInitializer());
   if (!InitList) return;



From johnny.chen at apple.com  Wed Apr  6 15:49:02 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Wed, 06 Apr 2011 20:49:02 -0000
Subject: [llvm-commits] [llvm] r129027 - in /llvm/trunk:
 lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
 test/MC/Disassembler/ARM/invalid-MCR-arm.txt
 test/MC/Disassembler/ARM/neon-tests.txt
 test/MC/Disassembler/ARM/thumb-tests.txt
Message-ID: <20110406204902.8C3F42A6C12D@llvm.org>

Author: johnny
Date: Wed Apr  6 15:49:02 2011
New Revision: 129027

URL: http://llvm.org/viewvc/llvm-project?rev=129027&view=rev
Log:
A8.6.92 MCR (Encoding A1): if coproc == '101x' then SEE "Advanced SIMD and VFP"
Since these "Advanced SIMD and VFP" instructions have more specfic encoding bits
specified, if coproc == 10 or 11, we should reject the insn as invalid.

rdar://problem/9239922
rdar://problem/9239596

Added:
    llvm/trunk/test/MC/Disassembler/ARM/invalid-MCR-arm.txt
Modified:
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
    llvm/trunk/test/MC/Disassembler/ARM/neon-tests.txt
    llvm/trunk/test/MC/Disassembler/ARM/thumb-tests.txt

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp?rev=129027&r1=129026&r2=129027&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp Wed Apr  6 15:49:02 2011
@@ -686,8 +686,21 @@
   assert(NumOps >= 4 && "Num of operands >= 4 for coprocessor instr");
 
   unsigned &OpIdx = NumOpsAdded;
+  // A8.6.92
+  // if coproc == '101x' then SEE "Advanced SIMD and VFP"
+  // But since the special instructions have more explicit encoding bits
+  // specified, if coproc == 10 or 11, we should reject it as invalid.
+  unsigned coproc = GetCoprocessor(insn);
+  if ((Opcode == ARM::MCR || Opcode == ARM::MCRR ||
+       Opcode == ARM::MRC || Opcode == ARM::MRRC) &&
+      (coproc == 10 || coproc == 11)) {
+    DEBUG(errs() << "Encoding error: coproc == 10 or 11 for MCR[R]/MR[R]C\n");
+    return false;
+  }
+
   bool OneCopOpc = (Opcode == ARM::MCRR || Opcode == ARM::MCRR2 ||
                     Opcode == ARM::MRRC || Opcode == ARM::MRRC2);
+
   // CDP/CDP2 has no GPR operand; the opc1 operand is also wider (Inst{23-20}).
   bool NoGPR = (Opcode == ARM::CDP || Opcode == ARM::CDP2);
   bool LdStCop = LdStCopOpcode(Opcode);
@@ -700,7 +713,7 @@
                                                        decodeRd(insn))));
     ++OpIdx;
   }
-  MI.addOperand(MCOperand::CreateImm(GetCoprocessor(insn)));
+  MI.addOperand(MCOperand::CreateImm(coproc));
   ++OpIdx;
 
   if (LdStCop) {

Added: llvm/trunk/test/MC/Disassembler/ARM/invalid-MCR-arm.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/invalid-MCR-arm.txt?rev=129027&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/invalid-MCR-arm.txt (added)
+++ llvm/trunk/test/MC/Disassembler/ARM/invalid-MCR-arm.txt Wed Apr  6 15:49:02 2011
@@ -0,0 +1,10 @@
+# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding}
+
+# Opcode=171 Name=MCR Format=ARM_FORMAT_BRFRM(2)
+#  31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
+# -------------------------------------------------------------------------------------------------
+# | 0: 0: 1: 0| 1: 1: 1: 0| 1: 0: 1: 0| 0: 0: 0: 0| 0: 0: 0: 1| 1: 0: 1: 1| 0: 0: 0: 1| 1: 0: 1: 1|
+# -------------------------------------------------------------------------------------------------
+#
+# Encoding error: coproc == 10 or 11 for MCR[R]/MR[R]C
+0x1b 0x1b 0xa0 0x2e

Modified: llvm/trunk/test/MC/Disassembler/ARM/neon-tests.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/neon-tests.txt?rev=129027&r1=129026&r2=129027&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/neon-tests.txt (original)
+++ llvm/trunk/test/MC/Disassembler/ARM/neon-tests.txt Wed Apr  6 15:49:02 2011
@@ -74,3 +74,6 @@
 
 # CHECK:	vmov.s8	r0, d8[1]
 0x30 0x0b 0x58 0xee
+
+# CHECK:	vmov	r1, r0, d11
+0x1b 0x1b 0x50 0xec

Modified: llvm/trunk/test/MC/Disassembler/ARM/thumb-tests.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/thumb-tests.txt?rev=129027&r1=129026&r2=129027&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/thumb-tests.txt (original)
+++ llvm/trunk/test/MC/Disassembler/ARM/thumb-tests.txt Wed Apr  6 15:49:02 2011
@@ -199,3 +199,6 @@
 
 # CHECK:	stc2	p12, cr15, [r9], {137}
 0x89 0xfc 0x89 0xfc
+
+# CHECK:	vmov	r1, r0, d11
+0x50 0xec 0x1b 0x1b



From nicholas at mxc.ca  Wed Apr  6 15:54:07 2011
From: nicholas at mxc.ca (Nick Lewycky)
Date: Wed, 06 Apr 2011 20:54:07 -0000
Subject: [llvm-commits] [llvm] r129028 - /llvm/trunk/include/llvm/Module.h
Message-ID: <20110406205407.C99DB2A6C12D@llvm.org>

Author: nicholas
Date: Wed Apr  6 15:54:07 2011
New Revision: 129028

URL: http://llvm.org/viewvc/llvm-project?rev=129028&view=rev
Log:
Fix typo in doxy-comment.

Modified:
    llvm/trunk/include/llvm/Module.h

Modified: llvm/trunk/include/llvm/Module.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Module.h?rev=129028&r1=129027&r2=129028&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Module.h (original)
+++ llvm/trunk/include/llvm/Module.h Wed Apr  6 15:54:07 2011
@@ -308,7 +308,7 @@
   ///   1. If it does not exist, add a declaration of the global and return it.
   ///   2. Else, the global exists but has the wrong type: return the function
   ///      with a constantexpr cast to the right type.
-  ///   3. Finally, if the existing global is the correct delclaration, return
+  ///   3. Finally, if the existing global is the correct declaration, return
   ///      the existing global.
   Constant *getOrInsertGlobal(StringRef Name, const Type *Ty);
 



From stoklund at 2pi.dk  Wed Apr  6 16:32:38 2011
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Wed, 06 Apr 2011 21:32:38 -0000
Subject: [llvm-commits] [llvm] r129029 -
	/llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
Message-ID: <20110406213238.E21592A6C12D@llvm.org>

Author: stoklund
Date: Wed Apr  6 16:32:38 2011
New Revision: 129029

URL: http://llvm.org/viewvc/llvm-project?rev=129029&view=rev
Log:
Abort the constraint calculation early when all positive bias is lost.

Without any positive bias, there is nothing for the spill placer to to. It will
spill everywhere.

Modified:
    llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp

Modified: llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp?rev=129029&r1=129028&r2=129029&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp Wed Apr  6 16:32:38 2011
@@ -169,7 +169,7 @@
   void LRE_WillShrinkVirtReg(unsigned);
   void LRE_DidCloneVirtReg(unsigned, unsigned);
 
-  float calcSplitConstraints(unsigned);
+  bool addSplitConstraints(unsigned, float&);
   float calcGlobalSplitCost(const BitVector&);
   void splitAroundRegion(LiveInterval&, unsigned, const BitVector&,
                          SmallVectorImpl<LiveInterval*>&);
@@ -409,10 +409,12 @@
 //                              Region Splitting
 //===----------------------------------------------------------------------===//
 
-/// calcSplitConstraints - Fill out the SplitConstraints vector based on the
-/// interference pattern in Physreg and its aliases. Return the static cost of
-/// this split, assuming that all preferences in SplitConstraints are met.
-float RAGreedy::calcSplitConstraints(unsigned PhysReg) {
+/// addSplitConstraints - Fill out the SplitConstraints vector based on the
+/// interference pattern in Physreg and its aliases. Add the constraints to
+/// SpillPlacement and return the static cost of this split in Cost, assuming
+/// that all preferences in SplitConstraints are met.
+/// If it is evident that no bundles will be live, abort early and return false.
+bool RAGreedy::addSplitConstraints(unsigned PhysReg, float &Cost) {
   InterferenceCache::Cursor Intf(IntfCache, PhysReg);
   ArrayRef<SplitAnalysis::BlockInfo> UseBlocks = SA->getUseBlocks();
 
@@ -459,33 +461,58 @@
       StaticCost += Ins * SpillPlacer->getBlockFrequency(BC.Number);
   }
 
-  // Now handle the live-through blocks without uses.
+  // Add constraints for use-blocks. Note that these are the only constraints
+  // that may add a positive bias, it is downhill from here.
+  SpillPlacer->addConstraints(SplitConstraints);
+  if (SpillPlacer->getPositiveNodes() == 0)
+    return false;
+
+  Cost = StaticCost;
+
+  // Now handle the live-through blocks without uses. These can only add
+  // negative bias, so we can abort whenever there are no more positive nodes.
+  // Compute constraints for a group of 8 blocks at a time.
+  const unsigned GroupSize = 8;
+  SpillPlacement::BlockConstraint BCS[GroupSize];
+  unsigned B = 0;
+
   ArrayRef<unsigned> ThroughBlocks = SA->getThroughBlocks();
-  SplitConstraints.resize(UseBlocks.size() + ThroughBlocks.size());
   for (unsigned i = 0; i != ThroughBlocks.size(); ++i) {
-    SpillPlacement::BlockConstraint &BC = SplitConstraints[UseBlocks.size()+i];
-    BC.Number = ThroughBlocks[i];
-    BC.Entry = SpillPlacement::DontCare;
-    BC.Exit = SpillPlacement::DontCare;
-
-    Intf.moveToBlock(BC.Number);
-    if (!Intf.hasInterference())
-      continue;
-
-    // Interference for the live-in value.
-    if (Intf.first() <= Indexes->getMBBStartIdx(BC.Number))
-      BC.Entry = SpillPlacement::MustSpill;
-    else
-      BC.Entry = SpillPlacement::PrefSpill;
+    unsigned Number = ThroughBlocks[i];
+    assert(B < GroupSize && "Array overflow");
+    BCS[B].Number = Number;
+    Intf.moveToBlock(Number);
+
+    if (Intf.hasInterference()) {
+      // Interference for the live-in value.
+      if (Intf.first() <= Indexes->getMBBStartIdx(Number))
+        BCS[B].Entry = SpillPlacement::MustSpill;
+      else
+        BCS[B].Entry = SpillPlacement::PrefSpill;
+
+      // Interference for the live-out value.
+      if (Intf.last() >= SA->getLastSplitPoint(Number))
+        BCS[B].Exit = SpillPlacement::MustSpill;
+      else
+        BCS[B].Exit = SpillPlacement::PrefSpill;
+    } else {
+      // No interference, transparent block.
+      BCS[B].Entry = BCS[B].Exit = SpillPlacement::DontCare;
+    }
 
-    // Interference for the live-out value.
-    if (Intf.last() >= SA->getLastSplitPoint(BC.Number))
-      BC.Exit = SpillPlacement::MustSpill;
-    else
-      BC.Exit = SpillPlacement::PrefSpill;
+    if (++B == GroupSize) {
+      ArrayRef<SpillPlacement::BlockConstraint> Array(BCS, B);
+      SpillPlacer->addConstraints(Array);
+      B = 0;
+      // Abort early when all hope is lost.
+      if (SpillPlacer->getPositiveNodes() == 0)
+        return false;
+    }
   }
 
-  return StaticCost;
+  ArrayRef<SpillPlacement::BlockConstraint> Array(BCS, B);
+  SpillPlacer->addConstraints(Array);
+  return SpillPlacer->getPositiveNodes() != 0;
 }
 
 
@@ -763,16 +790,19 @@
       GlobalCand.resize(Cand+1);
     GlobalCand[Cand].PhysReg = PhysReg;
 
-    float Cost = calcSplitConstraints(PhysReg);
-    DEBUG(dbgs() << PrintReg(PhysReg, TRI) << "\tstatic = " << Cost);
+    SpillPlacer->prepare(LiveBundles);
+    float Cost;
+    if (!addSplitConstraints(PhysReg, Cost)) {
+      DEBUG(dbgs() << PrintReg(PhysReg, TRI) << "\tno positive bias\n");
+      continue;
+    }
+    DEBUG(dbgs() << PrintReg(PhysReg, TRI) << "\tbiased = "
+                 << SpillPlacer->getPositiveNodes() << ", static = " << Cost);
     if (BestReg && Cost >= BestCost) {
-      DEBUG(dbgs() << " higher.\n");
+      DEBUG(dbgs() << " worse than " << PrintReg(BestReg, TRI) << '\n');
       continue;
     }
 
-    SpillPlacer->prepare(LiveBundles);
-    SpillPlacer->addConstraints(SplitConstraints);
-    DEBUG(dbgs() << ", " << SpillPlacer->getPositiveNodes() << " biased nodes");
     SpillPlacer->finish();
 
     // No live bundles, defer to splitSingleBlocks().



From stoklund at 2pi.dk  Wed Apr  6 16:32:41 2011
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Wed, 06 Apr 2011 21:32:41 -0000
Subject: [llvm-commits] [llvm] r129030 -
	/llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
Message-ID: <20110406213241.337912A6C12E@llvm.org>

Author: stoklund
Date: Wed Apr  6 16:32:41 2011
New Revision: 129030

URL: http://llvm.org/viewvc/llvm-project?rev=129030&view=rev
Log:
Also account for the spill code that would be inserted in live-through blocks with interference.

Modified:
    llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp

Modified: llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp?rev=129030&r1=129029&r2=129030&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp Wed Apr  6 16:32:41 2011
@@ -170,7 +170,7 @@
   void LRE_DidCloneVirtReg(unsigned, unsigned);
 
   bool addSplitConstraints(unsigned, float&);
-  float calcGlobalSplitCost(const BitVector&);
+  float calcGlobalSplitCost(unsigned, const BitVector&);
   void splitAroundRegion(LiveInterval&, unsigned, const BitVector&,
                          SmallVectorImpl<LiveInterval*>&);
   void calcGapWeights(unsigned, SmallVectorImpl<float>&);
@@ -520,7 +520,8 @@
 /// pattern in LiveBundles. This cost should be added to the local cost of the
 /// interference pattern in SplitConstraints.
 ///
-float RAGreedy::calcGlobalSplitCost(const BitVector &LiveBundles) {
+float RAGreedy::calcGlobalSplitCost(unsigned PhysReg,
+                                    const BitVector &LiveBundles) {
   float GlobalCost = 0;
   ArrayRef<SplitAnalysis::BlockInfo> UseBlocks = SA->getUseBlocks();
   for (unsigned i = 0; i != UseBlocks.size(); ++i) {
@@ -538,14 +539,24 @@
       GlobalCost += Ins * SpillPlacer->getBlockFrequency(BC.Number);
   }
 
+  InterferenceCache::Cursor Intf(IntfCache, PhysReg);
   ArrayRef<unsigned> ThroughBlocks = SA->getThroughBlocks();
   SplitConstraints.resize(UseBlocks.size() + ThroughBlocks.size());
   for (unsigned i = 0; i != ThroughBlocks.size(); ++i) {
     unsigned Number = ThroughBlocks[i];
     bool RegIn  = LiveBundles[Bundles->getBundle(Number, 0)];
     bool RegOut = LiveBundles[Bundles->getBundle(Number, 1)];
-    if (RegIn != RegOut)
-      GlobalCost += SpillPlacer->getBlockFrequency(Number);
+    if (!RegIn && !RegOut)
+      continue;
+    if (RegIn && RegOut) {
+      // We need double spill code if this block has interference.
+      Intf.moveToBlock(Number);
+      if (Intf.hasInterference())
+        GlobalCost += 2*SpillPlacer->getBlockFrequency(Number);
+      continue;
+    }
+    // live-in / stack-out or stack-in live-out.
+    GlobalCost += SpillPlacer->getBlockFrequency(Number);
   }
   return GlobalCost;
 }
@@ -811,7 +822,7 @@
       continue;
     }
 
-    Cost += calcGlobalSplitCost(LiveBundles);
+    Cost += calcGlobalSplitCost(PhysReg, LiveBundles);
     DEBUG({
       dbgs() << ", total = " << Cost << " with bundles";
       for (int i = LiveBundles.find_first(); i>=0; i = LiveBundles.find_next(i))



From grosbach at apple.com  Wed Apr  6 17:13:52 2011
From: grosbach at apple.com (Jim Grosbach)
Date: Wed, 06 Apr 2011 22:13:52 -0000
Subject: [llvm-commits] [llvm] r129032 -
	/llvm/trunk/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp
Message-ID: <20110406221352.4C3D82A6C12D@llvm.org>

Author: grosbach
Date: Wed Apr  6 17:13:52 2011
New Revision: 129032

URL: http://llvm.org/viewvc/llvm-project?rev=129032&view=rev
Log:
tidy up.

Modified:
    llvm/trunk/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp

Modified: llvm/trunk/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp?rev=129032&r1=129031&r2=129032&view=diff
==============================================================================
--- llvm/trunk/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp (original)
+++ llvm/trunk/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp Wed Apr  6 17:13:52 2011
@@ -104,7 +104,7 @@
 };
 
 void RuntimeDyldImpl::extractFunction(StringRef Name, uint8_t *StartAddress,
-                                       uint8_t *EndAddress) {
+                                      uint8_t *EndAddress) {
   // Allocate memory for the function via the memory manager.
   uintptr_t Size = EndAddress - StartAddress + 1;
   uint8_t *Mem = MemMgr->startFunctionBody(Name.data(), Size);



From johnny.chen at apple.com  Wed Apr  6 17:14:48 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Wed, 06 Apr 2011 22:14:48 -0000
Subject: [llvm-commits] [llvm] r129033 - in /llvm/trunk:
 lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
 test/MC/Disassembler/ARM/invalid-VST2b32_UPD-arm.txt
Message-ID: <20110406221448.D4A502A6C12D@llvm.org>

Author: johnny
Date: Wed Apr  6 17:14:48 2011
New Revision: 129033

URL: http://llvm.org/viewvc/llvm-project?rev=129033&view=rev
Log:
A8.6.393
The ARM disassembler should reject invalid (type, align) encodings as invalid instructions.

So, instead of:
Opcode=1641 Name=VST2b32_UPD Format=ARM_FORMAT_NLdSt(30)
 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
-------------------------------------------------------------------------------------------------
| 1: 1: 1: 1| 0: 1: 0: 0| 0: 0: 0: 0| 0: 0: 1: 1| 0: 0: 0: 0| 1: 0: 0: 1| 1: 0: 1: 1| 0: 0: 1: 1|
-------------------------------------------------------------------------------------------------

	vst2.32	{d0, d2}, [r3, :256], r3

we now have:
Opcode=1641 Name=VST2b32_UPD Format=ARM_FORMAT_NLdSt(30)
 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
-------------------------------------------------------------------------------------------------
| 1: 1: 1: 1| 0: 1: 0: 0| 0: 0: 0: 0| 0: 0: 1: 1| 0: 0: 0: 0| 1: 0: 0: 1| 1: 0: 1: 1| 0: 0: 1: 1|
-------------------------------------------------------------------------------------------------

mc-input.txt:1:1: warning: invalid instruction encoding
0xb3 0x9 0x3 0xf4
^

Added:
    llvm/trunk/test/MC/Disassembler/ARM/invalid-VST2b32_UPD-arm.txt
Modified:
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp?rev=129033&r1=129032&r2=129033&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp Wed Apr  6 17:14:48 2011
@@ -2497,22 +2497,22 @@
   // 0 represents standard alignment, i.e., unaligned data access.
   unsigned alignment = 0;
 
-  if (Name.find("LN") != std::string::npos) {
-    // To one lane instructions.
-    // See, for example, 8.6.317 VLD4 (single 4-element structure to one lane).
+  unsigned elem = 0; // legal values: {1, 2, 3, 4}
+  if (Name.startswith("VST1") || Name.startswith("VLD1"))
+    elem = 1;
 
-    unsigned elem = 0; // legal values: {1, 2, 3, 4}
-    if (Name.startswith("VST1") || Name.startswith("VLD1"))
-      elem = 1;
+  if (Name.startswith("VST2") || Name.startswith("VLD2"))
+    elem = 2;
 
-    if (Name.startswith("VST2") || Name.startswith("VLD2"))
-      elem = 2;
+  if (Name.startswith("VST3") || Name.startswith("VLD3"))
+    elem = 3;
 
-    if (Name.startswith("VST3") || Name.startswith("VLD3"))
-      elem = 3;
+  if (Name.startswith("VST4") || Name.startswith("VLD4"))
+    elem = 4;
 
-    if (Name.startswith("VST4") || Name.startswith("VLD4"))
-      elem = 4;
+  if (Name.find("LN") != std::string::npos) {
+    // To one lane instructions.
+    // See, for example, 8.6.317 VLD4 (single 4-element structure to one lane).
 
     // Utility function takes number of elements, size, and index_align.
     if (!Align4OneLaneInst(elem,
@@ -2533,7 +2533,8 @@
     // See, for example, A8.6.316 VLD4 (multiple 4-element structures).
 
     // Inst{5-4} encodes alignment.
-    switch (slice(insn, 5, 4)) {
+    unsigned align = slice(insn, 5, 4);
+    switch (align) {
     default:
       break;
     case 1:
@@ -2544,22 +2545,42 @@
       alignment = 256; break;
     }
 
-    // n == 2 && type == 0b1001 -> DblSpaced = true
-    if (Name.startswith("VST2") || Name.startswith("VLD2"))
-      DblSpaced = slice(insn, 11, 8) == 9;
-
-    // n == 3 && type == 0b0101 -> DblSpaced = true
-    if (Name.startswith("VST3") || Name.startswith("VLD3")) {
+    unsigned type = slice(insn, 11, 8);
+    // Reject UNDEFINED instructions based on type and align.
+    // Plus set DblSpaced flag where appropriate.
+    switch (elem) {
+    default:
+      break;
+    case 1:
+      // n == 1
+      // A8.6.307 & A8.6.391
+      if ((type == 7  && slice(align, 1, 1) == 1) ||
+          (type == 10 && align == 3) ||
+          (type == 6  && slice(align, 1, 1) == 1))
+        return false;
+      break;
+    case 2:
+      // n == 2 && type == 0b1001 -> DblSpaced = true
+      // A8.6.310 & A8.6.393
+      if ((type == 8 || type == 9) && align == 3)
+        return false;
+      DblSpaced = (type == 9);
+      break;
+    case 3:
+      // n == 3 && type == 0b0101 -> DblSpaced = true
       // A8.6.313 & A8.6.395
-      if (slice(insn, 7, 6) == 3 && slice(insn, 5, 5) == 1)
+      if (slice(insn, 7, 6) == 3 || slice(align, 1, 1) == 1)
         return false;
-
-      DblSpaced = slice(insn, 11, 8) == 5;
+      DblSpaced = (type == 5);
+      break;
+    case 4:
+      // n == 4 && type == 0b0001 -> DblSpaced = true
+      // A8.6.316 & A8.6.397
+      if (slice(insn, 7, 6) == 3)
+        return false;
+      DblSpaced = (type == 1);
+      break;
     }
-
-    // n == 4 && type == 0b0001 -> DblSpaced = true
-    if (Name.startswith("VST4") || Name.startswith("VLD4"))
-      DblSpaced = slice(insn, 11, 8) == 1;
   }
   return DisassembleNLdSt0(MI, Opcode, insn, NumOps, NumOpsAdded,
                            slice(insn, 21, 21) == 0, DblSpaced, alignment/8, B);

Added: llvm/trunk/test/MC/Disassembler/ARM/invalid-VST2b32_UPD-arm.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/invalid-VST2b32_UPD-arm.txt?rev=129033&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/invalid-VST2b32_UPD-arm.txt (added)
+++ llvm/trunk/test/MC/Disassembler/ARM/invalid-VST2b32_UPD-arm.txt Wed Apr  6 17:14:48 2011
@@ -0,0 +1,11 @@
+# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding}
+
+# Opcode=1641 Name=VST2b32_UPD Format=ARM_FORMAT_NLdSt(30)
+#  31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
+# -------------------------------------------------------------------------------------------------
+# | 1: 1: 1: 1| 0: 1: 0: 0| 0: 0: 0: 0| 0: 0: 1: 1| 0: 0: 0: 0| 1: 0: 0: 1| 1: 0: 1: 1| 0: 0: 1: 1|
+# -------------------------------------------------------------------------------------------------
+#
+# A8.6.393 VST2 (multiple 2-element structures)
+# type == '1001' and align == '11' ==> UNDEFINED
+0xb3 0x9 0x3 0xf4



From grosbach at apple.com  Wed Apr  6 17:35:47 2011
From: grosbach at apple.com (Jim Grosbach)
Date: Wed, 06 Apr 2011 22:35:47 -0000
Subject: [llvm-commits] [llvm] r129034 -
	/llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp
Message-ID: <20110406223547.AB35B2A6C12D@llvm.org>

Author: grosbach
Date: Wed Apr  6 17:35:47 2011
New Revision: 129034

URL: http://llvm.org/viewvc/llvm-project?rev=129034&view=rev
Log:
Tidy up.

Modified:
    llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp?rev=129034&r1=129033&r2=129034&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp Wed Apr  6 17:35:47 2011
@@ -86,8 +86,7 @@
   : LLVMTargetMachine(T, TT),
     Subtarget(TT, FS, isThumb),
     JITInfo(),
-    InstrItins(Subtarget.getInstrItineraryData())
-{
+    InstrItins(Subtarget.getInstrItineraryData()) {
   DefRelocModel = getRelocationModel();
 }
 



From dpatel at apple.com  Wed Apr  6 17:37:20 2011
From: dpatel at apple.com (Devang Patel)
Date: Wed, 06 Apr 2011 22:37:20 -0000
Subject: [llvm-commits] [llvm] r129035 -
	/llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp
Message-ID: <20110406223720.AF8E12A6C12D@llvm.org>

Author: dpatel
Date: Wed Apr  6 17:37:20 2011
New Revision: 129035

URL: http://llvm.org/viewvc/llvm-project?rev=129035&view=rev
Log:
While folding branch to a common destination into a predecessor, copy dbg values also.

Modified:
    llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp

Modified: llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp?rev=129035&r1=129034&r2=129035&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp Wed Apr  6 17:37:20 2011
@@ -1403,14 +1403,17 @@
   if (Cond == 0 || (!isa<CmpInst>(Cond) && !isa<BinaryOperator>(Cond)) ||
     Cond->getParent() != BB || !Cond->hasOneUse())
   return false;
-  
+
+  SmallVector<DbgInfoIntrinsic *, 8> DbgValues;
   // Only allow this if the condition is a simple instruction that can be
   // executed unconditionally.  It must be in the same block as the branch, and
   // must be at the front of the block.
   BasicBlock::iterator FrontIt = BB->front();
   // Ignore dbg intrinsics.
-  while (isa<DbgInfoIntrinsic>(FrontIt))
+  while (DbgInfoIntrinsic *DBI = dyn_cast<DbgInfoIntrinsic>(FrontIt)) {
+    DbgValues.push_back(DBI);
     ++FrontIt;
+  }
     
   // Allow a single instruction to be hoisted in addition to the compare
   // that feeds the branch.  We later ensure that any values that _it_ uses
@@ -1431,8 +1434,10 @@
   // Make sure the instruction after the condition is the cond branch.
   BasicBlock::iterator CondIt = Cond; ++CondIt;
   // Ingore dbg intrinsics.
-  while(isa<DbgInfoIntrinsic>(CondIt))
+  while(DbgInfoIntrinsic *DBI = dyn_cast<DbgInfoIntrinsic>(CondIt)) {
+    DbgValues.push_back(DBI);
     ++CondIt;
+  }
   if (&*CondIt != BI) {
     assert (!isa<DbgInfoIntrinsic>(CondIt) && "Hey do not forget debug info!");
     return false;
@@ -1453,7 +1458,7 @@
   BasicBlock *FalseDest = BI->getSuccessor(1);
   if (TrueDest == BB || FalseDest == BB)
     return false;
-  
+
   for (pred_iterator PI = pred_begin(BB), E = pred_end(BB); PI != E; ++PI) {
     BasicBlock *PredBlock = *PI;
     BranchInst *PBI = dyn_cast<BranchInst>(PredBlock->getTerminator());
@@ -1566,6 +1571,14 @@
       AddPredecessorToBlock(FalseDest, PredBlock, BB);
       PBI->setSuccessor(1, FalseDest);
     }
+
+    // Move dbg value intrinsics in PredBlock.
+    for (SmallVector<DbgInfoIntrinsic *, 8>::iterator DBI = DbgValues.begin(),
+           DBE = DbgValues.end(); DBI != DBE; ++DBI) {
+      DbgInfoIntrinsic *DB = *DBI;
+      DB->removeFromParent();
+      DB->insertBefore(PBI);
+    }
     return true;
   }
   return false;



From resistor at mac.com  Wed Apr  6 17:45:55 2011
From: resistor at mac.com (Owen Anderson)
Date: Wed, 06 Apr 2011 22:45:55 -0000
Subject: [llvm-commits] [llvm] r129036 -
	/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
Message-ID: <20110406224555.631E82A6C12D@llvm.org>

Author: resistor
Date: Wed Apr  6 17:45:55 2011
New Revision: 129036

URL: http://llvm.org/viewvc/llvm-project?rev=129036&view=rev
Log:
Cleanups from Jim: remove redundant constraints and a dead FIXME.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=129036&r1=129035&r2=129036&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Wed Apr  6 17:45:55 2011
@@ -940,16 +940,13 @@
 multiclass AI1_adde_sube_s_irs<PatFrag opnode, bit Commutable = 0> {
   def Sri : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, so_imm:$imm),
                 Size4Bytes, IIC_iALUi,
-               [(set GPR:$Rd, (opnode GPR:$Rn, so_imm:$imm))]>,
-               Requires<[IsARM]>;
+               [(set GPR:$Rd, (opnode GPR:$Rn, so_imm:$imm))]>;
   def Srr : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm),
                 Size4Bytes, IIC_iALUr,
-               [(set GPR:$Rd, (opnode GPR:$Rn, GPR:$Rm))]>,
-               Requires<[IsARM]>;
+               [(set GPR:$Rd, (opnode GPR:$Rn, GPR:$Rm))]>;
   def Srs : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, so_reg:$shift),
                 Size4Bytes, IIC_iALUsr,
-               [(set GPR:$Rd, (opnode GPR:$Rn, so_reg:$shift))]>,
-               Requires<[IsARM]>;
+               [(set GPR:$Rd, (opnode GPR:$Rn, so_reg:$shift))]>;
 }
 }
 }
@@ -2298,17 +2295,14 @@
 }
 }
 
-// FIXME: Allow these to be predicated.
 // NOTE: CPSR def omitted because it will be handled by the custom inserter.
 let usesCustomInserter = 1, Uses = [CPSR] in {
 def RSCSri : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, so_imm:$imm),
                   Size4Bytes, IIC_iALUi,
-                  [(set GPR:$Rd, (sube_dead_carry so_imm:$imm, GPR:$Rn))]>,
-                  Requires<[IsARM]>;
+                  [(set GPR:$Rd, (sube_dead_carry so_imm:$imm, GPR:$Rn))]>;
 def RSCSrs : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, so_reg:$shift),
                   Size4Bytes, IIC_iALUsr,
-                  [(set GPR:$Rd, (sube_dead_carry so_reg:$shift, GPR:$Rn))]>,
-                  Requires<[IsARM]>;
+                  [(set GPR:$Rd, (sube_dead_carry so_reg:$shift, GPR:$Rn))]>;
 }
 
 // (sub X, imm) gets canonicalized to (add X, -imm).  Match this form.



From resistor at mac.com  Wed Apr  6 18:35:59 2011
From: resistor at mac.com (Owen Anderson)
Date: Wed, 06 Apr 2011 23:35:59 -0000
Subject: [llvm-commits] [llvm] r129038 - in /llvm/trunk:
 lib/Target/ARM/ARMBaseInstrInfo.cpp test/CodeGen/ARM/sub.ll
Message-ID: <20110406233559.B93972A6C12D@llvm.org>

Author: resistor
Date: Wed Apr  6 18:35:59 2011
New Revision: 129038

URL: http://llvm.org/viewvc/llvm-project?rev=129038&view=rev
Log:
Teach the ARM peephole optimizer that RSB, RSC, ADC, and SBC can be used for folded comparisons, just like ADD and SUB.

Modified:
    llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
    llvm/trunk/test/CodeGen/ARM/sub.ll

Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=129038&r1=129037&r2=129038&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Wed Apr  6 18:35:59 2011
@@ -1618,10 +1618,17 @@
   // Set the "zero" bit in CPSR.
   switch (MI->getOpcode()) {
   default: break;
+  case ARM::RSBri:
+  case ARM::RSCri:
   case ARM::ADDri:
+  case ARM::ADCri:
   case ARM::SUBri:
+  case ARM::SBCri:
+  case ARM::t2RSBri:
   case ARM::t2ADDri:
-  case ARM::t2SUBri: {
+  case ARM::t2ADCri:
+  case ARM::t2SUBri:
+  case ARM::t2SBCri: {
     // Scan forward for the use of CPSR, if it's a conditional code requires
     // checking of V bit, then this is not safe to do. If we can't find the
     // CPSR use (i.e. used in another block), then it's not safe to perform

Modified: llvm/trunk/test/CodeGen/ARM/sub.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/sub.ll?rev=129038&r1=129037&r2=129038&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/sub.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/sub.ll Wed Apr  6 18:35:59 2011
@@ -27,3 +27,12 @@
    ret i64 %tmp
 }
 
+define i32 @f4(i32 %x) {
+entry:
+; CHECK: f4
+; CHECK: rsbs
+  %sub = sub i32 1, %x
+  %cmp = icmp ugt i32 %sub, 0
+  %sel = select i1 %cmp, i32 1, i32 %sub
+  ret i32 %sel
+}



From nicholas at mxc.ca  Wed Apr  6 19:03:25 2011
From: nicholas at mxc.ca (Nick Lewycky)
Date: Thu, 07 Apr 2011 00:03:25 -0000
Subject: [llvm-commits] [llvm] r129039 -
	/llvm/trunk/include/llvm/Support/IRBuilder.h
Message-ID: <20110407000325.C6B652A6C12D@llvm.org>

Author: nicholas
Date: Wed Apr  6 19:03:25 2011
New Revision: 129039

URL: http://llvm.org/viewvc/llvm-project?rev=129039&view=rev
Log:
Add support for ArrayRef in IRBuilder's CreateCall.

Modified:
    llvm/trunk/include/llvm/Support/IRBuilder.h

Modified: llvm/trunk/include/llvm/Support/IRBuilder.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/IRBuilder.h?rev=129039&r1=129038&r2=129039&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/IRBuilder.h (original)
+++ llvm/trunk/include/llvm/Support/IRBuilder.h Wed Apr  6 19:03:25 2011
@@ -17,6 +17,7 @@
 
 #include "llvm/Instructions.h"
 #include "llvm/BasicBlock.h"
+#include "llvm/ADT/ArrayRef.h"
 #include "llvm/ADT/Twine.h"
 #include "llvm/Support/ConstantFolder.h"
 
@@ -1102,6 +1103,11 @@
     return Insert(CallInst::Create(Callee, Args, Args+5), Name);
   }
 
+  CallInst *CreateCall(Value *Callee, ArrayRef<Value *> Arg,
+                       const Twine &Name = "") {
+    return Insert(CallInst::Create(Callee, Arg.begin(), Arg.end(), Name));
+  }
+
   template<typename RandomAccessIterator>
   CallInst *CreateCall(Value *Callee, RandomAccessIterator ArgBegin,
                        RandomAccessIterator ArgEnd, const Twine &Name = "") {



From nicholas at mxc.ca  Wed Apr  6 19:14:29 2011
From: nicholas at mxc.ca (Nick Lewycky)
Date: Thu, 07 Apr 2011 00:14:29 -0000
Subject: [llvm-commits] [llvm] r129040 - /llvm/trunk/lib/VMCore/IRBuilder.cpp
Message-ID: <20110407001429.E750E2A6C12D@llvm.org>

Author: nicholas
Date: Wed Apr  6 19:14:29 2011
New Revision: 129040

URL: http://llvm.org/viewvc/llvm-project?rev=129040&view=rev
Log:
Set unnamed_addr on strings created through the IRBuilder.

Modified:
    llvm/trunk/lib/VMCore/IRBuilder.cpp

Modified: llvm/trunk/lib/VMCore/IRBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/IRBuilder.cpp?rev=129040&r1=129039&r2=129040&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/IRBuilder.cpp (original)
+++ llvm/trunk/lib/VMCore/IRBuilder.cpp Wed Apr  6 19:14:29 2011
@@ -30,6 +30,7 @@
                                           true, GlobalValue::InternalLinkage,
                                           StrConstant, "", 0, false);
   GV->setName(Name);
+  GV->setUnnamedAddr(true);
   return GV;
 }
 



From dpatel at apple.com  Wed Apr  6 19:30:15 2011
From: dpatel at apple.com (Devang Patel)
Date: Thu, 07 Apr 2011 00:30:15 -0000
Subject: [llvm-commits] [llvm] r129041 -
	/llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp
Message-ID: <20110407003015.6D05B2A6C12D@llvm.org>

Author: dpatel
Date: Wed Apr  6 19:30:15 2011
New Revision: 129041

URL: http://llvm.org/viewvc/llvm-project?rev=129041&view=rev
Log:
Simplify. isIdenticalToWhenDefined() checks opcode.

Modified:
    llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp

Modified: llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp?rev=129041&r1=129040&r2=129041&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp Wed Apr  6 19:30:15 2011
@@ -811,8 +811,7 @@
     I1 = BB1_Itr++;
   while (isa<DbgInfoIntrinsic>(I2))
     I2 = BB2_Itr++;
-  if (I1->getOpcode() != I2->getOpcode() || isa<PHINode>(I1) ||
-      !I1->isIdenticalToWhenDefined(I2) ||
+  if (isa<PHINode>(I1) || !I1->isIdenticalToWhenDefined(I2) ||
       (isa<InvokeInst>(I1) && !isSafeToHoistInvoke(BB1, BB2, I1, I2)))
     return false;
 
@@ -840,8 +839,7 @@
     I2 = BB2_Itr++;
     while (isa<DbgInfoIntrinsic>(I2))
       I2 = BB2_Itr++;
-  } while (I1->getOpcode() == I2->getOpcode() &&
-           I1->isIdenticalToWhenDefined(I2));
+  } while (I1->isIdenticalToWhenDefined(I2));
 
   return true;
 



From johnny.chen at apple.com  Wed Apr  6 19:50:25 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Thu, 07 Apr 2011 00:50:25 -0000
Subject: [llvm-commits] [llvm] r129042 - in /llvm/trunk:
 lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
 test/MC/Disassembler/ARM/invalid-SMLAD-arm.txt
Message-ID: <20110407005025.6EF752A6C12D@llvm.org>

Author: johnny
Date: Wed Apr  6 19:50:25 2011
New Revision: 129042

URL: http://llvm.org/viewvc/llvm-project?rev=129042&view=rev
Log:
Should also check SMLAD for invalid register values.

rdar://problem/9246650

Added:
    llvm/trunk/test/MC/Disassembler/ARM/invalid-SMLAD-arm.txt
Modified:
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp?rev=129042&r1=129041&r2=129042&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp Wed Apr  6 19:50:25 2011
@@ -536,18 +536,22 @@
     return false;
   case ARM::MLA:     case ARM::MLS:     case ARM::SMLABB:  case ARM::SMLABT:
   case ARM::SMLATB:  case ARM::SMLATT:  case ARM::SMLAWB:  case ARM::SMLAWT:
-  case ARM::SMMLA:   case ARM::SMMLS:   case ARM::SMLSD:   case ARM::SMLSDX:
+  case ARM::SMMLA:   case ARM::SMMLS:
     if (R19_16 == 15 || R15_12 == 15 || R11_8 == 15 || R3_0 == 15)
       return true;
     return false;
   case ARM::MUL:     case ARM::SMMUL:   case ARM::SMULBB:  case ARM::SMULBT:
   case ARM::SMULTB:  case ARM::SMULTT:  case ARM::SMULWB:  case ARM::SMULWT:
+  case ARM::SMUAD:   case ARM::SMUADX:
+  // A8.6.167 SMLAD & A8.6.172 SMLSD
+  case ARM::SMLAD:   case ARM::SMLADX:  case ARM::SMLSD:   case ARM::SMLSDX:
     if (R19_16 == 15 || R11_8 == 15 || R3_0 == 15)
       return true;
     return false;
   case ARM::SMLAL:   case ARM::SMULL:   case ARM::UMAAL:   case ARM::UMLAL:
-  case ARM::UMULL:   case ARM::SMLALBB: case ARM::SMLALBT: case ARM::SMLALTB:
-  case ARM::SMLALTT: case ARM::SMLSLD:  case ARM::SMLSLDX:
+  case ARM::UMULL:
+  case ARM::SMLALBB: case ARM::SMLALBT: case ARM::SMLALTB: case ARM::SMLALTT:
+  case ARM::SMLALD:  case ARM::SMLALDX: case ARM::SMLSLD:  case ARM::SMLSLDX:
     if (R19_16 == 15 || R15_12 == 15 || R11_8 == 15 || R3_0 == 15)
       return true;
     if (R19_16 == R15_12)
@@ -558,14 +562,16 @@
 
 // Multiply Instructions.
 // MLA, MLS, SMLABB, SMLABT, SMLATB, SMLATT, SMLAWB, SMLAWT, SMMLA, SMMLS,
-// SMLSD, SMLSDX:
+// SMLAD, SMLADX, SMLSD, SMLSDX:
 //     Rd{19-16} Rn{3-0} Rm{11-8} Ra{15-12}
+// But note that register checking for {SMLAD, SMLADX, SMLSD, SMLSDX} is
+// only for {d, n, m}.
 //
-// MUL, SMMUL, SMULBB, SMULBT, SMULTB, SMULTT, SMULWB, SMULWT:
+// MUL, SMMUL, SMULBB, SMULBT, SMULTB, SMULTT, SMULWB, SMULWT, SMUAD, SMUADX:
 //     Rd{19-16} Rn{3-0} Rm{11-8}
 //
 // SMLAL, SMULL, UMAAL, UMLAL, UMULL, SMLALBB, SMLALBT, SMLALTB, SMLALTT,
-// SMLSLD
+// SMLALD, SMLADLX, SMLSLD, SMLSLDX:
 //     RdLo{15-12} RdHi{19-16} Rn{3-0} Rm{11-8}
 //
 // The mapping of the multiply registers to the "regular" ARM registers, where

Added: llvm/trunk/test/MC/Disassembler/ARM/invalid-SMLAD-arm.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/invalid-SMLAD-arm.txt?rev=129042&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/invalid-SMLAD-arm.txt (added)
+++ llvm/trunk/test/MC/Disassembler/ARM/invalid-SMLAD-arm.txt Wed Apr  6 19:50:25 2011
@@ -0,0 +1,11 @@
+# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding}
+
+# Opcode=284 Name=SMLAD Format=ARM_FORMAT_MULFRM(1)
+#  31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
+# -------------------------------------------------------------------------------------------------
+# | 1: 0: 0: 1| 0: 1: 1: 1| 0: 0: 0: 0| 1: 1: 1: 1| 0: 1: 1: 0| 1: 0: 0: 0| 0: 0: 0: 1| 1: 0: 1: 1|
+# -------------------------------------------------------------------------------------------------
+#
+# A8.6.167
+# if d == 15 || n == 15 | m == 15 then UNPREDICTABLE
+0x1b 0x68 0xf 0x97



From evan.cheng at apple.com  Wed Apr  6 19:56:37 2011
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 07 Apr 2011 00:56:37 -0000
Subject: [llvm-commits] [llvm] r129044 -
	/llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp
Message-ID: <20110407005637.C08B82A6C12D@llvm.org>

Author: evancheng
Date: Wed Apr  6 19:56:37 2011
New Revision: 129044

URL: http://llvm.org/viewvc/llvm-project?rev=129044&view=rev
Log:
Remove dead code. rdar://9221736.

Modified:
    llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp

Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp?rev=129044&r1=129043&r2=129044&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp (original)
+++ llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp Wed Apr  6 19:56:37 2011
@@ -282,11 +282,6 @@
 void AsmPrinter::EmitCFIFrameMoves(const std::vector<MachineMove> &Moves) const {
   const TargetRegisterInfo *RI = TM.getRegisterInfo();
 
-  int stackGrowth = TM.getTargetData()->getPointerSize();
-  if (TM.getFrameLowering()->getStackGrowthDirection() !=
-      TargetFrameLowering::StackGrowsUp)
-    stackGrowth *= -1;
-
   for (unsigned i = 0, N = Moves.size(); i < N; ++i) {
     const MachineMove &Move = Moves[i];
     MCSymbol *Label = Move.getLabel();



From evan.cheng at apple.com  Wed Apr  6 19:58:44 2011
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 07 Apr 2011 00:58:44 -0000
Subject: [llvm-commits] [llvm] r129045 - in /llvm/trunk:
 include/llvm/Target/TargetOptions.h lib/Target/ARM/ARMISelLowering.cpp
 lib/Target/TargetMachine.cpp test/CodeGen/ARM/divmod.ll
Message-ID: <20110407005844.EB88C2A6C12D@llvm.org>

Author: evancheng
Date: Wed Apr  6 19:58:44 2011
New Revision: 129045

URL: http://llvm.org/viewvc/llvm-project?rev=129045&view=rev
Log:
Change -arm-divmod-libcall to a target neutral option.

Modified:
    llvm/trunk/include/llvm/Target/TargetOptions.h
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
    llvm/trunk/lib/Target/TargetMachine.cpp
    llvm/trunk/test/CodeGen/ARM/divmod.ll

Modified: llvm/trunk/include/llvm/Target/TargetOptions.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetOptions.h?rev=129045&r1=129044&r2=129045&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetOptions.h (original)
+++ llvm/trunk/include/llvm/Target/TargetOptions.h Wed Apr  6 19:58:44 2011
@@ -157,6 +157,10 @@
   /// wth earlier copy coalescing.
   extern bool StrongPHIElim;
 
+  /// HasDivModLibcall - This flag indicates whether the target compiler
+  /// runtime library has integer divmod libcalls.
+  extern bool HasDivModLibcall;
+
 } // End llvm namespace
 
 #endif

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=129045&r1=129044&r2=129045&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Wed Apr  6 19:58:44 2011
@@ -72,11 +72,6 @@
   cl::desc("Enable / disable ARM interworking (for debugging only)"),
   cl::init(true));
 
-static cl::opt<bool>
-UseDivMod("arm-divmod-libcall", cl::Hidden,
-  cl::desc("Use __{u}divmod libcalls for div / rem pairs"),
-  cl::init(false));
-
 void ARMTargetLowering::addTypeForNEON(EVT VT, EVT PromotedLdStVT,
                                        EVT PromotedBitwiseVT) {
   if (VT != PromotedLdStVT) {
@@ -398,7 +393,7 @@
     setLibcallCallingConv(RTLIB::UDIV_I32, CallingConv::ARM_AAPCS);
   }
 
-  if (UseDivMod) {
+  if (HasDivModLibcall) {
     setLibcallName(RTLIB::SDIVREM_I32, "__divmodsi4");
     setLibcallName(RTLIB::UDIVREM_I32, "__udivmodsi4");
   }

Modified: llvm/trunk/lib/Target/TargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetMachine.cpp?rev=129045&r1=129044&r2=129045&view=diff
==============================================================================
--- llvm/trunk/lib/Target/TargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/TargetMachine.cpp Wed Apr  6 19:58:44 2011
@@ -48,6 +48,7 @@
   bool RealignStack;
   bool DisableJumpTables;
   bool StrongPHIElim;
+  bool HasDivModLibcall;
   bool AsmVerbosityDefault(false);
 }
 
@@ -205,6 +206,11 @@
   cl::desc("Use strong PHI elimination."),
   cl::location(StrongPHIElim),
   cl::init(false));
+static cl::opt<bool, true>
+UseDivMod("use-divmod-libcall",
+  cl::desc("Use __{u}divmod libcalls for div / rem pairs"),
+  cl::location(HasDivModLibcall),
+  cl::init(false));
 static cl::opt<bool>
 DataSections("fdata-sections",
   cl::desc("Emit data into separate sections"),

Modified: llvm/trunk/test/CodeGen/ARM/divmod.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/divmod.ll?rev=129045&r1=129044&r2=129045&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/divmod.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/divmod.ll Wed Apr  6 19:58:44 2011
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=arm-apple-darwin -arm-divmod-libcall | FileCheck %s
+; RUN: llc < %s -mtriple=arm-apple-darwin -use-divmod-libcall | FileCheck %s
 
 define void @foo(i32 %x, i32 %y, i32* nocapture %P) nounwind ssp {
 entry:



From johnny.chen at apple.com  Wed Apr  6 20:05:52 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Thu, 07 Apr 2011 01:05:52 -0000
Subject: [llvm-commits] [llvm] r129047 - in /llvm/trunk:
 lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
 test/MC/Disassembler/ARM/neon-tests.txt
Message-ID: <20110407010552.D60AE2A6C12D@llvm.org>

Author: johnny
Date: Wed Apr  6 20:05:52 2011
New Revision: 129047

URL: http://llvm.org/viewvc/llvm-project?rev=129047&view=rev
Log:
The ARM disassembler was not recognizing USADA8 instruction.  Need to add checking for register values
for USAD8 and USADA8.

rdar://problem/9247060

Modified:
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
    llvm/trunk/test/MC/Disassembler/ARM/neon-tests.txt

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp?rev=129047&r1=129046&r2=129047&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp Wed Apr  6 20:05:52 2011
@@ -536,7 +536,7 @@
     return false;
   case ARM::MLA:     case ARM::MLS:     case ARM::SMLABB:  case ARM::SMLABT:
   case ARM::SMLATB:  case ARM::SMLATT:  case ARM::SMLAWB:  case ARM::SMLAWT:
-  case ARM::SMMLA:   case ARM::SMMLS:
+  case ARM::SMMLA:   case ARM::SMMLS:   case ARM::USADA8:
     if (R19_16 == 15 || R15_12 == 15 || R11_8 == 15 || R3_0 == 15)
       return true;
     return false;
@@ -545,6 +545,7 @@
   case ARM::SMUAD:   case ARM::SMUADX:
   // A8.6.167 SMLAD & A8.6.172 SMLSD
   case ARM::SMLAD:   case ARM::SMLADX:  case ARM::SMLSD:   case ARM::SMLSDX:
+  case ARM::USAD8:
     if (R19_16 == 15 || R11_8 == 15 || R3_0 == 15)
       return true;
     return false;
@@ -562,12 +563,13 @@
 
 // Multiply Instructions.
 // MLA, MLS, SMLABB, SMLABT, SMLATB, SMLATT, SMLAWB, SMLAWT, SMMLA, SMMLS,
-// SMLAD, SMLADX, SMLSD, SMLSDX:
+// SMLAD, SMLADX, SMLSD, SMLSDX, USADA8 (for convenience):
 //     Rd{19-16} Rn{3-0} Rm{11-8} Ra{15-12}
 // But note that register checking for {SMLAD, SMLADX, SMLSD, SMLSDX} is
 // only for {d, n, m}.
 //
-// MUL, SMMUL, SMULBB, SMULBT, SMULTB, SMULTT, SMULWB, SMULWT, SMUAD, SMUADX:
+// MUL, SMMUL, SMULBB, SMULBT, SMULTB, SMULTT, SMULWB, SMULWT, SMUAD, SMUADX,
+// USAD8 (for convenience):
 //     Rd{19-16} Rn{3-0} Rm{11-8}
 //
 // SMLAL, SMULL, UMAAL, UMLAL, UMULL, SMLALBB, SMLALBT, SMLALTB, SMLALTT,

Modified: llvm/trunk/test/MC/Disassembler/ARM/neon-tests.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/neon-tests.txt?rev=129047&r1=129046&r2=129047&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/neon-tests.txt (original)
+++ llvm/trunk/test/MC/Disassembler/ARM/neon-tests.txt Wed Apr  6 20:05:52 2011
@@ -77,3 +77,6 @@
 
 # CHECK:	vmov	r1, r0, d11
 0x1b 0x1b 0x50 0xec
+
+# CHECK:	usada8mi	r8, r9, r5, r9
+0x19 0x95 0x88 0x47



From eli.friedman at gmail.com  Wed Apr  6 20:35:06 2011
From: eli.friedman at gmail.com (Eli Friedman)
Date: Thu, 07 Apr 2011 01:35:06 -0000
Subject: [llvm-commits] [llvm] r129049 - in /llvm/trunk:
 lib/Transforms/Scalar/LICM.cpp test/Analysis/BasicAA/store-promote.ll
 test/Transforms/LICM/2007-10-01-PromoteSafeValue.ll
 test/Transforms/LICM/2011-04-06-PromoteResultOfPromotion.ll
Message-ID: <20110407013506.8E69D2A6C12D@llvm.org>

Author: efriedma
Date: Wed Apr  6 20:35:06 2011
New Revision: 129049

URL: http://llvm.org/viewvc/llvm-project?rev=129049&view=rev
Log:
PR9634: Don't unconditionally tell the AliasSetTracker that the PreheaderLoad
is equivalent to any other relevant value; it isn't true in general.
If it is equivalent, the LoopPromoter will tell the AST the equivalence.
Also, delete the PreheaderLoad if it is unused.

Chris, since you were the last one to make major changes here, can you check
that this is sane?


Added:
    llvm/trunk/test/Transforms/LICM/2011-04-06-PromoteResultOfPromotion.ll
Modified:
    llvm/trunk/lib/Transforms/Scalar/LICM.cpp
    llvm/trunk/test/Analysis/BasicAA/store-promote.ll
    llvm/trunk/test/Transforms/LICM/2007-10-01-PromoteSafeValue.ll

Modified: llvm/trunk/lib/Transforms/Scalar/LICM.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LICM.cpp?rev=129049&r1=129048&r2=129049&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LICM.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LICM.cpp Wed Apr  6 20:35:06 2011
@@ -743,30 +743,13 @@
                  Preheader->getTerminator());
   SSA.AddAvailableValue(Preheader, PreheaderLoad);
 
-  // Copy any value stored to or loaded from a must-alias of the pointer.
-  if (PreheaderLoad->getType()->isPointerTy()) {
-    Value *SomeValue;
-    if (LoadInst *LI = dyn_cast<LoadInst>(LoopUses[0]))
-      SomeValue = LI;
-    else
-      SomeValue = cast<StoreInst>(LoopUses[0])->getValueOperand();
-    
-    CurAST->copyValue(SomeValue, PreheaderLoad);
-  }
-
   // Rewrite all the loads in the loop and remember all the definitions from
   // stores in the loop.
   Promoter.run(LoopUses);
-  
-  // If the preheader load is itself a pointer, we need to tell alias analysis
-  // about the new pointer we created in the preheader block and about any PHI
-  // nodes that just got inserted.
-  if (PreheaderLoad->getType()->isPointerTy()) {
-    for (unsigned i = 0, e = NewPHIs.size(); i != e; ++i)
-      CurAST->copyValue(PreheaderLoad, NewPHIs[i]);
-  }
-  
-  // fwew, we're done!
+
+  // If the SSAUpdater didn't use the load in the preheader, just zap it now.
+  if (PreheaderLoad->use_empty())
+    PreheaderLoad->eraseFromParent();
 }
 
 

Modified: llvm/trunk/test/Analysis/BasicAA/store-promote.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/BasicAA/store-promote.ll?rev=129049&r1=129048&r2=129049&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/BasicAA/store-promote.ll (original)
+++ llvm/trunk/test/Analysis/BasicAA/store-promote.ll Wed Apr  6 20:35:06 2011
@@ -24,7 +24,7 @@
         
 ; The Loop block should be empty after the load/store are promoted.
 ; CHECK:     @test1
-; CHECK:        load i32* @B
+; CHECK:        load i32* @A
 ; CHECK:      Loop:
 ; CHECK-NEXT:   br i1 %c, label %Out, label %Loop
 ; CHECK:      Out:

Modified: llvm/trunk/test/Transforms/LICM/2007-10-01-PromoteSafeValue.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LICM/2007-10-01-PromoteSafeValue.ll?rev=129049&r1=129048&r2=129049&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/LICM/2007-10-01-PromoteSafeValue.ll (original)
+++ llvm/trunk/test/Transforms/LICM/2007-10-01-PromoteSafeValue.ll Wed Apr  6 20:35:06 2011
@@ -1,4 +1,4 @@
-; RUN: opt < %s -licm -S | grep promoted
+; RUN: opt < %s -licm -S | FileCheck %s
 ; Promote value if at least one use is safe
 
 
@@ -15,6 +15,8 @@
         store i32 40, i32* %p
         br label %loop.head
 
+; CHECK: exit:
+; CHECK: store i32 20, i32* %p
 exit:           ; preds = %loop.head
         ret i32 0
 }

Added: llvm/trunk/test/Transforms/LICM/2011-04-06-PromoteResultOfPromotion.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LICM/2011-04-06-PromoteResultOfPromotion.ll?rev=129049&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LICM/2011-04-06-PromoteResultOfPromotion.ll (added)
+++ llvm/trunk/test/Transforms/LICM/2011-04-06-PromoteResultOfPromotion.ll Wed Apr  6 20:35:06 2011
@@ -0,0 +1,37 @@
+; RUN: opt < %s -tbaa -licm -S | FileCheck %s
+; PR9634
+
+ at g_58 = common global i32 0, align 4
+ at g_116 = common global i32* null, align 8
+
+define void @f() nounwind {
+
+; CHECK: entry:
+; CHECK: alloca [9 x i16]
+; CHECK: load i32* @g_58
+; CHECK: br label %for.body
+
+entry:
+  %l_87.i = alloca [9 x i16], align 16
+  br label %for.body
+
+for.body:                                         ; preds = %entry, %for.inc
+  %inc12 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
+  store i32* @g_58, i32** @g_116, align 8, !tbaa !0
+  %tmp2 = load i32** @g_116, align 8, !tbaa !0
+  %tmp3 = load i32* %tmp2, !tbaa !4
+  %or = or i32 %tmp3, 10
+  store i32 %or, i32* %tmp2, !tbaa !4
+  %inc = add nsw i32 %inc12, 1
+  %cmp = icmp slt i32 %inc, 4
+  br i1 %cmp, label %for.body, label %for.end
+
+for.end:                                          ; preds = %for.inc
+  ret void
+}
+
+!0 = metadata !{metadata !"any pointer", metadata !1}
+!1 = metadata !{metadata !"omnipotent char", metadata !2}
+!2 = metadata !{metadata !"Simple C/C++ TBAA", null}
+!3 = metadata !{metadata !"short", metadata !1}
+!4 = metadata !{metadata !"int", metadata !1}



From johnny.chen at apple.com  Wed Apr  6 20:37:34 2011
From: johnny.chen at apple.com (Johnny Chen)
Date: Thu, 07 Apr 2011 01:37:34 -0000
Subject: [llvm-commits] [llvm] r129050 - in /llvm/trunk:
 lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
 test/MC/Disassembler/ARM/invalid-MSRi-arm.txt
Message-ID: <20110407013734.BEFBF2A6C12D@llvm.org>

Author: johnny
Date: Wed Apr  6 20:37:34 2011
New Revision: 129050

URL: http://llvm.org/viewvc/llvm-project?rev=129050&view=rev
Log:
Sanity check MSRi for invalid mask values and reject it as invalid.

rdar://problem/9246844

Added:
    llvm/trunk/test/MC/Disassembler/ARM/invalid-MSRi-arm.txt
Modified:
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp?rev=129050&r1=129049&r2=129050&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp Wed Apr  6 20:37:34 2011
@@ -836,6 +836,11 @@
   // MSRi take a mask, followed by one so_imm operand. The mask contains the
   // R Bit in bit 4, and the special register fields in bits 3-0.
   if (Opcode == ARM::MSRi) {
+    // A5.2.11 MSR (immediate), and hints & B6.1.6 MSR (immediate)
+    // The hints instructions have more specific encodings, so if mask == 0,
+    // we should reject this as an invalid instruction.
+    if (slice(insn, 19, 16) == 0)
+      return false;
     MI.addOperand(MCOperand::CreateImm(slice(insn, 22, 22) << 4 /* R Bit */ |
                                        slice(insn, 19, 16) /* Special Reg */ ));
     // SOImm is 4-bit rotate amount in bits 11-8 with 8-bit imm in bits 7-0.

Added: llvm/trunk/test/MC/Disassembler/ARM/invalid-MSRi-arm.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/invalid-MSRi-arm.txt?rev=129050&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/invalid-MSRi-arm.txt (added)
+++ llvm/trunk/test/MC/Disassembler/ARM/invalid-MSRi-arm.txt Wed Apr  6 20:37:34 2011
@@ -0,0 +1,12 @@
+# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding}
+
+# Opcode=206 Name=MSRi Format=ARM_FORMAT_BRFRM(2)
+#  31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
+# -------------------------------------------------------------------------------------------------
+# | 0: 0: 0: 0| 0: 0: 1: 1| 0: 0: 1: 0| 0: 0: 0: 0| 1: 1: 1: 1| 0: 0: 0: 1| 1: 0: 1: 0| 0: 1: 1: 1|
+# -------------------------------------------------------------------------------------------------
+#
+# A5.2.11 MSR (immediate), and hints & B6.1.6 MSR (immediate)
+# The hints instructions have more specific encodings, so if mask == 0,
+# we should reject this as an invalid instruction.
+0xa7 0xf1 0x20 0x3



From scallanan at apple.com  Wed Apr  6 20:56:02 2011
From: scallanan at apple.com (Sean Callanan)
Date: Thu, 07 Apr 2011 01:56:02 -0000
Subject: [llvm-commits] [llvm] r129051 -
	/llvm/trunk/lib/MC/MCDisassembler/EDInst.cpp
Message-ID: <20110407015602.17ED22A6C12D@llvm.org>

Author: spyffe
Date: Wed Apr  6 20:56:01 2011
New Revision: 129051

URL: http://llvm.org/viewvc/llvm-project?rev=129051&view=rev
Log:
Fixed a bug where missing EDInstInfo would cause
tokenization to crash and burn.

Modified:
    llvm/trunk/lib/MC/MCDisassembler/EDInst.cpp

Modified: llvm/trunk/lib/MC/MCDisassembler/EDInst.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCDisassembler/EDInst.cpp?rev=129051&r1=129050&r2=129051&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MCDisassembler/EDInst.cpp (original)
+++ llvm/trunk/lib/MC/MCDisassembler/EDInst.cpp Wed Apr  6 20:56:01 2011
@@ -165,6 +165,9 @@
 int EDInst::tokenize() {
   if (TokenizeResult.valid())
     return TokenizeResult.result();
+    
+  if (ThisInstInfo == NULL)
+    return TokenizeResult.setResult(-1);
   
   if (stringify())
     return TokenizeResult.setResult(-1);



From sabre at nondot.org  Wed Apr  6 22:08:22 2011
From: sabre at nondot.org (Chris Lattner)
Date: Thu, 07 Apr 2011 03:08:22 -0000
Subject: [llvm-commits] [llvm] r129052 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <20110407030823.0BD202A6C12D@llvm.org>

Author: lattner
Date: Wed Apr  6 22:08:22 2011
New Revision: 129052

URL: http://llvm.org/viewvc/llvm-project?rev=129052&view=rev
Log:
add a few late stragglers.

Modified:
    llvm/trunk/docs/ReleaseNotes.html

Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=129052&r1=129051&r2=129052&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Wed Apr  6 22:08:22 2011
@@ -228,7 +228,37 @@
 </div>
 
 
+<!--=========================================================================-->
+<h2>
+<a name="LLBrowse">LLBrowse: IR Browser</a>
+</h2>
 
+<div class="doc_text">
+<p>
+<a href="http://llvm.org/svn/llvm-project/llbrowse/trunk/doc/LLBrowse.html">
+  LLBrowse</a> is an interactive viewer for LLVM modules. It can load any LLVM
+  module and displays its contents as an expandable tree view, facilitating an
+  easy way to inspect types, functions, global variables, or metadata nodes. It
+  is fully cross-platform, being based on the popular wxWidgets GUI toolkit.
+</p>
+</div>
+
+<!--=========================================================================-->
+<h2>
+<a name="vmkit">VMKit</a>
+</h2>
+
+<div class="doc_text">
+<p>The <a href="http://vmkit.llvm.org/">VMKit project</a> is an implementation
+  of a Java Virtual Machine (Java VM or JVM) that uses LLVM for static and
+  just-in-time compilation. As of LLVM 2.9, VMKit now supports generational
+  garbage collectors. The garbage collectors are provided by the MMTk framework,
+  and VMKit can be configured to use one of the numerous implemented collectors
+  of MMTk.
+</p>
+</div>
+  
+  
 <!--=========================================================================-->
 <!--
 <h2>



From sabre at nondot.org  Wed Apr  6 22:09:21 2011
From: sabre at nondot.org (Chris Lattner)
Date: Thu, 07 Apr 2011 03:09:21 -0000
Subject: [llvm-commits] [llvm] r129053 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <20110407030922.08DB22A6C12D@llvm.org>

Author: lattner
Date: Wed Apr  6 22:09:21 2011
New Revision: 129053

URL: http://llvm.org/viewvc/llvm-project?rev=129053&view=rev
Log:
add faust too

Modified:
    llvm/trunk/docs/ReleaseNotes.html

Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=129053&r1=129052&r2=129053&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Wed Apr  6 22:09:21 2011
@@ -416,7 +416,21 @@
 </div>
 
 
+<!--=========================================================================-->
+<div class="doc_subsection">
+<a name="FAUST">FAUST Real-Time Audio Signal Processing Language</a>
+</div>
 
+<div class="doc_text">
+<p>
+<a href="http://faust.grame.fr">FAUST</a> is a compiled language for real-time
+audio signal processing. The name FAUST stands for Functional AUdio STream. Its
+programming model combines two approaches: functional programming and block
+diagram composition. In addition with the C, C++, JAVA output formats, the
+Faust compiler can now generate LLVM bitcode, and works with LLVM 2.7-2.9.</p>
+
+</div>
+  
 <!-- *********************************************************************** -->
 <h1>
   <a name="whatsnew">What's New in LLVM 2.9?</a>



From isanbard at gmail.com  Wed Apr  6 23:47:35 2011
From: isanbard at gmail.com (Bill Wendling)
Date: Thu, 07 Apr 2011 04:47:35 -0000
Subject: [llvm-commits] [www] r129057 - /www/trunk/index.html
Message-ID: <20110407044735.E8B5E2A6C12D@llvm.org>

Author: void
Date: Wed Apr  6 23:47:35 2011
New Revision: 129057

URL: http://llvm.org/viewvc/llvm-project?rev=129057&view=rev
Log:
The 2.9 release is over.

Modified:
    www/trunk/index.html

Modified: www/trunk/index.html
URL: http://llvm.org/viewvc/llvm-project/www/trunk/index.html?rev=129057&r1=129056&r2=129057&view=diff
==============================================================================
--- www/trunk/index.html (original)
+++ www/trunk/index.html Wed Apr  6 23:47:35 2011
@@ -135,15 +135,7 @@
 <div class="www_sectiontitle">Upcoming Releases</div>
 
 <div class="www_text">
-<p><b>LLVM 2.9 Release Schedule</b></p>
-<ul>
-<li>March 7th            &mdash; Branch for release.</li>
-<li>March 7th-14th       &mdash; Testing Phase 1</li>
-<li>March 14th-21st      &mdash; Preparation for Phase 2 (fixing bugs, merging patches)</li>
-<li>March 21st-28th      &mdash; Testing Phase 2</li>
-<li>March 28th-April 3rd &mdash; Preparation for release</li>
-<li>April 4th            &mdash; Release</li>
-</p>
+<p><b>LLVM 3.0 Release: To Be Announced</b></p>
 </div>
 
 <br>



From clattner at apple.com  Thu Apr  7 00:49:07 2011
From: clattner at apple.com (Chris Lattner)
Date: Wed, 06 Apr 2011 22:49:07 -0700
Subject: [llvm-commits] [llvm] r129045 - in /llvm/trunk:
 include/llvm/Target/TargetOptions.h lib/Target/ARM/ARMISelLowering.cpp
 lib/Target/TargetMachine.cpp test/CodeGen/ARM/divmod.ll
In-Reply-To: <20110407005844.EB88C2A6C12D@llvm.org>
References: <20110407005844.EB88C2A6C12D@llvm.org>
Message-ID: <338C145C-FEEF-4209-928E-6A3DCBF2134C@apple.com>


On Apr 6, 2011, at 5:58 PM, Evan Cheng wrote:

> Author: evancheng
> Date: Wed Apr  6 19:58:44 2011
> New Revision: 129045
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=129045&view=rev
> Log:
> Change -arm-divmod-libcall to a target neutral option.

Hi Evan,

Shouldn't this just be conditionalized based on the target?  We don't want an extra knob for this.

-Chris


> 
> Modified:
>    llvm/trunk/include/llvm/Target/TargetOptions.h
>    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
>    llvm/trunk/lib/Target/TargetMachine.cpp
>    llvm/trunk/test/CodeGen/ARM/divmod.ll
> 
> Modified: llvm/trunk/include/llvm/Target/TargetOptions.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetOptions.h?rev=129045&r1=129044&r2=129045&view=diff
> ==============================================================================
> --- llvm/trunk/include/llvm/Target/TargetOptions.h (original)
> +++ llvm/trunk/include/llvm/Target/TargetOptions.h Wed Apr  6 19:58:44 2011
> @@ -157,6 +157,10 @@
>   /// wth earlier copy coalescing.
>   extern bool StrongPHIElim;
> 
> +  /// HasDivModLibcall - This flag indicates whether the target compiler
> +  /// runtime library has integer divmod libcalls.
> +  extern bool HasDivModLibcall;
> +
> } // End llvm namespace
> 
> #endif
> 
> Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=129045&r1=129044&r2=129045&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Wed Apr  6 19:58:44 2011
> @@ -72,11 +72,6 @@
>   cl::desc("Enable / disable ARM interworking (for debugging only)"),
>   cl::init(true));
> 
> -static cl::opt<bool>
> -UseDivMod("arm-divmod-libcall", cl::Hidden,
> -  cl::desc("Use __{u}divmod libcalls for div / rem pairs"),
> -  cl::init(false));
> -
> void ARMTargetLowering::addTypeForNEON(EVT VT, EVT PromotedLdStVT,
>                                        EVT PromotedBitwiseVT) {
>   if (VT != PromotedLdStVT) {
> @@ -398,7 +393,7 @@
>     setLibcallCallingConv(RTLIB::UDIV_I32, CallingConv::ARM_AAPCS);
>   }
> 
> -  if (UseDivMod) {
> +  if (HasDivModLibcall) {
>     setLibcallName(RTLIB::SDIVREM_I32, "__divmodsi4");
>     setLibcallName(RTLIB::UDIVREM_I32, "__udivmodsi4");
>   }
> 
> Modified: llvm/trunk/lib/Target/TargetMachine.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetMachine.cpp?rev=129045&r1=129044&r2=129045&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/TargetMachine.cpp (original)
> +++ llvm/trunk/lib/Target/TargetMachine.cpp Wed Apr  6 19:58:44 2011
> @@ -48,6 +48,7 @@
>   bool RealignStack;
>   bool DisableJumpTables;
>   bool StrongPHIElim;
> +  bool HasDivModLibcall;
>   bool AsmVerbosityDefault(false);
> }
> 
> @@ -205,6 +206,11 @@
>   cl::desc("Use strong PHI elimination."),
>   cl::location(StrongPHIElim),
>   cl::init(false));
> +static cl::opt<bool, true>
> +UseDivMod("use-divmod-libcall",
> +  cl::desc("Use __{u}divmod libcalls for div / rem pairs"),
> +  cl::location(HasDivModLibcall),
> +  cl::init(false));
> static cl::opt<bool>
> DataSections("fdata-sections",
>   cl::desc("Emit data into separate sections"),
> 
> Modified: llvm/trunk/test/CodeGen/ARM/divmod.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/divmod.ll?rev=129045&r1=129044&r2=129045&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/ARM/divmod.ll (original)
> +++ llvm/trunk/test/CodeGen/ARM/divmod.ll Wed Apr  6 19:58:44 2011
> @@ -1,4 +1,4 @@
> -; RUN: llc < %s -mtriple=arm-apple-darwin -arm-divmod-libcall | FileCheck %s
> +; RUN: llc < %s -mtriple=arm-apple-darwin -use-divmod-libcall | FileCheck %s
> 
> define void @foo(i32 %x, i32 %y, i32* nocapture %P) nounwind ssp {
> entry:
> 
> 
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits


From tonic at nondot.org  Thu Apr  7 00:46:11 2011
From: tonic at nondot.org (Tanya Lattner)
Date: Thu, 07 Apr 2011 05:46:11 -0000
Subject: [llvm-commits] [www-releases] r129058 [2/5] - in
 /www-releases/trunk/2.9: ./ docs/ docs/CommandGuide/
 docs/CommandGuide/html/ docs/CommandGuide/man/ docs/CommandGuide/man/man1/
 docs/CommandGuide/ps/ docs/HistoricalNotes/ docs/img/ docs/tutorial/
Message-ID: <20110407054615.63FC42A6C12C@llvm.org>

Added: www-releases/trunk/2.9/docs/CommandGuide/ps/lli.ps
URL: http://llvm.org/viewvc/llvm-project/www-releases/trunk/2.9/docs/CommandGuide/ps/lli.ps?rev=129058&view=auto
==============================================================================
--- www-releases/trunk/2.9/docs/CommandGuide/ps/lli.ps (added)
+++ www-releases/trunk/2.9/docs/CommandGuide/ps/lli.ps Thu Apr  7 00:46:10 2011
@@ -0,0 +1,450 @@
+%!PS-Adobe-3.0
+%%Creator: groff version 1.18.1
+%%CreationDate: Thu Apr  7 00:34:42 2011
+%%DocumentNeededResources: font Times-Roman
+%%+ font Times-Bold
+%%+ font Times-Italic
+%%+ font Courier
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+%%Pages: 3
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Added: www-releases/trunk/2.9/docs/CommandGuide/ps/llvm-ar.ps
URL: http://llvm.org/viewvc/llvm-project/www-releases/trunk/2.9/docs/CommandGuide/ps/llvm-ar.ps?rev=129058&view=auto
==============================================================================
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Added: www-releases/trunk/2.9/docs/CommandGuide/ps/llvm-as.ps
URL: http://llvm.org/viewvc/llvm-project/www-releases/trunk/2.9/docs/CommandGuide/ps/llvm-as.ps?rev=129058&view=auto
==============================================================================
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Added: www-releases/trunk/2.9/docs/CommandGuide/ps/llvm-bcanalyzer.ps
URL: http://llvm.org/viewvc/llvm-project/www-releases/trunk/2.9/docs/CommandGuide/ps/llvm-bcanalyzer.ps?rev=129058&view=auto
==============================================================================
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URL: http://llvm.org/viewvc/llvm-project/www-releases/trunk/2.9/docs/CommandGuide/ps/llvm-config.ps?rev=129058&view=auto
==============================================================================
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Added: www-releases/trunk/2.9/docs/CommandGuide/ps/llvm-extract.ps
URL: http://llvm.org/viewvc/llvm-project/www-releases/trunk/2.9/docs/CommandGuide/ps/llvm-extract.ps?rev=129058&view=auto
==============================================================================
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URL: http://llvm.org/viewvc/llvm-project/www-releases/trunk/2.9/docs/CommandGuide/ps/llvm-ld.ps?rev=129058&view=auto
==============================================================================
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Added: www-releases/trunk/2.9/docs/CommandGuide/ps/llvm-link.ps
URL: http://llvm.org/viewvc/llvm-project/www-releases/trunk/2.9/docs/CommandGuide/ps/llvm-link.ps?rev=129058&view=auto
==============================================================================
--- www-releases/trunk/2.9/docs/CommandGuide/ps/llvm-link.ps (added)
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URL: http://llvm.org/viewvc/llvm-project/www-releases/trunk/2.9/docs/CommandGuide/ps/llvm-nm.ps?rev=129058&view=auto
==============================================================================
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Added: www-releases/trunk/2.9/docs/CommandGuide/ps/llvm-prof.ps
URL: http://llvm.org/viewvc/llvm-project/www-releases/trunk/2.9/docs/CommandGuide/ps/llvm-prof.ps?rev=129058&view=auto
==============================================================================
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Added: www-releases/trunk/2.9/docs/CommandGuide/ps/opt.ps
URL: http://llvm.org/viewvc/llvm-project/www-releases/trunk/2.9/docs/CommandGuide/ps/opt.ps?rev=129058&view=auto
==============================================================================
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Added: www-releases/trunk/2.9/docs/CommandGuide/ps/tblgen.ps
URL: http://llvm.org/viewvc/llvm-project/www-releases/trunk/2.9/docs/CommandGuide/ps/tblgen.ps?rev=129058&view=auto
==============================================================================
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Added: www-releases/trunk/2.9/docs/CommandGuide/tblgen.pod
URL: http://llvm.org/viewvc/llvm-project/www-releases/trunk/2.9/docs/CommandGuide/tblgen.pod?rev=129058&view=auto
==============================================================================
--- www-releases/trunk/2.9/docs/CommandGuide/tblgen.pod (added)
+++ www-releases/trunk/2.9/docs/CommandGuide/tblgen.pod Thu Apr  7 00:46:10 2011
@@ -0,0 +1,115 @@
+
+=pod
+
+=head1 NAME
+
+tblgen - Target Description To C++ Code Generator
+
+=head1 SYNOPSIS
+
+B<tblgen> [I<options>] [I<filename>]
+
+=head1 DESCRIPTION
+
+B<tblgen> translates from target description (.td) files into C++ code that can
+be included in the definition of an LLVM target library. Most users of LLVM will
+not need to use this program. It is only for assisting with writing an LLVM
+target backend.
+
+The input and output of B<tblgen> is beyond the scope of this short
+introduction. Please see the I<CodeGeneration> page in the LLVM documentation.
+
+The F<filename> argument specifies the name of a Target Description (.td) file
+to read as input.
+
+=head1 OPTIONS
+
+=over
+
+=item B<-help>
+
+Print a summary of command line options.
+
+=item B<-o> F<filename>
+
+Specify the output file name.  If F<filename> is C<->, then B<tblgen>
+sends its output to standard output.
+
+=item B<-I> F<directory>
+
+Specify where to find other target description files for inclusion. The
+F<directory> value should be a full or partial path to a directory that contains
+target description files.
+
+=item B<-asmwriternum> F<N>
+
+Make -gen-asm-writer emit assembly writer number F<N>.
+
+=item B<-class> F<class Name>
+
+Print the enumeration list for this class.
+
+=item B<-print-records>
+
+Print all records to standard output (default).
+
+=item B<-print-enums>
+
+Print enumeration values for a class
+
+=item B<-gen-emitter>
+
+Generate machine code emitter.
+
+=item B<-gen-register-enums>
+
+Generate the enumeration values for all registers.
+
+=item B<-gen-register-desc>
+
+Generate a register info description for each register.
+
+=item B<-gen-register-desc-header>
+
+Generate a register info description header for each register.
+
+=item B<-gen-instr-enums>
+
+Generate enumeration values for instructions.
+
+=item B<-gen-instr-desc>
+
+Generate instruction descriptions.
+
+=item B<-gen-asm-writer>
+
+Generate the assembly writer.
+
+=item B<-gen-dag-isel>
+
+Generate a DAG (Directed Acycle Graph) instruction selector.
+
+=item B<-gen-subtarget>
+
+Generate subtarget enumerations.
+
+=item B<-gen-intrinsic>
+
+Generate intrinsic information.
+
+=item B<-version>
+
+Show the version number of this program.
+
+=back
+
+=head1 EXIT STATUS
+
+If B<tblgen> succeeds, it will exit with 0.  Otherwise, if an error
+occurs, it will exit with a non-zero value.
+
+=head1 AUTHORS
+
+Maintained by The LLVM Team (L<http://llvm.org>).
+
+=cut

Added: www-releases/trunk/2.9/docs/CommandLine.html
URL: http://llvm.org/viewvc/llvm-project/www-releases/trunk/2.9/docs/CommandLine.html?rev=129058&view=auto
==============================================================================
--- www-releases/trunk/2.9/docs/CommandLine.html (added)
+++ www-releases/trunk/2.9/docs/CommandLine.html Thu Apr  7 00:46:10 2011
@@ -0,0 +1,1979 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN"
+                      "http://www.w3.org/TR/html4/strict.dtd">
+<html>
+<head>
+  <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
+  <title>CommandLine 2.0 Library Manual</title>
+  <link rel="stylesheet" href="llvm.css" type="text/css">
+</head>
+<body>
+
+<div class="doc_title">
+  CommandLine 2.0 Library Manual
+</div>
+
+<ol>
+  <li><a href="#introduction">Introduction</a></li>
+
+  <li><a href="#quickstart">Quick Start Guide</a>
+    <ol>
+      <li><a href="#bool">Boolean Arguments</a></li>
+      <li><a href="#alias">Argument Aliases</a></li>
+      <li><a href="#onealternative">Selecting an alternative from a
+                                    set of possibilities</a></li>
+      <li><a href="#namedalternatives">Named alternatives</a></li>
+      <li><a href="#list">Parsing a list of options</a></li>
+      <li><a href="#bits">Collecting options as a set of flags</a></li>
+      <li><a href="#description">Adding freeform text to help output</a></li>
+    </ol></li>
+
+  <li><a href="#referenceguide">Reference Guide</a>
+    <ol>
+      <li><a href="#positional">Positional Arguments</a>
+        <ul>
+        <li><a href="#--">Specifying positional options with hyphens</a></li>
+        <li><a href="#getPosition">Determining absolute position with
+          getPosition</a></li>
+        <li><a href="#cl::ConsumeAfter">The <tt>cl::ConsumeAfter</tt>
+             modifier</a></li>
+        </ul></li>
+
+      <li><a href="#storage">Internal vs External Storage</a></li>
+
+      <li><a href="#attributes">Option Attributes</a></li>
+
+      <li><a href="#modifiers">Option Modifiers</a>
+        <ul>
+        <li><a href="#hiding">Hiding an option from <tt>-help</tt>
+            output</a></li>
+        <li><a href="#numoccurrences">Controlling the number of occurrences
+                                     required and allowed</a></li>
+        <li><a href="#valrequired">Controlling whether or not a value must be
+                                   specified</a></li>
+        <li><a href="#formatting">Controlling other formatting options</a></li>
+        <li><a href="#misc">Miscellaneous option modifiers</a></li>
+        <li><a href="#response">Response files</a></li>
+        </ul></li>
+
+      <li><a href="#toplevel">Top-Level Classes and Functions</a>
+        <ul>
+        <li><a href="#cl::ParseCommandLineOptions">The
+            <tt>cl::ParseCommandLineOptions</tt> function</a></li>
+        <li><a href="#cl::ParseEnvironmentOptions">The
+            <tt>cl::ParseEnvironmentOptions</tt> function</a></li>
+        <li><a href="#cl::SetVersionPrinter">The <tt>cl::SetVersionPrinter</tt>
+          function</a></li>
+        <li><a href="#cl::opt">The <tt>cl::opt</tt> class</a></li>
+        <li><a href="#cl::list">The <tt>cl::list</tt> class</a></li>
+        <li><a href="#cl::bits">The <tt>cl::bits</tt> class</a></li>
+        <li><a href="#cl::alias">The <tt>cl::alias</tt> class</a></li>
+        <li><a href="#cl::extrahelp">The <tt>cl::extrahelp</tt> class</a></li>
+        </ul></li>
+
+      <li><a href="#builtinparsers">Builtin parsers</a>
+        <ul>
+        <li><a href="#genericparser">The Generic <tt>parser&lt;t&gt;</tt>
+            parser</a></li>
+        <li><a href="#boolparser">The <tt>parser&lt;bool&gt;</tt>
+            specialization</a></li>
+        <li><a href="#boolOrDefaultparser">The <tt>parser&lt;boolOrDefault&gt;</tt>
+            specialization</a></li>
+        <li><a href="#stringparser">The <tt>parser&lt;string&gt;</tt>
+            specialization</a></li>
+        <li><a href="#intparser">The <tt>parser&lt;int&gt;</tt>
+            specialization</a></li>
+        <li><a href="#doubleparser">The <tt>parser&lt;double&gt;</tt> and
+            <tt>parser&lt;float&gt;</tt> specializations</a></li>
+        </ul></li>
+    </ol></li>
+  <li><a href="#extensionguide">Extension Guide</a>
+    <ol>
+      <li><a href="#customparser">Writing a custom parser</a></li>
+      <li><a href="#explotingexternal">Exploiting external storage</a></li>
+      <li><a href="#dynamicopts">Dynamically adding command line
+          options</a></li>
+    </ol></li>
+</ol>
+
+<div class="doc_author">
+  <p>Written by <a href="mailto:sabre at nondot.org">Chris Lattner</a></p>
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_section">
+  <a name="introduction">Introduction</a>
+</div>
+<!-- *********************************************************************** -->
+
+<div class="doc_text">
+
+<p>This document describes the CommandLine argument processing library.  It will
+show you how to use it, and what it can do.  The CommandLine library uses a
+declarative approach to specifying the command line options that your program
+takes.  By default, these options declarations implicitly hold the value parsed
+for the option declared (of course this <a href="#storage">can be
+changed</a>).</p>
+
+<p>Although there are a <b>lot</b> of command line argument parsing libraries
+out there in many different languages, none of them fit well with what I needed.
+By looking at the features and problems of other libraries, I designed the
+CommandLine library to have the following features:</p>
+
+<ol>
+<li>Speed: The CommandLine library is very quick and uses little resources.  The
+parsing time of the library is directly proportional to the number of arguments
+parsed, not the the number of options recognized.  Additionally, command line
+argument values are captured transparently into user defined global variables,
+which can be accessed like any other variable (and with the same
+performance).</li>
+
+<li>Type Safe: As a user of CommandLine, you don't have to worry about
+remembering the type of arguments that you want (is it an int?  a string? a
+bool? an enum?) and keep casting it around.  Not only does this help prevent
+error prone constructs, it also leads to dramatically cleaner source code.</li>
+
+<li>No subclasses required: To use CommandLine, you instantiate variables that
+correspond to the arguments that you would like to capture, you don't subclass a
+parser.  This means that you don't have to write <b>any</b> boilerplate
+code.</li>
+
+<li>Globally accessible: Libraries can specify command line arguments that are
+automatically enabled in any tool that links to the library.  This is possible
+because the application doesn't have to keep a list of arguments to pass to
+the parser.  This also makes supporting <a href="#dynamicopts">dynamically
+loaded options</a> trivial.</li>
+
+<li>Cleaner: CommandLine supports enum and other types directly, meaning that
+there is less error and more security built into the library.  You don't have to
+worry about whether your integral command line argument accidentally got
+assigned a value that is not valid for your enum type.</li>
+
+<li>Powerful: The CommandLine library supports many different types of
+arguments, from simple <a href="#boolparser">boolean flags</a> to <a
+href="#cl::opt">scalars arguments</a> (<a href="#stringparser">strings</a>, <a
+href="#intparser">integers</a>, <a href="#genericparser">enums</a>, <a
+href="#doubleparser">doubles</a>), to <a href="#cl::list">lists of
+arguments</a>.  This is possible because CommandLine is...</li>
+
+<li>Extensible: It is very simple to add a new argument type to CommandLine.
+Simply specify the parser that you want to use with the command line option when
+you declare it.  <a href="#customparser">Custom parsers</a> are no problem.</li>
+
+<li>Labor Saving: The CommandLine library cuts down on the amount of grunt work
+that you, the user, have to do.  For example, it automatically provides a
+<tt>-help</tt> option that shows the available command line options for your
+tool.  Additionally, it does most of the basic correctness checking for
+you.</li>
+
+<li>Capable: The CommandLine library can handle lots of different forms of
+options often found in real programs.  For example, <a
+href="#positional">positional</a> arguments, <tt>ls</tt> style <a
+href="#cl::Grouping">grouping</a> options (to allow processing '<tt>ls
+-lad</tt>' naturally), <tt>ld</tt> style <a href="#cl::Prefix">prefix</a>
+options (to parse '<tt>-lmalloc -L/usr/lib</tt>'), and <a
+href="#cl::ConsumeAfter">interpreter style options</a>.</li>
+
+</ol>
+
+<p>This document will hopefully let you jump in and start using CommandLine in
+your utility quickly and painlessly.  Additionally it should be a simple
+reference manual to figure out how stuff works.  If it is failing in some area
+(or you want an extension to the library), nag the author, <a
+href="mailto:sabre at nondot.org">Chris Lattner</a>.</p>
+
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_section">
+  <a name="quickstart">Quick Start Guide</a>
+</div>
+<!-- *********************************************************************** -->
+
+<div class="doc_text">
+
+<p>This section of the manual runs through a simple CommandLine'ification of a
+basic compiler tool.  This is intended to show you how to jump into using the
+CommandLine library in your own program, and show you some of the cool things it
+can do.</p>
+
+<p>To start out, you need to include the CommandLine header file into your
+program:</p>
+
+<div class="doc_code"><pre>
+  #include "llvm/Support/CommandLine.h"
+</pre></div>
+
+<p>Additionally, you need to add this as the first line of your main
+program:</p>
+
+<div class="doc_code"><pre>
+int main(int argc, char **argv) {
+  <a href="#cl::ParseCommandLineOptions">cl::ParseCommandLineOptions</a>(argc, argv);
+  ...
+}
+</pre></div>
+
+<p>... which actually parses the arguments and fills in the variable
+declarations.</p>
+
+<p>Now that you are ready to support command line arguments, we need to tell the
+system which ones we want, and what type of arguments they are.  The CommandLine
+library uses a declarative syntax to model command line arguments with the
+global variable declarations that capture the parsed values.  This means that
+for every command line option that you would like to support, there should be a
+global variable declaration to capture the result.  For example, in a compiler,
+we would like to support the Unix-standard '<tt>-o &lt;filename&gt;</tt>' option
+to specify where to put the output.  With the CommandLine library, this is
+represented like this:</p>
+
+<a name="value_desc_example"></a>
+<div class="doc_code"><pre>
+<a href="#cl::opt">cl::opt</a>&lt;string&gt; OutputFilename("<i>o</i>", <a href="#cl::desc">cl::desc</a>("<i>Specify output filename</i>"), <a href="#cl::value_desc">cl::value_desc</a>("<i>filename</i>"));
+</pre></div>
+
+<p>This declares a global variable "<tt>OutputFilename</tt>" that is used to
+capture the result of the "<tt>o</tt>" argument (first parameter).  We specify
+that this is a simple scalar option by using the "<tt><a
+href="#cl::opt">cl::opt</a></tt>" template (as opposed to the <a
+href="#list">"<tt>cl::list</tt> template</a>), and tell the CommandLine library
+that the data type that we are parsing is a string.</p>
+
+<p>The second and third parameters (which are optional) are used to specify what
+to output for the "<tt>-help</tt>" option.  In this case, we get a line that
+looks like this:</p>
+
+<div class="doc_code"><pre>
+USAGE: compiler [options]
+
+OPTIONS:
+  -help             - display available options (-help-hidden for more)
+  <b>-o &lt;filename&gt;     - Specify output filename</b>
+</pre></div>
+
+<p>Because we specified that the command line option should parse using the
+<tt>string</tt> data type, the variable declared is automatically usable as a
+real string in all contexts that a normal C++ string object may be used.  For
+example:</p>
+
+<div class="doc_code"><pre>
+  ...
+  std::ofstream Output(OutputFilename.c_str());
+  if (Output.good()) ...
+  ...
+</pre></div>
+
+<p>There are many different options that you can use to customize the command
+line option handling library, but the above example shows the general interface
+to these options.  The options can be specified in any order, and are specified
+with helper functions like <a href="#cl::desc"><tt>cl::desc(...)</tt></a>, so
+there are no positional dependencies to remember.  The available options are
+discussed in detail in the <a href="#referenceguide">Reference Guide</a>.</p>
+
+<p>Continuing the example, we would like to have our compiler take an input
+filename as well as an output filename, but we do not want the input filename to
+be specified with a hyphen (ie, not <tt>-filename.c</tt>).  To support this
+style of argument, the CommandLine library allows for <a
+href="#positional">positional</a> arguments to be specified for the program.
+These positional arguments are filled with command line parameters that are not
+in option form.  We use this feature like this:</p>
+
+<div class="doc_code"><pre>
+<a href="#cl::opt">cl::opt</a>&lt;string&gt; InputFilename(<a href="#cl::Positional">cl::Positional</a>, <a href="#cl::desc">cl::desc</a>("<i>&lt;input file&gt;</i>"), <a href="#cl::init">cl::init</a>("<i>-</i>"));
+</pre></div>
+
+<p>This declaration indicates that the first positional argument should be
+treated as the input filename.  Here we use the <tt><a
+href="#cl::init">cl::init</a></tt> option to specify an initial value for the
+command line option, which is used if the option is not specified (if you do not
+specify a <tt><a href="#cl::init">cl::init</a></tt> modifier for an option, then
+the default constructor for the data type is used to initialize the value).
+Command line options default to being optional, so if we would like to require
+that the user always specify an input filename, we would add the <tt><a
+href="#cl::Required">cl::Required</a></tt> flag, and we could eliminate the
+<tt><a href="#cl::init">cl::init</a></tt> modifier, like this:</p>
+
+<div class="doc_code"><pre>
+<a href="#cl::opt">cl::opt</a>&lt;string&gt; InputFilename(<a href="#cl::Positional">cl::Positional</a>, <a href="#cl::desc">cl::desc</a>("<i>&lt;input file&gt;</i>"), <b><a href="#cl::Required">cl::Required</a></b>);
+</pre></div>
+
+<p>Again, the CommandLine library does not require the options to be specified
+in any particular order, so the above declaration is equivalent to:</p>
+
+<div class="doc_code"><pre>
+<a href="#cl::opt">cl::opt</a>&lt;string&gt; InputFilename(<a href="#cl::Positional">cl::Positional</a>, <a href="#cl::Required">cl::Required</a>, <a href="#cl::desc">cl::desc</a>("<i>&lt;input file&gt;</i>"));
+</pre></div>
+
+<p>By simply adding the <tt><a href="#cl::Required">cl::Required</a></tt> flag,
+the CommandLine library will automatically issue an error if the argument is not
+specified, which shifts all of the command line option verification code out of
+your application into the library.  This is just one example of how using flags
+can alter the default behaviour of the library, on a per-option basis.  By
+adding one of the declarations above, the <tt>-help</tt> option synopsis is now
+extended to:</p>
+
+<div class="doc_code"><pre>
+USAGE: compiler [options] <b>&lt;input file&gt;</b>
+
+OPTIONS:
+  -help             - display available options (-help-hidden for more)
+  -o &lt;filename&gt;     - Specify output filename
+</pre></div>
+
+<p>... indicating that an input filename is expected.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="bool">Boolean Arguments</a>
+</div>
+
+<div class="doc_text">
+
+<p>In addition to input and output filenames, we would like the compiler example
+to support three boolean flags: "<tt>-f</tt>" to force writing binary output to
+a terminal, "<tt>--quiet</tt>" to enable quiet mode, and "<tt>-q</tt>" for
+backwards compatibility with some of our users.  We can support these by
+declaring options of boolean type like this:</p>
+
+<div class="doc_code"><pre>
+<a href="#cl::opt">cl::opt</a>&lt;bool&gt; Force ("<i>f</i>", <a href="#cl::desc">cl::desc</a>("<i>Enable binary output on terminals</i>"));
+<a href="#cl::opt">cl::opt</a>&lt;bool&gt; Quiet ("<i>quiet</i>", <a href="#cl::desc">cl::desc</a>("<i>Don't print informational messages</i>"));
+<a href="#cl::opt">cl::opt</a>&lt;bool&gt; Quiet2("<i>q</i>", <a href="#cl::desc">cl::desc</a>("<i>Don't print informational messages</i>"), <a href="#cl::Hidden">cl::Hidden</a>);
+</pre></div>
+
+<p>This does what you would expect: it declares three boolean variables
+("<tt>Force</tt>", "<tt>Quiet</tt>", and "<tt>Quiet2</tt>") to recognize these
+options.  Note that the "<tt>-q</tt>" option is specified with the "<a
+href="#cl::Hidden"><tt>cl::Hidden</tt></a>" flag.  This modifier prevents it
+from being shown by the standard "<tt>-help</tt>" output (note that it is still
+shown in the "<tt>-help-hidden</tt>" output).</p>
+
+<p>The CommandLine library uses a <a href="#builtinparsers">different parser</a>
+for different data types.  For example, in the string case, the argument passed
+to the option is copied literally into the content of the string variable... we
+obviously cannot do that in the boolean case, however, so we must use a smarter
+parser.  In the case of the boolean parser, it allows no options (in which case
+it assigns the value of true to the variable), or it allows the values
+"<tt>true</tt>" or "<tt>false</tt>" to be specified, allowing any of the
+following inputs:</p>
+
+<div class="doc_code"><pre>
+ compiler -f          # No value, 'Force' == true
+ compiler -f=true     # Value specified, 'Force' == true
+ compiler -f=TRUE     # Value specified, 'Force' == true
+ compiler -f=FALSE    # Value specified, 'Force' == false
+</pre></div>
+
+<p>... you get the idea.  The <a href="#boolparser">bool parser</a> just turns
+the string values into boolean values, and rejects things like '<tt>compiler
+-f=foo</tt>'.  Similarly, the <a href="#doubleparser">float</a>, <a
+href="#doubleparser">double</a>, and <a href="#intparser">int</a> parsers work
+like you would expect, using the '<tt>strtol</tt>' and '<tt>strtod</tt>' C
+library calls to parse the string value into the specified data type.</p>
+
+<p>With the declarations above, "<tt>compiler -help</tt>" emits this:</p>
+
+<div class="doc_code"><pre>
+USAGE: compiler [options] &lt;input file&gt;
+
+OPTIONS:
+  <b>-f     - Enable binary output on terminals</b>
+  -o     - Override output filename
+  <b>-quiet - Don't print informational messages</b>
+  -help  - display available options (-help-hidden for more)
+</pre></div>
+
+<p>and "<tt>compiler -help-hidden</tt>" prints this:</p>
+
+<div class="doc_code"><pre>
+USAGE: compiler [options] &lt;input file&gt;
+
+OPTIONS:
+  -f     - Enable binary output on terminals
+  -o     - Override output filename
+  <b>-q     - Don't print informational messages</b>
+  -quiet - Don't print informational messages
+  -help  - display available options (-help-hidden for more)
+</pre></div>
+
+<p>This brief example has shown you how to use the '<tt><a
+href="#cl::opt">cl::opt</a></tt>' class to parse simple scalar command line
+arguments.  In addition to simple scalar arguments, the CommandLine library also
+provides primitives to support CommandLine option <a href="#alias">aliases</a>,
+and <a href="#list">lists</a> of options.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="alias">Argument Aliases</a>
+</div>
+
+<div class="doc_text">
+
+<p>So far, the example works well, except for the fact that we need to check the
+quiet condition like this now:</p>
+
+<div class="doc_code"><pre>
+...
+  if (!Quiet &amp;&amp; !Quiet2) printInformationalMessage(...);
+...
+</pre></div>
+
+<p>... which is a real pain!  Instead of defining two values for the same
+condition, we can use the "<tt><a href="#cl::alias">cl::alias</a></tt>" class to make the "<tt>-q</tt>"
+option an <b>alias</b> for the "<tt>-quiet</tt>" option, instead of providing
+a value itself:</p>
+
+<div class="doc_code"><pre>
+<a href="#cl::opt">cl::opt</a>&lt;bool&gt; Force ("<i>f</i>", <a href="#cl::desc">cl::desc</a>("<i>Overwrite output files</i>"));
+<a href="#cl::opt">cl::opt</a>&lt;bool&gt; Quiet ("<i>quiet</i>", <a href="#cl::desc">cl::desc</a>("<i>Don't print informational messages</i>"));
+<a href="#cl::alias">cl::alias</a>     QuietA("<i>q</i>", <a href="#cl::desc">cl::desc</a>("<i>Alias for -quiet</i>"), <a href="#cl::aliasopt">cl::aliasopt</a>(Quiet));
+</pre></div>
+
+<p>The third line (which is the only one we modified from above) defines a
+"<tt>-q</tt>" alias that updates the "<tt>Quiet</tt>" variable (as specified by
+the <tt><a href="#cl::aliasopt">cl::aliasopt</a></tt> modifier) whenever it is
+specified.  Because aliases do not hold state, the only thing the program has to
+query is the <tt>Quiet</tt> variable now.  Another nice feature of aliases is
+that they automatically hide themselves from the <tt>-help</tt> output
+(although, again, they are still visible in the <tt>-help-hidden
+output</tt>).</p>
+
+<p>Now the application code can simply use:</p>
+
+<div class="doc_code"><pre>
+...
+  if (!Quiet) printInformationalMessage(...);
+...
+</pre></div>
+
+<p>... which is much nicer!  The "<tt><a href="#cl::alias">cl::alias</a></tt>"
+can be used to specify an alternative name for any variable type, and has many
+uses.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="onealternative">Selecting an alternative from a set of
+  possibilities</a>
+</div>
+
+<div class="doc_text">
+
+<p>So far we have seen how the CommandLine library handles builtin types like
+<tt>std::string</tt>, <tt>bool</tt> and <tt>int</tt>, but how does it handle
+things it doesn't know about, like enums or '<tt>int*</tt>'s?</p>
+
+<p>The answer is that it uses a table-driven generic parser (unless you specify
+your own parser, as described in the <a href="#extensionguide">Extension
+Guide</a>).  This parser maps literal strings to whatever type is required, and
+requires you to tell it what this mapping should be.</p>
+
+<p>Let's say that we would like to add four optimization levels to our
+optimizer, using the standard flags "<tt>-g</tt>", "<tt>-O0</tt>",
+"<tt>-O1</tt>", and "<tt>-O2</tt>".  We could easily implement this with boolean
+options like above, but there are several problems with this strategy:</p>
+
+<ol>
+<li>A user could specify more than one of the options at a time, for example,
+"<tt>compiler -O3 -O2</tt>".  The CommandLine library would not be able to
+catch this erroneous input for us.</li>
+
+<li>We would have to test 4 different variables to see which ones are set.</li>
+
+<li>This doesn't map to the numeric levels that we want... so we cannot easily
+see if some level &gt;= "<tt>-O1</tt>" is enabled.</li>
+
+</ol>
+
+<p>To cope with these problems, we can use an enum value, and have the
+CommandLine library fill it in with the appropriate level directly, which is
+used like this:</p>
+
+<div class="doc_code"><pre>
+enum OptLevel {
+  g, O1, O2, O3
+};
+
+<a href="#cl::opt">cl::opt</a>&lt;OptLevel&gt; OptimizationLevel(<a href="#cl::desc">cl::desc</a>("<i>Choose optimization level:</i>"),
+  <a href="#cl::values">cl::values</a>(
+    clEnumVal(g , "<i>No optimizations, enable debugging</i>"),
+    clEnumVal(O1, "<i>Enable trivial optimizations</i>"),
+    clEnumVal(O2, "<i>Enable default optimizations</i>"),
+    clEnumVal(O3, "<i>Enable expensive optimizations</i>"),
+   clEnumValEnd));
+
+...
+  if (OptimizationLevel &gt;= O2) doPartialRedundancyElimination(...);
+...
+</pre></div>
+
+<p>This declaration defines a variable "<tt>OptimizationLevel</tt>" of the
+"<tt>OptLevel</tt>" enum type.  This variable can be assigned any of the values
+that are listed in the declaration (Note that the declaration list must be
+terminated with the "<tt>clEnumValEnd</tt>" argument!).  The CommandLine
+library enforces
+that the user can only specify one of the options, and it ensure that only valid
+enum values can be specified.  The "<tt>clEnumVal</tt>" macros ensure that the
+command line arguments matched the enum values.  With this option added, our
+help output now is:</p>
+
+<div class="doc_code"><pre>
+USAGE: compiler [options] &lt;input file&gt;
+
+OPTIONS:
+  <b>Choose optimization level:
+    -g          - No optimizations, enable debugging
+    -O1         - Enable trivial optimizations
+    -O2         - Enable default optimizations
+    -O3         - Enable expensive optimizations</b>
+  -f            - Enable binary output on terminals
+  -help         - display available options (-help-hidden for more)
+  -o &lt;filename&gt; - Specify output filename
+  -quiet        - Don't print informational messages
+</pre></div>
+
+<p>In this case, it is sort of awkward that flag names correspond directly to
+enum names, because we probably don't want a enum definition named "<tt>g</tt>"
+in our program.  Because of this, we can alternatively write this example like
+this:</p>
+
+<div class="doc_code"><pre>
+enum OptLevel {
+  Debug, O1, O2, O3
+};
+
+<a href="#cl::opt">cl::opt</a>&lt;OptLevel&gt; OptimizationLevel(<a href="#cl::desc">cl::desc</a>("<i>Choose optimization level:</i>"),
+  <a href="#cl::values">cl::values</a>(
+   clEnumValN(Debug, "g", "<i>No optimizations, enable debugging</i>"),
+    clEnumVal(O1        , "<i>Enable trivial optimizations</i>"),
+    clEnumVal(O2        , "<i>Enable default optimizations</i>"),
+    clEnumVal(O3        , "<i>Enable expensive optimizations</i>"),
+   clEnumValEnd));
+
+...
+  if (OptimizationLevel == Debug) outputDebugInfo(...);
+...
+</pre></div>
+
+<p>By using the "<tt>clEnumValN</tt>" macro instead of "<tt>clEnumVal</tt>", we
+can directly specify the name that the flag should get.  In general a direct
+mapping is nice, but sometimes you can't or don't want to preserve the mapping,
+which is when you would use it.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="namedalternatives">Named Alternatives</a>
+</div>
+
+<div class="doc_text">
+
+<p>Another useful argument form is a named alternative style.  We shall use this
+style in our compiler to specify different debug levels that can be used.
+Instead of each debug level being its own switch, we want to support the
+following options, of which only one can be specified at a time:
+"<tt>--debug-level=none</tt>", "<tt>--debug-level=quick</tt>",
+"<tt>--debug-level=detailed</tt>".  To do this, we use the exact same format as
+our optimization level flags, but we also specify an option name.  For this
+case, the code looks like this:</p>
+
+<div class="doc_code"><pre>
+enum DebugLev {
+  nodebuginfo, quick, detailed
+};
+
+// Enable Debug Options to be specified on the command line
+<a href="#cl::opt">cl::opt</a>&lt;DebugLev&gt; DebugLevel("<i>debug_level</i>", <a href="#cl::desc">cl::desc</a>("<i>Set the debugging level:</i>"),
+  <a href="#cl::values">cl::values</a>(
+    clEnumValN(nodebuginfo, "none", "<i>disable debug information</i>"),
+     clEnumVal(quick,               "<i>enable quick debug information</i>"),
+     clEnumVal(detailed,            "<i>enable detailed debug information</i>"),
+    clEnumValEnd));
+</pre></div>
+
+<p>This definition defines an enumerated command line variable of type "<tt>enum
+DebugLev</tt>", which works exactly the same way as before.  The difference here
+is just the interface exposed to the user of your program and the help output by
+the "<tt>-help</tt>" option:</p>
+
+<div class="doc_code"><pre>
+USAGE: compiler [options] &lt;input file&gt;
+
+OPTIONS:
+  Choose optimization level:
+    -g          - No optimizations, enable debugging
+    -O1         - Enable trivial optimizations
+    -O2         - Enable default optimizations
+    -O3         - Enable expensive optimizations
+  <b>-debug_level  - Set the debugging level:
+    =none       - disable debug information
+    =quick      - enable quick debug information
+    =detailed   - enable detailed debug information</b>
+  -f            - Enable binary output on terminals
+  -help         - display available options (-help-hidden for more)
+  -o &lt;filename&gt; - Specify output filename
+  -quiet        - Don't print informational messages
+</pre></div>
+
+<p>Again, the only structural difference between the debug level declaration and
+the optimization level declaration is that the debug level declaration includes
+an option name (<tt>"debug_level"</tt>), which automatically changes how the
+library processes the argument.  The CommandLine library supports both forms so
+that you can choose the form most appropriate for your application.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="list">Parsing a list of options</a>
+</div>
+
+<div class="doc_text">
+
+<p>Now that we have the standard run-of-the-mill argument types out of the way,
+lets get a little wild and crazy.  Lets say that we want our optimizer to accept
+a <b>list</b> of optimizations to perform, allowing duplicates.  For example, we
+might want to run: "<tt>compiler -dce -constprop -inline -dce -strip</tt>".  In
+this case, the order of the arguments and the number of appearances is very
+important.  This is what the "<tt><a href="#cl::list">cl::list</a></tt>"
+template is for.  First, start by defining an enum of the optimizations that you
+would like to perform:</p>
+
+<div class="doc_code"><pre>
+enum Opts {
+  // 'inline' is a C++ keyword, so name it 'inlining'
+  dce, constprop, inlining, strip
+};
+</pre></div>
+
+<p>Then define your "<tt><a href="#cl::list">cl::list</a></tt>" variable:</p>
+
+<div class="doc_code"><pre>
+<a href="#cl::list">cl::list</a>&lt;Opts&gt; OptimizationList(<a href="#cl::desc">cl::desc</a>("<i>Available Optimizations:</i>"),
+  <a href="#cl::values">cl::values</a>(
+    clEnumVal(dce               , "<i>Dead Code Elimination</i>"),
+    clEnumVal(constprop         , "<i>Constant Propagation</i>"),
+   clEnumValN(inlining, "<i>inline</i>", "<i>Procedure Integration</i>"),
+    clEnumVal(strip             , "<i>Strip Symbols</i>"),
+  clEnumValEnd));
+</pre></div>
+
+<p>This defines a variable that is conceptually of the type
+"<tt>std::vector&lt;enum Opts&gt;</tt>".  Thus, you can access it with standard
+vector methods:</p>
+
+<div class="doc_code"><pre>
+  for (unsigned i = 0; i != OptimizationList.size(); ++i)
+    switch (OptimizationList[i])
+       ...
+</pre></div>
+
+<p>... to iterate through the list of options specified.</p>
+
+<p>Note that the "<tt><a href="#cl::list">cl::list</a></tt>" template is
+completely general and may be used with any data types or other arguments that
+you can use with the "<tt><a href="#cl::opt">cl::opt</a></tt>" template.  One
+especially useful way to use a list is to capture all of the positional
+arguments together if there may be more than one specified.  In the case of a
+linker, for example, the linker takes several '<tt>.o</tt>' files, and needs to
+capture them into a list.  This is naturally specified as:</p>
+
+<div class="doc_code"><pre>
+...
+<a href="#cl::list">cl::list</a>&lt;std::string&gt; InputFilenames(<a href="#cl::Positional">cl::Positional</a>, <a href="#cl::desc">cl::desc</a>("&lt;Input files&gt;"), <a href="#cl::OneOrMore">cl::OneOrMore</a>);
+...
+</pre></div>
+
+<p>This variable works just like a "<tt>vector&lt;string&gt;</tt>" object.  As
+such, accessing the list is simple, just like above.  In this example, we used
+the <tt><a href="#cl::OneOrMore">cl::OneOrMore</a></tt> modifier to inform the
+CommandLine library that it is an error if the user does not specify any
+<tt>.o</tt> files on our command line.  Again, this just reduces the amount of
+checking we have to do.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="bits">Collecting options as a set of flags</a>
+</div>
+
+<div class="doc_text">
+
+<p>Instead of collecting sets of options in a list, it is also possible to
+gather information for enum values in a <b>bit vector</b>.  The representation used by
+the <a href="#bits"><tt>cl::bits</tt></a> class is an <tt>unsigned</tt>
+integer.  An enum value is represented by a 0/1 in the enum's ordinal value bit
+position. 1 indicating that the enum was specified, 0 otherwise.  As each
+specified value is parsed, the resulting enum's bit is set in the option's bit
+vector:</p>
+
+<div class="doc_code"><pre>
+  <i>bits</i> |= 1 << (unsigned)<i>enum</i>;
+</pre></div>
+
+<p>Options that are specified multiple times are redundant.  Any instances after
+the first are discarded.</p>
+
+<p>Reworking the above list example, we could replace <a href="#list">
+<tt>cl::list</tt></a> with <a href="#bits"><tt>cl::bits</tt></a>:</p>
+
+<div class="doc_code"><pre>
+<a href="#cl::bits">cl::bits</a>&lt;Opts&gt; OptimizationBits(<a href="#cl::desc">cl::desc</a>("<i>Available Optimizations:</i>"),
+  <a href="#cl::values">cl::values</a>(
+    clEnumVal(dce               , "<i>Dead Code Elimination</i>"),
+    clEnumVal(constprop         , "<i>Constant Propagation</i>"),
+   clEnumValN(inlining, "<i>inline</i>", "<i>Procedure Integration</i>"),
+    clEnumVal(strip             , "<i>Strip Symbols</i>"),
+  clEnumValEnd));
+</pre></div>
+
+<p>To test to see if <tt>constprop</tt> was specified, we can use the
+<tt>cl:bits::isSet</tt> function:</p>
+
+<div class="doc_code"><pre>
+  if (OptimizationBits.isSet(constprop)) {
+    ...
+  }
+</pre></div>
+
+<p>It's also possible to get the raw bit vector using the
+<tt>cl::bits::getBits</tt> function:</p>
+
+<div class="doc_code"><pre>
+  unsigned bits = OptimizationBits.getBits();
+</pre></div>
+
+<p>Finally, if external storage is used, then the location specified must be of
+<b>type</b> <tt>unsigned</tt>. In all other ways a <a
+href="#bits"><tt>cl::bits</tt></a> option is equivalent to a <a
+href="#list"> <tt>cl::list</tt></a> option.</p>
+
+</div>
+
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="description">Adding freeform text to help output</a>
+</div>
+
+<div class="doc_text">
+
+<p>As our program grows and becomes more mature, we may decide to put summary
+information about what it does into the help output.  The help output is styled
+to look similar to a Unix <tt>man</tt> page, providing concise information about
+a program.  Unix <tt>man</tt> pages, however often have a description about what
+the program does.  To add this to your CommandLine program, simply pass a third
+argument to the <a
+href="#cl::ParseCommandLineOptions"><tt>cl::ParseCommandLineOptions</tt></a>
+call in main.  This additional argument is then printed as the overview
+information for your program, allowing you to include any additional information
+that you want.  For example:</p>
+
+<div class="doc_code"><pre>
+int main(int argc, char **argv) {
+  <a href="#cl::ParseCommandLineOptions">cl::ParseCommandLineOptions</a>(argc, argv, " CommandLine compiler example\n\n"
+                              "  This program blah blah blah...\n");
+  ...
+}
+</pre></div>
+
+<p>would yield the help output:</p>
+
+<div class="doc_code"><pre>
+<b>OVERVIEW: CommandLine compiler example
+
+  This program blah blah blah...</b>
+
+USAGE: compiler [options] &lt;input file&gt;
+
+OPTIONS:
+  ...
+  -help             - display available options (-help-hidden for more)
+  -o &lt;filename&gt;     - Specify output filename
+</pre></div>
+
+</div>
+
+
+<!-- *********************************************************************** -->
+<div class="doc_section">
+  <a name="referenceguide">Reference Guide</a>
+</div>
+<!-- *********************************************************************** -->
+
+<div class="doc_text">
+
+<p>Now that you know the basics of how to use the CommandLine library, this
+section will give you the detailed information you need to tune how command line
+options work, as well as information on more "advanced" command line option
+processing capabilities.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="positional">Positional Arguments</a>
+</div>
+
+<div class="doc_text">
+
+<p>Positional arguments are those arguments that are not named, and are not
+specified with a hyphen.  Positional arguments should be used when an option is
+specified by its position alone.  For example, the standard Unix <tt>grep</tt>
+tool takes a regular expression argument, and an optional filename to search
+through (which defaults to standard input if a filename is not specified).
+Using the CommandLine library, this would be specified as:</p>
+
+<div class="doc_code"><pre>
+<a href="#cl::opt">cl::opt</a>&lt;string&gt; Regex   (<a href="#cl::Positional">cl::Positional</a>, <a href="#cl::desc">cl::desc</a>("<i>&lt;regular expression&gt;</i>"), <a href="#cl::Required">cl::Required</a>);
+<a href="#cl::opt">cl::opt</a>&lt;string&gt; Filename(<a href="#cl::Positional">cl::Positional</a>, <a href="#cl::desc">cl::desc</a>("<i>&lt;input file&gt;</i>"), <a href="#cl::init">cl::init</a>("<i>-</i>"));
+</pre></div>
+
+<p>Given these two option declarations, the <tt>-help</tt> output for our grep
+replacement would look like this:</p>
+
+<div class="doc_code"><pre>
+USAGE: spiffygrep [options] <b>&lt;regular expression&gt; &lt;input file&gt;</b>
+
+OPTIONS:
+  -help - display available options (-help-hidden for more)
+</pre></div>
+
+<p>... and the resultant program could be used just like the standard
+<tt>grep</tt> tool.</p>
+
+<p>Positional arguments are sorted by their order of construction.  This means
+that command line options will be ordered according to how they are listed in a
+.cpp file, but will not have an ordering defined if the positional arguments
+are defined in multiple .cpp files.  The fix for this problem is simply to
+define all of your positional arguments in one .cpp file.</p>
+
+</div>
+
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
+  <a name="--">Specifying positional options with hyphens</a>
+</div>
+
+<div class="doc_text">
+
+<p>Sometimes you may want to specify a value to your positional argument that
+starts with a hyphen (for example, searching for '<tt>-foo</tt>' in a file).  At
+first, you will have trouble doing this, because it will try to find an argument
+named '<tt>-foo</tt>', and will fail (and single quotes will not save you).
+Note that the system <tt>grep</tt> has the same problem:</p>
+
+<div class="doc_code"><pre>
+  $ spiffygrep '-foo' test.txt
+  Unknown command line argument '-foo'.  Try: spiffygrep -help'
+
+  $ grep '-foo' test.txt
+  grep: illegal option -- f
+  grep: illegal option -- o
+  grep: illegal option -- o
+  Usage: grep -hblcnsviw pattern file . . .
+</pre></div>
+
+<p>The solution for this problem is the same for both your tool and the system
+version: use the '<tt>--</tt>' marker.  When the user specifies '<tt>--</tt>' on
+the command line, it is telling the program that all options after the
+'<tt>--</tt>' should be treated as positional arguments, not options.  Thus, we
+can use it like this:</p>
+
+<div class="doc_code"><pre>
+  $ spiffygrep -- -foo test.txt
+    ...output...
+</pre></div>
+
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
+  <a name="getPosition">Determining absolute position with getPosition()</a>
+</div>
+<div class="doc_text">
+  <p>Sometimes an option can affect or modify the meaning of another option. For
+  example, consider <tt>gcc</tt>'s <tt>-x LANG</tt> option. This tells
+  <tt>gcc</tt> to ignore the suffix of subsequent positional arguments and force
+  the file to be interpreted as if it contained source code in language
+  <tt>LANG</tt>. In order to handle this properly, you need to know the
+  absolute position of each argument, especially those in lists, so their
+  interaction(s) can be applied correctly. This is also useful for options like
+  <tt>-llibname</tt> which is actually a positional argument that starts with
+  a dash.</p>
+  <p>So, generally, the problem is that you have two <tt>cl::list</tt> variables
+  that interact in some way. To ensure the correct interaction, you can use the
+  <tt>cl::list::getPosition(optnum)</tt> method. This method returns the
+  absolute position (as found on the command line) of the <tt>optnum</tt>
+  item in the <tt>cl::list</tt>.</p>
+  <p>The idiom for usage is like this:</p>
+
+  <div class="doc_code"><pre>
+  static cl::list&lt;std::string&gt; Files(cl::Positional, cl::OneOrMore);
+  static cl::list&lt;std::string&gt; Libraries("l", cl::ZeroOrMore);
+
+  int main(int argc, char**argv) {
+    // ...
+    std::vector&lt;std::string&gt;::iterator fileIt = Files.begin();
+    std::vector&lt;std::string&gt;::iterator libIt  = Libraries.begin();
+    unsigned libPos = 0, filePos = 0;
+    while ( 1 ) {
+      if ( libIt != Libraries.end() )
+        libPos = Libraries.getPosition( libIt - Libraries.begin() );
+      else
+        libPos = 0;
+      if ( fileIt != Files.end() )
+        filePos = Files.getPosition( fileIt - Files.begin() );
+      else
+        filePos = 0;
+
+      if ( filePos != 0 &amp;&amp; (libPos == 0 || filePos &lt; libPos) ) {
+        // Source File Is next
+        ++fileIt;
+      }
+      else if ( libPos != 0 &amp;&amp; (filePos == 0 || libPos &lt; filePos) ) {
+        // Library is next
+        ++libIt;
+      }
+      else
+        break; // we're done with the list
+    }
+  }</pre></div>
+
+  <p>Note that, for compatibility reasons, the <tt>cl::opt</tt> also supports an
+  <tt>unsigned getPosition()</tt> option that will provide the absolute position
+  of that option. You can apply the same approach as above with a
+  <tt>cl::opt</tt> and a <tt>cl::list</tt> option as you can with two lists.</p>
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
+  <a name="cl::ConsumeAfter">The <tt>cl::ConsumeAfter</tt> modifier</a>
+</div>
+
+<div class="doc_text">
+
+<p>The <tt>cl::ConsumeAfter</tt> <a href="#formatting">formatting option</a> is
+used to construct programs that use "interpreter style" option processing.  With
+this style of option processing, all arguments specified after the last
+positional argument are treated as special interpreter arguments that are not
+interpreted by the command line argument.</p>
+
+<p>As a concrete example, lets say we are developing a replacement for the
+standard Unix Bourne shell (<tt>/bin/sh</tt>).  To run <tt>/bin/sh</tt>, first
+you specify options to the shell itself (like <tt>-x</tt> which turns on trace
+output), then you specify the name of the script to run, then you specify
+arguments to the script.  These arguments to the script are parsed by the Bourne
+shell command line option processor, but are not interpreted as options to the
+shell itself.  Using the CommandLine library, we would specify this as:</p>
+
+<div class="doc_code"><pre>
+<a href="#cl::opt">cl::opt</a>&lt;string&gt; Script(<a href="#cl::Positional">cl::Positional</a>, <a href="#cl::desc">cl::desc</a>("<i>&lt;input script&gt;</i>"), <a href="#cl::init">cl::init</a>("-"));
+<a href="#cl::list">cl::list</a>&lt;string&gt;  Argv(<a href="#cl::ConsumeAfter">cl::ConsumeAfter</a>, <a href="#cl::desc">cl::desc</a>("<i>&lt;program arguments&gt;...</i>"));
+<a href="#cl::opt">cl::opt</a>&lt;bool&gt;    Trace("<i>x</i>", <a href="#cl::desc">cl::desc</a>("<i>Enable trace output</i>"));
+</pre></div>
+
+<p>which automatically provides the help output:</p>
+
+<div class="doc_code"><pre>
+USAGE: spiffysh [options] <b>&lt;input script&gt; &lt;program arguments&gt;...</b>
+
+OPTIONS:
+  -help - display available options (-help-hidden for more)
+  <b>-x    - Enable trace output</b>
+</pre></div>
+
+<p>At runtime, if we run our new shell replacement as `<tt>spiffysh -x test.sh
+-a -x -y bar</tt>', the <tt>Trace</tt> variable will be set to true, the
+<tt>Script</tt> variable will be set to "<tt>test.sh</tt>", and the
+<tt>Argv</tt> list will contain <tt>["-a", "-x", "-y", "bar"]</tt>, because they
+were specified after the last positional argument (which is the script
+name).</p>
+
+<p>There are several limitations to when <tt>cl::ConsumeAfter</tt> options can
+be specified.  For example, only one <tt>cl::ConsumeAfter</tt> can be specified
+per program, there must be at least one <a href="#positional">positional
+argument</a> specified, there must not be any <a href="#cl::list">cl::list</a>
+positional arguments, and the <tt>cl::ConsumeAfter</tt> option should be a <a
+href="#cl::list">cl::list</a> option.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="storage">Internal vs External Storage</a>
+</div>
+
+<div class="doc_text">
+
+<p>By default, all command line options automatically hold the value that they
+parse from the command line.  This is very convenient in the common case,
+especially when combined with the ability to define command line options in the
+files that use them.  This is called the internal storage model.</p>
+
+<p>Sometimes, however, it is nice to separate the command line option processing
+code from the storage of the value parsed.  For example, lets say that we have a
+'<tt>-debug</tt>' option that we would like to use to enable debug information
+across the entire body of our program.  In this case, the boolean value
+controlling the debug code should be globally accessible (in a header file, for
+example) yet the command line option processing code should not be exposed to
+all of these clients (requiring lots of .cpp files to #include
+<tt>CommandLine.h</tt>).</p>
+
+<p>To do this, set up your .h file with your option, like this for example:</p>
+
+<div class="doc_code">
+<pre>
+<i>// DebugFlag.h - Get access to the '-debug' command line option
+//
+
+// DebugFlag - This boolean is set to true if the '-debug' command line option
+// is specified.  This should probably not be referenced directly, instead, use
+// the DEBUG macro below.
+//</i>
+extern bool DebugFlag;
+
+<i>// DEBUG macro - This macro should be used by code to emit debug information.
+// In the '-debug' option is specified on the command line, and if this is a
+// debug build, then the code specified as the option to the macro will be
+// executed.  Otherwise it will not be.</i>
+<span class="doc_hilite">#ifdef NDEBUG
+#define DEBUG(X)
+#else
+#define DEBUG(X)</span> do { if (DebugFlag) { X; } } while (0)
+<span class="doc_hilite">#endif</span>
+</pre>
+</div>
+
+<p>This allows clients to blissfully use the <tt>DEBUG()</tt> macro, or the
+<tt>DebugFlag</tt> explicitly if they want to.  Now we just need to be able to
+set the <tt>DebugFlag</tt> boolean when the option is set.  To do this, we pass
+an additional argument to our command line argument processor, and we specify
+where to fill in with the <a href="#cl::location">cl::location</a>
+attribute:</p>
+
+<div class="doc_code">
+<pre>
+bool DebugFlag;                  <i>// the actual value</i>
+static <a href="#cl::opt">cl::opt</a>&lt;bool, true&gt;       <i>// The parser</i>
+Debug("<i>debug</i>", <a href="#cl::desc">cl::desc</a>("<i>Enable debug output</i>"), <a href="#cl::Hidden">cl::Hidden</a>, <a href="#cl::location">cl::location</a>(DebugFlag));
+</pre>
+</div>
+
+<p>In the above example, we specify "<tt>true</tt>" as the second argument to
+the <tt><a href="#cl::opt">cl::opt</a></tt> template, indicating that the
+template should not maintain a copy of the value itself.  In addition to this,
+we specify the <tt><a href="#cl::location">cl::location</a></tt> attribute, so
+that <tt>DebugFlag</tt> is automatically set.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="attributes">Option Attributes</a>
+</div>
+
+<div class="doc_text">
+
+<p>This section describes the basic attributes that you can specify on
+options.</p>
+
+<ul>
+
+<li>The option name attribute (which is required for all options, except <a
+href="#positional">positional options</a>) specifies what the option name is.
+This option is specified in simple double quotes:
+
+<pre>
+<a href="#cl::opt">cl::opt</a>&lt;<b>bool</b>&gt; Quiet("<i>quiet</i>");
+</pre>
+
+</li>
+
+<li><a name="cl::desc">The <b><tt>cl::desc</tt></b></a> attribute specifies a
+description for the option to be shown in the <tt>-help</tt> output for the
+program.</li>
+
+<li><a name="cl::value_desc">The <b><tt>cl::value_desc</tt></b></a> attribute
+specifies a string that can be used to fine tune the <tt>-help</tt> output for
+a command line option.  Look <a href="#value_desc_example">here</a> for an
+example.</li>
+
+<li><a name="cl::init">The <b><tt>cl::init</tt></b></a> attribute specifies an
+initial value for a <a href="#cl::opt">scalar</a> option.  If this attribute is
+not specified then the command line option value defaults to the value created
+by the default constructor for the type. <b>Warning</b>: If you specify both
+<b><tt>cl::init</tt></b> and <b><tt>cl::location</tt></b> for an option,
+you must specify <b><tt>cl::location</tt></b> first, so that when the
+command-line parser sees <b><tt>cl::init</tt></b>, it knows where to put the
+initial value. (You will get an error at runtime if you don't put them in
+the right order.)</li>
+
+<li><a name="cl::location">The <b><tt>cl::location</tt></b></a> attribute where
+to store the value for a parsed command line option if using external storage.
+See the section on <a href="#storage">Internal vs External Storage</a> for more
+information.</li>
+
+<li><a name="cl::aliasopt">The <b><tt>cl::aliasopt</tt></b></a> attribute
+specifies which option a <tt><a href="#cl::alias">cl::alias</a></tt> option is
+an alias for.</li>
+
+<li><a name="cl::values">The <b><tt>cl::values</tt></b></a> attribute specifies
+the string-to-value mapping to be used by the generic parser.  It takes a
+<b>clEnumValEnd terminated</b> list of (option, value, description) triplets
+that
+specify the option name, the value mapped to, and the description shown in the
+<tt>-help</tt> for the tool.  Because the generic parser is used most
+frequently with enum values, two macros are often useful:
+
+<ol>
+
+<li><a name="clEnumVal">The <b><tt>clEnumVal</tt></b></a> macro is used as a
+nice simple way to specify a triplet for an enum.  This macro automatically
+makes the option name be the same as the enum name.  The first option to the
+macro is the enum, the second is the description for the command line
+option.</li>
+
+<li><a name="clEnumValN">The <b><tt>clEnumValN</tt></b></a> macro is used to
+specify macro options where the option name doesn't equal the enum name.  For
+this macro, the first argument is the enum value, the second is the flag name,
+and the second is the description.</li>
+
+</ol>
+
+You will get a compile time error if you try to use cl::values with a parser
+that does not support it.</li>
+
+<li><a name="cl::multi_val">The <b><tt>cl::multi_val</tt></b></a>
+attribute specifies that this option takes has multiple values
+(example: <tt>-sectalign segname sectname sectvalue</tt>). This
+attribute takes one unsigned argument - the number of values for the
+option. This attribute is valid only on <tt>cl::list</tt> options (and
+will fail with compile error if you try to use it with other option
+types). It is allowed to use all of the usual modifiers on
+multi-valued options (besides <tt>cl::ValueDisallowed</tt>,
+obviously).</li>
+
+</ul>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="modifiers">Option Modifiers</a>
+</div>
+
+<div class="doc_text">
+
+<p>Option modifiers are the flags and expressions that you pass into the
+constructors for <tt><a href="#cl::opt">cl::opt</a></tt> and <tt><a
+href="#cl::list">cl::list</a></tt>.  These modifiers give you the ability to
+tweak how options are parsed and how <tt>-help</tt> output is generated to fit
+your application well.</p>
+
+<p>These options fall into five main categories:</p>
+
+<ol>
+<li><a href="#hiding">Hiding an option from <tt>-help</tt> output</a></li>
+<li><a href="#numoccurrences">Controlling the number of occurrences
+                             required and allowed</a></li>
+<li><a href="#valrequired">Controlling whether or not a value must be
+                           specified</a></li>
+<li><a href="#formatting">Controlling other formatting options</a></li>
+<li><a href="#misc">Miscellaneous option modifiers</a></li>
+</ol>
+
+<p>It is not possible to specify two options from the same category (you'll get
+a runtime error) to a single option, except for options in the miscellaneous
+category.  The CommandLine library specifies defaults for all of these settings
+that are the most useful in practice and the most common, which mean that you
+usually shouldn't have to worry about these.</p>
+
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
+  <a name="hiding">Hiding an option from <tt>-help</tt> output</a>
+</div>
+
+<div class="doc_text">
+
+<p>The <tt>cl::NotHidden</tt>, <tt>cl::Hidden</tt>, and
+<tt>cl::ReallyHidden</tt> modifiers are used to control whether or not an option
+appears in the <tt>-help</tt> and <tt>-help-hidden</tt> output for the
+compiled program:</p>
+
+<ul>
+
+<li><a name="cl::NotHidden">The <b><tt>cl::NotHidden</tt></b></a> modifier
+(which is the default for <tt><a href="#cl::opt">cl::opt</a></tt> and <tt><a
+href="#cl::list">cl::list</a></tt> options) indicates the option is to appear
+in both help listings.</li>
+
+<li><a name="cl::Hidden">The <b><tt>cl::Hidden</tt></b></a> modifier (which is the
+default for <tt><a href="#cl::alias">cl::alias</a></tt> options) indicates that
+the option should not appear in the <tt>-help</tt> output, but should appear in
+the <tt>-help-hidden</tt> output.</li>
+
+<li><a name="cl::ReallyHidden">The <b><tt>cl::ReallyHidden</tt></b></a> modifier
+indicates that the option should not appear in any help output.</li>
+
+</ul>
+
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
+  <a name="numoccurrences">Controlling the number of occurrences required and
+  allowed</a>
+</div>
+
+<div class="doc_text">
+
+<p>This group of options is used to control how many time an option is allowed
+(or required) to be specified on the command line of your program.  Specifying a
+value for this setting allows the CommandLine library to do error checking for
+you.</p>
+
+<p>The allowed values for this option group are:</p>
+
+<ul>
+
+<li><a name="cl::Optional">The <b><tt>cl::Optional</tt></b></a> modifier (which
+is the default for the <tt><a href="#cl::opt">cl::opt</a></tt> and <tt><a
+href="#cl::alias">cl::alias</a></tt> classes) indicates that your program will
+allow either zero or one occurrence of the option to be specified.</li>
+
+<li><a name="cl::ZeroOrMore">The <b><tt>cl::ZeroOrMore</tt></b></a> modifier
+(which is the default for the <tt><a href="#cl::list">cl::list</a></tt> class)
+indicates that your program will allow the option to be specified zero or more
+times.</li>
+
+<li><a name="cl::Required">The <b><tt>cl::Required</tt></b></a> modifier
+indicates that the specified option must be specified exactly one time.</li>
+
+<li><a name="cl::OneOrMore">The <b><tt>cl::OneOrMore</tt></b></a> modifier
+indicates that the option must be specified at least one time.</li>
+
+<li>The <b><tt>cl::ConsumeAfter</tt></b> modifier is described in the <a
+href="#positional">Positional arguments section</a>.</li>
+
+</ul>
+
+<p>If an option is not specified, then the value of the option is equal to the
+value specified by the <tt><a href="#cl::init">cl::init</a></tt> attribute.  If
+the <tt><a href="#cl::init">cl::init</a></tt> attribute is not specified, the
+option value is initialized with the default constructor for the data type.</p>
+
+<p>If an option is specified multiple times for an option of the <tt><a
+href="#cl::opt">cl::opt</a></tt> class, only the last value will be
+retained.</p>
+
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
+  <a name="valrequired">Controlling whether or not a value must be specified</a>
+</div>
+
+<div class="doc_text">
+
+<p>This group of options is used to control whether or not the option allows a
+value to be present.  In the case of the CommandLine library, a value is either
+specified with an equal sign (e.g. '<tt>-index-depth=17</tt>') or as a trailing
+string (e.g. '<tt>-o a.out</tt>').</p>
+
+<p>The allowed values for this option group are:</p>
+
+<ul>
+
+<li><a name="cl::ValueOptional">The <b><tt>cl::ValueOptional</tt></b></a> modifier
+(which is the default for <tt>bool</tt> typed options) specifies that it is
+acceptable to have a value, or not.  A boolean argument can be enabled just by
+appearing on the command line, or it can have an explicit '<tt>-foo=true</tt>'.
+If an option is specified with this mode, it is illegal for the value to be
+provided without the equal sign.  Therefore '<tt>-foo true</tt>' is illegal.  To
+get this behavior, you must use the <a
+href="#cl::ValueRequired">cl::ValueRequired</a> modifier.</li>
+
+<li><a name="cl::ValueRequired">The <b><tt>cl::ValueRequired</tt></b></a> modifier
+(which is the default for all other types except for <a
+href="#onealternative">unnamed alternatives using the generic parser</a>)
+specifies that a value must be provided.  This mode informs the command line
+library that if an option is not provides with an equal sign, that the next
+argument provided must be the value.  This allows things like '<tt>-o
+a.out</tt>' to work.</li>
+
+<li><a name="cl::ValueDisallowed">The <b><tt>cl::ValueDisallowed</tt></b></a>
+modifier (which is the default for <a href="#onealternative">unnamed
+alternatives using the generic parser</a>) indicates that it is a runtime error
+for the user to specify a value.  This can be provided to disallow users from
+providing options to boolean options (like '<tt>-foo=true</tt>').</li>
+
+</ul>
+
+<p>In general, the default values for this option group work just like you would
+want them to.  As mentioned above, you can specify the <a
+href="#cl::ValueDisallowed">cl::ValueDisallowed</a> modifier to a boolean
+argument to restrict your command line parser.  These options are mostly useful
+when <a href="#extensionguide">extending the library</a>.</p>
+
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
+  <a name="formatting">Controlling other formatting options</a>
+</div>
+
+<div class="doc_text">
+
+<p>The formatting option group is used to specify that the command line option
+has special abilities and is otherwise different from other command line
+arguments.  As usual, you can only specify one of these arguments at most.</p>
+
+<ul>
+
+<li><a name="cl::NormalFormatting">The <b><tt>cl::NormalFormatting</tt></b></a>
+modifier (which is the default all options) specifies that this option is
+"normal".</li>
+
+<li><a name="cl::Positional">The <b><tt>cl::Positional</tt></b></a> modifier
+specifies that this is a positional argument that does not have a command line
+option associated with it.  See the <a href="#positional">Positional
+Arguments</a> section for more information.</li>
+
+<li>The <b><a href="#cl::ConsumeAfter"><tt>cl::ConsumeAfter</tt></a></b> modifier
+specifies that this option is used to capture "interpreter style" arguments.  See <a href="#cl::ConsumeAfter">this section for more information</a>.</li>
+
+<li><a name="cl::Prefix">The <b><tt>cl::Prefix</tt></b></a> modifier specifies
+that this option prefixes its value.  With 'Prefix' options, the equal sign does
+not separate the value from the option name specified. Instead, the value is
+everything after the prefix, including any equal sign if present. This is useful
+for processing odd arguments like <tt>-lmalloc</tt> and <tt>-L/usr/lib</tt> in a
+linker tool or <tt>-DNAME=value</tt> in a compiler tool.   Here, the
+'<tt>l</tt>', '<tt>D</tt>' and '<tt>L</tt>' options are normal string (or list)
+options, that have the <b><tt><a href="#cl::Prefix">cl::Prefix</a></tt></b>
+modifier added to allow the CommandLine library to recognize them.  Note that
+<b><tt><a href="#cl::Prefix">cl::Prefix</a></tt></b> options must not have the
+<b><tt><a href="#cl::ValueDisallowed">cl::ValueDisallowed</a></tt></b> modifier
+specified.</li>
+
+<li><a name="cl::Grouping">The <b><tt>cl::Grouping</tt></b></a> modifier is used
+to implement Unix-style tools (like <tt>ls</tt>) that have lots of single letter
+arguments, but only require a single dash.  For example, the '<tt>ls -labF</tt>'
+command actually enables four different options, all of which are single
+letters.  Note that <b><tt><a href="#cl::Grouping">cl::Grouping</a></tt></b>
+options cannot have values.</li>
+
+</ul>
+
+<p>The CommandLine library does not restrict how you use the <b><tt><a
+href="#cl::Prefix">cl::Prefix</a></tt></b> or <b><tt><a
+href="#cl::Grouping">cl::Grouping</a></tt></b> modifiers, but it is possible to
+specify ambiguous argument settings.  Thus, it is possible to have multiple
+letter options that are prefix or grouping options, and they will still work as
+designed.</p>
+
+<p>To do this, the CommandLine library uses a greedy algorithm to parse the
+input option into (potentially multiple) prefix and grouping options.  The
+strategy basically looks like this:</p>
+
+<div class="doc_code"><tt>parse(string OrigInput) {</tt>
+
+<ol>
+<li><tt>string input = OrigInput;</tt>
+<li><tt>if (isOption(input)) return getOption(input).parse();</tt>&nbsp;&nbsp;&nbsp;&nbsp;<i>// Normal option</i>
+<li><tt>while (!isOption(input) &amp;&amp; !input.empty()) input.pop_back();</tt>&nbsp;&nbsp;&nbsp;&nbsp;<i>// Remove the last letter</i>
+<li><tt>if (input.empty()) return error();</tt>&nbsp;&nbsp;&nbsp;&nbsp;<i>// No matching option</i>
+<li><tt>if (getOption(input).isPrefix())<br>
+&nbsp;&nbsp;return getOption(input).parse(input);</tt>
+<li><tt>while (!input.empty()) {&nbsp;&nbsp;&nbsp;&nbsp;<i>// Must be grouping options</i><br>
+&nbsp;&nbsp;getOption(input).parse();<br>
+&nbsp;&nbsp;OrigInput.erase(OrigInput.begin(), OrigInput.begin()+input.length());<br>
+&nbsp;&nbsp;input = OrigInput;<br>
+&nbsp;&nbsp;while (!isOption(input) &amp;&amp; !input.empty()) input.pop_back();<br>
+}</tt>
+<li><tt>if (!OrigInput.empty()) error();</tt></li>
+</ol>
+
+<p><tt>}</tt></p>
+</div>
+
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
+  <a name="misc">Miscellaneous option modifiers</a>
+</div>
+
+<div class="doc_text">
+
+<p>The miscellaneous option modifiers are the only flags where you can specify
+more than one flag from the set: they are not mutually exclusive.  These flags
+specify boolean properties that modify the option.</p>
+
+<ul>
+
+<li><a name="cl::CommaSeparated">The <b><tt>cl::CommaSeparated</tt></b></a> modifier
+indicates that any commas specified for an option's value should be used to
+split the value up into multiple values for the option.  For example, these two
+options are equivalent when <tt>cl::CommaSeparated</tt> is specified:
+"<tt>-foo=a -foo=b -foo=c</tt>" and "<tt>-foo=a,b,c</tt>".  This option only
+makes sense to be used in a case where the option is allowed to accept one or
+more values (i.e. it is a <a href="#cl::list">cl::list</a> option).</li>
+
+<li><a name="cl::PositionalEatsArgs">The
+<b><tt>cl::PositionalEatsArgs</tt></b></a> modifier (which only applies to
+positional arguments, and only makes sense for lists) indicates that positional
+argument should consume any strings after it (including strings that start with
+a "-") up until another recognized positional argument.  For example, if you
+have two "eating" positional arguments, "<tt>pos1</tt>" and "<tt>pos2</tt>", the
+string "<tt>-pos1 -foo -bar baz -pos2 -bork</tt>" would cause the "<tt>-foo -bar
+-baz</tt>" strings to be applied to the "<tt>-pos1</tt>" option and the
+"<tt>-bork</tt>" string to be applied to the "<tt>-pos2</tt>" option.</li>
+
+<li><a name="cl::Sink">The <b><tt>cl::Sink</tt></b></a> modifier is
+used to handle unknown options. If there is at least one option with
+<tt>cl::Sink</tt> modifier specified, the parser passes
+unrecognized option strings to it as values instead of signaling an
+error. As with <tt>cl::CommaSeparated</tt>, this modifier
+only makes sense with a <a href="#cl::list">cl::list</a> option.</li>
+
+</ul>
+
+<p>So far, these are the only three miscellaneous option modifiers.</p>
+
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
+  <a name="response">Response files</a>
+</div>
+
+<div class="doc_text">
+
+<p>Some systems, such as certain variants of Microsoft Windows and
+some older Unices have a relatively low limit on command-line
+length. It is therefore customary to use the so-called 'response
+files' to circumvent this restriction. These files are mentioned on
+the command-line (using the "@file") syntax. The program reads these
+files and inserts the contents into argv, thereby working around the
+command-line length limits. Response files are enabled by an optional
+fourth argument to
+<a href="#cl::ParseEnvironmentOptions"><tt>cl::ParseEnvironmentOptions</tt></a>
+and
+<a href="#cl::ParseCommandLineOptions"><tt>cl::ParseCommandLineOptions</tt></a>.
+</p>
+
+</div>
+
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="toplevel">Top-Level Classes and Functions</a>
+</div>
+
+<div class="doc_text">
+
+<p>Despite all of the built-in flexibility, the CommandLine option library
+really only consists of one function (<a
+href="#cl::ParseCommandLineOptions"><tt>cl::ParseCommandLineOptions</tt></a>)
+and three main classes: <a href="#cl::opt"><tt>cl::opt</tt></a>, <a
+href="#cl::list"><tt>cl::list</tt></a>, and <a
+href="#cl::alias"><tt>cl::alias</tt></a>.  This section describes these three
+classes in detail.</p>
+
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
+  <a name="cl::ParseCommandLineOptions">The <tt>cl::ParseCommandLineOptions</tt>
+  function</a>
+</div>
+
+<div class="doc_text">
+
+<p>The <tt>cl::ParseCommandLineOptions</tt> function is designed to be called
+directly from <tt>main</tt>, and is used to fill in the values of all of the
+command line option variables once <tt>argc</tt> and <tt>argv</tt> are
+available.</p>
+
+<p>The <tt>cl::ParseCommandLineOptions</tt> function requires two parameters
+(<tt>argc</tt> and <tt>argv</tt>), but may also take an optional third parameter
+which holds <a href="#description">additional extra text</a> to emit when the
+<tt>-help</tt> option is invoked, and a fourth boolean parameter that enables
+<a href="#response">response files</a>.</p>
+
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
+  <a name="cl::ParseEnvironmentOptions">The <tt>cl::ParseEnvironmentOptions</tt>
+  function</a>
+</div>
+
+<div class="doc_text">
+
+<p>The <tt>cl::ParseEnvironmentOptions</tt> function has mostly the same effects
+as <a
+href="#cl::ParseCommandLineOptions"><tt>cl::ParseCommandLineOptions</tt></a>,
+except that it is designed to take values for options from an environment
+variable, for those cases in which reading the command line is not convenient or
+desired. It fills in the values of all the command line option variables just
+like <a
+href="#cl::ParseCommandLineOptions"><tt>cl::ParseCommandLineOptions</tt></a>
+does.</p>
+
+<p>It takes four parameters: the name of the program (since <tt>argv</tt> may
+not be available, it can't just look in <tt>argv[0]</tt>), the name of the
+environment variable to examine, the optional
+<a href="#description">additional extra text</a> to emit when the
+<tt>-help</tt> option is invoked, and the boolean
+switch that controls whether <a href="#response">response files</a>
+should be read.</p>
+
+<p><tt>cl::ParseEnvironmentOptions</tt> will break the environment
+variable's value up into words and then process them using
+<a href="#cl::ParseCommandLineOptions"><tt>cl::ParseCommandLineOptions</tt></a>.
+<b>Note:</b> Currently <tt>cl::ParseEnvironmentOptions</tt> does not support
+quoting, so an environment variable containing <tt>-option "foo bar"</tt> will
+be parsed as three words, <tt>-option</tt>, <tt>"foo</tt>, and <tt>bar"</tt>,
+which is different from what you would get from the shell with the same
+input.</p>
+
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
+  <a name="cl::SetVersionPrinter">The <tt>cl::SetVersionPrinter</tt>
+  function</a>
+</div>
+
+<div class="doc_text">
+
+<p>The <tt>cl::SetVersionPrinter</tt> function is designed to be called
+directly from <tt>main</tt> and <i>before</i>
+<tt>cl::ParseCommandLineOptions</tt>. Its use is optional. It simply arranges
+for a function to be called in response to the <tt>--version</tt> option instead
+of having the <tt>CommandLine</tt> library print out the usual version string
+for LLVM. This is useful for programs that are not part of LLVM but wish to use
+the <tt>CommandLine</tt> facilities. Such programs should just define a small
+function that takes no arguments and returns <tt>void</tt> and that prints out
+whatever version information is appropriate for the program. Pass the address
+of that function to <tt>cl::SetVersionPrinter</tt> to arrange for it to be
+called when the <tt>--version</tt> option is given by the user.</p>
+
+</div>
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
+  <a name="cl::opt">The <tt>cl::opt</tt> class</a>
+</div>
+
+<div class="doc_text">
+
+<p>The <tt>cl::opt</tt> class is the class used to represent scalar command line
+options, and is the one used most of the time.  It is a templated class which
+can take up to three arguments (all except for the first have default values
+though):</p>
+
+<div class="doc_code"><pre>
+<b>namespace</b> cl {
+  <b>template</b> &lt;<b>class</b> DataType, <b>bool</b> ExternalStorage = <b>false</b>,
+            <b>class</b> ParserClass = parser&lt;DataType&gt; &gt;
+  <b>class</b> opt;
+}
+</pre></div>
+
+<p>The first template argument specifies what underlying data type the command
+line argument is, and is used to select a default parser implementation.  The
+second template argument is used to specify whether the option should contain
+the storage for the option (the default) or whether external storage should be
+used to contain the value parsed for the option (see <a href="#storage">Internal
+vs External Storage</a> for more information).</p>
+
+<p>The third template argument specifies which parser to use.  The default value
+selects an instantiation of the <tt>parser</tt> class based on the underlying
+data type of the option.  In general, this default works well for most
+applications, so this option is only used when using a <a
+href="#customparser">custom parser</a>.</p>
+
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
+  <a name="cl::list">The <tt>cl::list</tt> class</a>
+</div>
+
+<div class="doc_text">
+
+<p>The <tt>cl::list</tt> class is the class used to represent a list of command
+line options.  It too is a templated class which can take up to three
+arguments:</p>
+
+<div class="doc_code"><pre>
+<b>namespace</b> cl {
+  <b>template</b> &lt;<b>class</b> DataType, <b>class</b> Storage = <b>bool</b>,
+            <b>class</b> ParserClass = parser&lt;DataType&gt; &gt;
+  <b>class</b> list;
+}
+</pre></div>
+
+<p>This class works the exact same as the <a
+href="#cl::opt"><tt>cl::opt</tt></a> class, except that the second argument is
+the <b>type</b> of the external storage, not a boolean value.  For this class,
+the marker type '<tt>bool</tt>' is used to indicate that internal storage should
+be used.</p>
+
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
+  <a name="cl::bits">The <tt>cl::bits</tt> class</a>
+</div>
+
+<div class="doc_text">
+
+<p>The <tt>cl::bits</tt> class is the class used to represent a list of command
+line options in the form of a bit vector.  It is also a templated class which
+can take up to three arguments:</p>
+
+<div class="doc_code"><pre>
+<b>namespace</b> cl {
+  <b>template</b> &lt;<b>class</b> DataType, <b>class</b> Storage = <b>bool</b>,
+            <b>class</b> ParserClass = parser&lt;DataType&gt; &gt;
+  <b>class</b> bits;
+}
+</pre></div>
+
+<p>This class works the exact same as the <a
+href="#cl::opt"><tt>cl::lists</tt></a> class, except that the second argument
+must be of <b>type</b> <tt>unsigned</tt> if external storage is used.</p>
+
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
+  <a name="cl::alias">The <tt>cl::alias</tt> class</a>
+</div>
+
+<div class="doc_text">
+
+<p>The <tt>cl::alias</tt> class is a nontemplated class that is used to form
+aliases for other arguments.</p>
+
+<div class="doc_code"><pre>
+<b>namespace</b> cl {
+  <b>class</b> alias;
+}
+</pre></div>
+
+<p>The <a href="#cl::aliasopt"><tt>cl::aliasopt</tt></a> attribute should be
+used to specify which option this is an alias for.  Alias arguments default to
+being <a href="#cl::Hidden">Hidden</a>, and use the aliased options parser to do
+the conversion from string to data.</p>
+
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
+  <a name="cl::extrahelp">The <tt>cl::extrahelp</tt> class</a>
+</div>
+
+<div class="doc_text">
+
+<p>The <tt>cl::extrahelp</tt> class is a nontemplated class that allows extra
+help text to be printed out for the <tt>-help</tt> option.</p>
+
+<div class="doc_code"><pre>
+<b>namespace</b> cl {
+  <b>struct</b> extrahelp;
+}
+</pre></div>
+
+<p>To use the extrahelp, simply construct one with a <tt>const char*</tt>
+parameter to the constructor. The text passed to the constructor will be printed
+at the bottom of the help message, verbatim. Note that multiple
+<tt>cl::extrahelp</tt> <b>can</b> be used, but this practice is discouraged. If
+your tool needs to print additional help information, put all that help into a
+single <tt>cl::extrahelp</tt> instance.</p>
+<p>For example:</p>
+<div class="doc_code"><pre>
+  cl::extrahelp("\nADDITIONAL HELP:\n\n  This is the extra help\n");
+</pre></div>
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="builtinparsers">Builtin parsers</a>
+</div>
+
+<div class="doc_text">
+
+<p>Parsers control how the string value taken from the command line is
+translated into a typed value, suitable for use in a C++ program.  By default,
+the CommandLine library uses an instance of <tt>parser&lt;type&gt;</tt> if the
+command line option specifies that it uses values of type '<tt>type</tt>'.
+Because of this, custom option processing is specified with specializations of
+the '<tt>parser</tt>' class.</p>
+
+<p>The CommandLine library provides the following builtin parser
+specializations, which are sufficient for most applications. It can, however,
+also be extended to work with new data types and new ways of interpreting the
+same data.  See the <a href="#customparser">Writing a Custom Parser</a> for more
+details on this type of library extension.</p>
+
+<ul>
+
+<li><a name="genericparser">The <b>generic <tt>parser&lt;t&gt;</tt> parser</b></a>
+can be used to map strings values to any data type, through the use of the <a
+href="#cl::values">cl::values</a> property, which specifies the mapping
+information.  The most common use of this parser is for parsing enum values,
+which allows you to use the CommandLine library for all of the error checking to
+make sure that only valid enum values are specified (as opposed to accepting
+arbitrary strings).  Despite this, however, the generic parser class can be used
+for any data type.</li>
+
+<li><a name="boolparser">The <b><tt>parser&lt;bool&gt;</tt> specialization</b></a>
+is used to convert boolean strings to a boolean value.  Currently accepted
+strings are "<tt>true</tt>", "<tt>TRUE</tt>", "<tt>True</tt>", "<tt>1</tt>",
+"<tt>false</tt>", "<tt>FALSE</tt>", "<tt>False</tt>", and "<tt>0</tt>".</li>
+
+<li><a name="boolOrDefaultparser">The <b><tt>parser&lt;boolOrDefault&gt;</tt>
+ specialization</b></a> is used for cases where the value is boolean,
+but we also need to know whether the option was specified at all.  boolOrDefault
+is an enum with 3 values, BOU_UNSET, BOU_TRUE and BOU_FALSE.  This parser accepts
+the same strings as <b><tt>parser&lt;bool&gt;</tt></b>.</li>
+
+<li><a name="stringparser">The <b><tt>parser&lt;string&gt;</tt>
+specialization</b></a> simply stores the parsed string into the string value
+specified.  No conversion or modification of the data is performed.</li>
+
+<li><a name="intparser">The <b><tt>parser&lt;int&gt;</tt> specialization</b></a>
+uses the C <tt>strtol</tt> function to parse the string input.  As such, it will
+accept a decimal number (with an optional '+' or '-' prefix) which must start
+with a non-zero digit.  It accepts octal numbers, which are identified with a
+'<tt>0</tt>' prefix digit, and hexadecimal numbers with a prefix of
+'<tt>0x</tt>' or '<tt>0X</tt>'.</li>
+
+<li><a name="doubleparser">The <b><tt>parser&lt;double&gt;</tt></b></a> and
+<b><tt>parser&lt;float&gt;</tt> specializations</b> use the standard C
+<tt>strtod</tt> function to convert floating point strings into floating point
+values.  As such, a broad range of string formats is supported, including
+exponential notation (ex: <tt>1.7e15</tt>) and properly supports locales.
+</li>
+
+</ul>
+
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_section">
+  <a name="extensionguide">Extension Guide</a>
+</div>
+<!-- *********************************************************************** -->
+
+<div class="doc_text">
+
+<p>Although the CommandLine library has a lot of functionality built into it
+already (as discussed previously), one of its true strengths lie in its
+extensibility.  This section discusses how the CommandLine library works under
+the covers and illustrates how to do some simple, common, extensions.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="customparser">Writing a custom parser</a>
+</div>
+
+<div class="doc_text">
+
+<p>One of the simplest and most common extensions is the use of a custom parser.
+As <a href="#builtinparsers">discussed previously</a>, parsers are the portion
+of the CommandLine library that turns string input from the user into a
+particular parsed data type, validating the input in the process.</p>
+
+<p>There are two ways to use a new parser:</p>
+
+<ol>
+
+<li>
+
+<p>Specialize the <a href="#genericparser"><tt>cl::parser</tt></a> template for
+your custom data type.<p>
+
+<p>This approach has the advantage that users of your custom data type will
+automatically use your custom parser whenever they define an option with a value
+type of your data type.  The disadvantage of this approach is that it doesn't
+work if your fundamental data type is something that is already supported.</p>
+
+</li>
+
+<li>
+
+<p>Write an independent class, using it explicitly from options that need
+it.</p>
+
+<p>This approach works well in situations where you would line to parse an
+option using special syntax for a not-very-special data-type.  The drawback of
+this approach is that users of your parser have to be aware that they are using
+your parser instead of the builtin ones.</p>
+
+</li>
+
+</ol>
+
+<p>To guide the discussion, we will discuss a custom parser that accepts file
+sizes, specified with an optional unit after the numeric size.  For example, we
+would like to parse "102kb", "41M", "1G" into the appropriate integer value.  In
+this case, the underlying data type we want to parse into is
+'<tt>unsigned</tt>'.  We choose approach #2 above because we don't want to make
+this the default for all <tt>unsigned</tt> options.</p>
+
+<p>To start out, we declare our new <tt>FileSizeParser</tt> class:</p>
+
+<div class="doc_code"><pre>
+<b>struct</b> FileSizeParser : <b>public</b> cl::basic_parser&lt;<b>unsigned</b>&gt; {
+  <i>// parse - Return true on error.</i>
+  <b>bool</b> parse(cl::Option &amp;O, <b>const char</b> *ArgName, <b>const</b> std::string &amp;ArgValue,
+             <b>unsigned</b> &amp;Val);
+};
+</pre></div>
+
+<p>Our new class inherits from the <tt>cl::basic_parser</tt> template class to
+fill in the default, boiler plate code for us.  We give it the data type that
+we parse into, the last argument to the <tt>parse</tt> method, so that clients of
+our custom parser know what object type to pass in to the parse method.  (Here we
+declare that we parse into '<tt>unsigned</tt>' variables.)</p>
+
+<p>For most purposes, the only method that must be implemented in a custom
+parser is the <tt>parse</tt> method.  The <tt>parse</tt> method is called
+whenever the option is invoked, passing in the option itself, the option name,
+the string to parse, and a reference to a return value.  If the string to parse
+is not well-formed, the parser should output an error message and return true.
+Otherwise it should return false and set '<tt>Val</tt>' to the parsed value.  In
+our example, we implement <tt>parse</tt> as:</p>
+
+<div class="doc_code"><pre>
+<b>bool</b> FileSizeParser::parse(cl::Option &amp;O, <b>const char</b> *ArgName,
+                           <b>const</b> std::string &amp;Arg, <b>unsigned</b> &amp;Val) {
+  <b>const char</b> *ArgStart = Arg.c_str();
+  <b>char</b> *End;
+
+  <i>// Parse integer part, leaving 'End' pointing to the first non-integer char</i>
+  Val = (unsigned)strtol(ArgStart, &amp;End, 0);
+
+  <b>while</b> (1) {
+    <b>switch</b> (*End++) {
+    <b>case</b> 0: <b>return</b> false;   <i>// No error</i>
+    <b>case</b> 'i':               <i>// Ignore the 'i' in KiB if people use that</i>
+    <b>case</b> 'b': <b>case</b> 'B':     <i>// Ignore B suffix</i>
+      <b>break</b>;
+
+    <b>case</b> 'g': <b>case</b> 'G': Val *= 1024*1024*1024; <b>break</b>;
+    <b>case</b> 'm': <b>case</b> 'M': Val *= 1024*1024;      <b>break</b>;
+    <b>case</b> 'k': <b>case</b> 'K': Val *= 1024;           <b>break</b>;
+
+    default:
+      <i>// Print an error message if unrecognized character!</i>
+      <b>return</b> O.error("'" + Arg + "' value invalid for file size argument!");
+    }
+  }
+}
+</pre></div>
+
+<p>This function implements a very simple parser for the kinds of strings we are
+interested in.  Although it has some holes (it allows "<tt>123KKK</tt>" for
+example), it is good enough for this example.  Note that we use the option
+itself to print out the error message (the <tt>error</tt> method always returns
+true) in order to get a nice error message (shown below).  Now that we have our
+parser class, we can use it like this:</p>
+
+<div class="doc_code"><pre>
+<b>static</b> <a href="#cl::opt">cl::opt</a>&lt;<b>unsigned</b>, <b>false</b>, FileSizeParser&gt;
+MFS(<i>"max-file-size"</i>, <a href="#cl::desc">cl::desc</a>(<i>"Maximum file size to accept"</i>),
+    <a href="#cl::value_desc">cl::value_desc</a>("<i>size</i>"));
+</pre></div>
+
+<p>Which adds this to the output of our program:</p>
+
+<div class="doc_code"><pre>
+OPTIONS:
+  -help                 - display available options (-help-hidden for more)
+  ...
+  <b>-max-file-size=&lt;size&gt; - Maximum file size to accept</b>
+</pre></div>
+
+<p>And we can test that our parse works correctly now (the test program just
+prints out the max-file-size argument value):</p>
+
+<div class="doc_code"><pre>
+$ ./test
+MFS: 0
+$ ./test -max-file-size=123MB
+MFS: 128974848
+$ ./test -max-file-size=3G
+MFS: 3221225472
+$ ./test -max-file-size=dog
+-max-file-size option: 'dog' value invalid for file size argument!
+</pre></div>
+
+<p>It looks like it works.  The error message that we get is nice and helpful,
+and we seem to accept reasonable file sizes.  This wraps up the "custom parser"
+tutorial.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="explotingexternal">Exploiting external storage</a>
+</div>
+
+<div class="doc_text">
+  <p>Several of the LLVM libraries define static <tt>cl::opt</tt> instances that
+  will automatically be included in any program that links with that library.
+  This is a feature. However, sometimes it is necessary to know the value of the
+  command line option outside of the library. In these cases the library does or
+  should provide an external storage location that is accessible to users of the
+  library. Examples of this include the <tt>llvm::DebugFlag</tt> exported by the
+  <tt>lib/Support/Debug.cpp</tt> file and the <tt>llvm::TimePassesIsEnabled</tt>
+  flag exported by the <tt>lib/VMCore/Pass.cpp</tt> file.</p>
+
+<p>TODO: complete this section</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="dynamicopts">Dynamically adding command line options</a>
+</div>
+
+<div class="doc_text">
+
+<p>TODO: fill in this section</p>
+
+</div>
+
+<!-- *********************************************************************** -->
+
+<hr>
+<address>
+  <a href="http://jigsaw.w3.org/css-validator/check/referer"><img
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS"></a>
+  <a href="http://validator.w3.org/check/referer"><img
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01"></a>
+
+  <a href="mailto:sabre at nondot.org">Chris Lattner</a><br>
+  <a href="http://llvm.org">LLVM Compiler Infrastructure</a><br>
+  Last modified: $Date: 2010-05-06 17:28:04 -0700 (Thu, 06 May 2010) $
+</address>
+
+</body>
+</html>

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+<?xml version="1.0" encoding="utf-8" ?>
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml" xml:lang="en" lang="en">
+<head>
+<meta http-equiv="Content-Type" content="text/html; charset=utf-8" />
+<meta name="generator" content="Docutils 0.5: http://docutils.sourceforge.net/" />
+<title>Customizing LLVMC: Reference Manual</title>
+<link rel="stylesheet" href="llvm.css" type="text/css" />
+</head>
+<body>
+<div class="document" id="customizing-llvmc-reference-manual">
+<h1 class="title">Customizing LLVMC: Reference Manual</h1>
+
+<!-- This file was automatically generated by rst2html.
+Please do not edit directly!
+The ReST source lives in the directory 'tools/llvmc/doc'. -->
+<div class="contents topic" id="contents">
+<p class="topic-title first">Contents</p>
+<ul class="simple">
+<li><a class="reference internal" href="#introduction" id="id8">Introduction</a></li>
+<li><a class="reference internal" href="#compiling-with-llvmc" id="id9">Compiling with LLVMC</a></li>
+<li><a class="reference internal" href="#predefined-options" id="id10">Predefined options</a></li>
+<li><a class="reference internal" href="#compiling-llvmc-plugins" id="id11">Compiling LLVMC plugins</a></li>
+<li><a class="reference internal" href="#compiling-standalone-llvmc-based-drivers" id="id12">Compiling standalone LLVMC-based drivers</a></li>
+<li><a class="reference internal" href="#customizing-llvmc-the-compilation-graph" id="id13">Customizing LLVMC: the compilation graph</a></li>
+<li><a class="reference internal" href="#describing-options" id="id14">Describing options</a><ul>
+<li><a class="reference internal" href="#external-options" id="id15">External options</a></li>
+</ul>
+</li>
+<li><a class="reference internal" href="#conditional-evaluation" id="id16">Conditional evaluation</a></li>
+<li><a class="reference internal" href="#writing-a-tool-description" id="id17">Writing a tool description</a><ul>
+<li><a class="reference internal" href="#id5" id="id18">Actions</a></li>
+</ul>
+</li>
+<li><a class="reference internal" href="#language-map" id="id19">Language map</a></li>
+<li><a class="reference internal" href="#option-preprocessor" id="id20">Option preprocessor</a></li>
+<li><a class="reference internal" href="#more-advanced-topics" id="id21">More advanced topics</a><ul>
+<li><a class="reference internal" href="#hooks-and-environment-variables" id="id22">Hooks and environment variables</a></li>
+<li><a class="reference internal" href="#how-plugins-are-loaded" id="id23">How plugins are loaded</a></li>
+<li><a class="reference internal" href="#debugging" id="id24">Debugging</a></li>
+<li><a class="reference internal" href="#conditioning-on-the-executable-name" id="id25">Conditioning on the executable name</a></li>
+</ul>
+</li>
+</ul>
+</div>
+<div class="doc_author">
+<p>Written by <a href="mailto:foldr at codedgers.com">Mikhail Glushenkov</a></p>
+</div><div class="section" id="introduction">
+<h1><a class="toc-backref" href="#id8">Introduction</a></h1>
+<p>LLVMC is a generic compiler driver, designed to be customizable and
+extensible. It plays the same role for LLVM as the <tt class="docutils literal"><span class="pre">gcc</span></tt> program
+does for GCC - LLVMC's job is essentially to transform a set of input
+files into a set of targets depending on configuration rules and user
+options. What makes LLVMC different is that these transformation rules
+are completely customizable - in fact, LLVMC knows nothing about the
+specifics of transformation (even the command-line options are mostly
+not hard-coded) and regards the transformation structure as an
+abstract graph. The structure of this graph is completely determined
+by plugins, which can be either statically or dynamically linked. This
+makes it possible to easily adapt LLVMC for other purposes - for
+example, as a build tool for game resources.</p>
+<p>Because LLVMC employs <a class="reference external" href="http://llvm.org/docs/TableGenFundamentals.html">TableGen</a> as its configuration language, you
+need to be familiar with it to customize LLVMC.</p>
+</div>
+<div class="section" id="compiling-with-llvmc">
+<h1><a class="toc-backref" href="#id9">Compiling with LLVMC</a></h1>
+<p>LLVMC tries hard to be as compatible with <tt class="docutils literal"><span class="pre">gcc</span></tt> as possible,
+although there are some small differences. Most of the time, however,
+you shouldn't be able to notice them:</p>
+<pre class="literal-block">
+$ # This works as expected:
+$ llvmc -O3 -Wall hello.cpp
+$ ./a.out
+hello
+</pre>
+<p>One nice feature of LLVMC is that one doesn't have to distinguish between
+different compilers for different languages (think <tt class="docutils literal"><span class="pre">g++</span></tt> vs.  <tt class="docutils literal"><span class="pre">gcc</span></tt>) - the
+right toolchain is chosen automatically based on input language names (which
+are, in turn, determined from file extensions). If you want to force files
+ending with &quot;.c&quot; to compile as C++, use the <tt class="docutils literal"><span class="pre">-x</span></tt> option, just like you would
+do it with <tt class="docutils literal"><span class="pre">gcc</span></tt>:</p>
+<pre class="literal-block">
+$ # hello.c is really a C++ file
+$ llvmc -x c++ hello.c
+$ ./a.out
+hello
+</pre>
+<p>On the other hand, when using LLVMC as a linker to combine several C++
+object files you should provide the <tt class="docutils literal"><span class="pre">--linker</span></tt> option since it's
+impossible for LLVMC to choose the right linker in that case:</p>
+<pre class="literal-block">
+$ llvmc -c hello.cpp
+$ llvmc hello.o
+[A lot of link-time errors skipped]
+$ llvmc --linker=c++ hello.o
+$ ./a.out
+hello
+</pre>
+<p>By default, LLVMC uses <tt class="docutils literal"><span class="pre">llvm-gcc</span></tt> to compile the source code. It is also
+possible to choose the <tt class="docutils literal"><span class="pre">clang</span></tt> compiler with the <tt class="docutils literal"><span class="pre">-clang</span></tt> option.</p>
+</div>
+<div class="section" id="predefined-options">
+<h1><a class="toc-backref" href="#id10">Predefined options</a></h1>
+<p>LLVMC has some built-in options that can't be overridden in the
+configuration libraries:</p>
+<ul class="simple">
+<li><tt class="docutils literal"><span class="pre">-o</span> <span class="pre">FILE</span></tt> - Output file name.</li>
+<li><tt class="docutils literal"><span class="pre">-x</span> <span class="pre">LANGUAGE</span></tt> - Specify the language of the following input files
+until the next -x option.</li>
+<li><tt class="docutils literal"><span class="pre">-load</span> <span class="pre">PLUGIN_NAME</span></tt> - Load the specified plugin DLL. Example:
+<tt class="docutils literal"><span class="pre">-load</span> <span class="pre">$LLVM_DIR/Release/lib/LLVMCSimple.so</span></tt>.</li>
+<li><tt class="docutils literal"><span class="pre">-v</span></tt> - Enable verbose mode, i.e. print out all executed commands.</li>
+<li><tt class="docutils literal"><span class="pre">--save-temps</span></tt> - Write temporary files to the current directory and do not
+delete them on exit. This option can also take an argument: the
+<tt class="docutils literal"><span class="pre">--save-temps=obj</span></tt> switch will write files into the directory specified with
+the <tt class="docutils literal"><span class="pre">-o</span></tt> option. The <tt class="docutils literal"><span class="pre">--save-temps=cwd</span></tt> and <tt class="docutils literal"><span class="pre">--save-temps</span></tt> switches are
+both synonyms for the default behaviour.</li>
+<li><tt class="docutils literal"><span class="pre">--temp-dir</span> <span class="pre">DIRECTORY</span></tt> - Store temporary files in the given directory. This
+directory is deleted on exit unless <tt class="docutils literal"><span class="pre">--save-temps</span></tt> is specified. If
+<tt class="docutils literal"><span class="pre">--save-temps=obj</span></tt> is also specified, <tt class="docutils literal"><span class="pre">--temp-dir</span></tt> is given the
+precedence.</li>
+<li><tt class="docutils literal"><span class="pre">--check-graph</span></tt> - Check the compilation for common errors like mismatched
+output/input language names, multiple default edges and cycles. Because of
+plugins, these checks can't be performed at compile-time. Exit with code zero
+if no errors were found, and return the number of found errors
+otherwise. Hidden option, useful for debugging LLVMC plugins.</li>
+<li><tt class="docutils literal"><span class="pre">--view-graph</span></tt> - Show a graphical representation of the compilation graph
+and exit. Requires that you have <tt class="docutils literal"><span class="pre">dot</span></tt> and <tt class="docutils literal"><span class="pre">gv</span></tt> programs installed. Hidden
+option, useful for debugging LLVMC plugins.</li>
+<li><tt class="docutils literal"><span class="pre">--write-graph</span></tt> - Write a <tt class="docutils literal"><span class="pre">compilation-graph.dot</span></tt> file in the current
+directory with the compilation graph description in Graphviz format (identical
+to the file used by the <tt class="docutils literal"><span class="pre">--view-graph</span></tt> option). The <tt class="docutils literal"><span class="pre">-o</span></tt> option can be
+used to set the output file name. Hidden option, useful for debugging LLVMC
+plugins.</li>
+<li><tt class="docutils literal"><span class="pre">-help</span></tt>, <tt class="docutils literal"><span class="pre">-help-hidden</span></tt>, <tt class="docutils literal"><span class="pre">--version</span></tt> - These options have
+their standard meaning.</li>
+</ul>
+</div>
+<div class="section" id="compiling-llvmc-plugins">
+<h1><a class="toc-backref" href="#id11">Compiling LLVMC plugins</a></h1>
+<p>It's easiest to start working on your own LLVMC plugin by copying the
+skeleton project which lives under <tt class="docutils literal"><span class="pre">$LLVMC_DIR/plugins/Simple</span></tt>:</p>
+<pre class="literal-block">
+$ cd $LLVMC_DIR/plugins
+$ cp -r Simple MyPlugin
+$ cd MyPlugin
+$ ls
+Makefile PluginMain.cpp Simple.td
+</pre>
+<p>As you can see, our basic plugin consists of only two files (not
+counting the build script). <tt class="docutils literal"><span class="pre">Simple.td</span></tt> contains TableGen
+description of the compilation graph; its format is documented in the
+following sections. <tt class="docutils literal"><span class="pre">PluginMain.cpp</span></tt> is just a helper file used to
+compile the auto-generated C++ code produced from TableGen source. It
+can also contain hook definitions (see <a class="reference internal" href="#hooks">below</a>).</p>
+<p>The first thing that you should do is to change the <tt class="docutils literal"><span class="pre">LLVMC_PLUGIN</span></tt>
+variable in the <tt class="docutils literal"><span class="pre">Makefile</span></tt> to avoid conflicts (since this variable
+is used to name the resulting library):</p>
+<pre class="literal-block">
+LLVMC_PLUGIN=MyPlugin
+</pre>
+<p>It is also a good idea to rename <tt class="docutils literal"><span class="pre">Simple.td</span></tt> to something less
+generic:</p>
+<pre class="literal-block">
+$ mv Simple.td MyPlugin.td
+</pre>
+<p>To build your plugin as a dynamic library, just <tt class="docutils literal"><span class="pre">cd</span></tt> to its source
+directory and run <tt class="docutils literal"><span class="pre">make</span></tt>. The resulting file will be called
+<tt class="docutils literal"><span class="pre">plugin_llvmc_$(LLVMC_PLUGIN).$(DLL_EXTENSION)</span></tt> (in our case,
+<tt class="docutils literal"><span class="pre">plugin_llvmc_MyPlugin.so</span></tt>). This library can be then loaded in with the
+<tt class="docutils literal"><span class="pre">-load</span></tt> option. Example:</p>
+<pre class="literal-block">
+$ cd $LLVMC_DIR/plugins/Simple
+$ make
+$ llvmc -load $LLVM_DIR/Release/lib/plugin_llvmc_Simple.so
+</pre>
+</div>
+<div class="section" id="compiling-standalone-llvmc-based-drivers">
+<h1><a class="toc-backref" href="#id12">Compiling standalone LLVMC-based drivers</a></h1>
+<p>By default, the <tt class="docutils literal"><span class="pre">llvmc</span></tt> executable consists of a driver core plus several
+statically linked plugins (<tt class="docutils literal"><span class="pre">Base</span></tt> and <tt class="docutils literal"><span class="pre">Clang</span></tt> at the moment). You can
+produce a standalone LLVMC-based driver executable by linking the core with your
+own plugins. The recommended way to do this is by starting with the provided
+<tt class="docutils literal"><span class="pre">Skeleton</span></tt> example (<tt class="docutils literal"><span class="pre">$LLVMC_DIR/example/Skeleton</span></tt>):</p>
+<pre class="literal-block">
+$ cd $LLVMC_DIR/example/
+$ cp -r Skeleton mydriver
+$ cd mydriver
+$ vim Makefile
+[...]
+$ make
+</pre>
+<p>If you're compiling LLVM with different source and object directories, then you
+must perform the following additional steps before running <tt class="docutils literal"><span class="pre">make</span></tt>:</p>
+<pre class="literal-block">
+# LLVMC_SRC_DIR = $LLVM_SRC_DIR/tools/llvmc/
+# LLVMC_OBJ_DIR = $LLVM_OBJ_DIR/tools/llvmc/
+$ cp $LLVMC_SRC_DIR/example/mydriver/Makefile \
+  $LLVMC_OBJ_DIR/example/mydriver/
+$ cd $LLVMC_OBJ_DIR/example/mydriver
+$ make
+</pre>
+<p>Another way to do the same thing is by using the following command:</p>
+<pre class="literal-block">
+$ cd $LLVMC_DIR
+$ make LLVMC_BUILTIN_PLUGINS=MyPlugin LLVMC_BASED_DRIVER_NAME=mydriver
+</pre>
+<p>This works with both srcdir == objdir and srcdir != objdir, but assumes that the
+plugin source directory was placed under <tt class="docutils literal"><span class="pre">$LLVMC_DIR/plugins</span></tt>.</p>
+<p>Sometimes, you will want a 'bare-bones' version of LLVMC that has no
+built-in plugins. It can be compiled with the following command:</p>
+<pre class="literal-block">
+$ cd $LLVMC_DIR
+$ make LLVMC_BUILTIN_PLUGINS=&quot;&quot;
+</pre>
+</div>
+<div class="section" id="customizing-llvmc-the-compilation-graph">
+<h1><a class="toc-backref" href="#id13">Customizing LLVMC: the compilation graph</a></h1>
+<p>Each TableGen configuration file should include the common
+definitions:</p>
+<pre class="literal-block">
+include &quot;llvm/CompilerDriver/Common.td&quot;
+</pre>
+<p>Internally, LLVMC stores information about possible source
+transformations in form of a graph. Nodes in this graph represent
+tools, and edges between two nodes represent a transformation path. A
+special &quot;root&quot; node is used to mark entry points for the
+transformations. LLVMC also assigns a weight to each edge (more on
+this later) to choose between several alternative edges.</p>
+<p>The definition of the compilation graph (see file
+<tt class="docutils literal"><span class="pre">plugins/Base/Base.td</span></tt> for an example) is just a list of edges:</p>
+<pre class="literal-block">
+def CompilationGraph : CompilationGraph&lt;[
+    Edge&lt;&quot;root&quot;, &quot;llvm_gcc_c&quot;&gt;,
+    Edge&lt;&quot;root&quot;, &quot;llvm_gcc_assembler&quot;&gt;,
+    ...
+
+    Edge&lt;&quot;llvm_gcc_c&quot;, &quot;llc&quot;&gt;,
+    Edge&lt;&quot;llvm_gcc_cpp&quot;, &quot;llc&quot;&gt;,
+    ...
+
+    OptionalEdge&lt;&quot;llvm_gcc_c&quot;, &quot;opt&quot;, (case (switch_on &quot;opt&quot;),
+                                      (inc_weight))&gt;,
+    OptionalEdge&lt;&quot;llvm_gcc_cpp&quot;, &quot;opt&quot;, (case (switch_on &quot;opt&quot;),
+                                              (inc_weight))&gt;,
+    ...
+
+    OptionalEdge&lt;&quot;llvm_gcc_assembler&quot;, &quot;llvm_gcc_cpp_linker&quot;,
+        (case (input_languages_contain &quot;c++&quot;), (inc_weight),
+              (or (parameter_equals &quot;linker&quot;, &quot;g++&quot;),
+                  (parameter_equals &quot;linker&quot;, &quot;c++&quot;)), (inc_weight))&gt;,
+    ...
+
+    ]&gt;;
+</pre>
+<p>As you can see, the edges can be either default or optional, where
+optional edges are differentiated by an additional <tt class="docutils literal"><span class="pre">case</span></tt> expression
+used to calculate the weight of this edge. Notice also that we refer
+to tools via their names (as strings). This makes it possible to add
+edges to an existing compilation graph in plugins without having to
+know about all tool definitions used in the graph.</p>
+<p>The default edges are assigned a weight of 1, and optional edges get a
+weight of 0 + 2*N where N is the number of tests that evaluated to
+true in the <tt class="docutils literal"><span class="pre">case</span></tt> expression. It is also possible to provide an
+integer parameter to <tt class="docutils literal"><span class="pre">inc_weight</span></tt> and <tt class="docutils literal"><span class="pre">dec_weight</span></tt> - in this case,
+the weight is increased (or decreased) by the provided value instead
+of the default 2. It is also possible to change the default weight of
+an optional edge by using the <tt class="docutils literal"><span class="pre">default</span></tt> clause of the <tt class="docutils literal"><span class="pre">case</span></tt>
+construct.</p>
+<p>When passing an input file through the graph, LLVMC picks the edge
+with the maximum weight. To avoid ambiguity, there should be only one
+default edge between two nodes (with the exception of the root node,
+which gets a special treatment - there you are allowed to specify one
+default edge <em>per language</em>).</p>
+<p>When multiple plugins are loaded, their compilation graphs are merged
+together. Since multiple edges that have the same end nodes are not
+allowed (i.e. the graph is not a multigraph), an edge defined in
+several plugins will be replaced by the definition from the plugin
+that was loaded last. Plugin load order can be controlled by using the
+plugin priority feature described above.</p>
+<p>To get a visual representation of the compilation graph (useful for
+debugging), run <tt class="docutils literal"><span class="pre">llvmc</span> <span class="pre">--view-graph</span></tt>. You will need <tt class="docutils literal"><span class="pre">dot</span></tt> and
+<tt class="docutils literal"><span class="pre">gsview</span></tt> installed for this to work properly.</p>
+</div>
+<div class="section" id="describing-options">
+<h1><a class="toc-backref" href="#id14">Describing options</a></h1>
+<p>Command-line options that the plugin supports are defined by using an
+<tt class="docutils literal"><span class="pre">OptionList</span></tt>:</p>
+<pre class="literal-block">
+def Options : OptionList&lt;[
+(switch_option &quot;E&quot;, (help &quot;Help string&quot;)),
+(alias_option &quot;quiet&quot;, &quot;q&quot;)
+...
+]&gt;;
+</pre>
+<p>As you can see, the option list is just a list of DAGs, where each DAG
+is an option description consisting of the option name and some
+properties. A plugin can define more than one option list (they are
+all merged together in the end), which can be handy if one wants to
+separate option groups syntactically.</p>
+<ul>
+<li><p class="first">Possible option types:</p>
+<blockquote>
+<ul class="simple">
+<li><tt class="docutils literal"><span class="pre">switch_option</span></tt> - a simple boolean switch without arguments, for example
+<tt class="docutils literal"><span class="pre">-O2</span></tt> or <tt class="docutils literal"><span class="pre">-time</span></tt>. At most one occurrence is allowed.</li>
+<li><tt class="docutils literal"><span class="pre">parameter_option</span></tt> - option that takes one argument, for example
+<tt class="docutils literal"><span class="pre">-std=c99</span></tt>. It is also allowed to use spaces instead of the equality
+sign: <tt class="docutils literal"><span class="pre">-std</span> <span class="pre">c99</span></tt>. At most one occurrence is allowed.</li>
+<li><tt class="docutils literal"><span class="pre">parameter_list_option</span></tt> - same as the above, but more than one option
+occurence is allowed.</li>
+<li><tt class="docutils literal"><span class="pre">prefix_option</span></tt> - same as the parameter_option, but the option name and
+argument do not have to be separated. Example: <tt class="docutils literal"><span class="pre">-ofile</span></tt>. This can be also
+specified as <tt class="docutils literal"><span class="pre">-o</span> <span class="pre">file</span></tt>; however, <tt class="docutils literal"><span class="pre">-o=file</span></tt> will be parsed incorrectly
+(<tt class="docutils literal"><span class="pre">=file</span></tt> will be interpreted as option value). At most one occurrence is
+allowed.</li>
+<li><tt class="docutils literal"><span class="pre">prefix_list_option</span></tt> - same as the above, but more than one occurence of
+the option is allowed; example: <tt class="docutils literal"><span class="pre">-lm</span> <span class="pre">-lpthread</span></tt>.</li>
+<li><tt class="docutils literal"><span class="pre">alias_option</span></tt> - a special option type for creating aliases. Unlike other
+option types, aliases are not allowed to have any properties besides the
+aliased option name. Usage example: <tt class="docutils literal"><span class="pre">(alias_option</span> <span class="pre">&quot;preprocess&quot;,</span> <span class="pre">&quot;E&quot;)</span></tt></li>
+</ul>
+</blockquote>
+</li>
+<li><p class="first">Possible option properties:</p>
+<blockquote>
+<ul class="simple">
+<li><tt class="docutils literal"><span class="pre">help</span></tt> - help string associated with this option. Used for <tt class="docutils literal"><span class="pre">-help</span></tt>
+output.</li>
+<li><tt class="docutils literal"><span class="pre">required</span></tt> - this option must be specified exactly once (or, in case of
+the list options without the <tt class="docutils literal"><span class="pre">multi_val</span></tt> property, at least
+once). Incompatible with <tt class="docutils literal"><span class="pre">zero_or_one</span></tt> and <tt class="docutils literal"><span class="pre">one_or_more</span></tt>.</li>
+<li><tt class="docutils literal"><span class="pre">one_or_more</span></tt> - the option must be specified at least one time. Useful
+only for list options in conjunction with <tt class="docutils literal"><span class="pre">multi_val</span></tt>; for ordinary lists
+it is synonymous with <tt class="docutils literal"><span class="pre">required</span></tt>. Incompatible with <tt class="docutils literal"><span class="pre">required</span></tt> and
+<tt class="docutils literal"><span class="pre">zero_or_one</span></tt>.</li>
+<li><tt class="docutils literal"><span class="pre">optional</span></tt> - the option can be specified zero or one times. Useful only
+for list options in conjunction with <tt class="docutils literal"><span class="pre">multi_val</span></tt>. Incompatible with
+<tt class="docutils literal"><span class="pre">required</span></tt> and <tt class="docutils literal"><span class="pre">one_or_more</span></tt>.</li>
+<li><tt class="docutils literal"><span class="pre">hidden</span></tt> - the description of this option will not appear in
+the <tt class="docutils literal"><span class="pre">-help</span></tt> output (but will appear in the <tt class="docutils literal"><span class="pre">-help-hidden</span></tt>
+output).</li>
+<li><tt class="docutils literal"><span class="pre">really_hidden</span></tt> - the option will not be mentioned in any help
+output.</li>
+<li><tt class="docutils literal"><span class="pre">comma_separated</span></tt> - Indicates that any commas specified for an option's
+value should be used to split the value up into multiple values for the
+option. This property is valid only for list options. In conjunction with
+<tt class="docutils literal"><span class="pre">forward_value</span></tt> can be used to implement option forwarding in style of
+gcc's <tt class="docutils literal"><span class="pre">-Wa,</span></tt>.</li>
+<li><tt class="docutils literal"><span class="pre">multi_val</span> <span class="pre">n</span></tt> - this option takes <em>n</em> arguments (can be useful in some
+special cases). Usage example: <tt class="docutils literal"><span class="pre">(parameter_list_option</span> <span class="pre">&quot;foo&quot;,</span> <span class="pre">(multi_val</span>
+<span class="pre">3))</span></tt>; the command-line syntax is '-foo a b c'. Only list options can have
+this attribute; you can, however, use the <tt class="docutils literal"><span class="pre">one_or_more</span></tt>, <tt class="docutils literal"><span class="pre">optional</span></tt>
+and <tt class="docutils literal"><span class="pre">required</span></tt> properties.</li>
+<li><tt class="docutils literal"><span class="pre">init</span></tt> - this option has a default value, either a string (if it is a
+parameter), or a boolean (if it is a switch; as in C++, boolean constants
+are called <tt class="docutils literal"><span class="pre">true</span></tt> and <tt class="docutils literal"><span class="pre">false</span></tt>). List options can't have <tt class="docutils literal"><span class="pre">init</span></tt>
+attribute.
+Usage examples: <tt class="docutils literal"><span class="pre">(switch_option</span> <span class="pre">&quot;foo&quot;,</span> <span class="pre">(init</span> <span class="pre">true))</span></tt>; <tt class="docutils literal"><span class="pre">(prefix_option</span>
+<span class="pre">&quot;bar&quot;,</span> <span class="pre">(init</span> <span class="pre">&quot;baz&quot;))</span></tt>.</li>
+<li><tt class="docutils literal"><span class="pre">extern</span></tt> - this option is defined in some other plugin, see <a class="reference internal" href="#extern">below</a>.</li>
+</ul>
+</blockquote>
+</li>
+</ul>
+<div class="section" id="external-options">
+<span id="extern"></span><h2><a class="toc-backref" href="#id15">External options</a></h2>
+<p>Sometimes, when linking several plugins together, one plugin needs to
+access options defined in some other plugin. Because of the way
+options are implemented, such options must be marked as
+<tt class="docutils literal"><span class="pre">extern</span></tt>. This is what the <tt class="docutils literal"><span class="pre">extern</span></tt> option property is
+for. Example:</p>
+<pre class="literal-block">
+...
+(switch_option &quot;E&quot;, (extern))
+...
+</pre>
+<p>If an external option has additional attributes besides 'extern', they are
+ignored. See also the section on plugin <a class="reference internal" href="#priorities">priorities</a>.</p>
+</div>
+</div>
+<div class="section" id="conditional-evaluation">
+<span id="case"></span><h1><a class="toc-backref" href="#id16">Conditional evaluation</a></h1>
+<p>The 'case' construct is the main means by which programmability is
+achieved in LLVMC. It can be used to calculate edge weights, program
+actions and modify the shell commands to be executed. The 'case'
+expression is designed after the similarly-named construct in
+functional languages and takes the form <tt class="docutils literal"><span class="pre">(case</span> <span class="pre">(test_1),</span> <span class="pre">statement_1,</span>
+<span class="pre">(test_2),</span> <span class="pre">statement_2,</span> <span class="pre">...</span> <span class="pre">(test_N),</span> <span class="pre">statement_N)</span></tt>. The statements
+are evaluated only if the corresponding tests evaluate to true.</p>
+<p>Examples:</p>
+<pre class="literal-block">
+// Edge weight calculation
+
+// Increases edge weight by 5 if &quot;-A&quot; is provided on the
+// command-line, and by 5 more if &quot;-B&quot; is also provided.
+(case
+    (switch_on &quot;A&quot;), (inc_weight 5),
+    (switch_on &quot;B&quot;), (inc_weight 5))
+
+
+// Tool command line specification
+
+// Evaluates to &quot;cmdline1&quot; if the option &quot;-A&quot; is provided on the
+// command line; to &quot;cmdline2&quot; if &quot;-B&quot; is provided;
+// otherwise to &quot;cmdline3&quot;.
+
+(case
+    (switch_on &quot;A&quot;), &quot;cmdline1&quot;,
+    (switch_on &quot;B&quot;), &quot;cmdline2&quot;,
+    (default), &quot;cmdline3&quot;)
+</pre>
+<p>Note the slight difference in 'case' expression handling in contexts
+of edge weights and command line specification - in the second example
+the value of the <tt class="docutils literal"><span class="pre">&quot;B&quot;</span></tt> switch is never checked when switch <tt class="docutils literal"><span class="pre">&quot;A&quot;</span></tt> is
+enabled, and the whole expression always evaluates to <tt class="docutils literal"><span class="pre">&quot;cmdline1&quot;</span></tt> in
+that case.</p>
+<p>Case expressions can also be nested, i.e. the following is legal:</p>
+<pre class="literal-block">
+(case (switch_on &quot;E&quot;), (case (switch_on &quot;o&quot;), ..., (default), ...)
+      (default), ...)
+</pre>
+<p>You should, however, try to avoid doing that because it hurts
+readability. It is usually better to split tool descriptions and/or
+use TableGen inheritance instead.</p>
+<ul class="simple">
+<li>Possible tests are:<ul>
+<li><tt class="docutils literal"><span class="pre">switch_on</span></tt> - Returns true if a given command-line switch is provided by
+the user. Can be given a list as argument, in that case <tt class="docutils literal"><span class="pre">(switch_on</span> <span class="pre">[&quot;foo&quot;,</span>
+<span class="pre">&quot;bar&quot;,</span> <span class="pre">&quot;baz&quot;])</span></tt> is equivalent to <tt class="docutils literal"><span class="pre">(and</span> <span class="pre">(switch_on</span> <span class="pre">&quot;foo&quot;),</span> <span class="pre">(switch_on</span>
+<span class="pre">&quot;bar&quot;),</span> <span class="pre">(switch_on</span> <span class="pre">&quot;baz&quot;))</span></tt>.
+Example: <tt class="docutils literal"><span class="pre">(switch_on</span> <span class="pre">&quot;opt&quot;)</span></tt>.</li>
+<li><tt class="docutils literal"><span class="pre">any_switch_on</span></tt> - Given a list of switch options, returns true if any of
+the switches is turned on.
+Example: <tt class="docutils literal"><span class="pre">(any_switch_on</span> <span class="pre">[&quot;foo&quot;,</span> <span class="pre">&quot;bar&quot;,</span> <span class="pre">&quot;baz&quot;])</span></tt> is equivalent to <tt class="docutils literal"><span class="pre">(or</span>
+<span class="pre">(switch_on</span> <span class="pre">&quot;foo&quot;),</span> <span class="pre">(switch_on</span> <span class="pre">&quot;bar&quot;),</span> <span class="pre">(switch_on</span> <span class="pre">&quot;baz&quot;))</span></tt>.</li>
+<li><tt class="docutils literal"><span class="pre">parameter_equals</span></tt> - Returns true if a command-line parameter equals
+a given value.
+Example: <tt class="docutils literal"><span class="pre">(parameter_equals</span> <span class="pre">&quot;W&quot;,</span> <span class="pre">&quot;all&quot;)</span></tt>.</li>
+<li><tt class="docutils literal"><span class="pre">element_in_list</span></tt> - Returns true if a command-line parameter
+list contains a given value.
+Example: <tt class="docutils literal"><span class="pre">(element_in_list</span> <span class="pre">&quot;l&quot;,</span> <span class="pre">&quot;pthread&quot;)</span></tt>.</li>
+<li><tt class="docutils literal"><span class="pre">input_languages_contain</span></tt> - Returns true if a given language
+belongs to the current input language set.
+Example: <tt class="docutils literal"><span class="pre">(input_languages_contain</span> <span class="pre">&quot;c++&quot;)</span></tt>.</li>
+<li><tt class="docutils literal"><span class="pre">in_language</span></tt> - Evaluates to true if the input file language is equal to
+the argument. At the moment works only with <tt class="docutils literal"><span class="pre">cmd_line</span></tt> and <tt class="docutils literal"><span class="pre">actions</span></tt> (on
+non-join nodes).
+Example: <tt class="docutils literal"><span class="pre">(in_language</span> <span class="pre">&quot;c++&quot;)</span></tt>.</li>
+<li><tt class="docutils literal"><span class="pre">not_empty</span></tt> - Returns true if a given option (which should be either a
+parameter or a parameter list) is set by the user. Like <tt class="docutils literal"><span class="pre">switch_on</span></tt>, can
+be also given a list as argument.
+Example: <tt class="docutils literal"><span class="pre">(not_empty</span> <span class="pre">&quot;o&quot;)</span></tt>.</li>
+<li><tt class="docutils literal"><span class="pre">any_not_empty</span></tt> - Returns true if <tt class="docutils literal"><span class="pre">not_empty</span></tt> returns true for any of
+the options in the list.
+Example: <tt class="docutils literal"><span class="pre">(any_not_empty</span> <span class="pre">[&quot;foo&quot;,</span> <span class="pre">&quot;bar&quot;,</span> <span class="pre">&quot;baz&quot;])</span></tt> is equivalent to <tt class="docutils literal"><span class="pre">(or</span>
+<span class="pre">(not_empty</span> <span class="pre">&quot;foo&quot;),</span> <span class="pre">(not_empty</span> <span class="pre">&quot;bar&quot;),</span> <span class="pre">(not_empty</span> <span class="pre">&quot;baz&quot;))</span></tt>.</li>
+<li><tt class="docutils literal"><span class="pre">empty</span></tt> - The opposite of <tt class="docutils literal"><span class="pre">not_empty</span></tt>. Equivalent to <tt class="docutils literal"><span class="pre">(not</span> <span class="pre">(not_empty</span>
+<span class="pre">X))</span></tt>. Provided for convenience. Can be given a list as argument.</li>
+<li><tt class="docutils literal"><span class="pre">any_not_empty</span></tt> - Returns true if <tt class="docutils literal"><span class="pre">not_empty</span></tt> returns true for any of
+the options in the list.
+Example: <tt class="docutils literal"><span class="pre">(any_empty</span> <span class="pre">[&quot;foo&quot;,</span> <span class="pre">&quot;bar&quot;,</span> <span class="pre">&quot;baz&quot;])</span></tt> is equivalent to <tt class="docutils literal"><span class="pre">(not</span> <span class="pre">(and</span>
+<span class="pre">(not_empty</span> <span class="pre">&quot;foo&quot;),</span> <span class="pre">(not_empty</span> <span class="pre">&quot;bar&quot;),</span> <span class="pre">(not_empty</span> <span class="pre">&quot;baz&quot;)))</span></tt>.</li>
+<li><tt class="docutils literal"><span class="pre">single_input_file</span></tt> - Returns true if there was only one input file
+provided on the command-line. Used without arguments:
+<tt class="docutils literal"><span class="pre">(single_input_file)</span></tt>.</li>
+<li><tt class="docutils literal"><span class="pre">multiple_input_files</span></tt> - Equivalent to <tt class="docutils literal"><span class="pre">(not</span> <span class="pre">(single_input_file))</span></tt> (the
+case of zero input files is considered an error).</li>
+<li><tt class="docutils literal"><span class="pre">default</span></tt> - Always evaluates to true. Should always be the last
+test in the <tt class="docutils literal"><span class="pre">case</span></tt> expression.</li>
+<li><tt class="docutils literal"><span class="pre">and</span></tt> - A standard binary logical combinator that returns true iff all of
+its arguments return true. Used like this: <tt class="docutils literal"><span class="pre">(and</span> <span class="pre">(test1),</span> <span class="pre">(test2),</span>
+<span class="pre">...</span> <span class="pre">(testN))</span></tt>. Nesting of <tt class="docutils literal"><span class="pre">and</span></tt> and <tt class="docutils literal"><span class="pre">or</span></tt> is allowed, but not
+encouraged.</li>
+<li><tt class="docutils literal"><span class="pre">or</span></tt> - A binary logical combinator that returns true iff any of its
+arguments returns true. Example: <tt class="docutils literal"><span class="pre">(or</span> <span class="pre">(test1),</span> <span class="pre">(test2),</span> <span class="pre">...</span> <span class="pre">(testN))</span></tt>.</li>
+<li><tt class="docutils literal"><span class="pre">not</span></tt> - Standard unary logical combinator that negates its
+argument. Example: <tt class="docutils literal"><span class="pre">(not</span> <span class="pre">(or</span> <span class="pre">(test1),</span> <span class="pre">(test2),</span> <span class="pre">...</span> <span class="pre">(testN)))</span></tt>.</li>
+</ul>
+</li>
+</ul>
+</div>
+<div class="section" id="writing-a-tool-description">
+<h1><a class="toc-backref" href="#id17">Writing a tool description</a></h1>
+<p>As was said earlier, nodes in the compilation graph represent tools,
+which are described separately. A tool definition looks like this
+(taken from the <tt class="docutils literal"><span class="pre">include/llvm/CompilerDriver/Tools.td</span></tt> file):</p>
+<pre class="literal-block">
+def llvm_gcc_cpp : Tool&lt;[
+    (in_language &quot;c++&quot;),
+    (out_language &quot;llvm-assembler&quot;),
+    (output_suffix &quot;bc&quot;),
+    (cmd_line &quot;llvm-g++ -c $INFILE -o $OUTFILE -emit-llvm&quot;),
+    (sink)
+    ]&gt;;
+</pre>
+<p>This defines a new tool called <tt class="docutils literal"><span class="pre">llvm_gcc_cpp</span></tt>, which is an alias for
+<tt class="docutils literal"><span class="pre">llvm-g++</span></tt>. As you can see, a tool definition is just a list of
+properties; most of them should be self-explanatory. The <tt class="docutils literal"><span class="pre">sink</span></tt>
+property means that this tool should be passed all command-line
+options that aren't mentioned in the option list.</p>
+<p>The complete list of all currently implemented tool properties follows.</p>
+<ul class="simple">
+<li>Possible tool properties:<ul>
+<li><tt class="docutils literal"><span class="pre">in_language</span></tt> - input language name. Can be either a string or a
+list, in case the tool supports multiple input languages.</li>
+<li><tt class="docutils literal"><span class="pre">out_language</span></tt> - output language name. Multiple output languages are not
+allowed.</li>
+<li><tt class="docutils literal"><span class="pre">output_suffix</span></tt> - output file suffix. Can also be changed
+dynamically, see documentation on actions.</li>
+<li><tt class="docutils literal"><span class="pre">cmd_line</span></tt> - the actual command used to run the tool. You can
+use <tt class="docutils literal"><span class="pre">$INFILE</span></tt> and <tt class="docutils literal"><span class="pre">$OUTFILE</span></tt> variables, output redirection
+with <tt class="docutils literal"><span class="pre">&gt;</span></tt>, hook invocations (<tt class="docutils literal"><span class="pre">$CALL</span></tt>), environment variables
+(via <tt class="docutils literal"><span class="pre">$ENV</span></tt>) and the <tt class="docutils literal"><span class="pre">case</span></tt> construct.</li>
+<li><tt class="docutils literal"><span class="pre">join</span></tt> - this tool is a &quot;join node&quot; in the graph, i.e. it gets a
+list of input files and joins them together. Used for linkers.</li>
+<li><tt class="docutils literal"><span class="pre">sink</span></tt> - all command-line options that are not handled by other
+tools are passed to this tool.</li>
+<li><tt class="docutils literal"><span class="pre">actions</span></tt> - A single big <tt class="docutils literal"><span class="pre">case</span></tt> expression that specifies how
+this tool reacts on command-line options (described in more detail
+<a class="reference internal" href="#actions">below</a>).</li>
+</ul>
+</li>
+</ul>
+<div class="section" id="id5">
+<span id="actions"></span><h2><a class="toc-backref" href="#id18">Actions</a></h2>
+<p>A tool often needs to react to command-line options, and this is
+precisely what the <tt class="docutils literal"><span class="pre">actions</span></tt> property is for. The next example
+illustrates this feature:</p>
+<pre class="literal-block">
+def llvm_gcc_linker : Tool&lt;[
+    (in_language &quot;object-code&quot;),
+    (out_language &quot;executable&quot;),
+    (output_suffix &quot;out&quot;),
+    (cmd_line &quot;llvm-gcc $INFILE -o $OUTFILE&quot;),
+    (join),
+    (actions (case (not_empty &quot;L&quot;), (forward &quot;L&quot;),
+                   (not_empty &quot;l&quot;), (forward &quot;l&quot;),
+                   (not_empty &quot;dummy&quot;),
+                             [(append_cmd &quot;-dummy1&quot;), (append_cmd &quot;-dummy2&quot;)])
+    ]&gt;;
+</pre>
+<p>The <tt class="docutils literal"><span class="pre">actions</span></tt> tool property is implemented on top of the omnipresent
+<tt class="docutils literal"><span class="pre">case</span></tt> expression. It associates one or more different <em>actions</em>
+with given conditions - in the example, the actions are <tt class="docutils literal"><span class="pre">forward</span></tt>,
+which forwards a given option unchanged, and <tt class="docutils literal"><span class="pre">append_cmd</span></tt>, which
+appends a given string to the tool execution command. Multiple actions
+can be associated with a single condition by using a list of actions
+(used in the example to append some dummy options). The same <tt class="docutils literal"><span class="pre">case</span></tt>
+construct can also be used in the <tt class="docutils literal"><span class="pre">cmd_line</span></tt> property to modify the
+tool command line.</p>
+<p>The &quot;join&quot; property used in the example means that this tool behaves
+like a linker.</p>
+<p>The list of all possible actions follows.</p>
+<ul>
+<li><p class="first">Possible actions:</p>
+<blockquote>
+<ul class="simple">
+<li><tt class="docutils literal"><span class="pre">append_cmd</span></tt> - Append a string to the tool invocation command.
+Example: <tt class="docutils literal"><span class="pre">(case</span> <span class="pre">(switch_on</span> <span class="pre">&quot;pthread&quot;),</span> <span class="pre">(append_cmd</span> <span class="pre">&quot;-lpthread&quot;))</span></tt>.</li>
+<li><tt class="docutils literal"><span class="pre">error</span></tt> - Exit with error.
+Example: <tt class="docutils literal"><span class="pre">(error</span> <span class="pre">&quot;Mixing</span> <span class="pre">-c</span> <span class="pre">and</span> <span class="pre">-S</span> <span class="pre">is</span> <span class="pre">not</span> <span class="pre">allowed!&quot;)</span></tt>.</li>
+<li><tt class="docutils literal"><span class="pre">warning</span></tt> - Print a warning.
+Example: <tt class="docutils literal"><span class="pre">(warning</span> <span class="pre">&quot;Specifying</span> <span class="pre">both</span> <span class="pre">-O1</span> <span class="pre">and</span> <span class="pre">-O2</span> <span class="pre">is</span> <span class="pre">meaningless!&quot;)</span></tt>.</li>
+<li><tt class="docutils literal"><span class="pre">forward</span></tt> - Forward the option unchanged.
+Example: <tt class="docutils literal"><span class="pre">(forward</span> <span class="pre">&quot;Wall&quot;)</span></tt>.</li>
+<li><tt class="docutils literal"><span class="pre">forward_as</span></tt> - Change the option's name, but forward the argument
+unchanged.
+Example: <tt class="docutils literal"><span class="pre">(forward_as</span> <span class="pre">&quot;O0&quot;,</span> <span class="pre">&quot;--disable-optimization&quot;)</span></tt>.</li>
+<li><tt class="docutils literal"><span class="pre">forward_value</span></tt> - Forward only option's value. Cannot be used with switch
+options (since they don't have values), but works fine with lists.
+Example: <tt class="docutils literal"><span class="pre">(forward_value</span> <span class="pre">&quot;Wa,&quot;)</span></tt>.</li>
+<li><tt class="docutils literal"><span class="pre">forward_transformed_value</span></tt> - As above, but applies a hook to the
+option's value before forwarding (see <a class="reference internal" href="#hooks">below</a>). When
+<tt class="docutils literal"><span class="pre">forward_transformed_value</span></tt> is applied to a list
+option, the hook must have signature
+<tt class="docutils literal"><span class="pre">std::string</span> <span class="pre">hooks::HookName</span> <span class="pre">(const</span> <span class="pre">std::vector&lt;std::string&gt;&amp;)</span></tt>.
+Example: <tt class="docutils literal"><span class="pre">(forward_transformed_value</span> <span class="pre">&quot;m&quot;,</span> <span class="pre">&quot;ConvertToMAttr&quot;)</span></tt>.</li>
+<li><tt class="docutils literal"><span class="pre">output_suffix</span></tt> - Modify the output suffix of this tool.
+Example: <tt class="docutils literal"><span class="pre">(output_suffix</span> <span class="pre">&quot;i&quot;)</span></tt>.</li>
+<li><tt class="docutils literal"><span class="pre">stop_compilation</span></tt> - Stop compilation after this tool processes its
+input. Used without arguments.
+Example: <tt class="docutils literal"><span class="pre">(stop_compilation)</span></tt>.</li>
+</ul>
+</blockquote>
+</li>
+</ul>
+</div>
+</div>
+<div class="section" id="language-map">
+<h1><a class="toc-backref" href="#id19">Language map</a></h1>
+<p>If you are adding support for a new language to LLVMC, you'll need to
+modify the language map, which defines mappings from file extensions
+to language names. It is used to choose the proper toolchain(s) for a
+given input file set. Language map definition looks like this:</p>
+<pre class="literal-block">
+def LanguageMap : LanguageMap&lt;
+    [LangToSuffixes&lt;&quot;c++&quot;, [&quot;cc&quot;, &quot;cp&quot;, &quot;cxx&quot;, &quot;cpp&quot;, &quot;CPP&quot;, &quot;c++&quot;, &quot;C&quot;]&gt;,
+     LangToSuffixes&lt;&quot;c&quot;, [&quot;c&quot;]&gt;,
+     ...
+    ]&gt;;
+</pre>
+<p>For example, without those definitions the following command wouldn't work:</p>
+<pre class="literal-block">
+$ llvmc hello.cpp
+llvmc: Unknown suffix: cpp
+</pre>
+<p>The language map entries are needed only for the tools that are linked from the
+root node. Since a tool can't have multiple output languages, for inner nodes of
+the graph the input and output languages should match. This is enforced at
+compile-time.</p>
+</div>
+<div class="section" id="option-preprocessor">
+<h1><a class="toc-backref" href="#id20">Option preprocessor</a></h1>
+<p>It is sometimes useful to run error-checking code before processing the
+compilation graph. For example, if optimization options &quot;-O1&quot; and &quot;-O2&quot; are
+implemented as switches, we might want to output a warning if the user invokes
+the driver with both of these options enabled.</p>
+<p>The <tt class="docutils literal"><span class="pre">OptionPreprocessor</span></tt> feature is reserved specially for these
+occasions. Example (adapted from the built-in Base plugin):</p>
+<pre class="literal-block">
+def Preprocess : OptionPreprocessor&lt;
+(case (not (any_switch_on [&quot;O0&quot;, &quot;O1&quot;, &quot;O2&quot;, &quot;O3&quot;])),
+           (set_option &quot;O2&quot;),
+      (and (switch_on &quot;O3&quot;), (any_switch_on [&quot;O0&quot;, &quot;O1&quot;, &quot;O2&quot;])),
+           (unset_option [&quot;O0&quot;, &quot;O1&quot;, &quot;O2&quot;]),
+      (and (switch_on &quot;O2&quot;), (any_switch_on [&quot;O0&quot;, &quot;O1&quot;])),
+           (unset_option [&quot;O0&quot;, &quot;O1&quot;]),
+      (and (switch_on &quot;O1&quot;), (switch_on &quot;O0&quot;)),
+           (unset_option &quot;O0&quot;))
+&gt;;
+</pre>
+<p>Here, <tt class="docutils literal"><span class="pre">OptionPreprocessor</span></tt> is used to unset all spurious <tt class="docutils literal"><span class="pre">-O</span></tt> options so
+that they are not forwarded to the compiler. If no optimization options are
+specified, <tt class="docutils literal"><span class="pre">-O2</span></tt> is enabled.</p>
+<p><tt class="docutils literal"><span class="pre">OptionPreprocessor</span></tt> is basically a single big <tt class="docutils literal"><span class="pre">case</span></tt> expression, which is
+evaluated only once right after the plugin is loaded. The only allowed actions
+in <tt class="docutils literal"><span class="pre">OptionPreprocessor</span></tt> are <tt class="docutils literal"><span class="pre">error</span></tt>, <tt class="docutils literal"><span class="pre">warning</span></tt>, and two special actions:
+<tt class="docutils literal"><span class="pre">unset_option</span></tt> and <tt class="docutils literal"><span class="pre">set_option</span></tt>. As their names suggest, they can be used to
+set or unset a given option. To set an option with <tt class="docutils literal"><span class="pre">set_option</span></tt>, use the
+two-argument form: <tt class="docutils literal"><span class="pre">(set_option</span> <span class="pre">&quot;parameter&quot;,</span> <span class="pre">VALUE)</span></tt>. Here, <tt class="docutils literal"><span class="pre">VALUE</span></tt> can be
+either a string, a string list, or a boolean constant.</p>
+<p>For convenience, <tt class="docutils literal"><span class="pre">set_option</span></tt> and <tt class="docutils literal"><span class="pre">unset_option</span></tt> also work on lists. That
+is, instead of <tt class="docutils literal"><span class="pre">[(unset_option</span> <span class="pre">&quot;A&quot;),</span> <span class="pre">(unset_option</span> <span class="pre">&quot;B&quot;)]</span></tt> you can use
+<tt class="docutils literal"><span class="pre">(unset_option</span> <span class="pre">[&quot;A&quot;,</span> <span class="pre">&quot;B&quot;])</span></tt>. Obviously, <tt class="docutils literal"><span class="pre">(set_option</span> <span class="pre">[&quot;A&quot;,</span> <span class="pre">&quot;B&quot;])</span></tt> is valid
+only if both <tt class="docutils literal"><span class="pre">A</span></tt> and <tt class="docutils literal"><span class="pre">B</span></tt> are switches.</p>
+</div>
+<div class="section" id="more-advanced-topics">
+<h1><a class="toc-backref" href="#id21">More advanced topics</a></h1>
+<div class="section" id="hooks-and-environment-variables">
+<span id="hooks"></span><h2><a class="toc-backref" href="#id22">Hooks and environment variables</a></h2>
+<p>Normally, LLVMC executes programs from the system <tt class="docutils literal"><span class="pre">PATH</span></tt>. Sometimes,
+this is not sufficient: for example, we may want to specify tool paths
+or names in the configuration file. This can be easily achieved via
+the hooks mechanism. To write your own hooks, just add their
+definitions to the <tt class="docutils literal"><span class="pre">PluginMain.cpp</span></tt> or drop a <tt class="docutils literal"><span class="pre">.cpp</span></tt> file into the
+your plugin directory. Hooks should live in the <tt class="docutils literal"><span class="pre">hooks</span></tt> namespace
+and have the signature <tt class="docutils literal"><span class="pre">std::string</span> <span class="pre">hooks::MyHookName</span> <span class="pre">([const</span> <span class="pre">char*</span>
+<span class="pre">Arg0</span> <span class="pre">[</span> <span class="pre">const</span> <span class="pre">char*</span> <span class="pre">Arg2</span> <span class="pre">[,</span> <span class="pre">...]]])</span></tt>. They can be used from the
+<tt class="docutils literal"><span class="pre">cmd_line</span></tt> tool property:</p>
+<pre class="literal-block">
+(cmd_line &quot;$CALL(MyHook)/path/to/file -o $CALL(AnotherHook)&quot;)
+</pre>
+<p>To pass arguments to hooks, use the following syntax:</p>
+<pre class="literal-block">
+(cmd_line &quot;$CALL(MyHook, 'Arg1', 'Arg2', 'Arg # 3')/path/to/file -o1 -o2&quot;)
+</pre>
+<p>It is also possible to use environment variables in the same manner:</p>
+<pre class="literal-block">
+(cmd_line &quot;$ENV(VAR1)/path/to/file -o $ENV(VAR2)&quot;)
+</pre>
+<p>To change the command line string based on user-provided options use
+the <tt class="docutils literal"><span class="pre">case</span></tt> expression (documented <a class="reference internal" href="#case">above</a>):</p>
+<pre class="literal-block">
+(cmd_line
+  (case
+    (switch_on &quot;E&quot;),
+       &quot;llvm-g++ -E -x c $INFILE -o $OUTFILE&quot;,
+    (default),
+       &quot;llvm-g++ -c -x c $INFILE -o $OUTFILE -emit-llvm&quot;))
+</pre>
+</div>
+<div class="section" id="how-plugins-are-loaded">
+<span id="priorities"></span><h2><a class="toc-backref" href="#id23">How plugins are loaded</a></h2>
+<p>It is possible for LLVMC plugins to depend on each other. For example,
+one can create edges between nodes defined in some other plugin. To
+make this work, however, that plugin should be loaded first. To
+achieve this, the concept of plugin priority was introduced. By
+default, every plugin has priority zero; to specify the priority
+explicitly, put the following line in your plugin's TableGen file:</p>
+<pre class="literal-block">
+def Priority : PluginPriority&lt;$PRIORITY_VALUE&gt;;
+# Where PRIORITY_VALUE is some integer &gt; 0
+</pre>
+<p>Plugins are loaded in order of their (increasing) priority, starting
+with 0. Therefore, the plugin with the highest priority value will be
+loaded last.</p>
+</div>
+<div class="section" id="debugging">
+<h2><a class="toc-backref" href="#id24">Debugging</a></h2>
+<p>When writing LLVMC plugins, it can be useful to get a visual view of
+the resulting compilation graph. This can be achieved via the command
+line option <tt class="docutils literal"><span class="pre">--view-graph</span></tt>. This command assumes that <a class="reference external" href="http://www.graphviz.org/">Graphviz</a> and
+<a class="reference external" href="http://pages.cs.wisc.edu/~ghost/">Ghostview</a> are installed. There is also a <tt class="docutils literal"><span class="pre">--write-graph</span></tt> option that
+creates a Graphviz source file (<tt class="docutils literal"><span class="pre">compilation-graph.dot</span></tt>) in the
+current directory.</p>
+<p>Another useful <tt class="docutils literal"><span class="pre">llvmc</span></tt> option is <tt class="docutils literal"><span class="pre">--check-graph</span></tt>. It checks the
+compilation graph for common errors like mismatched output/input
+language names, multiple default edges and cycles. These checks can't
+be performed at compile-time because the plugins can load code
+dynamically. When invoked with <tt class="docutils literal"><span class="pre">--check-graph</span></tt>, <tt class="docutils literal"><span class="pre">llvmc</span></tt> doesn't
+perform any compilation tasks and returns the number of encountered
+errors as its status code.</p>
+</div>
+<div class="section" id="conditioning-on-the-executable-name">
+<h2><a class="toc-backref" href="#id25">Conditioning on the executable name</a></h2>
+<p>For now, the executable name (the value passed to the driver in <tt class="docutils literal"><span class="pre">argv[0]</span></tt>) is
+accessible only in the C++ code (i.e. hooks). Use the following code:</p>
+<pre class="literal-block">
+namespace llvmc {
+extern const char* ProgramName;
+}
+
+namespace hooks {
+
+std::string MyHook() {
+//...
+if (strcmp(ProgramName, &quot;mydriver&quot;) == 0) {
+   //...
+
+}
+
+} // end namespace hooks
+</pre>
+<p>In general, you're encouraged not to make the behaviour dependent on the
+executable file name, and use command-line switches instead. See for example how
+the <tt class="docutils literal"><span class="pre">Base</span></tt> plugin behaves when it needs to choose the correct linker options
+(think <tt class="docutils literal"><span class="pre">g++</span></tt> vs. <tt class="docutils literal"><span class="pre">gcc</span></tt>).</p>
+<hr />
+<address>
+<a href="http://jigsaw.w3.org/css-validator/check/referer">
+<img src="http://jigsaw.w3.org/css-validator/images/vcss-blue"
+   alt="Valid CSS" /></a>
+<a href="http://validator.w3.org/check?uri=referer">
+<img src="http://www.w3.org/Icons/valid-xhtml10-blue"
+   alt="Valid XHTML 1.0 Transitional"/></a>
+
+<a href="mailto:foldr at codedgers.com">Mikhail Glushenkov</a><br />
+<a href="http://llvm.org">LLVM Compiler Infrastructure</a><br />
+
+Last modified: $Date: 2010-05-06 17:28:04 -0700 (Thu, 06 May 2010) $
+</address></div>
+</div>
+</div>
+</body>
+</html>

Added: www-releases/trunk/2.9/docs/CompilerDriverTutorial.html
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==============================================================================
--- www-releases/trunk/2.9/docs/CompilerDriverTutorial.html (added)
+++ www-releases/trunk/2.9/docs/CompilerDriverTutorial.html Thu Apr  7 00:46:10 2011
@@ -0,0 +1,126 @@
+<?xml version="1.0" encoding="utf-8" ?>
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml" xml:lang="en" lang="en">
+<head>
+<meta http-equiv="Content-Type" content="text/html; charset=utf-8" />
+<meta name="generator" content="Docutils 0.5: http://docutils.sourceforge.net/" />
+<title>Tutorial - Using LLVMC</title>
+<link rel="stylesheet" href="llvm.css" type="text/css" />
+</head>
+<body>
+<div class="document" id="tutorial-using-llvmc">
+<h1 class="title">Tutorial - Using LLVMC</h1>
+
+<!-- This file was automatically generated by rst2html.
+Please do not edit directly!
+The ReST source lives in the directory 'tools/llvmc/doc'. -->
+<div class="contents topic" id="contents">
+<p class="topic-title first">Contents</p>
+<ul class="simple">
+<li><a class="reference internal" href="#introduction" id="id1">Introduction</a></li>
+<li><a class="reference internal" href="#compiling-with-llvmc" id="id2">Compiling with LLVMC</a></li>
+<li><a class="reference internal" href="#using-llvmc-to-generate-toolchain-drivers" id="id3">Using LLVMC to generate toolchain drivers</a></li>
+</ul>
+</div>
+<div class="doc_author">
+<p>Written by <a href="mailto:foldr at codedgers.com">Mikhail Glushenkov</a></p>
+</div><div class="section" id="introduction">
+<h1><a class="toc-backref" href="#id1">Introduction</a></h1>
+<p>LLVMC is a generic compiler driver, which plays the same role for LLVM
+as the <tt class="docutils literal"><span class="pre">gcc</span></tt> program does for GCC - the difference being that LLVMC
+is designed to be more adaptable and easier to customize. Most of
+LLVMC functionality is implemented via plugins, which can be loaded
+dynamically or compiled in. This tutorial describes the basic usage
+and configuration of LLVMC.</p>
+</div>
+<div class="section" id="compiling-with-llvmc">
+<h1><a class="toc-backref" href="#id2">Compiling with LLVMC</a></h1>
+<p>In general, LLVMC tries to be command-line compatible with <tt class="docutils literal"><span class="pre">gcc</span></tt> as
+much as possible, so most of the familiar options work:</p>
+<pre class="literal-block">
+$ llvmc -O3 -Wall hello.cpp
+$ ./a.out
+hello
+</pre>
+<p>This will invoke <tt class="docutils literal"><span class="pre">llvm-g++</span></tt> under the hood (you can see which
+commands are executed by using the <tt class="docutils literal"><span class="pre">-v</span></tt> option). For further help on
+command-line LLVMC usage, refer to the <tt class="docutils literal"><span class="pre">llvmc</span> <span class="pre">--help</span></tt> output.</p>
+</div>
+<div class="section" id="using-llvmc-to-generate-toolchain-drivers">
+<h1><a class="toc-backref" href="#id3">Using LLVMC to generate toolchain drivers</a></h1>
+<p>LLVMC plugins are written mostly using <a class="reference external" href="http://llvm.org/docs/TableGenFundamentals.html">TableGen</a>, so you need to
+be familiar with it to get anything done.</p>
+<p>Start by compiling <tt class="docutils literal"><span class="pre">example/Simple</span></tt>, which is a primitive wrapper for
+<tt class="docutils literal"><span class="pre">gcc</span></tt>:</p>
+<pre class="literal-block">
+$ cd $LLVM_DIR/tools/llvmc
+$ cp -r example/Simple plugins/Simple
+
+  # NB: A less verbose way to compile standalone LLVMC-based drivers is
+  # described in the reference manual.
+
+$ make LLVMC_BASED_DRIVER_NAME=mygcc LLVMC_BUILTIN_PLUGINS=Simple
+$ cat &gt; hello.c
+[...]
+$ mygcc hello.c
+$ ./hello.out
+Hello
+</pre>
+<p>Here we link our plugin with the LLVMC core statically to form an executable
+file called <tt class="docutils literal"><span class="pre">mygcc</span></tt>. It is also possible to build our plugin as a dynamic
+library to be loaded by the <tt class="docutils literal"><span class="pre">llvmc</span></tt> executable (or any other LLVMC-based
+standalone driver); this is described in the reference manual.</p>
+<p>Contents of the file <tt class="docutils literal"><span class="pre">Simple.td</span></tt> look like this:</p>
+<pre class="literal-block">
+// Include common definitions
+include &quot;llvm/CompilerDriver/Common.td&quot;
+
+// Tool descriptions
+def gcc : Tool&lt;
+[(in_language &quot;c&quot;),
+ (out_language &quot;executable&quot;),
+ (output_suffix &quot;out&quot;),
+ (cmd_line &quot;gcc $INFILE -o $OUTFILE&quot;),
+ (sink)
+]&gt;;
+
+// Language map
+def LanguageMap : LanguageMap&lt;[LangToSuffixes&lt;&quot;c&quot;, [&quot;c&quot;]&gt;]&gt;;
+
+// Compilation graph
+def CompilationGraph : CompilationGraph&lt;[Edge&lt;&quot;root&quot;, &quot;gcc&quot;&gt;]&gt;;
+</pre>
+<p>As you can see, this file consists of three parts: tool descriptions,
+language map, and the compilation graph definition.</p>
+<p>At the heart of LLVMC is the idea of a compilation graph: vertices in
+this graph are tools, and edges represent a transformation path
+between two tools (for example, assembly source produced by the
+compiler can be transformed into executable code by an assembler). The
+compilation graph is basically a list of edges; a special node named
+<tt class="docutils literal"><span class="pre">root</span></tt> is used to mark graph entry points.</p>
+<p>Tool descriptions are represented as property lists: most properties
+in the example above should be self-explanatory; the <tt class="docutils literal"><span class="pre">sink</span></tt> property
+means that all options lacking an explicit description should be
+forwarded to this tool.</p>
+<p>The <tt class="docutils literal"><span class="pre">LanguageMap</span></tt> associates a language name with a list of suffixes
+and is used for deciding which toolchain corresponds to a given input
+file.</p>
+<p>To learn more about LLVMC customization, refer to the reference
+manual and plugin source code in the <tt class="docutils literal"><span class="pre">plugins</span></tt> directory.</p>
+<hr />
+<address>
+<a href="http://jigsaw.w3.org/css-validator/check/referer">
+<img src="http://jigsaw.w3.org/css-validator/images/vcss-blue"
+   alt="Valid CSS" /></a>
+<a href="http://validator.w3.org/check?uri=referer">
+<img src="http://www.w3.org/Icons/valid-xhtml10-blue"
+   alt="Valid XHTML 1.0 Transitional"/></a>
+
+<a href="mailto:foldr at codedgers.com">Mikhail Glushenkov</a><br />
+<a href="http://llvm.org">LLVM Compiler Infrastructure</a><br />
+
+Last modified: $Date: 2008-12-11 11:34:48 -0600 (Thu, 11 Dec 2008) $
+</address></div>
+</div>
+</body>
+</html>

Added: www-releases/trunk/2.9/docs/CompilerWriterInfo.html
URL: http://llvm.org/viewvc/llvm-project/www-releases/trunk/2.9/docs/CompilerWriterInfo.html?rev=129058&view=auto
==============================================================================
--- www-releases/trunk/2.9/docs/CompilerWriterInfo.html (added)
+++ www-releases/trunk/2.9/docs/CompilerWriterInfo.html Thu Apr  7 00:46:10 2011
@@ -0,0 +1,263 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" 
+                      "http://www.w3.org/TR/html4/strict.dtd">
+<html>
+<head>
+  <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
+  <title>Architecture/platform information for compiler writers</title>
+  <link rel="stylesheet" href="llvm.css" type="text/css">
+</head>
+
+<body>
+
+<div class="doc_title">
+  Architecture/platform information for compiler writers
+</div>
+
+<div class="doc_warning">
+  <p>Note: This document is a work-in-progress.  Additions and clarifications
+  are welcome.</p>
+</div>
+
+<ol>
+  <li><a href="#hw">Hardware</a>
+  <ol>
+    <li><a href="#alpha">Alpha</a></li>
+    <li><a href="#arm">ARM</a></li>
+    <li><a href="#ia64">Itanium</a></li>
+    <li><a href="#mips">MIPS</a></li>
+    <li><a href="#ppc">PowerPC</a></li>
+    <li><a href="#sparc">SPARC</a></li>
+    <li><a href="#x86">X86</a></li>
+    <li><a href="#other">Other lists</a></li>
+  </ol></li>
+  <li><a href="#abi">Application Binary Interface (ABI)</a>
+  <ol>
+    <li><a href="#linux">Linux</a></li>
+    <li><a href="#osx">OS X</a></li>
+  </ol></li>
+  <li><a href="#misc">Miscellaneous resources</a></li>
+</ol>
+
+<div class="doc_author">
+  <p>Compiled by <a href="http://misha.brukman.net">Misha Brukman</a></p>
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_section"><a name="hw">Hardware</a></div>
+<!-- *********************************************************************** -->
+
+<!-- ======================================================================= -->
+<div class="doc_subsection"><a name="alpha">Alpha</a></div>
+
+<div class="doc_text">
+<ul>
+<li><a
+href="http://ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html">Alpha manuals</a> 
+</li>
+</ul>
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection"><a name="arm">ARM</a></div>
+
+<div class="doc_text">
+<ul>
+<li><a href="http://www.arm.com/documentation/">ARM documentation</a> 
+(<a href="http://www.arm.com/documentation/ARMProcessor_Cores/">Processor
+Cores</a>)</li>
+<li><a href="http://www.arm.com/products/DevTools/ABI.html">ABI</a></li>
+</ul>
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection"><a name="ia64">Itanium (ia64)</a></div>
+
+<div class="doc_text">
+<ul>
+<li><a
+href="http://developer.intel.com/design/itanium2/documentation.htm">Itanium documentation</a> 
+</li>
+</ul>
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection"><a name="mips">MIPS</a></div>
+
+<div class="doc_text">
+<ul>
+<li><a
+href="http://mips.com/content/Documentation/MIPSDocumentation/ProcessorArchitecture/doclibrary">MIPS
+Processor Architecture</a></li>
+</ul>
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection"><a name="ppc">PowerPC</a></div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">IBM - Official manuals and docs</div>
+
+<div class="doc_text">
+
+<ul>
+<li><a
+href="http://www-106.ibm.com/developerworks/eserver/articles/archguide.html">PowerPC
+Architecture Book</a>
+<ul>
+  <li>Book I: <a
+  href="http://www-106.ibm.com/developerworks/eserver/pdfs/archpub1.pdf">PowerPC
+  User Instruction Set Architecture</a></li>
+  <li>Book II: <a
+  href="http://www-106.ibm.com/developerworks/eserver/pdfs/archpub2.pdf">PowerPC
+  Virtual Environment Architecture</a></li>
+  <li>Book III: <a
+  href="http://www-106.ibm.com/developerworks/eserver/pdfs/archpub3.pdf">PowerPC
+  Operating Environment Architecture</a></li>
+</ul></li>
+<li><a
+href="http://www-3.ibm.com/chips/techlib/techlib.nsf/techdocs/852569B20050FF7785256996007558C6">PowerPC
+Compiler Writer's Guide</a></li>
+<li><A
+href="http://www-3.ibm.com/chips/techlib/techlib.nsf/products/PowerPC">PowerPC
+Processor Manuals</a></li>
+<li><a
+href="http://www-106.ibm.com/developerworks/linux/library/l-powarch/">Intro to
+PowerPC architecture</a></li>
+<li><a href="http://publibn.boulder.ibm.com/doc_link/en_US/a_doc_lib/aixassem/alangref/alangreftfrm.htm">IBM AIX/5L for POWER Assembly reference</a></li>
+</ul>
+
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">Other documents, collections, notes</div>
+
+<div class="doc_text">
+
+<ul>
+<li><a href="http://penguinppc.org/dev/#library">PowerPC ABI documents</a></li>
+<li><a href="http://gcc.gnu.org/ml/gcc-patches/2003-09/msg00997.html">PowerPC64
+alignment of long doubles (from GCC)</a></li>
+<li><a href="http://sources.redhat.com/ml/binutils/2002-04/msg00573.html">Long
+branch stubs for powerpc64-linux (from binutils)</a></li>
+</ul>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection"><a name="sparc">SPARC</a></div>
+
+<div class="doc_text">
+
+<ul>
+<li><a href="http://www.sparc.org/resource.htm">SPARC resources</a></li>
+<li><a href="http://www.sparc.org/standards.html">SPARC standards</a></li>
+</ul>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection"><a name="x86">X86</a></div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">AMD - Official manuals and docs</div>
+
+<div class="doc_text">
+<ul>
+<li><a
+href="http://www.amd.com/us-en/Processors/TechnicalResources/0,,30_182_739,00.html">AMD processor manuals</a></li>
+<li><a href="http://www.x86-64.org/documentation">X86-64 ABI</a></li>
+</ul>
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">Intel - Official manuals and docs</div>
+
+<div class="doc_text">
+<ul>
+<li><a
+href="http://developer.intel.com/design/pentium4/manuals/index_new.htm">IA-32
+manuals</a></li>
+<li><a
+href="http://www.intel.com/design/itanium/documentation.htm?iid=ipp_srvr_proc_itanium2+techdocs">Intel
+Itanium documentation</a></li>
+</ul>
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">Other x86-specific information</div>
+
+<div class="doc_text">
+<ul>
+<li><a href="http://www.agner.org/assem/calling_conventions.pdf">Calling
+conventions for different C++ compilers and operating systems</a></li>
+</ul>
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection"><a name="other">Other relevant lists</a></div>
+
+<div class="doc_text">
+
+<ul>
+<li><a href="http://gcc.gnu.org/readings.html">GCC reading list</a></li>
+</ul>
+
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_section"><a name="abi">ABI</a></div>
+<!-- *********************************************************************** -->
+
+<!-- ======================================================================= -->
+<div class="doc_subsection"><a name="linux">Linux</a></div>
+
+<div class="doc_text">
+<ol>
+<li><a href="http://www.linuxbase.org/spec/ELF/ppc64/">PowerPC 64-bit ELF ABI
+Supplement</a></li>
+</ol>
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection"><a name="osx">OS X</a></div>
+
+<div class="doc_text">
+<ol>
+<li><a
+href="http://developer.apple.com/documentation/Darwin/RuntimeArchitecture-date.html">Mach-O
+Runtime Architecture</a></li>
+<li><a href="http://www.unsanity.org/archives/000044.php">Notes on Mach-O
+ABI</a></li>
+</ol>
+
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_section"><a name="misc">Miscellaneous resources</a></div>
+<!-- *********************************************************************** -->
+
+<ul>
+<li><a
+href="http://www.nondot.org/sabre/os/articles/ExecutableFileFormats/">Executable
+File Format library</a></li>
+<li><a href="http://gcc.gnu.org/projects/prefetch.html">GCC prefetch project</a>
+page has a good survey of the prefetching capabilities of a variety of modern
+processors.</li>
+</ul>
+
+<!-- *********************************************************************** -->
+
+<hr>
+<address>
+  <a href="http://jigsaw.w3.org/css-validator/check/referer"><img
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS"></a>
+  <a href="http://validator.w3.org/check/referer"><img
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01"></a>
+
+  <a href="http://misha.brukman.net">Misha Brukman</a><br>
+  <a href="http://llvm.org">LLVM Compiler Infrastructure</a><br>
+  Last modified: $Date: 2010-05-06 17:28:04 -0700 (Thu, 06 May 2010) $
+</address>
+
+</body>
+</html>

Added: www-releases/trunk/2.9/docs/DebuggingJITedCode.html
URL: http://llvm.org/viewvc/llvm-project/www-releases/trunk/2.9/docs/DebuggingJITedCode.html?rev=129058&view=auto
==============================================================================
--- www-releases/trunk/2.9/docs/DebuggingJITedCode.html (added)
+++ www-releases/trunk/2.9/docs/DebuggingJITedCode.html Thu Apr  7 00:46:10 2011
@@ -0,0 +1,152 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN"
+                      "http://www.w3.org/TR/html4/strict.dtd">
+<html>
+<head>
+  <title>Debugging JITed Code With GDB</title>
+  <link rel="stylesheet" href="llvm.css" type="text/css">
+</head>
+<body>
+
+<div class="doc_title">Debugging JITed Code With GDB</div>
+<ol>
+  <li><a href="#example">Example usage</a></li>
+  <li><a href="#background">Background</a></li>
+</ol>
+<div class="doc_author">Written by Reid Kleckner</div>
+
+<!--=========================================================================-->
+<div class="doc_section"><a name="example">Example usage</a></div>
+<!--=========================================================================-->
+<div class="doc_text">
+
+<p>In order to debug code JITed by LLVM, you need GDB 7.0 or newer, which is
+available on most modern distributions of Linux.  The version of GDB that Apple
+ships with XCode has been frozen at 6.3 for a while.  LLDB may be a better
+option for debugging JITed code on Mac OS X.
+</p>
+
+<p>Consider debugging the following code compiled with clang and run through
+lli:
+</p>
+
+<pre class="doc_code">
+#include &lt;stdio.h&gt;
+
+void foo() {
+    printf("%d\n", *(int*)NULL);  // Crash here
+}
+
+void bar() {
+    foo();
+}
+
+void baz() {
+    bar();
+}
+
+int main(int argc, char **argv) {
+    baz();
+}
+</pre>
+
+<p>Here are the commands to run that application under GDB and print the stack
+trace at the crash:
+</p>
+
+<pre class="doc_code">
+# Compile foo.c to bitcode.  You can use either clang or llvm-gcc with this
+# command line.  Both require -fexceptions, or the calls are all marked
+# 'nounwind' which disables DWARF exception handling info.  Custom frontends
+# should avoid adding this attribute to JITed code, since it interferes with
+# DWARF CFA generation at the moment.
+$ clang foo.c -fexceptions -emit-llvm -c -o foo.bc
+
+# Run foo.bc under lli with -jit-emit-debug.  If you built lli in debug mode,
+# -jit-emit-debug defaults to true.
+$ $GDB_INSTALL/gdb --args lli -jit-emit-debug foo.bc
+...
+
+# Run the code.
+(gdb) run
+Starting program: /tmp/gdb/lli -jit-emit-debug foo.bc
+[Thread debugging using libthread_db enabled]
+
+Program received signal SIGSEGV, Segmentation fault.
+0x00007ffff7f55164 in foo ()
+
+# Print the backtrace, this time with symbols instead of ??.
+(gdb) bt
+#0  0x00007ffff7f55164 in foo ()
+#1  0x00007ffff7f550f9 in bar ()
+#2  0x00007ffff7f55099 in baz ()
+#3  0x00007ffff7f5502a in main ()
+#4  0x00000000007c0225 in llvm::JIT::runFunction(llvm::Function*,
+    std::vector&lt;llvm::GenericValue,
+    std::allocator&lt;llvm::GenericValue&gt; &gt; const&amp;) ()
+#5  0x00000000007d6d98 in
+    llvm::ExecutionEngine::runFunctionAsMain(llvm::Function*,
+    std::vector&lt;std::string,
+    std::allocator&lt;std::string&gt; &gt; const&amp;, char const* const*) ()
+#6  0x00000000004dab76 in main ()
+</pre>
+
+<p>As you can see, GDB can correctly unwind the stack and has the appropriate
+function names.
+</p>
+</div>
+
+<!--=========================================================================-->
+<div class="doc_section"><a name="background">Background</a></div>
+<!--=========================================================================-->
+<div class="doc_text">
+
+<p>Without special runtime support, debugging dynamically generated code with
+GDB (as well as most debuggers) can be quite painful.  Debuggers generally read
+debug information from the object file of the code, but for JITed code, there is
+no such file to look for.
+</p>
+
+<p>Depending on the architecture, this can impact the debugging experience in
+different ways.  For example, on most 32-bit x86 architectures, you can simply
+compile with -fno-omit-frame-pointer for GCC and -disable-fp-elim for LLVM.
+When GDB creates a backtrace, it can properly unwind the stack, but the stack
+frames owned by JITed code have ??'s instead of the appropriate symbol name.
+However, on Linux x86_64 in particular, GDB relies on the DWARF call frame
+address (CFA) debug information to unwind the stack, so even if you compile
+your program to leave the frame pointer untouched, GDB will usually be unable
+to unwind the stack past any JITed code stack frames.
+</p>
+
+<p>In order to communicate the necessary debug info to GDB, an interface for
+registering JITed code with debuggers has been designed and implemented for
+GDB and LLVM.  At a high level, whenever LLVM generates new machine code, it
+also generates an object file in memory containing the debug information.  LLVM
+then adds the object file to the global list of object files and calls a special
+function (__jit_debug_register_code) marked noinline that GDB knows about.  When
+GDB attaches to a process, it puts a breakpoint in this function and loads all
+of the object files in the global list.  When LLVM calls the registration
+function, GDB catches the breakpoint signal, loads the new object file from
+LLVM's memory, and resumes the execution.  In this way, GDB can get the
+necessary debug information.
+</p>
+
+<p>At the time of this writing, LLVM only supports architectures that use ELF
+object files and it only generates symbols and DWARF CFA information.  However,
+it would be easy to add more information to the object file, so we don't need to
+coordinate with GDB to get better debug information.
+</p>
+</div>
+
+<!-- *********************************************************************** -->
+<hr>
+<address>
+  <a href="http://jigsaw.w3.org/css-validator/check/referer"><img
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS"></a>
+  <a href="http://validator.w3.org/check/referer"><img
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01"></a>
+  <a href="mailto:reid.kleckner at gmail.com">Reid Kleckner</a><br>
+  <a href="http://llvm.org">The LLVM Compiler Infrastructure</a><br>
+  Last modified: $Date: 2010-07-07 13:16:45 -0700 (Wed, 07 Jul 2010) $
+</address>
+</body>
+</html>

Added: www-releases/trunk/2.9/docs/DeveloperPolicy.html
URL: http://llvm.org/viewvc/llvm-project/www-releases/trunk/2.9/docs/DeveloperPolicy.html?rev=129058&view=auto
==============================================================================
--- www-releases/trunk/2.9/docs/DeveloperPolicy.html (added)
+++ www-releases/trunk/2.9/docs/DeveloperPolicy.html Thu Apr  7 00:46:10 2011
@@ -0,0 +1,618 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN"
+                      "http://www.w3.org/TR/html4/strict.dtd">
+<html>
+<head>
+  <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
+  <title>LLVM Developer Policy</title>
+  <link rel="stylesheet" href="llvm.css" type="text/css">
+</head>
+<body>
+      
+<div class="doc_title">LLVM Developer Policy</div>
+<ol>
+  <li><a href="#introduction">Introduction</a></li>
+  <li><a href="#policies">Developer Policies</a>
+  <ol>
+    <li><a href="#informed">Stay Informed</a></li>
+    <li><a href="#patches">Making a Patch</a></li>
+    <li><a href="#reviews">Code Reviews</a></li>
+    <li><a href="#owners">Code Owners</a></li>
+    <li><a href="#testcases">Test Cases</a></li>
+    <li><a href="#quality">Quality</a></li>
+    <li><a href="#commitaccess">Obtaining Commit Access</a></li>
+    <li><a href="#newwork">Making a Major Change</a></li>
+    <li><a href="#incremental">Incremental Development</a></li>
+    <li><a href="#attribution">Attribution of Changes</a></li>
+  </ol></li>
+  <li><a href="#clp">Copyright, License, and Patents</a>
+  <ol>
+    <li><a href="#copyright">Copyright</a></li>
+    <li><a href="#license">License</a></li>
+    <li><a href="#patents">Patents</a></li>
+  </ol></li>
+</ol>
+<div class="doc_author">Written by the LLVM Oversight Team</div>
+
+<!--=========================================================================-->
+<div class="doc_section"><a name="introduction">Introduction</a></div>
+<!--=========================================================================-->
+<div class="doc_text">
+<p>This document contains the LLVM Developer Policy which defines the project's
+   policy towards developers and their contributions. The intent of this policy
+   is to eliminate miscommunication, rework, and confusion that might arise from
+   the distributed nature of LLVM's development.  By stating the policy in clear
+   terms, we hope each developer can know ahead of time what to expect when
+   making LLVM contributions.  This policy covers all llvm.org subprojects,
+   including Clang, LLDB, etc.</p>
+<p>This policy is also designed to accomplish the following objectives:</p>
+
+<ol>
+  <li>Attract both users and developers to the LLVM project.</li>
+
+  <li>Make life as simple and easy for contributors as possible.</li>
+
+  <li>Keep the top of Subversion trees as stable as possible.</li>
+</ol>
+  
+<p>This policy is aimed at frequent contributors to LLVM. People interested in
+   contributing one-off patches can do so in an informal way by sending them to
+   the
+   <a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits">llvm-commits
+   mailing list</a> and engaging another developer to see it through the
+   process.</p>
+</div>
+
+<!--=========================================================================-->
+<div class="doc_section"><a name="policies">Developer Policies</a></div>
+<!--=========================================================================-->
+<div class="doc_text">
+<p>This section contains policies that pertain to frequent LLVM developers.  We
+   always welcome <a href="#patches">one-off patches</a> from people who do not
+   routinely contribute to LLVM, but we expect more from frequent contributors
+   to keep the system as efficient as possible for everyone.  Frequent LLVM
+   contributors are expected to meet the following requirements in order for
+   LLVM to maintain a high standard of quality.<p>
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsection"> <a name="informed">Stay Informed</a> </div>
+<div class="doc_text">
+<p>Developers should stay informed by reading at least the "dev" mailing list
+   for the projects you are interested in, such as 
+   <a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev">llvmdev</a> for
+   LLVM, <a href="http://lists.cs.uiuc.edu/mailman/listinfo/cfe-dev">cfe-dev</a>
+   for Clang, or <a
+   href="http://lists.cs.uiuc.edu/mailman/listinfo/lldb-dev">lldb-dev</a>
+   for LLDB.  If you are doing anything more than just casual work on LLVM, it
+   is suggested that you also subscribe to the "commits" mailing list for the
+   subproject you're interested in, such as
+  <a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits">llvm-commits</a>,
+  <a href="http://lists.cs.uiuc.edu/mailman/listinfo/cfe-commits">cfe-commits</a>,
+  or <a href="http://lists.cs.uiuc.edu/mailman/listinfo/lldb-commits">lldb-commits</a>.
+   Reading the "commits" list and paying attention to changes being made by
+   others is a good way to see what other people are interested in and watching
+   the flow of the project as a whole.</p>
+
+<p>We recommend that active developers register an email account with 
+   <a href="http://llvm.org/bugs/">LLVM Bugzilla</a> and preferably subscribe to
+   the <a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvmbugs">llvm-bugs</a>
+   email list to keep track of bugs and enhancements occurring in LLVM.  We
+   really appreciate people who are proactive at catching incoming bugs in their
+   components and dealing with them promptly.</p>
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsection"> <a name="patches">Making a Patch</a></div>
+
+<div class="doc_text">
+<p>When making a patch for review, the goal is to make it as easy for the
+   reviewer to read it as possible.  As such, we recommend that you:</p>
+
+<ol>
+  <li>Make your patch against the Subversion trunk, not a branch, and not an old
+      version of LLVM.  This makes it easy to apply the patch.  For information
+      on how to check out SVN trunk, please see the <a
+      href="GettingStarted.html#checkout">Getting Started Guide</a>.</li>
+        
+  <li>Similarly, patches should be submitted soon after they are generated.  Old
+      patches may not apply correctly if the underlying code changes between the
+      time the patch was created and the time it is applied.</li>
+
+  <li>Patches should be made with <tt>svn diff</tt>, or similar. If you use
+      a different tool, make sure it uses the <tt>diff -u</tt> format and
+      that it doesn't contain clutter which makes it hard to read.</li>
+
+  <li>If you are modifying generated files, such as the top-level
+      <tt>configure</tt> script, please separate out those changes into
+      a separate patch from the rest of your changes.</li>
+</ol>
+  
+<p>When sending a patch to a mailing list, it is a good idea to send it as an
+   <em>attachment</em> to the message, not embedded into the text of the
+   message.  This ensures that your mailer will not mangle the patch when it
+   sends it (e.g. by making whitespace changes or by wrapping lines).</p>
+
+<p><em>For Thunderbird users:</em> Before submitting a patch, please open 
+   <em>Preferences &#8594; Advanced &#8594; General &#8594; Config Editor</em>,
+   find the key <tt>mail.content_disposition_type</tt>, and set its value to
+   <tt>1</tt>. Without this setting, Thunderbird sends your attachment using
+   <tt>Content-Disposition: inline</tt> rather than <tt>Content-Disposition:
+   attachment</tt>. Apple Mail gamely displays such a file inline, making it
+   difficult to work with for reviewers using that program.</p>
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsection"> <a name="reviews">Code Reviews</a></div>
+<div class="doc_text">
+<p>LLVM has a code review policy. Code review is one way to increase the quality
+   of software. We generally follow these policies:</p>
+
+<ol>
+  <li>All developers are required to have significant changes reviewed before
+      they are committed to the repository.</li>
+
+  <li>Code reviews are conducted by email, usually on the llvm-commits
+      list.</li>
+
+  <li>Code can be reviewed either before it is committed or after.  We expect
+      major changes to be reviewed before being committed, but smaller changes
+      (or changes where the developer owns the component) can be reviewed after
+      commit.</li>
+
+  <li>The developer responsible for a code change is also responsible for making
+      all necessary review-related changes.</li>
+
+  <li>Code review can be an iterative process, which continues until the patch
+      is ready to be committed.</li>
+</ol>
+  
+<p>Developers should participate in code reviews as both reviewers and
+   reviewees. If someone is kind enough to review your code, you should return
+   the favor for someone else.  Note that anyone is welcome to review and give
+   feedback on a patch, but only people with Subversion write access can approve
+   it.</p>
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsection"> <a name="owners">Code Owners</a></div>
+<div class="doc_text">
+
+<p>The LLVM Project relies on two features of its process to maintain rapid
+   development in addition to the high quality of its source base: the
+   combination of code review plus post-commit review for trusted maintainers.
+   Having both is a great way for the project to take advantage of the fact that
+   most people do the right thing most of the time, and only commit patches
+   without pre-commit review when they are confident they are right.</p>
+     
+<p>The trick to this is that the project has to guarantee that all patches that
+   are committed are reviewed after they go in: you don't want everyone to
+   assume someone else will review it, allowing the patch to go unreviewed.  To
+   solve this problem, we have a notion of an 'owner' for a piece of the code.
+   The sole responsibility of a code owner is to ensure that a commit to their
+   area of the code is appropriately reviewed, either by themself or by someone
+   else.  The current code owners are:</p>
+  
+<ol>
+  <li><b>Evan Cheng</b>: Code generator and all targets.</li>
+
+  <li><b>Greg Clayton</b>: LLDB.</li>
+
+  <li><b>Doug Gregor</b>: Clang Frontend Libraries.</li>
+
+  <li><b>Howard Hinnant</b>: libc++.</li>
+
+  <li><b>Anton Korobeynikov</b>: Exception handling, debug information, and
+      Windows codegen.</li>
+
+  <li><b>Ted Kremenek</b>: Clang Static Analyzer.</li>
+
+  <li><b>Chris Lattner</b>: Everything not covered by someone else.</li>
+  
+  <li><b>Duncan Sands</b>: llvm-gcc 4.2.</li>
+</ol>
+  
+<p>Note that code ownership is completely different than reviewers: anyone can
+   review a piece of code, and we welcome code review from anyone who is
+   interested.  Code owners are the "last line of defense" to guarantee that all
+   patches that are committed are actually reviewed.</p>
+
+<p>Being a code owner is a somewhat unglamorous position, but it is incredibly
+   important for the ongoing success of the project.  Because people get busy,
+   interests change, and unexpected things happen, code ownership is purely
+   opt-in, and anyone can choose to resign their "title" at any time. For now,
+   we do not have an official policy on how one gets elected to be a code
+   owner.</p>
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsection"> <a name="testcases">Test Cases</a></div>
+<div class="doc_text">
+<p>Developers are required to create test cases for any bugs fixed and any new
+   features added.  Some tips for getting your testcase approved:</p>
+
+<ol>
+  <li>All feature and regression test cases are added to the 
+      <tt>llvm/test</tt> directory. The appropriate sub-directory should be
+      selected (see the <a href="TestingGuide.html">Testing Guide</a> for
+      details).</li>
+
+  <li>Test cases should be written in <a href="LangRef.html">LLVM assembly
+      language</a> unless the feature or regression being tested requires
+      another language (e.g. the bug being fixed or feature being implemented is
+      in the llvm-gcc C++ front-end, in which case it must be written in
+      C++).</li>
+
+  <li>Test cases, especially for regressions, should be reduced as much as
+      possible, by <a href="Bugpoint.html">bugpoint</a> or manually. It is
+      unacceptable to place an entire failing program into <tt>llvm/test</tt> as
+      this creates a <i>time-to-test</i> burden on all developers. Please keep
+      them short.</li>
+</ol>
+  
+<p>Note that llvm/test and clang/test are designed for regression and small
+   feature tests only. More extensive test cases (e.g., entire applications,
+   benchmarks, etc)
+   should be added to the <tt>llvm-test</tt> test suite.  The llvm-test suite is
+   for coverage (correctness, performance, etc) testing, not feature or
+   regression testing.</p>
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsection"> <a name="quality">Quality</a></div>
+<div class="doc_text">
+<p>The minimum quality standards that any change must satisfy before being
+   committed to the main development branch are:</p>
+
+<ol>
+  <li>Code must adhere to the <a href="CodingStandards.html">LLVM Coding
+      Standards</a>.</li>
+
+  <li>Code must compile cleanly (no errors, no warnings) on at least one
+      platform.</li>
+
+  <li>Bug fixes and new features should <a href="#testcases">include a
+      testcase</a> so we know if the fix/feature ever regresses in the
+      future.</li>
+
+  <li>Code must pass the <tt>llvm/test</tt> test suite.</li>
+
+  <li>The code must not cause regressions on a reasonable subset of llvm-test,
+      where "reasonable" depends on the contributor's judgement and the scope of
+      the change (more invasive changes require more testing). A reasonable
+      subset might be something like
+      "<tt>llvm-test/MultiSource/Benchmarks</tt>".</li>
+</ol>
+
+<p>Additionally, the committer is responsible for addressing any problems found
+   in the future that the change is responsible for.  For example:</p>
+
+<ul>
+  <li>The code should compile cleanly on all supported platforms.</li>
+
+  <li>The changes should not cause any correctness regressions in the
+      <tt>llvm-test</tt> suite and must not cause any major performance
+      regressions.</li>
+
+  <li>The change set should not cause performance or correctness regressions for
+      the LLVM tools.</li>
+
+  <li>The changes should not cause performance or correctness regressions in
+      code compiled by LLVM on all applicable targets.</li>
+
+  <li>You are expected to address any <a href="http://llvm.org/bugs/">bugzilla
+      bugs</a> that result from your change.</li>
+</ul>
+  
+<p>We prefer for this to be handled before submission but understand that it
+   isn't possible to test all of this for every submission.  Our build bots and
+   nightly testing infrastructure normally finds these problems.  A good rule of
+   thumb is to check the nightly testers for regressions the day after your
+   change.  Build bots will directly email you if a group of commits that
+   included yours caused a failure.  You are expected to check the build bot
+   messages to see if they are your fault and, if so, fix the breakage.</p>
+
+<p>Commits that violate these quality standards (e.g. are very broken) may be
+   reverted. This is necessary when the change blocks other developers from
+   making progress. The developer is welcome to re-commit the change after the
+   problem has been fixed.</p>
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsection">
+  <a name="commitaccess">Obtaining Commit Access</a></div>
+<div class="doc_text">
+
+<p>We grant commit access to contributors with a track record of submitting high
+   quality patches.  If you would like commit access, please send an email to
+   <a href="mailto:sabre at nondot.org">Chris</a> with the following
+   information:</p>
+
+<ol>
+  <li>The user name you want to commit with, e.g. "hacker".</li>
+
+  <li>The full name and email address you want message to llvm-commits to come
+      from, e.g. "J. Random Hacker &lt;hacker at yoyodyne.com&gt;".</li>
+
+  <li>A "password hash" of the password you want to use, e.g. "2ACR96qjUqsyM".  
+      Note that you don't ever tell us what your password is, you just give it
+      to us in an encrypted form.  To get this, run "htpasswd" (a utility that
+      comes with apache) in crypt mode (often enabled with "-d"), or find a web
+      page that will do it for you.</li>
+</ol>
+
+<p>Once you've been granted commit access, you should be able to check out an
+   LLVM tree with an SVN URL of "https://username at llvm.org/..." instead of the
+   normal anonymous URL of "http://llvm.org/...".  The first time you commit
+   you'll have to type in your password.  Note that you may get a warning from
+   SVN about an untrusted key, you can ignore this.  To verify that your commit
+   access works, please do a test commit (e.g. change a comment or add a blank
+   line).  Your first commit to a repository may require the autogenerated email
+   to be approved by a mailing list.  This is normal, and will be done when
+   the mailing list owner has time.</p>
+
+<p>If you have recently been granted commit access, these policies apply:</p>
+
+<ol>
+  <li>You are granted <i>commit-after-approval</i> to all parts of LLVM.  To get
+      approval, submit a <a href="#patches">patch</a> to
+      <a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits">llvm-commits</a>.
+      When approved you may commit it yourself.</li>
+
+  <li>You are allowed to commit patches without approval which you think are
+      obvious. This is clearly a subjective decision &mdash; we simply expect
+      you to use good judgement.  Examples include: fixing build breakage,
+      reverting obviously broken patches, documentation/comment changes, any
+      other minor changes.</li>
+
+  <li>You are allowed to commit patches without approval to those portions of
+      LLVM that you have contributed or maintain (i.e., have been assigned
+      responsibility for), with the proviso that such commits must not break the
+      build.  This is a "trust but verify" policy and commits of this nature are
+      reviewed after they are committed.</li>
+
+  <li>Multiple violations of these policies or a single egregious violation may
+      cause commit access to be revoked.</li>
+</ol>
+
+<p>In any case, your changes are still subject to <a href="#reviews">code
+   review</a> (either before or after they are committed, depending on the
+   nature of the change).  You are encouraged to review other peoples' patches
+   as well, but you aren't required to.</p>
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsection"> <a name="newwork">Making a Major Change</a></div>
+<div class="doc_text">
+<p>When a developer begins a major new project with the aim of contributing it
+   back to LLVM, s/he should inform the community with an email to
+   the <a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev">llvmdev</a>
+   email list, to the extent possible. The reason for this is to:
+
+<ol>
+  <li>keep the community informed about future changes to LLVM, </li>
+
+  <li>avoid duplication of effort by preventing multiple parties working on the
+      same thing and not knowing about it, and</li>
+
+  <li>ensure that any technical issues around the proposed work are discussed
+      and resolved before any significant work is done.</li>
+</ol>
+  
+<p>The design of LLVM is carefully controlled to ensure that all the pieces fit
+   together well and are as consistent as possible. If you plan to make a major
+   change to the way LLVM works or want to add a major new extension, it is a
+   good idea to get consensus with the development community before you start
+   working on it.</p>
+  
+<p>Once the design of the new feature is finalized, the work itself should be
+   done as a series of <a href="#incremental">incremental changes</a>, not as a
+   long-term development branch.</p>
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsection"> <a name="incremental">Incremental Development</a>
+</div>
+<div class="doc_text">
+<p>In the LLVM project, we do all significant changes as a series of incremental
+   patches.  We have a strong dislike for huge changes or long-term development
+   branches.  Long-term development branches have a number of drawbacks:</p>
+
+<ol>
+  <li>Branches must have mainline merged into them periodically.  If the branch
+      development and mainline development occur in the same pieces of code,
+      resolving merge conflicts can take a lot of time.</li>
+
+  <li>Other people in the community tend to ignore work on branches.</li>
+
+  <li>Huge changes (produced when a branch is merged back onto mainline) are
+      extremely difficult to <a href="#reviews">code review</a>.</li>
+
+  <li>Branches are not routinely tested by our nightly tester
+      infrastructure.</li>
+
+  <li>Changes developed as monolithic large changes often don't work until the
+      entire set of changes is done.  Breaking it down into a set of smaller
+      changes increases the odds that any of the work will be committed to the
+      main repository.</li>
+</ol>    
+  
+<p>To address these problems, LLVM uses an incremental development style and we
+   require contributors to follow this practice when making a large/invasive
+   change.  Some tips:</p>
+
+<ul>
+  <li>Large/invasive changes usually have a number of secondary changes that are
+      required before the big change can be made (e.g. API cleanup, etc).  These
+      sorts of changes can often be done before the major change is done,
+      independently of that work.</li>
+
+  <li>The remaining inter-related work should be decomposed into unrelated sets
+      of changes if possible.  Once this is done, define the first increment and
+      get consensus on what the end goal of the change is.</li>
+
+  <li>Each change in the set can be stand alone (e.g. to fix a bug), or part of
+      a planned series of changes that works towards the development goal.</li>
+    
+  <li>Each change should be kept as small as possible. This simplifies your work
+      (into a logical progression), simplifies code review and reduces the
+      chance that you will get negative feedback on the change. Small increments
+      also facilitate the maintenance of a high quality code base.</li>
+
+  <li>Often, an independent precursor to a big change is to add a new API and
+      slowly migrate clients to use the new API.  Each change to use the new API
+      is often "obvious" and can be committed without review.  Once the new API
+      is in place and used, it is much easier to replace the underlying
+      implementation of the API.  This implementation change is logically
+      separate from the API change.</li>
+</ul>
+  
+<p>If you are interested in making a large change, and this scares you, please
+   make sure to first <a href="#newwork">discuss the change/gather consensus</a>
+   then ask about the best way to go about making the change.</p>
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsection"><a name="attribution">Attribution of 
+Changes</a></div>
+<div class="doc_text">
+<p>We believe in correct attribution of contributions to their contributors.
+   However, we do not want the source code to be littered with random
+   attributions "this code written by J. Random Hacker" (this is noisy and
+   distracting).  In practice, the revision control system keeps a perfect
+   history of who changed what, and the CREDITS.txt file describes higher-level
+   contributions.  If you commit a patch for someone else, please say "patch
+   contributed by J. Random Hacker!" in the commit message.</p>
+
+<p>Overall, please do not add contributor names to the source code.</p>
+</div>
+
+<!--=========================================================================-->
+<div class="doc_section">
+  <a name="clp">Copyright, License, and Patents</a>
+</div>
+<!--=========================================================================-->
+
+<div class="doc_text">
+<p>This section addresses the issues of copyright, license and patents for the
+   LLVM project.  Currently, the University of Illinois is the LLVM copyright
+   holder and the terms of its license to LLVM users and developers is the
+   <a href="http://www.opensource.org/licenses/UoI-NCSA.php">University of 
+   Illinois/NCSA Open Source License</a>.</p>
+
+<div class="doc_notes">
+<p style="text-align:center;font-weight:bold">NOTE: This section deals with
+   legal matters but does not provide legal advice.  We are not lawyers, please
+   seek legal counsel from an attorney.</p>
+</div>
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsection"><a name="copyright">Copyright</a></div>
+<div class="doc_text">
+
+<p>The LLVM project does not require copyright assignments, which means that the
+   copyright for the code in the project is held by its respective contributors
+   who have each agreed to release their contributed code under the terms of the
+   <a href="#license">LLVM License</a>.</p>
+   
+<p>An implication of this is that the LLVM license is unlikely to ever change:
+   changing it would require tracking down all the contributors to LLVM and
+   getting them to agree that a license change is acceptable for their
+   contribution.  Since there are no plans to change the license, this is not a
+   cause for concern.</p>
+   
+<p>As a contributor to the project, this means that you (or your company) retain
+   ownership of the code you contribute, that it cannot be used in a way that
+   contradicts the license (which is a liberal BSD-style license), and that the
+   license for your contributions won't change without your approval in the
+   future.</p>
+   
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsection"><a name="license">License</a></div>
+<div class="doc_text">
+<p>We intend to keep LLVM perpetually open source and to use a liberal open
+   source license. All of the code in LLVM is available under the
+   <a href="http://www.opensource.org/licenses/UoI-NCSA.php">University of
+   Illinois/NCSA Open Source License</a>, which boils down to this:</p>
+
+<ul>
+  <li>You can freely distribute LLVM.</li>
+  <li>You must retain the copyright notice if you redistribute LLVM.</li>
+  <li>Binaries derived from LLVM must reproduce the copyright notice (e.g. in an
+      included readme file).</li>
+  <li>You can't use our names to promote your LLVM derived products.</li>
+  <li>There's no warranty on LLVM at all.</li>
+</ul>
+  
+<p>We believe this fosters the widest adoption of LLVM because it <b>allows
+   commercial products to be derived from LLVM</b> with few restrictions and
+   without a requirement for making any derived works also open source (i.e.
+   LLVM's license is not a "copyleft" license like the GPL). We suggest that you
+   read the <a href="http://www.opensource.org/licenses/UoI-NCSA.php">License</a>
+   if further clarification is needed.</p>
+   
+<p>In addition to the UIUC license, the runtime library components of LLVM
+   (<b>compiler_rt and libc++</b>) are also licensed under the <a
+   href="http://www.opensource.org/licenses/mit-license.php">MIT license</a>,
+   which does not contain the binary redistribution clause.  As a user of these
+   runtime libraries, it means that you can choose to use the code under either
+   license (and thus don't need the binary redistribution clause), and as a
+   contributor to the code that you agree that any contributions to these
+   libraries be licensed under both licenses.  We feel that this is important
+   for runtime libraries, because they are implicitly linked into applications
+   and therefore should not subject those applications to the binary
+   redistribution clause. This also means that it is ok to move code from (e.g.)
+   libc++ to the LLVM core without concern, but that code cannot be moved from
+   the LLVM core to libc++ without the copyright owner's permission.
+</p>
+
+<p>Note that the LLVM Project does distribute llvm-gcc, <b>which is GPL.</b>
+   This means that anything "linked" into llvm-gcc must itself be compatible
+   with the GPL, and must be releasable under the terms of the GPL.  This
+   implies that <b>any code linked into llvm-gcc and distributed to others may
+   be subject to the viral aspects of the GPL</b> (for example, a proprietary
+   code generator linked into llvm-gcc must be made available under the GPL).
+   This is not a problem for code already distributed under a more liberal
+   license (like the UIUC license), and does not affect code generated by
+   llvm-gcc.  It may be a problem if you intend to base commercial development
+   on llvm-gcc without redistributing your source code.</p>
+  
+<p>We have no plans to change the license of LLVM.  If you have questions or
+   comments about the license, please contact the
+   <a href="mailto:llvmdev at cs.uiuc.edu">LLVM Developer's Mailing List</a>.</p>
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsection"><a name="patents">Patents</a></div>
+<div class="doc_text">
+<p>To the best of our knowledge, LLVM does not infringe on any patents (we have
+   actually removed code from LLVM in the past that was found to infringe).
+   Having code in LLVM that infringes on patents would violate an important goal
+   of the project by making it hard or impossible to reuse the code for
+   arbitrary purposes (including commercial use).</p>
+   
+<p>When contributing code, we expect contributors to notify us of any potential
+   for patent-related trouble with their changes.  If you or your employer own
+   the rights to a patent and would like to contribute code to LLVM that relies
+   on it, we require that the copyright owner sign an agreement that allows any
+   other user of LLVM to freely use your patent.  Please contact
+   the <a href="mailto:llvm-oversight at cs.uiuc.edu">oversight group</a> for more
+   details.</p>
+</div>
+
+<!-- *********************************************************************** -->
+<hr>
+<address>
+  <a href="http://jigsaw.w3.org/css-validator/check/referer"><img
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS"></a>
+  <a href="http://validator.w3.org/check/referer"><img
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01"></a>
+  Written by the 
+  <a href="mailto:llvm-oversight at cs.uiuc.edu">LLVM Oversight Group</a><br>
+  <a href="http://llvm.org">The LLVM Compiler Infrastructure</a><br>
+  Last modified: $Date: 2010-11-16 13:32:53 -0800 (Tue, 16 Nov 2010) $
+</address>
+</body>
+</html>

Added: www-releases/trunk/2.9/docs/ExceptionHandling.html
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--- www-releases/trunk/2.9/docs/ExceptionHandling.html (added)
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@@ -0,0 +1,644 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN"
+                      "http://www.w3.org/TR/html4/strict.dtd">
+<html>
+<head>
+  <title>Exception Handling in LLVM</title>
+  <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
+  <meta name="description"
+        content="Exception Handling in LLVM.">
+  <link rel="stylesheet" href="llvm.css" type="text/css">
+</head>
+
+<body>
+
+<div class="doc_title">Exception Handling in LLVM</div>
+
+<table class="layout" style="width:100%">
+  <tr class="layout">
+    <td class="left">
+<ul>
+  <li><a href="#introduction">Introduction</a>
+  <ol>
+    <li><a href="#itanium">Itanium ABI Zero-cost Exception Handling</a></li>
+    <li><a href="#sjlj">Setjmp/Longjmp Exception Handling</a></li>
+    <li><a href="#overview">Overview</a></li>
+  </ol></li>
+  <li><a href="#codegen">LLVM Code Generation</a>
+  <ol>
+    <li><a href="#throw">Throw</a></li>
+    <li><a href="#try_catch">Try/Catch</a></li>
+    <li><a href="#cleanups">Cleanups</a></li>
+    <li><a href="#throw_filters">Throw Filters</a></li>
+    <li><a href="#restrictions">Restrictions</a></li>
+  </ol></li>
+  <li><a href="#format_common_intrinsics">Exception Handling Intrinsics</a>
+  <ol>
+  	<li><a href="#llvm_eh_exception"><tt>llvm.eh.exception</tt></a></li>
+  	<li><a href="#llvm_eh_selector"><tt>llvm.eh.selector</tt></a></li>
+  	<li><a href="#llvm_eh_typeid_for"><tt>llvm.eh.typeid.for</tt></a></li>
+  	<li><a href="#llvm_eh_sjlj_setjmp"><tt>llvm.eh.sjlj.setjmp</tt></a></li>
+  	<li><a href="#llvm_eh_sjlj_longjmp"><tt>llvm.eh.sjlj.longjmp</tt></a></li>
+  	<li><a href="#llvm_eh_sjlj_lsda"><tt>llvm.eh.sjlj.lsda</tt></a></li>
+  	<li><a href="#llvm_eh_sjlj_callsite"><tt>llvm.eh.sjlj.callsite</tt></a></li>
+  	<li><a href="#llvm_eh_sjlj_dispatchsetup"><tt>llvm.eh.sjlj.dispatchsetup</tt></a></li>
+  </ol></li>
+  <li><a href="#asm">Asm Table Formats</a>
+  <ol>
+    <li><a href="#unwind_tables">Exception Handling Frame</a></li>
+    <li><a href="#exception_tables">Exception Tables</a></li>
+  </ol></li>
+  <li><a href="#todo">ToDo</a></li>
+</ul>
+</td>
+</tr></table>
+
+<div class="doc_author">
+  <p>Written by <a href="mailto:jlaskey at mac.com">Jim Laskey</a></p>
+</div>
+
+
+<!-- *********************************************************************** -->
+<div class="doc_section"><a name="introduction">Introduction</a></div>
+<!-- *********************************************************************** -->
+
+<div class="doc_text">
+
+<p>This document is the central repository for all information pertaining to
+   exception handling in LLVM.  It describes the format that LLVM exception
+   handling information takes, which is useful for those interested in creating
+   front-ends or dealing directly with the information.  Further, this document
+   provides specific examples of what exception handling information is used for
+   in C/C++.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="itanium">Itanium ABI Zero-cost Exception Handling</a>
+</div>
+
+<div class="doc_text">
+
+<p>Exception handling for most programming languages is designed to recover from
+   conditions that rarely occur during general use of an application.  To that
+   end, exception handling should not interfere with the main flow of an
+   application's algorithm by performing checkpointing tasks, such as saving the
+   current pc or register state.</p>
+
+<p>The Itanium ABI Exception Handling Specification defines a methodology for
+   providing outlying data in the form of exception tables without inlining
+   speculative exception handling code in the flow of an application's main
+   algorithm.  Thus, the specification is said to add "zero-cost" to the normal
+   execution of an application.</p>
+
+<p>A more complete description of the Itanium ABI exception handling runtime
+   support of can be found at
+   <a href="http://www.codesourcery.com/cxx-abi/abi-eh.html">Itanium C++ ABI:
+   Exception Handling</a>. A description of the exception frame format can be
+   found at
+   <a href="http://refspecs.freestandards.org/LSB_3.0.0/LSB-Core-generic/LSB-Core-generic/ehframechpt.html">Exception
+   Frames</a>, with details of the DWARF 3 specification at
+   <a href="http://www.eagercon.com/dwarf/dwarf3std.htm">DWARF 3 Standard</a>.
+   A description for the C++ exception table formats can be found at
+   <a href="http://www.codesourcery.com/cxx-abi/exceptions.pdf">Exception Handling
+   Tables</a>.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="sjlj">Setjmp/Longjmp Exception Handling</a>
+</div>
+
+<div class="doc_text">
+
+<p>Setjmp/Longjmp (SJLJ) based exception handling uses LLVM intrinsics
+   <a href="#llvm_eh_sjlj_setjmp"><tt>llvm.eh.sjlj.setjmp</tt></a> and
+   <a href="#llvm_eh_sjlj_longjmp"><tt>llvm.eh.sjlj.longjmp</tt></a> to
+   handle control flow for exception handling.</p>
+
+<p>For each function which does exception processing, be it try/catch blocks
+   or cleanups, that function registers itself on a global frame list. When
+   exceptions are being unwound, the runtime uses this list to identify which
+   functions need processing.<p>
+
+<p>Landing pad selection is encoded in the call site entry of the function
+   context. The runtime returns to the function via
+   <a href="#llvm_eh_sjlj_longjmp"><tt>llvm.eh.sjlj.longjmp</tt></a>, where
+   a switch table transfers control to the appropriate landing pad based on
+   the index stored in the function context.</p>
+
+<p>In contrast to DWARF exception handling, which encodes exception regions
+   and frame information in out-of-line tables, SJLJ exception handling
+   builds and removes the unwind frame context at runtime. This results in
+   faster exception handling at the expense of slower execution when no
+   exceptions are thrown. As exceptions are, by their nature, intended for
+   uncommon code paths, DWARF exception handling is generally preferred to
+   SJLJ.</p>
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="overview">Overview</a>
+</div>
+
+<div class="doc_text">
+
+<p>When an exception is thrown in LLVM code, the runtime does its best to find a
+   handler suited to processing the circumstance.</p>
+
+<p>The runtime first attempts to find an <i>exception frame</i> corresponding to
+   the function where the exception was thrown.  If the programming language
+   (e.g. C++) supports exception handling, the exception frame contains a
+   reference to an exception table describing how to process the exception.  If
+   the language (e.g. C) does not support exception handling, or if the
+   exception needs to be forwarded to a prior activation, the exception frame
+   contains information about how to unwind the current activation and restore
+   the state of the prior activation.  This process is repeated until the
+   exception is handled.  If the exception is not handled and no activations
+   remain, then the application is terminated with an appropriate error
+   message.</p>
+
+<p>Because different programming languages have different behaviors when
+   handling exceptions, the exception handling ABI provides a mechanism for
+   supplying <i>personalities.</i> An exception handling personality is defined
+   by way of a <i>personality function</i> (e.g. <tt>__gxx_personality_v0</tt>
+   in C++), which receives the context of the exception, an <i>exception
+   structure</i> containing the exception object type and value, and a reference
+   to the exception table for the current function.  The personality function
+   for the current compile unit is specified in a <i>common exception
+   frame</i>.</p>
+
+<p>The organization of an exception table is language dependent.  For C++, an
+   exception table is organized as a series of code ranges defining what to do
+   if an exception occurs in that range.  Typically, the information associated
+   with a range defines which types of exception objects (using C++ <i>type
+   info</i>) that are handled in that range, and an associated action that
+   should take place.  Actions typically pass control to a <i>landing
+   pad</i>.</p>
+
+<p>A landing pad corresponds to the code found in the <i>catch</i> portion of
+   a <i>try</i>/<i>catch</i> sequence.  When execution resumes at a landing
+   pad, it receives the exception structure and a selector corresponding to
+   the <i>type</i> of exception thrown.  The selector is then used to determine
+   which <i>catch</i> should actually process the exception.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_section">
+  <a name="codegen">LLVM Code Generation</a>
+</div>
+
+<div class="doc_text">
+
+<p>At the time of this writing, only C++ exception handling support is available
+   in LLVM.  So the remainder of this document will be somewhat C++-centric.</p>
+
+<p>From the C++ developers perspective, exceptions are defined in terms of the
+   <tt>throw</tt> and <tt>try</tt>/<tt>catch</tt> statements.  In this section
+   we will describe the implementation of LLVM exception handling in terms of
+   C++ examples.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="throw">Throw</a>
+</div>
+
+<div class="doc_text">
+
+<p>Languages that support exception handling typically provide a <tt>throw</tt>
+   operation to initiate the exception process.  Internally, a throw operation
+   breaks down into two steps.  First, a request is made to allocate exception
+   space for an exception structure.  This structure needs to survive beyond the
+   current activation.  This structure will contain the type and value of the
+   object being thrown.  Second, a call is made to the runtime to raise the
+   exception, passing the exception structure as an argument.</p>
+
+<p>In C++, the allocation of the exception structure is done by
+   the <tt>__cxa_allocate_exception</tt> runtime function.  The exception
+   raising is handled by <tt>__cxa_throw</tt>.  The type of the exception is
+   represented using a C++ RTTI structure.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="try_catch">Try/Catch</a>
+</div>
+
+<div class="doc_text">
+
+<p>A call within the scope of a <i>try</i> statement can potentially raise an
+   exception.  In those circumstances, the LLVM C++ front-end replaces the call
+   with an <tt>invoke</tt> instruction.  Unlike a call, the <tt>invoke</tt> has
+   two potential continuation points: where to continue when the call succeeds
+   as per normal; and where to continue if the call raises an exception, either
+   by a throw or the unwinding of a throw.</p>
+
+<p>The term used to define a the place where an <tt>invoke</tt> continues after
+   an exception is called a <i>landing pad</i>.  LLVM landing pads are
+   conceptually alternative function entry points where an exception structure
+   reference and a type info index are passed in as arguments.  The landing pad
+   saves the exception structure reference and then proceeds to select the catch
+   block that corresponds to the type info of the exception object.</p>
+
+<p>Two LLVM intrinsic functions are used to convey information about the landing
+   pad to the back end.</p>
+
+<ol>
+  <li><a href="#llvm_eh_exception"><tt>llvm.eh.exception</tt></a> takes no
+      arguments and returns a pointer to the exception structure.  This only
+      returns a sensible value if called after an <tt>invoke</tt> has branched
+      to a landing pad.  Due to code generation limitations, it must currently
+      be called in the landing pad itself.</li>
+
+  <li><a href="#llvm_eh_selector"><tt>llvm.eh.selector</tt></a> takes a minimum
+      of three arguments.  The first argument is the reference to the exception
+      structure. The second argument is a reference to the personality function
+      to be used for this <tt>try</tt>/<tt>catch</tt> sequence. Each of the
+      remaining arguments is either a reference to the type info for
+      a <tt>catch</tt> statement, a <a href="#throw_filters">filter</a>
+      expression, or the number zero (<tt>0</tt>) representing
+      a <a href="#cleanups">cleanup</a>.  The exception is tested against the
+      arguments sequentially from first to last.  The result of
+      the <a href="#llvm_eh_selector"><tt>llvm.eh.selector</tt></a> is a
+      positive number if the exception matched a type info, a negative number if
+      it matched a filter, and zero if it matched a cleanup.  If nothing is
+      matched, the behaviour of the program
+      is <a href="#restrictions">undefined</a>.  This only returns a sensible
+      value if called after an <tt>invoke</tt> has branched to a landing pad.
+      Due to codegen limitations, it must currently be called in the landing pad
+      itself.  If a type info matched, then the selector value is the index of
+      the type info in the exception table, which can be obtained using the
+      <a href="#llvm_eh_typeid_for"><tt>llvm.eh.typeid.for</tt></a>
+      intrinsic.</li>
+</ol>
+
+<p>Once the landing pad has the type info selector, the code branches to the
+   code for the first catch.  The catch then checks the value of the type info
+   selector against the index of type info for that catch.  Since the type info
+   index is not known until all the type info have been gathered in the backend,
+   the catch code will call the
+   <a href="#llvm_eh_typeid_for"><tt>llvm.eh.typeid.for</tt></a> intrinsic
+   to determine the index for a given type info.  If the catch fails to match
+   the selector then control is passed on to the next catch. Note: Since the
+   landing pad will not be used if there is no match in the list of type info on
+   the call to <a href="#llvm_eh_selector"><tt>llvm.eh.selector</tt></a>, then
+   neither the last catch nor <i>catch all</i> need to perform the check
+   against the selector.</p>
+
+<p>Finally, the entry and exit of catch code is bracketed with calls
+   to <tt>__cxa_begin_catch</tt> and <tt>__cxa_end_catch</tt>.</p>
+
+<ul>
+  <li><tt>__cxa_begin_catch</tt> takes a exception structure reference as an
+      argument and returns the value of the exception object.</li>
+
+  <li><tt>__cxa_end_catch</tt> takes no arguments. This function:<br><br>
+    <ol>
+      <li>Locates the most recently caught exception and decrements its handler
+          count,</li>
+      <li>Removes the exception from the "caught" stack if the handler count
+          goes to zero, and</li>
+      <li>Destroys the exception if the handler count goes to zero, and the
+          exception was not re-thrown by throw.</li>
+    </ol>
+    <p>Note: a rethrow from within the catch may replace this call with
+       a <tt>__cxa_rethrow</tt>.</p></li>
+</ul>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="cleanups">Cleanups</a>
+</div>
+
+<div class="doc_text">
+
+<p>To handle destructors and cleanups in <tt>try</tt> code, control may not run
+   directly from a landing pad to the first catch.  Control may actually flow
+   from the landing pad to clean up code and then to the first catch.  Since the
+   required clean up for each <tt>invoke</tt> in a <tt>try</tt> may be different
+   (e.g. intervening constructor), there may be several landing pads for a given
+   try.  If cleanups need to be run, an <tt>i32 0</tt> should be passed as the
+   last <a href="#llvm_eh_selector"><tt>llvm.eh.selector</tt></a> argument.
+   However, when using DWARF exception handling with C++, a <tt>i8* null</tt>
+   <a href="#restrictions">must</a> be passed instead.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="throw_filters">Throw Filters</a>
+</div>
+
+<div class="doc_text">
+
+<p>C++ allows the specification of which exception types can be thrown from a
+   function.  To represent this a top level landing pad may exist to filter out
+   invalid types.  To express this in LLVM code the landing pad will
+   call <a href="#llvm_eh_selector"><tt>llvm.eh.selector</tt></a>.  The
+   arguments are a reference to the exception structure, a reference to the
+   personality function, the length of the filter expression (the number of type
+   infos plus one), followed by the type infos themselves.
+   <a href="#llvm_eh_selector"><tt>llvm.eh.selector</tt></a> will return a
+   negative value if the exception does not match any of the type infos.  If no
+   match is found then a call to <tt>__cxa_call_unexpected</tt> should be made,
+   otherwise <tt>_Unwind_Resume</tt>.  Each of these functions requires a
+   reference to the exception structure.  Note that the most general form of an
+   <a href="#llvm_eh_selector"><tt>llvm.eh.selector</tt></a> call can contain
+   any number of type infos, filter expressions and cleanups (though having more
+   than one cleanup is pointless).  The LLVM C++ front-end can generate such
+   <a href="#llvm_eh_selector"><tt>llvm.eh.selector</tt></a> calls due to
+   inlining creating nested exception handling scopes.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="restrictions">Restrictions</a>
+</div>
+
+<div class="doc_text">
+
+<p>The semantics of the invoke instruction require that any exception that
+   unwinds through an invoke call should result in a branch to the invoke's
+   unwind label.  However such a branch will only happen if the
+   <a href="#llvm_eh_selector"><tt>llvm.eh.selector</tt></a> matches. Thus in
+   order to ensure correct operation, the front-end must only generate
+   <a href="#llvm_eh_selector"><tt>llvm.eh.selector</tt></a> calls that are
+   guaranteed to always match whatever exception unwinds through the invoke.
+   For most languages it is enough to pass zero, indicating the presence of
+   a <a href="#cleanups">cleanup</a>, as the
+   last <a href="#llvm_eh_selector"><tt>llvm.eh.selector</tt></a> argument.
+   However for C++ this is not sufficient, because the C++ personality function
+   will terminate the program if it detects that unwinding the exception only
+   results in matches with cleanups.  For C++ a <tt>null i8*</tt> should be
+   passed as the last <a href="#llvm_eh_selector"><tt>llvm.eh.selector</tt></a>
+   argument instead.  This is interpreted as a catch-all by the C++ personality
+   function, and will always match.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_section">
+  <a name="format_common_intrinsics">Exception Handling Intrinsics</a>
+</div>
+
+<div class="doc_text">
+
+<p>LLVM uses several intrinsic functions (name prefixed with "llvm.eh") to
+   provide exception handling information at various points in generated
+   code.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsubsection">
+  <a name="llvm_eh_exception">llvm.eh.exception</a>
+</div>
+
+<div class="doc_text">
+
+<pre>
+  i8* %<a href="#llvm_eh_exception">llvm.eh.exception</a>()
+</pre>
+
+<p>This intrinsic returns a pointer to the exception structure.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsubsection">
+  <a name="llvm_eh_selector">llvm.eh.selector</a>
+</div>
+
+<div class="doc_text">
+
+<pre>
+  i32 %<a href="#llvm_eh_selector">llvm.eh.selector</a>(i8*, i8*, ...)
+</pre>
+
+<p>This intrinsic is used to compare the exception with the given type infos,
+   filters and cleanups.</p>
+
+<p><a href="#llvm_eh_selector"><tt>llvm.eh.selector</tt></a> takes a minimum of
+   three arguments.  The first argument is the reference to the exception
+   structure. The second argument is a reference to the personality function to
+   be used for this try catch sequence. Each of the remaining arguments is
+   either a reference to the type info for a catch statement,
+   a <a href="#throw_filters">filter</a> expression, or the number zero
+   representing a <a href="#cleanups">cleanup</a>.  The exception is tested
+   against the arguments sequentially from first to last.  The result of
+   the <a href="#llvm_eh_selector"><tt>llvm.eh.selector</tt></a> is a positive
+   number if the exception matched a type info, a negative number if it matched
+   a filter, and zero if it matched a cleanup.  If nothing is matched, the
+   behaviour of the program is <a href="#restrictions">undefined</a>.  If a type
+   info matched then the selector value is the index of the type info in the
+   exception table, which can be obtained using the
+   <a href="#llvm_eh_typeid_for"><tt>llvm.eh.typeid.for</tt></a> intrinsic.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsubsection">
+  <a name="llvm_eh_typeid_for">llvm.eh.typeid.for</a>
+</div>
+
+<div class="doc_text">
+
+<pre>
+  i32 %<a href="#llvm_eh_typeid_for">llvm.eh.typeid.for</a>(i8*)
+</pre>
+
+<p>This intrinsic returns the type info index in the exception table of the
+   current function.  This value can be used to compare against the result
+   of <a href="#llvm_eh_selector"><tt>llvm.eh.selector</tt></a>.  The single
+   argument is a reference to a type info.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsubsection">
+  <a name="llvm_eh_sjlj_setjmp">llvm.eh.sjlj.setjmp</a>
+</div>
+
+<div class="doc_text">
+
+<pre>
+  i32 %<a href="#llvm_eh_sjlj_setjmp">llvm.eh.sjlj.setjmp</a>(i8*)
+</pre>
+
+<p>The SJLJ exception handling uses this intrinsic to force register saving for
+   the current function and to store the address of the following instruction
+   for use as a destination address by <a href="#llvm_eh_sjlj_longjmp">
+   <tt>llvm.eh.sjlj.longjmp</tt></a>. The buffer format and the overall
+   functioning of this intrinsic is compatible with the GCC
+   <tt>__builtin_setjmp</tt> implementation, allowing code built with the
+   two compilers to interoperate.</p>
+
+<p>The single parameter is a pointer to a five word buffer in which the calling
+   context is saved. The front end places the frame pointer in the first word,
+   and the target implementation of this intrinsic should place the destination
+   address for a
+   <a href="#llvm_eh_sjlj_longjmp"><tt>llvm.eh.sjlj.longjmp</tt></a> in the
+   second word. The following three words are available for use in a
+   target-specific manner.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsubsection">
+  <a name="llvm_eh_sjlj_longjmp">llvm.eh.sjlj.longjmp</a>
+</div>
+
+<div class="doc_text">
+
+<pre>
+  void %<a href="#llvm_eh_sjlj_longjmp">llvm.eh.sjlj.setjmp</a>(i8*)
+</pre>
+
+<p>The <a href="#llvm_eh_sjlj_longjmp"><tt>llvm.eh.sjlj.longjmp</tt></a>
+   intrinsic is used to implement <tt>__builtin_longjmp()</tt> for SJLJ
+   style exception handling. The single parameter is a pointer to a
+   buffer populated by <a href="#llvm_eh_sjlj_setjmp">
+     <tt>llvm.eh.sjlj.setjmp</tt></a>. The frame pointer and stack pointer
+   are restored from the buffer, then control is transfered to the
+   destination address.</p>
+
+</div>
+<!-- ======================================================================= -->
+<div class="doc_subsubsection">
+  <a name="llvm_eh_sjlj_lsda">llvm.eh.sjlj.lsda</a>
+</div>
+
+<div class="doc_text">
+
+<pre>
+  i8* %<a href="#llvm_eh_sjlj_lsda">llvm.eh.sjlj.lsda</a>()
+</pre>
+
+<p>Used for SJLJ based exception handling, the <a href="#llvm_eh_sjlj_lsda">
+   <tt>llvm.eh.sjlj.lsda</tt></a> intrinsic returns the address of the Language
+   Specific Data Area (LSDA) for the current function. The SJLJ front-end code
+   stores this address in the exception handling function context for use by the
+   runtime.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsubsection">
+  <a name="llvm_eh_sjlj_callsite">llvm.eh.sjlj.callsite</a>
+</div>
+
+<div class="doc_text">
+
+<pre>
+  void %<a href="#llvm_eh_sjlj_callsite">llvm.eh.sjlj.callsite</a>(i32)
+</pre>
+
+<p>For SJLJ based exception handling, the <a href="#llvm_eh_sjlj_callsite">
+  <tt>llvm.eh.sjlj.callsite</tt></a> intrinsic identifies the callsite value
+  associated with the following invoke instruction. This is used to ensure
+  that landing pad entries in the LSDA are generated in the matching order.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsubsection">
+  <a name="llvm_eh_sjlj_dispatchsetup">llvm.eh.sjlj.dispatchsetup</a>
+</div>
+
+<div class="doc_text">
+
+<pre>
+  void %<a href="#llvm_eh_sjlj_dispatchsetup">llvm.eh.sjlj.dispatchsetup</a>(i32)
+</pre>
+
+<p>For SJLJ based exception handling, the <a href="#llvm_eh_sjlj_dispatchsetup">
+  <tt>llvm.eh.sjlj.dispatchsetup</tt></a> intrinsic is used by targets to do
+  any unwind-edge setup they need. By default, no action is taken.  </p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_section">
+  <a name="asm">Asm Table Formats</a>
+</div>
+
+<div class="doc_text">
+
+<p>There are two tables that are used by the exception handling runtime to
+   determine which actions should take place when an exception is thrown.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="unwind_tables">Exception Handling Frame</a>
+</div>
+
+<div class="doc_text">
+
+<p>An exception handling frame <tt>eh_frame</tt> is very similar to the unwind
+   frame used by dwarf debug info.  The frame contains all the information
+   necessary to tear down the current frame and restore the state of the prior
+   frame.  There is an exception handling frame for each function in a compile
+   unit, plus a common exception handling frame that defines information common
+   to all functions in the unit.</p>
+
+<p>Todo - Table details here.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="exception_tables">Exception Tables</a>
+</div>
+
+<div class="doc_text">
+
+<p>An exception table contains information about what actions to take when an
+   exception is thrown in a particular part of a function's code.  There is one
+   exception table per function except leaf routines and functions that have
+   only calls to non-throwing functions will not need an exception table.</p>
+
+<p>Todo - Table details here.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_section">
+  <a name="todo">ToDo</a>
+</div>
+
+<div class="doc_text">
+
+<ol>
+
+  <li>Testing/Testing/Testing.</li>
+
+</ol>
+
+</div>
+
+<!-- *********************************************************************** -->
+
+<hr>
+<address>
+  <a href="http://jigsaw.w3.org/css-validator/check/referer"><img
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS"></a>
+  <a href="http://validator.w3.org/check/referer"><img
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01"></a>
+
+  <a href="mailto:sabre at nondot.org">Chris Lattner</a><br>
+  <a href="http://llvm.org">LLVM Compiler Infrastructure</a><br>
+  Last modified: $Date: 2010-12-09 15:05:48 -0800 (Thu, 09 Dec 2010) $
+</address>
+
+</body>
+</html>

Added: www-releases/trunk/2.9/docs/ExtendedIntegerResults.txt
URL: http://llvm.org/viewvc/llvm-project/www-releases/trunk/2.9/docs/ExtendedIntegerResults.txt?rev=129058&view=auto
==============================================================================
--- www-releases/trunk/2.9/docs/ExtendedIntegerResults.txt (added)
+++ www-releases/trunk/2.9/docs/ExtendedIntegerResults.txt Thu Apr  7 00:46:10 2011
@@ -0,0 +1,133 @@
+//===----------------------------------------------------------------------===//
+// Representing sign/zero extension of function results
+//===----------------------------------------------------------------------===//
+
+Mar 25, 2009  - Initial Revision
+
+Most ABIs specify that functions which return small integers do so in a
+specific integer GPR.  This is an efficient way to go, but raises the question:
+if the returned value is smaller than the register, what do the high bits hold?
+
+There are three (interesting) possible answers: undefined, zero extended, or
+sign extended.  The number of bits in question depends on the data-type that
+the front-end is referencing (typically i1/i8/i16/i32).
+
+Knowing the answer to this is important for two reasons: 1) we want to be able
+to implement the ABI correctly.  If we need to sign extend the result according
+to the ABI, we really really do need to do this to preserve correctness.  2)
+this information is often useful for optimization purposes, and we want the
+mid-level optimizers to be able to process this (e.g. eliminate redundant
+extensions).
+
+For example, lets pretend that X86 requires the caller to properly extend the
+result of a return (I'm not sure this is the case, but the argument doesn't
+depend on this).  Given this, we should compile this:
+
+int a();
+short b() { return a(); }
+
+into:
+
+_b:
+	subl	$12, %esp
+	call	L_a$stub
+	addl	$12, %esp
+	cwtl
+	ret
+
+An optimization example is that we should be able to eliminate the explicit
+sign extension in this example:
+
+short y();
+int z() {
+  return ((int)y() << 16) >> 16;
+}
+
+_z:
+	subl	$12, %esp
+	call	_y
+	;;  movswl %ax, %eax   -> not needed because eax is already sext'd
+	addl	$12, %esp
+	ret
+
+//===----------------------------------------------------------------------===//
+// What we have right now.
+//===----------------------------------------------------------------------===//
+
+Currently, these sorts of things are modelled by compiling a function to return
+the small type and a signext/zeroext marker is used.  For example, we compile
+Z into:
+
+define i32 @z() nounwind {
+entry:
+	%0 = tail call signext i16 (...)* @y() nounwind
+	%1 = sext i16 %0 to i32
+	ret i32 %1
+}
+
+and b into:
+
+define signext i16 @b() nounwind {
+entry:
+	%0 = tail call i32 (...)* @a() nounwind		; <i32> [#uses=1]
+	%retval12 = trunc i32 %0 to i16		; <i16> [#uses=1]
+	ret i16 %retval12
+}
+
+This has some problems: 1) the actual precise semantics are really poorly
+defined (see PR3779).  2) some targets might want the caller to extend, some
+might want the callee to extend 3) the mid-level optimizer doesn't know the
+size of the GPR, so it doesn't know that %0 is sign extended up to 32-bits 
+here, and even if it did, it could not eliminate the sext. 4) the code
+generator has historically assumed that the result is extended to i32, which is
+a problem on PIC16 (and is also probably wrong on alpha and other 64-bit
+targets).
+
+//===----------------------------------------------------------------------===//
+// The proposal
+//===----------------------------------------------------------------------===//
+
+I suggest that we have the front-end fully lower out the ABI issues here to
+LLVM IR.  This makes it 100% explicit what is going on and means that there is
+no cause for confusion.  For example, the cases above should compile into:
+
+define i32 @z() nounwind {
+entry:
+        %0 = tail call i32 (...)* @y() nounwind
+	%1 = trunc i32 %0 to i16
+        %2 = sext i16 %1 to i32
+        ret i32 %2
+}
+define i32 @b() nounwind {
+entry:
+	%0 = tail call i32 (...)* @a() nounwind
+	%retval12 = trunc i32 %0 to i16
+	%tmp = sext i16 %retval12 to i32
+	ret i32 %tmp
+}
+
+In this model, no functions will return an i1/i8/i16 (and on a x86-64 target
+that extends results to i64, no i32).  This solves the ambiguity issue, allows us 
+to fully describe all possible ABIs, and now allows the optimizers to reason
+about and eliminate these extensions.
+
+The one thing that is missing is the ability for the front-end and optimizer to
+specify/infer the guarantees provided by the ABI to allow other optimizations.
+For example, in the y/z case, since y is known to return a sign extended value,
+the trunc/sext in z should be eliminable.
+
+This can be done by introducing new sext/zext attributes which mean "I know
+that the result of the function is sign extended at least N bits.  Given this,
+and given that it is stuck on the y function, the mid-level optimizer could
+easily eliminate the extensions etc with existing functionality.
+
+The major disadvantage of doing this sort of thing is that it makes the ABI
+lowering stuff even more explicit in the front-end, and that we would like to
+eventually move to having the code generator do more of this work.  However,
+the sad truth of the matter is that this is a) unlikely to happen anytime in
+the near future, and b) this is no worse than we have now with the existing
+attributes.
+
+C compilers fundamentally have to reason about the target in many ways.  
+This is ugly and horrible, but a fact of life.
+

Added: www-releases/trunk/2.9/docs/ExtendingLLVM.html
URL: http://llvm.org/viewvc/llvm-project/www-releases/trunk/2.9/docs/ExtendingLLVM.html?rev=129058&view=auto
==============================================================================
--- www-releases/trunk/2.9/docs/ExtendingLLVM.html (added)
+++ www-releases/trunk/2.9/docs/ExtendingLLVM.html Thu Apr  7 00:46:10 2011
@@ -0,0 +1,391 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN"
+                      "http://www.w3.org/TR/html4/strict.dtd">
+<html>
+<head>
+  <title>Extending LLVM: Adding instructions, intrinsics, types, etc.</title>
+  <link rel="stylesheet" href="llvm.css" type="text/css">
+</head>
+
+<body>
+
+<div class="doc_title">
+  Extending LLVM: Adding instructions, intrinsics, types, etc.
+</div>
+
+<ol>
+  <li><a href="#introduction">Introduction and Warning</a></li>
+  <li><a href="#intrinsic">Adding a new intrinsic function</a></li>
+  <li><a href="#instruction">Adding a new instruction</a></li>
+  <li><a href="#sdnode">Adding a new SelectionDAG node</a></li>
+  <li><a href="#type">Adding a new type</a>
+  <ol>
+    <li><a href="#fund_type">Adding a new fundamental type</a></li>
+    <li><a href="#derived_type">Adding a new derived type</a></li>
+  </ol></li>
+</ol>
+
+<div class="doc_author">    
+  <p>Written by <a href="http://misha.brukman.net">Misha Brukman</a>,
+  Brad Jones, Nate Begeman,
+  and <a href="http://nondot.org/sabre">Chris Lattner</a></p>
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_section">
+  <a name="introduction">Introduction and Warning</a>
+</div>
+<!-- *********************************************************************** -->
+
+<div class="doc_text">
+
+<p>During the course of using LLVM, you may wish to customize it for your
+research project or for experimentation. At this point, you may realize that
+you need to add something to LLVM, whether it be a new fundamental type, a new
+intrinsic function, or a whole new instruction.</p>
+
+<p>When you come to this realization, stop and think. Do you really need to
+extend LLVM? Is it a new fundamental capability that LLVM does not support at
+its current incarnation or can it be synthesized from already pre-existing LLVM
+elements? If you are not sure, ask on the <a
+href="http://mail.cs.uiuc.edu/mailman/listinfo/llvmdev">LLVM-dev</a> list. The
+reason is that extending LLVM will get involved as you need to update all the
+different passes that you intend to use with your extension, and there are
+<em>many</em> LLVM analyses and transformations, so it may be quite a bit of
+work.</p>
+
+<p>Adding an <a href="#intrinsic">intrinsic function</a> is far easier than
+adding an instruction, and is transparent to optimization passes.  If your added
+functionality can be expressed as a
+function call, an intrinsic function is the method of choice for LLVM
+extension.</p>
+
+<p>Before you invest a significant amount of effort into a non-trivial
+extension, <span class="doc_warning">ask on the list</span> if what you are
+looking to do can be done with already-existing infrastructure, or if maybe
+someone else is already working on it. You will save yourself a lot of time and
+effort by doing so.</p>
+
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_section">
+  <a name="intrinsic">Adding a new intrinsic function</a>
+</div>
+<!-- *********************************************************************** -->
+
+<div class="doc_text">
+
+<p>Adding a new intrinsic function to LLVM is much easier than adding a new
+instruction.  Almost all extensions to LLVM should start as an intrinsic
+function and then be turned into an instruction if warranted.</p>
+
+<ol>
+<li><tt>llvm/docs/LangRef.html</tt>:
+    Document the intrinsic.  Decide whether it is code generator specific and
+    what the restrictions are.  Talk to other people about it so that you are
+    sure it's a good idea.</li>
+
+<li><tt>llvm/include/llvm/Intrinsics*.td</tt>:
+    Add an entry for your intrinsic.  Describe its memory access characteristics
+    for optimization (this controls whether it will be DCE'd, CSE'd, etc). Note
+    that any intrinsic using the <tt>llvm_int_ty</tt> type for an argument will
+    be deemed by <tt>tblgen</tt> as overloaded and the corresponding suffix 
+    will be required on the intrinsic's name.</li>
+
+<li><tt>llvm/lib/Analysis/ConstantFolding.cpp</tt>: If it is possible to 
+    constant fold your intrinsic, add support to it in the 
+    <tt>canConstantFoldCallTo</tt> and <tt>ConstantFoldCall</tt> functions.</li>
+
+<li><tt>llvm/test/Regression/*</tt>: Add test cases for your test cases to the 
+    test suite</li>
+</ol>
+
+<p>Once the intrinsic has been added to the system, you must add code generator
+support for it.  Generally you must do the following steps:</p>
+
+<dl>
+<dt>Add support to the C backend in <tt>lib/Target/CBackend/</tt></dt>
+
+<dd>Depending on the intrinsic, there are a few ways to implement this.  For
+    most intrinsics, it makes sense to add code to lower your intrinsic in
+    <tt>LowerIntrinsicCall</tt> in <tt>lib/CodeGen/IntrinsicLowering.cpp</tt>.
+    Second, if it makes sense to lower the intrinsic to an expanded sequence of
+    C code in all cases, just emit the expansion in <tt>visitCallInst</tt> in
+    <tt>Writer.cpp</tt>.  If the intrinsic has some way to express it with GCC
+    (or any other compiler) extensions, it can be conditionally supported based
+    on the compiler compiling the CBE output (see <tt>llvm.prefetch</tt> for an
+    example).  Third, if the intrinsic really has no way to be lowered, just
+    have the code generator emit code that prints an error message and calls
+    abort if executed.</dd>
+
+<dt>Add support to the .td file for the target(s) of your choice in 
+   <tt>lib/Target/*/*.td</tt>.</dt>
+
+<dd>This is usually a matter of adding a pattern to the .td file that matches
+    the intrinsic, though it may obviously require adding the instructions you
+    want to generate as well.  There are lots of examples in the PowerPC and X86
+    backend to follow.</dd>
+</dl>
+
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_section">
+  <a name="sdnode">Adding a new SelectionDAG node</a>
+</div>
+<!-- *********************************************************************** -->
+
+<div class="doc_text">
+
+<p>As with intrinsics, adding a new SelectionDAG node to LLVM is much easier
+than adding a new instruction.  New nodes are often added to help represent
+instructions common to many targets.  These nodes often map to an LLVM
+instruction (add, sub) or intrinsic (byteswap, population count).  In other
+cases, new nodes have been added to allow many targets to perform a common task
+(converting between floating point and integer representation) or capture more
+complicated behavior in a single node (rotate).</p>
+
+<ol>
+<li><tt>include/llvm/CodeGen/SelectionDAGNodes.h</tt>:
+    Add an enum value for the new SelectionDAG node.</li>
+<li><tt>lib/CodeGen/SelectionDAG/SelectionDAG.cpp</tt>:
+    Add code to print the node to <tt>getOperationName</tt>.  If your new node
+    can be evaluated at compile time when given constant arguments (such as an
+    add of a constant with another constant), find the <tt>getNode</tt> method
+    that takes the appropriate number of arguments, and add a case for your node
+    to the switch statement that performs constant folding for nodes that take
+    the same number of arguments as your new node.</li>
+<li><tt>lib/CodeGen/SelectionDAG/LegalizeDAG.cpp</tt>:
+    Add code to <a href="CodeGenerator.html#selectiondag_legalize">legalize, 
+    promote, and expand</a> the node as necessary.  At a minimum, you will need
+    to add a case statement for your node in <tt>LegalizeOp</tt> which calls
+    LegalizeOp on the node's operands, and returns a new node if any of the
+    operands changed as a result of being legalized.  It is likely that not all
+    targets supported by the SelectionDAG framework will natively support the
+    new node.  In this case, you must also add code in your node's case
+    statement in <tt>LegalizeOp</tt> to Expand your node into simpler, legal
+    operations.  The case for <tt>ISD::UREM</tt> for expanding a remainder into
+    a divide, multiply, and a subtract is a good example.</li>
+<li><tt>lib/CodeGen/SelectionDAG/LegalizeDAG.cpp</tt>:
+    If targets may support the new node being added only at certain sizes, you 
+    will also need to add code to your node's case statement in 
+    <tt>LegalizeOp</tt> to Promote your node's operands to a larger size, and 
+    perform the correct operation.  You will also need to add code to 
+    <tt>PromoteOp</tt> to do this as well.  For a good example, see 
+    <tt>ISD::BSWAP</tt>,
+    which promotes its operand to a wider size, performs the byteswap, and then
+    shifts the correct bytes right to emulate the narrower byteswap in the
+    wider type.</li>
+<li><tt>lib/CodeGen/SelectionDAG/LegalizeDAG.cpp</tt>:
+    Add a case for your node in <tt>ExpandOp</tt> to teach the legalizer how to
+    perform the action represented by the new node on a value that has been
+    split into high and low halves.  This case will be used to support your 
+    node with a 64 bit operand on a 32 bit target.</li>
+<li><tt>lib/CodeGen/SelectionDAG/DAGCombiner.cpp</tt>:
+    If your node can be combined with itself, or other existing nodes in a 
+    peephole-like fashion, add a visit function for it, and call that function
+    from <tt></tt>.  There are several good examples for simple combines you
+    can do; <tt>visitFABS</tt> and <tt>visitSRL</tt> are good starting places.
+    </li>
+<li><tt>lib/Target/PowerPC/PPCISelLowering.cpp</tt>:
+    Each target has an implementation of the <tt>TargetLowering</tt> class,
+    usually in its own file (although some targets include it in the same
+    file as the DAGToDAGISel).  The default behavior for a target is to
+    assume that your new node is legal for all types that are legal for
+    that target.  If this target does not natively support your node, then
+    tell the target to either Promote it (if it is supported at a larger
+    type) or Expand it.  This will cause the code you wrote in 
+    <tt>LegalizeOp</tt> above to decompose your new node into other legal
+    nodes for this target.</li>
+<li><tt>lib/Target/TargetSelectionDAG.td</tt>:
+    Most current targets supported by LLVM generate code using the DAGToDAG
+    method, where SelectionDAG nodes are pattern matched to target-specific
+    nodes, which represent individual instructions.  In order for the targets
+    to match an instruction to your new node, you must add a def for that node
+    to the list in this file, with the appropriate type constraints. Look at
+    <tt>add</tt>, <tt>bswap</tt>, and <tt>fadd</tt> for examples.</li>
+<li><tt>lib/Target/PowerPC/PPCInstrInfo.td</tt>:
+    Each target has a tablegen file that describes the target's instruction
+    set.  For targets that use the DAGToDAG instruction selection framework,
+    add a pattern for your new node that uses one or more target nodes.
+    Documentation for this is a bit sparse right now, but there are several
+    decent examples.  See the patterns for <tt>rotl</tt> in 
+    <tt>PPCInstrInfo.td</tt>.</li>
+<li>TODO: document complex patterns.</li>
+<li><tt>llvm/test/Regression/CodeGen/*</tt>: Add test cases for your new node
+    to the test suite.  <tt>llvm/test/Regression/CodeGen/X86/bswap.ll</tt> is
+    a good example.</li>
+</ol>
+
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_section">
+  <a name="instruction">Adding a new instruction</a>
+</div>
+<!-- *********************************************************************** -->
+
+<div class="doc_text">
+
+<p><span class="doc_warning">WARNING: adding instructions changes the bitcode
+format, and it will take some effort to maintain compatibility with
+the previous version.</span> Only add an instruction if it is absolutely
+necessary.</p>
+
+<ol>
+
+<li><tt>llvm/include/llvm/Instruction.def</tt>:
+    add a number for your instruction and an enum name</li>
+
+<li><tt>llvm/include/llvm/Instructions.h</tt>:
+    add a definition for the class that will represent your instruction</li>
+
+<li><tt>llvm/include/llvm/Support/InstVisitor.h</tt>:
+    add a prototype for a visitor to your new instruction type</li>
+
+<li><tt>llvm/lib/AsmParser/Lexer.l</tt>:
+    add a new token to parse your instruction from assembly text file</li>
+
+<li><tt>llvm/lib/AsmParser/llvmAsmParser.y</tt>:
+    add the grammar on how your instruction can be read and what it will
+    construct as a result</li>
+
+<li><tt>llvm/lib/Bitcode/Reader/Reader.cpp</tt>:
+    add a case for your instruction and how it will be parsed from bitcode</li>
+
+<li><tt>llvm/lib/VMCore/Instruction.cpp</tt>:
+    add a case for how your instruction will be printed out to assembly</li>
+
+<li><tt>llvm/lib/VMCore/Instructions.cpp</tt>:
+    implement the class you defined in
+    <tt>llvm/include/llvm/Instructions.h</tt></li>
+
+<li>Test your instruction</li>
+
+<li><tt>llvm/lib/Target/*</tt>: 
+    Add support for your instruction to code generators, or add a lowering
+    pass.</li>
+
+<li><tt>llvm/test/Regression/*</tt>: add your test cases to the test suite.</li>
+
+</ol>
+
+<p>Also, you need to implement (or modify) any analyses or passes that you want
+to understand this new instruction.</p>
+
+</div>
+
+
+<!-- *********************************************************************** -->
+<div class="doc_section">
+  <a name="type">Adding a new type</a>
+</div>
+<!-- *********************************************************************** -->
+
+<div class="doc_text">
+
+<p><span class="doc_warning">WARNING: adding new types changes the bitcode
+format, and will break compatibility with currently-existing LLVM
+installations.</span> Only add new types if it is absolutely necessary.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="fund_type">Adding a fundamental type</a>
+</div>
+
+<div class="doc_text">
+
+<ol>
+
+<li><tt>llvm/include/llvm/Type.h</tt>:
+    add enum for the new type; add static <tt>Type*</tt> for this type</li>
+
+<li><tt>llvm/lib/VMCore/Type.cpp</tt>:
+    add mapping from <tt>TypeID</tt> =&gt; <tt>Type*</tt>;
+    initialize the static <tt>Type*</tt></li>
+
+<li><tt>llvm/lib/AsmReader/Lexer.l</tt>:
+    add ability to parse in the type from text assembly</li>
+
+<li><tt>llvm/lib/AsmReader/llvmAsmParser.y</tt>:
+    add a token for that type</li>
+
+</ol>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="derived_type">Adding a derived type</a>
+</div>
+
+<div class="doc_text">
+
+<ol>
+<li><tt>llvm/include/llvm/Type.h</tt>:
+    add enum for the new type; add a forward declaration of the type
+    also</li>
+
+<li><tt>llvm/include/llvm/DerivedTypes.h</tt>:
+    add new class to represent new class in the hierarchy; add forward 
+    declaration to the TypeMap value type</li>
+
+<li><tt>llvm/lib/VMCore/Type.cpp</tt>:
+    add support for derived type to: 
+<div class="doc_code">
+<pre>
+std::string getTypeDescription(const Type &amp;Ty,
+  std::vector&lt;const Type*&gt; &amp;TypeStack)
+bool TypesEqual(const Type *Ty, const Type *Ty2,
+  std::map&lt;const Type*, const Type*&gt; &amp; EqTypes)
+</pre>
+</div>
+    add necessary member functions for type, and factory methods</li>
+
+<li><tt>llvm/lib/AsmReader/Lexer.l</tt>:
+    add ability to parse in the type from text assembly</li>
+
+<li><tt>llvm/lib/BitCode/Writer/Writer.cpp</tt>:
+    modify <tt>void BitcodeWriter::outputType(const Type *T)</tt> to serialize
+    your type</li>
+
+<li><tt>llvm/lib/BitCode/Reader/Reader.cpp</tt>:
+    modify <tt>const Type *BitcodeReader::ParseType()</tt> to read your data
+    type</li> 
+
+<li><tt>llvm/lib/VMCore/AsmWriter.cpp</tt>:
+    modify
+<div class="doc_code">
+<pre>
+void calcTypeName(const Type *Ty,
+                  std::vector&lt;const Type*&gt; &amp;TypeStack,
+                  std::map&lt;const Type*,std::string&gt; &amp;TypeNames,
+                  std::string &amp; Result)
+</pre>
+</div>
+    to output the new derived type
+</li>  
+ 
+
+</ol>
+
+</div>
+
+<!-- *********************************************************************** -->
+
+<hr>
+<address>
+  <a href="http://jigsaw.w3.org/css-validator/check/referer"><img
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS"></a>
+  <a href="http://validator.w3.org/check/referer"><img
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01"></a>
+
+  <a href="http://llvm.org">The LLVM Compiler Infrastructure</a>
+  <br>
+  Last modified: $Date: 2010-05-06 17:28:04 -0700 (Thu, 06 May 2010) $
+</address>
+
+</body>
+</html>

Added: www-releases/trunk/2.9/docs/FAQ.html
URL: http://llvm.org/viewvc/llvm-project/www-releases/trunk/2.9/docs/FAQ.html?rev=129058&view=auto
==============================================================================
--- www-releases/trunk/2.9/docs/FAQ.html (added)
+++ www-releases/trunk/2.9/docs/FAQ.html Thu Apr  7 00:46:10 2011
@@ -0,0 +1,938 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN"
+                      "http://www.w3.org/TR/html4/strict.dtd">
+<html>
+<head>
+  <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
+  <title>LLVM: Frequently Asked Questions</title>
+  <style type="text/css">
+    @import url("llvm.css");
+    .question { font-weight: bold }
+    .answer   { margin-left: 2em  }
+  </style>
+</head>
+<body>
+
+<div class="doc_title">
+  LLVM: Frequently Asked Questions
+</div>
+
+<ol>
+  <li><a href="#license">License</a>
+  <ol>
+    <li>Why are the LLVM source code and the front-end distributed under
+        different licenses?</li>
+
+    <li>Does the University of Illinois Open Source License really qualify as an
+       "open source" license?</li>
+
+    <li>Can I modify LLVM source code and redistribute the modified source?</li>
+
+    <li>Can I modify LLVM source code and redistribute binaries or other tools
+        based on it, without redistributing the source?</li>
+  </ol></li>
+
+  <li><a href="#source">Source code</a>
+  <ol>
+    <li>In what language is LLVM written?</li>
+
+    <li>How portable is the LLVM source code?</li>
+  </ol></li>
+
+  <li><a href="#build">Build Problems</a>
+  <ol>
+    <li>When I run configure, it finds the wrong C compiler.</li>
+
+    <li>The <tt>configure</tt> script finds the right C compiler, but it uses
+        the LLVM linker from a previous build.  What do I do?</li>
+
+    <li>When creating a dynamic library, I get a strange GLIBC error.</li>
+
+    <li>I've updated my source tree from Subversion, and now my build is trying
+        to use a file/directory that doesn't exist.</li>
+
+    <li>I've modified a Makefile in my source tree, but my build tree keeps
+        using the old version.  What do I do?</li>
+
+    <li>I've upgraded to a new version of LLVM, and I get strange build
+        errors.</li>
+
+    <li>I've built LLVM and am testing it, but the tests freeze.</li>
+
+    <li>Why do test results differ when I perform different types of
+        builds?</li>
+
+    <li>Compiling LLVM with GCC 3.3.2 fails, what should I do?</li>
+
+    <li>Compiling LLVM with GCC succeeds, but the resulting tools do not work,
+        what can be wrong?</li>
+
+    <li>When I use the test suite, all of the C Backend tests fail.  What is
+        wrong?</li>
+
+    <li>After Subversion update, rebuilding gives the error "No rule to make
+        target".</li>
+
+    <li><a href="#llvmc">The <tt>llvmc</tt> program gives me errors/doesn't
+        work.</a></li>
+
+    <li><a href="#srcdir-objdir">When I compile LLVM-GCC with srcdir == objdir,
+        it fails. Why?</a></li>
+  </ol></li>
+
+  <li><a href="#felangs">Source Languages</a>
+  <ol>
+    <li><a href="#langs">What source languages are supported?</a></li>
+
+    <li><a href="#langirgen">I'd like to write a self-hosting LLVM compiler. How
+        should I interface with the LLVM middle-end optimizers and back-end code
+        generators?</a></li>
+
+    <li><a href="#langhlsupp">What support is there for higher level source
+        language constructs for building a compiler?</a></li>
+
+    <li><a href="GetElementPtr.html">I don't understand the GetElementPtr
+      instruction. Help!</a></li>
+  </ol>
+
+  <li><a href="#cfe">Using the GCC Front End</a>
+  <ol>
+    <li>When I compile software that uses a configure script, the configure
+        script thinks my system has all of the header files and libraries it is
+        testing for.  How do I get configure to work correctly?</li>
+
+    <li>When I compile code using the LLVM GCC front end, it complains that it
+        cannot find libcrtend.a?</li>
+
+    <li>How can I disable all optimizations when compiling code using the LLVM
+        GCC front end?</li>
+
+    <li><a href="#translatecxx">Can I use LLVM to convert C++ code to C
+        code?</a></li>
+
+    <li><a href="#platformindependent">Can I compile C or C++ code to
+        platform-independent LLVM bitcode?</a></li>
+  </ol>
+  </li>
+
+  <li><a href="#cfe_code">Questions about code generated by the GCC front-end</a>
+  <ol>
+     <li><a href="#iosinit">What is this <tt>llvm.global_ctors</tt> and
+          <tt>_GLOBAL__I__tmp_webcompile...</tt> stuff that happens when I
+          #include &lt;iostream&gt;?</a></li>
+
+     <li><a href="#codedce">Where did all of my code go??</a></li>
+
+     <li><a href="#undef">What is this "<tt>undef</tt>" thing that shows up in
+         my code?</a></li>
+         
+      <li><a href="#callconvwrong">Why does instcombine + simplifycfg turn
+   a call to a function with a mismatched calling convention into "unreachable"?
+   Why not make the verifier reject it?</a></li>
+  </ol>
+  </li>
+</ol>
+
+<div class="doc_author">
+  <p>Written by <a href="http://llvm.org">The LLVM Team</a></p>
+</div>
+
+
+<!-- *********************************************************************** -->
+<div class="doc_section">
+  <a name="license">License</a>
+</div>
+<!-- *********************************************************************** -->
+
+<div class="question">
+<p>Why are the LLVM source code and the front-end distributed under different
+   licenses?</p>
+</div>
+	
+<div class="answer">
+<p>The C/C++ front-ends are based on GCC and must be distributed under the GPL.
+   Our aim is to distribute LLVM source code under a <em>much less
+   restrictive</em> license, in particular one that does not compel users who
+   distribute tools based on modifying the source to redistribute the modified
+   source code as well.</p>
+</div>
+
+<div class="question">
+<p>Does the University of Illinois Open Source License really qualify as an
+   "open source" license?</p>
+</div>
+
+<div class="answer">
+<p>Yes, the license
+   is <a href="http://www.opensource.org/licenses/UoI-NCSA.php">certified</a> by
+   the Open Source Initiative (OSI).</p>
+</div>
+
+<div class="question">
+<p>Can I modify LLVM source code and redistribute the modified source?</p>
+</div>
+
+<div class="answer">
+<p>Yes.  The modified source distribution must retain the copyright notice and
+   follow the three bulletted conditions listed in
+   the <a href="http://llvm.org/svn/llvm-project/llvm/trunk/LICENSE.TXT">LLVM
+   license</a>.</p>
+</div>
+
+<div class="question">
+<p>Can I modify LLVM source code and redistribute binaries or other tools based
+   on it, without redistributing the source?</p>
+</div>
+
+<div class="answer">
+<p>Yes. This is why we distribute LLVM under a less restrictive license than
+   GPL, as explained in the first question above.</p>
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_section">
+  <a name="source">Source Code</a>
+</div>
+<!-- *********************************************************************** -->
+
+<div class="question">
+<p>In what language is LLVM written?</p>
+</div>
+
+<div class="answer">
+<p>All of the LLVM tools and libraries are written in C++ with extensive use of
+   the STL.</p>
+</div>
+
+<div class="question">
+<p>How portable is the LLVM source code?</p>
+</div>
+
+<div class="answer">
+<p>The LLVM source code should be portable to most modern UNIX-like operating
+systems.  Most of the code is written in standard C++ with operating system
+services abstracted to a support library.  The tools required to build and test
+LLVM have been ported to a plethora of platforms.</p>
+
+<p>Some porting problems may exist in the following areas:</p>
+
+<ul>
+  <li>The GCC front end code is not as portable as the LLVM suite, so it may not
+      compile as well on unsupported platforms.</li>
+
+  <li>The LLVM build system relies heavily on UNIX shell tools, like the Bourne
+      Shell and sed.  Porting to systems without these tools (MacOS 9, Plan 9)
+      will require more effort.</li>
+</ul>
+
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_section">
+  <a name="build">Build Problems</a>
+</div>
+<!-- *********************************************************************** -->
+
+<div class="question">
+<p>When I run configure, it finds the wrong C compiler.</p>
+</div>
+
+<div class="answer">
+<p>The <tt>configure</tt> script attempts to locate first <tt>gcc</tt> and then
+   <tt>cc</tt>, unless it finds compiler paths set in <tt>CC</tt>
+   and <tt>CXX</tt> for the C and C++ compiler, respectively.</p>
+
+<p>If <tt>configure</tt> finds the wrong compiler, either adjust your
+   <tt>PATH</tt> environment variable or set <tt>CC</tt> and <tt>CXX</tt>
+   explicitly.</p>
+
+</div>
+
+<div class="question">
+<p>The <tt>configure</tt> script finds the right C compiler, but it uses the
+   LLVM linker from a previous build.  What do I do?</p>
+</div>
+
+<div class="answer">
+<p>The <tt>configure</tt> script uses the <tt>PATH</tt> to find executables, so
+   if it's grabbing the wrong linker/assembler/etc, there are two ways to fix
+   it:</p>
+
+<ol>
+  <li><p>Adjust your <tt>PATH</tt> environment variable so that the correct
+      program appears first in the <tt>PATH</tt>.  This may work, but may not be
+      convenient when you want them <i>first</i> in your path for other
+      work.</p></li>
+
+  <li><p>Run <tt>configure</tt> with an alternative <tt>PATH</tt> that is
+      correct. In a Borne compatible shell, the syntax would be:</p>
+
+<pre class="doc_code">
+% PATH=[the path without the bad program] ./configure ...
+</pre>
+
+      <p>This is still somewhat inconvenient, but it allows <tt>configure</tt>
+         to do its work without having to adjust your <tt>PATH</tt>
+         permanently.</p></li>
+</ol>
+</div>
+
+<div class="question">
+<p>When creating a dynamic library, I get a strange GLIBC error.</p>
+</div>
+
+<div class="answer">
+<p>Under some operating systems (i.e. Linux), libtool does not work correctly if
+   GCC was compiled with the --disable-shared option.  To work around this,
+   install your own version of GCC that has shared libraries enabled by
+   default.</p>
+</div>
+
+<div class="question">
+<p>I've updated my source tree from Subversion, and now my build is trying to
+   use a file/directory that doesn't exist.</p>
+</div>
+
+<div class="answer">
+<p>You need to re-run configure in your object directory.  When new Makefiles
+   are added to the source tree, they have to be copied over to the object tree
+   in order to be used by the build.</p>
+</div>
+
+<div class="question">
+<p>I've modified a Makefile in my source tree, but my build tree keeps using the
+   old version.  What do I do?</p>
+</div>
+
+<div class="answer">
+<p>If the Makefile already exists in your object tree, you can just run the
+   following command in the top level directory of your object tree:</p>
+
+<pre class="doc_code">
+% ./config.status &lt;relative path to Makefile&gt;
+</pre>
+
+<p>If the Makefile is new, you will have to modify the configure script to copy
+   it over.</p>
+</div>
+
+<div class="question">
+<p>I've upgraded to a new version of LLVM, and I get strange build errors.</p>
+</div>
+
+<div class="answer">
+
+<p>Sometimes, changes to the LLVM source code alters how the build system works.
+   Changes in libtool, autoconf, or header file dependencies are especially
+   prone to this sort of problem.</p>
+
+<p>The best thing to try is to remove the old files and re-build.  In most
+   cases, this takes care of the problem.  To do this, just type <tt>make
+   clean</tt> and then <tt>make</tt> in the directory that fails to build.</p>
+</div>
+
+<div class="question">
+<p>I've built LLVM and am testing it, but the tests freeze.</p>
+</div>
+
+<div class="answer">
+<p>This is most likely occurring because you built a profile or release
+   (optimized) build of LLVM and have not specified the same information on the
+   <tt>gmake</tt> command line.</p>
+
+<p>For example, if you built LLVM with the command:</p>
+
+<pre class="doc_code">
+% gmake ENABLE_PROFILING=1
+</pre>
+
+<p>...then you must run the tests with the following commands:</p>
+
+<pre class="doc_code">
+% cd llvm/test
+% gmake ENABLE_PROFILING=1
+</pre>
+</div>
+
+<div class="question">
+<p>Why do test results differ when I perform different types of builds?</p>
+</div>
+
+<div class="answer">
+<p>The LLVM test suite is dependent upon several features of the LLVM tools and
+   libraries.</p>
+
+<p>First, the debugging assertions in code are not enabled in optimized or
+   profiling builds.  Hence, tests that used to fail may pass.</p>
+	
+<p>Second, some tests may rely upon debugging options or behavior that is only
+   available in the debug build.  These tests will fail in an optimized or
+   profile build.</p>
+</div>
+
+<div class="question">
+<p>Compiling LLVM with GCC 3.3.2 fails, what should I do?</p>
+</div>
+
+<div class="answer">
+<p>This is <a href="http://gcc.gnu.org/bugzilla/show_bug.cgi?id=13392">a bug in
+   GCC</a>, and affects projects other than LLVM.  Try upgrading or downgrading
+   your GCC.</p>
+</div>
+
+<div class="question">
+<p>Compiling LLVM with GCC succeeds, but the resulting tools do not work, what
+   can be wrong?</p>
+</div>
+
+<div class="answer">
+<p>Several versions of GCC have shown a weakness in miscompiling the LLVM
+   codebase. Please consult your compiler version (<tt>gcc --version</tt>) to
+   find out whether it is <a href="GettingStarted.html#brokengcc">broken</a>.
+   If so, your only option is to upgrade GCC to a known good version.</p>
+</div>
+
+<div class="question">
+<p>After Subversion update, rebuilding gives the error "No rule to make
+   target".</p>
+</div>
+
+<div class="answer">
+<p>If the error is of the form:</p>
+
+<pre class="doc_code">
+gmake[2]: *** No rule to make target `/path/to/somefile', needed by
+`/path/to/another/file.d'.<br>
+Stop.
+</pre>
+
+<p>This may occur anytime files are moved within the Subversion repository or
+   removed entirely.  In this case, the best solution is to erase all
+   <tt>.d</tt> files, which list dependencies for source files, and rebuild:</p>
+
+<pre class="doc_code">
+% cd $LLVM_OBJ_DIR
+% rm -f `find . -name \*\.d` 
+% gmake 
+</pre>
+
+<p>In other cases, it may be necessary to run <tt>make clean</tt> before
+   rebuilding.</p>
+</div>
+
+<div class="question">
+<p><a name="llvmc">The <tt>llvmc</tt> program gives me errors/doesn't
+   work.</a></p>
+</div>
+
+<div class="answer">
+<p><tt>llvmc</tt> is experimental and isn't really supported. We suggest
+   using <tt>llvm-gcc</tt> instead.</p>
+</div>
+
+<div class="question">
+<p><a name="srcdir-objdir">When I compile LLVM-GCC with srcdir == objdir, it
+   fails. Why?</a></p>
+</div>
+
+<div class="answer">
+<p>The <tt>GNUmakefile</tt> in the top-level directory of LLVM-GCC is a special
+   <tt>Makefile</tt> used by Apple to invoke the <tt>build_gcc</tt> script after
+   setting up a special environment. This has the unfortunate side-effect that
+   trying to build LLVM-GCC with srcdir == objdir in a "non-Apple way" invokes
+   the <tt>GNUmakefile</tt> instead of <tt>Makefile</tt>. Because the
+   environment isn't set up correctly to do this, the build fails.</p>
+
+<p>People not building LLVM-GCC the "Apple way" need to build LLVM-GCC with
+   srcdir != objdir, or simply remove the GNUmakefile entirely.</p>
+
+<p>We regret the inconvenience.</p>
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_section"><a name="felangs">Source Languages</a></div>
+
+<div class="question">
+<p><a name="langs">What source languages are supported?</a></p>
+</div>
+
+<div class="answer">
+<p>LLVM currently has full support for C and C++ source languages. These are
+   available through a special version of GCC that LLVM calls the
+   <a href="#cfe">C Front End</a></p>
+
+<p>There is an incomplete version of a Java front end available in the
+   <tt>java</tt> module. There is no documentation on this yet so you'll need to
+   download the code, compile it, and try it.</p>
+
+<p>The PyPy developers are working on integrating LLVM into the PyPy backend so
+   that PyPy language can translate to LLVM.</p>
+</div>
+
+<div class="question">
+<p><a name="langirgen">I'd like to write a self-hosting LLVM compiler. How
+   should I interface with the LLVM middle-end optimizers and back-end code
+   generators?</a></p>
+</div>
+
+<div class="answer">
+<p>Your compiler front-end will communicate with LLVM by creating a module in
+   the LLVM intermediate representation (IR) format. Assuming you want to write
+   your language's compiler in the language itself (rather than C++), there are
+   3 major ways to tackle generating LLVM IR from a front-end:</p>
+
+<ul>
+  <li><strong>Call into the LLVM libraries code using your language's FFI
+      (foreign function interface).</strong>
+
+    <ul>
+      <li><em>for:</em> best tracks changes to the LLVM IR, .ll syntax, and .bc
+          format</li>
+
+      <li><em>for:</em> enables running LLVM optimization passes without a
+          emit/parse overhead</li>
+
+      <li><em>for:</em> adapts well to a JIT context</li>
+
+      <li><em>against:</em> lots of ugly glue code to write</li>
+    </ul></li>
+
+  <li>  <strong>Emit LLVM assembly from your compiler's native language.</strong>
+    <ul>
+      <li><em>for:</em> very straightforward to get started</li>
+
+      <li><em>against:</em> the .ll parser is slower than the bitcode reader
+          when interfacing to the middle end</li>
+
+      <li><em>against:</em> you'll have to re-engineer the LLVM IR object model
+          and asm writer in your language</li>
+
+      <li><em>against:</em> it may be harder to track changes to the IR</li>
+    </ul></li>
+
+  <li><strong>Emit LLVM bitcode from your compiler's native language.</strong>
+
+    <ul>
+      <li><em>for:</em> can use the more-efficient bitcode reader when
+          interfacing to the middle end</li>
+
+      <li><em>against:</em> you'll have to re-engineer the LLVM IR object 
+          model and bitcode writer in your language</li>
+
+      <li><em>against:</em> it may be harder to track changes to the IR</li>
+    </ul></li>
+</ul>
+
+<p>If you go with the first option, the C bindings in include/llvm-c should help
+   a lot, since most languages have strong support for interfacing with C. The
+   most common hurdle with calling C from managed code is interfacing with the
+   garbage collector. The C interface was designed to require very little memory
+   management, and so is straightforward in this regard.</p>
+</div>
+
+<div class="question">
+<p><a name="langhlsupp">What support is there for a higher level source language
+   constructs for building a compiler?</a></p>
+</div>
+
+<div class="answer">
+<p>Currently, there isn't much. LLVM supports an intermediate representation
+   which is useful for code representation but will not support the high level
+   (abstract syntax tree) representation needed by most compilers. There are no
+   facilities for lexical nor semantic analysis. There is, however, a <i>mostly
+   implemented</i> configuration-driven
+   <a href="CompilerDriver.html">compiler driver</a> which simplifies the task
+   of running optimizations, linking, and executable generation.</p>
+</div>
+
+<div class="question">
+<p><a name="getelementptr">I don't understand the GetElementPtr
+   instruction. Help!</a></p>
+</div>
+
+<div class="answer">
+<p>See <a href="GetElementPtr.html">The Often Misunderstood GEP
+   Instruction</a>.</p>
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_section">
+  <a name="cfe">Using the GCC Front End</a>
+</div>
+
+<div class="question">
+<p>When I compile software that uses a configure script, the configure script
+   thinks my system has all of the header files and libraries it is testing for.
+   How do I get configure to work correctly?</p>
+</div>
+
+<div class="answer">
+<p>The configure script is getting things wrong because the LLVM linker allows
+   symbols to be undefined at link time (so that they can be resolved during JIT
+   or translation to the C back end).  That is why configure thinks your system
+   "has everything."</p>
+
+<p>To work around this, perform the following steps:</p>
+
+<ol>
+  <li>Make sure the CC and CXX environment variables contains the full path to
+      the LLVM GCC front end.</li>
+
+  <li>Make sure that the regular C compiler is first in your PATH. </li>
+
+  <li>Add the string "-Wl,-native" to your CFLAGS environment variable.</li>
+</ol>
+
+<p>This will allow the <tt>llvm-ld</tt> linker to create a native code
+   executable instead of shell script that runs the JIT.  Creating native code
+   requires standard linkage, which in turn will allow the configure script to
+   find out if code is not linking on your system because the feature isn't
+   available on your system.</p>
+</div>
+
+<div class="question">
+<p>When I compile code using the LLVM GCC front end, it complains that it cannot
+   find libcrtend.a.
+</p>
+</div>
+
+<div class="answer">
+<p>The only way this can happen is if you haven't installed the runtime
+   library. To correct this, do:</p>
+
+<pre class="doc_code">
+% cd llvm/runtime
+% make clean ; make install-bytecode
+</pre>
+</div>
+
+<div class="question">
+<p>How can I disable all optimizations when compiling code using the LLVM GCC
+   front end?</p>
+</div>
+
+<div class="answer">
+<p>Passing "-Wa,-disable-opt -Wl,-disable-opt" will disable *all* cleanup and
+   optimizations done at the llvm level, leaving you with the truly horrible
+   code that you desire.</p>
+</div>
+
+
+<div class="question">
+<p><a name="translatecxx">Can I use LLVM to convert C++ code to C code?</a></p>
+</div>
+
+<div class="answer">
+<p>Yes, you can use LLVM to convert code from any language LLVM supports to C.
+   Note that the generated C code will be very low level (all loops are lowered
+   to gotos, etc) and not very pretty (comments are stripped, original source
+   formatting is totally lost, variables are renamed, expressions are
+   regrouped), so this may not be what you're looking for. Also, there are
+   several limitations noted below.<p>
+
+<p>Use commands like this:</p>
+
+<ol>
+  <li><p>Compile your program with llvm-g++:</p>
+
+<pre class="doc_code">
+% llvm-g++ -emit-llvm x.cpp -o program.bc -c
+</pre>
+
+      <p>or:</p>
+
+<pre class="doc_code">
+% llvm-g++ a.cpp -c -emit-llvm
+% llvm-g++ b.cpp -c -emit-llvm
+% llvm-ld a.o b.o -o program
+</pre>
+
+   <p>This will generate program and program.bc.  The .bc
+      file is the LLVM version of the program all linked together.</p></li>
+
+  <li><p>Convert the LLVM code to C code, using the LLC tool with the C
+      backend:</p>
+
+<pre class="doc_code">
+% llc -march=c program.bc -o program.c
+</pre></li>
+
+  <li><p>Finally, compile the C file:</p>
+
+<pre class="doc_code">
+% cc x.c -lstdc++
+</pre></li>
+
+</ol>
+
+<p>Using LLVM does not eliminate the need for C++ library support.  If you use
+   the llvm-g++ front-end, the generated code will depend on g++'s C++ support
+   libraries in the same way that code generated from g++ would.  If you use
+   another C++ front-end, the generated code will depend on whatever library
+   that front-end would normally require.</p>
+
+<p>If you are working on a platform that does not provide any C++ libraries, you
+   may be able to manually compile libstdc++ to LLVM bitcode, statically link it
+   into your program, then use the commands above to convert the whole result
+   into C code.  Alternatively, you might compile the libraries and your
+   application into two different chunks of C code and link them.</p>
+
+<p>Note that, by default, the C back end does not support exception handling.
+   If you want/need it for a certain program, you can enable it by passing
+   "-enable-correct-eh-support" to the llc program.  The resultant code will use
+   setjmp/longjmp to implement exception support that is relatively slow, and
+   not C++-ABI-conforming on most platforms, but otherwise correct.</p>
+
+<p>Also, there are a number of other limitations of the C backend that cause it
+   to produce code that does not fully conform to the C++ ABI on most
+   platforms. Some of the C++ programs in LLVM's test suite are known to fail
+   when compiled with the C back end because of ABI incompatibilities with
+   standard C++ libraries.</p>
+</div>
+
+<div class="question">
+<p><a name="platformindependent">Can I compile C or C++ code to
+   platform-independent LLVM bitcode?</a></p>
+</div>
+
+<div class="answer">
+<p>No. C and C++ are inherently platform-dependent languages. The most obvious
+   example of this is the preprocessor. A very common way that C code is made
+   portable is by using the preprocessor to include platform-specific code. In
+   practice, information about other platforms is lost after preprocessing, so
+   the result is inherently dependent on the platform that the preprocessing was
+   targeting.</p>
+
+<p>Another example is <tt>sizeof</tt>. It's common for <tt>sizeof(long)</tt> to
+   vary between platforms. In most C front-ends, <tt>sizeof</tt> is expanded to
+   a constant immediately, thus hard-wiring a platform-specific detail.</p>
+
+<p>Also, since many platforms define their ABIs in terms of C, and since LLVM is
+   lower-level than C, front-ends currently must emit platform-specific IR in
+   order to have the result conform to the platform ABI.</p>
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_section">
+  <a name="cfe_code">Questions about code generated by the GCC front-end</a>
+</div>
+
+<div class="question">
+<p><a name="iosinit">What is this <tt>llvm.global_ctors</tt> and
+   <tt>_GLOBAL__I__tmp_webcompile...</tt> stuff that happens when I <tt>#include
+   &lt;iostream&gt;</tt>?</a></p>
+</div>
+
+<div class="answer">
+<p>If you <tt>#include</tt> the <tt>&lt;iostream&gt;</tt> header into a C++
+   translation unit, the file will probably use
+   the <tt>std::cin</tt>/<tt>std::cout</tt>/... global objects.  However, C++
+   does not guarantee an order of initialization between static objects in
+   different translation units, so if a static ctor/dtor in your .cpp file
+   used <tt>std::cout</tt>, for example, the object would not necessarily be
+   automatically initialized before your use.</p>
+
+<p>To make <tt>std::cout</tt> and friends work correctly in these scenarios, the
+   STL that we use declares a static object that gets created in every
+   translation unit that includes <tt>&lt;iostream&gt;</tt>.  This object has a
+   static constructor and destructor that initializes and destroys the global
+   iostream objects before they could possibly be used in the file.  The code
+   that you see in the .ll file corresponds to the constructor and destructor
+   registration code.
+</p>
+
+<p>If you would like to make it easier to <b>understand</b> the LLVM code
+   generated by the compiler in the demo page, consider using <tt>printf()</tt>
+   instead of <tt>iostream</tt>s to print values.</p>
+</div>
+
+<!--=========================================================================-->
+
+<div class="question">
+<p><a name="codedce">Where did all of my code go??</a></p>
+</div>
+
+<div class="answer">
+<p>If you are using the LLVM demo page, you may often wonder what happened to
+   all of the code that you typed in.  Remember that the demo script is running
+   the code through the LLVM optimizers, so if your code doesn't actually do
+   anything useful, it might all be deleted.</p>
+
+<p>To prevent this, make sure that the code is actually needed.  For example, if
+   you are computing some expression, return the value from the function instead
+   of leaving it in a local variable.  If you really want to constrain the
+   optimizer, you can read from and assign to <tt>volatile</tt> global
+   variables.</p>
+</div>
+
+<!--=========================================================================-->
+
+<div class="question">
+<p><a name="undef">What is this "<tt>undef</tt>" thing that shows up in my
+   code?</a></p>
+</div>
+
+<div class="answer">
+<p><a href="LangRef.html#undef"><tt>undef</tt></a> is the LLVM way of
+   representing a value that is not defined.  You can get these if you do not
+   initialize a variable before you use it.  For example, the C function:</p>
+
+<pre class="doc_code">
+int X() { int i; return i; }
+</pre>
+
+<p>Is compiled to "<tt>ret i32 undef</tt>" because "<tt>i</tt>" never has a
+   value specified for it.</p>
+</div>
+
+<!--=========================================================================-->
+
+<div class="question">
+<p><a name="callconvwrong">Why does instcombine + simplifycfg turn
+   a call to a function with a mismatched calling convention into "unreachable"?
+   Why not make the verifier reject it?</a></p>
+</div>
+
+<div class="answer">
+<p>This is a common problem run into by authors of front-ends that are using
+custom calling conventions: you need to make sure to set the right calling
+convention on both the function and on each call to the function.  For example,
+this code:</p>
+
+<pre class="doc_code">
+define fastcc void @foo() {
+        ret void
+}
+define void @bar() {
+        call void @foo()
+        ret void
+}
+</pre>
+
+<p>Is optimized to:</p>
+
+<pre class="doc_code">
+define fastcc void @foo() {
+	ret void
+}
+define void @bar() {
+	unreachable
+}
+</pre>
+
+<p>... with "opt -instcombine -simplifycfg".  This often bites people because
+"all their code disappears".  Setting the calling convention on the caller and
+callee is required for indirect calls to work, so people often ask why not make
+the verifier reject this sort of thing.</p>
+
+<p>The answer is that this code has undefined behavior, but it is not illegal.
+If we made it illegal, then every transformation that could potentially create
+this would have to ensure that it doesn't, and there is valid code that can
+create this sort of construct (in dead code).  The sorts of things that can
+cause this to happen are fairly contrived, but we still need to accept them.
+Here's an example:</p>
+
+<pre class="doc_code">
+define fastcc void @foo() {
+        ret void
+}
+define internal void @bar(void()* %FP, i1 %cond) {
+        br i1 %cond, label %T, label %F
+T:  
+        call void %FP()
+        ret void
+F:
+        call fastcc void %FP()
+        ret void
+}
+define void @test() {
+        %X = or i1 false, false
+        call void @bar(void()* @foo, i1 %X)
+        ret void
+} 
+</pre>
+
+<p>In this example, "test" always passes @foo/false into bar, which ensures that
+   it is dynamically called with the right calling conv (thus, the code is
+   perfectly well defined).  If you run this through the inliner, you get this
+   (the explicit "or" is there so that the inliner doesn't dead code eliminate
+   a bunch of stuff):
+</p>
+
+<pre class="doc_code">
+define fastcc void @foo() {
+	ret void
+}
+define void @test() {
+	%X = or i1 false, false
+	br i1 %X, label %T.i, label %F.i
+T.i:
+	call void @foo()
+	br label %bar.exit
+F.i:
+	call fastcc void @foo()
+	br label %bar.exit
+bar.exit:
+	ret void
+}
+</pre>
+
+<p>Here you can see that the inlining pass made an undefined call to @foo with
+  the wrong calling convention.  We really don't want to make the inliner have
+  to know about this sort of thing, so it needs to be valid code.  In this case,
+  dead code elimination can trivially remove the undefined code.  However, if %X
+  was an input argument to @test, the inliner would produce this:
+</p>
+
+<pre class="doc_code">
+define fastcc void @foo() {
+	ret void
+}
+
+define void @test(i1 %X) {
+	br i1 %X, label %T.i, label %F.i
+T.i:
+	call void @foo()
+	br label %bar.exit
+F.i:
+	call fastcc void @foo()
+	br label %bar.exit
+bar.exit:
+	ret void
+}
+</pre>
+
+<p>The interesting thing about this is that %X <em>must</em> be false for the
+code to be well-defined, but no amount of dead code elimination will be able to
+delete the broken call as unreachable.  However, since instcombine/simplifycfg
+turns the undefined call into unreachable, we end up with a branch on a
+condition that goes to unreachable: a branch to unreachable can never happen, so
+"-inline -instcombine -simplifycfg" is able to produce:</p>
+
+<pre class="doc_code">
+define fastcc void @foo() {
+	ret void
+}
+define void @test(i1 %X) {
+F.i:
+	call fastcc void @foo()
+	ret void
+}
+</pre>
+
+</div>
+
+<!-- *********************************************************************** -->
+
+<hr>
+<address>
+  <a href="http://jigsaw.w3.org/css-validator/check/referer"><img
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS"></a>
+  <a href="http://validator.w3.org/check/referer"><img
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01"></a>
+
+  <a href="http://llvm.org">LLVM Compiler Infrastructure</a><br>
+  Last modified: $Date: 2010-05-28 10:07:41 -0700 (Fri, 28 May 2010) $
+</address>
+
+</body>
+</html>

Added: www-releases/trunk/2.9/docs/GCCFEBuildInstrs.html
URL: http://llvm.org/viewvc/llvm-project/www-releases/trunk/2.9/docs/GCCFEBuildInstrs.html?rev=129058&view=auto
==============================================================================
--- www-releases/trunk/2.9/docs/GCCFEBuildInstrs.html (added)
+++ www-releases/trunk/2.9/docs/GCCFEBuildInstrs.html Thu Apr  7 00:46:10 2011
@@ -0,0 +1,279 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN"
+                      "http://www.w3.org/TR/html4/strict.dtd">
+<html>
+<head>
+  <meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
+  <link rel="stylesheet" href="llvm.css" type="text/css" media="screen">
+  <title>Building the LLVM GCC Front-End</title>
+</head>
+<body>
+
+<div class="doc_title">
+  Building the LLVM GCC Front-End
+</div>
+
+<ol>
+  <li><a href="#instructions">Building llvm-gcc from Source</a></li>
+  <li><a href="#ada">Building the Ada front-end</a></li>
+  <li><a href="#fortran">Building the Fortran front-end</a></li>
+  <li><a href="#license">License Information</a></li>
+</ol>
+
+<div class="doc_author">    
+  <p>Written by the LLVM Team</p>
+</div>
+
+<!-- *********************************************************************** -->
+<h1><a name="instructions">Building llvm-gcc from Source</a></h1>
+<!-- *********************************************************************** -->
+
+<div class="doc_text">
+
+<p>This section describes how to acquire and build llvm-gcc 4.2, which is based
+on the GCC 4.2.1 front-end.  Supported languages are Ada, C, C++, Fortran,
+Objective-C and Objective-C++.  Note that the instructions for building these
+front-ends are completely different (and much easier!) than those for building
+llvm-gcc3 in the past.</p>
+
+<ol>
+  <li><p>Retrieve the appropriate llvm-gcc-4.2-<i>version</i>.source.tar.gz
+         archive from the <a href="http://llvm.org/releases/">LLVM web
+         site</a>.</p>
+
+      <p>It is also possible to download the sources of the llvm-gcc front end
+         from a read-only mirror using subversion.  To check out the 4.2 code
+         for first time use:</p>
+
+<div class="doc_code">
+<pre>
+svn co http://llvm.org/svn/llvm-project/llvm-gcc-4.2/trunk <i>dst-directory</i>
+</pre>
+</div>
+
+      <p>After that, the code can be be updated in the destination directory
+         using:</p>
+
+<div class="doc_code">
+<pre>svn update</pre>
+</div>
+
+      <p>The mirror is brought up to date every evening.</p></li>
+
+  <li>Follow the directions in the top-level <tt>README.LLVM</tt> file for
+      up-to-date instructions on how to build llvm-gcc.  See below for building
+      with support for Ada or Fortran.
+</ol>
+
+</div>
+
+<!-- *********************************************************************** -->
+<h1><a name="ada">Building the Ada front-end</a></h1>
+<!-- *********************************************************************** -->
+
+<div class="doc_text">
+<p>Building with support for Ada amounts to following the directions in the
+top-level <tt>README.LLVM</tt> file, adding ",ada" to EXTRALANGS, for example:
+<tt>EXTRALANGS=,ada</tt></p>
+
+<p>There are some complications however:</p>
+
+<ol>
+  <li><p>The only platform for which the Ada front-end is known to build is
+      32 bit intel x86 running linux.  It is unlikely to build for other
+      systems without some work.</p></li>
+  <li><p>The build requires having a compiler that supports Ada, C and C++.
+      The Ada front-end is written in Ada so an Ada compiler is needed to
+      build it.  Compilers known to work with the
+      <a href="http://llvm.org/releases/download.html">LLVM 2.7 release</a>
+      are <a href="http://gcc.gnu.org/releases.html">gcc-4.2</a> and the
+      2005, 2006 and 2007 versions of the
+      <a href="http://libre.adacore.com/">GNAT GPL Edition</a>.
+      <b>GNAT GPL 2008, gcc-4.3 and later will not work</b>.
+      The LLVM parts of llvm-gcc are written in C++ so a C++ compiler is
+      needed to build them.  The rest of gcc is written in C.
+      Some linux distributions provide a version of gcc that supports all
+      three languages (the Ada part often comes as an add-on package to
+      the rest of gcc).  Otherwise it is possible to combine two versions
+      of gcc, one that supports Ada and C (such as the
+      <a href="http://libre.adacore.com/">2007 GNAT GPL Edition</a>)
+      and another which supports C++, see below.</p></li>
+  <li><p>Because the Ada front-end is experimental, it is wise to build the
+      compiler with checking enabled.  This causes it to run much slower, but
+      helps catch mistakes in the compiler (please report any problems using
+      <a href="http://llvm.org/bugs">LLVM bugzilla</a>).</p></li>
+  <li><p>The Ada front-end <a href="http://llvm.org/PR2007">fails to
+      bootstrap</a>, due to lack of LLVM support for
+      <tt>setjmp</tt>/<tt>longjmp</tt> style exception handling (used
+      internally by the compiler), so you must specify
+      <tt>--disable-bootstrap</tt>.</p></li>
+</ol>
+
+<p>Supposing appropriate compilers are available, llvm-gcc with Ada support can
+   be built on an x86-32 linux box using the following recipe:</p>
+
+<ol>
+  <li><p>Download the <a href="http://llvm.org/releases/download.html">LLVM source</a>
+      and unpack it:</p>
+
+<pre class="doc_code">
+wget http://llvm.org/releases/2.7/llvm-2.7.tgz
+tar xzf llvm-2.7.tgz
+mv llvm-2.7 llvm
+</pre>
+
+      <p>or <a href="GettingStarted.html#checkout">check out the
+      latest version from subversion</a>:</p>
+
+<pre class="doc_code">svn co http://llvm.org/svn/llvm-project/llvm/trunk llvm</pre>
+
+      </li>
+
+  <li><p>Download the
+      <a href="http://llvm.org/releases/download.html">llvm-gcc-4.2 source</a>
+      and unpack it:</p>
+
+<pre class="doc_code">
+wget http://llvm.org/releases/2.7/llvm-gcc-4.2-2.7.source.tgz
+tar xzf llvm-gcc-4.2-2.7.source.tgz
+mv llvm-gcc-4.2-2.7.source llvm-gcc-4.2
+</pre>
+
+      <p>or <a href="GettingStarted.html#checkout">check out the
+      latest version from subversion</a>:</p>
+
+<pre class="doc_code">
+svn co http://llvm.org/svn/llvm-project/llvm-gcc-4.2/trunk llvm-gcc-4.2
+</pre>
+      </li>
+
+  <li><p>Make a build directory <tt>llvm-objects</tt> for llvm and make it the
+      current directory:</p>
+
+<pre class="doc_code">
+mkdir llvm-objects
+cd llvm-objects
+</pre>
+      </li>
+
+  <li><p>Configure LLVM (here it is configured to install into <tt>/usr/local</tt>):</p>
+
+<pre class="doc_code">
+../llvm/configure --prefix=<b>/usr/local</b> --enable-optimized --enable-assertions
+</pre>
+
+      <p>If you have a multi-compiler setup and the C++ compiler is not the
+      default, then you can configure like this:</p>
+
+<pre class="doc_code">
+CXX=<b>PATH_TO_C++_COMPILER</b> ../llvm/configure --prefix=<b>/usr/local</b> --enable-optimized --enable-assertions
+</pre>
+
+      <p>To compile without checking (not recommended), replace
+      <tt>--enable-assertions</tt> with <tt>--disable-assertions</tt>.</p>
+
+      </li>
+
+  <li><p>Build LLVM:</p>
+
+<pre class="doc_code">
+make
+</pre>
+      </li>
+
+  <li><p>Install LLVM (optional):</p>
+
+<pre class="doc_code">
+make install
+</pre>
+      </li>
+
+  <li><p>Make a build directory <tt>llvm-gcc-4.2-objects</tt> for llvm-gcc and make it the
+      current directory:</p>
+
+<pre class="doc_code">
+cd ..
+mkdir llvm-gcc-4.2-objects
+cd llvm-gcc-4.2-objects
+</pre>
+      </li>
+
+  <li><p>Configure llvm-gcc (here it is configured to install into <tt>/usr/local</tt>).
+      The <tt>--enable-checking</tt> flag turns on sanity checks inside the compiler.
+      To turn off these checks (not recommended), replace <tt>--enable-checking</tt>
+      with <tt>--disable-checking</tt>.
+      Additional languages can be appended to the <tt>--enable-languages</tt> switch,
+      for example <tt>--enable-languages=ada,c,c++</tt>.</p>
+
+<pre class="doc_code">
+../llvm-gcc-4.2/configure --prefix=<b>/usr/local</b> --enable-languages=ada,c \
+                          --enable-checking --enable-llvm=$PWD/../llvm-objects \
+			  --disable-bootstrap --disable-multilib
+</pre>
+
+      <p>If you have a multi-compiler setup, then you can configure like this:</p>
+
+<pre class="doc_code">
+export CC=<b>PATH_TO_C_AND_ADA_COMPILER</b>
+export CXX=<b>PATH_TO_C++_COMPILER</b>
+../llvm-gcc-4.2/configure --prefix=<b>/usr/local</b> --enable-languages=ada,c \
+                          --enable-checking --enable-llvm=$PWD/../llvm-objects \
+			  --disable-bootstrap --disable-multilib
+</pre>
+      </li>
+
+  <li><p>Build and install the compiler:</p>
+
+<pre class="doc_code">
+make
+make install
+</pre>
+      </li>
+</ol>
+
+</div>
+
+<!-- *********************************************************************** -->
+<h1><a name="fortran">Building the Fortran front-end</a></h1>
+<!-- *********************************************************************** -->
+
+<div class="doc_text">
+<p>To build with support for Fortran, follow the directions in the top-level
+<tt>README.LLVM</tt> file, adding ",fortran" to EXTRALANGS, for example:</p>
+
+<pre class="doc_code">
+EXTRALANGS=,fortran
+</pre>
+
+</div>
+
+<!-- *********************************************************************** -->
+<h1><a name="license">License Information</a></h1>
+<!-- *********************************************************************** -->
+
+<div class="doc_text">
+<p>
+The LLVM GCC frontend is licensed to you under the GNU General Public License
+and the GNU Lesser General Public License.  Please see the files COPYING and
+COPYING.LIB for more details.
+</p>
+
+<p>
+More information is <a href="FAQ.html#license">available in the FAQ</a>.
+</p>
+</div>
+
+<!-- *********************************************************************** -->
+
+<hr>
+<address>
+  <a href="http://jigsaw.w3.org/css-validator/check/referer"><img
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS"></a>
+  <a href="http://validator.w3.org/check/referer"><img
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01"></a>
+
+  <a href="http://llvm.org">LLVM Compiler Infrastructure</a><br>
+  Last modified: $Date: 2010-08-31 12:40:21 -0700 (Tue, 31 Aug 2010) $
+</address>
+
+</body>
+</html>

Added: www-releases/trunk/2.9/docs/GarbageCollection.html
URL: http://llvm.org/viewvc/llvm-project/www-releases/trunk/2.9/docs/GarbageCollection.html?rev=129058&view=auto
==============================================================================
--- www-releases/trunk/2.9/docs/GarbageCollection.html (added)
+++ www-releases/trunk/2.9/docs/GarbageCollection.html Thu Apr  7 00:46:10 2011
@@ -0,0 +1,1387 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN"
+                      "http://www.w3.org/TR/html4/strict.dtd">
+<html>
+<head>
+  <meta http-equiv="Content-Type" Content="text/html; charset=UTF-8" >
+  <title>Accurate Garbage Collection with LLVM</title>
+  <link rel="stylesheet" href="llvm.css" type="text/css">
+  <style type="text/css">
+    .rowhead { text-align: left; background: inherit; }
+    .indent { padding-left: 1em; }
+    .optl { color: #BFBFBF; }
+  </style>
+</head>
+<body>
+
+<div class="doc_title">
+  Accurate Garbage Collection with LLVM
+</div>
+
+<ol>
+  <li><a href="#introduction">Introduction</a>
+    <ul>
+    <li><a href="#feature">Goals and non-goals</a></li>
+    </ul>
+  </li>
+
+  <li><a href="#quickstart">Getting started</a>
+    <ul>
+    <li><a href="#quickstart-compiler">In your compiler</a></li>
+    <li><a href="#quickstart-runtime">In your runtime library</a></li>
+    <li><a href="#shadow-stack">About the shadow stack</a></li>
+    </ul>
+  </li>
+
+  <li><a href="#core">Core support</a>
+    <ul>
+    <li><a href="#gcattr">Specifying GC code generation:
+      <tt>gc "..."</tt></a></li>
+    <li><a href="#gcroot">Identifying GC roots on the stack:
+      <tt>llvm.gcroot</tt></a></li>
+    <li><a href="#barriers">Reading and writing references in the heap</a>
+      <ul>
+      <li><a href="#gcwrite">Write barrier: <tt>llvm.gcwrite</tt></a></li>
+      <li><a href="#gcread">Read barrier: <tt>llvm.gcread</tt></a></li>
+      </ul>
+    </li>
+    </ul>
+  </li>
+  
+  <li><a href="#plugin">Compiler plugin interface</a>
+    <ul>
+    <li><a href="#collector-algos">Overview of available features</a></li>
+    <li><a href="#stack-map">Computing stack maps</a></li>
+    <li><a href="#init-roots">Initializing roots to null:
+      <tt>InitRoots</tt></a></li>
+    <li><a href="#custom">Custom lowering of intrinsics: <tt>CustomRoots</tt>, 
+      <tt>CustomReadBarriers</tt>, and <tt>CustomWriteBarriers</tt></a></li>
+    <li><a href="#safe-points">Generating safe points:
+      <tt>NeededSafePoints</tt></a></li>
+    <li><a href="#assembly">Emitting assembly code:
+      <tt>GCMetadataPrinter</tt></a></li>
+    </ul>
+  </li>
+
+  <li><a href="#runtime-impl">Implementing a collector runtime</a>
+    <ul>
+      <li><a href="#gcdescriptors">Tracing GC pointers from heap
+      objects</a></li>
+    </ul>
+  </li>
+  
+  <li><a href="#references">References</a></li>
+  
+</ol>
+
+<div class="doc_author">
+  <p>Written by <a href="mailto:sabre at nondot.org">Chris Lattner</a> and
+     Gordon Henriksen</p>
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_section">
+  <a name="introduction">Introduction</a>
+</div>
+<!-- *********************************************************************** -->
+
+<div class="doc_text">
+
+<p>Garbage collection is a widely used technique that frees the programmer from
+having to know the lifetimes of heap objects, making software easier to produce
+and maintain. Many programming languages rely on garbage collection for
+automatic memory management. There are two primary forms of garbage collection:
+conservative and accurate.</p>
+
+<p>Conservative garbage collection often does not require any special support
+from either the language or the compiler: it can handle non-type-safe
+programming languages (such as C/C++) and does not require any special
+information from the compiler. The
+<a href="http://www.hpl.hp.com/personal/Hans_Boehm/gc/">Boehm collector</a> is
+an example of a state-of-the-art conservative collector.</p>
+
+<p>Accurate garbage collection requires the ability to identify all pointers in
+the program at run-time (which requires that the source-language be type-safe in
+most cases). Identifying pointers at run-time requires compiler support to
+locate all places that hold live pointer variables at run-time, including the
+<a href="#gcroot">processor stack and registers</a>.</p>
+
+<p>Conservative garbage collection is attractive because it does not require any
+special compiler support, but it does have problems. In particular, because the
+conservative garbage collector cannot <i>know</i> that a particular word in the
+machine is a pointer, it cannot move live objects in the heap (preventing the
+use of compacting and generational GC algorithms) and it can occasionally suffer
+from memory leaks due to integer values that happen to point to objects in the
+program. In addition, some aggressive compiler transformations can break
+conservative garbage collectors (though these seem rare in practice).</p>
+
+<p>Accurate garbage collectors do not suffer from any of these problems, but
+they can suffer from degraded scalar optimization of the program. In particular,
+because the runtime must be able to identify and update all pointers active in
+the program, some optimizations are less effective. In practice, however, the
+locality and performance benefits of using aggressive garbage collection
+techniques dominates any low-level losses.</p>
+
+<p>This document describes the mechanisms and interfaces provided by LLVM to
+support accurate garbage collection.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="feature">Goals and non-goals</a>
+</div>
+
+<div class="doc_text">
+
+<p>LLVM's intermediate representation provides <a href="#intrinsics">garbage
+collection intrinsics</a> that offer support for a broad class of
+collector models. For instance, the intrinsics permit:</p>
+
+<ul>
+  <li>semi-space collectors</li>
+  <li>mark-sweep collectors</li>
+  <li>generational collectors</li>
+  <li>reference counting</li>
+  <li>incremental collectors</li>
+  <li>concurrent collectors</li>
+  <li>cooperative collectors</li>
+</ul>
+
+<p>We hope that the primitive support built into the LLVM IR is sufficient to
+support a broad class of garbage collected languages including Scheme, ML, Java,
+C#, Perl, Python, Lua, Ruby, other scripting languages, and more.</p>
+
+<p>However, LLVM does not itself provide a garbage collector&#151;this should
+be part of your language's runtime library. LLVM provides a framework for
+compile time <a href="#plugin">code generation plugins</a>. The role of these
+plugins is to generate code and data structures which conforms to the <em>binary
+interface</em> specified by the <em>runtime library</em>. This is similar to the
+relationship between LLVM and DWARF debugging info, for example. The
+difference primarily lies in the lack of an established standard in the domain
+of garbage collection&#151;thus the plugins.</p>
+
+<p>The aspects of the binary interface with which LLVM's GC support is
+concerned are:</p>
+
+<ul>
+  <li>Creation of GC-safe points within code where collection is allowed to
+      execute safely.</li>
+  <li>Computation of the stack map. For each safe point in the code, object
+      references within the stack frame must be identified so that the
+      collector may traverse and perhaps update them.</li>
+  <li>Write barriers when storing object references to the heap. These are
+      commonly used to optimize incremental scans in generational
+      collectors.</li>
+  <li>Emission of read barriers when loading object references. These are
+      useful for interoperating with concurrent collectors.</li>
+</ul>
+
+<p>There are additional areas that LLVM does not directly address:</p>
+
+<ul>
+  <li>Registration of global roots with the runtime.</li>
+  <li>Registration of stack map entries with the runtime.</li>
+  <li>The functions used by the program to allocate memory, trigger a
+      collection, etc.</li>
+  <li>Computation or compilation of type maps, or registration of them with
+      the runtime. These are used to crawl the heap for object
+      references.</li>
+</ul>
+
+<p>In general, LLVM's support for GC does not include features which can be
+adequately addressed with other features of the IR and does not specify a
+particular binary interface. On the plus side, this means that you should be
+able to integrate LLVM with an existing runtime. On the other hand, it leaves
+a lot of work for the developer of a novel language. However, it's easy to get
+started quickly and scale up to a more sophisticated implementation as your
+compiler matures.</p>
+
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_section">
+  <a name="quickstart">Getting started</a>
+</div>
+<!-- *********************************************************************** -->
+
+<div class="doc_text">
+
+<p>Using a GC with LLVM implies many things, for example:</p>
+
+<ul>
+  <li>Write a runtime library or find an existing one which implements a GC
+      heap.<ol>
+    <li>Implement a memory allocator.</li>
+    <li>Design a binary interface for the stack map, used to identify
+        references within a stack frame on the machine stack.*</li>
+    <li>Implement a stack crawler to discover functions on the call stack.*</li>
+    <li>Implement a registry for global roots.</li>
+    <li>Design a binary interface for type maps, used to identify references
+        within heap objects.</li>
+    <li>Implement a collection routine bringing together all of the above.</li>
+  </ol></li>
+  <li>Emit compatible code from your compiler.<ul>
+    <li>Initialization in the main function.</li>
+    <li>Use the <tt>gc "..."</tt> attribute to enable GC code generation
+        (or <tt>F.setGC("...")</tt>).</li>
+    <li>Use <tt>@llvm.gcroot</tt> to mark stack roots.</li>
+    <li>Use <tt>@llvm.gcread</tt> and/or <tt>@llvm.gcwrite</tt> to
+        manipulate GC references, if necessary.</li>
+    <li>Allocate memory using the GC allocation routine provided by the
+        runtime library.</li>
+    <li>Generate type maps according to your runtime's binary interface.</li>
+  </ul></li>
+  <li>Write a compiler plugin to interface LLVM with the runtime library.*<ul>
+    <li>Lower <tt>@llvm.gcread</tt> and <tt>@llvm.gcwrite</tt> to appropriate
+        code sequences.*</li>
+    <li>Compile LLVM's stack map to the binary form expected by the
+        runtime.</li>
+  </ul></li>
+  <li>Load the plugin into the compiler. Use <tt>llc -load</tt> or link the
+      plugin statically with your language's compiler.*</li>
+  <li>Link program executables with the runtime.</li>
+</ul>
+
+<p>To help with several of these tasks (those indicated with a *), LLVM
+includes a highly portable, built-in ShadowStack code generator. It is compiled
+into <tt>llc</tt> and works even with the interpreter and C backends.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="quickstart-compiler">In your compiler</a>
+</div>
+
+<div class="doc_text">
+
+<p>To turn the shadow stack on for your functions, first call:</p>
+
+<div class="doc_code"><pre
+>F.setGC("shadow-stack");</pre></div>
+
+<p>for each function your compiler emits. Since the shadow stack is built into
+LLVM, you do not need to load a plugin.</p>
+
+<p>Your compiler must also use <tt>@llvm.gcroot</tt> as documented.
+Don't forget to create a root for each intermediate value that is generated
+when evaluating an expression. In <tt>h(f(), g())</tt>, the result of
+<tt>f()</tt> could easily be collected if evaluating <tt>g()</tt> triggers a
+collection.</p>
+
+<p>There's no need to use <tt>@llvm.gcread</tt> and <tt>@llvm.gcwrite</tt> over
+plain <tt>load</tt> and <tt>store</tt> for now. You will need them when
+switching to a more advanced GC.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="quickstart-runtime">In your runtime</a>
+</div>
+
+<div class="doc_text">
+
+<p>The shadow stack doesn't imply a memory allocation algorithm. A semispace
+collector or building atop <tt>malloc</tt> are great places to start, and can
+be implemented with very little code.</p>
+
+<p>When it comes time to collect, however, your runtime needs to traverse the
+stack roots, and for this it needs to integrate with the shadow stack. Luckily,
+doing so is very simple. (This code is heavily commented to help you
+understand the data structure, but there are only 20 lines of meaningful
+code.)</p>
+
+</div>
+
+<div class="doc_code"><pre
+>/// @brief The map for a single function's stack frame. One of these is
+///        compiled as constant data into the executable for each function.
+/// 
+/// Storage of metadata values is elided if the %metadata parameter to
+/// @llvm.gcroot is null.
+struct FrameMap {
+  int32_t NumRoots;    //&lt; Number of roots in stack frame.
+  int32_t NumMeta;     //&lt; Number of metadata entries. May be &lt; NumRoots.
+  const void *Meta[0]; //&lt; Metadata for each root.
+};
+
+/// @brief A link in the dynamic shadow stack. One of these is embedded in the
+///        stack frame of each function on the call stack.
+struct StackEntry {
+  StackEntry *Next;    //&lt; Link to next stack entry (the caller's).
+  const FrameMap *Map; //&lt; Pointer to constant FrameMap.
+  void *Roots[0];      //&lt; Stack roots (in-place array).
+};
+
+/// @brief The head of the singly-linked list of StackEntries. Functions push
+///        and pop onto this in their prologue and epilogue.
+/// 
+/// Since there is only a global list, this technique is not threadsafe.
+StackEntry *llvm_gc_root_chain;
+
+/// @brief Calls Visitor(root, meta) for each GC root on the stack.
+///        root and meta are exactly the values passed to
+///        <tt>@llvm.gcroot</tt>.
+/// 
+/// Visitor could be a function to recursively mark live objects. Or it
+/// might copy them to another heap or generation.
+/// 
+/// @param Visitor A function to invoke for every GC root on the stack.
+void visitGCRoots(void (*Visitor)(void **Root, const void *Meta)) {
+  for (StackEntry *R = llvm_gc_root_chain; R; R = R->Next) {
+    unsigned i = 0;
+    
+    // For roots [0, NumMeta), the metadata pointer is in the FrameMap.
+    for (unsigned e = R->Map->NumMeta; i != e; ++i)
+      Visitor(&amp;R->Roots[i], R->Map->Meta[i]);
+    
+    // For roots [NumMeta, NumRoots), the metadata pointer is null.
+    for (unsigned e = R->Map->NumRoots; i != e; ++i)
+      Visitor(&amp;R->Roots[i], NULL);
+  }
+}</pre></div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="shadow-stack">About the shadow stack</a>
+</div>
+
+<div class="doc_text">
+
+<p>Unlike many GC algorithms which rely on a cooperative code generator to
+compile stack maps, this algorithm carefully maintains a linked list of stack
+roots [<a href="#henderson02">Henderson2002</a>]. This so-called "shadow stack"
+mirrors the machine stack. Maintaining this data structure is slower than using
+a stack map compiled into the executable as constant data, but has a significant
+portability advantage because it requires no special support from the target
+code generator, and does not require tricky platform-specific code to crawl
+the machine stack.</p>
+
+<p>The tradeoff for this simplicity and portability is:</p>
+
+<ul>
+  <li>High overhead per function call.</li>
+  <li>Not thread-safe.</li>
+</ul>
+
+<p>Still, it's an easy way to get started. After your compiler and runtime are
+up and running, writing a <a href="#plugin">plugin</a> will allow you to take
+advantage of <a href="#collector-algos">more advanced GC features</a> of LLVM
+in order to improve performance.</p>
+
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_section">
+  <a name="core">IR features</a><a name="intrinsics"></a>
+</div>
+<!-- *********************************************************************** -->
+
+<div class="doc_text">
+
+<p>This section describes the garbage collection facilities provided by the
+<a href="LangRef.html">LLVM intermediate representation</a>. The exact behavior
+of these IR features is specified by the binary interface implemented by a
+<a href="#plugin">code generation plugin</a>, not by this document.</p>
+
+<p>These facilities are limited to those strictly necessary; they are not
+intended to be a complete interface to any garbage collector. A program will
+need to interface with the GC library using the facilities provided by that
+program.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="gcattr">Specifying GC code generation: <tt>gc "..."</tt></a>
+</div>
+
+<div class="doc_code"><tt>
+  define <i>ty</i> @<i>name</i>(...) <span style="text-decoration: underline">gc "<i>name</i>"</span> { ...
+</tt></div>
+
+<div class="doc_text">
+
+<p>The <tt>gc</tt> function attribute is used to specify the desired GC style
+to the compiler. Its programmatic equivalent is the <tt>setGC</tt> method of
+<tt>Function</tt>.</p>
+
+<p>Setting <tt>gc "<i>name</i>"</tt> on a function triggers a search for a
+matching code generation plugin "<i>name</i>"; it is that plugin which defines
+the exact nature of the code generated to support GC. If none is found, the
+compiler will raise an error.</p>
+
+<p>Specifying the GC style on a per-function basis allows LLVM to link together
+programs that use different garbage collection algorithms (or none at all).</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="gcroot">Identifying GC roots on the stack: <tt>llvm.gcroot</tt></a>
+</div>
+
+<div class="doc_code"><tt>
+  void @llvm.gcroot(i8** %ptrloc, i8* %metadata)
+</tt></div>
+
+<div class="doc_text">
+
+<p>The <tt>llvm.gcroot</tt> intrinsic is used to inform LLVM that a stack
+variable references an object on the heap and is to be tracked for garbage
+collection. The exact impact on generated code is specified by a <a
+href="#plugin">compiler plugin</a>.</p>
+
+<p>A compiler which uses mem2reg to raise imperative code using <tt>alloca</tt>
+into SSA form need only add a call to <tt>@llvm.gcroot</tt> for those variables
+which a pointers into the GC heap.</p>
+
+<p>It is also important to mark intermediate values with <tt>llvm.gcroot</tt>.
+For example, consider <tt>h(f(), g())</tt>. Beware leaking the result of
+<tt>f()</tt> in the case that <tt>g()</tt> triggers a collection.</p>
+
+<p>The first argument <b>must</b> be a value referring to an alloca instruction
+or a bitcast of an alloca. The second contains a pointer to metadata that
+should be associated with the pointer, and <b>must</b> be a constant or global
+value address. If your target collector uses tags, use a null pointer for
+metadata.</p>
+
+<p>The <tt>%metadata</tt> argument can be used to avoid requiring heap objects
+to have 'isa' pointers or tag bits. [<a href="#appel89">Appel89</a>, <a
+href="#goldberg91">Goldberg91</a>, <a href="#tolmach94">Tolmach94</a>] If
+specified, its value will be tracked along with the location of the pointer in
+the stack frame.</p>
+
+<p>Consider the following fragment of Java code:</p>
+
+<pre>
+       {
+         Object X;   // A null-initialized reference to an object
+         ...
+       }
+</pre>
+
+<p>This block (which may be located in the middle of a function or in a loop
+nest), could be compiled to this LLVM code:</p>
+
+<pre>
+Entry:
+   ;; In the entry block for the function, allocate the
+   ;; stack space for X, which is an LLVM pointer.
+   %X = alloca %Object*
+   
+   ;; Tell LLVM that the stack space is a stack root.
+   ;; Java has type-tags on objects, so we pass null as metadata.
+   %tmp = bitcast %Object** %X to i8**
+   call void @llvm.gcroot(i8** %X, i8* null)
+   ...
+
+   ;; "CodeBlock" is the block corresponding to the start
+   ;;  of the scope above.
+CodeBlock:
+   ;; Java null-initializes pointers.
+   store %Object* null, %Object** %X
+
+   ...
+
+   ;; As the pointer goes out of scope, store a null value into
+   ;; it, to indicate that the value is no longer live.
+   store %Object* null, %Object** %X
+   ...
+</pre>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="barriers">Reading and writing references in the heap</a>
+</div>
+
+<div class="doc_text">
+
+<p>Some collectors need to be informed when the mutator (the program that needs
+garbage collection) either reads a pointer from or writes a pointer to a field
+of a heap object. The code fragments inserted at these points are called
+<em>read barriers</em> and <em>write barriers</em>, respectively. The amount of
+code that needs to be executed is usually quite small and not on the critical
+path of any computation, so the overall performance impact of the barrier is
+tolerable.</p>
+
+<p>Barriers often require access to the <em>object pointer</em> rather than the
+<em>derived pointer</em> (which is a pointer to the field within the
+object). Accordingly, these intrinsics take both pointers as separate arguments
+for completeness. In this snippet, <tt>%object</tt> is the object pointer, and 
+<tt>%derived</tt> is the derived pointer:</p>
+
+<blockquote><pre>
+    ;; An array type.
+    %class.Array = type { %class.Object, i32, [0 x %class.Object*] }
+    ...
+
+    ;; Load the object pointer from a gcroot.
+    %object = load %class.Array** %object_addr
+
+    ;; Compute the derived pointer.
+    %derived = getelementptr %object, i32 0, i32 2, i32 %n</pre></blockquote>
+
+<p>LLVM does not enforce this relationship between the object and derived
+pointer (although a <a href="#plugin">plugin</a> might). However, it would be
+an unusual collector that violated it.</p>
+
+<p>The use of these intrinsics is naturally optional if the target GC does
+require the corresponding barrier. Such a GC plugin will replace the intrinsic
+calls with the corresponding <tt>load</tt> or <tt>store</tt> instruction if they
+are used.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsubsection">
+  <a name="gcwrite">Write barrier: <tt>llvm.gcwrite</tt></a>
+</div>
+
+<div class="doc_code"><tt>
+void @llvm.gcwrite(i8* %value, i8* %object, i8** %derived)
+</tt></div>
+
+<div class="doc_text">
+
+<p>For write barriers, LLVM provides the <tt>llvm.gcwrite</tt> intrinsic
+function. It has exactly the same semantics as a non-volatile <tt>store</tt> to
+the derived pointer (the third argument). The exact code generated is specified
+by a <a href="#plugin">compiler plugin</a>.</p>
+
+<p>Many important algorithms require write barriers, including generational
+and concurrent collectors. Additionally, write barriers could be used to
+implement reference counting.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsubsection">
+  <a name="gcread">Read barrier: <tt>llvm.gcread</tt></a>
+</div>
+
+<div class="doc_code"><tt>
+i8* @llvm.gcread(i8* %object, i8** %derived)<br>
+</tt></div>
+
+<div class="doc_text">
+
+<p>For read barriers, LLVM provides the <tt>llvm.gcread</tt> intrinsic function.
+It has exactly the same semantics as a non-volatile <tt>load</tt> from the
+derived pointer (the second argument). The exact code generated is specified by
+a <a href="#plugin">compiler plugin</a>.</p>
+
+<p>Read barriers are needed by fewer algorithms than write barriers, and may
+have a greater performance impact since pointer reads are more frequent than
+writes.</p>
+
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_section">
+  <a name="plugin">Implementing a collector plugin</a>
+</div>
+<!-- *********************************************************************** -->
+
+<div class="doc_text">
+
+<p>User code specifies which GC code generation to use with the <tt>gc</tt>
+function attribute or, equivalently, with the <tt>setGC</tt> method of
+<tt>Function</tt>.</p>
+
+<p>To implement a GC plugin, it is necessary to subclass
+<tt>llvm::GCStrategy</tt>, which can be accomplished in a few lines of
+boilerplate code. LLVM's infrastructure provides access to several important
+algorithms. For an uncontroversial collector, all that remains may be to
+compile LLVM's computed stack map to assembly code (using the binary
+representation expected by the runtime library). This can be accomplished in
+about 100 lines of code.</p>
+
+<p>This is not the appropriate place to implement a garbage collected heap or a
+garbage collector itself. That code should exist in the language's runtime
+library. The compiler plugin is responsible for generating code which
+conforms to the binary interface defined by library, most essentially the
+<a href="#stack-map">stack map</a>.</p>
+
+<p>To subclass <tt>llvm::GCStrategy</tt> and register it with the compiler:</p>
+
+<blockquote><pre>// lib/MyGC/MyGC.cpp - Example LLVM GC plugin
+
+#include "llvm/CodeGen/GCStrategy.h"
+#include "llvm/CodeGen/GCMetadata.h"
+#include "llvm/Support/Compiler.h"
+
+using namespace llvm;
+
+namespace {
+  class LLVM_LIBRARY_VISIBILITY MyGC : public GCStrategy {
+  public:
+    MyGC() {}
+  };
+  
+  GCRegistry::Add&lt;MyGC&gt;
+  X("mygc", "My bespoke garbage collector.");
+}</pre></blockquote>
+
+<p>This boilerplate collector does nothing. More specifically:</p>
+
+<ul>
+  <li><tt>llvm.gcread</tt> calls are replaced with the corresponding
+      <tt>load</tt> instruction.</li>
+  <li><tt>llvm.gcwrite</tt> calls are replaced with the corresponding
+      <tt>store</tt> instruction.</li>
+  <li>No safe points are added to the code.</li>
+  <li>The stack map is not compiled into the executable.</li>
+</ul>
+
+<p>Using the LLVM makefiles (like the <a
+href="http://llvm.org/viewvc/llvm-project/llvm/trunk/projects/sample/">sample
+project</a>), this code can be compiled as a plugin using a simple
+makefile:</p>
+
+<blockquote><pre
+># lib/MyGC/Makefile
+
+LEVEL := ../..
+LIBRARYNAME = <var>MyGC</var>
+LOADABLE_MODULE = 1
+
+include $(LEVEL)/Makefile.common</pre></blockquote>
+
+<p>Once the plugin is compiled, code using it may be compiled using <tt>llc
+-load=<var>MyGC.so</var></tt> (though <var>MyGC.so</var> may have some other
+platform-specific extension):</p>
+
+<blockquote><pre
+>$ cat sample.ll
+define void @f() gc "mygc" {
+entry:
+        ret void
+}
+$ llvm-as &lt; sample.ll | llc -load=MyGC.so</pre></blockquote>
+
+<p>It is also possible to statically link the collector plugin into tools, such
+as a language-specific compiler front-end.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="collector-algos">Overview of available features</a>
+</div>
+
+<div class="doc_text">
+
+<p><tt>GCStrategy</tt> provides a range of features through which a plugin
+may do useful work. Some of these are callbacks, some are algorithms that can
+be enabled, disabled, or customized. This matrix summarizes the supported (and
+planned) features and correlates them with the collection techniques which
+typically require them.</p>
+
+<table>
+  <tr>
+    <th>Algorithm</th>
+    <th>Done</th>
+    <th>shadow stack</th>
+    <th>refcount</th>
+    <th>mark-sweep</th>
+    <th>copying</th>
+    <th>incremental</th>
+    <th>threaded</th>
+    <th>concurrent</th>
+  </tr>
+  <tr>
+    <th class="rowhead"><a href="#stack-map">stack map</a></th>
+    <td>&#10004;</td>
+    <td></td>
+    <td></td>
+    <td>&#10008;</td>
+    <td>&#10008;</td>
+    <td>&#10008;</td>
+    <td>&#10008;</td>
+    <td>&#10008;</td>
+  </tr>
+  <tr>
+    <th class="rowhead"><a href="#init-roots">initialize roots</a></th>
+    <td>&#10004;</td>
+    <td>&#10008;</td>
+    <td>&#10008;</td>
+    <td>&#10008;</td>
+    <td>&#10008;</td>
+    <td>&#10008;</td>
+    <td>&#10008;</td>
+    <td>&#10008;</td>
+  </tr>
+  <tr class="doc_warning">
+    <th class="rowhead">derived pointers</th>
+    <td>NO</td>
+    <td></td>
+    <td></td>
+    <td></td>
+    <td></td>
+    <td></td>
+    <td>&#10008;*</td>
+    <td>&#10008;*</td>
+  </tr>
+  <tr>
+    <th class="rowhead"><em><a href="#custom">custom lowering</a></em></th>
+    <td>&#10004;</td>
+    <th></th>
+    <th></th>
+    <th></th>
+    <th></th>
+    <th></th>
+    <th></th>
+    <th></th>
+  </tr>
+  <tr>
+    <th class="rowhead indent">gcroot</th>
+    <td>&#10004;</td>
+    <td>&#10008;</td>
+    <td>&#10008;</td>
+    <td></td>
+    <td></td>
+    <td></td>
+    <td></td>
+    <td></td>
+  </tr>
+  <tr>
+    <th class="rowhead indent">gcwrite</th>
+    <td>&#10004;</td>
+    <td></td>
+    <td>&#10008;</td>
+    <td></td>
+    <td></td>
+    <td>&#10008;</td>
+    <td></td>
+    <td>&#10008;</td>
+  </tr>
+  <tr>
+    <th class="rowhead indent">gcread</th>
+    <td>&#10004;</td>
+    <td></td>
+    <td></td>
+    <td></td>
+    <td></td>
+    <td></td>
+    <td></td>
+    <td>&#10008;</td>
+  </tr>
+  <tr>
+    <th class="rowhead"><em><a href="#safe-points">safe points</a></em></th>
+    <td></td>
+    <th></th>
+    <th></th>
+    <th></th>
+    <th></th>
+    <th></th>
+    <th></th>
+    <th></th>
+  </tr>
+  <tr>
+    <th class="rowhead indent">in calls</th>
+    <td>&#10004;</td>
+    <td></td>
+    <td></td>
+    <td>&#10008;</td>
+    <td>&#10008;</td>
+    <td>&#10008;</td>
+    <td>&#10008;</td>
+    <td>&#10008;</td>
+  </tr>
+  <tr>
+    <th class="rowhead indent">before calls</th>
+    <td>&#10004;</td>
+    <td></td>
+    <td></td>
+    <td></td>
+    <td></td>
+    <td></td>
+    <td>&#10008;</td>
+    <td>&#10008;</td>
+  </tr>
+  <tr class="doc_warning">
+    <th class="rowhead indent">for loops</th>
+    <td>NO</td>
+    <td></td>
+    <td></td>
+    <td></td>
+    <td></td>
+    <td></td>
+    <td>&#10008;</td>
+    <td>&#10008;</td>
+  </tr>
+  <tr>
+    <th class="rowhead indent">before escape</th>
+    <td>&#10004;</td>
+    <td></td>
+    <td></td>
+    <td></td>
+    <td></td>
+    <td></td>
+    <td>&#10008;</td>
+    <td>&#10008;</td>
+  </tr>
+  <tr class="doc_warning">
+    <th class="rowhead">emit code at safe points</th>
+    <td>NO</td>
+    <td></td>
+    <td></td>
+    <td></td>
+    <td></td>
+    <td></td>
+    <td>&#10008;</td>
+    <td>&#10008;</td>
+  </tr>
+  <tr>
+    <th class="rowhead"><em>output</em></th>
+    <td></td>
+    <th></th>
+    <th></th>
+    <th></th>
+    <th></th>
+    <th></th>
+    <th></th>
+    <th></th>
+  </tr>
+  <tr>
+    <th class="rowhead indent"><a href="#assembly">assembly</a></th>
+    <td>&#10004;</td>
+    <td></td>
+    <td></td>
+    <td>&#10008;</td>
+    <td>&#10008;</td>
+    <td>&#10008;</td>
+    <td>&#10008;</td>
+    <td>&#10008;</td>
+  </tr>
+  <tr class="doc_warning">
+    <th class="rowhead indent">JIT</th>
+    <td>NO</td>
+    <td></td>
+    <td></td>
+    <td class="optl">&#10008;</td>
+    <td class="optl">&#10008;</td>
+    <td class="optl">&#10008;</td>
+    <td class="optl">&#10008;</td>
+    <td class="optl">&#10008;</td>
+  </tr>
+  <tr class="doc_warning">
+    <th class="rowhead indent">obj</th>
+    <td>NO</td>
+    <td></td>
+    <td></td>
+    <td class="optl">&#10008;</td>
+    <td class="optl">&#10008;</td>
+    <td class="optl">&#10008;</td>
+    <td class="optl">&#10008;</td>
+    <td class="optl">&#10008;</td>
+  </tr>
+  <tr class="doc_warning">
+    <th class="rowhead">live analysis</th>
+    <td>NO</td>
+    <td></td>
+    <td></td>
+    <td class="optl">&#10008;</td>
+    <td class="optl">&#10008;</td>
+    <td class="optl">&#10008;</td>
+    <td class="optl">&#10008;</td>
+    <td class="optl">&#10008;</td>
+  </tr>
+  <tr class="doc_warning">
+    <th class="rowhead">register map</th>
+    <td>NO</td>
+    <td></td>
+    <td></td>
+    <td class="optl">&#10008;</td>
+    <td class="optl">&#10008;</td>
+    <td class="optl">&#10008;</td>
+    <td class="optl">&#10008;</td>
+    <td class="optl">&#10008;</td>
+  </tr>
+  <tr>
+    <td colspan="10">
+      <div><span class="doc_warning">*</span> Derived pointers only pose a
+           hazard to copying collectors.</div>
+      <div><span class="optl">&#10008;</span> in gray denotes a feature which
+           could be utilized if available.</div>
+    </td>
+  </tr>
+</table>
+
+<p>To be clear, the collection techniques above are defined as:</p>
+
+<dl>
+  <dt>Shadow Stack</dt>
+  <dd>The mutator carefully maintains a linked list of stack roots.</dd>
+  <dt>Reference Counting</dt>
+  <dd>The mutator maintains a reference count for each object and frees an
+      object when its count falls to zero.</dd>
+  <dt>Mark-Sweep</dt>
+  <dd>When the heap is exhausted, the collector marks reachable objects starting
+      from the roots, then deallocates unreachable objects in a sweep
+      phase.</dd>
+  <dt>Copying</dt>
+  <dd>As reachability analysis proceeds, the collector copies objects from one
+      heap area to another, compacting them in the process. Copying collectors
+      enable highly efficient "bump pointer" allocation and can improve locality
+      of reference.</dd>
+  <dt>Incremental</dt>
+  <dd>(Including generational collectors.) Incremental collectors generally have
+      all the properties of a copying collector (regardless of whether the
+      mature heap is compacting), but bring the added complexity of requiring
+      write barriers.</dd>
+  <dt>Threaded</dt>
+  <dd>Denotes a multithreaded mutator; the collector must still stop the mutator
+      ("stop the world") before beginning reachability analysis. Stopping a
+      multithreaded mutator is a complicated problem. It generally requires
+      highly platform specific code in the runtime, and the production of
+      carefully designed machine code at safe points.</dd>
+  <dt>Concurrent</dt>
+  <dd>In this technique, the mutator and the collector run concurrently, with
+      the goal of eliminating pause times. In a <em>cooperative</em> collector,
+      the mutator further aids with collection should a pause occur, allowing
+      collection to take advantage of multiprocessor hosts. The "stop the world"
+      problem of threaded collectors is generally still present to a limited
+      extent. Sophisticated marking algorithms are necessary. Read barriers may
+      be necessary.</dd>
+</dl>
+
+<p>As the matrix indicates, LLVM's garbage collection infrastructure is already
+suitable for a wide variety of collectors, but does not currently extend to
+multithreaded programs. This will be added in the future as there is
+interest.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="stack-map">Computing stack maps</a>
+</div>
+
+<div class="doc_text">
+
+<p>LLVM automatically computes a stack map. One of the most important features
+of a <tt>GCStrategy</tt> is to compile this information into the executable in
+the binary representation expected by the runtime library.</p>
+
+<p>The stack map consists of the location and identity of each GC root in the
+each function in the module. For each root:</p>
+
+<ul>
+  <li><tt>RootNum</tt>: The index of the root.</li>
+  <li><tt>StackOffset</tt>: The offset of the object relative to the frame
+      pointer.</li>
+  <li><tt>RootMetadata</tt>: The value passed as the <tt>%metadata</tt>
+      parameter to the <a href="#gcroot"><tt>@llvm.gcroot</tt></a> intrinsic.</li>
+</ul>
+
+<p>Also, for the function as a whole:</p>
+
+<ul>
+  <li><tt>getFrameSize()</tt>: The overall size of the function's initial
+      stack frame, not accounting for any dynamic allocation.</li>
+  <li><tt>roots_size()</tt>: The count of roots in the function.</li>
+</ul>
+
+<p>To access the stack map, use <tt>GCFunctionMetadata::roots_begin()</tt> and
+-<tt>end()</tt> from the <tt><a
+href="#assembly">GCMetadataPrinter</a></tt>:</p>
+
+<blockquote><pre
+>for (iterator I = begin(), E = end(); I != E; ++I) {
+  GCFunctionInfo *FI = *I;
+  unsigned FrameSize = FI-&gt;getFrameSize();
+  size_t RootCount = FI-&gt;roots_size();
+
+  for (GCFunctionInfo::roots_iterator RI = FI-&gt;roots_begin(),
+                                      RE = FI-&gt;roots_end();
+                                      RI != RE; ++RI) {
+    int RootNum = RI->Num;
+    int RootStackOffset = RI->StackOffset;
+    Constant *RootMetadata = RI->Metadata;
+  }
+}</pre></blockquote>
+
+<p>If the <tt>llvm.gcroot</tt> intrinsic is eliminated before code generation by
+a custom lowering pass, LLVM will compute an empty stack map. This may be useful
+for collector plugins which implement reference counting or a shadow stack.</p>
+
+</div>
+
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="init-roots">Initializing roots to null: <tt>InitRoots</tt></a>
+</div>
+
+<div class="doc_text">
+
+<blockquote><pre
+>MyGC::MyGC() {
+  InitRoots = true;
+}</pre></blockquote>
+
+<p>When set, LLVM will automatically initialize each root to <tt>null</tt> upon
+entry to the function. This prevents the GC's sweep phase from visiting
+uninitialized pointers, which will almost certainly cause it to crash. This
+initialization occurs before custom lowering, so the two may be used
+together.</p>
+
+<p>Since LLVM does not yet compute liveness information, there is no means of
+distinguishing an uninitialized stack root from an initialized one. Therefore,
+this feature should be used by all GC plugins. It is enabled by default.</p>
+
+</div>
+
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="custom">Custom lowering of intrinsics: <tt>CustomRoots</tt>, 
+    <tt>CustomReadBarriers</tt>, and <tt>CustomWriteBarriers</tt></a>
+</div>
+
+<div class="doc_text">
+
+<p>For GCs which use barriers or unusual treatment of stack roots, these
+flags allow the collector to perform arbitrary transformations of the LLVM
+IR:</p>
+
+<blockquote><pre
+>class MyGC : public GCStrategy {
+public:
+  MyGC() {
+    CustomRoots = true;
+    CustomReadBarriers = true;
+    CustomWriteBarriers = true;
+  }
+  
+  virtual bool initializeCustomLowering(Module &amp;M);
+  virtual bool performCustomLowering(Function &amp;F);
+};</pre></blockquote>
+
+<p>If any of these flags are set, then LLVM suppresses its default lowering for
+the corresponding intrinsics and instead calls
+<tt>performCustomLowering</tt>.</p>
+
+<p>LLVM's default action for each intrinsic is as follows:</p>
+
+<ul>
+  <li><tt>llvm.gcroot</tt>: Leave it alone. The code generator must see it
+                            or the stack map will not be computed.</li>
+  <li><tt>llvm.gcread</tt>: Substitute a <tt>load</tt> instruction.</li>
+  <li><tt>llvm.gcwrite</tt>: Substitute a <tt>store</tt> instruction.</li>
+</ul>
+
+<p>If <tt>CustomReadBarriers</tt> or <tt>CustomWriteBarriers</tt> are specified,
+then <tt>performCustomLowering</tt> <strong>must</strong> eliminate the
+corresponding barriers.</p>
+
+<p><tt>performCustomLowering</tt> must comply with the same restrictions as <a
+href="WritingAnLLVMPass.html#runOnFunction"><tt
+>FunctionPass::runOnFunction</tt></a>.
+Likewise, <tt>initializeCustomLowering</tt> has the same semantics as <a
+href="WritingAnLLVMPass.html#doInitialization_mod"><tt
+>Pass::doInitialization(Module&amp;)</tt></a>.</p>
+
+<p>The following can be used as a template:</p>
+
+<blockquote><pre
+>#include "llvm/Module.h"
+#include "llvm/IntrinsicInst.h"
+
+bool MyGC::initializeCustomLowering(Module &amp;M) {
+  return false;
+}
+
+bool MyGC::performCustomLowering(Function &amp;F) {
+  bool MadeChange = false;
+  
+  for (Function::iterator BB = F.begin(), E = F.end(); BB != E; ++BB)
+    for (BasicBlock::iterator II = BB-&gt;begin(), E = BB-&gt;end(); II != E; )
+      if (IntrinsicInst *CI = dyn_cast&lt;IntrinsicInst&gt;(II++))
+        if (Function *F = CI-&gt;getCalledFunction())
+          switch (F-&gt;getIntrinsicID()) {
+          case Intrinsic::gcwrite:
+            // Handle llvm.gcwrite.
+            CI-&gt;eraseFromParent();
+            MadeChange = true;
+            break;
+          case Intrinsic::gcread:
+            // Handle llvm.gcread.
+            CI-&gt;eraseFromParent();
+            MadeChange = true;
+            break;
+          case Intrinsic::gcroot:
+            // Handle llvm.gcroot.
+            CI-&gt;eraseFromParent();
+            MadeChange = true;
+            break;
+          }
+  
+  return MadeChange;
+}</pre></blockquote>
+
+</div>
+
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="safe-points">Generating safe points: <tt>NeededSafePoints</tt></a>
+</div>
+
+<div class="doc_text">
+
+<p>LLVM can compute four kinds of safe points:</p>
+
+<blockquote><pre
+>namespace GC {
+  /// PointKind - The type of a collector-safe point.
+  /// 
+  enum PointKind {
+    Loop,    //&lt; Instr is a loop (backwards branch).
+    Return,  //&lt; Instr is a return instruction.
+    PreCall, //&lt; Instr is a call instruction.
+    PostCall //&lt; Instr is the return address of a call.
+  };
+}</pre></blockquote>
+
+<p>A collector can request any combination of the four by setting the 
+<tt>NeededSafePoints</tt> mask:</p>
+
+<blockquote><pre
+>MyGC::MyGC() {
+  NeededSafePoints = 1 &lt;&lt; GC::Loop
+                   | 1 &lt;&lt; GC::Return
+                   | 1 &lt;&lt; GC::PreCall
+                   | 1 &lt;&lt; GC::PostCall;
+}</pre></blockquote>
+
+<p>It can then use the following routines to access safe points.</p>
+
+<blockquote><pre
+>for (iterator I = begin(), E = end(); I != E; ++I) {
+  GCFunctionInfo *MD = *I;
+  size_t PointCount = MD-&gt;size();
+
+  for (GCFunctionInfo::iterator PI = MD-&gt;begin(),
+                                PE = MD-&gt;end(); PI != PE; ++PI) {
+    GC::PointKind PointKind = PI-&gt;Kind;
+    unsigned PointNum = PI-&gt;Num;
+  }
+}
+</pre></blockquote>
+
+<p>Almost every collector requires <tt>PostCall</tt> safe points, since these
+correspond to the moments when the function is suspended during a call to a
+subroutine.</p>
+
+<p>Threaded programs generally require <tt>Loop</tt> safe points to guarantee
+that the application will reach a safe point within a bounded amount of time,
+even if it is executing a long-running loop which contains no function
+calls.</p>
+
+<p>Threaded collectors may also require <tt>Return</tt> and <tt>PreCall</tt>
+safe points to implement "stop the world" techniques using self-modifying code,
+where it is important that the program not exit the function without reaching a
+safe point (because only the topmost function has been patched).</p>
+
+</div>
+
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="assembly">Emitting assembly code: <tt>GCMetadataPrinter</tt></a>
+</div>
+
+<div class="doc_text">
+
+<p>LLVM allows a plugin to print arbitrary assembly code before and after the
+rest of a module's assembly code. At the end of the module, the GC can compile
+the LLVM stack map into assembly code. (At the beginning, this information is not
+yet computed.)</p>
+
+<p>Since AsmWriter and CodeGen are separate components of LLVM, a separate
+abstract base class and registry is provided for printing assembly code, the
+<tt>GCMetadaPrinter</tt> and <tt>GCMetadataPrinterRegistry</tt>. The AsmWriter
+will look for such a subclass if the <tt>GCStrategy</tt> sets
+<tt>UsesMetadata</tt>:</p>
+
+<blockquote><pre
+>MyGC::MyGC() {
+  UsesMetadata = true;
+}</pre></blockquote>
+
+<p>This separation allows JIT-only clients to be smaller.</p>
+
+<p>Note that LLVM does not currently have analogous APIs to support code
+generation in the JIT, nor using the object writers.</p>
+
+<blockquote><pre
+>// lib/MyGC/MyGCPrinter.cpp - Example LLVM GC printer
+
+#include "llvm/CodeGen/GCMetadataPrinter.h"
+#include "llvm/Support/Compiler.h"
+
+using namespace llvm;
+
+namespace {
+  class LLVM_LIBRARY_VISIBILITY MyGCPrinter : public GCMetadataPrinter {
+  public:
+    virtual void beginAssembly(std::ostream &amp;OS, AsmPrinter &amp;AP,
+                               const TargetAsmInfo &amp;TAI);
+  
+    virtual void finishAssembly(std::ostream &amp;OS, AsmPrinter &amp;AP,
+                                const TargetAsmInfo &amp;TAI);
+  };
+  
+  GCMetadataPrinterRegistry::Add&lt;MyGCPrinter&gt;
+  X("mygc", "My bespoke garbage collector.");
+}</pre></blockquote>
+
+<p>The collector should use <tt>AsmPrinter</tt> and <tt>TargetAsmInfo</tt> to
+print portable assembly code to the <tt>std::ostream</tt>. The collector itself
+contains the stack map for the entire module, and may access the
+<tt>GCFunctionInfo</tt> using its own <tt>begin()</tt> and <tt>end()</tt>
+methods. Here's a realistic example:</p>
+
+<blockquote><pre
+>#include "llvm/CodeGen/AsmPrinter.h"
+#include "llvm/Function.h"
+#include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/TargetData.h"
+#include "llvm/Target/TargetAsmInfo.h"
+
+void MyGCPrinter::beginAssembly(std::ostream &amp;OS, AsmPrinter &amp;AP,
+                                const TargetAsmInfo &amp;TAI) {
+  // Nothing to do.
+}
+
+void MyGCPrinter::finishAssembly(std::ostream &amp;OS, AsmPrinter &amp;AP,
+                                 const TargetAsmInfo &amp;TAI) {
+  // Set up for emitting addresses.
+  const char *AddressDirective;
+  int AddressAlignLog;
+  if (AP.TM.getTargetData()->getPointerSize() == sizeof(int32_t)) {
+    AddressDirective = TAI.getData32bitsDirective();
+    AddressAlignLog = 2;
+  } else {
+    AddressDirective = TAI.getData64bitsDirective();
+    AddressAlignLog = 3;
+  }
+  
+  // Put this in the data section.
+  AP.SwitchToDataSection(TAI.getDataSection());
+  
+  // For each function...
+  for (iterator FI = begin(), FE = end(); FI != FE; ++FI) {
+    GCFunctionInfo &amp;MD = **FI;
+    
+    // Emit this data structure:
+    // 
+    // struct {
+    //   int32_t PointCount;
+    //   struct {
+    //     void *SafePointAddress;
+    //     int32_t LiveCount;
+    //     int32_t LiveOffsets[LiveCount];
+    //   } Points[PointCount];
+    // } __gcmap_&lt;FUNCTIONNAME&gt;;
+    
+    // Align to address width.
+    AP.EmitAlignment(AddressAlignLog);
+    
+    // Emit the symbol by which the stack map entry can be found.
+    std::string Symbol;
+    Symbol += TAI.getGlobalPrefix();
+    Symbol += "__gcmap_";
+    Symbol += MD.getFunction().getName();
+    if (const char *GlobalDirective = TAI.getGlobalDirective())
+      OS &lt;&lt; GlobalDirective &lt;&lt; Symbol &lt;&lt; "\n";
+    OS &lt;&lt; TAI.getGlobalPrefix() &lt;&lt; Symbol &lt;&lt; ":\n";
+    
+    // Emit PointCount.
+    AP.EmitInt32(MD.size());
+    AP.EOL("safe point count");
+    
+    // And each safe point...
+    for (GCFunctionInfo::iterator PI = MD.begin(),
+                                     PE = MD.end(); PI != PE; ++PI) {
+      // Align to address width.
+      AP.EmitAlignment(AddressAlignLog);
+      
+      // Emit the address of the safe point.
+      OS &lt;&lt; AddressDirective
+         &lt;&lt; TAI.getPrivateGlobalPrefix() &lt;&lt; "label" &lt;&lt; PI-&gt;Num;
+      AP.EOL("safe point address");
+      
+      // Emit the stack frame size.
+      AP.EmitInt32(MD.getFrameSize());
+      AP.EOL("stack frame size");
+      
+      // Emit the number of live roots in the function.
+      AP.EmitInt32(MD.live_size(PI));
+      AP.EOL("live root count");
+      
+      // And for each live root...
+      for (GCFunctionInfo::live_iterator LI = MD.live_begin(PI),
+                                            LE = MD.live_end(PI);
+                                            LI != LE; ++LI) {
+        // Print its offset within the stack frame.
+        AP.EmitInt32(LI-&gt;StackOffset);
+        AP.EOL("stack offset");
+      }
+    }
+  }
+}
+</pre></blockquote>
+
+</div>
+
+
+<!-- *********************************************************************** -->
+<div class="doc_section">
+  <a name="references">References</a>
+</div>
+<!-- *********************************************************************** -->
+
+<div class="doc_text">
+
+<p><a name="appel89">[Appel89]</a> Runtime Tags Aren't Necessary. Andrew
+W. Appel. Lisp and Symbolic Computation 19(7):703-705, July 1989.</p>
+
+<p><a name="goldberg91">[Goldberg91]</a> Tag-free garbage collection for
+strongly typed programming languages. Benjamin Goldberg. ACM SIGPLAN
+PLDI'91.</p>
+
+<p><a name="tolmach94">[Tolmach94]</a> Tag-free garbage collection using
+explicit type parameters. Andrew Tolmach. Proceedings of the 1994 ACM
+conference on LISP and functional programming.</p>
+
+<p><a name="henderson02">[Henderson2002]</a> <a
+href="http://citeseer.ist.psu.edu/henderson02accurate.html">
+Accurate Garbage Collection in an Uncooperative Environment</a>.
+Fergus Henderson. International Symposium on Memory Management 2002.</p>
+
+</div>
+
+
+<!-- *********************************************************************** -->
+
+<hr>
+<address>
+  <a href="http://jigsaw.w3.org/css-validator/check/referer"><img
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS"></a>
+  <a href="http://validator.w3.org/check/referer"><img
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01"></a>
+
+  <a href="mailto:sabre at nondot.org">Chris Lattner</a><br>
+  <a href="http://llvm.org">LLVM Compiler Infrastructure</a><br>
+  Last modified: $Date: 2010-05-11 13:16:09 -0700 (Tue, 11 May 2010) $
+</address>
+
+</body>
+</html>

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+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN"
+                      "http://www.w3.org/TR/html4/strict.dtd">
+<html>
+<head>
+  <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
+  <title>The Often Misunderstood GEP Instruction</title>
+  <link rel="stylesheet" href="llvm.css" type="text/css">
+  <style type="text/css">
+    TABLE   { text-align: left; border: 1px solid black; border-collapse: collapse; margin: 0 0 0 0; }
+  </style>
+</head>
+<body>
+
+<div class="doc_title">
+  The Often Misunderstood GEP Instruction
+</div>
+
+<ol>
+  <li><a href="#intro">Introduction</a></li>
+  <li><a href="#addresses">Address Computation</a>
+  <ol>
+    <li><a href="#extra_index">Why is the extra 0 index required?</a></li>
+    <li><a href="#deref">What is dereferenced by GEP?</a></li>
+    <li><a href="#firstptr">Why can you index through the first pointer but not
+      subsequent ones?</a></li>
+    <li><a href="#lead0">Why don't GEP x,0,0,1 and GEP x,1 alias? </a></li>
+    <li><a href="#trail0">Why do GEP x,1,0,0 and GEP x,1 alias? </a></li>
+    <li><a href="#vectors">Can GEP index into vector elements?</a>
+    <li><a href="#addrspace">What effect do address spaces have on GEPs?</a>
+    <li><a href="#int">How is GEP different from ptrtoint, arithmetic, and inttoptr?</a></li>
+    <li><a href="#be">I'm writing a backend for a target which needs custom lowering for GEP. How do I do this?</a>
+    <li><a href="#vla">How does VLA addressing work with GEPs?</a>
+  </ol></li>
+  <li><a href="#rules">Rules</a>
+  <ol>
+    <li><a href="#bounds">What happens if an array index is out of bounds?</a>
+    <li><a href="#negative">Can array indices be negative?</a>
+    <li><a href="#compare">Can I compare two values computed with GEPs?</a>
+    <li><a href="#types">Can I do GEP with a different pointer type than the type of the underlying object?</a>
+    <li><a href="#null">Can I cast an object's address to integer and add it to null?</a>
+    <li><a href="#ptrdiff">Can I compute the distance between two objects, and add that value to one address to compute the other address?</a>
+    <li><a href="#tbaa">Can I do type-based alias analysis on LLVM IR?</a>
+    <li><a href="#overflow">What happens if a GEP computation overflows?</a>
+    <li><a href="#check">How can I tell if my front-end is following the rules?</a>
+  </ol></li>
+  <li><a href="#rationale">Rationale</a>
+  <ol>
+    <li><a href="#goals">Why is GEP designed this way?</a></li>
+    <li><a href="#i32">Why do struct member indices always use i32?</a></li>
+    <li><a href="#uglygep">What's an uglygep?</a>
+  </ol></li>
+  <li><a href="#summary">Summary</a></li>
+</ol>
+
+<div class="doc_author">
+  <p>Written by: <a href="mailto:rspencer at reidspencer.com">Reid Spencer</a>.</p>
+</div>
+
+
+<!-- *********************************************************************** -->
+<div class="doc_section"><a name="intro"><b>Introduction</b></a></div>
+<!-- *********************************************************************** -->
+
+<div class="doc_text"> 
+  <p>This document seeks to dispel the mystery and confusion surrounding LLVM's
+  <a href="LangRef.html#i_getelementptr">GetElementPtr</a> (GEP) instruction.
+  Questions about the wily GEP instruction are
+  probably the most frequently occurring questions once a developer gets down to
+  coding with LLVM. Here we lay out the sources of confusion and show that the
+  GEP instruction is really quite simple.
+  </p>
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_section"><a name="addresses"><b>Address Computation</b></a></div>
+<!-- *********************************************************************** -->
+<div class="doc_text">
+  <p>When people are first confronted with the GEP instruction, they tend to
+  relate it to known concepts from other programming paradigms, most notably C
+  array indexing and field selection. GEP closely resembles C array indexing
+  and field selection, however it's is a little different and this leads to
+  the following questions.</p>
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_subsection">
+  <a name="firstptr"><b>What is the first index of the GEP instruction?</b></a>
+</div>
+<div class="doc_text">
+  <p>Quick answer: The index stepping through the first operand.</p> 
+  <p>The confusion with the first index usually arises from thinking about 
+  the GetElementPtr instruction as if it was a C index operator. They aren't the
+  same. For example, when we write, in "C":</p>
+
+<div class="doc_code">
+<pre>
+AType *Foo;
+...
+X = &amp;Foo-&gt;F;
+</pre>
+</div>
+
+  <p>it is natural to think that there is only one index, the selection of the
+  field <tt>F</tt>.  However, in this example, <tt>Foo</tt> is a pointer. That 
+  pointer must be indexed explicitly in LLVM. C, on the other hand, indices
+  through it transparently.  To arrive at the same address location as the C 
+  code, you would provide the GEP instruction with two index operands. The 
+  first operand indexes through the pointer; the second operand indexes the 
+  field <tt>F</tt> of the structure, just as if you wrote:</p>
+
+<div class="doc_code">
+<pre>
+X = &amp;Foo[0].F;
+</pre>
+</div>
+
+  <p>Sometimes this question gets rephrased as:</p>
+  <blockquote><p><i>Why is it okay to index through the first pointer, but 
+      subsequent pointers won't be dereferenced?</i></p></blockquote> 
+  <p>The answer is simply because memory does not have to be accessed to 
+  perform the computation. The first operand to the GEP instruction must be a 
+  value of a pointer type. The value of the pointer is provided directly to 
+  the GEP instruction as an operand without any need for accessing memory. It 
+  must, therefore be indexed and requires an index operand. Consider this 
+  example:</p>
+
+<div class="doc_code">
+<pre>
+struct munger_struct {
+  int f1;
+  int f2;
+};
+void munge(struct munger_struct *P) {
+  P[0].f1 = P[1].f1 + P[2].f2;
+}
+...
+munger_struct Array[3];
+...
+munge(Array);
+</pre>
+</div>
+
+  <p>In this "C" example, the front end compiler (llvm-gcc) will generate three
+  GEP instructions for the three indices through "P" in the assignment
+  statement.  The function argument <tt>P</tt> will be the first operand of each
+  of these GEP instructions.  The second operand indexes through that pointer.
+  The third operand will be the field offset into the 
+  <tt>struct munger_struct</tt> type,  for either the <tt>f1</tt> or 
+  <tt>f2</tt> field. So, in LLVM assembly the <tt>munge</tt> function looks 
+  like:</p>
+
+<div class="doc_code">
+<pre>
+void %munge(%struct.munger_struct* %P) {
+entry:
+  %tmp = getelementptr %struct.munger_struct* %P, i32 1, i32 0
+  %tmp = load i32* %tmp
+  %tmp6 = getelementptr %struct.munger_struct* %P, i32 2, i32 1
+  %tmp7 = load i32* %tmp6
+  %tmp8 = add i32 %tmp7, %tmp
+  %tmp9 = getelementptr %struct.munger_struct* %P, i32 0, i32 0
+  store i32 %tmp8, i32* %tmp9
+  ret void
+}
+</pre>
+</div>
+
+  <p>In each case the first operand is the pointer through which the GEP
+  instruction starts. The same is true whether the first operand is an
+  argument, allocated memory, or a global variable. </p>
+  <p>To make this clear, let's consider a more obtuse example:</p>
+
+<div class="doc_code">
+<pre>
+%MyVar = uninitialized global i32
+...
+%idx1 = getelementptr i32* %MyVar, i64 0
+%idx2 = getelementptr i32* %MyVar, i64 1
+%idx3 = getelementptr i32* %MyVar, i64 2
+</pre>
+</div>
+
+  <p>These GEP instructions are simply making address computations from the 
+  base address of <tt>MyVar</tt>.  They compute, as follows (using C syntax):
+  </p>
+
+<div class="doc_code">
+<pre>
+idx1 = (char*) &amp;MyVar + 0
+idx2 = (char*) &amp;MyVar + 4
+idx3 = (char*) &amp;MyVar + 8
+</pre>
+</div>
+
+  <p>Since the type <tt>i32</tt> is known to be four bytes long, the indices 
+  0, 1 and 2 translate into memory offsets of 0, 4, and 8, respectively. No 
+  memory is accessed to make these computations because the address of 
+  <tt>%MyVar</tt> is passed directly to the GEP instructions.</p>
+  <p>The obtuse part of this example is in the cases of <tt>%idx2</tt> and 
+  <tt>%idx3</tt>. They result in the computation of addresses that point to
+  memory past the end of the <tt>%MyVar</tt> global, which is only one
+  <tt>i32</tt> long, not three <tt>i32</tt>s long.  While this is legal in LLVM,
+  it is inadvisable because any load or store with the pointer that results 
+  from these GEP instructions would produce undefined results.</p>
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_subsection">
+  <a name="extra_index"><b>Why is the extra 0 index required?</b></a>
+</div>
+<!-- *********************************************************************** -->
+<div class="doc_text">
+  <p>Quick answer: there are no superfluous indices.</p>
+  <p>This question arises most often when the GEP instruction is applied to a
+  global variable which is always a pointer type. For example, consider
+  this:</p>
+
+<div class="doc_code">
+<pre>
+%MyStruct = uninitialized global { float*, i32 }
+...
+%idx = getelementptr { float*, i32 }* %MyStruct, i64 0, i32 1
+</pre>
+</div>
+
+  <p>The GEP above yields an <tt>i32*</tt> by indexing the <tt>i32</tt> typed 
+  field of the structure <tt>%MyStruct</tt>. When people first look at it, they 
+  wonder why the <tt>i64 0</tt> index is needed. However, a closer inspection 
+  of how globals and GEPs work reveals the need. Becoming aware of the following
+  facts will dispel the confusion:</p>
+  <ol>
+    <li>The type of <tt>%MyStruct</tt> is <i>not</i> <tt>{ float*, i32 }</tt> 
+    but rather <tt>{ float*, i32 }*</tt>. That is, <tt>%MyStruct</tt> is a 
+    pointer to a structure containing a pointer to a <tt>float</tt> and an 
+    <tt>i32</tt>.</li>
+    <li>Point #1 is evidenced by noticing the type of the first operand of 
+    the GEP instruction (<tt>%MyStruct</tt>) which is 
+    <tt>{ float*, i32 }*</tt>.</li>
+    <li>The first index, <tt>i64 0</tt> is required to step over the global
+    variable <tt>%MyStruct</tt>.  Since the first argument to the GEP
+    instruction must always be a value of pointer type, the first index 
+    steps through that pointer. A value of 0 means 0 elements offset from that
+    pointer.</li>
+    <li>The second index, <tt>i32 1</tt> selects the second field of the
+    structure (the <tt>i32</tt>). </li>
+  </ol>
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_subsection">
+  <a name="deref"><b>What is dereferenced by GEP?</b></a>
+</div>
+<div class="doc_text">
+  <p>Quick answer: nothing.</p> 
+  <p>The GetElementPtr instruction dereferences nothing. That is, it doesn't
+  access memory in any way. That's what the Load and Store instructions are for.
+  GEP is only involved in the computation of addresses. For example, consider 
+  this:</p>
+
+<div class="doc_code">
+<pre>
+%MyVar = uninitialized global { [40 x i32 ]* }
+...
+%idx = getelementptr { [40 x i32]* }* %MyVar, i64 0, i32 0, i64 0, i64 17
+</pre>
+</div>
+
+  <p>In this example, we have a global variable, <tt>%MyVar</tt> that is a
+  pointer to a structure containing a pointer to an array of 40 ints. The 
+  GEP instruction seems to be accessing the 18th integer of the structure's
+  array of ints. However, this is actually an illegal GEP instruction. It 
+  won't compile. The reason is that the pointer in the structure <i>must</i>
+  be dereferenced in order to index into the array of 40 ints. Since the 
+  GEP instruction never accesses memory, it is illegal.</p>
+  <p>In order to access the 18th integer in the array, you would need to do the
+  following:</p>
+
+<div class="doc_code">
+<pre>
+%idx = getelementptr { [40 x i32]* }* %, i64 0, i32 0
+%arr = load [40 x i32]** %idx
+%idx = getelementptr [40 x i32]* %arr, i64 0, i64 17
+</pre>
+</div>
+
+  <p>In this case, we have to load the pointer in the structure with a load
+  instruction before we can index into the array. If the example was changed 
+  to:</p>
+
+<div class="doc_code">
+<pre>
+%MyVar = uninitialized global { [40 x i32 ] }
+...
+%idx = getelementptr { [40 x i32] }*, i64 0, i32 0, i64 17
+</pre>
+</div>
+
+  <p>then everything works fine. In this case, the structure does not contain a
+  pointer and the GEP instruction can index through the global variable,
+  into the first field of the structure and access the 18th <tt>i32</tt> in the 
+  array there.</p>
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_subsection">
+  <a name="lead0"><b>Why don't GEP x,0,0,1 and GEP x,1 alias?</b></a>
+</div>
+<div class="doc_text">
+  <p>Quick Answer: They compute different address locations.</p>
+  <p>If you look at the first indices in these GEP
+  instructions you find that they are different (0 and 1), therefore the address
+  computation diverges with that index. Consider this example:</p>
+
+<div class="doc_code">
+<pre>
+%MyVar = global { [10 x i32 ] }
+%idx1 = getelementptr { [10 x i32 ] }* %MyVar, i64 0, i32 0, i64 1
+%idx2 = getelementptr { [10 x i32 ] }* %MyVar, i64 1
+</pre>
+</div>
+
+  <p>In this example, <tt>idx1</tt> computes the address of the second integer
+  in the array that is in the structure in <tt>%MyVar</tt>, that is
+  <tt>MyVar+4</tt>. The type of <tt>idx1</tt> is <tt>i32*</tt>. However,
+  <tt>idx2</tt> computes the address of <i>the next</i> structure after
+  <tt>%MyVar</tt>. The type of <tt>idx2</tt> is <tt>{ [10 x i32] }*</tt> and its
+  value is equivalent to <tt>MyVar + 40</tt> because it indexes past the ten
+  4-byte integers in <tt>MyVar</tt>. Obviously, in such a situation, the
+  pointers don't alias.</p>
+
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_subsection">
+  <a name="trail0"><b>Why do GEP x,1,0,0 and GEP x,1 alias?</b></a>
+</div>
+<div class="doc_text">
+  <p>Quick Answer: They compute the same address location.</p>
+  <p>These two GEP instructions will compute the same address because indexing
+  through the 0th element does not change the address. However, it does change
+  the type. Consider this example:</p>
+
+<div class="doc_code">
+<pre>
+%MyVar = global { [10 x i32 ] }
+%idx1 = getelementptr { [10 x i32 ] }* %MyVar, i64 1, i32 0, i64 0
+%idx2 = getelementptr { [10 x i32 ] }* %MyVar, i64 1
+</pre>
+</div>
+
+  <p>In this example, the value of <tt>%idx1</tt> is <tt>%MyVar+40</tt> and
+  its type is <tt>i32*</tt>. The value of <tt>%idx2</tt> is also 
+  <tt>MyVar+40</tt> but its type is <tt>{ [10 x i32] }*</tt>.</p>
+</div>
+
+<!-- *********************************************************************** -->
+
+<div class="doc_subsection">
+  <a name="vectors"><b>Can GEP index into vector elements?</b></a>
+</div>
+<div class="doc_text">
+  <p>This hasn't always been forcefully disallowed, though it's not recommended.
+     It leads to awkward special cases in the optimizers, and fundamental
+     inconsistency in the IR. In the future, it will probably be outright
+     disallowed.</p>
+
+</div>
+
+<!-- *********************************************************************** -->
+
+<div class="doc_subsection">
+  <a name="addrspace"><b>What effect do address spaces have on GEPs?</b></a>
+</div>
+<div class="doc_text">
+   <p>None, except that the address space qualifier on the first operand pointer
+      type always matches the address space qualifier on the result type.</p>
+
+</div>
+
+<!-- *********************************************************************** -->
+
+<div class="doc_subsection">
+  <a name="int"><b>How is GEP different from ptrtoint, arithmetic,
+                   and inttoptr?</b></a>
+</div>
+<div class="doc_text">
+  <p>It's very similar; there are only subtle differences.</p>
+
+  <p>With ptrtoint, you have to pick an integer type. One approach is to pick i64;
+     this is safe on everything LLVM supports (LLVM internally assumes pointers
+     are never wider than 64 bits in many places), and the optimizer will actually
+     narrow the i64 arithmetic down to the actual pointer size on targets which
+     don't support 64-bit arithmetic in most cases. However, there are some cases
+     where it doesn't do this. With GEP you can avoid this problem.
+
+  <p>Also, GEP carries additional pointer aliasing rules. It's invalid to take a
+     GEP from one object, address into a different separately allocated
+     object, and dereference it. IR producers (front-ends) must follow this rule,
+     and consumers (optimizers, specifically alias analysis) benefit from being
+     able to rely on it. See the <a href="#rules">Rules</a> section for more
+     information.</p>
+
+  <p>And, GEP is more concise in common cases.</p>
+
+  <p>However, for the underlying integer computation implied, there
+     is no difference.</p>
+
+</div>
+
+<!-- *********************************************************************** -->
+
+<div class="doc_subsection">
+  <a name="be"><b>I'm writing a backend for a target which needs custom
+                  lowering for GEP. How do I do this?</b></a>
+</div>
+<div class="doc_text">
+  <p>You don't. The integer computation implied by a GEP is target-independent.
+     Typically what you'll need to do is make your backend pattern-match
+     expressions trees involving ADD, MUL, etc., which are what GEP is lowered
+     into. This has the advantage of letting your code work correctly in more
+     cases.</p>
+
+  <p>GEP does use target-dependent parameters for the size and layout of data
+     types, which targets can customize.</p>
+
+  <p>If you require support for addressing units which are not 8 bits, you'll
+     need to fix a lot of code in the backend, with GEP lowering being only a
+     small piece of the overall picture.</p>
+
+</div>
+
+<!-- *********************************************************************** -->
+
+<div class="doc_subsection">
+  <a name="vla"><b>How does VLA addressing work with GEPs?</b></a>
+</div>
+<div class="doc_text">
+  <p>GEPs don't natively support VLAs. LLVM's type system is entirely static,
+     and GEP address computations are guided by an LLVM type.</p>
+
+  <p>VLA indices can be implemented as linearized indices. For example, an
+     expression like X[a][b][c], must be effectively lowered into a form
+     like X[a*m+b*n+c], so that it appears to the GEP as a single-dimensional
+     array reference.</p>
+
+  <p>This means if you want to write an analysis which understands array
+     indices and you want to support VLAs, your code will have to be
+     prepared to reverse-engineer the linearization. One way to solve this
+     problem is to use the ScalarEvolution library, which always presents
+     VLA and non-VLA indexing in the same manner.</p>
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_section"><a name="rules"><b>Rules</b></a></div>
+<!-- *********************************************************************** -->
+
+<!-- *********************************************************************** -->
+
+<div class="doc_subsection">
+  <a name="bounds"><b>What happens if an array index is out of bounds?</b></a>
+</div>
+<div class="doc_text">
+  <p>There are two senses in which an array index can be out of bounds.</p>
+
+  <p>First, there's the array type which comes from the (static) type of
+     the first operand to the GEP. Indices greater than the number of elements
+     in the corresponding static array type are valid. There is no problem with
+     out of bounds indices in this sense. Indexing into an array only depends
+     on the size of the array element, not the number of elements.</p>
+     
+  <p>A common example of how this is used is arrays where the size is not known.
+     It's common to use array types with zero length to represent these. The
+     fact that the static type says there are zero elements is irrelevant; it's
+     perfectly valid to compute arbitrary element indices, as the computation
+     only depends on the size of the array element, not the number of
+     elements. Note that zero-sized arrays are not a special case here.</p>
+
+  <p>This sense is unconnected with <tt>inbounds</tt> keyword. The
+     <tt>inbounds</tt> keyword is designed to describe low-level pointer
+     arithmetic overflow conditions, rather than high-level array
+     indexing rules.
+
+  <p>Analysis passes which wish to understand array indexing should not
+     assume that the static array type bounds are respected.</p>
+
+  <p>The second sense of being out of bounds is computing an address that's
+     beyond the actual underlying allocated object.</p>
+
+  <p>With the <tt>inbounds</tt> keyword, the result value of the GEP is
+     undefined if the address is outside the actual underlying allocated
+     object and not the address one-past-the-end.</p>
+
+  <p>Without the <tt>inbounds</tt> keyword, there are no restrictions
+     on computing out-of-bounds addresses. Obviously, performing a load or
+     a store requires an address of allocated and sufficiently aligned
+     memory. But the GEP itself is only concerned with computing addresses.</p>
+
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_subsection">
+  <a name="negative"><b>Can array indices be negative?</b></a>
+</div>
+<div class="doc_text">
+  <p>Yes. This is basically a special case of array indices being out
+     of bounds.</p>
+
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_subsection">
+  <a name="compare"><b>Can I compare two values computed with GEPs?</b></a>
+</div>
+<div class="doc_text">
+  <p>Yes. If both addresses are within the same allocated object, or 
+     one-past-the-end, you'll get the comparison result you expect. If either
+     is outside of it, integer arithmetic wrapping may occur, so the
+     comparison may not be meaningful.</p>
+
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_subsection">
+  <a name="types"><b>Can I do GEP with a different pointer type than the type of
+                     the underlying object?</b></a>
+</div>
+<div class="doc_text">
+  <p>Yes. There are no restrictions on bitcasting a pointer value to an arbitrary
+     pointer type. The types in a GEP serve only to define the parameters for the
+     underlying integer computation. They need not correspond with the actual
+     type of the underlying object.</p>
+
+  <p>Furthermore, loads and stores don't have to use the same types as the type
+     of the underlying object. Types in this context serve only to specify
+     memory size and alignment. Beyond that there are merely a hint to the
+     optimizer indicating how the value will likely be used.</p>
+
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_subsection">
+  <a name="null"><b>Can I cast an object's address to integer and add it
+                    to null?</b></a>
+</div>
+<div class="doc_text">
+  <p>You can compute an address that way, but if you use GEP to do the add,
+     you can't use that pointer to actually access the object, unless the
+     object is managed outside of LLVM.</p>
+
+  <p>The underlying integer computation is sufficiently defined; null has a
+     defined value -- zero -- and you can add whatever value you want to it.</p>
+
+  <p>However, it's invalid to access (load from or store to) an LLVM-aware
+     object with such a pointer. This includes GlobalVariables, Allocas, and
+     objects pointed to by noalias pointers.</p>
+
+  <p>If you really need this functionality, you can do the arithmetic with
+     explicit integer instructions, and use inttoptr to convert the result to
+     an address. Most of GEP's special aliasing rules do not apply to pointers
+     computed from ptrtoint, arithmetic, and inttoptr sequences.</p>
+
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_subsection">
+  <a name="ptrdiff"><b>Can I compute the distance between two objects, and add
+                       that value to one address to compute the other address?</b></a>
+</div>
+<div class="doc_text">
+  <p>As with arithmetic on null, You can use GEP to compute an address that
+     way, but you can't use that pointer to actually access the object if you
+     do, unless the object is managed outside of LLVM.</p>
+
+  <p>Also as above, ptrtoint and inttoptr provide an alternative way to do this
+     which do not have this restriction.</p>
+
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_subsection">
+  <a name="tbaa"><b>Can I do type-based alias analysis on LLVM IR?</b></a>
+</div>
+<div class="doc_text">
+  <p>You can't do type-based alias analysis using LLVM's built-in type system,
+     because LLVM has no restrictions on mixing types in addressing, loads or
+     stores.</p>
+
+  <p>It would be possible to add special annotations to the IR, probably using
+     metadata, to describe a different type system (such as the C type system),
+     and do type-based aliasing on top of that. This is a much bigger
+     undertaking though.</p>
+
+</div>
+
+<!-- *********************************************************************** -->
+
+<div class="doc_subsection">
+  <a name="overflow"><b>What happens if a GEP computation overflows?</b></a>
+</div>
+<div class="doc_text">
+   <p>If the GEP lacks the <tt>inbounds</tt> keyword, the value is the result
+      from evaluating the implied two's complement integer computation. However,
+      since there's no guarantee of where an object will be allocated in the
+      address space, such values have limited meaning.</p>
+
+  <p>If the GEP has the <tt>inbounds</tt> keyword, the result value is
+     undefined (a "<a href="LangRef.html#trapvalues">trap value</a>") if the GEP
+     overflows (i.e. wraps around the end of the address space).</p>
+  
+  <p>As such, there are some ramifications of this for inbounds GEPs: scales
+     implied by array/vector/pointer indices are always known to be "nsw" since
+     they are signed values that are scaled by the element size.  These values
+     are also allowed to be negative (e.g. "gep i32 *%P, i32 -1") but the
+     pointer itself is logically treated as an unsigned value.  This means that
+     GEPs have an asymmetric relation between the pointer base (which is treated
+     as unsigned) and the offset applied to it (which is treated as signed). The
+     result of the additions within the offset calculation cannot have signed
+     overflow, but when applied to the base pointer, there can be signed
+     overflow.
+  </p>
+  
+
+</div>
+
+<!-- *********************************************************************** -->
+
+<div class="doc_subsection">
+  <a name="check"><b>How can I tell if my front-end is following the
+                     rules?</b></a>
+</div>
+<div class="doc_text">
+   <p>There is currently no checker for the getelementptr rules. Currently,
+      the only way to do this is to manually check each place in your front-end
+      where GetElementPtr operators are created.</p>
+
+   <p>It's not possible to write a checker which could find all rule
+      violations statically. It would be possible to write a checker which
+      works by instrumenting the code with dynamic checks though. Alternatively,
+      it would be possible to write a static checker which catches a subset of
+      possible problems. However, no such checker exists today.</p>
+
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_section"><a name="rationale"><b>Rationale</b></a></div>
+<!-- *********************************************************************** -->
+
+<!-- *********************************************************************** -->
+
+<div class="doc_subsection">
+  <a name="goals"><b>Why is GEP designed this way?</b></a>
+</div>
+<div class="doc_text">
+   <p>The design of GEP has the following goals, in rough unofficial
+      order of priority:</p>
+   <ul>
+     <li>Support C, C-like languages, and languages which can be
+         conceptually lowered into C (this covers a lot).</li>
+     <li>Support optimizations such as those that are common in
+         C compilers. In particular, GEP is a cornerstone of LLVM's
+         <a href="LangRef.html#pointeraliasing">pointer aliasing model</a>.</li>
+     <li>Provide a consistent method for computing addresses so that
+         address computations don't need to be a part of load and
+         store instructions in the IR.</li>
+     <li>Support non-C-like languages, to the extent that it doesn't
+         interfere with other goals.</li>
+     <li>Minimize target-specific information in the IR.</li>
+   </ul>
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_subsection">
+  <a name="i32"><b>Why do struct member indices always use i32?</b></a>
+</div>
+<div class="doc_text">
+  <p>The specific type i32 is probably just a historical artifact, however it's
+     wide enough for all practical purposes, so there's been no need to change it.
+     It doesn't necessarily imply i32 address arithmetic; it's just an identifier
+     which identifies a field in a struct. Requiring that all struct indices be
+     the same reduces the range of possibilities for cases where two GEPs are
+     effectively the same but have distinct operand types.</p>
+
+</div>
+
+<!-- *********************************************************************** -->
+
+<div class="doc_subsection">
+  <a name="uglygep"><b>What's an uglygep?</b></a>
+</div>
+<div class="doc_text">
+  <p>Some LLVM optimizers operate on GEPs by internally lowering them into
+     more primitive integer expressions, which allows them to be combined
+     with other integer expressions and/or split into multiple separate
+     integer expressions. If they've made non-trivial changes, translating
+     back into LLVM IR can involve reverse-engineering the structure of
+     the addressing in order to fit it into the static type of the original
+     first operand. It isn't always possibly to fully reconstruct this
+     structure; sometimes the underlying addressing doesn't correspond with
+     the static type at all. In such cases the optimizer instead will emit
+     a GEP with the base pointer casted to a simple address-unit pointer,
+     using the name "uglygep". This isn't pretty, but it's just as
+     valid, and it's sufficient to preserve the pointer aliasing guarantees
+     that GEP provides.</p>
+
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_section"><a name="summary"><b>Summary</b></a></div>
+<!-- *********************************************************************** -->
+
+<div class="doc_text">
+  <p>In summary, here's some things to always remember about the GetElementPtr
+  instruction:</p>
+  <ol>
+    <li>The GEP instruction never accesses memory, it only provides pointer
+    computations.</li>
+    <li>The first operand to the GEP instruction is always a pointer and it must
+    be indexed.</li>
+    <li>There are no superfluous indices for the GEP instruction.</li>
+    <li>Trailing zero indices are superfluous for pointer aliasing, but not for
+    the types of the pointers.</li>
+    <li>Leading zero indices are not superfluous for pointer aliasing nor the
+    types of the pointers.</li>
+  </ol>
+</div>
+
+<!-- *********************************************************************** -->
+
+<hr>
+<address>
+  <a href="http://jigsaw.w3.org/css-validator/check/referer"><img
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS"></a>
+  <a href="http://validator.w3.org/check/referer"><img
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01"></a>
+  <a href="http://llvm.org">The LLVM Compiler Infrastructure</a><br/>
+  Last modified: $Date: 2011-02-11 13:50:52 -0800 (Fri, 11 Feb 2011) $
+</address>
+</body>
+</html>

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@@ -0,0 +1,1702 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN"
+                      "http://www.w3.org/TR/html4/strict.dtd">
+<html>
+<head>
+  <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
+  <title>Getting Started with LLVM System</title>
+  <link rel="stylesheet" href="llvm.css" type="text/css">
+</head>
+<body>
+
+<div class="doc_title">
+  Getting Started with the LLVM System  
+</div>
+
+<ul>
+  <li><a href="#overview">Overview</a>
+  <li><a href="#quickstart">Getting Started Quickly (A Summary)</a>
+  <li><a href="#requirements">Requirements</a>
+    <ol>
+      <li><a href="#hardware">Hardware</a></li>
+      <li><a href="#software">Software</a></li>
+      <li><a href="#brokengcc">Broken versions of GCC and other tools</a></li>
+    </ol></li>
+
+  <li><a href="#starting">Getting Started with LLVM</a>
+    <ol>
+      <li><a href="#terminology">Terminology and Notation</a></li>
+      <li><a href="#environment">Setting Up Your Environment</a></li>
+      <li><a href="#unpack">Unpacking the LLVM Archives</a></li>
+      <li><a href="#checkout">Checkout LLVM from Subversion</a></li>
+      <li><a href="#git_mirror">LLVM GIT mirror</a></li>
+      <li><a href="#installcf">Install the GCC Front End</a></li>
+      <li><a href="#config">Local LLVM Configuration</a></li>
+      <li><a href="#compile">Compiling the LLVM Suite Source Code</a></li>
+      <li><a href="#cross-compile">Cross-Compiling LLVM</a></li>
+      <li><a href="#objfiles">The Location of LLVM Object Files</a></li>
+      <li><a href="#optionalconfig">Optional Configuration Items</a></li>
+    </ol></li>
+
+  <li><a href="#layout">Program layout</a>
+    <ol>
+      <li><a href="#examples"><tt>llvm/examples</tt></a></li>
+      <li><a href="#include"><tt>llvm/include</tt></a></li>
+      <li><a href="#lib"><tt>llvm/lib</tt></a></li>
+      <li><a href="#projects"><tt>llvm/projects</tt></a></li>
+      <li><a href="#runtime"><tt>llvm/runtime</tt></a></li>
+      <li><a href="#test"><tt>llvm/test</tt></a></li>
+      <li><a href="#test-suite"><tt>test-suite</tt></a></li>
+      <li><a href="#tools"><tt>llvm/tools</tt></a></li>
+      <li><a href="#utils"><tt>llvm/utils</tt></a></li>
+    </ol></li>
+
+  <li><a href="#tutorial">An Example Using the LLVM Tool Chain</a>
+      <ol>
+         <li><a href="#tutorial4">Example with llvm-gcc4</a></li>
+      </ol>
+  <li><a href="#problems">Common Problems</a>
+  <li><a href="#links">Links</a>
+</ul>
+
+<div class="doc_author">
+  <p>Written by: 
+    <a href="mailto:criswell at uiuc.edu">John Criswell</a>, 
+    <a href="mailto:sabre at nondot.org">Chris Lattner</a>,
+    <a href="http://misha.brukman.net">Misha Brukman</a>, 
+    <a href="http://www.cs.uiuc.edu/~vadve">Vikram Adve</a>, and
+    <a href="mailto:gshi1 at uiuc.edu">Guochun Shi</a>.
+  </p>
+</div>
+
+
+<!-- *********************************************************************** -->
+<div class="doc_section">
+  <a name="overview"><b>Overview</b></a>
+</div>
+<!-- *********************************************************************** -->
+
+<div class="doc_text">
+
+<p>Welcome to LLVM! In order to get started, you first need to know some
+basic information.</p>
+
+<p>First, LLVM comes in three pieces. The first piece is the LLVM
+suite. This contains all of the tools, libraries, and header files
+needed to use the low level virtual machine.  It contains an
+assembler, disassembler, bitcode analyzer and bitcode optimizer.  It
+also contains basic regression tests that can be used to test the LLVM
+tools and the GCC front end.</p>
+
+<p>The second piece is the GCC front end.  This component provides a version of
+GCC that compiles C and C++ code into LLVM bitcode.  Currently, the GCC front
+end uses the GCC parser to convert code to LLVM.  Once
+compiled into LLVM bitcode, a program can be manipulated with the LLVM tools
+from the LLVM suite.</p>
+
+<p>
+There is a third, optional piece called Test Suite.  It is a suite of programs
+with a testing harness that can be used to further test LLVM's functionality
+and performance.
+</p>
+
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_section">
+  <a name="quickstart"><b>Getting Started Quickly (A Summary)</b></a>
+</div>
+<!-- *********************************************************************** -->
+
+<div class="doc_text">
+
+<p>Here's the short story for getting up and running quickly with LLVM:</p>
+
+<ol>
+  <li>Read the documentation.</li>
+  <li>Read the documentation.</li>
+  <li>Remember that you were warned twice about reading the documentation.</li>
+  <li>Install the llvm-gcc-4.2 front end if you intend to compile C or C++
+      (see <a href="#installcf">Install the GCC Front End</a> for details):</li>
+    <ol>
+      <li><tt>cd <i>where-you-want-the-C-front-end-to-live</i></tt></li>
+      <li><tt>gunzip --stdout llvm-gcc-4.2-<i>version</i>-<i>platform</i>.tar.gz | tar -xvf -</tt></li>
+	  <li><tt><i>install-binutils-binary-from-MinGW</i></tt> (Windows only)</li>
+	  <li>Note: If the binary extension is "<tt>.bz</tt>" use <tt>bunzip2</tt> instead of <tt>gunzip</tt>.</li>
+	  <li>Note: On Windows, use <a href="http://www.7-zip.org">7-Zip</a> or a similar archiving tool.</li>
+	  <li>Add <tt>llvm-gcc</tt>'s "<tt>bin</tt>" directory to your <tt>PATH</tt> environment variable.</li>
+    </ol></li>
+
+  <li>Get the LLVM Source Code
+  <ul>
+    <li>With the distributed files (or use <a href="#checkout">SVN</a>):
+    <ol>
+      <li><tt>cd <i>where-you-want-llvm-to-live</i></tt>
+      <li><tt>gunzip --stdout llvm-<i>version</i>.tar.gz | tar -xvf -</tt>
+    </ol></li>
+
+  </ul></li>
+
+  <li><b>[Optional]</b> Get the Test Suite Source Code 
+  <ul>
+    <li>With the distributed files (or use <a href="#checkout">SVN</a>):
+    <ol>
+      <li><tt>cd <i>where-you-want-llvm-to-live</i></tt>
+      <li><tt>cd llvm/projects</tt>
+      <li><tt>gunzip --stdout llvm-test-<i>version</i>.tar.gz | tar -xvf -</tt>
+      <li><tt>mv llvm-test-<i>version</i> test-suite</tt>
+    </ol></li>
+
+  </ul></li>
+
+
+  <li>Configure the LLVM Build Environment
+  <ol>
+    <li><tt>cd <i>where-you-want-to-build-llvm</i></tt></li>
+    <li><tt><i>/path/to/llvm/</i>configure [options]</tt><br>
+    Some common options:
+
+      <ul>
+        <li><tt>--prefix=<i>directory</i></tt>
+        <p>Specify for <i>directory</i> the full pathname of where you
+        want the LLVM tools and libraries to be installed (default
+        <tt>/usr/local</tt>).</p></li>
+        <li><tt>--with-llvmgccdir=<i>directory</i></tt>
+        <p>Optionally, specify for <i>directory</i> the full pathname of the 
+        C/C++ front end installation to use with this LLVM configuration. If
+        not specified, the PATH will be searched.  This is only needed if you
+        want to run test-suite or do some special kinds of LLVM builds.</p></li>
+        <li><tt>--enable-spec2000=<i>directory</i></tt>
+            <p>Enable the SPEC2000 benchmarks for testing.  The SPEC2000
+            benchmarks should be available in
+            <tt><i>directory</i></tt>.</p></li>
+      </ul>
+  </ol></li>
+
+  <li>Build the LLVM Suite:
+  <ol>
+      <li><tt>gmake -k |&amp; tee gnumake.out
+      &nbsp;&nbsp;&nbsp;# this is csh or tcsh syntax</tt></li>
+      <li>If you get an "internal compiler error (ICE)" or test failures, see 
+          <a href="#brokengcc">below</a>.</li>
+  </ol>
+
+</ol>
+
+<p>Consult the <a href="#starting">Getting Started with LLVM</a> section for
+detailed information on configuring and compiling LLVM.  See <a
+href="#environment">Setting Up Your Environment</a> for tips that simplify
+working with the GCC front end and LLVM tools.  Go to <a href="#layout">Program
+Layout</a> to learn about the layout of the source code tree.</p>
+
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_section">
+  <a name="requirements"><b>Requirements</b></a>
+</div>
+<!-- *********************************************************************** -->
+
+<div class="doc_text">
+
+<p>Before you begin to use the LLVM system, review the requirements given below.
+This may save you some trouble by knowing ahead of time what hardware and
+software you will need.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="hardware"><b>Hardware</b></a>
+</div>
+
+<div class="doc_text">
+
+<p>LLVM is known to work on the following platforms:</p>
+
+<table cellpadding="3" summary="Known LLVM platforms">
+<tr>
+  <th>OS</th>
+  <th>Arch</th>
+  <th>Compilers</th>
+</tr>
+<tr>
+  <td>AuroraUX</td>
+  <td>x86<sup><a href="#pf_1">1</a></sup></td>
+  <td>GCC</td>
+</tr>
+<tr>
+  <td>Linux</td>
+  <td>x86<sup><a href="#pf_1">1</a></sup></td>
+  <td>GCC</td>
+</tr>
+<tr>
+  <td>Linux</td>
+  <td>amd64</td>
+  <td>GCC</td>
+</tr>
+<tr>
+  <td>Solaris</td>
+  <td>V9 (Ultrasparc)</td>
+  <td>GCC</td>
+</tr>
+<tr>
+  <td>FreeBSD</td>
+  <td>x86<sup><a href="#pf_1">1</a></sup></td>
+  <td>GCC</td>
+</tr>
+<tr>
+  <td>FreeBSD</td>
+  <td>amd64</td>
+  <td>GCC</td>
+</tr>
+<tr>
+  <td>MacOS X<sup><a href="#pf_2">2</a></sup></td>
+  <td>PowerPC</td>
+  <td>GCC</td>
+</tr>
+<tr>
+  <td>MacOS X<sup><a href="#pf_2">2</a>,<a href="#pf_9">9</a></sup></td>
+  <td>x86</td>
+  <td>GCC</td>
+</tr>
+<tr>
+  <td>Cygwin/Win32</td>
+  <td>x86<sup><a href="#pf_1">1</a>,<a href="#pf_8">8</a>,
+     <a href="#pf_11">11</a></sup></td>
+  <td>GCC 3.4.X, binutils 2.20</td>
+</tr>
+<tr>
+  <td>MinGW/Win32</td>
+  <td>x86<sup><a href="#pf_1">1</a>,<a href="#pf_6">6</a>,
+     <a href="#pf_8">8</a>, <a href="#pf_10">10</a></sup></td>
+  <td>GCC 3.4.X, binutils 2.20</td>
+</tr>
+</table>
+
+<p>LLVM has partial support for the following platforms:</p>
+
+<table summary="LLVM partial platform support">
+<tr>
+  <th>OS</th>
+  <th>Arch</th>
+  <th>Compilers</th>
+</tr>
+<tr>
+  <td>Windows</td>
+  <td>x86<sup><a href="#pf_1">1</a></sup></td>
+  <td>Visual Studio 2005 SP1 or higher<sup><a href="#pf_4">4</a>,<a href="#pf_5">5</a></sup></td>
+<tr>
+  <td>AIX<sup><a href="#pf_3">3</a>,<a href="#pf_4">4</a></sup></td>
+  <td>PowerPC</td>
+  <td>GCC</td>
+</tr>
+<tr>
+  <td>Linux<sup><a href="#pf_3">3</a>,<a href="#pf_5">5</a></sup></td>
+  <td>PowerPC</td>
+  <td>GCC</td>
+</tr>
+
+<tr>
+  <td>Linux<sup><a href="#pf_7">7</a></sup></td>
+  <td>Alpha</td>
+  <td>GCC</td>
+</tr>
+<tr>
+  <td>Linux<sup><a href="#pf_7">7</a></sup></td>
+  <td>Itanium (IA-64)</td>
+  <td>GCC</td>
+</tr>
+<tr>
+  <td>HP-UX<sup><a href="#pf_7">7</a></sup></td>
+  <td>Itanium (IA-64)</td>
+  <td>HP aCC</td>
+</tr>
+</table>
+
+<p><b>Notes:</b></p>
+
+<div class="doc_notes">
+<ol>
+<li><a name="pf_1">Code generation supported for Pentium processors and
+up</a></li>
+<li><a name="pf_2">Code generation supported for 32-bit ABI only</a></li>
+<li><a name="pf_3">No native code generation</a></li>
+<li><a name="pf_4">Build is not complete: one or more tools do not link or function</a></li>
+<li><a name="pf_5">The GCC-based C/C++ frontend does not build</a></li>
+<li><a name="pf_6">The port is done using the MSYS shell.</a></li>
+<li><a name="pf_7">Native code generation exists but is not complete.</a></li>
+<li><a name="pf_8">Binutils 2.20 or later is required to build the assembler
+    generated by LLVM properly.</a></li>
+<li><a name="pf_9">XCode 2.5 and gcc 4.0.1</a> (Apple Build 5370) will trip
+    internal LLVM assert messages when compiled for Release at optimization
+    levels greater than 0 (i.e., <i>"-O1"</i> and higher).
+    Add <i>OPTIMIZE_OPTION="-O0"</i> to the build command line
+    if compiling for LLVM Release or bootstrapping the LLVM toolchain.</li>
+<li><a name="pf_10">For MSYS/MinGW on Windows, be sure to install the MSYS
+    version of the perl package, and be sure it appears in your path
+    before any Windows-based versions such as Strawberry Perl and
+    ActivePerl, as these have Windows-specifics that will cause the
+    build to fail.</a></li>
+<li><a name="pf_11">In general, LLVM modules requiring dynamic linking can
+    not be built on Windows. However, you can build LLVM tools using
+    <i>"make tools-only"</i>.</li>
+</ol>
+</div>
+
+<p>Note that you will need about 1-3 GB of space for a full LLVM build in Debug
+mode, depending on the system (it is so large because of all the debugging
+information and the fact that the libraries are statically linked into multiple
+tools).  If you do not need many of the tools and you are space-conscious, you
+can pass <tt>ONLY_TOOLS="tools you need"</tt> to make.  The Release build
+requires considerably less space.</p>
+
+<p>The LLVM suite <i>may</i> compile on other platforms, but it is not
+guaranteed to do so.  If compilation is successful, the LLVM utilities should be
+able to assemble, disassemble, analyze, and optimize LLVM bitcode.  Code
+generation should work as well, although the generated native code may not work
+on your platform.</p>
+
+<p>The GCC front end is not very portable at the moment.  If you want to get it
+to work on another platform, you can download a copy of the source and <a
+href="GCCFEBuildInstrs.html">try to compile it</a> on your platform.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection"><a name="software"><b>Software</b></a></div>
+<div class="doc_text">
+  <p>Compiling LLVM requires that you have several software packages 
+  installed. The table below lists those required packages. The Package column
+  is the usual name for the software package that LLVM depends on. The Version
+  column provides "known to work" versions of the package. The Notes column
+  describes how LLVM uses the package and provides other details.</p>
+  <table summary="Packages required to compile LLVM">
+    <tr><th>Package</th><th>Version</th><th>Notes</th></tr>
+
+    <tr>
+      <td><a href="http://savannah.gnu.org/projects/make">GNU Make</a></td>
+      <td>3.79, 3.79.1</td>
+      <td>Makefile/build processor</td>
+    </tr>
+
+    <tr>
+      <td><a href="http://gcc.gnu.org">GCC</a></td>
+      <td>3.4.2</td>
+      <td>C/C++ compiler<sup><a href="#sf1">1</a></sup></td>
+    </tr>
+
+    <tr>
+      <td><a href="http://www.gnu.org/software/texinfo">TeXinfo</a></td>
+      <td>4.5</td>
+      <td>For building the CFE</td>
+    </tr>
+
+    <tr>
+      <td><a href="http://subversion.tigris.org/project_packages.html">SVN</a></td>
+      <td>&ge;1.3</td>
+      <td>Subversion access to LLVM<sup><a href="#sf2">2</a></sup></td>
+    </tr>
+
+    <tr>
+      <td><a href="http://savannah.gnu.org/projects/dejagnu">DejaGnu</a></td>
+      <td>1.4.2</td>
+      <td>Automated test suite<sup><a href="#sf3">3</a></sup></td>
+    </tr>
+
+    <tr>
+      <td><a href="http://www.tcl.tk/software/tcltk/">tcl</a></td>
+      <td>8.3, 8.4</td>
+      <td>Automated test suite<sup><a href="#sf3">3</a></sup></td>
+    </tr>
+
+    <tr>
+      <td><a href="http://expect.nist.gov/">expect</a></td>
+      <td>5.38.0</td>
+      <td>Automated test suite<sup><a href="#sf3">3</a></sup></td>
+    </tr>
+
+    <tr>
+      <td><a href="http://www.perl.com/download.csp">perl</a></td>
+      <td>&ge;5.6.0</td>
+      <td>Nightly tester, utilities</td>
+    </tr>
+
+    <tr>
+      <td><a href="http://savannah.gnu.org/projects/m4">GNU M4</a>
+      <td>1.4</td>
+      <td>Macro processor for configuration<sup><a href="#sf4">4</a></sup></td>
+    </tr>
+
+    <tr>
+      <td><a href="http://www.gnu.org/software/autoconf">GNU Autoconf</a></td>
+      <td>2.60</td>
+      <td>Configuration script builder<sup><a href="#sf4">4</a></sup></td>
+    </tr>
+
+    <tr>
+      <td><a href="http://www.gnu.org/software/automake">GNU Automake</a></td>
+      <td>1.9.6</td>
+      <td>aclocal macro generator<sup><a href="#sf4">4</a></sup></td>
+    </tr>
+
+    <tr>
+      <td><a href="http://savannah.gnu.org/projects/libtool">libtool</a></td>
+      <td>1.5.22</td>
+      <td>Shared library manager<sup><a href="#sf4">4</a></sup></td>
+    </tr>
+
+  </table>
+
+  <p><b>Notes:</b></p>
+  <div class="doc_notes">
+  <ol>
+    <li><a name="sf1">Only the C and C++ languages are needed so there's no
+      need to build the other languages for LLVM's purposes.</a> See 
+      <a href="#brokengcc">below</a> for specific version info.</li>
+    <li><a name="sf2">You only need Subversion if you intend to build from the 
+      latest LLVM sources. If you're working from a release distribution, you
+      don't need Subversion.</a></li>
+    <li><a name="sf3">Only needed if you want to run the automated test 
+      suite in the <tt>llvm/test</tt> directory.</a></li>
+    <li><a name="sf4">If you want to make changes to the configure scripts, 
+      you will need GNU autoconf (2.60), and consequently, GNU M4 (version 1.4 
+      or higher). You will also need automake (1.9.6). We only use aclocal 
+      from that package.</a></li>
+  </ol>
+  </div>
+  
+  <p>Additionally, your compilation host is expected to have the usual 
+  plethora of Unix utilities. Specifically:</p>
+  <ul>
+    <li><b>ar</b> - archive library builder</li>
+    <li><b>bzip2*</b> - bzip2 command for distribution generation</li>
+    <li><b>bunzip2*</b> - bunzip2 command for distribution checking</li>
+    <li><b>chmod</b> - change permissions on a file</li>
+    <li><b>cat</b> - output concatenation utility</li>
+    <li><b>cp</b> - copy files</li>
+    <li><b>date</b> - print the current date/time </li>
+    <li><b>echo</b> - print to standard output</li>
+    <li><b>egrep</b> - extended regular expression search utility</li>
+    <li><b>find</b> - find files/dirs in a file system</li>
+    <li><b>grep</b> - regular expression search utility</li>
+    <li><b>gzip*</b> - gzip command for distribution generation</li>
+    <li><b>gunzip*</b> - gunzip command for distribution checking</li>
+    <li><b>install</b> - install directories/files </li>
+    <li><b>mkdir</b> - create a directory</li>
+    <li><b>mv</b> - move (rename) files</li>
+    <li><b>ranlib</b> - symbol table builder for archive libraries</li>
+    <li><b>rm</b> - remove (delete) files and directories</li>
+    <li><b>sed</b> - stream editor for transforming output</li>
+    <li><b>sh</b> - Bourne shell for make build scripts</li>
+    <li><b>tar</b> - tape archive for distribution generation</li>
+    <li><b>test</b> - test things in file system</li>
+    <li><b>unzip*</b> - unzip command for distribution checking</li>
+    <li><b>zip*</b> - zip command for distribution generation</li>
+  </ul>
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="brokengcc">Broken versions of GCC and other tools</a>
+</div>
+
+<div class="doc_text">
+
+<p>LLVM is very demanding of the host C++ compiler, and as such tends to expose
+bugs in the compiler.  In particular, several versions of GCC crash when trying
+to compile LLVM.  We routinely use GCC 3.3.3, 3.4.0, and Apple 4.0.1 
+successfully with them (however, see important notes below).  Other versions 
+of GCC will probably work as well.  GCC versions listed
+here are known to not work.  If you are using one of these versions, please try
+to upgrade your GCC to something more recent.  If you run into a problem with a
+version of GCC not listed here, please <a href="mailto:llvmdev at cs.uiuc.edu">let
+us know</a>.  Please use the "<tt>gcc -v</tt>" command to find out which version
+of GCC you are using.
+</p>
+
+<p><b>GCC versions prior to 3.0</b>: GCC 2.96.x and before had several
+problems in the STL that effectively prevent it from compiling LLVM.
+</p>
+
+<p><b>GCC 3.2.2 and 3.2.3</b>: These versions of GCC fails to compile LLVM with
+a bogus template error.  This was fixed in later GCCs.</p>
+
+<p><b>GCC 3.3.2</b>: This version of GCC suffered from a <a 
+href="http://gcc.gnu.org/PR13392">serious bug</a> which causes it to crash in
+the "<tt>convert_from_eh_region_ranges_1</tt>" GCC function.</p>
+
+<p><b>Cygwin GCC 3.3.3</b>: The version of GCC 3.3.3 commonly shipped with 
+   Cygwin does not work.  Please <a href="GCCFEBuildInstrs.html#cygwin">upgrade 
+   to a newer version</a> if possible.</p>
+<p><b>SuSE GCC 3.3.3</b>: The version of GCC 3.3.3 shipped with SuSE 9.1 (and 
+   possibly others) does not compile LLVM correctly (it appears that exception 
+   handling is broken in some cases).  Please download the FSF 3.3.3 or upgrade
+   to a newer version of GCC.</p>
+<p><b>GCC 3.4.0 on linux/x86 (32-bit)</b>: GCC miscompiles portions of the 
+   code generator, causing an infinite loop in the llvm-gcc build when built
+   with optimizations enabled (i.e. a release build).</p>
+<p><b>GCC 3.4.2 on linux/x86 (32-bit)</b>: GCC miscompiles portions of the 
+   code generator at -O3, as with 3.4.0.  However gcc 3.4.2 (unlike 3.4.0)
+   correctly compiles LLVM at -O2.  A work around is to build release LLVM
+   builds with "make ENABLE_OPTIMIZED=1 OPTIMIZE_OPTION=-O2 ..."</p>
+<p><b>GCC 3.4.x on X86-64/amd64</b>: GCC <a href="http://llvm.org/PR1056">
+   miscompiles portions of LLVM</a>.</p>
+<p><b>GCC 3.4.4 (CodeSourcery ARM 2005q3-2)</b>: this compiler miscompiles LLVM
+   when building with optimizations enabled.  It appears to work with 
+   "<tt>make ENABLE_OPTIMIZED=1 OPTIMIZE_OPTION=-O1</tt>" or build a debug
+   build.</p>
+<p><b>IA-64 GCC 4.0.0</b>: The IA-64 version of GCC 4.0.0 is known to
+   miscompile LLVM.</p>
+<p><b>Apple Xcode 2.3</b>: GCC crashes when compiling LLVM at -O3 (which is the
+   default with ENABLE_OPTIMIZED=1.  To work around this, build with 
+   "ENABLE_OPTIMIZED=1 OPTIMIZE_OPTION=-O2".</p>
+<p><b>GCC 4.1.1</b>: GCC fails to build LLVM with template concept check errors
+      compiling some files.  At the time of this writing, GCC mainline (4.2)
+      did not share the problem.</p>
+<p><b>GCC 4.1.1 on X86-64/amd64</b>: GCC <a href="http://llvm.org/PR1063">
+   miscompiles portions of LLVM</a> when compiling llvm itself into 64-bit 
+   code.  LLVM will appear to mostly work but will be buggy, e.g. failing 
+   portions of its testsuite.</p>
+<p><b>GCC 4.1.2 on OpenSUSE</b>: Seg faults during libstdc++ build and on x86_64
+platforms compiling md5.c gets a mangled constant.</p>
+<p><b>GCC 4.1.2 (20061115 (prerelease) (Debian 4.1.1-21)) on Debian</b>: Appears
+to miscompile parts of LLVM 2.4. One symptom is ValueSymbolTable complaining
+about symbols remaining in the table on destruction.</p>
+<p><b>GCC 4.1.2 20071124 (Red Hat 4.1.2-42)</b>: Suffers from the same symptoms
+as the previous one. It appears to work with ENABLE_OPTIMIZED=0 (the default).</p>
+<p><b>Cygwin GCC 4.3.2 20080827 (beta) 2</b>:
+  Users <a href="http://llvm.org/PR4145">reported</a> various problems related
+  with link errors when using this GCC version.</p>
+<p><b>Debian GCC 4.3.2 on X86</b>: Crashes building some files in LLVM 2.6.</p>
+<p><b>GCC 4.3.3 (Debian 4.3.3-10) on ARM</b>: Miscompiles parts of LLVM 2.6
+when optimizations are turned on. The symptom is an infinite loop in
+FoldingSetImpl::RemoveNode while running the code generator.</p>
+<p><b>GCC 4.3.5 and GCC 4.4.5 on ARM</b>: These can miscompile <tt>value >>
+1</tt> even at -O0. A test failure in <tt>test/Assembler/alignstack.ll</tt> is
+one symptom of the problem.
+<p><b>GNU ld 2.16.X</b>. Some 2.16.X versions of the ld linker will produce very
+long warning messages complaining that some ".gnu.linkonce.t.*" symbol was
+defined in a discarded section. You can safely ignore these messages as they are
+erroneous and the linkage is correct.  These messages disappear using ld
+2.17.</p>
+
+<p><b>GNU binutils 2.17</b>: Binutils 2.17 contains <a 
+href="http://sourceware.org/bugzilla/show_bug.cgi?id=3111">a bug</a> which
+causes huge link times (minutes instead of seconds) when building LLVM.  We
+recommend upgrading to a newer version (2.17.50.0.4 or later).</p>
+
+<p><b>GNU Binutils 2.19.1 Gold</b>: This version of Gold contained
+<a href="http://sourceware.org/bugzilla/show_bug.cgi?id=9836">a bug</a>
+which causes intermittent failures when building LLVM with position independent
+code.  The symptom is an error about cyclic dependencies.  We recommend
+upgrading to a newer version of Gold.</p>
+
+</div>
+
+
+
+<!-- *********************************************************************** -->
+<div class="doc_section">
+  <a name="starting"><b>Getting Started with LLVM</b></a>
+</div>
+<!-- *********************************************************************** -->
+
+<div class="doc_text">
+
+<p>The remainder of this guide is meant to get you up and running with
+LLVM and to give you some basic information about the LLVM environment.</p>
+
+<p>The later sections of this guide describe the <a
+href="#layout">general layout</a> of the the LLVM source tree, a <a
+href="#tutorial">simple example</a> using the LLVM tool chain, and <a
+href="#links">links</a> to find more information about LLVM or to get
+help via e-mail.</p>
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="terminology">Terminology and Notation</a>
+</div>
+
+<div class="doc_text">
+
+<p>Throughout this manual, the following names are used to denote paths
+specific to the local system and working environment.  <i>These are not
+environment variables you need to set but just strings used in the rest
+of this document below</i>.  In any of the examples below, simply replace
+each of these names with the appropriate pathname on your local system.
+All these paths are absolute:</p>
+
+<dl>
+    <dt>SRC_ROOT
+    <dd>
+    This is the top level directory of the LLVM source tree.
+    <br><br>
+
+    <dt>OBJ_ROOT
+    <dd>
+    This is the top level directory of the LLVM object tree (i.e. the
+    tree where object files and compiled programs will be placed.  It
+    can be the same as SRC_ROOT).
+    <br><br>
+
+    <dt>LLVMGCCDIR
+    <dd>
+    This is where the LLVM GCC Front End is installed.
+    <p>
+    For the pre-built GCC front end binaries, the LLVMGCCDIR is
+    <tt>llvm-gcc/<i>platform</i>/llvm-gcc</tt>.
+</dl>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="environment">Setting Up Your Environment</a>
+</div>
+
+<div class="doc_text">
+
+<p>
+In order to compile and use LLVM, you may need to set some environment
+variables.
+
+<dl>
+  <dt><tt>LLVM_LIB_SEARCH_PATH</tt>=<tt>/path/to/your/bitcode/libs</tt></dt>
+  <dd>[Optional] This environment variable helps LLVM linking tools find the
+  locations of your bitcode libraries. It is provided only as a
+  convenience since you can specify the paths using the -L options of the
+  tools and the C/C++ front-end will automatically use the bitcode files
+  installed in its
+  <tt>lib</tt> directory.</dd>
+</dl>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="unpack">Unpacking the LLVM Archives</a>
+</div>
+
+<div class="doc_text">
+
+<p>
+If you have the LLVM distribution, you will need to unpack it before you
+can begin to compile it.  LLVM is distributed as a set of two files: the LLVM
+suite and the LLVM GCC front end compiled for your platform.  There is an
+additional test suite that is optional.  Each file is a TAR archive that is
+compressed with the gzip program.
+</p>
+
+<p>The files are as follows, with <em>x.y</em> marking the version number:
+<dl>
+  <dt><tt>llvm-x.y.tar.gz</tt></dt>
+  <dd>Source release for the LLVM libraries and tools.<br></dd>
+
+  <dt><tt>llvm-test-x.y.tar.gz</tt></dt>
+  <dd>Source release for the LLVM test-suite.</dd>
+
+  <dt><tt>llvm-gcc-4.2-x.y.source.tar.gz</tt></dt>
+  <dd>Source release of the llvm-gcc-4.2 front end.  See README.LLVM in the root
+      directory for build instructions.<br></dd>
+
+  <dt><tt>llvm-gcc-4.2-x.y-platform.tar.gz</tt></dt>
+  <dd>Binary release of the llvm-gcc-4.2 front end for a specific platform.<br></dd>
+
+</dl>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="checkout">Checkout LLVM from Subversion</a>
+</div>
+
+<div class="doc_text">
+
+<p>If you have access to our Subversion repository, you can get a fresh copy of
+the entire source code.  All you need to do is check it out from Subversion as
+follows:</p>
+
+<ul>
+  <li><tt>cd <i>where-you-want-llvm-to-live</i></tt></li>
+  <li>Read-Only: <tt>svn co http://llvm.org/svn/llvm-project/llvm/trunk llvm</tt></li>
+  <li>Read-Write:<tt>svn co https://user at llvm.org/svn/llvm-project/llvm/trunk
+    llvm</tt></li>
+</ul>
+
+
+<p>This will create an '<tt>llvm</tt>' directory in the current
+directory and fully populate it with the LLVM source code, Makefiles,
+test directories, and local copies of documentation files.</p>
+
+<p>If you want to get a specific release (as opposed to the most recent
+revision), you can checkout it from the '<tt>tags</tt>' directory (instead of
+'<tt>trunk</tt>'). The following releases are located in the following
+subdirectories of the '<tt>tags</tt>' directory:</p>
+
+<ul>
+<li>Release 2.9: <b>RELEASE_29</b></li>
+<li>Release 2.8: <b>RELEASE_28</b></li>
+<li>Release 2.7: <b>RELEASE_27</b></li>
+<li>Release 2.6: <b>RELEASE_26</b></li>
+<li>Release 2.5: <b>RELEASE_25</b></li>
+<li>Release 2.4: <b>RELEASE_24</b></li>
+<li>Release 2.3: <b>RELEASE_23</b></li>
+<li>Release 2.2: <b>RELEASE_22</b></li>
+<li>Release 2.1: <b>RELEASE_21</b></li>
+<li>Release 2.0: <b>RELEASE_20</b></li>
+<li>Release 1.9: <b>RELEASE_19</b></li>
+<li>Release 1.8: <b>RELEASE_18</b></li>
+<li>Release 1.7: <b>RELEASE_17</b></li>
+<li>Release 1.6: <b>RELEASE_16</b></li>
+<li>Release 1.5: <b>RELEASE_15</b></li>
+<li>Release 1.4: <b>RELEASE_14</b></li>
+<li>Release 1.3: <b>RELEASE_13</b></li>
+<li>Release 1.2: <b>RELEASE_12</b></li>
+<li>Release 1.1: <b>RELEASE_11</b></li>
+<li>Release 1.0: <b>RELEASE_1</b></li>
+</ul>
+
+<p>If you would like to get the LLVM test suite (a separate package as of 1.4),
+you get it from the Subversion repository:</p>
+
+<div class="doc_code">
+<pre>
+% cd llvm/projects
+% svn co http://llvm.org/svn/llvm-project/test-suite/trunk test-suite
+</pre>
+</div>
+
+<p>By placing it in the <tt>llvm/projects</tt>, it will be automatically
+configured by the LLVM configure script as well as automatically updated when
+you run <tt>svn update</tt>.</p>
+
+<p>If you would like to get the GCC front end source code, you can also get it 
+and build it yourself.  Please follow <a href="GCCFEBuildInstrs.html">these 
+instructions</a> to successfully get and build the LLVM GCC front-end.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="git_mirror">GIT mirror</a>
+</div>
+
+<div class="doc_text">
+
+<p>GIT mirrors are available for a number of LLVM subprojects. These mirrors
+  sync automatically with each Subversion commit and contain all necessary
+  git-svn marks (so, you can recreate git-svn metadata locally). Note that right
+  now mirrors reflect only <tt>trunk</tt> for each project. You can do the
+  read-only GIT clone of LLVM via: 
+<pre>
+% git clone http://llvm.org/git/llvm.git
+</pre>
+</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="installcf">Install the GCC Front End</a>
+</div>
+
+<div class="doc_text">
+
+<p>Before configuring and compiling the LLVM suite (or if you want to use just the LLVM
+GCC front end) you can optionally extract the front end from the binary distribution.
+It is used for running the LLVM test-suite and for compiling C/C++ programs.  Note that
+you can optionally <a href="GCCFEBuildInstrs.html">build llvm-gcc yourself</a> after building the
+main LLVM repository.</p>
+
+<p>To install the GCC front end, do the following (on Windows, use an archival tool
+like <a href="http://www.7-zip.org">7-zip</a> that understands gzipped tars):</p>
+
+<ol>
+  <li><tt>cd <i>where-you-want-the-front-end-to-live</i></tt></li>
+  <li><tt>gunzip --stdout llvm-gcc-4.2-<i>version</i>-<i>platform</i>.tar.gz | tar -xvf
+      -</tt></li>
+</ol>
+
+<p>Once the binary is uncompressed, if you're using a *nix-based system, add a symlink for
+<tt>llvm-gcc</tt> and <tt>llvm-g++</tt> to some directory in your path.  If you're using a
+Windows-based system, add the <tt>bin</tt> subdirectory of your front end installation directory
+to your <tt>PATH</tt> environment variable.  For example, if you uncompressed the binary to
+<tt>c:\llvm-gcc</tt>, add <tt>c:\llvm-gcc\bin</tt> to your <tt>PATH</tt>.</p>
+
+<p>If you now want to build LLVM from source, when you configure LLVM, it will 
+automatically detect <tt>llvm-gcc</tt>'s presence (if it is in your path) enabling its
+use in test-suite.  Note that you can always build or install <tt>llvm-gcc</tt> at any
+point after building the main LLVM repository: just reconfigure llvm and 
+test-suite will pick it up.
+</p>
+
+<p>As a convenience for Windows users, the front end binaries for MinGW/x86 include
+versions of the required w32api and mingw-runtime binaries.  The last remaining step for
+Windows users is to simply uncompress the binary binutils package from
+<a href="http://mingw.org/">MinGW</a> into your front end installation directory.  While the
+front end installation steps are not quite the same as a typical manual MinGW installation,
+they should be similar enough to those who have previously installed MinGW on Windows systems.</p>
+
+<p>To install binutils on Windows:</p>
+
+<ol>
+  <li><tt><i>download GNU Binutils from <a href="http://sourceforge.net/projects/mingw/files/">MinGW Downloads</a></i></tt></li>
+  <li><tt>cd <i>where-you-uncompressed-the-front-end</i></tt></li>
+  <li><tt><i>uncompress archived binutils directories (not the tar file) into the current directory</i></tt></li>
+</ol>
+
+<p>The binary versions of the LLVM GCC front end may not suit all of your needs.  For
+example, the binary distribution may include an old version of a system header
+file, not "fix" a header file that needs to be fixed for GCC, or it may be linked with
+libraries not available on your system.  In cases like these, you may want to try
+<a href="GCCFEBuildInstrs.html">building the GCC front end from source</a>.  Thankfully,
+this is much easier now than it was in the past.</p>
+
+<p>We also do not currently support updating of the GCC front end by manually overlaying
+newer versions of the w32api and mingw-runtime binary packages that may become available
+from MinGW.  At this time, it's best to think of the MinGW LLVM GCC front end binary as
+a self-contained convenience package that requires Windows users to simply download and
+uncompress the GNU Binutils binary package from the MinGW project.</p>
+
+<p>Regardless of your platform, if you discover that installing the LLVM GCC front end
+binaries is not as easy as previously described, or you would like to suggest improvements,
+please let us know how you would like to see things improved by dropping us a note on our
+<a href="http://llvm.org/docs/#maillist">mailing list</a>.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="config">Local LLVM Configuration</a>
+</div>
+
+<div class="doc_text">
+
+  <p>Once checked out from the Subversion repository, the LLVM suite source 
+  code must be
+configured via the <tt>configure</tt> script.  This script sets variables in the
+various <tt>*.in</tt> files, most notably <tt>llvm/Makefile.config</tt> and 
+<tt>llvm/include/Config/config.h</tt>.  It also populates <i>OBJ_ROOT</i> with 
+the Makefiles needed to begin building LLVM.</p>
+
+<p>The following environment variables are used by the <tt>configure</tt>
+script to configure the build system:</p>
+
+<table summary="LLVM configure script environment variables">
+  <tr><th>Variable</th><th>Purpose</th></tr>
+  <tr>
+    <td>CC</td>
+    <td>Tells <tt>configure</tt> which C compiler to use.  By default,
+        <tt>configure</tt> will look for the first GCC C compiler in
+        <tt>PATH</tt>.  Use this variable to override
+        <tt>configure</tt>'s default behavior.</td>
+  </tr>
+  <tr>
+    <td>CXX</td>
+    <td>Tells <tt>configure</tt> which C++ compiler to use.  By default,
+       <tt>configure</tt> will look for the first GCC C++ compiler in
+       <tt>PATH</tt>.  Use this variable to override
+       <tt>configure</tt>'s default behavior.</td>
+  </tr>
+</table>
+
+<p>The following options can be used to set or enable LLVM specific options:</p>
+
+<dl>
+  <dt><i>--with-llvmgccdir</i></dt>
+  <dd>Path to the LLVM C/C++ FrontEnd to be used with this LLVM configuration. 
+  The value of this option should specify the full pathname of the C/C++ Front
+  End to be used. If this option is not provided, the PATH will be searched for
+  a program named <i>llvm-gcc</i> and the C/C++ FrontEnd install directory will
+  be inferred from the path found. If the option is not given, and no llvm-gcc
+  can be found in the path then a warning will be produced by 
+  <tt>configure</tt> indicating this situation. LLVM may still be built with 
+  the <tt>tools-only</tt> target but attempting to build the runtime libraries
+  will fail as these libraries require llvm-gcc and llvm-g++. See 
+  <a href="#installcf">Install the GCC Front End</a> for details on installing
+  the C/C++ Front End. See
+  <a href="GCCFEBuildInstrs.html">Bootstrapping the LLVM C/C++ Front-End</a>
+  for details on building the C/C++ Front End.</dd>
+  <dt><i>--with-tclinclude</i></dt>
+  <dd>Path to the tcl include directory under which <tt>tclsh</tt> can be
+  found. Use this if you have multiple tcl installations on your machine and you
+  want to use a specific one (8.x) for LLVM. LLVM only uses tcl for running the
+  dejagnu based test suite in <tt>llvm/test</tt>. If you don't specify this
+  option, the LLVM configure script will search for the tcl 8.4 and 8.3
+  releases.
+  <br><br>
+  </dd>
+  <dt><i>--enable-optimized</i></dt>
+  <dd>
+    Enables optimized compilation (debugging symbols are removed
+    and GCC optimization flags are enabled). Note that this is the default 
+    setting     if you are using the LLVM distribution. The default behavior 
+    of an Subversion checkout is to use an unoptimized build (also known as a 
+    debug build).
+    <br><br>
+  </dd>
+  <dt><i>--enable-debug-runtime</i></dt>
+  <dd>
+    Enables debug symbols in the runtime libraries. The default is to strip
+    debug symbols from the runtime libraries. 
+  </dd>
+  <dt><i>--enable-jit</i></dt>
+  <dd>
+    Compile the Just In Time (JIT) compiler functionality.  This is not
+    available
+    on all platforms.  The default is dependent on platform, so it is best
+    to explicitly enable it if you want it.
+    <br><br>
+  </dd>
+  <dt><i>--enable-targets=</i><tt>target-option</tt></dt>
+  <dd>Controls which targets will be built and linked into llc. The default 
+  value for <tt>target_options</tt> is "all" which builds and links all 
+  available targets.  The value "host-only" can be specified to build only a 
+  native compiler (no cross-compiler targets available). The "native" target is 
+  selected as the target of the build host. You can also specify a comma 
+  separated list of target names that you want available in llc. The target 
+  names use all lower case. The current set of targets is: <br>
+  <tt>alpha, ia64, powerpc, skeleton, sparc, x86</tt>.
+  <br><br></dd>
+  <dt><i>--enable-doxygen</i></dt>
+  <dd>Look for the doxygen program and enable construction of doxygen based
+  documentation from the source code. This is disabled by default because 
+  generating the documentation can take a long time and producess 100s of 
+  megabytes of output.</dd>
+  <dt><i>--with-udis86</i></dt>
+  <dd>LLVM can use external disassembler library for various purposes (now it's
+  used only for examining code produced by JIT). This option will enable usage
+  of <a href="http://udis86.sourceforge.net/">udis86</a> x86 (both 32 and 64
+  bits) disassembler library.</dd>
+</dl>
+
+<p>To configure LLVM, follow these steps:</p>
+
+<ol>
+    <li><p>Change directory into the object root directory:</p>
+
+    <div class="doc_code"><pre>% cd <i>OBJ_ROOT</i></pre></div></li>
+
+    <li><p>Run the <tt>configure</tt> script located in the LLVM source
+    tree:</p>
+
+    <div class="doc_code">
+    <pre>% <i>SRC_ROOT</i>/configure --prefix=/install/path [other options]</pre>
+    </div></li>
+</ol>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="compile">Compiling the LLVM Suite Source Code</a>
+</div>
+
+<div class="doc_text">
+
+<p>Once you have configured LLVM, you can build it.  There are three types of
+builds:</p>
+
+<dl>
+    <dt>Debug Builds
+    <dd>
+    These builds are the default when one is using an Subversion checkout and 
+    types <tt>gmake</tt> (unless the <tt>--enable-optimized</tt> option was 
+    used during configuration).  The build system will compile the tools and 
+    libraries with debugging information.  To get a Debug Build using the
+    LLVM distribution the <tt>--disable-optimized</tt> option must be passed
+    to <tt>configure</tt>.
+    <br><br>
+
+    <dt>Release (Optimized) Builds
+    <dd>
+    These builds are enabled with the <tt>--enable-optimized</tt> option to
+    <tt>configure</tt> or by specifying <tt>ENABLE_OPTIMIZED=1</tt> on the
+    <tt>gmake</tt> command line.  For these builds, the build system will
+    compile the tools and libraries with GCC optimizations enabled and strip
+    debugging information from the libraries and executables it generates. 
+    Note that Release Builds are default when using an LLVM distribution.
+    <br><br>
+
+    <dt>Profile Builds
+    <dd>
+    These builds are for use with profiling.  They compile profiling
+    information into the code for use with programs like <tt>gprof</tt>.
+    Profile builds must be started by specifying <tt>ENABLE_PROFILING=1</tt>
+    on the <tt>gmake</tt> command line.
+</dl>
+
+<p>Once you have LLVM configured, you can build it by entering the
+<i>OBJ_ROOT</i> directory and issuing the following command:</p>
+
+<div class="doc_code"><pre>% gmake</pre></div>
+
+<p>If the build fails, please <a href="#brokengcc">check here</a> to see if you
+are using a version of GCC that is known not to compile LLVM.</p>
+
+<p>
+If you have multiple processors in your machine, you may wish to use some of
+the parallel build options provided by GNU Make.  For example, you could use the
+command:</p>
+
+<div class="doc_code"><pre>% gmake -j2</pre></div>
+
+<p>There are several special targets which are useful when working with the LLVM
+source code:</p>
+
+<dl>
+  <dt><tt>gmake clean</tt>
+  <dd>
+  Removes all files generated by the build.  This includes object files,
+  generated C/C++ files, libraries, and executables.
+  <br><br>
+
+  <dt><tt>gmake dist-clean</tt>
+  <dd>
+  Removes everything that <tt>gmake clean</tt> does, but also removes files
+  generated by <tt>configure</tt>.  It attempts to return the source tree to the
+  original state in which it was shipped.
+  <br><br>
+
+  <dt><tt>gmake install</tt>
+  <dd>
+  Installs LLVM header files, libraries, tools, and documentation in a
+  hierarchy 
+  under $PREFIX, specified with <tt>./configure --prefix=[dir]</tt>, which 
+  defaults to <tt>/usr/local</tt>.
+  <br><br>
+
+  <dt><tt>gmake -C runtime install-bytecode</tt>
+  <dd>
+  Assuming you built LLVM into $OBJDIR, when this command is run, it will 
+  install bitcode libraries into the GCC front end's bitcode library 
+  directory.  If you need to update your bitcode libraries,
+  this is the target to use once you've built them.
+  <br><br>
+</dl>
+
+<p>Please see the <a href="MakefileGuide.html">Makefile Guide</a> for further
+details on these <tt>make</tt> targets and descriptions of other targets
+available.</p>
+
+<p>It is also possible to override default values from <tt>configure</tt> by
+declaring variables on the command line.  The following are some examples:</p>
+
+<dl>
+  <dt><tt>gmake ENABLE_OPTIMIZED=1</tt>
+  <dd>
+  Perform a Release (Optimized) build.
+  <br><br>
+
+  <dt><tt>gmake ENABLE_OPTIMIZED=1 DISABLE_ASSERTIONS=1</tt>
+  <dd>
+  Perform a Release (Optimized) build without assertions enabled.
+  <br><br>
+ 
+  <dt><tt>gmake ENABLE_OPTIMIZED=0</tt>
+  <dd>
+  Perform a Debug build.
+  <br><br>
+
+  <dt><tt>gmake ENABLE_PROFILING=1</tt>
+  <dd>
+  Perform a Profiling build.
+  <br><br>
+
+  <dt><tt>gmake VERBOSE=1</tt>
+  <dd>
+  Print what <tt>gmake</tt> is doing on standard output.
+  <br><br>
+
+  <dt><tt>gmake TOOL_VERBOSE=1</tt></dt>
+  <dd>Ask each tool invoked by the makefiles to print out what it is doing on 
+  the standard output. This also implies <tt>VERBOSE=1</tt>.
+  <br><br></dd>
+</dl>
+
+<p>Every directory in the LLVM object tree includes a <tt>Makefile</tt> to build
+it and any subdirectories that it contains.  Entering any directory inside the
+LLVM object tree and typing <tt>gmake</tt> should rebuild anything in or below
+that directory that is out of date.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="cross-compile">Cross-Compiling LLVM</a>
+</div>
+
+<div class="doc_text">
+  <p>It is possible to cross-compile LLVM itself. That is, you can create LLVM
+  executables and libraries to be hosted on a platform different from the
+  platform where they are build (a Canadian Cross build). To configure a
+  cross-compile, supply the configure script with <tt>--build</tt> and
+  <tt>--host</tt> options that are different. The values of these options must
+  be legal target triples that your GCC compiler supports.</p>
+
+  <p>The result of such a build is executables that are not runnable on
+  on the build host (--build option) but can be executed on the compile host
+  (--host option).</p>
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="objfiles">The Location of LLVM Object Files</a>
+</div>
+
+<div class="doc_text">
+
+<p>The LLVM build system is capable of sharing a single LLVM source tree among
+several LLVM builds.  Hence, it is possible to build LLVM for several different
+platforms or configurations using the same source tree.</p>
+
+<p>This is accomplished in the typical autoconf manner:</p>
+
+<ul>
+  <li><p>Change directory to where the LLVM object files should live:</p>
+
+      <div class="doc_code"><pre>% cd <i>OBJ_ROOT</i></pre></div></li>
+
+  <li><p>Run the <tt>configure</tt> script found in the LLVM source
+      directory:</p>
+
+      <div class="doc_code"><pre>% <i>SRC_ROOT</i>/configure</pre></div></li>
+</ul>
+
+<p>The LLVM build will place files underneath <i>OBJ_ROOT</i> in directories
+named after the build type:</p>
+
+<dl>
+  <dt>Debug Builds with assertions enabled (the default)
+  <dd>
+  <dl>
+    <dt>Tools
+    <dd><tt><i>OBJ_ROOT</i>/Debug+Asserts/bin</tt>
+    <dt>Libraries
+    <dd><tt><i>OBJ_ROOT</i>/Debug+Asserts/lib</tt>
+  </dl>
+  <br><br>
+
+  <dt>Release Builds
+  <dd>
+  <dl>
+    <dt>Tools
+    <dd><tt><i>OBJ_ROOT</i>/Release/bin</tt>
+    <dt>Libraries
+    <dd><tt><i>OBJ_ROOT</i>/Release/lib</tt>
+  </dl>
+  <br><br>
+
+  <dt>Profile Builds
+  <dd>
+  <dl>
+    <dt>Tools
+    <dd><tt><i>OBJ_ROOT</i>/Profile/bin</tt>
+    <dt>Libraries
+    <dd><tt><i>OBJ_ROOT</i>/Profile/lib</tt>
+  </dl>
+</dl>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="optionalconfig">Optional Configuration Items</a>
+</div>
+
+<div class="doc_text">
+
+<p>
+If you're running on a Linux system that supports the "<a
+href="http://www.tat.physik.uni-tuebingen.de/~rguenth/linux/binfmt_misc.html">binfmt_misc</a>"
+module, and you have root access on the system, you can set your system up to
+execute LLVM bitcode files directly. To do this, use commands like this (the
+first command may not be required if you are already using the module):</p>
+
+<div class="doc_code">
+<pre>
+$ mount -t binfmt_misc none /proc/sys/fs/binfmt_misc
+$ echo ':llvm:M::BC::/path/to/lli:' &gt; /proc/sys/fs/binfmt_misc/register
+$ chmod u+x hello.bc   (if needed)
+$ ./hello.bc
+</pre>
+</div>
+
+<p>
+This allows you to execute LLVM bitcode files directly.  On Debian, you 
+can also use this command instead of the 'echo' command above:</p>
+</p>
+
+<div class="doc_code">
+<pre>
+$ sudo update-binfmts --install llvm /path/to/lli --magic 'BC'
+</pre>
+</div>
+
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_section">
+  <a name="layout"><b>Program Layout</b></a>
+</div>
+<!-- *********************************************************************** -->
+
+<div class="doc_text">
+
+<p>One useful source of information about the LLVM source base is the LLVM <a
+href="http://www.doxygen.org">doxygen</a> documentation available at <tt><a
+href="http://llvm.org/doxygen/">http://llvm.org/doxygen/</a></tt>.
+The following is a brief introduction to code layout:</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection"><a name="examples"><tt>llvm/examples</tt></a></div>
+<div class="doc_text">
+  <p>This directory contains some simple examples of how to use the LLVM IR and
+  JIT.</p>
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection"><a name="include"><tt>llvm/include</tt></a></div>
+<div class="doc_text">
+
+<p>This directory contains public header files exported from the LLVM
+library. The three main subdirectories of this directory are:</p>
+
+<dl>
+  <dt><tt><b>llvm/include/llvm</b></tt></dt>
+  <dd>This directory contains all of the LLVM specific header files.  This 
+  directory also has subdirectories for different portions of LLVM: 
+  <tt>Analysis</tt>, <tt>CodeGen</tt>, <tt>Target</tt>, <tt>Transforms</tt>, 
+  etc...</dd>
+
+  <dt><tt><b>llvm/include/llvm/Support</b></tt></dt>
+  <dd>This directory contains generic support libraries that are provided with 
+  LLVM but not necessarily specific to LLVM. For example, some C++ STL utilities 
+  and a Command Line option processing library store their header files here.
+  </dd>
+
+  <dt><tt><b>llvm/include/llvm/Config</b></tt></dt>
+  <dd>This directory contains header files configured by the <tt>configure</tt> 
+  script.  They wrap "standard" UNIX and C header files.  Source code can 
+  include these header files which automatically take care of the conditional 
+  #includes that the <tt>configure</tt> script generates.</dd>
+</dl>
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection"><a name="lib"><tt>llvm/lib</tt></a></div>
+<div class="doc_text">
+
+<p>This directory contains most of the source files of the LLVM system. In LLVM,
+almost all code exists in libraries, making it very easy to share code among the
+different <a href="#tools">tools</a>.</p>
+
+<dl>
+  <dt><tt><b>llvm/lib/VMCore/</b></tt></dt>
+  <dd> This directory holds the core LLVM source files that implement core 
+  classes like Instruction and BasicBlock.</dd>
+
+  <dt><tt><b>llvm/lib/AsmParser/</b></tt></dt>
+  <dd>This directory holds the source code for the LLVM assembly language parser 
+  library.</dd>
+
+  <dt><tt><b>llvm/lib/BitCode/</b></tt></dt>
+  <dd>This directory holds code for reading and write LLVM bitcode.</dd>
+
+  <dt><tt><b>llvm/lib/Analysis/</b></tt><dd>This directory contains a variety of
+  different program analyses, such as Dominator Information, Call Graphs,
+  Induction Variables, Interval Identification, Natural Loop Identification,
+  etc.</dd>
+
+  <dt><tt><b>llvm/lib/Transforms/</b></tt></dt>
+  <dd> This directory contains the source code for the LLVM to LLVM program 
+  transformations, such as Aggressive Dead Code Elimination, Sparse Conditional 
+  Constant Propagation, Inlining, Loop Invariant Code Motion, Dead Global 
+  Elimination, and many others.</dd>
+
+  <dt><tt><b>llvm/lib/Target/</b></tt></dt>
+  <dd> This directory contains files that describe various target architectures
+  for code generation.  For example, the <tt>llvm/lib/Target/X86</tt> 
+  directory holds the X86 machine description while
+  <tt>llvm/lib/Target/CBackend</tt> implements the LLVM-to-C converter.</dd>
+    
+  <dt><tt><b>llvm/lib/CodeGen/</b></tt></dt>
+  <dd> This directory contains the major parts of the code generator: Instruction 
+  Selector, Instruction Scheduling, and Register Allocation.</dd>
+
+  <dt><tt><b>llvm/lib/Debugger/</b></tt></dt>
+  <dd> This directory contains the source level debugger library that makes 
+  it possible to instrument LLVM programs so that a debugger could identify 
+  source code locations at which the program is executing.</dd>
+
+  <dt><tt><b>llvm/lib/ExecutionEngine/</b></tt></dt>
+  <dd> This directory contains libraries for executing LLVM bitcode directly 
+  at runtime in both interpreted and JIT compiled fashions.</dd>
+
+  <dt><tt><b>llvm/lib/Support/</b></tt></dt>
+  <dd> This directory contains the source code that corresponds to the header 
+  files located in <tt>llvm/include/Support/</tt>.</dd>
+
+  <dt><tt><b>llvm/lib/System/</b></tt></dt>
+  <dd>This directory contains the operating system abstraction layer that
+  shields LLVM from platform-specific coding.</dd>
+</dl>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection"><a name="projects"><tt>llvm/projects</tt></a></div>
+<div class="doc_text">
+  <p>This directory contains projects that are not strictly part of LLVM but are
+  shipped with LLVM. This is also the directory where you should create your own
+  LLVM-based projects. See <tt>llvm/projects/sample</tt> for an example of how
+  to set up your own project.</p>
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection"><a name="runtime"><tt>llvm/runtime</tt></a></div>
+<div class="doc_text">
+
+<p>This directory contains libraries which are compiled into LLVM bitcode and
+used when linking programs with the GCC front end.  Most of these libraries are
+skeleton versions of real libraries; for example, libc is a stripped down
+version of glibc.</p>
+
+<p>Unlike the rest of the LLVM suite, this directory needs the LLVM GCC front
+end to compile.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection"><a name="test"><tt>llvm/test</tt></a></div>
+<div class="doc_text">
+  <p>This directory contains feature and regression tests and other basic sanity
+  checks on the LLVM infrastructure. These are intended to run quickly and cover
+  a lot of territory without being exhaustive.</p>
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection"><a name="test-suite"><tt>test-suite</tt></a></div>
+<div class="doc_text">
+  <p>This is not a directory in the normal llvm module; it is a separate
+  Subversion
+  module that must be checked out (usually to <tt>projects/test-suite</tt>). 
+  This
+  module contains a comprehensive correctness, performance, and benchmarking
+  test
+  suite for LLVM. It is a separate Subversion module because not every LLVM 
+  user is
+  interested in downloading or building such a comprehensive test suite. For
+  further details on this test suite, please see the 
+  <a href="TestingGuide.html">Testing Guide</a> document.</p>
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection"><a name="tools"><tt>llvm/tools</tt></a></div>
+<div class="doc_text">
+
+<p>The <b>tools</b> directory contains the executables built out of the
+libraries above, which form the main part of the user interface.  You can
+always get help for a tool by typing <tt>tool_name -help</tt>.  The
+following is a brief introduction to the most important tools.  More detailed
+information is in the <a href="CommandGuide/index.html">Command Guide</a>.</p>
+
+<dl>
+
+  <dt><tt><b>bugpoint</b></tt></dt>
+  <dd><tt>bugpoint</tt> is used to debug
+  optimization passes or code generation backends by narrowing down the
+  given test case to the minimum number of passes and/or instructions that
+  still cause a problem, whether it is a crash or miscompilation. See <a
+  href="HowToSubmitABug.html">HowToSubmitABug.html</a> for more information
+  on using <tt>bugpoint</tt>.</dd>
+
+  <dt><tt><b>llvmc</b></tt></dt>
+  <dd>The LLVM Compiler Driver. This program can
+  be configured to utilize both LLVM and non-LLVM compilation tools to enable
+  pre-processing, translation, optimization, assembly, and linking of programs
+  all from one command line. <tt>llvmc</tt> also takes care of processing the
+  dependent libraries found in bitcode. This reduces the need to get the
+  traditional <tt>-l&lt;name&gt;</tt> options right on the command line. Please
+  note that this tool, while functional, is still experimental and not feature
+  complete.</dd>
+
+  <dt><tt><b>llvm-ar</b></tt></dt>
+  <dd>The archiver produces an archive containing
+  the given LLVM bitcode files, optionally with an index for faster
+  lookup.</dd>
+  
+  <dt><tt><b>llvm-as</b></tt></dt>
+  <dd>The assembler transforms the human readable LLVM assembly to LLVM 
+  bitcode.</dd>
+
+  <dt><tt><b>llvm-dis</b></tt></dt>
+  <dd>The disassembler transforms the LLVM bitcode to human readable 
+  LLVM assembly.</dd>
+
+  <dt><tt><b>llvm-ld</b></tt></dt>
+  <dd><tt>llvm-ld</tt> is a general purpose and extensible linker for LLVM. 
+  This is the linker invoked by <tt>llvmc</tt>. It performs standard link time
+  optimizations and allows optimization modules to be loaded and run so that 
+  language specific optimizations can be applied at link time.</dd>
+
+  <dt><tt><b>llvm-link</b></tt></dt>
+  <dd><tt>llvm-link</tt>, not surprisingly, links multiple LLVM modules into 
+  a single program.</dd>
+  
+  <dt><tt><b>lli</b></tt></dt>
+  <dd><tt>lli</tt> is the LLVM interpreter, which
+  can directly execute LLVM bitcode (although very slowly...). For architectures
+  that support it (currently x86, Sparc, and PowerPC), by default, <tt>lli</tt>
+  will function as a Just-In-Time compiler (if the functionality was compiled
+  in), and will execute the code <i>much</i> faster than the interpreter.</dd>
+
+  <dt><tt><b>llc</b></tt></dt>
+  <dd> <tt>llc</tt> is the LLVM backend compiler, which
+  translates LLVM bitcode to a native code assembly file or to C code (with
+  the -march=c option).</dd>
+
+  <dt><tt><b>llvm-gcc</b></tt></dt>
+  <dd><tt>llvm-gcc</tt> is a GCC-based C frontend that has been retargeted to 
+  use LLVM as its backend instead of GCC's RTL backend. It can also emit LLVM 
+  bitcode or assembly (with the <tt>-emit-llvm</tt> option) instead of the
+  usual machine code output.  It works just like any other GCC compiler, 
+  taking the typical <tt>-c, -S, -E, -o</tt> options that are typically used.  
+  Additionally, the the source code for <tt>llvm-gcc</tt> is available as a 
+  separate Subversion module.</dd>
+
+  <dt><tt><b>opt</b></tt></dt>
+  <dd><tt>opt</tt> reads LLVM bitcode, applies a series of LLVM to LLVM 
+  transformations (which are specified on the command line), and then outputs 
+  the resultant bitcode.  The '<tt>opt -help</tt>' command is a good way to 
+  get a list of the program transformations available in LLVM.<br>
+  <dd><tt>opt</tt> can also be used to run a specific analysis on an input 
+  LLVM bitcode file and print out the results.  It is primarily useful for 
+  debugging analyses, or familiarizing yourself with what an analysis does.</dd>
+</dl>
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection"><a name="utils"><tt>llvm/utils</tt></a></div>
+<div class="doc_text">
+
+<p>This directory contains utilities for working with LLVM source code, and some
+of the utilities are actually required as part of the build process because they
+are code generators for parts of LLVM infrastructure.</p>
+
+<dl>
+  <dt><tt><b>codegen-diff</b></tt> <dd><tt>codegen-diff</tt> is a script
+  that finds differences between code that LLC generates and code that LLI
+  generates. This is a useful tool if you are debugging one of them,
+  assuming that the other generates correct output. For the full user
+  manual, run <tt>`perldoc codegen-diff'</tt>.<br><br>
+
+  <dt><tt><b>emacs/</b></tt> <dd>The <tt>emacs</tt> directory contains
+  syntax-highlighting files which will work with Emacs and XEmacs editors,
+  providing syntax highlighting support for LLVM assembly files and TableGen
+  description files. For information on how to use the syntax files, consult
+  the <tt>README</tt> file in that directory.<br><br>
+
+  <dt><tt><b>getsrcs.sh</b></tt> <dd>The <tt>getsrcs.sh</tt> script finds
+  and outputs all non-generated source files, which is useful if one wishes
+  to do a lot of development across directories and does not want to
+  individually find each file. One way to use it is to run, for example:
+  <tt>xemacs `utils/getsources.sh`</tt> from the top of your LLVM source
+  tree.<br><br>
+
+  <dt><tt><b>llvmgrep</b></tt></dt>
+  <dd>This little tool performs an "egrep -H -n" on each source file in LLVM and
+  passes to it a regular expression provided on <tt>llvmgrep</tt>'s command
+  line. This is a very efficient way of searching the source base for a
+  particular regular expression.</dd>
+
+  <dt><tt><b>makellvm</b></tt> <dd>The <tt>makellvm</tt> script compiles all
+  files in the current directory and then compiles and links the tool that
+  is the first argument. For example, assuming you are in the directory
+  <tt>llvm/lib/Target/Sparc</tt>, if <tt>makellvm</tt> is in your path,
+  simply running <tt>makellvm llc</tt> will make a build of the current
+  directory, switch to directory <tt>llvm/tools/llc</tt> and build it,
+  causing a re-linking of LLC.<br><br>
+
+  <dt><tt><b>NewNightlyTest.pl</b></tt> and
+  <tt><b>NightlyTestTemplate.html</b></tt> <dd>These files are used in a
+  cron script to generate nightly status reports of the functionality of
+  tools, and the results can be seen by following the appropriate link on
+  the <a href="http://llvm.org/">LLVM homepage</a>.<br><br>
+
+  <dt><tt><b>TableGen/</b></tt> <dd>The <tt>TableGen</tt> directory contains
+  the tool used to generate register descriptions, instruction set
+  descriptions, and even assemblers from common TableGen description
+  files.<br><br>
+
+  <dt><tt><b>vim/</b></tt> <dd>The <tt>vim</tt> directory contains
+  syntax-highlighting files which will work with the VIM editor, providing
+  syntax highlighting support for LLVM assembly files and TableGen
+  description files. For information on how to use the syntax files, consult
+  the <tt>README</tt> file in that directory.<br><br>
+
+</dl>
+
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_section">
+  <a name="tutorial">An Example Using the LLVM Tool Chain</a>
+</div>
+<!-- *********************************************************************** -->
+
+<div class="doc_text">
+<p>This section gives an example of using LLVM.  llvm-gcc3 is now obsolete,
+so we only include instructions for llvm-gcc4.
+</p>
+
+<p><b>Note:</b> The <i>gcc4</i> frontend's invocation is <b><i>considerably different</i></b>
+from the previous <i>gcc3</i> frontend. In particular, the <i>gcc4</i> frontend <b><i>does not</i></b>
+create bitcode by default: <i>gcc4</i> produces native code. As the example below illustrates,
+the '--emit-llvm' flag is needed to produce LLVM bitcode output. For <i>makefiles</i> and
+<i>configure</i> scripts, the CFLAGS variable needs '--emit-llvm' to produce bitcode
+output.</p>
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection"><a name="tutorial4">Example with llvm-gcc4</a></div>
+
+<div class="doc_text">
+
+<ol>
+  <li><p>First, create a simple C file, name it 'hello.c':</p>
+
+<div class="doc_code">
+<pre>
+#include &lt;stdio.h&gt;
+
+int main() {
+  printf("hello world\n");
+  return 0;
+}
+</pre></div></li>
+
+  <li><p>Next, compile the C file into a native executable:</p>
+
+      <div class="doc_code"><pre>% llvm-gcc hello.c -o hello</pre></div>
+
+      <p>Note that llvm-gcc works just like GCC by default.  The standard -S and
+        -c arguments work as usual (producing a native .s or .o file,
+        respectively).</p></li>
+
+  <li><p>Next, compile the C file into a LLVM bitcode file:</p>
+
+      <div class="doc_code">
+      <pre>% llvm-gcc -O3 -emit-llvm hello.c -c -o hello.bc</pre></div>
+
+      <p>The -emit-llvm option can be used with the -S or -c options to emit an
+         LLVM ".ll" or ".bc" file (respectively) for the code.  This allows you
+         to use the <a href="CommandGuide/index.html">standard LLVM tools</a> on
+         the bitcode file.</p>
+
+      <p>Unlike llvm-gcc3, llvm-gcc4 correctly responds to -O[0123] arguments.
+         </p></li>
+
+  <li><p>Run the program in both forms. To run the program, use:</p>
+      
+      <div class="doc_code"><pre>% ./hello</pre></div>
+ 
+      <p>and</p>
+
+      <div class="doc_code"><pre>% lli hello.bc</pre></div>
+
+      <p>The second examples shows how to invoke the LLVM JIT, <a
+       href="CommandGuide/html/lli.html">lli</a>.</p></li>
+
+  <li><p>Use the <tt>llvm-dis</tt> utility to take a look at the LLVM assembly
+      code:</p>
+
+<div class="doc_code">
+<pre>llvm-dis &lt; hello.bc | less</pre>
+</div></li>
+
+  <li><p>Compile the program to native assembly using the LLC code
+      generator:</p>
+
+      <div class="doc_code"><pre>% llc hello.bc -o hello.s</pre></div></li>
+
+  <li><p>Assemble the native assembly language file into a program:</p>
+
+<div class="doc_code">
+<pre>
+<b>Solaris:</b> % /opt/SUNWspro/bin/cc -xarch=v9 hello.s -o hello.native
+
+<b>Others:</b>  % gcc hello.s -o hello.native
+</pre>
+</div></li>
+
+  <li><p>Execute the native code program:</p>
+
+      <div class="doc_code"><pre>% ./hello.native</pre></div>
+
+      <p>Note that using llvm-gcc to compile directly to native code (i.e. when
+         the -emit-llvm option is not present) does steps 6/7/8 for you.</p>
+        </li>
+
+</ol>
+
+</div>
+
+
+<!-- *********************************************************************** -->
+<div class="doc_section">
+  <a name="problems">Common Problems</a>
+</div>
+<!-- *********************************************************************** -->
+
+<div class="doc_text">
+
+<p>If you are having problems building or using LLVM, or if you have any other
+general questions about LLVM, please consult the <a href="FAQ.html">Frequently
+Asked Questions</a> page.</p>
+
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_section">
+  <a name="links">Links</a>
+</div>
+<!-- *********************************************************************** -->
+
+<div class="doc_text">
+
+<p>This document is just an <b>introduction</b> on how to use LLVM to do
+some simple things... there are many more interesting and complicated things
+that you can do that aren't documented here (but we'll gladly accept a patch
+if you want to write something up!).  For more information about LLVM, check
+out:</p>
+
+<ul>
+  <li><a href="http://llvm.org/">LLVM homepage</a></li>
+  <li><a href="http://llvm.org/doxygen/">LLVM doxygen tree</a></li>
+  <li><a href="http://llvm.org/docs/Projects.html">Starting a Project
+  that Uses LLVM</a></li>
+</ul>
+
+</div>
+
+<!-- *********************************************************************** -->
+
+<hr>
+<address>
+  <a href="http://jigsaw.w3.org/css-validator/check/referer"><img
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS"></a>
+  <a href="http://validator.w3.org/check/referer"><img
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01"></a>
+
+  <a href="mailto:sabre at nondot.org">Chris Lattner</a><br>
+  <a href="http://llvm.x10sys.com/rspencer/">Reid Spencer</a><br>
+  <a href="http://llvm.org">The LLVM Compiler Infrastructure</a><br>
+  Last modified: $Date: 2011-03-31 13:38:22 -0700 (Thu, 31 Mar 2011) $
+</address>
+</body>
+</html>

Added: www-releases/trunk/2.9/docs/GettingStartedVS.html
URL: http://llvm.org/viewvc/llvm-project/www-releases/trunk/2.9/docs/GettingStartedVS.html?rev=129058&view=auto
==============================================================================
--- www-releases/trunk/2.9/docs/GettingStartedVS.html (added)
+++ www-releases/trunk/2.9/docs/GettingStartedVS.html Thu Apr  7 00:46:10 2011
@@ -0,0 +1,366 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN"
+                      "http://www.w3.org/TR/html4/strict.dtd">
+<html>
+<head>
+  <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
+  <title>Getting Started with LLVM System for Microsoft Visual Studio</title>
+  <link rel="stylesheet" href="llvm.css" type="text/css">
+</head>
+<body>
+
+<div class="doc_title">
+  Getting Started with the LLVM System using Microsoft Visual Studio
+</div>
+
+<ul>
+  <li><a href="#overview">Overview</a>
+  <li><a href="#requirements">Requirements</a>
+    <ol>
+      <li><a href="#hardware">Hardware</a>
+      <li><a href="#software">Software</a>
+    </ol></li>
+  <li><a href="#quickstart">Getting Started</a>
+  <li><a href="#tutorial">An Example Using the LLVM Tool Chain</a>
+  <li><a href="#problems">Common Problems</a>
+  <li><a href="#links">Links</a>
+</ul>
+
+<div class="doc_author">
+  <p>Written by: <a href="http://llvm.org">The LLVM Team</a></p>
+</div>
+
+
+<!-- *********************************************************************** -->
+<div class="doc_section">
+  <a name="overview"><b>Overview</b></a>
+</div>
+<!-- *********************************************************************** -->
+
+<div class="doc_text">
+
+  <p>Welcome to LLVM on Windows! This document only covers LLVM on Windows using
+  Visual Studio, not mingw or cygwin. In order to get started, you first need to
+  know some basic information.</p>
+
+  <p>There are many different projects that compose LLVM. The first is the LLVM
+  suite. This contains all of the tools, libraries, and header files needed to
+  use the low level virtual machine. It contains an assembler, disassembler,
+  bitcode analyzer and bitcode optimizer. It also contains a test suite that can
+  be used to test the LLVM tools.</p>
+
+  <p>Another useful project on Windows is
+  <a href="http://clang.llvm.org/">clang</a>. Clang is a C family
+  ([Objective]C/C++) compiler. Clang mostly works on Windows, but does not
+  currently understand all of the Microsoft extensions to C and C++. Because of
+  this, clang cannot parse the C++ standard library included with Visual Studio,
+  nor parts of the Windows Platform SDK. However, most standard C programs do
+  compile. Clang can be used to emit bitcode, directly emit object files or
+  even linked executables using Visual Studio's <tt>link.exe</tt></p>
+
+  <p>The large LLVM test suite cannot be run on the Visual Studio port at this
+  time.</p>
+
+  <p>Most of the tools build and work.  <tt>bugpoint</tt> does build, but does
+  not work.</p>
+
+  <p>Additional information about the LLVM directory structure and tool chain
+  can be found on the main <a href="GettingStarted.html">Getting Started</a>
+  page.</p>
+
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_section">
+  <a name="requirements"><b>Requirements</b></a>
+</div>
+<!-- *********************************************************************** -->
+
+<div class="doc_text">
+
+  <p>Before you begin to use the LLVM system, review the requirements given
+  below.  This may save you some trouble by knowing ahead of time what hardware
+  and software you will need.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="hardware"><b>Hardware</b></a>
+</div>
+
+<div class="doc_text">
+
+  <p>Any system that can adequately run Visual Studio .NET 2005 SP1 is fine.
+  The LLVM source tree and object files, libraries and executables will consume
+  approximately 3GB.</p>
+
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection"><a name="software"><b>Software</b></a></div>
+<div class="doc_text">
+
+  <p>You will need Visual Studio .NET 2005 SP1 or higher.  The VS2005 SP1
+  beta and the normal VS2005 still have bugs that are not completely
+  compatible.  Earlier versions of Visual Studio do not support the C++ standard
+  well enough and will not work.</p>
+
+  <p>You will also need the <a href="http://www.cmake.org/">CMake</a> build
+  system since it generates the project files you will use to build with.</p>
+
+  <p>If you would like to run the LLVM tests you will need
+  <a href="http://www.python.org/">Python</a>. Versions 2.4-2.7 are known to
+  work. You will need <a href="http://gnuwin32.sourceforge.net/">"GnuWin32"</a>
+  tools, too.</p>
+
+  <p>Do not install the LLVM directory tree into a path containing spaces (e.g.
+  C:\Documents and Settings\...) as the configure step will fail.</p>
+
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_section">
+  <a name="quickstart"><b>Getting Started</b></a>
+</div>
+<!-- *********************************************************************** -->
+
+<div class="doc_text">
+
+<p>Here's the short story for getting up and running quickly with LLVM:</p>
+
+<ol>
+  <li>Read the documentation.</li>
+  <li>Seriously, read the documentation.</li>
+  <li>Remember that you were warned twice about reading the documentation.</li>
+
+  <li>Get the Source Code
+  <ul>
+    <li>With the distributed files:
+    <ol>
+      <li><tt>cd <i>where-you-want-llvm-to-live</i></tt>
+      <li><tt>gunzip --stdout llvm-<i>version</i>.tar.gz | tar -xvf -</tt>
+      <i>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;or use WinZip</i>
+      <li><tt>cd llvm</tt></li>
+    </ol></li>
+
+    <li>With anonymous Subversion access:
+    <ol>
+      <li><tt>cd <i>where-you-want-llvm-to-live</i></tt></li>
+      <li><tt>svn co http://llvm.org/svn/llvm-project/llvm/trunk llvm</tt></li>
+      <li><tt>cd llvm</tt></li>
+    </ol></li>
+  </ul></li>
+
+  <li> Use <a href="http://www.cmake.org/">CMake</a> to generate up-to-date
+    project files:
+    <ul>
+      <li>Once CMake is installed then the simplest way is to just start the
+        CMake GUI, select the directory where you have LLVM extracted to, and the
+        default options should all be fine.  One option you may really want to
+        change, regardless of anything else, might be the CMAKE_INSTALL_PREFIX
+        setting to select a directory to INSTALL to once compiling is complete,
+        although installation is not mandatory for using LLVM.  Another important
+        option is LLVM_TARGETS_TO_BUILD, which controls the LLVM target
+        architectures that are included on the build.
+      <li>See the <a href="CMake.html">LLVM CMake guide</a> for
+        detailed information about how to configure the LLVM
+        build.</li>
+    </ul>
+  </li>
+
+  <li>Start Visual Studio
+  <ul>
+    <li>In the directory you created the project files will have
+    an <tt>llvm.sln</tt> file, just double-click on that to open
+    Visual Studio.</li>
+  </ul></li>
+
+  <li>Build the LLVM Suite:
+  <ul>
+    <li>The projects may still be built individually, but
+    to build them all do not just select all of them in batch build (as some
+    are meant as configuration projects), but rather select and build just
+    the ALL_BUILD project to build everything, or the INSTALL project, which
+    first builds the ALL_BUILD project, then installs the LLVM headers, libs,
+    and other useful things to the directory set by the CMAKE_INSTALL_PREFIX
+    setting when you first configured CMake.</li>
+    <li>The Fibonacci project is a sample program that uses the JIT.
+    Modify the project's debugging properties to provide a numeric
+    command line argument or run it from the command line.  The
+    program will print the corresponding fibonacci value.</li>
+  </ul></li>
+
+  <li>Test LLVM on Visual Studio:
+  <ul>
+    <li>If %PATH% does not contain GnuWin32, you may specify LLVM_LIT_TOOLS_DIR
+    on CMake for the path to GnuWin32.</li>
+    <li>You can run LLVM tests to build the project "check".</li>
+  </ul>
+  </li>
+
+  <!-- FIXME: Is it up-to-date? -->
+  <li>Test LLVM:
+  <ul>
+    <li>The LLVM tests can be run by <tt>cd</tt>ing to the llvm source directory
+        and running:
+
+<div class="doc_code">
+<pre>
+% llvm-lit test
+</pre>
+</div>
+
+    <p>Note that quite a few of these test will fail.</p>
+    </li>
+
+    <li>A specific test or test directory can be run with:</li>
+
+<div class="doc_code">
+<pre>
+% llvm-lit test/path/to/test
+</pre>
+</div>
+
+</ol>
+
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_section">
+  <a name="tutorial">An Example Using the LLVM Tool Chain</a>
+</div>
+<!-- *********************************************************************** -->
+
+<div class="doc_text">
+
+<ol>
+  <li><p>First, create a simple C file, name it 'hello.c':</p>
+
+<div class="doc_code">
+<pre>
+#include &lt;stdio.h&gt;
+int main() {
+  printf("hello world\n");
+  return 0;
+}
+</pre></div></li>
+
+  <li><p>Next, compile the C file into a LLVM bitcode file:</p>
+
+<div class="doc_code">
+<pre>
+% clang -c hello.c -emit-llvm -o hello.bc
+</pre>
+</div>
+
+      <p>This will create the result file <tt>hello.bc</tt> which is the LLVM
+         bitcode that corresponds the the compiled program and the library
+         facilities that it required.  You can execute this file directly using
+         <tt>lli</tt> tool, compile it to native assembly with the <tt>llc</tt>,
+         optimize or analyze it further with the <tt>opt</tt> tool, etc.</p>
+
+      <p>Alternatively you can directly output an executable with clang with:
+      </p>
+
+<div class="doc_code">
+<pre>
+% clang hello.c -o hello.exe
+</pre>
+</div>
+
+  <p>The <tt>-o hello.exe</tt> is required because clang currently outputs
+  <tt>a.out</tt> when neither <tt>-o</tt> nor <tt>-c</tt> are given.</p>
+
+  <li><p>Run the program using the just-in-time compiler:</p>
+
+<div class="doc_code">
+<pre>
+% lli hello.bc
+</pre>
+</div>
+
+  <li><p>Use the <tt>llvm-dis</tt> utility to take a look at the LLVM assembly
+      code:</p>
+
+<div class="doc_code">
+<pre>
+% llvm-dis &lt; hello.bc | more
+</pre>
+</div></li>
+
+  <li><p>Compile the program to object code using the LLC code generator:</p>
+
+<div class="doc_code">
+<pre>
+% llc -filetype=obj hello.bc
+</pre>
+</div></li>
+
+  <li><p>Link to binary using Microsoft link:</p>
+
+<div class="doc_code">
+<pre>
+% link hello.obj -defaultlib:libcmt
+</pre>
+</div>
+
+  <li><p>Execute the native code program:</p>
+
+<div class="doc_code">
+<pre>
+% hello.exe
+</pre>
+</div></li>
+</ol>
+
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_section">
+  <a name="problems">Common Problems</a>
+</div>
+<!-- *********************************************************************** -->
+
+<div class="doc_text">
+
+<p>If you are having problems building or using LLVM, or if you have any other
+general questions about LLVM, please consult the <a href="FAQ.html">Frequently
+Asked Questions</a> page.</p>
+
+</div>
+
+<!-- *********************************************************************** -->
+<div class="doc_section">
+  <a name="links">Links</a>
+</div>
+<!-- *********************************************************************** -->
+
+<div class="doc_text">
+
+<p>This document is just an <b>introduction</b> to how to use LLVM to do
+some simple things... there are many more interesting and complicated things
+that you can do that aren't documented here (but we'll gladly accept a patch
+if you want to write something up!).  For more information about LLVM, check
+out:</p>
+
+<ul>
+  <li><a href="http://llvm.org/">LLVM homepage</a></li>
+  <li><a href="http://llvm.org/doxygen/">LLVM doxygen tree</a></li>
+</ul>
+
+</div>
+
+<!-- *********************************************************************** -->
+
+<hr>
+<address>
+  <a href="http://jigsaw.w3.org/css-validator/check/referer"><img
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS"></a>
+  <a href="http://validator.w3.org/check/referer"><img
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01"></a>
+
+  <a href="http://llvm.org">The LLVM Compiler Infrastructure</a><br>
+  Last modified: $Date: 2011-03-06 15:00:33 -0800 (Sun, 06 Mar 2011) $
+</address>
+</body>
+</html>

Added: www-releases/trunk/2.9/docs/GoldPlugin.html
URL: http://llvm.org/viewvc/llvm-project/www-releases/trunk/2.9/docs/GoldPlugin.html?rev=129058&view=auto
==============================================================================
--- www-releases/trunk/2.9/docs/GoldPlugin.html (added)
+++ www-releases/trunk/2.9/docs/GoldPlugin.html Thu Apr  7 00:46:10 2011
@@ -0,0 +1,213 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN"
+                      "http://www.w3.org/TR/html4/strict.dtd">
+<html>
+<head>
+  <title>LLVM gold plugin</title>
+  <link rel="stylesheet" href="llvm.css" type="text/css">
+</head>
+<body>
+      
+<div class="doc_title">LLVM gold plugin</div>
+<ol>
+  <li><a href="#introduction">Introduction</a></li>
+  <li><a href="#build">How to build it</a></li>
+  <li><a href="#usage">Usage</a>
+  <ul>
+    <li><a href="#example1">Example of link time optimization</a></li>
+    <li><a href="#lto_autotools">Quickstart for using LTO with autotooled projects</a></li>
+  </ul></li>
+  <li><a href="#licensing">Licensing</a></li>
+</ol>
+<div class="doc_author">Written by Nick Lewycky</div>
+
+<!--=========================================================================-->
+<div class="doc_section"><a name="introduction">Introduction</a></div>
+<!--=========================================================================-->
+<div class="doc_text">
+  <p>Building with link time optimization requires cooperation from the
+system linker. LTO support on Linux systems requires that you use
+the <a href="http://sourceware.org/binutils">gold linker</a> which supports
+LTO via plugins. This is the same mechanism used by the
+<a href="http://gcc.gnu.org/wiki/LinkTimeOptimization">GCC LTO</a>
+project.</p>
+  <p>The LLVM gold plugin implements the
+<a href="http://gcc.gnu.org/wiki/whopr/driver">gold plugin interface</a>
+on top of
+<a href="http://llvm.org/docs/LinkTimeOptimization.html#lto">libLTO</a>.
+The same plugin can also be used by other tools such as <tt>ar</tt> and
+<tt>nm</tt>.
+</div>
+<!--=========================================================================-->
+<div class="doc_section"><a name="build">How to build it</a></div>
+<!--=========================================================================-->
+<div class="doc_text">
+  <p>You need to have gold with plugin support and build the LLVMgold
+plugin. Check whether you have gold running <tt>/usr/bin/ld -v</tt>. It will
+report &#8220;GNU gold&#8221; or else &#8220GNU ld&#8221; if not. If you have
+gold, check for plugin support by running <tt>/usr/bin/ld -plugin</tt>. If it
+complains &#8220missing argument&#8221 then you have plugin support. If not,
+such as an &#8220;unknown option&#8221; error then you will either need to
+build gold or install a version with plugin support.</p>
+<ul>
+  <li>To build gold with plugin support:
+    <pre class="doc_code">
+mkdir binutils
+cd binutils
+cvs -z 9 -d :pserver:anoncvs at sourceware.org:/cvs/src login
+<em>{enter "anoncvs" as the password}</em>
+cvs -z 9 -d :pserver:anoncvs at sourceware.org:/cvs/src co binutils
+mkdir build
+cd build
+../src/configure --enable-gold --enable-plugins
+make all-gold
+</pre>
+    That should leave you with <tt>binutils/build/gold/ld-new</tt> which supports the <tt>-plugin</tt> option. It also built would have
+<tt>binutils/build/binutils/ar</tt> and <tt>nm-new</tt> which support plugins
+but don't have a visible -plugin option, instead relying on the gold plugin
+being present in <tt>../lib/bfd-plugins</tt> relative to where the binaries are
+placed.
+    <li>Build the LLVMgold plugin: Configure LLVM with
+    <tt>--with-binutils-include=/path/to/binutils/src/include</tt> and run
+    <tt>make</tt>.
+</ul>
+</div>
+<!--=========================================================================-->
+<div class="doc_section"><a name="usage">Usage</a></div>
+<!--=========================================================================-->
+<div class="doc_text">
+  <p>The linker takes a <tt>-plugin</tt> option that points to the path of
+  the plugin <tt>.so</tt> file. To find out what link command <tt>gcc</tt>
+  would run in a given situation, run <tt>gcc -v <em>[...]</em></tt> and look
+  for the line where it runs <tt>collect2</tt>. Replace that with
+  <tt>ld-new -plugin /path/to/LLVMgold.so</tt> to test it out. Once you're
+  ready to switch to using gold, backup your existing <tt>/usr/bin/ld</tt>
+  then replace it with <tt>ld-new</tt>.</p>
+  <p>You can produce bitcode files from <tt>llvm-gcc</tt> using
+  <tt>-emit-llvm</tt> or <tt>-flto</tt>, or the <tt>-O4</tt> flag which is
+  synonymous with <tt>-O3 -flto</tt>.</p>
+  <p><tt>llvm-gcc</tt> has a <tt>-use-gold-plugin</tt> option which looks
+  for the gold plugin in the same directories as it looks for <tt>cc1</tt> and
+  passes the <tt>-plugin</tt> option to ld. It will not look for an alternate
+  linker, which is why you need gold to be the installed system linker in your
+  path.</p>
+  <p>If you want <tt>ar</tt> and <tt>nm</tt> to work seamlessly as well, install
+  <tt>LLVMgold.so</tt> to <tt>/usr/lib/bfd-plugins</tt>. If you built your
+  own gold, be sure to install the <tt>ar</tt> and <tt>nm-new</tt> you built to
+  <tt>/usr/bin</tt>.
+  <p>
+</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="example1">Example of link time optimization</a>
+</div>
+
+<div class="doc_text">
+  <p>The following example shows a worked example of the gold plugin mixing
+  LLVM bitcode and native code.
+<pre class="doc_code">
+--- a.c ---
+#include &lt;stdio.h&gt;
+
+extern void foo1(void);
+extern void foo4(void);
+
+void foo2(void) {
+  printf("Foo2\n");
+}
+
+void foo3(void) {
+  foo4();
+}
+
+int main(void) {
+  foo1();
+}
+
+--- b.c ---
+#include &lt;stdio.h&gt;
+
+extern void foo2(void);
+
+void foo1(void) {
+  foo2();
+}
+
+void foo4(void) {
+  printf("Foo4");
+}
+
+--- command lines ---
+$ llvm-gcc -flto a.c -c -o a.o              # &lt;-- a.o is LLVM bitcode file
+$ ar q a.a a.o                              # &lt;-- a.a is an archive with LLVM bitcode
+$ llvm-gcc b.c -c -o b.o                    # &lt;-- b.o is native object file
+$ llvm-gcc -use-gold-plugin a.a b.o -o main # &lt;-- link with LLVMgold plugin
+</pre>
+  <p>Gold informs the plugin that foo3 is never referenced outside the IR,
+  leading LLVM to delete that function. However, unlike in the
+  <a href="http://llvm.org/docs/LinkTimeOptimization.html#example1">libLTO
+  example</a> gold does not currently eliminate foo4.</p>
+</div>
+
+<!--=========================================================================-->
+<div class="doc_section"><a name="lto_autotools">Quickstart for using LTO with autotooled projects</a></div>
+<!--=========================================================================-->
+<div class="doc_text">
+  <p>Once your system <tt>ld</tt>, <tt>ar</tt> and <tt>nm</tt> all support LLVM
+  bitcode, everything is in place for an easy to use LTO build of autotooled
+  projects:</p>
+  <ul>
+    <li>Follow the instructions <a href="#build">on how to build LLVMgold.so</a>.</li>
+    <li>Install the newly built binutils to <tt>$PREFIX</tt></li>
+    <li>Copy <tt>Release/lib/LLVMgold.so</tt> to
+    <tt>$PREFIX/libexec/gcc/x86_64-unknown-linux-gnu/4.2.1/</tt> and
+    <tt>$PREFIX/lib/bfd-plugins/</tt></li>
+    <li>Set environment variables (<tt>$PREFIX</tt> is where you installed llvm-gcc and
+    binutils):
+    <pre class="doc_code">
+export CC="$PREFIX/bin/llvm-gcc -use-gold-plugin"
+export CXX="$PREFIX/bin/llvm-g++ -use-gold-plugin"
+export AR="$PREFIX/bin/ar"
+export NM="$PREFIX/bin/nm"
+export RANLIB=/bin/true #ranlib is not needed, and doesn't support .bc files in .a
+export CFLAGS="-O4"
+</pre>
+     </li>
+     <li>Or you can just set your path:
+    <pre class="doc_code">
+export PATH="$PREFIX/bin:$PATH"
+export CC="llvm-gcc -use-gold-plugin"
+export CXX="llvm-g++ -use-gold-plugin"
+export RANLIB=/bin/true
+export CFLAGS="-O4"
+</pre>
+     </li>
+     <li>Configure &amp; build the project as usual: <tt>./configure &amp;&amp; make &amp;&amp; make check</tt> </li>
+   </ul>
+   <p> The environment variable settings may work for non-autotooled projects
+   too, but you may need to set the <tt>LD</tt> environment variable as well.</p>
+</div>
+
+<!--=========================================================================-->
+<div class="doc_section"><a name="licensing">Licensing</a></div>
+<!--=========================================================================-->
+<div class="doc_text">
+  <p>Gold is licensed under the GPLv3. LLVMgold uses the interface file
+<tt>plugin-api.h</tt> from gold which means that the resulting LLVMgold.so
+binary is also GPLv3. This can still be used to link non-GPLv3 programs just
+as much as gold could without the plugin.</p>
+</div>
+
+<!-- *********************************************************************** -->
+<hr>
+<address>
+  <a href="http://jigsaw.w3.org/css-validator/check/referer"><img
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS"></a>
+  <a href="http://validator.w3.org/check/referer"><img
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01"></a>
+  <a href="mailto:nicholas at metrix.on.ca">Nick Lewycky</a><br>
+  <a href="http://llvm.org">The LLVM Compiler Infrastructure</a><br>
+  Last modified: $Date: 2010-04-16 23:58:21 -0800 (Fri, 16 Apr 2010) $
+</address>
+</body>
+</html>

Added: www-releases/trunk/2.9/docs/HistoricalNotes/2000-11-18-EarlyDesignIdeas.txt
URL: http://llvm.org/viewvc/llvm-project/www-releases/trunk/2.9/docs/HistoricalNotes/2000-11-18-EarlyDesignIdeas.txt?rev=129058&view=auto
==============================================================================
--- www-releases/trunk/2.9/docs/HistoricalNotes/2000-11-18-EarlyDesignIdeas.txt (added)
+++ www-releases/trunk/2.9/docs/HistoricalNotes/2000-11-18-EarlyDesignIdeas.txt Thu Apr  7 00:46:10 2011
@@ -0,0 +1,74 @@
+Date: Sat, 18 Nov 2000 09:19:35 -0600 (CST)
+From: Vikram Adve <vadve at cs.uiuc.edu>
+To: Chris Lattner <lattner at cs.uiuc.edu>
+Subject: a few thoughts
+
+I've been mulling over the virtual machine problem and I had some
+thoughts about some things for us to think about discuss:
+
+1. We need to be clear on our goals for the VM.  Do we want to emphasize
+   portability and safety like the Java VM?  Or shall we focus on the
+   architecture interface first (i.e., consider the code generation and
+   processor issues), since the architecture interface question is also
+   important for portable Java-type VMs?
+
+   This is important because the audiences for these two goals are very
+   different.  Architects and many compiler people care much more about
+   the second question.  The Java compiler and OS community care much more
+   about the first one.
+
+   Also, while the architecture interface question is important for
+   Java-type VMs, the design constraints are very different.
+
+
+2. Design issues to consider (an initial list that we should continue
+   to modify).  Note that I'm not trying to suggest actual solutions here,
+   but just various directions we can pursue:
+
+   a. A single-assignment VM, which we've both already been thinking about.
+
+   b. A strongly-typed VM.  One question is do we need the types to be
+      explicitly declared or should they be inferred by the dynamic compiler?
+
+   c. How do we get more high-level information into the VM while keeping
+      to a low-level VM design?
+
+        o  Explicit array references as operands?  An alternative is
+           to have just an array type, and let the index computations be
+           separate 3-operand instructions.
+
+        o  Explicit instructions to handle aliasing, e.g.s:
+           -- an instruction to say "I speculate that these two values are not
+              aliased, but check at runtime", like speculative execution in
+              EPIC?
+           -- or an instruction to check whether two values are aliased and
+              execute different code depending on the answer, somewhat like
+              predicated code in EPIC
+
+        o  (This one is a difficult but powerful idea.)
+           A "thread-id" field on every instruction that allows the static
+           compiler to generate a set of parallel threads, and then have
+           the runtime compiler and hardware do what they please with it.
+           This has very powerful uses, but thread-id on every instruction
+           is expensive in terms of instruction size and code size.
+           We would need to compactly encode it somehow.
+
+           Also, this will require some reading on at least two other
+           projects:
+                -- Multiscalar architecture from Wisconsin
+                -- Simultaneous multithreading architecture from Washington
+
+        o  Or forget all this and stick to a traditional instruction set?
+
+
+BTW, on an unrelated note, after the meeting yesterday, I did remember
+that you had suggested doing instruction scheduling on SSA form instead
+of a dependence DAG earlier in the semester.  When we talked about
+it yesterday, I didn't remember where the idea had come from but I
+remembered later.  Just giving credit where its due...
+
+Perhaps you can save the above as a file under RCS so you and I can
+continue to expand on this.
+
+--Vikram
+

Added: www-releases/trunk/2.9/docs/HistoricalNotes/2000-11-18-EarlyDesignIdeasResp.txt
URL: http://llvm.org/viewvc/llvm-project/www-releases/trunk/2.9/docs/HistoricalNotes/2000-11-18-EarlyDesignIdeasResp.txt?rev=129058&view=auto
==============================================================================
--- www-releases/trunk/2.9/docs/HistoricalNotes/2000-11-18-EarlyDesignIdeasResp.txt (added)
+++ www-releases/trunk/2.9/docs/HistoricalNotes/2000-11-18-EarlyDesignIdeasResp.txt Thu Apr  7 00:46:10 2011
@@ -0,0 +1,199 @@
+Date: Sun, 19 Nov 2000 16:23:57 -0600 (CST)
+From: Chris Lattner <sabre at nondot.org>
+To: Vikram Adve <vadve at cs.uiuc.edu>
+Subject: Re: a few thoughts
+
+Okay... here are a few of my thoughts on this (it's good to know that we
+think so alike!):
+
+> 1. We need to be clear on our goals for the VM.  Do we want to emphasize
+>    portability and safety like the Java VM?  Or shall we focus on the
+>    architecture interface first (i.e., consider the code generation and
+>    processor issues), since the architecture interface question is also
+>    important for portable Java-type VMs?
+
+I forsee the architecture looking kinda like this: (which is completely
+subject to change)
+
+1. The VM code is NOT guaranteed safe in a java sense.  Doing so makes it
+   basically impossible to support C like languages.  Besides that,
+   certifying a register based language as safe at run time would be a
+   pretty expensive operation to have to do.  Additionally, we would like
+   to be able to statically eliminate many bounds checks in Java
+   programs... for example.
+
+ 2. Instead, we can do the following (eventually): 
+   * Java bytecode is used as our "safe" representation (to avoid
+     reinventing something that we don't add much value to).  When the
+     user chooses to execute Java bytecodes directly (ie, not
+     precompiled) the runtime compiler can do some very simple
+     transformations (JIT style) to convert it into valid input for our
+     VM.  Performance is not wonderful, but it works right.
+   * The file is scheduled to be compiled (rigorously) at a later
+     time.  This could be done by some background process or by a second
+     processor in the system during idle time or something...
+   * To keep things "safe" ie to enforce a sandbox on Java/foreign code,
+     we could sign the generated VM code with a host specific private
+     key.  Then before the code is executed/loaded, we can check to see if
+     the trusted compiler generated the code.  This would be much quicker
+     than having to validate consistency (especially if bounds checks have
+     been removed, for example)
+
+>    This is important because the audiences for these two goals are very
+>    different.  Architects and many compiler people care much more about
+>    the second question.  The Java compiler and OS community care much more
+>    about the first one.
+
+3. By focusing on a more low level virtual machine, we have much more room
+   for value add.  The nice safe "sandbox" VM can be provided as a layer
+   on top of it.  It also lets us focus on the more interesting compilers
+   related projects.
+
+> 2. Design issues to consider (an initial list that we should continue
+>    to modify).  Note that I'm not trying to suggest actual solutions here,
+>    but just various directions we can pursue:
+
+Understood.  :)
+
+>    a. A single-assignment VM, which we've both already been thinking
+>       about.
+
+Yup, I think that this makes a lot of sense.  I am still intrigued,
+however, by the prospect of a minimally allocated VM representation... I
+think that it could have definate advantages for certain applications
+(think very small machines, like PDAs).  I don't, however, think that our
+initial implementations should focus on this.  :)
+
+Here are some other auxilliary goals that I think we should consider:
+
+1. Primary goal: Support a high performance dynamic compilation
+   system.  This means that we have an "ideal" division of labor between
+   the runtime and static compilers.  Of course, the other goals of the
+   system somewhat reduce the importance of this point (f.e. portability
+   reduces performance, but hopefully not much)
+2. Portability to different processors.  Since we are most familiar with
+   x86 and solaris, I think that these two are excellent candidates when
+   we get that far...
+3. Support for all languages & styles of programming (general purpose
+   VM).  This is the point that disallows java style bytecodes, where all
+   array refs are checked for bounds, etc...
+4. Support linking between different language families.  For example, call
+   C functions directly from Java without using the nasty/slow/gross JNI
+   layer.  This involves several subpoints:
+  A. Support for languages that require garbage collectors and integration
+     with languages that don't.  As a base point, we could insist on
+     always using a conservative GC, but implement free as a noop, f.e.
+
+>    b. A strongly-typed VM.  One question is do we need the types to be
+>       explicitly declared or should they be inferred by the dynamic
+>       compiler?
+
+  B. This is kind of similar to another idea that I have: make OOP
+     constructs (virtual function tables, class heirarchies, etc) explicit
+     in the VM representation.  I believe that the number of additional
+     constructs would be fairly low, but would give us lots of important
+     information... something else that would/could be important is to
+     have exceptions as first class types so that they would be handled in
+     a uniform way for the entire VM... so that C functions can call Java
+     functions for example...
+
+>    c. How do we get more high-level information into the VM while keeping
+>       to a low-level VM design?
+>       o  Explicit array references as operands?  An alternative is
+>          to have just an array type, and let the index computations be
+>          separate 3-operand instructions.
+
+   C. In the model I was thinking of (subject to change of course), we
+      would just have an array type (distinct from the pointer
+      types).  This would allow us to have arbitrarily complex index
+      expressions, while still distinguishing "load" from "Array load",
+      for example.  Perhaps also, switch jump tables would be first class
+      types as well?  This would allow better reasoning about the program.
+
+5. Support dynamic loading of code from various sources.  Already
+   mentioned above was the example of loading java bytecodes, but we want
+   to support dynamic loading of VM code as well.  This makes the job of
+   the runtime compiler much more interesting:  it can do interprocedural
+   optimizations that the static compiler can't do, because it doesn't
+   have all of the required information (for example, inlining from
+   shared libraries, etc...)
+
+6. Define a set of generally useful annotations to add to the VM
+   representation.  For example, a function can be analysed to see if it
+   has any sideeffects when run... also, the MOD/REF sets could be
+   calculated, etc... we would have to determine what is reasonable.  This
+   would generally be used to make IP optimizations cheaper for the
+   runtime compiler...
+
+>       o  Explicit instructions to handle aliasing, e.g.s:
+>            -- an instruction to say "I speculate that these two values are not
+>               aliased, but check at runtime", like speculative execution in
+>             EPIC?
+>          -- or an instruction to check whether two values are aliased and
+>             execute different code depending on the answer, somewhat like
+>             predicated code in EPIC
+
+These are also very good points... if this can be determined at compile
+time.  I think that an epic style of representation (not the instruction
+packing, just the information presented) could be a very interesting model
+to use... more later...
+
+>         o  (This one is a difficult but powerful idea.)
+>          A "thread-id" field on every instruction that allows the static
+>          compiler to generate a set of parallel threads, and then have
+>          the runtime compiler and hardware do what they please with it.
+>          This has very powerful uses, but thread-id on every instruction
+>          is expensive in terms of instruction size and code size.
+>          We would need to compactly encode it somehow.
+
+Yes yes yes!  :)  I think it would be *VERY* useful to include this kind
+of information (which EPIC architectures *implicitly* encode.  The trend
+that we are seeing supports this greatly:
+
+1. Commodity processors are getting massive SIMD support:
+   * Intel/Amd MMX/MMX2
+   * AMD's 3Dnow!
+   * Intel's SSE/SSE2
+   * Sun's VIS
+2. SMP is becoming much more common, especially in the server space.
+3. Multiple processors on a die are right around the corner.
+
+If nothing else, not designing this in would severely limit our future
+expansion of the project...
+
+>          Also, this will require some reading on at least two other
+>          projects:
+>               -- Multiscalar architecture from Wisconsin
+>               -- Simultaneous multithreading architecture from Washington
+>
+>       o  Or forget all this and stick to a traditional instruction set?
+
+Heh... :)  Well, from a pure research point of view, it is almost more
+attactive to go with the most extreme/different ISA possible.