From stoklund at 2pi.dk Mon Sep 19 00:34:10 2011 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Mon, 19 Sep 2011 05:34:10 -0000 Subject: [llvm-commits] [llvm] r140010 - /llvm/trunk/CREDITS.TXT Message-ID: <20110919053410.EE7812A6C12C@llvm.org> Author: stoklund Date: Mon Sep 19 00:34:10 2011 New Revision: 140010 URL: http://llvm.org/viewvc/llvm-project?rev=140010&view=rev Log: Claimed. Modified: llvm/trunk/CREDITS.TXT Modified: llvm/trunk/CREDITS.TXT URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/CREDITS.TXT?rev=140010&r1=140009&r2=140010&view=diff ============================================================================== --- llvm/trunk/CREDITS.TXT (original) +++ llvm/trunk/CREDITS.TXT Mon Sep 19 00:34:10 2011 @@ -282,6 +282,8 @@ E: stoklund at 2pi.dk D: Machine code verifier D: Blackfin backend +D: Fast register allocator +D: Greedy register allocator N: Richard Osborne E: richard at xmos.com From rafael.espindola at gmail.com Mon Sep 19 01:51:13 2011 From: rafael.espindola at gmail.com (=?UTF-8?B?UmFmYWVsIMOBdmlsYSBkZSBFc3DDrW5kb2xh?=) Date: Mon, 19 Sep 2011 02:51:13 -0400 Subject: [llvm-commits] [llvm] r139340 - /llvm/trunk/tools/gold/gold-plugin.cpp In-Reply-To: References: <20110909001404.29F222A6C12C@llvm.org> <4E69AECA.5040206@free.fr> <4E70E010.4050606@gmail.com> Message-ID: <4E76E661.9080002@gmail.com> On 2011-09-14 13:59, Ivan Krasin wrote: > Hi Rafael, > > I'm sorry for the inconvenience: this patch has been obsoleted by > http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20110912/127817.html > and I have forgot to claim that in this thread. > > ToT gold plugin has already received the proper fix (r139544 - > http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20110912/127826.html). > It fixes not only the old Gold, but also ar/nm plugins which don't > provide get_view as well). > > Please, let me know if you have any objections about that CL. Thanks for fixing it! I am still trying to catch up on the llvm emails... > krasin Cheers, Rafael From geek4civic at gmail.com Mon Sep 19 01:53:42 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Mon, 19 Sep 2011 15:53:42 +0900 Subject: [llvm-commits] [PATCH] Support for instruction cache flushing on Windows In-Reply-To: References: Message-ID: Aaron, I am sorry for long delay. 2011/8/26 Aaron Ballman : > On Windows, there was no implementation for > llvm::sys::Memory::InvalidateInstructionCache, which I've rectified > with this patch. ?Tested with Visual Studio 2010 and MinGW, though I > will admit that it shows no functional differences on my particular > hardware. ?That doesn't mean it won't be useful on other hardware > though. In fact; - x86 and x86-64 does not need explicit icache flushing on its microarchitecture. - in llvm::sys::Memory::InvalidateInstructionCache(), no operations would be executed on any x86-based hosts. I think this patch could be applied by the person who would develop for {ppc|arm}-win32. Though I don't have a strong opinion, it would be redundant and would affect a little worse for performance for now. FYI, you should not give GetModuleHandle(NULL), but GetCurrentProcess() to 1st argument of FlushInstructionCache(). As an implementation, GetModuleHandl(NULL) represents virtual base addr of the process (eg. 0x00400000) and GetCurrentProcess() does the magic number (eg. 0xFFFFFFFF). ...Takumi From geek4civic at gmail.com Mon Sep 19 02:41:44 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Mon, 19 Sep 2011 07:41:44 -0000 Subject: [llvm-commits] [llvm] r140011 - /llvm/trunk/lib/Support/Threading.cpp Message-ID: <20110919074144.1BBF52A6C12D@llvm.org> Author: chapuni Date: Mon Sep 19 02:41:43 2011 New Revision: 140011 URL: http://llvm.org/viewvc/llvm-project?rev=140011&view=rev Log: Add Win32 support to llvm::llvm_execute_on_thread(). Thanks to Aaron Ballman! Modified: llvm/trunk/lib/Support/Threading.cpp Modified: llvm/trunk/lib/Support/Threading.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Threading.cpp?rev=140011&r1=140010&r2=140011&view=diff ============================================================================== --- llvm/trunk/lib/Support/Threading.cpp (original) +++ llvm/trunk/lib/Support/Threading.cpp Mon Sep 19 02:41:43 2011 @@ -102,13 +102,44 @@ error: ::pthread_attr_destroy(&Attr); } +#elif defined(LLVM_MULTITHREADED) && defined(LLVM_ON_WIN32) +#include "Windows/Windows.h" +#include -#else +struct ThreadInfo { + void (*func)(void*); + void *param; +}; + +static unsigned __stdcall ThreadCallback(void *param) { + struct ThreadInfo *info = reinterpret_cast(param); + info->func(info->param); -// No non-pthread implementation, currently. + return 0; +} void llvm::llvm_execute_on_thread(void (*Fn)(void*), void *UserData, unsigned RequestedStackSize) { + struct ThreadInfo param = { Fn, UserData }; + + HANDLE hThread = (HANDLE)::_beginthreadex(NULL, + RequestedStackSize, ThreadCallback, + ¶m, 0, NULL); + + if (hThread) { + // We actually don't care whether the wait succeeds or fails, in + // the same way we don't care whether the pthread_join call succeeds + // or fails. There's not much we could do if this were to fail. But + // on success, this call will wait until the thread finishes executing + // before returning. + (void)::WaitForSingleObject(hThread, INFINITE); + ::CloseHandle(hThread); + } +} +#else +// Support for non-Win32, non-pthread implementation. +void llvm::llvm_execute_on_thread(void (*Fn)(void*), void *UserData, + unsigned RequestedStackSize) { (void) RequestedStackSize; Fn(UserData); } From stpworld at narod.ru Mon Sep 19 02:48:08 2011 From: stpworld at narod.ru (Stepan Dyatkovskiy) Date: Mon, 19 Sep 2011 07:48:08 -0000 Subject: [llvm-commits] [llvm] r140012 - /llvm/trunk/test/MC/AsmParser/2011-09-06-NoNewline.s Message-ID: <20110919074808.933642A6C12D@llvm.org> Author: dyatkovskiy Date: Mon Sep 19 02:48:08 2011 New Revision: 140012 URL: http://llvm.org/viewvc/llvm-project?rev=140012&view=rev Log: Added regression test for bug #10869. Added: llvm/trunk/test/MC/AsmParser/2011-09-06-NoNewline.s Added: llvm/trunk/test/MC/AsmParser/2011-09-06-NoNewline.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AsmParser/2011-09-06-NoNewline.s?rev=140012&view=auto ============================================================================== --- llvm/trunk/test/MC/AsmParser/2011-09-06-NoNewline.s (added) +++ llvm/trunk/test/MC/AsmParser/2011-09-06-NoNewline.s Mon Sep 19 02:48:08 2011 @@ -0,0 +1,6 @@ +// RUN: llvm-mc %s +movl %gs:8, %eax +// RUN: llvm-mc %s +movl %gs:8, %eax +// RUN: llvm-mc %s +movl %gs:8, %eax \ No newline at end of file From geek4civic at gmail.com Mon Sep 19 02:51:39 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Mon, 19 Sep 2011 16:51:39 +0900 Subject: [llvm-commits] [PATCH] Improved threading support on Windows In-Reply-To: References: Message-ID: Aaron, threading stuff has been applied in r140011 with a little tweak, thank you. _beginthreadex() would be preferred with msvcrt, IMHO. I apologize to you so much to wait too long, though, I don't think simpler patch could be always applied too easily. I needed my time to check and investigate patches. Please be patient to me. LLVM is still a hobby to me. I am not full-time nor dedicated committer. (Yeah, today afternoon, I am free from my family) ...Takumi From anton at korobeynikov.info Mon Sep 19 04:31:45 2011 From: anton at korobeynikov.info (Anton Korobeynikov) Date: Mon, 19 Sep 2011 13:31:45 +0400 Subject: [llvm-commits] [PATCH] Removed FIXME from Memory.inc on Windows In-Reply-To: References: Message-ID: Hi Aaron, > This patch addresses a FIXME in the Memory class on Windows. ?It now > supports allocating blocks of memory around the "NearBlock" parameter. > ?Additionally, it adds support for changing the protection for blocks > of virtual memory. Stuff looks generally ok for me, but I'd ask Takumi as well. Also, please split the patch into 2 parts, it definitely contains 2 unrelated blocks Thanks for working on this! -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University From proljc at gmail.com Mon Sep 19 04:35:47 2011 From: proljc at gmail.com (Liu) Date: Mon, 19 Sep 2011 17:35:47 +0800 Subject: [llvm-commits] [patch] add MIPS64 SubTraget and stubs support to LLVM. Message-ID: Hi all I've add mips64 SubTarget and stubs support to llvm. Please review and checkin. --Liu -------------- next part -------------- A non-text attachment was scrubbed... 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Name: llvm.atomics.define.diff Type: text/x-patch Size: 7075 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110919/98496c68/attachment.bin From criswell at uiuc.edu Mon Sep 19 10:35:31 2011 From: criswell at uiuc.edu (John Criswell) Date: Mon, 19 Sep 2011 15:35:31 -0000 Subject: [llvm-commits] [poolalloc] r140019 - in /poolalloc/trunk: lib/AssistDS/CMakeLists.txt lib/DSA/CMakeLists.txt runtime/CMakeLists.txt runtime/FL2Allocator/CMakeLists.txt tools/Pa/CMakeLists.txt tools/TypeChecker/CMakeLists.txt Message-ID: <20110919153531.DB66F2A6C12C@llvm.org> Author: criswell Date: Mon Sep 19 10:35:31 2011 New Revision: 140019 URL: http://llvm.org/viewvc/llvm-project?rev=140019&view=rev Log: Updates to the cmake build files. Patches contributed by Ryuta Suzuki. Modified: poolalloc/trunk/lib/AssistDS/CMakeLists.txt poolalloc/trunk/lib/DSA/CMakeLists.txt poolalloc/trunk/runtime/CMakeLists.txt poolalloc/trunk/runtime/FL2Allocator/CMakeLists.txt poolalloc/trunk/tools/Pa/CMakeLists.txt poolalloc/trunk/tools/TypeChecker/CMakeLists.txt Modified: poolalloc/trunk/lib/AssistDS/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/AssistDS/CMakeLists.txt?rev=140019&r1=140018&r2=140019&view=diff ============================================================================== --- poolalloc/trunk/lib/AssistDS/CMakeLists.txt (original) +++ poolalloc/trunk/lib/AssistDS/CMakeLists.txt Mon Sep 19 10:35:31 2011 @@ -5,7 +5,7 @@ DynCount.cpp FuncSimplify.cpp FuncSpec.cpp - GEPExprArg.cpp + GEPExprArgs.cpp IndCloner.cpp Int2PtrCmp.cpp LoadArgs.cpp Modified: poolalloc/trunk/lib/DSA/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/CMakeLists.txt?rev=140019&r1=140018&r2=140019&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/CMakeLists.txt (original) +++ poolalloc/trunk/lib/DSA/CMakeLists.txt Mon Sep 19 10:35:31 2011 @@ -1,5 +1,6 @@ add_llvm_library(LLVMDataStructure AddressTakenAnalysis.cpp + AllocatorIdentification.cpp Basic.cpp BottomUpClosure.cpp CallTargets.cpp @@ -8,8 +9,6 @@ DSGraph.cpp DSTest.cpp DataStructure.cpp - DataStructureAA.cpp - DataStructureOpt.cpp DataStructureStats.cpp EntryPointAnalysis.cpp EquivClassGraphs.cpp @@ -18,8 +17,6 @@ Printer.cpp SanityCheck.cpp StdLibPass.cpp - Steensgaard.cpp - SteensgaardAA.cpp TopDownClosure.cpp TypeSafety.cpp ) Modified: poolalloc/trunk/runtime/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/runtime/CMakeLists.txt?rev=140019&r1=140018&r2=140019&view=diff ============================================================================== --- poolalloc/trunk/runtime/CMakeLists.txt (original) +++ poolalloc/trunk/runtime/CMakeLists.txt Mon Sep 19 10:35:31 2011 @@ -4,6 +4,8 @@ file(GLOB entries *) foreach(entry ${entries}) if(IS_DIRECTORY ${entry} AND EXISTS ${entry}/CMakeLists.txt) - add_subdirectory(${entry}) + if(NOT ${entry} MATCHES "FreeListAllocator") + add_subdirectory(${entry}) + endif() endif() endforeach(entry) Modified: poolalloc/trunk/runtime/FL2Allocator/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/runtime/FL2Allocator/CMakeLists.txt?rev=140019&r1=140018&r2=140019&view=diff ============================================================================== --- poolalloc/trunk/runtime/FL2Allocator/CMakeLists.txt (original) +++ poolalloc/trunk/runtime/FL2Allocator/CMakeLists.txt Mon Sep 19 10:35:31 2011 @@ -1,9 +1,8 @@ include_directories(/localhome/simmon12/progs/dyncall-0.5/dyncall) link_directories(/localhome/simmon12/progs/dyncall-0.5/dyncall/build_out/linux_x86_gcc_release) -file(GLOB sources *.cpp) -add_llvm_library( poolalloc_rt ${sources} ) +add_llvm_library( poolalloc_rt PoolAllocator.cpp ) set_property( - TARGET poolalloc_rt + TARGET poolalloc_rt PROPERTY COMPILE_DEFINITIONS USE_DYNCALL ) target_link_libraries( poolalloc_rt dyncall_s ) Modified: poolalloc/trunk/tools/Pa/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/tools/Pa/CMakeLists.txt?rev=140019&r1=140018&r2=140019&view=diff ============================================================================== --- poolalloc/trunk/tools/Pa/CMakeLists.txt (original) +++ poolalloc/trunk/tools/Pa/CMakeLists.txt Mon Sep 19 10:35:31 2011 @@ -1,5 +1,4 @@ set(LLVM_LINK_COMPONENTS bitreader bitwriter instrumentation scalaropts ipo nativecodegen) -file(GLOB sources *.cpp) add_definitions(-fno-exceptions) -add_llvm_tool( pa ${sources} ) +add_llvm_tool( pa pa.cpp ) target_link_libraries(pa LLVMDataStructure poolalloc) Modified: poolalloc/trunk/tools/TypeChecker/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/tools/TypeChecker/CMakeLists.txt?rev=140019&r1=140018&r2=140019&view=diff ============================================================================== --- poolalloc/trunk/tools/TypeChecker/CMakeLists.txt (original) +++ poolalloc/trunk/tools/TypeChecker/CMakeLists.txt Mon Sep 19 10:35:31 2011 @@ -1,5 +1,4 @@ set(LLVM_LINK_COMPONENTS bitreader bitwriter instrumentation scalaropts ipo nativecodegen) -file(GLOB sources *.cpp) add_definitions(-fno-exceptions) -add_llvm_tool( tc ${sources} ) +add_llvm_tool( tc tc.cpp ) target_link_libraries(tc LLVMDataStructure AssistDS ) From criswell at uiuc.edu Mon Sep 19 10:37:37 2011 From: criswell at uiuc.edu (John Criswell) Date: Mon, 19 Sep 2011 15:37:37 -0000 Subject: [llvm-commits] [poolalloc] r140020 - /poolalloc/trunk/runtime/FL2Allocator/CMakeLists.txt Message-ID: <20110919153737.82F802A6C12C@llvm.org> Author: criswell Date: Mon Sep 19 10:37:37 2011 New Revision: 140020 URL: http://llvm.org/viewvc/llvm-project?rev=140020&view=rev Log: Fixed CMake build of the FL2 Allocator. I basically disbled a C preprocessor macro that isn't defined when using make. Modified: poolalloc/trunk/runtime/FL2Allocator/CMakeLists.txt Modified: poolalloc/trunk/runtime/FL2Allocator/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/runtime/FL2Allocator/CMakeLists.txt?rev=140020&r1=140019&r2=140020&view=diff ============================================================================== --- poolalloc/trunk/runtime/FL2Allocator/CMakeLists.txt (original) +++ poolalloc/trunk/runtime/FL2Allocator/CMakeLists.txt Mon Sep 19 10:37:37 2011 @@ -3,6 +3,6 @@ add_llvm_library( poolalloc_rt PoolAllocator.cpp ) set_property( TARGET poolalloc_rt - PROPERTY COMPILE_DEFINITIONS USE_DYNCALL + PROPERTY COMPILE_DEFINITIONS ) target_link_libraries( poolalloc_rt dyncall_s ) From criswell at uiuc.edu Mon Sep 19 10:49:01 2011 From: criswell at uiuc.edu (John Criswell) Date: Mon, 19 Sep 2011 15:49:01 -0000 Subject: [llvm-commits] [poolalloc] r140021 - in /poolalloc/trunk/tools: CMakeLists.txt WatchDog/CMakeLists.txt Message-ID: <20110919154901.ECDB72A6C12C@llvm.org> Author: criswell Date: Mon Sep 19 10:49:01 2011 New Revision: 140021 URL: http://llvm.org/viewvc/llvm-project?rev=140021&view=rev Log: Added a CMakeLists.txt file for the WatchDog program. Modified the tools directory so that it only builds the WatchDog program right now. Added: poolalloc/trunk/tools/WatchDog/CMakeLists.txt Modified: poolalloc/trunk/tools/CMakeLists.txt Modified: poolalloc/trunk/tools/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/tools/CMakeLists.txt?rev=140021&r1=140020&r2=140021&view=diff ============================================================================== --- poolalloc/trunk/tools/CMakeLists.txt (original) +++ poolalloc/trunk/tools/CMakeLists.txt Mon Sep 19 10:49:01 2011 @@ -2,8 +2,9 @@ # Note that explicit cmake invocation is required every time a new project is # added or removed. file(GLOB entries *) -foreach(entry ${entries}) - if(IS_DIRECTORY ${entry} AND EXISTS ${entry}/CMakeLists.txt) - add_subdirectory(${entry}) - endif() -endforeach(entry) +add_subdirectory("WatchDog") +#foreach(entry ${entries}) +# if(IS_DIRECTORY ${entry} AND EXISTS ${entry}/CMakeLists.txt) +# add_subdirectory(${entry}) +# endif() +#endforeach(entry) Added: poolalloc/trunk/tools/WatchDog/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/tools/WatchDog/CMakeLists.txt?rev=140021&view=auto ============================================================================== --- poolalloc/trunk/tools/WatchDog/CMakeLists.txt (added) +++ poolalloc/trunk/tools/WatchDog/CMakeLists.txt Mon Sep 19 10:49:01 2011 @@ -0,0 +1,3 @@ +set(LLVM_LINK_COMPONENTS bitreader bitwriter instrumentation scalaropts ipo nativecodegen) +add_definitions(-fno-exceptions) +add_llvm_tool( watchdog WatchDog.cpp ) From grosbach at apple.com Mon Sep 19 12:37:48 2011 From: grosbach at apple.com (Jim Grosbach) Date: Mon, 19 Sep 2011 17:37:48 -0000 Subject: [llvm-commits] [llvm] r140024 - /llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Message-ID: <20110919173748.C26F72A6C12C@llvm.org> Author: grosbach Date: Mon Sep 19 12:37:48 2011 New Revision: 140024 URL: http://llvm.org/viewvc/llvm-project?rev=140024&view=rev Log: Thumb2 assembly parsing and encoding for SUB(register). Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s?rev=140024&r1=140023&r2=140024&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s (original) +++ llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Mon Sep 19 12:37:48 2011 @@ -2421,7 +2421,19 @@ @------------------------------------------------------------------------------ @ SUB (register) @------------------------------------------------------------------------------ + sub r4, r5, r6 + sub r4, r5, r6, lsl #5 + sub r4, r5, r6, lsr #5 + sub.w r4, r5, r6, lsr #5 + sub r4, r5, r6, asr #5 + sub r4, r5, r6, ror #5 sub.w r5, r2, r12, rrx -@ CHECK: sub.w r5, r2, r12, rrx @ encoding: [0xa2,0xeb,0x3c,0x05] +@ CHECK: sub.w r4, r5, r6 @ encoding: [0xa5,0xeb,0x06,0x04] +@ CHECK: sub.w r4, r5, r6, lsl #5 @ encoding: [0xa5,0xeb,0x46,0x14] +@ CHECK: sub.w r4, r5, r6, lsr #5 @ encoding: [0xa5,0xeb,0x56,0x14] +@ CHECK: sub.w r4, r5, r6, lsr #5 @ encoding: [0xa5,0xeb,0x56,0x14] +@ CHECK: sub.w r4, r5, r6, asr #5 @ encoding: [0xa5,0xeb,0x66,0x14] +@ CHECK: sub.w r4, r5, r6, ror #5 @ encoding: [0xa5,0xeb,0x76,0x14] +@ CHECK: sub.w r5, r2, r12, rrx @ encoding: [0xa2,0xeb,0x3c,0x05] From grosbach at apple.com Mon Sep 19 12:40:35 2011 From: grosbach at apple.com (Jim Grosbach) Date: Mon, 19 Sep 2011 17:40:35 -0000 Subject: [llvm-commits] [llvm] r140025 - /llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Message-ID: <20110919174035.58AC12A6C12C@llvm.org> Author: grosbach Date: Mon Sep 19 12:40:35 2011 New Revision: 140025 URL: http://llvm.org/viewvc/llvm-project?rev=140025&view=rev Log: Thumb2 assembly parsing and encoding for SVC. Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s?rev=140025&r1=140024&r2=140025&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s (original) +++ llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Mon Sep 19 12:40:35 2011 @@ -2437,3 +2437,17 @@ @ CHECK: sub.w r4, r5, r6, ror #5 @ encoding: [0xa5,0xeb,0x76,0x14] @ CHECK: sub.w r5, r2, r12, rrx @ encoding: [0xa2,0xeb,0x3c,0x05] + + at ------------------------------------------------------------------------------ +@ SVC + at ------------------------------------------------------------------------------ + svc #0 + ite eq + svceq #255 + swine #33 + +@ CHECK: svc #0 @ encoding: [0x00,0xdf] +@ CHECK: ite eq @ encoding: [0x0c,0xbf] +@ CHECK: svceq #255 @ encoding: [0xff,0xdf] +@ CHECK: svcne #33 @ encoding: [0x21,0xdf] + From atrick at apple.com Mon Sep 19 12:54:40 2011 From: atrick at apple.com (Andrew Trick) Date: Mon, 19 Sep 2011 17:54:40 -0000 Subject: [llvm-commits] [llvm] r140026 - in /llvm/trunk: lib/Transforms/Utils/SimplifyIndVar.cpp test/Transforms/IndVarSimplify/2011-09-19-vectoriv.ll Message-ID: <20110919175440.179CC2A6C12C@llvm.org> Author: atrick Date: Mon Sep 19 12:54:39 2011 New Revision: 140026 URL: http://llvm.org/viewvc/llvm-project?rev=140026&view=rev Log: [indvars] Fix PR10946: SCEV cannot handle Vector IVs. Added: llvm/trunk/test/Transforms/IndVarSimplify/2011-09-19-vectoriv.ll Modified: llvm/trunk/lib/Transforms/Utils/SimplifyIndVar.cpp Modified: llvm/trunk/lib/Transforms/Utils/SimplifyIndVar.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/SimplifyIndVar.cpp?rev=140026&r1=140025&r2=140026&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/SimplifyIndVar.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/SimplifyIndVar.cpp Mon Sep 19 12:54:39 2011 @@ -85,6 +85,8 @@ /// foldIVUser - Fold an IV operand into its use. This removes increments of an /// aligned IV when used by a instruction that ignores the low bits. /// +/// IVOperand is guaranteed SCEVable, but UseInst may not be. +/// /// Return the operand of IVOperand for this induction variable if IVOperand can /// be folded (in case more folding opportunities have been exposed). /// Otherwise return null. @@ -241,6 +243,7 @@ /// eliminateIVUser - Eliminate an operation that consumes a simple IV and has /// no observable side-effect given the range of IV values. +/// IVOperand is guaranteed SCEVable, but UseInst may not be. bool SimplifyIndvar::eliminateIVUser(Instruction *UseInst, Instruction *IVOperand) { if (ICmpInst *ICmp = dyn_cast(UseInst)) { @@ -324,6 +327,9 @@ /// Once DisableIVRewrite is default, LSR will be the only client of IVUsers. /// void SimplifyIndvar::simplifyUsers(PHINode *CurrIV, IVVisitor *V) { + if (!SE->isSCEVable(CurrIV->getType())) + return; + // Instructions processed by SimplifyIndvar for CurrIV. SmallPtrSet Simplified; Added: llvm/trunk/test/Transforms/IndVarSimplify/2011-09-19-vectoriv.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IndVarSimplify/2011-09-19-vectoriv.ll?rev=140026&view=auto ============================================================================== --- llvm/trunk/test/Transforms/IndVarSimplify/2011-09-19-vectoriv.ll (added) +++ llvm/trunk/test/Transforms/IndVarSimplify/2011-09-19-vectoriv.ll Mon Sep 19 12:54:39 2011 @@ -0,0 +1,16 @@ +; RUN: opt < %s -indvars -S | FileCheck %s +; PR10946: Vector IVs are not SCEVable. +; CHECK-NOT: phi +define void @test() nounwind { +allocas: + br i1 undef, label %cif_done, label %for_loop398 + +cif_done: ; preds = %allocas + ret void + +for_loop398: ; preds = %for_loop398, %allocas + %storemerge35 = phi <4 x i32> [ %storemerge, %for_loop398 ], [ undef, %allocas ] + %bincmp431 = icmp sge <4 x i32> %storemerge35, + %storemerge = bitcast <4 x float> undef to <4 x i32> + br label %for_loop398 +} From benny.kra at googlemail.com Mon Sep 19 12:56:00 2011 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Mon, 19 Sep 2011 17:56:00 -0000 Subject: [llvm-commits] [llvm] r140027 - /llvm/trunk/lib/MC/MCInstrAnalysis.cpp Message-ID: <20110919175600.DF7412A6C12C@llvm.org> Author: d0k Date: Mon Sep 19 12:56:00 2011 New Revision: 140027 URL: http://llvm.org/viewvc/llvm-project?rev=140027&view=rev Log: MCInstrAnalysis: Don't crash on instructions with no operands. Modified: llvm/trunk/lib/MC/MCInstrAnalysis.cpp Modified: llvm/trunk/lib/MC/MCInstrAnalysis.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCInstrAnalysis.cpp?rev=140027&r1=140026&r2=140027&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCInstrAnalysis.cpp (original) +++ llvm/trunk/lib/MC/MCInstrAnalysis.cpp Mon Sep 19 12:56:00 2011 @@ -12,7 +12,8 @@ uint64_t MCInstrAnalysis::evaluateBranch(const MCInst &Inst, uint64_t Addr, uint64_t Size) const { - if (Info->get(Inst.getOpcode()).OpInfo[0].OperandType != MCOI::OPERAND_PCREL) + if (Inst.getNumOperands() == 0 || + Info->get(Inst.getOpcode()).OpInfo[0].OperandType != MCOI::OPERAND_PCREL) return -1ULL; int64_t Imm = Inst.getOperand(0).getImm(); From benny.kra at googlemail.com Mon Sep 19 12:56:05 2011 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Mon, 19 Sep 2011 17:56:05 -0000 Subject: [llvm-commits] [llvm] r140028 - in /llvm/trunk/tools/llvm-objdump: CMakeLists.txt MCFunction.cpp MCFunction.h MachODump.cpp llvm-objdump.cpp llvm-objdump.h Message-ID: <20110919175605.156C22A6C12C@llvm.org> Author: d0k Date: Mon Sep 19 12:56:04 2011 New Revision: 140028 URL: http://llvm.org/viewvc/llvm-project?rev=140028&view=rev Log: Add a MachO-specific "mode" to llvm-objdump, that, if enabled, gathers additional information that are only available on MachO. - It can take FunctionStarts from a binary to find entry points more accurately. - Symbol offsets in executables are correct now. Added: llvm/trunk/tools/llvm-objdump/MachODump.cpp llvm/trunk/tools/llvm-objdump/llvm-objdump.h Modified: llvm/trunk/tools/llvm-objdump/CMakeLists.txt llvm/trunk/tools/llvm-objdump/MCFunction.cpp llvm/trunk/tools/llvm-objdump/MCFunction.h llvm/trunk/tools/llvm-objdump/llvm-objdump.cpp Modified: llvm/trunk/tools/llvm-objdump/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-objdump/CMakeLists.txt?rev=140028&r1=140027&r2=140028&view=diff ============================================================================== --- llvm/trunk/tools/llvm-objdump/CMakeLists.txt (original) +++ llvm/trunk/tools/llvm-objdump/CMakeLists.txt Mon Sep 19 12:56:04 2011 @@ -8,5 +8,6 @@ add_llvm_tool(llvm-objdump llvm-objdump.cpp + MachODump.cpp MCFunction.cpp ) Modified: llvm/trunk/tools/llvm-objdump/MCFunction.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-objdump/MCFunction.cpp?rev=140028&r1=140027&r2=140028&view=diff ============================================================================== --- llvm/trunk/tools/llvm-objdump/MCFunction.cpp (original) +++ llvm/trunk/tools/llvm-objdump/MCFunction.cpp Mon Sep 19 12:56:04 2011 @@ -30,48 +30,77 @@ MCFunction::createFunctionFromMC(StringRef Name, const MCDisassembler *DisAsm, const MemoryObject &Region, uint64_t Start, uint64_t End, const MCInstrAnalysis *Ana, - raw_ostream &DebugOut) { + raw_ostream &DebugOut, + SmallVectorImpl &Calls) { + std::vector Instructions; std::set Splits; Splits.insert(Start); - std::vector Instructions; uint64_t Size; - // Disassemble code and gather basic block split points. - for (uint64_t Index = Start; Index < End; Index += Size) { - MCInst Inst; + MCFunction f(Name); - if (DisAsm->getInstruction(Inst, Size, Region, Index, DebugOut, nulls())) { - if (Ana->isBranch(Inst)) { - uint64_t targ = Ana->evaluateBranch(Inst, Index, Size); - // FIXME: Distinguish relocations from nop jumps. - if (targ != -1ULL && (targ == Index+Size || targ >= End)) { + { + DenseSet VisitedInsts; + SmallVector WorkList; + WorkList.push_back(Start); + // Disassemble code and gather basic block split points. + while (!WorkList.empty()) { + uint64_t Index = WorkList.pop_back_val(); + if (VisitedInsts.find(Index) != VisitedInsts.end()) + continue; + + for (;Index < End; Index += Size) { + MCInst Inst; + + if (DisAsm->getInstruction(Inst, Size, Region, Index, DebugOut, nulls())){ + if (Ana->isBranch(Inst)) { + uint64_t targ = Ana->evaluateBranch(Inst, Index, Size); + if (targ != -1ULL && targ == Index+Size) { + Instructions.push_back(MCDecodedInst(Index, Size, Inst)); + VisitedInsts.insert(Index); + continue; + } + if (targ != -1ULL) { + Splits.insert(targ); + WorkList.push_back(targ); + WorkList.push_back(Index+Size); + } + Splits.insert(Index+Size); + Instructions.push_back(MCDecodedInst(Index, Size, Inst)); + VisitedInsts.insert(Index); + break; + } else if (Ana->isReturn(Inst)) { + Splits.insert(Index+Size); Instructions.push_back(MCDecodedInst(Index, Size, Inst)); - continue; // Skip branches that leave the function. + VisitedInsts.insert(Index); + break; + } else if (Ana->isCall(Inst)) { + uint64_t targ = Ana->evaluateBranch(Inst, Index, Size); + if (targ != -1ULL && targ != Index+Size) { + Calls.push_back(targ); + } } - if (targ != -1ULL) - Splits.insert(targ); - Splits.insert(Index+Size); - } else if (Ana->isReturn(Inst)) { - Splits.insert(Index+Size); - } - Instructions.push_back(MCDecodedInst(Index, Size, Inst)); - } else { - errs() << "warning: invalid instruction encoding\n"; - if (Size == 0) - Size = 1; // skip illegible bytes + Instructions.push_back(MCDecodedInst(Index, Size, Inst)); + VisitedInsts.insert(Index); + } else { + VisitedInsts.insert(Index); + errs().write_hex(Index) << ": warning: invalid instruction encoding\n"; + if (Size == 0) + Size = 1; // skip illegible bytes + } } - + } } - MCFunction f(Name); + std::sort(Instructions.begin(), Instructions.end()); - // Create basic blocks. + // Create basic blocks. unsigned ii = 0, ie = Instructions.size(); for (std::set::iterator spi = Splits.begin(), - spe = Splits.end(); spi != spe; ++spi) { + spe = llvm::prior(Splits.end()); spi != spe; ++spi) { MCBasicBlock BB; - uint64_t BlockEnd = llvm::next(spi) == spe ? End : *llvm::next(spi); + uint64_t BlockEnd = *llvm::next(spi); // Add instructions to the BB. for (; ii != ie; ++ii) { if (Instructions[ii].Address < *spi || @@ -82,6 +111,8 @@ f.addBlock(*spi, BB); } + std::sort(f.Blocks.begin(), f.Blocks.end()); + // Calculate successors of each block. for (MCFunction::iterator i = f.begin(), e = f.end(); i != e; ++i) { MCBasicBlock &BB = i->second; @@ -94,16 +125,16 @@ // Indirect branch. Bail and add all blocks of the function as a // successor. for (MCFunction::iterator i = f.begin(), e = f.end(); i != e; ++i) - BB.addSucc(&i->second); + BB.addSucc(i->first); } else if (targ != Inst.Address+Inst.Size) - BB.addSucc(&f.getBlockAtAddress(targ)); + BB.addSucc(targ); // Conditional branches can also fall through to the next block. if (Ana->isConditionalBranch(Inst.Inst) && llvm::next(i) != e) - BB.addSucc(&llvm::next(i)->second); + BB.addSucc(llvm::next(i)->first); } else { // No branch. Fall through to the next block. if (!Ana->isReturn(Inst.Inst) && llvm::next(i) != e) - BB.addSucc(&llvm::next(i)->second); + BB.addSucc(llvm::next(i)->first); } } Modified: llvm/trunk/tools/llvm-objdump/MCFunction.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-objdump/MCFunction.h?rev=140028&r1=140027&r2=140028&view=diff ============================================================================== --- llvm/trunk/tools/llvm-objdump/MCFunction.h (original) +++ llvm/trunk/tools/llvm-objdump/MCFunction.h Mon Sep 19 12:56:04 2011 @@ -12,8 +12,11 @@ // //===----------------------------------------------------------------------===// +#ifndef LLVM_OBJECTDUMP_MCFUNCTION_H +#define LLVM_OBJECTDUMP_MCFUNCTION_H + #include "llvm/ADT/ArrayRef.h" -#include "llvm/ADT/SmallPtrSet.h" +#include "llvm/ADT/DenseSet.h" #include "llvm/MC/MCInst.h" #include @@ -31,15 +34,20 @@ uint64_t Size; MCInst Inst; + MCDecodedInst() {} MCDecodedInst(uint64_t Address, uint64_t Size, MCInst Inst) : Address(Address), Size(Size), Inst(Inst) {} + + bool operator<(const MCDecodedInst &RHS) const { + return Address < RHS.Address; + } }; /// MCBasicBlock - Consists of multiple MCDecodedInsts and a list of successing /// MCBasicBlocks. class MCBasicBlock { - SmallVector Insts; - typedef SmallPtrSet SetTy; + std::vector Insts; + typedef DenseSet SetTy; SetTy Succs; public: ArrayRef getInsts() const { return Insts; } @@ -48,10 +56,14 @@ succ_iterator succ_begin() const { return Succs.begin(); } succ_iterator succ_end() const { return Succs.end(); } - bool contains(MCBasicBlock *BB) const { return Succs.count(BB); } + bool contains(uint64_t Addr) const { return Succs.count(Addr); } void addInst(const MCDecodedInst &Inst) { Insts.push_back(Inst); } - void addSucc(MCBasicBlock *BB) { Succs.insert(BB); } + void addSucc(uint64_t Addr) { Succs.insert(Addr); } + + bool operator<(const MCBasicBlock &RHS) const { + return Insts.size() < RHS.Insts.size(); + } }; /// MCFunction - Represents a named function in machine code, containing @@ -59,7 +71,7 @@ class MCFunction { const StringRef Name; // Keep BBs sorted by address. - typedef std::map MapTy; + typedef std::vector > MapTy; MapTy Blocks; public: MCFunction(StringRef Name) : Name(Name) {} @@ -68,7 +80,8 @@ static MCFunction createFunctionFromMC(StringRef Name, const MCDisassembler *DisAsm, const MemoryObject &Region, uint64_t Start, uint64_t End, - const MCInstrAnalysis *Ana, raw_ostream &DebugOut); + const MCInstrAnalysis *Ana, raw_ostream &DebugOut, + SmallVectorImpl &Calls); typedef MapTy::iterator iterator; iterator begin() { return Blocks.begin(); } @@ -77,14 +90,11 @@ StringRef getName() const { return Name; } MCBasicBlock &addBlock(uint64_t Address, const MCBasicBlock &BB) { - assert(!Blocks.count(Address) && "Already a BB at address."); - return Blocks[Address] = BB; - } - - MCBasicBlock &getBlockAtAddress(uint64_t Address) { - assert(Blocks.count(Address) && "No BB at address."); - return Blocks[Address]; + Blocks.push_back(std::make_pair(Address, BB)); + return Blocks.back().second; } }; } + +#endif Added: llvm/trunk/tools/llvm-objdump/MachODump.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-objdump/MachODump.cpp?rev=140028&view=auto ============================================================================== --- llvm/trunk/tools/llvm-objdump/MachODump.cpp (added) +++ llvm/trunk/tools/llvm-objdump/MachODump.cpp Mon Sep 19 12:56:04 2011 @@ -0,0 +1,489 @@ +//===-- MachODump.cpp - Object file dumping utility for llvm --------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements the MachO-specific dumper for llvm-objdump. +// +//===----------------------------------------------------------------------===// + +#include "llvm-objdump.h" +#include "MCFunction.h" +#include "llvm/Support/MachO.h" +#include "llvm/Object/MachOObject.h" +#include "llvm/ADT/OwningPtr.h" +#include "llvm/ADT/Triple.h" +#include "llvm/ADT/STLExtras.h" +#include "llvm/MC/MCAsmInfo.h" +#include "llvm/MC/MCDisassembler.h" +#include "llvm/MC/MCInst.h" +#include "llvm/MC/MCInstPrinter.h" +#include "llvm/MC/MCInstrAnalysis.h" +#include "llvm/MC/MCInstrDesc.h" +#include "llvm/MC/MCInstrInfo.h" +#include "llvm/MC/MCSubtargetInfo.h" +#include "llvm/Support/CommandLine.h" +#include "llvm/Support/Debug.h" +#include "llvm/Support/Format.h" +#include "llvm/Support/GraphWriter.h" +#include "llvm/Support/MemoryBuffer.h" +#include "llvm/Support/TargetRegistry.h" +#include "llvm/Support/TargetSelect.h" +#include "llvm/Support/raw_ostream.h" +#include "llvm/Support/system_error.h" +#include +#include +using namespace llvm; +using namespace object; + +static cl::opt + CFG("cfg", cl::desc("Create a CFG for every symbol in the object file and" + "write it to a graphviz file (MachO-only)")); + +static const Target *GetTarget(const MachOObject *MachOObj) { + // Figure out the target triple. + llvm::Triple TT("unknown-unknown-unknown"); + switch (MachOObj->getHeader().CPUType) { + case llvm::MachO::CPUTypeI386: + TT.setArch(Triple::ArchType(Triple::x86)); + break; + case llvm::MachO::CPUTypeX86_64: + TT.setArch(Triple::ArchType(Triple::x86_64)); + break; + case llvm::MachO::CPUTypeARM: + TT.setArch(Triple::ArchType(Triple::arm)); + break; + case llvm::MachO::CPUTypePowerPC: + TT.setArch(Triple::ArchType(Triple::ppc)); + break; + case llvm::MachO::CPUTypePowerPC64: + TT.setArch(Triple::ArchType(Triple::ppc64)); + break; + } + + TripleName = TT.str(); + + // Get the target specific parser. + std::string Error; + const Target *TheTarget = TargetRegistry::lookupTarget(TripleName, Error); + if (TheTarget) + return TheTarget; + + errs() << "llvm-objdump: error: unable to get target for '" << TripleName + << "', see --version and --triple.\n"; + return 0; +} + +struct Section { + char Name[16]; + uint64_t Address; + uint64_t Size; + uint32_t Offset; + uint32_t NumRelocs; + uint64_t RelocTableOffset; +}; + +struct Symbol { + uint64_t Value; + uint32_t StringIndex; + uint8_t SectionIndex; + bool operator<(const Symbol &RHS) const { return Value < RHS.Value; } +}; + +static void DumpAddress(uint64_t Address, ArrayRef
Sections, + MachOObject *MachOObj, raw_ostream &OS) { + for (unsigned i = 0; i != Sections.size(); ++i) { + uint64_t addr = Address-Sections[i].Address; + if (Sections[i].Address <= Address && + Sections[i].Address + Sections[i].Size > Address) { + StringRef bytes = MachOObj->getData(Sections[i].Offset, + Sections[i].Size); + if (!strcmp(Sections[i].Name, "__cstring")) + OS << '"' << bytes.substr(addr, bytes.find('\0', addr)) << '"'; + if (!strcmp(Sections[i].Name, "__cfstring")) + OS << "@\"" << bytes.substr(addr, bytes.find('\0', addr)) << '"'; + } + } +} + +void llvm::DisassembleInputMachO(StringRef Filename) { + OwningPtr Buff; + + if (error_code ec = MemoryBuffer::getFileOrSTDIN(Filename, Buff)) { + errs() << "llvm-objdump: " << Filename << ": " << ec.message() << "\n"; + return; + } + + OwningPtr MachOObj(MachOObject::LoadFromBuffer(Buff.take())); + + const Target *TheTarget = GetTarget(MachOObj.get()); + if (!TheTarget) { + // GetTarget prints out stuff. + return; + } + const MCInstrInfo *InstrInfo = TheTarget->createMCInstrInfo(); + OwningPtr + InstrAnalysis(TheTarget->createMCInstrAnalysis(InstrInfo)); + + // Set up disassembler. + OwningPtr AsmInfo(TheTarget->createMCAsmInfo(TripleName)); + + if (!AsmInfo) { + errs() << "error: no assembly info for target " << TripleName << "\n"; + return; + } + + OwningPtr + STI(TheTarget->createMCSubtargetInfo(TripleName, "", "")); + + if (!STI) { + errs() << "error: no subtarget info for target " << TripleName << "\n"; + return; + } + + OwningPtr DisAsm(TheTarget->createMCDisassembler(*STI)); + if (!DisAsm) { + errs() << "error: no disassembler for target " << TripleName << "\n"; + return; + } + + int AsmPrinterVariant = AsmInfo->getAssemblerDialect(); + OwningPtr IP(TheTarget->createMCInstPrinter( + AsmPrinterVariant, *AsmInfo, *STI)); + if (!IP) { + errs() << "error: no instruction printer for target " << TripleName << '\n'; + return; + } + + outs() << '\n'; + outs() << Filename << ":\n\n"; + + const macho::Header &Header = MachOObj->getHeader(); + + const MachOObject::LoadCommandInfo *SymtabLCI = 0; + for (unsigned i = 0; i != Header.NumLoadCommands; ++i) { + const MachOObject::LoadCommandInfo &LCI = MachOObj->getLoadCommandInfo(i); + switch (LCI.Command.Type) { + case macho::LCT_Symtab: + SymtabLCI = &LCI; + break; + } + } + + // Read and register the symbol table data. + InMemoryStruct SymtabLC; + MachOObj->ReadSymtabLoadCommand(*SymtabLCI, SymtabLC); + MachOObj->RegisterStringTable(*SymtabLC); + + std::vector
Sections; + std::vector Symbols; + std::vector UnsortedSymbols; // FIXME: duplication + SmallVector FoundFns; + + for (unsigned i = 0; i != Header.NumLoadCommands; ++i) { + const MachOObject::LoadCommandInfo &LCI = MachOObj->getLoadCommandInfo(i); + if (LCI.Command.Type == macho::LCT_Segment) { + InMemoryStruct SegmentLC; + MachOObj->ReadSegmentLoadCommand(LCI, SegmentLC); + + for (unsigned SectNum = 0; SectNum != SegmentLC->NumSections; ++SectNum) { + InMemoryStruct Sect; + MachOObj->ReadSection(LCI, SectNum, Sect); + + Section S; + memcpy(S.Name, Sect->Name, 16); + S.Address = Sect->Address; + S.Size = Sect->Size; + S.Offset = Sect->Offset; + S.NumRelocs = Sect->NumRelocationTableEntries; + S.RelocTableOffset = Sect->RelocationTableOffset; + Sections.push_back(S); + + for (unsigned i = 0; i != SymtabLC->NumSymbolTableEntries; ++i) { + InMemoryStruct STE; + MachOObj->ReadSymbolTableEntry(SymtabLC->SymbolTableOffset, i, STE); + + Symbol S; + S.StringIndex = STE->StringIndex; + S.SectionIndex = STE->SectionIndex; + S.Value = STE->Value; + Symbols.push_back(S); + UnsortedSymbols.push_back(Symbols.back()); + } + } + } else if (LCI.Command.Type == macho::LCT_Segment64) { + InMemoryStruct Segment64LC; + MachOObj->ReadSegment64LoadCommand(LCI, Segment64LC); + + for (unsigned SectNum = 0; SectNum != Segment64LC->NumSections; ++SectNum) { + InMemoryStruct Sect64; + MachOObj->ReadSection64(LCI, SectNum, Sect64); + + Section S; + memcpy(S.Name, Sect64->Name, 16); + S.Address = Sect64->Address; + S.Size = Sect64->Size; + S.Offset = Sect64->Offset; + S.NumRelocs = Sect64->NumRelocationTableEntries; + S.RelocTableOffset = Sect64->RelocationTableOffset; + Sections.push_back(S); + + for (unsigned i = 0; i != SymtabLC->NumSymbolTableEntries; ++i) { + InMemoryStruct STE; + MachOObj->ReadSymbol64TableEntry(SymtabLC->SymbolTableOffset, i, STE); + + Symbol S; + S.StringIndex = STE->StringIndex; + S.SectionIndex = STE->SectionIndex; + S.Value = STE->Value; + Symbols.push_back(S); + UnsortedSymbols.push_back(Symbols.back()); + } + } + } else if (LCI.Command.Type == macho::LCT_FunctionStarts) { + InMemoryStruct LLC; + MachOObj->ReadLinkeditDataLoadCommand(LCI, LLC); + + MachOObj->ReadULEB128s(LLC->DataOffset, FoundFns); + } + } + + std::map FunctionMap; + + // Sort the symbols by address, just in case they didn't come in that way. + array_pod_sort(Symbols.begin(), Symbols.end()); + +#ifndef NDEBUG + raw_ostream &DebugOut = DebugFlag ? dbgs() : nulls(); +#else + raw_ostream &DebugOut = nulls(); +#endif + + SmallVector Functions; + + for (unsigned SectIdx = 0; SectIdx != Sections.size(); SectIdx++) { + if (strcmp(Sections[SectIdx].Name, "__text")) + continue; + + uint64_t VMAddr = Sections[SectIdx].Address - Sections[SectIdx].Offset; + for (unsigned i = 0, e = FoundFns.size(); i != e; ++i) + FunctionMap.insert(std::pair(FoundFns[i]+VMAddr,0)); + + StringRef Bytes = MachOObj->getData(Sections[SectIdx].Offset, + Sections[SectIdx].Size); + StringRefMemoryObject memoryObject(Bytes); + bool symbolTableWorked = false; + + std::vector > Relocs; + for (unsigned j = 0; j != Sections[SectIdx].NumRelocs; ++j) { + InMemoryStruct RE; + MachOObj->ReadRelocationEntry(Sections[SectIdx].RelocTableOffset, j, RE); + Relocs.push_back(std::make_pair(RE->Word0, RE->Word1 & 0xffffff)); + } + array_pod_sort(Relocs.begin(), Relocs.end()); + + for (unsigned SymIdx = 0; SymIdx != Symbols.size(); SymIdx++) { + if ((unsigned)Symbols[SymIdx].SectionIndex - 1 != SectIdx) + continue; + + uint64_t Start = Symbols[SymIdx].Value - Sections[SectIdx].Address; + uint64_t End = (SymIdx+1 == Symbols.size() || + Symbols[SymIdx].SectionIndex != Symbols[SymIdx+1].SectionIndex) ? + Sections[SectIdx].Size : + Symbols[SymIdx+1].Value - Sections[SectIdx].Address; + uint64_t Size; + + if (Start >= End) + continue; + + symbolTableWorked = true; + + if (!CFG) { + outs() << MachOObj->getStringAtIndex(Symbols[SymIdx].StringIndex) + << ":\n"; + for (uint64_t Index = Start; Index < End; Index += Size) { + MCInst Inst; + + if (DisAsm->getInstruction(Inst, Size, memoryObject, Index, + DebugOut, nulls())) { + outs() << format("%8llx:\t", Sections[SectIdx].Address + Index); + DumpBytes(StringRef(Bytes.data() + Index, Size)); + IP->printInst(&Inst, outs(), ""); + outs() << "\n"; + } else { + errs() << "llvm-objdump: warning: invalid instruction encoding\n"; + if (Size == 0) + Size = 1; // skip illegible bytes + } + } + } else { + // Create CFG and use it for disassembly. + SmallVector Calls; + MCFunction f = + MCFunction::createFunctionFromMC( + MachOObj->getStringAtIndex(Symbols[SymIdx].StringIndex), + DisAsm.get(), + memoryObject, Start, End, + InstrAnalysis.get(), DebugOut, + Calls); + + Functions.push_back(f); + FunctionMap[Start] = &Functions.back(); + + for (unsigned i = 0, e = Calls.size(); i != e; ++i) + FunctionMap.insert(std::pair(Calls[i], 0)); + } + } + + if (CFG) { + if (!symbolTableWorked) { + // Create CFG and use it for disassembly. + SmallVector Calls; + MCFunction f = + MCFunction::createFunctionFromMC("__TEXT", DisAsm.get(), + memoryObject, 0, Sections[SectIdx].Size, + InstrAnalysis.get(), DebugOut, + Calls); + + Functions.push_back(f); + FunctionMap[Sections[SectIdx].Offset] = &Functions.back(); + + for (unsigned i = 0, e = Calls.size(); i != e; ++i) + FunctionMap.insert(std::pair(Calls[i], 0)); + } + for (std::map::iterator mi = FunctionMap.begin(), + me = FunctionMap.end(); mi != me; ++mi) + if (mi->second == 0) { + SmallVector Calls; + MCFunction f = + MCFunction::createFunctionFromMC("unknown", DisAsm.get(), + memoryObject, mi->first, + Sections[SectIdx].Size, + InstrAnalysis.get(), DebugOut, + Calls); + Functions.push_back(f); + mi->second = &Functions.back(); + for (unsigned i = 0, e = Calls.size(); i != e; ++i) + if (FunctionMap.insert(std::pair(Calls[i],0)) + .second) + mi = FunctionMap.begin(); + } + + DenseSet PrintedBlocks; + for (unsigned ffi = 0, ffe = Functions.size(); ffi != ffe; ++ffi) { + MCFunction &f = Functions[ffi]; + for (MCFunction::iterator fi = f.begin(), fe = f.end(); fi != fe; ++fi){ + if (!PrintedBlocks.insert(fi->first).second) + continue; + bool hasPreds = FunctionMap.find(fi->first) != FunctionMap.end(); + + // Only print blocks that have predecessors. + // FIXME: Slow. + for (MCFunction::iterator pi = f.begin(), pe = f.end(); pi != pe; + ++pi) + if (pi->second.contains(fi->first)) { + hasPreds = true; + break; + } + + // Data block. + if (!hasPreds && fi != f.begin()) { + uint64_t End = llvm::next(fi) == fe ? Sections[SectIdx].Size : + llvm::next(fi)->first; + outs() << "# " << End-fi->first << " bytes of data:\n"; + for (unsigned pos = fi->first; pos != End; ++pos) { + outs() << format("%8x:\t", Sections[SectIdx].Address + pos); + DumpBytes(StringRef(Bytes.data() + pos, 1)); + outs() << format("\t.byte 0x%02x\n", (uint8_t)Bytes[pos]); + } + continue; + } + + if (fi->second.contains(fi->first)) + outs() << "# Loop begin:\n"; + + for (unsigned ii = 0, ie = fi->second.getInsts().size(); ii != ie; + ++ii) { + const MCDecodedInst &Inst = fi->second.getInsts()[ii]; + if (FunctionMap.find(Sections[SectIdx].Address + Inst.Address) != + FunctionMap.end()) + outs() << FunctionMap[Sections[SectIdx].Address + Inst.Address]-> + getName() << ":\n"; + outs() << format("%8llx:\t", Sections[SectIdx].Address + + Inst.Address); + DumpBytes(StringRef(Bytes.data() + Inst.Address, Inst.Size)); + // Simple loops. + if (fi->second.contains(fi->first)) + outs() << '\t'; + IP->printInst(&Inst.Inst, outs(), ""); + for (unsigned j = 0; j != Relocs.size(); ++j) + if (Relocs[j].first >= Sections[SectIdx].Address + Inst.Address && + Relocs[j].first < Sections[SectIdx].Address + Inst.Address + + Inst.Size) { + outs() << "\t# " + << MachOObj->getStringAtIndex( + UnsortedSymbols[Relocs[j].second].StringIndex) + << ' '; + DumpAddress(UnsortedSymbols[Relocs[j].second].Value, Sections, + MachOObj.get(), outs()); + } + uint64_t targ = InstrAnalysis->evaluateBranch(Inst.Inst, + Inst.Address, + Inst.Size); + if (targ != -1ULL) + DumpAddress(targ, Sections, MachOObj.get(), outs()); + + outs() << '\n'; + } + } + + // Start a new dot file. + std::string Error; + raw_fd_ostream Out((f.getName().str() + ".dot").c_str(), Error); + if (!Error.empty()) { + errs() << "llvm-objdump: warning: " << Error << '\n'; + continue; + } + + Out << "digraph " << f.getName() << " {\n"; + Out << "graph [ rankdir = \"LR\" ];\n"; + for (MCFunction::iterator i = f.begin(), e = f.end(); i != e; ++i) { + bool hasPreds = false; + // Only print blocks that have predecessors. + // FIXME: Slow. + for (MCFunction::iterator pi = f.begin(), pe = f.end(); pi != pe; + ++pi) + if (pi->second.contains(i->first)) { + hasPreds = true; + break; + } + + if (!hasPreds && i != f.begin()) + continue; + + Out << '"' << i->first << "\" [ label=\""; + // Print instructions. + for (unsigned ii = 0, ie = i->second.getInsts().size(); ii != ie; + ++ii) { + // Escape special chars and print the instruction in mnemonic form. + std::string Str; + raw_string_ostream OS(Str); + IP->printInst(&i->second.getInsts()[ii].Inst, OS, ""); + Out << DOT::EscapeString(OS.str()) << '|'; + } + Out << "\" shape=\"record\" ];\n"; + + // Add edges. + for (MCBasicBlock::succ_iterator si = i->second.succ_begin(), + se = i->second.succ_end(); si != se; ++si) + Out << i->first << ":o -> " << *si <<":a\n"; + } + Out << "}\n"; + } + } + } +} Modified: llvm/trunk/tools/llvm-objdump/llvm-objdump.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-objdump/llvm-objdump.cpp?rev=140028&r1=140027&r2=140028&view=diff ============================================================================== --- llvm/trunk/tools/llvm-objdump/llvm-objdump.cpp (original) +++ llvm/trunk/tools/llvm-objdump/llvm-objdump.cpp Mon Sep 19 12:56:04 2011 @@ -13,6 +13,7 @@ // //===----------------------------------------------------------------------===// +#include "llvm-objdump.h" #include "MCFunction.h" #include "llvm/Object/ObjectFile.h" #include "llvm/ADT/OwningPtr.h" @@ -46,39 +47,37 @@ using namespace llvm; using namespace object; -namespace { - cl::list - InputFilenames(cl::Positional, cl::desc(""), - cl::ZeroOrMore); - - cl::opt - Disassemble("disassemble", - cl::desc("Display assembler mnemonics for the machine instructions")); - cl::alias - Disassembled("d", cl::desc("Alias for --disassemble"), - cl::aliasopt(Disassemble)); - - cl::opt - CFG("cfg", cl::desc("Create a CFG for every symbol in the object file and" - "write it to a graphviz file")); +static cl::list +InputFilenames(cl::Positional, cl::desc(""),cl::ZeroOrMore); - cl::opt - TripleName("triple", cl::desc("Target triple to disassemble for, " +static cl::opt +Disassemble("disassemble", + cl::desc("Display assembler mnemonics for the machine instructions")); +static cl::alias +Disassembled("d", cl::desc("Alias for --disassemble"), + cl::aliasopt(Disassemble)); + +static cl::opt +MachO("macho", cl::desc("Use MachO specific object file parser")); +static cl::alias +MachOm("m", cl::desc("Alias for --macho"), cl::aliasopt(MachO)); + +cl::opt +llvm::TripleName("triple", cl::desc("Target triple to disassemble for, " + "see -version for available targets")); + +cl::opt +llvm::ArchName("arch", cl::desc("Target arch to disassemble for, " "see -version for available targets")); - cl::opt - ArchName("arch", cl::desc("Target arch to disassemble for, " - "see -version for available targets")); - - StringRef ToolName; - - bool error(error_code ec) { - if (!ec) return false; - - outs() << ToolName << ": error reading file: " << ec.message() << ".\n"; - outs().flush(); - return true; - } +static StringRef ToolName; + +static bool error(error_code ec) { + if (!ec) return false; + + outs() << ToolName << ": error reading file: " << ec.message() << ".\n"; + outs().flush(); + return true; } static const Target *GetTarget(const ObjectFile *Obj = NULL) { @@ -106,27 +105,8 @@ return 0; } -namespace { -class StringRefMemoryObject : public MemoryObject { -private: - StringRef Bytes; -public: - StringRefMemoryObject(StringRef bytes) : Bytes(bytes) {} - - uint64_t getBase() const { return 0; } - uint64_t getExtent() const { return Bytes.size(); } - - int readByte(uint64_t Addr, uint8_t *Byte) const { - if (Addr >= getExtent()) - return -1; - *Byte = Bytes[Addr]; - return 0; - } -}; -} - -static void DumpBytes(StringRef bytes) { - static char hex_rep[] = "0123456789abcdef"; +void llvm::DumpBytes(StringRef bytes) { + static const char hex_rep[] = "0123456789abcdef"; // FIXME: The real way to do this is to figure out the longest instruction // and align to that size before printing. I'll fix this when I get // around to outputting relocations. @@ -151,7 +131,7 @@ outs() << output; } -static void DisassembleInput(const StringRef &Filename) { +void llvm::DisassembleInputLibObject(StringRef Filename) { OwningPtr Buff; if (error_code ec = MemoryBuffer::getFileOrSTDIN(Filename, Buff)) { @@ -259,118 +239,22 @@ raw_ostream &DebugOut = nulls(); #endif - if (!CFG) { - for (Index = Start; Index < End; Index += Size) { - MCInst Inst; - - if (DisAsm->getInstruction(Inst, Size, memoryObject, Index, - DebugOut, nulls())) { - uint64_t addr; - if (error(i->getAddress(addr))) break; - outs() << format("%8x:\t", addr + Index); - DumpBytes(StringRef(Bytes.data() + Index, Size)); - IP->printInst(&Inst, outs(), ""); - outs() << "\n"; - } else { - errs() << ToolName << ": warning: invalid instruction encoding\n"; - if (Size == 0) - Size = 1; // skip illegible bytes - } - } - - } else { - // Create CFG and use it for disassembly. - MCFunction f = - MCFunction::createFunctionFromMC(Symbols[si].second, DisAsm.get(), - memoryObject, Start, End, - InstrAnalysis.get(), DebugOut); - - for (MCFunction::iterator fi = f.begin(), fe = f.end(); fi != fe; ++fi){ - bool hasPreds = false; - // Only print blocks that have predecessors. - // FIXME: Slow. - for (MCFunction::iterator pi = f.begin(), pe = f.end(); pi != pe; - ++pi) - if (pi->second.contains(&fi->second)) { - hasPreds = true; - break; - } - - // Data block. - if (!hasPreds && fi != f.begin()) { - uint64_t End = llvm::next(fi) == fe ? SectSize : - llvm::next(fi)->first; - uint64_t addr; - if (error(i->getAddress(addr))) break; - outs() << "# " << End-fi->first << " bytes of data:\n"; - for (unsigned pos = fi->first; pos != End; ++pos) { - outs() << format("%8x:\t", addr + pos); - DumpBytes(StringRef(Bytes.data() + pos, 1)); - outs() << format("\t.byte 0x%02x\n", (uint8_t)Bytes[pos]); - } - continue; - } - - if (fi->second.contains(&fi->second)) - outs() << "# Loop begin:\n"; - - for (unsigned ii = 0, ie = fi->second.getInsts().size(); ii != ie; - ++ii) { - uint64_t addr; - if (error(i->getAddress(addr))) break; - const MCDecodedInst &Inst = fi->second.getInsts()[ii]; - outs() << format("%8x:\t", addr + Inst.Address); - DumpBytes(StringRef(Bytes.data() + Inst.Address, Inst.Size)); - // Simple loops. - if (fi->second.contains(&fi->second)) - outs() << '\t'; - IP->printInst(&Inst.Inst, outs(), ""); - outs() << '\n'; - } - } - - // Start a new dot file. - std::string Error; - raw_fd_ostream Out((f.getName().str() + ".dot").c_str(), Error); - if (!Error.empty()) { - errs() << ToolName << ": warning: " << Error << '\n'; - continue; - } + for (Index = Start; Index < End; Index += Size) { + MCInst Inst; - Out << "digraph " << f.getName() << " {\n"; - Out << "graph [ rankdir = \"LR\" ];\n"; - for (MCFunction::iterator i = f.begin(), e = f.end(); i != e; ++i) { - bool hasPreds = false; - // Only print blocks that have predecessors. - // FIXME: Slow. - for (MCFunction::iterator pi = f.begin(), pe = f.end(); pi != pe; - ++pi) - if (pi->second.contains(&i->second)) { - hasPreds = true; - break; - } - - if (!hasPreds && i != f.begin()) - continue; - - Out << '"' << (uintptr_t)&i->second << "\" [ label=\""; - // Print instructions. - for (unsigned ii = 0, ie = i->second.getInsts().size(); ii != ie; - ++ii) { - // Escape special chars and print the instruction in mnemonic form. - std::string Str; - raw_string_ostream OS(Str); - IP->printInst(&i->second.getInsts()[ii].Inst, OS, ""); - Out << DOT::EscapeString(OS.str()) << '|'; - } - Out << "\" shape=\"record\" ];\n"; - - // Add edges. - for (MCBasicBlock::succ_iterator si = i->second.succ_begin(), - se = i->second.succ_end(); si != se; ++si) - Out << (uintptr_t)&i->second << ":o -> " << (uintptr_t)*si <<":a\n"; + if (DisAsm->getInstruction(Inst, Size, memoryObject, Index, + DebugOut, nulls())) { + uint64_t addr; + if (error(i->getAddress(addr))) break; + outs() << format("%8x:\t", addr + Index); + DumpBytes(StringRef(Bytes.data() + Index, Size)); + IP->printInst(&Inst, outs(), ""); + outs() << "\n"; + } else { + errs() << ToolName << ": warning: invalid instruction encoding\n"; + if (Size == 0) + Size = 1; // skip illegible bytes } - Out << "}\n"; } } } @@ -404,8 +288,12 @@ return 2; } - std::for_each(InputFilenames.begin(), InputFilenames.end(), - DisassembleInput); + if (MachO) + std::for_each(InputFilenames.begin(), InputFilenames.end(), + DisassembleInputMachO); + else + std::for_each(InputFilenames.begin(), InputFilenames.end(), + DisassembleInputLibObject); return 0; } Added: llvm/trunk/tools/llvm-objdump/llvm-objdump.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-objdump/llvm-objdump.h?rev=140028&view=auto ============================================================================== --- llvm/trunk/tools/llvm-objdump/llvm-objdump.h (added) +++ llvm/trunk/tools/llvm-objdump/llvm-objdump.h Mon Sep 19 12:56:04 2011 @@ -0,0 +1,47 @@ +//===-- llvm-objdump.h ----------------------------------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_OBJDUMP_H +#define LLVM_OBJDUMP_H + +#include "llvm/ADT/StringRef.h" +#include "llvm/Support/CommandLine.h" +#include "llvm/Support/DataTypes.h" +#include "llvm/Support/MemoryObject.h" + +namespace llvm { + +extern cl::opt TripleName; +extern cl::opt ArchName; + +// Various helper functions. +void DumpBytes(StringRef bytes); +void DisassembleInputLibObject(StringRef Filename); +void DisassembleInputMachO(StringRef Filename); + +class StringRefMemoryObject : public MemoryObject { +private: + StringRef Bytes; +public: + StringRefMemoryObject(StringRef bytes) : Bytes(bytes) {} + + uint64_t getBase() const { return 0; } + uint64_t getExtent() const { return Bytes.size(); } + + int readByte(uint64_t Addr, uint8_t *Byte) const { + if (Addr >= getExtent()) + return -1; + *Byte = Bytes[Addr]; + return 0; + } +}; + +} + +#endif From grosbach at apple.com Mon Sep 19 12:56:37 2011 From: grosbach at apple.com (Jim Grosbach) Date: Mon, 19 Sep 2011 17:56:37 -0000 Subject: [llvm-commits] [llvm] r140029 - in /llvm/trunk: lib/Target/ARM/ARMInstrThumb2.td test/MC/ARM/basic-thumb2-instructions.s Message-ID: <20110919175637.E10042A6C12C@llvm.org> Author: grosbach Date: Mon Sep 19 12:56:37 2011 New Revision: 140029 URL: http://llvm.org/viewvc/llvm-project?rev=140029&view=rev Log: Thumb2 assembly parsing and encoding for SXTAB/SXTAB16/SXTAH. Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=140029&r1=140028&r2=140029&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Mon Sep 19 12:56:37 2011 @@ -3922,3 +3922,11 @@ (t2STRBs rGPR:$Rt, t2addrmode_so_reg:$addr, pred:$p)>; def : t2InstAlias<"strh${p} $Rt, $addr", (t2STRHs rGPR:$Rt, t2addrmode_so_reg:$addr, pred:$p)>; + +// Extend instruction optional rotate operand. +def : t2InstAlias<"sxtab${p} $Rd, $Rn, $Rm", + (t2SXTAB rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, 0, pred:$p)>; +def : t2InstAlias<"sxtah${p} $Rd, $Rn, $Rm", + (t2SXTAH rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, 0, pred:$p)>; +def : t2InstAlias<"sxtab16${p} $Rd, $Rn, $Rm", + (t2SXTAB16 rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, 0, pred:$p)>; Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s?rev=140029&r1=140028&r2=140029&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s (original) +++ llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Mon Sep 19 12:56:37 2011 @@ -2451,3 +2451,56 @@ @ CHECK: svceq #255 @ encoding: [0xff,0xdf] @ CHECK: svcne #33 @ encoding: [0x21,0xdf] + + at ------------------------------------------------------------------------------ +@ SXTAB + at ------------------------------------------------------------------------------ + sxtab r2, r3, r4 + sxtab r4, r5, r6, ror #0 + it lt + sxtablt r6, r2, r9, ror #8 + sxtab r5, r1, r4, ror #16 + sxtab r7, r8, r3, ror #24 + +@ CHECK: sxtab r2, r3, r4 @ encoding: [0x43,0xfa,0x84,0xf2] +@ CHECK: sxtab r4, r5, r6 @ encoding: [0x45,0xfa,0x86,0xf4] +@ CHECK: it lt @ encoding: [0xb8,0xbf] +@ CHECK: sxtablt r6, r2, r9, ror #8 @ encoding: [0x42,0xfa,0x99,0xf6] +@ CHECK: sxtab r5, r1, r4, ror #16 @ encoding: [0x41,0xfa,0xa4,0xf5] +@ CHECK: sxtab r7, r8, r3, ror #24 @ encoding: [0x48,0xfa,0xb3,0xf7] + + + at ------------------------------------------------------------------------------ +@ SXTAB16 + at ------------------------------------------------------------------------------ + sxtab16 r6, r2, r7, ror #0 + sxtab16 r3, r5, r8, ror #8 + sxtab16 r3, r2, r1, ror #16 + ite ne + sxtab16ne r0, r1, r4 + sxtab16eq r1, r2, r3, ror #24 + +@ CHECK: sxtab16 r6, r2, r7 @ encoding: [0x22,0xfa,0x87,0xf6] +@ CHECK: sxtab16 r3, r5, r8, ror #8 @ encoding: [0x25,0xfa,0x98,0xf3] +@ CHECK: sxtab16 r3, r2, r1, ror #16 @ encoding: [0x22,0xfa,0xa1,0xf3] +@ CHECK: ite ne @ encoding: [0x14,0xbf] +@ CHECK: sxtab16ne r0, r1, r4 @ encoding: [0x21,0xfa,0x84,0xf0] +@ CHECK: sxtab16eq r1, r2, r3, ror #24 @ encoding: [0x22,0xfa,0xb3,0xf1] + + + at ------------------------------------------------------------------------------ +@ SXTAH + at ------------------------------------------------------------------------------ + sxtah r1, r3, r9 + sxtah r3, r8, r3, ror #8 + sxtah r9, r3, r3, ror #24 + ite hi + sxtahhi r6, r1, r6, ror #0 + sxtahls r2, r2, r4, ror #16 + +@ CHECK: sxtah r1, r3, r9 @ encoding: [0x03,0xfa,0x89,0xf1] +@ CHECK: sxtah r3, r8, r3, ror #8 @ encoding: [0x08,0xfa,0x93,0xf3] +@ CHECK: sxtah r9, r3, r3, ror #24 @ encoding: [0x03,0xfa,0xb3,0xf9] +@ CHECK: ite hi @ encoding: [0x8c,0xbf] +@ CHECK: sxtahhi r6, r1, r6 @ encoding: [0x01,0xfa,0x86,0xf6] +@ CHECK: sxtahls r2, r2, r4, ror #16 @ encoding: [0x02,0xfa,0xa4,0xf2] From resistor at mac.com Mon Sep 19 13:07:10 2011 From: resistor at mac.com (Owen Anderson) Date: Mon, 19 Sep 2011 18:07:10 -0000 Subject: [llvm-commits] [llvm] r140032 - in /llvm/trunk: lib/Target/ARM/Disassembler/ARMDisassembler.cpp test/MC/Disassembler/ARM/thumb2.txt Message-ID: <20110919180710.5F3172A6C12C@llvm.org> Author: resistor Date: Mon Sep 19 13:07:10 2011 New Revision: 140032 URL: http://llvm.org/viewvc/llvm-project?rev=140032&view=rev Log: Handle STRT (and friends) like LDRT (and friends) for decoding purposes. Port over additional encoding tests to decoding tests. Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp llvm/trunk/test/MC/Disassembler/ARM/thumb2.txt Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp?rev=140032&r1=140031&r2=140032&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp (original) +++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp Mon Sep 19 13:07:10 2011 @@ -2761,6 +2761,9 @@ case ARM::t2LDRHT: case ARM::t2LDRSBT: case ARM::t2LDRSHT: + case ARM::t2STRT: + case ARM::t2STRBT: + case ARM::t2STRHT: imm |= 0x100; break; default: Modified: llvm/trunk/test/MC/Disassembler/ARM/thumb2.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/thumb2.txt?rev=140032&r1=140031&r2=140032&view=diff ============================================================================== --- llvm/trunk/test/MC/Disassembler/ARM/thumb2.txt (original) +++ llvm/trunk/test/MC/Disassembler/ARM/thumb2.txt Mon Sep 19 13:07:10 2011 @@ -1788,4 +1788,154 @@ 0x65 0xe8 0x00 0x85 0x65 0xe8 0x01 0x74 +#------------------------------------------------------------------------------ +# STREX/STREXB/STREXH/STREXD +#------------------------------------------------------------------------------ +# CHECK: strex r1, r8, [r4] +# CHECK: strex r8, r2, [r4] +# CHECK: strex r2, r12, [sp, #128] +# CHECK: strexb r5, r1, [r7] +# CHECK: strexh r9, r7, [r12] +# CHECK: strexd r9, r3, r6, [r4] + +0x44 0xe8 0x00 0x81 +0x44 0xe8 0x00 0x28 +0x4d 0xe8 0x20 0xc2 +0xc7 0xe8 0x45 0x1f +0xcc 0xe8 0x59 0x7f +0xc4 0xe8 0x79 0x36 + + +#------------------------------------------------------------------------------ +# STRH(immediate) +#------------------------------------------------------------------------------ +# CHECK: strh r5, [r5, #-4] +# CHECK: strh r5, [r6, #32] +# CHECK: strh.w r5, [r6, #33] +# CHECK: strh.w r5, [r6, #257] +# CHECK: strh.w lr, [r7, #257] +# CHECK: strh r5, [r8, #255]! +# CHECK: strh r2, [r5, #4]! +# CHECK: strh r1, [r4, #-4]! +# CHECK: strh lr, [r3], #255 +# CHECK: strh r9, [r2], #4 +# CHECK: strh r3, [sp], #-4 + +0x25 0xf8 0x04 0x5c +0x35 0x84 +0xa6 0xf8 0x21 0x50 +0xa6 0xf8 0x01 0x51 +0xa7 0xf8 0x01 0xe1 +0x28 0xf8 0xff 0x5f +0x25 0xf8 0x04 0x2f +0x24 0xf8 0x04 0x1d +0x23 0xf8 0xff 0xeb +0x22 0xf8 0x04 0x9b +0x2d 0xf8 0x04 0x39 + + +#------------------------------------------------------------------------------ +# STRH(register) +#------------------------------------------------------------------------------ +# CHECK: strh.w r1, [r8, r1] +# CHECK: strh.w r4, [r5, r2] +# CHECK: strh.w r6, [r0, r2, lsl #3] +# CHECK: strh.w r8, [r8, r2, lsl #2] +# CHECK: strh.w r7, [sp, r2, lsl #1] +# CHECK: strh.w r7, [sp, r2] + +0x28 0xf8 0x01 0x10 +0x25 0xf8 0x02 0x40 +0x20 0xf8 0x32 0x60 +0x28 0xf8 0x22 0x80 +0x2d 0xf8 0x12 0x70 +0x2d 0xf8 0x02 0x70 + + +#------------------------------------------------------------------------------ +# STRHT +#------------------------------------------------------------------------------ +# CHECK: strht r1, [r2] +# CHECK: strht r1, [r8] +# CHECK: strht r1, [r8, #3] +# CHECK: strht r1, [r8, #255] + +0x22 0xf8 0x00 0x1e +0x28 0xf8 0x00 0x1e +0x28 0xf8 0x03 0x1e +0x28 0xf8 0xff 0x1e + + +#------------------------------------------------------------------------------ +# STRT +#------------------------------------------------------------------------------ +# CHECK: strt r1, [r2] +# CHECK: strt r1, [r8] +# CHECK: strt r1, [r8, #3] +# CHECK: strt r1, [r8, #255] + +0x42 0xf8 0x00 0x1e +0x48 0xf8 0x00 0x1e +0x48 0xf8 0x03 0x1e +0x48 0xf8 0xff 0x1e + + +#------------------------------------------------------------------------------ +# SUB (immediate) +#------------------------------------------------------------------------------ +# CHECK: itet eq +# CHECK: subeq r1, r2, #4 +# CHECK: subwne r5, r3, #1023 +# CHECK: subweq r4, r5, #293 +# CHECK: sub.w r2, sp, #1024 +# CHECK: sub.w r2, r8, #65280 +# CHECK: subw r2, r3, #257 +# CHECK: sub.w r12, r6, #256 +# CHECK: subw r12, r6, #256 +# CHECK: subs.w r1, r2, #496 + +0x0a 0xbf +0x11 0x1f +0xa3 0xf2 0xff 0x35 +0xa5 0xf2 0x25 0x14 +0xad 0xf5 0x80 0x62 +0xa8 0xf5 0x7f 0x42 +0xa3 0xf2 0x01 0x12 +0xa6 0xf5 0x80 0x7c +0xa6 0xf2 0x00 0x1c +0xb2 0xf5 0xf8 0x71 + + +#------------------------------------------------------------------------------ +# SUB (register) +#------------------------------------------------------------------------------ +# CHECK: sub.w r4, r5, r6 +# CHECK: sub.w r4, r5, r6, lsl #5 +# CHECK: sub.w r4, r5, r6, lsr #5 +# CHECK: sub.w r4, r5, r6, lsr #5 +# CHECK: sub.w r4, r5, r6, asr #5 +# CHECK: sub.w r4, r5, r6, ror #5 +# CHECK: sub.w r5, r2, r12, rrx + +0xa5 0xeb 0x06 0x04 +0xa5 0xeb 0x46 0x14 +0xa5 0xeb 0x56 0x14 +0xa5 0xeb 0x56 0x14 +0xa5 0xeb 0x66 0x14 +0xa5 0xeb 0x76 0x14 +0xa2 0xeb 0x3c 0x05 + + +#------------------------------------------------------------------------------ +# SVC +#------------------------------------------------------------------------------ +# CHECK: svc #0 +# CHECK: ite eq +# CHECK: svceq #255 +# CHECK: svcne #33 + +0x00 0xdf +0x0c 0xbf +0xff 0xdf +0x21 0xdf From bruno.cardoso at gmail.com Mon Sep 19 13:09:58 2011 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Mon, 19 Sep 2011 11:09:58 -0700 Subject: [llvm-commits] [patch] add MIPS64 SubTraget and stubs support to LLVM. In-Reply-To: References: Message-ID: Hi, On Mon, Sep 19, 2011 at 2:35 AM, Liu wrote: > Hi all > > I've add mips64 SubTarget and stubs support to llvm. Please review and checkin. Overall looks good, please fix the space alignment here: + if ((TheTriple.getArch() == Triple::mips) || + (TheTriple.getArch() == Triple::mips64)) Here: + TargetRegistry::RegisterMCInstPrinter(TheMips64Target, + createMipsMCInstPrinter); + TargetRegistry::RegisterMCInstPrinter(TheMips64elTarget, + createMipsMCInstPrinter); And here: +def FeatureMips64 : SubtargetFeature<"mips64", "MipsArchVersion", + "Mips64", "Mips64 ISA Support", + [FeatureGP64Bit, FeatureFP64Bit, + FeatureCondMov, FeatureBitCount]>; -- Bruno Cardoso Lopes http://www.brunocardoso.cc From stoklund at 2pi.dk Mon Sep 19 13:15:46 2011 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Mon, 19 Sep 2011 18:15:46 -0000 Subject: [llvm-commits] [llvm] r140033 - /llvm/trunk/docs/CodeGenerator.html Message-ID: <20110919181546.BDAF02A6C12C@llvm.org> Author: stoklund Date: Mon Sep 19 13:15:46 2011 New Revision: 140033 URL: http://llvm.org/viewvc/llvm-project?rev=140033&view=rev Log: X86 has asterisk-free inline asm support now. Floating point stack inline asm works. Modified: llvm/trunk/docs/CodeGenerator.html Modified: llvm/trunk/docs/CodeGenerator.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CodeGenerator.html?rev=140033&r1=140032&r2=140033&view=diff ============================================================================== --- llvm/trunk/docs/CodeGenerator.html (original) +++ llvm/trunk/docs/CodeGenerator.html Mon Sep 19 13:15:46 2011 @@ -2286,7 +2286,7 @@ - * + @@ -2382,9 +2382,6 @@

This box indicates whether the target supports most popular inline assembly constraints and modifiers.

-

X86 lacks reliable support for inline assembly -constraints relating to the X86 floating point stack.

- From greened at obbligato.org Mon Sep 19 13:26:07 2011 From: greened at obbligato.org (David Greene) Date: Mon, 19 Sep 2011 18:26:07 -0000 Subject: [llvm-commits] [llvm] r140034 - /llvm/trunk/utils/TableGen/TGParser.cpp Message-ID: <20110919182607.9B4FA2A6C12C@llvm.org> Author: greened Date: Mon Sep 19 13:26:07 2011 New Revision: 140034 URL: http://llvm.org/viewvc/llvm-project?rev=140034&view=rev Log: Better Error Reporting Report missing template arguments more helpfully by supplying the name of the missing argument in the error message. Modified: llvm/trunk/utils/TableGen/TGParser.cpp Modified: llvm/trunk/utils/TableGen/TGParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/TGParser.cpp?rev=140034&r1=140033&r2=140034&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/TGParser.cpp (original) +++ llvm/trunk/utils/TableGen/TGParser.cpp Mon Sep 19 13:26:07 2011 @@ -1416,6 +1416,10 @@ if (ArgsRec != 0 && EltTy == 0) { const std::vector &TArgs = ArgsRec->getTemplateArgs(); const RecordVal *RV = ArgsRec->getValue(TArgs[ArgN]); + if (!RV) { + errs() << "Cannot find template arg " << ArgN << " (" << TArgs[ArgN] + << ")\n"; + } assert(RV && "Template argument record not found??"); ItemType = RV->getType(); ++ArgN; From zvi.rackover at intel.com Mon Sep 19 13:31:51 2011 From: zvi.rackover at intel.com (Rackover, Zvi) Date: Mon, 19 Sep 2011 21:31:51 +0300 Subject: [llvm-commits] [AVX] Add EXTRACT_SUBVECTOR to DAGCombine Message-ID: <2B8953F251AC92428D9BBC92D9B218865E9469BE94@hasmsx502.ger.corp.intel.com> Hi Bruno and other codegen people, Please review the attached patch and commit if acceptable. I categorized this patch as AVX, since I am not aware of other cases in X86 where it shows any benefit. Thanks, Zvi --------------------------------------------------------------------- Intel Israel (74) Limited This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). Any review or distribution by others is strictly prohibited. If you are not the intended recipient, please contact the sender and delete all copies. -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110919/71826a5e/attachment.html -------------- next part -------------- A non-text attachment was scrubbed... Name: avx-dagcombine-extractsubvector.patch Type: application/octet-stream Size: 3394 bytes Desc: avx-dagcombine-extractsubvector.patch Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110919/71826a5e/attachment.obj From eli.friedman at gmail.com Mon Sep 19 13:38:17 2011 From: eli.friedman at gmail.com (Eli Friedman) Date: Mon, 19 Sep 2011 11:38:17 -0700 Subject: [llvm-commits] [llvm] r139995 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/trunc-ext-ld-st.ll In-Reply-To: <20110918103932.96F122A6C12C@llvm.org> References: <20110918103932.96F122A6C12C@llvm.org> Message-ID: On Sun, Sep 18, 2011 at 3:39 AM, Nadav Rotem wrote: > + ? ?// Attempt to load the original value using a single load op. > + ? ?// Find a scalar type which is equal to the loaded word size. > + ? ?MVT SclrLoadTy = MVT::i8; > + ? ?for (unsigned tp = MVT::FIRST_INTEGER_VALUETYPE; > + ? ? ? ? tp < MVT::LAST_INTEGER_VALUETYPE; ++tp) { > + ? ? ?MVT Tp = (MVT::SimpleValueType)tp; > + ? ? ?if (TLI.isTypeLegal(Tp) && ?Tp.getSizeInBits() == MemSz) { > + ? ? ? ?SclrLoadTy = Tp; > + ? ? ? ?break; > + ? ? ?} > + ? ?} > + > + ? ?// Proceed if a load word is found. > + ? ?if (SclrLoadTy.getSizeInBits() != MemSz) return SDValue(); This approach to finding a load misses one somewhat important case: the 64-bit case on x86-32 and ARM. Do you have any ideas here? > @@ -13479,9 +13563,7 @@ > > ? ? // From, To sizes and ElemCount must be pow of two > ? ? if (!isPowerOf2_32(NumElems * FromSz * ToSz)) return SDValue(); > - ? ?// We are going to use the original vector elt for storing. > - ? ?// accumulated smaller vector elements must be a multiple of bigger size. > - ? ?if (0 != (NumElems * ToSz) % FromSz) return SDValue(); > + What is this change supposed to do? -Eli From grosbach at apple.com Mon Sep 19 13:42:21 2011 From: grosbach at apple.com (Jim Grosbach) Date: Mon, 19 Sep 2011 18:42:21 -0000 Subject: [llvm-commits] [llvm] r140035 - /llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Message-ID: <20110919184221.531CB2A6C12C@llvm.org> Author: grosbach Date: Mon Sep 19 13:42:21 2011 New Revision: 140035 URL: http://llvm.org/viewvc/llvm-project?rev=140035&view=rev Log: ARM asm parsing should handle pre-indexed writeback w/o immediate. For example, 'ldrb r9, [sp]!' is odd, but valid. Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp?rev=140035&r1=140034&r2=140035&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp (original) +++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Mon Sep 19 13:42:21 2011 @@ -2807,6 +2807,13 @@ Operands.push_back(ARMOperand::CreateMem(BaseRegNum, 0, 0, ARM_AM::no_shift, 0, false, S, E)); + // If there's a pre-indexing writeback marker, '!', just add it as a token + // operand. It's rather odd, but syntactically valid. + if (Parser.getTok().is(AsmToken::Exclaim)) { + Operands.push_back(ARMOperand::CreateToken("!",Parser.getTok().getLoc())); + Parser.Lex(); // Eat the '!'. + } + return false; } From eli.friedman at gmail.com Mon Sep 19 14:41:28 2011 From: eli.friedman at gmail.com (Eli Friedman) Date: Mon, 19 Sep 2011 19:41:28 -0000 Subject: [llvm-commits] [llvm] r140040 - in /llvm/trunk: lib/Bitcode/Reader/BitcodeReader.cpp test/Assembler/atomic.ll Message-ID: <20110919194128.77EC12A6C12C@llvm.org> Author: efriedma Date: Mon Sep 19 14:41:28 2011 New Revision: 140040 URL: http://llvm.org/viewvc/llvm-project?rev=140040&view=rev Log: Fix a typo in the bitcode reader in the handling of atomic stores. Reported by David Meyer on llvmdev. Modified: llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp llvm/trunk/test/Assembler/atomic.ll Modified: llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp?rev=140040&r1=140039&r2=140040&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp (original) +++ llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp Mon Sep 19 14:41:28 2011 @@ -2653,7 +2653,7 @@ return Error("Invalid STOREATOMIC record"); AtomicOrdering Ordering = GetDecodedOrdering(Record[OpNum+2]); - if (Ordering == NotAtomic || Ordering == Release || + if (Ordering == NotAtomic || Ordering == Acquire || Ordering == AcquireRelease) return Error("Invalid STOREATOMIC record"); SynchronizationScope SynchScope = GetDecodedSynchScope(Record[OpNum+3]); Modified: llvm/trunk/test/Assembler/atomic.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Assembler/atomic.ll?rev=140040&r1=140039&r2=140040&view=diff ============================================================================== --- llvm/trunk/test/Assembler/atomic.ll (original) +++ llvm/trunk/test/Assembler/atomic.ll Mon Sep 19 14:41:28 2011 @@ -1,4 +1,4 @@ -; RUN: opt -S < %s | FileCheck %s +; RUN: opt < %s | opt -S | FileCheck %s ; Basic smoke test for atomic operations. define void @f(i32* %x) { From resistor at mac.com Mon Sep 19 15:00:02 2011 From: resistor at mac.com (Owen Anderson) Date: Mon, 19 Sep 2011 20:00:02 -0000 Subject: [llvm-commits] [llvm] r140041 - /llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Message-ID: <20110919200002.E89C62A6C12C@llvm.org> Author: resistor Date: Mon Sep 19 15:00:02 2011 New Revision: 140041 URL: http://llvm.org/viewvc/llvm-project?rev=140041&view=rev Log: Specify an additional fixed bit in the Thumb2 SSAT encoding to prevent the decoder from emitting gibberish for this invalid encoding. Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=140041&r1=140040&r2=140041&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Mon Sep 19 15:00:02 2011 @@ -2032,6 +2032,7 @@ let Inst{25-22} = 0b1100; let Inst{20} = 0; let Inst{15} = 0; + let Inst{5} = 0; } def t2SSAT16: T2SatI< From zwarich at apple.com Mon Sep 19 15:06:47 2011 From: zwarich at apple.com (Cameron Zwarich) Date: Mon, 19 Sep 2011 13:06:47 -0700 Subject: [llvm-commits] [llvm] r140041 - /llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td In-Reply-To: <20110919200002.E89C62A6C12C@llvm.org> References: <20110919200002.E89C62A6C12C@llvm.org> Message-ID: <484F02E4-D4EF-457F-A54C-B3F351556F85@apple.com> How does this make it past TableGen? Cameron On Sep 19, 2011, at 1:00 PM, Owen Anderson wrote: > Author: resistor > Date: Mon Sep 19 15:00:02 2011 > New Revision: 140041 > > URL: http://llvm.org/viewvc/llvm-project?rev=140041&view=rev > Log: > Specify an additional fixed bit in the Thumb2 SSAT encoding to prevent the decoder from emitting gibberish for this invalid encoding. > > Modified: > llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td > > Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=140041&r1=140040&r2=140041&view=diff > ============================================================================== > --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) > +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Mon Sep 19 15:00:02 2011 > @@ -2032,6 +2032,7 @@ > let Inst{25-22} = 0b1100; > let Inst{20} = 0; > let Inst{15} = 0; > + let Inst{5} = 0; > } > > def t2SSAT16: T2SatI< > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From benny.kra at googlemail.com Mon Sep 19 15:08:52 2011 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Mon, 19 Sep 2011 20:08:52 -0000 Subject: [llvm-commits] [llvm] r140042 - /llvm/trunk/tools/llvm-objdump/MachODump.cpp Message-ID: <20110919200852.A642A2A6C12C@llvm.org> Author: d0k Date: Mon Sep 19 15:08:52 2011 New Revision: 140042 URL: http://llvm.org/viewvc/llvm-project?rev=140042&view=rev Log: Try to make MSVC 2010 happy. Modified: llvm/trunk/tools/llvm-objdump/MachODump.cpp Modified: llvm/trunk/tools/llvm-objdump/MachODump.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-objdump/MachODump.cpp?rev=140042&r1=140041&r2=140042&view=diff ============================================================================== --- llvm/trunk/tools/llvm-objdump/MachODump.cpp (original) +++ llvm/trunk/tools/llvm-objdump/MachODump.cpp Mon Sep 19 15:08:52 2011 @@ -271,7 +271,7 @@ uint64_t VMAddr = Sections[SectIdx].Address - Sections[SectIdx].Offset; for (unsigned i = 0, e = FoundFns.size(); i != e; ++i) - FunctionMap.insert(std::pair(FoundFns[i]+VMAddr,0)); + FunctionMap.insert(std::make_pair(FoundFns[i]+VMAddr, (MCFunction*)0)); StringRef Bytes = MachOObj->getData(Sections[SectIdx].Offset, Sections[SectIdx].Size); @@ -335,7 +335,7 @@ FunctionMap[Start] = &Functions.back(); for (unsigned i = 0, e = Calls.size(); i != e; ++i) - FunctionMap.insert(std::pair(Calls[i], 0)); + FunctionMap.insert(std::make_pair(Calls[i], (MCFunction*)0)); } } From benny.kra at googlemail.com Mon Sep 19 15:08:55 2011 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Mon, 19 Sep 2011 20:08:55 -0000 Subject: [llvm-commits] [llvm] r140043 - /llvm/trunk/lib/Support/APInt.cpp Message-ID: <20110919200855.23D7B2A6C12C@llvm.org> Author: d0k Date: Mon Sep 19 15:08:54 2011 New Revision: 140043 URL: http://llvm.org/viewvc/llvm-project?rev=140043&view=rev Log: Silence -Wsign-compare warnings from GCC. Modified: llvm/trunk/lib/Support/APInt.cpp Modified: llvm/trunk/lib/Support/APInt.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/APInt.cpp?rev=140043&r1=140042&r2=140043&view=diff ============================================================================== --- llvm/trunk/lib/Support/APInt.cpp (original) +++ llvm/trunk/lib/Support/APInt.cpp Mon Sep 19 15:08:54 2011 @@ -54,11 +54,11 @@ return r; r = cdigit - 'A'; - if (r <= radix-11) + if (r <= radix - 11U) return r + 10; r = cdigit - 'a'; - if (r <= radix-11) + if (r <= radix - 11U) return r + 10; } From benny.kra at googlemail.com Mon Sep 19 15:14:46 2011 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Mon, 19 Sep 2011 20:14:46 -0000 Subject: [llvm-commits] [llvm] r140044 - /llvm/trunk/tools/llvm-objdump/MachODump.cpp Message-ID: <20110919201446.BE29D2A6C12C@llvm.org> Author: d0k Date: Mon Sep 19 15:14:46 2011 New Revision: 140044 URL: http://llvm.org/viewvc/llvm-project?rev=140044&view=rev Log: Missed one instance of implicit pointer conversion. Modified: llvm/trunk/tools/llvm-objdump/MachODump.cpp Modified: llvm/trunk/tools/llvm-objdump/MachODump.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-objdump/MachODump.cpp?rev=140044&r1=140043&r2=140044&view=diff ============================================================================== --- llvm/trunk/tools/llvm-objdump/MachODump.cpp (original) +++ llvm/trunk/tools/llvm-objdump/MachODump.cpp Mon Sep 19 15:14:46 2011 @@ -353,7 +353,7 @@ FunctionMap[Sections[SectIdx].Offset] = &Functions.back(); for (unsigned i = 0, e = Calls.size(); i != e; ++i) - FunctionMap.insert(std::pair(Calls[i], 0)); + FunctionMap.insert(std::make_pair(Calls[i], (MCFunction*)0)); } for (std::map::iterator mi = FunctionMap.begin(), me = FunctionMap.end(); mi != me; ++mi) From benny.kra at googlemail.com Mon Sep 19 15:23:01 2011 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Mon, 19 Sep 2011 20:23:01 -0000 Subject: [llvm-commits] [llvm] r140045 - /llvm/trunk/tools/llvm-objdump/MachODump.cpp Message-ID: <20110919202301.E11752A6C12C@llvm.org> Author: d0k Date: Mon Sep 19 15:23:01 2011 New Revision: 140045 URL: http://llvm.org/viewvc/llvm-project?rev=140045&view=rev Log: Nope, there's another one! Modified: llvm/trunk/tools/llvm-objdump/MachODump.cpp Modified: llvm/trunk/tools/llvm-objdump/MachODump.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-objdump/MachODump.cpp?rev=140045&r1=140044&r2=140045&view=diff ============================================================================== --- llvm/trunk/tools/llvm-objdump/MachODump.cpp (original) +++ llvm/trunk/tools/llvm-objdump/MachODump.cpp Mon Sep 19 15:23:01 2011 @@ -368,7 +368,7 @@ Functions.push_back(f); mi->second = &Functions.back(); for (unsigned i = 0, e = Calls.size(); i != e; ++i) - if (FunctionMap.insert(std::pair(Calls[i],0)) + if (FunctionMap.insert(std::make_pair(Calls[i], (MCFunction*)0)) .second) mi = FunctionMap.begin(); } From grosbach at apple.com Mon Sep 19 15:29:34 2011 From: grosbach at apple.com (Jim Grosbach) Date: Mon, 19 Sep 2011 20:29:34 -0000 Subject: [llvm-commits] [llvm] r140047 - in /llvm/trunk: lib/Target/ARM/ARMInstrThumb2.td lib/Target/ARM/AsmParser/ARMAsmParser.cpp test/MC/ARM/basic-thumb2-instructions.s test/MC/ARM/diagnostics.s Message-ID: <20110919202934.3786D2A6C12C@llvm.org> Author: grosbach Date: Mon Sep 19 15:29:33 2011 New Revision: 140047 URL: http://llvm.org/viewvc/llvm-project?rev=140047&view=rev Log: Thumb2 assembly parsing and encoding for SXTB/SXTB16/SXTH. Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s llvm/trunk/test/MC/ARM/diagnostics.s Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=140047&r1=140046&r2=140047&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Mon Sep 19 15:29:33 2011 @@ -1785,8 +1785,6 @@ BinOpFrag<(add node:$LHS, (sext_inreg node:$RHS,i16))>>; def t2SXTAB16 : T2I_exta_rrot_np<0b010, "sxtab16">; -// TODO: SXT(A){B|H}16 - // Zero extenders let AddedComplexity = 16 in { @@ -3931,3 +3929,17 @@ (t2SXTAH rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, 0, pred:$p)>; def : t2InstAlias<"sxtab16${p} $Rd, $Rn, $Rm", (t2SXTAB16 rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, 0, pred:$p)>; +def : t2InstAlias<"sxtb${p} $Rd, $Rm", + (t2SXTB rGPR:$Rd, rGPR:$Rm, 0, pred:$p)>; +def : t2InstAlias<"sxtb16${p} $Rd, $Rm", + (t2SXTB16 rGPR:$Rd, rGPR:$Rm, 0, pred:$p)>; +def : t2InstAlias<"sxth${p} $Rd, $Rm", + (t2SXTH rGPR:$Rd, rGPR:$Rm, 0, pred:$p)>; + +// Extend instruction w/o the ".w" optional width specifier. +def : t2InstAlias<"sxtb${p} $Rd, $Rm$rot", + (t2SXTB rGPR:$Rd, rGPR:$Rm, rot_imm:$rot, pred:$p)>; +def : t2InstAlias<"sxtb16${p} $Rd, $Rm$rot", + (t2SXTB16 rGPR:$Rd, rGPR:$Rm, rot_imm:$rot, pred:$p)>; +def : t2InstAlias<"sxth${p} $Rd, $Rm$rot", + (t2SXTH rGPR:$Rd, rGPR:$Rm, rot_imm:$rot, pred:$p)>; Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp?rev=140047&r1=140046&r2=140047&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp (original) +++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Mon Sep 19 15:29:33 2011 @@ -2254,15 +2254,11 @@ parseRotImm(SmallVectorImpl &Operands) { const AsmToken &Tok = Parser.getTok(); SMLoc S = Tok.getLoc(); - if (Tok.isNot(AsmToken::Identifier)) { - Error(S, "rotate operator 'ror' expected"); - return MatchOperand_ParseFail; - } + if (Tok.isNot(AsmToken::Identifier)) + return MatchOperand_NoMatch; StringRef ShiftName = Tok.getString(); - if (ShiftName != "ror" && ShiftName != "ROR") { - Error(S, "rotate operator 'ror' expected"); - return MatchOperand_ParseFail; - } + if (ShiftName != "ror" && ShiftName != "ROR") + return MatchOperand_NoMatch; Parser.Lex(); // Eat the operator. // A '#' and a rotate amount. @@ -3867,6 +3863,28 @@ } break; } + case ARM::t2SXTH: + case ARM::t2SXTB: { + // If we can use the 16-bit encoding and the user didn't explicitly + // request the 32-bit variant, transform it here. + if (isARMLowRegister(Inst.getOperand(0).getReg()) && + isARMLowRegister(Inst.getOperand(1).getReg()) && + Inst.getOperand(2).getImm() == 0 && + (!static_cast(Operands[2])->isToken() || + static_cast(Operands[2])->getToken() != ".w")) { + unsigned NewOpc = (Inst.getOpcode() == ARM::t2SXTH) ? + ARM::tSXTH : ARM::tSXTB; + // The operands aren't the same for thumb1 (no rotate operand). + MCInst TmpInst; + TmpInst.setOpcode(NewOpc); + TmpInst.addOperand(Inst.getOperand(0)); + TmpInst.addOperand(Inst.getOperand(1)); + TmpInst.addOperand(Inst.getOperand(3)); + TmpInst.addOperand(Inst.getOperand(4)); + Inst = TmpInst; + } + break; + } case ARM::t2IT: { // The mask bits for all but the first condition are represented as // the low bit of the condition code value implies 't'. We currently Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s?rev=140047&r1=140046&r2=140047&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s (original) +++ llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Mon Sep 19 15:29:33 2011 @@ -2504,3 +2504,111 @@ @ CHECK: ite hi @ encoding: [0x8c,0xbf] @ CHECK: sxtahhi r6, r1, r6 @ encoding: [0x01,0xfa,0x86,0xf6] @ CHECK: sxtahls r2, r2, r4, ror #16 @ encoding: [0x02,0xfa,0xa4,0xf2] + + + at ------------------------------------------------------------------------------ +@ SXTB + at ------------------------------------------------------------------------------ + sxtb r5, r6, ror #0 + sxtb r6, r9, ror #8 + sxtb r8, r3, ror #24 + ite ge + sxtbge r2, r4 + sxtblt r5, r1, ror #16 + +@ CHECK: sxtb r5, r6 @ encoding: [0x75,0xb2] +@ CHECK: sxtb.w r6, r9, ror #8 @ encoding: [0x4f,0xfa,0x99,0xf6] +@ CHECK: sxtb.w r8, r3, ror #24 @ encoding: [0x4f,0xfa,0xb3,0xf8] +@ CHECK: ite ge @ encoding: [0xac,0xbf] +@ CHECK: sxtbge r2, r4 @ encoding: [0x62,0xb2] +@ CHECK: sxtblt.w r5, r1, ror #16 @ encoding: [0x4f,0xfa,0xa1,0xf5] + + + at ------------------------------------------------------------------------------ +@ SXTB16 + at ------------------------------------------------------------------------------ + sxtb16 r1, r4 + sxtb16 r6, r7, ror #0 + sxtb16 r3, r1, ror #16 + ite cs + sxtb16cs r3, r5, ror #8 + sxtb16lo r2, r3, ror #24 + +@ CHECK: sxtb16 r1, r4 @ encoding: [0x2f,0xfa,0x84,0xf1] +@ CHECK: sxtb16 r6, r7 @ encoding: [0x2f,0xfa,0x87,0xf6] +@ CHECK: sxtb16 r3, r1, ror #16 @ encoding: [0x2f,0xfa,0xa1,0xf3] +@ CHECK: ite hs @ encoding: [0x2c,0xbf] +@ CHECK: sxtb16hs r3, r5, ror #8 @ encoding: [0x2f,0xfa,0x95,0xf3] +@ CHECK: sxtb16lo r2, r3, ror #24 @ encoding: [0x2f,0xfa,0xb3,0xf2] + + + at ------------------------------------------------------------------------------ +@ SXTH + at ------------------------------------------------------------------------------ + sxth r1, r6, ror #0 + sxth r3, r8, ror #8 + sxth r9, r3, ror #24 + itt ne + sxthne r3, r9 + sxthne r2, r2, ror #16 + +@ CHECK: sxth r1, r6 @ encoding: [0x31,0xb2] +@ CHECK: sxth.w r3, r8, ror #8 @ encoding: [0x0f,0xfa,0x98,0xf3] +@ CHECK: sxth.w r9, r3, ror #24 @ encoding: [0x0f,0xfa,0xb3,0xf9] +@ CHECK: itt ne @ encoding: [0x1c,0xbf] +@ CHECK: sxthne.w r3, r9 @ encoding: [0x0f,0xfa,0x89,0xf3] +@ CHECK: sxthne.w r2, r2, ror #16 @ encoding: [0x0f,0xfa,0xa2,0xf2] + + + at ------------------------------------------------------------------------------ +@ SXTB + at ------------------------------------------------------------------------------ + sxtb r5, r6, ror #0 + sxtb.w r6, r9, ror #8 + sxtb r8, r3, ror #24 + ite ge + sxtbge r2, r4 + sxtblt r5, r1, ror #16 + +@ CHECK: sxtb r5, r6 @ encoding: [0x75,0xb2] +@ CHECK: sxtb.w r6, r9, ror #8 @ encoding: [0x4f,0xfa,0x99,0xf6] +@ CHECK: sxtb.w r8, r3, ror #24 @ encoding: [0x4f,0xfa,0xb3,0xf8] +@ CHECK: ite ge @ encoding: [0xac,0xbf] +@ CHECK: sxtbge r2, r4 @ encoding: [0x62,0xb2] +@ CHECK: sxtblt.w r5, r1, ror #16 @ encoding: [0x4f,0xfa,0xa1,0xf5] + + + at ------------------------------------------------------------------------------ +@ SXTB16 + at ------------------------------------------------------------------------------ + sxtb16 r1, r4 + sxtb16 r6, r7, ror #0 + sxtb16 r3, r1, ror #16 + ite cs + sxtb16cs r3, r5, ror #8 + sxtb16lo r2, r3, ror #24 + +@ CHECK: sxtb16 r1, r4 @ encoding: [0x2f,0xfa,0x84,0xf1] +@ CHECK: sxtb16 r6, r7 @ encoding: [0x2f,0xfa,0x87,0xf6] +@ CHECK: sxtb16 r3, r1, ror #16 @ encoding: [0x2f,0xfa,0xa1,0xf3] +@ CHECK: ite hs @ encoding: [0x2c,0xbf] +@ CHECK: sxtb16hs r3, r5, ror #8 @ encoding: [0x2f,0xfa,0x95,0xf3] +@ CHECK: sxtb16lo r2, r3, ror #24 @ encoding: [0x2f,0xfa,0xb3,0xf2] + + + at ------------------------------------------------------------------------------ +@ SXTH + at ------------------------------------------------------------------------------ + sxth r1, r6, ror #0 + sxth.w r3, r8, ror #8 + sxth r9, r3, ror #24 + itt ne + sxthne r3, r9 + sxthne r2, r2, ror #16 + +@ CHECK: sxth r1, r6 @ encoding: [0x31,0xb2] +@ CHECK: sxth.w r3, r8, ror #8 @ encoding: [0x0f,0xfa,0x98,0xf3] +@ CHECK: sxth.w r9, r3, ror #24 @ encoding: [0x0f,0xfa,0xb3,0xf9] +@ CHECK: itt ne @ encoding: [0x1c,0xbf] +@ CHECK: sxthne.w r3, r9 @ encoding: [0x0f,0xfa,0x89,0xf3] +@ CHECK: sxthne.w r2, r2, ror #16 @ encoding: [0x0f,0xfa,0xa2,0xf2] Modified: llvm/trunk/test/MC/ARM/diagnostics.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/diagnostics.s?rev=140047&r1=140046&r2=140047&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/diagnostics.s (original) +++ llvm/trunk/test/MC/ARM/diagnostics.s Mon Sep 19 15:29:33 2011 @@ -248,7 +248,7 @@ sxtah r9, r3, r3, ror #-8 sxtb16ge r2, r3, lsr #24 -@ CHECK-ERRORS: error: rotate operator 'ror' expected +@ CHECK-ERRORS: error: invalid operand for instruction @ CHECK-ERRORS: sxtb r8, r3, #8 @ CHECK-ERRORS: ^ @ CHECK-ERRORS: error: '#' expected @@ -269,7 +269,7 @@ @ CHECK-ERRORS: error: 'ror' rotate amount must be 8, 16, or 24 @ CHECK-ERRORS: sxtah r9, r3, r3, ror #-8 @ CHECK-ERRORS: ^ -@ CHECK-ERRORS: error: rotate operator 'ror' expected +@ CHECK-ERRORS: error: invalid operand for instruction @ CHECK-ERRORS: sxtb16ge r2, r3, lsr #24 @ CHECK-ERRORS: ^ From grosbach at apple.com Mon Sep 19 15:30:30 2011 From: grosbach at apple.com (Jim Grosbach) Date: Mon, 19 Sep 2011 20:30:30 -0000 Subject: [llvm-commits] [llvm] r140048 - /llvm/trunk/test/MC/ARM/basic-arm-instructions.s Message-ID: <20110919203030.22E422A6C12C@llvm.org> Author: grosbach Date: Mon Sep 19 15:30:29 2011 New Revision: 140048 URL: http://llvm.org/viewvc/llvm-project?rev=140048&view=rev Log: Remove FIXME. TBB/TBH are Thumb mode only instructions. Modified: llvm/trunk/test/MC/ARM/basic-arm-instructions.s Modified: llvm/trunk/test/MC/ARM/basic-arm-instructions.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-arm-instructions.s?rev=140048&r1=140047&r2=140048&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/basic-arm-instructions.s (original) +++ llvm/trunk/test/MC/ARM/basic-arm-instructions.s Mon Sep 19 15:30:29 2011 @@ -2065,11 +2065,6 @@ @------------------------------------------------------------------------------ -@ FIXME: TBB/TBH - at ------------------------------------------------------------------------------ - - - at ------------------------------------------------------------------------------ @ TEQ @------------------------------------------------------------------------------ teq r5, #0xf000 From grosbach at apple.com Mon Sep 19 15:31:59 2011 From: grosbach at apple.com (Jim Grosbach) Date: Mon, 19 Sep 2011 20:31:59 -0000 Subject: [llvm-commits] [llvm] r140050 - /llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Message-ID: <20110919203159.84D1C2A6C12C@llvm.org> Author: grosbach Date: Mon Sep 19 15:31:59 2011 New Revision: 140050 URL: http://llvm.org/viewvc/llvm-project?rev=140050&view=rev Log: Tidy up a bit. Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=140050&r1=140049&r2=140050&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Mon Sep 19 15:31:59 2011 @@ -3130,12 +3130,10 @@ // FIXME: Add a non-pc based case that can be predicated. def t2TBB_JT : t2PseudoInst<(outs), - (ins GPR:$index, i32imm:$jt, i32imm:$id), - 0, IIC_Br, []>; + (ins GPR:$index, i32imm:$jt, i32imm:$id), 0, IIC_Br, []>; def t2TBH_JT : t2PseudoInst<(outs), - (ins GPR:$index, i32imm:$jt, i32imm:$id), - 0, IIC_Br, []>; + (ins GPR:$index, i32imm:$jt, i32imm:$id), 0, IIC_Br, []>; def t2TBB : T2I<(outs), (ins GPR:$Rn, GPR:$Rm), IIC_Br, "tbb", "\t[$Rn, $Rm]", []> { From zwarich at apple.com Mon Sep 19 15:40:00 2011 From: zwarich at apple.com (Cameron Zwarich) Date: Mon, 19 Sep 2011 13:40:00 -0700 Subject: [llvm-commits] [llvm] r140041 - /llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td In-Reply-To: <484F02E4-D4EF-457F-A54C-B3F351556F85@apple.com> References: <20110919200002.E89C62A6C12C@llvm.org> <484F02E4-D4EF-457F-A54C-B3F351556F85@apple.com> Message-ID: Oh wait, I am too tired today. I see the point.. Cameron On Sep 19, 2011, at 1:06 PM, Cameron Zwarich wrote: > How does this make it past TableGen? > > Cameron > > On Sep 19, 2011, at 1:00 PM, Owen Anderson wrote: > >> Author: resistor >> Date: Mon Sep 19 15:00:02 2011 >> New Revision: 140041 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=140041&view=rev >> Log: >> Specify an additional fixed bit in the Thumb2 SSAT encoding to prevent the decoder from emitting gibberish for this invalid encoding. >> >> Modified: >> llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td >> >> Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=140041&r1=140040&r2=140041&view=diff >> ============================================================================== >> --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) >> +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Mon Sep 19 15:00:02 2011 >> @@ -2032,6 +2032,7 @@ >> let Inst{25-22} = 0b1100; >> let Inst{20} = 0; >> let Inst{15} = 0; >> + let Inst{5} = 0; >> } >> >> def t2SSAT16: T2SatI< >> >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From echristo at apple.com Mon Sep 19 15:43:23 2011 From: echristo at apple.com (Eric Christopher) Date: Mon, 19 Sep 2011 20:43:23 -0000 Subject: [llvm-commits] [llvm] r140064 - in /llvm/trunk: autoconf/configure.ac cmake/config-ix.cmake cmake/modules/CheckAtomic.cmake configure include/llvm/Config/config.h.cmake include/llvm/Config/config.h.in include/llvm/Config/llvm-config.h.cmake include/llvm/Config/llvm-config.h.in lib/Support/Atomic.cpp lib/Support/Threading.cpp Message-ID: <20110919204323.6C9A12A6C12C@llvm.org> Author: echristo Date: Mon Sep 19 15:43:23 2011 New Revision: 140064 URL: http://llvm.org/viewvc/llvm-project?rev=140064&view=rev Log: Rename LLVM_MULTITHREADED define and fix build without threads. Patch by Arrowdodger. Modified: llvm/trunk/autoconf/configure.ac llvm/trunk/cmake/config-ix.cmake llvm/trunk/cmake/modules/CheckAtomic.cmake llvm/trunk/configure llvm/trunk/include/llvm/Config/config.h.cmake llvm/trunk/include/llvm/Config/config.h.in llvm/trunk/include/llvm/Config/llvm-config.h.cmake llvm/trunk/include/llvm/Config/llvm-config.h.in llvm/trunk/lib/Support/Atomic.cpp llvm/trunk/lib/Support/Threading.cpp Modified: llvm/trunk/autoconf/configure.ac URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/autoconf/configure.ac?rev=140064&r1=140063&r2=140064&view=diff ============================================================================== --- llvm/trunk/autoconf/configure.ac (original) +++ llvm/trunk/autoconf/configure.ac Mon Sep 19 15:43:23 2011 @@ -1515,9 +1515,9 @@ ]]), AC_LANG_POP([C++]) AC_MSG_RESULT(yes) - AC_DEFINE(LLVM_MULTITHREADED, 1, Build multithreading support into LLVM), + AC_DEFINE(LLVM_HAS_ATOMICS, 1, Has gcc/MSVC atomic intrinsics), AC_MSG_RESULT(no) - AC_DEFINE(LLVM_MULTITHREADED, 0, Build multithreading support into LLVM) + AC_DEFINE(LLVM_HAS_ATOMICS, 0, Has gcc/MSVC atomic intrinsics) AC_MSG_WARN([LLVM will be built thread-unsafe because atomic builtins are missing])) dnl===-----------------------------------------------------------------------=== Modified: llvm/trunk/cmake/config-ix.cmake URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/cmake/config-ix.cmake?rev=140064&r1=140063&r2=140064&view=diff ============================================================================== --- llvm/trunk/cmake/config-ix.cmake (original) +++ llvm/trunk/cmake/config-ix.cmake Mon Sep 19 15:43:23 2011 @@ -272,7 +272,7 @@ unset(HAVE_FFI_CALL CACHE) endif( LLVM_ENABLE_FFI ) -# Define LLVM_MULTITHREADED if gcc atomic builtins exists. +# Define LLVM_HAS_ATOMICS if gcc or MSVC atomic builtins are supported. include(CheckAtomic) if( LLVM_ENABLE_PIC ) Modified: llvm/trunk/cmake/modules/CheckAtomic.cmake URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/cmake/modules/CheckAtomic.cmake?rev=140064&r1=140063&r2=140064&view=diff ============================================================================== --- llvm/trunk/cmake/modules/CheckAtomic.cmake (original) +++ llvm/trunk/cmake/modules/CheckAtomic.cmake Mon Sep 19 15:43:23 2011 @@ -22,8 +22,8 @@ #endif return 0; } -" LLVM_MULTITHREADED) +" LLVM_HAS_ATOMICS) -if( NOT LLVM_MULTITHREADED ) +if( NOT LLVM_HAS_ATOMICS ) message(STATUS "Warning: LLVM will be built thread-unsafe because atomic builtins are missing") endif() Modified: llvm/trunk/configure URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/configure?rev=140064&r1=140063&r2=140064&view=diff ============================================================================== --- llvm/trunk/configure (original) +++ llvm/trunk/configure Mon Sep 19 15:43:23 2011 @@ -21027,7 +21027,7 @@ echo "${ECHO_T}yes" >&6; } cat >>confdefs.h <<\_ACEOF -#define LLVM_MULTITHREADED 1 +#define LLVM_HAS_ATOMICS 1 _ACEOF else @@ -21038,7 +21038,7 @@ echo "${ECHO_T}no" >&6; } cat >>confdefs.h <<\_ACEOF -#define LLVM_MULTITHREADED 0 +#define LLVM_HAS_ATOMICS 0 _ACEOF { echo "$as_me:$LINENO: WARNING: LLVM will be built thread-unsafe because atomic builtins are missing" >&5 Modified: llvm/trunk/include/llvm/Config/config.h.cmake URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Config/config.h.cmake?rev=140064&r1=140063&r2=140064&view=diff ============================================================================== --- llvm/trunk/include/llvm/Config/config.h.cmake (original) +++ llvm/trunk/include/llvm/Config/config.h.cmake Mon Sep 19 15:43:23 2011 @@ -566,8 +566,8 @@ /* Installation directory for man pages */ #cmakedefine LLVM_MANDIR "${LLVM_MANDIR}" -/* Build multithreading support into LLVM */ -#cmakedefine LLVM_MULTITHREADED ${LLVM_MULTITHREADED} +/* Has gcc/MSVC atomic intrinsics */ +#define LLVM_HAS_ATOMICS ${LLVM_HAS_ATOMICS} /* LLVM architecture name for the native architecture, if available */ #cmakedefine LLVM_NATIVE_ARCH ${LLVM_NATIVE_ARCH} Modified: llvm/trunk/include/llvm/Config/config.h.in URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Config/config.h.in?rev=140064&r1=140063&r2=140064&view=diff ============================================================================== --- llvm/trunk/include/llvm/Config/config.h.in (original) +++ llvm/trunk/include/llvm/Config/config.h.in Mon Sep 19 15:43:23 2011 @@ -564,8 +564,8 @@ /* Installation directory for man pages */ #undef LLVM_MANDIR -/* Build multithreading support into LLVM */ -#undef LLVM_MULTITHREADED +/* Has gcc/MSVC atomic intrinsics */ +#undef LLVM_HAS_ATOMICS /* LLVM architecture name for the native architecture, if available */ #undef LLVM_NATIVE_ARCH Modified: llvm/trunk/include/llvm/Config/llvm-config.h.cmake URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Config/llvm-config.h.cmake?rev=140064&r1=140063&r2=140064&view=diff ============================================================================== --- llvm/trunk/include/llvm/Config/llvm-config.h.cmake (original) +++ llvm/trunk/include/llvm/Config/llvm-config.h.cmake Mon Sep 19 15:43:23 2011 @@ -46,8 +46,8 @@ /* Installation directory for man pages */ #cmakedefine LLVM_MANDIR "${LLVM_MANDIR}" -/* Build multithreading support into LLVM */ -#cmakedefine LLVM_MULTITHREADED ${LLVM_MULTITHREADED} +/* Has gcc/MSVC atomic intrinsics */ +#define LLVM_HAS_ATOMICS ${LLVM_HAS_ATOMICS} /* LLVM architecture name for the native architecture, if available */ #cmakedefine LLVM_NATIVE_ARCH ${LLVM_NATIVE_ARCH} Modified: llvm/trunk/include/llvm/Config/llvm-config.h.in URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Config/llvm-config.h.in?rev=140064&r1=140063&r2=140064&view=diff ============================================================================== --- llvm/trunk/include/llvm/Config/llvm-config.h.in (original) +++ llvm/trunk/include/llvm/Config/llvm-config.h.in Mon Sep 19 15:43:23 2011 @@ -46,8 +46,8 @@ /* Installation directory for man pages */ #undef LLVM_MANDIR -/* Build multithreading support into LLVM */ -#undef LLVM_MULTITHREADED +/* Has gcc/MSVC atomic intrinsics */ +#undef LLVM_HAS_ATOMICS /* LLVM architecture name for the native architecture, if available */ #undef LLVM_NATIVE_ARCH Modified: llvm/trunk/lib/Support/Atomic.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Atomic.cpp?rev=140064&r1=140063&r2=140064&view=diff ============================================================================== --- llvm/trunk/lib/Support/Atomic.cpp (original) +++ llvm/trunk/lib/Support/Atomic.cpp Mon Sep 19 15:43:23 2011 @@ -22,7 +22,7 @@ #endif void sys::MemoryFence() { -#if LLVM_MULTITHREADED==0 +#if LLVM_HAS_ATOMICS == 0 return; #else # if defined(__GNUC__) @@ -38,7 +38,7 @@ sys::cas_flag sys::CompareAndSwap(volatile sys::cas_flag* ptr, sys::cas_flag new_value, sys::cas_flag old_value) { -#if LLVM_MULTITHREADED==0 +#if LLVM_HAS_ATOMICS == 0 sys::cas_flag result = *ptr; if (result == old_value) *ptr = new_value; @@ -53,7 +53,7 @@ } sys::cas_flag sys::AtomicIncrement(volatile sys::cas_flag* ptr) { -#if LLVM_MULTITHREADED==0 +#if LLVM_HAS_ATOMICS == 0 ++(*ptr); return *ptr; #elif defined(__GNUC__) @@ -66,7 +66,7 @@ } sys::cas_flag sys::AtomicDecrement(volatile sys::cas_flag* ptr) { -#if LLVM_MULTITHREADED==0 +#if LLVM_HAS_ATOMICS == 0 --(*ptr); return *ptr; #elif defined(__GNUC__) @@ -79,7 +79,7 @@ } sys::cas_flag sys::AtomicAdd(volatile sys::cas_flag* ptr, sys::cas_flag val) { -#if LLVM_MULTITHREADED==0 +#if LLVM_HAS_ATOMICS == 0 *ptr += val; return *ptr; #elif defined(__GNUC__) Modified: llvm/trunk/lib/Support/Threading.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Threading.cpp?rev=140064&r1=140063&r2=140064&view=diff ============================================================================== --- llvm/trunk/lib/Support/Threading.cpp (original) +++ llvm/trunk/lib/Support/Threading.cpp Mon Sep 19 15:43:23 2011 @@ -24,7 +24,7 @@ static sys::Mutex* global_lock = 0; bool llvm::llvm_start_multithreaded() { -#ifdef LLVM_MULTITHREADED +#if ENABLE_THREADS != 0 assert(!multithreaded_mode && "Already multithreaded!"); multithreaded_mode = true; global_lock = new sys::Mutex(true); @@ -39,7 +39,7 @@ } void llvm::llvm_stop_multithreaded() { -#ifdef LLVM_MULTITHREADED +#if ENABLE_THREADS != 0 assert(multithreaded_mode && "Not currently multithreaded!"); // We fence here to insure that all threaded operations are complete BEFORE we @@ -63,7 +63,7 @@ if (multithreaded_mode) global_lock->release(); } -#if defined(LLVM_MULTITHREADED) && defined(HAVE_PTHREAD_H) +#if ENABLE_THREADS != 0 && defined(HAVE_PTHREAD_H) #include struct ThreadInfo { @@ -102,7 +102,7 @@ error: ::pthread_attr_destroy(&Attr); } -#elif defined(LLVM_MULTITHREADED) && defined(LLVM_ON_WIN32) +#elif ENABLE_THREADS!=0 && defined(LLVM_ON_WIN32) #include "Windows/Windows.h" #include From echristo at apple.com Mon Sep 19 15:45:25 2011 From: echristo at apple.com (Eric Christopher) Date: Mon, 19 Sep 2011 13:45:25 -0700 Subject: [llvm-commits] [PATCH] Rename LLVM_MULTITHREADED define and fix build without threads In-Reply-To: References: Message-ID: <414B5CA7-A4FE-4508-B718-EE94C048581A@apple.com> On Sep 19, 2011, at 3:37 AM, arrowdodger wrote: > Updated for recent trunk changes. > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits Done here: M autoconf/configure.ac M cmake/config-ix.cmake M cmake/modules/CheckAtomic.cmake M configure M include/llvm/Config/config.h.cmake M include/llvm/Config/config.h.in M include/llvm/Config/llvm-config.h.cmake M include/llvm/Config/llvm-config.h.in M lib/Support/Atomic.cpp M lib/Support/Threading.cpp Committed r140064 Sorry for the delay and thanks! -eric From echristo at apple.com Mon Sep 19 15:46:12 2011 From: echristo at apple.com (Eric Christopher) Date: Mon, 19 Sep 2011 20:46:12 -0000 Subject: [llvm-commits] [llvm] r140065 - in /llvm/trunk: configure include/llvm/Config/config.h.in Message-ID: <20110919204612.A30F22A6C12C@llvm.org> Author: echristo Date: Mon Sep 19 15:46:12 2011 New Revision: 140065 URL: http://llvm.org/viewvc/llvm-project?rev=140065&view=rev Log: Regenerate configure. Modified: llvm/trunk/configure llvm/trunk/include/llvm/Config/config.h.in Modified: llvm/trunk/configure URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/configure?rev=140065&r1=140064&r2=140065&view=diff ============================================================================== --- llvm/trunk/configure (original) +++ llvm/trunk/configure Mon Sep 19 15:46:12 2011 @@ -5790,7 +5790,6 @@ - { echo "$as_me:$LINENO: checking for BSD-compatible nm" >&5 echo $ECHO_N "checking for BSD-compatible nm... $ECHO_C" >&6; } if test "${lt_cv_path_NM+set}" = set; then @@ -10596,7 +10595,7 @@ lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext < Message-ID: <27F465BDABE6954AABB2A4E3599BDAC702AC781551@sausexmbp02.amd.com> Ping? -----Original Message----- From: Guo, Xiaoyi Sent: Thursday, September 15, 2011 6:34 PM To: 'Eli Friedman' Cc: llvm-commits at cs.uiuc.edu Subject: RE: [llvm-commits] bug fix for infinite loop in InstCombine Thanks for reviewing it. Here's another try. See attached new diff. Xiaoyi -----Original Message----- From: Eli Friedman [mailto:eli.friedman at gmail.com] Sent: Thursday, September 15, 2011 5:55 PM To: Guo, Xiaoyi Cc: llvm-commits at cs.uiuc.edu Subject: Re: [llvm-commits] bug fix for infinite loop in InstCombine On Thu, Sep 15, 2011 at 4:45 PM, Guo, Xiaoyi wrote: > Please review the attached fix for a bug in InstCombiner. The patch also includes a new test case which will cause the current InstCombiner to go into an infinite loop. > > Please help to commit if acceptable. > > The problem is with the following code in InstCombiner::visitAnd() in InstCombineAndOrXor.cpp: > > Instruction *InstCombiner::visitAnd(BinaryOperator &I) { > ?bool Changed = SimplifyAssociativeOrCommutative(I); > ?... > ? ?if (Op0->hasOneUse() && > ? ? ? ?match(Op0, m_Xor(m_Value(A), m_Value(B)))) { > ? ? ?if (A == Op1) { ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?// (A^B)&A -> > A&(A^B) > ? ? ? ?I.swapOperands(); ? ? // Simplify below > ? ? ? ?std::swap(Op0, Op1); ? ? ? ? ? ? ? ? ? ? ? ? ? ?<========== > ? ? ?} else if (B == Op1) { ? ? ? ? ? ? ? ? ? ? ? ? // (A^B)&B -> > B&(B^A) > ? ? ? ?cast(Op0)->swapOperands(); > ? ? ? ?I.swapOperands(); ? ? // Simplify below > ? ? ? ?std::swap(Op0, Op1); ? ? ? ? ? ? ? ? ? ? ? ? ? ?<========== > ? ? ?} > ? ?} > > ? ?if (Op1->hasOneUse() && > ? ? ? ?match(Op1, m_Xor(m_Value(A), m_Value(B)))) { > ? ? ?if (B == Op0) { ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?// B&(A^B) -> > B&(B^A) > ? ? ? ?cast(Op1)->swapOperands(); > ? ? ? ?std::swap(A, B); > ? ? ?} > ? ? ?// Notice that the patten (A&(~B)) is actually (A&(-1^B)), so if > ? ? ?// A is originally -1 (or a vector of -1 and undefs), then we > enter > ? ? ?// an endless loop. By checking that A is non-constant we ensure > that > ? ? ?// we will never get to the loop. > ? ? ?if (A == Op0 && !isa(A)) // A&(A^B) -> A & ~B > ? ? ? ?return BinaryOperator::CreateAnd(A, Builder->CreateNot(B, > "tmp")); > ? ?} > > > With the given test case, op0 is a const and op1 is xor, so the two operands are be swapped in SimplifyAssociativeOrCommutative(). Then I's operands are swapped back at one of the statements marked "<===========" above. Then because A is a constant, a new instruction is not created. So we end up with Changed flag as true but the instruction is not changed and we go into an infinite loop in InstCombiner::DoOneIteration(). > > My fix is to remove the swapOperands() calls, because I don't think they are necessary. The general idea seems fine. Your fix disables the transform in some cases where both Op0 and Op1 are Xor operators, though. -Eli From isanbard at gmail.com Mon Sep 19 16:14:33 2011 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 19 Sep 2011 21:14:33 -0000 Subject: [llvm-commits] [llvm] r140067 - /llvm/trunk/test/Transforms/Inline/2003-10-26-InlineInvokeExceptionDestPhi.ll Message-ID: <20110919211433.EED442A6C12C@llvm.org> Author: void Date: Mon Sep 19 16:14:33 2011 New Revision: 140067 URL: http://llvm.org/viewvc/llvm-project?rev=140067&view=rev Log: This testcase is dead. It doesn't inline even if I add the 'alwaysinline' attribute to the @foo function. Removed: llvm/trunk/test/Transforms/Inline/2003-10-26-InlineInvokeExceptionDestPhi.ll Removed: llvm/trunk/test/Transforms/Inline/2003-10-26-InlineInvokeExceptionDestPhi.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/Inline/2003-10-26-InlineInvokeExceptionDestPhi.ll?rev=140066&view=auto ============================================================================== --- llvm/trunk/test/Transforms/Inline/2003-10-26-InlineInvokeExceptionDestPhi.ll (original) +++ llvm/trunk/test/Transforms/Inline/2003-10-26-InlineInvokeExceptionDestPhi.ll (removed) @@ -1,23 +0,0 @@ -; The inliner is breaking inlining invoke instructions where there is a PHI -; node in the exception destination, and the inlined function contains an -; unwind instruction. - -; RUN: opt < %s -inline -disable-output - -define linkonce void @foo() { - unwind -} - -define i32 @test() { -BB1: - invoke void @foo( ) - to label %Cont unwind label %Cont - -Cont: ; preds = %BB1, %BB1 - %A = phi i32 [ 0, %BB1 ], [ 0, %BB1 ] ; [#uses=1] - %exn = landingpad {i8*, i32} personality i32 (...)* @__gxx_personality_v0 - cleanup - ret i32 %A -} - -declare i32 @__gxx_personality_v0(...) From eli.friedman at gmail.com Mon Sep 19 16:21:04 2011 From: eli.friedman at gmail.com (Eli Friedman) Date: Mon, 19 Sep 2011 14:21:04 -0700 Subject: [llvm-commits] bug fix for infinite loop in InstCombine In-Reply-To: <27F465BDABE6954AABB2A4E3599BDAC702AC781551@sausexmbp02.amd.com> References: <27F465BDABE6954AABB2A4E3599BDAC702A4DFD30D@sausexmbp02.amd.com> <27F465BDABE6954AABB2A4E3599BDAC702AC781551@sausexmbp02.amd.com> Message-ID: On Mon, Sep 19, 2011 at 2:12 PM, Guo, Xiaoyi wrote: > Ping? Oh, hmm... I somehow thought I already had reviewed this. + { + Value *tmpOp0 = Op0; + Value *tmpOp1 = Op1; + if (Op0->hasOneUse() && + match(Op0, m_Xor(m_Value(A), m_Value(B)))) { + if (A == Op1 || B == Op1 ) { + tmpOp1 = Op0; + tmpOp0 = Op1; + // Simplify below + } It looks like a check for isa(Op1) check is necessary to handle some cases? Otherwise, looks fine. -Eli > -----Original Message----- > From: Guo, Xiaoyi > Sent: Thursday, September 15, 2011 6:34 PM > To: 'Eli Friedman' > Cc: llvm-commits at cs.uiuc.edu > Subject: RE: [llvm-commits] bug fix for infinite loop in InstCombine > > Thanks for reviewing it. Here's another try. See attached new diff. > > Xiaoyi > > -----Original Message----- > From: Eli Friedman [mailto:eli.friedman at gmail.com] > Sent: Thursday, September 15, 2011 5:55 PM > To: Guo, Xiaoyi > Cc: llvm-commits at cs.uiuc.edu > Subject: Re: [llvm-commits] bug fix for infinite loop in InstCombine > > On Thu, Sep 15, 2011 at 4:45 PM, Guo, Xiaoyi wrote: >> Please review the attached fix for a bug in InstCombiner. The patch also includes a new test case which will cause the current InstCombiner to go into an infinite loop. >> >> Please help to commit if acceptable. >> >> The problem is with the following code in InstCombiner::visitAnd() in InstCombineAndOrXor.cpp: >> >> Instruction *InstCombiner::visitAnd(BinaryOperator &I) { >> ?bool Changed = SimplifyAssociativeOrCommutative(I); >> ?... >> ? ?if (Op0->hasOneUse() && >> ? ? ? ?match(Op0, m_Xor(m_Value(A), m_Value(B)))) { >> ? ? ?if (A == Op1) { ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?// (A^B)&A -> >> A&(A^B) >> ? ? ? ?I.swapOperands(); ? ? // Simplify below >> ? ? ? ?std::swap(Op0, Op1); ? ? ? ? ? ? ? ? ? ? ? ? ? ?<========== >> ? ? ?} else if (B == Op1) { ? ? ? ? ? ? ? ? ? ? ? ? // (A^B)&B -> >> B&(B^A) >> ? ? ? ?cast(Op0)->swapOperands(); >> ? ? ? ?I.swapOperands(); ? ? // Simplify below >> ? ? ? ?std::swap(Op0, Op1); ? ? ? ? ? ? ? ? ? ? ? ? ? ?<========== >> ? ? ?} >> ? ?} >> >> ? ?if (Op1->hasOneUse() && >> ? ? ? ?match(Op1, m_Xor(m_Value(A), m_Value(B)))) { >> ? ? ?if (B == Op0) { ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?// B&(A^B) -> >> B&(B^A) >> ? ? ? ?cast(Op1)->swapOperands(); >> ? ? ? ?std::swap(A, B); >> ? ? ?} >> ? ? ?// Notice that the patten (A&(~B)) is actually (A&(-1^B)), so if >> ? ? ?// A is originally -1 (or a vector of -1 and undefs), then we >> enter >> ? ? ?// an endless loop. By checking that A is non-constant we ensure >> that >> ? ? ?// we will never get to the loop. >> ? ? ?if (A == Op0 && !isa(A)) // A&(A^B) -> A & ~B >> ? ? ? ?return BinaryOperator::CreateAnd(A, Builder->CreateNot(B, >> "tmp")); >> ? ?} >> >> >> With the given test case, op0 is a const and op1 is xor, so the two operands are be swapped in SimplifyAssociativeOrCommutative(). Then I's operands are swapped back at one of the statements marked "<===========" above. Then because A is a constant, a new instruction is not created. So we end up with Changed flag as true but the instruction is not changed and we go into an infinite loop in InstCombiner::DoOneIteration(). >> >> My fix is to remove the swapOperands() calls, because I don't think they are necessary. > > The general idea seems fine. ?Your fix disables the transform in some cases where both Op0 and Op1 are Xor operators, though. > > -Eli > > > From Xiaoyi.Guo at amd.com Mon Sep 19 16:27:49 2011 From: Xiaoyi.Guo at amd.com (Guo, Xiaoyi) Date: Mon, 19 Sep 2011 16:27:49 -0500 Subject: [llvm-commits] bug fix for infinite loop in InstCombine In-Reply-To: References: <27F465BDABE6954AABB2A4E3599BDAC702A4DFD30D@sausexmbp02.amd.com> <27F465BDABE6954AABB2A4E3599BDAC702AC781551@sausexmbp02.amd.com> Message-ID: <27F465BDABE6954AABB2A4E3599BDAC702AC78157C@sausexmbp02.amd.com> Thanks for reviewing. The code you mentioned will eventually fall through to the code below and do the isa check there: + if (A == tmpOp0 && !isa(A)) // A&(A^B) -> A & ~B + return BinaryOperator::CreateAnd(A, Builder->CreateNot(B, "tmp")); Xiaoyi -----Original Message----- From: Eli Friedman [mailto:eli.friedman at gmail.com] Sent: Monday, September 19, 2011 2:21 PM To: Guo, Xiaoyi Cc: llvm-commits at cs.uiuc.edu Subject: Re: [llvm-commits] bug fix for infinite loop in InstCombine On Mon, Sep 19, 2011 at 2:12 PM, Guo, Xiaoyi wrote: > Ping? Oh, hmm... I somehow thought I already had reviewed this. + { + Value *tmpOp0 = Op0; + Value *tmpOp1 = Op1; + if (Op0->hasOneUse() && + match(Op0, m_Xor(m_Value(A), m_Value(B)))) { + if (A == Op1 || B == Op1 ) { + tmpOp1 = Op0; + tmpOp0 = Op1; + // Simplify below + } It looks like a check for isa(Op1) check is necessary to handle some cases? Otherwise, looks fine. -Eli > -----Original Message----- > From: Guo, Xiaoyi > Sent: Thursday, September 15, 2011 6:34 PM > To: 'Eli Friedman' > Cc: llvm-commits at cs.uiuc.edu > Subject: RE: [llvm-commits] bug fix for infinite loop in InstCombine > > Thanks for reviewing it. Here's another try. See attached new diff. > > Xiaoyi > > -----Original Message----- > From: Eli Friedman [mailto:eli.friedman at gmail.com] > Sent: Thursday, September 15, 2011 5:55 PM > To: Guo, Xiaoyi > Cc: llvm-commits at cs.uiuc.edu > Subject: Re: [llvm-commits] bug fix for infinite loop in InstCombine > > On Thu, Sep 15, 2011 at 4:45 PM, Guo, Xiaoyi wrote: >> Please review the attached fix for a bug in InstCombiner. The patch also includes a new test case which will cause the current InstCombiner to go into an infinite loop. >> >> Please help to commit if acceptable. >> >> The problem is with the following code in InstCombiner::visitAnd() in InstCombineAndOrXor.cpp: >> >> Instruction *InstCombiner::visitAnd(BinaryOperator &I) { >> ?bool Changed = SimplifyAssociativeOrCommutative(I); >> ?... >> ? ?if (Op0->hasOneUse() && >> ? ? ? ?match(Op0, m_Xor(m_Value(A), m_Value(B)))) { >> ? ? ?if (A == Op1) { ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?// (A^B)&A -> >> A&(A^B) >> ? ? ? ?I.swapOperands(); ? ? // Simplify below >> ? ? ? ?std::swap(Op0, Op1); ? ? ? ? ? ? ? ? ? ? ? ? ? ?<========== >> ? ? ?} else if (B == Op1) { ? ? ? ? ? ? ? ? ? ? ? ? // (A^B)&B -> >> B&(B^A) >> ? ? ? ?cast(Op0)->swapOperands(); >> ? ? ? ?I.swapOperands(); ? ? // Simplify below >> ? ? ? ?std::swap(Op0, Op1); ? ? ? ? ? ? ? ? ? ? ? ? ? ?<========== >> ? ? ?} >> ? ?} >> >> ? ?if (Op1->hasOneUse() && >> ? ? ? ?match(Op1, m_Xor(m_Value(A), m_Value(B)))) { >> ? ? ?if (B == Op0) { ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?// B&(A^B) -> >> B&(B^A) >> ? ? ? ?cast(Op1)->swapOperands(); >> ? ? ? ?std::swap(A, B); >> ? ? ?} >> ? ? ?// Notice that the patten (A&(~B)) is actually (A&(-1^B)), so if >> ? ? ?// A is originally -1 (or a vector of -1 and undefs), then we >> enter >> ? ? ?// an endless loop. By checking that A is non-constant we ensure >> that >> ? ? ?// we will never get to the loop. >> ? ? ?if (A == Op0 && !isa(A)) // A&(A^B) -> A & ~B >> ? ? ? ?return BinaryOperator::CreateAnd(A, Builder->CreateNot(B, >> "tmp")); >> ? ?} >> >> >> With the given test case, op0 is a const and op1 is xor, so the two operands are be swapped in SimplifyAssociativeOrCommutative(). Then I's operands are swapped back at one of the statements marked "<===========" above. Then because A is a constant, a new instruction is not created. So we end up with Changed flag as true but the instruction is not changed and we go into an infinite loop in InstCombiner::DoOneIteration(). >> >> My fix is to remove the swapOperands() calls, because I don't think they are necessary. > > The general idea seems fine. ?Your fix disables the transform in some cases where both Op0 and Op1 are Xor operators, though. > > -Eli > > > From bruno.cardoso at gmail.com Mon Sep 19 16:29:24 2011 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Mon, 19 Sep 2011 21:29:24 -0000 Subject: [llvm-commits] [llvm] r140069 - in /llvm/trunk: lib/Target/X86/X86InstrSSE.td test/CodeGen/X86/avx-cmp.ll Message-ID: <20110919212924.A4F5E2A6C12C@llvm.org> Author: bruno Date: Mon Sep 19 16:29:24 2011 New Revision: 140069 URL: http://llvm.org/viewvc/llvm-project?rev=140069&view=rev Log: Match X86ISD::FSETCCsd and X86ISD::FSETCCss while in AVX mode. This fix PR10955 and PR10948. Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td llvm/trunk/test/CodeGen/X86/avx-cmp.ll Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=140069&r1=140068&r2=140069&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Mon Sep 19 16:29:24 2011 @@ -1973,73 +1973,44 @@ // sse12_cmp_scalar - sse 1 & 2 compare scalar instructions multiclass sse12_cmp_scalar { - let isAsmParserOnly = 1 in { - def rr : SIi8<0xC2, MRMSrcReg, - (outs RC:$dst), (ins RC:$src1, RC:$src, SSECC:$cc), - asm, []>; - let mayLoad = 1 in - def rm : SIi8<0xC2, MRMSrcMem, - (outs RC:$dst), (ins RC:$src1, x86memop:$src, SSECC:$cc), - asm, []>; - } + def rr : SIi8<0xC2, MRMSrcReg, + (outs RC:$dst), (ins RC:$src1, RC:$src2, SSECC:$cc), asm, + [(set RC:$dst, (OpNode (VT RC:$src1), RC:$src2, imm:$cc))]>; + def rm : SIi8<0xC2, MRMSrcMem, + (outs RC:$dst), (ins RC:$src1, x86memop:$src2, SSECC:$cc), asm, + [(set RC:$dst, (OpNode (VT RC:$src1), + (ld_frag addr:$src2), imm:$cc))]>; // Accept explicit immediate argument form instead of comparison code. - def rr_alt : SIi8<0xC2, MRMSrcReg, - (outs RC:$dst), (ins RC:$src1, RC:$src, i8imm:$src2), - asm_alt, []>; - let mayLoad = 1 in - def rm_alt : SIi8<0xC2, MRMSrcMem, - (outs RC:$dst), (ins RC:$src1, x86memop:$src, i8imm:$src2), - asm_alt, []>; + let neverHasSideEffects = 1 in { + def rr_alt : SIi8<0xC2, MRMSrcReg, (outs RC:$dst), + (ins RC:$src1, RC:$src2, i8imm:$cc), asm_alt, []>; + let mayLoad = 1 in + def rm_alt : SIi8<0xC2, MRMSrcMem, (outs RC:$dst), + (ins RC:$src1, x86memop:$src2, i8imm:$cc), asm_alt, []>; + } } -let neverHasSideEffects = 1 in { - defm VCMPSS : sse12_cmp_scalar, - XS, VEX_4V; - defm VCMPSD : sse12_cmp_scalar, - XD, VEX_4V; -} +defm VCMPSS : sse12_cmp_scalar, + XS, VEX_4V; +defm VCMPSD : sse12_cmp_scalar, + XD, VEX_4V; let Constraints = "$src1 = $dst" in { -def CMPSSrr : SIi8<0xC2, MRMSrcReg, - (outs FR32:$dst), (ins FR32:$src1, FR32:$src2, SSECC:$cc), - "cmp${cc}ss\t{$src2, $dst|$dst, $src2}", - [(set FR32:$dst, (X86cmpss (f32 FR32:$src1), FR32:$src2, - imm:$cc))]>, XS; -def CMPSSrm : SIi8<0xC2, MRMSrcMem, - (outs FR32:$dst), (ins FR32:$src1, f32mem:$src2, SSECC:$cc), - "cmp${cc}ss\t{$src2, $dst|$dst, $src2}", - [(set FR32:$dst, (X86cmpss (f32 FR32:$src1), - (loadf32 addr:$src2), imm:$cc))]>, XS; -def CMPSDrr : SIi8<0xC2, MRMSrcReg, - (outs FR64:$dst), (ins FR64:$src1, FR64:$src2, SSECC:$cc), - "cmp${cc}sd\t{$src2, $dst|$dst, $src2}", - [(set FR64:$dst, (X86cmpsd (f64 FR64:$src1), FR64:$src2, - imm:$cc))]>, XD; -def CMPSDrm : SIi8<0xC2, MRMSrcMem, - (outs FR64:$dst), (ins FR64:$src1, f64mem:$src2, SSECC:$cc), - "cmp${cc}sd\t{$src2, $dst|$dst, $src2}", - [(set FR64:$dst, (X86cmpsd (f64 FR64:$src1), (loadf64 addr:$src2), - imm:$cc))]>, XD; -} -let Constraints = "$src1 = $dst", neverHasSideEffects = 1 in { -def CMPSSrr_alt : SIi8<0xC2, MRMSrcReg, - (outs FR32:$dst), (ins FR32:$src1, FR32:$src, i8imm:$src2), - "cmpss\t{$src2, $src, $dst|$dst, $src, $src2}", []>, XS; -def CMPSSrm_alt : SIi8<0xC2, MRMSrcMem, - (outs FR32:$dst), (ins FR32:$src1, f32mem:$src, i8imm:$src2), - "cmpss\t{$src2, $src, $dst|$dst, $src, $src2}", []>, XS; -def CMPSDrr_alt : SIi8<0xC2, MRMSrcReg, - (outs FR64:$dst), (ins FR64:$src1, FR64:$src, i8imm:$src2), - "cmpsd\t{$src2, $src, $dst|$dst, $src, $src2}", []>, XD; -def CMPSDrm_alt : SIi8<0xC2, MRMSrcMem, - (outs FR64:$dst), (ins FR64:$src1, f64mem:$src, i8imm:$src2), - "cmpsd\t{$src2, $src, $dst|$dst, $src, $src2}", []>, XD; + defm CMPSS : sse12_cmp_scalar, + XS; + defm CMPSD : sse12_cmp_scalar, + XD; } multiclass sse12_cmp_scalar_int %x } +;; Scalar comparison + +; CHECK: scalarcmpA +; CHECK: vcmpeqsd +define i32 @scalarcmpA() uwtable ssp { + %cmp29 = fcmp oeq double undef, 0.000000e+00 + %res = zext i1 %cmp29 to i32 + ret i32 %res +} + +; CHECK: scalarcmpB +; CHECK: vcmpeqss +define i32 @scalarcmpB() uwtable ssp { + %cmp29 = fcmp oeq float undef, 0.000000e+00 + %res = zext i1 %cmp29 to i32 + ret i32 %res +} + From eli.friedman at gmail.com Mon Sep 19 16:36:59 2011 From: eli.friedman at gmail.com (Eli Friedman) Date: Mon, 19 Sep 2011 14:36:59 -0700 Subject: [llvm-commits] bug fix for infinite loop in InstCombine In-Reply-To: <27F465BDABE6954AABB2A4E3599BDAC702AC78157C@sausexmbp02.amd.com> References: <27F465BDABE6954AABB2A4E3599BDAC702A4DFD30D@sausexmbp02.amd.com> <27F465BDABE6954AABB2A4E3599BDAC702AC781551@sausexmbp02.amd.com> <27F465BDABE6954AABB2A4E3599BDAC702AC78157C@sausexmbp02.amd.com> Message-ID: On Mon, Sep 19, 2011 at 2:27 PM, Guo, Xiaoyi wrote: > Thanks for reviewing. > > The code you mentioned will eventually fall through to the code below and do the isa check there: > > + ? ? ? ?if (A == tmpOp0 && !isa(A)) // A&(A^B) -> A & ~B > + ? ? ? ? ?return BinaryOperator::CreateAnd(A, Builder->CreateNot(B, "tmp")); Err, right, nevermind... I was thinking of a case which doesn't actually exist. Would you like me to commit this? -Eli > Xiaoyi > > -----Original Message----- > From: Eli Friedman [mailto:eli.friedman at gmail.com] > Sent: Monday, September 19, 2011 2:21 PM > To: Guo, Xiaoyi > Cc: llvm-commits at cs.uiuc.edu > Subject: Re: [llvm-commits] bug fix for infinite loop in InstCombine > > On Mon, Sep 19, 2011 at 2:12 PM, Guo, Xiaoyi wrote: >> Ping? > > Oh, hmm... I somehow thought I already had reviewed this. > > + ? ?{ > + ? ? ?Value *tmpOp0 = Op0; > + ? ? ?Value *tmpOp1 = Op1; > + ? ? ?if (Op0->hasOneUse() && > + ? ? ? ? ?match(Op0, m_Xor(m_Value(A), m_Value(B)))) { > + ? ? ? ?if (A == Op1 || B == Op1 ) { > + ? ? ? ? ?tmpOp1 = Op0; > + ? ? ? ? ?tmpOp0 = Op1; > + ? ? ? ? ?// Simplify below > + ? ? ? ?} > > It looks like a check for isa(Op1) check is necessary to handle some cases? > > Otherwise, looks fine. > > -Eli > >> -----Original Message----- >> From: Guo, Xiaoyi >> Sent: Thursday, September 15, 2011 6:34 PM >> To: 'Eli Friedman' >> Cc: llvm-commits at cs.uiuc.edu >> Subject: RE: [llvm-commits] bug fix for infinite loop in InstCombine >> >> Thanks for reviewing it. Here's another try. See attached new diff. >> >> Xiaoyi >> >> -----Original Message----- >> From: Eli Friedman [mailto:eli.friedman at gmail.com] >> Sent: Thursday, September 15, 2011 5:55 PM >> To: Guo, Xiaoyi >> Cc: llvm-commits at cs.uiuc.edu >> Subject: Re: [llvm-commits] bug fix for infinite loop in InstCombine >> >> On Thu, Sep 15, 2011 at 4:45 PM, Guo, Xiaoyi wrote: >>> Please review the attached fix for a bug in InstCombiner. The patch also includes a new test case which will cause the current InstCombiner to go into an infinite loop. >>> >>> Please help to commit if acceptable. >>> >>> The problem is with the following code in InstCombiner::visitAnd() in InstCombineAndOrXor.cpp: >>> >>> Instruction *InstCombiner::visitAnd(BinaryOperator &I) { >>> ?bool Changed = SimplifyAssociativeOrCommutative(I); >>> ?... >>> ? ?if (Op0->hasOneUse() && >>> ? ? ? ?match(Op0, m_Xor(m_Value(A), m_Value(B)))) { >>> ? ? ?if (A == Op1) { ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?// (A^B)&A -> >>> A&(A^B) >>> ? ? ? ?I.swapOperands(); ? ? // Simplify below >>> ? ? ? ?std::swap(Op0, Op1); ? ? ? ? ? ? ? ? ? ? ? ? ? ?<========== >>> ? ? ?} else if (B == Op1) { ? ? ? ? ? ? ? ? ? ? ? ? // (A^B)&B -> >>> B&(B^A) >>> ? ? ? ?cast(Op0)->swapOperands(); >>> ? ? ? ?I.swapOperands(); ? ? // Simplify below >>> ? ? ? ?std::swap(Op0, Op1); ? ? ? ? ? ? ? ? ? ? ? ? ? ?<========== >>> ? ? ?} >>> ? ?} >>> >>> ? ?if (Op1->hasOneUse() && >>> ? ? ? ?match(Op1, m_Xor(m_Value(A), m_Value(B)))) { >>> ? ? ?if (B == Op0) { ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?// B&(A^B) -> >>> B&(B^A) >>> ? ? ? ?cast(Op1)->swapOperands(); >>> ? ? ? ?std::swap(A, B); >>> ? ? ?} >>> ? ? ?// Notice that the patten (A&(~B)) is actually (A&(-1^B)), so if >>> ? ? ?// A is originally -1 (or a vector of -1 and undefs), then we >>> enter >>> ? ? ?// an endless loop. By checking that A is non-constant we ensure >>> that >>> ? ? ?// we will never get to the loop. >>> ? ? ?if (A == Op0 && !isa(A)) // A&(A^B) -> A & ~B >>> ? ? ? ?return BinaryOperator::CreateAnd(A, Builder->CreateNot(B, >>> "tmp")); >>> ? ?} >>> >>> >>> With the given test case, op0 is a const and op1 is xor, so the two operands are be swapped in SimplifyAssociativeOrCommutative(). Then I's operands are swapped back at one of the statements marked "<===========" above. Then because A is a constant, a new instruction is not created. So we end up with Changed flag as true but the instruction is not changed and we go into an infinite loop in InstCombiner::DoOneIteration(). >>> >>> My fix is to remove the swapOperands() calls, because I don't think they are necessary. >> >> The general idea seems fine. ?Your fix disables the transform in some cases where both Op0 and Op1 are Xor operators, though. >> >> -Eli >> >> >> > > > From grosbach at apple.com Mon Sep 19 16:41:21 2011 From: grosbach at apple.com (Jim Grosbach) Date: Mon, 19 Sep 2011 21:41:21 -0000 Subject: [llvm-commits] [llvm] r140070 - /llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Message-ID: <20110919214121.D51B42A6C12C@llvm.org> Author: grosbach Date: Mon Sep 19 16:41:21 2011 New Revision: 140070 URL: http://llvm.org/viewvc/llvm-project?rev=140070&view=rev Log: Thumb2 assembly parsing and encoding for TEQ. Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s?rev=140070&r1=140069&r2=140070&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s (original) +++ llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Mon Sep 19 16:41:21 2011 @@ -2612,3 +2612,23 @@ @ CHECK: itt ne @ encoding: [0x1c,0xbf] @ CHECK: sxthne.w r3, r9 @ encoding: [0x0f,0xfa,0x89,0xf3] @ CHECK: sxthne.w r2, r2, ror #16 @ encoding: [0x0f,0xfa,0xa2,0xf2] + + + at ------------------------------------------------------------------------------ +@ TEQ + at ------------------------------------------------------------------------------ + teq r5, #0xf000 + teq r4, r5 + teq r4, r5, lsl #5 + teq r4, r5, lsr #5 + teq r4, r5, lsr #5 + teq r4, r5, asr #5 + teq r4, r5, ror #5 + +@ CHECK: teq.w r5, #61440 @ encoding: [0x95,0xf4,0x70,0x4f] +@ CHECK: teq.w r4, r5 @ encoding: [0x94,0xea,0x05,0x0f] +@ CHECK: teq.w r4, r5, lsl #5 @ encoding: [0x94,0xea,0x45,0x1f] +@ CHECK: teq.w r4, r5, lsr #5 @ encoding: [0x94,0xea,0x55,0x1f] +@ CHECK: teq.w r4, r5, lsr #5 @ encoding: [0x94,0xea,0x55,0x1f] +@ CHECK: teq.w r4, r5, asr #5 @ encoding: [0x94,0xea,0x65,0x1f] +@ CHECK: teq.w r4, r5, ror #5 @ encoding: [0x94,0xea,0x75,0x1f] From Xiaoyi.Guo at amd.com Mon Sep 19 16:49:53 2011 From: Xiaoyi.Guo at amd.com (Guo, Xiaoyi) Date: Mon, 19 Sep 2011 16:49:53 -0500 Subject: [llvm-commits] bug fix for infinite loop in InstCombine In-Reply-To: References: <27F465BDABE6954AABB2A4E3599BDAC702A4DFD30D@sausexmbp02.amd.com> <27F465BDABE6954AABB2A4E3599BDAC702AC781551@sausexmbp02.amd.com> <27F465BDABE6954AABB2A4E3599BDAC702AC78157C@sausexmbp02.amd.com> Message-ID: <27F465BDABE6954AABB2A4E3599BDAC702AC7815B6@sausexmbp02.amd.com> > Would you like me to commit this? I would appreciate that. Thanks, Xiaoyi -----Original Message----- From: llvm-commits-bounces at cs.uiuc.edu [mailto:llvm-commits-bounces at cs.uiuc.edu] On Behalf Of Eli Friedman Sent: Monday, September 19, 2011 2:37 PM To: Guo, Xiaoyi Cc: llvm-commits at cs.uiuc.edu Subject: Re: [llvm-commits] bug fix for infinite loop in InstCombine On Mon, Sep 19, 2011 at 2:27 PM, Guo, Xiaoyi wrote: > Thanks for reviewing. > > The code you mentioned will eventually fall through to the code below and do the isa check there: > > + ? ? ? ?if (A == tmpOp0 && !isa(A)) // A&(A^B) -> A & ~B > + ? ? ? ? ?return BinaryOperator::CreateAnd(A, Builder->CreateNot(B, > + "tmp")); Err, right, nevermind... I was thinking of a case which doesn't actually exist. Would you like me to commit this? -Eli > Xiaoyi > > -----Original Message----- > From: Eli Friedman [mailto:eli.friedman at gmail.com] > Sent: Monday, September 19, 2011 2:21 PM > To: Guo, Xiaoyi > Cc: llvm-commits at cs.uiuc.edu > Subject: Re: [llvm-commits] bug fix for infinite loop in InstCombine > > On Mon, Sep 19, 2011 at 2:12 PM, Guo, Xiaoyi wrote: >> Ping? > > Oh, hmm... I somehow thought I already had reviewed this. > > + ? ?{ > + ? ? ?Value *tmpOp0 = Op0; > + ? ? ?Value *tmpOp1 = Op1; > + ? ? ?if (Op0->hasOneUse() && > + ? ? ? ? ?match(Op0, m_Xor(m_Value(A), m_Value(B)))) { > + ? ? ? ?if (A == Op1 || B == Op1 ) { > + ? ? ? ? ?tmpOp1 = Op0; > + ? ? ? ? ?tmpOp0 = Op1; > + ? ? ? ? ?// Simplify below > + ? ? ? ?} > > It looks like a check for isa(Op1) check is necessary to handle some cases? > > Otherwise, looks fine. > > -Eli > >> -----Original Message----- >> From: Guo, Xiaoyi >> Sent: Thursday, September 15, 2011 6:34 PM >> To: 'Eli Friedman' >> Cc: llvm-commits at cs.uiuc.edu >> Subject: RE: [llvm-commits] bug fix for infinite loop in InstCombine >> >> Thanks for reviewing it. Here's another try. See attached new diff. >> >> Xiaoyi >> >> -----Original Message----- >> From: Eli Friedman [mailto:eli.friedman at gmail.com] >> Sent: Thursday, September 15, 2011 5:55 PM >> To: Guo, Xiaoyi >> Cc: llvm-commits at cs.uiuc.edu >> Subject: Re: [llvm-commits] bug fix for infinite loop in InstCombine >> >> On Thu, Sep 15, 2011 at 4:45 PM, Guo, Xiaoyi wrote: >>> Please review the attached fix for a bug in InstCombiner. The patch also includes a new test case which will cause the current InstCombiner to go into an infinite loop. >>> >>> Please help to commit if acceptable. >>> >>> The problem is with the following code in InstCombiner::visitAnd() in InstCombineAndOrXor.cpp: >>> >>> Instruction *InstCombiner::visitAnd(BinaryOperator &I) { >>> ?bool Changed = SimplifyAssociativeOrCommutative(I); >>> ?... >>> ? ?if (Op0->hasOneUse() && >>> ? ? ? ?match(Op0, m_Xor(m_Value(A), m_Value(B)))) { >>> ? ? ?if (A == Op1) { ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?// (A^B)&A -> >>> A&(A^B) >>> ? ? ? ?I.swapOperands(); ? ? // Simplify below >>> ? ? ? ?std::swap(Op0, Op1); ? ? ? ? ? ? ? ? ? ? ? ? ? ?<========== >>> ? ? ?} else if (B == Op1) { ? ? ? ? ? ? ? ? ? ? ? ? // (A^B)&B -> >>> B&(B^A) >>> ? ? ? ?cast(Op0)->swapOperands(); >>> ? ? ? ?I.swapOperands(); ? ? // Simplify below >>> ? ? ? ?std::swap(Op0, Op1); ? ? ? ? ? ? ? ? ? ? ? ? ? ?<========== >>> ? ? ?} >>> ? ?} >>> >>> ? ?if (Op1->hasOneUse() && >>> ? ? ? ?match(Op1, m_Xor(m_Value(A), m_Value(B)))) { >>> ? ? ?if (B == Op0) { ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?// B&(A^B) -> >>> B&(B^A) >>> ? ? ? ?cast(Op1)->swapOperands(); >>> ? ? ? ?std::swap(A, B); >>> ? ? ?} >>> ? ? ?// Notice that the patten (A&(~B)) is actually (A&(-1^B)), so >>> if >>> ? ? ?// A is originally -1 (or a vector of -1 and undefs), then we >>> enter >>> ? ? ?// an endless loop. By checking that A is non-constant we >>> ensure that >>> ? ? ?// we will never get to the loop. >>> ? ? ?if (A == Op0 && !isa(A)) // A&(A^B) -> A & ~B >>> ? ? ? ?return BinaryOperator::CreateAnd(A, Builder->CreateNot(B, >>> "tmp")); >>> ? ?} >>> >>> >>> With the given test case, op0 is a const and op1 is xor, so the two operands are be swapped in SimplifyAssociativeOrCommutative(). Then I's operands are swapped back at one of the statements marked "<===========" above. Then because A is a constant, a new instruction is not created. So we end up with Changed flag as true but the instruction is not changed and we go into an infinite loop in InstCombiner::DoOneIteration(). >>> >>> My fix is to remove the swapOperands() calls, because I don't think they are necessary. >> >> The general idea seems fine. ?Your fix disables the transform in some cases where both Op0 and Op1 are Xor operators, though. >> >> -Eli >> >> >> > > > _______________________________________________ llvm-commits mailing list llvm-commits at cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From aaron at aaronballman.com Mon Sep 19 16:53:28 2011 From: aaron at aaronballman.com (Aaron Ballman) Date: Mon, 19 Sep 2011 16:53:28 -0500 Subject: [llvm-commits] [PATCH] Improved threading support on Windows In-Reply-To: References: Message-ID: On Mon, Sep 19, 2011 at 2:51 AM, NAKAMURA Takumi wrote: > Aaron, threading stuff has been applied in r140011 with a little > tweak, thank you. > _beginthreadex() would be preferred with msvcrt, IMHO. Thank you for the review. I learned something new about Win32 today (which is no small feat) -- I didn't know that _beginthreadex was the way to create threads which may interact with the CRT, and that CreateThread would cause (small) leaks. So thank you for that! > I apologize to you so much to wait too long, though, I don't think > simpler patch could be always applied too easily. I needed my time to > check and investigate patches. > > Please be patient to me. LLVM is still a hobby to me. I am not > full-time nor dedicated committer. > (Yeah, today afternoon, I am free from my family) I am glad the review process is taken seriously because it does find better ways to do things. So you have no need to apologize to me for not having the time to attend to your hobby! Open source work shouldn't be a chore. ;-) But this may point out a minor problem with the system in that it takes almost a month for Win32 reviews. Takumi does a wonderful job as a reviewer (as does Anton), but we may want to explore ways to ensure a faster turnaround time for Win32 patches. One that doesn't put undue burden on anyone, obviously. Just a thought. :-) Thanks again for the review, Takumi! ~Aaron From greened at obbligato.org Mon Sep 19 16:59:38 2011 From: greened at obbligato.org (David A. Greene) Date: Mon, 19 Sep 2011 16:59:38 -0500 Subject: [llvm-commits] [llvm] r140043 - /llvm/trunk/lib/Support/APInt.cpp In-Reply-To: <20110919200855.23D7B2A6C12C@llvm.org> (Benjamin Kramer's message of "Mon, 19 Sep 2011 20:08:55 -0000") References: <20110919200855.23D7B2A6C12C@llvm.org> Message-ID: Benjamin Kramer writes: > Author: d0k > Date: Mon Sep 19 15:08:54 2011 > New Revision: 140043 > > URL: http://llvm.org/viewvc/llvm-project?rev=140043&view=rev > Log: > Silence -Wsign-compare warnings from GCC. Thank you! -Dave From eli.friedman at gmail.com Mon Sep 19 16:58:15 2011 From: eli.friedman at gmail.com (Eli Friedman) Date: Mon, 19 Sep 2011 21:58:15 -0000 Subject: [llvm-commits] [llvm] r140072 - in /llvm/trunk: lib/Transforms/InstCombine/InstCombineAndOrXor.cpp test/Transforms/InstCombine/and2.ll Message-ID: <20110919215815.634F32A6C12C@llvm.org> Author: efriedma Date: Mon Sep 19 16:58:15 2011 New Revision: 140072 URL: http://llvm.org/viewvc/llvm-project?rev=140072&view=rev Log: Fix an infinite loop where a transform in InstCombiner::visitAnd claims a construct is changed when it is not. (See included testcase.) Patch by Xiaoyi Guo. Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp llvm/trunk/test/Transforms/InstCombine/and2.ll Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp?rev=140072&r1=140071&r2=140072&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp Mon Sep 19 16:58:15 2011 @@ -1174,30 +1174,31 @@ ((A == C && B == D) || (A == D && B == C))) return BinaryOperator::CreateXor(A, B); - if (Op0->hasOneUse() && - match(Op0, m_Xor(m_Value(A), m_Value(B)))) { - if (A == Op1) { // (A^B)&A -> A&(A^B) - I.swapOperands(); // Simplify below - std::swap(Op0, Op1); - } else if (B == Op1) { // (A^B)&B -> B&(B^A) - cast(Op0)->swapOperands(); - I.swapOperands(); // Simplify below - std::swap(Op0, Op1); + // A&(A^B) => A & ~B + { + Value *tmpOp0 = Op0; + Value *tmpOp1 = Op1; + if (Op0->hasOneUse() && + match(Op0, m_Xor(m_Value(A), m_Value(B)))) { + if (A == Op1 || B == Op1 ) { + tmpOp1 = Op0; + tmpOp0 = Op1; + // Simplify below + } } - } - if (Op1->hasOneUse() && - match(Op1, m_Xor(m_Value(A), m_Value(B)))) { - if (B == Op0) { // B&(A^B) -> B&(B^A) - cast(Op1)->swapOperands(); - std::swap(A, B); + if (tmpOp1->hasOneUse() && + match(tmpOp1, m_Xor(m_Value(A), m_Value(B)))) { + if (B == tmpOp0) { + std::swap(A, B); + } + // Notice that the patten (A&(~B)) is actually (A&(-1^B)), so if + // A is originally -1 (or a vector of -1 and undefs), then we enter + // an endless loop. By checking that A is non-constant we ensure that + // we will never get to the loop. + if (A == tmpOp0 && !isa(A)) // A&(A^B) -> A & ~B + return BinaryOperator::CreateAnd(A, Builder->CreateNot(B, "tmp")); } - // Notice that the patten (A&(~B)) is actually (A&(-1^B)), so if - // A is originally -1 (or a vector of -1 and undefs), then we enter - // an endless loop. By checking that A is non-constant we ensure that - // we will never get to the loop. - if (A == Op0 && !isa(A)) // A&(A^B) -> A & ~B - return BinaryOperator::CreateAnd(A, Builder->CreateNot(B, "tmp")); } // (A&((~A)|B)) -> A&B Modified: llvm/trunk/test/Transforms/InstCombine/and2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/and2.ll?rev=140072&r1=140071&r2=140072&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/and2.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/and2.ll Mon Sep 19 16:58:15 2011 @@ -35,3 +35,10 @@ ; CHECK: @test4 ; CHECK-NEXT: ret i1 false } + +; Make sure we don't go into an infinite loop with this test +define <4 x i32> @test5(<4 x i32> %A) { + %1 = xor <4 x i32> %A, + %2 = and <4 x i32> , %1 + ret <4 x i32> %2 +} From eli.friedman at gmail.com Mon Sep 19 16:59:59 2011 From: eli.friedman at gmail.com (Eli Friedman) Date: Mon, 19 Sep 2011 14:59:59 -0700 Subject: [llvm-commits] bug fix for infinite loop in InstCombine In-Reply-To: <27F465BDABE6954AABB2A4E3599BDAC702AC7815B6@sausexmbp02.amd.com> References: <27F465BDABE6954AABB2A4E3599BDAC702A4DFD30D@sausexmbp02.amd.com> <27F465BDABE6954AABB2A4E3599BDAC702AC781551@sausexmbp02.amd.com> <27F465BDABE6954AABB2A4E3599BDAC702AC78157C@sausexmbp02.amd.com> <27F465BDABE6954AABB2A4E3599BDAC702AC7815B6@sausexmbp02.amd.com> Message-ID: On Mon, Sep 19, 2011 at 2:49 PM, Guo, Xiaoyi wrote: >> Would you like me to commit this? > > I would appreciate that. r140072. -Eli > Thanks, > Xiaoyi > > -----Original Message----- > From: llvm-commits-bounces at cs.uiuc.edu [mailto:llvm-commits-bounces at cs.uiuc.edu] On Behalf Of Eli Friedman > Sent: Monday, September 19, 2011 2:37 PM > To: Guo, Xiaoyi > Cc: llvm-commits at cs.uiuc.edu > Subject: Re: [llvm-commits] bug fix for infinite loop in InstCombine > > On Mon, Sep 19, 2011 at 2:27 PM, Guo, Xiaoyi wrote: >> Thanks for reviewing. >> >> The code you mentioned will eventually fall through to the code below and do the isa check there: >> >> + ? ? ? ?if (A == tmpOp0 && !isa(A)) // A&(A^B) -> A & ~B >> + ? ? ? ? ?return BinaryOperator::CreateAnd(A, Builder->CreateNot(B, >> + "tmp")); > > Err, right, nevermind... I was thinking of a case which doesn't actually exist. > > Would you like me to commit this? > > -Eli > >> Xiaoyi >> >> -----Original Message----- >> From: Eli Friedman [mailto:eli.friedman at gmail.com] >> Sent: Monday, September 19, 2011 2:21 PM >> To: Guo, Xiaoyi >> Cc: llvm-commits at cs.uiuc.edu >> Subject: Re: [llvm-commits] bug fix for infinite loop in InstCombine >> >> On Mon, Sep 19, 2011 at 2:12 PM, Guo, Xiaoyi wrote: >>> Ping? >> >> Oh, hmm... I somehow thought I already had reviewed this. >> >> + ? ?{ >> + ? ? ?Value *tmpOp0 = Op0; >> + ? ? ?Value *tmpOp1 = Op1; >> + ? ? ?if (Op0->hasOneUse() && >> + ? ? ? ? ?match(Op0, m_Xor(m_Value(A), m_Value(B)))) { >> + ? ? ? ?if (A == Op1 || B == Op1 ) { >> + ? ? ? ? ?tmpOp1 = Op0; >> + ? ? ? ? ?tmpOp0 = Op1; >> + ? ? ? ? ?// Simplify below >> + ? ? ? ?} >> >> It looks like a check for isa(Op1) check is necessary to handle some cases? >> >> Otherwise, looks fine. >> >> -Eli >> >>> -----Original Message----- >>> From: Guo, Xiaoyi >>> Sent: Thursday, September 15, 2011 6:34 PM >>> To: 'Eli Friedman' >>> Cc: llvm-commits at cs.uiuc.edu >>> Subject: RE: [llvm-commits] bug fix for infinite loop in InstCombine >>> >>> Thanks for reviewing it. Here's another try. See attached new diff. >>> >>> Xiaoyi >>> >>> -----Original Message----- >>> From: Eli Friedman [mailto:eli.friedman at gmail.com] >>> Sent: Thursday, September 15, 2011 5:55 PM >>> To: Guo, Xiaoyi >>> Cc: llvm-commits at cs.uiuc.edu >>> Subject: Re: [llvm-commits] bug fix for infinite loop in InstCombine >>> >>> On Thu, Sep 15, 2011 at 4:45 PM, Guo, Xiaoyi wrote: >>>> Please review the attached fix for a bug in InstCombiner. The patch also includes a new test case which will cause the current InstCombiner to go into an infinite loop. >>>> >>>> Please help to commit if acceptable. >>>> >>>> The problem is with the following code in InstCombiner::visitAnd() in InstCombineAndOrXor.cpp: >>>> >>>> Instruction *InstCombiner::visitAnd(BinaryOperator &I) { >>>> ?bool Changed = SimplifyAssociativeOrCommutative(I); >>>> ?... >>>> ? ?if (Op0->hasOneUse() && >>>> ? ? ? ?match(Op0, m_Xor(m_Value(A), m_Value(B)))) { >>>> ? ? ?if (A == Op1) { ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?// (A^B)&A -> >>>> A&(A^B) >>>> ? ? ? ?I.swapOperands(); ? ? // Simplify below >>>> ? ? ? ?std::swap(Op0, Op1); ? ? ? ? ? ? ? ? ? ? ? ? ? ?<========== >>>> ? ? ?} else if (B == Op1) { ? ? ? ? ? ? ? ? ? ? ? ? // (A^B)&B -> >>>> B&(B^A) >>>> ? ? ? ?cast(Op0)->swapOperands(); >>>> ? ? ? ?I.swapOperands(); ? ? // Simplify below >>>> ? ? ? ?std::swap(Op0, Op1); ? ? ? ? ? ? ? ? ? ? ? ? ? ?<========== >>>> ? ? ?} >>>> ? ?} >>>> >>>> ? ?if (Op1->hasOneUse() && >>>> ? ? ? ?match(Op1, m_Xor(m_Value(A), m_Value(B)))) { >>>> ? ? ?if (B == Op0) { ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?// B&(A^B) -> >>>> B&(B^A) >>>> ? ? ? ?cast(Op1)->swapOperands(); >>>> ? ? ? ?std::swap(A, B); >>>> ? ? ?} >>>> ? ? ?// Notice that the patten (A&(~B)) is actually (A&(-1^B)), so >>>> if >>>> ? ? ?// A is originally -1 (or a vector of -1 and undefs), then we >>>> enter >>>> ? ? ?// an endless loop. By checking that A is non-constant we >>>> ensure that >>>> ? ? ?// we will never get to the loop. >>>> ? ? ?if (A == Op0 && !isa(A)) // A&(A^B) -> A & ~B >>>> ? ? ? ?return BinaryOperator::CreateAnd(A, Builder->CreateNot(B, >>>> "tmp")); >>>> ? ?} >>>> >>>> >>>> With the given test case, op0 is a const and op1 is xor, so the two operands are be swapped in SimplifyAssociativeOrCommutative(). Then I's operands are swapped back at one of the statements marked "<===========" above. Then because A is a constant, a new instruction is not created. So we end up with Changed flag as true but the instruction is not changed and we go into an infinite loop in InstCombiner::DoOneIteration(). >>>> >>>> My fix is to remove the swapOperands() calls, because I don't think they are necessary. >>> >>> The general idea seems fine. ?Your fix disables the transform in some cases where both Op0 and Op1 are Xor operators, though. >>> >>> -Eli >>> >>> >>> >> >> >> > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > > From aaron at aaronballman.com Mon Sep 19 17:01:26 2011 From: aaron at aaronballman.com (Aaron Ballman) Date: Mon, 19 Sep 2011 17:01:26 -0500 Subject: [llvm-commits] [PATCH] Support for instruction cache flushing on Windows In-Reply-To: References: Message-ID: On Mon, Sep 19, 2011 at 1:53 AM, NAKAMURA Takumi wrote: > Aaron, I am sorry for long delay. > > 2011/8/26 Aaron Ballman : >> On Windows, there was no implementation for >> llvm::sys::Memory::InvalidateInstructionCache, which I've rectified >> with this patch. ?Tested with Visual Studio 2010 and MinGW, though I >> will admit that it shows no functional differences on my particular >> hardware. ?That doesn't mean it won't be useful on other hardware >> though. > > In fact; > > ?- x86 and x86-64 does not need explicit icache flushing on its > microarchitecture. As I understand it, a jmp is sufficient to flush the cache on x86-64, and I would suppose that the call to llvm::sys::Memory::InvalidateInstructionCache would take care of the problem. My worry is the compiler optimizing away the call to an empty function, thereby missing the jmp it provided. > ?- in llvm::sys::Memory::InvalidateInstructionCache(), > ? ?no operations would be executed on any x86-based hosts. Actually, an operation is executed -- the jmp itself. > FYI, you should not give GetModuleHandle(NULL), but > GetCurrentProcess() to 1st argument of FlushInstructionCache(). As an > implementation, GetModuleHandl(NULL) represents virtual base addr of > the process (eg. 0x00400000) and GetCurrentProcess() does the magic > number (eg. 0xFFFFFFFF). They can be use interchangeably so often, it's difficult to tell when one is appropriate vs the other. Good catch! If you think the patch may make sense (in light of the current conversation), I'll happily fix it up. If you still think it's not needed, then the issue is moot. Thanks! ~Aaron From eli.friedman at gmail.com Mon Sep 19 17:02:33 2011 From: eli.friedman at gmail.com (Eli Friedman) Date: Mon, 19 Sep 2011 22:02:33 -0000 Subject: [llvm-commits] [llvm] r140074 - /llvm/trunk/test/CodeGen/ARM/atomic-load-store.ll Message-ID: <20110919220233.D95222A6C12C@llvm.org> Author: efriedma Date: Mon Sep 19 17:02:33 2011 New Revision: 140074 URL: http://llvm.org/viewvc/llvm-project?rev=140074&view=rev Log: Some additional tests for Thumb atomic load and store (which I somehow forgot to commit earlier). Modified: llvm/trunk/test/CodeGen/ARM/atomic-load-store.ll Modified: llvm/trunk/test/CodeGen/ARM/atomic-load-store.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/atomic-load-store.ll?rev=140074&r1=140073&r2=140074&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/atomic-load-store.ll (original) +++ llvm/trunk/test/CodeGen/ARM/atomic-load-store.ll Mon Sep 19 17:02:33 2011 @@ -35,7 +35,22 @@ ; ARM: test3 ; ARM: ldrb ; ARM: strb +; THUMBTWO: test3 +; THUMBTWO: ldrb +; THUMBTWO: strb +; THUMBONE: test3 +; THUMBONE: ldrb +; THUMBONE: strb %val = load atomic i8* %ptr1 unordered, align 1 store atomic i8 %val, i8* %ptr2 unordered, align 1 ret void } + +define void @test4(i8* %ptr1, i8* %ptr2) { +; THUMBONE: test4 +; THUMBONE: ___sync_val_compare_and_swap_1 +; THUMBONE: ___sync_lock_test_and_set_1 + %val = load atomic i8* %ptr1 seq_cst, align 1 + store atomic i8 %val, i8* %ptr2 seq_cst, align 1 + ret void +} From echristo at apple.com Mon Sep 19 17:08:58 2011 From: echristo at apple.com (Eric Christopher) Date: Mon, 19 Sep 2011 15:08:58 -0700 Subject: [llvm-commits] [PATCH] Improved threading support on Windows In-Reply-To: References: Message-ID: <1701904A-B4BA-4820-BCDE-46E47D835B7A@apple.com> On Sep 19, 2011, at 2:53 PM, Aaron Ballman wrote: > But this may point out a minor problem with the system in that it > takes almost a month for Win32 reviews. Takumi does a wonderful job > as a reviewer (as does Anton), but we may want to explore ways to > ensure a faster turnaround time for Win32 patches. One that doesn't > put undue burden on anyone, obviously. Suggestions welcome? -eric -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110919/087cecca/attachment.html From isanbard at gmail.com Mon Sep 19 17:11:35 2011 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 19 Sep 2011 22:11:35 -0000 Subject: [llvm-commits] [llvm] r140076 - in /llvm/trunk/test/Transforms: Inline/2004-04-15-InlineDeletesCall.ll Inline/2004-10-17-InlineFunctionWithoutReturn.ll Inline/2006-11-09-InlineCGUpdate-2.ll Inline/2006-11-09-InlineCGUpdate.ll SimplifyCFG/invoke_unwind.ll Message-ID: <20110919221135.C2B572A6C12C@llvm.org> Author: void Date: Mon Sep 19 17:11:35 2011 New Revision: 140076 URL: http://llvm.org/viewvc/llvm-project?rev=140076&view=rev Log: Replace more uses of 'unwind' in the tests with calls to landingpad and resume. Note that some of these tests were basically dead. Modified: llvm/trunk/test/Transforms/Inline/2004-04-15-InlineDeletesCall.ll llvm/trunk/test/Transforms/Inline/2004-10-17-InlineFunctionWithoutReturn.ll llvm/trunk/test/Transforms/Inline/2006-11-09-InlineCGUpdate-2.ll llvm/trunk/test/Transforms/Inline/2006-11-09-InlineCGUpdate.ll llvm/trunk/test/Transforms/SimplifyCFG/invoke_unwind.ll Modified: llvm/trunk/test/Transforms/Inline/2004-04-15-InlineDeletesCall.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/Inline/2004-04-15-InlineDeletesCall.ll?rev=140076&r1=140075&r2=140076&view=diff ============================================================================== --- llvm/trunk/test/Transforms/Inline/2004-04-15-InlineDeletesCall.ll (original) +++ llvm/trunk/test/Transforms/Inline/2004-04-15-InlineDeletesCall.ll Mon Sep 19 17:11:35 2011 @@ -5,7 +5,7 @@ ; exists. define internal void @Callee1() { - unwind + unreachable } define void @Callee2() { Modified: llvm/trunk/test/Transforms/Inline/2004-10-17-InlineFunctionWithoutReturn.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/Inline/2004-10-17-InlineFunctionWithoutReturn.ll?rev=140076&r1=140075&r2=140076&view=diff ============================================================================== --- llvm/trunk/test/Transforms/Inline/2004-10-17-InlineFunctionWithoutReturn.ll (original) +++ llvm/trunk/test/Transforms/Inline/2004-10-17-InlineFunctionWithoutReturn.ll Mon Sep 19 17:11:35 2011 @@ -1,7 +1,7 @@ ; RUN: opt < %s -inline -disable-output define i32 @test() { - unwind + unreachable } define i32 @caller() { Modified: llvm/trunk/test/Transforms/Inline/2006-11-09-InlineCGUpdate-2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/Inline/2006-11-09-InlineCGUpdate-2.ll?rev=140076&r1=140075&r2=140076&view=diff ============================================================================== --- llvm/trunk/test/Transforms/Inline/2006-11-09-InlineCGUpdate-2.ll (original) +++ llvm/trunk/test/Transforms/Inline/2006-11-09-InlineCGUpdate-2.ll Mon Sep 19 17:11:35 2011 @@ -114,7 +114,7 @@ define fastcc void @_ZSt19__throw_ios_failurePKc() { entry: call fastcc void @_ZNSsC1EPKcRKSaIcE( ) - unwind + unreachable } define void @_GLOBAL__D__ZSt23lexicographical_compareIPKaS1_EbT_S2_T0_S3_() { @@ -133,10 +133,12 @@ to label %try_exit.0 unwind label %try_catch.0 try_catch.0: ; preds = %entry - unreachable + %exn = landingpad {i8*, i32} personality i32 (...)* @__gxx_personality_v0 + catch i8* null + resume { i8*, i32 } %exn try_exit.0: ; preds = %entry - unwind + unreachable } define fastcc void @_ZNSt11logic_errorC1ERKSs() { @@ -153,7 +155,7 @@ define fastcc void @_ZSt20__throw_length_errorPKc() { entry: call fastcc void @_ZNSt12length_errorC1ERKSs( ) - unwind + unreachable } define fastcc void @_ZNSt12length_errorC1ERKSs() { @@ -162,7 +164,9 @@ to label %_ZNSt11logic_errorC2ERKSs.exit unwind label %invoke_catch.i invoke_catch.i: ; preds = %entry - unwind + %exn = landingpad {i8*, i32} personality i32 (...)* @__gxx_personality_v0 + catch i8* null + resume { i8*, i32 } %exn _ZNSt11logic_errorC2ERKSs.exit: ; preds = %entry ret void @@ -199,8 +203,10 @@ to label %invoke_cont.1 unwind label %invoke_catch.1 invoke_catch.1: ; preds = %entry + %exn = landingpad {i8*, i32} personality i32 (...)* @__gxx_personality_v0 + catch i8* null call fastcc void @_ZNSaIcED1Ev( ) - unwind + resume { i8*, i32 } %exn invoke_cont.1: ; preds = %entry call fastcc void @_ZNSaIcEC2ERKS_( ) @@ -243,3 +249,5 @@ entry: unreachable } + +declare i32 @__gxx_personality_v0(...) Modified: llvm/trunk/test/Transforms/Inline/2006-11-09-InlineCGUpdate.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/Inline/2006-11-09-InlineCGUpdate.ll?rev=140076&r1=140075&r2=140076&view=diff ============================================================================== --- llvm/trunk/test/Transforms/Inline/2006-11-09-InlineCGUpdate.ll (original) +++ llvm/trunk/test/Transforms/Inline/2006-11-09-InlineCGUpdate.ll Mon Sep 19 17:11:35 2011 @@ -155,7 +155,7 @@ define fastcc void @_ZSt20__throw_length_errorPKc() { entry: call fastcc void @_ZNSt12length_errorC1ERKSs( ) - unwind + ret void } define fastcc void @_ZNSs16_S_construct_auxIPKcEEPcT_S3_RKSaIcE12__false_type() { @@ -178,8 +178,10 @@ to label %invoke_cont.1 unwind label %invoke_catch.1 invoke_catch.1: ; preds = %entry + %exn = landingpad {i8*, i32} personality i32 (...)* @__gxx_personality_v0 + catch i8* null call fastcc void @_ZNSaIcED1Ev( ) - unwind + resume { i8*, i32 } %exn invoke_cont.1: ; preds = %entry call fastcc void @_ZNSaIcEC2ERKS_( ) @@ -306,7 +308,9 @@ to label %_ZNSt11logic_errorC2ERKSs.exit unwind label %invoke_catch.i invoke_catch.i: ; preds = %entry - unwind + %exn = landingpad {i8*, i32} personality i32 (...)* @__gxx_personality_v0 + catch i8* null + resume { i8*, i32 } %exn _ZNSt11logic_errorC2ERKSs.exit: ; preds = %entry ret void @@ -336,3 +340,5 @@ entry: ret void } + +declare i32 @__gxx_personality_v0(...) Modified: llvm/trunk/test/Transforms/SimplifyCFG/invoke_unwind.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/SimplifyCFG/invoke_unwind.ll?rev=140076&r1=140075&r2=140076&view=diff ============================================================================== --- llvm/trunk/test/Transforms/SimplifyCFG/invoke_unwind.ll (original) +++ llvm/trunk/test/Transforms/SimplifyCFG/invoke_unwind.ll Mon Sep 19 17:11:35 2011 @@ -12,21 +12,9 @@ to label %1 unwind label %Rethrow ret i32 0 Rethrow: - unwind + %exn = landingpad {i8*, i32} personality i32 (...)* @__gxx_personality_v0 + catch i8* null + resume { i8*, i32 } %exn } - -; Verify that simplifycfg isn't duplicating 'unwind' instructions. Doing this -; is bad because it discourages commoning. -define i32 @test2(i1 %c) { -; CHECK: @test2 -; CHECK: T: -; CHECK-NEXT: call void @bar() -; CHECK-NEXT: br label %F - br i1 %c, label %T, label %F -T: - call void @bar() - br label %F -F: - unwind -} +declare i32 @__gxx_personality_v0(...) From isanbard at gmail.com Mon Sep 19 17:16:16 2011 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 19 Sep 2011 22:16:16 -0000 Subject: [llvm-commits] [llvm] r140077 - /llvm/trunk/test/Transforms/TailCallElim/reorder_load.ll Message-ID: <20110919221616.1E3ED2A6C12C@llvm.org> Author: void Date: Mon Sep 19 17:16:15 2011 New Revision: 140077 URL: http://llvm.org/viewvc/llvm-project?rev=140077&view=rev Log: Replace uses of unwind with unreachable for the same effect. Modified: llvm/trunk/test/Transforms/TailCallElim/reorder_load.ll Modified: llvm/trunk/test/Transforms/TailCallElim/reorder_load.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/TailCallElim/reorder_load.ll?rev=140077&r1=140076&r2=140077&view=diff ============================================================================== --- llvm/trunk/test/Transforms/TailCallElim/reorder_load.ll (original) +++ llvm/trunk/test/Transforms/TailCallElim/reorder_load.ll Mon Sep 19 17:16:15 2011 @@ -43,7 +43,7 @@ br i1 %nullcheck, label %unwind, label %recurse unwind: ; preds = %else - unwind + unreachable recurse: ; preds = %else %tmp7 = add i32 %start_arg, 1 ; [#uses=1] @@ -89,7 +89,7 @@ br i1 %nullcheck, label %unwind, label %recurse unwind: ; preds = %else - unwind + unreachable recurse: ; preds = %else %tmp7 = add i32 %start_arg, 1 ; [#uses=1] From grosbach at apple.com Mon Sep 19 17:21:13 2011 From: grosbach at apple.com (Jim Grosbach) Date: Mon, 19 Sep 2011 22:21:13 -0000 Subject: [llvm-commits] [llvm] r140078 - in /llvm/trunk: lib/Target/ARM/ARMInstrThumb2.td lib/Target/ARM/AsmParser/ARMAsmParser.cpp lib/Target/ARM/Disassembler/ARMDisassembler.cpp lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp lib/Target/ARM/InstPrinter/ARMInstPrinter.h test/MC/ARM/basic-thumb2-instructions.s utils/TableGen/EDEmitter.cpp Message-ID: <20110919222113.547772A6C12C@llvm.org> Author: grosbach Date: Mon Sep 19 17:21:13 2011 New Revision: 140078 URL: http://llvm.org/viewvc/llvm-project?rev=140078&view=rev Log: Thumb2 assembly parsing and encoding for TBB/TBH. Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.h llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s llvm/trunk/utils/TableGen/EDEmitter.cpp Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=140078&r1=140077&r2=140078&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Mon Sep 19 17:21:13 2011 @@ -203,6 +203,20 @@ let MIOperandInfo = (ops GPR:$base, rGPR:$offsreg, i32imm:$offsimm); } +// Addresses for the TBB/TBH instructions. +def addrmode_tbb_asmoperand : AsmOperandClass { let Name = "MemTBB"; } +def addrmode_tbb : Operand { + let PrintMethod = "printAddrModeTBB"; + let ParserMatchClass = addrmode_tbb_asmoperand; + let MIOperandInfo = (ops GPR:$Rn, rGPR:$Rm); +} +def addrmode_tbh_asmoperand : AsmOperandClass { let Name = "MemTBH"; } +def addrmode_tbh : Operand { + let PrintMethod = "printAddrModeTBH"; + let ParserMatchClass = addrmode_tbh_asmoperand; + let MIOperandInfo = (ops GPR:$Rn, rGPR:$Rm); +} + //===----------------------------------------------------------------------===// // Multiclass helpers... // @@ -3135,8 +3149,8 @@ def t2TBH_JT : t2PseudoInst<(outs), (ins GPR:$index, i32imm:$jt, i32imm:$id), 0, IIC_Br, []>; -def t2TBB : T2I<(outs), (ins GPR:$Rn, GPR:$Rm), IIC_Br, - "tbb", "\t[$Rn, $Rm]", []> { +def t2TBB : T2I<(outs), (ins addrmode_tbb:$addr), IIC_Br, + "tbb", "\t$addr", []> { bits<4> Rn; bits<4> Rm; let Inst{31-20} = 0b111010001101; @@ -3144,10 +3158,12 @@ let Inst{15-5} = 0b11110000000; let Inst{4} = 0; // B form let Inst{3-0} = Rm; + + let DecoderMethod = "DecodeThumbTableBranch"; } -def t2TBH : T2I<(outs), (ins GPR:$Rn, GPR:$Rm), IIC_Br, - "tbh", "\t[$Rn, $Rm, lsl #1]", []> { +def t2TBH : T2I<(outs), (ins addrmode_tbh:$addr), IIC_Br, + "tbh", "\t$addr", []> { bits<4> Rn; bits<4> Rm; let Inst{31-20} = 0b111010001101; @@ -3155,6 +3171,8 @@ let Inst{15-5} = 0b11110000000; let Inst{4} = 1; // H form let Inst{3-0} = Rm; + + let DecoderMethod = "DecodeThumbTableBranch"; } } // isNotDuplicable, isIndirectBranch Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp?rev=140078&r1=140077&r2=140078&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp (original) +++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Mon Sep 19 17:21:13 2011 @@ -687,6 +687,18 @@ return (Val >= -1020 && Val <= 1020 && ((Val & 3) == 0)) || Val == INT32_MIN; } + bool isMemTBB() const { + if (Kind != Memory || !Mem.OffsetRegNum || Mem.isNegative || + Mem.ShiftType != ARM_AM::no_shift) + return false; + return true; + } + bool isMemTBH() const { + if (Kind != Memory || !Mem.OffsetRegNum || Mem.isNegative || + Mem.ShiftType != ARM_AM::lsl || Mem.ShiftImm != 1) + return false; + return true; + } bool isMemRegOffset() const { if (Kind != Memory || !Mem.OffsetRegNum) return false; @@ -1205,6 +1217,18 @@ Inst.addOperand(MCOperand::CreateImm(Val)); } + void addMemTBBOperands(MCInst &Inst, unsigned N) const { + assert(N == 2 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::CreateReg(Mem.BaseRegNum)); + Inst.addOperand(MCOperand::CreateReg(Mem.OffsetRegNum)); + } + + void addMemTBHOperands(MCInst &Inst, unsigned N) const { + assert(N == 2 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::CreateReg(Mem.BaseRegNum)); + Inst.addOperand(MCOperand::CreateReg(Mem.OffsetRegNum)); + } + void addMemRegOffsetOperands(MCInst &Inst, unsigned N) const { assert(N == 3 && "Invalid number of operands!"); unsigned Val = ARM_AM::getAM2Opc(Mem.isNegative ? ARM_AM::sub : ARM_AM::add, Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp?rev=140078&r1=140077&r2=140078&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp (original) +++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp Mon Sep 19 17:21:13 2011 @@ -287,6 +287,8 @@ uint64_t Address, const void *Decoder); static DecodeStatus DecodeT2AddrModeImm12(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder); +static DecodeStatus DecodeThumbTableBranch(llvm::MCInst &Inst, unsigned Val, + uint64_t Address, const void *Decoder); static DecodeStatus DecodeThumb2BCCInstruction(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeT2SOImm(llvm::MCInst &Inst, unsigned Val, @@ -2899,6 +2901,22 @@ } static DecodeStatus +DecodeThumbTableBranch(llvm::MCInst &Inst, unsigned Insn, + uint64_t Address, const void *Decoder) { + DecodeStatus S = MCDisassembler::Success; + + unsigned Rn = fieldFromInstruction32(Insn, 16, 4); + unsigned Rm = fieldFromInstruction32(Insn, 0, 4); + + if (Rn == ARM::SP) S = MCDisassembler::SoftFail; + if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) + return MCDisassembler::Fail; + if (!Check(S, DecoderGPRRegisterClass(Inst, Rm, Address, Decoder))) + return MCDisassembler::Fail; + return S; +} + +static DecodeStatus DecodeThumb2BCCInstruction(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler::Success; Modified: llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp?rev=140078&r1=140077&r2=140078&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp (original) +++ llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp Mon Sep 19 17:21:13 2011 @@ -307,6 +307,22 @@ << " #" << ShImm; } +void ARMInstPrinter::printAddrModeTBB(const MCInst *MI, unsigned Op, + raw_ostream &O) { + const MCOperand &MO1 = MI->getOperand(Op); + const MCOperand &MO2 = MI->getOperand(Op+1); + O << "[" << getRegisterName(MO1.getReg()) << ", " + << getRegisterName(MO2.getReg()) << "]"; +} + +void ARMInstPrinter::printAddrModeTBH(const MCInst *MI, unsigned Op, + raw_ostream &O) { + const MCOperand &MO1 = MI->getOperand(Op); + const MCOperand &MO2 = MI->getOperand(Op+1); + O << "[" << getRegisterName(MO1.getReg()) << ", " + << getRegisterName(MO2.getReg()) << ", lsl #1]"; +} + void ARMInstPrinter::printAddrMode2Operand(const MCInst *MI, unsigned Op, raw_ostream &O) { const MCOperand &MO1 = MI->getOperand(Op); Modified: llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.h?rev=140078&r1=140077&r2=140078&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.h (original) +++ llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.h Mon Sep 19 17:21:13 2011 @@ -41,6 +41,8 @@ void printSORegRegOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); void printSORegImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); + void printAddrModeTBB(const MCInst *MI, unsigned OpNum, raw_ostream &O); + void printAddrModeTBH(const MCInst *MI, unsigned OpNum, raw_ostream &O); void printAddrMode2Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O); void printAM2PostIndexOp(const MCInst *MI, unsigned OpNum, raw_ostream &O); void printAM2PreOrOffsetIndexOp(const MCInst *MI, unsigned OpNum, Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s?rev=140078&r1=140077&r2=140078&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s (original) +++ llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Mon Sep 19 17:21:13 2011 @@ -2615,6 +2615,24 @@ @------------------------------------------------------------------------------ +@ TBB/TBH + at ------------------------------------------------------------------------------ + tbb [r3, r8] + tbh [r3, r8, lsl #1] + it eq + tbbeq [r3, r8] + it cs + tbhcs [r3, r8, lsl #1] + +@ CHECK: tbb [r3, r8] @ encoding: [0xd3,0xe8,0x08,0xf0] +@ CHECK: tbh [r3, r8, lsl #1] @ encoding: [0xd3,0xe8,0x18,0xf0] +@ CHECK: it eq @ encoding: [0x08,0xbf] +@ CHECK: tbbeq [r3, r8] @ encoding: [0xd3,0xe8,0x08,0xf0] +@ CHECK: it hs @ encoding: [0x28,0xbf] +@ CHECK: tbhhs [r3, r8, lsl #1] @ encoding: [0xd3,0xe8,0x18,0xf0] + + + at ------------------------------------------------------------------------------ @ TEQ @------------------------------------------------------------------------------ teq r5, #0xf000 Modified: llvm/trunk/utils/TableGen/EDEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/EDEmitter.cpp?rev=140078&r1=140077&r2=140078&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/EDEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/EDEmitter.cpp Mon Sep 19 17:21:13 2011 @@ -686,6 +686,8 @@ MISC("t_addrmode_rr", "kOperandTypeThumbAddrModeRR"); // R, R MISC("t_addrmode_sp", "kOperandTypeThumbAddrModeSP"); // R, I MISC("t_addrmode_pc", "kOperandTypeThumbAddrModePC"); // R, I + MISC("addrmode_tbb", "kOperandTypeThumbAddrModeRR"); // R, R + MISC("addrmode_tbh", "kOperandTypeThumbAddrModeRR"); // R, R return 1; } From aaron at aaronballman.com Mon Sep 19 17:30:53 2011 From: aaron at aaronballman.com (Aaron Ballman) Date: Mon, 19 Sep 2011 17:30:53 -0500 Subject: [llvm-commits] [PATCH] Removed FIXME from Memory.inc on Windows In-Reply-To: References: Message-ID: On Mon, Sep 19, 2011 at 4:31 AM, Anton Korobeynikov wrote: > Hi Aaron, > >> This patch addresses a FIXME in the Memory class on Windows. ?It now >> supports allocating blocks of memory around the "NearBlock" parameter. >> ?Additionally, it adds support for changing the protection for blocks >> of virtual memory. > Stuff looks generally ok for me, but I'd ask Takumi as well. > Also, please split the patch into 2 parts, it definitely contains 2 > unrelated blocks > > Thanks for working on this! My pleasure! I've split the changes into two separate diffs, and attached them both. VProt.diff is the patch for supporting setting memory to be writable or executable. NearBlock.diff is the patch which removes the FIXME for NearBlock support. Thanks! ~Aaron -------------- next part -------------- A non-text attachment was scrubbed... Name: VProt.diff Type: application/octet-stream Size: 1960 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110919/e6ee0cdd/attachment.obj -------------- next part -------------- A non-text attachment was scrubbed... Name: NearBlock.diff Type: application/octet-stream Size: 949 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110919/e6ee0cdd/attachment-0001.obj From Xiaoyi.Guo at amd.com Mon Sep 19 17:33:50 2011 From: Xiaoyi.Guo at amd.com (Guo, Xiaoyi) Date: Mon, 19 Sep 2011 17:33:50 -0500 Subject: [llvm-commits] bug fix for infinite loop in InstCombine In-Reply-To: References: <27F465BDABE6954AABB2A4E3599BDAC702A4DFD30D@sausexmbp02.amd.com> <27F465BDABE6954AABB2A4E3599BDAC702AC781551@sausexmbp02.amd.com> <27F465BDABE6954AABB2A4E3599BDAC702AC78157C@sausexmbp02.amd.com> <27F465BDABE6954AABB2A4E3599BDAC702AC7815B6@sausexmbp02.amd.com> Message-ID: <27F465BDABE6954AABB2A4E3599BDAC702AC781621@sausexmbp02.amd.com> Thank you! -----Original Message----- From: Eli Friedman [mailto:eli.friedman at gmail.com] Sent: Monday, September 19, 2011 3:00 PM To: Guo, Xiaoyi Cc: llvm-commits at cs.uiuc.edu Subject: Re: [llvm-commits] bug fix for infinite loop in InstCombine On Mon, Sep 19, 2011 at 2:49 PM, Guo, Xiaoyi wrote: >> Would you like me to commit this? > > I would appreciate that. r140072. -Eli > Thanks, > Xiaoyi > > -----Original Message----- > From: llvm-commits-bounces at cs.uiuc.edu > [mailto:llvm-commits-bounces at cs.uiuc.edu] On Behalf Of Eli Friedman > Sent: Monday, September 19, 2011 2:37 PM > To: Guo, Xiaoyi > Cc: llvm-commits at cs.uiuc.edu > Subject: Re: [llvm-commits] bug fix for infinite loop in InstCombine > > On Mon, Sep 19, 2011 at 2:27 PM, Guo, Xiaoyi wrote: >> Thanks for reviewing. >> >> The code you mentioned will eventually fall through to the code below and do the isa check there: >> >> + ? ? ? ?if (A == tmpOp0 && !isa(A)) // A&(A^B) -> A & ~B >> + ? ? ? ? ?return BinaryOperator::CreateAnd(A, Builder->CreateNot(B, >> + "tmp")); > > Err, right, nevermind... I was thinking of a case which doesn't actually exist. > > Would you like me to commit this? > > -Eli > >> Xiaoyi >> >> -----Original Message----- >> From: Eli Friedman [mailto:eli.friedman at gmail.com] >> Sent: Monday, September 19, 2011 2:21 PM >> To: Guo, Xiaoyi >> Cc: llvm-commits at cs.uiuc.edu >> Subject: Re: [llvm-commits] bug fix for infinite loop in InstCombine >> >> On Mon, Sep 19, 2011 at 2:12 PM, Guo, Xiaoyi wrote: >>> Ping? >> >> Oh, hmm... I somehow thought I already had reviewed this. >> >> + ? ?{ >> + ? ? ?Value *tmpOp0 = Op0; >> + ? ? ?Value *tmpOp1 = Op1; >> + ? ? ?if (Op0->hasOneUse() && >> + ? ? ? ? ?match(Op0, m_Xor(m_Value(A), m_Value(B)))) { >> + ? ? ? ?if (A == Op1 || B == Op1 ) { >> + ? ? ? ? ?tmpOp1 = Op0; >> + ? ? ? ? ?tmpOp0 = Op1; >> + ? ? ? ? ?// Simplify below >> + ? ? ? ?} >> >> It looks like a check for isa(Op1) check is necessary to handle some cases? >> >> Otherwise, looks fine. >> >> -Eli >> >>> -----Original Message----- >>> From: Guo, Xiaoyi >>> Sent: Thursday, September 15, 2011 6:34 PM >>> To: 'Eli Friedman' >>> Cc: llvm-commits at cs.uiuc.edu >>> Subject: RE: [llvm-commits] bug fix for infinite loop in InstCombine >>> >>> Thanks for reviewing it. Here's another try. See attached new diff. >>> >>> Xiaoyi >>> >>> -----Original Message----- >>> From: Eli Friedman [mailto:eli.friedman at gmail.com] >>> Sent: Thursday, September 15, 2011 5:55 PM >>> To: Guo, Xiaoyi >>> Cc: llvm-commits at cs.uiuc.edu >>> Subject: Re: [llvm-commits] bug fix for infinite loop in InstCombine >>> >>> On Thu, Sep 15, 2011 at 4:45 PM, Guo, Xiaoyi wrote: >>>> Please review the attached fix for a bug in InstCombiner. The patch also includes a new test case which will cause the current InstCombiner to go into an infinite loop. >>>> >>>> Please help to commit if acceptable. >>>> >>>> The problem is with the following code in InstCombiner::visitAnd() in InstCombineAndOrXor.cpp: >>>> >>>> Instruction *InstCombiner::visitAnd(BinaryOperator &I) { >>>> ?bool Changed = SimplifyAssociativeOrCommutative(I); >>>> ?... >>>> ? ?if (Op0->hasOneUse() && >>>> ? ? ? ?match(Op0, m_Xor(m_Value(A), m_Value(B)))) { >>>> ? ? ?if (A == Op1) { ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?// (A^B)&A -> >>>> A&(A^B) >>>> ? ? ? ?I.swapOperands(); ? ? // Simplify below >>>> ? ? ? ?std::swap(Op0, Op1); ? ? ? ? ? ? ? ? ? ? ? ? ? ?<========== >>>> ? ? ?} else if (B == Op1) { ? ? ? ? ? ? ? ? ? ? ? ? // (A^B)&B -> >>>> B&(B^A) >>>> ? ? ? ?cast(Op0)->swapOperands(); >>>> ? ? ? ?I.swapOperands(); ? ? // Simplify below >>>> ? ? ? ?std::swap(Op0, Op1); ? ? ? ? ? ? ? ? ? ? ? ? ? ?<========== >>>> ? ? ?} >>>> ? ?} >>>> >>>> ? ?if (Op1->hasOneUse() && >>>> ? ? ? ?match(Op1, m_Xor(m_Value(A), m_Value(B)))) { >>>> ? ? ?if (B == Op0) { ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?// B&(A^B) -> >>>> B&(B^A) >>>> ? ? ? ?cast(Op1)->swapOperands(); >>>> ? ? ? ?std::swap(A, B); >>>> ? ? ?} >>>> ? ? ?// Notice that the patten (A&(~B)) is actually (A&(-1^B)), so >>>> if >>>> ? ? ?// A is originally -1 (or a vector of -1 and undefs), then we >>>> enter >>>> ? ? ?// an endless loop. By checking that A is non-constant we >>>> ensure that >>>> ? ? ?// we will never get to the loop. >>>> ? ? ?if (A == Op0 && !isa(A)) // A&(A^B) -> A & ~B >>>> ? ? ? ?return BinaryOperator::CreateAnd(A, Builder->CreateNot(B, >>>> "tmp")); >>>> ? ?} >>>> >>>> >>>> With the given test case, op0 is a const and op1 is xor, so the two operands are be swapped in SimplifyAssociativeOrCommutative(). Then I's operands are swapped back at one of the statements marked "<===========" above. Then because A is a constant, a new instruction is not created. So we end up with Changed flag as true but the instruction is not changed and we go into an infinite loop in InstCombiner::DoOneIteration(). >>>> >>>> My fix is to remove the swapOperands() calls, because I don't think they are necessary. >>> >>> The general idea seems fine. ?Your fix disables the transform in some cases where both Op0 and Op1 are Xor operators, though. >>> >>> -Eli >>> >>> >>> >> >> >> > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > > From resistor at mac.com Mon Sep 19 17:34:24 2011 From: resistor at mac.com (Owen Anderson) Date: Mon, 19 Sep 2011 22:34:24 -0000 Subject: [llvm-commits] [llvm] r140079 - /llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp Message-ID: <20110919223424.24D7D2A6C12C@llvm.org> Author: resistor Date: Mon Sep 19 17:34:23 2011 New Revision: 140079 URL: http://llvm.org/viewvc/llvm-project?rev=140079&view=rev Log: Thumb2 TBB and TBH instructions are only allowed at the end of IT blocks, not in the middle. Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp?rev=140079&r1=140078&r2=140079&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp (original) +++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp Mon Sep 19 17:34:23 2011 @@ -454,6 +454,8 @@ break; case ARM::tB: case ARM::t2B: + case ARM::t2TBB: + case ARM::t2TBH: // Some instructions (mostly unconditional branches) can // only appears at the end of, or outside of, an IT. if (ITBlock.size() > 1) From grosbach at apple.com Mon Sep 19 17:46:06 2011 From: grosbach at apple.com (Jim Grosbach) Date: Mon, 19 Sep 2011 22:46:06 -0000 Subject: [llvm-commits] [llvm] r140080 - /llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Message-ID: <20110919224606.9DF672A6C12C@llvm.org> Author: grosbach Date: Mon Sep 19 17:46:06 2011 New Revision: 140080 URL: http://llvm.org/viewvc/llvm-project?rev=140080&view=rev Log: Thumb2 assembly parsing and encoding for TST. Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s?rev=140080&r1=140079&r2=140080&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s (original) +++ llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Mon Sep 19 17:46:06 2011 @@ -2650,3 +2650,23 @@ @ CHECK: teq.w r4, r5, lsr #5 @ encoding: [0x94,0xea,0x55,0x1f] @ CHECK: teq.w r4, r5, asr #5 @ encoding: [0x94,0xea,0x65,0x1f] @ CHECK: teq.w r4, r5, ror #5 @ encoding: [0x94,0xea,0x75,0x1f] + + + at ------------------------------------------------------------------------------ +@ TEQ + at ------------------------------------------------------------------------------ + tst r5, #0xf000 + tst r2, r5 + tst r3, r12, lsl #5 + tst r4, r11, lsr #4 + tst r5, r10, lsr #12 + tst r6, r9, asr #30 + tst r7, r8, ror #2 + +@ CHECK: tst.w r5, #61440 @ encoding: [0x15,0xf4,0x70,0x4f] +@ CHECK: tst r2, r5 @ encoding: [0x2a,0x42] +@ CHECK: tst.w r3, r12, lsl #5 @ encoding: [0x13,0xea,0x4c,0x1f] +@ CHECK: tst.w r4, r11, lsr #4 @ encoding: [0x14,0xea,0x1b,0x1f] +@ CHECK: tst.w r5, r10, lsr #12 @ encoding: [0x15,0xea,0x1a,0x3f] +@ CHECK: tst.w r6, r9, asr #30 @ encoding: [0x16,0xea,0xa9,0x7f] +@ CHECK: tst.w r7, r8, ror #2 @ encoding: [0x17,0xea,0xb8,0x0f] From grosbach at apple.com Mon Sep 19 17:52:27 2011 From: grosbach at apple.com (Jim Grosbach) Date: Mon, 19 Sep 2011 22:52:27 -0000 Subject: [llvm-commits] [llvm] r140081 - /llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Message-ID: <20110919225227.515202A6C12C@llvm.org> Author: grosbach Date: Mon Sep 19 17:52:27 2011 New Revision: 140081 URL: http://llvm.org/viewvc/llvm-project?rev=140081&view=rev Log: Thumb2 assembly parsing and encoding for UADD16/UADD8. Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s?rev=140081&r1=140080&r2=140081&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s (original) +++ llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Mon Sep 19 17:52:27 2011 @@ -2670,3 +2670,19 @@ @ CHECK: tst.w r5, r10, lsr #12 @ encoding: [0x15,0xea,0x1a,0x3f] @ CHECK: tst.w r6, r9, asr #30 @ encoding: [0x16,0xea,0xa9,0x7f] @ CHECK: tst.w r7, r8, ror #2 @ encoding: [0x17,0xea,0xb8,0x0f] + + + at ------------------------------------------------------------------------------ +@ UADD16/UADD8 + at ------------------------------------------------------------------------------ + uadd16 r1, r2, r3 + uadd8 r1, r2, r3 + ite gt + uadd16gt r1, r2, r3 + uadd8le r1, r2, r3 + +@ CHECK: uadd16 r1, r2, r3 @ encoding: [0x92,0xfa,0x43,0xf1] +@ CHECK: uadd8 r1, r2, r3 @ encoding: [0x82,0xfa,0x43,0xf1] +@ CHECK: ite gt @ encoding: [0xcc,0xbf] +@ CHECK: uadd16gt r1, r2, r3 @ encoding: [0x92,0xfa,0x43,0xf1] +@ CHECK: uadd8le r1, r2, r3 @ encoding: [0x82,0xfa,0x43,0xf1] From grosbach at apple.com Mon Sep 19 17:53:00 2011 From: grosbach at apple.com (Jim Grosbach) Date: Mon, 19 Sep 2011 22:53:00 -0000 Subject: [llvm-commits] [llvm] r140082 - /llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Message-ID: <20110919225300.4EAA42A6C12C@llvm.org> Author: grosbach Date: Mon Sep 19 17:53:00 2011 New Revision: 140082 URL: http://llvm.org/viewvc/llvm-project?rev=140082&view=rev Log: Fix copy/past-o. Gotta remember that 'modify' step... Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s?rev=140082&r1=140081&r2=140082&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s (original) +++ llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Mon Sep 19 17:53:00 2011 @@ -2653,7 +2653,7 @@ @------------------------------------------------------------------------------ -@ TEQ +@ TST @------------------------------------------------------------------------------ tst r5, #0xf000 tst r2, r5 From isanbard at gmail.com Mon Sep 19 18:00:52 2011 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 19 Sep 2011 23:00:52 -0000 Subject: [llvm-commits] [llvm] r140083 - /llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp Message-ID: <20110919230052.E35692A6C12C@llvm.org> Author: void Date: Mon Sep 19 18:00:52 2011 New Revision: 140083 URL: http://llvm.org/viewvc/llvm-project?rev=140083&view=rev Log: If we are extracting a basic block that ends in an invoke call, we must also extract the landing pad block. Otherwise, there will be a situation where the invoke's unwind edge lands on a non-landing pad. We also forbid the user from extracting the landing pad block by itself. Again, this is not a valid transformation. Modified: llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp Modified: llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp?rev=140083&r1=140082&r2=140083&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp Mon Sep 19 18:00:52 2011 @@ -664,7 +664,13 @@ // * Pass in uses as args // 3) Move code region, add call instr to func // - BlocksToExtract.insert(code.begin(), code.end()); + for (std::vector::const_iterator + I = code.begin(), E = code.end(); I != E; ++I) { + BasicBlock *BB = *I; + BlocksToExtract.insert(BB); + if (InvokeInst *II = dyn_cast(BB->getTerminator())) + BlocksToExtract.insert(II->getUnwindDest()); + } Values inputs, outputs; @@ -788,6 +794,7 @@ /// ExtractBasicBlock - slurp a basic block into a brand new function /// Function* llvm::ExtractBasicBlock(BasicBlock *BB, bool AggregateArgs) { + if (BB->isLandingPad()) return 0; std::vector Blocks; Blocks.push_back(BB); return CodeExtractor(0, AggregateArgs).ExtractCodeRegion(Blocks); From isanbard at gmail.com Mon Sep 19 18:01:11 2011 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 19 Sep 2011 23:01:11 -0000 Subject: [llvm-commits] [llvm] r140084 - /llvm/trunk/test/Transforms/CodeExtractor/2004-11-12-InvokeExtract.ll Message-ID: <20110919230111.DABC82A6C12C@llvm.org> Author: void Date: Mon Sep 19 18:01:11 2011 New Revision: 140084 URL: http://llvm.org/viewvc/llvm-project?rev=140084&view=rev Log: Update test to remove the 'unwind' instruction. Modified: llvm/trunk/test/Transforms/CodeExtractor/2004-11-12-InvokeExtract.ll Modified: llvm/trunk/test/Transforms/CodeExtractor/2004-11-12-InvokeExtract.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/CodeExtractor/2004-11-12-InvokeExtract.ll?rev=140084&r1=140083&r2=140084&view=diff ============================================================================== --- llvm/trunk/test/Transforms/CodeExtractor/2004-11-12-InvokeExtract.ll (original) +++ llvm/trunk/test/Transforms/CodeExtractor/2004-11-12-InvokeExtract.ll Mon Sep 19 18:01:11 2011 @@ -10,6 +10,9 @@ ret i32 %V Unw: ; preds = %EB - unwind + %exn = landingpad {i8*, i32} personality i32 (...)* @__gcc_personality_v0 + catch i8* null + resume { i8*, i32 } %exn } +declare i32 @__gcc_personality_v0(...) From grosbach at apple.com Mon Sep 19 18:05:22 2011 From: grosbach at apple.com (Jim Grosbach) Date: Mon, 19 Sep 2011 23:05:22 -0000 Subject: [llvm-commits] [llvm] r140085 - in /llvm/trunk: lib/Target/ARM/ARMInstrInfo.td test/MC/ARM/basic-thumb2-instructions.s Message-ID: <20110919230522.C73F82A6C12C@llvm.org> Author: grosbach Date: Mon Sep 19 18:05:22 2011 New Revision: 140085 URL: http://llvm.org/viewvc/llvm-project?rev=140085&view=rev Log: Thumb2 assembly parsing and encoding for UASX. Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=140085&r1=140084&r2=140085&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Mon Sep 19 18:05:22 2011 @@ -4952,6 +4952,8 @@ def : MnemonicAlias<"shsubaddx", "shsax">; // SSAX == SSUBADDX def : MnemonicAlias<"ssubaddx", "ssax">; +// UASX == UADDSUBX +def : MnemonicAlias<"uaddsubx", "uasx">; // LDRSBT/LDRHT/LDRSHT post-index offset if optional. // Note that the write-back output register is a dummy operand for MC (it's Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s?rev=140085&r1=140084&r2=140085&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s (original) +++ llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Mon Sep 19 18:05:22 2011 @@ -2686,3 +2686,21 @@ @ CHECK: ite gt @ encoding: [0xcc,0xbf] @ CHECK: uadd16gt r1, r2, r3 @ encoding: [0x92,0xfa,0x43,0xf1] @ CHECK: uadd8le r1, r2, r3 @ encoding: [0x82,0xfa,0x43,0xf1] + + + at ------------------------------------------------------------------------------ +@ UASX + at ------------------------------------------------------------------------------ + uasx r9, r12, r0 + it eq + uasxeq r9, r12, r0 + uaddsubx r9, r12, r0 + it eq + uaddsubxeq r9, r12, r0 + +@ CHECK: uasx r9, r12, r0 @ encoding: [0xac,0xfa,0x40,0xf9] +@ CHECK: it eq @ encoding: [0x08,0xbf] +@ CHECK: uasxeq r9, r12, r0 @ encoding: [0xac,0xfa,0x40,0xf9] +@ CHECK: uasx r9, r12, r0 @ encoding: [0xac,0xfa,0x40,0xf9] +@ CHECK: it eq @ encoding: [0x08,0xbf] +@ CHECK: uasxeq r9, r12, r0 @ encoding: [0xac,0xfa,0x40,0xf9] From grosbach at apple.com Mon Sep 19 18:06:39 2011 From: grosbach at apple.com (Jim Grosbach) Date: Mon, 19 Sep 2011 23:06:39 -0000 Subject: [llvm-commits] [llvm] r140086 - /llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Message-ID: <20110919230639.20C552A6C12C@llvm.org> Author: grosbach Date: Mon Sep 19 18:06:38 2011 New Revision: 140086 URL: http://llvm.org/viewvc/llvm-project?rev=140086&view=rev Log: Thumb2 assembly parsing and encoding for UBFX. Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s?rev=140086&r1=140085&r2=140086&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s (original) +++ llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Mon Sep 19 18:06:38 2011 @@ -2704,3 +2704,15 @@ @ CHECK: uasx r9, r12, r0 @ encoding: [0xac,0xfa,0x40,0xf9] @ CHECK: it eq @ encoding: [0x08,0xbf] @ CHECK: uasxeq r9, r12, r0 @ encoding: [0xac,0xfa,0x40,0xf9] + + + at ------------------------------------------------------------------------------ +@ UBFX + at ------------------------------------------------------------------------------ + ubfx r4, r5, #16, #1 + it gt + ubfxgt r4, r5, #16, #16 + +@ CHECK: ubfx r4, r5, #16, #1 @ encoding: [0xc5,0xf3,0x00,0x44] +@ CHECK: it gt @ encoding: [0xc8,0xbf] +@ CHECK: ubfxgt r4, r5, #16, #16 @ encoding: [0xc5,0xf3,0x0f,0x44] From grosbach at apple.com Mon Sep 19 18:08:24 2011 From: grosbach at apple.com (Jim Grosbach) Date: Mon, 19 Sep 2011 23:08:24 -0000 Subject: [llvm-commits] [llvm] r140087 - /llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Message-ID: <20110919230824.75AED2A6C12C@llvm.org> Author: grosbach Date: Mon Sep 19 18:08:24 2011 New Revision: 140087 URL: http://llvm.org/viewvc/llvm-project?rev=140087&view=rev Log: Thumb2 assembly parsing and encoding for UHADD16/UHADD8. Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s?rev=140087&r1=140086&r2=140087&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s (original) +++ llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Mon Sep 19 18:08:24 2011 @@ -2716,3 +2716,19 @@ @ CHECK: ubfx r4, r5, #16, #1 @ encoding: [0xc5,0xf3,0x00,0x44] @ CHECK: it gt @ encoding: [0xc8,0xbf] @ CHECK: ubfxgt r4, r5, #16, #16 @ encoding: [0xc5,0xf3,0x0f,0x44] + + + at ------------------------------------------------------------------------------ +@ UHADD16/UHADD8 + at ------------------------------------------------------------------------------ + uhadd16 r4, r8, r2 + uhadd8 r4, r8, r2 + itt gt + uhadd16gt r4, r8, r2 + uhadd8gt r4, r8, r2 + +@ CHECK: uhadd16 r4, r8, r2 @ encoding: [0x98,0xfa,0x62,0xf4] +@ CHECK: uhadd8 r4, r8, r2 @ encoding: [0x88,0xfa,0x62,0xf4] +@ CHECK: itt gt @ encoding: [0xc4,0xbf] +@ CHECK: uhadd16gt r4, r8, r2 @ encoding: [0x98,0xfa,0x62,0xf4] +@ CHECK: uhadd8gt r4, r8, r2 @ encoding: [0x88,0xfa,0x62,0xf4] From grosbach at apple.com Mon Sep 19 18:13:25 2011 From: grosbach at apple.com (Jim Grosbach) Date: Mon, 19 Sep 2011 23:13:25 -0000 Subject: [llvm-commits] [llvm] r140088 - in /llvm/trunk: lib/Target/ARM/ARMInstrInfo.td test/MC/ARM/basic-thumb2-instructions.s Message-ID: <20110919231325.B5D0A2A6C12C@llvm.org> Author: grosbach Date: Mon Sep 19 18:13:25 2011 New Revision: 140088 URL: http://llvm.org/viewvc/llvm-project?rev=140088&view=rev Log: Thumb2 assembly parsing and encoding for UHASX/UHSAX. Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=140088&r1=140087&r2=140088&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Mon Sep 19 18:13:25 2011 @@ -4954,6 +4954,10 @@ def : MnemonicAlias<"ssubaddx", "ssax">; // UASX == UADDSUBX def : MnemonicAlias<"uaddsubx", "uasx">; +// UHASX == UHADDSUBX +def : MnemonicAlias<"uhaddsubx", "uhasx">; +// UHSAX == UHSUBADDX +def : MnemonicAlias<"uhsubaddx", "uhsax">; // LDRSBT/LDRHT/LDRSHT post-index offset if optional. // Note that the write-back output register is a dummy operand for MC (it's Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s?rev=140088&r1=140087&r2=140088&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s (original) +++ llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Mon Sep 19 18:13:25 2011 @@ -2732,3 +2732,29 @@ @ CHECK: itt gt @ encoding: [0xc4,0xbf] @ CHECK: uhadd16gt r4, r8, r2 @ encoding: [0x98,0xfa,0x62,0xf4] @ CHECK: uhadd8gt r4, r8, r2 @ encoding: [0x88,0xfa,0x62,0xf4] + + + at ------------------------------------------------------------------------------ +@ UHASX/UHSAX + at ------------------------------------------------------------------------------ + uhasx r4, r1, r5 + uhsax r5, r6, r6 + itt gt + uhasxgt r6, r9, r8 + uhsaxgt r7, r8, r12 + uhaddsubx r4, r1, r5 + uhsubaddx r5, r6, r6 + itt gt + uhaddsubxgt r6, r9, r8 + uhsubaddxgt r7, r8, r12 + +@ CHECK: uhasx r4, r1, r5 @ encoding: [0xa1,0xfa,0x65,0xf4] +@ CHECK: uhsax r5, r6, r6 @ encoding: [0xe6,0xfa,0x66,0xf5] +@ CHECK: itt gt @ encoding: [0xc4,0xbf] +@ CHECK: uhasxgt r6, r9, r8 @ encoding: [0xa9,0xfa,0x68,0xf6] +@ CHECK: uhsaxgt r7, r8, r12 @ encoding: [0xe8,0xfa,0x6c,0xf7] +@ CHECK: uhasx r4, r1, r5 @ encoding: [0xa1,0xfa,0x65,0xf4] +@ CHECK: uhsax r5, r6, r6 @ encoding: [0xe6,0xfa,0x66,0xf5] +@ CHECK: itt gt @ encoding: [0xc4,0xbf] +@ CHECK: uhasxgt r6, r9, r8 @ encoding: [0xa9,0xfa,0x68,0xf6] +@ CHECK: uhsaxgt r7, r8, r12 @ encoding: [0xe8,0xfa,0x6c,0xf7] From grosbach at apple.com Mon Sep 19 18:15:36 2011 From: grosbach at apple.com (Jim Grosbach) Date: Mon, 19 Sep 2011 23:15:36 -0000 Subject: [llvm-commits] [llvm] r140089 - /llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Message-ID: <20110919231536.594E72A6C12C@llvm.org> Author: grosbach Date: Mon Sep 19 18:15:36 2011 New Revision: 140089 URL: http://llvm.org/viewvc/llvm-project?rev=140089&view=rev Log: Thumb2 assembly parsing and encoding for UHSUB16/UHSUB8. Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s?rev=140089&r1=140088&r2=140089&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s (original) +++ llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Mon Sep 19 18:15:36 2011 @@ -2758,3 +2758,19 @@ @ CHECK: itt gt @ encoding: [0xc4,0xbf] @ CHECK: uhasxgt r6, r9, r8 @ encoding: [0xa9,0xfa,0x68,0xf6] @ CHECK: uhsaxgt r7, r8, r12 @ encoding: [0xe8,0xfa,0x6c,0xf7] + + + at ------------------------------------------------------------------------------ +@ UHSUB16/UHSUB8 + at ------------------------------------------------------------------------------ + uhsub16 r5, r8, r3 + uhsub8 r1, r7, r6 + itt lt + uhsub16lt r4, r9, r12 + uhsub8lt r3, r1, r5 + +@ CHECK: uhsub16 r5, r8, r3 @ encoding: [0xd8,0xfa,0x63,0xf5] +@ CHECK: uhsub8 r1, r7, r6 @ encoding: [0xc7,0xfa,0x66,0xf1] +@ CHECK: itt lt @ encoding: [0xbc,0xbf] +@ CHECK: uhsub16lt r4, r9, r12 @ encoding: [0xd9,0xfa,0x6c,0xf4] +@ CHECK: uhsub8lt r3, r1, r5 @ encoding: [0xc1,0xfa,0x65,0xf3] From echristo at apple.com Mon Sep 19 18:22:42 2011 From: echristo at apple.com (Eric Christopher) Date: Mon, 19 Sep 2011 23:22:42 -0000 Subject: [llvm-commits] [llvm] r140093 - in /llvm/trunk: ./ autoconf/ test/LLVMC/ test/LLVMC/C++/ test/LLVMC/C/ test/LLVMC/ObjC++/ test/LLVMC/ObjC/ test/LLVMC/test_data/ tools/ tools/llvmc/ tools/llvmc/doc/ tools/llvmc/doc/img/ tools/llvmc/examples/ tools/llvmc/examples/Hello/ tools/llvmc/examples/Simple/ tools/llvmc/examples/Skeleton/ tools/llvmc/examples/mcc16/ tools/llvmc/src/ Message-ID: <20110919232243.0255A2A6C12C@llvm.org> Author: echristo Date: Mon Sep 19 18:22:41 2011 New Revision: 140093 URL: http://llvm.org/viewvc/llvm-project?rev=140093&view=rev Log: Remove llvmc and assorted build machinery for it. The problems that llvmc solved have largely been subsumed with the tasks that the clang driver can accomplish, but llvmc lacks flexibility and depends too heavily on the EOL'd llvm-gcc. Removed: llvm/trunk/test/LLVMC/Alias.td llvm/trunk/test/LLVMC/AppendCmdHook.td llvm/trunk/test/LLVMC/C++/dash-x.cpp llvm/trunk/test/LLVMC/C++/dg.exp llvm/trunk/test/LLVMC/C++/filelist.cpp llvm/trunk/test/LLVMC/C++/hello.cpp llvm/trunk/test/LLVMC/C++/just-compile.cpp llvm/trunk/test/LLVMC/C++/together.cpp llvm/trunk/test/LLVMC/C++/unknown_suffix.unk llvm/trunk/test/LLVMC/C/dg.exp llvm/trunk/test/LLVMC/C/emit-llvm-opt.c llvm/trunk/test/LLVMC/C/emit-llvm.c llvm/trunk/test/LLVMC/C/hello.c llvm/trunk/test/LLVMC/C/include.c llvm/trunk/test/LLVMC/C/opt-test.c llvm/trunk/test/LLVMC/C/sink.c llvm/trunk/test/LLVMC/C/wall.c llvm/trunk/test/LLVMC/EmptyCompilationGraph.td llvm/trunk/test/LLVMC/EnvParentheses.td llvm/trunk/test/LLVMC/ForwardAs.td llvm/trunk/test/LLVMC/ForwardTransformedValue.td llvm/trunk/test/LLVMC/ForwardValue.td llvm/trunk/test/LLVMC/HookWithArguments.td llvm/trunk/test/LLVMC/HookWithInFile.td llvm/trunk/test/LLVMC/Init.td llvm/trunk/test/LLVMC/LanguageMap.td llvm/trunk/test/LLVMC/MultiValuedOption.td llvm/trunk/test/LLVMC/MultipleCompilationGraphs.td llvm/trunk/test/LLVMC/MultipleOutputLanguages.td llvm/trunk/test/LLVMC/NoActions.td llvm/trunk/test/LLVMC/NoCompilationGraph.td llvm/trunk/test/LLVMC/ObjC++/dg.exp llvm/trunk/test/LLVMC/ObjC++/hello.mm llvm/trunk/test/LLVMC/ObjC/dg.exp llvm/trunk/test/LLVMC/ObjC/hello.m llvm/trunk/test/LLVMC/OneOrMore.td llvm/trunk/test/LLVMC/OptionPreprocessor.td llvm/trunk/test/LLVMC/OutputSuffixHook.td llvm/trunk/test/LLVMC/TestWarnings.td llvm/trunk/test/LLVMC/dg.exp llvm/trunk/test/LLVMC/test_data/false.c llvm/trunk/test/LLVMC/test_data/false.cpp llvm/trunk/test/LLVMC/test_data/false2.cpp llvm/trunk/test/LLVMC/test_data/together.c llvm/trunk/tools/llvmc/CMakeLists.txt llvm/trunk/tools/llvmc/Makefile llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst llvm/trunk/tools/llvmc/doc/LLVMC-Tutorial.rst llvm/trunk/tools/llvmc/doc/Makefile llvm/trunk/tools/llvmc/doc/img/lines.gif llvm/trunk/tools/llvmc/examples/CMakeLists.txt llvm/trunk/tools/llvmc/examples/Hello/CMakeLists.txt llvm/trunk/tools/llvmc/examples/Hello/Hello.cpp llvm/trunk/tools/llvmc/examples/Hello/Makefile llvm/trunk/tools/llvmc/examples/Makefile llvm/trunk/tools/llvmc/examples/Simple/CMakeLists.txt llvm/trunk/tools/llvmc/examples/Simple/Makefile llvm/trunk/tools/llvmc/examples/Simple/Simple.cpp llvm/trunk/tools/llvmc/examples/Simple/Simple.td llvm/trunk/tools/llvmc/examples/Skeleton/AutoGenerated.td llvm/trunk/tools/llvmc/examples/Skeleton/CMakeLists.txt llvm/trunk/tools/llvmc/examples/Skeleton/Hooks.cpp llvm/trunk/tools/llvmc/examples/Skeleton/Main.cpp llvm/trunk/tools/llvmc/examples/Skeleton/Makefile llvm/trunk/tools/llvmc/examples/Skeleton/README llvm/trunk/tools/llvmc/examples/mcc16/CMakeLists.txt llvm/trunk/tools/llvmc/examples/mcc16/Hooks.cpp llvm/trunk/tools/llvmc/examples/mcc16/Main.cpp llvm/trunk/tools/llvmc/examples/mcc16/Makefile llvm/trunk/tools/llvmc/examples/mcc16/PIC16.td llvm/trunk/tools/llvmc/examples/mcc16/README llvm/trunk/tools/llvmc/src/AutoGenerated.td llvm/trunk/tools/llvmc/src/Base.td.in llvm/trunk/tools/llvmc/src/CMakeLists.txt llvm/trunk/tools/llvmc/src/Clang.td llvm/trunk/tools/llvmc/src/Hooks.cpp llvm/trunk/tools/llvmc/src/Main.cpp llvm/trunk/tools/llvmc/src/Makefile Modified: llvm/trunk/Makefile llvm/trunk/autoconf/configure.ac llvm/trunk/configure llvm/trunk/tools/Makefile Modified: llvm/trunk/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/Makefile?rev=140093&r1=140092&r2=140093&view=diff ============================================================================== --- llvm/trunk/Makefile (original) +++ llvm/trunk/Makefile Mon Sep 19 18:22:41 2011 @@ -187,8 +187,7 @@ include/llvm/Config/AsmPrinters.def \ include/llvm/Config/AsmParsers.def \ include/llvm/Config/Disassemblers.def \ - include/llvm/Support/DataTypes.h \ - tools/llvmc/src/Base.td + include/llvm/Support/DataTypes.h FilesToConfigPATH := $(addprefix $(LLVM_OBJ_ROOT)/,$(FilesToConfig)) all-local:: $(FilesToConfigPATH) Modified: llvm/trunk/autoconf/configure.ac URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/autoconf/configure.ac?rev=140093&r1=140092&r2=140093&view=diff ============================================================================== --- llvm/trunk/autoconf/configure.ac (original) +++ llvm/trunk/autoconf/configure.ac Mon Sep 19 18:22:41 2011 @@ -1756,9 +1756,6 @@ AC_CONFIG_FILES([tools/clang/docs/doxygen.cfg]) fi -dnl Configure llvmc's Base plugin -AC_CONFIG_FILES([tools/llvmc/src/Base.td]) - dnl Do the first stage of configuration for llvm-config.in. AC_CONFIG_FILES([tools/llvm-config/llvm-config.in]) Modified: llvm/trunk/configure URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/configure?rev=140093&r1=140092&r2=140093&view=diff ============================================================================== --- llvm/trunk/configure (original) +++ llvm/trunk/configure Mon Sep 19 18:22:41 2011 @@ -21605,9 +21605,6 @@ fi -ac_config_files="$ac_config_files tools/llvmc/src/Base.td" - - ac_config_files="$ac_config_files tools/llvm-config/llvm-config.in" @@ -22227,7 +22224,6 @@ "llvm.spec") CONFIG_FILES="$CONFIG_FILES llvm.spec" ;; "docs/doxygen.cfg") CONFIG_FILES="$CONFIG_FILES docs/doxygen.cfg" ;; "tools/clang/docs/doxygen.cfg") CONFIG_FILES="$CONFIG_FILES tools/clang/docs/doxygen.cfg" ;; - "tools/llvmc/src/Base.td") CONFIG_FILES="$CONFIG_FILES tools/llvmc/src/Base.td" ;; "tools/llvm-config/llvm-config.in") CONFIG_FILES="$CONFIG_FILES tools/llvm-config/llvm-config.in" ;; "setup") CONFIG_COMMANDS="$CONFIG_COMMANDS setup" ;; "Makefile") CONFIG_COMMANDS="$CONFIG_COMMANDS Makefile" ;; Removed: llvm/trunk/test/LLVMC/Alias.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/Alias.td?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/Alias.td (original) +++ llvm/trunk/test/LLVMC/Alias.td (removed) @@ -1,24 +0,0 @@ -// Test alias generation. -// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t -// RUN: FileCheck -input-file %t %s -// RUN: %compile_cxx %t -// XFAIL: vg_leak - -include "llvm/CompilerDriver/Common.td" - -def OptList : OptionList<[ - -(switch_option "dummy1", (help "none")), -// CHECK: cl::alias Alias_dummy2 -(alias_option "dummy2", "dummy1") -]>; - -def dummy_tool : Tool<[ -(command "dummy_cmd"), -(in_language "dummy_lang"), -(out_language "dummy_lang"), -(actions (case - (switch_on "dummy1"), (forward "dummy1"))) -]>; - -def DummyGraph : CompilationGraph<[(edge "root", "dummy_tool")]>; Removed: llvm/trunk/test/LLVMC/AppendCmdHook.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/AppendCmdHook.td?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/AppendCmdHook.td (original) +++ llvm/trunk/test/LLVMC/AppendCmdHook.td (removed) @@ -1,29 +0,0 @@ -// Check that hooks can be invoked from 'append_cmd'. -// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t -// RUN: FileCheck -input-file %t %s -// RUN: %compile_cxx %t -// XFAIL: vg_leak - -include "llvm/CompilerDriver/Common.td" - -// CHECK: std::string MyHook() - -def OptList : OptionList<[ -(switch_option "dummy1", (help "none")), -(switch_option "dummy2", (help "none")) -]>; - -def dummy_tool : Tool<[ -(command "dummy_cmd"), -(in_language "dummy_lang"), -(out_language "dummy_lang"), -(actions (case - // CHECK: , "-arg1")); - // CHECK: , "-arg2")); - (switch_on "dummy1"), (append_cmd "-arg1 -arg2"), - // CHECK: , "-arg3")); - // CHECK: hooks::MyHook() - (switch_on "dummy2"), (append_cmd "-arg3 $CALL(MyHook)"))) -]>; - -def DummyGraph : CompilationGraph<[(edge "root", "dummy_tool")]>; Removed: llvm/trunk/test/LLVMC/C++/dash-x.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/C%2B%2B/dash-x.cpp?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/C++/dash-x.cpp (original) +++ llvm/trunk/test/LLVMC/C++/dash-x.cpp (removed) @@ -1,10 +0,0 @@ -// Test that we can compile .c files as C++ and vice versa -// RUN: llvmc %s -x c++ %p/../test_data/false.c -x c %p/../test_data/false.cpp -x lisp -x whatnot -x none %p/../test_data/false2.cpp -o %t -// RUN: %abs_tmp | grep hello -// XFAIL: vg - -extern int test_main(); - -int main() { - test_main(); -} Removed: llvm/trunk/test/LLVMC/C++/dg.exp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/C%2B%2B/dg.exp?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/C++/dg.exp (original) +++ llvm/trunk/test/LLVMC/C++/dg.exp (removed) @@ -1,5 +0,0 @@ -load_lib llvm.exp - -if [ llvm_gcc_supports c++ ] then { - RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{unk,ll,c,cpp}]] -} Removed: llvm/trunk/test/LLVMC/C++/filelist.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/C%2B%2B/filelist.cpp?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/C++/filelist.cpp (original) +++ llvm/trunk/test/LLVMC/C++/filelist.cpp (removed) @@ -1,3 +0,0 @@ -// Test that the -filelist option works correctly with -linker=c++. -// RUN: llvmc --dry-run -filelist DUMMY -linker c++ |& grep llvm-g++ -// XFAIL: vg Removed: llvm/trunk/test/LLVMC/C++/hello.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/C%2B%2B/hello.cpp?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/C++/hello.cpp (original) +++ llvm/trunk/test/LLVMC/C++/hello.cpp (removed) @@ -1,9 +0,0 @@ -// Test that we can compile C++ code. -// RUN: llvmc %s -o %t -// RUN: %abs_tmp | grep hello -// XFAIL: vg -#include - -int main() { - std::cout << "hello" << '\n'; -} Removed: llvm/trunk/test/LLVMC/C++/just-compile.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/C%2B%2B/just-compile.cpp?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/C++/just-compile.cpp (original) +++ llvm/trunk/test/LLVMC/C++/just-compile.cpp (removed) @@ -1,10 +0,0 @@ -// Test that the -c flag works. -// RUN: llvmc -c %s -o %t.o -// RUN: llvmc --linker=c++ %t.o -o %t -// RUN: %abs_tmp | grep hello -// XFAIL: vg -#include - -int main() { - std::cout << "hello" << '\n'; -} Removed: llvm/trunk/test/LLVMC/C++/together.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/C%2B%2B/together.cpp?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/C++/together.cpp (original) +++ llvm/trunk/test/LLVMC/C++/together.cpp (removed) @@ -1,10 +0,0 @@ -// Check that we can compile files of different types together. -// RUN: llvmc %s %p/../test_data/together.c -o %t -// RUN: %abs_tmp | grep hello -// XFAIL: vg - -extern "C" void test(); - -int main() { - test(); -} Removed: llvm/trunk/test/LLVMC/C++/unknown_suffix.unk URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/C%2B%2B/unknown_suffix.unk?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/C++/unknown_suffix.unk (original) +++ llvm/trunk/test/LLVMC/C++/unknown_suffix.unk (removed) @@ -1,9 +0,0 @@ -// Test that the -x option works for files with unknown suffixes. -// RUN: llvmc -x c++ %s -o %t -// RUN: %abs_tmp | grep hello -// XFAIL: vg -#include - -int main() { - std::cout << "hello" << '\n'; -} Removed: llvm/trunk/test/LLVMC/C/dg.exp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/C/dg.exp?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/C/dg.exp (original) +++ llvm/trunk/test/LLVMC/C/dg.exp (removed) @@ -1,5 +0,0 @@ -load_lib llvm.exp - -if [ llvm_gcc_supports c ] then { - RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]] -} Removed: llvm/trunk/test/LLVMC/C/emit-llvm-opt.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/C/emit-llvm-opt.c?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/C/emit-llvm-opt.c (original) +++ llvm/trunk/test/LLVMC/C/emit-llvm-opt.c (removed) @@ -1,9 +0,0 @@ -// Check that -emit-llvm [-S] works with -opt. - -// RUN: llvmc -c -opt -emit-llvm -o - %s | llvm-dis | grep "@f0()" | count 1 -// RUN: llvmc -c -opt -emit-llvm -S -o - %s | grep "@f0()" | count 1 -// RUN: llvmc --dry-run -c -opt -emit-llvm %s |& grep "^opt" -// XFAIL: vg_leak - -int f0(void) { -} Removed: llvm/trunk/test/LLVMC/C/emit-llvm.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/C/emit-llvm.c?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/C/emit-llvm.c (original) +++ llvm/trunk/test/LLVMC/C/emit-llvm.c (removed) @@ -1,8 +0,0 @@ -// Check that -emit-llvm [-S] works correctly. - -// RUN: llvmc -c -emit-llvm -o - %s | llvm-dis | grep "@f0()" | count 1 -// RUN: llvmc -c -emit-llvm -S -o - %s | grep "@f0()" | count 1 -// XFAIL: vg_leak - -int f0(void) { -} Removed: llvm/trunk/test/LLVMC/C/hello.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/C/hello.c?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/C/hello.c (original) +++ llvm/trunk/test/LLVMC/C/hello.c (removed) @@ -1,13 +0,0 @@ -/* - * Check that we can compile helloworld - * RUN: llvmc %s -o %t - * RUN: %abs_tmp | grep hello - * XFAIL: vg_leak - */ - -#include - -int main() { - printf("hello\n"); - return 0; -} Removed: llvm/trunk/test/LLVMC/C/include.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/C/include.c?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/C/include.c (original) +++ llvm/trunk/test/LLVMC/C/include.c (removed) @@ -1,10 +0,0 @@ -/* - * Check that the 'include' options work. - * RUN: echo "int x;\n" > %t1.inc - * RUN: llvmc -include %t1.inc -fsyntax-only %s - * XFAIL: vg_leak - */ - -int f0(void) { - return x; -} Removed: llvm/trunk/test/LLVMC/C/opt-test.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/C/opt-test.c?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/C/opt-test.c (original) +++ llvm/trunk/test/LLVMC/C/opt-test.c (removed) @@ -1,13 +0,0 @@ -/* - * Check that the -opt switch works. - * RUN: llvmc %s -opt -o %t - * RUN: %abs_tmp | grep hello - * XFAIL: vg_leak - */ - -#include - -int main() { - printf("hello\n"); - return 0; -} Removed: llvm/trunk/test/LLVMC/C/sink.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/C/sink.c?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/C/sink.c (original) +++ llvm/trunk/test/LLVMC/C/sink.c (removed) @@ -1,13 +0,0 @@ -/* - * Check that the 'sink' options work. - * RUN: llvmc -v -Wall %s -o %t |& grep "Wall" - * RUN: %abs_tmp | grep hello - * XFAIL: vg_leak - */ - -#include - -int main() { - printf("hello\n"); - return 0; -} Removed: llvm/trunk/test/LLVMC/C/wall.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/C/wall.c?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/C/wall.c (original) +++ llvm/trunk/test/LLVMC/C/wall.c (removed) @@ -1,13 +0,0 @@ -/* - * Check that -Wall works as intended - * RUN: llvmc -Wall %s -o %t - * RUN: %abs_tmp | grep hello - * XFAIL: vg_leak - */ - -#include - -int main() { - printf("hello\n"); - return 0; -} Removed: llvm/trunk/test/LLVMC/EmptyCompilationGraph.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/EmptyCompilationGraph.td?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/EmptyCompilationGraph.td (original) +++ llvm/trunk/test/LLVMC/EmptyCompilationGraph.td (removed) @@ -1,8 +0,0 @@ -// Check that the compilation graph can be empty. -// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t -// RUN: %compile_cxx %t -// XFAIL: vg_leak - -include "llvm/CompilerDriver/Common.td" - -def Graph : CompilationGraph<[]>; Removed: llvm/trunk/test/LLVMC/EnvParentheses.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/EnvParentheses.td?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/EnvParentheses.td (original) +++ llvm/trunk/test/LLVMC/EnvParentheses.td (removed) @@ -1,18 +0,0 @@ -// Check the fix for PR4157. -// http://llvm.org/bugs/show_bug.cgi?id=4157 -// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t -// RUN: not grep {FOO")));} %t -// RUN: %compile_cxx %t -// XFAIL: vg_leak - -include "llvm/CompilerDriver/Common.td" - -def dummy_tool : Tool<[ -(command "gcc $ENV(FOO)/bar"), -(in_language "dummy"), -(out_language "dummy") -]>; - -def DummyGraph : CompilationGraph<[(edge "root", "dummy_tool")]>; - -def Graph : CompilationGraph<[]>; Removed: llvm/trunk/test/LLVMC/ForwardAs.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/ForwardAs.td?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/ForwardAs.td (original) +++ llvm/trunk/test/LLVMC/ForwardAs.td (removed) @@ -1,21 +0,0 @@ -// Check the fix for PR4159. -// http://llvm.org/bugs/show_bug.cgi?id=4159 -// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t -// RUN: FileCheck -input-file %t %s -// RUN: %compile_cxx %t -// XFAIL: vg_leak - -include "llvm/CompilerDriver/Common.td" - -def OptList : OptionList<[(parameter_option "dummy", (help "dummmy"))]>; - -def dummy_tool : Tool<[ -(command "dummy_cmd"), -(in_language "dummy"), -(out_language "dummy"), -(actions (case - // CHECK: "unique_name")); - (not_empty "dummy"), (forward_as "dummy", "unique_name"))) -]>; - -def DummyGraph : CompilationGraph<[(edge "root", "dummy_tool")]>; Removed: llvm/trunk/test/LLVMC/ForwardTransformedValue.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/ForwardTransformedValue.td?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/ForwardTransformedValue.td (original) +++ llvm/trunk/test/LLVMC/ForwardTransformedValue.td (removed) @@ -1,27 +0,0 @@ -// Check that forward_transformed_value works. -// The dummy tool and graph are required to silence warnings. -// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t -// RUN: FileCheck -input-file %t %s -// RUN: %compile_cxx %t -// XFAIL: vg_leak - -include "llvm/CompilerDriver/Common.td" - -def OptList : OptionList<[(parameter_option "a", (help "dummy")), - (prefix_list_option "b", (help "dummy"))]>; - -// CHECK: std::string HookA -// CHECK: std::string HookB - -def dummy_tool : Tool<[ -(command "dummy_cmd"), -(in_language "dummy"), -(out_language "dummy"), -(actions (case - // CHECK: HookA(autogenerated::Parameter_a - (not_empty "a"), (forward_transformed_value "a", "HookA"), - // CHECK: HookB(autogenerated::List_b - (not_empty "b"), (forward_transformed_value "b", "HookB"))) -]>; - -def DummyGraph : CompilationGraph<[(edge "root", "dummy_tool")]>; Removed: llvm/trunk/test/LLVMC/ForwardValue.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/ForwardValue.td?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/ForwardValue.td (original) +++ llvm/trunk/test/LLVMC/ForwardValue.td (removed) @@ -1,24 +0,0 @@ -// Check that forward_value works. -// The dummy tool and graph are required to silence warnings. -// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t -// RUN: FileCheck -input-file %t %s -// RUN: %compile_cxx %t -// XFAIL: vg_leak - -include "llvm/CompilerDriver/Common.td" - -def OptList : OptionList<[(parameter_option "a", (help "dummy")), - (prefix_list_option "b", (help "dummy"))]>; - -def dummy_tool : Tool<[ -(command "dummy_cmd"), -(in_language "dummy"), -(out_language "dummy"), -(actions (case - // CHECK: , autogenerated::Parameter_a)); - (not_empty "a"), (forward_value "a"), - // CHECK: B = autogenerated::List_b.begin() - (not_empty "b"), (forward_value "b"))) -]>; - -def DummyGraph : CompilationGraph<[(edge "root", "dummy_tool")]>; Removed: llvm/trunk/test/LLVMC/HookWithArguments.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/HookWithArguments.td?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/HookWithArguments.td (original) +++ llvm/trunk/test/LLVMC/HookWithArguments.td (removed) @@ -1,20 +0,0 @@ -// Check that hooks with arguments work. -// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t -// RUN: FileCheck -input-file %t %s -// RUN: %compile_cxx %t -// XFAIL: vg_leak - -include "llvm/CompilerDriver/Common.td" - -// CHECK: Hook(const char* Arg0, const char* Arg1, const char* Arg2); -// CHECK: "/path" -// CHECK: std::getenv("VARIABLE") -// CHECK: "/2path" - -def dummy_tool : Tool<[ -(command "$CALL(Hook, 'Arg1', 'Arg2', 'Arg3 Arg3Cont')/path arg1 $ENV(VARIABLE)/2path arg2"), -(in_language "dummy"), -(out_language "dummy") -]>; - -def DummyGraph : CompilationGraph<[(edge "root", "dummy_tool")]>; Removed: llvm/trunk/test/LLVMC/HookWithInFile.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/HookWithInFile.td?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/HookWithInFile.td (original) +++ llvm/trunk/test/LLVMC/HookWithInFile.td (removed) @@ -1,16 +0,0 @@ -// Check that a hook can be given $INFILE as an argument. -// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t -// RUN: FileCheck -input-file %t %s -// RUN: %compile_cxx %t -// XFAIL: vg_leak - -include "llvm/CompilerDriver/Common.td" - -def dummy_tool : Tool<[ -// CHECK: Hook(inFile.c_str()) -(command "$CALL(Hook, '$INFILE')/path"), -(in_language "dummy"), -(out_language "dummy") -]>; - -def DummyGraph : CompilationGraph<[(edge "root", "dummy_tool")]>; Removed: llvm/trunk/test/LLVMC/Init.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/Init.td?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/Init.td (original) +++ llvm/trunk/test/LLVMC/Init.td (removed) @@ -1,25 +0,0 @@ -// Check that (init true/false) and (init "str") work. -// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t -// RUN: FileCheck -input-file %t %s -// RUN: %compile_cxx %t -// XFAIL: vg_leak - -include "llvm/CompilerDriver/Common.td" - -def OptList : OptionList<[ -// CHECK: cl::init(true) -(switch_option "dummy1", (help "none"), (init true)), -// CHECK: cl::init("some-string") -(parameter_option "dummy2", (help "none"), (init "some-string")) -]>; - -def dummy_tool : Tool<[ -(command "dummy_cmd"), -(in_language "dummy_lang"), -(out_language "dummy_lang"), -(actions (case - (switch_on "dummy1"), (forward "dummy1"), - (not_empty "dummy2"), (forward "dummy2"))) -]>; - -def DummyGraph : CompilationGraph<[(edge "root", "dummy_tool")]>; Removed: llvm/trunk/test/LLVMC/LanguageMap.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/LanguageMap.td?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/LanguageMap.td (original) +++ llvm/trunk/test/LLVMC/LanguageMap.td (removed) @@ -1,29 +0,0 @@ -// Check that LanguageMap is processed properly. -// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t -// RUN: FileCheck -input-file %t %s -// RUN: %compile_cxx %t -// XFAIL: vg_leak - -include "llvm/CompilerDriver/Common.td" - -def OptList : OptionList<[ -(switch_option "dummy1", (help "none")) -]>; - -def dummy_tool : Tool<[ -(command "dummy_cmd"), -(in_language "dummy_lang"), -(out_language "dummy_lang"), -(actions (case - (switch_on "dummy1"), (forward "dummy1"))) -]>; - -def lang_map : LanguageMap<[ - // CHECK: langMap["dummy"] = "dummy_lang" - // CHECK: langMap["DUM"] = "dummy_lang" - (lang_to_suffixes "dummy_lang", ["dummy", "DUM"]), - // CHECK: langMap["DUM2"] = "dummy_lang_2" - (lang_to_suffixes "dummy_lang_2", "DUM2") -]>; - -def DummyGraph : CompilationGraph<[(edge "root", "dummy_tool")]>; Removed: llvm/trunk/test/LLVMC/MultiValuedOption.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/MultiValuedOption.td?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/MultiValuedOption.td (original) +++ llvm/trunk/test/LLVMC/MultiValuedOption.td (removed) @@ -1,24 +0,0 @@ -// Check that multivalued options work. -// The dummy tool and graph are required to silence warnings. -// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t -// RUN: FileCheck -input-file %t %s -// RUN: %compile_cxx %t -// XFAIL: vg_leak - -include "llvm/CompilerDriver/Common.td" - -def OptList : OptionList<[ - // CHECK: cl::multi_val(2) - (prefix_list_option "foo", (multi_val 2)), - (parameter_list_option "baz", (multi_val 2))]>; - -def dummy_tool : Tool<[ -(command "dummy_cmd"), -(in_language "dummy"), -(out_language "dummy"), -(actions (case - (not_empty "foo"), (forward_as "foo", "bar"), - (not_empty "baz"), (forward "baz"))) -]>; - -def DummyGraph : CompilationGraph<[(edge "root", "dummy_tool")]>; Removed: llvm/trunk/test/LLVMC/MultipleCompilationGraphs.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/MultipleCompilationGraphs.td?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/MultipleCompilationGraphs.td (original) +++ llvm/trunk/test/LLVMC/MultipleCompilationGraphs.td (removed) @@ -1,10 +0,0 @@ -// Check that multiple compilation graphs are allowed. -// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t -// RUN: %compile_cxx %t -// XFAIL: vg_leak - -include "llvm/CompilerDriver/Common.td" - -def Graph1 : CompilationGraph<[]>; -def Graph2 : CompilationGraph<[]>; -def Graph3 : CompilationGraph<[]>; Removed: llvm/trunk/test/LLVMC/MultipleOutputLanguages.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/MultipleOutputLanguages.td?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/MultipleOutputLanguages.td (original) +++ llvm/trunk/test/LLVMC/MultipleOutputLanguages.td (removed) @@ -1,27 +0,0 @@ -// Check that multiple output languages work. -// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t -// RUN: FileCheck -input-file %t %s -// RUN: %compile_cxx %t -// XFAIL: vg_leak - -include "llvm/CompilerDriver/Common.td" - -def dummy_tool : Tool<[ - (command "dummy_cmd"), - (in_language "dummy_lang"), - (out_language "another_dummy_lang", "yet_another_dummy_lang") -]>; - -def another_dummy_tool : Tool<[ - (command "another_dummy_cmd"), - (in_language "another_dummy_lang", "some_other_dummy_lang"), - (out_language "executable"), - (join) -]>; - -// CHECK: new SimpleEdge("dummy_tool") -// CHECK: new SimpleEdge("another_dummy_tool") -def DummyGraph : CompilationGraph<[ - (edge "root", "dummy_tool"), - (edge "dummy_tool", "another_dummy_tool") -]>; Removed: llvm/trunk/test/LLVMC/NoActions.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/NoActions.td?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/NoActions.td (original) +++ llvm/trunk/test/LLVMC/NoActions.td (removed) @@ -1,16 +0,0 @@ -// Check that tools without associated actions are accepted. -// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t -// RUN: FileCheck -input-file %t %s -// RUN: %compile_cxx %t -// XFAIL: vg_leak - -include "llvm/CompilerDriver/Common.td" - -// CHECK: class dummy_tool : public Tool { -def dummy_tool : Tool<[ -(command "dummy_cmd"), -(in_language "dummy"), -(out_language "dummy") -]>; - -def DummyGraph : CompilationGraph<[(edge "root", "dummy_tool")]>; Removed: llvm/trunk/test/LLVMC/NoCompilationGraph.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/NoCompilationGraph.td?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/NoCompilationGraph.td (original) +++ llvm/trunk/test/LLVMC/NoCompilationGraph.td (removed) @@ -1,6 +0,0 @@ -// Check that the compilation graph is not required. -// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t -// RUN: %compile_cxx %t -// XFAIL: vg_leak - -include "llvm/CompilerDriver/Common.td" Removed: llvm/trunk/test/LLVMC/ObjC++/dg.exp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/ObjC%2B%2B/dg.exp?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/ObjC++/dg.exp (original) +++ llvm/trunk/test/LLVMC/ObjC++/dg.exp (removed) @@ -1,5 +0,0 @@ -load_lib llvm.exp - -if [ llvm_gcc_supports obj-c++ ] then { - RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{mm}]] -} Removed: llvm/trunk/test/LLVMC/ObjC++/hello.mm URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/ObjC%2B%2B/hello.mm?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/ObjC++/hello.mm (original) +++ llvm/trunk/test/LLVMC/ObjC++/hello.mm (removed) @@ -1,8 +0,0 @@ -// Test that we can compile Objective-C++ code. -// RUN: llvmc %s -o %t -// RUN: %abs_tmp | grep hello -#include - -int main() { - std::cout << "hello" << '\n'; -} Removed: llvm/trunk/test/LLVMC/ObjC/dg.exp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/ObjC/dg.exp?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/ObjC/dg.exp (original) +++ llvm/trunk/test/LLVMC/ObjC/dg.exp (removed) @@ -1,5 +0,0 @@ -load_lib llvm.exp - -if [ llvm_gcc_supports objc ] then { - RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{m}]] -} Removed: llvm/trunk/test/LLVMC/ObjC/hello.m URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/ObjC/hello.m?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/ObjC/hello.m (original) +++ llvm/trunk/test/LLVMC/ObjC/hello.m (removed) @@ -1,12 +0,0 @@ -/* - * Check that we can compile helloworld - * RUN: llvmc %s -o %t - * RUN: %abs_tmp | grep hello - */ - -#include - -int main() { - printf("hello\n"); - return 0; -} Removed: llvm/trunk/test/LLVMC/OneOrMore.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/OneOrMore.td?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/OneOrMore.td (original) +++ llvm/trunk/test/LLVMC/OneOrMore.td (removed) @@ -1,25 +0,0 @@ -// Check that (one_or_more) and (zero_or_one) properties work. -// The dummy tool and graph are required to silence warnings. -// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t -// RUN: FileCheck -input-file %t %s -// RUN: %compile_cxx %t -// XFAIL: vg_leak - -include "llvm/CompilerDriver/Common.td" - -def OptList : OptionList<[ - // CHECK: cl::OneOrMore - (prefix_list_option "foo", (one_or_more)), - // CHECK: cl::Optional - (parameter_list_option "baz", (optional))]>; - -def dummy_tool : Tool<[ -(command "dummy_cmd"), -(in_language "dummy"), -(out_language "dummy"), -(actions (case - (not_empty "foo"), (forward_as "foo", "bar"), - (not_empty "baz"), (forward "baz"))) -]>; - -def DummyGraph : CompilationGraph<[(edge "root", "dummy_tool")]>; Removed: llvm/trunk/test/LLVMC/OptionPreprocessor.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/OptionPreprocessor.td?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/OptionPreprocessor.td (original) +++ llvm/trunk/test/LLVMC/OptionPreprocessor.td (removed) @@ -1,67 +0,0 @@ -// Test for the OptionPreprocessor and related functionality. -// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t -// RUN: FileCheck -input-file %t %s -// RUN: %compile_cxx %t -// XFAIL: vg_leak - -include "llvm/CompilerDriver/Common.td" - -def OptList : OptionList<[ -(switch_option "foo", (help "dummy")), -(switch_option "bar", (help "dummy")), -(switch_option "baz", (help "dummy")), -(parameter_option "foo_p", (help "dummy")), -(parameter_option "bar_p", (help "dummy")), -(parameter_option "baz_p", (help "dummy")), -(parameter_list_option "foo_l", (help "dummy")) -]>; - -def Preprocess : OptionPreprocessor< -(case - // CHECK: W1 - // CHECK: foo = false; - // CHECK: foo_p = ""; - // CHECK: foo_l.clear(); - (and (switch_on "foo"), (any_switch_on "bar", "baz")), - [(warning "W1"), (unset_option "foo"), - (unset_option "foo_p"), (unset_option "foo_l")], - // CHECK: W2 - // CHECK: foo = true; - // CHECK: bar = true; - // CHECK: baz = false; - // CHECK: foo_p = "asdf"; - // CHECK: foo_l.clear(); - // CHECK: foo_l.push_back("qwert"); - // CHECK: foo_l.push_back("yuiop"); - // CHECK: foo_l.push_back("asdf"); - (and (switch_on "foo", "bar"), (any_empty "foo_p", "bar_p")), - [(warning "W2"), (set_option "foo"), - (set_option "bar", true), - (set_option "baz", false), - (set_option "foo_p", "asdf"), - (set_option "foo_l", ["qwert", "yuiop", "asdf"])], - // CHECK: W3 - // CHECK: foo = true; - // CHECK: bar = true; - // CHECK: baz = true; - (and (empty "foo_p", "bar_p"), (any_not_empty "baz_p")), - [(warning "W3"), (set_option "foo", "bar", "baz")]) ->; - -// Shut up warnings... -def dummy : Tool< -[(in_language "dummy"), - (out_language "dummy"), - (output_suffix "d"), - (command "dummy"), - (actions (case (switch_on "foo"), (error), - (switch_on "bar"), (error), - (switch_on "baz"), (error), - (not_empty "foo_p"), (error), - (not_empty "bar_p"), (error), - (not_empty "baz_p"), (error), - (not_empty "foo_l"), (error))) -]>; - -def Graph : CompilationGraph<[(edge "root", "dummy")]>; - Removed: llvm/trunk/test/LLVMC/OutputSuffixHook.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/OutputSuffixHook.td?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/OutputSuffixHook.td (original) +++ llvm/trunk/test/LLVMC/OutputSuffixHook.td (removed) @@ -1,24 +0,0 @@ -// Check that hooks can be invoked from 'output_suffix'. -// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t -// RUN: FileCheck -input-file %t %s -// RUN: %compile_cxx %t -// XFAIL: vg_leak - -include "llvm/CompilerDriver/Common.td" - -// CHECK: std::string MyHook() - -def OptList : OptionList<[ -(switch_option "dummy1", (help "none")) -]>; - -def dummy_tool : Tool<[ -(command "dummy_cmd"), -(in_language "dummy_lang"), -(out_language "dummy_lang"), -(actions (case - // CHECK: hooks::MyHook() - (switch_on "dummy1"), (output_suffix "$CALL(MyHook)"))) -]>; - -def DummyGraph : CompilationGraph<[(edge "root", "dummy_tool")]>; Removed: llvm/trunk/test/LLVMC/TestWarnings.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/TestWarnings.td?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/TestWarnings.td (original) +++ llvm/trunk/test/LLVMC/TestWarnings.td (removed) @@ -1,8 +0,0 @@ -// Check that warnings about unused options are really emitted. -// This should fail because the output is printed on stderr. -// RUN: tblgen -I %p/../../include --gen-llvmc %s |& grep "option '-Wall' has no effect!" -// XFAIL: vg_leak - -include "llvm/CompilerDriver/Common.td" - -def OptList : OptionList<[(switch_option "Wall", (help "dummy"))]>; Removed: llvm/trunk/test/LLVMC/dg.exp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/dg.exp?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/dg.exp (original) +++ llvm/trunk/test/LLVMC/dg.exp (removed) @@ -1,3 +0,0 @@ -load_lib llvm.exp - -RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{td}]] Removed: llvm/trunk/test/LLVMC/test_data/false.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/test_data/false.c?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/test_data/false.c (original) +++ llvm/trunk/test/LLVMC/test_data/false.c (removed) @@ -1,10 +0,0 @@ -#include - -extern "C" void test(); -extern std::string test2(); - -int test_main() { - std::cout << "h"; - test(); - std::cout << test2() << '\n'; -} Removed: llvm/trunk/test/LLVMC/test_data/false.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/test_data/false.cpp?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/test_data/false.cpp (original) +++ llvm/trunk/test/LLVMC/test_data/false.cpp (removed) @@ -1,16 +0,0 @@ -#include - -/* Make this invalid C++ */ -typedef struct { - int i; - char c; -} a; - -static a b = { .i = 65, .c = 'r'}; - -void test() { - b.i = 9; - fflush(stdout); - printf("el"); -} - Removed: llvm/trunk/test/LLVMC/test_data/false2.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/test_data/false2.cpp?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/test_data/false2.cpp (original) +++ llvm/trunk/test/LLVMC/test_data/false2.cpp (removed) @@ -1,5 +0,0 @@ -#include - -std::string test2() { - return "lo"; -} Removed: llvm/trunk/test/LLVMC/test_data/together.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/test_data/together.c?rev=140092&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/test_data/together.c (original) +++ llvm/trunk/test/LLVMC/test_data/together.c (removed) @@ -1,5 +0,0 @@ -#include - -void test() { - printf("hello\n"); -} Modified: llvm/trunk/tools/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/Makefile?rev=140093&r1=140092&r2=140093&view=diff ============================================================================== --- llvm/trunk/tools/Makefile (original) +++ llvm/trunk/tools/Makefile Mon Sep 19 18:22:41 2011 @@ -25,7 +25,7 @@ llvm-ld llvm-prof llvm-link \ lli llvm-extract llvm-mc \ bugpoint llvm-bcanalyzer llvm-stub \ - llvmc llvm-diff macho-dump llvm-objdump \ + llvm-diff macho-dump llvm-objdump \ llvm-rtdyld llvm-dwarfdump # Let users override the set of tools to build from the command line. Removed: llvm/trunk/tools/llvmc/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/CMakeLists.txt?rev=140092&view=auto ============================================================================== --- llvm/trunk/tools/llvmc/CMakeLists.txt (original) +++ llvm/trunk/tools/llvmc/CMakeLists.txt (removed) @@ -1,8 +0,0 @@ -add_subdirectory(src) - -# TODO: support plugins and user-configured builds. -# See ./doc/LLVMC-Reference.rst "Customizing LLVMC: the compilation graph" - -if( LLVM_INCLUDE_EXAMPLES ) - add_subdirectory(examples) -endif() Removed: llvm/trunk/tools/llvmc/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/Makefile?rev=140092&view=auto ============================================================================== --- llvm/trunk/tools/llvmc/Makefile (original) +++ llvm/trunk/tools/llvmc/Makefile (removed) @@ -1,18 +0,0 @@ -##===- tools/llvmc/Makefile --------------------------------*- Makefile -*-===## -# -# The LLVM Compiler Infrastructure -# -# This file is distributed under the University of Illinois Open -# Source License. See LICENSE.TXT for details. -# -##===----------------------------------------------------------------------===## - -LEVEL = ../.. - -DIRS = src - -ifeq ($(BUILD_EXAMPLES),1) - OPTIONAL_DIRS += examples -endif - -include $(LEVEL)/Makefile.common Removed: llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst?rev=140092&view=auto ============================================================================== --- llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst (original) +++ llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst (removed) @@ -1,747 +0,0 @@ -=================================== -Customizing LLVMC: Reference Manual -=================================== -.. - This file was automatically generated by rst2html. - Please do not edit directly! - The ReST source lives in the directory 'tools/llvmc/doc'. - -.. contents:: - -.. raw:: html - -
-

Written by Mikhail Glushenkov

-
- -Introduction -============ - -LLVMC is a generic compiler driver, designed to be customizable and -extensible. It plays the same role for LLVM as the ``gcc`` program does for -GCC - LLVMC's job is essentially to transform a set of input files into a set of -targets depending on configuration rules and user options. What makes LLVMC -different is that these transformation rules are completely customizable - in -fact, LLVMC knows nothing about the specifics of transformation (even the -command-line options are mostly not hard-coded) and regards the transformation -structure as an abstract graph. The structure of this graph is described in -high-level TableGen code, from which an efficient C++ representation is -automatically derived. This makes it possible to adapt LLVMC for other -purposes - for example, as a build tool for game resources. - -Because LLVMC employs TableGen_ as its configuration language, you -need to be familiar with it to customize LLVMC. - -.. _TableGen: http://llvm.org/docs/TableGenFundamentals.html - - -Compiling with ``llvmc`` -======================== - -LLVMC tries hard to be as compatible with ``gcc`` as possible, -although there are some small differences. Most of the time, however, -you shouldn't be able to notice them:: - - $ # This works as expected: - $ llvmc -O3 -Wall hello.cpp - $ ./a.out - hello - -One nice feature of LLVMC is that one doesn't have to distinguish between -different compilers for different languages (think ``g++`` vs. ``gcc``) - the -right toolchain is chosen automatically based on input language names (which -are, in turn, determined from file extensions). If you want to force files -ending with ".c" to compile as C++, use the ``-x`` option, just like you would -do it with ``gcc``:: - - $ # hello.c is really a C++ file - $ llvmc -x c++ hello.c - $ ./a.out - hello - -On the other hand, when using LLVMC as a linker to combine several C++ -object files you should provide the ``--linker`` option since it's -impossible for LLVMC to choose the right linker in that case:: - - $ llvmc -c hello.cpp - $ llvmc hello.o - [A lot of link-time errors skipped] - $ llvmc --linker=c++ hello.o - $ ./a.out - hello - -By default, LLVMC uses ``llvm-gcc`` to compile the source code. It is also -possible to choose the ``clang`` compiler with the ``-clang`` option. - - -Predefined options -================== - -LLVMC has some built-in options that can't be overridden in the TableGen code: - -* ``-o FILE`` - Output file name. - -* ``-x LANGUAGE`` - Specify the language of the following input files - until the next -x option. - -* ``-v`` - Enable verbose mode, i.e. print out all executed commands. - -* ``--save-temps`` - Write temporary files to the current directory and do not - delete them on exit. This option can also take an argument: the - ``--save-temps=obj`` switch will write files into the directory specified with - the ``-o`` option. The ``--save-temps=cwd`` and ``--save-temps`` switches are - both synonyms for the default behaviour. - -* ``--temp-dir DIRECTORY`` - Store temporary files in the given directory. This - directory is deleted on exit unless ``--save-temps`` is specified. If - ``--save-temps=obj`` is also specified, ``--temp-dir`` is given the - precedence. - -* ``--check-graph`` - Check the compilation for common errors like mismatched - output/input language names, multiple default edges and cycles. Exit with code - zero if no errors were found, and return the number of found errors - otherwise. Hidden option, useful for debugging. - -* ``--view-graph`` - Show a graphical representation of the compilation graph - and exit. Requires that you have ``dot`` and ``gv`` programs installed. Hidden - option, useful for debugging. - -* ``--write-graph`` - Write a ``compilation-graph.dot`` file in the current - directory with the compilation graph description in Graphviz format (identical - to the file used by the ``--view-graph`` option). The ``-o`` option can be - used to set the output file name. Hidden option, useful for debugging. - -* ``--help``, ``--help-hidden``, ``--version`` - These options have - their standard meaning. - -Compiling LLVMC-based drivers -============================= - -It's easiest to start working on your own LLVMC driver by copying the skeleton -project which lives under ``$LLVMC_DIR/examples/Skeleton``:: - - $ cd $LLVMC_DIR/examples - $ cp -r Skeleton MyDriver - $ cd MyDriver - $ ls - AutoGenerated.td Hooks.cpp Main.cpp Makefile - -As you can see, our basic driver consists of only three files (not counting the -build script). ``AutoGenerated.td`` contains TableGen description of the -compilation graph; its format is documented in the following -sections. ``Hooks.cpp`` is an empty file that should be used for hook -definitions (see `below`__). ``Main.cpp`` is just a helper used to compile the -auto-generated C++ code produced from TableGen source. - -__ hooks_ - -The first thing that you should do is to change the ``LLVMC_BASED_DRIVER`` -variable in the ``Makefile``:: - - LLVMC_BASED_DRIVER=MyDriver - -It can also be a good idea to put your TableGen code into a file with a less -generic name:: - - $ touch MyDriver.td - $ vim AutoGenerated.td - [...] - include "MyDriver.td" - -If you have more than one TableGen source file, they all should be included from -``AutoGenerated.td``, since this file is used by the build system to generate -C++ code. - -To build your driver, just ``cd`` to its source directory and run ``make``. The -resulting executable will be put into ``$LLVM_OBJ_DIR/$(BuildMode)/bin``. - -If you're compiling LLVM with different source and object directories, then you -must perform the following additional steps before running ``make``:: - - # LLVMC_SRC_DIR = $LLVM_SRC_DIR/tools/llvmc/ - # LLVMC_OBJ_DIR = $LLVM_OBJ_DIR/tools/llvmc/ - $ mkdir $LLVMC_OBJ_DIR/examples/MyDriver/ - $ cp $LLVMC_SRC_DIR/examples/MyDriver/Makefile \ - $LLVMC_OBJ_DIR/examples/MyDriver/ - $ cd $LLVMC_OBJ_DIR/examples/MyDriver - $ make - - -Customizing LLVMC: the compilation graph -======================================== - -Each TableGen configuration file should include the common definitions:: - - include "llvm/CompilerDriver/Common.td" - -Internally, LLVMC stores information about possible source transformations in -form of a graph. Nodes in this graph represent tools, and edges between two -nodes represent a transformation path. A special "root" node is used to mark -entry points for the transformations. LLVMC also assigns a weight to each edge -(more on this later) to choose between several alternative edges. - -The definition of the compilation graph (see file ``llvmc/src/Base.td`` for an -example) is just a list of edges:: - - def CompilationGraph : CompilationGraph<[ - Edge<"root", "llvm_gcc_c">, - Edge<"root", "llvm_gcc_assembler">, - ... - - Edge<"llvm_gcc_c", "llc">, - Edge<"llvm_gcc_cpp", "llc">, - ... - - OptionalEdge<"llvm_gcc_c", "opt", (case (switch_on "opt"), - (inc_weight))>, - OptionalEdge<"llvm_gcc_cpp", "opt", (case (switch_on "opt"), - (inc_weight))>, - ... - - OptionalEdge<"llvm_gcc_assembler", "llvm_gcc_cpp_linker", - (case (input_languages_contain "c++"), (inc_weight), - (or (parameter_equals "linker", "g++"), - (parameter_equals "linker", "c++")), (inc_weight))>, - ... - - ]>; - -As you can see, the edges can be either default or optional, where optional -edges are differentiated by an additional ``case`` expression used to calculate -the weight of this edge. Notice also that we refer to tools via their names (as -strings). This makes it possible to add edges to an existing compilation graph -without having to know about all tool definitions used in the graph. - -The default edges are assigned a weight of 1, and optional edges get a weight of -0 + 2*N where N is the number of tests that evaluated to true in the ``case`` -expression. It is also possible to provide an integer parameter to -``inc_weight`` and ``dec_weight`` - in this case, the weight is increased (or -decreased) by the provided value instead of the default 2. Default weight of an -optional edge can be changed by using the ``default`` clause of the ``case`` -construct. - -When passing an input file through the graph, LLVMC picks the edge with the -maximum weight. To avoid ambiguity, there should be only one default edge -between two nodes (with the exception of the root node, which gets a special -treatment - there you are allowed to specify one default edge *per language*). - -When multiple compilation graphs are defined, they are merged together. Multiple -edges with the same end nodes are not allowed (i.e. the graph is not a -multigraph), and will lead to a compile-time error. - -To get a visual representation of the compilation graph (useful for debugging), -run ``llvmc --view-graph``. You will need ``dot`` and ``gsview`` installed for -this to work properly. - -Describing options -================== - -Command-line options supported by the driver are defined by using an -``OptionList``:: - - def Options : OptionList<[ - (switch_option "E", (help "Help string")), - (alias_option "quiet", "q") - ... - ]>; - -As you can see, the option list is just a list of DAGs, where each DAG is an -option description consisting of the option name and some properties. More than -one option list can be defined (they are all merged together in the end), which -can be handy if one wants to separate option groups syntactically. - -* Possible option types: - - - ``switch_option`` - a simple boolean switch without arguments, for example - ``-O2`` or ``-time``. At most one occurrence is allowed by default. - - - ``parameter_option`` - option that takes one argument, for example - ``-std=c99``. It is also allowed to use spaces instead of the equality - sign: ``-std c99``. At most one occurrence is allowed. - - - ``parameter_list_option`` - same as the above, but more than one option - occurrence is allowed. - - - ``prefix_option`` - same as the parameter_option, but the option name and - argument do not have to be separated. Example: ``-ofile``. This can be also - specified as ``-o file``; however, ``-o=file`` will be parsed incorrectly - (``=file`` will be interpreted as option value). At most one occurrence is - allowed. - - - ``prefix_list_option`` - same as the above, but more than one occurrence of - the option is allowed; example: ``-lm -lpthread``. - - - ``alias_option`` - a special option type for creating aliases. Unlike other - option types, aliases are not allowed to have any properties besides the - aliased option name. - Usage example: ``(alias_option "preprocess", "E")`` - - - ``switch_list_option`` - like ``switch_option`` with the ``zero_or_more`` - property, but remembers how many times the switch was turned on. Useful - mostly for forwarding. Example: when ``-foo`` is a switch option (with the - ``zero_or_more`` property), the command ``driver -foo -foo`` is forwarded - as ``some-tool -foo``, but when ``-foo`` is a switch list, the same command - is forwarded as ``some-tool -foo -foo``. - - -* Possible option properties: - - - ``help`` - help string associated with this option. Used for ``--help`` - output. - - - ``required`` - this option must be specified exactly once (or, in case of - the list options without the ``multi_val`` property, at least - once). Incompatible with ``optional`` and ``one_or_more``. - - - ``optional`` - the option can be specified either zero times or exactly - once. The default for switch options. Useful only for list options in - conjunction with ``multi_val``. Incompatible with ``required``, - ``zero_or_more`` and ``one_or_more``. - - - ``one_or_more`` - the option must be specified at least once. Can be useful - to allow switch options be both obligatory and be specified multiple - times. For list options is useful only in conjunction with ``multi_val``; - for ordinary it is synonymous with ``required``. Incompatible with - ``required``, ``optional`` and ``zero_or_more``. - - - ``zero_or_more`` - the option can be specified zero or more times. Useful - to allow a single switch option to be specified more than - once. Incompatible with ``required``, ``optional`` and ``one_or_more``. - - - ``hidden`` - the description of this option will not appear in - the ``--help`` output (but will appear in the ``--help-hidden`` - output). - - - ``really_hidden`` - the option will not be mentioned in any help - output. - - - ``comma_separated`` - Indicates that any commas specified for an option's - value should be used to split the value up into multiple values for the - option. This property is valid only for list options. In conjunction with - ``forward_value`` can be used to implement option forwarding in style of - gcc's ``-Wa,``. - - - ``multi_val n`` - this option takes *n* arguments (can be useful in some - special cases). Usage example: ``(parameter_list_option "foo", (multi_val - 3))``; the command-line syntax is '-foo a b c'. Only list options can have - this attribute; you can, however, use the ``one_or_more``, ``optional`` - and ``required`` properties. - - - ``init`` - this option has a default value, either a string (if it is a - parameter), or a boolean (if it is a switch; as in C++, boolean constants - are called ``true`` and ``false``). List options can't have ``init`` - attribute. - Usage examples: ``(switch_option "foo", (init true))``; ``(prefix_option - "bar", (init "baz"))``. - -.. _case: - -Conditional evaluation -====================== - -The 'case' construct is the main means by which programmability is achieved in -LLVMC. It can be used to calculate edge weights, program actions and modify the -shell commands to be executed. The 'case' expression is designed after the -similarly-named construct in functional languages and takes the form ``(case -(test_1), statement_1, (test_2), statement_2, ... (test_N), statement_N)``. The -statements are evaluated only if the corresponding tests evaluate to true. - -Examples:: - - // Edge weight calculation - - // Increases edge weight by 5 if "-A" is provided on the - // command-line, and by 5 more if "-B" is also provided. - (case - (switch_on "A"), (inc_weight 5), - (switch_on "B"), (inc_weight 5)) - - - // Tool command line specification - - // Evaluates to "cmdline1" if the option "-A" is provided on the - // command line; to "cmdline2" if "-B" is provided; - // otherwise to "cmdline3". - - (case - (switch_on "A"), "cmdline1", - (switch_on "B"), "cmdline2", - (default), "cmdline3") - -Note the slight difference in 'case' expression handling in contexts of edge -weights and command line specification - in the second example the value of the -``"B"`` switch is never checked when switch ``"A"`` is enabled, and the whole -expression always evaluates to ``"cmdline1"`` in that case. - -Case expressions can also be nested, i.e. the following is legal:: - - (case (switch_on "E"), (case (switch_on "o"), ..., (default), ...) - (default), ...) - -You should, however, try to avoid doing that because it hurts readability. It is -usually better to split tool descriptions and/or use TableGen inheritance -instead. - -* Possible tests are: - - - ``switch_on`` - Returns true if a given command-line switch is provided by - the user. Can be given multiple arguments, in that case ``(switch_on "foo", - "bar", "baz")`` is equivalent to ``(and (switch_on "foo"), (switch_on - "bar"), (switch_on "baz"))``. - Example: ``(switch_on "opt")``. - - - ``any_switch_on`` - Given a number of switch options, returns true if any of - the switches is turned on. - Example: ``(any_switch_on "foo", "bar", "baz")`` is equivalent to ``(or - (switch_on "foo"), (switch_on "bar"), (switch_on "baz"))``. - - - ``parameter_equals`` - Returns true if a command-line parameter (first - argument) equals a given value (second argument). - Example: ``(parameter_equals "W", "all")``. - - - ``element_in_list`` - Returns true if a command-line parameter list (first - argument) contains a given value (second argument). - Example: ``(element_in_list "l", "pthread")``. - - - ``input_languages_contain`` - Returns true if a given language - belongs to the current input language set. - Example: ``(input_languages_contain "c++")``. - - - ``in_language`` - Evaluates to true if the input file language is equal to - the argument. At the moment works only with ``command`` and ``actions`` (on - non-join nodes). - Example: ``(in_language "c++")``. - - - ``not_empty`` - Returns true if a given option (which should be either a - parameter or a parameter list) is set by the user. Like ``switch_on``, can - be also given multiple arguments. - Examples: ``(not_empty "o")``, ``(not_empty "o", "l")``. - - - ``any_not_empty`` - Returns true if ``not_empty`` returns true for any of - the provided options. - Example: ``(any_not_empty "foo", "bar", "baz")`` is equivalent to ``(or - (not_empty "foo"), (not_empty "bar"), (not_empty "baz"))``. - - - ``empty`` - The opposite of ``not_empty``. Equivalent to ``(not (not_empty - X))``. Can be given multiple arguments. - - - ``any_not_empty`` - Returns true if ``not_empty`` returns true for any of - the provided options. - Example: ``(any_empty "foo", "bar", "baz")`` is equivalent to ``(or - (not_empty "foo"), (not_empty "bar"), (not_empty "baz"))``. - - - ``single_input_file`` - Returns true if there was only one input file - provided on the command-line. Used without arguments: - ``(single_input_file)``. - - - ``multiple_input_files`` - Equivalent to ``(not (single_input_file))`` (the - case of zero input files is considered an error). - - - ``default`` - Always evaluates to true. Should always be the last - test in the ``case`` expression. - - - ``and`` - A standard logical combinator that returns true iff all of - its arguments return true. Used like this: ``(and (test1), (test2), - ... (testN))``. Nesting of ``and`` and ``or`` is allowed, but not - encouraged. - - - ``or`` - A logical combinator that returns true iff any of its arguments - return true. - Example: ``(or (test1), (test2), ... (testN))``. - - - ``not`` - Standard unary logical combinator that negates its - argument. - Example: ``(not (or (test1), (test2), ... (testN)))``. - - -Writing a tool description -========================== - -As was said earlier, nodes in the compilation graph represent tools, which are -described separately. A tool definition looks like this (taken from the -``llvmc/src/Base.td`` file):: - - def llvm_gcc_cpp : Tool<[ - (in_language "c++"), - (out_language "llvm-assembler"), - (output_suffix "bc"), - (command "llvm-g++ -c -emit-llvm"), - (sink) - ]>; - -This defines a new tool called ``llvm_gcc_cpp``, which is an alias for -``llvm-g++``. As you can see, a tool definition is just a list of properties; -most of them should be self-explanatory. The ``sink`` property means that this -tool should be passed all command-line options that aren't mentioned in the -option list. - -The complete list of all currently implemented tool properties follows. - -* Possible tool properties: - - - ``in_language`` - input language name. Can be given multiple arguments, in - case the tool supports multiple input languages. Used for typechecking and - mapping file extensions to tools. - - - ``out_language`` - output language name. Multiple output languages are - allowed. Used for typechecking the compilation graph. - - - ``output_suffix`` - output file suffix. Can also be changed dynamically, see - documentation on `actions`__. - -__ actions_ - - - ``command`` - the actual command used to run the tool. You can use output - redirection with ``>``, hook invocations (``$CALL``), environment variables - (via ``$ENV``) and the ``case`` construct. - - - ``join`` - this tool is a "join node" in the graph, i.e. it gets a list of - input files and joins them together. Used for linkers. - - - ``sink`` - all command-line options that are not handled by other tools are - passed to this tool. - - - ``actions`` - A single big ``case`` expression that specifies how this tool - reacts on command-line options (described in more detail `below`__). - -__ actions_ - - - ``out_file_option``, ``in_file_option`` - Options appended to the - ``command`` string to designate output and input files. Default values are - ``"-o"`` and ``""``, respectively. - -.. _actions: - -Actions -------- - -A tool often needs to react to command-line options, and this is precisely what -the ``actions`` property is for. The next example illustrates this feature:: - - def llvm_gcc_linker : Tool<[ - (in_language "object-code"), - (out_language "executable"), - (output_suffix "out"), - (command "llvm-gcc"), - (join), - (actions (case (not_empty "L"), (forward "L"), - (not_empty "l"), (forward "l"), - (not_empty "dummy"), - [(append_cmd "-dummy1"), (append_cmd "-dummy2")]) - ]>; - -The ``actions`` tool property is implemented on top of the omnipresent ``case`` -expression. It associates one or more different *actions* with given -conditions - in the example, the actions are ``forward``, which forwards a given -option unchanged, and ``append_cmd``, which appends a given string to the tool -execution command. Multiple actions can be associated with a single condition by -using a list of actions (used in the example to append some dummy options). The -same ``case`` construct can also be used in the ``cmd_line`` property to modify -the tool command line. - -The "join" property used in the example means that this tool behaves like a -linker. - -The list of all possible actions follows. - -* Possible actions: - - - ``append_cmd`` - Append a string to the tool invocation command. - Example: ``(case (switch_on "pthread"), (append_cmd "-lpthread"))``. - - - ``error`` - Exit with error. - Example: ``(error "Mixing -c and -S is not allowed!")``. - - - ``warning`` - Print a warning. - Example: ``(warning "Specifying both -O1 and -O2 is meaningless!")``. - - - ``forward`` - Forward the option unchanged. - Example: ``(forward "Wall")``. - - - ``forward_as`` - Change the option's name, but forward the argument - unchanged. - Example: ``(forward_as "O0", "--disable-optimization")``. - - - ``forward_value`` - Forward only option's value. Cannot be used with switch - options (since they don't have values), but works fine with lists. - Example: ``(forward_value "Wa,")``. - - - ``forward_transformed_value`` - As above, but applies a hook to the - option's value before forwarding (see `below`__). When - ``forward_transformed_value`` is applied to a list - option, the hook must have signature - ``std::string hooks::HookName (const std::vector&)``. - Example: ``(forward_transformed_value "m", "ConvertToMAttr")``. - - __ hooks_ - - - ``output_suffix`` - Modify the output suffix of this tool. - Example: ``(output_suffix "i")``. - - - ``stop_compilation`` - Stop compilation after this tool processes its - input. Used without arguments. - Example: ``(stop_compilation)``. - - -Language map -============ - -If you are adding support for a new language to LLVMC, you'll need to modify the -language map, which defines mappings from file extensions to language names. It -is used to choose the proper toolchain(s) for a given input file set. Language -map definition looks like this:: - - def LanguageMap : LanguageMap< - [LangToSuffixes<"c++", ["cc", "cp", "cxx", "cpp", "CPP", "c++", "C"]>, - LangToSuffixes<"c", ["c"]>, - ... - ]>; - -For example, without those definitions the following command wouldn't work:: - - $ llvmc hello.cpp - llvmc: Unknown suffix: cpp - -The language map entries are needed only for the tools that are linked from the -root node. A tool can have multiple output languages. - -Option preprocessor -=================== - -It is sometimes useful to run error-checking code before processing the -compilation graph. For example, if optimization options "-O1" and "-O2" are -implemented as switches, we might want to output a warning if the user invokes -the driver with both of these options enabled. - -The ``OptionPreprocessor`` feature is reserved specially for these -occasions. Example (adapted from ``llvm/src/Base.td.in``):: - - - def Preprocess : OptionPreprocessor< - (case (not (any_switch_on "O0", "O1", "O2", "O3")), - (set_option "O2"), - (and (switch_on "O3"), (any_switch_on "O0", "O1", "O2")), - (unset_option "O0", "O1", "O2"), - (and (switch_on "O2"), (any_switch_on "O0", "O1")), - (unset_option "O0", "O1"), - (and (switch_on "O1"), (switch_on "O0")), - (unset_option "O0")) - >; - -Here, ``OptionPreprocessor`` is used to unset all spurious ``-O`` options so -that they are not forwarded to the compiler. If no optimization options are -specified, ``-O2`` is enabled. - -``OptionPreprocessor`` is basically a single big ``case`` expression, which is -evaluated only once right after the driver is started. The only allowed actions -in ``OptionPreprocessor`` are ``error``, ``warning``, and two special actions: -``unset_option`` and ``set_option``. As their names suggest, they can be used to -set or unset a given option. To set an option with ``set_option``, use the -two-argument form: ``(set_option "parameter", VALUE)``. Here, ``VALUE`` can be -either a string, a string list, or a boolean constant. - -For convenience, ``set_option`` and ``unset_option`` also work with multiple -arguments. That is, instead of ``[(unset_option "A"), (unset_option "B")]`` you -can use ``(unset_option "A", "B")``. Obviously, ``(set_option "A", "B")`` is -only valid if both ``A`` and ``B`` are switches. - - -More advanced topics -==================== - -.. _hooks: - -Hooks and environment variables -------------------------------- - -Normally, LLVMC searches for programs in the system ``PATH``. Sometimes, this is -not sufficient: for example, we may want to specify tool paths or names in the -configuration file. This can be achieved via the hooks mechanism. To write your -own hooks, add their definitions to the ``Hooks.cpp`` or drop a ``.cpp`` file -into your driver directory. Hooks should live in the ``hooks`` namespace and -have the signature ``std::string hooks::MyHookName ([const char* Arg0 [ const -char* Arg2 [, ...]]])``. They can be used from the ``command`` tool property:: - - (command "$CALL(MyHook)/path/to/file -o $CALL(AnotherHook)") - -To pass arguments to hooks, use the following syntax:: - - (command "$CALL(MyHook, 'Arg1', 'Arg2', 'Arg # 3')/path/to/file -o1 -o2") - -It is also possible to use environment variables in the same manner:: - - (command "$ENV(VAR1)/path/to/file -o $ENV(VAR2)") - -To change the command line string based on user-provided options use -the ``case`` expression (documented `above`__):: - - (command - (case - (switch_on "E"), - "llvm-g++ -E -x c $INFILE -o $OUTFILE", - (default), - "llvm-g++ -c -x c $INFILE -o $OUTFILE -emit-llvm")) - -__ case_ - -Debugging ---------- - -When writing LLVMC-based drivers, it can be useful to get a visual view of the -resulting compilation graph. This can be achieved via the command line option -``--view-graph`` (which assumes that Graphviz_ and Ghostview_ are -installed). There is also a ``--write-graph`` option that creates a Graphviz -source file (``compilation-graph.dot``) in the current directory. - -Another useful ``llvmc`` option is ``--check-graph``. It checks the compilation -graph for common errors like mismatched output/input language names, multiple -default edges and cycles. When invoked with ``--check-graph``, ``llvmc`` doesn't -perform any compilation tasks and returns the number of encountered errors as -its status code. In the future, these checks will be performed at compile-time -and this option will disappear. - -.. _Graphviz: http://www.graphviz.org/ -.. _Ghostview: http://pages.cs.wisc.edu/~ghost/ - -Conditioning on the executable name ------------------------------------ - -For now, the executable name (the value passed to the driver in ``argv[0]``) is -accessible only in the C++ code (i.e. hooks). Use the following code:: - - namespace llvmc { - extern const char* ProgramName; - } - - namespace hooks { - - std::string MyHook() { - //... - if (strcmp(ProgramName, "mydriver") == 0) { - //... - - } - - } // end namespace hooks - -In general, you're encouraged not to make the behaviour dependent on the -executable file name, and use command-line switches instead. See for example how -the ``llvmc`` program behaves when it needs to choose the correct linker options -(think ``g++`` vs. ``gcc``). - -.. raw:: html - -
-
- - Valid CSS - - Valid XHTML 1.0 Transitional - - Mikhail Glushenkov
- LLVM Compiler Infrastructure
- - Last modified: $Date: 2008-12-11 11:34:48 -0600 (Thu, 11 Dec 2008) $ -
Removed: llvm/trunk/tools/llvmc/doc/LLVMC-Tutorial.rst URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/doc/LLVMC-Tutorial.rst?rev=140092&view=auto ============================================================================== --- llvm/trunk/tools/llvmc/doc/LLVMC-Tutorial.rst (original) +++ llvm/trunk/tools/llvmc/doc/LLVMC-Tutorial.rst (removed) @@ -1,127 +0,0 @@ -====================== -Tutorial - Using LLVMC -====================== -.. - This file was automatically generated by rst2html. - Please do not edit directly! - The ReST source lives in the directory 'tools/llvmc/doc'. - -.. contents:: - -.. raw:: html - -
-

Written by Mikhail Glushenkov

-
- -Introduction -============ - -LLVMC is a generic compiler driver, which plays the same role for LLVM as the -``gcc`` program does for GCC - the difference being that LLVMC is designed to be -more adaptable and easier to customize. Most of LLVMC functionality is -implemented via high-level TableGen code, from which a corresponding C++ source -file is automatically generated. This tutorial describes the basic usage and -configuration of LLVMC. - - -Using the ``llvmc`` program -=========================== - -In general, ``llvmc`` tries to be command-line compatible with ``gcc`` as much -as possible, so most of the familiar options work:: - - $ llvmc -O3 -Wall hello.cpp - $ ./a.out - hello - -This will invoke ``llvm-g++`` under the hood (you can see which commands are -executed by using the ``-v`` option). For further help on command-line LLVMC -usage, refer to the ``llvmc --help`` output. - - -Using LLVMC to generate toolchain drivers -========================================= - -LLVMC-based drivers are written mostly using TableGen_, so you need to be -familiar with it to get anything done. - -.. _TableGen: http://llvm.org/docs/TableGenFundamentals.html - -Start by compiling ``example/Simple``, which is a primitive wrapper for -``gcc``:: - - $ cd $LLVM_OBJ_DIR/tools/examples/Simple - $ make - $ cat > hello.c - #include - int main() { printf("Hello\n"); } - $ $LLVM_BIN_DIR/Simple -v hello.c - gcc hello.c -o hello.out - $ ./hello.out - Hello - -We have thus produced a simple driver called, appropriately, ``Simple``, from -the input TableGen file ``Simple.td``. The ``llvmc`` program itself is generated -using a similar process (see ``llvmc/src``). Contents of the file ``Simple.td`` -look like this:: - - // Include common definitions - include "llvm/CompilerDriver/Common.td" - - // Tool descriptions - def gcc : Tool< - [(in_language "c"), - (out_language "executable"), - (output_suffix "out"), - (command "gcc"), - (sink), - - // -o is what is used by default, out_file_option here is included for - // instructive purposes. - (out_file_option "-o") - ]>; - - // Language map - def LanguageMap : LanguageMap<[(lang_to_suffixes "c", "c")]>; - - // Compilation graph - def CompilationGraph : CompilationGraph<[(edge "root", "gcc")]>; - -As you can see, this file consists of three parts: tool descriptions, language -map, and the compilation graph definition. - -At the heart of LLVMC is the idea of a compilation graph: vertices in this graph -are tools, and edges represent a transformation path between two tools (for -example, assembly source produced by the compiler can be transformed into -executable code by an assembler). The compilation graph is basically a list of -edges; a special node named ``root`` is used to mark graph entry points. - -Tool descriptions are represented as property lists: most properties in the -example above should be self-explanatory; the ``sink`` property means that all -options lacking an explicit description should be forwarded to this tool. - -The ``LanguageMap`` associates a language name with a list of suffixes and is -used for deciding which toolchain corresponds to a given input file. - -To learn more about writing your own drivers with LLVMC, refer to the reference -manual and examples in the ``examples`` directory. Of a particular interest is -the ``Skeleton`` example, which can serve as a template for your LLVMC-based -drivers. - -.. raw:: html - -
-
- - Valid CSS - - Valid XHTML 1.0 Transitional - - Mikhail Glushenkov
- LLVM Compiler Infrastructure
- - Last modified: $Date: 2008-12-11 11:34:48 -0600 (Thu, 11 Dec 2008) $ -
Removed: llvm/trunk/tools/llvmc/doc/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/doc/Makefile?rev=140092&view=auto ============================================================================== --- llvm/trunk/tools/llvmc/doc/Makefile (original) +++ llvm/trunk/tools/llvmc/doc/Makefile (removed) @@ -1,33 +0,0 @@ -##===- tools/llvmc/doc/Makefile ----------------------------*- Makefile -*-===## -# -# The LLVM Compiler Infrastructure -# -# This file is distributed under the University of Illinois Open Source -# License. See LICENSE.TXT for details. -# -##===----------------------------------------------------------------------===## - -LEVEL=../../.. - -ifneq (,$(strip $(wildcard $(LEVEL)/Makefile.config))) -include $(LEVEL)/Makefile.config -else -CP=cp -RM=rm -endif - -DOC_DIR=../../../docs -RST2HTML=rst2html --stylesheet=llvm.css --link-stylesheet - -all : LLVMC-Reference.html LLVMC-Tutorial.html - $(CP) LLVMC-Reference.html $(DOC_DIR)/CompilerDriver.html - $(CP) LLVMC-Tutorial.html $(DOC_DIR)/CompilerDriverTutorial.html - -LLVMC-Tutorial.html : LLVMC-Tutorial.rst - $(RST2HTML) $< $@ - -LLVMC-Reference.html : LLVMC-Reference.rst - $(RST2HTML) $< $@ - -clean : - $(RM) LLVMC-Tutorial.html LLVMC-Reference.html Removed: llvm/trunk/tools/llvmc/doc/img/lines.gif URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/doc/img/lines.gif?rev=140092&view=auto ============================================================================== Binary files llvm/trunk/tools/llvmc/doc/img/lines.gif (original) and llvm/trunk/tools/llvmc/doc/img/lines.gif (removed) differ Removed: llvm/trunk/tools/llvmc/examples/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/examples/CMakeLists.txt?rev=140092&view=auto ============================================================================== --- llvm/trunk/tools/llvmc/examples/CMakeLists.txt (original) +++ llvm/trunk/tools/llvmc/examples/CMakeLists.txt (removed) @@ -1,4 +0,0 @@ -add_subdirectory(Hello) -add_subdirectory(Simple) -add_subdirectory(mcc16) -add_subdirectory(Skeleton) Removed: llvm/trunk/tools/llvmc/examples/Hello/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/examples/Hello/CMakeLists.txt?rev=140092&view=auto ============================================================================== --- llvm/trunk/tools/llvmc/examples/Hello/CMakeLists.txt (original) +++ llvm/trunk/tools/llvmc/examples/Hello/CMakeLists.txt (removed) @@ -1,4 +0,0 @@ -set(LLVM_USED_LIBS CompilerDriver) -set(LLVM_LINK_COMPONENTS support) - -add_llvm_example(Hello Hello.cpp) Removed: llvm/trunk/tools/llvmc/examples/Hello/Hello.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/examples/Hello/Hello.cpp?rev=140092&view=auto ============================================================================== --- llvm/trunk/tools/llvmc/examples/Hello/Hello.cpp (original) +++ llvm/trunk/tools/llvmc/examples/Hello/Hello.cpp (removed) @@ -1,29 +0,0 @@ -//===- Hello.cpp - Example code from "Writing an LLVMC Plugin" ------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// Shows how to write llvmc-based drivers without using TableGen. -// -//===----------------------------------------------------------------------===// - -#include "llvm/CompilerDriver/AutoGenerated.h" -#include "llvm/CompilerDriver/Main.inc" - -#include "llvm/Support/raw_ostream.h" - -namespace llvmc { -namespace autogenerated { - -int PreprocessOptions () { return 0; } - -int PopulateLanguageMap (LanguageMap&) { llvm::outs() << "Hello!\n"; return 0; } - -int PopulateCompilationGraph (CompilationGraph&) { return 0; } - -} -} Removed: llvm/trunk/tools/llvmc/examples/Hello/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/examples/Hello/Makefile?rev=140092&view=auto ============================================================================== --- llvm/trunk/tools/llvmc/examples/Hello/Makefile (original) +++ llvm/trunk/tools/llvmc/examples/Hello/Makefile (removed) @@ -1,14 +0,0 @@ -##===- tools/llvmc/examples/Hello/Makefile -----------------*- Makefile -*-===## -# -# The LLVM Compiler Infrastructure -# -# This file is distributed under the University of Illinois Open Source -# License. See LICENSE.TXT for details. -# -##===----------------------------------------------------------------------===## - -LEVEL = ../../../.. - -LLVMC_BASED_DRIVER = Hello - -include $(LEVEL)/Makefile.common Removed: llvm/trunk/tools/llvmc/examples/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/examples/Makefile?rev=140092&view=auto ============================================================================== --- llvm/trunk/tools/llvmc/examples/Makefile (original) +++ llvm/trunk/tools/llvmc/examples/Makefile (removed) @@ -1,14 +0,0 @@ -##===- tools/llvmc/examples/Makefile -----------------------*- Makefile -*-===## -# -# The LLVM Compiler Infrastructure -# -# This file is distributed under the University of Illinois Open Source -# License. See LICENSE.TXT for details. -# -##===----------------------------------------------------------------------===## - -LEVEL=../../.. - -PARALLEL_DIRS := Hello Simple mcc16 Skeleton - -include $(LEVEL)/Makefile.common Removed: llvm/trunk/tools/llvmc/examples/Simple/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/examples/Simple/CMakeLists.txt?rev=140092&view=auto ============================================================================== --- llvm/trunk/tools/llvmc/examples/Simple/CMakeLists.txt (original) +++ llvm/trunk/tools/llvmc/examples/Simple/CMakeLists.txt (removed) @@ -1,10 +0,0 @@ -set(LLVM_TARGET_DEFINITIONS Simple.td) - -tablegen(Simple.inc -gen-llvmc) - -set(LLVM_USED_LIBS CompilerDriver) -set(LLVM_LINK_COMPONENTS support) - -add_llvm_example(Simple - Simple.cpp - ) Removed: llvm/trunk/tools/llvmc/examples/Simple/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/examples/Simple/Makefile?rev=140092&view=auto ============================================================================== --- llvm/trunk/tools/llvmc/examples/Simple/Makefile (original) +++ llvm/trunk/tools/llvmc/examples/Simple/Makefile (removed) @@ -1,15 +0,0 @@ -##===- llvmc/examples/Simple/Makefile ----------------------*- Makefile -*-===## -# -# The LLVM Compiler Infrastructure -# -# This file is distributed under the University of Illinois Open Source -# License. See LICENSE.TXT for details. -# -##===----------------------------------------------------------------------===## - -LEVEL = ../../../.. - -LLVMC_BASED_DRIVER = Simple -BUILT_SOURCES = Simple.inc - -include $(LEVEL)/Makefile.common Removed: llvm/trunk/tools/llvmc/examples/Simple/Simple.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/examples/Simple/Simple.cpp?rev=140092&view=auto ============================================================================== --- llvm/trunk/tools/llvmc/examples/Simple/Simple.cpp (original) +++ llvm/trunk/tools/llvmc/examples/Simple/Simple.cpp (removed) @@ -1,2 +0,0 @@ -#include "llvm/CompilerDriver/Main.inc" -#include "Simple.inc" Removed: llvm/trunk/tools/llvmc/examples/Simple/Simple.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/examples/Simple/Simple.td?rev=140092&view=auto ============================================================================== --- llvm/trunk/tools/llvmc/examples/Simple/Simple.td (original) +++ llvm/trunk/tools/llvmc/examples/Simple/Simple.td (removed) @@ -1,41 +0,0 @@ -//===- Simple.td - A simple LLVMC-based driver ----------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// A simple LLVMC-based gcc wrapper. -// -// To compile, use this command: -// -// $ cd $LLVM_OBJ_DIR/tools/llvmc -// $ make BUILD_EXAMPLES=1 -// -// Run as: -// -// $ $LLVM_OBJ_DIR/$(BuildMode)/bin/Simple -// -// For instructions on how to build your own LLVMC-based driver, see -// the 'examples/Skeleton' directory. -//===----------------------------------------------------------------------===// - -include "llvm/CompilerDriver/Common.td" - -def gcc : Tool< -[(in_language "c"), - (out_language "executable"), - (output_suffix "out"), - (command "gcc"), - (sink), - - // -o is what is used by default, out_file_option here is included for - // instructive purposes. - (out_file_option "-o") -]>; - -def LanguageMap : LanguageMap<[(lang_to_suffixes "c", "c")]>; - -def CompilationGraph : CompilationGraph<[(edge "root", "gcc")]>; Removed: llvm/trunk/tools/llvmc/examples/Skeleton/AutoGenerated.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/examples/Skeleton/AutoGenerated.td?rev=140092&view=auto ============================================================================== --- llvm/trunk/tools/llvmc/examples/Skeleton/AutoGenerated.td (original) +++ llvm/trunk/tools/llvmc/examples/Skeleton/AutoGenerated.td (removed) @@ -1,7 +0,0 @@ -//===- AutoGenerated.td ------------------------------------*- tablegen -*-===// -// -// Write the TableGen description of your llvmc-based driver here. -// -//===----------------------------------------------------------------------===// - -include "llvm/CompilerDriver/Common.td" Removed: llvm/trunk/tools/llvmc/examples/Skeleton/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/examples/Skeleton/CMakeLists.txt?rev=140092&view=auto ============================================================================== --- llvm/trunk/tools/llvmc/examples/Skeleton/CMakeLists.txt (original) +++ llvm/trunk/tools/llvmc/examples/Skeleton/CMakeLists.txt (removed) @@ -1,11 +0,0 @@ -set(LLVM_TARGET_DEFINITIONS AutoGenerated.td) - -tablegen(AutoGenerated.inc -gen-llvmc) - -set(LLVM_USED_LIBS CompilerDriver) -set(LLVM_LINK_COMPONENTS support) - -add_llvm_example(llvmc-skeleton - Hooks.cpp - Main.cpp - ) Removed: llvm/trunk/tools/llvmc/examples/Skeleton/Hooks.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/examples/Skeleton/Hooks.cpp?rev=140092&view=auto ============================================================================== --- llvm/trunk/tools/llvmc/examples/Skeleton/Hooks.cpp (original) +++ llvm/trunk/tools/llvmc/examples/Skeleton/Hooks.cpp (removed) @@ -1,12 +0,0 @@ -//===--- Hooks.cpp - The LLVM Compiler Driver -------------------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open -// Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// Hook definitions should go here. -// -//===----------------------------------------------------------------------===// Removed: llvm/trunk/tools/llvmc/examples/Skeleton/Main.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/examples/Skeleton/Main.cpp?rev=140092&view=auto ============================================================================== --- llvm/trunk/tools/llvmc/examples/Skeleton/Main.cpp (original) +++ llvm/trunk/tools/llvmc/examples/Skeleton/Main.cpp (removed) @@ -1,15 +0,0 @@ -//===--- Main.cpp - The LLVM Compiler Driver -------------------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open -// Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// Just include CompilerDriver/Main.inc and AutoGenerated.inc. -// -//===----------------------------------------------------------------------===// - -#include "llvm/CompilerDriver/Main.inc" -#include "AutoGenerated.inc" Removed: llvm/trunk/tools/llvmc/examples/Skeleton/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/examples/Skeleton/Makefile?rev=140092&view=auto ============================================================================== --- llvm/trunk/tools/llvmc/examples/Skeleton/Makefile (original) +++ llvm/trunk/tools/llvmc/examples/Skeleton/Makefile (removed) @@ -1,20 +0,0 @@ -##===- llvmc/examples/Skeleton/Makefile --------------------*- Makefile -*-===## -# -# The LLVM Compiler Infrastructure -# -# This file is distributed under the University of Illinois Open -# Source License. See LICENSE.TXT for details. -# -##===----------------------------------------------------------------------===## - -# Change this so that $(LEVEL)/Makefile.common refers to -# $LLVM_OBJ_DIR/Makefile.common or $YOUR_LLVM_BASED_PROJECT/Makefile.common. -export LEVEL = ../../../.. - -# Change this to the name of your LLVMC-based driver. -LLVMC_BASED_DRIVER = llvmc-skeleton - -# Change this to the name of .inc file built from your .td file. -BUILT_SOURCES = AutoGenerated.inc - -include $(LEVEL)/Makefile.common Removed: llvm/trunk/tools/llvmc/examples/Skeleton/README URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/examples/Skeleton/README?rev=140092&view=auto ============================================================================== --- llvm/trunk/tools/llvmc/examples/Skeleton/README (original) +++ llvm/trunk/tools/llvmc/examples/Skeleton/README (removed) @@ -1,6 +0,0 @@ - -This is a template that can be used to create your own LLVMC-based drivers. Just -copy the `Skeleton` directory to the location of your preference and edit -`Skeleton/Makefile` and `Skeleton/AutoGenerated.td`. - -The build system assumes that your project is based on LLVM. Removed: llvm/trunk/tools/llvmc/examples/mcc16/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/examples/mcc16/CMakeLists.txt?rev=140092&view=auto ============================================================================== --- llvm/trunk/tools/llvmc/examples/mcc16/CMakeLists.txt (original) +++ llvm/trunk/tools/llvmc/examples/mcc16/CMakeLists.txt (removed) @@ -1,11 +0,0 @@ -set(LLVM_TARGET_DEFINITIONS PIC16.td) - -tablegen(PIC16.inc -gen-llvmc) - -set(LLVM_USED_LIBS CompilerDriver) -set(LLVM_LINK_COMPONENTS support) - -add_llvm_example(mcc16 - Hooks.cpp - Main.cpp - ) Removed: llvm/trunk/tools/llvmc/examples/mcc16/Hooks.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/examples/mcc16/Hooks.cpp?rev=140092&view=auto ============================================================================== --- llvm/trunk/tools/llvmc/examples/mcc16/Hooks.cpp (original) +++ llvm/trunk/tools/llvmc/examples/mcc16/Hooks.cpp (removed) @@ -1,112 +0,0 @@ -#include "llvm/Support/Path.h" -#include "llvm/Support/CommandLine.h" -#include "llvm/Support/raw_ostream.h" - -#include -#include - -namespace llvmc { - extern const char *ProgramName; - - namespace autogenerated { - extern llvm::cl::opt Parameter_p; - } -} - -using namespace llvm; -using namespace llvmc; - -// Returns the platform specific directory separator via #ifdefs. -// FIXME: This currently work on linux and windows only. It does not -// work on other unices. -static std::string GetDirSeparator() { -#if __linux__ || __APPLE__ - return "/"; -#else - return "\\"; -#endif -} - -namespace hooks { -// Get preprocessor define for the part. -// It is __partname format in lower case. -std::string -GetLowerCasePartDefine(void) { - std::locale loc; - std::string Partname; - if (autogenerated::Parameter_p.empty()) { - Partname = "16f1xxx"; - } else { - Partname = autogenerated::Parameter_p; - } - - std::string LowerCase; - for (unsigned i = 0; i < Partname.size(); i++) { - LowerCase.push_back(std::tolower(Partname[i], loc)); - } - - return "__" + LowerCase; -} - -std::string -GetUpperCasePartDefine(void) { - std::locale loc; - std::string Partname; - if (autogenerated::Parameter_p.empty()) { - Partname = "16f1xxx"; - } else { - Partname = autogenerated::Parameter_p; - } - - std::string UpperCase; - for (unsigned i = 0; i < Partname.size(); i++) { - UpperCase.push_back(std::toupper(Partname[i], loc)); - } - - return "__" + UpperCase; -} - -// Get the dir where c16 executables reside. -std::string GetBinDir() { - // Construct a Path object from the program name. - void *P = (void*) (intptr_t) GetBinDir; - sys::Path ProgramFullPath - = sys::Path::GetMainExecutable(llvmc::ProgramName, P); - - // Get the dir name for the program. It's last component should be 'bin'. - std::string BinDir = ProgramFullPath.getDirname(); - - // llvm::errs() << "BinDir: " << BinDir << '\n'; - return BinDir + GetDirSeparator(); -} - -// Get the Top-level Installation dir for c16. -std::string GetInstallDir() { - sys::Path BinDirPath = sys::Path(GetBinDir()); - - // Go one more level up to get the install dir. - std::string InstallDir = BinDirPath.getDirname(); - - return InstallDir + GetDirSeparator(); -} - -// Get the dir where the c16 header files reside. -std::string GetStdHeadersDir() { - return GetInstallDir() + "include"; -} - -// Get the dir where the assembler header files reside. -std::string GetStdAsmHeadersDir() { - return GetInstallDir() + "inc"; -} - -// Get the dir where the linker scripts reside. -std::string GetStdLinkerScriptsDir() { - return GetInstallDir() + "lkr"; -} - -// Get the dir where startup code, intrinsics and lib reside. -std::string GetStdLibsDir() { - return GetInstallDir() + "lib"; -} -} Removed: llvm/trunk/tools/llvmc/examples/mcc16/Main.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/examples/mcc16/Main.cpp?rev=140092&view=auto ============================================================================== --- llvm/trunk/tools/llvmc/examples/mcc16/Main.cpp (original) +++ llvm/trunk/tools/llvmc/examples/mcc16/Main.cpp (removed) @@ -1,57 +0,0 @@ -//===--- Main.cpp - The LLVM Compiler Driver -------------------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open -// Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// Usually this file just includes CompilerDriver/Main.inc, but here we apply -// some trickery to make the built-in '-save-temps' option hidden and enable -// '--temp-dir' by default. -// -//===----------------------------------------------------------------------===// - -#include "llvm/CompilerDriver/BuiltinOptions.h" -#include "llvm/CompilerDriver/Main.h" - -#include "llvm/Support/Path.h" -#include "llvm/Config/config.h" - -#include - -#include "PIC16.inc" - -namespace { - -// Modify the PACKAGE_VERSION to use build number in top level configure file. -void PIC16VersionPrinter(void) { - std::cout << "MPLAB C16 1.0 " << PACKAGE_VERSION << "\n"; -} - -} - -int main(int argc, char** argv) { - - // HACK - SaveTemps.setHiddenFlag(llvm::cl::Hidden); - TempDirname.setHiddenFlag(llvm::cl::Hidden); - Languages.setHiddenFlag(llvm::cl::Hidden); - DryRun.setHiddenFlag(llvm::cl::Hidden); - - llvm::cl::SetVersionPrinter(PIC16VersionPrinter); - - // Ask for a standard temp dir, but just cache its basename., and delete it. - llvm::sys::Path tempDir; - tempDir = llvm::sys::Path::GetTemporaryDirectory(); - TempDirname = tempDir.getBasename(); - tempDir.eraseFromDisk(true); - - // We are creating a temp dir in current dir, with the cached name. - // But before that remove if one already exists with that name.. - tempDir = TempDirname; - tempDir.eraseFromDisk(true); - - return llvmc::Main(argc, argv); -} Removed: llvm/trunk/tools/llvmc/examples/mcc16/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/examples/mcc16/Makefile?rev=140092&view=auto ============================================================================== --- llvm/trunk/tools/llvmc/examples/mcc16/Makefile (original) +++ llvm/trunk/tools/llvmc/examples/mcc16/Makefile (removed) @@ -1,15 +0,0 @@ -##===- llvmc/examples/mcc16/Makefile -----------------------*- Makefile -*-===## -# -# The LLVM Compiler Infrastructure -# -# This file is distributed under the University of Illinois Open Source -# License. See LICENSE.TXT for details. -# -##===----------------------------------------------------------------------===## - -LEVEL = ../../../.. - -LLVMC_BASED_DRIVER = mcc16 -BUILT_SOURCES = PIC16.inc - -include $(LEVEL)/Makefile.common Removed: llvm/trunk/tools/llvmc/examples/mcc16/PIC16.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/examples/mcc16/PIC16.td?rev=140092&view=auto ============================================================================== --- llvm/trunk/tools/llvmc/examples/mcc16/PIC16.td (original) +++ llvm/trunk/tools/llvmc/examples/mcc16/PIC16.td (removed) @@ -1,234 +0,0 @@ -//===- PIC16.td - PIC16 toolchain driver -------------------*- tablegen -*-===// -// -// A basic driver for the PIC16 toolchain. -// -//===----------------------------------------------------------------------===// - -include "llvm/CompilerDriver/Common.td" - -// Options - -def OptionList : OptionList<[ - (switch_option "g", - (help "Enable Debugging")), - (switch_option "E", - (help "Stop after preprocessing, do not compile")), - (switch_option "S", - (help "Stop after compilation, do not assemble")), - (switch_option "bc", - (help "Stop after b-code generation, do not compile")), - (switch_option "c", - (help "Stop after assemble, do not link")), - (prefix_option "p", - (help "Specify part name")), - (prefix_list_option "I", - (help "Add a directory to include path")), - (prefix_list_option "L", - (help "Add a directory to library path")), - (prefix_list_option "K", - (help "Add a directory to linker script search path")), - (parameter_option "l", - (help "Specify a library to link")), - (parameter_option "k", - (help "Specify a linker script")), - (parameter_option "m", - (help "Generate linker map file with the given name")), - (prefix_list_option "D", - (help "Define a macro")), - (switch_option "X", - (help "Do not invoke mp2hex to create an output hex file.")), - (switch_option "O0", - (help "Do not optimize")), - (switch_option "O1", - (help "Optimization Level 1.")), - (switch_option "O2", - (help "Optimization Level 2.")), - (switch_option "O3", - (help "Optimization Level 3.")), - (switch_option "Od", - (help "Perform Debug-safe Optimizations only.")), - (switch_option "w", - (help "Disable all warnings.")), -// (switch_option "O1", -// (help "Optimization level 1")), -// (switch_option "O2", -// (help "Optimization level 2. (Default)")), -// (parameter_option "pre-RA-sched", -// (help "Example of an option that is passed to llc")), - (parameter_option "regalloc", - (help "Register allocator to use (possible values: simple, linearscan, pbqp, local; default=linearscan)")), - (prefix_list_option "Wa,", (comma_separated), - (help "Pass options to assembler (Run 'gpasm -help' for assembler options)")), - (prefix_list_option "Wl,", (comma_separated), - (help "Pass options to linker (Run 'mplink -help' for linker options)")) -// (prefix_list_option "Wllc,", -// (help "Pass options to llc")), -// (prefix_list_option "Wo,", -// (help "Pass options to llvm-ld")) -]>; - -// Tools -class clang_based : Tool< -[(in_language language), - (out_language "llvm-bitcode"), - (output_suffix "bc"), - (command cmd), - (actions (case - (and (multiple_input_files), - (or (switch_on "S"), (switch_on "c"))), - (error "cannot specify -o with -c or -S with multiple files"), - (switch_on "E"), [(forward "E"), - (stop_compilation), (output_suffix ext_E)], - (and (switch_on "E"), (empty "o")), (no_out_file), - (switch_on "bc"),[(stop_compilation), (output_suffix "bc")], - (switch_on "g"), (append_cmd "-g"), - (switch_on "w"), (append_cmd "-w"), - (switch_on "O1"), (append_cmd ""), - (switch_on "O2"), (append_cmd ""), - (switch_on "O3"), (append_cmd ""), - (switch_on "Od"), (append_cmd ""), - (not_empty "D"), (forward "D"), - (not_empty "I"), (forward "I"), - (switch_on "O0"), (append_cmd "-O0"), - (default), (append_cmd "-O1"))) -// (sink) -]>; - -def clang_cc : clang_based<"c", "$CALL(GetBinDir)clang -cc1 -I $CALL(GetStdHeadersDir) -D $CALL(GetLowerCasePartDefine) -D $CALL(GetUpperCasePartDefine) -triple=pic16- -emit-llvm-bc ", "i">; - -//def clang_cc : Tool<[ -// (in_language "c"), -// (out_language "llvm-bitcode"), -// (output_suffix "bc"), -// (cmd_line "$CALL(GetBinDir)clang-cc -I $CALL(GetStdHeadersDir) -triple=pic16- -emit-llvm-bc "), -// (cmd_line kkkkk -// (actions (case -// (switch_on "g"), (append_cmd "g"), -// (not_empty "I"), (forward "I"))), -// (sink) -//]>; - - -// pre-link-and-lto step. -def llvm_ld : Tool<[ - (in_language "llvm-bitcode"), - (out_language "llvm-bitcode"), - (output_suffix "bc"), - (command "$CALL(GetBinDir)llvm-ld -L $CALL(GetStdLibsDir) -disable-licm-promotion -l std"), - (out_file_option "-b"), - (actions (case - (switch_on "O0"), (append_cmd "-disable-opt"), - (switch_on "O1"), (append_cmd "-disable-opt"), -// Whenever O3 is not specified on the command line, default i.e. disable-inlining will always be added. - (switch_on "O2"), (append_cmd ""), - (switch_on "O3"), (append_cmd ""), - (default), (append_cmd "-disable-inlining"))), - (join) -]>; - -// optimize single file -def llvm_ld_optimizer : Tool<[ - (in_language "llvm-bitcode"), - (out_language "llvm-bitcode"), - (output_suffix "bc"), -// FIXME: we are still not disabling licm-promotion. -// -disable-licm-promotion and building stdn library causes c16-71 to fail. - (command "$CALL(GetBinDir)llvm-ld "), - (out_file_option "-b"), - (actions (case - (switch_on "O0"), (append_cmd "-disable-opt"), - (switch_on "O1"), (append_cmd "-disable-opt"), -// Whenever O3 is not specified on the command line, default i.e. disable-inlining will always be added. - (switch_on "O2"), (append_cmd ""), - (switch_on "O3"), (append_cmd ""), - (default), (append_cmd "-disable-inlining"))) -]>; - -// optimizer step. -def pic16passes : Tool<[ - (in_language "llvm-bitcode"), - (out_language "llvm-bitcode"), - (output_suffix "obc"), - (command "$CALL(GetBinDir)opt -pic16cloner -pic16overlay -f"), - (actions (case - (switch_on "O0"), (append_cmd "-disable-opt"))) -]>; - -def llc : Tool<[ - (in_language "llvm-bitcode"), - (out_language "assembler"), - (output_suffix "s"), - (command "$CALL(GetBinDir)llc -march=pic16 -disable-jump-tables -pre-RA-sched=list-burr -f"), - (actions (case - (switch_on "S"), (stop_compilation), -// (not_empty "Wllc,"), (unpack_values "Wllc,"), -// (not_empty "pre-RA-sched"), (forward "pre-RA-sched"))) - (not_empty "regalloc"), (forward "regalloc"), - (empty "regalloc"), (append_cmd "-regalloc=linearscan"))) -]>; - -def gpasm : Tool<[ - (in_language "assembler"), - (out_language "object-code"), - (output_suffix "o"), - (command "$CALL(GetBinDir)gpasm -z -r decimal -I $CALL(GetStdAsmHeadersDir) -C -c -w 2"), - (actions (case - (switch_on "c"), (stop_compilation), - (switch_on "g"), (append_cmd "-g"), - (not_empty "p"), (forward "p"), - (empty "p"), (append_cmd "-p 16f1xxx"), - (not_empty "Wa,"), (forward_value "Wa,"))) -]>; - -def mplink : Tool<[ - (in_language "object-code"), - (out_language "executable"), - (output_suffix "cof"), - (command "$CALL(GetBinDir)mplink -e -k $CALL(GetStdLinkerScriptsDir) -l $CALL(GetStdLibsDir) intrinsics.lib stdn.lib"), - (actions (case - (not_empty "Wl,"), (forward_value "Wl,"), - (switch_on "X"), (append_cmd "-x"), - (not_empty "L"), (forward_as "L", "-l"), - (not_empty "K"), (forward_as "K", "-k"), - (not_empty "m"), (forward "m"), - (not_empty "p"), [(forward "p"), (append_cmd "-c")], - (empty "p"), (append_cmd "-p 16f1xxx -c"), -// (not_empty "l"), [(unpack_values "l"),(append_cmd ".lib")])), - (not_empty "k"), (forward "k"), - (not_empty "l"), (forward "l"))), - (join) -]>; - -// Language map - -def LanguageMap : LanguageMap<[ - (lang_to_suffixes "c", "c"), - (lang_to_suffixes "c-cpp-output", "i"), - (lang_to_suffixes "assembler", "s"), - (lang_to_suffixes "assembler-with-cpp", "S"), - (lang_to_suffixes "llvm-assembler", "ll"), - (lang_to_suffixes "llvm-bitcode", "bc"), - (lang_to_suffixes "object-code", "o"), - (lang_to_suffixes "executable", "cof") -]>; - -// Compilation graph - -def CompilationGraph : CompilationGraph<[ - (edge "root", "clang_cc"), - (edge "root", "llvm_ld"), - (optional_edge "root", "llvm_ld_optimizer", - (case (switch_on "S"), (inc_weight), - (switch_on "c"), (inc_weight))), - (edge "root", "gpasm"), - (edge "root", "mplink"), - (edge "clang_cc", "llvm_ld"), - (optional_edge "clang_cc", "llvm_ld_optimizer", - (case (switch_on "S"), (inc_weight), - (switch_on "c"), (inc_weight))), - (edge "llvm_ld", "pic16passes"), - (edge "llvm_ld_optimizer", "pic16passes"), - (edge "pic16passes", "llc"), - (edge "llc", "gpasm"), - (edge "gpasm", "mplink") -]>; Removed: llvm/trunk/tools/llvmc/examples/mcc16/README URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/examples/mcc16/README?rev=140092&view=auto ============================================================================== --- llvm/trunk/tools/llvmc/examples/mcc16/README (original) +++ llvm/trunk/tools/llvmc/examples/mcc16/README (removed) @@ -1,75 +0,0 @@ -This is a basic compiler driver for the PIC16 toolchain that shows how to create -your own llvmc-based drivers. It is based on the examples/Skeleton template. - -The PIC16 toolchain looks like this: - -clang-cc (FE) -> llvm-ld (optimizer) -> llc (codegen) -> native-as -> native-ld - -Following features were requested by Sanjiv: - -From: Sanjiv Gupta microchip.com> -Subject: Re: llvmc for PIC16 -Newsgroups: gmane.comp.compilers.llvm.devel -Date: 2009-06-05 06:51:14 GMT - -The salient features that we want to have in the driver are: -1. llvm-ld will be used as "The Optimizer". -2. If the user has specified to generate the final executable, then -llvm-ld should run on all the .bc files generated by clang and create a -single optimized .bc file for further tools. -3. -Wo - pass optimizations to the llvm-ld -4. mcc16 -Wl - pass options to native linker. -5. mcc16 -Wa - pass options to native assembler. - -Here are some example command lines and sample command invocations as to -what should be done. - -$ mcc16 -S foo.c -// [clang-cc foo.c] -> foo.bc -// [llvm-ld foo.bc] -> foo.opt.bc -// [llc foo.opt.bc] -> foo.s - -$ mcc16 -S foo.c bar.c -// [clang-cc foo.c] -> foo.bc -// [llvm-ld foo.bc] -> foo.opt.bc -// [llc foo.opt.bc] -> foo.s -// [clang-cc bar.c] -> bar.bc -// [llvm-ld bar.bc] -> bar.opt.bc -// [llc bar.opt.bc] -> bar.s - -** Use of -g causes llvm-ld to run with -disable-opt -$ mcc16 -S -g foo.c -// [clang-cc foo.c] -> foo.bc -// [llvm-ld -disable-opt foo.bc] -> foo.opt.bc -// [llc foo.opt.bc] -> foo.s - -** -I is passed to clang-cc, -pre-RA-sched=list-burr to llc. -$ mcc16 -S -g -I ../include -pre-RA-sched=list-burr foo.c -// [clang-cc -I ../include foo.c] -> foo.bc -// [llvm-ld -disable-opt foo.bc] -> foo.opt.bc -// [llc -pre-RA-sched=list-burr foo.opt.bc] -> foo.s - -** -Wo passes options to llvm-ld -$ mcc16 -Wo=opt1,opt2 -S -I ../include -pre-RA-sched=list-burr foo.c -// [clang-cc -I ../include foo.c] -> foo.bc -// [llvm-ld -opt1 -opt2 foo.bc] -> foo.opt.bc -// [llc -pre-RA-sched=list-burr foo.opt.bc] -> foo.s - -** -Wa passes options to native as. -$ mcc16 -c foo.c -Wa=opt1 -// [clang-cc foo.c] -> foo.bc -// [llvm-ld foo.bc] -> foo.opt.bc -// [llc foo.opt.bc] -> foo.s -// [native-as -opt1 foo.s] -> foo.o - -$ mcc16 -Wo=opt1 -Wl=opt2 -Wa=opt3 foo.c bar.c -// [clang-cc foo.c] -> foo.bc -// [clang-cc bar.c] -> bar.bc -// [llvm-ld -opt1 foo.bc bar.bc] -> a.out.bc -// [llc a.out.bc] -> a.out.s -// [native-as -opt3 a.out.s] -> a.out.o -// [native-ld -opt2 a.out.o] -> a.out - -Is this achievable by a tablegen based driver ? - -- Sanjiv Removed: llvm/trunk/tools/llvmc/src/AutoGenerated.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/src/AutoGenerated.td?rev=140092&view=auto ============================================================================== --- llvm/trunk/tools/llvmc/src/AutoGenerated.td (original) +++ llvm/trunk/tools/llvmc/src/AutoGenerated.td (removed) @@ -1,17 +0,0 @@ -//===- AutoGenerated.td - LLVMC toolchain descriptions -----*- tablegen -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file contains compilation graph description used by llvmc. -// -//===----------------------------------------------------------------------===// - -include "llvm/CompilerDriver/Common.td" - -include "Base.td" -include "Clang.td" Removed: llvm/trunk/tools/llvmc/src/Base.td.in URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/src/Base.td.in?rev=140092&view=auto ============================================================================== --- llvm/trunk/tools/llvmc/src/Base.td.in (original) +++ llvm/trunk/tools/llvmc/src/Base.td.in (removed) @@ -1,461 +0,0 @@ -//===- Base.td - LLVMC toolchain descriptions --------------*- tablegen -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file contains compilation graph description used by llvmc. -// -//===----------------------------------------------------------------------===// - -// Options - -def OptList : OptionList<[ - (switch_option "emit-llvm", - (help "Emit LLVM .ll files instead of native object files")), - (switch_option "E", - (help "Stop after the preprocessing stage, do not run the compiler")), - (switch_option "fsyntax-only", - (help "Stop after checking the input for syntax errors")), - (switch_option "opt", - (help "Enable opt")), - (switch_option "O0", - (help "Turn off optimization"), (zero_or_more)), - (switch_option "O1", - (help "Optimization level 1"), (zero_or_more)), - (switch_option "O2", - (help "Optimization level 2"), (zero_or_more)), - (switch_option "O3", - (help "Optimization level 3"), (zero_or_more)), - (switch_option "S", - (help "Stop after compilation, do not assemble")), - (switch_option "c", - (help "Compile and assemble, but do not link")), - (switch_option "m32", - (help "Generate code for a 32-bit environment"), (hidden)), - (switch_option "m64", - (help "Generate code for a 64-bit environment"), (hidden)), - (switch_option "fPIC", - (help "Relocation model: PIC"), (hidden)), - (switch_option "mdynamic-no-pic", - (help "Relocation model: dynamic-no-pic"), (hidden)), - (parameter_option "linker", - (help "Choose linker (possible values: gcc, g++)")), - (parameter_option "mtune", - (help "Target a specific CPU type"), (forward_not_split)), - (parameter_list_option "march", - (help "Generate code for the specified machine type")), - (parameter_option "mcpu", - (help "A deprecated synonym for -mtune"), (hidden), (forward_not_split)), - (parameter_option "mfpu", - (help "Specify type of floating point unit"), - (hidden), (forward_not_split)), - (parameter_option "mabi", - (help "Generate code for the specified ABI"), (hidden)), - (parameter_option "mfloat-abi", - (help "Specifies which floating-point ABI to use"), (hidden)), - (switch_option "mfix-and-continue", - (help "Needed by gdb to load .o files dynamically"), (hidden)), - (parameter_option "MF", - (help "Specify a file to write dependencies to"), (hidden)), - (parameter_list_option "MT", - (help "Change the name of the rule emitted by dependency generation"), - (hidden)), - (parameter_list_option "include", - (help "Include the named file prior to preprocessing")), - (parameter_list_option "iquote", - (help "Search dir only for files requested with #inlcude \"file\""), - (hidden)), - (prefix_list_option "I", - (help "Add a directory to include path")), - (prefix_list_option "D", - (help "Define a macro")), - (parameter_list_option "Xpreprocessor", (hidden), - (help "Pass options to preprocessor")), - (prefix_list_option "Wa,", (comma_separated), - (help "Pass options to assembler")), - (parameter_list_option "Xassembler", (hidden), - (help "Pass options to assembler")), - (prefix_list_option "Wllc,", (comma_separated), - (help "Pass options to llc")), - (prefix_list_option "Wl,", - (help "Pass options to linker")), - (parameter_list_option "Xlinker", (hidden), - (help "Pass options to linker")), - (prefix_list_option "Wo,", (comma_separated), - (help "Pass options to opt")), - (prefix_list_option "m", - (help "Enable or disable various extensions (-mmmx, -msse, etc.)"), - (hidden)) -]>; - -def LinkerOptList : OptionList<[ - (prefix_list_option "L", - (help "Add a directory to link path")), - (prefix_list_option "l", - (help "Search a library when linking")), - (parameter_option "filelist", (hidden), - (help "Link the files listed in file")), - (switch_option "nostartfiles", - (help "Do not use the standard system startup files when linking"), - (hidden)), - (switch_option "nodefaultlibs", - (help "Do not use the standard system libraries when linking"), (hidden)), - (switch_option "nostdlib", - (help - "Do not use the standard system startup files or libraries when linking"), - (hidden)), - (switch_option "pie", - (help "Produce a position independent executable"), (hidden)), - (switch_option "rdynamic", - (help "Add all symbols to the dynamic export table"), (hidden)), - (switch_option "s", - (help "Strip all symbols"), (hidden)), - (switch_option "static", - (help "Do not link against shared libraries"), (hidden)), - (switch_option "static-libgcc", - (help "Use static libgcc"), (hidden)), - (switch_option "shared", - (help "Create a DLL instead of the regular executable")), - (switch_option "shared-libgcc", - (help "Use shared libgcc"), (hidden)), - (parameter_option "T", - (help "Read linker script"), (hidden)), - (parameter_option "u", - (help "Start with undefined reference to SYMBOL"), (hidden)), - (switch_option "pthread", - (help "Enable threads")), - - // TODO: Add a conditional compilation mechanism to make Darwin-only options - // like '-arch' really Darwin-only. - (parameter_option "arch", - (help "Compile for the specified target architecture"), (hidden)), - (prefix_list_option "F", - (help "Add a directory to framework search path")), - (parameter_list_option "framework", - (help "Specifies a framework to link against")), - (parameter_list_option "weak_framework", - (help "Specifies a framework to weakly link against"), (hidden)), - (switch_option "dynamiclib", (hidden), - (help "Produce a dynamic library")), - (switch_option "prebind", (hidden), - (help "Prebind all undefined symbols")), - (switch_option "dead_strip", (hidden), - (help "Remove unreachable blocks of code")), - (switch_option "single_module", (hidden), - (help "Build the library so it contains only one module")), - (parameter_option "install_name", (hidden), - (help "File name the library will be installed in")), - (parameter_option "compatibility_version", (hidden), - (help "Compatibility version number")), - (parameter_option "current_version", (hidden), - (help "Current version number")) -]>; - -// Option preprocessor. - -def Preprocess : OptionPreprocessor< -(case (not (any_switch_on "O0", "O1", "O2", "O3")), - (set_option "O2"), - (and (switch_on "O3"), (any_switch_on "O0", "O1", "O2")), - (unset_option "O0", "O1", "O2"), - (and (switch_on "O2"), (any_switch_on "O0", "O1")), - (unset_option "O0", "O1"), - (switch_on "O1", "O0"), - (unset_option "O0")) ->; - -// Tools - -class llvm_gcc_based : Tool< -[(in_language in_lang), - out_lang, - (output_suffix out_ext), - (command cmd), - (actions - (case - (and (not_empty "o"), - (multiple_input_files), (or (switch_on "S"), (switch_on "c"))), - (error "cannot specify -o with -c or -S with multiple files"), - (switch_on "E"), - [(forward "E"), (stop_compilation), (output_suffix E_ext)], - (and (switch_on "E"), (empty "o")), (no_out_file), - - // ('-emit-llvm') && !('opt') -> stop compilation - (and (switch_on "emit-llvm"), (not (switch_on "opt"))), - (stop_compilation), - // ('-S' && '-emit-llvm') && !('opt') -> output .ll - (and (switch_on "emit-llvm", "S"), (not (switch_on "opt"))), - [(forward "S"), (output_suffix "ll")], - // Usually just output .bc - (not (switch_on "fsyntax-only")), - [(append_cmd "-c"), (append_cmd "-emit-llvm")], - - // -fsyntax-only - (switch_on "fsyntax-only"), [(forward "fsyntax-only"), - (no_out_file), (stop_compilation)], - - // Forwards - (not_empty "Xpreprocessor"), (forward "Xpreprocessor"), - (not_empty "include"), (forward "include"), - (not_empty "iquote"), (forward "iquote"), - (not_empty "save-temps"), (append_cmd "-save-temps"), - (not_empty "I"), (forward "I"), - (not_empty "F"), (forward "F"), - (not_empty "D"), (forward "D"), - (not_empty "arch"), (forward "arch"), - (not_empty "march"), (forward "march"), - (not_empty "mcpu"), (forward "mcpu"), - (not_empty "mtune"), (forward "mtune"), - (not_empty "mfpu"), (forward "mfpu"), - (not_empty "mabi"), (forward "mabi"), - (not_empty "mfloat-abi"), (forward "mfloat-abi"), - (not_empty "m"), (forward "m"), - (switch_on "mfix-and-continue"), (forward "mfix-and-continue"), - (switch_on "m32"), (forward "m32"), - (switch_on "m64"), (forward "m64"), - (switch_on "O0"), (forward "O0"), - (switch_on "O1"), (forward "O1"), - (switch_on "O2"), (forward "O2"), - (switch_on "O3"), (forward "O3"), - (switch_on "fPIC"), (forward "fPIC"), - (switch_on "mdynamic-no-pic"), (forward "mdynamic-no-pic"), - (not_empty "MF"), (forward "MF"), - (not_empty "MT"), (forward "MT"))), - (sink) -]>; - -class llvm_gcc_comp_based -: llvm_gcc_based; - -class llvm_gcc_pch_based -: llvm_gcc_based; - -def llvm_gcc_c : llvm_gcc_comp_based - <"@LLVMGCCCOMMAND@ -x c", "c", "i">; -def llvm_gcc_cpp : llvm_gcc_comp_based - <"@LLVMGXXCOMMAND@ -x c++", "c++", "i">; -def llvm_gcc_m : llvm_gcc_comp_based - <"@LLVMGCCCOMMAND@ -x objective-c", "objective-c", "mi">; -def llvm_gcc_mxx : llvm_gcc_comp_based - <"@LLVMGCCCOMMAND@ -x objective-c++", "objective-c++", "mi">; - -def llvm_gcc_c_pch : llvm_gcc_pch_based - <"@LLVMGCCCOMMAND@ -x c-header", "c-header", "i">; -def llvm_gcc_cpp_pch : llvm_gcc_pch_based - <"@LLVMGXXCOMMAND@ -x c++-header", "c++-header", "i">; -def llvm_gcc_m_pch : llvm_gcc_pch_based - <"@LLVMGCCCOMMAND@ -x objective-c-header", "objective-c-header", "mi">; -def llvm_gcc_mxx_pch : llvm_gcc_pch_based - <"@LLVMGCCCOMMAND@ -x objective-c++-header", "objective-c++-header", "mi">; - -def opt : Tool< -[(in_language "llvm-bitcode"), - (out_language "llvm-bitcode"), - (output_suffix "opt.bc"), - (actions (case (switch_on "emit-llvm"), (stop_compilation), - (switch_on "emit-llvm", "S"), - [(append_cmd "-S"), (output_suffix "ll")], - (not_empty "Wo,"), (forward_value "Wo,"), - (switch_on "O1"), (forward "O1"), - (switch_on "O2"), (forward "O2"), - (switch_on "O3"), (forward "O3"))), - (command "opt -f") -]>; - -def llvm_as : Tool< -[(in_language "llvm-assembler"), - (out_language "llvm-bitcode"), - (output_suffix "bc"), - (command "llvm-as"), - (actions (case (and (switch_on "emit-llvm"), (not (switch_on "opt"))), - (stop_compilation))) -]>; - -def llvm_gcc_assembler : Tool< -[(in_language "assembler"), - (out_language "object-code"), - (output_suffix "o"), - (command "@LLVMGCCCOMMAND@ -c -x assembler"), - (actions (case - (switch_on "c"), (stop_compilation), - (not_empty "arch"), (forward "arch"), - (not_empty "Xassembler"), (forward "Xassembler"), - (not_empty "march"), (forward "march"), - (not_empty "mcpu"), (forward "mcpu"), - (not_empty "mtune"), (forward "mtune"), - (not_empty "mabi"), (forward "mabi"), - (not_empty "mfloat-abi"), (forward "mfloat-abi"), - (switch_on "m32"), (forward "m32"), - (switch_on "m64"), (forward "m64"), - (not_empty "Wa,"), (forward "Wa,"))) -]>; - -def llc : Tool< -[(in_language "llvm-bitcode", "llvm-assembler"), - (out_language "assembler"), - (output_suffix "s"), - (command "llc -disable-cfi"), - (actions (case - (switch_on "S"), (stop_compilation), - (switch_on "O0"), (forward "O0"), - (switch_on "O1"), (forward "O1"), - (switch_on "O2"), (forward "O2"), - (switch_on "O3"), (forward "O3"), - (switch_on "fPIC"), (append_cmd "-relocation-model=pic"), - (switch_on "mdynamic-no-pic"), - (append_cmd "-relocation-model=dynamic-no-pic"), - (not_empty "march"), (forward_transformed_value - "march", "ConvertMArchToMAttr"), - (not_empty "mcpu"), (forward_transformed_value "mcpu", "ConvertMCpu"), - (and (not_empty "mtune"), (empty "mcpu")), - (forward_as "mtune", "-mcpu"), - (not_empty "mfpu"), (forward_transformed_value "mfpu", "ConvertMFpu"), - (not_empty "m"), (forward_transformed_value "m", "ConvertToMAttr"), - (not_empty "Wllc,"), (forward_value "Wllc,"))) -]>; - -// Base class for linkers -class llvm_gcc_based_linker : Tool< -[(in_language "object-code", "static-library", "dynamic-library"), - (out_language "executable"), - (output_suffix "out"), - (command cmd), - (works_on_empty (case (and (not_empty "filelist"), on_empty), true, - (default), false)), - (join), - (actions (case - (switch_on "pthread"), (append_cmd "-lpthread"), - (not_empty "L"), (forward "L"), - (not_empty "F"), (forward "F"), - (not_empty "arch"), (forward "arch"), - (not_empty "framework"), (forward "framework"), - (not_empty "weak_framework"), (forward "weak_framework"), - (not_empty "filelist"), (forward "filelist"), - (not_empty "march"), (forward "march"), - (not_empty "mcpu"), (forward "mcpu"), - (not_empty "mtune"), (forward "mtune"), - (not_empty "mabi"), (forward "mabi"), - (not_empty "mfloat-abi"), (forward "mfloat-abi"), - (switch_on "m32"), (forward "m32"), - (switch_on "m64"), (forward "m64"), - (not_empty "l"), (forward "l"), - (not_empty "Xlinker"), (forward "Xlinker"), - (not_empty "Wl,"), (forward "Wl,"), - (switch_on "nostartfiles"), (forward "nostartfiles"), - (switch_on "nodefaultlibs"), (forward "nodefaultlibs"), - (switch_on "nostdlib"), (forward "nostdlib"), - (switch_on "pie"), (forward "pie"), - (switch_on "rdynamic"), (forward "rdynamic"), - (switch_on "s"), (forward "s"), - (switch_on "static"), (forward "static"), - (switch_on "static-libgcc"), (forward "static-libgcc"), - (switch_on "shared"), (forward "shared"), - (switch_on "shared-libgcc"), (forward "shared-libgcc"), - (not_empty "T"), (forward "T"), - (not_empty "u"), (forward "u"), - (switch_on "dynamiclib"), (forward "dynamiclib"), - (switch_on "prebind"), (forward "prebind"), - (switch_on "dead_strip"), (forward "dead_strip"), - (switch_on "single_module"), (forward "single_module"), - (not_empty "compatibility_version"), - (forward "compatibility_version"), - (not_empty "current_version"), (forward "current_version"), - (not_empty "install_name"), (forward "install_name"))) -]>; - -// Default linker -def llvm_gcc_linker : llvm_gcc_based_linker<"@LLVMGCCCOMMAND@", - (not (or (parameter_equals "linker", "g++"), - (parameter_equals "linker", "c++")))>; -// Alternative linker for C++ -def llvm_gcc_cpp_linker : llvm_gcc_based_linker<"@LLVMGXXCOMMAND@", - (or (parameter_equals "linker", "g++"), - (parameter_equals "linker", "c++"))>; - -// Language map - -def LanguageMap : LanguageMap<[ - (lang_to_suffixes "precompiled-header", ["gch", "pch"]), - (lang_to_suffixes "c++", ["cc", "cp", "cxx", "cpp", "CPP", "c++", "C"]), - (lang_to_suffixes "c++-header", "hpp"), - (lang_to_suffixes "c", "c"), - (lang_to_suffixes "c-header", "h"), - (lang_to_suffixes "c-cpp-output", "i"), - (lang_to_suffixes "objective-c-cpp-output", "mi"), - (lang_to_suffixes "objective-c++", "mm"), - (lang_to_suffixes "objective-c++-header", "hmm"), - (lang_to_suffixes "objective-c", "m"), - (lang_to_suffixes "objective-c-header", "hm"), - (lang_to_suffixes "assembler", "s"), - (lang_to_suffixes "assembler-with-cpp", "S"), - (lang_to_suffixes "llvm-assembler", "ll"), - (lang_to_suffixes "llvm-bitcode", "bc"), - (lang_to_suffixes "object-code", ["o", "*empty*"]), - (lang_to_suffixes "static-library", ["a", "lib"]), - (lang_to_suffixes "dynamic-library", ["so", "dylib", "dll"]), - (lang_to_suffixes "executable", "out") -]>; - -// Compilation graph - -def CompilationGraph : CompilationGraph<[ - (edge "root", "llvm_gcc_c"), - (edge "root", "llvm_gcc_assembler"), - (edge "root", "llvm_gcc_cpp"), - (edge "root", "llvm_gcc_m"), - (edge "root", "llvm_gcc_mxx"), - (edge "root", "llc"), - - (edge "root", "llvm_gcc_c_pch"), - (edge "root", "llvm_gcc_cpp_pch"), - (edge "root", "llvm_gcc_m_pch"), - (edge "root", "llvm_gcc_mxx_pch"), - - (edge "llvm_gcc_c", "llc"), - (edge "llvm_gcc_cpp", "llc"), - (edge "llvm_gcc_m", "llc"), - (edge "llvm_gcc_mxx", "llc"), - (edge "llvm_as", "llc"), - - (optional_edge "root", "llvm_as", - (case (or (switch_on "emit-llvm"), - (switch_on "opt")), (inc_weight))), - (optional_edge "llvm_gcc_c", "opt", - (case (switch_on "opt"), (inc_weight))), - (optional_edge "llvm_gcc_cpp", "opt", - (case (switch_on "opt"), (inc_weight))), - (optional_edge "llvm_gcc_m", "opt", - (case (switch_on "opt"), (inc_weight))), - (optional_edge "llvm_gcc_mxx", "opt", - (case (switch_on "opt"), (inc_weight))), - (optional_edge "llvm_as", "opt", - (case (switch_on "opt"), (inc_weight))), - (edge "opt", "llc"), - - (edge "llc", "llvm_gcc_assembler"), - (edge "llvm_gcc_assembler", "llvm_gcc_linker"), - (optional_edge "llvm_gcc_assembler", "llvm_gcc_cpp_linker", - (case - (or (input_languages_contain "c++"), - (input_languages_contain "objective-c++")), - (inc_weight), - (or (parameter_equals "linker", "g++"), - (parameter_equals "linker", "c++")), (inc_weight))), - - - (edge "root", "llvm_gcc_linker"), - (optional_edge "root", "llvm_gcc_cpp_linker", - (case - (or (input_languages_contain "c++"), - (input_languages_contain "objective-c++")), - (inc_weight), - (or (parameter_equals "linker", "g++"), - (parameter_equals "linker", "c++")), (inc_weight))) -]>; Removed: llvm/trunk/tools/llvmc/src/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/src/CMakeLists.txt?rev=140092&view=auto ============================================================================== --- llvm/trunk/tools/llvmc/src/CMakeLists.txt (original) +++ llvm/trunk/tools/llvmc/src/CMakeLists.txt (removed) @@ -1,19 +0,0 @@ -set(LLVMGCCCOMMAND llvm-gcc) -set(LLVMGXXCOMMAND llvm-g++) - -configure_file( - ${CMAKE_CURRENT_SOURCE_DIR}/Base.td.in - ${CMAKE_CURRENT_BINARY_DIR}/Base.td - @ONLY) - -set(LLVM_TARGET_DEFINITIONS AutoGenerated.td) - -tablegen(AutoGenerated.inc -gen-llvmc) - -set(LLVM_USED_LIBS CompilerDriver) -set(LLVM_LINK_COMPONENTS support) - -add_llvm_tool(llvmc - Hooks.cpp - Main.cpp - ) Removed: llvm/trunk/tools/llvmc/src/Clang.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/src/Clang.td?rev=140092&view=auto ============================================================================== --- llvm/trunk/tools/llvmc/src/Clang.td (original) +++ llvm/trunk/tools/llvmc/src/Clang.td (removed) @@ -1,87 +0,0 @@ -//===- Clang.td - LLVMC toolchain descriptions -------------*- tablegen -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file contains compilation graph description used by llvmc. -// -//===----------------------------------------------------------------------===// - - -def Options : OptionList<[ -(switch_option "clang", (help "Use Clang instead of llvm-gcc")) -]>; - -class clang_based : Tool< -[(in_language language), - (out_language "llvm-bitcode"), - (output_suffix "bc"), - (command cmd), - (actions (case (switch_on "E"), - [(forward "E"), (stop_compilation), (output_suffix ext_E)], - (and (switch_on "E"), (empty "o")), (no_out_file), - (switch_on "fsyntax-only"), (stop_compilation), - (switch_on "S", "emit-llvm"), - [(append_cmd "-emit-llvm"), - (stop_compilation), (output_suffix "ll")], - (not (switch_on "S", "emit-llvm")), - (append_cmd "-emit-llvm-bc"), - (switch_on "c", "emit-llvm"), - (stop_compilation), - (not_empty "include"), (forward "include"), - (not_empty "I"), (forward "I"))), - (sink) -]>; - -def clang_c : clang_based<"c", "clang -x c", "i">; -def clang_cpp : clang_based<"c++", "clang -x c++", "i">; -def clang_objective_c : clang_based<"objective-c", - "clang -x objective-c", "mi">; -def clang_objective_cpp : clang_based<"objective-c++", - "clang -x objective-c++", "mi">; - -def as : Tool< -[(in_language "assembler"), - (out_language "object-code"), - (output_suffix "o"), - (command "as"), - (actions (case (not_empty "Wa,"), (forward_value "Wa,"), - (switch_on "c"), (stop_compilation))) -]>; - -// Default linker -def llvm_ld : Tool< -[(in_language "object-code"), - (out_language "executable"), - (output_suffix "out"), - (command "llvm-ld -native -disable-internalize"), - (actions (case - (switch_on "pthread"), (append_cmd "-lpthread"), - (not_empty "L"), (forward "L"), - (not_empty "l"), (forward "l"), - (not_empty "Wl,"), (forward_value "Wl,"))), - (join) -]>; - -// Compilation graph - -def ClangCompilationGraph : CompilationGraph<[ - (optional_edge "root", "clang_c", - (case (switch_on "clang"), (inc_weight))), - (optional_edge "root", "clang_cpp", - (case (switch_on "clang"), (inc_weight))), - (optional_edge "root", "clang_objective_c", - (case (switch_on "clang"), (inc_weight))), - (optional_edge "root", "clang_objective_cpp", - (case (switch_on "clang"), (inc_weight))), - (edge "clang_c", "llc"), - (edge "clang_cpp", "llc"), - (edge "clang_objective_c", "llc"), - (edge "clang_objective_cpp", "llc"), - (optional_edge "llc", "as", (case (switch_on "clang"), (inc_weight))), - (edge "as", "llvm_ld") -]>; Removed: llvm/trunk/tools/llvmc/src/Hooks.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/src/Hooks.cpp?rev=140092&view=auto ============================================================================== --- llvm/trunk/tools/llvmc/src/Hooks.cpp (original) +++ llvm/trunk/tools/llvmc/src/Hooks.cpp (removed) @@ -1,193 +0,0 @@ -#include "llvm/ADT/StringMap.h" - -#include -#include - -namespace hooks { - -/// NUM_KEYS - Calculate the size of a const char* array. -#define NUM_KEYS(Keys) sizeof(Keys) / sizeof(const char*) - -// See http://graphics.stanford.edu/~seander/bithacks.html#RoundUpPowerOf2 -inline unsigned NextHighestPowerOf2 (unsigned i) { - --i; - i |= i >> 1; - i |= i >> 2; - i |= i >> 4; - i |= i >> 8; - i |= i >> 16; - ++i; - return i; -} - -typedef std::vector StrVec; -typedef llvm::StringMap ArgMap; - -/// AddPlusOrMinus - Convert 'no-foo' to '-foo' and 'foo' to '+foo'. -void AddPlusOrMinus (const std::string& Arg, std::string& out) { - if (Arg.find("no-") == 0 && Arg[3] != 0) { - out += '-'; - out += Arg.c_str() + 3; - } - else { - out += '+'; - out += Arg; - } -} - -// -march values that need to be special-cased. -const char* MArchKeysARM[] = { "armv4t", "armv5t", "armv5te", "armv6", - "armv6-m", "armv6t2", "armv7-a", "armv7-m" }; -const char* MArchValuesARM[] = { "v4t", "v5t", "v5te", "v6", "v6m", "v6t2", - "v7a", "v7m" }; -const unsigned MArchNumKeysARM = NUM_KEYS(MArchKeysARM); -const unsigned MArchMapSize = NextHighestPowerOf2(MArchNumKeysARM); - -// -march values that should be forwarded as -mcpu -const char* MArchMCpuKeysARM[] = { "iwmmxt", "ep9312" }; -const char* MArchMCpuValuesARM[] = { "iwmmxt", "ep9312"}; -const unsigned MArchMCpuNumKeysARM = NUM_KEYS(MArchMCpuKeysARM); - - -void FillInArgMap(ArgMap& Args, const char* Keys[], - const char* Values[], unsigned NumKeys) -{ - for (unsigned i = 0; i < NumKeys; ++i) { - // Explicit cast to StringRef here is necessary to pick up the right - // overload. - Args.GetOrCreateValue(llvm::StringRef(Keys[i]), Values[i]); - } -} - -/// ConvertMArchToMAttr - Convert -march from the gcc dialect to -/// something llc can understand. -std::string ConvertMArchToMAttr(const StrVec& Opts) { - static ArgMap MArchMap(MArchMapSize); - static ArgMap MArchMCpuMap(MArchMapSize); - static bool StaticDataInitialized = false; - - if (!StaticDataInitialized) { - FillInArgMap(MArchMap, MArchKeysARM, MArchValuesARM, MArchNumKeysARM); - FillInArgMap(MArchMCpuMap, MArchMCpuKeysARM, - MArchMCpuValuesARM, MArchMCpuNumKeysARM); - StaticDataInitialized = true; - } - - std::string mattr("-mattr="); - std::string mcpu("-mcpu="); - bool mattrTouched = false; - bool mcpuTouched = false; - - for (StrVec::const_iterator B = Opts.begin(), E = Opts.end(); B!=E; ++B) { - const std::string& Arg = *B; - - // Check if the argument should be forwarded to -mcpu instead of -mattr. - { - ArgMap::const_iterator I = MArchMCpuMap.find(Arg); - - if (I != MArchMCpuMap.end()) { - mcpuTouched = true; - mcpu += I->getValue(); - continue; - } - } - - if (mattrTouched) - mattr += ","; - - // Check if the argument is a special case. - { - ArgMap::const_iterator I = MArchMap.find(Arg); - - if (I != MArchMap.end()) { - mattrTouched = true; - mattr += '+'; - mattr += I->getValue(); - continue; - } - } - - AddPlusOrMinus(Arg, mattr); - } - - std::string out; - if (mattrTouched) - out += mattr; - if (mcpuTouched) - out += (mattrTouched ? " " : "") + mcpu; - - return out; -} - -// -mcpu values that need to be special-cased. -const char* MCpuKeysPPC[] = { "G3", "G4", "G5", "powerpc", "powerpc64"}; -const char* MCpuValuesPPC[] = { "g3", "g4", "g5", "ppc", "ppc64"}; -const unsigned MCpuNumKeysPPC = NUM_KEYS(MCpuKeysPPC); -const unsigned MCpuMapSize = NextHighestPowerOf2(MCpuNumKeysPPC); - -/// ConvertMCpu - Convert -mcpu value from the gcc to the llc dialect. -std::string ConvertMCpu(const char* Val) { - static ArgMap MCpuMap(MCpuMapSize); - static bool StaticDataInitialized = false; - - if (!StaticDataInitialized) { - FillInArgMap(MCpuMap, MCpuKeysPPC, MCpuValuesPPC, MCpuNumKeysPPC); - StaticDataInitialized = true; - } - - std::string ret = "-mcpu="; - ArgMap::const_iterator I = MCpuMap.find(Val); - if (I != MCpuMap.end()) { - return ret + I->getValue(); - } - return ret + Val; -} - -// -mfpu values that need to be special-cased. -const char* MFpuKeysARM[] = { "vfp", "vfpv3", - "vfpv3-fp16", "vfpv3-d16", "vfpv3-d16-fp16", - "neon", "neon-fp16" }; -const char* MFpuValuesARM[] = { "vfp2", "vfp3", - "+vfp3,+fp16", "+vfp3,+d16", "+vfp3,+d16,+fp16", - "+neon", "+neon,+neonfp" }; -const unsigned MFpuNumKeysARM = NUM_KEYS(MFpuKeysARM); -const unsigned MFpuMapSize = NextHighestPowerOf2(MFpuNumKeysARM); - -/// ConvertMFpu - Convert -mfpu value from the gcc to the llc dialect. -std::string ConvertMFpu(const char* Val) { - static ArgMap MFpuMap(MFpuMapSize); - static bool StaticDataInitialized = false; - - if (!StaticDataInitialized) { - FillInArgMap(MFpuMap, MFpuKeysARM, MFpuValuesARM, MFpuNumKeysARM); - StaticDataInitialized = true; - } - - std::string ret = "-mattr="; - ArgMap::const_iterator I = MFpuMap.find(Val); - if (I != MFpuMap.end()) { - return ret + I->getValue(); - } - return ret + '+' + Val; -} - -/// ConvertToMAttr - Convert '-mfoo' and '-mno-bar' to '-mattr=+foo,-bar'. -std::string ConvertToMAttr(const StrVec& Opts) { - std::string out("-mattr="); - bool firstIter = true; - - for (StrVec::const_iterator B = Opts.begin(), E = Opts.end(); B!=E; ++B) { - const std::string& Arg = *B; - - if (firstIter) - firstIter = false; - else - out += ","; - - AddPlusOrMinus(Arg, out); - } - - return out; -} - -} Removed: llvm/trunk/tools/llvmc/src/Main.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/src/Main.cpp?rev=140092&view=auto ============================================================================== --- llvm/trunk/tools/llvmc/src/Main.cpp (original) +++ llvm/trunk/tools/llvmc/src/Main.cpp (removed) @@ -1,16 +0,0 @@ -//===--- Main.cpp - The LLVM Compiler Driver -------------------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open -// Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// Just include AutoGenerated.inc and CompilerDriver/Main.inc. -// -//===----------------------------------------------------------------------===// - -#include "AutoGenerated.inc" - -#include "llvm/CompilerDriver/Main.inc" Removed: llvm/trunk/tools/llvmc/src/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/src/Makefile?rev=140092&view=auto ============================================================================== --- llvm/trunk/tools/llvmc/src/Makefile (original) +++ llvm/trunk/tools/llvmc/src/Makefile (removed) @@ -1,14 +0,0 @@ -##===- tools/llvmc/src/Makefile ----------------------------*- Makefile -*-===## -# -# The LLVM Compiler Infrastructure -# -# This file is distributed under the University of Illinois Open -# Source License. See LICENSE.TXT for details. -# -##===----------------------------------------------------------------------===## - -LEVEL = ../../.. -LLVMC_BASED_DRIVER = llvmc -BUILT_SOURCES = AutoGenerated.inc - -include $(LEVEL)/Makefile.common From isanbard at gmail.com Mon Sep 19 18:30:41 2011 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 19 Sep 2011 23:30:41 -0000 Subject: [llvm-commits] [llvm] r140094 - in /llvm/trunk: lib/Transforms/Utils/CodeExtractor.cpp test/Transforms/CodeExtractor/2004-11-12-InvokeExtract.ll Message-ID: <20110919233041.59B772A6C12C@llvm.org> Author: void Date: Mon Sep 19 18:30:41 2011 New Revision: 140094 URL: http://llvm.org/viewvc/llvm-project?rev=140094&view=rev Log: Revert r140083 and r140084 until buildbots can be fixed. Modified: llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp llvm/trunk/test/Transforms/CodeExtractor/2004-11-12-InvokeExtract.ll Modified: llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp?rev=140094&r1=140093&r2=140094&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp Mon Sep 19 18:30:41 2011 @@ -664,13 +664,7 @@ // * Pass in uses as args // 3) Move code region, add call instr to func // - for (std::vector::const_iterator - I = code.begin(), E = code.end(); I != E; ++I) { - BasicBlock *BB = *I; - BlocksToExtract.insert(BB); - if (InvokeInst *II = dyn_cast(BB->getTerminator())) - BlocksToExtract.insert(II->getUnwindDest()); - } + BlocksToExtract.insert(code.begin(), code.end()); Values inputs, outputs; @@ -794,7 +788,6 @@ /// ExtractBasicBlock - slurp a basic block into a brand new function /// Function* llvm::ExtractBasicBlock(BasicBlock *BB, bool AggregateArgs) { - if (BB->isLandingPad()) return 0; std::vector Blocks; Blocks.push_back(BB); return CodeExtractor(0, AggregateArgs).ExtractCodeRegion(Blocks); Modified: llvm/trunk/test/Transforms/CodeExtractor/2004-11-12-InvokeExtract.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/CodeExtractor/2004-11-12-InvokeExtract.ll?rev=140094&r1=140093&r2=140094&view=diff ============================================================================== --- llvm/trunk/test/Transforms/CodeExtractor/2004-11-12-InvokeExtract.ll (original) +++ llvm/trunk/test/Transforms/CodeExtractor/2004-11-12-InvokeExtract.ll Mon Sep 19 18:30:41 2011 @@ -10,9 +10,6 @@ ret i32 %V Unw: ; preds = %EB - %exn = landingpad {i8*, i32} personality i32 (...)* @__gcc_personality_v0 - catch i8* null - resume { i8*, i32 } %exn + unwind } -declare i32 @__gcc_personality_v0(...) From grosbach at apple.com Mon Sep 19 18:31:02 2011 From: grosbach at apple.com (Jim Grosbach) Date: Mon, 19 Sep 2011 23:31:02 -0000 Subject: [llvm-commits] [llvm] r140095 - in /llvm/trunk: lib/Target/ARM/AsmParser/ARMAsmParser.cpp test/MC/ARM/basic-thumb2-instructions.s Message-ID: <20110919233102.95CA82A6C12C@llvm.org> Author: grosbach Date: Mon Sep 19 18:31:02 2011 New Revision: 140095 URL: http://llvm.org/viewvc/llvm-project?rev=140095&view=rev Log: Thumb2 assembly parsing and encoding for UMAAL/UMLAL/UMULL. Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp?rev=140095&r1=140094&r2=140095&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp (original) +++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Mon Sep 19 18:31:02 2011 @@ -3213,12 +3213,12 @@ Mnemonic == "rrx" || Mnemonic == "ror" || Mnemonic == "sub" || Mnemonic == "add" || Mnemonic == "adc" || Mnemonic == "mul" || Mnemonic == "bic" || Mnemonic == "asr" || - Mnemonic == "umlal" || Mnemonic == "orr" || Mnemonic == "mvn" || + Mnemonic == "orr" || Mnemonic == "mvn" || Mnemonic == "rsb" || Mnemonic == "rsc" || Mnemonic == "orn" || - Mnemonic == "sbc" || Mnemonic == "umull" || Mnemonic == "eor" || - Mnemonic == "neg" || + Mnemonic == "sbc" || Mnemonic == "eor" || Mnemonic == "neg" || (!isThumb() && (Mnemonic == "smull" || Mnemonic == "mov" || - Mnemonic == "mla" || Mnemonic == "smlal"))) { + Mnemonic == "mla" || Mnemonic == "smlal" || + Mnemonic == "umlal" || Mnemonic == "umull"))) { CanAcceptCarrySet = true; } else CanAcceptCarrySet = false; Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s?rev=140095&r1=140094&r2=140095&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s (original) +++ llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Mon Sep 19 18:31:02 2011 @@ -2774,3 +2774,39 @@ @ CHECK: itt lt @ encoding: [0xbc,0xbf] @ CHECK: uhsub16lt r4, r9, r12 @ encoding: [0xd9,0xfa,0x6c,0xf4] @ CHECK: uhsub8lt r3, r1, r5 @ encoding: [0xc1,0xfa,0x65,0xf3] + + + at ------------------------------------------------------------------------------ +@ UMAAL + at ------------------------------------------------------------------------------ + umaal r3, r4, r5, r6 + it lt + umaallt r3, r4, r5, r6 + +@ CHECK: umaal r3, r4, r5, r6 @ encoding: [0xe5,0xfb,0x66,0x34] +@ CHECK: it lt @ encoding: [0xb8,0xbf] +@ CHECK: umaallt r3, r4, r5, r6 @ encoding: [0xe5,0xfb,0x66,0x34] + + + at ------------------------------------------------------------------------------ +@ UMLAL + at ------------------------------------------------------------------------------ + umlal r2, r4, r6, r8 + it gt + umlalgt r6, r1, r2, r6 + +@ CHECK: umlal r2, r4, r6, r8 @ encoding: [0xe6,0xfb,0x08,0x24] +@ CHECK: it gt @ encoding: [0xc8,0xbf] +@ CHECK: umlalgt r6, r1, r2, r6 @ encoding: [0xe2,0xfb,0x06,0x61] + + + at ------------------------------------------------------------------------------ +@ UMULL + at ------------------------------------------------------------------------------ + umull r2, r4, r6, r8 + it gt + umullgt r6, r1, r2, r6 + +@ CHECK: umull r2, r4, r6, r8 @ encoding: [0xa6,0xfb,0x08,0x24] +@ CHECK: it gt @ encoding: [0xc8,0xbf] +@ CHECK: umullgt r6, r1, r2, r6 @ encoding: [0xa2,0xfb,0x06,0x61] From grosbach at apple.com Mon Sep 19 18:34:18 2011 From: grosbach at apple.com (Jim Grosbach) Date: Mon, 19 Sep 2011 23:34:18 -0000 Subject: [llvm-commits] [llvm] r140096 - /llvm/trunk/test/MC/ARM/basic-arm-instructions.s Message-ID: <20110919233418.96E532A6C12C@llvm.org> Author: grosbach Date: Mon Sep 19 18:34:18 2011 New Revision: 140096 URL: http://llvm.org/viewvc/llvm-project?rev=140096&view=rev Log: Tidy up a bit. Modified: llvm/trunk/test/MC/ARM/basic-arm-instructions.s Modified: llvm/trunk/test/MC/ARM/basic-arm-instructions.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-arm-instructions.s?rev=140096&r1=140095&r2=140096&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/basic-arm-instructions.s (original) +++ llvm/trunk/test/MC/ARM/basic-arm-instructions.s Mon Sep 19 18:34:18 2011 @@ -707,8 +707,8 @@ mcr p7, #1, r5, c1, c1, #4 mcr2 p7, #1, r5, c1, c1, #4 -@ CHECK: mcr p7, #1, r5, c1, c1, #4 @ encoding: [0x91,0x57,0x21,0xee] -@ CHECK: mcr2 p7, #1, r5, c1, c1, #4 @ encoding: [0x91,0x57,0x21,0xfe] +@ CHECK: mcr p7, #1, r5, c1, c1, #4 @ encoding: [0x91,0x57,0x21,0xee] +@ CHECK: mcr2 p7, #1, r5, c1, c1, #4 @ encoding: [0x91,0x57,0x21,0xfe] @------------------------------------------------------------------------------ @ MCRR/MCRR2 @@ -716,8 +716,8 @@ mcrr p7, #15, r5, r4, c1 mcrr2 p7, #15, r5, r4, c1 -@ CHECK: mcrr p7, #15, r5, r4, c1 @ encoding: [0xf1,0x57,0x44,0xec] -@ CHECK: mcrr2 p7, #15, r5, r4, c1 @ encoding: [0xf1,0x57,0x44,0xfc] +@ CHECK: mcrr p7, #15, r5, r4, c1 @ encoding: [0xf1,0x57,0x44,0xec] +@ CHECK: mcrr2 p7, #15, r5, r4, c1 @ encoding: [0xf1,0x57,0x44,0xfc] @------------------------------------------------------------------------------ @@ -728,10 +728,10 @@ mlane r1,r2,r3,r4 mlasne r1,r2,r3,r4 -@ CHECK: mla r1, r2, r3, r4 @ encoding: [0x92,0x43,0x21,0xe0] -@ CHECK: mlas r1, r2, r3, r4 @ encoding: [0x92,0x43,0x31,0xe0] -@ CHECK: mlane r1, r2, r3, r4 @ encoding: [0x92,0x43,0x21,0x10] -@ CHECK: mlasne r1, r2, r3, r4 @ encoding: [0x92,0x43,0x31,0x10] +@ CHECK: mla r1, r2, r3, r4 @ encoding: [0x92,0x43,0x21,0xe0] +@ CHECK: mlas r1, r2, r3, r4 @ encoding: [0x92,0x43,0x31,0xe0] +@ CHECK: mlane r1, r2, r3, r4 @ encoding: [0x92,0x43,0x21,0x10] +@ CHECK: mlasne r1, r2, r3, r4 @ encoding: [0x92,0x43,0x31,0x10] @------------------------------------------------------------------------------ @ MLS @@ -813,9 +813,9 @@ mrs r8, apsr mrs r8, cpsr mrs r8, spsr -@ CHECK: mrs r8, apsr @ encoding: [0x00,0x80,0x0f,0xe1] -@ CHECK: mrs r8, apsr @ encoding: [0x00,0x80,0x0f,0xe1] -@ CHECK: mrs r8, spsr @ encoding: [0x00,0x80,0x4f,0xe1] +@ CHECK: mrs r8, apsr @ encoding: [0x00,0x80,0x0f,0xe1] +@ CHECK: mrs r8, apsr @ encoding: [0x00,0x80,0x0f,0xe1] +@ CHECK: mrs r8, spsr @ encoding: [0x00,0x80,0x4f,0xe1] @@ -868,20 +868,20 @@ msr SPSR_fsxc, r0 msr cpsr_fsxc, r0 -@ CHECK: msr APSR_nzcvq, r0 @ encoding: [0x00,0xf0,0x28,0xe1] -@ CHECK: msr APSR_g, r0 @ encoding: [0x00,0xf0,0x24,0xe1] -@ CHECK: msr APSR_nzcvq, r0 @ encoding: [0x00,0xf0,0x28,0xe1] -@ CHECK: msr APSR_nzcvq, r0 @ encoding: [0x00,0xf0,0x28,0xe1] -@ CHECK: msr APSR_nzcvqg, r0 @ encoding: [0x00,0xf0,0x2c,0xe1] -@ CHECK: msr CPSR_fc, r0 @ encoding: [0x00,0xf0,0x29,0xe1] -@ CHECK: msr CPSR_c, r0 @ encoding: [0x00,0xf0,0x21,0xe1] -@ CHECK: msr CPSR_x, r0 @ encoding: [0x00,0xf0,0x22,0xe1] -@ CHECK: msr CPSR_fc, r0 @ encoding: [0x00,0xf0,0x29,0xe1] -@ CHECK: msr CPSR_fc, r0 @ encoding: [0x00,0xf0,0x29,0xe1] -@ CHECK: msr CPSR_fsx, r0 @ encoding: [0x00,0xf0,0x2e,0xe1] -@ CHECK: msr SPSR_fc, r0 @ encoding: [0x00,0xf0,0x69,0xe1] -@ CHECK: msr SPSR_fsxc, r0 @ encoding: [0x00,0xf0,0x6f,0xe1] -@ CHECK: msr CPSR_fsxc, r0 @ encoding: [0x00,0xf0,0x2f,0xe1] +@ CHECK: msr APSR_nzcvq, r0 @ encoding: [0x00,0xf0,0x28,0xe1] +@ CHECK: msr APSR_g, r0 @ encoding: [0x00,0xf0,0x24,0xe1] +@ CHECK: msr APSR_nzcvq, r0 @ encoding: [0x00,0xf0,0x28,0xe1] +@ CHECK: msr APSR_nzcvq, r0 @ encoding: [0x00,0xf0,0x28,0xe1] +@ CHECK: msr APSR_nzcvqg, r0 @ encoding: [0x00,0xf0,0x2c,0xe1] +@ CHECK: msr CPSR_fc, r0 @ encoding: [0x00,0xf0,0x29,0xe1] +@ CHECK: msr CPSR_c, r0 @ encoding: [0x00,0xf0,0x21,0xe1] +@ CHECK: msr CPSR_x, r0 @ encoding: [0x00,0xf0,0x22,0xe1] +@ CHECK: msr CPSR_fc, r0 @ encoding: [0x00,0xf0,0x29,0xe1] +@ CHECK: msr CPSR_fc, r0 @ encoding: [0x00,0xf0,0x29,0xe1] +@ CHECK: msr CPSR_fsx, r0 @ encoding: [0x00,0xf0,0x2e,0xe1] +@ CHECK: msr SPSR_fc, r0 @ encoding: [0x00,0xf0,0x69,0xe1] +@ CHECK: msr SPSR_fsxc, r0 @ encoding: [0x00,0xf0,0x6f,0xe1] +@ CHECK: msr CPSR_fsxc, r0 @ encoding: [0x00,0xf0,0x2f,0xe1] @------------------------------------------------------------------------------ @ MUL @@ -1450,8 +1450,9 @@ sev seveq -@ CHECK: sev @ encoding: [0x04,0xf0,0x20,0xe3] -@ CHECK: seveq @ encoding: [0x04,0xf0,0x20,0x03] +@ CHECK: sev @ encoding: [0x04,0xf0,0x20,0xe3] +@ CHECK: seveq @ encoding: [0x04,0xf0,0x20,0x03] + @------------------------------------------------------------------------------ @ SHADD16/SHADD8 @@ -1866,8 +1867,8 @@ @ CHECK: stm r8!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0xa8,0xe8] @ CHECK: stmib r9!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0xa9,0xe9] -@ CHECK: stmda sp!, {r1, r3, r4, r5, r6} @ encoding: [0x7a,0x00,0x2d,0xe8] -@ CHECK: stmdb r0!, {r1, r5, r7, sp} @ encoding: [0xa2,0x20,0x20,0xe9] +@ CHECK: stmda sp!, {r1, r3, r4, r5, r6} @ encoding: [0x7a,0x00,0x2d,0xe8] +@ CHECK: stmdb r0!, {r1, r5, r7, sp} @ encoding: [0xa2,0x20,0x20,0xe9] @------------------------------------------------------------------------------ @@ -2199,7 +2200,7 @@ umaallt r3, r4, r5, r6 @ CHECK: umaal r3, r4, r5, r6 @ encoding: [0x95,0x36,0x44,0xe0] -@ CHECK: umaallt r3, r4, r5, r6 @ encoding: [0x95,0x36,0x44,0xb0] +@ CHECK: umaallt r3, r4, r5, r6 @ encoding: [0x95,0x36,0x44,0xb0] @------------------------------------------------------------------------------ From bruno.cardoso at gmail.com Mon Sep 19 18:36:50 2011 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Mon, 19 Sep 2011 23:36:50 -0000 Subject: [llvm-commits] [llvm] r140097 - in /llvm/trunk: lib/Target/X86/X86InstrSSE.td test/CodeGen/X86/avx-vinsertf128.ll Message-ID: <20110919233650.A01A82A6C12C@llvm.org> Author: bruno Date: Mon Sep 19 18:36:50 2011 New Revision: 140097 URL: http://llvm.org/viewvc/llvm-project?rev=140097&view=rev Log: Based on the small opt Zvi's patch was trying to achieve, eliminate 128-bit undef subvector insertion into a 256-bit vector Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td llvm/trunk/test/CodeGen/X86/avx-vinsertf128.ll Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=140097&r1=140096&r2=140097&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Mon Sep 19 18:36:50 2011 @@ -157,6 +157,21 @@ def : Pat<(insert_subvector undef, (v16i8 VR128:$src), (i32 0)), (INSERT_SUBREG (v32i8 (IMPLICIT_DEF)), VR128:$src, sub_xmm)>; +// Inserting a 128-bit undef vector into the high part of a 256-bit +// vector should return the 256-bit vector itself. +def : Pat<(insert_subvector (v8i32 VR256:$src), undef, (i32 4)), + (v8i32 VR256:$src)>; +def : Pat<(insert_subvector (v8f32 VR256:$src), undef, (i32 4)), + (v8f32 VR256:$src)>; +def : Pat<(insert_subvector (v4i64 VR256:$src), undef, (i32 4)), + (v4i64 VR256:$src)>; +def : Pat<(insert_subvector (v4f64 VR256:$src), undef, (i32 4)), + (v4f64 VR256:$src)>; +def : Pat<(insert_subvector (v16i16 VR256:$src), undef, (i32 4)), + (v16i16 VR256:$src)>; +def : Pat<(insert_subvector (v32i8 VR256:$src), undef, (i32 4)), + (v32i8 VR256:$src)>; + // Implicitly promote a 32-bit scalar to a vector. def : Pat<(v4f32 (scalar_to_vector FR32:$src)), (INSERT_SUBREG (v4f32 (IMPLICIT_DEF)), FR32:$src, sub_ss)>; Modified: llvm/trunk/test/CodeGen/X86/avx-vinsertf128.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx-vinsertf128.ll?rev=140097&r1=140096&r2=140097&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/avx-vinsertf128.ll (original) +++ llvm/trunk/test/CodeGen/X86/avx-vinsertf128.ll Mon Sep 19 18:36:50 2011 @@ -36,3 +36,11 @@ store <4 x i32> %blendAsInt.i503, <4 x i32>* undef, align 4 ret void } + +; CHECK: _C +; CHECK-NOT: vinsertf128 $1 +define <4 x i32> @C(<4 x i32> %v1) nounwind readonly { + %1 = shufflevector <4 x i32> %v1, <4 x i32> undef, <8 x i32> + %2 = shufflevector <8 x i32> %1, <8 x i32> undef, <4 x i32> + ret <4 x i32> %2 +} From bruno.cardoso at gmail.com Mon Sep 19 18:36:59 2011 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Mon, 19 Sep 2011 23:36:59 -0000 Subject: [llvm-commits] [llvm] r140098 - in /llvm/trunk: lib/Target/X86/X86InstrSSE.td test/MC/X86/x86_64-avx-encoding.s Message-ID: <20110919233659.785A22A6C12C@llvm.org> Author: bruno Date: Mon Sep 19 18:36:59 2011 New Revision: 140098 URL: http://llvm.org/viewvc/llvm-project?rev=140098&view=rev Log: Fix PR10949. Fix the encoding of VMOVPQIto64rr. Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td llvm/trunk/test/MC/X86/x86_64-avx-encoding.s Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=140098&r1=140097&r2=140098&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Mon Sep 19 18:36:59 2011 @@ -4172,11 +4172,11 @@ //===---------------------------------------------------------------------===// // Move Packed Doubleword Int first element to Doubleword Int // -let isCodeGenOnly = 1 in -def VMOVPQIto64rr : VRPDI<0x7E, MRMDestReg, (outs GR64:$dst), (ins VR128:$src), +def VMOVPQIto64rr : I<0x7E, MRMDestReg, (outs GR64:$dst), (ins VR128:$src), "mov{d|q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (vector_extract (v2i64 VR128:$src), - (iPTR 0)))]>; + (iPTR 0)))]>, + TB, OpSize, VEX, VEX_W, Requires<[HasAVX, In64BitMode]>; def MOVPQIto64rr : RPDI<0x7E, MRMDestReg, (outs GR64:$dst), (ins VR128:$src), "mov{d|q}\t{$src, $dst|$dst, $src}", Modified: llvm/trunk/test/MC/X86/x86_64-avx-encoding.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86_64-avx-encoding.s?rev=140098&r1=140097&r2=140098&view=diff ============================================================================== --- llvm/trunk/test/MC/X86/x86_64-avx-encoding.s (original) +++ llvm/trunk/test/MC/X86/x86_64-avx-encoding.s Mon Sep 19 18:36:59 2011 @@ -1448,6 +1448,10 @@ // CHECK: encoding: [0xc4,0x61,0xf9,0x6e,0xf0] vmovd %rax, %xmm14 +// CHECK: vmovd %xmm0, %rax +// CHECK: encoding: [0xc4,0xe1,0xf9,0x7e,0xc0] + vmovd %xmm0, %rax + // CHECK: vmovq %xmm14, (%rax) // CHECK: encoding: [0xc5,0x79,0xd6,0x30] vmovq %xmm14, (%rax) From grosbach at apple.com Mon Sep 19 18:38:35 2011 From: grosbach at apple.com (Jim Grosbach) Date: Mon, 19 Sep 2011 23:38:35 -0000 Subject: [llvm-commits] [llvm] r140099 - /llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Message-ID: <20110919233835.1DDF72A6C12C@llvm.org> Author: grosbach Date: Mon Sep 19 18:38:34 2011 New Revision: 140099 URL: http://llvm.org/viewvc/llvm-project?rev=140099&view=rev Log: Tidy up comments. Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=140099&r1=140098&r2=140099&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Mon Sep 19 18:38:34 2011 @@ -3270,14 +3270,12 @@ } -// Change Processor State is a system instruction -- for disassembly and -// parsing only. +// Change Processor State is a system instruction. // FIXME: Since the asm parser has currently no clean way to handle optional // operands, create 3 versions of the same instruction. Once there's a clean // framework to represent optional operands, change this behavior. class t2CPS : T2XI<(outs), iops, NoItinerary, - !strconcat("cps", asm_op), - [/* For disassembly only; pattern left blank */]> { + !strconcat("cps", asm_op), []> { bits<2> imod; bits<3> iflags; bits<5> mode; @@ -3307,10 +3305,8 @@ // A6.3.4 Branches and miscellaneous control // Table A6-14 Change Processor State, and hint instructions -// Helper class for disassembly only. class T2I_hint op7_0, string opc, string asm> - : T2I<(outs), (ins), NoItinerary, opc, asm, - [/* For disassembly only; pattern left blank */]> { + : T2I<(outs), (ins), NoItinerary, opc, asm, []> { let Inst{31-20} = 0xf3a; let Inst{19-16} = 0b1111; let Inst{15-14} = 0b10; @@ -3334,10 +3330,9 @@ let Inst{3-0} = opt; } -// Secure Monitor Call is a system instruction -- for disassembly only +// Secure Monitor Call is a system instruction. // Option = Inst{19-16} -def t2SMC : T2I<(outs), (ins imm0_15:$opt), NoItinerary, "smc", "\t$opt", - [/* For disassembly only; pattern left blank */]> { +def t2SMC : T2I<(outs), (ins imm0_15:$opt), NoItinerary, "smc", "\t$opt", []> { let Inst{31-27} = 0b11110; let Inst{26-20} = 0b1111111; let Inst{15-12} = 0b1000; From bruno.cardoso at gmail.com Mon Sep 19 18:41:02 2011 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Mon, 19 Sep 2011 16:41:02 -0700 Subject: [llvm-commits] [AVX] Add EXTRACT_SUBVECTOR to DAGCombine In-Reply-To: <2B8953F251AC92428D9BBC92D9B218865E9469BE94@hasmsx502.ger.corp.intel.com> References: <2B8953F251AC92428D9BBC92D9B218865E9469BE94@hasmsx502.ger.corp.intel.com> Message-ID: Hi Zvi, On Mon, Sep 19, 2011 at 11:31 AM, Rackover, Zvi wrote: > Hi Bruno and other codegen people, > > > > Please review the attached patch and commit if acceptable. > > I categorized this patch as AVX, since I am not aware of other cases in X86 > where it shows any benefit. You should be looking in INSERT_SUBVECTOR instead of extract, because is the undef being inserted in the upper part that you want to catch. I provided another fix for this in r140097 Thanks -- Bruno Cardoso Lopes http://www.brunocardoso.cc From isanbard at gmail.com Mon Sep 19 18:47:06 2011 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 19 Sep 2011 23:47:06 -0000 Subject: [llvm-commits] [llvm] r140101 - /llvm/trunk/test/Transforms/LoopSimplify/2007-10-28-InvokeCrash.ll Message-ID: <20110919234706.59CA32A6C12C@llvm.org> Author: void Date: Mon Sep 19 18:47:06 2011 New Revision: 140101 URL: http://llvm.org/viewvc/llvm-project?rev=140101&view=rev Log: Dramatically reduce this testcase. Modified: llvm/trunk/test/Transforms/LoopSimplify/2007-10-28-InvokeCrash.ll Modified: llvm/trunk/test/Transforms/LoopSimplify/2007-10-28-InvokeCrash.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/2007-10-28-InvokeCrash.ll?rev=140101&r1=140100&r2=140101&view=diff ============================================================================== --- llvm/trunk/test/Transforms/LoopSimplify/2007-10-28-InvokeCrash.ll (original) +++ llvm/trunk/test/Transforms/LoopSimplify/2007-10-28-InvokeCrash.ll Mon Sep 19 18:47:06 2011 @@ -1,892 +1,33 @@ -; RUN: opt < %s -loop-simplify -disable-output +; RUN: llvm-as < %s | opt -loop-simplify -disable-output ; PR1752 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-s0:0:64-f80:32:32" target triple = "i686-pc-mingw32" - %struct.BigInt = type { %"struct.std::vector >" } - %struct.Fibonacci = type { %"struct.std::vector >" } - %struct.__false_type = type <{ i8 }> - %"struct.__gnu_cxx::__normal_iterator > >" = type { %struct.BigInt* } - %"struct.std::_Vector_base >" = type { %"struct.std::_Vector_base >::_Vector_impl" } - %"struct.std::_Vector_base >::_Vector_impl" = type { %struct.BigInt*, %struct.BigInt*, %struct.BigInt* } - %"struct.std::_Vector_base >" = type { %"struct.std::_Vector_base >::_Vector_impl" } - %"struct.std::_Vector_base >::_Vector_impl" = type { i32*, i32*, i32* } - %"struct.std::basic_ios >" = type { %"struct.std::ios_base", %"struct.std::basic_ostream >"*, i8, i8, %"struct.std::basic_streambuf >"*, %"struct.std::ctype"*, %"struct.std::num_get > >"*, %"struct.std::num_get > >"* } - %"struct.std::basic_ostream >" = type { i32 (...)**, %"struct.std::basic_ios >" } - %"struct.std::basic_streambuf >" = type { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, %"struct.std::locale" } - %"struct.std::basic_string,std::allocator >" = type { %"struct.std::basic_string,std::allocator >::_Alloc_hider" } - %"struct.std::basic_string,std::allocator >::_Alloc_hider" = type { i8* } - %"struct.std::basic_stringbuf,std::allocator >" = type { %"struct.std::basic_streambuf >", i32, %"struct.std::basic_string,std::allocator >" } - %"struct.std::ctype" = type { %"struct.std::locale::facet", i32*, i8, i32*, i32*, i16*, i8, [256 x i8], [256 x i8], i8 } - %"struct.std::ios_base" = type { i32 (...)**, i32, i32, i32, i32, i32, %"struct.std::ios_base::_Callback_list"*, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, %"struct.std::ios_base::_Words"*, %"struct.std::locale" } - %"struct.std::ios_base::_Callback_list" = type { %"struct.std::ios_base::_Callback_list"*, void (i32, %"struct.std::ios_base"*, i32)*, i32, i32 } - %"struct.std::ios_base::_Words" = type { i8*, i32 } - %"struct.std::locale" = type { %"struct.std::locale::_Impl"* } - %"struct.std::locale::_Impl" = type { i32, %"struct.std::locale::facet"**, i32, %"struct.std::locale::facet"**, i8** } - %"struct.std::locale::facet" = type { i32 (...)**, i32 } - %"struct.std::num_get > >" = type { %"struct.std::locale::facet" } - %"struct.std::ostringstream" = type { [4 x i8], %"struct.std::basic_stringbuf,std::allocator >", %"struct.std::basic_ios >" } - %"struct.std::vector >" = type { %"struct.std::_Vector_base >" } - %"struct.std::vector >" = type { %"struct.std::_Vector_base >" } - at .str13 = external constant [6 x i8] ; <[6 x i8]*> [#uses=1] - at .str14 = external constant [5 x i8] ; <[5 x i8]*> [#uses=1] - at .str15 = external constant [2 x i8] ; <[2 x i8]*> [#uses=1] - at _ZSt4cout = external global %"struct.std::basic_ostream >" ; <%"struct.std::basic_ostream >"*> [#uses=1] -declare void @_ZN9Fibonacci10get_numberEj(%struct.BigInt* sret , %struct.Fibonacci*, i32) - -declare %"struct.std::basic_ostream >"* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(%"struct.std::basic_ostream >"*, i8*) - -declare void @_ZNSsD1Ev(%"struct.std::basic_string,std::allocator >"*) - -declare %"struct.std::basic_ostream >"* @_ZNSolsEm(%"struct.std::basic_ostream >"*, i32) - -declare void @_ZNKSt19basic_ostringstreamIcSt11char_traitsIcESaIcEE3strEv(%"struct.std::basic_string,std::allocator >"* sret , %"struct.std::ostringstream"*) - -declare %"struct.std::basic_ostream >"* @_ZStlsIcSt11char_traitsIcESaIcEERSt13basic_ostreamIT_T0_ES7_RKSbIS4_S5_T1_E(%"struct.std::basic_ostream >"*, %"struct.std::basic_string,std::allocator >"*) - -declare void @_ZNSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED1Ev(%"struct.std::ostringstream"*) - -declare %"struct.std::basic_ostream >"* @___ZlsRSoRK6BigInt___ZN9__gnu_cxx13new_allocatorI6BigIntE10deallocateEPS1_j(i32, %"struct.std::basic_ostream >"*, %struct.BigInt*, %struct.__false_type*, i32) - -declare void @___ZNSt12_Vector_baseI6BigIntSaIS0_EE13_M_deallocateEPS0_j___ZNSt12_Vector_baseI6BigIntSaIS0_EED2Ev___ZNSt6vectorI6BigIntSaIS0_EEC1ERKS1_(%"struct.std::_Vector_base >"*, i32, %struct.BigInt*, i32, %"struct.std::vector >"*, %struct.__false_type*) - -declare i32 @___ZN9__gnu_cxxmiIPK6BigIntS3_St6vectorIS1_SaIS1_EEEENS_17__normal_iteratorIT_T1_E15difference_typeERKSA_RKNS7_IT0_S9_EE___ZNKSt6vectorI6BigIntSaIS0_EE4sizeEv___ZNK9Fibonacci16show_all_numbersEv___ZNKSt6vectorI6BigIntSaIS0_EE8capacityEv(%"struct.__gnu_cxx::__normal_iterator > >"*, %"struct.__gnu_cxx::__normal_iterator > >"*, %"struct.std::vector >"*, i32, %struct.Fibonacci*) - -declare %struct.BigInt* @___ZNSt6vectorI6BigIntSaIS0_EEixEj___ZNSt6vectorI6BigIntSaIS0_EE3endEv(%"struct.std::vector >"*, i32, i32) - -declare %"struct.__gnu_cxx::__normal_iterator > >"* @___ZN9__gnu_cxx17__normal_iteratorIP6BigIntSt6vectorIS1_SaIS1_EEEppEv___ZNSt6vectorImSaImEED1Ev___ZN6BigIntD1Ev___ZN9__gnu_cxx13new_allocatorI6BigIntE7destroyEPS1____ZSt8_DestroyIP6BigIntSaIS0_EEvT_S3_T0_(i32, %"struct.__gnu_cxx::__normal_iterator > >"*, %"struct.std::vector >"*, %struct.BigInt*, %struct.__false_type*, %struct.BigInt*, %struct.__false_type* noalias ) - -declare void @___ZNSt6vectorI6BigIntSaIS0_EED1Ev___ZN9FibonacciD1Ev___ZNSt6vectorImSaImEEC1ERKS0_(i32, %"struct.std::vector >"*, %struct.Fibonacci*, %"struct.std::vector >"*, %struct.__false_type*) - -define void @___ZN9FibonacciC1Ej___ZN9Fibonacci11show_numberEm(%struct.Fibonacci* %this_this, i32 %functionID, i32 %n_i_n_i) { +define void @func() { bb_init: br label %bb_main -bb_main: ; preds = %meshBB349, %meshBB348, %meshBB347, %meshBB346, %meshBB345.unwinddest, %meshBB345, %meshBB344, %meshBB343, %meshBB342, %meshBB341, %meshBB340.normaldest, %meshBB340, %meshBB339, %invcont17.normaldest.normaldest, %invcont17.normaldest, %meshBB338.unwinddest, %meshBB338, %meshBB337.unwinddest, %meshBB337, %meshBB336.unwinddest, %meshBB336, %meshBB335, %meshBB334, %meshBB333, %meshBB332, %meshBB331, %meshBB330.normaldest, %meshBB330, %meshBB329.normaldest, %meshBB329, %meshBB328, %meshBB327, %meshBB326, %meshBB325.unwinddest, %meshBB325, %meshBB324, %meshBB323.normaldest, %meshBB323, %meshBB322.unwinddest, %meshBB322, %meshBB321, %meshBB320.unwinddest, %meshBB320, %meshBB319.unwinddest, %meshBB319, %meshBB318.unwinddest, %meshBB318, %meshBB317, %meshBB37.fragment, %meshBB37.unwinddest, %meshBB37, %meshBB36.fragment, %meshBB36, %meshBB35.fragment, %meshBB35, %meshBB34.fragment, %meshBB34, %meshBB33.fragment, %meshBB33, %meshBB32.fragment, %meshBB32, %meshBB31 .fragment, %meshBB31, %meshBB30.fragment, %meshBB30.normaldest, %meshBB30, %meshBB29.fragment, %meshBB29.unwinddest, %meshBB29, %meshBB28.fragment, %meshBB28.unwinddest, %meshBB28, %meshBB27.fragment, %meshBB27, %meshBB26.fragment, %meshBB26.normaldest, %meshBB26, %meshBB25.fragment, %meshBB25, %meshBB24.fragment, %meshBB24.unwinddest, %meshBB24, %meshBB23.fragment, %meshBB23.normaldest, %meshBB23, %entry1.fragment.normaldest.normaldest, %entry1.fragment.normaldest, %meshBB22.fragment, %meshBB22.unwinddest, %meshBB22, %meshBB.fragment, %meshBB.unwinddest, %meshBB, %Unwind20, %unwind78.Unwind_crit_edge, %unwind78.fragment.fragment, %unwind78.fragment, %unwind78.fragment316, %unwind78, %invcont70, %unwind66.Unwind_crit_edge, %unwind66.fragment.fragment, %unwind66.fragment, %unwind66.fragment315, %unwind66, %unwind53.nofilter_crit_edge, %unwind53.fragment.fragment, %unwind53.fragment, %unwind53.fragment314, %unwind53, %nofilter.Unwind_crit_edge.normaldest, %nofilter.Unwind_crit _edge, %nofilter, %unwind43.nofilter_crit_edge, %unwind43.fragment.fragment, %unwind43.fragment, %unwind43.fragment313, %unwind43, %invcont41.normaldest, %invcont41, %unwind37.nofilter_crit_edge, %unwind37, %invcont36, %invcont33.unwind_crit_edge.unwinddest, %invcont33.unwind_crit_edge, %invcont30.unwind_crit_edge.unwinddest, %invcont30.unwind_crit_edge, %invcont30.normaldest, %invcont30, %invcont28.unwind_crit_edge, %invcont28.normaldest, %invcont28, %invcont25.unwind_crit_edge.unwinddest, %invcont25.unwind_crit_edge, %invcont25, %invcont22.unwind_crit_edge, %invcont22, %invcont17.unwind_crit_edge, %invcont17, %cond_next.unwind_crit_edge, %cond_next, %invcont12.cond_next_crit_edge, %invcont12.unwind_crit_edge, %invcont12, %cond_true.unwind_crit_edge.unwinddest, %cond_true.unwind_crit_edge, %invcont.cond_next_crit_edge, %invcont16.fragment, %invcont16, %unwind11.fragment, %unwind11, %entry.unwind_crit_edge, %entry1.fragment, %entry1.fragment312, %entry1, %Unwind, %unwind20.U nwind_crit_edge, %unwind20.fragment.fragment, %unwind20.fragment, %unwind20.fragment311, %unwind20, %invcont15, %invcont14.unwind10_crit_edge, %invcont14, %unwind10.Unwind_crit_edge, %unwind10.fragment, %unwind10.fragment310, %unwind10, %invcont.unwind10_crit_edge, %invcont, %unwind.fragment, %unwind, %entry.fragment, %entry.fragment309, %entry, %NewDefault, %LeafBlock, %LeafBlock914, %NodeBlock, %comb_entry.fragment, %old_entry, %bb_init - switch i32 0, label %old_entry [ - i32 2739, label %invcont28.fragment - i32 2688, label %meshBB28.fragment - i32 1318, label %meshBB32.fragment - i32 2964, label %unwind53.fragment.fragment - i32 824, label %unwind78.fragment.fragment - i32 1983, label %meshBB33.fragment - i32 2582, label %invcont30.fragment - i32 2235, label %meshBB36.fragment - i32 1275, label %meshBB343 - i32 2719, label %invcont.fragment - i32 1500, label %entry1.fragment.fragment - i32 815, label %unwind11.fragment - i32 1051, label %entry - i32 2342, label %unwind - i32 1814, label %invcont - i32 315, label %invcont.unwind10_crit_edge - i32 2422, label %unwind10 - i32 2663, label %unwind10.Unwind_crit_edge - i32 266, label %invcont14 - i32 367, label %invcont14.unwind10_crit_edge - i32 2242, label %invcont15 - i32 452, label %unwind20 - i32 419, label %invcont.cond_next_crit_edge - i32 181, label %cond_true - i32 2089, label %unwind20.Unwind_crit_edge - i32 633, label %filter - i32 455, label %Unwind - i32 2016, label %entry1 - i32 263, label %invcont33.unwind_crit_edge - i32 2498, label %invcont36 - i32 2992, label %unwind37 - i32 616, label %entry.unwind_crit_edge - i32 622, label %unwind11 - i32 875, label %invcont16 - i32 766, label %unwind53.nofilter_crit_edge - i32 668, label %filter62 - i32 2138, label %unwind66 - i32 713, label %unwind66.Unwind_crit_edge - i32 1422, label %invcont70 - i32 1976, label %cond_true.unwind_crit_edge - i32 1263, label %invcont12 - i32 2453, label %invcont12.unwind_crit_edge - i32 2876, label %invcont12.cond_next_crit_edge - i32 2271, label %cond_next - i32 2938, label %cond_next.unwind_crit_edge - i32 1082, label %invcont17 - i32 531, label %invcont17.unwind_crit_edge - i32 111, label %invcont22 - i32 1935, label %invcont22.unwind_crit_edge - i32 2004, label %invcont25 - i32 1725, label %invcont25.unwind_crit_edge - i32 1701, label %invcont28 - i32 957, label %invcont28.unwind_crit_edge - i32 165, label %invcont30 - i32 899, label %invcont30.unwind_crit_edge - i32 1092, label %invcont33 - i32 2869, label %unwind37.nofilter_crit_edge - i32 203, label %invcont41 - i32 693, label %unwind43 - i32 2895, label %unwind43.nofilter_crit_edge - i32 1174, label %invcont47 - i32 1153, label %filter19 - i32 2304, label %nofilter - i32 848, label %nofilter.Unwind_crit_edge - i32 1207, label %unwind53 - i32 2848, label %filter75 - i32 59, label %unwind78 - i32 1213, label %unwind78.Unwind_crit_edge - i32 2199, label %filter87 - i32 1268, label %Unwind20 - i32 743, label %old_entry - i32 1276, label %meshBB319 - i32 1619, label %meshBB320 - i32 2047, label %meshBB331 - i32 2828, label %meshBB23.fragment - i32 2530, label %meshBB332 - i32 1389, label %meshBB318 - i32 1450, label %meshBB317 - i32 1416, label %meshBB31.fragment - i32 82, label %meshBB322 - i32 853, label %unwind78.fragment316 - i32 107, label %meshBB24.fragment - i32 1200, label %meshBB37.fragment - i32 605, label %unwind53.fragment314 - i32 209, label %meshBB29.fragment - i32 1513, label %meshBB27.fragment - i32 1542, label %meshBB35.fragment - i32 1873, label %meshBB348 - i32 472, label %meshBB325 - i32 2615, label %meshBB22.fragment - i32 359, label %meshBB.fragment - i32 2467, label %Unwind20.fragment - i32 1671, label %unwind66.fragment.fragment - i32 1006, label %meshBB25.fragment - i32 1243, label %meshBB333 - i32 2795, label %unwind43.fragment313 - i32 1591, label %meshBB335 - i32 773, label %meshBB341 - i32 2440, label %cond_next.fragment - i32 487, label %meshBB326 - i32 394, label %meshBB324 - i32 14, label %invcont16.fragment - i32 574, label %entry1.fragment312 - i32 1453, label %meshBB35 - i32 345, label %entry1.fragment - i32 2951, label %unwind20.fragment - i32 1960, label %meshBB31 - i32 2163, label %meshBB32 - i32 1978, label %Unwind.fragment - i32 1559, label %unwind20.fragment.fragment - i32 950, label %unwind10.fragment - i32 1724, label %unwind53.fragment - i32 514, label %meshBB36 - i32 1928, label %unwind10.fragment.fragment - i32 1266, label %meshBB26 - i32 3148, label %unwind20.fragment311 - i32 1581, label %unwind43.fragment - i32 1829, label %meshBB34 - i32 1472, label %meshBB28 - i32 2657, label %unwind66.fragment - i32 2169, label %meshBB22 - i32 2619, label %meshBB - i32 1397, label %entry.fragment - i32 231, label %invcont41.fragment - i32 2557, label %meshBB338 - i32 2387, label %meshBB30.fragment - i32 2927, label %meshBB340 - i32 2331, label %meshBB321 - i32 47, label %meshBB328 - i32 1753, label %meshBB342 - i32 2074, label %meshBB323 - i32 2128, label %meshBB334 - i32 2396, label %meshBB337 - i32 1811, label %meshBB29 - i32 1113, label %meshBB27 - i32 2232, label %unwind10.fragment310 - i32 804, label %meshBB24 - i32 3099, label %meshBB30 - i32 564, label %meshBB33 - i32 1359, label %unwind.fragment - i32 1906, label %entry.fragment309 - i32 2644, label %entry.fragment.fragment - i32 134, label %entry1.fragment.normaldest - i32 2767, label %comb_entry.fragment - i32 2577, label %meshBB25 - i32 3128, label %meshBB37 - i32 2360, label %meshBB23 - i32 286, label %unwind78.fragment - i32 976, label %meshBB346 - i32 2412, label %meshBB339 - i32 876, label %meshBB345 - i32 3078, label %meshBB329 - i32 1297, label %meshBB347 - i32 3051, label %meshBB336 - i32 1342, label %meshBB344 - i32 728, label %meshBB330 - i32 1778, label %meshBB349 - i32 2784, label %meshBB327 - i32 1854, label %meshBB26.fragment - i32 1025, label %meshBB34.fragment - i32 2139, label %unwind43.fragment.fragment - i32 2217, label %nofilter.fragment - i32 665, label %invcont12.fragment - i32 316, label %invcont22.fragment - i32 1467, label %unwind66.fragment315 - i32 3018, label %unwind37.fragment - i32 1123, label %invcont17.normaldest - i32 2104, label %NewDefault - i32 1639, label %LeafBlock - i32 925, label %LeafBlock914 - i32 2880, label %NodeBlock - ] - -old_entry: ; preds = %bb_main, %bb_main - br label %bb_main - -comb_entry.fragment: ; preds = %bb_main - br label %bb_main - -NodeBlock: ; preds = %bb_main - br label %bb_main - -LeafBlock914: ; preds = %bb_main - br label %bb_main - -LeafBlock: ; preds = %bb_main - br label %bb_main - -NewDefault: ; preds = %bb_main - br label %bb_main - -entry: ; preds = %bb_main - br label %bb_main - -entry.fragment309: ; preds = %bb_main - br label %bb_main - -entry.fragment: ; preds = %bb_main - br label %bb_main - -entry.fragment.fragment: ; preds = %bb_main - invoke void @___ZNSt12_Vector_baseI6BigIntSaIS0_EE13_M_deallocateEPS0_j___ZNSt12_Vector_baseI6BigIntSaIS0_EED2Ev___ZNSt6vectorI6BigIntSaIS0_EEC1ERKS1_( %"struct.std::_Vector_base >"* null, i32 28, %struct.BigInt* null, i32 0, %"struct.std::vector >"* null, %struct.__false_type* null ) - to label %meshBB340 unwind label %meshBB325 - -unwind: ; preds = %bb_main - br label %bb_main - -unwind.fragment: ; preds = %bb_main - br label %bb_main - -invcont: ; preds = %bb_main - br label %bb_main - -invcont.fragment: ; preds = %bb_main - invoke void @_ZN9Fibonacci10get_numberEj( %struct.BigInt* sret null , %struct.Fibonacci* %this_this, i32 %n_i_n_i ) - to label %invcont14 unwind label %meshBB37 - -invcont.unwind10_crit_edge: ; preds = %bb_main - br label %bb_main - -unwind10: ; preds = %bb_main - br label %bb_main - -unwind10.fragment310: ; preds = %bb_main - br label %bb_main - -unwind10.fragment: ; preds = %bb_main - br label %bb_main - -unwind10.fragment.fragment: ; preds = %bb_main - invoke void @___ZNSt6vectorI6BigIntSaIS0_EED1Ev___ZN9FibonacciD1Ev___ZNSt6vectorImSaImEEC1ERKS0_( i32 57, %"struct.std::vector >"* null, %struct.Fibonacci* null, %"struct.std::vector >"* null, %struct.__false_type* null ) - to label %meshBB329 unwind label %meshBB24 - -unwind10.Unwind_crit_edge: ; preds = %bb_main - br label %bb_main - -invcont14: ; preds = %invcont.fragment, %bb_main - br label %bb_main - -invcont14.normaldest: ; No predecessors! - invoke %"struct.__gnu_cxx::__normal_iterator > >"* @___ZN9__gnu_cxx17__normal_iteratorIP6BigIntSt6vectorIS1_SaIS1_EEEppEv___ZNSt6vectorImSaImEED1Ev___ZN6BigIntD1Ev___ZN9__gnu_cxx13new_allocatorI6BigIntE7destroyEPS1____ZSt8_DestroyIP6BigIntSaIS0_EEvT_S3_T0_( i32 14, %"struct.__gnu_cxx::__normal_iterator > >"* null, %"struct.std::vector >"* null, %struct.BigInt* null, %struct.__false_type* null, %struct.BigInt* null, %struct.__false_type* noalias null ) - to label %invcont15 unwind label %meshBB345 ; <%"struct.__gnu_cxx::__normal_iterator > >"*>:0 [#uses=0] - -invcont14.unwind10_crit_edge: ; preds = %bb_main - br label %bb_main - -invcont15: ; preds = %invcont14.normaldest, %bb_main - br label %bb_main - -invcont15.normaldest: ; No predecessors! - br label %UnifiedReturnBlock - -unwind20: ; preds = %bb_main - br label %bb_main - -unwind20.fragment311: ; preds = %bb_main - br label %bb_main - -unwind20.fragment: ; preds = %bb_main - br label %bb_main - -unwind20.fragment.fragment: ; preds = %bb_main - br label %bb_main - -unwind20.Unwind_crit_edge: ; preds = %bb_main - br label %bb_main - -filter: ; preds = %bb_main - br label %UnifiedUnreachableBlock - -Unwind: ; preds = %bb_main - br label %bb_main - -Unwind.fragment: ; preds = %bb_main - br label %UnifiedUnreachableBlock - -entry1: ; preds = %bb_main - br label %bb_main - -entry1.fragment312: ; preds = %bb_main - br label %bb_main - -entry1.fragment: ; preds = %bb_main - br label %bb_main - -entry1.fragment.fragment: ; preds = %bb_main - %tmp52 = invoke i32 @___ZN9__gnu_cxxmiIPK6BigIntS3_St6vectorIS1_SaIS1_EEEENS_17__normal_iteratorIT_T1_E15difference_typeERKSA_RKNS7_IT0_S9_EE___ZNKSt6vectorI6BigIntSaIS0_EE4sizeEv___ZNK9Fibonacci16show_all_numbersEv___ZNKSt6vectorI6BigIntSaIS0_EE8capacityEv( %"struct.__gnu_cxx::__normal_iterator > >"* null, %"struct.__gnu_cxx::__normal_iterator > >"* null, %"struct.std::vector >"* null, i32 16, %struct.Fibonacci* null ) - to label %entry1.fragment.normaldest unwind label %meshBB320 ; [#uses=0] - -entry.unwind_crit_edge: ; preds = %bb_main - br label %bb_main - -unwind11: ; preds = %bb_main - br label %bb_main - -unwind11.fragment: ; preds = %bb_main - br label %bb_main - -invcont16: ; preds = %bb_main - br label %bb_main - -invcont16.fragment: ; preds = %bb_main - br label %bb_main - -invcont.cond_next_crit_edge: ; preds = %bb_main - br label %bb_main - -cond_true: ; preds = %bb_main - invoke void @_ZN9Fibonacci10get_numberEj( %struct.BigInt* sret null , %struct.Fibonacci* %this_this, i32 %n_i_n_i ) - to label %meshBB323 unwind label %cond_true.unwind_crit_edge - -cond_true.unwind_crit_edge: ; preds = %cond_true, %bb_main - br label %bb_main - -cond_true.unwind_crit_edge.unwinddest: ; No predecessors! - br label %bb_main - -invcont12: ; preds = %bb_main - br label %bb_main - -invcont12.fragment: ; preds = %bb_main - invoke %"struct.__gnu_cxx::__normal_iterator > >"* @___ZN9__gnu_cxx17__normal_iteratorIP6BigIntSt6vectorIS1_SaIS1_EEEppEv___ZNSt6vectorImSaImEED1Ev___ZN6BigIntD1Ev___ZN9__gnu_cxx13new_allocatorI6BigIntE7destroyEPS1____ZSt8_DestroyIP6BigIntSaIS0_EEvT_S3_T0_( i32 14, %"struct.__gnu_cxx::__normal_iterator > >"* null, %"struct.std::vector >"* null, %struct.BigInt* null, %struct.__false_type* null, %struct.BigInt* null, %struct.__false_type* noalias null ) - to label %meshBB30 unwind label %meshBB337 ; <%"struct.__gnu_cxx::__normal_iterator > >"*>:1 [#uses=0] - -invcont12.unwind_crit_edge: ; preds = %bb_main - br label %bb_main - -invcont12.cond_next_crit_edge: ; preds = %bb_main - br label %bb_main - -cond_next: ; preds = %bb_main - br label %bb_main - -cond_next.fragment: ; preds = %bb_main - %tmp183 = invoke %struct.BigInt* @___ZNSt6vectorI6BigIntSaIS0_EEixEj___ZNSt6vectorI6BigIntSaIS0_EE3endEv( %"struct.std::vector >"* null, i32 %n_i_n_i, i32 29 ) - to label %invcont17 unwind label %meshBB336 ; <%struct.BigInt*> [#uses=0] - -cond_next.unwind_crit_edge: ; preds = %bb_main - br label %bb_main - -invcont17: ; preds = %cond_next.fragment, %bb_main - br label %bb_main +bb_main: + br label %invcont17.normaldest invcont17.normaldest917: ; No predecessors! - %tmp23 = invoke %"struct.std::basic_ostream >"* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc( %"struct.std::basic_ostream >"* null, i8* getelementptr ([6 x i8]* @.str13, i32 0, i32 0) ) - to label %invcont17.normaldest unwind label %meshBB318 ; <%"struct.std::basic_ostream >"*> [#uses=1] - -invcont17.unwind_crit_edge: ; preds = %bb_main - br label %bb_main - -invcont22: ; preds = %bb_main - br label %bb_main - -invcont22.fragment: ; preds = %bb_main - %tmp26 = invoke %"struct.std::basic_ostream >"* @_ZNSolsEm( %"struct.std::basic_ostream >"* undef, i32 %n_i_n_i ) - to label %invcont25 unwind label %meshBB319 ; <%"struct.std::basic_ostream >"*> [#uses=1] - -invcont22.unwind_crit_edge: ; preds = %bb_main - br label %bb_main - -invcont25: ; preds = %invcont22.fragment, %bb_main - br label %bb_main - -invcont25.normaldest: ; No predecessors! - %tmp2918 = invoke %"struct.std::basic_ostream >"* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc( %"struct.std::basic_ostream >"* %tmp26, i8* getelementptr ([5 x i8]* @.str14, i32 0, i32 0) ) - to label %invcont28 unwind label %invcont25.unwind_crit_edge ; <%"struct.std::basic_ostream >"*> [#uses=0] - -invcont25.unwind_crit_edge: ; preds = %invcont25.normaldest, %bb_main - br label %bb_main - -invcont25.unwind_crit_edge.unwinddest: ; No predecessors! - br label %bb_main - -invcont28: ; preds = %invcont25.normaldest, %bb_main - br label %bb_main - -invcont28.normaldest: ; No predecessors! - br label %bb_main - -invcont28.fragment: ; preds = %bb_main - %tmp311 = invoke %"struct.std::basic_ostream >"* @___ZlsRSoRK6BigInt___ZN9__gnu_cxx13new_allocatorI6BigIntE10deallocateEPS1_j( i32 32, %"struct.std::basic_ostream >"* undef, %struct.BigInt* undef, %struct.__false_type* null, i32 0 ) - to label %invcont30 unwind label %meshBB322 ; <%"struct.std::basic_ostream >"*> [#uses=0] - -invcont28.unwind_crit_edge: ; preds = %bb_main - br label %bb_main - -invcont30: ; preds = %invcont28.fragment, %bb_main - br label %bb_main - -invcont30.normaldest: ; No predecessors! - br label %bb_main - -invcont30.fragment: ; preds = %bb_main - %tmp34 = invoke %"struct.std::basic_ostream >"* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc( %"struct.std::basic_ostream >"* undef, i8* getelementptr ([2 x i8]* @.str15, i32 0, i32 0) ) - to label %meshBB26 unwind label %invcont30.unwind_crit_edge ; <%"struct.std::basic_ostream >"*> [#uses=0] - -invcont30.unwind_crit_edge: ; preds = %invcont30.fragment, %bb_main - br label %bb_main - -invcont30.unwind_crit_edge.unwinddest: ; No predecessors! - br label %bb_main - -invcont33: ; preds = %bb_main - invoke void @_ZNKSt19basic_ostringstreamIcSt11char_traitsIcESaIcEE3strEv( %"struct.std::basic_string,std::allocator >"* sret null , %"struct.std::ostringstream"* null ) - to label %invcont36 unwind label %invcont33.unwind_crit_edge - -invcont33.unwind_crit_edge: ; preds = %invcont33, %bb_main - br label %bb_main - -invcont33.unwind_crit_edge.unwinddest: ; No predecessors! - br label %bb_main - -invcont36: ; preds = %invcont33, %bb_main - br label %bb_main - -invcont36.normaldest: ; No predecessors! - %tmp42 = invoke %"struct.std::basic_ostream >"* @_ZStlsIcSt11char_traitsIcESaIcEERSt13basic_ostreamIT_T0_ES7_RKSbIS4_S5_T1_E( %"struct.std::basic_ostream >"* @_ZSt4cout, %"struct.std::basic_string,std::allocator >"* null ) - to label %invcont41 unwind label %meshBB338 ; <%"struct.std::basic_ostream >"*> [#uses=0] - -unwind37: ; preds = %bb_main - br label %bb_main - -unwind37.fragment: ; preds = %bb_main - invoke void @_ZNSsD1Ev( %"struct.std::basic_string,std::allocator >"* null ) - to label %meshBB330 unwind label %meshBB22 - -unwind37.nofilter_crit_edge: ; preds = %bb_main - br label %bb_main - -invcont41: ; preds = %invcont36.normaldest, %bb_main - br label %bb_main - -invcont41.normaldest: ; No predecessors! - br label %bb_main - -invcont41.fragment: ; preds = %bb_main - invoke void @_ZNSsD1Ev( %"struct.std::basic_string,std::allocator >"* null ) - to label %meshBB23 unwind label %meshBB29 - -unwind43: ; preds = %bb_main - br label %bb_main - -unwind43.fragment313: ; preds = %bb_main - br label %bb_main - -unwind43.fragment: ; preds = %bb_main - br label %bb_main - -unwind43.fragment.fragment: ; preds = %bb_main - br label %bb_main - -unwind43.nofilter_crit_edge: ; preds = %bb_main - br label %bb_main - -invcont47: ; preds = %bb_main - invoke void @_ZNSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED1Ev( %"struct.std::ostringstream"* null ) - to label %invcont70 unwind label %meshBB28 - -filter19: ; preds = %bb_main - br label %UnifiedUnreachableBlock - -nofilter: ; preds = %bb_main - br label %bb_main - -nofilter.fragment: ; preds = %bb_main - invoke void @_ZNSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED1Ev( %"struct.std::ostringstream"* null ) - to label %nofilter.Unwind_crit_edge unwind label %meshBB - -nofilter.Unwind_crit_edge: ; preds = %nofilter.fragment, %bb_main - br label %bb_main - -nofilter.Unwind_crit_edge.normaldest: ; No predecessors! - br label %bb_main - -unwind53: ; preds = %bb_main - br label %bb_main - -unwind53.fragment314: ; preds = %bb_main - br label %bb_main - -unwind53.fragment: ; preds = %bb_main - br label %bb_main - -unwind53.fragment.fragment: ; preds = %bb_main - br label %bb_main - -unwind53.nofilter_crit_edge: ; preds = %bb_main - br label %bb_main - -filter62: ; preds = %bb_main - br label %UnifiedUnreachableBlock - -unwind66: ; preds = %bb_main - br label %bb_main - -unwind66.fragment315: ; preds = %bb_main - br label %bb_main - -unwind66.fragment: ; preds = %bb_main - br label %bb_main - -unwind66.fragment.fragment: ; preds = %bb_main - br label %bb_main - -unwind66.Unwind_crit_edge: ; preds = %bb_main - br label %bb_main - -invcont70: ; preds = %invcont47, %bb_main - br label %bb_main - -invcont70.normaldest: ; No predecessors! - br label %UnifiedReturnBlock - -filter75: ; preds = %bb_main - br label %UnifiedUnreachableBlock - -unwind78: ; preds = %bb_main - br label %bb_main - -unwind78.fragment316: ; preds = %bb_main - br label %bb_main - -unwind78.fragment: ; preds = %bb_main - br label %bb_main - -unwind78.fragment.fragment: ; preds = %bb_main - br label %bb_main - -unwind78.Unwind_crit_edge: ; preds = %bb_main - br label %bb_main - -filter87: ; preds = %bb_main - br label %UnifiedUnreachableBlock - -Unwind20: ; preds = %bb_main - br label %bb_main - -Unwind20.fragment: ; preds = %bb_main - br label %UnifiedUnreachableBlock - -meshBB: ; preds = %nofilter.fragment, %bb_main - br label %bb_main - -meshBB.unwinddest: ; No predecessors! - br label %bb_main - -meshBB.fragment: ; preds = %bb_main - br label %bb_main - -meshBB22: ; preds = %unwind37.fragment, %bb_main - br label %bb_main - -meshBB22.unwinddest: ; No predecessors! - br label %bb_main - -meshBB22.fragment: ; preds = %bb_main - br label %bb_main - -entry1.fragment.normaldest: ; preds = %entry1.fragment.fragment, %bb_main - br label %bb_main - -entry1.fragment.normaldest.normaldest: ; No predecessors! - br label %bb_main - -meshBB23: ; preds = %invcont41.fragment, %bb_main - br label %bb_main - -meshBB23.normaldest: ; No predecessors! - br label %bb_main - -meshBB23.fragment: ; preds = %bb_main - br label %bb_main - -meshBB24: ; preds = %unwind10.fragment.fragment, %bb_main - br label %bb_main - -meshBB24.unwinddest: ; No predecessors! - br label %bb_main - -meshBB24.fragment: ; preds = %bb_main - br label %bb_main - -meshBB25: ; preds = %bb_main - br label %bb_main - -meshBB25.fragment: ; preds = %bb_main - br label %bb_main - -meshBB26: ; preds = %invcont30.fragment, %bb_main - br label %bb_main - -meshBB26.normaldest: ; No predecessors! - br label %bb_main - -meshBB26.fragment: ; preds = %bb_main - br label %bb_main - -meshBB27: ; preds = %bb_main - br label %bb_main - -meshBB27.fragment: ; preds = %bb_main - br label %bb_main - -meshBB28: ; preds = %invcont47, %bb_main - br label %bb_main - -meshBB28.unwinddest: ; No predecessors! - br label %bb_main - -meshBB28.fragment: ; preds = %bb_main - br label %bb_main - -meshBB29: ; preds = %invcont41.fragment, %bb_main - br label %bb_main - -meshBB29.unwinddest: ; No predecessors! - br label %bb_main - -meshBB29.fragment: ; preds = %bb_main - br label %bb_main - -meshBB30: ; preds = %invcont12.fragment, %bb_main - br label %bb_main - -meshBB30.normaldest: ; No predecessors! - br label %bb_main - -meshBB30.fragment: ; preds = %bb_main - br label %bb_main - -meshBB31: ; preds = %bb_main - br label %bb_main - -meshBB31.fragment: ; preds = %bb_main - br label %bb_main - -meshBB32: ; preds = %bb_main - br label %bb_main - -meshBB32.fragment: ; preds = %bb_main - br label %bb_main - -meshBB33: ; preds = %bb_main - br label %bb_main - -meshBB33.fragment: ; preds = %bb_main - br label %bb_main - -meshBB34: ; preds = %bb_main - br label %bb_main - -meshBB34.fragment: ; preds = %bb_main - br label %bb_main - -meshBB35: ; preds = %bb_main - br label %bb_main - -meshBB35.fragment: ; preds = %bb_main - br label %bb_main - -meshBB36: ; preds = %bb_main - br label %bb_main - -meshBB36.fragment: ; preds = %bb_main - br label %bb_main - -meshBB37: ; preds = %invcont.fragment, %bb_main - br label %bb_main - -meshBB37.unwinddest: ; No predecessors! - br label %bb_main - -meshBB37.fragment: ; preds = %bb_main - br label %bb_main - -meshBB317: ; preds = %bb_main - br label %bb_main - -meshBB318: ; preds = %invcont17.normaldest917, %bb_main - br label %bb_main - -meshBB318.unwinddest: ; No predecessors! - br label %bb_main - -meshBB319: ; preds = %invcont22.fragment, %bb_main - br label %bb_main - -meshBB319.unwinddest: ; No predecessors! - br label %bb_main - -meshBB320: ; preds = %entry1.fragment.fragment, %bb_main - br label %bb_main - -meshBB320.unwinddest: ; No predecessors! - br label %bb_main - -meshBB321: ; preds = %bb_main - br label %bb_main - -meshBB322: ; preds = %invcont28.fragment, %bb_main - br label %bb_main - -meshBB322.unwinddest: ; No predecessors! - br label %bb_main - -meshBB323: ; preds = %cond_true, %bb_main - br label %bb_main - -meshBB323.normaldest: ; No predecessors! - br label %bb_main - -meshBB324: ; preds = %bb_main - br label %bb_main - -meshBB325: ; preds = %entry.fragment.fragment, %bb_main - br label %bb_main - -meshBB325.unwinddest: ; No predecessors! - br label %bb_main - -meshBB326: ; preds = %bb_main - br label %bb_main - -meshBB327: ; preds = %bb_main - br label %bb_main - -meshBB328: ; preds = %bb_main - br label %bb_main - -meshBB329: ; preds = %unwind10.fragment.fragment, %bb_main - br label %bb_main - -meshBB329.normaldest: ; No predecessors! - br label %bb_main - -meshBB330: ; preds = %unwind37.fragment, %bb_main - br label %bb_main - -meshBB330.normaldest: ; No predecessors! - br label %bb_main - -meshBB331: ; preds = %bb_main - br label %bb_main - -meshBB332: ; preds = %bb_main - br label %bb_main - -meshBB333: ; preds = %bb_main - br label %bb_main - -meshBB334: ; preds = %bb_main - br label %bb_main - -meshBB335: ; preds = %bb_main - br label %bb_main - -meshBB336: ; preds = %cond_next.fragment, %bb_main - br label %bb_main - -meshBB336.unwinddest: ; No predecessors! - br label %bb_main - -meshBB337: ; preds = %invcont12.fragment, %bb_main - br label %bb_main - -meshBB337.unwinddest: ; No predecessors! - br label %bb_main - -meshBB338: ; preds = %invcont36.normaldest, %bb_main - br label %bb_main - -meshBB338.unwinddest: ; No predecessors! - br label %bb_main + %tmp23 = invoke i32 @foo() + to label %invcont17.normaldest unwind label %invcont17.normaldest.normaldest invcont17.normaldest: ; preds = %invcont17.normaldest917, %bb_main br label %bb_main invcont17.normaldest.normaldest: ; No predecessors! - store %"struct.std::basic_ostream >"* %tmp23, %"struct.std::basic_ostream >"** undef - br label %bb_main - -meshBB339: ; preds = %bb_main - br label %bb_main - -meshBB340: ; preds = %entry.fragment.fragment, %bb_main - br label %bb_main - -meshBB340.normaldest: ; No predecessors! - br label %bb_main - -meshBB341: ; preds = %bb_main - br label %bb_main - -meshBB342: ; preds = %bb_main - br label %bb_main - -meshBB343: ; preds = %bb_main - br label %bb_main - -meshBB344: ; preds = %bb_main - br label %bb_main - -meshBB345: ; preds = %invcont14.normaldest, %bb_main - br label %bb_main - -meshBB345.unwinddest: ; No predecessors! - br label %bb_main - -meshBB346: ; preds = %bb_main - br label %bb_main - -meshBB347: ; preds = %bb_main + %eh_ptr = call i8* @llvm.eh.exception() + %eh_select = tail call i32 (i8*, i8*, ...)* @llvm.eh.selector(i8* %eh_ptr, i8* bitcast (void ()* @__gxx_personality_v0 to i8*), i8* null) + store i32 %tmp23, i32* undef br label %bb_main +} -meshBB348: ; preds = %bb_main - br label %bb_main +declare i32 @foo() -meshBB349: ; preds = %bb_main - br label %bb_main +declare i8* @llvm.eh.exception() -UnifiedUnreachableBlock: ; preds = %Unwind20.fragment, %filter87, %filter75, %filter62, %filter19, %Unwind.fragment, %filter - unreachable +declare i32 @llvm.eh.selector(i8*, i8*, ...) -UnifiedReturnBlock: ; preds = %invcont70.normaldest, %invcont15.normaldest - ret void -} +declare void @__gxx_personality_v0() From eli.friedman at gmail.com Mon Sep 19 18:48:41 2011 From: eli.friedman at gmail.com (Eli Friedman) Date: Mon, 19 Sep 2011 16:48:41 -0700 Subject: [llvm-commits] [llvm] r140097 - in /llvm/trunk: lib/Target/X86/X86InstrSSE.td test/CodeGen/X86/avx-vinsertf128.ll In-Reply-To: <20110919233650.A01A82A6C12C@llvm.org> References: <20110919233650.A01A82A6C12C@llvm.org> Message-ID: On Mon, Sep 19, 2011 at 4:36 PM, Bruno Cardoso Lopes wrote: > Author: bruno > Date: Mon Sep 19 18:36:50 2011 > New Revision: 140097 > > URL: http://llvm.org/viewvc/llvm-project?rev=140097&view=rev > Log: > Based on the small opt Zvi's patch was trying to achieve, eliminate > 128-bit undef subvector insertion into a 256-bit vector > > Modified: > ? ?llvm/trunk/lib/Target/X86/X86InstrSSE.td > ? ?llvm/trunk/test/CodeGen/X86/avx-vinsertf128.ll > > Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=140097&r1=140096&r2=140097&view=diff > ============================================================================== > --- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original) > +++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Mon Sep 19 18:36:50 2011 > @@ -157,6 +157,21 @@ > ?def : Pat<(insert_subvector undef, (v16i8 VR128:$src), (i32 0)), > ? ? ? ? ? (INSERT_SUBREG (v32i8 (IMPLICIT_DEF)), VR128:$src, sub_xmm)>; > > +// Inserting a 128-bit undef vector into the high part of a 256-bit > +// vector should return the 256-bit vector itself. > +def : Pat<(insert_subvector (v8i32 VR256:$src), undef, (i32 4)), > + ? ? ? ? ?(v8i32 VR256:$src)>; > +def : Pat<(insert_subvector (v8f32 VR256:$src), undef, (i32 4)), > + ? ? ? ? ?(v8f32 VR256:$src)>; > +def : Pat<(insert_subvector (v4i64 VR256:$src), undef, (i32 4)), > + ? ? ? ? ?(v4i64 VR256:$src)>; > +def : Pat<(insert_subvector (v4f64 VR256:$src), undef, (i32 4)), > + ? ? ? ? ?(v4f64 VR256:$src)>; > +def : Pat<(insert_subvector (v16i16 VR256:$src), undef, (i32 4)), > + ? ? ? ? ?(v16i16 VR256:$src)>; > +def : Pat<(insert_subvector (v32i8 VR256:$src), undef, (i32 4)), > + ? ? ? ? ?(v32i8 VR256:$src)>; This should really be a DAGCombine... -Eli From resistor at mac.com Mon Sep 19 18:47:10 2011 From: resistor at mac.com (Owen Anderson) Date: Mon, 19 Sep 2011 23:47:10 -0000 Subject: [llvm-commits] [llvm] r140102 - /llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp Message-ID: <20110919234710.F3BBF2A6C12C@llvm.org> Author: resistor Date: Mon Sep 19 18:47:10 2011 New Revision: 140102 URL: http://llvm.org/viewvc/llvm-project?rev=140102&view=rev Log: CPS instructions are UNPREDICTABLE inside IT blocks. Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp?rev=140102&r1=140101&r2=140102&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp (original) +++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp Mon Sep 19 18:47:10 2011 @@ -445,6 +445,10 @@ case ARM::t2Bcc: case ARM::tCBZ: case ARM::tCBNZ: + case ARM::tCPS: + case ARM::t2CPS3p: + case ARM::t2CPS2p: + case ARM::t2CPS1p: // Some instructions (mostly conditional branches) are not // allowed in IT blocks. if (!ITBlock.empty()) From isanbard at gmail.com Mon Sep 19 18:50:34 2011 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 19 Sep 2011 23:50:34 -0000 Subject: [llvm-commits] [llvm] r140103 - /llvm/trunk/test/Transforms/LoopSimplify/2007-10-28-InvokeCrash.ll Message-ID: <20110919235034.B74902A6C12C@llvm.org> Author: void Date: Mon Sep 19 18:50:34 2011 New Revision: 140103 URL: http://llvm.org/viewvc/llvm-project?rev=140103&view=rev Log: Update to the new EH syntax. Modified: llvm/trunk/test/Transforms/LoopSimplify/2007-10-28-InvokeCrash.ll Modified: llvm/trunk/test/Transforms/LoopSimplify/2007-10-28-InvokeCrash.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/2007-10-28-InvokeCrash.ll?rev=140103&r1=140102&r2=140103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/LoopSimplify/2007-10-28-InvokeCrash.ll (original) +++ llvm/trunk/test/Transforms/LoopSimplify/2007-10-28-InvokeCrash.ll Mon Sep 19 18:50:34 2011 @@ -18,16 +18,12 @@ br label %bb_main invcont17.normaldest.normaldest: ; No predecessors! - %eh_ptr = call i8* @llvm.eh.exception() - %eh_select = tail call i32 (i8*, i8*, ...)* @llvm.eh.selector(i8* %eh_ptr, i8* bitcast (void ()* @__gxx_personality_v0 to i8*), i8* null) + %exn = landingpad {i8*, i32} personality i32 (...)* @__gxx_personality_v0 + catch i8* null store i32 %tmp23, i32* undef br label %bb_main } declare i32 @foo() -declare i8* @llvm.eh.exception() - -declare i32 @llvm.eh.selector(i8*, i8*, ...) - -declare void @__gxx_personality_v0() +declare i32 @__gxx_personality_v0(...) From proljc at gmail.com Mon Sep 19 18:57:44 2011 From: proljc at gmail.com (Liu) Date: Tue, 20 Sep 2011 07:57:44 +0800 Subject: [llvm-commits] [patch] add MIPS64 SubTraget and stubs support to LLVM. In-Reply-To: References: Message-ID: On Tue, Sep 20, 2011 at 2:09 AM, Bruno Cardoso Lopes wrote: > Hi, > > On Mon, Sep 19, 2011 at 2:35 AM, Liu wrote: >> Hi all >> >> I've add mips64 SubTarget and stubs support to llvm. Please review and checkin. > > Overall looks good, please fix the space alignment here: > > + ?if ((TheTriple.getArch() == Triple::mips) || > + ? ? ? ? ? ? ?(TheTriple.getArch() == Triple::mips64)) > > Here: > > + ? ?TargetRegistry::RegisterMCInstPrinter(TheMips64Target, > + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?createMipsMCInstPrinter); > + ?TargetRegistry::RegisterMCInstPrinter(TheMips64elTarget, > + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?createMipsMCInstPrinter); > > And here: > > +def FeatureMips64 ? ? ?: SubtargetFeature<"mips64", "MipsArchVersion", > + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?"Mips64", "Mips64 ISA Support", > + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?[FeatureGP64Bit, FeatureFP64Bit, > + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? FeatureCondMov, FeatureBitCount]>; > > -- > Bruno Cardoso Lopes > http://www.brunocardoso.cc > Hi Bruno Thanks for review, the space alignment is fixed:) --Liu -------------- next part -------------- A non-text attachment was scrubbed... Name: 0001-add-mips64-target-stubs.patch Type: text/x-patch Size: 14508 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110920/4dd90a93/attachment-0001.bin From resistor at mac.com Mon Sep 19 18:57:20 2011 From: resistor at mac.com (Owen Anderson) Date: Mon, 19 Sep 2011 23:57:20 -0000 Subject: [llvm-commits] [llvm] r140104 - /llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp Message-ID: <20110919235720.CED472A6C12C@llvm.org> Author: resistor Date: Mon Sep 19 18:57:20 2011 New Revision: 140104 URL: http://llvm.org/viewvc/llvm-project?rev=140104&view=rev Log: tMOVSr is not allowed in an IT block either. Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp?rev=140104&r1=140103&r2=140104&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp (original) +++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp Mon Sep 19 18:57:20 2011 @@ -449,6 +449,7 @@ case ARM::t2CPS3p: case ARM::t2CPS2p: case ARM::t2CPS1p: + case ARM::tMOVSr: // Some instructions (mostly conditional branches) are not // allowed in IT blocks. if (!ITBlock.empty()) From grosbach at apple.com Mon Sep 19 18:58:31 2011 From: grosbach at apple.com (Jim Grosbach) Date: Mon, 19 Sep 2011 23:58:31 -0000 Subject: [llvm-commits] [llvm] r140105 - /llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Message-ID: <20110919235831.D03912A6C12C@llvm.org> Author: grosbach Date: Mon Sep 19 18:58:31 2011 New Revision: 140105 URL: http://llvm.org/viewvc/llvm-project?rev=140105&view=rev Log: Thumb2 range check on CPS mode immediate. Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=140105&r1=140104&r2=140105&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Mon Sep 19 18:58:31 2011 @@ -3301,7 +3301,7 @@ def t2CPS2p : t2CPS<(ins imod_op:$imod, iflags_op:$iflags), "$imod.w\t$iflags">; let imod = 0, iflags = 0, M = 1 in - def t2CPS1p : t2CPS<(ins i32imm:$mode), "\t$mode">; + def t2CPS1p : t2CPS<(ins imm0_31:$mode), "\t$mode">; // A6.3.4 Branches and miscellaneous control // Table A6-14 Change Processor State, and hint instructions From grosbach at apple.com Mon Sep 19 19:00:06 2011 From: grosbach at apple.com (Jim Grosbach) Date: Tue, 20 Sep 2011 00:00:06 -0000 Subject: [llvm-commits] [llvm] r140106 - /llvm/trunk/lib/Target/ARM/ARMInstrThumb.td Message-ID: <20110920000006.76BD52A6C12C@llvm.org> Author: grosbach Date: Mon Sep 19 19:00:06 2011 New Revision: 140106 URL: http://llvm.org/viewvc/llvm-project?rev=140106&view=rev Log: Thumb CPS definition is not disassembler only. Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb.td Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb.td?rev=140106&r1=140105&r2=140106&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb.td Mon Sep 19 19:00:06 2011 @@ -286,8 +286,7 @@ // Change Processor State is a system instruction -- for disassembly only. def tCPS : T1I<(outs), (ins imod_op:$imod, iflags_op:$iflags), - NoItinerary, "cps$imod $iflags", - [/* For disassembly only; pattern left blank */]>, + NoItinerary, "cps$imod $iflags", []>, T1Misc<0b0110011> { // A8.6.38 & B6.1.1 bit imod; From bruno.cardoso at gmail.com Mon Sep 19 19:09:01 2011 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Mon, 19 Sep 2011 17:09:01 -0700 Subject: [llvm-commits] [llvm] r140097 - in /llvm/trunk: lib/Target/X86/X86InstrSSE.td test/CodeGen/X86/avx-vinsertf128.ll In-Reply-To: References: <20110919233650.A01A82A6C12C@llvm.org> Message-ID: You're right! :) Will provide a better fix soon! On Mon, Sep 19, 2011 at 4:48 PM, Eli Friedman wrote: > On Mon, Sep 19, 2011 at 4:36 PM, Bruno Cardoso Lopes > wrote: >> Author: bruno >> Date: Mon Sep 19 18:36:50 2011 >> New Revision: 140097 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=140097&view=rev >> Log: >> Based on the small opt Zvi's patch was trying to achieve, eliminate >> 128-bit undef subvector insertion into a 256-bit vector >> >> Modified: >> ? ?llvm/trunk/lib/Target/X86/X86InstrSSE.td >> ? ?llvm/trunk/test/CodeGen/X86/avx-vinsertf128.ll >> >> Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=140097&r1=140096&r2=140097&view=diff >> ============================================================================== >> --- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original) >> +++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Mon Sep 19 18:36:50 2011 >> @@ -157,6 +157,21 @@ >> ?def : Pat<(insert_subvector undef, (v16i8 VR128:$src), (i32 0)), >> ? ? ? ? ? (INSERT_SUBREG (v32i8 (IMPLICIT_DEF)), VR128:$src, sub_xmm)>; >> >> +// Inserting a 128-bit undef vector into the high part of a 256-bit >> +// vector should return the 256-bit vector itself. >> +def : Pat<(insert_subvector (v8i32 VR256:$src), undef, (i32 4)), >> + ? ? ? ? ?(v8i32 VR256:$src)>; >> +def : Pat<(insert_subvector (v8f32 VR256:$src), undef, (i32 4)), >> + ? ? ? ? ?(v8f32 VR256:$src)>; >> +def : Pat<(insert_subvector (v4i64 VR256:$src), undef, (i32 4)), >> + ? ? ? ? ?(v4i64 VR256:$src)>; >> +def : Pat<(insert_subvector (v4f64 VR256:$src), undef, (i32 4)), >> + ? ? ? ? ?(v4f64 VR256:$src)>; >> +def : Pat<(insert_subvector (v16i16 VR256:$src), undef, (i32 4)), >> + ? ? ? ? ?(v16i16 VR256:$src)>; >> +def : Pat<(insert_subvector (v32i8 VR256:$src), undef, (i32 4)), >> + ? ? ? ? ?(v32i8 VR256:$src)>; > > This should really be a DAGCombine... > > -Eli > -- Bruno Cardoso Lopes http://www.brunocardoso.cc From bruno.cardoso at gmail.com Mon Sep 19 19:08:12 2011 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Tue, 20 Sep 2011 00:08:12 -0000 Subject: [llvm-commits] [llvm] r140107 - in /llvm/trunk/test/CodeGen/X86: 2006-05-11-InstrSched.ll 2009-06-05-ScalarToVectorByteMMX.ll movgs.ll v2f32.ll vec_set-C.ll Message-ID: <20110920000812.E20BC2A6C12C@llvm.org> Author: bruno Date: Mon Sep 19 19:08:12 2011 New Revision: 140107 URL: http://llvm.org/viewvc/llvm-project?rev=140107&view=rev Log: Attempt to fix -mtriple=i686-{cygwin|mingw|win32} regressions. Nakamura, if this doesn't work, please provide more details. Modified: llvm/trunk/test/CodeGen/X86/2006-05-11-InstrSched.ll llvm/trunk/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll llvm/trunk/test/CodeGen/X86/movgs.ll llvm/trunk/test/CodeGen/X86/v2f32.ll llvm/trunk/test/CodeGen/X86/vec_set-C.ll Modified: llvm/trunk/test/CodeGen/X86/2006-05-11-InstrSched.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-05-11-InstrSched.ll?rev=140107&r1=140106&r2=140107&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/2006-05-11-InstrSched.ll (original) +++ llvm/trunk/test/CodeGen/X86/2006-05-11-InstrSched.ll Mon Sep 19 19:08:12 2011 @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 -stats -realign-stack=0 |&\ +; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -mattr=+sse2 -stats -realign-stack=0 |&\ ; RUN: grep {asm-printer} | grep 34 target datalayout = "e-p:32:32" Modified: llvm/trunk/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll?rev=140107&r1=140106&r2=140107&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll (original) +++ llvm/trunk/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll Mon Sep 19 19:08:12 2011 @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 | not grep movl +; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -mattr=+mmx,+sse2 | not grep movl define <8 x i8> @a(i8 zeroext %x) nounwind { %r = insertelement <8 x i8> undef, i8 %x, i32 0 Modified: llvm/trunk/test/CodeGen/X86/movgs.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/movgs.ll?rev=140107&r1=140106&r2=140107&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/movgs.ll (original) +++ llvm/trunk/test/CodeGen/X86/movgs.ll Mon Sep 19 19:08:12 2011 @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=sse41 | FileCheck %s --check-prefix=X32 +; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -mattr=sse41 | FileCheck %s --check-prefix=X32 ; RUN: llc < %s -mtriple=x86_64-linux -mattr=sse41 | FileCheck %s --check-prefix=X64 ; RUN: llc < %s -mtriple=x86_64-win32 -mattr=sse41 | FileCheck %s --check-prefix=X64 Modified: llvm/trunk/test/CodeGen/X86/v2f32.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/v2f32.ll?rev=140107&r1=140106&r2=140107&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/v2f32.ll (original) +++ llvm/trunk/test/CodeGen/X86/v2f32.ll Mon Sep 19 19:08:12 2011 @@ -1,6 +1,6 @@ ; RUN: llc < %s -mtriple=x86_64-linux -mcpu=penryn -asm-verbose=0 -o - | FileCheck %s -check-prefix=X64 ; RUN: llc < %s -mtriple=x86_64-win32 -mcpu=penryn -asm-verbose=0 -o - | FileCheck %s -check-prefix=W64 -; RUN: llc < %s -mcpu=yonah -march=x86 -asm-verbose=0 -o - | FileCheck %s -check-prefix=X32 +; RUN: llc < %s -mcpu=yonah -march=x86 -mtriple=i386-linux-gnu -asm-verbose=0 -o - | FileCheck %s -check-prefix=X32 ; PR7518 define void @test1(<2 x float> %Q, float *%P2) nounwind { Modified: llvm/trunk/test/CodeGen/X86/vec_set-C.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_set-C.ll?rev=140107&r1=140106&r2=140107&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/vec_set-C.ll (original) +++ llvm/trunk/test/CodeGen/X86/vec_set-C.ll Mon Sep 19 19:08:12 2011 @@ -1,6 +1,6 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movq -; RUN: llc < %s -march=x86 -mattr=+sse2 | grep mov | count 1 -; RUN: llc < %s -march=x86-64 -mattr=+sse2 | grep movd +; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -mattr=+sse2 | grep movq +; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -mattr=+sse2 | grep mov | count 1 +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-linux -mattr=+sse2 | grep movd define <2 x i64> @t1(i64 %x) nounwind { %tmp8 = insertelement <2 x i64> zeroinitializer, i64 %x, i32 0 From bruno.cardoso at gmail.com Mon Sep 19 19:10:18 2011 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Mon, 19 Sep 2011 17:10:18 -0700 Subject: [llvm-commits] [llvm] r139939 - in /llvm/trunk/lib/Target/X86: X86MachineFunctionInfo.h X86RegisterInfo.cpp In-Reply-To: References: <20110916205828.B02CB2A6C12C@llvm.org> Message-ID: I've tried something in r140107 On Sat, Sep 17, 2011 at 6:48 PM, NAKAMURA Takumi wrote: > Bruno, > > With -mtriple=i686-{cygwin|mingw|win32}, 5 tests have been failing. > Apparently they might be regression, handling frame pointer would be redundant. > > Failing Tests (5): > ? ?LLVM :: CodeGen/X86/2006-05-11-InstrSched.ll > ? ?LLVM :: CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll > ? ?LLVM :: CodeGen/X86/movgs.ll > ? ?LLVM :: CodeGen/X86/v2f32.ll > ? ?LLVM :: CodeGen/X86/vec_set-C.ll > > ...Takumi > -- Bruno Cardoso Lopes http://www.brunocardoso.cc From grosbach at apple.com Mon Sep 19 19:10:37 2011 From: grosbach at apple.com (Jim Grosbach) Date: Tue, 20 Sep 2011 00:10:37 -0000 Subject: [llvm-commits] [llvm] r140108 - /llvm/trunk/lib/Target/ARM/ARMInstrThumb.td Message-ID: <20110920001037.4A4C92A6C12C@llvm.org> Author: grosbach Date: Mon Sep 19 19:10:37 2011 New Revision: 140108 URL: http://llvm.org/viewvc/llvm-project?rev=140108&view=rev Log: Thumb1 convenience aliases for disassembler round-trip testing. CPS instruction. Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb.td Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb.td?rev=140108&r1=140107&r2=140108&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb.td Mon Sep 19 19:10:37 2011 @@ -1426,3 +1426,11 @@ // In Thumb1, "nop" is encoded as a "mov r8, r8". Technically, the bf00 // encoding is available on ARMv6K, but we don't differentiate that finely. def : InstAlias<"nop", (tMOVr R8, R8, 14, 0)>,Requires<[IsThumb, IsThumb1Only]>; + + +// For round-trip assembly/disassembly, we have to handle a CPS instruction +// without any iflags. That's not, strictly speaking, valid syntax, but it's +// a useful extention and assembles to defined behaviour (the insn does +// nothing). +def : tInstAlias<"cps$imod", (tCPS imod_op:$imod, 0)>; +def : tInstAlias<"cps$imod", (tCPS imod_op:$imod, 0)>; From echristo at apple.com Mon Sep 19 19:13:13 2011 From: echristo at apple.com (Eric Christopher) Date: Tue, 20 Sep 2011 00:13:13 -0000 Subject: [llvm-commits] [llvm] r140109 - /llvm/trunk/tools/CMakeLists.txt Message-ID: <20110920001313.579872A6C12C@llvm.org> Author: echristo Date: Mon Sep 19 19:13:13 2011 New Revision: 140109 URL: http://llvm.org/viewvc/llvm-project?rev=140109&view=rev Log: Remove llvmc from CMake as well. Modified: llvm/trunk/tools/CMakeLists.txt Modified: llvm/trunk/tools/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/CMakeLists.txt?rev=140109&r1=140108&r2=140109&view=diff ============================================================================== --- llvm/trunk/tools/CMakeLists.txt (original) +++ llvm/trunk/tools/CMakeLists.txt Mon Sep 19 19:13:13 2011 @@ -46,7 +46,6 @@ add_subdirectory(llvm-bcanalyzer) add_subdirectory(llvm-stub) add_subdirectory(edis) -add_subdirectory(llvmc) if( NOT WIN32 ) add_subdirectory(lto) From grosbach at apple.com Mon Sep 19 19:15:03 2011 From: grosbach at apple.com (Jim Grosbach) Date: Tue, 20 Sep 2011 00:15:03 -0000 Subject: [llvm-commits] [llvm] r140110 - /llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Message-ID: <20110920001504.0684C2A6C12C@llvm.org> Author: grosbach Date: Mon Sep 19 19:15:03 2011 New Revision: 140110 URL: http://llvm.org/viewvc/llvm-project?rev=140110&view=rev Log: Thumb2 assembly parsing and encoding for UQADD16/UQADD8. Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s?rev=140110&r1=140109&r2=140110&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s (original) +++ llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Mon Sep 19 19:15:03 2011 @@ -2810,3 +2810,19 @@ @ CHECK: umull r2, r4, r6, r8 @ encoding: [0xa6,0xfb,0x08,0x24] @ CHECK: it gt @ encoding: [0xc8,0xbf] @ CHECK: umullgt r6, r1, r2, r6 @ encoding: [0xa2,0xfb,0x06,0x61] + + + at ------------------------------------------------------------------------------ +@ UQADD16/UQADD8 + at ------------------------------------------------------------------------------ + uqadd16 r1, r2, r3 + uqadd8 r3, r4, r8 + ite gt + uqadd16gt r4, r7, r9 + uqadd8le r8, r1, r2 + +@ CHECK: uqadd16 r1, r2, r3 @ encoding: [0x92,0xfa,0x53,0xf1] +@ CHECK: uqadd8 r3, r4, r8 @ encoding: [0x84,0xfa,0x58,0xf3] +@ CHECK: ite gt @ encoding: [0xcc,0xbf] +@ CHECK: uqadd16gt r4, r7, r9 @ encoding: [0x97,0xfa,0x59,0xf4] +@ CHECK: uqadd8le r8, r1, r2 @ encoding: [0x81,0xfa,0x52,0xf8] From grosbach at apple.com Mon Sep 19 19:18:52 2011 From: grosbach at apple.com (Jim Grosbach) Date: Tue, 20 Sep 2011 00:18:52 -0000 Subject: [llvm-commits] [llvm] r140111 - in /llvm/trunk: lib/Target/ARM/ARMInstrInfo.td test/MC/ARM/basic-thumb2-instructions.s Message-ID: <20110920001852.E22182A6C12C@llvm.org> Author: grosbach Date: Mon Sep 19 19:18:52 2011 New Revision: 140111 URL: http://llvm.org/viewvc/llvm-project?rev=140111&view=rev Log: Thumb2 assembly parsing and encoding for UQASX/UQSAX. Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=140111&r1=140110&r2=140111&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Mon Sep 19 19:18:52 2011 @@ -4958,6 +4958,10 @@ def : MnemonicAlias<"uhaddsubx", "uhasx">; // UHSAX == UHSUBADDX def : MnemonicAlias<"uhsubaddx", "uhsax">; +// UQASX == UQADDSUBX +def : MnemonicAlias<"uqaddsubx", "uqasx">; +// UQSAX == UQSUBADDX +def : MnemonicAlias<"uqsubaddx", "uqsax">; // LDRSBT/LDRHT/LDRSHT post-index offset if optional. // Note that the write-back output register is a dummy operand for MC (it's Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s?rev=140111&r1=140110&r2=140111&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s (original) +++ llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Mon Sep 19 19:18:52 2011 @@ -2826,3 +2826,31 @@ @ CHECK: ite gt @ encoding: [0xcc,0xbf] @ CHECK: uqadd16gt r4, r7, r9 @ encoding: [0x97,0xfa,0x59,0xf4] @ CHECK: uqadd8le r8, r1, r2 @ encoding: [0x81,0xfa,0x52,0xf8] + + + at ------------------------------------------------------------------------------ +@ UQASX/UQSAX + at ------------------------------------------------------------------------------ + uqasx r1, r2, r3 + uqsax r3, r4, r8 + ite gt + uqasxgt r4, r7, r9 + uqsaxle r8, r1, r2 + + uqaddsubx r1, r2, r3 + uqsubaddx r3, r4, r8 + ite gt + uqaddsubxgt r4, r7, r9 + uqsubaddxle r8, r1, r2 + +@ CHECK: uqasx r1, r2, r3 @ encoding: [0xa2,0xfa,0x53,0xf1] +@ CHECK: uqsax r3, r4, r8 @ encoding: [0xe4,0xfa,0x58,0xf3] +@ CHECK: ite gt @ encoding: [0xcc,0xbf] +@ CHECK: uqasxgt r4, r7, r9 @ encoding: [0xa7,0xfa,0x59,0xf4] +@ CHECK: uqsaxle r8, r1, r2 @ encoding: [0xe1,0xfa,0x52,0xf8] + +@ CHECK: uqasx r1, r2, r3 @ encoding: [0xa2,0xfa,0x53,0xf1] +@ CHECK: uqsax r3, r4, r8 @ encoding: [0xe4,0xfa,0x58,0xf3] +@ CHECK: ite gt @ encoding: [0xcc,0xbf] +@ CHECK: uqasxgt r4, r7, r9 @ encoding: [0xa7,0xfa,0x59,0xf4] +@ CHECK: uqsaxle r8, r1, r2 @ encoding: [0xe1,0xfa,0x52,0xf8] From grosbach at apple.com Mon Sep 19 19:20:45 2011 From: grosbach at apple.com (Jim Grosbach) Date: Tue, 20 Sep 2011 00:20:45 -0000 Subject: [llvm-commits] [llvm] r140112 - /llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Message-ID: <20110920002045.1EC382A6C12C@llvm.org> Author: grosbach Date: Mon Sep 19 19:20:44 2011 New Revision: 140112 URL: http://llvm.org/viewvc/llvm-project?rev=140112&view=rev Log: Thumb2 assembly parsing and encoding for UQSUB16/UQSUB8. Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s?rev=140112&r1=140111&r2=140112&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s (original) +++ llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Mon Sep 19 19:20:44 2011 @@ -2854,3 +2854,19 @@ @ CHECK: ite gt @ encoding: [0xcc,0xbf] @ CHECK: uqasxgt r4, r7, r9 @ encoding: [0xa7,0xfa,0x59,0xf4] @ CHECK: uqsaxle r8, r1, r2 @ encoding: [0xe1,0xfa,0x52,0xf8] + + + at ------------------------------------------------------------------------------ +@ UQSUB16/UQSUB8 + at ------------------------------------------------------------------------------ + uqsub8 r8, r2, r9 + uqsub16 r1, r9, r7 + ite gt + uqsub8gt r3, r1, r6 + uqsub16le r4, r6, r4 + +@ CHECK: uqsub8 r8, r2, r9 @ encoding: [0xc2,0xfa,0x59,0xf8] +@ CHECK: uqsub16 r1, r9, r7 @ encoding: [0xd9,0xfa,0x57,0xf1] +@ CHECK: ite gt @ encoding: [0xcc,0xbf] +@ CHECK: uqsub8gt r3, r1, r6 @ encoding: [0xc1,0xfa,0x56,0xf3] +@ CHECK: uqsub16le r4, r6, r4 @ encoding: [0xd6,0xfa,0x54,0xf4] From grosbach at apple.com Mon Sep 19 19:23:51 2011 From: grosbach at apple.com (Jim Grosbach) Date: Tue, 20 Sep 2011 00:23:51 -0000 Subject: [llvm-commits] [llvm] r140113 - /llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Message-ID: <20110920002351.729232A6C12C@llvm.org> Author: grosbach Date: Mon Sep 19 19:23:51 2011 New Revision: 140113 URL: http://llvm.org/viewvc/llvm-project?rev=140113&view=rev Log: Thumb2 assembly parsing and encoding for UQSAD8/USADA8. Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s?rev=140113&r1=140112&r2=140113&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s (original) +++ llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Mon Sep 19 19:23:51 2011 @@ -2870,3 +2870,19 @@ @ CHECK: ite gt @ encoding: [0xcc,0xbf] @ CHECK: uqsub8gt r3, r1, r6 @ encoding: [0xc1,0xfa,0x56,0xf3] @ CHECK: uqsub16le r4, r6, r4 @ encoding: [0xd6,0xfa,0x54,0xf4] + + + at ------------------------------------------------------------------------------ +@ UQSUB16/UQSUB8 + at ------------------------------------------------------------------------------ + usad8 r1, r9, r7 + usada8 r8, r2, r9, r12 + ite gt + usada8gt r3, r1, r6, r9 + usad8le r4, r6, r4 + +@ CHECK: usad8 r1, r9, r7 @ encoding: [0x79,0xfb,0x07,0xf1] +@ CHECK: usada8 r8, r2, r9, r12 @ encoding: [0x72,0xfb,0x09,0xc8] +@ CHECK: ite gt @ encoding: [0xcc,0xbf] +@ CHECK: usada8gt r3, r1, r6, r9 @ encoding: [0x71,0xfb,0x06,0x93] +@ CHECK: usad8le r4, r6, r4 @ encoding: [0x76,0xfb,0x04,0xf4] From grosbach at apple.com Mon Sep 19 19:24:38 2011 From: grosbach at apple.com (Jim Grosbach) Date: Tue, 20 Sep 2011 00:24:38 -0000 Subject: [llvm-commits] [llvm] r140114 - /llvm/trunk/test/MC/ARM/basic-arm-instructions.s Message-ID: <20110920002438.2612F2A6C12C@llvm.org> Author: grosbach Date: Mon Sep 19 19:24:37 2011 New Revision: 140114 URL: http://llvm.org/viewvc/llvm-project?rev=140114&view=rev Log: Tidy up. Modified: llvm/trunk/test/MC/ARM/basic-arm-instructions.s Modified: llvm/trunk/test/MC/ARM/basic-arm-instructions.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-arm-instructions.s?rev=140114&r1=140113&r2=140114&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/basic-arm-instructions.s (original) +++ llvm/trunk/test/MC/ARM/basic-arm-instructions.s Mon Sep 19 19:24:37 2011 @@ -2297,7 +2297,6 @@ @------------------------------------------------------------------------------ @ USAT @------------------------------------------------------------------------------ - usat r8, #1, r10 usat r8, #4, r10, lsl #0 usat r8, #5, r10, lsl #31 @@ -2310,6 +2309,7 @@ @ CHECK: usat r8, #31, r10, asr #32 @ encoding: [0x5a,0x80,0xff,0xe6] @ CHECK: usat r8, #16, r10, asr #1 @ encoding: [0xda,0x80,0xf0,0xe6] + @------------------------------------------------------------------------------ @ USAT16 @------------------------------------------------------------------------------ @@ -2374,6 +2374,7 @@ @ CHECK: uxtab16 r3, r2, r1, ror #16 @ encoding: [0x71,0x38,0xc2,0xe6] @ CHECK: uxtab16eq r1, r2, r3, ror #24 @ encoding: [0x73,0x1c,0xc2,0x06] + @------------------------------------------------------------------------------ @ UXTAH @------------------------------------------------------------------------------ @@ -2436,6 +2437,7 @@ @ CHECK: uxthle r2, r2, ror #16 @ encoding: [0x72,0x28,0xff,0xd6] @ CHECK: uxth r9, r3, ror #24 @ encoding: [0x73,0x9c,0xff,0xe6] + @------------------------------------------------------------------------------ @ WFE/WFI/YIELD @------------------------------------------------------------------------------ From grosbach at apple.com Mon Sep 19 19:26:34 2011 From: grosbach at apple.com (Jim Grosbach) Date: Tue, 20 Sep 2011 00:26:34 -0000 Subject: [llvm-commits] [llvm] r140116 - /llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Message-ID: <20110920002634.B264A2A6C12C@llvm.org> Author: grosbach Date: Mon Sep 19 19:26:34 2011 New Revision: 140116 URL: http://llvm.org/viewvc/llvm-project?rev=140116&view=rev Log: Remove incorrect comments. These are not disassmebly only patterns. Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=140116&r1=140115&r2=140116&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Mon Sep 19 19:26:34 2011 @@ -2005,8 +2005,7 @@ let Inst{7-4} = op7_4; } -// Unsigned Sum of Absolute Differences [and Accumulate] -- for disassembly only - +// Unsigned Sum of Absolute Differences [and Accumulate]. def t2USAD8 : T2ThreeReg_mac<0, 0b111, 0b0000, (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), NoItinerary, "usad8", "\t$Rd, $Rn, $Rm", []>, @@ -2018,8 +2017,7 @@ "usada8", "\t$Rd, $Rn, $Rm, $Ra", []>, Requires<[IsThumb2, HasThumb2DSP]>; -// Signed/Unsigned saturate -- for disassembly only - +// Signed/Unsigned saturate. class T2SatI pattern> : T2I { @@ -2038,8 +2036,7 @@ def t2SSAT: T2SatI< (outs rGPR:$Rd), (ins imm1_32:$sat_imm, rGPR:$Rn, shift_imm:$sh), - NoItinerary, "ssat", "\t$Rd, $sat_imm, $Rn$sh", - [/* For disassembly only; pattern left blank */]> { + NoItinerary, "ssat", "\t$Rd, $sat_imm, $Rn$sh", []> { let Inst{31-27} = 0b11110; let Inst{25-22} = 0b1100; let Inst{20} = 0; @@ -2049,8 +2046,7 @@ def t2SSAT16: T2SatI< (outs rGPR:$Rd), (ins imm1_16:$sat_imm, rGPR:$Rn), NoItinerary, - "ssat16", "\t$Rd, $sat_imm, $Rn", - [/* For disassembly only; pattern left blank */]>, + "ssat16", "\t$Rd, $sat_imm, $Rn", []>, Requires<[IsThumb2, HasThumb2DSP]> { let Inst{31-27} = 0b11110; let Inst{25-22} = 0b1100; @@ -2064,8 +2060,7 @@ def t2USAT: T2SatI< (outs rGPR:$Rd), (ins imm0_31:$sat_imm, rGPR:$Rn, shift_imm:$sh), - NoItinerary, "usat", "\t$Rd, $sat_imm, $Rn$sh", - [/* For disassembly only; pattern left blank */]> { + NoItinerary, "usat", "\t$Rd, $sat_imm, $Rn$sh", []> { let Inst{31-27} = 0b11110; let Inst{25-22} = 0b1110; let Inst{20} = 0; @@ -2074,8 +2069,7 @@ def t2USAT16: T2SatI<(outs rGPR:$Rd), (ins imm0_15:$sat_imm, rGPR:$Rn), NoItinerary, - "usat16", "\t$Rd, $sat_imm, $Rn", - [/* For disassembly only; pattern left blank */]>, + "usat16", "\t$Rd, $sat_imm, $Rn", []>, Requires<[IsThumb2, HasThumb2DSP]> { let Inst{31-27} = 0b11110; let Inst{25-22} = 0b1110; From grosbach at apple.com Mon Sep 19 19:27:36 2011 From: grosbach at apple.com (Jim Grosbach) Date: Tue, 20 Sep 2011 00:27:36 -0000 Subject: [llvm-commits] [llvm] r140117 - /llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Message-ID: <20110920002736.625652A6C12C@llvm.org> Author: grosbach Date: Mon Sep 19 19:27:36 2011 New Revision: 140117 URL: http://llvm.org/viewvc/llvm-project?rev=140117&view=rev Log: Thumb2 assembly parsing and encoding for USAT. Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s?rev=140117&r1=140116&r2=140117&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s (original) +++ llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Mon Sep 19 19:27:36 2011 @@ -2886,3 +2886,19 @@ @ CHECK: ite gt @ encoding: [0xcc,0xbf] @ CHECK: usada8gt r3, r1, r6, r9 @ encoding: [0x71,0xfb,0x06,0x93] @ CHECK: usad8le r4, r6, r4 @ encoding: [0x76,0xfb,0x04,0xf4] + + + at ------------------------------------------------------------------------------ +@ USAT + at ------------------------------------------------------------------------------ + usat r8, #1, r10 + usat r8, #4, r10, lsl #0 + usat r8, #5, r10, lsl #31 + usat r8, #31, r10, asr #32 + usat r8, #16, r10, asr #1 + +@ CHECK: usat r8, #1, r10 @ encoding: [0x8a,0xf3,0x01,0x08] +@ CHECK: usat r8, #4, r10 @ encoding: [0x8a,0xf3,0x04,0x08] +@ CHECK: usat r8, #5, r10, lsl #31 @ encoding: [0x8a,0xf3,0xc5,0x78] +@ CHECK: usat r8, #31, r10, asr #32 @ encoding: [0xaa,0xf3,0x1f,0x08] +@ CHECK: usat r8, #16, r10, asr #1 @ encoding: [0xaa,0xf3,0x50,0x08] From grosbach at apple.com Mon Sep 19 19:28:25 2011 From: grosbach at apple.com (Jim Grosbach) Date: Tue, 20 Sep 2011 00:28:25 -0000 Subject: [llvm-commits] [llvm] r140118 - /llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Message-ID: <20110920002825.431712A6C12C@llvm.org> Author: grosbach Date: Mon Sep 19 19:28:25 2011 New Revision: 140118 URL: http://llvm.org/viewvc/llvm-project?rev=140118&view=rev Log: Thumb2 assembly parsing and encoding for USAT16. Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s?rev=140118&r1=140117&r2=140118&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s (original) +++ llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Mon Sep 19 19:28:25 2011 @@ -2902,3 +2902,13 @@ @ CHECK: usat r8, #5, r10, lsl #31 @ encoding: [0x8a,0xf3,0xc5,0x78] @ CHECK: usat r8, #31, r10, asr #32 @ encoding: [0xaa,0xf3,0x1f,0x08] @ CHECK: usat r8, #16, r10, asr #1 @ encoding: [0xaa,0xf3,0x50,0x08] + + + at ------------------------------------------------------------------------------ +@ USAT16 + at ------------------------------------------------------------------------------ + usat16 r2, #2, r7 + usat16 r3, #15, r5 + +@ CHECK: usat16 r2, #2, r7 @ encoding: [0xa7,0xf3,0x02,0x02] +@ CHECK: usat16 r3, #15, r5 @ encoding: [0xa5,0xf3,0x0f,0x03] From eli.friedman at gmail.com Mon Sep 19 19:30:33 2011 From: eli.friedman at gmail.com (Eli Friedman) Date: Mon, 19 Sep 2011 17:30:33 -0700 Subject: [llvm-commits] [llvm] r140107 - in /llvm/trunk/test/CodeGen/X86: 2006-05-11-InstrSched.ll 2009-06-05-ScalarToVectorByteMMX.ll movgs.ll v2f32.ll vec_set-C.ll In-Reply-To: <20110920000812.E20BC2A6C12C@llvm.org> References: <20110920000812.E20BC2A6C12C@llvm.org> Message-ID: On Mon, Sep 19, 2011 at 5:08 PM, Bruno Cardoso Lopes wrote: > Author: bruno > Date: Mon Sep 19 19:08:12 2011 > New Revision: 140107 > > URL: http://llvm.org/viewvc/llvm-project?rev=140107&view=rev > Log: > Attempt to fix -mtriple=i686-{cygwin|mingw|win32} regressions. Nakamura, > if this doesn't work, please provide more details. I think there's a real regression here... I'm pretty sure you "broke" the fix in r100559 (see also http://llvm.org/bugs/show_bug.cgi?id=6696). Not sure how much we care, though. -Eli > Modified: > ? ?llvm/trunk/test/CodeGen/X86/2006-05-11-InstrSched.ll > ? ?llvm/trunk/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll > ? ?llvm/trunk/test/CodeGen/X86/movgs.ll > ? ?llvm/trunk/test/CodeGen/X86/v2f32.ll > ? ?llvm/trunk/test/CodeGen/X86/vec_set-C.ll > > Modified: llvm/trunk/test/CodeGen/X86/2006-05-11-InstrSched.ll > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-05-11-InstrSched.ll?rev=140107&r1=140106&r2=140107&view=diff > ============================================================================== > --- llvm/trunk/test/CodeGen/X86/2006-05-11-InstrSched.ll (original) > +++ llvm/trunk/test/CodeGen/X86/2006-05-11-InstrSched.ll Mon Sep 19 19:08:12 2011 > @@ -1,4 +1,4 @@ > -; RUN: llc < %s -march=x86 -mattr=+sse2 -stats -realign-stack=0 |&\ > +; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -mattr=+sse2 -stats -realign-stack=0 |&\ > ?; RUN: ? ? grep {asm-printer} | grep 34 > > ?target datalayout = "e-p:32:32" > > Modified: llvm/trunk/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll?rev=140107&r1=140106&r2=140107&view=diff > ============================================================================== > --- llvm/trunk/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll (original) > +++ llvm/trunk/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll Mon Sep 19 19:08:12 2011 > @@ -1,4 +1,4 @@ > -; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 | not grep movl > +; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -mattr=+mmx,+sse2 | not grep movl > > ?define <8 x i8> @a(i8 zeroext %x) nounwind { > ? %r = insertelement <8 x i8> undef, i8 %x, i32 0 > > Modified: llvm/trunk/test/CodeGen/X86/movgs.ll > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/movgs.ll?rev=140107&r1=140106&r2=140107&view=diff > ============================================================================== > --- llvm/trunk/test/CodeGen/X86/movgs.ll (original) > +++ llvm/trunk/test/CodeGen/X86/movgs.ll Mon Sep 19 19:08:12 2011 > @@ -1,4 +1,4 @@ > -; RUN: llc < %s -march=x86 -mattr=sse41 | FileCheck %s --check-prefix=X32 > +; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -mattr=sse41 | FileCheck %s --check-prefix=X32 > ?; RUN: llc < %s -mtriple=x86_64-linux -mattr=sse41 | FileCheck %s --check-prefix=X64 > ?; RUN: llc < %s -mtriple=x86_64-win32 -mattr=sse41 | FileCheck %s --check-prefix=X64 > > > Modified: llvm/trunk/test/CodeGen/X86/v2f32.ll > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/v2f32.ll?rev=140107&r1=140106&r2=140107&view=diff > ============================================================================== > --- llvm/trunk/test/CodeGen/X86/v2f32.ll (original) > +++ llvm/trunk/test/CodeGen/X86/v2f32.ll Mon Sep 19 19:08:12 2011 > @@ -1,6 +1,6 @@ > ?; RUN: llc < %s -mtriple=x86_64-linux -mcpu=penryn -asm-verbose=0 -o - | FileCheck %s -check-prefix=X64 > ?; RUN: llc < %s -mtriple=x86_64-win32 -mcpu=penryn -asm-verbose=0 -o - | FileCheck %s -check-prefix=W64 > -; RUN: llc < %s -mcpu=yonah -march=x86 -asm-verbose=0 -o - | FileCheck %s -check-prefix=X32 > +; RUN: llc < %s -mcpu=yonah -march=x86 -mtriple=i386-linux-gnu -asm-verbose=0 -o - | FileCheck %s -check-prefix=X32 > > ?; PR7518 > ?define void @test1(<2 x float> %Q, float *%P2) nounwind { > > Modified: llvm/trunk/test/CodeGen/X86/vec_set-C.ll > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_set-C.ll?rev=140107&r1=140106&r2=140107&view=diff > ============================================================================== > --- llvm/trunk/test/CodeGen/X86/vec_set-C.ll (original) > +++ llvm/trunk/test/CodeGen/X86/vec_set-C.ll Mon Sep 19 19:08:12 2011 > @@ -1,6 +1,6 @@ > -; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movq > -; RUN: llc < %s -march=x86 -mattr=+sse2 | grep mov | count 1 > -; RUN: llc < %s -march=x86-64 -mattr=+sse2 | grep movd > +; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -mattr=+sse2 | grep movq > +; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -mattr=+sse2 | grep mov | count 1 > +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-linux -mattr=+sse2 | grep movd > > ?define <2 x i64> @t1(i64 %x) nounwind ?{ > ? ? ? ?%tmp8 = insertelement <2 x i64> zeroinitializer, i64 %x, i32 0 > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > From grosbach at apple.com Mon Sep 19 19:30:45 2011 From: grosbach at apple.com (Jim Grosbach) Date: Tue, 20 Sep 2011 00:30:45 -0000 Subject: [llvm-commits] [llvm] r140119 - in /llvm/trunk: lib/Target/ARM/ARMInstrInfo.td test/MC/ARM/basic-thumb2-instructions.s Message-ID: <20110920003045.A19D32A6C12C@llvm.org> Author: grosbach Date: Mon Sep 19 19:30:45 2011 New Revision: 140119 URL: http://llvm.org/viewvc/llvm-project?rev=140119&view=rev Log: Thumb2 assembly parsing and encoding for USAX. Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=140119&r1=140118&r2=140119&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Mon Sep 19 19:30:45 2011 @@ -4962,6 +4962,8 @@ def : MnemonicAlias<"uqaddsubx", "uqasx">; // UQSAX == UQSUBADDX def : MnemonicAlias<"uqsubaddx", "uqsax">; +// USAX == USUBADDX +def : MnemonicAlias<"usubaddx", "usax">; // LDRSBT/LDRHT/LDRSHT post-index offset if optional. // Note that the write-back output register is a dummy operand for MC (it's Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s?rev=140119&r1=140118&r2=140119&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s (original) +++ llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Mon Sep 19 19:30:45 2011 @@ -2912,3 +2912,21 @@ @ CHECK: usat16 r2, #2, r7 @ encoding: [0xa7,0xf3,0x02,0x02] @ CHECK: usat16 r3, #15, r5 @ encoding: [0xa5,0xf3,0x0f,0x03] + + + at ------------------------------------------------------------------------------ +@ USAX + at ------------------------------------------------------------------------------ + usax r2, r3, r4 + it ne + usaxne r6, r1, r9 + usubaddx r2, r3, r4 + it ne + usubaddxne r6, r1, r9 + +@ CHECK: usax r2, r3, r4 @ encoding: [0xe3,0xfa,0x44,0xf2] +@ CHECK: it ne @ encoding: [0x18,0xbf] +@ CHECK: usaxne r6, r1, r9 @ encoding: [0xe1,0xfa,0x49,0xf6] +@ CHECK: usax r2, r3, r4 @ encoding: [0xe3,0xfa,0x44,0xf2] +@ CHECK: it ne @ encoding: [0x18,0xbf] +@ CHECK: usaxne r6, r1, r9 @ encoding: [0xe1,0xfa,0x49,0xf6] From grosbach at apple.com Mon Sep 19 19:31:57 2011 From: grosbach at apple.com (Jim Grosbach) Date: Tue, 20 Sep 2011 00:31:57 -0000 Subject: [llvm-commits] [llvm] r140120 - /llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Message-ID: <20110920003157.5EEC72A6C12C@llvm.org> Author: grosbach Date: Mon Sep 19 19:31:57 2011 New Revision: 140120 URL: http://llvm.org/viewvc/llvm-project?rev=140120&view=rev Log: Thumb2 assembly parsing and encoding for USUB8/USUB16. Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s?rev=140120&r1=140119&r2=140120&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s (original) +++ llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Mon Sep 19 19:31:57 2011 @@ -2930,3 +2930,19 @@ @ CHECK: usax r2, r3, r4 @ encoding: [0xe3,0xfa,0x44,0xf2] @ CHECK: it ne @ encoding: [0x18,0xbf] @ CHECK: usaxne r6, r1, r9 @ encoding: [0xe1,0xfa,0x49,0xf6] + + + at ------------------------------------------------------------------------------ +@ USUB16/USUB8 + at ------------------------------------------------------------------------------ + usub16 r4, r2, r7 + usub8 r1, r8, r5 + ite hi + usub16hi r1, r1, r3 + usub8ls r9, r2, r3 + +@ CHECK: usub16 r4, r2, r7 @ encoding: [0xd2,0xfa,0x47,0xf4] +@ CHECK: usub8 r1, r8, r5 @ encoding: [0xc8,0xfa,0x45,0xf1] +@ CHECK: ite hi @ encoding: [0x8c,0xbf] +@ CHECK: usub16hi r1, r1, r3 @ encoding: [0xd1,0xfa,0x43,0xf1] +@ CHECK: usub8ls r9, r2, r3 @ encoding: [0xc2,0xfa,0x43,0xf9] From echristo at apple.com Mon Sep 19 19:34:27 2011 From: echristo at apple.com (Eric Christopher) Date: Tue, 20 Sep 2011 00:34:27 -0000 Subject: [llvm-commits] [llvm] r140121 - in /llvm/trunk: docs/ docs/CommandGuide/ include/llvm/CompilerDriver/ lib/ lib/CompilerDriver/ utils/TableGen/ Message-ID: <20110920003427.E071C2A6C12C@llvm.org> Author: echristo Date: Mon Sep 19 19:34:27 2011 New Revision: 140121 URL: http://llvm.org/viewvc/llvm-project?rev=140121&view=rev Log: Remove more of llvmc and dependencies. Removed: llvm/trunk/docs/CommandGuide/llvmc.pod llvm/trunk/docs/CompilerDriver.html llvm/trunk/docs/CompilerDriverTutorial.html llvm/trunk/include/llvm/CompilerDriver/Action.h llvm/trunk/include/llvm/CompilerDriver/AutoGenerated.h llvm/trunk/include/llvm/CompilerDriver/BuiltinOptions.h llvm/trunk/include/llvm/CompilerDriver/Common.td llvm/trunk/include/llvm/CompilerDriver/CompilationGraph.h llvm/trunk/include/llvm/CompilerDriver/Error.h llvm/trunk/include/llvm/CompilerDriver/Main.h llvm/trunk/include/llvm/CompilerDriver/Main.inc llvm/trunk/include/llvm/CompilerDriver/Tool.h llvm/trunk/lib/CompilerDriver/Action.cpp llvm/trunk/lib/CompilerDriver/BuiltinOptions.cpp llvm/trunk/lib/CompilerDriver/CMakeLists.txt llvm/trunk/lib/CompilerDriver/CompilationGraph.cpp llvm/trunk/lib/CompilerDriver/Main.cpp llvm/trunk/lib/CompilerDriver/Makefile llvm/trunk/lib/CompilerDriver/Tool.cpp llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.h Modified: llvm/trunk/docs/CommandGuide/index.html llvm/trunk/docs/FAQ.html llvm/trunk/docs/index.html llvm/trunk/lib/Makefile llvm/trunk/utils/TableGen/CMakeLists.txt llvm/trunk/utils/TableGen/TableGen.cpp Modified: llvm/trunk/docs/CommandGuide/index.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CommandGuide/index.html?rev=140121&r1=140120&r2=140121&view=diff ============================================================================== --- llvm/trunk/docs/CommandGuide/index.html (original) +++ llvm/trunk/docs/CommandGuide/index.html Mon Sep 19 19:34:27 2011 @@ -69,9 +69,6 @@
  • llvm-config - print out LLVM compilation options, libraries, etc. as configured
    • -
  • llvmc - - a generic customizable compiler driver
    • -
  • llvm-diff - structurally compare two modules
    • Removed: llvm/trunk/docs/CommandGuide/llvmc.pod URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CommandGuide/llvmc.pod?rev=140120&view=auto ============================================================================== --- llvm/trunk/docs/CommandGuide/llvmc.pod (original) +++ llvm/trunk/docs/CommandGuide/llvmc.pod (removed) @@ -1,190 +0,0 @@ -=pod - -=head1 NAME - -llvmc - The LLVM Compiler Driver (WIP) - -=head1 SYNOPSIS - -B [I] I - -=head1 DESCRIPTION - -B is a configurable driver for invoking other LLVM (and non-LLVM) tools -in order to compile, optimize and link software for multiple languages. For -those familiar with FSF's B tool, it is very similar. Please note that -B is considered an experimental tool. - -=head1 OPTIONS - -=head2 Built-in Options - -LLVMC has some built-in options that can't be overridden in the -configuration libraries. - -=over - -=item B<-o> I - -Output file name. - -=item B<-x> I - -Specify the language of the following input files until the next B<-x> -option. - -=item B<-load> I - -Load the specified plugin DLL. Example: -S<-load $LLVM_DIR/Release/lib/LLVMCSimple.so>. - -=item B<-v> or B<--verbose> - -Enable verbose mode, i.e. print out all executed commands. - -=item B<--check-graph> - -Check the compilation for common errors like mismatched output/input language -names, multiple default edges and cycles. Because of plugins, these checks can't -be performed at compile-time. Exit with code zero if no errors were found, and -return the number of found errors otherwise. Hidden option, useful for debugging -LLVMC plugins. - -=item B<--view-graph> - -Show a graphical representation of the compilation graph and exit. Requires that -you have I and I programs installed. Hidden option, useful for -debugging LLVMC plugins. - -=item B<--write-graph> - -Write a I file in the current directory with the -compilation graph description in Graphviz format (identical to the file used by -the B<--view-graph> option). The B<-o> option can be used to set the output file -name. Hidden option, useful for debugging LLVMC plugins. - -=item B<--save-temps> - -Write temporary files to the current directory and do not delete them on -exit. This option can also take an argument: the I<--save-temps=obj> switch will -write files into the directory specified with the I<-o> option. The -I<--save-temps=cwd> and I<--save-temps> switches are both synonyms for the -default behaviour. - -=item B<--temp-dir> I - -Store temporary files in the given directory. This directory is deleted on exit -unless I<--save-temps> is specified. If I<--save-temps=obj> is also specified, -I<--temp-dir> is given the precedence. - -=item B<-help> - -Print a summary of command-line options and exit. - -=item B<-help-hidden> - -Print a summary of command-line options and exit. Print help even for -options intended for developers. - -=item B<--version> - -Print version information and exit. - -=item B<@>I - -Read command-line options from I. The options read are inserted -in place of the original @I option. If I does not exist, or -cannot be read, then the option will be treated literally, and not -removed. - -Options in I are separated by whitespace. A whitespace character -may be included in an option by surrounding the entire option in -either single or double quotes. Any character (including a backslash) -may be included by prefixing the character to be included with a -backslash. The file may itself contain additional @I options; -any such options will be processed recursively. - - -=back - - -=head2 Control Options - -By default, LLVMC is built with some standard configuration libraries -that define the following options: - -=over - -=item B<-clang> - -Use Clang instead of llvm-gcc. - -=item B<-opt> - -Enable optimization passes with B. To pass options to the B program -use the B<-Wo,> option. - -=item B<-I> I - -Add a directory to the header file search path. - -=item B<-L> I - -Add I to the library search path. - -=item B<-F> I - -Add I to the framework search path. - -=item B<-l>I - -Link in the library libI.[bc | a | so]. This library should -be a bitcode library. - -=item B<-framework> I - -Link in the library libI.[bc | a | so]. This library should -be a bitcode library. - -=item B<-emit-llvm> - -Output LLVM bitcode (with B<-c>) or assembly (with B<-S>) instead of native -object (or assembly). If B<-emit-llvm> is given without either B<-c> or B<-S> -it has no effect. - -=item B<-Wa> - -Pass options to assembler. - -=item B<-Wl> - -Pass options to linker. - -=item B<-Wo> - -Pass options to opt. - -=item B<-Wllc> - -Pass options to llc (code generator). - -=back - -=head1 EXIT STATUS - -If B succeeds, it will exit with code 0. Otherwise, if an -error occurs, it will exit with a non-zero value. If one of the -compilation tools returns a non-zero status, pending actions will be -discarded and B will return the same result code as the failing -compilation tool. - -=head1 SEE ALSO - -L, L, L, -L, L, L - -=head1 AUTHORS - -Maintained by the LLVM Team (L). - -=cut Removed: llvm/trunk/docs/CompilerDriver.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CompilerDriver.html?rev=140120&view=auto ============================================================================== --- llvm/trunk/docs/CompilerDriver.html (original) +++ llvm/trunk/docs/CompilerDriver.html (removed) @@ -1,687 +0,0 @@ - - - - - - -Customizing LLVMC: Reference Manual - - - -
    -

    Customizing LLVMC: Reference Manual

    - - - -
    -

    Written by Mikhail Glushenkov

    -
    -

    Introduction

    -

    LLVMC is a generic compiler driver, designed to be customizable and -extensible. It plays the same role for LLVM as the gcc program does for -GCC - LLVMC's job is essentially to transform a set of input files into a set of -targets depending on configuration rules and user options. What makes LLVMC -different is that these transformation rules are completely customizable - in -fact, LLVMC knows nothing about the specifics of transformation (even the -command-line options are mostly not hard-coded) and regards the transformation -structure as an abstract graph. The structure of this graph is described in -high-level TableGen code, from which an efficient C++ representation is -automatically derived. This makes it possible to adapt LLVMC for other -purposes - for example, as a build tool for game resources.

    -

    Because LLVMC employs TableGen as its configuration language, you -need to be familiar with it to customize LLVMC.

    -
    -
    -

    Compiling with llvmc

    -

    LLVMC tries hard to be as compatible with gcc as possible, -although there are some small differences. Most of the time, however, -you shouldn't be able to notice them:

    -
    -$ # This works as expected:
-$ llvmc -O3 -Wall hello.cpp
-$ ./a.out
-hello
-
    -

    One nice feature of LLVMC is that one doesn't have to distinguish between -different compilers for different languages (think g++ vs. gcc) - the -right toolchain is chosen automatically based on input language names (which -are, in turn, determined from file extensions). If you want to force files -ending with ".c" to compile as C++, use the -x option, just like you would -do it with gcc:

    -
    -$ # hello.c is really a C++ file
-$ llvmc -x c++ hello.c
-$ ./a.out
-hello
-
    -

    On the other hand, when using LLVMC as a linker to combine several C++ -object files you should provide the --linker option since it's -impossible for LLVMC to choose the right linker in that case:

    -
    -$ llvmc -c hello.cpp
-$ llvmc hello.o
-[A lot of link-time errors skipped]
-$ llvmc --linker=c++ hello.o
-$ ./a.out
-hello
-
    -

    By default, LLVMC uses llvm-gcc to compile the source code. It is also -possible to choose the clang compiler with the -clang option.

    -
    -
    -

    Predefined options

    -

    LLVMC has some built-in options that can't be overridden in the TableGen code:

    -
      -
    • -o FILE - Output file name.
      • -
    • -x LANGUAGE - Specify the language of the following input files -until the next -x option.
      • -
    • -v - Enable verbose mode, i.e. print out all executed commands.
      • -
    • --save-temps - Write temporary files to the current directory and do not -delete them on exit. This option can also take an argument: the ---save-temps=obj switch will write files into the directory specified with -the -o option. The --save-temps=cwd and --save-temps switches are -both synonyms for the default behaviour.
      • -
    • --temp-dir DIRECTORY - Store temporary files in the given directory. This -directory is deleted on exit unless --save-temps is specified. If ---save-temps=obj is also specified, --temp-dir is given the -precedence.
      • -
    • --check-graph - Check the compilation for common errors like mismatched -output/input language names, multiple default edges and cycles. Exit with code -zero if no errors were found, and return the number of found errors -otherwise. Hidden option, useful for debugging.
      • -
    • --view-graph - Show a graphical representation of the compilation graph -and exit. Requires that you have dot and gv programs installed. Hidden -option, useful for debugging.
      • -
    • --write-graph - Write a compilation-graph.dot file in the current -directory with the compilation graph description in Graphviz format (identical -to the file used by the --view-graph option). The -o option can be -used to set the output file name. Hidden option, useful for debugging.
      • -
    • --help, --help-hidden, --version - These options have -their standard meaning.
      • -
    -
    -
    -

    Compiling LLVMC-based drivers

    -

    It's easiest to start working on your own LLVMC driver by copying the skeleton -project which lives under $LLVMC_DIR/examples/Skeleton:

    -
    -$ cd $LLVMC_DIR/examples
-$ cp -r Skeleton MyDriver
-$ cd MyDriver
-$ ls
-AutoGenerated.td  Hooks.cpp  Main.cpp  Makefile
-
    -

    As you can see, our basic driver consists of only three files (not counting the -build script). AutoGenerated.td contains TableGen description of the -compilation graph; its format is documented in the following -sections. Hooks.cpp is an empty file that should be used for hook -definitions (see below). Main.cpp is just a helper used to compile the -auto-generated C++ code produced from TableGen source.

    -

    The first thing that you should do is to change the LLVMC_BASED_DRIVER -variable in the Makefile:

    -
    -LLVMC_BASED_DRIVER=MyDriver
-
    -

    It can also be a good idea to put your TableGen code into a file with a less -generic name:

    -
    -$ touch MyDriver.td
-$ vim AutoGenerated.td
-[...]
-include "MyDriver.td"
-
    -

    If you have more than one TableGen source file, they all should be included from -AutoGenerated.td, since this file is used by the build system to generate -C++ code.

    -

    To build your driver, just cd to its source directory and run make. The -resulting executable will be put into $LLVM_OBJ_DIR/$(BuildMode)/bin.

    -

    If you're compiling LLVM with different source and object directories, then you -must perform the following additional steps before running make:

    -
    -# LLVMC_SRC_DIR = $LLVM_SRC_DIR/tools/llvmc/
-# LLVMC_OBJ_DIR = $LLVM_OBJ_DIR/tools/llvmc/
-$ mkdir $LLVMC_OBJ_DIR/examples/MyDriver/
-$ cp $LLVMC_SRC_DIR/examples/MyDriver/Makefile \
-  $LLVMC_OBJ_DIR/examples/MyDriver/
-$ cd $LLVMC_OBJ_DIR/examples/MyDriver
-$ make
-
    -
    -
    -

    Customizing LLVMC: the compilation graph

    -

    Each TableGen configuration file should include the common definitions:

    -
    -include "llvm/CompilerDriver/Common.td"
-
    -

    Internally, LLVMC stores information about possible source transformations in -form of a graph. Nodes in this graph represent tools, and edges between two -nodes represent a transformation path. A special "root" node is used to mark -entry points for the transformations. LLVMC also assigns a weight to each edge -(more on this later) to choose between several alternative edges.

    -

    The definition of the compilation graph (see file llvmc/src/Base.td for an -example) is just a list of edges:

    -
    -def CompilationGraph : CompilationGraph<[
-    Edge<"root", "llvm_gcc_c">,
-    Edge<"root", "llvm_gcc_assembler">,
-    ...
-
-    Edge<"llvm_gcc_c", "llc">,
-    Edge<"llvm_gcc_cpp", "llc">,
-    ...
-
-    OptionalEdge<"llvm_gcc_c", "opt", (case (switch_on "opt"),
-                                      (inc_weight))>,
-    OptionalEdge<"llvm_gcc_cpp", "opt", (case (switch_on "opt"),
-                                              (inc_weight))>,
-    ...
-
-    OptionalEdge<"llvm_gcc_assembler", "llvm_gcc_cpp_linker",
-        (case (input_languages_contain "c++"), (inc_weight),
-              (or (parameter_equals "linker", "g++"),
-                  (parameter_equals "linker", "c++")), (inc_weight))>,
-    ...
-
-    ]>;
-
    -

    As you can see, the edges can be either default or optional, where optional -edges are differentiated by an additional case expression used to calculate -the weight of this edge. Notice also that we refer to tools via their names (as -strings). This makes it possible to add edges to an existing compilation graph -without having to know about all tool definitions used in the graph.

    -

    The default edges are assigned a weight of 1, and optional edges get a weight of -0 + 2*N where N is the number of tests that evaluated to true in the case -expression. It is also possible to provide an integer parameter to -inc_weight and dec_weight - in this case, the weight is increased (or -decreased) by the provided value instead of the default 2. Default weight of an -optional edge can be changed by using the default clause of the case -construct.

    -

    When passing an input file through the graph, LLVMC picks the edge with the -maximum weight. To avoid ambiguity, there should be only one default edge -between two nodes (with the exception of the root node, which gets a special -treatment - there you are allowed to specify one default edge per language).

    -

    When multiple compilation graphs are defined, they are merged together. Multiple -edges with the same end nodes are not allowed (i.e. the graph is not a -multigraph), and will lead to a compile-time error.

    -

    To get a visual representation of the compilation graph (useful for debugging), -run llvmc --view-graph. You will need dot and gsview installed for -this to work properly.

    -
    -
    -

    Describing options

    -

    Command-line options supported by the driver are defined by using an -OptionList:

    -
    -def Options : OptionList<[
-(switch_option "E", (help "Help string")),
-(alias_option "quiet", "q")
-...
-]>;
-
    -

    As you can see, the option list is just a list of DAGs, where each DAG is an -option description consisting of the option name and some properties. More than -one option list can be defined (they are all merged together in the end), which -can be handy if one wants to separate option groups syntactically.

    -
      -

    • Possible option types:

      -
      -
        -
      • switch_option - a simple boolean switch without arguments, for example --O2 or -time. At most one occurrence is allowed by default.
        • -
      • parameter_option - option that takes one argument, for example --std=c99. It is also allowed to use spaces instead of the equality -sign: -std c99. At most one occurrence is allowed.
        • -
      • parameter_list_option - same as the above, but more than one option -occurrence is allowed.
        • -
      • prefix_option - same as the parameter_option, but the option name and -argument do not have to be separated. Example: -ofile. This can be also -specified as -o file; however, -o=file will be parsed incorrectly -(=file will be interpreted as option value). At most one occurrence is -allowed.
        • -
      • prefix_list_option - same as the above, but more than one occurrence of -the option is allowed; example: -lm -lpthread.
        • -
      • alias_option - a special option type for creating aliases. Unlike other -option types, aliases are not allowed to have any properties besides the -aliased option name. -Usage example: (alias_option "preprocess", "E")
        • -
      • switch_list_option - like switch_option with the zero_or_more -property, but remembers how many times the switch was turned on. Useful -mostly for forwarding. Example: when -foo is a switch option (with the -zero_or_more property), the command driver -foo -foo is forwarded -as some-tool -foo, but when -foo is a switch list, the same command -is forwarded as some-tool -foo -foo.
        • -
      -
      -
      • -

    • Possible option properties:

      -
      -
        -
      • help - help string associated with this option. Used for --help -output.
        • -
      • required - this option must be specified exactly once (or, in case of -the list options without the multi_val property, at least -once). Incompatible with optional and one_or_more.
        • -
      • optional - the option can be specified either zero times or exactly -once. The default for switch options. Useful only for list options in -conjunction with multi_val. Incompatible with required, -zero_or_more and one_or_more.
        • -
      • one_or_more - the option must be specified at least once. Can be useful -to allow switch options be both obligatory and be specified multiple -times. For list options is useful only in conjunction with multi_val; -for ordinary it is synonymous with required. Incompatible with -required, optional and zero_or_more.
        • -
      • zero_or_more - the option can be specified zero or more times. Useful -to allow a single switch option to be specified more than -once. Incompatible with required, optional and one_or_more.
        • -
      • hidden - the description of this option will not appear in -the --help output (but will appear in the --help-hidden -output).
        • -
      • really_hidden - the option will not be mentioned in any help -output.
        • -
      • comma_separated - Indicates that any commas specified for an option's -value should be used to split the value up into multiple values for the -option. This property is valid only for list options. In conjunction with -forward_value can be used to implement option forwarding in style of -gcc's -Wa,.
        • -
      • multi_val n - this option takes n arguments (can be useful in some -special cases). Usage example: (parameter_list_option "foo", (multi_val -3)); the command-line syntax is '-foo a b c'. Only list options can have -this attribute; you can, however, use the one_or_more, optional -and required properties.
        • -
      • init - this option has a default value, either a string (if it is a -parameter), or a boolean (if it is a switch; as in C++, boolean constants -are called true and false). List options can't have init -attribute. -Usage examples: (switch_option "foo", (init true)); (prefix_option -"bar", (init "baz")).
        • -
      -
      -
      • -
    -
    -
    -

    Conditional evaluation

    -

    The 'case' construct is the main means by which programmability is achieved in -LLVMC. It can be used to calculate edge weights, program actions and modify the -shell commands to be executed. The 'case' expression is designed after the -similarly-named construct in functional languages and takes the form (case -(test_1), statement_1, (test_2), statement_2, ... (test_N), statement_N). The -statements are evaluated only if the corresponding tests evaluate to true.

    -

    Examples:

    -
    -// Edge weight calculation
-
-// Increases edge weight by 5 if "-A" is provided on the
-// command-line, and by 5 more if "-B" is also provided.
-(case
-    (switch_on "A"), (inc_weight 5),
-    (switch_on "B"), (inc_weight 5))
-
-
-// Tool command line specification
-
-// Evaluates to "cmdline1" if the option "-A" is provided on the
-// command line; to "cmdline2" if "-B" is provided;
-// otherwise to "cmdline3".
-
-(case
-    (switch_on "A"), "cmdline1",
-    (switch_on "B"), "cmdline2",
-    (default), "cmdline3")
-
    -

    Note the slight difference in 'case' expression handling in contexts of edge -weights and command line specification - in the second example the value of the -"B" switch is never checked when switch "A" is enabled, and the whole -expression always evaluates to "cmdline1" in that case.

    -

    Case expressions can also be nested, i.e. the following is legal:

    -
    -(case (switch_on "E"), (case (switch_on "o"), ..., (default), ...)
-      (default), ...)
-
    -

    You should, however, try to avoid doing that because it hurts readability. It is -usually better to split tool descriptions and/or use TableGen inheritance -instead.

    -
      -
    • Possible tests are:
        -
      • switch_on - Returns true if a given command-line switch is provided by -the user. Can be given multiple arguments, in that case (switch_on "foo", -"bar", "baz") is equivalent to (and (switch_on "foo"), (switch_on -"bar"), (switch_on "baz")). -Example: (switch_on "opt").
        • -
      • any_switch_on - Given a number of switch options, returns true if any of -the switches is turned on. -Example: (any_switch_on "foo", "bar", "baz") is equivalent to (or -(switch_on "foo"), (switch_on "bar"), (switch_on "baz")).
        • -
      • parameter_equals - Returns true if a command-line parameter (first -argument) equals a given value (second argument). -Example: (parameter_equals "W", "all").
        • -
      • element_in_list - Returns true if a command-line parameter list (first -argument) contains a given value (second argument). -Example: (element_in_list "l", "pthread").
        • -
      • input_languages_contain - Returns true if a given language -belongs to the current input language set. -Example: (input_languages_contain "c++").
        • -
      • in_language - Evaluates to true if the input file language is equal to -the argument. At the moment works only with command and actions (on -non-join nodes). -Example: (in_language "c++").
        • -
      • not_empty - Returns true if a given option (which should be either a -parameter or a parameter list) is set by the user. Like switch_on, can -be also given multiple arguments. -Examples: (not_empty "o"), (not_empty "o", "l").
        • -
      • any_not_empty - Returns true if not_empty returns true for any of -the provided options. -Example: (any_not_empty "foo", "bar", "baz") is equivalent to (or -(not_empty "foo"), (not_empty "bar"), (not_empty "baz")).
        • -
      • empty - The opposite of not_empty. Equivalent to (not (not_empty -X)). Can be given multiple arguments.
        • -
      • any_not_empty - Returns true if not_empty returns true for any of -the provided options. -Example: (any_empty "foo", "bar", "baz") is equivalent to (or -(not_empty "foo"), (not_empty "bar"), (not_empty "baz")).
        • -
      • single_input_file - Returns true if there was only one input file -provided on the command-line. Used without arguments: -(single_input_file).
        • -
      • multiple_input_files - Equivalent to (not (single_input_file)) (the -case of zero input files is considered an error).
        • -
      • default - Always evaluates to true. Should always be the last -test in the case expression.
        • -
      • and - A standard logical combinator that returns true iff all of -its arguments return true. Used like this: (and (test1), (test2), -... (testN)). Nesting of and and or is allowed, but not -encouraged.
        • -
      • or - A logical combinator that returns true iff any of its arguments -return true. -Example: (or (test1), (test2), ... (testN)).
        • -
      • not - Standard unary logical combinator that negates its -argument. -Example: (not (or (test1), (test2), ... (testN))).
        • -
      -
      • -
    -
    -
    -

    Writing a tool description

    -

    As was said earlier, nodes in the compilation graph represent tools, which are -described separately. A tool definition looks like this (taken from the -llvmc/src/Base.td file):

    -
    -def llvm_gcc_cpp : Tool<[
-    (in_language "c++"),
-    (out_language "llvm-assembler"),
-    (output_suffix "bc"),
-    (command "llvm-g++ -c -emit-llvm"),
-    (sink)
-    ]>;
-
    -

    This defines a new tool called llvm_gcc_cpp, which is an alias for -llvm-g++. As you can see, a tool definition is just a list of properties; -most of them should be self-explanatory. The sink property means that this -tool should be passed all command-line options that aren't mentioned in the -option list.

    -

    The complete list of all currently implemented tool properties follows.

    -
      -
    • Possible tool properties:
        -
      • in_language - input language name. Can be given multiple arguments, in -case the tool supports multiple input languages. Used for typechecking and -mapping file extensions to tools.
        • -
      • out_language - output language name. Multiple output languages are -allowed. Used for typechecking the compilation graph.
        • -
      • output_suffix - output file suffix. Can also be changed dynamically, see -documentation on actions.
        • -
      -
      • -
    -
    -
      -
    • command - the actual command used to run the tool. You can use output -redirection with >, hook invocations ($CALL), environment variables -(via $ENV) and the case construct.
      • -
    • join - this tool is a "join node" in the graph, i.e. it gets a list of -input files and joins them together. Used for linkers.
      • -
    • sink - all command-line options that are not handled by other tools are -passed to this tool.
      • -
    • actions - A single big case expression that specifies how this tool -reacts on command-line options (described in more detail below).
      • -
    -
    -
    -
      -
    • out_file_option, in_file_option - Options appended to the -command string to designate output and input files. Default values are -"-o" and "", respectively.
      • -
    -
    -
    -

    Actions

    -

    A tool often needs to react to command-line options, and this is precisely what -the actions property is for. The next example illustrates this feature:

    -
    -def llvm_gcc_linker : Tool<[
-    (in_language "object-code"),
-    (out_language "executable"),
-    (output_suffix "out"),
-    (command "llvm-gcc"),
-    (join),
-    (actions (case (not_empty "L"), (forward "L"),
-                   (not_empty "l"), (forward "l"),
-                   (not_empty "dummy"),
-                             [(append_cmd "-dummy1"), (append_cmd "-dummy2")])
-    ]>;
-
    -

    The actions tool property is implemented on top of the omnipresent case -expression. It associates one or more different actions with given -conditions - in the example, the actions are forward, which forwards a given -option unchanged, and append_cmd, which appends a given string to the tool -execution command. Multiple actions can be associated with a single condition by -using a list of actions (used in the example to append some dummy options). The -same case construct can also be used in the cmd_line property to modify -the tool command line.

    -

    The "join" property used in the example means that this tool behaves like a -linker.

    -

    The list of all possible actions follows.

    -
      -

    • Possible actions:

      -
      -
        -
      • append_cmd - Append a string to the tool invocation command. -Example: (case (switch_on "pthread"), (append_cmd "-lpthread")).
        • -
      • error - Exit with error. -Example: (error "Mixing -c and -S is not allowed!").
        • -
      • warning - Print a warning. -Example: (warning "Specifying both -O1 and -O2 is meaningless!").
        • -
      • forward - Forward the option unchanged. -Example: (forward "Wall").
        • -
      • forward_as - Change the option's name, but forward the argument -unchanged. -Example: (forward_as "O0", "--disable-optimization").
        • -
      • forward_value - Forward only option's value. Cannot be used with switch -options (since they don't have values), but works fine with lists. -Example: (forward_value "Wa,").
        • -
      • forward_transformed_value - As above, but applies a hook to the -option's value before forwarding (see below). When -forward_transformed_value is applied to a list -option, the hook must have signature -std::string hooks::HookName (const std::vector<std::string>&). -Example: (forward_transformed_value "m", "ConvertToMAttr").
        • -
      • output_suffix - Modify the output suffix of this tool. -Example: (output_suffix "i").
        • -
      • stop_compilation - Stop compilation after this tool processes its -input. Used without arguments. -Example: (stop_compilation).
        • -
      -
      -
      • -
    -
    -
    -
    -

    Language map

    -

    If you are adding support for a new language to LLVMC, you'll need to modify the -language map, which defines mappings from file extensions to language names. It -is used to choose the proper toolchain(s) for a given input file set. Language -map definition looks like this:

    -
    -def LanguageMap : LanguageMap<
-    [LangToSuffixes<"c++", ["cc", "cp", "cxx", "cpp", "CPP", "c++", "C"]>,
-     LangToSuffixes<"c", ["c"]>,
-     ...
-    ]>;
-
    -

    For example, without those definitions the following command wouldn't work:

    -
    -$ llvmc hello.cpp
-llvmc: Unknown suffix: cpp
-
    -

    The language map entries are needed only for the tools that are linked from the -root node. A tool can have multiple output languages.

    -
    -
    -

    Option preprocessor

    -

    It is sometimes useful to run error-checking code before processing the -compilation graph. For example, if optimization options "-O1" and "-O2" are -implemented as switches, we might want to output a warning if the user invokes -the driver with both of these options enabled.

    -

    The OptionPreprocessor feature is reserved specially for these -occasions. Example (adapted from llvm/src/Base.td.in):

    -
    -def Preprocess : OptionPreprocessor<
-(case (not (any_switch_on "O0", "O1", "O2", "O3")),
-           (set_option "O2"),
-      (and (switch_on "O3"), (any_switch_on "O0", "O1", "O2")),
-           (unset_option "O0", "O1", "O2"),
-      (and (switch_on "O2"), (any_switch_on "O0", "O1")),
-           (unset_option "O0", "O1"),
-      (and (switch_on "O1"), (switch_on "O0")),
-           (unset_option "O0"))
->;
-
    -

    Here, OptionPreprocessor is used to unset all spurious -O options so -that they are not forwarded to the compiler. If no optimization options are -specified, -O2 is enabled.

    -

    OptionPreprocessor is basically a single big case expression, which is -evaluated only once right after the driver is started. The only allowed actions -in OptionPreprocessor are error, warning, and two special actions: -unset_option and set_option. As their names suggest, they can be used to -set or unset a given option. To set an option with set_option, use the -two-argument form: (set_option "parameter", VALUE). Here, VALUE can be -either a string, a string list, or a boolean constant.

    -

    For convenience, set_option and unset_option also work with multiple -arguments. That is, instead of [(unset_option "A"), (unset_option "B")] you -can use (unset_option "A", "B"). Obviously, (set_option "A", "B") is -only valid if both A and B are switches.

    -
    -
    -

    More advanced topics

    -
    -

    Hooks and environment variables

    -

    Normally, LLVMC searches for programs in the system PATH. Sometimes, this is -not sufficient: for example, we may want to specify tool paths or names in the -configuration file. This can be achieved via the hooks mechanism. To write your -own hooks, add their definitions to the Hooks.cpp or drop a .cpp file -into your driver directory. Hooks should live in the hooks namespace and -have the signature std::string hooks::MyHookName ([const char* Arg0 [ const -char* Arg2 [, ...]]]). They can be used from the command tool property:

    -
    -(command "$CALL(MyHook)/path/to/file -o $CALL(AnotherHook)")
-
    -

    To pass arguments to hooks, use the following syntax:

    -
    -(command "$CALL(MyHook, 'Arg1', 'Arg2', 'Arg # 3')/path/to/file -o1 -o2")
-
    -

    It is also possible to use environment variables in the same manner:

    -
    -(command "$ENV(VAR1)/path/to/file -o $ENV(VAR2)")
-
    -

    To change the command line string based on user-provided options use -the case expression (documented above):

    -
    -(command
-  (case
-    (switch_on "E"),
-       "llvm-g++ -E -x c $INFILE -o $OUTFILE",
-    (default),
-       "llvm-g++ -c -x c $INFILE -o $OUTFILE -emit-llvm"))
-
    -
    -
    -

    Debugging

    -

    When writing LLVMC-based drivers, it can be useful to get a visual view of the -resulting compilation graph. This can be achieved via the command line option ---view-graph (which assumes that Graphviz and Ghostview are -installed). There is also a --write-graph option that creates a Graphviz -source file (compilation-graph.dot) in the current directory.

    -

    Another useful llvmc option is --check-graph. It checks the compilation -graph for common errors like mismatched output/input language names, multiple -default edges and cycles. When invoked with --check-graph, llvmc doesn't -perform any compilation tasks and returns the number of encountered errors as -its status code. In the future, these checks will be performed at compile-time -and this option will disappear.

    -
    -
    -

    Conditioning on the executable name

    -

    For now, the executable name (the value passed to the driver in argv[0]) is -accessible only in the C++ code (i.e. hooks). Use the following code:

    -
    -namespace llvmc {
-extern const char* ProgramName;
-}
-
-namespace hooks {
-
-std::string MyHook() {
-//...
-if (strcmp(ProgramName, "mydriver") == 0) {
-   //...
-
-}
-
-} // end namespace hooks
-
    -

    In general, you're encouraged not to make the behaviour dependent on the -executable file name, and use command-line switches instead. See for example how -the llvmc program behaves when it needs to choose the correct linker options -(think g++ vs. gcc).

    -
    -
    - -Valid CSS - -Valid XHTML 1.0 Transitional - -Mikhail Glushenkov
    -LLVM Compiler Infrastructure
    - -Last modified: $Date$ -
    -
    -
    - - Removed: llvm/trunk/docs/CompilerDriverTutorial.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CompilerDriverTutorial.html?rev=140120&view=auto ============================================================================== --- llvm/trunk/docs/CompilerDriverTutorial.html (original) +++ llvm/trunk/docs/CompilerDriverTutorial.html (removed) @@ -1,125 +0,0 @@ - - - - - - -Tutorial - Using LLVMC - - - -
    -

    Tutorial - Using LLVMC

    - - - -
    -

    Written by Mikhail Glushenkov

    -
    -

    Introduction

    -

    LLVMC is a generic compiler driver, which plays the same role for LLVM as the -gcc program does for GCC - the difference being that LLVMC is designed to be -more adaptable and easier to customize. Most of LLVMC functionality is -implemented via high-level TableGen code, from which a corresponding C++ source -file is automatically generated. This tutorial describes the basic usage and -configuration of LLVMC.

    -
    -
    -

    Using the llvmc program

    -

    In general, llvmc tries to be command-line compatible with gcc as much -as possible, so most of the familiar options work:

    -
    -$ llvmc -O3 -Wall hello.cpp
-$ ./a.out
-hello
-
    -

    This will invoke llvm-g++ under the hood (you can see which commands are -executed by using the -v option). For further help on command-line LLVMC -usage, refer to the llvmc --help output.

    -
    -
    -

    Using LLVMC to generate toolchain drivers

    -

    LLVMC-based drivers are written mostly using TableGen, so you need to be -familiar with it to get anything done.

    -

    Start by compiling example/Simple, which is a primitive wrapper for -gcc:

    -
    -$ cd $LLVM_OBJ_DIR/tools/examples/Simple
-$ make
-$ cat > hello.c
-#include <stdio.h>
-int main() { printf("Hello\n"); }
-$ $LLVM_BIN_DIR/Simple -v hello.c
-gcc hello.c -o hello.out
-$ ./hello.out
-Hello
-
    -

    We have thus produced a simple driver called, appropriately, Simple, from -the input TableGen file Simple.td. The llvmc program itself is generated -using a similar process (see llvmc/src). Contents of the file Simple.td -look like this:

    -
    -// Include common definitions
-include "llvm/CompilerDriver/Common.td"
-
-// Tool descriptions
-def gcc : Tool<
-[(in_language "c"),
- (out_language "executable"),
- (output_suffix "out"),
- (command "gcc"),
- (sink),
-
- // -o is what is used by default, out_file_option here is included for
- // instructive purposes.
- (out_file_option "-o")
-]>;
-
-// Language map
-def LanguageMap : LanguageMap<[(lang_to_suffixes "c", "c")]>;
-
-// Compilation graph
-def CompilationGraph : CompilationGraph<[(edge "root", "gcc")]>;
-
    -

    As you can see, this file consists of three parts: tool descriptions, language -map, and the compilation graph definition.

    -

    At the heart of LLVMC is the idea of a compilation graph: vertices in this graph -are tools, and edges represent a transformation path between two tools (for -example, assembly source produced by the compiler can be transformed into -executable code by an assembler). The compilation graph is basically a list of -edges; a special node named root is used to mark graph entry points.

    -

    Tool descriptions are represented as property lists: most properties in the -example above should be self-explanatory; the sink property means that all -options lacking an explicit description should be forwarded to this tool.

    -

    The LanguageMap associates a language name with a list of suffixes and is -used for deciding which toolchain corresponds to a given input file.

    -

    To learn more about writing your own drivers with LLVMC, refer to the reference -manual and examples in the examples directory. Of a particular interest is -the Skeleton example, which can serve as a template for your LLVMC-based -drivers.

    -
    -
    - -Valid CSS - -Valid XHTML 1.0 Transitional - -Mikhail Glushenkov
    -LLVM Compiler Infrastructure
    - -Last modified: $Date: 2008-12-11 11:34:48 -0600 (Thu, 11 Dec 2008) $ -
    -
    - - Modified: llvm/trunk/docs/FAQ.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/FAQ.html?rev=140121&r1=140120&r2=140121&view=diff ============================================================================== --- llvm/trunk/docs/FAQ.html (original) +++ llvm/trunk/docs/FAQ.html Mon Sep 19 19:34:27 2011 @@ -540,10 +540,7 @@

    Currently, there isn't much. LLVM supports an intermediate representation which is useful for code representation but will not support the high level (abstract syntax tree) representation needed by most compilers. There are no - facilities for lexical nor semantic analysis. There is, however, a mostly - implemented configuration-driven - compiler driver which simplifies the task - of running optimizations, linking, and executable generation.

    + facilities for lexical nor semantic analysis.

    Modified: llvm/trunk/docs/index.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/index.html?rev=140121&r1=140120&r2=140121&view=diff ============================================================================== --- llvm/trunk/docs/index.html (original) +++ llvm/trunk/docs/index.html Mon Sep 19 19:34:27 2011 @@ -216,14 +216,6 @@
  • Bugpoint - automatic bug finder and test-case reducer description and usage information.
    • -
  • Compiler Driver (llvmc) Tutorial -- This document is a tutorial introduction to the usage and -configuration of the LLVM compiler driver tool, llvmc.
    • - -
  • Compiler Driver (llvmc) -Reference - This document describes the design and configuration -of llvmc in more detail.
    • -
  • LLVM Bitcode File Format - This describes the file format and encoding used for LLVM "bc" files.
    • Removed: llvm/trunk/include/llvm/CompilerDriver/Action.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CompilerDriver/Action.h?rev=140120&view=auto ============================================================================== --- llvm/trunk/include/llvm/CompilerDriver/Action.h (original) +++ llvm/trunk/include/llvm/CompilerDriver/Action.h (removed) @@ -1,54 +0,0 @@ -//===--- Action.h - The LLVM Compiler Driver --------------------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open -// Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// Action - encapsulates a single shell command. -// -//===----------------------------------------------------------------------===// - -#ifndef LLVM_INCLUDE_COMPILER_DRIVER_ACTION_H -#define LLVM_INCLUDE_COMPILER_DRIVER_ACTION_H - -#include -#include - -namespace llvmc { - - typedef std::vector StrVector; - - /// Action - A class that encapsulates a single shell command. - class Action { - /// Command_ - The actual command (for example, 'ls'). - std::string Command_; - /// Args_ - Command arguments. Stdout redirection ("> file") is allowed. - std::vector Args_; - /// StopCompilation_ - Should we stop compilation after executing - /// this action? - bool StopCompilation_; - /// OutFile_ - The output file name. - std::string OutFile_; - - public: - void Construct (const std::string& C, const StrVector& A, - bool S, const std::string& O) { - Command_ = C; - Args_ = A; - StopCompilation_ = S; - OutFile_ = O; - } - bool IsConstructed () { return (Command_.size() != 0);} - - /// Execute - Executes the command. Returns -1 on error. - int Execute () const; - bool StopCompilation () const { return StopCompilation_; } - const std::string& OutFile() { return OutFile_; } - }; - -} - -#endif // LLVM_INCLUDE_COMPILER_DRIVER_ACTION_H Removed: llvm/trunk/include/llvm/CompilerDriver/AutoGenerated.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CompilerDriver/AutoGenerated.h?rev=140120&view=auto ============================================================================== --- llvm/trunk/include/llvm/CompilerDriver/AutoGenerated.h (original) +++ llvm/trunk/include/llvm/CompilerDriver/AutoGenerated.h (removed) @@ -1,40 +0,0 @@ -//===--- AutoGenerated.h - The LLVM Compiler Driver -------------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open -// Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// Interface to the autogenerated driver code. -// -//===----------------------------------------------------------------------===// - -#ifndef LLVM_INCLUDE_COMPILER_DRIVER_AUTOGENERATED_H -#define LLVM_INCLUDE_COMPILER_DRIVER_AUTOGENERATED_H - -namespace llvmc { - class LanguageMap; - class CompilationGraph; - - namespace autogenerated { - - int PreprocessOptions(); - int PopulateLanguageMap(LanguageMap& langMap); - int PopulateCompilationGraph(CompilationGraph& graph); - - inline int RunInitialization (LanguageMap& M, CompilationGraph& G) { - if (int ret = PreprocessOptions()) - return ret; - if (int ret = PopulateLanguageMap(M)) - return ret; - if (int ret = PopulateCompilationGraph(G)) - return ret; - - return 0; - } - } -} - -#endif // LLVM_INCLUDE_COMPILER_DRIVER_AUTOGENERATED_H Removed: llvm/trunk/include/llvm/CompilerDriver/BuiltinOptions.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CompilerDriver/BuiltinOptions.h?rev=140120&view=auto ============================================================================== --- llvm/trunk/include/llvm/CompilerDriver/BuiltinOptions.h (original) +++ llvm/trunk/include/llvm/CompilerDriver/BuiltinOptions.h (removed) @@ -1,39 +0,0 @@ -//===--- BuiltinOptions.h - The LLVM Compiler Driver ------------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open -// Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// Declarations of all global command-line option variables. -// -//===----------------------------------------------------------------------===// - -#ifndef LLVM_INCLUDE_COMPILER_DRIVER_BUILTIN_OPTIONS_H -#define LLVM_INCLUDE_COMPILER_DRIVER_BUILTIN_OPTIONS_H - -#include "llvm/Support/CommandLine.h" - -#include - -namespace llvmc { - -namespace SaveTempsEnum { enum Values { Cwd, Obj, Unset }; } - -extern llvm::cl::list InputFilenames; -extern llvm::cl::opt OutputFilename; -extern llvm::cl::opt TempDirname; -extern llvm::cl::list Languages; -extern llvm::cl::opt DryRun; -extern llvm::cl::opt Time; -extern llvm::cl::opt VerboseMode; -extern llvm::cl::opt CheckGraph; -extern llvm::cl::opt ViewGraph; -extern llvm::cl::opt WriteGraph; -extern llvm::cl::opt SaveTemps; - -} // End namespace llvmc. - -#endif // LLVM_INCLUDE_COMPILER_DRIVER_BUILTIN_OPTIONS_H Removed: llvm/trunk/include/llvm/CompilerDriver/Common.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CompilerDriver/Common.td?rev=140120&view=auto ============================================================================== --- llvm/trunk/include/llvm/CompilerDriver/Common.td (original) +++ llvm/trunk/include/llvm/CompilerDriver/Common.td (removed) @@ -1,127 +0,0 @@ -//===- Common.td - Common definitions for LLVMC2 ----------*- tablegen -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file contains common definitions used in llvmc tool description files. -// -//===----------------------------------------------------------------------===// - -class Tool l> { - list properties = l; -} - -// Possible Tool properties. - -def in_language; -def out_language; -def output_suffix; -def command; -def out_file_option; -def in_file_option; -def join; -def sink; -def works_on_empty; -def actions; - -// Possible option types. - -def alias_option; -def switch_option; -def switch_list_option; -def parameter_option; -def parameter_list_option; -def prefix_option; -def prefix_list_option; - -// Possible option properties. - -def help; -def hidden; -def init; -def multi_val; -def one_or_more; -def zero_or_more; -def optional; -def really_hidden; -def required; -def comma_separated; -def forward_not_split; - -// The 'case' construct. -def case; - -// Boolean constants. -class Bool { - bit Value = val; -} -def true : Bool<1>; -def false : Bool<0>; - -// Boolean operators. -def and; -def or; -def not; - -// Primitive tests. -def switch_on; -def parameter_equals; -def element_in_list; -def input_languages_contain; -def empty; -def not_empty; -def default; -def single_input_file; -def multiple_input_files; -def any_switch_on; -def any_not_empty; -def any_empty; - -// Possible actions. - -def append_cmd; -def forward; -def forward_as; -def forward_value; -def forward_transformed_value; -def stop_compilation; -def no_out_file; -def unpack_values; -def warning; -def error; -def set_option; -def unset_option; - -// Increase the edge weight. -def inc_weight; - -// Option list - a single place to specify options. -class OptionList l> { - list options = l; -} - -// Option preprocessor - actions taken during plugin loading. -class OptionPreprocessor { - dag preprocessor = d; -} - -// Map from suffixes to language names - -def lang_to_suffixes; - -class LanguageMap l> { - list map = l; -} - -// Compilation graph - -def edge; -def optional_edge; - -class CompilationGraph l> { - list edges = l; -} Removed: llvm/trunk/include/llvm/CompilerDriver/CompilationGraph.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CompilerDriver/CompilationGraph.h?rev=140120&view=auto ============================================================================== --- llvm/trunk/include/llvm/CompilerDriver/CompilationGraph.h (original) +++ llvm/trunk/include/llvm/CompilerDriver/CompilationGraph.h (removed) @@ -1,330 +0,0 @@ -//===--- CompilationGraph.h - The LLVM Compiler Driver ----------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open -// Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// Compilation graph - definition. -// -//===----------------------------------------------------------------------===// - -#ifndef LLVM_INCLUDE_COMPILER_DRIVER_COMPILATION_GRAPH_H -#define LLVM_INCLUDE_COMPILER_DRIVER_COMPILATION_GRAPH_H - -#include "llvm/CompilerDriver/Tool.h" - -#include "llvm/ADT/GraphTraits.h" -#include "llvm/ADT/IntrusiveRefCntPtr.h" -#include "llvm/ADT/SmallVector.h" -#include "llvm/ADT/StringMap.h" -#include "llvm/ADT/StringSet.h" -#include "llvm/Support/Path.h" - -#include -#include - -namespace llvmc { - - class CompilationGraph; - typedef llvm::StringSet<> InputLanguagesSet; - - /// LanguageMap - Maps from extensions to language names. - class LanguageMap : public llvm::StringMap { - public: - - /// GetLanguage - Find the language name corresponding to a given file. - const std::string* GetLanguage(const llvm::sys::Path&) const; - }; - - /// Edge - Represents an edge of the compilation graph. - class Edge : public llvm::RefCountedBaseVPTR { - public: - Edge(const std::string& T) : ToolName_(T) {} - virtual ~Edge() {} - - const std::string& ToolName() const { return ToolName_; } - virtual int Weight(const InputLanguagesSet& InLangs) const = 0; - private: - std::string ToolName_; - }; - - /// SimpleEdge - An edge that has no properties. - class SimpleEdge : public Edge { - public: - SimpleEdge(const std::string& T) : Edge(T) {} - int Weight(const InputLanguagesSet&) const { return 1; } - }; - - /// Node - A node (vertex) of the compilation graph. - struct Node { - // A Node holds a list of the outward edges. - typedef llvm::SmallVector, 3> container_type; - typedef container_type::iterator iterator; - typedef container_type::const_iterator const_iterator; - - Node() : OwningGraph(0), InEdges(0) {} - Node(CompilationGraph* G) : OwningGraph(G), InEdges(0) {} - Node(CompilationGraph* G, Tool* T) : - OwningGraph(G), ToolPtr(T), InEdges(0) {} - - bool HasChildren() const { return !OutEdges.empty(); } - const std::string Name() const - { return ToolPtr ? ToolPtr->Name() : "root"; } - - // Iteration. - iterator EdgesBegin() { return OutEdges.begin(); } - const_iterator EdgesBegin() const { return OutEdges.begin(); } - iterator EdgesEnd() { return OutEdges.end(); } - const_iterator EdgesEnd() const { return OutEdges.end(); } - - /// AddEdge - Add an outward edge. Takes ownership of the provided - /// Edge object. - void AddEdge(Edge* E); - - // Inward edge counter. Used to implement topological sort. - void IncrInEdges() { ++InEdges; } - void DecrInEdges() { --InEdges; } - bool HasNoInEdges() const { return InEdges == 0; } - - // Needed to implement NodeChildIterator/GraphTraits - CompilationGraph* OwningGraph; - // The corresponding Tool. - // WARNING: ToolPtr can be NULL (for the root node). - llvm::IntrusiveRefCntPtr ToolPtr; - // Links to children. - container_type OutEdges; - // Inward edge counter. Updated in - // CompilationGraph::insertEdge(). Used for topological sorting. - unsigned InEdges; - }; - - class NodesIterator; - - /// CompilationGraph - The compilation graph itself. - class CompilationGraph { - /// nodes_map_type - The main data structure. - typedef llvm::StringMap nodes_map_type; - /// tools_vector_type, tools_map_type - Data structures used to - /// map from language names to tools. (We can have several tools - /// associated with each language name, hence the need for a - /// vector.) - typedef - llvm::SmallVector, 3> tools_vector_type; - typedef llvm::StringMap tools_map_type; - - /// ToolsMap - Map from language names to lists of tool names. - tools_map_type ToolsMap; - /// NodesMap - Map from tool names to Tool objects. - nodes_map_type NodesMap; - - public: - - typedef nodes_map_type::iterator nodes_iterator; - typedef nodes_map_type::const_iterator const_nodes_iterator; - - CompilationGraph(); - - /// insertNode - Insert a new node into the graph. Takes - /// ownership of the object. - void insertNode(Tool* T); - - /// insertEdge - Insert a new edge into the graph. Takes ownership - /// of the Edge object. Returns non-zero value on error. - int insertEdge(const std::string& A, Edge* E); - - /// Build - Build target(s) from the input file set. Command-line options - /// are passed implicitly as global variables. Returns non-zero value on - /// error (usually the failed program's exit code). - int Build(llvm::sys::Path const& TempDir, const LanguageMap& LangMap); - - /// Check - Check the compilation graph for common errors like cycles, - /// input/output language mismatch and multiple default edges. Prints error - /// messages and in case it finds any errors. - int Check(); - - /// getNode - Return a reference to the node corresponding to the given tool - /// name. Returns 0 on error. - Node* getNode(const std::string& ToolName); - const Node* getNode(const std::string& ToolName) const; - - /// viewGraph - This function is meant for use from the debugger. You can - /// just say 'call G->viewGraph()' and a ghostview window should pop up from - /// the program, displaying the compilation graph. This depends on there - /// being a 'dot' and 'gv' program in your path. - void viewGraph(); - - /// writeGraph - Write Graphviz .dot source file to the current direcotry. - int writeGraph(const std::string& OutputFilename); - - // GraphTraits support. - friend NodesIterator GraphBegin(CompilationGraph*); - friend NodesIterator GraphEnd(CompilationGraph*); - - private: - // Helper functions. - - /// getToolsVector - Return a reference to the list of tool names - /// corresponding to the given language name. Returns 0 on error. - const tools_vector_type* getToolsVector(const std::string& LangName) const; - - /// PassThroughGraph - Pass the input file through the toolchain starting at - /// StartNode. - int PassThroughGraph (const llvm::sys::Path& In, const Node* StartNode, - const InputLanguagesSet& InLangs, - const llvm::sys::Path& TempDir, - const LanguageMap& LangMap) const; - - /// FindToolChain - Find head of the toolchain corresponding to - /// the given file. - const Node* FindToolChain(const llvm::sys::Path& In, - const std::string* ForceLanguage, - InputLanguagesSet& InLangs, - const LanguageMap& LangMap) const; - - /// BuildInitial - Traverse the initial parts of the toolchains. Returns - /// non-zero value on error. - int BuildInitial(InputLanguagesSet& InLangs, - const llvm::sys::Path& TempDir, - const LanguageMap& LangMap); - - /// TopologicalSort - Sort the nodes in topological order. Returns non-zero - /// value on error. - int TopologicalSort(std::vector& Out); - /// TopologicalSortFilterJoinNodes - Call TopologicalSort and filter the - /// resulting list to include only Join nodes. Returns non-zero value on - /// error. - int TopologicalSortFilterJoinNodes(std::vector& Out); - - // Functions used to implement Check(). - - /// CheckLanguageNames - Check that output/input language names match for - /// all nodes. Returns non-zero value on error (number of errors - /// encountered). - int CheckLanguageNames() const; - /// CheckMultipleDefaultEdges - check that there are no multiple default - /// default edges. Returns non-zero value on error (number of errors - /// encountered). - int CheckMultipleDefaultEdges() const; - /// CheckCycles - Check that there are no cycles in the graph. Returns - /// non-zero value on error (number of errors encountered). - int CheckCycles(); - - }; - - // GraphTraits support code. - - /// NodesIterator - Auxiliary class needed to implement GraphTraits - /// support. Can be generalised to something like value_iterator - /// for map-like containers. - class NodesIterator : public CompilationGraph::nodes_iterator { - typedef CompilationGraph::nodes_iterator super; - typedef NodesIterator ThisType; - typedef Node* pointer; - typedef Node& reference; - - public: - NodesIterator(super I) : super(I) {} - - inline reference operator*() const { - return super::operator->()->second; - } - inline pointer operator->() const { - return &super::operator->()->second; - } - }; - - inline NodesIterator GraphBegin(CompilationGraph* G) { - return NodesIterator(G->NodesMap.begin()); - } - - inline NodesIterator GraphEnd(CompilationGraph* G) { - return NodesIterator(G->NodesMap.end()); - } - - - /// NodeChildIterator - Another auxiliary class needed by GraphTraits. - class NodeChildIterator : public - std::iterator { - typedef NodeChildIterator ThisType; - typedef Node::container_type::iterator iterator; - - CompilationGraph* OwningGraph; - iterator EdgeIter; - public: - typedef Node* pointer; - typedef Node& reference; - - NodeChildIterator(Node* N, iterator I) : - OwningGraph(N->OwningGraph), EdgeIter(I) {} - - const ThisType& operator=(const ThisType& I) { - assert(OwningGraph == I.OwningGraph); - EdgeIter = I.EdgeIter; - return *this; - } - - inline bool operator==(const ThisType& I) const { - assert(OwningGraph == I.OwningGraph); - return EdgeIter == I.EdgeIter; - } - inline bool operator!=(const ThisType& I) const { - return !this->operator==(I); - } - - inline pointer operator*() const { - return OwningGraph->getNode((*EdgeIter)->ToolName()); - } - inline pointer operator->() const { - return this->operator*(); - } - - ThisType& operator++() { ++EdgeIter; return *this; } // Preincrement - ThisType operator++(int) { // Postincrement - ThisType tmp = *this; - ++*this; - return tmp; - } - - inline ThisType& operator--() { --EdgeIter; return *this; } // Predecrement - inline ThisType operator--(int) { // Postdecrement - ThisType tmp = *this; - --*this; - return tmp; - } - - }; -} - -namespace llvm { - template <> - struct GraphTraits { - typedef llvmc::CompilationGraph GraphType; - typedef llvmc::Node NodeType; - typedef llvmc::NodeChildIterator ChildIteratorType; - - static NodeType* getEntryNode(GraphType* G) { - return G->getNode("root"); - } - - static ChildIteratorType child_begin(NodeType* N) { - return ChildIteratorType(N, N->OutEdges.begin()); - } - static ChildIteratorType child_end(NodeType* N) { - return ChildIteratorType(N, N->OutEdges.end()); - } - - typedef llvmc::NodesIterator nodes_iterator; - static nodes_iterator nodes_begin(GraphType *G) { - return GraphBegin(G); - } - static nodes_iterator nodes_end(GraphType *G) { - return GraphEnd(G); - } - }; - -} - -#endif // LLVM_INCLUDE_COMPILER_DRIVER_COMPILATION_GRAPH_H Removed: llvm/trunk/include/llvm/CompilerDriver/Error.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CompilerDriver/Error.h?rev=140120&view=auto ============================================================================== --- llvm/trunk/include/llvm/CompilerDriver/Error.h (original) +++ llvm/trunk/include/llvm/CompilerDriver/Error.h (removed) @@ -1,29 +0,0 @@ -//===--- Error.h - The LLVM Compiler Driver ---------------------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open -// Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// Error handling. -// -//===----------------------------------------------------------------------===// - -#ifndef LLVM_INCLUDE_COMPILER_DRIVER_ERROR_H -#define LLVM_INCLUDE_COMPILER_DRIVER_ERROR_H - -#include "llvm/ADT/StringRef.h" -#include "llvm/Support/raw_ostream.h" - -namespace llvmc { - - inline void PrintError(llvm::StringRef Err) { - extern const char* ProgramName; - llvm::errs() << ProgramName << ": " << Err << '\n'; - } - -} - -#endif // LLVM_INCLUDE_COMPILER_DRIVER_ERROR_H Removed: llvm/trunk/include/llvm/CompilerDriver/Main.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CompilerDriver/Main.h?rev=140120&view=auto ============================================================================== --- llvm/trunk/include/llvm/CompilerDriver/Main.h (original) +++ llvm/trunk/include/llvm/CompilerDriver/Main.h (removed) @@ -1,21 +0,0 @@ -//===--- Main.h - The LLVM Compiler Driver ----------------------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open -// Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// Entry point for the driver executable. -// -//===----------------------------------------------------------------------===// - -#ifndef LLVM_INCLUDE_COMPILER_DRIVER_MAIN_H -#define LLVM_INCLUDE_COMPILER_DRIVER_MAIN_H - -namespace llvmc { - int Main(int argc, char** argv); -} - -#endif // LLVM_INCLUDE_COMPILER_DRIVER_MAIN_H Removed: llvm/trunk/include/llvm/CompilerDriver/Main.inc URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CompilerDriver/Main.inc?rev=140120&view=auto ============================================================================== --- llvm/trunk/include/llvm/CompilerDriver/Main.inc (original) +++ llvm/trunk/include/llvm/CompilerDriver/Main.inc (removed) @@ -1,23 +0,0 @@ -//===--- Main.inc - The LLVM Compiler Driver --------------------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open -// Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// Default main() for the driver executable. -// -//===----------------------------------------------------------------------===// - -#ifndef LLVM_INCLUDE_COMPILER_DRIVER_MAIN_INC -#define LLVM_INCLUDE_COMPILER_DRIVER_MAIN_INC - -#include "llvm/CompilerDriver/Main.h" - -int main(int argc, char** argv) { - return llvmc::Main(argc, argv); -} - -#endif // LLVM_INCLUDE_COMPILER_DRIVER_MAIN_INC Removed: llvm/trunk/include/llvm/CompilerDriver/Tool.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CompilerDriver/Tool.h?rev=140120&view=auto ============================================================================== --- llvm/trunk/include/llvm/CompilerDriver/Tool.h (original) +++ llvm/trunk/include/llvm/CompilerDriver/Tool.h (removed) @@ -1,100 +0,0 @@ -//===--- Tool.h - The LLVM Compiler Driver ----------------------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open -// Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// Tool abstract base class - an interface to tool descriptions. -// -//===----------------------------------------------------------------------===// - -#ifndef LLVM_INCLUDE_COMPILER_DRIVER_TOOL_H -#define LLVM_INCLUDE_COMPILER_DRIVER_TOOL_H - -#include "llvm/CompilerDriver/Action.h" - -#include "llvm/ADT/IntrusiveRefCntPtr.h" -#include "llvm/ADT/StringSet.h" -#include "llvm/Support/Path.h" - -#include -#include -#include - -namespace llvmc { - - class LanguageMap; - typedef std::vector > ArgsVector; - typedef std::vector PathVector; - typedef std::vector StrVector; - typedef llvm::StringSet<> InputLanguagesSet; - - /// Tool - Represents a single tool. - class Tool : public llvm::RefCountedBaseVPTR { - public: - - virtual ~Tool() {} - - /// GenerateAction - Generate an Action given particular command-line - /// options. Returns non-zero value on error. - virtual int GenerateAction (Action& Out, - const PathVector& inFiles, - const bool HasChildren, - const llvm::sys::Path& TempDir, - const InputLanguagesSet& InLangs, - const LanguageMap& LangMap) const = 0; - - /// GenerateAction - Generate an Action given particular command-line - /// options. Returns non-zero value on error. - virtual int GenerateAction (Action& Out, - const llvm::sys::Path& inFile, - const bool HasChildren, - const llvm::sys::Path& TempDir, - const InputLanguagesSet& InLangs, - const LanguageMap& LangMap) const = 0; - - virtual const char* Name() const = 0; - virtual const char** InputLanguages() const = 0; - virtual const char** OutputLanguages() const = 0; - - virtual bool IsJoin() const = 0; - virtual bool WorksOnEmpty() const = 0; - - protected: - /// OutFileName - Generate the output file name. - llvm::sys::Path OutFilename(const llvm::sys::Path& In, - const llvm::sys::Path& TempDir, - bool StopCompilation, - const char* OutputSuffix) const; - - StrVector SortArgs(ArgsVector& Args) const; - }; - - /// JoinTool - A Tool that has an associated input file list. - class JoinTool : public Tool { - public: - void AddToJoinList(const llvm::sys::Path& P) { JoinList_.push_back(P); } - void ClearJoinList() { JoinList_.clear(); } - bool JoinListEmpty() const { return JoinList_.empty(); } - - int GenerateAction(Action& Out, - const bool HasChildren, - const llvm::sys::Path& TempDir, - const InputLanguagesSet& InLangs, - const LanguageMap& LangMap) const { - return GenerateAction(Out, JoinList_, HasChildren, TempDir, InLangs, - LangMap); - } - // We shouldn't shadow base class's version of GenerateAction. - using Tool::GenerateAction; - - private: - PathVector JoinList_; - }; - -} - -#endif // LLVM_INCLUDE_COMPILER_DRIVER_TOOL_H Removed: llvm/trunk/lib/CompilerDriver/Action.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CompilerDriver/Action.cpp?rev=140120&view=auto ============================================================================== --- llvm/trunk/lib/CompilerDriver/Action.cpp (original) +++ llvm/trunk/lib/CompilerDriver/Action.cpp (removed) @@ -1,134 +0,0 @@ -//===--- Action.cpp - The LLVM Compiler Driver ------------------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open -// Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// Action class - implementation and auxiliary functions. -// -//===----------------------------------------------------------------------===// - -#include "llvm/CompilerDriver/Action.h" -#include "llvm/CompilerDriver/BuiltinOptions.h" -#include "llvm/CompilerDriver/Error.h" -#include "llvm/CompilerDriver/Main.h" - -#include "llvm/Support/raw_ostream.h" -#include "llvm/Support/SystemUtils.h" -#include "llvm/Support/Program.h" -#include "llvm/Support/TimeValue.h" - -#include -#include - -using namespace llvm; -using namespace llvmc; - -namespace llvmc { - -extern const char* ProgramName; - -} - -namespace { - - void PrintString (const std::string& str) { - errs() << str << ' '; - } - - void PrintCommand (const std::string& Cmd, const StrVector& Args) { - errs() << Cmd << ' '; - std::for_each(Args.begin(), Args.end(), &PrintString); - errs() << '\n'; - } - - bool IsSegmentationFault (int returnCode) { -#ifdef LLVM_ON_WIN32 - return (returnCode >= 0xc0000000UL) -#else - return (returnCode < 0); -#endif - } - - int ExecuteProgram (const std::string& name, const StrVector& args) { - sys::Path prog(name); - - if (sys::path::is_relative(prog.str())) { - prog = PrependMainExecutablePath(name, ProgramName, - (void *)(intptr_t)&Main); - - if (!prog.canExecute()) { - prog = sys::Program::FindProgramByName(name); - if (prog.isEmpty()) { - PrintError("Can't find program '" + name + "'"); - return -1; - } - } - } - if (!prog.canExecute()) { - PrintError("Program '" + name + "' is not executable."); - return -1; - } - - // Build the command line vector and the redirects array. - const sys::Path* redirects[3] = {0,0,0}; - sys::Path stdout_redirect; - - std::vector argv; - argv.reserve((args.size()+2)); - argv.push_back(name.c_str()); - - for (StrVector::const_iterator B = args.begin(), E = args.end(); - B!=E; ++B) { - if (*B == ">") { - ++B; - stdout_redirect.set(*B); - redirects[1] = &stdout_redirect; - } - else { - argv.push_back((*B).c_str()); - } - } - argv.push_back(0); // null terminate list. - - // Invoke the program. - int ret = sys::Program::ExecuteAndWait(prog, &argv[0], 0, &redirects[0]); - - if (IsSegmentationFault(ret)) { - errs() << "Segmentation fault: "; - PrintCommand(name, args); - } - - return ret; - } -} - -namespace llvmc { - void AppendToGlobalTimeLog (const std::string& cmd, double time); -} - -int llvmc::Action::Execute () const { - if (DryRun || VerboseMode) - PrintCommand(Command_, Args_); - - if (!DryRun) { - if (Time) { - sys::TimeValue now = sys::TimeValue::now(); - int ret = ExecuteProgram(Command_, Args_); - sys::TimeValue now2 = sys::TimeValue::now(); - now2 -= now; - double elapsed = now2.seconds() + now2.microseconds() / 1000000.0; - AppendToGlobalTimeLog(Command_, elapsed); - - return ret; - } - else { - return ExecuteProgram(Command_, Args_); - } - } - - return 0; -} Removed: llvm/trunk/lib/CompilerDriver/BuiltinOptions.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CompilerDriver/BuiltinOptions.cpp?rev=140120&view=auto ============================================================================== --- llvm/trunk/lib/CompilerDriver/BuiltinOptions.cpp (original) +++ llvm/trunk/lib/CompilerDriver/BuiltinOptions.cpp (removed) @@ -1,61 +0,0 @@ -//===--- BuiltinOptions.cpp - The LLVM Compiler Driver ----------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open -// Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// Definitions of all global command-line option variables. -// -//===----------------------------------------------------------------------===// - -#include "llvm/CompilerDriver/BuiltinOptions.h" - -#ifdef ENABLE_LLVMC_DYNAMIC_PLUGINS -#include "llvm/Support/PluginLoader.h" -#endif - -namespace cl = llvm::cl; - -namespace llvmc { - -cl::list InputFilenames(cl::Positional, cl::desc(""), - cl::ZeroOrMore); -cl::opt OutputFilename("o", cl::desc("Output file name"), - cl::value_desc("file"), cl::Prefix); -cl::opt TempDirname("temp-dir", cl::desc("Temp dir name"), - cl::value_desc(""), cl::Prefix); -cl::list Languages("x", - cl::desc("Specify the language of the following input files"), - cl::ZeroOrMore); - -cl::opt DryRun("dry-run", - cl::desc("Only pretend to run commands")); -cl::opt Time("time", cl::desc("Time individual commands")); -cl::opt VerboseMode("v", - cl::desc("Enable verbose mode")); - -cl::opt CheckGraph("check-graph", - cl::desc("Check the compilation graph for errors"), - cl::Hidden); -cl::opt WriteGraph("write-graph", - cl::desc("Write compilation-graph.dot file"), - cl::Hidden); -cl::opt ViewGraph("view-graph", - cl::desc("Show compilation graph in GhostView"), - cl::Hidden); - -cl::opt SaveTemps -("save-temps", cl::desc("Keep temporary files"), - cl::init(SaveTempsEnum::Unset), - cl::values(clEnumValN(SaveTempsEnum::Obj, "obj", - "Save files in the directory specified with -o"), - clEnumValN(SaveTempsEnum::Cwd, "cwd", - "Use current working directory"), - clEnumValN(SaveTempsEnum::Obj, "", "Same as 'cwd'"), - clEnumValEnd), - cl::ValueOptional); - -} // End namespace llvmc. Removed: llvm/trunk/lib/CompilerDriver/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CompilerDriver/CMakeLists.txt?rev=140120&view=auto ============================================================================== --- llvm/trunk/lib/CompilerDriver/CMakeLists.txt (original) +++ llvm/trunk/lib/CompilerDriver/CMakeLists.txt (removed) @@ -1,12 +0,0 @@ -set(LLVM_LINK_COMPONENTS support) - -# We don't want this library to appear in `llvm-config --libs` output, -# so its name doesn't start with "LLVM". - -add_llvm_library(CompilerDriver - Action.cpp - BuiltinOptions.cpp - CompilationGraph.cpp - Main.cpp - Tool.cpp - ) Removed: llvm/trunk/lib/CompilerDriver/CompilationGraph.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CompilerDriver/CompilationGraph.cpp?rev=140120&view=auto ============================================================================== --- llvm/trunk/lib/CompilerDriver/CompilationGraph.cpp (original) +++ llvm/trunk/lib/CompilerDriver/CompilationGraph.cpp (removed) @@ -1,655 +0,0 @@ -//===--- CompilationGraph.cpp - The LLVM Compiler Driver --------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open -// Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// Compilation graph - implementation. -// -//===----------------------------------------------------------------------===// - -#include "llvm/CompilerDriver/BuiltinOptions.h" -#include "llvm/CompilerDriver/CompilationGraph.h" -#include "llvm/CompilerDriver/Error.h" - -#include "llvm/ADT/STLExtras.h" -#include "llvm/Support/DOTGraphTraits.h" -#include "llvm/Support/GraphWriter.h" -#include "llvm/Support/raw_ostream.h" - -#include -#include -#include -#include -#include - -using namespace llvm; -using namespace llvmc; - -namespace llvmc { - - const std::string* LanguageMap::GetLanguage(const sys::Path& File) const { - // Remove the '.'. - StringRef suf = sys::path::extension(File.str()).substr(1); - LanguageMap::const_iterator Lang = - this->find(suf.empty() ? "*empty*" : suf); - if (Lang == this->end()) { - PrintError("File '" + File.str() + "' has unknown suffix '" - + suf.str() + '\''); - return 0; - } - return &Lang->second; - } -} - -namespace { - - /// ChooseEdge - Return the edge with the maximum weight. Returns 0 on error. - template - const Edge* ChooseEdge(const C& EdgesContainer, - const InputLanguagesSet& InLangs, - const std::string& NodeName = "root") { - const Edge* MaxEdge = 0; - int MaxWeight = 0; - bool SingleMax = true; - - // TODO: fix calculation of SingleMax. - for (typename C::const_iterator B = EdgesContainer.begin(), - E = EdgesContainer.end(); B != E; ++B) { - const Edge* e = B->getPtr(); - int EW = e->Weight(InLangs); - if (EW < 0) { - // (error) invocation in TableGen -> we don't need to print an error - // message. - return 0; - } - if (EW > MaxWeight) { - MaxEdge = e; - MaxWeight = EW; - SingleMax = true; - } else if (EW == MaxWeight) { - SingleMax = false; - } - } - - if (!SingleMax) { - PrintError("Node " + NodeName + ": multiple maximal outward edges found!" - " Most probably a specification error."); - return 0; - } - if (!MaxEdge) { - PrintError("Node " + NodeName + ": no maximal outward edge found!" - " Most probably a specification error."); - return 0; - } - return MaxEdge; - } - -} - -void Node::AddEdge(Edge* Edg) { - // If there already was an edge between two nodes, modify it instead - // of adding a new edge. - const std::string& ToolName = Edg->ToolName(); - for (container_type::iterator B = OutEdges.begin(), E = OutEdges.end(); - B != E; ++B) { - if ((*B)->ToolName() == ToolName) { - llvm::IntrusiveRefCntPtr(Edg).swap(*B); - return; - } - } - OutEdges.push_back(llvm::IntrusiveRefCntPtr(Edg)); -} - -CompilationGraph::CompilationGraph() { - NodesMap["root"] = Node(this); -} - -Node* CompilationGraph::getNode(const std::string& ToolName) { - nodes_map_type::iterator I = NodesMap.find(ToolName); - if (I == NodesMap.end()) { - PrintError("Node " + ToolName + " is not in the graph"); - return 0; - } - return &I->second; -} - -const Node* CompilationGraph::getNode(const std::string& ToolName) const { - nodes_map_type::const_iterator I = NodesMap.find(ToolName); - if (I == NodesMap.end()) { - PrintError("Node " + ToolName + " is not in the graph!"); - return 0; - } - return &I->second; -} - -// Find the tools list corresponding to the given language name. -const CompilationGraph::tools_vector_type* -CompilationGraph::getToolsVector(const std::string& LangName) const -{ - tools_map_type::const_iterator I = ToolsMap.find(LangName); - if (I == ToolsMap.end()) { - PrintError("No tool corresponding to the language " + LangName + " found"); - return 0; - } - return &I->second; -} - -void CompilationGraph::insertNode(Tool* V) { - if (NodesMap.count(V->Name()) == 0) - NodesMap[V->Name()] = Node(this, V); -} - -int CompilationGraph::insertEdge(const std::string& A, Edge* Edg) { - Node* B = getNode(Edg->ToolName()); - if (B == 0) - return 1; - - if (A == "root") { - const char** InLangs = B->ToolPtr->InputLanguages(); - for (;*InLangs; ++InLangs) - ToolsMap[*InLangs].push_back(IntrusiveRefCntPtr(Edg)); - NodesMap["root"].AddEdge(Edg); - } - else { - Node* N = getNode(A); - if (N == 0) - return 1; - - N->AddEdge(Edg); - } - // Increase the inward edge counter. - B->IncrInEdges(); - - return 0; -} - -// Pass input file through the chain until we bump into a Join node or -// a node that says that it is the last. -int CompilationGraph::PassThroughGraph (const sys::Path& InFile, - const Node* StartNode, - const InputLanguagesSet& InLangs, - const sys::Path& TempDir, - const LanguageMap& LangMap) const { - sys::Path In = InFile; - const Node* CurNode = StartNode; - - while(true) { - Tool* CurTool = CurNode->ToolPtr.getPtr(); - - if (CurTool->IsJoin()) { - JoinTool& JT = static_cast(*CurTool); - JT.AddToJoinList(In); - break; - } - - Action CurAction; - if (int ret = CurTool->GenerateAction(CurAction, In, CurNode->HasChildren(), - TempDir, InLangs, LangMap)) { - return ret; - } - - if (int ret = CurAction.Execute()) - return ret; - - if (CurAction.StopCompilation()) - return 0; - - const Edge* Edg = ChooseEdge(CurNode->OutEdges, InLangs, CurNode->Name()); - if (Edg == 0) - return 1; - - CurNode = getNode(Edg->ToolName()); - if (CurNode == 0) - return 1; - - In = CurAction.OutFile(); - } - - return 0; -} - -// Find the head of the toolchain corresponding to the given file. -// Also, insert an input language into InLangs. -const Node* CompilationGraph:: -FindToolChain(const sys::Path& In, const std::string* ForceLanguage, - InputLanguagesSet& InLangs, const LanguageMap& LangMap) const { - - // Determine the input language. - const std::string* InLang = (ForceLanguage ? ForceLanguage - : LangMap.GetLanguage(In)); - if (InLang == 0) - return 0; - const std::string& InLanguage = *InLang; - - // Add the current input language to the input language set. - InLangs.insert(InLanguage); - - // Find the toolchain for the input language. - const tools_vector_type* pTV = getToolsVector(InLanguage); - if (pTV == 0) - return 0; - - const tools_vector_type& TV = *pTV; - if (TV.empty()) { - PrintError("No toolchain corresponding to language " - + InLanguage + " found"); - return 0; - } - - const Edge* Edg = ChooseEdge(TV, InLangs); - if (Edg == 0) - return 0; - - return getNode(Edg->ToolName()); -} - -// Helper function used by Build(). -// Traverses initial portions of the toolchains (up to the first Join node). -// This function is also responsible for handling the -x option. -int CompilationGraph::BuildInitial (InputLanguagesSet& InLangs, - const sys::Path& TempDir, - const LanguageMap& LangMap) { - // This is related to -x option handling. - cl::list::const_iterator xIter = Languages.begin(), - xBegin = xIter, xEnd = Languages.end(); - bool xEmpty = true; - const std::string* xLanguage = 0; - unsigned xPos = 0, xPosNext = 0, filePos = 0; - - if (xIter != xEnd) { - xEmpty = false; - xPos = Languages.getPosition(xIter - xBegin); - cl::list::const_iterator xNext = llvm::next(xIter); - xPosNext = (xNext == xEnd) ? std::numeric_limits::max() - : Languages.getPosition(xNext - xBegin); - xLanguage = (*xIter == "none") ? 0 : &(*xIter); - } - - // For each input file: - for (cl::list::const_iterator B = InputFilenames.begin(), - CB = B, E = InputFilenames.end(); B != E; ++B) { - sys::Path In = sys::Path(*B); - - // Code for handling the -x option. - // Output: std::string* xLanguage (can be NULL). - if (!xEmpty) { - filePos = InputFilenames.getPosition(B - CB); - - if (xPos < filePos) { - if (filePos < xPosNext) { - xLanguage = (*xIter == "none") ? 0 : &(*xIter); - } - else { // filePos >= xPosNext - // Skip xIters while filePos > xPosNext - while (filePos > xPosNext) { - ++xIter; - xPos = xPosNext; - - cl::list::const_iterator xNext = llvm::next(xIter); - if (xNext == xEnd) - xPosNext = std::numeric_limits::max(); - else - xPosNext = Languages.getPosition(xNext - xBegin); - xLanguage = (*xIter == "none") ? 0 : &(*xIter); - } - } - } - } - - // Find the toolchain corresponding to this file. - const Node* N = FindToolChain(In, xLanguage, InLangs, LangMap); - if (N == 0) - return 1; - // Pass file through the chain starting at head. - if (int ret = PassThroughGraph(In, N, InLangs, TempDir, LangMap)) - return ret; - } - - return 0; -} - -// Sort the nodes in topological order. -int CompilationGraph::TopologicalSort(std::vector& Out) { - std::queue Q; - - Node* Root = getNode("root"); - if (Root == 0) - return 1; - - Q.push(Root); - - while (!Q.empty()) { - const Node* A = Q.front(); - Q.pop(); - Out.push_back(A); - for (Node::const_iterator EB = A->EdgesBegin(), EE = A->EdgesEnd(); - EB != EE; ++EB) { - Node* B = getNode((*EB)->ToolName()); - if (B == 0) - return 1; - - B->DecrInEdges(); - if (B->HasNoInEdges()) - Q.push(B); - } - } - - return 0; -} - -namespace { - bool NotJoinNode(const Node* N) { - return N->ToolPtr ? !N->ToolPtr->IsJoin() : true; - } -} - -// Call TopologicalSort and filter the resulting list to include -// only Join nodes. -int CompilationGraph:: -TopologicalSortFilterJoinNodes(std::vector& Out) { - std::vector TopSorted; - if (int ret = TopologicalSort(TopSorted)) - return ret; - std::remove_copy_if(TopSorted.begin(), TopSorted.end(), - std::back_inserter(Out), NotJoinNode); - - return 0; -} - -int CompilationGraph::Build (const sys::Path& TempDir, - const LanguageMap& LangMap) { - InputLanguagesSet InLangs; - bool WasSomeActionGenerated = !InputFilenames.empty(); - - // Traverse initial parts of the toolchains and fill in InLangs. - if (int ret = BuildInitial(InLangs, TempDir, LangMap)) - return ret; - - std::vector JTV; - if (int ret = TopologicalSortFilterJoinNodes(JTV)) - return ret; - - // For all join nodes in topological order: - for (std::vector::iterator B = JTV.begin(), E = JTV.end(); - B != E; ++B) { - - const Node* CurNode = *B; - JoinTool* JT = &static_cast(*CurNode->ToolPtr.getPtr()); - - // Are there any files in the join list? - if (JT->JoinListEmpty() && !(JT->WorksOnEmpty() && InputFilenames.empty())) - continue; - - WasSomeActionGenerated = true; - Action CurAction; - if (int ret = JT->GenerateAction(CurAction, CurNode->HasChildren(), - TempDir, InLangs, LangMap)) { - return ret; - } - - if (int ret = CurAction.Execute()) - return ret; - - if (CurAction.StopCompilation()) - return 0; - - const Edge* Edg = ChooseEdge(CurNode->OutEdges, InLangs, CurNode->Name()); - if (Edg == 0) - return 1; - - const Node* NextNode = getNode(Edg->ToolName()); - if (NextNode == 0) - return 1; - - if (int ret = PassThroughGraph(sys::Path(CurAction.OutFile()), NextNode, - InLangs, TempDir, LangMap)) { - return ret; - } - } - - if (!WasSomeActionGenerated) { - PrintError("no input files"); - return 1; - } - - return 0; -} - -int CompilationGraph::CheckLanguageNames() const { - int ret = 0; - - // Check that names for output and input languages on all edges do match. - for (const_nodes_iterator B = this->NodesMap.begin(), - E = this->NodesMap.end(); B != E; ++B) { - - const Node & N1 = B->second; - if (N1.ToolPtr) { - for (Node::const_iterator EB = N1.EdgesBegin(), EE = N1.EdgesEnd(); - EB != EE; ++EB) { - const Node* N2 = this->getNode((*EB)->ToolName()); - if (N2 == 0) - return 1; - - if (!N2->ToolPtr) { - ++ret; - errs() << "Error: there is an edge from '" << N1.ToolPtr->Name() - << "' back to the root!\n\n"; - continue; - } - - const char** OutLangs = N1.ToolPtr->OutputLanguages(); - const char** InLangs = N2->ToolPtr->InputLanguages(); - bool eq = false; - const char* OutLang = 0; - for (;*OutLangs; ++OutLangs) { - OutLang = *OutLangs; - for (;*InLangs; ++InLangs) { - if (std::strcmp(OutLang, *InLangs) == 0) { - eq = true; - break; - } - } - } - - if (!eq) { - ++ret; - errs() << "Error: Output->input language mismatch in the edge '" - << N1.ToolPtr->Name() << "' -> '" << N2->ToolPtr->Name() - << "'!\n" - << "Expected one of { "; - - InLangs = N2->ToolPtr->InputLanguages(); - for (;*InLangs; ++InLangs) { - errs() << '\'' << *InLangs << (*(InLangs+1) ? "', " : "'"); - } - - errs() << " }, but got '" << OutLang << "'!\n\n"; - } - - } - } - } - - return ret; -} - -int CompilationGraph::CheckMultipleDefaultEdges() const { - int ret = 0; - InputLanguagesSet Dummy; - - // For all nodes, just iterate over the outgoing edges and check if there is - // more than one edge with maximum weight. - for (const_nodes_iterator B = this->NodesMap.begin(), - E = this->NodesMap.end(); B != E; ++B) { - const Node& N = B->second; - int MaxWeight = -1024; - - // Ignore the root node. - if (!N.ToolPtr) - continue; - - for (Node::const_iterator EB = N.EdgesBegin(), EE = N.EdgesEnd(); - EB != EE; ++EB) { - int EdgeWeight = (*EB)->Weight(Dummy); - if (EdgeWeight > MaxWeight) { - MaxWeight = EdgeWeight; - } - else if (EdgeWeight == MaxWeight) { - ++ret; - errs() << "Error: there are multiple maximal edges stemming from the '" - << N.ToolPtr->Name() << "' node!\n\n"; - break; - } - } - } - - return ret; -} - -int CompilationGraph::CheckCycles() { - unsigned deleted = 0; - std::queue Q; - - Node* Root = getNode("root"); - if (Root == 0) - return 1; - - Q.push(Root); - - // Try to delete all nodes that have no ingoing edges, starting from the - // root. If there are any nodes left after this operation, then we have a - // cycle. This relies on '--check-graph' not performing the topological sort. - while (!Q.empty()) { - Node* A = Q.front(); - Q.pop(); - ++deleted; - - for (Node::iterator EB = A->EdgesBegin(), EE = A->EdgesEnd(); - EB != EE; ++EB) { - Node* B = getNode((*EB)->ToolName()); - if (B == 0) - return 1; - - B->DecrInEdges(); - if (B->HasNoInEdges()) - Q.push(B); - } - } - - if (deleted != NodesMap.size()) { - errs() << "Error: there are cycles in the compilation graph!\n" - << "Try inspecting the diagram produced by " - << "'llvmc --view-graph'.\n\n"; - return 1; - } - - return 0; -} - -int CompilationGraph::Check () { - // We try to catch as many errors as we can in one go. - int errs = 0; - int ret = 0; - - // Check that output/input language names match. - ret = this->CheckLanguageNames(); - if (ret < 0) - return 1; - errs += ret; - - // Check for multiple default edges. - ret = this->CheckMultipleDefaultEdges(); - if (ret < 0) - return 1; - errs += ret; - - // Check for cycles. - ret = this->CheckCycles(); - if (ret < 0) - return 1; - errs += ret; - - return errs; -} - -// Code related to graph visualization. - -namespace { - -std::string SquashStrArray (const char** StrArr) { - std::string ret; - - for (; *StrArr; ++StrArr) { - if (*(StrArr + 1)) { - ret += *StrArr; - ret += ", "; - } - else { - ret += *StrArr; - } - } - - return ret; -} - -} // End anonymous namespace. - -namespace llvm { - template <> - struct DOTGraphTraits - : public DefaultDOTGraphTraits - { - DOTGraphTraits (bool isSimple=false) : DefaultDOTGraphTraits(isSimple) {} - - template - static std::string getNodeLabel(const Node* N, const GraphType&) - { - if (N->ToolPtr) - if (N->ToolPtr->IsJoin()) - return N->Name() + "\n (join" + - (N->HasChildren() ? ")" - : std::string(": ") + - SquashStrArray(N->ToolPtr->OutputLanguages()) + ')'); - else - return N->Name(); - else - return "root"; - } - - template - static std::string getEdgeSourceLabel(const Node* N, EdgeIter I) { - if (N->ToolPtr) { - return SquashStrArray(N->ToolPtr->OutputLanguages()); - } - else { - return SquashStrArray(I->ToolPtr->InputLanguages()); - } - } - }; - -} // End namespace llvm - -int CompilationGraph::writeGraph(const std::string& OutputFilename) { - std::string ErrorInfo; - raw_fd_ostream O(OutputFilename.c_str(), ErrorInfo); - - if (ErrorInfo.empty()) { - errs() << "Writing '"<< OutputFilename << "' file..."; - llvm::WriteGraph(O, this); - errs() << "done.\n"; - } - else { - PrintError("Error opening file '" + OutputFilename + "' for writing!"); - return 1; - } - - return 0; -} - -void CompilationGraph::viewGraph() { - llvm::ViewGraph(this, "compilation-graph"); -} Removed: llvm/trunk/lib/CompilerDriver/Main.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CompilerDriver/Main.cpp?rev=140120&view=auto ============================================================================== --- llvm/trunk/lib/CompilerDriver/Main.cpp (original) +++ llvm/trunk/lib/CompilerDriver/Main.cpp (removed) @@ -1,146 +0,0 @@ -//===--- Main.cpp - The LLVM Compiler Driver --------------------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open -// Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// llvmc::Main function - driver entry point. -// -//===----------------------------------------------------------------------===// - -#include "llvm/CompilerDriver/AutoGenerated.h" -#include "llvm/CompilerDriver/BuiltinOptions.h" -#include "llvm/CompilerDriver/CompilationGraph.h" -#include "llvm/CompilerDriver/Error.h" - -#include "llvm/Support/FileSystem.h" -#include "llvm/Support/raw_ostream.h" -#include "llvm/Support/Path.h" - -#include -#include - -namespace cl = llvm::cl; -namespace sys = llvm::sys; -using namespace llvmc; - -namespace { - - std::stringstream* GlobalTimeLog; - - /// GetTempDir - Get the temporary directory location. Returns non-zero value - /// on error. - int GetTempDir(sys::Path& tempDir) { - // The --temp-dir option. - if (!TempDirname.empty()) { - tempDir = TempDirname; - } - // GCC 4.5-style -save-temps handling. - else if (SaveTemps == SaveTempsEnum::Unset) { - tempDir = sys::Path::GetTemporaryDirectory(); - return 0; - } - else if (SaveTemps == SaveTempsEnum::Obj && !OutputFilename.empty()) { - tempDir = sys::path::parent_path(OutputFilename); - } - else { - // SaveTemps == Cwd --> use current dir (leave tempDir empty). - return 0; - } - - bool Exists; - if (llvm::sys::fs::exists(tempDir.str(), Exists) || !Exists) { - std::string ErrMsg; - if (tempDir.createDirectoryOnDisk(true, &ErrMsg)) { - PrintError(ErrMsg); - return 1; - } - } - - return 0; - } - - /// BuildTargets - A small wrapper for CompilationGraph::Build. Returns - /// non-zero value in case of error. - int BuildTargets(CompilationGraph& graph, const LanguageMap& langMap) { - int ret; - sys::Path tempDir; - bool toDelete = (SaveTemps == SaveTempsEnum::Unset); - - if (int ret = GetTempDir(tempDir)) - return ret; - - ret = graph.Build(tempDir, langMap); - - if (toDelete) - tempDir.eraseFromDisk(true); - - return ret; - } -} - -namespace llvmc { - -// Used to implement -time option. External linkage is intentional. -void AppendToGlobalTimeLog(const std::string& cmd, double time) { - *GlobalTimeLog << "# " << cmd << ' ' << time << '\n'; -} - -// Sometimes user code wants to access the argv[0] value. -const char* ProgramName; - -int Main(int argc, char** argv) { - int ret = 0; - LanguageMap langMap; - CompilationGraph graph; - - ProgramName = argv[0]; - - cl::ParseCommandLineOptions - (argc, argv, - /* Overview = */ "LLVM Compiler Driver (Work In Progress)", - /* ReadResponseFiles = */ false); - - if (int ret = autogenerated::RunInitialization(langMap, graph)) - return ret; - - if (CheckGraph) { - ret = graph.Check(); - if (!ret) - llvm::errs() << "check-graph: no errors found.\n"; - - return ret; - } - - if (ViewGraph) { - graph.viewGraph(); - if (!WriteGraph) - return 0; - } - - if (WriteGraph) { - const std::string& Out = (OutputFilename.empty() - ? std::string("compilation-graph.dot") - : OutputFilename); - return graph.writeGraph(Out); - } - - if (Time) { - GlobalTimeLog = new std::stringstream; - GlobalTimeLog->precision(2); - } - - ret = BuildTargets(graph, langMap); - - if (Time) { - llvm::errs() << GlobalTimeLog->str(); - delete GlobalTimeLog; - } - - return ret; -} - -} // end namespace llvmc Removed: llvm/trunk/lib/CompilerDriver/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CompilerDriver/Makefile?rev=140120&view=auto ============================================================================== --- llvm/trunk/lib/CompilerDriver/Makefile (original) +++ llvm/trunk/lib/CompilerDriver/Makefile (removed) @@ -1,20 +0,0 @@ -##===- lib/CompilerDriver/Makefile -------------------------*- Makefile -*-===## -# -# The LLVM Compiler Infrastructure -# -# This file is distributed under the University of Illinois Open -# Source License. See LICENSE.TXT for details. -# -##===----------------------------------------------------------------------===## - -LEVEL = ../.. - -# We don't want this library to appear in `llvm-config --libs` output, so its -# name doesn't start with "LLVM" and NO_LLVM_CONFIG is set. - -LIBRARYNAME = CompilerDriver -LINK_COMPONENTS = support -NO_LLVM_CONFIG = 1 - - -include $(LEVEL)/Makefile.common Removed: llvm/trunk/lib/CompilerDriver/Tool.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CompilerDriver/Tool.cpp?rev=140120&view=auto ============================================================================== --- llvm/trunk/lib/CompilerDriver/Tool.cpp (original) +++ llvm/trunk/lib/CompilerDriver/Tool.cpp (removed) @@ -1,95 +0,0 @@ -//===--- Tool.cpp - The LLVM Compiler Driver --------------------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open -// Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// Tool base class - implementation details. -// -//===----------------------------------------------------------------------===// - -#include "llvm/CompilerDriver/BuiltinOptions.h" -#include "llvm/CompilerDriver/Tool.h" - -#include "llvm/ADT/StringExtras.h" -#include "llvm/Support/Path.h" - -#include - -using namespace llvm; -using namespace llvmc; - -namespace { - sys::Path MakeTempFile(const sys::Path& TempDir, const std::string& BaseName, - const std::string& Suffix) { - sys::Path Out; - - // Make sure we don't end up with path names like '/file.o' if the - // TempDir is empty. - if (TempDir.empty()) { - Out.set(BaseName); - } - else { - Out = TempDir; - Out.appendComponent(BaseName); - } - Out.appendSuffix(Suffix); - // NOTE: makeUnique always *creates* a unique temporary file, - // which is good, since there will be no races. However, some - // tools do not like it when the output file already exists, so - // they need to be placated with -f or something like that. - Out.makeUnique(true, NULL); - return Out; - } -} - -sys::Path Tool::OutFilename(const sys::Path& In, - const sys::Path& TempDir, - bool StopCompilation, - const char* OutputSuffix) const { - sys::Path Out; - - if (StopCompilation) { - if (!OutputFilename.empty()) { - Out.set(OutputFilename); - } - else if (IsJoin()) { - Out.set("a"); - Out.appendSuffix(OutputSuffix); - } - else { - Out.set(sys::path::stem(In.str())); - Out.appendSuffix(OutputSuffix); - } - } - else { - if (IsJoin()) - Out = MakeTempFile(TempDir, "tmp", OutputSuffix); - else - Out = MakeTempFile(TempDir, sys::path::stem(In.str()), OutputSuffix); - } - return Out; -} - -namespace { - template - bool CompareFirst (std::pair p1, std::pair p2) { - return std::less()(p1.first, p2.first); - } -} - -StrVector Tool::SortArgs(ArgsVector& Args) const { - StrVector Out; - - // HACK: this won't be needed when we'll migrate away from CommandLine. - std::stable_sort(Args.begin(), Args.end(), - &CompareFirst); - for (ArgsVector::iterator B = Args.begin(), E = Args.end(); B != E; ++B) { - Out.push_back(B->second); - } - - return Out; -} Modified: llvm/trunk/lib/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Makefile?rev=140121&r1=140120&r2=140121&view=diff ============================================================================== --- llvm/trunk/lib/Makefile (original) +++ llvm/trunk/lib/Makefile Mon Sep 19 19:34:27 2011 @@ -11,7 +11,7 @@ include $(LEVEL)/Makefile.config PARALLEL_DIRS := VMCore AsmParser Bitcode Archive Analysis Transforms CodeGen \ - Target ExecutionEngine Linker MC CompilerDriver Object DebugInfo + Target ExecutionEngine Linker MC Object DebugInfo include $(LEVEL)/Makefile.common Modified: llvm/trunk/utils/TableGen/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CMakeLists.txt?rev=140121&r1=140120&r2=140121&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/CMakeLists.txt (original) +++ llvm/trunk/utils/TableGen/CMakeLists.txt Mon Sep 19 19:34:27 2011 @@ -31,7 +31,6 @@ InstrEnumEmitter.cpp InstrInfoEmitter.cpp IntrinsicEmitter.cpp - LLVMCConfigurationEmitter.cpp NeonEmitter.cpp OptParserEmitter.cpp PseudoLoweringEmitter.cpp Removed: llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp?rev=140120&view=auto ============================================================================== --- llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp (removed) @@ -1,3134 +0,0 @@ -//===- LLVMCConfigurationEmitter.cpp - Generate LLVMC config ----*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open -// Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This tablegen backend is responsible for emitting LLVMC configuration code. -// -//===----------------------------------------------------------------------===// - -#include "LLVMCConfigurationEmitter.h" -#include "Record.h" - -#include "llvm/ADT/IntrusiveRefCntPtr.h" -#include "llvm/ADT/StringMap.h" -#include "llvm/ADT/StringSet.h" - -#include -#include -#include -#include -#include -#include - - -using namespace llvm; - -namespace { - -//===----------------------------------------------------------------------===// -/// Typedefs - -typedef std::vector RecordVector; -typedef std::vector DagVector; -typedef std::vector StrVector; - -//===----------------------------------------------------------------------===// -/// Constants - -// Indentation. -const unsigned TabWidth = 4; -const unsigned Indent1 = TabWidth*1; -const unsigned Indent2 = TabWidth*2; -const unsigned Indent3 = TabWidth*3; -const unsigned Indent4 = TabWidth*4; - -// Default help string. -const char * const DefaultHelpString = "NO HELP MESSAGE PROVIDED"; - -// Name for the "sink" option. -const char * const SinkOptionName = "SinkOption"; - -//===----------------------------------------------------------------------===// -/// Helper functions - -/// Id - An 'identity' function object. -struct Id { - template - void operator()(const T0&) const { - } - template - void operator()(const T0&, const T1&) const { - } - template - void operator()(const T0&, const T1&, const T2&) const { - } -}; - -int InitPtrToInt(const Init* ptr) { - const IntInit& val = dynamic_cast(*ptr); - return val.getValue(); -} - -bool InitPtrToBool(const Init* ptr) { - bool ret = false; - const DefInit& val = dynamic_cast(*ptr); - const std::string& str = val.getAsString(); - - if (str == "true") { - ret = true; - } - else if (str == "false") { - ret = false; - } - else { - throw "Incorrect boolean value: '" + str + - "': must be either 'true' or 'false'"; - } - - return ret; -} - -const std::string& InitPtrToString(const Init* ptr) { - const StringInit& val = dynamic_cast(*ptr); - return val.getValue(); -} - -const ListInit& InitPtrToList(const Init* ptr) { - const ListInit& val = dynamic_cast(*ptr); - return val; -} - -const DagInit& InitPtrToDag(const Init* ptr) { - const DagInit& val = dynamic_cast(*ptr); - return val; -} - -const std::string GetOperatorName(const DagInit& D) { - return D.getOperator()->getAsString(); -} - -/// CheckBooleanConstant - Check that the provided value is a boolean constant. -void CheckBooleanConstant(const Init* I) { - InitPtrToBool(I); -} - -// CheckNumberOfArguments - Ensure that the number of args in d is -// greater than or equal to min_arguments, otherwise throw an exception. -void CheckNumberOfArguments (const DagInit& d, unsigned minArgs) { - if (d.getNumArgs() < minArgs) - throw GetOperatorName(d) + ": too few arguments!"; -} - -// EscapeVariableName - Escape commas and other symbols not allowed -// in the C++ variable names. Makes it possible to use options named -// like "Wa," (useful for prefix options). -std::string EscapeVariableName (const std::string& Var) { - std::string ret; - for (unsigned i = 0; i != Var.size(); ++i) { - char cur_char = Var[i]; - if (cur_char == ',') { - ret += "_comma_"; - } - else if (cur_char == '+') { - ret += "_plus_"; - } - else if (cur_char == '-') { - ret += "_dash_"; - } - else { - ret.push_back(cur_char); - } - } - return ret; -} - -/// EscapeQuotes - Replace '"' with '\"'. -std::string EscapeQuotes (const std::string& Var) { - std::string ret; - for (unsigned i = 0; i != Var.size(); ++i) { - char cur_char = Var[i]; - if (cur_char == '"') { - ret += "\\\""; - } - else { - ret.push_back(cur_char); - } - } - return ret; -} - -/// OneOf - Does the input string contain this character? -bool OneOf(const char* lst, char c) { - while (*lst) { - if (*lst++ == c) - return true; - } - return false; -} - -template -void CheckedIncrement(I& P, I E, S ErrorString) { - ++P; - if (P == E) - throw ErrorString; -} - -//===----------------------------------------------------------------------===// -/// Back-end specific code - - -/// OptionType - One of six different option types. See the -/// documentation for detailed description of differences. -namespace OptionType { - - enum OptionType { Alias, Switch, SwitchList, - Parameter, ParameterList, Prefix, PrefixList }; - - bool IsAlias(OptionType t) { - return (t == Alias); - } - - bool IsList (OptionType t) { - return (t == SwitchList || t == ParameterList || t == PrefixList); - } - - bool IsSwitch (OptionType t) { - return (t == Switch); - } - - bool IsSwitchList (OptionType t) { - return (t == SwitchList); - } - - bool IsParameter (OptionType t) { - return (t == Parameter || t == Prefix); - } - -} - -OptionType::OptionType stringToOptionType(const std::string& T) { - if (T == "alias_option") - return OptionType::Alias; - else if (T == "switch_option") - return OptionType::Switch; - else if (T == "switch_list_option") - return OptionType::SwitchList; - else if (T == "parameter_option") - return OptionType::Parameter; - else if (T == "parameter_list_option") - return OptionType::ParameterList; - else if (T == "prefix_option") - return OptionType::Prefix; - else if (T == "prefix_list_option") - return OptionType::PrefixList; - else - throw "Unknown option type: " + T + '!'; -} - -namespace OptionDescriptionFlags { - enum OptionDescriptionFlags { Required = 0x1, Hidden = 0x2, - ReallyHidden = 0x4, OneOrMore = 0x8, - Optional = 0x10, CommaSeparated = 0x20, - ForwardNotSplit = 0x40, ZeroOrMore = 0x80 }; -} - -/// OptionDescription - Represents data contained in a single -/// OptionList entry. -struct OptionDescription { - OptionType::OptionType Type; - std::string Name; - unsigned Flags; - std::string Help; - unsigned MultiVal; - Init* InitVal; - - OptionDescription(OptionType::OptionType t = OptionType::Switch, - const std::string& n = "", - const std::string& h = DefaultHelpString) - : Type(t), Name(n), Flags(0x0), Help(h), MultiVal(1), InitVal(0) - {} - - /// GenTypeDeclaration - Returns the C++ variable type of this - /// option. - const char* GenTypeDeclaration() const; - - /// GenVariableName - Returns the variable name used in the - /// generated C++ code. - std::string GenVariableName() const - { return "autogenerated::" + GenOptionType() + EscapeVariableName(Name); } - - /// GenPlainVariableName - Returns the variable name without the namespace - /// prefix. - std::string GenPlainVariableName() const - { return GenOptionType() + EscapeVariableName(Name); } - - /// Merge - Merge two option descriptions. - void Merge (const OptionDescription& other); - - /// CheckConsistency - Check that the flags are consistent. - void CheckConsistency() const; - - // Misc convenient getters/setters. - - bool isAlias() const; - - bool isMultiVal() const; - - bool isCommaSeparated() const; - void setCommaSeparated(); - - bool isForwardNotSplit() const; - void setForwardNotSplit(); - - bool isRequired() const; - void setRequired(); - - bool isOneOrMore() const; - void setOneOrMore(); - - bool isZeroOrMore() const; - void setZeroOrMore(); - - bool isOptional() const; - void setOptional(); - - bool isHidden() const; - void setHidden(); - - bool isReallyHidden() const; - void setReallyHidden(); - - bool isSwitch() const - { return OptionType::IsSwitch(this->Type); } - - bool isSwitchList() const - { return OptionType::IsSwitchList(this->Type); } - - bool isParameter() const - { return OptionType::IsParameter(this->Type); } - - bool isList() const - { return OptionType::IsList(this->Type); } - - bool isParameterList() const - { return (OptionType::IsList(this->Type) - && !OptionType::IsSwitchList(this->Type)); } - -private: - - // GenOptionType - Helper function used by GenVariableName(). - std::string GenOptionType() const; -}; - -void OptionDescription::CheckConsistency() const { - unsigned i = 0; - - i += this->isRequired(); - i += this->isOptional(); - i += this->isOneOrMore(); - i += this->isZeroOrMore(); - - if (i > 1) { - throw "Only one of (required), (optional), (one_or_more) or " - "(zero_or_more) properties is allowed!"; - } -} - -void OptionDescription::Merge (const OptionDescription& other) -{ - if (other.Type != Type) - throw "Conflicting definitions for the option " + Name + "!"; - - if (Help == other.Help || Help == DefaultHelpString) - Help = other.Help; - else if (other.Help != DefaultHelpString) { - llvm::errs() << "Warning: several different help strings" - " defined for option " + Name + "\n"; - } - - Flags |= other.Flags; -} - -bool OptionDescription::isAlias() const { - return OptionType::IsAlias(this->Type); -} - -bool OptionDescription::isMultiVal() const { - return MultiVal > 1; -} - -bool OptionDescription::isCommaSeparated() const { - return Flags & OptionDescriptionFlags::CommaSeparated; -} -void OptionDescription::setCommaSeparated() { - Flags |= OptionDescriptionFlags::CommaSeparated; -} - -bool OptionDescription::isForwardNotSplit() const { - return Flags & OptionDescriptionFlags::ForwardNotSplit; -} -void OptionDescription::setForwardNotSplit() { - Flags |= OptionDescriptionFlags::ForwardNotSplit; -} - -bool OptionDescription::isRequired() const { - return Flags & OptionDescriptionFlags::Required; -} -void OptionDescription::setRequired() { - Flags |= OptionDescriptionFlags::Required; -} - -bool OptionDescription::isOneOrMore() const { - return Flags & OptionDescriptionFlags::OneOrMore; -} -void OptionDescription::setOneOrMore() { - Flags |= OptionDescriptionFlags::OneOrMore; -} - -bool OptionDescription::isZeroOrMore() const { - return Flags & OptionDescriptionFlags::ZeroOrMore; -} -void OptionDescription::setZeroOrMore() { - Flags |= OptionDescriptionFlags::ZeroOrMore; -} - -bool OptionDescription::isOptional() const { - return Flags & OptionDescriptionFlags::Optional; -} -void OptionDescription::setOptional() { - Flags |= OptionDescriptionFlags::Optional; -} - -bool OptionDescription::isHidden() const { - return Flags & OptionDescriptionFlags::Hidden; -} -void OptionDescription::setHidden() { - Flags |= OptionDescriptionFlags::Hidden; -} - -bool OptionDescription::isReallyHidden() const { - return Flags & OptionDescriptionFlags::ReallyHidden; -} -void OptionDescription::setReallyHidden() { - Flags |= OptionDescriptionFlags::ReallyHidden; -} - -const char* OptionDescription::GenTypeDeclaration() const { - switch (Type) { - case OptionType::Alias: - return "cl::alias"; - case OptionType::PrefixList: - case OptionType::ParameterList: - return "cl::list"; - case OptionType::Switch: - return "cl::opt"; - case OptionType::SwitchList: - return "cl::list"; - case OptionType::Parameter: - case OptionType::Prefix: - default: - return "cl::opt"; - } -} - -std::string OptionDescription::GenOptionType() const { - switch (Type) { - case OptionType::Alias: - return "Alias_"; - case OptionType::PrefixList: - case OptionType::ParameterList: - return "List_"; - case OptionType::Switch: - return "Switch_"; - case OptionType::SwitchList: - return "SwitchList_"; - case OptionType::Prefix: - case OptionType::Parameter: - default: - return "Parameter_"; - } -} - -/// OptionDescriptions - An OptionDescription array plus some helper -/// functions. -class OptionDescriptions { - typedef StringMap container_type; - - /// Descriptions - A list of OptionDescriptions. - container_type Descriptions; - -public: - /// FindOption - exception-throwing wrapper for find(). - const OptionDescription& FindOption(const std::string& OptName) const; - - // Wrappers for FindOption that throw an exception in case the option has a - // wrong type. - const OptionDescription& FindSwitch(const std::string& OptName) const; - const OptionDescription& FindParameter(const std::string& OptName) const; - const OptionDescription& FindParameterList(const std::string& OptName) const; - const OptionDescription& - FindListOrParameter(const std::string& OptName) const; - const OptionDescription& - FindParameterListOrParameter(const std::string& OptName) const; - - /// insertDescription - Insert new OptionDescription into - /// OptionDescriptions list - void InsertDescription (const OptionDescription& o); - - // Support for STL-style iteration - typedef container_type::const_iterator const_iterator; - const_iterator begin() const { return Descriptions.begin(); } - const_iterator end() const { return Descriptions.end(); } -}; - -const OptionDescription& -OptionDescriptions::FindOption(const std::string& OptName) const { - const_iterator I = Descriptions.find(OptName); - if (I != Descriptions.end()) - return I->second; - else - throw OptName + ": no such option!"; -} - -const OptionDescription& -OptionDescriptions::FindSwitch(const std::string& OptName) const { - const OptionDescription& OptDesc = this->FindOption(OptName); - if (!OptDesc.isSwitch()) - throw OptName + ": incorrect option type - should be a switch!"; - return OptDesc; -} - -const OptionDescription& -OptionDescriptions::FindParameterList(const std::string& OptName) const { - const OptionDescription& OptDesc = this->FindOption(OptName); - if (!OptDesc.isList() || OptDesc.isSwitchList()) - throw OptName + ": incorrect option type - should be a parameter list!"; - return OptDesc; -} - -const OptionDescription& -OptionDescriptions::FindParameter(const std::string& OptName) const { - const OptionDescription& OptDesc = this->FindOption(OptName); - if (!OptDesc.isParameter()) - throw OptName + ": incorrect option type - should be a parameter!"; - return OptDesc; -} - -const OptionDescription& -OptionDescriptions::FindListOrParameter(const std::string& OptName) const { - const OptionDescription& OptDesc = this->FindOption(OptName); - if (!OptDesc.isList() && !OptDesc.isParameter()) - throw OptName - + ": incorrect option type - should be a list or parameter!"; - return OptDesc; -} - -const OptionDescription& -OptionDescriptions::FindParameterListOrParameter -(const std::string& OptName) const { - const OptionDescription& OptDesc = this->FindOption(OptName); - if ((!OptDesc.isList() && !OptDesc.isParameter()) || OptDesc.isSwitchList()) - throw OptName - + ": incorrect option type - should be a parameter list or parameter!"; - return OptDesc; -} - -void OptionDescriptions::InsertDescription (const OptionDescription& o) { - container_type::iterator I = Descriptions.find(o.Name); - if (I != Descriptions.end()) { - OptionDescription& D = I->second; - D.Merge(o); - } - else { - Descriptions[o.Name] = o; - } -} - -/// HandlerTable - A base class for function objects implemented as -/// 'tables of handlers'. -template -class HandlerTable { -protected: - // Implementation details. - - /// HandlerMap - A map from property names to property handlers - typedef StringMap HandlerMap; - - static HandlerMap Handlers_; - static bool staticMembersInitialized_; - -public: - - Handler GetHandler (const std::string& HandlerName) const { - typename HandlerMap::iterator method = Handlers_.find(HandlerName); - - if (method != Handlers_.end()) { - Handler h = method->second; - return h; - } - else { - throw "No handler found for property " + HandlerName + "!"; - } - } - - void AddHandler(const char* Property, Handler H) { - Handlers_[Property] = H; - } - -}; - -template -Handler GetHandler(FunctionObject* Obj, const DagInit& Dag) { - const std::string& HandlerName = GetOperatorName(Dag); - return Obj->GetHandler(HandlerName); -} - -template -void InvokeDagInitHandler(FunctionObject* Obj, Init* I) { - typedef void (FunctionObject::*Handler) (const DagInit&); - - const DagInit& Dag = InitPtrToDag(I); - Handler h = GetHandler(Obj, Dag); - - ((Obj)->*(h))(Dag); -} - -template -void InvokeDagInitHandler(const FunctionObject* const Obj, - const Init* I, unsigned IndentLevel, raw_ostream& O) -{ - typedef void (FunctionObject::*Handler) - (const DagInit&, unsigned IndentLevel, raw_ostream& O) const; - - const DagInit& Dag = InitPtrToDag(I); - Handler h = GetHandler(Obj, Dag); - - ((Obj)->*(h))(Dag, IndentLevel, O); -} - -template -typename HandlerTable::HandlerMap HandlerTable::Handlers_; - -template -bool HandlerTable::staticMembersInitialized_ = false; - - -/// CollectOptionProperties - Function object for iterating over an -/// option property list. -class CollectOptionProperties; -typedef void (CollectOptionProperties::* CollectOptionPropertiesHandler) -(const DagInit&); - -class CollectOptionProperties -: public HandlerTable -{ -private: - - /// optDescs_ - OptionDescriptions table. This is where the - /// information is stored. - OptionDescription& optDesc_; - -public: - - explicit CollectOptionProperties(OptionDescription& OD) - : optDesc_(OD) - { - if (!staticMembersInitialized_) { - AddHandler("help", &CollectOptionProperties::onHelp); - AddHandler("hidden", &CollectOptionProperties::onHidden); - AddHandler("init", &CollectOptionProperties::onInit); - AddHandler("multi_val", &CollectOptionProperties::onMultiVal); - AddHandler("one_or_more", &CollectOptionProperties::onOneOrMore); - AddHandler("zero_or_more", &CollectOptionProperties::onZeroOrMore); - AddHandler("really_hidden", &CollectOptionProperties::onReallyHidden); - AddHandler("required", &CollectOptionProperties::onRequired); - AddHandler("optional", &CollectOptionProperties::onOptional); - AddHandler("comma_separated", &CollectOptionProperties::onCommaSeparated); - AddHandler("forward_not_split", - &CollectOptionProperties::onForwardNotSplit); - - staticMembersInitialized_ = true; - } - } - - /// operator() - Just forwards to the corresponding property - /// handler. - void operator() (Init* I) { - InvokeDagInitHandler(this, I); - } - -private: - - /// Option property handlers -- - /// Methods that handle option properties such as (help) or (hidden). - - void onHelp (const DagInit& d) { - CheckNumberOfArguments(d, 1); - optDesc_.Help = EscapeQuotes(InitPtrToString(d.getArg(0))); - } - - void onHidden (const DagInit& d) { - CheckNumberOfArguments(d, 0); - optDesc_.setHidden(); - } - - void onReallyHidden (const DagInit& d) { - CheckNumberOfArguments(d, 0); - optDesc_.setReallyHidden(); - } - - void onCommaSeparated (const DagInit& d) { - CheckNumberOfArguments(d, 0); - if (!optDesc_.isParameterList()) - throw "'comma_separated' is valid only on parameter list options!"; - optDesc_.setCommaSeparated(); - } - - void onForwardNotSplit (const DagInit& d) { - CheckNumberOfArguments(d, 0); - if (!optDesc_.isParameter()) - throw "'forward_not_split' is valid only for parameter options!"; - optDesc_.setForwardNotSplit(); - } - - void onRequired (const DagInit& d) { - CheckNumberOfArguments(d, 0); - - optDesc_.setRequired(); - optDesc_.CheckConsistency(); - } - - void onInit (const DagInit& d) { - CheckNumberOfArguments(d, 1); - Init* i = d.getArg(0); - const std::string& str = i->getAsString(); - - bool correct = optDesc_.isParameter() && dynamic_cast(i); - correct |= (optDesc_.isSwitch() && (str == "true" || str == "false")); - - if (!correct) - throw "Incorrect usage of the 'init' option property!"; - - optDesc_.InitVal = i; - } - - void onOneOrMore (const DagInit& d) { - CheckNumberOfArguments(d, 0); - - optDesc_.setOneOrMore(); - optDesc_.CheckConsistency(); - } - - void onZeroOrMore (const DagInit& d) { - CheckNumberOfArguments(d, 0); - - if (optDesc_.isList()) - llvm::errs() << "Warning: specifying the 'zero_or_more' property " - "on a list option has no effect.\n"; - - optDesc_.setZeroOrMore(); - optDesc_.CheckConsistency(); - } - - void onOptional (const DagInit& d) { - CheckNumberOfArguments(d, 0); - - if (!optDesc_.isList()) - llvm::errs() << "Warning: specifying the 'optional' property" - "on a non-list option has no effect.\n"; - - optDesc_.setOptional(); - optDesc_.CheckConsistency(); - } - - void onMultiVal (const DagInit& d) { - CheckNumberOfArguments(d, 1); - int val = InitPtrToInt(d.getArg(0)); - if (val < 2) - throw "Error in the 'multi_val' property: " - "the value must be greater than 1!"; - if (!optDesc_.isParameterList()) - throw "The multi_val property is valid only on list options!"; - optDesc_.MultiVal = val; - } - -}; - -/// AddOption - A function object that is applied to every option -/// description. Used by CollectOptionDescriptions. -class AddOption { -private: - OptionDescriptions& OptDescs_; - -public: - explicit AddOption(OptionDescriptions& OD) : OptDescs_(OD) - {} - - void operator()(const Init* i) { - const DagInit& d = InitPtrToDag(i); - CheckNumberOfArguments(d, 1); - - const OptionType::OptionType Type = - stringToOptionType(GetOperatorName(d)); - const std::string& Name = InitPtrToString(d.getArg(0)); - - OptionDescription OD(Type, Name); - - CheckNumberOfArguments(d, 2); - - // Alias option store the aliased option name in the 'Help' field and do not - // have any properties. - if (OD.isAlias()) { - OD.Help = InitPtrToString(d.getArg(1)); - } - else { - processOptionProperties(d, OD); - } - - // Switch options are ZeroOrMore by default. - if (OD.isSwitch()) { - if (!(OD.isOptional() || OD.isOneOrMore() || OD.isRequired())) - OD.setZeroOrMore(); - } - - OptDescs_.InsertDescription(OD); - } - -private: - /// processOptionProperties - Go through the list of option - /// properties and call a corresponding handler for each. - static void processOptionProperties (const DagInit& d, OptionDescription& o) { - CheckNumberOfArguments(d, 2); - DagInit::const_arg_iterator B = d.arg_begin(); - // Skip the first argument: it's always the option name. - ++B; - std::for_each(B, d.arg_end(), CollectOptionProperties(o)); - } - -}; - -/// CollectOptionDescriptions - Collects option properties from all -/// OptionLists. -void CollectOptionDescriptions (const RecordVector& V, - OptionDescriptions& OptDescs) -{ - // For every OptionList: - for (RecordVector::const_iterator B = V.begin(), E = V.end(); B!=E; ++B) - { - // Throws an exception if the value does not exist. - ListInit* PropList = (*B)->getValueAsListInit("options"); - - // For every option description in this list: invoke AddOption. - std::for_each(PropList->begin(), PropList->end(), AddOption(OptDescs)); - } -} - -// Tool information record - -namespace ToolFlags { - enum ToolFlags { Join = 0x1, Sink = 0x2 }; -} - -struct ToolDescription : public RefCountedBase { - std::string Name; - Init* CmdLine; - Init* Actions; - StrVector InLanguage; - std::string InFileOption; - std::string OutFileOption; - StrVector OutLanguage; - std::string OutputSuffix; - unsigned Flags; - const Init* OnEmpty; - - // Various boolean properties - void setSink() { Flags |= ToolFlags::Sink; } - bool isSink() const { return Flags & ToolFlags::Sink; } - void setJoin() { Flags |= ToolFlags::Join; } - bool isJoin() const { return Flags & ToolFlags::Join; } - - // Default ctor here is needed because StringMap can only store - // DefaultConstructible objects - ToolDescription (const std::string &n = "") - : Name(n), CmdLine(0), Actions(0), OutFileOption("-o"), - Flags(0), OnEmpty(0) - {} -}; - -/// ToolDescriptions - A list of Tool information records. -typedef std::vector > ToolDescriptions; - - -/// CollectToolProperties - Function object for iterating over a list of -/// tool property records. - -class CollectToolProperties; -typedef void (CollectToolProperties::* CollectToolPropertiesHandler) -(const DagInit&); - -class CollectToolProperties : public HandlerTable -{ -private: - - /// toolDesc_ - Properties of the current Tool. This is where the - /// information is stored. - ToolDescription& toolDesc_; - -public: - - explicit CollectToolProperties (ToolDescription& d) - : toolDesc_(d) - { - if (!staticMembersInitialized_) { - - AddHandler("actions", &CollectToolProperties::onActions); - AddHandler("command", &CollectToolProperties::onCommand); - AddHandler("in_language", &CollectToolProperties::onInLanguage); - AddHandler("join", &CollectToolProperties::onJoin); - AddHandler("out_language", &CollectToolProperties::onOutLanguage); - - AddHandler("out_file_option", &CollectToolProperties::onOutFileOption); - AddHandler("in_file_option", &CollectToolProperties::onInFileOption); - - AddHandler("output_suffix", &CollectToolProperties::onOutputSuffix); - AddHandler("sink", &CollectToolProperties::onSink); - AddHandler("works_on_empty", &CollectToolProperties::onWorksOnEmpty); - - staticMembersInitialized_ = true; - } - } - - void operator() (Init* I) { - InvokeDagInitHandler(this, I); - } - -private: - - /// Property handlers -- - /// Functions that extract information about tool properties from - /// DAG representation. - - void onActions (const DagInit& d) { - CheckNumberOfArguments(d, 1); - Init* Case = d.getArg(0); - if (typeid(*Case) != typeid(DagInit) || - GetOperatorName(static_cast(*Case)) != "case") - throw "The argument to (actions) should be a 'case' construct!"; - toolDesc_.Actions = Case; - } - - void onCommand (const DagInit& d) { - CheckNumberOfArguments(d, 1); - toolDesc_.CmdLine = d.getArg(0); - } - - /// onInOutLanguage - Common implementation of on{In,Out}Language(). - void onInOutLanguage (const DagInit& d, StrVector& OutVec) { - CheckNumberOfArguments(d, 1); - - // Copy strings to the output vector. - for (unsigned i = 0, NumArgs = d.getNumArgs(); i < NumArgs; ++i) { - OutVec.push_back(InitPtrToString(d.getArg(i))); - } - - // Remove duplicates. - std::sort(OutVec.begin(), OutVec.end()); - StrVector::iterator newE = std::unique(OutVec.begin(), OutVec.end()); - OutVec.erase(newE, OutVec.end()); - } - - - void onInLanguage (const DagInit& d) { - this->onInOutLanguage(d, toolDesc_.InLanguage); - } - - void onJoin (const DagInit& d) { - bool isReallyJoin = false; - - if (d.getNumArgs() == 0) { - isReallyJoin = true; - } - else { - Init* I = d.getArg(0); - isReallyJoin = InitPtrToBool(I); - } - - // Is this *really* a join tool? We allow (join false) for generating two - // tool descriptions from a single generic one. - // TOFIX: come up with a cleaner solution. - if (isReallyJoin) { - toolDesc_.setJoin(); - } - } - - void onOutLanguage (const DagInit& d) { - this->onInOutLanguage(d, toolDesc_.OutLanguage); - } - - void onOutFileOption (const DagInit& d) { - CheckNumberOfArguments(d, 1); - toolDesc_.OutFileOption = InitPtrToString(d.getArg(0)); - } - - void onInFileOption (const DagInit& d) { - CheckNumberOfArguments(d, 1); - toolDesc_.InFileOption = InitPtrToString(d.getArg(0)); - } - - void onOutputSuffix (const DagInit& d) { - CheckNumberOfArguments(d, 1); - toolDesc_.OutputSuffix = InitPtrToString(d.getArg(0)); - } - - void onSink (const DagInit& d) { - CheckNumberOfArguments(d, 0); - toolDesc_.setSink(); - } - - void onWorksOnEmpty (const DagInit& d) { - toolDesc_.OnEmpty = d.getArg(0); - } - -}; - -/// CollectToolDescriptions - Gather information about tool properties -/// from the parsed TableGen data (basically a wrapper for the -/// CollectToolProperties function object). -void CollectToolDescriptions (const RecordVector& Tools, - ToolDescriptions& ToolDescs) -{ - // Iterate over a properties list of every Tool definition - for (RecordVector::const_iterator B = Tools.begin(), - E = Tools.end(); B!=E; ++B) { - const Record* T = *B; - // Throws an exception if the value does not exist. - ListInit* PropList = T->getValueAsListInit("properties"); - - IntrusiveRefCntPtr - ToolDesc(new ToolDescription(T->getName())); - - std::for_each(PropList->begin(), PropList->end(), - CollectToolProperties(*ToolDesc)); - ToolDescs.push_back(ToolDesc); - } -} - -/// FillInEdgeVector - Merge all compilation graph definitions into -/// one single edge list. -void FillInEdgeVector(const RecordVector& CompilationGraphs, - DagVector& Out) { - for (RecordVector::const_iterator B = CompilationGraphs.begin(), - E = CompilationGraphs.end(); B != E; ++B) { - const ListInit* Edges = (*B)->getValueAsListInit("edges"); - - for (ListInit::const_iterator B = Edges->begin(), - E = Edges->end(); B != E; ++B) { - Out.push_back(&InitPtrToDag(*B)); - } - } -} - -/// NotInGraph - Helper function object for FilterNotInGraph. -struct NotInGraph { -private: - const llvm::StringSet<>& ToolsInGraph_; - -public: - NotInGraph(const llvm::StringSet<>& ToolsInGraph) - : ToolsInGraph_(ToolsInGraph) - {} - - bool operator()(const IntrusiveRefCntPtr& x) { - return (ToolsInGraph_.count(x->Name) == 0); - } -}; - -/// FilterNotInGraph - Filter out from ToolDescs all Tools not -/// mentioned in the compilation graph definition. -void FilterNotInGraph (const DagVector& EdgeVector, - ToolDescriptions& ToolDescs) { - - // List all tools mentioned in the graph. - llvm::StringSet<> ToolsInGraph; - - for (DagVector::const_iterator B = EdgeVector.begin(), - E = EdgeVector.end(); B != E; ++B) { - - const DagInit* Edge = *B; - const std::string& NodeA = InitPtrToString(Edge->getArg(0)); - const std::string& NodeB = InitPtrToString(Edge->getArg(1)); - - if (NodeA != "root") - ToolsInGraph.insert(NodeA); - ToolsInGraph.insert(NodeB); - } - - // Filter ToolPropertiesList. - ToolDescriptions::iterator new_end = - std::remove_if(ToolDescs.begin(), ToolDescs.end(), - NotInGraph(ToolsInGraph)); - ToolDescs.erase(new_end, ToolDescs.end()); -} - -/// FillInToolToLang - Fills in two tables that map tool names to -/// input & output language names. Helper function used by TypecheckGraph(). -void FillInToolToLang (const ToolDescriptions& ToolDescs, - StringMap >& ToolToInLang, - StringMap >& ToolToOutLang) { - for (ToolDescriptions::const_iterator B = ToolDescs.begin(), - E = ToolDescs.end(); B != E; ++B) { - const ToolDescription& D = *(*B); - for (StrVector::const_iterator B = D.InLanguage.begin(), - E = D.InLanguage.end(); B != E; ++B) - ToolToInLang[D.Name].insert(*B); - for (StrVector::const_iterator B = D.OutLanguage.begin(), - E = D.OutLanguage.end(); B != E; ++B) - ToolToOutLang[D.Name].insert(*B); - } -} - -/// Intersect - Is set intersection non-empty? -bool Intersect (const StringSet<>& S1, const StringSet<>& S2) { - for (StringSet<>::const_iterator B = S1.begin(), E = S1.end(); B != E; ++B) { - if (S2.count(B->first()) != 0) - return true; - } - return false; -} - -/// TypecheckGraph - Check that names for output and input languages -/// on all edges do match. -void TypecheckGraph (const DagVector& EdgeVector, - const ToolDescriptions& ToolDescs) { - StringMap > ToolToInLang; - StringMap > ToolToOutLang; - - FillInToolToLang(ToolDescs, ToolToInLang, ToolToOutLang); - - for (DagVector::const_iterator B = EdgeVector.begin(), - E = EdgeVector.end(); B != E; ++B) { - const DagInit* Edge = *B; - const std::string& NodeA = InitPtrToString(Edge->getArg(0)); - const std::string& NodeB = InitPtrToString(Edge->getArg(1)); - StringMap >::iterator IA = ToolToOutLang.find(NodeA); - StringMap >::iterator IB = ToolToInLang.find(NodeB); - - if (NodeB == "root") - throw "Edges back to the root are not allowed!"; - - if (NodeA != "root") { - if (IA == ToolToOutLang.end()) - throw NodeA + ": no output language defined!"; - if (IB == ToolToInLang.end()) - throw NodeB + ": no input language defined!"; - - if (!Intersect(IA->second, IB->second)) { - throw "Edge " + NodeA + "->" + NodeB - + ": output->input language mismatch"; - } - } - } -} - -/// WalkCase - Walks the 'case' expression DAG and invokes -/// TestCallback on every test, and StatementCallback on every -/// statement. Handles 'case' nesting, but not the 'and' and 'or' -/// combinators (that is, they are passed directly to TestCallback). -/// TestCallback must have type 'void TestCallback(const DagInit*, unsigned -/// IndentLevel, bool FirstTest)'. -/// StatementCallback must have type 'void StatementCallback(const Init*, -/// unsigned IndentLevel)'. -template -void WalkCase(const Init* Case, F1 TestCallback, F2 StatementCallback, - unsigned IndentLevel = 0) -{ - const DagInit& d = InitPtrToDag(Case); - - // Error checks. - if (GetOperatorName(d) != "case") - throw "WalkCase should be invoked only on 'case' expressions!"; - - if (d.getNumArgs() < 2) - throw "There should be at least one clause in the 'case' expression:\n" - + d.getAsString(); - - // Main loop. - bool even = false; - const unsigned numArgs = d.getNumArgs(); - unsigned i = 1; - for (DagInit::const_arg_iterator B = d.arg_begin(), E = d.arg_end(); - B != E; ++B) { - Init* arg = *B; - - if (!even) - { - // Handle test. - const DagInit& Test = InitPtrToDag(arg); - - if (GetOperatorName(Test) == "default" && (i+1 != numArgs)) - throw "The 'default' clause should be the last in the " - "'case' construct!"; - if (i == numArgs) - throw "Case construct handler: no corresponding action " - "found for the test " + Test.getAsString() + '!'; - - TestCallback(Test, IndentLevel, (i == 1)); - } - else - { - if (dynamic_cast(arg) - && GetOperatorName(static_cast(*arg)) == "case") { - // Nested 'case'. - WalkCase(arg, TestCallback, StatementCallback, IndentLevel + Indent1); - } - - // Handle statement. - StatementCallback(arg, IndentLevel); - } - - ++i; - even = !even; - } -} - -/// ExtractOptionNames - A helper function object used by -/// CheckForSuperfluousOptions() to walk the 'case' DAG. -class ExtractOptionNames { - llvm::StringSet<>& OptionNames_; - - void processDag(const Init* Statement) { - const DagInit& Stmt = InitPtrToDag(Statement); - const std::string& ActionName = GetOperatorName(Stmt); - if (ActionName == "forward" || ActionName == "forward_as" || - ActionName == "forward_value" || - ActionName == "forward_transformed_value" || - ActionName == "parameter_equals" || ActionName == "element_in_list") { - CheckNumberOfArguments(Stmt, 1); - - Init* Arg = Stmt.getArg(0); - if (typeid(*Arg) == typeid(StringInit)) - OptionNames_.insert(InitPtrToString(Arg)); - } - else if (ActionName == "any_switch_on" || ActionName == "switch_on" || - ActionName == "any_not_empty" || ActionName == "any_empty" || - ActionName == "not_empty" || ActionName == "empty") { - for (unsigned i = 0, NumArgs = Stmt.getNumArgs(); i < NumArgs; ++i) { - Init* Arg = Stmt.getArg(i); - if (typeid(*Arg) == typeid(StringInit)) - OptionNames_.insert(InitPtrToString(Arg)); - } - } - else if (ActionName == "and" || ActionName == "or" || ActionName == "not") { - for (unsigned i = 0, NumArgs = Stmt.getNumArgs(); i < NumArgs; ++i) { - this->processDag(Stmt.getArg(i)); - } - } - } - -public: - ExtractOptionNames(llvm::StringSet<>& OptionNames) : OptionNames_(OptionNames) - {} - - void operator()(const Init* Statement) { - // Statement is either a dag, or a list of dags. - if (typeid(*Statement) == typeid(ListInit)) { - const ListInit& DagList = *static_cast(Statement); - for (ListInit::const_iterator B = DagList.begin(), E = DagList.end(); - B != E; ++B) - this->processDag(*B); - } - else { - this->processDag(Statement); - } - } - - void operator()(const DagInit& Test, unsigned, bool) { - this->operator()(&Test); - } - void operator()(const Init* Statement, unsigned) { - this->operator()(Statement); - } -}; - -/// IsOptionalEdge - Validate that the 'optional_edge' has proper structure. -bool IsOptionalEdge (const DagInit& Edg) { - return (GetOperatorName(Edg) == "optional_edge") && (Edg.getNumArgs() > 2); -} - -/// CheckForSuperfluousOptions - Check that there are no side -/// effect-free options (specified only in the OptionList). Otherwise, -/// output a warning. -void CheckForSuperfluousOptions (const DagVector& EdgeVector, - const ToolDescriptions& ToolDescs, - const OptionDescriptions& OptDescs) { - llvm::StringSet<> nonSuperfluousOptions; - - // Add all options mentioned in the ToolDesc.Actions to the set of - // non-superfluous options. - for (ToolDescriptions::const_iterator B = ToolDescs.begin(), - E = ToolDescs.end(); B != E; ++B) { - const ToolDescription& TD = *(*B); - ExtractOptionNames Callback(nonSuperfluousOptions); - if (TD.Actions) - WalkCase(TD.Actions, Callback, Callback); - } - - // Add all options mentioned in the 'case' clauses of the - // OptionalEdges of the compilation graph to the set of - // non-superfluous options. - for (DagVector::const_iterator B = EdgeVector.begin(), - E = EdgeVector.end(); B != E; ++B) { - const DagInit& Edge = **B; - if (IsOptionalEdge(Edge)) { - const DagInit& Weight = InitPtrToDag(Edge.getArg(2)); - WalkCase(&Weight, ExtractOptionNames(nonSuperfluousOptions), Id()); - } - } - - // Check that all options in OptDescs belong to the set of - // non-superfluous options. - for (OptionDescriptions::const_iterator B = OptDescs.begin(), - E = OptDescs.end(); B != E; ++B) { - const OptionDescription& Val = B->second; - if (!nonSuperfluousOptions.count(Val.Name) - && Val.Type != OptionType::Alias) - llvm::errs() << "Warning: option '-" << Val.Name << "' has no effect! " - "Probable cause: this option is specified only in the OptionList.\n"; - } -} - -/// EmitCaseTest0Args - Helper function used by EmitCaseConstructHandler(). -bool EmitCaseTest0Args(const std::string& TestName, raw_ostream& O) { - if (TestName == "single_input_file") { - O << "InputFilenames.size() == 1"; - return true; - } - else if (TestName == "multiple_input_files") { - O << "InputFilenames.size() > 1"; - return true; - } - - return false; -} - -/// EmitMultipleArgumentTest - Helper function used by -/// EmitCaseTestMultipleArgs() -template -void EmitMultipleArgumentTest(const DagInit& D, const char* LogicOp, - F Callback, raw_ostream& O) -{ - for (unsigned i = 0, NumArgs = D.getNumArgs(); i < NumArgs; ++i) { - if (i != 0) - O << ' ' << LogicOp << ' '; - Callback(InitPtrToString(D.getArg(i)), O); - } -} - -// Callbacks for use with EmitMultipleArgumentTest - -class EmitSwitchOn { - const OptionDescriptions& OptDescs_; -public: - EmitSwitchOn(const OptionDescriptions& OptDescs) : OptDescs_(OptDescs) - {} - - void operator()(const std::string& OptName, raw_ostream& O) const { - const OptionDescription& OptDesc = OptDescs_.FindSwitch(OptName); - O << OptDesc.GenVariableName(); - } -}; - -class EmitEmptyTest { - bool EmitNegate_; - const OptionDescriptions& OptDescs_; -public: - EmitEmptyTest(bool EmitNegate, const OptionDescriptions& OptDescs) - : EmitNegate_(EmitNegate), OptDescs_(OptDescs) - {} - - void operator()(const std::string& OptName, raw_ostream& O) const { - const char* Neg = (EmitNegate_ ? "!" : ""); - if (OptName == "o") { - O << Neg << "OutputFilename.empty()"; - } - else if (OptName == "save-temps") { - O << Neg << "(SaveTemps == SaveTempsEnum::Unset)"; - } - else { - const OptionDescription& OptDesc = OptDescs_.FindListOrParameter(OptName); - O << Neg << OptDesc.GenVariableName() << ".empty()"; - } - } -}; - - -/// EmitCaseTestMultipleArgs - Helper function used by EmitCaseTest1Arg() -bool EmitCaseTestMultipleArgs (const std::string& TestName, - const DagInit& d, - const OptionDescriptions& OptDescs, - raw_ostream& O) { - if (TestName == "any_switch_on") { - EmitMultipleArgumentTest(d, "||", EmitSwitchOn(OptDescs), O); - return true; - } - else if (TestName == "switch_on") { - EmitMultipleArgumentTest(d, "&&", EmitSwitchOn(OptDescs), O); - return true; - } - else if (TestName == "any_not_empty") { - EmitMultipleArgumentTest(d, "||", EmitEmptyTest(true, OptDescs), O); - return true; - } - else if (TestName == "any_empty") { - EmitMultipleArgumentTest(d, "||", EmitEmptyTest(false, OptDescs), O); - return true; - } - else if (TestName == "not_empty") { - EmitMultipleArgumentTest(d, "&&", EmitEmptyTest(true, OptDescs), O); - return true; - } - else if (TestName == "empty") { - EmitMultipleArgumentTest(d, "&&", EmitEmptyTest(false, OptDescs), O); - return true; - } - - return false; -} - -/// EmitCaseTest1Arg - Helper function used by EmitCaseTest1OrMoreArgs() -bool EmitCaseTest1Arg (const std::string& TestName, - const DagInit& d, - const OptionDescriptions& OptDescs, - raw_ostream& O) { - const std::string& Arg = InitPtrToString(d.getArg(0)); - - if (TestName == "input_languages_contain") { - O << "InLangs.count(\"" << Arg << "\") != 0"; - return true; - } - else if (TestName == "in_language") { - // This works only for single-argument Tool::GenerateAction. Join - // tools can process several files in different languages simultaneously. - - // TODO: make this work with Edge::Weight (if possible). - O << "LangMap.GetLanguage(inFile) == \"" << Arg << '\"'; - return true; - } - - return false; -} - -/// EmitCaseTest1OrMoreArgs - Helper function used by -/// EmitCaseConstructHandler() -bool EmitCaseTest1OrMoreArgs(const std::string& TestName, - const DagInit& d, - const OptionDescriptions& OptDescs, - raw_ostream& O) { - CheckNumberOfArguments(d, 1); - return EmitCaseTest1Arg(TestName, d, OptDescs, O) || - EmitCaseTestMultipleArgs(TestName, d, OptDescs, O); -} - -/// EmitCaseTest2Args - Helper function used by EmitCaseConstructHandler(). -bool EmitCaseTest2Args(const std::string& TestName, - const DagInit& d, - unsigned IndentLevel, - const OptionDescriptions& OptDescs, - raw_ostream& O) { - CheckNumberOfArguments(d, 2); - const std::string& OptName = InitPtrToString(d.getArg(0)); - const std::string& OptArg = InitPtrToString(d.getArg(1)); - - if (TestName == "parameter_equals") { - const OptionDescription& OptDesc = OptDescs.FindParameter(OptName); - O << OptDesc.GenVariableName() << " == \"" << OptArg << "\""; - return true; - } - else if (TestName == "element_in_list") { - const OptionDescription& OptDesc = OptDescs.FindParameterList(OptName); - const std::string& VarName = OptDesc.GenVariableName(); - O << "std::find(" << VarName << ".begin(),\n"; - O.indent(IndentLevel + Indent1) - << VarName << ".end(), \"" - << OptArg << "\") != " << VarName << ".end()"; - return true; - } - - return false; -} - -// Forward declaration. -// EmitLogicalOperationTest and EmitCaseTest are mutually recursive. -void EmitCaseTest(const DagInit& d, unsigned IndentLevel, - const OptionDescriptions& OptDescs, - raw_ostream& O); - -/// EmitLogicalOperationTest - Helper function used by -/// EmitCaseConstructHandler. -void EmitLogicalOperationTest(const DagInit& d, const char* LogicOp, - unsigned IndentLevel, - const OptionDescriptions& OptDescs, - raw_ostream& O) { - O << '('; - for (unsigned i = 0, NumArgs = d.getNumArgs(); i < NumArgs; ++i) { - const DagInit& InnerTest = InitPtrToDag(d.getArg(i)); - EmitCaseTest(InnerTest, IndentLevel, OptDescs, O); - if (i != NumArgs - 1) { - O << ")\n"; - O.indent(IndentLevel + Indent1) << ' ' << LogicOp << " ("; - } - else { - O << ')'; - } - } -} - -void EmitLogicalNot(const DagInit& d, unsigned IndentLevel, - const OptionDescriptions& OptDescs, raw_ostream& O) -{ - CheckNumberOfArguments(d, 1); - const DagInit& InnerTest = InitPtrToDag(d.getArg(0)); - O << "! ("; - EmitCaseTest(InnerTest, IndentLevel, OptDescs, O); - O << ")"; -} - -/// EmitCaseTest - Helper function used by EmitCaseConstructHandler. -void EmitCaseTest(const DagInit& d, unsigned IndentLevel, - const OptionDescriptions& OptDescs, - raw_ostream& O) { - const std::string& TestName = GetOperatorName(d); - - if (TestName == "and") - EmitLogicalOperationTest(d, "&&", IndentLevel, OptDescs, O); - else if (TestName == "or") - EmitLogicalOperationTest(d, "||", IndentLevel, OptDescs, O); - else if (TestName == "not") - EmitLogicalNot(d, IndentLevel, OptDescs, O); - else if (EmitCaseTest0Args(TestName, O)) - return; - else if (EmitCaseTest1OrMoreArgs(TestName, d, OptDescs, O)) - return; - else if (EmitCaseTest2Args(TestName, d, IndentLevel, OptDescs, O)) - return; - else - throw "Unknown test '" + TestName + "' used in the 'case' construct!"; -} - - -/// EmitCaseTestCallback - Callback used by EmitCaseConstructHandler. -class EmitCaseTestCallback { - bool EmitElseIf_; - const OptionDescriptions& OptDescs_; - raw_ostream& O_; -public: - - EmitCaseTestCallback(bool EmitElseIf, - const OptionDescriptions& OptDescs, raw_ostream& O) - : EmitElseIf_(EmitElseIf), OptDescs_(OptDescs), O_(O) - {} - - void operator()(const DagInit& Test, unsigned IndentLevel, bool FirstTest) - { - if (GetOperatorName(Test) == "default") { - O_.indent(IndentLevel) << "else {\n"; - } - else { - O_.indent(IndentLevel) - << ((!FirstTest && EmitElseIf_) ? "else if (" : "if ("); - EmitCaseTest(Test, IndentLevel, OptDescs_, O_); - O_ << ") {\n"; - } - } -}; - -/// EmitCaseStatementCallback - Callback used by EmitCaseConstructHandler. -template -class EmitCaseStatementCallback { - F Callback_; - raw_ostream& O_; -public: - - EmitCaseStatementCallback(F Callback, raw_ostream& O) - : Callback_(Callback), O_(O) - {} - - void operator() (const Init* Statement, unsigned IndentLevel) { - // Is this a nested 'case'? - bool IsCase = dynamic_cast(Statement) && - GetOperatorName(static_cast(*Statement)) == "case"; - - // If so, ignore it, it is handled by our caller, WalkCase. - if (!IsCase) { - if (typeid(*Statement) == typeid(ListInit)) { - const ListInit& DagList = *static_cast(Statement); - for (ListInit::const_iterator B = DagList.begin(), E = DagList.end(); - B != E; ++B) - Callback_(*B, (IndentLevel + Indent1), O_); - } - else { - Callback_(Statement, (IndentLevel + Indent1), O_); - } - } - O_.indent(IndentLevel) << "}\n"; - } - -}; - -/// EmitCaseConstructHandler - Emit code that handles the 'case' -/// construct. Takes a function object that should emit code for every case -/// clause. Implemented on top of WalkCase. -/// Callback's type is void F(const Init* Statement, unsigned IndentLevel, -/// raw_ostream& O). -/// EmitElseIf parameter controls the type of condition that is emitted ('if -/// (..) {..} else if (..) {} .. else {..}' vs. 'if (..) {..} if(..) {..} -/// .. else {..}'). -template -void EmitCaseConstructHandler(const Init* Case, unsigned IndentLevel, - F Callback, bool EmitElseIf, - const OptionDescriptions& OptDescs, - raw_ostream& O) { - WalkCase(Case, EmitCaseTestCallback(EmitElseIf, OptDescs, O), - EmitCaseStatementCallback(Callback, O), IndentLevel); -} - -/// TokenizeCmdLine - converts from -/// "$CALL(HookName, 'Arg1', 'Arg2')/path -arg1 -arg2" to -/// ["$CALL(", "HookName", "Arg1", "Arg2", ")/path", "-arg1", "-arg2"]. -void TokenizeCmdLine(const std::string& CmdLine, StrVector& Out) { - const char* Delimiters = " \t\n\v\f\r"; - enum TokenizerState - { Normal, SpecialCommand, InsideSpecialCommand, InsideQuotationMarks } - cur_st = Normal; - - if (CmdLine.empty()) - return; - Out.push_back(""); - - std::string::size_type B = CmdLine.find_first_not_of(Delimiters), - E = CmdLine.size(); - - for (; B != E; ++B) { - char cur_ch = CmdLine[B]; - - switch (cur_st) { - case Normal: - if (cur_ch == '$') { - cur_st = SpecialCommand; - break; - } - if (OneOf(Delimiters, cur_ch)) { - // Skip whitespace - B = CmdLine.find_first_not_of(Delimiters, B); - if (B == std::string::npos) { - B = E-1; - continue; - } - --B; - Out.push_back(""); - continue; - } - break; - - - case SpecialCommand: - if (OneOf(Delimiters, cur_ch)) { - cur_st = Normal; - Out.push_back(""); - continue; - } - if (cur_ch == '(') { - Out.push_back(""); - cur_st = InsideSpecialCommand; - continue; - } - break; - - case InsideSpecialCommand: - if (OneOf(Delimiters, cur_ch)) { - continue; - } - if (cur_ch == '\'') { - cur_st = InsideQuotationMarks; - Out.push_back(""); - continue; - } - if (cur_ch == ')') { - cur_st = Normal; - Out.push_back(""); - } - if (cur_ch == ',') { - continue; - } - - break; - - case InsideQuotationMarks: - if (cur_ch == '\'') { - cur_st = InsideSpecialCommand; - continue; - } - break; - } - - Out.back().push_back(cur_ch); - } -} - -/// SubstituteCall - Given "$CALL(HookName, [Arg1 [, Arg2 [...]]])", output -/// "hooks::HookName([Arg1 [, Arg2 [, ...]]])". Helper function used by -/// SubstituteSpecialCommands(). -StrVector::const_iterator -SubstituteCall (StrVector::const_iterator Pos, - StrVector::const_iterator End, - bool IsJoin, raw_ostream& O) -{ - const char* errorMessage = "Syntax error in $CALL invocation!"; - CheckedIncrement(Pos, End, errorMessage); - const std::string& CmdName = *Pos; - - if (CmdName == ")") - throw "$CALL invocation: empty argument list!"; - - O << "hooks::"; - O << CmdName << "("; - - - bool firstIteration = true; - while (true) { - CheckedIncrement(Pos, End, errorMessage); - const std::string& Arg = *Pos; - assert(Arg.size() != 0); - - if (Arg[0] == ')') - break; - - if (firstIteration) - firstIteration = false; - else - O << ", "; - - if (Arg == "$INFILE") { - if (IsJoin) - throw "$CALL(Hook, $INFILE) can't be used with a Join tool!"; - else - O << "inFile.c_str()"; - } - else { - O << '"' << Arg << '"'; - } - } - - O << ')'; - - return Pos; -} - -/// SubstituteEnv - Given '$ENV(VAR_NAME)', output 'getenv("VAR_NAME")'. Helper -/// function used by SubstituteSpecialCommands(). -StrVector::const_iterator -SubstituteEnv (StrVector::const_iterator Pos, - StrVector::const_iterator End, raw_ostream& O) -{ - const char* errorMessage = "Syntax error in $ENV invocation!"; - CheckedIncrement(Pos, End, errorMessage); - const std::string& EnvName = *Pos; - - if (EnvName == ")") - throw "$ENV invocation: empty argument list!"; - - O << "checkCString(std::getenv(\""; - O << EnvName; - O << "\"))"; - - CheckedIncrement(Pos, End, errorMessage); - - return Pos; -} - -/// SubstituteSpecialCommands - Given an invocation of $CALL or $ENV, output -/// handler code. Helper function used by EmitCmdLineVecFill(). -StrVector::const_iterator -SubstituteSpecialCommands (StrVector::const_iterator Pos, - StrVector::const_iterator End, - bool IsJoin, raw_ostream& O) -{ - - const std::string& cmd = *Pos; - - // Perform substitution. - if (cmd == "$CALL") { - Pos = SubstituteCall(Pos, End, IsJoin, O); - } - else if (cmd == "$ENV") { - Pos = SubstituteEnv(Pos, End, O); - } - else { - throw "Unknown special command: " + cmd; - } - - // Handle '$CMD(ARG)/additional/text'. - const std::string& Leftover = *Pos; - assert(Leftover.at(0) == ')'); - if (Leftover.size() != 1) - O << " + std::string(\"" << (Leftover.c_str() + 1) << "\")"; - - return Pos; -} - -/// EmitCmdLineVecFill - Emit code that fills in the command line -/// vector. Helper function used by EmitGenerateActionMethod(). -void EmitCmdLineVecFill(const Init* CmdLine, const std::string& ToolName, - bool IsJoin, unsigned IndentLevel, - raw_ostream& O) { - StrVector StrVec; - TokenizeCmdLine(InitPtrToString(CmdLine), StrVec); - - if (StrVec.empty()) - throw "Tool '" + ToolName + "' has empty command line!"; - - StrVector::const_iterator B = StrVec.begin(), E = StrVec.end(); - - // Emit the command itself. - assert(!StrVec[0].empty()); - O.indent(IndentLevel) << "cmd = "; - if (StrVec[0][0] == '$') { - B = SubstituteSpecialCommands(B, E, IsJoin, O); - ++B; - } - else { - O << '"' << StrVec[0] << '"'; - ++B; - } - O << ";\n"; - - // Go through the command arguments. - assert(B <= E); - for (; B != E; ++B) { - const std::string& cmd = *B; - - assert(!cmd.empty()); - O.indent(IndentLevel); - - if (cmd.at(0) == '$') { - O << "vec.push_back(std::make_pair(0, "; - B = SubstituteSpecialCommands(B, E, IsJoin, O); - O << "));\n"; - } - else { - O << "vec.push_back(std::make_pair(0, \"" << cmd << "\"));\n"; - } - } - -} - -/// EmitForEachListElementCycleHeader - Emit common code for iterating through -/// all elements of a list. Helper function used by -/// EmitForwardOptionPropertyHandlingCode. -void EmitForEachListElementCycleHeader (const OptionDescription& D, - unsigned IndentLevel, - raw_ostream& O) { - unsigned IndentLevel1 = IndentLevel + Indent1; - - O.indent(IndentLevel) - << "for (" << D.GenTypeDeclaration() - << "::iterator B = " << D.GenVariableName() << ".begin(),\n"; - O.indent(IndentLevel) - << "E = " << D.GenVariableName() << ".end(); B != E;) {\n"; - O.indent(IndentLevel1) << "unsigned pos = " << D.GenVariableName() - << ".getPosition(B - " << D.GenVariableName() - << ".begin());\n"; -} - -/// EmitForwardOptionPropertyHandlingCode - Helper function used to -/// implement EmitActionHandler. Emits code for -/// handling the (forward) and (forward_as) option properties. -void EmitForwardOptionPropertyHandlingCode (const OptionDescription& D, - unsigned IndentLevel, - const std::string& NewName, - raw_ostream& O) { - const std::string& Name = NewName.empty() - ? ("-" + D.Name) - : NewName; - unsigned IndentLevel1 = IndentLevel + Indent1; - - switch (D.Type) { - case OptionType::Switch: - O.indent(IndentLevel) - << "vec.push_back(std::make_pair(" << D.GenVariableName() - << ".getPosition(), \"" << Name << "\"));\n"; - break; - case OptionType::Parameter: - O.indent(IndentLevel) << "vec.push_back(std::make_pair(" - << D.GenVariableName() - <<".getPosition(), \"" << Name; - - if (!D.isForwardNotSplit()) { - O << "\"));\n"; - O.indent(IndentLevel) << "vec.push_back(std::make_pair(" - << D.GenVariableName() << ".getPosition(), " - << D.GenVariableName() << "));\n"; - } - else { - O << "=\" + " << D.GenVariableName() << "));\n"; - } - break; - case OptionType::Prefix: - O.indent(IndentLevel) << "vec.push_back(std::make_pair(" - << D.GenVariableName() << ".getPosition(), \"" - << Name << "\" + " - << D.GenVariableName() << "));\n"; - break; - case OptionType::PrefixList: - EmitForEachListElementCycleHeader(D, IndentLevel, O); - O.indent(IndentLevel1) << "vec.push_back(std::make_pair(pos, \"" - << Name << "\" + " << "*B));\n"; - O.indent(IndentLevel1) << "++B;\n"; - - for (int i = 1, j = D.MultiVal; i < j; ++i) { - O.indent(IndentLevel1) << "vec.push_back(std::make_pair(pos, *B));\n"; - O.indent(IndentLevel1) << "++B;\n"; - } - - O.indent(IndentLevel) << "}\n"; - break; - case OptionType::ParameterList: - EmitForEachListElementCycleHeader(D, IndentLevel, O); - O.indent(IndentLevel1) << "vec.push_back(std::make_pair(pos, \"" - << Name << "\"));\n"; - - for (int i = 0, j = D.MultiVal; i < j; ++i) { - O.indent(IndentLevel1) << "vec.push_back(std::make_pair(pos, *B));\n"; - O.indent(IndentLevel1) << "++B;\n"; - } - - O.indent(IndentLevel) << "}\n"; - break; - case OptionType::SwitchList: - EmitForEachListElementCycleHeader(D, IndentLevel, O); - O.indent(IndentLevel1) << "vec.push_back(std::make_pair(pos, \"" - << Name << "\"));\n"; - O.indent(IndentLevel1) << "++B;\n"; - O.indent(IndentLevel) << "}\n"; - break; - case OptionType::Alias: - default: - throw "Aliases are not allowed in tool option descriptions!"; - } -} - -/// ActionHandlingCallbackBase - Base class of EmitActionHandlersCallback and -/// EmitPreprocessOptionsCallback. -struct ActionHandlingCallbackBase -{ - - void onErrorDag(const DagInit& d, - unsigned IndentLevel, raw_ostream& O) const - { - O.indent(IndentLevel) - << "PrintError(\"" - << (d.getNumArgs() >= 1 ? InitPtrToString(d.getArg(0)) : "Unknown error!") - << "\");\n"; - O.indent(IndentLevel) << "return 1;\n"; - } - - void onWarningDag(const DagInit& d, - unsigned IndentLevel, raw_ostream& O) const - { - CheckNumberOfArguments(d, 1); - O.indent(IndentLevel) << "llvm::errs() << \"" - << InitPtrToString(d.getArg(0)) << "\";\n"; - } - -}; - -/// EmitActionHandlersCallback - Emit code that handles actions. Used by -/// EmitGenerateActionMethod() as an argument to EmitCaseConstructHandler(). -class EmitActionHandlersCallback; - -typedef void (EmitActionHandlersCallback::* EmitActionHandlersCallbackHandler) -(const DagInit&, unsigned, raw_ostream&) const; - -class EmitActionHandlersCallback : - public ActionHandlingCallbackBase, - public HandlerTable -{ - typedef EmitActionHandlersCallbackHandler Handler; - - const OptionDescriptions& OptDescs; - - /// EmitHookInvocation - Common code for hook invocation from actions. Used by - /// onAppendCmd and onOutputSuffix. - void EmitHookInvocation(const std::string& Str, - const char* BlockOpen, const char* BlockClose, - unsigned IndentLevel, raw_ostream& O) const - { - StrVector Out; - TokenizeCmdLine(Str, Out); - - for (StrVector::const_iterator B = Out.begin(), E = Out.end(); - B != E; ++B) { - const std::string& cmd = *B; - - O.indent(IndentLevel) << BlockOpen; - - if (cmd.at(0) == '$') - B = SubstituteSpecialCommands(B, E, /* IsJoin = */ true, O); - else - O << '"' << cmd << '"'; - - O << BlockClose; - } - } - - void onAppendCmd (const DagInit& Dag, - unsigned IndentLevel, raw_ostream& O) const - { - CheckNumberOfArguments(Dag, 1); - this->EmitHookInvocation(InitPtrToString(Dag.getArg(0)), - "vec.push_back(std::make_pair(65536, ", "));\n", - IndentLevel, O); - } - - void onForward (const DagInit& Dag, - unsigned IndentLevel, raw_ostream& O) const - { - CheckNumberOfArguments(Dag, 1); - const std::string& Name = InitPtrToString(Dag.getArg(0)); - EmitForwardOptionPropertyHandlingCode(OptDescs.FindOption(Name), - IndentLevel, "", O); - } - - void onForwardAs (const DagInit& Dag, - unsigned IndentLevel, raw_ostream& O) const - { - CheckNumberOfArguments(Dag, 2); - const std::string& Name = InitPtrToString(Dag.getArg(0)); - const std::string& NewName = InitPtrToString(Dag.getArg(1)); - EmitForwardOptionPropertyHandlingCode(OptDescs.FindOption(Name), - IndentLevel, NewName, O); - } - - void onForwardValue (const DagInit& Dag, - unsigned IndentLevel, raw_ostream& O) const - { - CheckNumberOfArguments(Dag, 1); - const std::string& Name = InitPtrToString(Dag.getArg(0)); - const OptionDescription& D = OptDescs.FindParameterListOrParameter(Name); - - if (D.isSwitchList()) { - throw std::runtime_error - ("forward_value is not allowed with switch_list"); - } - - if (D.isParameter()) { - O.indent(IndentLevel) << "vec.push_back(std::make_pair(" - << D.GenVariableName() << ".getPosition(), " - << D.GenVariableName() << "));\n"; - } - else { - O.indent(IndentLevel) << "for (" << D.GenTypeDeclaration() - << "::iterator B = " << D.GenVariableName() - << ".begin(), \n"; - O.indent(IndentLevel + Indent1) << " E = " << D.GenVariableName() - << ".end(); B != E; ++B)\n"; - O.indent(IndentLevel) << "{\n"; - O.indent(IndentLevel + Indent1) - << "unsigned pos = " << D.GenVariableName() - << ".getPosition(B - " << D.GenVariableName() - << ".begin());\n"; - O.indent(IndentLevel + Indent1) - << "vec.push_back(std::make_pair(pos, *B));\n"; - O.indent(IndentLevel) << "}\n"; - } - } - - void onForwardTransformedValue (const DagInit& Dag, - unsigned IndentLevel, raw_ostream& O) const - { - CheckNumberOfArguments(Dag, 2); - const std::string& Name = InitPtrToString(Dag.getArg(0)); - const std::string& Hook = InitPtrToString(Dag.getArg(1)); - const OptionDescription& D = OptDescs.FindParameterListOrParameter(Name); - - O.indent(IndentLevel) << "vec.push_back(std::make_pair(" - << D.GenVariableName() << ".getPosition(" - << (D.isList() ? "0" : "") << "), " - << "hooks::" << Hook << "(" << D.GenVariableName() - << (D.isParameter() ? ".c_str()" : "") << ")));\n"; - } - - void onNoOutFile (const DagInit& Dag, - unsigned IndentLevel, raw_ostream& O) const - { - CheckNumberOfArguments(Dag, 0); - O.indent(IndentLevel) << "no_out_file = true;\n"; - } - - void onOutputSuffix (const DagInit& Dag, - unsigned IndentLevel, raw_ostream& O) const - { - CheckNumberOfArguments(Dag, 1); - this->EmitHookInvocation(InitPtrToString(Dag.getArg(0)), - "output_suffix = ", ";\n", IndentLevel, O); - } - - void onStopCompilation (const DagInit& Dag, - unsigned IndentLevel, raw_ostream& O) const - { - O.indent(IndentLevel) << "stop_compilation = true;\n"; - } - - - void onUnpackValues (const DagInit& Dag, - unsigned IndentLevel, raw_ostream& O) const - { - throw "'unpack_values' is deprecated. " - "Use 'comma_separated' + 'forward_value' instead!"; - } - - public: - - explicit EmitActionHandlersCallback(const OptionDescriptions& OD) - : OptDescs(OD) - { - if (!staticMembersInitialized_) { - AddHandler("error", &EmitActionHandlersCallback::onErrorDag); - AddHandler("warning", &EmitActionHandlersCallback::onWarningDag); - AddHandler("append_cmd", &EmitActionHandlersCallback::onAppendCmd); - AddHandler("forward", &EmitActionHandlersCallback::onForward); - AddHandler("forward_as", &EmitActionHandlersCallback::onForwardAs); - AddHandler("forward_value", &EmitActionHandlersCallback::onForwardValue); - AddHandler("forward_transformed_value", - &EmitActionHandlersCallback::onForwardTransformedValue); - AddHandler("no_out_file", - &EmitActionHandlersCallback::onNoOutFile); - AddHandler("output_suffix", &EmitActionHandlersCallback::onOutputSuffix); - AddHandler("stop_compilation", - &EmitActionHandlersCallback::onStopCompilation); - AddHandler("unpack_values", - &EmitActionHandlersCallback::onUnpackValues); - - - staticMembersInitialized_ = true; - } - } - - void operator()(const Init* I, - unsigned IndentLevel, raw_ostream& O) const - { - InvokeDagInitHandler(this, I, IndentLevel, O); - } -}; - -void EmitGenerateActionMethodHeader(const ToolDescription& D, - bool IsJoin, bool Naked, - raw_ostream& O) -{ - O.indent(Indent1) << "int GenerateAction(Action& Out,\n"; - - if (IsJoin) - O.indent(Indent2) << "const PathVector& inFiles,\n"; - else - O.indent(Indent2) << "const sys::Path& inFile,\n"; - - O.indent(Indent2) << "const bool HasChildren,\n"; - O.indent(Indent2) << "const llvm::sys::Path& TempDir,\n"; - O.indent(Indent2) << "const InputLanguagesSet& InLangs,\n"; - O.indent(Indent2) << "const LanguageMap& LangMap) const\n"; - O.indent(Indent1) << "{\n"; - - if (!Naked) { - O.indent(Indent2) << "std::string cmd;\n"; - O.indent(Indent2) << "std::string out_file;\n"; - O.indent(Indent2) - << "std::vector > vec;\n"; - O.indent(Indent2) << "bool stop_compilation = !HasChildren;\n"; - O.indent(Indent2) << "bool no_out_file = false;\n"; - O.indent(Indent2) << "std::string output_suffix(\"" - << D.OutputSuffix << "\");\n"; - } -} - -// EmitGenerateActionMethod - Emit either a normal or a "join" version of the -// Tool::GenerateAction() method. -void EmitGenerateActionMethod (const ToolDescription& D, - const OptionDescriptions& OptDescs, - bool IsJoin, raw_ostream& O) { - - EmitGenerateActionMethodHeader(D, IsJoin, /* Naked = */ false, O); - - if (!D.CmdLine) - throw "Tool " + D.Name + " has no cmd_line property!"; - - // Process the 'command' property. - O << '\n'; - EmitCmdLineVecFill(D.CmdLine, D.Name, IsJoin, Indent2, O); - O << '\n'; - - // Process the 'actions' list of this tool. - if (D.Actions) - EmitCaseConstructHandler(D.Actions, Indent2, - EmitActionHandlersCallback(OptDescs), - false, OptDescs, O); - O << '\n'; - - // Input file (s) - if (!D.InFileOption.empty()) { - O.indent(Indent2) - << "vec.push_back(std::make_pair(InputFilenames.getPosition(0), \"" - << D.InFileOption << "\");\n"; - } - - if (IsJoin) { - O.indent(Indent2) - << "for (PathVector::const_iterator B = inFiles.begin(),\n"; - O.indent(Indent3) << "E = inFiles.end(); B != E; ++B)\n"; - O.indent(Indent2) << "{\n"; - O.indent(Indent3) << "vec.push_back(std::make_pair(" - << "InputFilenames.getPosition(B - inFiles.begin()), " - << "B->str()));\n"; - O.indent(Indent2) << "}\n"; - } - else { - O.indent(Indent2) << "vec.push_back(std::make_pair(" - << "InputFilenames.getPosition(0), inFile.str()));\n"; - } - - // Output file - O.indent(Indent2) << "if (!no_out_file) {\n"; - if (!D.OutFileOption.empty()) - O.indent(Indent3) << "vec.push_back(std::make_pair(65536, \"" - << D.OutFileOption << "\"));\n"; - - O.indent(Indent3) << "out_file = this->OutFilename(" - << (IsJoin ? "sys::Path(),\n" : "inFile,\n"); - O.indent(Indent4) << - "TempDir, stop_compilation, output_suffix.c_str()).str();\n\n"; - O.indent(Indent3) << "vec.push_back(std::make_pair(65536, out_file));\n"; - - O.indent(Indent2) << "}\n\n"; - - // Handle the Sink property. - std::string SinkOption("autogenerated::"); - SinkOption += SinkOptionName; - if (D.isSink()) { - O.indent(Indent2) << "if (!" << SinkOption << ".empty()) {\n"; - O.indent(Indent3) << "for (cl::list::iterator B = " - << SinkOption << ".begin(), E = " << SinkOption - << ".end(); B != E; ++B)\n"; - O.indent(Indent4) << "vec.push_back(std::make_pair(" << SinkOption - << ".getPosition(B - " << SinkOption - << ".begin()), *B));\n"; - O.indent(Indent2) << "}\n"; - } - - O.indent(Indent2) << "Out.Construct(cmd, this->SortArgs(vec), " - << "stop_compilation, out_file);\n"; - O.indent(Indent2) << "return 0;\n"; - O.indent(Indent1) << "}\n\n"; -} - -/// EmitGenerateActionMethods - Emit two GenerateAction() methods for -/// a given Tool class. -void EmitGenerateActionMethods (const ToolDescription& ToolDesc, - const OptionDescriptions& OptDescs, - raw_ostream& O) { - if (!ToolDesc.isJoin()) { - EmitGenerateActionMethodHeader(ToolDesc, /* IsJoin = */ true, - /* Naked = */ true, O); - O.indent(Indent2) << "PrintError(\"" << ToolDesc.Name - << " is not a Join tool!\");\n"; - O.indent(Indent2) << "return -1;\n"; - O.indent(Indent1) << "}\n\n"; - } - else { - EmitGenerateActionMethod(ToolDesc, OptDescs, true, O); - } - - EmitGenerateActionMethod(ToolDesc, OptDescs, false, O); -} - -/// EmitInOutLanguageMethods - Emit the [Input,Output]Language() -/// methods for a given Tool class. -void EmitInOutLanguageMethods (const ToolDescription& D, raw_ostream& O) { - O.indent(Indent1) << "const char** InputLanguages() const {\n"; - O.indent(Indent2) << "return InputLanguages_;\n"; - O.indent(Indent1) << "}\n\n"; - - O.indent(Indent1) << "const char** OutputLanguages() const {\n"; - O.indent(Indent2) << "return OutputLanguages_;\n"; - O.indent(Indent1) << "}\n\n"; -} - -/// EmitNameMethod - Emit the Name() method for a given Tool class. -void EmitNameMethod (const ToolDescription& D, raw_ostream& O) { - O.indent(Indent1) << "const char* Name() const {\n"; - O.indent(Indent2) << "return \"" << D.Name << "\";\n"; - O.indent(Indent1) << "}\n\n"; -} - -/// EmitIsJoinMethod - Emit the IsJoin() method for a given Tool -/// class. -void EmitIsJoinMethod (const ToolDescription& D, raw_ostream& O) { - O.indent(Indent1) << "bool IsJoin() const {\n"; - if (D.isJoin()) - O.indent(Indent2) << "return true;\n"; - else - O.indent(Indent2) << "return false;\n"; - O.indent(Indent1) << "}\n\n"; -} - -/// EmitWorksOnEmptyCallback - Callback used by EmitWorksOnEmptyMethod in -/// conjunction with EmitCaseConstructHandler. -void EmitWorksOnEmptyCallback (const Init* Value, - unsigned IndentLevel, raw_ostream& O) { - CheckBooleanConstant(Value); - O.indent(IndentLevel) << "return " << Value->getAsString() << ";\n"; -} - -/// EmitWorksOnEmptyMethod - Emit the WorksOnEmpty() method for a given Tool -/// class. -void EmitWorksOnEmptyMethod (const ToolDescription& D, - const OptionDescriptions& OptDescs, - raw_ostream& O) -{ - O.indent(Indent1) << "bool WorksOnEmpty() const {\n"; - if (D.OnEmpty == 0) - O.indent(Indent2) << "return false;\n"; - else - EmitCaseConstructHandler(D.OnEmpty, Indent2, EmitWorksOnEmptyCallback, - /*EmitElseIf = */ true, OptDescs, O); - O.indent(Indent1) << "}\n\n"; -} - -/// EmitStrArray - Emit definition of a 'const char**' static member -/// variable. Helper used by EmitStaticMemberDefinitions(); -void EmitStrArray(const std::string& Name, const std::string& VarName, - const StrVector& StrVec, raw_ostream& O) { - O << "const char* " << Name << "::" << VarName << "[] = {"; - for (StrVector::const_iterator B = StrVec.begin(), E = StrVec.end(); - B != E; ++B) - O << '\"' << *B << "\", "; - O << "0};\n"; -} - -/// EmitStaticMemberDefinitions - Emit static member definitions for a -/// given Tool class. -void EmitStaticMemberDefinitions(const ToolDescription& D, raw_ostream& O) { - if (D.InLanguage.empty()) - throw "Tool " + D.Name + " has no 'in_language' property!"; - if (D.OutLanguage.empty()) - throw "Tool " + D.Name + " has no 'out_language' property!"; - - EmitStrArray(D.Name, "InputLanguages_", D.InLanguage, O); - EmitStrArray(D.Name, "OutputLanguages_", D.OutLanguage, O); - O << '\n'; -} - -/// EmitToolClassDefinition - Emit a Tool class definition. -void EmitToolClassDefinition (const ToolDescription& D, - const OptionDescriptions& OptDescs, - raw_ostream& O) { - if (D.Name == "root") - return; - - // Header - O << "class " << D.Name << " : public "; - if (D.isJoin()) - O << "JoinTool"; - else - O << "Tool"; - - O << " {\nprivate:\n"; - O.indent(Indent1) << "static const char* InputLanguages_[];\n"; - O.indent(Indent1) << "static const char* OutputLanguages_[];\n\n"; - - O << "public:\n"; - EmitNameMethod(D, O); - EmitInOutLanguageMethods(D, O); - EmitIsJoinMethod(D, O); - EmitWorksOnEmptyMethod(D, OptDescs, O); - EmitGenerateActionMethods(D, OptDescs, O); - - // Close class definition - O << "};\n"; - - EmitStaticMemberDefinitions(D, O); - -} - -/// EmitOptionDefinitions - Iterate over a list of option descriptions -/// and emit registration code. -void EmitOptionDefinitions (const OptionDescriptions& descs, - bool HasSink, raw_ostream& O) -{ - std::vector Aliases; - - // Emit static cl::Option variables. - for (OptionDescriptions::const_iterator B = descs.begin(), - E = descs.end(); B!=E; ++B) { - const OptionDescription& val = B->second; - - if (val.Type == OptionType::Alias) { - Aliases.push_back(val); - continue; - } - - O << val.GenTypeDeclaration() << ' ' - << val.GenPlainVariableName(); - - O << "(\"" << val.Name << "\"\n"; - - if (val.Type == OptionType::Prefix || val.Type == OptionType::PrefixList) - O << ", cl::Prefix"; - - if (val.isRequired()) { - if (val.isList() && !val.isMultiVal()) - O << ", cl::OneOrMore"; - else - O << ", cl::Required"; - } - - if (val.isOptional()) - O << ", cl::Optional"; - - if (val.isOneOrMore()) - O << ", cl::OneOrMore"; - - if (val.isZeroOrMore()) - O << ", cl::ZeroOrMore"; - - if (val.isReallyHidden()) - O << ", cl::ReallyHidden"; - else if (val.isHidden()) - O << ", cl::Hidden"; - - if (val.isCommaSeparated()) - O << ", cl::CommaSeparated"; - - if (val.MultiVal > 1) - O << ", cl::multi_val(" << val.MultiVal << ')'; - - if (val.InitVal) { - const std::string& str = val.InitVal->getAsString(); - O << ", cl::init(" << str << ')'; - } - - if (!val.Help.empty()) - O << ", cl::desc(\"" << val.Help << "\")"; - - O << ");\n\n"; - } - - // Emit the aliases (they should go after all the 'proper' options). - for (std::vector::const_iterator - B = Aliases.begin(), E = Aliases.end(); B != E; ++B) { - const OptionDescription& val = *B; - - O << val.GenTypeDeclaration() << ' ' - << val.GenPlainVariableName() - << "(\"" << val.Name << '\"'; - - const OptionDescription& D = descs.FindOption(val.Help); - O << ", cl::aliasopt(" << D.GenVariableName() << ")"; - - O << ", cl::desc(\"" << "An alias for -" + val.Help << "\"));\n"; - } - - // Emit the sink option. - if (HasSink) - O << "cl::list " << SinkOptionName << "(cl::Sink);\n"; - - O << '\n'; -} - -/// EmitPreprocessOptionsCallback - Helper function passed to -/// EmitCaseConstructHandler() by EmitPreprocessOptions(). - -class EmitPreprocessOptionsCallback; - -typedef void -(EmitPreprocessOptionsCallback::* EmitPreprocessOptionsCallbackHandler) -(const DagInit&, unsigned, raw_ostream&) const; - -class EmitPreprocessOptionsCallback : - public ActionHandlingCallbackBase, - public HandlerTable -{ - typedef EmitPreprocessOptionsCallbackHandler Handler; - typedef void - (EmitPreprocessOptionsCallback::* HandlerImpl) - (const Init*, unsigned, raw_ostream&) const; - - const OptionDescriptions& OptDescs_; - - void onEachArgument(const DagInit& d, HandlerImpl h, - unsigned IndentLevel, raw_ostream& O) const - { - CheckNumberOfArguments(d, 1); - - for (unsigned i = 0, NumArgs = d.getNumArgs(); i < NumArgs; ++i) { - ((this)->*(h))(d.getArg(i), IndentLevel, O); - } - } - - void onUnsetOptionImpl(const Init* I, - unsigned IndentLevel, raw_ostream& O) const - { - const std::string& OptName = InitPtrToString(I); - const OptionDescription& OptDesc = OptDescs_.FindOption(OptName); - - if (OptDesc.isSwitch()) { - O.indent(IndentLevel) << OptDesc.GenVariableName() << " = false;\n"; - } - else if (OptDesc.isParameter()) { - O.indent(IndentLevel) << OptDesc.GenVariableName() << " = \"\";\n"; - } - else if (OptDesc.isList()) { - O.indent(IndentLevel) << OptDesc.GenVariableName() << ".clear();\n"; - } - else { - throw "Can't apply 'unset_option' to alias option '" + OptName + "'!"; - } - } - - void onUnsetOption(const DagInit& d, - unsigned IndentLevel, raw_ostream& O) const - { - this->onEachArgument(d, &EmitPreprocessOptionsCallback::onUnsetOptionImpl, - IndentLevel, O); - } - - void onSetOptionImpl(const DagInit& D, - unsigned IndentLevel, raw_ostream& O) const { - CheckNumberOfArguments(D, 2); - - const std::string& OptName = InitPtrToString(D.getArg(0)); - const OptionDescription& OptDesc = OptDescs_.FindOption(OptName); - const Init* Value = D.getArg(1); - - if (OptDesc.isList()) { - const ListInit& List = InitPtrToList(Value); - - O.indent(IndentLevel) << OptDesc.GenVariableName() << ".clear();\n"; - for (ListInit::const_iterator B = List.begin(), E = List.end(); - B != E; ++B) { - const Init* CurElem = *B; - if (OptDesc.isSwitchList()) - CheckBooleanConstant(CurElem); - - O.indent(IndentLevel) - << OptDesc.GenVariableName() << ".push_back(\"" - << (OptDesc.isSwitchList() ? CurElem->getAsString() - : InitPtrToString(CurElem)) - << "\");\n"; - } - } - else if (OptDesc.isSwitch()) { - CheckBooleanConstant(Value); - O.indent(IndentLevel) << OptDesc.GenVariableName() - << " = " << Value->getAsString() << ";\n"; - } - else if (OptDesc.isParameter()) { - const std::string& Str = InitPtrToString(Value); - O.indent(IndentLevel) << OptDesc.GenVariableName() - << " = \"" << Str << "\";\n"; - } - else { - throw "Can't apply 'set_option' to alias option '" + OptName + "'!"; - } - } - - void onSetSwitch(const Init* I, - unsigned IndentLevel, raw_ostream& O) const { - const std::string& OptName = InitPtrToString(I); - const OptionDescription& OptDesc = OptDescs_.FindOption(OptName); - - if (OptDesc.isSwitch()) - O.indent(IndentLevel) << OptDesc.GenVariableName() << " = true;\n"; - else - throw "set_option: -" + OptName + " is not a switch option!"; - } - - void onSetOption(const DagInit& d, - unsigned IndentLevel, raw_ostream& O) const - { - CheckNumberOfArguments(d, 1); - - // 2-argument form: (set_option "A", true), (set_option "B", "C"), - // (set_option "D", ["E", "F"]) - if (d.getNumArgs() == 2) { - const OptionDescription& OptDesc = - OptDescs_.FindOption(InitPtrToString(d.getArg(0))); - const Init* Opt2 = d.getArg(1); - - if (!OptDesc.isSwitch() || typeid(*Opt2) != typeid(StringInit)) { - this->onSetOptionImpl(d, IndentLevel, O); - return; - } - } - - // Multiple argument form: (set_option "A"), (set_option "B", "C", "D") - this->onEachArgument(d, &EmitPreprocessOptionsCallback::onSetSwitch, - IndentLevel, O); - } - -public: - - EmitPreprocessOptionsCallback(const OptionDescriptions& OptDescs) - : OptDescs_(OptDescs) - { - if (!staticMembersInitialized_) { - AddHandler("error", &EmitPreprocessOptionsCallback::onErrorDag); - AddHandler("warning", &EmitPreprocessOptionsCallback::onWarningDag); - AddHandler("unset_option", &EmitPreprocessOptionsCallback::onUnsetOption); - AddHandler("set_option", &EmitPreprocessOptionsCallback::onSetOption); - - staticMembersInitialized_ = true; - } - } - - void operator()(const Init* I, - unsigned IndentLevel, raw_ostream& O) const - { - InvokeDagInitHandler(this, I, IndentLevel, O); - } - -}; - -/// EmitPreprocessOptions - Emit the PreprocessOptions() function. -void EmitPreprocessOptions (const RecordKeeper& Records, - const OptionDescriptions& OptDecs, raw_ostream& O) -{ - O << "int PreprocessOptions () {\n"; - - const RecordVector& OptionPreprocessors = - Records.getAllDerivedDefinitions("OptionPreprocessor"); - - for (RecordVector::const_iterator B = OptionPreprocessors.begin(), - E = OptionPreprocessors.end(); B!=E; ++B) { - DagInit* Case = (*B)->getValueAsDag("preprocessor"); - EmitCaseConstructHandler(Case, Indent1, - EmitPreprocessOptionsCallback(OptDecs), - false, OptDecs, O); - } - - O << '\n'; - O.indent(Indent1) << "return 0;\n"; - O << "}\n\n"; -} - -class DoEmitPopulateLanguageMap; -typedef void (DoEmitPopulateLanguageMap::* DoEmitPopulateLanguageMapHandler) -(const DagInit& D); - -class DoEmitPopulateLanguageMap -: public HandlerTable -{ -private: - raw_ostream& O_; - -public: - - explicit DoEmitPopulateLanguageMap (raw_ostream& O) : O_(O) { - if (!staticMembersInitialized_) { - AddHandler("lang_to_suffixes", - &DoEmitPopulateLanguageMap::onLangToSuffixes); - - staticMembersInitialized_ = true; - } - } - - void operator() (Init* I) { - InvokeDagInitHandler(this, I); - } - -private: - - void onLangToSuffixes (const DagInit& d) { - CheckNumberOfArguments(d, 2); - - const std::string& Lang = InitPtrToString(d.getArg(0)); - Init* Suffixes = d.getArg(1); - - // Second argument to lang_to_suffixes is either a single string... - if (typeid(*Suffixes) == typeid(StringInit)) { - O_.indent(Indent1) << "langMap[\"" << InitPtrToString(Suffixes) - << "\"] = \"" << Lang << "\";\n"; - } - // ...or a list of strings. - else { - const ListInit& Lst = InitPtrToList(Suffixes); - assert(Lst.size() != 0); - for (ListInit::const_iterator B = Lst.begin(), E = Lst.end(); - B != E; ++B) { - O_.indent(Indent1) << "langMap[\"" << InitPtrToString(*B) - << "\"] = \"" << Lang << "\";\n"; - } - } - } - -}; - -/// EmitPopulateLanguageMap - Emit the PopulateLanguageMap() function. -void EmitPopulateLanguageMap (const RecordKeeper& Records, raw_ostream& O) -{ - O << "int PopulateLanguageMap (LanguageMap& langMap) {\n"; - - // For each LanguageMap: - const RecordVector& LangMaps = - Records.getAllDerivedDefinitions("LanguageMap"); - - // Call DoEmitPopulateLanguageMap. - for (RecordVector::const_iterator B = LangMaps.begin(), - E = LangMaps.end(); B!=E; ++B) { - ListInit* LangMap = (*B)->getValueAsListInit("map"); - std::for_each(LangMap->begin(), LangMap->end(), - DoEmitPopulateLanguageMap(O)); - } - - O << '\n'; - O.indent(Indent1) << "return 0;\n"; - O << "}\n\n"; -} - -/// EmitEdgePropertyHandlerCallback - Emits code that handles edge -/// properties. Helper function passed to EmitCaseConstructHandler() by -/// EmitEdgeClass(). -void EmitEdgePropertyHandlerCallback (const Init* i, unsigned IndentLevel, - raw_ostream& O) { - const DagInit& d = InitPtrToDag(i); - const std::string& OpName = GetOperatorName(d); - - if (OpName == "inc_weight") { - O.indent(IndentLevel) << "ret += "; - } - else if (OpName == "error") { - CheckNumberOfArguments(d, 1); - O.indent(IndentLevel) << "PrintError(\"" - << InitPtrToString(d.getArg(0)) - << "\");\n"; - O.indent(IndentLevel) << "return -1;\n"; - return; - } - else { - throw "Unknown operator in edge properties list: '" + OpName + "'!" - "\nOnly 'inc_weight', 'dec_weight' and 'error' are allowed."; - } - - if (d.getNumArgs() > 0) - O << InitPtrToInt(d.getArg(0)) << ";\n"; - else - O << "2;\n"; - -} - -/// EmitEdgeClass - Emit a single Edge# class. -void EmitEdgeClass (unsigned N, const std::string& Target, - const DagInit& Case, const OptionDescriptions& OptDescs, - raw_ostream& O) { - - // Class constructor. - O << "class Edge" << N << ": public Edge {\n" - << "public:\n"; - O.indent(Indent1) << "Edge" << N << "() : Edge(\"" << Target - << "\") {}\n\n"; - - // Function Weight(). - O.indent(Indent1) - << "int Weight(const InputLanguagesSet& InLangs) const {\n"; - O.indent(Indent2) << "unsigned ret = 0;\n"; - - // Handle the 'case' construct. - EmitCaseConstructHandler(&Case, Indent2, EmitEdgePropertyHandlerCallback, - false, OptDescs, O); - - O.indent(Indent2) << "return ret;\n"; - O.indent(Indent1) << "}\n\n};\n\n"; -} - -/// EmitEdgeClasses - Emit Edge* classes that represent graph edges. -void EmitEdgeClasses (const DagVector& EdgeVector, - const OptionDescriptions& OptDescs, - raw_ostream& O) { - int i = 0; - for (DagVector::const_iterator B = EdgeVector.begin(), - E = EdgeVector.end(); B != E; ++B) { - const DagInit& Edge = **B; - const std::string& Name = GetOperatorName(Edge); - - if (Name == "optional_edge") { - assert(IsOptionalEdge(Edge)); - const std::string& NodeB = InitPtrToString(Edge.getArg(1)); - - const DagInit& Weight = InitPtrToDag(Edge.getArg(2)); - EmitEdgeClass(i, NodeB, Weight, OptDescs, O); - } - else if (Name != "edge") { - throw "Unknown edge class: '" + Name + "'!"; - } - - ++i; - } -} - -/// EmitPopulateCompilationGraph - Emit the PopulateCompilationGraph() function. -void EmitPopulateCompilationGraph (const DagVector& EdgeVector, - const ToolDescriptions& ToolDescs, - raw_ostream& O) -{ - O << "int PopulateCompilationGraph (CompilationGraph& G) {\n"; - - for (ToolDescriptions::const_iterator B = ToolDescs.begin(), - E = ToolDescs.end(); B != E; ++B) - O.indent(Indent1) << "G.insertNode(new " << (*B)->Name << "());\n"; - - O << '\n'; - - // Insert edges. - - int i = 0; - for (DagVector::const_iterator B = EdgeVector.begin(), - E = EdgeVector.end(); B != E; ++B) { - const DagInit& Edge = **B; - const std::string& NodeA = InitPtrToString(Edge.getArg(0)); - const std::string& NodeB = InitPtrToString(Edge.getArg(1)); - - O.indent(Indent1) << "if (int ret = G.insertEdge(\"" << NodeA << "\", "; - - if (IsOptionalEdge(Edge)) - O << "new Edge" << i << "()"; - else - O << "new SimpleEdge(\"" << NodeB << "\")"; - - O << "))\n"; - O.indent(Indent2) << "return ret;\n"; - - ++i; - } - - O << '\n'; - O.indent(Indent1) << "return 0;\n"; - O << "}\n\n"; -} - -/// HookInfo - Information about the hook type and number of arguments. -struct HookInfo { - - // A hook can either have a single parameter of type std::vector, - // or NumArgs parameters of type const char*. - enum HookType { ListHook, ArgHook }; - - HookType Type; - unsigned NumArgs; - - HookInfo() : Type(ArgHook), NumArgs(1) - {} - - HookInfo(HookType T) : Type(T), NumArgs(1) - {} - - HookInfo(unsigned N) : Type(ArgHook), NumArgs(N) - {} -}; - -typedef llvm::StringMap HookInfoMap; - -/// ExtractHookNames - Extract the hook names from all instances of -/// $CALL(HookName) in the provided command line string/action. Helper -/// function used by FillInHookNames(). -class ExtractHookNames { - HookInfoMap& HookNames_; - const OptionDescriptions& OptDescs_; -public: - ExtractHookNames(HookInfoMap& HookNames, const OptionDescriptions& OptDescs) - : HookNames_(HookNames), OptDescs_(OptDescs) - {} - - void onAction (const DagInit& Dag) { - const std::string& Name = GetOperatorName(Dag); - - if (Name == "forward_transformed_value") { - CheckNumberOfArguments(Dag, 2); - const std::string& OptName = InitPtrToString(Dag.getArg(0)); - const std::string& HookName = InitPtrToString(Dag.getArg(1)); - const OptionDescription& D = - OptDescs_.FindParameterListOrParameter(OptName); - - HookNames_[HookName] = HookInfo(D.isList() ? HookInfo::ListHook - : HookInfo::ArgHook); - } - else if (Name == "append_cmd" || Name == "output_suffix") { - CheckNumberOfArguments(Dag, 1); - this->onCmdLine(InitPtrToString(Dag.getArg(0))); - } - } - - void onCmdLine(const std::string& Cmd) { - StrVector cmds; - TokenizeCmdLine(Cmd, cmds); - - for (StrVector::const_iterator B = cmds.begin(), E = cmds.end(); - B != E; ++B) { - const std::string& cmd = *B; - - if (cmd == "$CALL") { - unsigned NumArgs = 0; - CheckedIncrement(B, E, "Syntax error in $CALL invocation!"); - const std::string& HookName = *B; - - if (HookName.at(0) == ')') - throw "$CALL invoked with no arguments!"; - - while (++B != E && B->at(0) != ')') { - ++NumArgs; - } - - HookInfoMap::const_iterator H = HookNames_.find(HookName); - - if (H != HookNames_.end() && H->second.NumArgs != NumArgs && - H->second.Type != HookInfo::ArgHook) - throw "Overloading of hooks is not allowed. Overloaded hook: " - + HookName; - else - HookNames_[HookName] = HookInfo(NumArgs); - } - } - } - - void operator()(const Init* Arg) { - - // We're invoked on an action (either a dag or a dag list). - if (typeid(*Arg) == typeid(DagInit)) { - const DagInit& Dag = InitPtrToDag(Arg); - this->onAction(Dag); - return; - } - else if (typeid(*Arg) == typeid(ListInit)) { - const ListInit& List = InitPtrToList(Arg); - for (ListInit::const_iterator B = List.begin(), E = List.end(); B != E; - ++B) { - const DagInit& Dag = InitPtrToDag(*B); - this->onAction(Dag); - } - return; - } - - // We're invoked on a command line string. - this->onCmdLine(InitPtrToString(Arg)); - } - - void operator()(const Init* Statement, unsigned) { - this->operator()(Statement); - } -}; - -/// FillInHookNames - Actually extract the hook names from all command -/// line strings. Helper function used by EmitHookDeclarations(). -void FillInHookNames(const ToolDescriptions& ToolDescs, - const OptionDescriptions& OptDescs, - HookInfoMap& HookNames) -{ - // For all tool descriptions: - for (ToolDescriptions::const_iterator B = ToolDescs.begin(), - E = ToolDescs.end(); B != E; ++B) { - const ToolDescription& D = *(*B); - - // Look for 'forward_transformed_value' in 'actions'. - if (D.Actions) - WalkCase(D.Actions, Id(), ExtractHookNames(HookNames, OptDescs)); - - // Look for hook invocations in 'cmd_line'. - if (!D.CmdLine) - continue; - if (dynamic_cast(D.CmdLine)) - // This is a string. - ExtractHookNames(HookNames, OptDescs).operator()(D.CmdLine); - else - // This is a 'case' construct. - WalkCase(D.CmdLine, Id(), ExtractHookNames(HookNames, OptDescs)); - } -} - -/// EmitHookDeclarations - Parse CmdLine fields of all the tool -/// property records and emit hook function declaration for each -/// instance of $CALL(HookName). -void EmitHookDeclarations(const ToolDescriptions& ToolDescs, - const OptionDescriptions& OptDescs, raw_ostream& O) { - HookInfoMap HookNames; - - FillInHookNames(ToolDescs, OptDescs, HookNames); - if (HookNames.empty()) - return; - - for (HookInfoMap::const_iterator B = HookNames.begin(), - E = HookNames.end(); B != E; ++B) { - StringRef HookName = B->first(); - const HookInfo &Info = B->second; - - O.indent(Indent1) << "std::string " << HookName << "("; - - if (Info.Type == HookInfo::ArgHook) { - for (unsigned i = 0, j = Info.NumArgs; i < j; ++i) { - O << "const char* Arg" << i << (i+1 == j ? "" : ", "); - } - } - else { - O << "const std::vector& Arg"; - } - - O <<");\n"; - } -} - -/// EmitIncludes - Emit necessary #include directives and some -/// additional declarations. -void EmitIncludes(raw_ostream& O) { - O << "#include \"llvm/CompilerDriver/BuiltinOptions.h\"\n" - << "#include \"llvm/CompilerDriver/CompilationGraph.h\"\n" - << "#include \"llvm/CompilerDriver/Error.h\"\n" - << "#include \"llvm/CompilerDriver/Tool.h\"\n\n" - - << "#include \"llvm/Support/CommandLine.h\"\n" - << "#include \"llvm/Support/raw_ostream.h\"\n\n" - - << "#include \n" - << "#include \n" - << "#include \n" - << "#include \n\n" - - << "using namespace llvm;\n" - << "using namespace llvmc;\n\n" - - << "inline const char* checkCString(const char* s)\n" - << "{ return s == NULL ? \"\" : s; }\n\n"; -} - - -/// DriverData - Holds all information about the driver. -struct DriverData { - OptionDescriptions OptDescs; - ToolDescriptions ToolDescs; - DagVector Edges; - bool HasSink; -}; - -/// HasSink - Go through the list of tool descriptions and check if -/// there are any with the 'sink' property set. -bool HasSink(const ToolDescriptions& ToolDescs) { - for (ToolDescriptions::const_iterator B = ToolDescs.begin(), - E = ToolDescs.end(); B != E; ++B) - if ((*B)->isSink()) - return true; - - return false; -} - -/// CollectDriverData - Collect compilation graph edges, tool properties and -/// option properties from the parse tree. -void CollectDriverData (const RecordKeeper& Records, DriverData& Data) { - // Collect option properties. - const RecordVector& OptionLists = - Records.getAllDerivedDefinitions("OptionList"); - CollectOptionDescriptions(OptionLists, Data.OptDescs); - - // Collect tool properties. - const RecordVector& Tools = Records.getAllDerivedDefinitions("Tool"); - CollectToolDescriptions(Tools, Data.ToolDescs); - Data.HasSink = HasSink(Data.ToolDescs); - - // Collect compilation graph edges. - const RecordVector& CompilationGraphs = - Records.getAllDerivedDefinitions("CompilationGraph"); - FillInEdgeVector(CompilationGraphs, Data.Edges); -} - -/// CheckDriverData - Perform some sanity checks on the collected data. -void CheckDriverData(DriverData& Data) { - // Filter out all tools not mentioned in the compilation graph. - FilterNotInGraph(Data.Edges, Data.ToolDescs); - - // Typecheck the compilation graph. - // TODO: use a genuine graph representation instead of a vector and check for - // multiple edges. - TypecheckGraph(Data.Edges, Data.ToolDescs); - - // Check that there are no options without side effects (specified - // only in the OptionList). - CheckForSuperfluousOptions(Data.Edges, Data.ToolDescs, Data.OptDescs); -} - -void EmitDriverCode(const DriverData& Data, - raw_ostream& O, RecordKeeper &Records) { - // Emit file header. - EmitIncludes(O); - - // Emit global option registration code. - O << "namespace llvmc {\n" - << "namespace autogenerated {\n\n"; - EmitOptionDefinitions(Data.OptDescs, Data.HasSink, O); - O << "} // End namespace autogenerated.\n" - << "} // End namespace llvmc.\n\n"; - - // Emit hook declarations. - O << "namespace hooks {\n"; - EmitHookDeclarations(Data.ToolDescs, Data.OptDescs, O); - O << "} // End namespace hooks.\n\n"; - - O << "namespace {\n\n"; - O << "using namespace llvmc::autogenerated;\n\n"; - - // Emit Tool classes. - for (ToolDescriptions::const_iterator B = Data.ToolDescs.begin(), - E = Data.ToolDescs.end(); B!=E; ++B) - EmitToolClassDefinition(*(*B), Data.OptDescs, O); - - // Emit Edge# classes. - EmitEdgeClasses(Data.Edges, Data.OptDescs, O); - - O << "} // End anonymous namespace.\n\n"; - - O << "namespace llvmc {\n"; - O << "namespace autogenerated {\n\n"; - - // Emit PreprocessOptions() function. - EmitPreprocessOptions(Records, Data.OptDescs, O); - - // Emit PopulateLanguageMap() function - // (language map maps from file extensions to language names). - EmitPopulateLanguageMap(Records, O); - - // Emit PopulateCompilationGraph() function. - EmitPopulateCompilationGraph(Data.Edges, Data.ToolDescs, O); - - O << "} // End namespace autogenerated.\n"; - O << "} // End namespace llvmc.\n\n"; - - // EOF -} - - -// End of anonymous namespace -} - -/// run - The back-end entry point. -void LLVMCConfigurationEmitter::run (raw_ostream &O) { - try { - DriverData Data; - - CollectDriverData(Records, Data); - CheckDriverData(Data); - - this->EmitSourceFileHeader("llvmc-based driver: auto-generated code", O); - EmitDriverCode(Data, O, Records); - - } catch (std::exception& Error) { - throw Error.what() + std::string(" - usually this means a syntax error."); - } -} Removed: llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.h?rev=140120&view=auto ============================================================================== --- llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.h (original) +++ llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.h (removed) @@ -1,34 +0,0 @@ -//===- LLVMCConfigurationEmitter.cpp - Generate LLVMCC config ---*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open -// Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This tablegen backend is responsible for emitting LLVMCC configuration code. -// -//===----------------------------------------------------------------------===// - -#ifndef LLVM_UTILS_TABLEGEN_LLVMCCONF_EMITTER_H -#define LLVM_UTILS_TABLEGEN_LLVMCCONF_EMITTER_H - -#include "TableGenBackend.h" - -namespace llvm { - - /// LLVMCConfigurationEmitter - TableGen backend that generates - /// configuration code for LLVMC. - class LLVMCConfigurationEmitter : public TableGenBackend { - RecordKeeper &Records; - public: - explicit LLVMCConfigurationEmitter(RecordKeeper &records) : - Records(records) {} - - // run - Output the asmwriter, returning true on failure. - void run(raw_ostream &o); - }; -} - -#endif //LLVM_UTILS_TABLEGEN_LLVMCCONF_EMITTER_H Modified: llvm/trunk/utils/TableGen/TableGen.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/TableGen.cpp?rev=140121&r1=140120&r2=140121&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/TableGen.cpp (original) +++ llvm/trunk/utils/TableGen/TableGen.cpp Mon Sep 19 19:34:27 2011 @@ -30,7 +30,6 @@ #include "FastISelEmitter.h" #include "InstrInfoEmitter.h" #include "IntrinsicEmitter.h" -#include "LLVMCConfigurationEmitter.h" #include "NeonEmitter.h" #include "OptParserEmitter.h" #include "PseudoLoweringEmitter.h" @@ -81,7 +80,6 @@ GenSubtarget, GenIntrinsic, GenTgtIntrinsic, - GenLLVMCConf, GenEDInfo, GenArmNeon, GenArmNeonSema, @@ -156,8 +154,6 @@ "Generate Clang AST statement nodes"), clEnumValN(GenClangSACheckers, "gen-clang-sa-checkers", "Generate Clang Static Analyzer checkers"), - clEnumValN(GenLLVMCConf, "gen-llvmc", - "Generate LLVMC configuration library"), clEnumValN(GenEDInfo, "gen-enhanced-disassembly-info", "Generate enhanced disassembly info"), clEnumValN(GenArmNeon, "gen-arm-neon", @@ -349,9 +345,6 @@ case GenTgtIntrinsic: IntrinsicEmitter(Records, true).run(Out.os()); break; - case GenLLVMCConf: - LLVMCConfigurationEmitter(Records).run(Out.os()); - break; case GenEDInfo: EDEmitter(Records).run(Out.os()); break; From echristo at apple.com Mon Sep 19 19:38:04 2011 From: echristo at apple.com (Eric Christopher) Date: Tue, 20 Sep 2011 00:38:04 -0000 Subject: [llvm-commits] [llvm] r140122 - /llvm/trunk/lib/CMakeLists.txt Message-ID: <20110920003804.706D02A6C12C@llvm.org> Author: echristo Date: Mon Sep 19 19:38:04 2011 New Revision: 140122 URL: http://llvm.org/viewvc/llvm-project?rev=140122&view=rev Log: Remove from cmake too. Modified: llvm/trunk/lib/CMakeLists.txt Modified: llvm/trunk/lib/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CMakeLists.txt?rev=140122&r1=140121&r2=140122&view=diff ============================================================================== --- llvm/trunk/lib/CMakeLists.txt (original) +++ llvm/trunk/lib/CMakeLists.txt Mon Sep 19 19:38:04 2011 @@ -7,7 +7,6 @@ add_subdirectory(Linker) add_subdirectory(Analysis) add_subdirectory(MC) -add_subdirectory(CompilerDriver) add_subdirectory(Object) add_subdirectory(DebugInfo) add_subdirectory(ExecutionEngine) From michael at lunarg.com Mon Sep 19 19:40:20 2011 From: michael at lunarg.com (Michael Ilseman) Date: Mon, 19 Sep 2011 18:40:20 -0600 Subject: [llvm-commits] Update to SetVector documentation in Programmer's Manual Message-ID: Since r33854, SetVectors have defaulted to size 16 SmallSets, but the Programmer's Manual still says it uses an std:set. -------------- next part -------------- A non-text attachment was scrubbed... Name: SetVectorDocFix.patch Type: application/octet-stream Size: 828 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110919/80b5c859/attachment.obj From echristo at apple.com Mon Sep 19 19:42:28 2011 From: echristo at apple.com (Eric Christopher) Date: Tue, 20 Sep 2011 00:42:28 -0000 Subject: [llvm-commits] [llvm] r140124 - in /llvm/trunk: Makefile.rules docs/FAQ.html docs/GettingStarted.html docs/index.html Message-ID: <20110920004228.38C2F2A6C12C@llvm.org> Author: echristo Date: Mon Sep 19 19:42:28 2011 New Revision: 140124 URL: http://llvm.org/viewvc/llvm-project?rev=140124&view=rev Log: More llvmc bits. Spotted by Benjamin on IRC. Modified: llvm/trunk/Makefile.rules llvm/trunk/docs/FAQ.html llvm/trunk/docs/GettingStarted.html llvm/trunk/docs/index.html Modified: llvm/trunk/Makefile.rules URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/Makefile.rules?rev=140124&r1=140123&r2=140124&view=diff ============================================================================== --- llvm/trunk/Makefile.rules (original) +++ llvm/trunk/Makefile.rules Mon Sep 19 19:42:28 2011 @@ -191,19 +191,6 @@ install-bytecode:: install-bytecode-local ############################################################################### -# LLVMC: Provide rules for compiling llvmc-based driver -############################################################################### - -ifdef LLVMC_BASED_DRIVER - -TOOLNAME = $(LLVMC_BASED_DRIVER) - -LLVMLIBS = CompilerDriver.a -LINK_COMPONENTS = support - -endif # LLVMC_BASED_DRIVER - -############################################################################### # VARIABLES: Set up various variables based on configuration data ############################################################################### @@ -1686,10 +1673,6 @@ TABLEGEN_INC_FILES_COMMON = 1 endif -ifdef LLVMC_BASED_DRIVER -TABLEGEN_INC_FILES_COMMON = 1 -endif - ifdef TABLEGEN_INC_FILES_COMMON INCFiles := $(filter %.inc,$(BUILT_SOURCES)) @@ -1805,27 +1788,6 @@ endif # TARGET -ifdef LLVMC_BASED_DRIVER - -TDSrc := $(sort $(strip $(wildcard $(PROJ_SRC_DIR)/*.td)) \ - $(strip $(wildcard $(PROJ_OBJ_DIR)/*.td))) - -TDCommon := $(strip $(wildcard \ - $(LLVM_SRC_ROOT)/include/llvm/CompilerDriver/*.td)) - -TDFiles := $(TDSrc) $(TDCommon) - -$(INCTMPFiles) : $(TBLGEN) $(TDFiles) - -$(ObjDir)/%.inc.tmp: %.td $(ObjDir)/.dir - $(Echo) "Building LLVMC compilation graph description with tblgen" - $(Verb) $(TableGen) -gen-llvmc -o $(call SYSPATH, $@) $< - -clean-local:: - -$(Verb) $(RM) -f $(INCFiles) - -endif # LLVMC_BASED_DRIVER - ############################################################################### # OTHER RULES: Other rules needed ############################################################################### Modified: llvm/trunk/docs/FAQ.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/FAQ.html?rev=140124&r1=140123&r2=140124&view=diff ============================================================================== --- llvm/trunk/docs/FAQ.html (original) +++ llvm/trunk/docs/FAQ.html Mon Sep 19 19:42:28 2011 @@ -72,9 +72,6 @@
  • After Subversion update, rebuilding gives the error "No rule to make target".
    • -
  • The llvmc program gives me errors/doesn't - work.
    • -
  • When I compile LLVM-GCC with srcdir == objdir, it fails. Why?
    • @@ -420,16 +417,6 @@
    -

    The llvmc program gives me errors/doesn't - work.

    -
    - -
    -

    llvmc is experimental and isn't really supported. We suggest - using llvm-gcc instead.

    -
    - -

    When I compile LLVM-GCC with srcdir == objdir, it fails. Why?

    Modified: llvm/trunk/docs/GettingStarted.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/GettingStarted.html?rev=140124&r1=140123&r2=140124&view=diff ============================================================================== --- llvm/trunk/docs/GettingStarted.html (original) +++ llvm/trunk/docs/GettingStarted.html Mon Sep 19 19:42:28 2011 @@ -1595,16 +1595,6 @@ href="HowToSubmitABug.html">HowToSubmitABug.html for more information on using bugpoint. -
    llvmc
    -
    The LLVM Compiler Driver. This program can - be configured to utilize both LLVM and non-LLVM compilation tools to enable - pre-processing, translation, optimization, assembly, and linking of programs - all from one command line. llvmc also takes care of processing the - dependent libraries found in bitcode. This reduces the need to get the - traditional -l<name> options right on the command line. Please - note that this tool, while functional, is still experimental and not feature - complete.
    -
    llvm-ar
    The archiver produces an archive containing the given LLVM bitcode files, optionally with an index for faster @@ -1620,9 +1610,9 @@
    llvm-ld
    llvm-ld is a general purpose and extensible linker for LLVM. - This is the linker invoked by llvmc. It performs standard link time - optimizations and allows optimization modules to be loaded and run so that - language specific optimizations can be applied at link time.
    + It performs standard link time optimizations and allows optimization + modules to be loaded and run so that language specific optimizations can + be applied at link time.
    llvm-link
    llvm-link, not surprisingly, links multiple LLVM modules into Modified: llvm/trunk/docs/index.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/index.html?rev=140124&r1=140123&r2=140124&view=diff ============================================================================== --- llvm/trunk/docs/index.html (original) +++ llvm/trunk/docs/index.html Mon Sep 19 19:42:28 2011 @@ -87,7 +87,6 @@ opt, llc, lli, - llvmc llvm-gcc, llvm-g++, bugpoint, From grosbach at apple.com Mon Sep 19 19:46:54 2011 From: grosbach at apple.com (Jim Grosbach) Date: Tue, 20 Sep 2011 00:46:54 -0000 Subject: [llvm-commits] [llvm] r140125 - in /llvm/trunk: lib/Target/ARM/ARMInstrThumb2.td lib/Target/ARM/AsmParser/ARMAsmParser.cpp test/MC/ARM/basic-thumb2-instructions.s Message-ID: <20110920004654.AA1322A6C12C@llvm.org> Author: grosbach Date: Mon Sep 19 19:46:54 2011 New Revision: 140125 URL: http://llvm.org/viewvc/llvm-project?rev=140125&view=rev Log: Thumb2 assembly parsing and encoding for UXTAB/UXTAB16/UXTH/UXTB/UXTB16/UXTH. Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=140125&r1=140124&r2=140125&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Mon Sep 19 19:46:54 2011 @@ -3941,7 +3941,27 @@ def : t2InstAlias<"sxth${p} $Rd, $Rm", (t2SXTH rGPR:$Rd, rGPR:$Rm, 0, pred:$p)>; +def : t2InstAlias<"uxtab${p} $Rd, $Rn, $Rm", + (t2UXTAB rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, 0, pred:$p)>; +def : t2InstAlias<"uxtah${p} $Rd, $Rn, $Rm", + (t2UXTAH rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, 0, pred:$p)>; +def : t2InstAlias<"uxtab16${p} $Rd, $Rn, $Rm", + (t2UXTAB16 rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, 0, pred:$p)>; +def : t2InstAlias<"uxtb${p} $Rd, $Rm", + (t2UXTB rGPR:$Rd, rGPR:$Rm, 0, pred:$p)>; +def : t2InstAlias<"uxtb16${p} $Rd, $Rm", + (t2UXTB16 rGPR:$Rd, rGPR:$Rm, 0, pred:$p)>; +def : t2InstAlias<"uxth${p} $Rd, $Rm", + (t2UXTH rGPR:$Rd, rGPR:$Rm, 0, pred:$p)>; + // Extend instruction w/o the ".w" optional width specifier. +def : t2InstAlias<"uxtb${p} $Rd, $Rm$rot", + (t2UXTB rGPR:$Rd, rGPR:$Rm, rot_imm:$rot, pred:$p)>; +def : t2InstAlias<"uxtb16${p} $Rd, $Rm$rot", + (t2UXTB16 rGPR:$Rd, rGPR:$Rm, rot_imm:$rot, pred:$p)>; +def : t2InstAlias<"uxth${p} $Rd, $Rm$rot", + (t2UXTH rGPR:$Rd, rGPR:$Rm, rot_imm:$rot, pred:$p)>; + def : t2InstAlias<"sxtb${p} $Rd, $Rm$rot", (t2SXTB rGPR:$Rd, rGPR:$Rm, rot_imm:$rot, pred:$p)>; def : t2InstAlias<"sxtb16${p} $Rd, $Rm$rot", Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp?rev=140125&r1=140124&r2=140125&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp (original) +++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Mon Sep 19 19:46:54 2011 @@ -3888,7 +3888,9 @@ break; } case ARM::t2SXTH: - case ARM::t2SXTB: { + case ARM::t2SXTB: + case ARM::t2UXTH: + case ARM::t2UXTB: { // If we can use the 16-bit encoding and the user didn't explicitly // request the 32-bit variant, transform it here. if (isARMLowRegister(Inst.getOperand(0).getReg()) && @@ -3896,8 +3898,14 @@ Inst.getOperand(2).getImm() == 0 && (!static_cast(Operands[2])->isToken() || static_cast(Operands[2])->getToken() != ".w")) { - unsigned NewOpc = (Inst.getOpcode() == ARM::t2SXTH) ? - ARM::tSXTH : ARM::tSXTB; + unsigned NewOpc; + switch (Inst.getOpcode()) { + default: llvm_unreachable("Illegal opcode!"); + case ARM::t2SXTH: NewOpc = ARM::tSXTH; break; + case ARM::t2SXTB: NewOpc = ARM::tSXTB; break; + case ARM::t2UXTH: NewOpc = ARM::tUXTH; break; + case ARM::t2UXTB: NewOpc = ARM::tUXTB; break; + } // The operands aren't the same for thumb1 (no rotate operand). MCInst TmpInst; TmpInst.setOpcode(NewOpc); Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s?rev=140125&r1=140124&r2=140125&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s (original) +++ llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Mon Sep 19 19:46:54 2011 @@ -2946,3 +2946,121 @@ @ CHECK: ite hi @ encoding: [0x8c,0xbf] @ CHECK: usub16hi r1, r1, r3 @ encoding: [0xd1,0xfa,0x43,0xf1] @ CHECK: usub8ls r9, r2, r3 @ encoding: [0xc2,0xfa,0x43,0xf9] + + + at ------------------------------------------------------------------------------ +@ UXTAB + at ------------------------------------------------------------------------------ + uxtab r2, r3, r4 + uxtab r4, r5, r6, ror #0 + it lt + uxtablt r6, r2, r9, ror #8 + uxtab r5, r1, r4, ror #16 + uxtab r7, r8, r3, ror #24 + +@ CHECK: uxtab r2, r3, r4 @ encoding: [0x53,0xfa,0x84,0xf2] +@ CHECK: uxtab r4, r5, r6 @ encoding: [0x55,0xfa,0x86,0xf4] +@ CHECK: it lt @ encoding: [0xb8,0xbf] +@ CHECK: uxtablt r6, r2, r9, ror #8 @ encoding: [0x52,0xfa,0x99,0xf6] +@ CHECK: uxtab r5, r1, r4, ror #16 @ encoding: [0x51,0xfa,0xa4,0xf5] +@ CHECK: uxtab r7, r8, r3, ror #24 @ encoding: [0x58,0xfa,0xb3,0xf7] + + + at ------------------------------------------------------------------------------ +@ UXTAB16 + at ------------------------------------------------------------------------------ + it ge + uxtab16ge r0, r1, r4 + uxtab16 r6, r2, r7, ror #0 + uxtab16 r3, r5, r8, ror #8 + uxtab16 r3, r2, r1, ror #16 + it eq + uxtab16eq r1, r2, r3, ror #24 + +@ CHECK: it ge @ encoding: [0xa8,0xbf] +@ CHECK: uxtab16ge r0, r1, r4 @ encoding: [0x31,0xfa,0x84,0xf0] +@ CHECK: uxtab16 r6, r2, r7 @ encoding: [0x32,0xfa,0x87,0xf6] +@ CHECK: uxtab16 r3, r5, r8, ror #8 @ encoding: [0x35,0xfa,0x98,0xf3] +@ CHECK: uxtab16 r3, r2, r1, ror #16 @ encoding: [0x32,0xfa,0xa1,0xf3] +@ CHECK: it eq @ encoding: [0x08,0xbf] +@ CHECK: uxtab16eq r1, r2, r3, ror #24 @ encoding: [0x32,0xfa,0xb3,0xf1] + + + at ------------------------------------------------------------------------------ +@ UXTAH + at ------------------------------------------------------------------------------ + uxtah r1, r3, r9 + it hi + uxtahhi r6, r1, r6, ror #0 + uxtah r3, r8, r3, ror #8 + it lo + uxtahlo r2, r2, r4, ror #16 + uxtah r9, r3, r3, ror #24 + +@ CHECK: uxtah r1, r3, r9 @ encoding: [0x13,0xfa,0x89,0xf1] +@ CHECK: it hi @ encoding: [0x88,0xbf] +@ CHECK: uxtahhi r6, r1, r6 @ encoding: [0x11,0xfa,0x86,0xf6] +@ CHECK: uxtah r3, r8, r3, ror #8 @ encoding: [0x18,0xfa,0x93,0xf3] +@ CHECK: it lo @ encoding: [0x38,0xbf] +@ CHECK: uxtahlo r2, r2, r4, ror #16 @ encoding: [0x12,0xfa,0xa4,0xf2] +@ CHECK: uxtah r9, r3, r3, ror #24 @ encoding: [0x13,0xfa,0xb3,0xf9] + + + at ------------------------------------------------------------------------------ +@ UXTB + at ------------------------------------------------------------------------------ + it ge + uxtbge r2, r4 + uxtb r5, r6, ror #0 + uxtb r6, r9, ror #8 + it cc + uxtbcc r5, r1, ror #16 + uxtb r8, r3, ror #24 + +@ CHECK: it ge @ encoding: [0xa8,0xbf] +@ CHECK: uxtbge r2, r4 @ encoding: [0xe2,0xb2] +@ CHECK: uxtb r5, r6 @ encoding: [0xf5,0xb2] +@ CHECK: uxtb.w r6, r9, ror #8 @ encoding: [0x5f,0xfa,0x99,0xf6] +@ CHECK: it lo @ encoding: [0x38,0xbf] +@ CHECK: uxtblo.w r5, r1, ror #16 @ encoding: [0x5f,0xfa,0xa1,0xf5] +@ CHECK: uxtb.w r8, r3, ror #24 @ encoding: [0x5f,0xfa,0xb3,0xf8] + + + at ------------------------------------------------------------------------------ +@ UXTB16 + at ------------------------------------------------------------------------------ + uxtb16 r1, r4 + uxtb16 r6, r7, ror #0 + it cs + uxtb16cs r3, r5, ror #8 + uxtb16 r3, r1, ror #16 + it ge + uxtb16ge r2, r3, ror #24 + +@ CHECK: uxtb16 r1, r4 @ encoding: [0x3f,0xfa,0x84,0xf1] +@ CHECK: uxtb16 r6, r7 @ encoding: [0x3f,0xfa,0x87,0xf6] +@ CHECK: it hs @ encoding: [0x28,0xbf] +@ CHECK: uxtb16hs r3, r5, ror #8 @ encoding: [0x3f,0xfa,0x95,0xf3] +@ CHECK: uxtb16 r3, r1, ror #16 @ encoding: [0x3f,0xfa,0xa1,0xf3] +@ CHECK: it ge @ encoding: [0xa8,0xbf] +@ CHECK: uxtb16ge r2, r3, ror #24 @ encoding: [0x3f,0xfa,0xb3,0xf2] + + + at ------------------------------------------------------------------------------ +@ UXTH + at ------------------------------------------------------------------------------ + it ne + uxthne r3, r9 + uxth r1, r6, ror #0 + uxth r3, r8, ror #8 + it le + uxthle r2, r2, ror #16 + uxth r9, r3, ror #24 + +@ CHECK: it ne @ encoding: [0x18,0xbf] +@ CHECK: uxthne.w r3, r9 @ encoding: [0x1f,0xfa,0x89,0xf3] +@ CHECK: uxth r1, r6 @ encoding: [0xb1,0xb2] +@ CHECK: uxth.w r3, r8, ror #8 @ encoding: [0x1f,0xfa,0x98,0xf3] +@ CHECK: it le @ encoding: [0xd8,0xbf] +@ CHECK: uxthle.w r2, r2, ror #16 @ encoding: [0x1f,0xfa,0xa2,0xf2] +@ CHECK: uxth.w r9, r3, ror #24 @ encoding: [0x1f,0xfa,0xb3,0xf9] From grosbach at apple.com Mon Sep 19 19:48:56 2011 From: grosbach at apple.com (Jim Grosbach) Date: Tue, 20 Sep 2011 00:48:56 -0000 Subject: [llvm-commits] [llvm] r140126 - /llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Message-ID: <20110920004856.3112B2A6C12C@llvm.org> Author: grosbach Date: Mon Sep 19 19:48:56 2011 New Revision: 140126 URL: http://llvm.org/viewvc/llvm-project?rev=140126&view=rev Log: Thumb2 assembly parsing and encoding for WFE/WFI/YIELD. Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s?rev=140126&r1=140125&r2=140126&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s (original) +++ llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Mon Sep 19 19:48:56 2011 @@ -3064,3 +3064,23 @@ @ CHECK: it le @ encoding: [0xd8,0xbf] @ CHECK: uxthle.w r2, r2, ror #16 @ encoding: [0x1f,0xfa,0xa2,0xf2] @ CHECK: uxth.w r9, r3, ror #24 @ encoding: [0x1f,0xfa,0xb3,0xf9] + + + at ------------------------------------------------------------------------------ +@ WFE/WFI/YIELD + at ------------------------------------------------------------------------------ + wfe + wfi + yield + itet lt + wfelt + wfige + yieldlt + +@ CHECK: wfe @ encoding: [0x20,0xbf] +@ CHECK: wfi @ encoding: [0x30,0xbf] +@ CHECK: yield @ encoding: [0x10,0xbf] +@ CHECK: itet lt @ encoding: [0xb6,0xbf] +@ CHECK: wfelt @ encoding: [0x20,0xbf] +@ CHECK: wfige @ encoding: [0x30,0xbf] +@ CHECK: yieldlt @ encoding: [0x10,0xbf] From grosbach at apple.com Mon Sep 19 20:03:51 2011 From: grosbach at apple.com (Jim Grosbach) Date: Tue, 20 Sep 2011 01:03:51 -0000 Subject: [llvm-commits] [llvm] r140127 - /llvm/trunk/test/MC/ARM/thumb2.s Message-ID: <20110920010351.462542A6C12C@llvm.org> Author: grosbach Date: Mon Sep 19 20:03:51 2011 New Revision: 140127 URL: http://llvm.org/viewvc/llvm-project?rev=140127&view=rev Log: Nuke obsolete test file. Removed: llvm/trunk/test/MC/ARM/thumb2.s Removed: llvm/trunk/test/MC/ARM/thumb2.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/thumb2.s?rev=140126&view=auto ============================================================================== --- llvm/trunk/test/MC/ARM/thumb2.s (original) +++ llvm/trunk/test/MC/ARM/thumb2.s (removed) @@ -1,337 +0,0 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s -@ XFAIL: * -.code 16 - -@ CHECK: mvn r0, #187 @ encoding: [0xbb,0x00,0x6f,0xf0] - mvn r0, #187 -@ CHECK: mvn r0, #11141290 @ encoding: [0xaa,0x10,0x6f,0xf0] - mvn r0, #11141290 -@ CHECK: mvn r0, #-872363008 @ encoding: [0xcc,0x20,0x6f,0xf0] - mvn r0, #-872363008 -@ CHECK: mvn r0, #1114112 @ encoding: [0x88,0x10,0x6f,0xf4] - mvn r0, #1114112 - -@ CHECK: cmp.w r0, #11141290 @ encoding: [0xaa,0x1f,0xb0,0xf1] - cmp.w r0, #11141290 -@ CHECK: cmp.w r0, #-872363008 @ encoding: [0xcc,0x2f,0xb0,0xf1] - cmp.w r0, #-872363008 -@ CHECK: cmp.w r0, #-572662307 @ encoding: [0xdd,0x3f,0xb0,0xf1] - cmp.w r0, #-572662307 -@ CHECK: cmp.w r0, #1114112 @ encoding: [0x88,0x1f,0xb0,0xf5] - cmp.w r0, #1114112 -@ CHECK: cmp.w r0, r1, lsl #5 @ encoding: [0x41,0x1f,0xb0,0xeb] - cmp.w r0, r1, lsl #5 - -@ CHECK: sxtab r0, r1, r0 @ encoding: [0x80,0xf0,0x41,0xfa] - sxtab r0, r1, r0 @ encoding: [0x80,0xf0,0x41,0xfa] - -@ CHECK: movw r0, #65535 @ encoding: [0xff,0x70,0x4f,0xf6] - movw r0, #65535 -@ CHECK: movw r1, #43777 @ encoding: [0x01,0x31,0x4a,0xf6] - movw r1, #43777 -@ CHECK: movt r1, #427 @ encoding: [0xab,0x11,0xc0,0xf2] - movt r1, #427 -@ CHECK: movw r1, #43792 @ encoding: [0x10,0x31,0x4a,0xf6] - movw r1, #43792 -@ CHECK: movt r1, #4267 @ encoding: [0xab,0x01,0xc0,0xf2] - movt r1, #4267 -@ CHECK: mov.w r0, #66846720 @ encoding: [0x7f,0x70,0x4f,0xf0] - mov.w r0, #66846720 - -@ Aliases w/ the vanilla 'mov' mnemonic, and explicit alternative selection. - mov r2, #0xbf000000 - mov r1, #0x100 - mov r3, #32 - mov.w r3, #32 - movw r3, #32 - -@ CHECK: mov.w r2, #3204448256 @ encoding: [0x4f,0xf0,0x3f,0x42] -@ CHECK: mov.w r1, #256 @ encoding: [0x4f,0xf4,0x80,0x71] -@ CHECK: mov r3, #32 @ encoding: [0x20,0x23] -@ CHECK: mov.w r3, #32 @ encoding: [0x4f,0xf0,0x20,0x03] -@ CHECK: movw r3, #32 @ encoding: [0x40,0xf2,0x20,0x03] - - - - -@ CHECK: rrx r0, r0 @ encoding: [0x30,0x00,0x4f,0xea] - rrx r0, r0 - -@ CHECK: bfc r0, #4, #20 @ encoding: [0x17,0x10,0x6f,0xf3] - bfc r0, #4, #20 -@ CHECK: bfc r0, #0, #23 @ encoding: [0x16,0x00,0x6f,0xf3] - bfc r0, #0, #23 -@ CHECK: bfc r0, #12, #20 @ encoding: [0x1f,0x30,0x6f,0xf3] - bfc r0, #12, #20 - -@ CHECK: sbfx r0, r0, #7, #11 @ encoding: [0xca,0x10,0x40,0xf3] - sbfx r0, r0, #7, #11 -@ CHECK: ubfx r0, r0, #7, #11 @ encoding: [0xca,0x10,0xc0,0xf3] - ubfx r0, r0, #7, #11 - -@ CHECK: mla r0, r0, r1, r2 @ encoding: [0x01,0x20,0x00,0xfb] - mla r0, r0, r1, r2 -@ CHECK: mls r0, r0, r1, r2 @ encoding: [0x11,0x20,0x00,0xfb] - mls r0, r0, r1, r2 - -@ CHECK: smlabt r0, r1, r2, r0 @ encoding: [0x12,0x00,0x11,0xfb] - smlabt r0, r1, r2, r0 - -@ CHECK: clz r0, r0 @ encoding: [0x80,0xf0,0xb0,0xfa] - clz r0, r0 - -@ CHECK: pkhbt r0, r0, r1, lsl #16 @ encoding: [0x01,0x40,0xc0,0xea] - pkhbt r0, r0, r1, lsl #16 -@ CHECK: pkhbt r0, r0, r1, lsl #12 @ encoding: [0x01,0x30,0xc0,0xea] - pkhbt r0, r0, r1, lsl #16 -@ CHECK: pkhbt r0, r0, r1, lsl #18 @ encoding: [0x81,0x40,0xc0,0xea] - pkhbt r0, r0, r1, lsl #18 -@ CHECK: pkhbt r0, r0, r1 @ encoding: [0x01,0x00,0xc0,0xea] - pkhbt r0, r0, r1 -@ CHECK: pkhtb r0, r0, r1, asr #16 @ encoding: [0x21,0x40,0xc0,0xea] - pkhtb r0, r0, r1, asr #16 -@ CHECK: pkhtb r0, r0, r1, asr #12 @ encoding: [0x21,0x30,0xc0,0xea] - pkhtb r0, r0, r1, asr #12 -@ CHECK: pkhtb r0, r0, r1, asr #18 @ encoding: [0xa1,0x40,0xc0,0xea] - pkhtb r0, r0, r1, asr #18 -@ CHECK: pkhtb r0, r0, r1, asr #22 @ encoding: [0xa1,0x50,0xc0,0xea] - pkhtb r0, r0, r1, asr #22 - -@ CHECK: str.w r0, [r1, #4092] @ encoding: [0xfc,0x0f,0xc1,0xf8] - str.w r0, [r1, #4092] -@ CHECK: str r0, [r1, #-128] @ encoding: [0x80,0x0c,0x41,0xf8] - str r0, [r1, #-128] -@ CHECK: str.w r0, [r1, r2, lsl #2] @ encoding: [0x22,0x00,0x41,0xf8 - str.w r0, [r1, r2, lsl #2] - -@ CHECK: ldr.w r0, [r0, #4092] @ encoding: [0xfc,0x0f,0xd0,0xf8] - ldr.w r0, [r0, #4092] -@ CHECK: ldr r0, [r0, #-128] @ encoding: [0x80,0x0c,0x50,0xf8] - ldr r0, [r0, #-128] -@ CHECK: ldr.w r0, [r0, r1, lsl #2] @ encoding: [0x21,0x00,0x50,0xf8] - ldr.w r0, [r0, r1, lsl #2] - -@ CHECK: str r1, [r0, #16]! @ encoding: [0x10,0x1f,0x40,0xf8] - str r1, [r0, #16]! -@ CHECK: strh r1, [r0, #8]! @ encoding: [0x08,0x1f,0x20,0xf8] - strh r1, [r0, #8]! -@ CHECK: strh r2, [r0], #-4 @ encoding: [0x04,0x29,0x20,0xf8] - strh r2, [r0], #-4 -@ CHECK: str r2, [r0], #-4 @ encoding: [0x04,0x29,0x40,0xf8] - str r2, [r0], #-4 - -@ CHECK: ldr r2, [r0, #16]! @ encoding: [0x10,0x2f,0x50,0xf8] - ldr r2, [r0, #16]! -@ CHECK: ldr r2, [r0, #-64]! @ encoding: [0x40,0x2d,0x50,0xf8] - ldr r2, [r0, #-64]! -@ CHECK: ldrsb r2, [r0, #4]! @ encoding: [0x04,0x2f,0x10,0xf9] - ldrsb r2, [r0, #4]! - -@ CHECK: strb.w r0, [r1, #4092] @ encoding: [0xfc,0x0f,0x81,0xf8] - strb.w r0, [r1, #4092] -@ CHECK: strb r0, [r1, #-128] @ encoding: [0x80,0x0c,0x01,0xf8] - strb r0, [r1, #-128] -@ CHECK: strb.w r0, [r1, r2, lsl #2] @ encoding: [0x22,0x00,0x01,0xf8] - strb.w r0, [r1, r2, lsl #2] -@ CHECK: strh.w r0, [r1, #4092] @ encoding: [0xfc,0x0f,0xa1,0xf8] - strh.w r0, [r1, #4092] -@ CHECK: strh r0, [r1, #-128] @ encoding: [0x80,0x0c,0x21,0xf8] - strh r0, [r1, #-128] -@ CHECK: strh r0, [r1, #-128] @ encoding: [0x80,0x0c,0x21,0xf8] - strh r0, [r1, #-128] -@ CHECK: strh.w r0, [r1, r2, lsl #2] @ encoding: [0x22,0x00,0x21,0xf8] - strh.w r0, [r1, r2, lsl #2] - -@ CHECK: ldrb r0, [r0, #-1] @ encoding: [0x01,0x0c,0x10,0xf8] - ldrb r0, [r0, #-1] -@ CHECK: ldrb r0, [r0, #-128] @ encoding: [0x80,0x0c,0x10,0xf8] - ldrb r0, [r0, #-128] -@ CHECK: ldrb.w r0, [r0, r1, lsl #2] @ encoding: [0x21,0x00,0x10,0xf8] - ldrb.w r0, [r0, r1, lsl #2] -@ CHECK: ldrh.w r0, [r0, #2046] @ encoding: [0xfe,0x07,0xb0,0xf8] - ldrh.w r0, [r0, #2046] -@ CHECK: ldrh r0, [r0, #-128] @ encoding: [0x80,0x0c,0x30,0xf8] - ldrh r0, [r0, #-128] -@ CHECK: ldrh.w r0, [r0, r1, lsl #2] @ encoding: [0x21,0x00,0x30,0xf8] - ldrh.w r0, [r0, r1, lsl #2] -@ CHECK: ldrsb.w r0, [r0] @ encoding: [0x00,0x00,0x90,0xf9] - ldrsb.w r0, [r0] -@ CHECK: ldrsh.w r0, [r0] @ encoding: [0x00,0x00,0xb0,0xf9] - ldrsh.w r0, [r0] -@ CHECK: bfi r0, r0, #5, #7 @ encoding: [0x60,0xf3,0x4b,0x10] - bfi r0, r0, #5, #7 -@ CHECK: isb @ encoding: [0xbf,0xf3,0x6f,0x8f] - isb -@ CHECK: mrs r0, cpsr @ encoding: [0xef,0xf3,0x00,0x80] - mrs r0, cpsr -@ CHECK: vmrs r0, fpscr @ encoding: [0xf1,0xee,0x10,0x0a] - vmrs r0, fpscr -@ CHECK: vmrs r0, fpexc @ encoding: [0xf8,0xee,0x10,0x0a] - vmrs r0, fpexc -@ CHECK: vmrs r0, fpsid @ encoding: [0xf0,0xee,0x10,0x0a] - vmrs r0, fpsid - -@ CHECK: vmsr fpscr, r0 @ encoding: [0xe1,0xee,0x10,0x0a] - vmsr fpscr, r0 -@ CHECK: vmsr fpexc, r0 @ encoding: [0xe8,0xee,0x10,0x0a] - vmsr fpexc, r0 -@ CHECK: vmsr fpsid, r0 @ encoding: [0xe0,0xee,0x10,0x0a] - vmsr fpsid, r0 - -@ CHECK: mcr p7, #1, r5, c1, c1, #4 @ encoding: [0x21,0xee,0x91,0x57] - mcr p7, #1, r5, c1, c1, #4 - -@ CHECK: mrc p14, #0, r1, c1, c2, #4 @ encoding: [0x11,0xee,0x92,0x1e] - mrc p14, #0, r1, c1, c2, #4 - -@ CHECK: mcrr p7, #1, r5, r4, c1 @ encoding: [0x44,0xec,0x11,0x57] - mcrr p7, #1, r5, r4, c1 - -@ CHECK: mrrc p7, #1, r5, r4, c1 @ encoding: [0x54,0xec,0x11,0x57] - mrrc p7, #1, r5, r4, c1 - -@ CHECK: mcr2 p7, #1, r5, c1, c1, #4 @ encoding: [0x21,0xfe,0x91,0x57] - mcr2 p7, #1, r5, c1, c1, #4 - -@ CHECK: mrc2 p14, #0, r1, c1, c2, #4 @ encoding: [0x11,0xfe,0x92,0x1e] - mrc2 p14, #0, r1, c1, c2, #4 - -@ CHECK: mcrr2 p7, #1, r5, r4, c1 @ encoding: [0x44,0xfc,0x11,0x57] - mcrr2 p7, #1, r5, r4, c1 - -@ CHECK: mrrc2 p7, #1, r5, r4, c1 @ encoding: [0x54,0xfc,0x11,0x57] - mrrc2 p7, #1, r5, r4, c1 - -@ CHECK: cdp p7, #1, c1, c1, c1, #4 @ encoding: [0x11,0xee,0x81,0x17] - cdp p7, #1, c1, c1, c1, #4 - -@ CHECK: cdp2 p7, #1, c1, c1, c1, #4 @ encoding: [0x11,0xfe,0x81,0x17] - cdp2 p7, #1, c1, c1, c1, #4 - -@ CHECK: clrex @ encoding: [0xbf,0xf3,0x2f,0x8f] - clrex - -@ CHECK: clz r9, r0 @ encoding: [0xb0,0xfa,0x80,0xf9] - clz r9, r0 - -@ CHECK: qadd r1, r2, r3 @ encoding: [0x83,0xfa,0x82,0xf1] - qadd r1, r2, r3 - -@ CHECK: qsub r1, r2, r3 @ encoding: [0x83,0xfa,0xa2,0xf1] - qsub r1, r2, r3 - -@ CHECK: qdadd r1, r2, r3 @ encoding: [0x83,0xfa,0x92,0xf1] - qdadd r1, r2, r3 - -@ CHECK: qdsub r1, r2, r3 @ encoding: [0x83,0xfa,0xb2,0xf1] - qdsub r1, r2, r3 - -@ CHECK: yield.w @ encoding: [0xaf,0xf3,0x01,0x80] - yield.w - -@ CHECK: wfe.w @ encoding: [0xaf,0xf3,0x02,0x80] - wfe.w - -@ CHECK: wfi.w @ encoding: [0xaf,0xf3,0x03,0x80] - wfi.w - -@ CHECK: dmb sy @ encoding: [0xbf,0xf3,0x5f,0x8f] - dmb sy -@ CHECK: dmb st @ encoding: [0xbf,0xf3,0x5e,0x8f] - dmb st -@ CHECK: dmb ish @ encoding: [0xbf,0xf3,0x5b,0x8f] - dmb ish -@ CHECK: dmb ishst @ encoding: [0xbf,0xf3,0x5a,0x8f] - dmb ishst -@ CHECK: dmb nsh @ encoding: [0xbf,0xf3,0x57,0x8f] - dmb nsh -@ CHECK: dmb nshst @ encoding: [0xbf,0xf3,0x56,0x8f] - dmb nshst -@ CHECK: dmb osh @ encoding: [0xbf,0xf3,0x53,0x8f] - dmb osh -@ CHECK: dmb oshst @ encoding: [0xbf,0xf3,0x52,0x8f] - dmb oshst - -@ CHECK: dsb sy @ encoding: [0xbf,0xf3,0x4f,0x8f] - dsb sy -@ CHECK: dsb st @ encoding: [0xbf,0xf3,0x4e,0x8f] - dsb st -@ CHECK: dsb ish @ encoding: [0xbf,0xf3,0x4b,0x8f] - dsb ish -@ CHECK: dsb ishst @ encoding: [0xbf,0xf3,0x4a,0x8f] - dsb ishst -@ CHECK: dsb nsh @ encoding: [0xbf,0xf3,0x47,0x8f] - dsb nsh -@ CHECK: dsb nshst @ encoding: [0xbf,0xf3,0x46,0x8f] - dsb nshst -@ CHECK: dsb osh @ encoding: [0xbf,0xf3,0x43,0x8f] - dsb osh -@ CHECK: dsb oshst @ encoding: [0xbf,0xf3,0x42,0x8f] - dsb oshst - -@ CHECK: cpsie.w aif @ encoding: [0xaf,0xf3,0xe0,0x84] - cpsie.w aif -@ CHECK: cps #15 @ encoding: [0xaf,0xf3,0x0f,0x81] - cps #15 -@ CHECK: cpsie.w if, #10 @ encoding: [0xaf,0xf3,0x6a,0x85] - cpsie.w if, #10 - -@ CHECK: msr cpsr_fc, r0 @ encoding: [0x80,0xf3,0x00,0x89] - msr apsr, r0 -@ CHECK: msr cpsr_s, r0 @ encoding: [0x80,0xf3,0x00,0x84] - msr apsr_g, r0 -@ CHECK: msr cpsr_f, r0 @ encoding: [0x80,0xf3,0x00,0x88] - msr apsr_nzcvq, r0 -@ CHECK: msr cpsr_fs, r0 @ encoding: [0x80,0xf3,0x00,0x8c] - msr apsr_nzcvqg, r0 -@ CHECK: msr cpsr_fc, r0 @ encoding: [0x80,0xf3,0x00,0x89] - msr cpsr_fc, r0 -@ CHECK: msr cpsr_c, r0 @ encoding: [0x80,0xf3,0x00,0x81] - msr cpsr_c, r0 -@ CHECK: msr cpsr_x, r0 @ encoding: [0x80,0xf3,0x00,0x82] - msr cpsr_x, r0 -@ CHECK: msr cpsr_fc, r0 @ encoding: [0x80,0xf3,0x00,0x89] - msr cpsr_fc, r0 -@ CHECK: msr cpsr_fsx, r0 @ encoding: [0x80,0xf3,0x00,0x8e] - msr cpsr_fsx, r0 -@ CHECK: msr spsr_fc, r0 @ encoding: [0x90,0xf3,0x00,0x89] - msr spsr_fc, r0 -@ CHECK: msr spsr_fsxc, r0 @ encoding: [0x90,0xf3,0x00,0x8f] - msr spsr_fsxc, r0 -@ CHECK: msr cpsr_fsxc, r0 @ encoding: [0x80,0xf3,0x00,0x8f] - msr cpsr_fsxc, r0 - -@ CHECK: strexb r0, r1, [r2] @ encoding: [0xc2,0xe8,0x40,0x1f] - strexb r0, r1, [r2] -@ CHECK: strexh r0, r1, [r2] @ encoding: [0xc2,0xe8,0x50,0x1f] - strexh r0, r1, [r2] -@ CHECK: strex r0, r1, [r2] @ encoding: [0x42,0xe8,0x00,0x10] - strex r0, r1, [r2] -@ CHECK: strexd r0, r2, r3, [r1] @ encoding: [0xc1,0xe8,0x70,0x23] - strexd r0, r2, r3, [r1] -@ CHECK: ldrexb r0, [r0] @ encoding: [0xd0,0xe8,0x4f,0x0f] - ldrexb r0, [r0] -@ CHECK: ldrexh r0, [r0] @ encoding: [0xd0,0xe8,0x5f,0x0f] - ldrexh r0, [r0] -@ CHECK: ldrex r0, [r0] @ encoding: [0x50,0xe8,0x00,0x0f] - ldrex r0, [r0] -@ CHECK: ldrexd r0, r1, [r0] @ encoding: [0xd0,0xe8,0x7f,0x01] - ldrexd r0, r1, [r0] -@ CHECK: ssat16 r0, #7, r0 @ encoding: [0x20,0xf3,0x06,0x00] - ssat16 r0, #7, r0 - - orr r1, 0x100 - orr r1, r1, 0x100 - eor r1, 0x100 - eor r1, r1, 0x100 - bic r1, 0x100 - bic r1, r1, 0x100 - -@ CHECK: orr r1, r1, #256 @ encoding: [0x41,0xf4,0x80,0x71] -@ CHECK: orr r1, r1, #256 @ encoding: [0x41,0xf4,0x80,0x71] -@ CHECK: eor r1, r1, #256 @ encoding: [0x81,0xf4,0x80,0x71] -@ CHECK: eor r1, r1, #256 @ encoding: [0x81,0xf4,0x80,0x71] -@ CHECK: bic r1, r1, #256 @ encoding: [0x21,0xf4,0x80,0x71] -@ CHECK: bic r1, r1, #256 @ encoding: [0x21,0xf4,0x80,0x71] - - From isanbard at gmail.com Mon Sep 19 20:08:53 2011 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 20 Sep 2011 01:08:53 -0000 Subject: [llvm-commits] [llvm] r140128 - /llvm/trunk/docs/ExceptionHandling.html Message-ID: <20110920010853.92B1B2A6C12C@llvm.org> Author: void Date: Mon Sep 19 20:08:53 2011 New Revision: 140128 URL: http://llvm.org/viewvc/llvm-project?rev=140128&view=rev Log: Update the EH doc to reflect the new EH model. This basically involved removing references to llvm.eh.exception, llvm.eh.selector, and llvm.eh.resume and replacing them with references to the landingpad and resume instructions. Modified: llvm/trunk/docs/ExceptionHandling.html Modified: llvm/trunk/docs/ExceptionHandling.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ExceptionHandling.html?rev=140128&r1=140127&r2=140128&view=diff ============================================================================== --- llvm/trunk/docs/ExceptionHandling.html (original) +++ llvm/trunk/docs/ExceptionHandling.html Mon Sep 19 20:08:53 2011 @@ -96,8 +96,8 @@ Exception Handling. A description of the exception frame format can be found at Exception - Frames, with details of the DWARF 3 specification at - DWARF 3 Standard. + Frames, with details of the DWARF 4 specification at + DWARF 4 Standard. A description for the C++ exception table formats can be found at Exception Handling Tables.

    @@ -116,10 +116,10 @@ llvm.eh.sjlj.longjmp to handle control flow for exception handling.

    -

    For each function which does exception processing, be it try/catch blocks - or cleanups, that function registers itself on a global frame list. When - exceptions are being unwound, the runtime uses this list to identify which - functions need processing.

    +

    For each function which does exception processing — be + it try/catch blocks or cleanups — that function + registers itself on a global frame list. When exceptions are unwinding, the + runtime uses this list to identify which functions need processing.

    Landing pad selection is encoded in the call site entry of the function context. The runtime returns to the function via @@ -134,6 +134,7 @@ exceptions are thrown. As exceptions are, by their nature, intended for uncommon code paths, DWARF exception handling is generally preferred to SJLJ.

    + @@ -176,8 +177,8 @@ should take place. Actions typically pass control to a landing pad.

    -

    A landing pad corresponds to the code found in the catch portion of - a try/catch sequence. When execution resumes at a landing +

    A landing pad corresponds to the code found in the catch portion of + a try/catch sequence. When execution resumes at a landing pad, it receives the exception structure and a selector corresponding to the type of exception thrown. The selector is then used to determine which catch should actually process the exception.

    @@ -193,11 +194,8 @@
    -

    At the time of this writing, only C++ exception handling support is available - in LLVM. So the remainder of this document will be somewhat C++-centric.

    -

    From the C++ developers perspective, exceptions are defined in terms of the - throw and try/catch statements. In this section + throw and try/catch statements. In this section we will describe the implementation of LLVM exception handling in terms of C++ examples.

    @@ -210,16 +208,19 @@

    Languages that support exception handling typically provide a throw operation to initiate the exception process. Internally, a throw operation - breaks down into two steps. First, a request is made to allocate exception - space for an exception structure. This structure needs to survive beyond the - current activation. This structure will contain the type and value of the - object being thrown. Second, a call is made to the runtime to raise the - exception, passing the exception structure as an argument.

    - -

    In C++, the allocation of the exception structure is done by - the __cxa_allocate_exception runtime function. The exception - raising is handled by __cxa_throw. The type of the exception is - represented using a C++ RTTI structure.

    + breaks down into two steps.

    +
      +
    1. A request is made to allocate exception space for an exception structure. + This structure needs to survive beyond the current activation. This + structure will contain the type and value of the object being thrown.
      2. +
    2. A call is made to the runtime to raise the exception, passing the + exception structure as an argument.
      3. +
    + +

    In C++, the allocation of the exception structure is done by then + __cxa_allocate_exception runtime function. The exception raising is + handled by __cxa_throw. The type of the exception is represented + using a C++ RTTI structure.

    @@ -244,50 +245,36 @@ saves the exception structure reference and then proceeds to select the catch block that corresponds to the type info of the exception object.

    -

    Two LLVM intrinsic functions are used to convey information about the landing - pad to the back end.

    - -
      -
    1. llvm.eh.exception takes no - arguments and returns a pointer to the exception structure. This only - returns a sensible value if called after an invoke has branched - to a landing pad. Due to code generation limitations, it must currently - be called in the landing pad itself.
      2. - -
    2. llvm.eh.selector takes a minimum - of three arguments. The first argument is the reference to the exception - structure. The second argument is a reference to the personality function - to be used for this try/catch sequence. Each of the - remaining arguments is either a reference to the type info for - a catch statement, a filter - expression, or the number zero (0) representing - a cleanup. The exception is tested against the - arguments sequentially from first to last. The result of - the llvm.eh.selector is a - positive number if the exception matched a type info, a negative number if - it matched a filter, and zero if it matched a cleanup. If nothing is - matched, the behaviour of the program - is undefined. This only returns a sensible - value if called after an invoke has branched to a landing pad. - Due to codegen limitations, it must currently be called in the landing pad - itself. If a type info matched, then the selector value is the index of - the type info in the exception table, which can be obtained using the - llvm.eh.typeid.for - intrinsic.
      3. -
    +

    The LLVM landingpad + instruction is used to convey information about the landing pad to the + back end. For C++, the landingpad instruction returns a pointer and + integer pair corresponding to the pointer to the exception structure and the + "selector value" respectively.

    + +

    The landingpad instruction takes a reference to the personality + function to be used for this try/catch sequence. The + remainder of the instruction is a list of catch and filter + clauses. The exception is tested against the clauses sequentially from first + to last. The selector value is a positive number if the exception matched a + type info, a negative number if it matched a filter, and zero if it matched a + cleanup. If nothing is matched, the behaviour of the program + is undefined. If a type info matched, then the + selector value is the index of the type info in the exception table, which + can be obtained using the + llvm.eh.typeid.for intrinsic.

    Once the landing pad has the type info selector, the code branches to the - code for the first catch. The catch then checks the value of the type info + code for the first catch. The catch then checks the value of the type info selector against the index of type info for that catch. Since the type info index is not known until all the type info have been gathered in the backend, the catch code will call the - llvm.eh.typeid.for intrinsic - to determine the index for a given type info. If the catch fails to match - the selector then control is passed on to the next catch. Note: Since the - landing pad will not be used if there is no match in the list of type info on - the call to llvm.eh.selector, then - neither the last catch nor catch all need to perform the check - against the selector.

    + llvm.eh.typeid.for intrinsic to + determine the index for a given type info. If the catch fails to match the + selector then control is passed on to the next catch. Note: Since the landing + pad will not be used if there is no match in the list of type info on the + call to the landingpad + instruction, then neither the last catch nor catch all need to + perform the check against the selector.

    Finally, the entry and exit of catch code is bracketed with calls to __cxa_begin_catch and __cxa_end_catch.

    @@ -318,16 +305,14 @@
    -

    A cleanup is extra code which needs to be run as part of unwinding - a scope. C++ destructors are a prominent example, but other - languages and language extensions provide a variety of different - kinds of cleanup. In general, a landing pad may need to run - arbitrary amounts of cleanup code before actually entering a catch - block. To indicate the presence of cleanups, a landing pad's call - to llvm.eh.selector should - end with the argument i32 0; otherwise, the unwinder will - not stop at the landing pad if there are no catches or filters that - require it to.

    +

    A cleanup is extra code which needs to be run as part of unwinding a scope. + C++ destructors are a prominent example, but other languages and language + extensions provide a variety of different kinds of cleanup. In general, a + landing pad may need to run arbitrary amounts of cleanup code before actually + entering a catch block. To indicate the presence of cleanups, a + landingpad instruction + should have a cleanup clause. Otherwise, the unwinder will not stop at + the landing pad if there are no catches or filters that require it to.

    Do not allow a new exception to propagate out of the execution of a cleanup. This can corrupt the internal state of the unwinder. @@ -337,9 +322,9 @@

    When all cleanups have completed, if the exception is not handled by the current function, resume unwinding by calling the - llvm.eh.resume intrinsic, - passing in the results of llvm.eh.exception and - llvm.eh.selector for the original landing pad.

    + resume instruction, passing in + the results of the landingpad instruction for the original landing + pad.

    @@ -352,21 +337,19 @@

    C++ allows the specification of which exception types can be thrown from a function. To represent this a top level landing pad may exist to filter out - invalid types. To express this in LLVM code the landing pad will - call llvm.eh.selector. The - arguments are a reference to the exception structure, a reference to the - personality function, the length of the filter expression (the number of type - infos plus one), followed by the type infos themselves. - llvm.eh.selector will return a - negative value if the exception does not match any of the type infos. If no - match is found then a call to __cxa_call_unexpected should be made, - otherwise _Unwind_Resume. Each of these functions requires a - reference to the exception structure. Note that the most general form of an - llvm.eh.selector call can contain - any number of type infos, filter expressions and cleanups (though having more - than one cleanup is pointless). The LLVM C++ front-end can generate such - llvm.eh.selector calls due to - inlining creating nested exception handling scopes.

    + invalid types. To express this in LLVM code the + landingpad instruction will + have a filter clause. The clause consists of an array of type infos. + landingpad will return a negative value if the exception does not + match any of the type infos. If no match is found then a call + to __cxa_call_unexpected should be made, otherwise + _Unwind_Resume. Each of these functions requires a reference to the + exception structure. Note that the most general form of a + landingpad instruction can + have any number of catch, cleanup, and filter clauses (though having more + than one cleanup is pointless). The LLVM C++ front-end can generate such + landingpad instructions due + to inlining creating nested exception handling scopes.

    @@ -377,29 +360,27 @@
    -

    The unwinder delegates the decision of whether to stop in a call - frame to that call frame's language-specific personality function. - Not all personalities functions guarantee that they will stop to - perform cleanups: for example, the GNU C++ personality doesn't do - so unless the exception is actually caught somewhere further up the - stack. When using this personality to implement EH for a language - that guarantees that cleanups will always be run, be sure to - indicate a catch-all in the - llvm.eh.selector call +

    The unwinder delegates the decision of whether to stop in a call frame to + that call frame's language-specific personality function. Not all + personalities functions guarantee that they will stop to perform + cleanups. For example, the GNU C++ personality doesn't do so unless the + exception is actually caught somewhere further up the stack. When using this + personality to implement EH for a language that guarantees that cleanups will + always be run, be sure to indicate a catch-all in the + landingpad instruction rather than just cleanups.

    -

    In order for inlining to behave correctly, landing pads must be - prepared to handle selector results that they did not originally - advertise. Suppose that a function catches exceptions of - type A, and it's inlined into a function that catches - exceptions of type B. The inliner will update the - selector for the inlined landing pad to include the fact - that B is caught. If that landing pad assumes that it - will only be entered to catch an A, it's in for a rude - surprise. Consequently, landing pads must test for the selector - results they understand and then resume exception propagation - with the llvm.eh.resume - intrinsic if none of the conditions match.

    +

    In order for inlining to behave correctly, landing pads must be prepared to + handle selector results that they did not originally advertise. Suppose that + a function catches exceptions of type A, and it's inlined into a + function that catches exceptions of type B. The inliner will update + the landingpad instruction for the inlined landing pad to include + the fact that B is caught. If that landing pad assumes that it will + only be entered to catch an A, it's in for a rude surprise. + Consequently, landing pads must test for the selector results they understand + and then resume exception propagation with the + resume instruction if none of + the conditions match.

    @@ -412,69 +393,15 @@
    -

    LLVM uses several intrinsic functions (name prefixed with "llvm.eh") to +

    In addition to the + landingpad and + resume instructions, LLVM uses + several intrinsic functions (name prefixed with "llvm.eh") to provide exception handling information at various points in generated code.

    - llvm.eh.exception -

    - -
    - -
    -  i8* %llvm.eh.exception()
-
    - -

    This intrinsic returns a pointer to the exception structure.

    - -
    - - -

    - llvm.eh.selector -

    - -
    - -
    -  i32 %llvm.eh.selector(i8*, i8*, ...)
-
    - -

    This intrinsic is used to compare the exception with the given type infos, - filters and cleanups.

    - -

    llvm.eh.selector takes a - minimum of three arguments. The first argument is the reference to - the exception structure. The second argument is a reference to the - personality function to be used for this try catch sequence. Each - of the remaining arguments is either a reference to the type info - for a catch statement, a filter - expression, or the number zero representing - a cleanup. The exception is tested against - the arguments sequentially from first to last. The result of - the llvm.eh.selector is a - positive number if the exception matched a type info, a negative - number if it matched a filter, and zero if it matched a cleanup. - If nothing is matched, or if only a cleanup is matched, different - personality functions may or may not cause control to stop at the - landing pad; see the restrictions for - more information. If a type info matched then the selector value - is the index of the type info in the exception table, which can be - obtained using the - llvm.eh.typeid.for intrinsic.

    - -

    If a landing pad containing a call to llvm.eh.selector is - inlined into an invoke instruction, the selector arguments - for the outer landing pad are appended to those of the inlined - landing pad. Consequently, landing pads must be written to ignore - selector values that they did not originally advertise.

    - -
    - - -

    llvm.eh.typeid.for

    @@ -493,33 +420,6 @@

    - llvm.eh.resume -

    - -
    - -
    -  void %llvm.eh.resume(i8*, i32) noreturn
-
    - -

    This intrinsic is used to resume propagation of an exception after - landing at a landing pad. The first argument should be the result - of llvm.eh.exception for that - landing pad, and the second argument should be the result of - llvm.eh.selector. When a call to - this intrinsic is inlined into an invoke, the call is transformed - into a branch to the invoke's unwind destination, using its - arguments in place of the calls - to llvm.eh.exception and - llvm.eh.selector there.

    - -

    This intrinsic is not implicitly nounwind; calls to it - will always throw. It may not be invoked.

    - -
    - - -

    llvm.eh.sjlj.setjmp

    From isanbard at gmail.com Mon Sep 19 20:14:54 2011 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 20 Sep 2011 01:14:54 -0000 Subject: [llvm-commits] [llvm] r140129 - /llvm/trunk/docs/ExceptionHandling.html Message-ID: <20110920011454.DFF142A6C12C@llvm.org> Author: void Date: Mon Sep 19 20:14:54 2011 New Revision: 140129 URL: http://llvm.org/viewvc/llvm-project?rev=140129&view=rev Log: Remove some missed references to dead intrinsics. Modified: llvm/trunk/docs/ExceptionHandling.html Modified: llvm/trunk/docs/ExceptionHandling.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ExceptionHandling.html?rev=140129&r1=140128&r2=140129&view=diff ============================================================================== --- llvm/trunk/docs/ExceptionHandling.html (original) +++ llvm/trunk/docs/ExceptionHandling.html Mon Sep 19 20:14:54 2011 @@ -33,9 +33,6 @@
  • Exception Handling Intrinsics
      -
    1. llvm.eh.exception
      2. -
    2. llvm.eh.selector
      3. -
    3. llvm.eh.resume
    4. llvm.eh.typeid.for
    5. llvm.eh.sjlj.setjmp
    6. llvm.eh.sjlj.longjmp
      7. @@ -413,8 +410,8 @@

      This intrinsic returns the type info index in the exception table of the current function. This value can be used to compare against the result - of llvm.eh.selector. The single - argument is a reference to a type info.

      + of landingpad instruction. + The single argument is a reference to a type info.

    • From benny.kra at googlemail.com Mon Sep 19 21:46:54 2011 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Tue, 20 Sep 2011 02:46:54 -0000 Subject: [llvm-commits] [llvm] r140132 - in /llvm/trunk: include/llvm/CompilerDriver/ lib/CompilerDriver/ test/CodeGen/X86/SIMD/ test/LLVMC/ tools/llvm2cpp/ tools/llvmc/ Message-ID: <20110920024654.F15422A6C12C@llvm.org> Author: d0k Date: Mon Sep 19 21:46:54 2011 New Revision: 140132 URL: http://llvm.org/viewvc/llvm-project?rev=140132&view=rev Log: Remove empty directories. Removed: llvm/trunk/include/llvm/CompilerDriver/ llvm/trunk/lib/CompilerDriver/ llvm/trunk/test/CodeGen/X86/SIMD/ llvm/trunk/test/LLVMC/ llvm/trunk/tools/llvm2cpp/ llvm/trunk/tools/llvmc/ From atrick at apple.com Mon Sep 19 22:06:13 2011 From: atrick at apple.com (Andrew Trick) Date: Tue, 20 Sep 2011 03:06:13 -0000 Subject: [llvm-commits] [llvm] r140133 - in /llvm/trunk/lib: CodeGen/SelectionDAG/InstrEmitter.cpp CodeGen/SelectionDAG/SelectionDAGISel.cpp Target/ARM/ARMISelLowering.cpp Message-ID: <20110920030613.AF2122A6C12C@llvm.org> Author: atrick Date: Mon Sep 19 22:06:13 2011 New Revision: 140133 URL: http://llvm.org/viewvc/llvm-project?rev=140133&view=rev Log: whitespace Modified: llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp?rev=140133&r1=140132&r2=140133&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp Mon Sep 19 22:06:13 2011 @@ -87,7 +87,7 @@ UI != E; ++UI) { SDNode *User = *UI; bool Match = true; - if (User->getOpcode() == ISD::CopyToReg && + if (User->getOpcode() == ISD::CopyToReg && User->getOperand(2).getNode() == Node && User->getOperand(2).getResNo() == ResNo) { unsigned DestReg = cast(User->getOperand(1))->getReg(); @@ -139,7 +139,7 @@ } else { DstRC = TLI->getRegClassFor(VT); } - + // If all uses are reading from the src physical register and copying the // register is either impossible or very expensive, then don't create a copy. if (MatchReg && SrcRC->getCopyCost() < 0) { @@ -167,7 +167,7 @@ return 0; SDNode *User = *Node->use_begin(); - if (User->getOpcode() == ISD::CopyToReg && + if (User->getOpcode() == ISD::CopyToReg && User->getOperand(2).getNode() == Node && User->getOperand(2).getResNo() == ResNo) { unsigned Reg = cast(User->getOperand(1))->getReg(); @@ -202,7 +202,7 @@ for (SDNode::use_iterator UI = Node->use_begin(), E = Node->use_end(); UI != E; ++UI) { SDNode *User = *UI; - if (User->getOpcode() == ISD::CopyToReg && + if (User->getOpcode() == ISD::CopyToReg && User->getOperand(2).getNode() == Node && User->getOperand(2).getResNo() == i) { unsigned Reg = cast(User->getOperand(1))->getReg(); @@ -326,7 +326,7 @@ /// AddOperand - Add the specified operand to the specified machine instr. II /// specifies the instruction information for the node, and IIOpNum is the -/// operand number (in the II) that we are adding. IIOpNum and II are used for +/// operand number (in the II) that we are adding. IIOpNum and II are used for /// assertions only. void InstrEmitter::AddOperand(MachineInstr *MI, SDValue Op, unsigned IIOpNum, @@ -365,7 +365,7 @@ Align = TM->getTargetData()->getTypeAllocSize(Type); } } - + unsigned Idx; MachineConstantPool *MCP = MF->getConstantPool(); if (CP->isMachineConstantPoolEntry()) @@ -406,18 +406,18 @@ /// EmitSubregNode - Generate machine code for subreg nodes. /// -void InstrEmitter::EmitSubregNode(SDNode *Node, +void InstrEmitter::EmitSubregNode(SDNode *Node, DenseMap &VRBaseMap, bool IsClone, bool IsCloned) { unsigned VRBase = 0; unsigned Opc = Node->getMachineOpcode(); - + // If the node is only used by a CopyToReg and the dest reg is a vreg, use // the CopyToReg'd destination register instead of creating a new vreg. for (SDNode::use_iterator UI = Node->use_begin(), E = Node->use_end(); UI != E; ++UI) { SDNode *User = *UI; - if (User->getOpcode() == ISD::CopyToReg && + if (User->getOpcode() == ISD::CopyToReg && User->getOperand(2).getNode() == Node) { unsigned DestReg = cast(User->getOperand(1))->getReg(); if (TargetRegisterInfo::isVirtualRegister(DestReg)) { @@ -426,7 +426,7 @@ } } } - + if (Opc == TargetOpcode::EXTRACT_SUBREG) { // EXTRACT_SUBREG is lowered as %dst = COPY %src:sub unsigned SubIdx = cast(Node->getOperand(1))->getZExtValue(); @@ -498,7 +498,7 @@ // Create the insert_subreg or subreg_to_reg machine instruction. MachineInstr *MI = BuildMI(*MF, Node->getDebugLoc(), TII->get(Opc)); MI->addOperand(MachineOperand::CreateReg(VRBase, true)); - + // If creating a subreg_to_reg, then the first input operand // is an implicit value immediate, otherwise it's a register if (Opc == TargetOpcode::SUBREG_TO_REG) { @@ -514,7 +514,7 @@ MBB->insert(InsertPos, MI); } else llvm_unreachable("Node is not insert_subreg, extract_subreg, or subreg_to_reg"); - + SDValue Op(Node, 0); bool isNew = VRBaseMap.insert(std::make_pair(Op, VRBase)).second; (void)isNew; // Silence compiler warning. @@ -643,9 +643,9 @@ EmitMachineNode(SDNode *Node, bool IsClone, bool IsCloned, DenseMap &VRBaseMap) { unsigned Opc = Node->getMachineOpcode(); - + // Handle subreg insert/extract specially - if (Opc == TargetOpcode::EXTRACT_SUBREG || + if (Opc == TargetOpcode::EXTRACT_SUBREG || Opc == TargetOpcode::INSERT_SUBREG || Opc == TargetOpcode::SUBREG_TO_REG) { EmitSubregNode(Node, VRBaseMap, IsClone, IsCloned); @@ -667,7 +667,7 @@ if (Opc == TargetOpcode::IMPLICIT_DEF) // We want a unique VR for each IMPLICIT_DEF use. return; - + const MCInstrDesc &II = TII->get(Opc); unsigned NumResults = CountResults(Node); unsigned NodeOperands = CountOperands(Node); @@ -712,12 +712,12 @@ // Then mark unused registers as dead. MI->setPhysRegsDeadExcept(UsedRegs, *TRI); } - + // Add result register values for things that are defined by this // instruction. if (NumResults) CreateVirtualRegisters(Node, MI, II, IsClone, IsCloned, VRBaseMap); - + // Emit all of the actual operands of this instruction, adding them to the // instruction as appropriate. bool HasOptPRefs = II.getNumDefs() > NumResults; @@ -751,7 +751,7 @@ MI->addRegisterDead(Reg, TRI); } } - + // If the instruction has implicit defs and the node doesn't, mark the // implicit def as dead. If the node has any glue outputs, we don't do this // because we don't know what implicit defs are being used by glued nodes. @@ -792,7 +792,7 @@ SrcReg = R->getReg(); else SrcReg = getVR(SrcVal, VRBaseMap); - + unsigned DestReg = cast(Node->getOperand(1))->getReg(); if (SrcReg == DestReg) // Coalesced away the copy? Ignore. break; @@ -812,12 +812,12 @@ TII->get(TargetOpcode::EH_LABEL)).addSym(S); break; } - + case ISD::INLINEASM: { unsigned NumOps = Node->getNumOperands(); if (Node->getOperand(NumOps-1).getValueType() == MVT::Glue) --NumOps; // Ignore the glue operand. - + // Create the inline asm machine instruction. MachineInstr *MI = BuildMI(*MF, Node->getDebugLoc(), TII->get(TargetOpcode::INLINEASM)); @@ -826,7 +826,7 @@ SDValue AsmStrV = Node->getOperand(InlineAsm::Op_AsmString); const char *AsmStr = cast(AsmStrV)->getSymbol(); MI->addOperand(MachineOperand::CreateES(AsmStr)); - + // Add the HasSideEffect and isAlignStack bits. int64_t ExtraInfo = cast(Node->getOperand(InlineAsm::Op_ExtraInfo))-> @@ -838,10 +838,10 @@ unsigned Flags = cast(Node->getOperand(i))->getZExtValue(); unsigned NumVals = InlineAsm::getNumOperandRegisters(Flags); - + MI->addOperand(MachineOperand::CreateImm(Flags)); ++i; // Skip the ID value. - + switch (InlineAsm::getKind(Flags)) { default: llvm_unreachable("Bad flags!"); case InlineAsm::Kind_RegDef: @@ -877,13 +877,13 @@ break; } } - + // Get the mdnode from the asm if it exists and add it to the instruction. SDValue MDV = Node->getOperand(InlineAsm::Op_MDNode); const MDNode *MD = cast(MDV)->getMD(); if (MD) MI->addOperand(MachineOperand::CreateMetadata(MD)); - + MBB->insert(InsertPos, MI); break; } Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=140133&r1=140132&r2=140133&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Mon Sep 19 22:06:13 2011 @@ -752,7 +752,7 @@ // isn't one of the folded instructions, then we can't succeed here. Handle // this by scanning the single-use users of the load until we get to FoldInst. unsigned MaxUsers = 6; // Don't scan down huge single-use chains of instrs. - + const Instruction *TheUser = LI->use_back(); while (TheUser != FoldInst && // Scan up until we find FoldInst. // Stay in the right block. @@ -761,15 +761,15 @@ // If there are multiple or no uses of this instruction, then bail out. if (!TheUser->hasOneUse()) return false; - + TheUser = TheUser->use_back(); } - + // If we didn't find the fold instruction, then we failed to collapse the // sequence. if (TheUser != FoldInst) return false; - + // Don't try to fold volatile loads. Target has to deal with alignment // constraints. if (LI->isVolatile()) return false; Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=140133&r1=140132&r2=140133&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Mon Sep 19 22:06:13 2011 @@ -4890,7 +4890,7 @@ // High part of Val1 Ops.push_back(DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Node->getOperand(2), DAG.getIntPtrConstant(1))); - if (NewOp == ARMISD::ATOMCMPXCHG64_DAG) { + if (NewOp == ARMISD::ATOMCMPXCHG64_DAG) { // High part of Val1 Ops.push_back(DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Node->getOperand(3), DAG.getIntPtrConstant(0))); @@ -5410,7 +5410,7 @@ // Note that the registers are explicitly specified because there is not any // way to force the register allocator to allocate a register pair. // - // FIXME: The hardcoded registers are not necessary for Thumb2, but we + // FIXME: The hardcoded registers are not necessary for Thumb2, but we // need to properly enforce the restriction that the two output registers // for ldrexd must be different. BB = loopMBB; @@ -7928,7 +7928,7 @@ return RCPair(0U, ARM::GPRRegisterClass); case 'h': // High regs or no regs. if (Subtarget->isThumb()) - return RCPair(0U, ARM::hGPRRegisterClass); + return RCPair(0U, ARM::hGPRRegisterClass); break; case 'r': return RCPair(0U, ARM::GPRRegisterClass); @@ -7942,15 +7942,15 @@ break; case 'x': if (VT == MVT::f32) - return RCPair(0U, ARM::SPR_8RegisterClass); + return RCPair(0U, ARM::SPR_8RegisterClass); if (VT.getSizeInBits() == 64) - return RCPair(0U, ARM::DPR_8RegisterClass); + return RCPair(0U, ARM::DPR_8RegisterClass); if (VT.getSizeInBits() == 128) - return RCPair(0U, ARM::QPR_8RegisterClass); + return RCPair(0U, ARM::QPR_8RegisterClass); break; case 't': if (VT == MVT::f32) - return RCPair(0U, ARM::SPRRegisterClass); + return RCPair(0U, ARM::SPRRegisterClass); break; } } @@ -7990,12 +7990,12 @@ switch (ConstraintLetter) { case 'j': - // Constant suitable for movw, must be between 0 and - // 65535. - if (Subtarget->hasV6T2Ops()) - if (CVal >= 0 && CVal <= 65535) - break; - return; + // Constant suitable for movw, must be between 0 and + // 65535. + if (Subtarget->hasV6T2Ops()) + if (CVal >= 0 && CVal <= 65535) + break; + return; case 'I': if (Subtarget->isThumb1Only()) { // This must be a constant between 0 and 255, for ADD From atrick at apple.com Mon Sep 19 22:17:40 2011 From: atrick at apple.com (Andrew Trick) Date: Tue, 20 Sep 2011 03:17:40 -0000 Subject: [llvm-commits] [llvm] r140134 - in /llvm/trunk: include/llvm/MC/MCInstrDesc.h lib/CodeGen/SelectionDAG/InstrEmitter.cpp lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp lib/Target/ARM/ARMISelLowering.cpp lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/ARMInstrThumb2.td test/CodeGen/ARM/2011-09-19-cpsr.ll utils/TableGen/CodeGenInstruction.cpp utils/TableGen/CodeGenInstruction.h utils/TableGen/InstrInfoEmitter.cpp Message-ID: <20110920031740.C9E852A6C12C@llvm.org> Author: atrick Date: Mon Sep 19 22:17:40 2011 New Revision: 140134 URL: http://llvm.org/viewvc/llvm-project?rev=140134&view=rev Log: ARM isel bug fix for adds/subs operands. Modified ARMISelLowering::AdjustInstrPostInstrSelection to handle the full gamut of CPSR defs/uses including instructins whose "optional" cc_out operand is not really optional. This allowed removal of the hasPostISelHook to simplify the .td files and make the implementation more robust. Fixes rdar://10137436: sqlite3 miscompile Added: llvm/trunk/test/CodeGen/ARM/2011-09-19-cpsr.ll Modified: llvm/trunk/include/llvm/MC/MCInstrDesc.h llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp llvm/trunk/lib/Target/ARM/ARMInstrInfo.td llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td llvm/trunk/utils/TableGen/CodeGenInstruction.cpp llvm/trunk/utils/TableGen/CodeGenInstruction.h llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp Modified: llvm/trunk/include/llvm/MC/MCInstrDesc.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCInstrDesc.h?rev=140134&r1=140133&r2=140134&view=diff ============================================================================== --- llvm/trunk/include/llvm/MC/MCInstrDesc.h (original) +++ llvm/trunk/include/llvm/MC/MCInstrDesc.h Mon Sep 19 22:17:40 2011 @@ -477,14 +477,6 @@ return Flags & (1 << MCID::UsesCustomInserter); } - /// hasPostISelHook - Return true if this instruction requires *adjustment* - /// after instruction selection by calling a target hook. For example, this - /// can be used to fill in ARM 's' optional operand depending on whether - /// the conditional flag register is used. - bool hasPostISelHook() const { - return Flags & (1 << MCID::HasPostISelHook); - } - /// isRematerializable - Returns true if this instruction is a candidate for /// remat. This flag is deprecated, please don't use it anymore. If this /// flag is set, the isReallyTriviallyReMaterializable() method is called to Modified: llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp?rev=140134&r1=140133&r2=140134&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp Mon Sep 19 22:17:40 2011 @@ -763,8 +763,7 @@ } // Run post-isel target hook to adjust this instruction if needed. - if (II.hasPostISelHook()) - TLI->AdjustInstrPostInstrSelection(MI, Node); + TLI->AdjustInstrPostInstrSelection(MI, Node); } /// EmitSpecialNode - Generate machine code for a target-independent node and Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=140134&r1=140133&r2=140134&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Mon Sep 19 22:17:40 2011 @@ -179,12 +179,7 @@ void TargetLowering::AdjustInstrPostInstrSelection(MachineInstr *MI, SDNode *Node) const { -#ifndef NDEBUG - dbgs() << "If a target marks an instruction with " - "'hasPostISelHook', it must implement " - "TargetLowering::AdjustInstrPostInstrSelection!"; -#endif - llvm_unreachable(0); + // Do nothing unless the target overrides it. } //===----------------------------------------------------------------------===// Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=140134&r1=140133&r2=140134&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Mon Sep 19 22:17:40 2011 @@ -5752,27 +5752,68 @@ } } +/// Generally, ARM instructions may be optionally encoded with a 's' +/// bit. However, some opcodes have a compact encoding that forces an implicit +/// 's' bit. List these exceptions here. +static bool hasForcedCPSRDef(const MCInstrDesc &MCID) { + switch (MCID.getOpcode()) { + case ARM::t2ADDSri: + case ARM::t2ADDSrr: + case ARM::t2ADDSrs: + case ARM::t2SUBSri: + case ARM::t2SUBSrr: + case ARM::t2SUBSrs: + return true; + } + return false; +} + void ARMTargetLowering::AdjustInstrPostInstrSelection(MachineInstr *MI, SDNode *Node) const { - // Adjust potentially 's' setting instructions after isel, i.e. ADC, SBC, - // RSB, RSC. Coming out of isel, they have an implicit CPSR def, but the - // optional operand is not filled in. If the carry bit is used, then change - // the optional operand to CPSR. Otherwise, remove the CPSR implicit def. + // Adjust potentially 's' setting instructions after isel, i.e. ADC, SBC, RSB, + // RSC. Coming out of isel, they have an implicit CPSR def, but the optional + // operand is still set to noreg. If needed, set the optional operand's + // register to CPSR, and remove the redundant implicit def. + const MCInstrDesc &MCID = MI->getDesc(); - if (Node->hasAnyUseOfValue(1)) { - MachineOperand &MO = MI->getOperand(MCID.getNumOperands() - 1); - MO.setReg(ARM::CPSR); - MO.setIsDef(true); - } else { - for (unsigned i = MCID.getNumOperands(), e = MI->getNumOperands(); - i != e; ++i) { - const MachineOperand &MO = MI->getOperand(i); - if (MO.isReg() && MO.isDef() && MO.getReg() == ARM::CPSR) { - MI->RemoveOperand(i); - break; - } + unsigned ccOutIdx = MCID.getNumOperands() - 1; + bool forcedCPSR = hasForcedCPSRDef(MCID); + + // Any ARM instruction that sets the 's' bit should specify an optional + // "cc_out" operand in the last operand position. + if (!MCID.hasOptionalDef() || !MCID.OpInfo[ccOutIdx].isOptionalDef()) { + assert(!forcedCPSR && "Optional cc_out operand required"); + return; + } + // Look for an implicit def of CPSR added by MachineInstr ctor. + bool definesCPSR = false; + bool deadCPSR = false; + for (unsigned i = MCID.getNumOperands(), e = MI->getNumOperands(); + i != e; ++i) { + const MachineOperand &MO = MI->getOperand(i); + if (MO.isReg() && MO.isDef() && MO.getReg() == ARM::CPSR) { + definesCPSR = true; + if (MO.isDead()) + deadCPSR = true; + MI->RemoveOperand(i); + break; } } + if (!definesCPSR) { + assert(!forcedCPSR && "Optional cc_out operand required"); + return; + } + assert(deadCPSR == !Node->hasAnyUseOfValue(1) && "inconsistent dead flag"); + + // If possible, select the encoding that does not set the 's' bit. + if (deadCPSR && !forcedCPSR) + return; + + MachineOperand &MO = MI->getOperand(ccOutIdx); + MO.setReg(ARM::CPSR); + MO.setIsDef(true); + if (deadCPSR) + MO.setIsDead(); } //===----------------------------------------------------------------------===// Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=140134&r1=140133&r2=140134&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Mon Sep 19 22:17:40 2011 @@ -1026,7 +1026,7 @@ } /// AsI1_rbin_s_is - Same as AsI1_rbin_s_is except it sets 's' bit by default. -let hasPostISelHook = 1, isCodeGenOnly = 1, Defs = [CPSR] in { +let isCodeGenOnly = 1, Defs = [CPSR] in { multiclass AsI1_rbin_s_is opcod, string opc, InstrItinClass iii, InstrItinClass iir, InstrItinClass iis, PatFrag opnode, bit Commutable = 0> { @@ -1090,7 +1090,7 @@ } /// AsI1_bin_s_irs - Same as AsI1_bin_irs except it sets the 's' bit by default. -let hasPostISelHook = 1, isCodeGenOnly = 1, Defs = [CPSR] in { +let isCodeGenOnly = 1, Defs = [CPSR] in { multiclass AsI1_bin_s_irs opcod, string opc, InstrItinClass iii, InstrItinClass iir, InstrItinClass iis, PatFrag opnode, bit Commutable = 0> { @@ -1278,7 +1278,7 @@ /// AI1_adde_sube_irs - Define instructions and patterns for adde and sube. multiclass AI1_adde_sube_irs opcod, string opc, PatFrag opnode, string baseOpc, bit Commutable = 0> { - let hasPostISelHook = 1, Defs = [CPSR], Uses = [CPSR] in { + let Defs = [CPSR], Uses = [CPSR] in { def ri : AsI1, @@ -1366,7 +1366,7 @@ /// AI1_rsc_irs - Define instructions and patterns for rsc multiclass AI1_rsc_irs opcod, string opc, PatFrag opnode, string baseOpc> { - let hasPostISelHook = 1, Defs = [CPSR], Uses = [CPSR] in { + let Defs = [CPSR], Uses = [CPSR] in { def ri : AsI1, Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=140134&r1=140133&r2=140134&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Mon Sep 19 22:17:40 2011 @@ -592,7 +592,7 @@ /// T2I_bin_s_irs - Similar to T2I_bin_irs except it sets the 's' bit so the /// instruction modifies the CPSR register. -let hasPostISelHook = 1, isCodeGenOnly = 1, Defs = [CPSR] in { +let isCodeGenOnly = 1, Defs = [CPSR] in { multiclass T2I_bin_s_irs opcod, string opc, InstrItinClass iii, InstrItinClass iir, InstrItinClass iis, PatFrag opnode, bit Commutable = 0> { @@ -738,7 +738,7 @@ /// T2I_rbin_s_is - Same as T2I_rbin_irs except sets 's' bit and the register /// version is not needed since this is only for codegen. -let hasPostISelHook = 1, isCodeGenOnly = 1, Defs = [CPSR] in { +let isCodeGenOnly = 1, Defs = [CPSR] in { multiclass T2I_rbin_s_is opcod, string opc, PatFrag opnode> { // shifted imm def ri : T2sTwoRegImm< @@ -1846,12 +1846,10 @@ IIC_iALUi, IIC_iALUr, IIC_iALUsi, BinOpFrag<(ARMsubc node:$LHS, node:$RHS)>>; -let hasPostISelHook = 1 in { defm t2ADC : T2I_adde_sube_irs<0b1010, "adc", BinOpWithFlagFrag<(ARMadde node:$LHS, node:$RHS, node:$FLAG)>, 1>; defm t2SBC : T2I_adde_sube_irs<0b1011, "sbc", BinOpWithFlagFrag<(ARMsube node:$LHS, node:$RHS, node:$FLAG)>>; -} // RSB defm t2RSB : T2I_rbin_irs <0b1110, "rsb", Added: llvm/trunk/test/CodeGen/ARM/2011-09-19-cpsr.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2011-09-19-cpsr.ll?rev=140134&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/ARM/2011-09-19-cpsr.ll (added) +++ llvm/trunk/test/CodeGen/ARM/2011-09-19-cpsr.ll Mon Sep 19 22:17:40 2011 @@ -0,0 +1,54 @@ +; RUN: llc -march=thumb -mcpu=cortex-a8 < %s +; rdar://problem/10137436: sqlite3 miscompile +; +; CHECK: subs +; CHECK: cmp +; CHECK: it + +target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32" +target triple = "thumbv7-apple-ios4.0.0" + +declare i8* @__memset_chk(i8*, i32, i32, i32) nounwind + +define hidden fastcc i32 @sqlite3VdbeExec(i32* %p) nounwind { +entry: + br label %sqlite3VarintLen.exit7424 + +sqlite3VarintLen.exit7424: ; preds = %do.body.i7423 + br label %do.body.i + +do.body.i: ; preds = %do.body.i, %sqlite3VarintLen.exit7424 + br i1 undef, label %do.body.i, label %sqlite3VarintLen.exit + +sqlite3VarintLen.exit: ; preds = %do.body.i + %sub2322 = add i64 undef, undef + br i1 undef, label %too_big, label %if.end2327 + +if.end2327: ; preds = %sqlite3VarintLen.exit + br i1 undef, label %if.end2341, label %no_mem + +if.end2341: ; preds = %if.end2327 + br label %for.body2355 + +for.body2355: ; preds = %for.body2355, %if.end2341 + %add2366 = add nsw i32 undef, undef + br i1 undef, label %for.body2377, label %for.body2355 + +for.body2377: ; preds = %for.body2355 + %conv23836154 = zext i32 %add2366 to i64 + %sub2384 = sub i64 %sub2322, %conv23836154 + %conv2385 = trunc i64 %sub2384 to i32 + %len.0.i = select i1 undef, i32 %conv2385, i32 undef + %sub.i7384 = sub nsw i32 %len.0.i, 0 + %call.i.i7385 = call i8* @__memset_chk(i8* undef, i32 0, i32 %sub.i7384, i32 undef) nounwind + unreachable + +too_big: ; preds = %sqlite3VarintLen.exit + unreachable + +no_mem: ; preds = %if.end2327, %for.body, %entry.no_mem_crit_edge + unreachable + +sqlite3ErrStr.exit: ; preds = %if.then82 + unreachable +} Modified: llvm/trunk/utils/TableGen/CodeGenInstruction.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenInstruction.cpp?rev=140134&r1=140133&r2=140134&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/CodeGenInstruction.cpp (original) +++ llvm/trunk/utils/TableGen/CodeGenInstruction.cpp Mon Sep 19 22:17:40 2011 @@ -309,7 +309,6 @@ isReMaterializable = R->getValueAsBit("isReMaterializable"); hasDelaySlot = R->getValueAsBit("hasDelaySlot"); usesCustomInserter = R->getValueAsBit("usesCustomInserter"); - hasPostISelHook = R->getValueAsBit("hasPostISelHook"); hasCtrlDep = R->getValueAsBit("hasCtrlDep"); isNotDuplicable = R->getValueAsBit("isNotDuplicable"); hasSideEffects = R->getValueAsBit("hasSideEffects"); Modified: llvm/trunk/utils/TableGen/CodeGenInstruction.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenInstruction.h?rev=140134&r1=140133&r2=140134&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/CodeGenInstruction.h (original) +++ llvm/trunk/utils/TableGen/CodeGenInstruction.h Mon Sep 19 22:17:40 2011 @@ -233,7 +233,6 @@ bool isReMaterializable; bool hasDelaySlot; bool usesCustomInserter; - bool hasPostISelHook; bool hasCtrlDep; bool isNotDuplicable; bool hasSideEffects; Modified: llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp?rev=140134&r1=140133&r2=140134&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp Mon Sep 19 22:17:40 2011 @@ -288,7 +288,6 @@ if (Inst.isNotDuplicable) OS << "|(1< References: Message-ID: On Tue, Sep 20, 2011 at 7:57 AM, Liu wrote: > On Tue, Sep 20, 2011 at 2:09 AM, Bruno Cardoso Lopes > wrote: >> Hi, >> >> On Mon, Sep 19, 2011 at 2:35 AM, Liu wrote: >>> Hi all >>> >>> I've add mips64 SubTarget and stubs support to llvm. Please review and checkin. >> >> Overall looks good, please fix the space alignment here: >> >> + ?if ((TheTriple.getArch() == Triple::mips) || >> + ? ? ? ? ? ? ?(TheTriple.getArch() == Triple::mips64)) >> >> Here: >> >> + ? ?TargetRegistry::RegisterMCInstPrinter(TheMips64Target, >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?createMipsMCInstPrinter); >> + ?TargetRegistry::RegisterMCInstPrinter(TheMips64elTarget, >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?createMipsMCInstPrinter); >> >> And here: >> >> +def FeatureMips64 ? ? ?: SubtargetFeature<"mips64", "MipsArchVersion", >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?"Mips64", "Mips64 ISA Support", >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?[FeatureGP64Bit, FeatureFP64Bit, >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? FeatureCondMov, FeatureBitCount]>; >> >> -- >> Bruno Cardoso Lopes >> http://www.brunocardoso.cc >> > > Hi Bruno > > Thanks for review, the space alignment is fixed:) > > > --Liu > Thanks to Akira Hatanaka IsMips32() fixed. --Liu -------------- next part -------------- A non-text attachment was scrubbed... Name: 0001-add-mips64-target-stubs.patch Type: text/x-patch Size: 14708 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110920/0821f3ea/attachment.bin From geek4civic at gmail.com Mon Sep 19 22:53:57 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Tue, 20 Sep 2011 03:53:57 -0000 Subject: [llvm-commits] [llvm] r140135 - in /llvm/trunk/include/llvm/Config: config.h.cmake llvm-config.h.cmake Message-ID: <20110920035357.DAC3E2A6C12C@llvm.org> Author: chapuni Date: Mon Sep 19 22:53:57 2011 New Revision: 140135 URL: http://llvm.org/viewvc/llvm-project?rev=140135&view=rev Log: include/llvm/Config/config.h.cmake: Unbreak CMake build to tweak LLVM_HAS_ATOMICS. Modified: llvm/trunk/include/llvm/Config/config.h.cmake llvm/trunk/include/llvm/Config/llvm-config.h.cmake Modified: llvm/trunk/include/llvm/Config/config.h.cmake URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Config/config.h.cmake?rev=140135&r1=140134&r2=140135&view=diff ============================================================================== --- llvm/trunk/include/llvm/Config/config.h.cmake (original) +++ llvm/trunk/include/llvm/Config/config.h.cmake Mon Sep 19 22:53:57 2011 @@ -567,7 +567,7 @@ #cmakedefine LLVM_MANDIR "${LLVM_MANDIR}" /* Has gcc/MSVC atomic intrinsics */ -#define LLVM_HAS_ATOMICS ${LLVM_HAS_ATOMICS} +#cmakedefine01 LLVM_HAS_ATOMICS /* LLVM architecture name for the native architecture, if available */ #cmakedefine LLVM_NATIVE_ARCH ${LLVM_NATIVE_ARCH} Modified: llvm/trunk/include/llvm/Config/llvm-config.h.cmake URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Config/llvm-config.h.cmake?rev=140135&r1=140134&r2=140135&view=diff ============================================================================== --- llvm/trunk/include/llvm/Config/llvm-config.h.cmake (original) +++ llvm/trunk/include/llvm/Config/llvm-config.h.cmake Mon Sep 19 22:53:57 2011 @@ -47,7 +47,7 @@ #cmakedefine LLVM_MANDIR "${LLVM_MANDIR}" /* Has gcc/MSVC atomic intrinsics */ -#define LLVM_HAS_ATOMICS ${LLVM_HAS_ATOMICS} +#cmakedefine01 LLVM_HAS_ATOMICS /* LLVM architecture name for the native architecture, if available */ #cmakedefine LLVM_NATIVE_ARCH ${LLVM_NATIVE_ARCH} From geek4civic at gmail.com Mon Sep 19 22:54:05 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Tue, 20 Sep 2011 03:54:05 -0000 Subject: [llvm-commits] [llvm] r140136 - in /llvm/trunk/include/llvm/Config: config.h.cmake llvm-config.h.cmake llvm-config.h.in Message-ID: <20110920035405.5ACC42A6C12C@llvm.org> Author: chapuni Date: Mon Sep 19 22:54:05 2011 New Revision: 140136 URL: http://llvm.org/viewvc/llvm-project?rev=140136&view=rev Log: include/llvm/Config: Reorder LLVM_HAS_ATOMICS along config.h.in for consistency. Modified: llvm/trunk/include/llvm/Config/config.h.cmake llvm/trunk/include/llvm/Config/llvm-config.h.cmake llvm/trunk/include/llvm/Config/llvm-config.h.in Modified: llvm/trunk/include/llvm/Config/config.h.cmake URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Config/config.h.cmake?rev=140136&r1=140135&r2=140136&view=diff ============================================================================== --- llvm/trunk/include/llvm/Config/config.h.cmake (original) +++ llvm/trunk/include/llvm/Config/config.h.cmake Mon Sep 19 22:54:05 2011 @@ -551,6 +551,9 @@ /* Installation directory for config files */ #cmakedefine LLVM_ETCDIR "${LLVM_ETCDIR}" +/* Has gcc/MSVC atomic intrinsics */ +#cmakedefine01 LLVM_HAS_ATOMICS + /* Host triple we were built on */ #cmakedefine LLVM_HOSTTRIPLE "${LLVM_HOSTTRIPLE}" @@ -566,9 +569,6 @@ /* Installation directory for man pages */ #cmakedefine LLVM_MANDIR "${LLVM_MANDIR}" -/* Has gcc/MSVC atomic intrinsics */ -#cmakedefine01 LLVM_HAS_ATOMICS - /* LLVM architecture name for the native architecture, if available */ #cmakedefine LLVM_NATIVE_ARCH ${LLVM_NATIVE_ARCH} Modified: llvm/trunk/include/llvm/Config/llvm-config.h.cmake URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Config/llvm-config.h.cmake?rev=140136&r1=140135&r2=140136&view=diff ============================================================================== --- llvm/trunk/include/llvm/Config/llvm-config.h.cmake (original) +++ llvm/trunk/include/llvm/Config/llvm-config.h.cmake Mon Sep 19 22:54:05 2011 @@ -31,6 +31,9 @@ /* Installation directory for config files */ #cmakedefine LLVM_ETCDIR "${LLVM_ETCDIR}" +/* Has gcc/MSVC atomic intrinsics */ +#cmakedefine01 LLVM_HAS_ATOMICS + /* Host triple we were built on */ #cmakedefine LLVM_HOSTTRIPLE "${LLVM_HOSTTRIPLE}" @@ -46,9 +49,6 @@ /* Installation directory for man pages */ #cmakedefine LLVM_MANDIR "${LLVM_MANDIR}" -/* Has gcc/MSVC atomic intrinsics */ -#cmakedefine01 LLVM_HAS_ATOMICS - /* LLVM architecture name for the native architecture, if available */ #cmakedefine LLVM_NATIVE_ARCH ${LLVM_NATIVE_ARCH} Modified: llvm/trunk/include/llvm/Config/llvm-config.h.in URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Config/llvm-config.h.in?rev=140136&r1=140135&r2=140136&view=diff ============================================================================== --- llvm/trunk/include/llvm/Config/llvm-config.h.in (original) +++ llvm/trunk/include/llvm/Config/llvm-config.h.in Mon Sep 19 22:54:05 2011 @@ -31,6 +31,9 @@ /* Installation directory for config files */ #undef LLVM_ETCDIR +/* Has gcc/MSVC atomic intrinsics */ +#undef LLVM_HAS_ATOMICS + /* Host triple we were built on */ #undef LLVM_HOSTTRIPLE @@ -46,9 +49,6 @@ /* Installation directory for man pages */ #undef LLVM_MANDIR -/* Has gcc/MSVC atomic intrinsics */ -#undef LLVM_HAS_ATOMICS - /* LLVM architecture name for the native architecture, if available */ #undef LLVM_NATIVE_ARCH From geek4civic at gmail.com Mon Sep 19 22:54:11 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Tue, 20 Sep 2011 03:54:11 -0000 Subject: [llvm-commits] [llvm] r140137 - /llvm/trunk/include/llvm/Config/llvm-config.h.in Message-ID: <20110920035411.E37D42A6C12C@llvm.org> Author: chapuni Date: Mon Sep 19 22:54:11 2011 New Revision: 140137 URL: http://llvm.org/viewvc/llvm-project?rev=140137&view=rev Log: include/llvm/Config/llvm-config.h.in: Add the entry LLVM_PATH_XDOT_PY, for consistency against llvm-config.h.cmake. Modified: llvm/trunk/include/llvm/Config/llvm-config.h.in Modified: llvm/trunk/include/llvm/Config/llvm-config.h.in URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Config/llvm-config.h.in?rev=140137&r1=140136&r2=140137&view=diff ============================================================================== --- llvm/trunk/include/llvm/Config/llvm-config.h.in (original) +++ llvm/trunk/include/llvm/Config/llvm-config.h.in Mon Sep 19 22:54:11 2011 @@ -97,6 +97,9 @@ /* Define to path to twopi program if found or 'echo twopi' otherwise */ #undef LLVM_PATH_TWOPI +/* Define to path to xdot.py program if found or 'echo xdot.py' otherwise */ +#undef LLVM_PATH_XDOT_PY + /* Installation prefix directory */ #undef LLVM_PREFIX From evan.cheng at apple.com Mon Sep 19 23:55:31 2011 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 19 Sep 2011 21:55:31 -0700 Subject: [llvm-commits] [llvm] r140134 - in /llvm/trunk: include/llvm/MC/MCInstrDesc.h lib/CodeGen/SelectionDAG/InstrEmitter.cpp lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp lib/Target/ARM/ARMISelLowering.cpp lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/ARMInstrThumb2.td test/CodeGen/ARM/2011-09-19-cpsr.ll utils/TableGen/CodeGenInstruction.cpp utils/TableGen/CodeGenInstruction.h utils/TableGen/InstrInfoEmitter.cpp In-Reply-To: <20110920031740.C9E852A6C12C@llvm.org> References: <20110920031740.C9E852A6C12C@llvm.org> Message-ID: Thanks! Just curious, could you have fixed the bug by adding hasPostIselHook = 1 to SUBS? Evan On Sep 19, 2011, at 8:17 PM, Andrew Trick wrote: > Author: atrick > Date: Mon Sep 19 22:17:40 2011 > New Revision: 140134 > > URL: http://llvm.org/viewvc/llvm-project?rev=140134&view=rev > Log: > ARM isel bug fix for adds/subs operands. > > Modified ARMISelLowering::AdjustInstrPostInstrSelection to handle the > full gamut of CPSR defs/uses including instructins whose "optional" > cc_out operand is not really optional. This allowed removal of the > hasPostISelHook to simplify the .td files and make the implementation > more robust. > Fixes rdar://10137436: sqlite3 miscompile > > Added: > llvm/trunk/test/CodeGen/ARM/2011-09-19-cpsr.ll > Modified: > llvm/trunk/include/llvm/MC/MCInstrDesc.h > llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp > llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp > llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp > llvm/trunk/lib/Target/ARM/ARMInstrInfo.td > llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td > llvm/trunk/utils/TableGen/CodeGenInstruction.cpp > llvm/trunk/utils/TableGen/CodeGenInstruction.h > llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp > > Modified: llvm/trunk/include/llvm/MC/MCInstrDesc.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCInstrDesc.h?rev=140134&r1=140133&r2=140134&view=diff > ============================================================================== > --- llvm/trunk/include/llvm/MC/MCInstrDesc.h (original) > +++ llvm/trunk/include/llvm/MC/MCInstrDesc.h Mon Sep 19 22:17:40 2011 > @@ -477,14 +477,6 @@ > return Flags & (1 << MCID::UsesCustomInserter); > } > > - /// hasPostISelHook - Return true if this instruction requires *adjustment* > - /// after instruction selection by calling a target hook. For example, this > - /// can be used to fill in ARM 's' optional operand depending on whether > - /// the conditional flag register is used. > - bool hasPostISelHook() const { > - return Flags & (1 << MCID::HasPostISelHook); > - } > - > /// isRematerializable - Returns true if this instruction is a candidate for > /// remat. This flag is deprecated, please don't use it anymore. If this > /// flag is set, the isReallyTriviallyReMaterializable() method is called to > > Modified: llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp?rev=140134&r1=140133&r2=140134&view=diff > ============================================================================== > --- llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp (original) > +++ llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp Mon Sep 19 22:17:40 2011 > @@ -763,8 +763,7 @@ > } > > // Run post-isel target hook to adjust this instruction if needed. > - if (II.hasPostISelHook()) > - TLI->AdjustInstrPostInstrSelection(MI, Node); > + TLI->AdjustInstrPostInstrSelection(MI, Node); > } > > /// EmitSpecialNode - Generate machine code for a target-independent node and > > Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=140134&r1=140133&r2=140134&view=diff > ============================================================================== > --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original) > +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Mon Sep 19 22:17:40 2011 > @@ -179,12 +179,7 @@ > > void TargetLowering::AdjustInstrPostInstrSelection(MachineInstr *MI, > SDNode *Node) const { > -#ifndef NDEBUG > - dbgs() << "If a target marks an instruction with " > - "'hasPostISelHook', it must implement " > - "TargetLowering::AdjustInstrPostInstrSelection!"; > -#endif > - llvm_unreachable(0); > + // Do nothing unless the target overrides it. > } > > //===----------------------------------------------------------------------===// > > Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=140134&r1=140133&r2=140134&view=diff > ============================================================================== > --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original) > +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Mon Sep 19 22:17:40 2011 > @@ -5752,27 +5752,68 @@ > } > } > > +/// Generally, ARM instructions may be optionally encoded with a 's' > +/// bit. However, some opcodes have a compact encoding that forces an implicit > +/// 's' bit. List these exceptions here. > +static bool hasForcedCPSRDef(const MCInstrDesc &MCID) { > + switch (MCID.getOpcode()) { > + case ARM::t2ADDSri: > + case ARM::t2ADDSrr: > + case ARM::t2ADDSrs: > + case ARM::t2SUBSri: > + case ARM::t2SUBSrr: > + case ARM::t2SUBSrs: > + return true; > + } > + return false; > +} > + > void ARMTargetLowering::AdjustInstrPostInstrSelection(MachineInstr *MI, > SDNode *Node) const { > - // Adjust potentially 's' setting instructions after isel, i.e. ADC, SBC, > - // RSB, RSC. Coming out of isel, they have an implicit CPSR def, but the > - // optional operand is not filled in. If the carry bit is used, then change > - // the optional operand to CPSR. Otherwise, remove the CPSR implicit def. > + // Adjust potentially 's' setting instructions after isel, i.e. ADC, SBC, RSB, > + // RSC. Coming out of isel, they have an implicit CPSR def, but the optional > + // operand is still set to noreg. If needed, set the optional operand's > + // register to CPSR, and remove the redundant implicit def. > + > const MCInstrDesc &MCID = MI->getDesc(); > - if (Node->hasAnyUseOfValue(1)) { > - MachineOperand &MO = MI->getOperand(MCID.getNumOperands() - 1); > - MO.setReg(ARM::CPSR); > - MO.setIsDef(true); > - } else { > - for (unsigned i = MCID.getNumOperands(), e = MI->getNumOperands(); > - i != e; ++i) { > - const MachineOperand &MO = MI->getOperand(i); > - if (MO.isReg() && MO.isDef() && MO.getReg() == ARM::CPSR) { > - MI->RemoveOperand(i); > - break; > - } > + unsigned ccOutIdx = MCID.getNumOperands() - 1; > + bool forcedCPSR = hasForcedCPSRDef(MCID); > + > + // Any ARM instruction that sets the 's' bit should specify an optional > + // "cc_out" operand in the last operand position. > + if (!MCID.hasOptionalDef() || !MCID.OpInfo[ccOutIdx].isOptionalDef()) { > + assert(!forcedCPSR && "Optional cc_out operand required"); > + return; > + } > + // Look for an implicit def of CPSR added by MachineInstr ctor. > + bool definesCPSR = false; > + bool deadCPSR = false; > + for (unsigned i = MCID.getNumOperands(), e = MI->getNumOperands(); > + i != e; ++i) { > + const MachineOperand &MO = MI->getOperand(i); > + if (MO.isReg() && MO.isDef() && MO.getReg() == ARM::CPSR) { > + definesCPSR = true; > + if (MO.isDead()) > + deadCPSR = true; > + MI->RemoveOperand(i); > + break; > } > } > + if (!definesCPSR) { > + assert(!forcedCPSR && "Optional cc_out operand required"); > + return; > + } > + assert(deadCPSR == !Node->hasAnyUseOfValue(1) && "inconsistent dead flag"); > + > + // If possible, select the encoding that does not set the 's' bit. > + if (deadCPSR && !forcedCPSR) > + return; > + > + MachineOperand &MO = MI->getOperand(ccOutIdx); > + MO.setReg(ARM::CPSR); > + MO.setIsDef(true); > + if (deadCPSR) > + MO.setIsDead(); > } > > //===----------------------------------------------------------------------===// > > Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=140134&r1=140133&r2=140134&view=diff > ============================================================================== > --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) > +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Mon Sep 19 22:17:40 2011 > @@ -1026,7 +1026,7 @@ > } > > /// AsI1_rbin_s_is - Same as AsI1_rbin_s_is except it sets 's' bit by default. > -let hasPostISelHook = 1, isCodeGenOnly = 1, Defs = [CPSR] in { > +let isCodeGenOnly = 1, Defs = [CPSR] in { > multiclass AsI1_rbin_s_is opcod, string opc, > InstrItinClass iii, InstrItinClass iir, InstrItinClass iis, > PatFrag opnode, bit Commutable = 0> { > @@ -1090,7 +1090,7 @@ > } > > /// AsI1_bin_s_irs - Same as AsI1_bin_irs except it sets the 's' bit by default. > -let hasPostISelHook = 1, isCodeGenOnly = 1, Defs = [CPSR] in { > +let isCodeGenOnly = 1, Defs = [CPSR] in { > multiclass AsI1_bin_s_irs opcod, string opc, > InstrItinClass iii, InstrItinClass iir, InstrItinClass iis, > PatFrag opnode, bit Commutable = 0> { > @@ -1278,7 +1278,7 @@ > /// AI1_adde_sube_irs - Define instructions and patterns for adde and sube. > multiclass AI1_adde_sube_irs opcod, string opc, PatFrag opnode, > string baseOpc, bit Commutable = 0> { > - let hasPostISelHook = 1, Defs = [CPSR], Uses = [CPSR] in { > + let Defs = [CPSR], Uses = [CPSR] in { > def ri : AsI1 DPFrm, IIC_iALUi, opc, "\t$Rd, $Rn, $imm", > [(set GPR:$Rd, CPSR, (opnode GPR:$Rn, so_imm:$imm, CPSR))]>, > @@ -1366,7 +1366,7 @@ > /// AI1_rsc_irs - Define instructions and patterns for rsc > multiclass AI1_rsc_irs opcod, string opc, PatFrag opnode, > string baseOpc> { > - let hasPostISelHook = 1, Defs = [CPSR], Uses = [CPSR] in { > + let Defs = [CPSR], Uses = [CPSR] in { > def ri : AsI1 DPFrm, IIC_iALUi, opc, "\t$Rd, $Rn, $imm", > [(set GPR:$Rd, CPSR, (opnode so_imm:$imm, GPR:$Rn, CPSR))]>, > > Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=140134&r1=140133&r2=140134&view=diff > ============================================================================== > --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) > +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Mon Sep 19 22:17:40 2011 > @@ -592,7 +592,7 @@ > > /// T2I_bin_s_irs - Similar to T2I_bin_irs except it sets the 's' bit so the > /// instruction modifies the CPSR register. > -let hasPostISelHook = 1, isCodeGenOnly = 1, Defs = [CPSR] in { > +let isCodeGenOnly = 1, Defs = [CPSR] in { > multiclass T2I_bin_s_irs opcod, string opc, > InstrItinClass iii, InstrItinClass iir, InstrItinClass iis, > PatFrag opnode, bit Commutable = 0> { > @@ -738,7 +738,7 @@ > > /// T2I_rbin_s_is - Same as T2I_rbin_irs except sets 's' bit and the register > /// version is not needed since this is only for codegen. > -let hasPostISelHook = 1, isCodeGenOnly = 1, Defs = [CPSR] in { > +let isCodeGenOnly = 1, Defs = [CPSR] in { > multiclass T2I_rbin_s_is opcod, string opc, PatFrag opnode> { > // shifted imm > def ri : T2sTwoRegImm< > @@ -1846,12 +1846,10 @@ > IIC_iALUi, IIC_iALUr, IIC_iALUsi, > BinOpFrag<(ARMsubc node:$LHS, node:$RHS)>>; > > -let hasPostISelHook = 1 in { > defm t2ADC : T2I_adde_sube_irs<0b1010, "adc", > BinOpWithFlagFrag<(ARMadde node:$LHS, node:$RHS, node:$FLAG)>, 1>; > defm t2SBC : T2I_adde_sube_irs<0b1011, "sbc", > BinOpWithFlagFrag<(ARMsube node:$LHS, node:$RHS, node:$FLAG)>>; > -} > > // RSB > defm t2RSB : T2I_rbin_irs <0b1110, "rsb", > > Added: llvm/trunk/test/CodeGen/ARM/2011-09-19-cpsr.ll > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2011-09-19-cpsr.ll?rev=140134&view=auto > ============================================================================== > --- llvm/trunk/test/CodeGen/ARM/2011-09-19-cpsr.ll (added) > +++ llvm/trunk/test/CodeGen/ARM/2011-09-19-cpsr.ll Mon Sep 19 22:17:40 2011 > @@ -0,0 +1,54 @@ > +; RUN: llc -march=thumb -mcpu=cortex-a8 < %s > +; rdar://problem/10137436: sqlite3 miscompile > +; > +; CHECK: subs > +; CHECK: cmp > +; CHECK: it > + > +target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32" > +target triple = "thumbv7-apple-ios4.0.0" > + > +declare i8* @__memset_chk(i8*, i32, i32, i32) nounwind > + > +define hidden fastcc i32 @sqlite3VdbeExec(i32* %p) nounwind { > +entry: > + br label %sqlite3VarintLen.exit7424 > + > +sqlite3VarintLen.exit7424: ; preds = %do.body.i7423 > + br label %do.body.i > + > +do.body.i: ; preds = %do.body.i, %sqlite3VarintLen.exit7424 > + br i1 undef, label %do.body.i, label %sqlite3VarintLen.exit > + > +sqlite3VarintLen.exit: ; preds = %do.body.i > + %sub2322 = add i64 undef, undef > + br i1 undef, label %too_big, label %if.end2327 > + > +if.end2327: ; preds = %sqlite3VarintLen.exit > + br i1 undef, label %if.end2341, label %no_mem > + > +if.end2341: ; preds = %if.end2327 > + br label %for.body2355 > + > +for.body2355: ; preds = %for.body2355, %if.end2341 > + %add2366 = add nsw i32 undef, undef > + br i1 undef, label %for.body2377, label %for.body2355 > + > +for.body2377: ; preds = %for.body2355 > + %conv23836154 = zext i32 %add2366 to i64 > + %sub2384 = sub i64 %sub2322, %conv23836154 > + %conv2385 = trunc i64 %sub2384 to i32 > + %len.0.i = select i1 undef, i32 %conv2385, i32 undef > + %sub.i7384 = sub nsw i32 %len.0.i, 0 > + %call.i.i7385 = call i8* @__memset_chk(i8* undef, i32 0, i32 %sub.i7384, i32 undef) nounwind > + unreachable > + > +too_big: ; preds = %sqlite3VarintLen.exit > + unreachable > + > +no_mem: ; preds = %if.end2327, %for.body, %entry.no_mem_crit_edge > + unreachable > + > +sqlite3ErrStr.exit: ; preds = %if.then82 > + unreachable > +} > > Modified: llvm/trunk/utils/TableGen/CodeGenInstruction.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenInstruction.cpp?rev=140134&r1=140133&r2=140134&view=diff > ============================================================================== > --- llvm/trunk/utils/TableGen/CodeGenInstruction.cpp (original) > +++ llvm/trunk/utils/TableGen/CodeGenInstruction.cpp Mon Sep 19 22:17:40 2011 > @@ -309,7 +309,6 @@ > isReMaterializable = R->getValueAsBit("isReMaterializable"); > hasDelaySlot = R->getValueAsBit("hasDelaySlot"); > usesCustomInserter = R->getValueAsBit("usesCustomInserter"); > - hasPostISelHook = R->getValueAsBit("hasPostISelHook"); > hasCtrlDep = R->getValueAsBit("hasCtrlDep"); > isNotDuplicable = R->getValueAsBit("isNotDuplicable"); > hasSideEffects = R->getValueAsBit("hasSideEffects"); > > Modified: llvm/trunk/utils/TableGen/CodeGenInstruction.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenInstruction.h?rev=140134&r1=140133&r2=140134&view=diff > ============================================================================== > --- llvm/trunk/utils/TableGen/CodeGenInstruction.h (original) > +++ llvm/trunk/utils/TableGen/CodeGenInstruction.h Mon Sep 19 22:17:40 2011 > @@ -233,7 +233,6 @@ > bool isReMaterializable; > bool hasDelaySlot; > bool usesCustomInserter; > - bool hasPostISelHook; > bool hasCtrlDep; > bool isNotDuplicable; > bool hasSideEffects; > > Modified: llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp?rev=140134&r1=140133&r2=140134&view=diff > ============================================================================== > --- llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp (original) > +++ llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp Mon Sep 19 22:17:40 2011 > @@ -288,7 +288,6 @@ > if (Inst.isNotDuplicable) OS << "|(1< if (Inst.Operands.hasOptionalDef) OS << "|(1< if (Inst.usesCustomInserter) OS << "|(1< - if (Inst.hasPostISelHook) OS << "|(1< if (Inst.Operands.isVariadic)OS << "|(1< if (Inst.hasSideEffects) OS << "|(1< if (Inst.isAsCheapAsAMove) OS << "|(1< @@ -345,7 +344,7 @@ > > // We must emit the PHI opcode first... > std::string Namespace = Target.getInstNamespace(); > - > + > if (Namespace.empty()) { > fprintf(stderr, "No instructions defined!\n"); > exit(1); > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From evan.cheng at apple.com Tue Sep 20 00:21:14 2011 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 19 Sep 2011 22:21:14 -0700 Subject: [llvm-commits] [llvm] r140028 - in /llvm/trunk/tools/llvm-objdump: CMakeLists.txt MCFunction.cpp MCFunction.h MachODump.cpp llvm-objdump.cpp llvm-objdump.h In-Reply-To: <20110919175605.156C22A6C12C@llvm.org> References: <20110919175605.156C22A6C12C@llvm.org> Message-ID: Hi Benjamin, Can you refactor the code a bit and add some comments? For example, the loop in createFunctionFromMC needs to be factored out. DisassembleInputMachO is also crying out for both refactoring and comments. Thanks, Evan On Sep 19, 2011, at 10:56 AM, Benjamin Kramer wrote: > Author: d0k > Date: Mon Sep 19 12:56:04 2011 > New Revision: 140028 > > URL: http://llvm.org/viewvc/llvm-project?rev=140028&view=rev > Log: > Add a MachO-specific "mode" to llvm-objdump, that, if enabled, gathers additional information that are only available on MachO. > > - It can take FunctionStarts from a binary to find entry points more accurately. > - Symbol offsets in executables are correct now. > > Added: > llvm/trunk/tools/llvm-objdump/MachODump.cpp > llvm/trunk/tools/llvm-objdump/llvm-objdump.h > Modified: > llvm/trunk/tools/llvm-objdump/CMakeLists.txt > llvm/trunk/tools/llvm-objdump/MCFunction.cpp > llvm/trunk/tools/llvm-objdump/MCFunction.h > llvm/trunk/tools/llvm-objdump/llvm-objdump.cpp > > Modified: llvm/trunk/tools/llvm-objdump/CMakeLists.txt > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-objdump/CMakeLists.txt?rev=140028&r1=140027&r2=140028&view=diff > ============================================================================== > --- llvm/trunk/tools/llvm-objdump/CMakeLists.txt (original) > +++ llvm/trunk/tools/llvm-objdump/CMakeLists.txt Mon Sep 19 12:56:04 2011 > @@ -8,5 +8,6 @@ > > add_llvm_tool(llvm-objdump > llvm-objdump.cpp > + MachODump.cpp > MCFunction.cpp > ) > > Modified: llvm/trunk/tools/llvm-objdump/MCFunction.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-objdump/MCFunction.cpp?rev=140028&r1=140027&r2=140028&view=diff > ============================================================================== > --- llvm/trunk/tools/llvm-objdump/MCFunction.cpp (original) > +++ llvm/trunk/tools/llvm-objdump/MCFunction.cpp Mon Sep 19 12:56:04 2011 > @@ -30,48 +30,77 @@ > MCFunction::createFunctionFromMC(StringRef Name, const MCDisassembler *DisAsm, > const MemoryObject &Region, uint64_t Start, > uint64_t End, const MCInstrAnalysis *Ana, > - raw_ostream &DebugOut) { > + raw_ostream &DebugOut, > + SmallVectorImpl &Calls) { > + std::vector Instructions; > std::set Splits; > Splits.insert(Start); > - std::vector Instructions; > uint64_t Size; > > - // Disassemble code and gather basic block split points. > - for (uint64_t Index = Start; Index < End; Index += Size) { > - MCInst Inst; > + MCFunction f(Name); > > - if (DisAsm->getInstruction(Inst, Size, Region, Index, DebugOut, nulls())) { > - if (Ana->isBranch(Inst)) { > - uint64_t targ = Ana->evaluateBranch(Inst, Index, Size); > - // FIXME: Distinguish relocations from nop jumps. > - if (targ != -1ULL && (targ == Index+Size || targ >= End)) { > + { > + DenseSet VisitedInsts; > + SmallVector WorkList; > + WorkList.push_back(Start); > + // Disassemble code and gather basic block split points. > + while (!WorkList.empty()) { > + uint64_t Index = WorkList.pop_back_val(); > + if (VisitedInsts.find(Index) != VisitedInsts.end()) > + continue; > + > + for (;Index < End; Index += Size) { > + MCInst Inst; > + > + if (DisAsm->getInstruction(Inst, Size, Region, Index, DebugOut, nulls())){ > + if (Ana->isBranch(Inst)) { > + uint64_t targ = Ana->evaluateBranch(Inst, Index, Size); > + if (targ != -1ULL && targ == Index+Size) { > + Instructions.push_back(MCDecodedInst(Index, Size, Inst)); > + VisitedInsts.insert(Index); > + continue; > + } > + if (targ != -1ULL) { > + Splits.insert(targ); > + WorkList.push_back(targ); > + WorkList.push_back(Index+Size); > + } > + Splits.insert(Index+Size); > + Instructions.push_back(MCDecodedInst(Index, Size, Inst)); > + VisitedInsts.insert(Index); > + break; > + } else if (Ana->isReturn(Inst)) { > + Splits.insert(Index+Size); > Instructions.push_back(MCDecodedInst(Index, Size, Inst)); > - continue; // Skip branches that leave the function. > + VisitedInsts.insert(Index); > + break; > + } else if (Ana->isCall(Inst)) { > + uint64_t targ = Ana->evaluateBranch(Inst, Index, Size); > + if (targ != -1ULL && targ != Index+Size) { > + Calls.push_back(targ); > + } > } > - if (targ != -1ULL) > - Splits.insert(targ); > - Splits.insert(Index+Size); > - } else if (Ana->isReturn(Inst)) { > - Splits.insert(Index+Size); > - } > > - Instructions.push_back(MCDecodedInst(Index, Size, Inst)); > - } else { > - errs() << "warning: invalid instruction encoding\n"; > - if (Size == 0) > - Size = 1; // skip illegible bytes > + Instructions.push_back(MCDecodedInst(Index, Size, Inst)); > + VisitedInsts.insert(Index); > + } else { > + VisitedInsts.insert(Index); > + errs().write_hex(Index) << ": warning: invalid instruction encoding\n"; > + if (Size == 0) > + Size = 1; // skip illegible bytes > + } > } > - > + } > } > > - MCFunction f(Name); > + std::sort(Instructions.begin(), Instructions.end()); > > - // Create basic blocks. > + // Create basic blocks. > unsigned ii = 0, ie = Instructions.size(); > for (std::set::iterator spi = Splits.begin(), > - spe = Splits.end(); spi != spe; ++spi) { > + spe = llvm::prior(Splits.end()); spi != spe; ++spi) { > MCBasicBlock BB; > - uint64_t BlockEnd = llvm::next(spi) == spe ? End : *llvm::next(spi); > + uint64_t BlockEnd = *llvm::next(spi); > // Add instructions to the BB. > for (; ii != ie; ++ii) { > if (Instructions[ii].Address < *spi || > @@ -82,6 +111,8 @@ > f.addBlock(*spi, BB); > } > > + std::sort(f.Blocks.begin(), f.Blocks.end()); > + > // Calculate successors of each block. > for (MCFunction::iterator i = f.begin(), e = f.end(); i != e; ++i) { > MCBasicBlock &BB = i->second; > @@ -94,16 +125,16 @@ > // Indirect branch. Bail and add all blocks of the function as a > // successor. > for (MCFunction::iterator i = f.begin(), e = f.end(); i != e; ++i) > - BB.addSucc(&i->second); > + BB.addSucc(i->first); > } else if (targ != Inst.Address+Inst.Size) > - BB.addSucc(&f.getBlockAtAddress(targ)); > + BB.addSucc(targ); > // Conditional branches can also fall through to the next block. > if (Ana->isConditionalBranch(Inst.Inst) && llvm::next(i) != e) > - BB.addSucc(&llvm::next(i)->second); > + BB.addSucc(llvm::next(i)->first); > } else { > // No branch. Fall through to the next block. > if (!Ana->isReturn(Inst.Inst) && llvm::next(i) != e) > - BB.addSucc(&llvm::next(i)->second); > + BB.addSucc(llvm::next(i)->first); > } > } > > > Modified: llvm/trunk/tools/llvm-objdump/MCFunction.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-objdump/MCFunction.h?rev=140028&r1=140027&r2=140028&view=diff > ============================================================================== > --- llvm/trunk/tools/llvm-objdump/MCFunction.h (original) > +++ llvm/trunk/tools/llvm-objdump/MCFunction.h Mon Sep 19 12:56:04 2011 > @@ -12,8 +12,11 @@ > // > //===----------------------------------------------------------------------===// > > +#ifndef LLVM_OBJECTDUMP_MCFUNCTION_H > +#define LLVM_OBJECTDUMP_MCFUNCTION_H > + > #include "llvm/ADT/ArrayRef.h" > -#include "llvm/ADT/SmallPtrSet.h" > +#include "llvm/ADT/DenseSet.h" > #include "llvm/MC/MCInst.h" > #include > > @@ -31,15 +34,20 @@ > uint64_t Size; > MCInst Inst; > > + MCDecodedInst() {} > MCDecodedInst(uint64_t Address, uint64_t Size, MCInst Inst) > : Address(Address), Size(Size), Inst(Inst) {} > + > + bool operator<(const MCDecodedInst &RHS) const { > + return Address < RHS.Address; > + } > }; > > /// MCBasicBlock - Consists of multiple MCDecodedInsts and a list of successing > /// MCBasicBlocks. > class MCBasicBlock { > - SmallVector Insts; > - typedef SmallPtrSet SetTy; > + std::vector Insts; > + typedef DenseSet SetTy; > SetTy Succs; > public: > ArrayRef getInsts() const { return Insts; } > @@ -48,10 +56,14 @@ > succ_iterator succ_begin() const { return Succs.begin(); } > succ_iterator succ_end() const { return Succs.end(); } > > - bool contains(MCBasicBlock *BB) const { return Succs.count(BB); } > + bool contains(uint64_t Addr) const { return Succs.count(Addr); } > > void addInst(const MCDecodedInst &Inst) { Insts.push_back(Inst); } > - void addSucc(MCBasicBlock *BB) { Succs.insert(BB); } > + void addSucc(uint64_t Addr) { Succs.insert(Addr); } > + > + bool operator<(const MCBasicBlock &RHS) const { > + return Insts.size() < RHS.Insts.size(); > + } > }; > > /// MCFunction - Represents a named function in machine code, containing > @@ -59,7 +71,7 @@ > class MCFunction { > const StringRef Name; > // Keep BBs sorted by address. > - typedef std::map MapTy; > + typedef std::vector > MapTy; > MapTy Blocks; > public: > MCFunction(StringRef Name) : Name(Name) {} > @@ -68,7 +80,8 @@ > static MCFunction > createFunctionFromMC(StringRef Name, const MCDisassembler *DisAsm, > const MemoryObject &Region, uint64_t Start, uint64_t End, > - const MCInstrAnalysis *Ana, raw_ostream &DebugOut); > + const MCInstrAnalysis *Ana, raw_ostream &DebugOut, > + SmallVectorImpl &Calls); > > typedef MapTy::iterator iterator; > iterator begin() { return Blocks.begin(); } > @@ -77,14 +90,11 @@ > StringRef getName() const { return Name; } > > MCBasicBlock &addBlock(uint64_t Address, const MCBasicBlock &BB) { > - assert(!Blocks.count(Address) && "Already a BB at address."); > - return Blocks[Address] = BB; > - } > - > - MCBasicBlock &getBlockAtAddress(uint64_t Address) { > - assert(Blocks.count(Address) && "No BB at address."); > - return Blocks[Address]; > + Blocks.push_back(std::make_pair(Address, BB)); > + return Blocks.back().second; > } > }; > > } > + > +#endif > > Added: llvm/trunk/tools/llvm-objdump/MachODump.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-objdump/MachODump.cpp?rev=140028&view=auto > ============================================================================== > --- llvm/trunk/tools/llvm-objdump/MachODump.cpp (added) > +++ llvm/trunk/tools/llvm-objdump/MachODump.cpp Mon Sep 19 12:56:04 2011 > @@ -0,0 +1,489 @@ > +//===-- MachODump.cpp - Object file dumping utility for llvm --------------===// > +// > +// The LLVM Compiler Infrastructure > +// > +// This file is distributed under the University of Illinois Open Source > +// License. See LICENSE.TXT for details. > +// > +//===----------------------------------------------------------------------===// > +// > +// This file implements the MachO-specific dumper for llvm-objdump. > +// > +//===----------------------------------------------------------------------===// > + > +#include "llvm-objdump.h" > +#include "MCFunction.h" > +#include "llvm/Support/MachO.h" > +#include "llvm/Object/MachOObject.h" > +#include "llvm/ADT/OwningPtr.h" > +#include "llvm/ADT/Triple.h" > +#include "llvm/ADT/STLExtras.h" > +#include "llvm/MC/MCAsmInfo.h" > +#include "llvm/MC/MCDisassembler.h" > +#include "llvm/MC/MCInst.h" > +#include "llvm/MC/MCInstPrinter.h" > +#include "llvm/MC/MCInstrAnalysis.h" > +#include "llvm/MC/MCInstrDesc.h" > +#include "llvm/MC/MCInstrInfo.h" > +#include "llvm/MC/MCSubtargetInfo.h" > +#include "llvm/Support/CommandLine.h" > +#include "llvm/Support/Debug.h" > +#include "llvm/Support/Format.h" > +#include "llvm/Support/GraphWriter.h" > +#include "llvm/Support/MemoryBuffer.h" > +#include "llvm/Support/TargetRegistry.h" > +#include "llvm/Support/TargetSelect.h" > +#include "llvm/Support/raw_ostream.h" > +#include "llvm/Support/system_error.h" > +#include > +#include > +using namespace llvm; > +using namespace object; > + > +static cl::opt > + CFG("cfg", cl::desc("Create a CFG for every symbol in the object file and" > + "write it to a graphviz file (MachO-only)")); > + > +static const Target *GetTarget(const MachOObject *MachOObj) { > + // Figure out the target triple. > + llvm::Triple TT("unknown-unknown-unknown"); > + switch (MachOObj->getHeader().CPUType) { > + case llvm::MachO::CPUTypeI386: > + TT.setArch(Triple::ArchType(Triple::x86)); > + break; > + case llvm::MachO::CPUTypeX86_64: > + TT.setArch(Triple::ArchType(Triple::x86_64)); > + break; > + case llvm::MachO::CPUTypeARM: > + TT.setArch(Triple::ArchType(Triple::arm)); > + break; > + case llvm::MachO::CPUTypePowerPC: > + TT.setArch(Triple::ArchType(Triple::ppc)); > + break; > + case llvm::MachO::CPUTypePowerPC64: > + TT.setArch(Triple::ArchType(Triple::ppc64)); > + break; > + } > + > + TripleName = TT.str(); > + > + // Get the target specific parser. > + std::string Error; > + const Target *TheTarget = TargetRegistry::lookupTarget(TripleName, Error); > + if (TheTarget) > + return TheTarget; > + > + errs() << "llvm-objdump: error: unable to get target for '" << TripleName > + << "', see --version and --triple.\n"; > + return 0; > +} > + > +struct Section { > + char Name[16]; > + uint64_t Address; > + uint64_t Size; > + uint32_t Offset; > + uint32_t NumRelocs; > + uint64_t RelocTableOffset; > +}; > + > +struct Symbol { > + uint64_t Value; > + uint32_t StringIndex; > + uint8_t SectionIndex; > + bool operator<(const Symbol &RHS) const { return Value < RHS.Value; } > +}; > + > +static void DumpAddress(uint64_t Address, ArrayRef
    Sections, > + MachOObject *MachOObj, raw_ostream &OS) { > + for (unsigned i = 0; i != Sections.size(); ++i) { > + uint64_t addr = Address-Sections[i].Address; > + if (Sections[i].Address <= Address && > + Sections[i].Address + Sections[i].Size > Address) { > + StringRef bytes = MachOObj->getData(Sections[i].Offset, > + Sections[i].Size); > + if (!strcmp(Sections[i].Name, "__cstring")) > + OS << '"' << bytes.substr(addr, bytes.find('\0', addr)) << '"'; > + if (!strcmp(Sections[i].Name, "__cfstring")) > + OS << "@\"" << bytes.substr(addr, bytes.find('\0', addr)) << '"'; > + } > + } > +} > + > +void llvm::DisassembleInputMachO(StringRef Filename) { > + OwningPtr Buff; > + > + if (error_code ec = MemoryBuffer::getFileOrSTDIN(Filename, Buff)) { > + errs() << "llvm-objdump: " << Filename << ": " << ec.message() << "\n"; > + return; > + } > + > + OwningPtr MachOObj(MachOObject::LoadFromBuffer(Buff.take())); > + > + const Target *TheTarget = GetTarget(MachOObj.get()); > + if (!TheTarget) { > + // GetTarget prints out stuff. > + return; > + } > + const MCInstrInfo *InstrInfo = TheTarget->createMCInstrInfo(); > + OwningPtr > + InstrAnalysis(TheTarget->createMCInstrAnalysis(InstrInfo)); > + > + // Set up disassembler. > + OwningPtr AsmInfo(TheTarget->createMCAsmInfo(TripleName)); > + > + if (!AsmInfo) { > + errs() << "error: no assembly info for target " << TripleName << "\n"; > + return; > + } > + > + OwningPtr > + STI(TheTarget->createMCSubtargetInfo(TripleName, "", "")); > + > + if (!STI) { > + errs() << "error: no subtarget info for target " << TripleName << "\n"; > + return; > + } > + > + OwningPtr DisAsm(TheTarget->createMCDisassembler(*STI)); > + if (!DisAsm) { > + errs() << "error: no disassembler for target " << TripleName << "\n"; > + return; > + } > + > + int AsmPrinterVariant = AsmInfo->getAssemblerDialect(); > + OwningPtr IP(TheTarget->createMCInstPrinter( > + AsmPrinterVariant, *AsmInfo, *STI)); > + if (!IP) { > + errs() << "error: no instruction printer for target " << TripleName << '\n'; > + return; > + } > + > + outs() << '\n'; > + outs() << Filename << ":\n\n"; > + > + const macho::Header &Header = MachOObj->getHeader(); > + > + const MachOObject::LoadCommandInfo *SymtabLCI = 0; > + for (unsigned i = 0; i != Header.NumLoadCommands; ++i) { > + const MachOObject::LoadCommandInfo &LCI = MachOObj->getLoadCommandInfo(i); > + switch (LCI.Command.Type) { > + case macho::LCT_Symtab: > + SymtabLCI = &LCI; > + break; > + } > + } > + > + // Read and register the symbol table data. > + InMemoryStruct SymtabLC; > + MachOObj->ReadSymtabLoadCommand(*SymtabLCI, SymtabLC); > + MachOObj->RegisterStringTable(*SymtabLC); > + > + std::vector
    Sections; > + std::vector Symbols; > + std::vector UnsortedSymbols; // FIXME: duplication > + SmallVector FoundFns; > + > + for (unsigned i = 0; i != Header.NumLoadCommands; ++i) { > + const MachOObject::LoadCommandInfo &LCI = MachOObj->getLoadCommandInfo(i); > + if (LCI.Command.Type == macho::LCT_Segment) { > + InMemoryStruct SegmentLC; > + MachOObj->ReadSegmentLoadCommand(LCI, SegmentLC); > + > + for (unsigned SectNum = 0; SectNum != SegmentLC->NumSections; ++SectNum) { > + InMemoryStruct Sect; > + MachOObj->ReadSection(LCI, SectNum, Sect); > + > + Section S; > + memcpy(S.Name, Sect->Name, 16); > + S.Address = Sect->Address; > + S.Size = Sect->Size; > + S.Offset = Sect->Offset; > + S.NumRelocs = Sect->NumRelocationTableEntries; > + S.RelocTableOffset = Sect->RelocationTableOffset; > + Sections.push_back(S); > + > + for (unsigned i = 0; i != SymtabLC->NumSymbolTableEntries; ++i) { > + InMemoryStruct STE; > + MachOObj->ReadSymbolTableEntry(SymtabLC->SymbolTableOffset, i, STE); > + > + Symbol S; > + S.StringIndex = STE->StringIndex; > + S.SectionIndex = STE->SectionIndex; > + S.Value = STE->Value; > + Symbols.push_back(S); > + UnsortedSymbols.push_back(Symbols.back()); > + } > + } > + } else if (LCI.Command.Type == macho::LCT_Segment64) { > + InMemoryStruct Segment64LC; > + MachOObj->ReadSegment64LoadCommand(LCI, Segment64LC); > + > + for (unsigned SectNum = 0; SectNum != Segment64LC->NumSections; ++SectNum) { > + InMemoryStruct Sect64; > + MachOObj->ReadSection64(LCI, SectNum, Sect64); > + > + Section S; > + memcpy(S.Name, Sect64->Name, 16); > + S.Address = Sect64->Address; > + S.Size = Sect64->Size; > + S.Offset = Sect64->Offset; > + S.NumRelocs = Sect64->NumRelocationTableEntries; > + S.RelocTableOffset = Sect64->RelocationTableOffset; > + Sections.push_back(S); > + > + for (unsigned i = 0; i != SymtabLC->NumSymbolTableEntries; ++i) { > + InMemoryStruct STE; > + MachOObj->ReadSymbol64TableEntry(SymtabLC->SymbolTableOffset, i, STE); > + > + Symbol S; > + S.StringIndex = STE->StringIndex; > + S.SectionIndex = STE->SectionIndex; > + S.Value = STE->Value; > + Symbols.push_back(S); > + UnsortedSymbols.push_back(Symbols.back()); > + } > + } > + } else if (LCI.Command.Type == macho::LCT_FunctionStarts) { > + InMemoryStruct LLC; > + MachOObj->ReadLinkeditDataLoadCommand(LCI, LLC); > + > + MachOObj->ReadULEB128s(LLC->DataOffset, FoundFns); > + } > + } > + > + std::map FunctionMap; > + > + // Sort the symbols by address, just in case they didn't come in that way. > + array_pod_sort(Symbols.begin(), Symbols.end()); > + > +#ifndef NDEBUG > + raw_ostream &DebugOut = DebugFlag ? dbgs() : nulls(); > +#else > + raw_ostream &DebugOut = nulls(); > +#endif > + > + SmallVector Functions; > + > + for (unsigned SectIdx = 0; SectIdx != Sections.size(); SectIdx++) { > + if (strcmp(Sections[SectIdx].Name, "__text")) > + continue; > + > + uint64_t VMAddr = Sections[SectIdx].Address - Sections[SectIdx].Offset; > + for (unsigned i = 0, e = FoundFns.size(); i != e; ++i) > + FunctionMap.insert(std::pair(FoundFns[i]+VMAddr,0)); > + > + StringRef Bytes = MachOObj->getData(Sections[SectIdx].Offset, > + Sections[SectIdx].Size); > + StringRefMemoryObject memoryObject(Bytes); > + bool symbolTableWorked = false; > + > + std::vector > Relocs; > + for (unsigned j = 0; j != Sections[SectIdx].NumRelocs; ++j) { > + InMemoryStruct RE; > + MachOObj->ReadRelocationEntry(Sections[SectIdx].RelocTableOffset, j, RE); > + Relocs.push_back(std::make_pair(RE->Word0, RE->Word1 & 0xffffff)); > + } > + array_pod_sort(Relocs.begin(), Relocs.end()); > + > + for (unsigned SymIdx = 0; SymIdx != Symbols.size(); SymIdx++) { > + if ((unsigned)Symbols[SymIdx].SectionIndex - 1 != SectIdx) > + continue; > + > + uint64_t Start = Symbols[SymIdx].Value - Sections[SectIdx].Address; > + uint64_t End = (SymIdx+1 == Symbols.size() || > + Symbols[SymIdx].SectionIndex != Symbols[SymIdx+1].SectionIndex) ? > + Sections[SectIdx].Size : > + Symbols[SymIdx+1].Value - Sections[SectIdx].Address; > + uint64_t Size; > + > + if (Start >= End) > + continue; > + > + symbolTableWorked = true; > + > + if (!CFG) { > + outs() << MachOObj->getStringAtIndex(Symbols[SymIdx].StringIndex) > + << ":\n"; > + for (uint64_t Index = Start; Index < End; Index += Size) { > + MCInst Inst; > + > + if (DisAsm->getInstruction(Inst, Size, memoryObject, Index, > + DebugOut, nulls())) { > + outs() << format("%8llx:\t", Sections[SectIdx].Address + Index); > + DumpBytes(StringRef(Bytes.data() + Index, Size)); > + IP->printInst(&Inst, outs(), ""); > + outs() << "\n"; > + } else { > + errs() << "llvm-objdump: warning: invalid instruction encoding\n"; > + if (Size == 0) > + Size = 1; // skip illegible bytes > + } > + } > + } else { > + // Create CFG and use it for disassembly. > + SmallVector Calls; > + MCFunction f = > + MCFunction::createFunctionFromMC( > + MachOObj->getStringAtIndex(Symbols[SymIdx].StringIndex), > + DisAsm.get(), > + memoryObject, Start, End, > + InstrAnalysis.get(), DebugOut, > + Calls); > + > + Functions.push_back(f); > + FunctionMap[Start] = &Functions.back(); > + > + for (unsigned i = 0, e = Calls.size(); i != e; ++i) > + FunctionMap.insert(std::pair(Calls[i], 0)); > + } > + } > + > + if (CFG) { > + if (!symbolTableWorked) { > + // Create CFG and use it for disassembly. > + SmallVector Calls; > + MCFunction f = > + MCFunction::createFunctionFromMC("__TEXT", DisAsm.get(), > + memoryObject, 0, Sections[SectIdx].Size, > + InstrAnalysis.get(), DebugOut, > + Calls); > + > + Functions.push_back(f); > + FunctionMap[Sections[SectIdx].Offset] = &Functions.back(); > + > + for (unsigned i = 0, e = Calls.size(); i != e; ++i) > + FunctionMap.insert(std::pair(Calls[i], 0)); > + } > + for (std::map::iterator mi = FunctionMap.begin(), > + me = FunctionMap.end(); mi != me; ++mi) > + if (mi->second == 0) { > + SmallVector Calls; > + MCFunction f = > + MCFunction::createFunctionFromMC("unknown", DisAsm.get(), > + memoryObject, mi->first, > + Sections[SectIdx].Size, > + InstrAnalysis.get(), DebugOut, > + Calls); > + Functions.push_back(f); > + mi->second = &Functions.back(); > + for (unsigned i = 0, e = Calls.size(); i != e; ++i) > + if (FunctionMap.insert(std::pair(Calls[i],0)) > + .second) > + mi = FunctionMap.begin(); > + } > + > + DenseSet PrintedBlocks; > + for (unsigned ffi = 0, ffe = Functions.size(); ffi != ffe; ++ffi) { > + MCFunction &f = Functions[ffi]; > + for (MCFunction::iterator fi = f.begin(), fe = f.end(); fi != fe; ++fi){ > + if (!PrintedBlocks.insert(fi->first).second) > + continue; > + bool hasPreds = FunctionMap.find(fi->first) != FunctionMap.end(); > + > + // Only print blocks that have predecessors. > + // FIXME: Slow. > + for (MCFunction::iterator pi = f.begin(), pe = f.end(); pi != pe; > + ++pi) > + if (pi->second.contains(fi->first)) { > + hasPreds = true; > + break; > + } > + > + // Data block. > + if (!hasPreds && fi != f.begin()) { > + uint64_t End = llvm::next(fi) == fe ? Sections[SectIdx].Size : > + llvm::next(fi)->first; > + outs() << "# " << End-fi->first << " bytes of data:\n"; > + for (unsigned pos = fi->first; pos != End; ++pos) { > + outs() << format("%8x:\t", Sections[SectIdx].Address + pos); > + DumpBytes(StringRef(Bytes.data() + pos, 1)); > + outs() << format("\t.byte 0x%02x\n", (uint8_t)Bytes[pos]); > + } > + continue; > + } > + > + if (fi->second.contains(fi->first)) > + outs() << "# Loop begin:\n"; > + > + for (unsigned ii = 0, ie = fi->second.getInsts().size(); ii != ie; > + ++ii) { > + const MCDecodedInst &Inst = fi->second.getInsts()[ii]; > + if (FunctionMap.find(Sections[SectIdx].Address + Inst.Address) != > + FunctionMap.end()) > + outs() << FunctionMap[Sections[SectIdx].Address + Inst.Address]-> > + getName() << ":\n"; > + outs() << format("%8llx:\t", Sections[SectIdx].Address + > + Inst.Address); > + DumpBytes(StringRef(Bytes.data() + Inst.Address, Inst.Size)); > + // Simple loops. > + if (fi->second.contains(fi->first)) > + outs() << '\t'; > + IP->printInst(&Inst.Inst, outs(), ""); > + for (unsigned j = 0; j != Relocs.size(); ++j) > + if (Relocs[j].first >= Sections[SectIdx].Address + Inst.Address && > + Relocs[j].first < Sections[SectIdx].Address + Inst.Address + > + Inst.Size) { > + outs() << "\t# " > + << MachOObj->getStringAtIndex( > + UnsortedSymbols[Relocs[j].second].StringIndex) > + << ' '; > + DumpAddress(UnsortedSymbols[Relocs[j].second].Value, Sections, > + MachOObj.get(), outs()); > + } > + uint64_t targ = InstrAnalysis->evaluateBranch(Inst.Inst, > + Inst.Address, > + Inst.Size); > + if (targ != -1ULL) > + DumpAddress(targ, Sections, MachOObj.get(), outs()); > + > + outs() << '\n'; > + } > + } > + > + // Start a new dot file. > + std::string Error; > + raw_fd_ostream Out((f.getName().str() + ".dot").c_str(), Error); > + if (!Error.empty()) { > + errs() << "llvm-objdump: warning: " << Error << '\n'; > + continue; > + } > + > + Out << "digraph " << f.getName() << " {\n"; > + Out << "graph [ rankdir = \"LR\" ];\n"; > + for (MCFunction::iterator i = f.begin(), e = f.end(); i != e; ++i) { > + bool hasPreds = false; > + // Only print blocks that have predecessors. > + // FIXME: Slow. > + for (MCFunction::iterator pi = f.begin(), pe = f.end(); pi != pe; > + ++pi) > + if (pi->second.contains(i->first)) { > + hasPreds = true; > + break; > + } > + > + if (!hasPreds && i != f.begin()) > + continue; > + > + Out << '"' << i->first << "\" [ label=\""; > + // Print instructions. > + for (unsigned ii = 0, ie = i->second.getInsts().size(); ii != ie; > + ++ii) { > + // Escape special chars and print the instruction in mnemonic form. > + std::string Str; > + raw_string_ostream OS(Str); > + IP->printInst(&i->second.getInsts()[ii].Inst, OS, ""); > + Out << DOT::EscapeString(OS.str()) << '|'; > + } > + Out << "\" shape=\"record\" ];\n"; > + > + // Add edges. > + for (MCBasicBlock::succ_iterator si = i->second.succ_begin(), > + se = i->second.succ_end(); si != se; ++si) > + Out << i->first << ":o -> " << *si <<":a\n"; > + } > + Out << "}\n"; > + } > + } > + } > +} > > Modified: llvm/trunk/tools/llvm-objdump/llvm-objdump.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-objdump/llvm-objdump.cpp?rev=140028&r1=140027&r2=140028&view=diff > ============================================================================== > --- llvm/trunk/tools/llvm-objdump/llvm-objdump.cpp (original) > +++ llvm/trunk/tools/llvm-objdump/llvm-objdump.cpp Mon Sep 19 12:56:04 2011 > @@ -13,6 +13,7 @@ > // > //===----------------------------------------------------------------------===// > > +#include "llvm-objdump.h" > #include "MCFunction.h" > #include "llvm/Object/ObjectFile.h" > #include "llvm/ADT/OwningPtr.h" > @@ -46,39 +47,37 @@ > using namespace llvm; > using namespace object; > > -namespace { > - cl::list > - InputFilenames(cl::Positional, cl::desc(""), > - cl::ZeroOrMore); > - > - cl::opt > - Disassemble("disassemble", > - cl::desc("Display assembler mnemonics for the machine instructions")); > - cl::alias > - Disassembled("d", cl::desc("Alias for --disassemble"), > - cl::aliasopt(Disassemble)); > - > - cl::opt > - CFG("cfg", cl::desc("Create a CFG for every symbol in the object file and" > - "write it to a graphviz file")); > +static cl::list > +InputFilenames(cl::Positional, cl::desc(""),cl::ZeroOrMore); > > - cl::opt > - TripleName("triple", cl::desc("Target triple to disassemble for, " > +static cl::opt > +Disassemble("disassemble", > + cl::desc("Display assembler mnemonics for the machine instructions")); > +static cl::alias > +Disassembled("d", cl::desc("Alias for --disassemble"), > + cl::aliasopt(Disassemble)); > + > +static cl::opt > +MachO("macho", cl::desc("Use MachO specific object file parser")); > +static cl::alias > +MachOm("m", cl::desc("Alias for --macho"), cl::aliasopt(MachO)); > + > +cl::opt > +llvm::TripleName("triple", cl::desc("Target triple to disassemble for, " > + "see -version for available targets")); > + > +cl::opt > +llvm::ArchName("arch", cl::desc("Target arch to disassemble for, " > "see -version for available targets")); > > - cl::opt > - ArchName("arch", cl::desc("Target arch to disassemble for, " > - "see -version for available targets")); > - > - StringRef ToolName; > - > - bool error(error_code ec) { > - if (!ec) return false; > - > - outs() << ToolName << ": error reading file: " << ec.message() << ".\n"; > - outs().flush(); > - return true; > - } > +static StringRef ToolName; > + > +static bool error(error_code ec) { > + if (!ec) return false; > + > + outs() << ToolName << ": error reading file: " << ec.message() << ".\n"; > + outs().flush(); > + return true; > } > > static const Target *GetTarget(const ObjectFile *Obj = NULL) { > @@ -106,27 +105,8 @@ > return 0; > } > > -namespace { > -class StringRefMemoryObject : public MemoryObject { > -private: > - StringRef Bytes; > -public: > - StringRefMemoryObject(StringRef bytes) : Bytes(bytes) {} > - > - uint64_t getBase() const { return 0; } > - uint64_t getExtent() const { return Bytes.size(); } > - > - int readByte(uint64_t Addr, uint8_t *Byte) const { > - if (Addr >= getExtent()) > - return -1; > - *Byte = Bytes[Addr]; > - return 0; > - } > -}; > -} > - > -static void DumpBytes(StringRef bytes) { > - static char hex_rep[] = "0123456789abcdef"; > +void llvm::DumpBytes(StringRef bytes) { > + static const char hex_rep[] = "0123456789abcdef"; > // FIXME: The real way to do this is to figure out the longest instruction > // and align to that size before printing. I'll fix this when I get > // around to outputting relocations. > @@ -151,7 +131,7 @@ > outs() << output; > } > > -static void DisassembleInput(const StringRef &Filename) { > +void llvm::DisassembleInputLibObject(StringRef Filename) { > OwningPtr Buff; > > if (error_code ec = MemoryBuffer::getFileOrSTDIN(Filename, Buff)) { > @@ -259,118 +239,22 @@ > raw_ostream &DebugOut = nulls(); > #endif > > - if (!CFG) { > - for (Index = Start; Index < End; Index += Size) { > - MCInst Inst; > - > - if (DisAsm->getInstruction(Inst, Size, memoryObject, Index, > - DebugOut, nulls())) { > - uint64_t addr; > - if (error(i->getAddress(addr))) break; > - outs() << format("%8x:\t", addr + Index); > - DumpBytes(StringRef(Bytes.data() + Index, Size)); > - IP->printInst(&Inst, outs(), ""); > - outs() << "\n"; > - } else { > - errs() << ToolName << ": warning: invalid instruction encoding\n"; > - if (Size == 0) > - Size = 1; // skip illegible bytes > - } > - } > - > - } else { > - // Create CFG and use it for disassembly. > - MCFunction f = > - MCFunction::createFunctionFromMC(Symbols[si].second, DisAsm.get(), > - memoryObject, Start, End, > - InstrAnalysis.get(), DebugOut); > - > - for (MCFunction::iterator fi = f.begin(), fe = f.end(); fi != fe; ++fi){ > - bool hasPreds = false; > - // Only print blocks that have predecessors. > - // FIXME: Slow. > - for (MCFunction::iterator pi = f.begin(), pe = f.end(); pi != pe; > - ++pi) > - if (pi->second.contains(&fi->second)) { > - hasPreds = true; > - break; > - } > - > - // Data block. > - if (!hasPreds && fi != f.begin()) { > - uint64_t End = llvm::next(fi) == fe ? SectSize : > - llvm::next(fi)->first; > - uint64_t addr; > - if (error(i->getAddress(addr))) break; > - outs() << "# " << End-fi->first << " bytes of data:\n"; > - for (unsigned pos = fi->first; pos != End; ++pos) { > - outs() << format("%8x:\t", addr + pos); > - DumpBytes(StringRef(Bytes.data() + pos, 1)); > - outs() << format("\t.byte 0x%02x\n", (uint8_t)Bytes[pos]); > - } > - continue; > - } > - > - if (fi->second.contains(&fi->second)) > - outs() << "# Loop begin:\n"; > - > - for (unsigned ii = 0, ie = fi->second.getInsts().size(); ii != ie; > - ++ii) { > - uint64_t addr; > - if (error(i->getAddress(addr))) break; > - const MCDecodedInst &Inst = fi->second.getInsts()[ii]; > - outs() << format("%8x:\t", addr + Inst.Address); > - DumpBytes(StringRef(Bytes.data() + Inst.Address, Inst.Size)); > - // Simple loops. > - if (fi->second.contains(&fi->second)) > - outs() << '\t'; > - IP->printInst(&Inst.Inst, outs(), ""); > - outs() << '\n'; > - } > - } > - > - // Start a new dot file. > - std::string Error; > - raw_fd_ostream Out((f.getName().str() + ".dot").c_str(), Error); > - if (!Error.empty()) { > - errs() << ToolName << ": warning: " << Error << '\n'; > - continue; > - } > + for (Index = Start; Index < End; Index += Size) { > + MCInst Inst; > > - Out << "digraph " << f.getName() << " {\n"; > - Out << "graph [ rankdir = \"LR\" ];\n"; > - for (MCFunction::iterator i = f.begin(), e = f.end(); i != e; ++i) { > - bool hasPreds = false; > - // Only print blocks that have predecessors. > - // FIXME: Slow. > - for (MCFunction::iterator pi = f.begin(), pe = f.end(); pi != pe; > - ++pi) > - if (pi->second.contains(&i->second)) { > - hasPreds = true; > - break; > - } > - > - if (!hasPreds && i != f.begin()) > - continue; > - > - Out << '"' << (uintptr_t)&i->second << "\" [ label=\""; > - // Print instructions. > - for (unsigned ii = 0, ie = i->second.getInsts().size(); ii != ie; > - ++ii) { > - // Escape special chars and print the instruction in mnemonic form. > - std::string Str; > - raw_string_ostream OS(Str); > - IP->printInst(&i->second.getInsts()[ii].Inst, OS, ""); > - Out << DOT::EscapeString(OS.str()) << '|'; > - } > - Out << "\" shape=\"record\" ];\n"; > - > - // Add edges. > - for (MCBasicBlock::succ_iterator si = i->second.succ_begin(), > - se = i->second.succ_end(); si != se; ++si) > - Out << (uintptr_t)&i->second << ":o -> " << (uintptr_t)*si <<":a\n"; > + if (DisAsm->getInstruction(Inst, Size, memoryObject, Index, > + DebugOut, nulls())) { > + uint64_t addr; > + if (error(i->getAddress(addr))) break; > + outs() << format("%8x:\t", addr + Index); > + DumpBytes(StringRef(Bytes.data() + Index, Size)); > + IP->printInst(&Inst, outs(), ""); > + outs() << "\n"; > + } else { > + errs() << ToolName << ": warning: invalid instruction encoding\n"; > + if (Size == 0) > + Size = 1; // skip illegible bytes > } > - Out << "}\n"; > } > } > } > @@ -404,8 +288,12 @@ > return 2; > } > > - std::for_each(InputFilenames.begin(), InputFilenames.end(), > - DisassembleInput); > + if (MachO) > + std::for_each(InputFilenames.begin(), InputFilenames.end(), > + DisassembleInputMachO); > + else > + std::for_each(InputFilenames.begin(), InputFilenames.end(), > + DisassembleInputLibObject); > > return 0; > } > > Added: llvm/trunk/tools/llvm-objdump/llvm-objdump.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-objdump/llvm-objdump.h?rev=140028&view=auto > ============================================================================== > --- llvm/trunk/tools/llvm-objdump/llvm-objdump.h (added) > +++ llvm/trunk/tools/llvm-objdump/llvm-objdump.h Mon Sep 19 12:56:04 2011 > @@ -0,0 +1,47 @@ > +//===-- llvm-objdump.h ----------------------------------------------------===// > +// > +// The LLVM Compiler Infrastructure > +// > +// This file is distributed under the University of Illinois Open Source > +// License. See LICENSE.TXT for details. > +// > +//===----------------------------------------------------------------------===// > + > +#ifndef LLVM_OBJDUMP_H > +#define LLVM_OBJDUMP_H > + > +#include "llvm/ADT/StringRef.h" > +#include "llvm/Support/CommandLine.h" > +#include "llvm/Support/DataTypes.h" > +#include "llvm/Support/MemoryObject.h" > + > +namespace llvm { > + > +extern cl::opt TripleName; > +extern cl::opt ArchName; > + > +// Various helper functions. > +void DumpBytes(StringRef bytes); > +void DisassembleInputLibObject(StringRef Filename); > +void DisassembleInputMachO(StringRef Filename); > + > +class StringRefMemoryObject : public MemoryObject { > +private: > + StringRef Bytes; > +public: > + StringRefMemoryObject(StringRef bytes) : Bytes(bytes) {} > + > + uint64_t getBase() const { return 0; } > + uint64_t getExtent() const { return Bytes.size(); } > + > + int readByte(uint64_t Addr, uint8_t *Byte) const { > + if (Addr >= getExtent()) > + return -1; > + *Byte = Bytes[Addr]; > + return 0; > + } > +}; > + > +} > + > +#endif > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From atrick at apple.com Tue Sep 20 00:36:57 2011 From: atrick at apple.com (Andrew Trick) Date: Mon, 19 Sep 2011 22:36:57 -0700 Subject: [llvm-commits] [llvm] r140134 - in /llvm/trunk: include/llvm/MC/MCInstrDesc.h lib/CodeGen/SelectionDAG/InstrEmitter.cpp lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp lib/Target/ARM/ARMISelLowering.cpp lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/ARMInstrThumb2.td test/CodeGen/ARM/2011-09-19-cpsr.ll utils/TableGen/CodeGenInstruction.cpp utils/TableGen/CodeGenInstruction.h utils/TableGen/InstrInfoEmitter.cpp In-Reply-To: References: <20110920031740.C9E852A6C12C@llvm.org> Message-ID: On Sep 19, 2011, at 9:55 PM, Evan Cheng wrote: > Thanks! Just curious, could you have fixed the bug by adding hasPostIselHook = 1 to SUBS? > > Evan > t2SUBS was already under hasPostIselHook (T2I_bin_s_irs). Consequently, when its CPSR result was dead, the implicit def would be removed--that's wrong for any opcode that always sets the 's' bit. Hard-coding certain opcodes would be a sufficient fix, but I wanted some form of self-checking within the hook since these miscompiles are so nasty. With the self-checking in place, the hook flag serves no purpose but to avoid a vcall, which isn't very expensive at this point, but is another potential source of bugs when the .td file changes. -Andy > On Sep 19, 2011, at 8:17 PM, Andrew Trick wrote: > >> Author: atrick >> Date: Mon Sep 19 22:17:40 2011 >> New Revision: 140134 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=140134&view=rev >> Log: >> ARM isel bug fix for adds/subs operands. >> >> Modified ARMISelLowering::AdjustInstrPostInstrSelection to handle the >> full gamut of CPSR defs/uses including instructins whose "optional" >> cc_out operand is not really optional. This allowed removal of the >> hasPostISelHook to simplify the .td files and make the implementation >> more robust. >> Fixes rdar://10137436: sqlite3 miscompile >> >> Added: >> llvm/trunk/test/CodeGen/ARM/2011-09-19-cpsr.ll >> Modified: >> llvm/trunk/include/llvm/MC/MCInstrDesc.h >> llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp >> llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp >> llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp >> llvm/trunk/lib/Target/ARM/ARMInstrInfo.td >> llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td >> llvm/trunk/utils/TableGen/CodeGenInstruction.cpp >> llvm/trunk/utils/TableGen/CodeGenInstruction.h >> llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp >> >> Modified: llvm/trunk/include/llvm/MC/MCInstrDesc.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCInstrDesc.h?rev=140134&r1=140133&r2=140134&view=diff >> ============================================================================== >> --- llvm/trunk/include/llvm/MC/MCInstrDesc.h (original) >> +++ llvm/trunk/include/llvm/MC/MCInstrDesc.h Mon Sep 19 22:17:40 2011 >> @@ -477,14 +477,6 @@ >> return Flags & (1 << MCID::UsesCustomInserter); >> } >> >> - /// hasPostISelHook - Return true if this instruction requires *adjustment* >> - /// after instruction selection by calling a target hook. For example, this >> - /// can be used to fill in ARM 's' optional operand depending on whether >> - /// the conditional flag register is used. >> - bool hasPostISelHook() const { >> - return Flags & (1 << MCID::HasPostISelHook); >> - } >> - >> /// isRematerializable - Returns true if this instruction is a candidate for >> /// remat. This flag is deprecated, please don't use it anymore. If this >> /// flag is set, the isReallyTriviallyReMaterializable() method is called to >> >> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp?rev=140134&r1=140133&r2=140134&view=diff >> ============================================================================== >> --- llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp (original) >> +++ llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp Mon Sep 19 22:17:40 2011 >> @@ -763,8 +763,7 @@ >> } >> >> // Run post-isel target hook to adjust this instruction if needed. >> - if (II.hasPostISelHook()) >> - TLI->AdjustInstrPostInstrSelection(MI, Node); >> + TLI->AdjustInstrPostInstrSelection(MI, Node); >> } >> >> /// EmitSpecialNode - Generate machine code for a target-independent node and >> >> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=140134&r1=140133&r2=140134&view=diff >> ============================================================================== >> --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original) >> +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Mon Sep 19 22:17:40 2011 >> @@ -179,12 +179,7 @@ >> >> void TargetLowering::AdjustInstrPostInstrSelection(MachineInstr *MI, >> SDNode *Node) const { >> -#ifndef NDEBUG >> - dbgs() << "If a target marks an instruction with " >> - "'hasPostISelHook', it must implement " >> - "TargetLowering::AdjustInstrPostInstrSelection!"; >> -#endif >> - llvm_unreachable(0); >> + // Do nothing unless the target overrides it. >> } >> >> //===----------------------------------------------------------------------===// >> >> Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=140134&r1=140133&r2=140134&view=diff >> ============================================================================== >> --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original) >> +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Mon Sep 19 22:17:40 2011 >> @@ -5752,27 +5752,68 @@ >> } >> } >> >> +/// Generally, ARM instructions may be optionally encoded with a 's' >> +/// bit. However, some opcodes have a compact encoding that forces an implicit >> +/// 's' bit. List these exceptions here. >> +static bool hasForcedCPSRDef(const MCInstrDesc &MCID) { >> + switch (MCID.getOpcode()) { >> + case ARM::t2ADDSri: >> + case ARM::t2ADDSrr: >> + case ARM::t2ADDSrs: >> + case ARM::t2SUBSri: >> + case ARM::t2SUBSrr: >> + case ARM::t2SUBSrs: >> + return true; >> + } >> + return false; >> +} >> + >> void ARMTargetLowering::AdjustInstrPostInstrSelection(MachineInstr *MI, >> SDNode *Node) const { >> - // Adjust potentially 's' setting instructions after isel, i.e. ADC, SBC, >> - // RSB, RSC. Coming out of isel, they have an implicit CPSR def, but the >> - // optional operand is not filled in. If the carry bit is used, then change >> - // the optional operand to CPSR. Otherwise, remove the CPSR implicit def. >> + // Adjust potentially 's' setting instructions after isel, i.e. ADC, SBC, RSB, >> + // RSC. Coming out of isel, they have an implicit CPSR def, but the optional >> + // operand is still set to noreg. If needed, set the optional operand's >> + // register to CPSR, and remove the redundant implicit def. >> + >> const MCInstrDesc &MCID = MI->getDesc(); >> - if (Node->hasAnyUseOfValue(1)) { >> - MachineOperand &MO = MI->getOperand(MCID.getNumOperands() - 1); >> - MO.setReg(ARM::CPSR); >> - MO.setIsDef(true); >> - } else { >> - for (unsigned i = MCID.getNumOperands(), e = MI->getNumOperands(); >> - i != e; ++i) { >> - const MachineOperand &MO = MI->getOperand(i); >> - if (MO.isReg() && MO.isDef() && MO.getReg() == ARM::CPSR) { >> - MI->RemoveOperand(i); >> - break; >> - } >> + unsigned ccOutIdx = MCID.getNumOperands() - 1; >> + bool forcedCPSR = hasForcedCPSRDef(MCID); >> + >> + // Any ARM instruction that sets the 's' bit should specify an optional >> + // "cc_out" operand in the last operand position. >> + if (!MCID.hasOptionalDef() || !MCID.OpInfo[ccOutIdx].isOptionalDef()) { >> + assert(!forcedCPSR && "Optional cc_out operand required"); >> + return; >> + } >> + // Look for an implicit def of CPSR added by MachineInstr ctor. >> + bool definesCPSR = false; >> + bool deadCPSR = false; >> + for (unsigned i = MCID.getNumOperands(), e = MI->getNumOperands(); >> + i != e; ++i) { >> + const MachineOperand &MO = MI->getOperand(i); >> + if (MO.isReg() && MO.isDef() && MO.getReg() == ARM::CPSR) { >> + definesCPSR = true; >> + if (MO.isDead()) >> + deadCPSR = true; >> + MI->RemoveOperand(i); >> + break; >> } >> } >> + if (!definesCPSR) { >> + assert(!forcedCPSR && "Optional cc_out operand required"); >> + return; >> + } >> + assert(deadCPSR == !Node->hasAnyUseOfValue(1) && "inconsistent dead flag"); >> + >> + // If possible, select the encoding that does not set the 's' bit. >> + if (deadCPSR && !forcedCPSR) >> + return; >> + >> + MachineOperand &MO = MI->getOperand(ccOutIdx); >> + MO.setReg(ARM::CPSR); >> + MO.setIsDef(true); >> + if (deadCPSR) >> + MO.setIsDead(); >> } >> >> //===----------------------------------------------------------------------===// >> >> Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=140134&r1=140133&r2=140134&view=diff >> ============================================================================== >> --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) >> +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Mon Sep 19 22:17:40 2011 >> @@ -1026,7 +1026,7 @@ >> } >> >> /// AsI1_rbin_s_is - Same as AsI1_rbin_s_is except it sets 's' bit by default. >> -let hasPostISelHook = 1, isCodeGenOnly = 1, Defs = [CPSR] in { >> +let isCodeGenOnly = 1, Defs = [CPSR] in { >> multiclass AsI1_rbin_s_is opcod, string opc, >> InstrItinClass iii, InstrItinClass iir, InstrItinClass iis, >> PatFrag opnode, bit Commutable = 0> { >> @@ -1090,7 +1090,7 @@ >> } >> >> /// AsI1_bin_s_irs - Same as AsI1_bin_irs except it sets the 's' bit by default. >> -let hasPostISelHook = 1, isCodeGenOnly = 1, Defs = [CPSR] in { >> +let isCodeGenOnly = 1, Defs = [CPSR] in { >> multiclass AsI1_bin_s_irs opcod, string opc, >> InstrItinClass iii, InstrItinClass iir, InstrItinClass iis, >> PatFrag opnode, bit Commutable = 0> { >> @@ -1278,7 +1278,7 @@ >> /// AI1_adde_sube_irs - Define instructions and patterns for adde and sube. >> multiclass AI1_adde_sube_irs opcod, string opc, PatFrag opnode, >> string baseOpc, bit Commutable = 0> { >> - let hasPostISelHook = 1, Defs = [CPSR], Uses = [CPSR] in { >> + let Defs = [CPSR], Uses = [CPSR] in { >> def ri : AsI1> DPFrm, IIC_iALUi, opc, "\t$Rd, $Rn, $imm", >> [(set GPR:$Rd, CPSR, (opnode GPR:$Rn, so_imm:$imm, CPSR))]>, >> @@ -1366,7 +1366,7 @@ >> /// AI1_rsc_irs - Define instructions and patterns for rsc >> multiclass AI1_rsc_irs opcod, string opc, PatFrag opnode, >> string baseOpc> { >> - let hasPostISelHook = 1, Defs = [CPSR], Uses = [CPSR] in { >> + let Defs = [CPSR], Uses = [CPSR] in { >> def ri : AsI1> DPFrm, IIC_iALUi, opc, "\t$Rd, $Rn, $imm", >> [(set GPR:$Rd, CPSR, (opnode so_imm:$imm, GPR:$Rn, CPSR))]>, >> >> Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=140134&r1=140133&r2=140134&view=diff >> ============================================================================== >> --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) >> +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Mon Sep 19 22:17:40 2011 >> @@ -592,7 +592,7 @@ >> >> /// T2I_bin_s_irs - Similar to T2I_bin_irs except it sets the 's' bit so the >> /// instruction modifies the CPSR register. >> -let hasPostISelHook = 1, isCodeGenOnly = 1, Defs = [CPSR] in { >> +let isCodeGenOnly = 1, Defs = [CPSR] in { >> multiclass T2I_bin_s_irs opcod, string opc, >> InstrItinClass iii, InstrItinClass iir, InstrItinClass iis, >> PatFrag opnode, bit Commutable = 0> { >> @@ -738,7 +738,7 @@ >> >> /// T2I_rbin_s_is - Same as T2I_rbin_irs except sets 's' bit and the register >> /// version is not needed since this is only for codegen. >> -let hasPostISelHook = 1, isCodeGenOnly = 1, Defs = [CPSR] in { >> +let isCodeGenOnly = 1, Defs = [CPSR] in { >> multiclass T2I_rbin_s_is opcod, string opc, PatFrag opnode> { >> // shifted imm >> def ri : T2sTwoRegImm< >> @@ -1846,12 +1846,10 @@ >> IIC_iALUi, IIC_iALUr, IIC_iALUsi, >> BinOpFrag<(ARMsubc node:$LHS, node:$RHS)>>; >> >> -let hasPostISelHook = 1 in { >> defm t2ADC : T2I_adde_sube_irs<0b1010, "adc", >> BinOpWithFlagFrag<(ARMadde node:$LHS, node:$RHS, node:$FLAG)>, 1>; >> defm t2SBC : T2I_adde_sube_irs<0b1011, "sbc", >> BinOpWithFlagFrag<(ARMsube node:$LHS, node:$RHS, node:$FLAG)>>; >> -} >> >> // RSB >> defm t2RSB : T2I_rbin_irs <0b1110, "rsb", >> >> Added: llvm/trunk/test/CodeGen/ARM/2011-09-19-cpsr.ll >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2011-09-19-cpsr.ll?rev=140134&view=auto >> ============================================================================== >> --- llvm/trunk/test/CodeGen/ARM/2011-09-19-cpsr.ll (added) >> +++ llvm/trunk/test/CodeGen/ARM/2011-09-19-cpsr.ll Mon Sep 19 22:17:40 2011 >> @@ -0,0 +1,54 @@ >> +; RUN: llc -march=thumb -mcpu=cortex-a8 < %s >> +; rdar://problem/10137436: sqlite3 miscompile >> +; >> +; CHECK: subs >> +; CHECK: cmp >> +; CHECK: it >> + >> +target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32" >> +target triple = "thumbv7-apple-ios4.0.0" >> + >> +declare i8* @__memset_chk(i8*, i32, i32, i32) nounwind >> + >> +define hidden fastcc i32 @sqlite3VdbeExec(i32* %p) nounwind { >> +entry: >> + br label %sqlite3VarintLen.exit7424 >> + >> +sqlite3VarintLen.exit7424: ; preds = %do.body.i7423 >> + br label %do.body.i >> + >> +do.body.i: ; preds = %do.body.i, %sqlite3VarintLen.exit7424 >> + br i1 undef, label %do.body.i, label %sqlite3VarintLen.exit >> + >> +sqlite3VarintLen.exit: ; preds = %do.body.i >> + %sub2322 = add i64 undef, undef >> + br i1 undef, label %too_big, label %if.end2327 >> + >> +if.end2327: ; preds = %sqlite3VarintLen.exit >> + br i1 undef, label %if.end2341, label %no_mem >> + >> +if.end2341: ; preds = %if.end2327 >> + br label %for.body2355 >> + >> +for.body2355: ; preds = %for.body2355, %if.end2341 >> + %add2366 = add nsw i32 undef, undef >> + br i1 undef, label %for.body2377, label %for.body2355 >> + >> +for.body2377: ; preds = %for.body2355 >> + %conv23836154 = zext i32 %add2366 to i64 >> + %sub2384 = sub i64 %sub2322, %conv23836154 >> + %conv2385 = trunc i64 %sub2384 to i32 >> + %len.0.i = select i1 undef, i32 %conv2385, i32 undef >> + %sub.i7384 = sub nsw i32 %len.0.i, 0 >> + %call.i.i7385 = call i8* @__memset_chk(i8* undef, i32 0, i32 %sub.i7384, i32 undef) nounwind >> + unreachable >> + >> +too_big: ; preds = %sqlite3VarintLen.exit >> + unreachable >> + >> +no_mem: ; preds = %if.end2327, %for.body, %entry.no_mem_crit_edge >> + unreachable >> + >> +sqlite3ErrStr.exit: ; preds = %if.then82 >> + unreachable >> +} >> >> Modified: llvm/trunk/utils/TableGen/CodeGenInstruction.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenInstruction.cpp?rev=140134&r1=140133&r2=140134&view=diff >> ============================================================================== >> --- llvm/trunk/utils/TableGen/CodeGenInstruction.cpp (original) >> +++ llvm/trunk/utils/TableGen/CodeGenInstruction.cpp Mon Sep 19 22:17:40 2011 >> @@ -309,7 +309,6 @@ >> isReMaterializable = R->getValueAsBit("isReMaterializable"); >> hasDelaySlot = R->getValueAsBit("hasDelaySlot"); >> usesCustomInserter = R->getValueAsBit("usesCustomInserter"); >> - hasPostISelHook = R->getValueAsBit("hasPostISelHook"); >> hasCtrlDep = R->getValueAsBit("hasCtrlDep"); >> isNotDuplicable = R->getValueAsBit("isNotDuplicable"); >> hasSideEffects = R->getValueAsBit("hasSideEffects"); >> >> Modified: llvm/trunk/utils/TableGen/CodeGenInstruction.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenInstruction.h?rev=140134&r1=140133&r2=140134&view=diff >> ============================================================================== >> --- llvm/trunk/utils/TableGen/CodeGenInstruction.h (original) >> +++ llvm/trunk/utils/TableGen/CodeGenInstruction.h Mon Sep 19 22:17:40 2011 >> @@ -233,7 +233,6 @@ >> bool isReMaterializable; >> bool hasDelaySlot; >> bool usesCustomInserter; >> - bool hasPostISelHook; >> bool hasCtrlDep; >> bool isNotDuplicable; >> bool hasSideEffects; >> >> Modified: llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp?rev=140134&r1=140133&r2=140134&view=diff >> ============================================================================== >> --- llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp (original) >> +++ llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp Mon Sep 19 22:17:40 2011 >> @@ -288,7 +288,6 @@ >> if (Inst.isNotDuplicable) OS << "|(1<> if (Inst.Operands.hasOptionalDef) OS << "|(1<> if (Inst.usesCustomInserter) OS << "|(1<> - if (Inst.hasPostISelHook) OS << "|(1<> if (Inst.Operands.isVariadic)OS << "|(1<> if (Inst.hasSideEffects) OS << "|(1<> if (Inst.isAsCheapAsAMove) OS << "|(1<> @@ -345,7 +344,7 @@ >> >> // We must emit the PHI opcode first... >> std::string Namespace = Target.getInstNamespace(); >> - >> + >> if (Namespace.empty()) { >> fprintf(stderr, "No instructions defined!\n"); >> exit(1); >> >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From zvi.rackover at intel.com Tue Sep 20 01:42:52 2011 From: zvi.rackover at intel.com (Rackover, Zvi) Date: Tue, 20 Sep 2011 09:42:52 +0300 Subject: [llvm-commits] [AVX] Add EXTRACT_SUBVECTOR to DAGCombine In-Reply-To: References: <2B8953F251AC92428D9BBC92D9B218865E9469BE94@hasmsx502.ger.corp.intel.com> Message-ID: <2B8953F251AC92428D9BBC92D9B218865E950F3577@hasmsx502.ger.corp.intel.com> Bruno, thanks for reviewing and investing effort in this. The undef is only a special case of what this patch addresses. Take for example one of the tests in the patch: define <8 x i32> @test(<8 x i32> %v1, <8 x i32> %v2) { %1 = add <8 x i32> %v1, %v2 %2 = add <8 x i32> %1, %v1 ret <8 x i32> %2 } Running on TOT gives: vextractf128 $1, %ymm1, %xmm3 vextractf128 $1, %ymm0, %xmm2 vpaddd %xmm3, %xmm2, %xmm3 vpaddd %xmm1, %xmm0, %xmm1 vinsertf128 $1, %xmm3, %ymm1, %ymm3 <-------- vextractf128 $1, %ymm3, %xmm1 <--------- vpaddd %xmm2, %xmm1, %xmm1 vpaddd %xmm0, %xmm3, %xmm0 vinsertf128 $1, %xmm1, %ymm0, %ymm0 Running with the patch applied gives: vextractf128 $1, %ymm1, %xmm3 vextractf128 $1, %ymm0, %xmm2 vpaddd %xmm3, %xmm2, %xmm3 vpaddd %xmm2, %xmm3, %xmm2 vpaddd %xmm1, %xmm0, %xmm1 vpaddd %xmm0, %xmm1, %xmm0 vinsertf128 $1, %xmm2, %ymm0, %ymm0 We can optimize away redundant insert_subvector/extract_subvector pairs by applying the following transforms: EXTRACT_SV( INSERT_SV( V1, V2, I ), I) ----> V2 EXTRACT_SV( INSERT_SV( V1, V2, I1 ), I2) ----> EXTRACT_SV( V1, I2 ) I thought it would be right to make this optimization target-interdependent, but if it should be X86-specific, where should it be located? Thanks, Zvi -----Original Message----- From: Bruno Cardoso Lopes [mailto:bruno.cardoso at gmail.com] Sent: Tuesday, September 20, 2011 02:41 To: Rackover, Zvi Cc: llvm-commits at cs.uiuc.edu Subject: Re: [llvm-commits] [AVX] Add EXTRACT_SUBVECTOR to DAGCombine Hi Zvi, On Mon, Sep 19, 2011 at 11:31 AM, Rackover, Zvi wrote: > Hi Bruno and other codegen people, > > > > Please review the attached patch and commit if acceptable. > > I categorized this patch as AVX, since I am not aware of other cases in X86 > where it shows any benefit. You should be looking in INSERT_SUBVECTOR instead of extract, because is the undef being inserted in the upper part that you want to catch. I provided another fix for this in r140097 Thanks -- Bruno Cardoso Lopes http://www.brunocardoso.cc --------------------------------------------------------------------- Intel Israel (74) Limited This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). Any review or distribution by others is strictly prohibited. If you are not the intended recipient, please contact the sender and delete all copies. From ahatanak at gmail.com Mon Sep 19 15:26:03 2011 From: ahatanak at gmail.com (Akira Hatanaka) Date: Mon, 19 Sep 2011 20:26:03 -0000 Subject: [llvm-commits] [llvm] r140046 - /llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Message-ID: <20110919202603.132292A6C12C@llvm.org> Author: ahatanak Date: Mon Sep 19 15:26:02 2011 New Revision: 140046 URL: http://llvm.org/viewvc/llvm-project?rev=140046&view=rev Log: Make changes to avoid creating nested CALLSEQ_START/END constructs, which aren't yet legal according to comments in LegalizeDAG.cpp:227. Memcpy nodes created for copying byval arguments are inserted before CALLSEQ_START. The two failing tests reported in PR10876 pass after applying this patch. Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=140046&r1=140045&r2=140046&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Mon Sep 19 15:26:02 2011 @@ -1799,7 +1799,7 @@ // Write ByVal Arg to arg registers and stack. static void -WriteByValArg(SDValue& Chain, DebugLoc dl, +WriteByValArg(SDValue& ByValChain, SDValue Chain, DebugLoc dl, SmallVector, 16>& RegsToPass, SmallVector& MemOpChains, int& LastFI, MachineFrameInfo *MFI, SelectionDAG &DAG, SDValue Arg, @@ -1882,19 +1882,18 @@ DAG.getConstant(Offset, MVT::i32)); LastFI = MFI->CreateFixedObject(RemainingSize, LocMemOffset, true); SDValue Dst = DAG.getFrameIndex(LastFI, PtrType); - Chain = DAG.getMemcpy(Chain, dl, Dst, Src, - DAG.getConstant(RemainingSize, MVT::i32), - std::min(ByValAlign, (unsigned)4), - /*isVolatile=*/false, /*AlwaysInline=*/false, - MachinePointerInfo(0), MachinePointerInfo(0)); - MemOpChains.push_back(Chain); + ByValChain = DAG.getMemcpy(ByValChain, dl, Dst, Src, + DAG.getConstant(RemainingSize, MVT::i32), + std::min(ByValAlign, (unsigned)4), + /*isVolatile=*/false, /*AlwaysInline=*/false, + MachinePointerInfo(0), MachinePointerInfo(0)); } /// LowerCall - functions arguments are copied from virtual regs to /// (physical regs)/(stack frame), CALLSEQ_START and CALLSEQ_END are emitted. /// TODO: isTailCall. SDValue -MipsTargetLowering::LowerCall(SDValue Chain, SDValue Callee, +MipsTargetLowering::LowerCall(SDValue InChain, SDValue Callee, CallingConv::ID CallConv, bool isVarArg, bool &isTailCall, const SmallVectorImpl &Outs, @@ -1924,8 +1923,13 @@ // Get a count of how many bytes are to be pushed on the stack. unsigned NextStackOffset = CCInfo.getNextStackOffset(); - Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(NextStackOffset, - true)); + // Chain is the output chain of the last Load/Store or CopyToReg node. + // ByValChain is the output chain of the last Memcpy node created for copying + // byval arguments to the stack. + SDValue Chain, CallSeqStart, ByValChain; + SDValue NextStackOffsetVal = DAG.getIntPtrConstant(NextStackOffset, true); + Chain = CallSeqStart = DAG.getCALLSEQ_START(InChain, NextStackOffsetVal); + ByValChain = InChain; // If this is the first call, create a stack frame object that points to // a location to which .cprestore saves $gp. @@ -2019,8 +2023,8 @@ "No support for ByVal args by ABIs other than O32 yet."); assert(Flags.getByValSize() && "ByVal args of size 0 should have been ignored by front-end."); - WriteByValArg(Chain, dl, RegsToPass, MemOpChains, LastFI, MFI, DAG, Arg, - VA, Flags, getPointerTy(), Subtarget->isLittle()); + WriteByValArg(ByValChain, Chain, dl, RegsToPass, MemOpChains, LastFI, MFI, + DAG, Arg, VA, Flags, getPointerTy(), Subtarget->isLittle()); continue; } @@ -2042,6 +2046,12 @@ if (LastFI) MipsFI->extendOutArgFIRange(FirstFI, LastFI); + // If a memcpy has been created to copy a byval arg to a stack, replace the + // chain input of CallSeqStart with ByValChain. + if (InChain != ByValChain) + DAG.UpdateNodeOperands(CallSeqStart.getNode(), ByValChain, + NextStackOffsetVal); + // Transform all store nodes into one single node because all store // nodes are independent of each other. if (!MemOpChains.empty()) From nadav.rotem at intel.com Tue Sep 20 02:11:51 2011 From: nadav.rotem at intel.com (Rotem, Nadav) Date: Tue, 20 Sep 2011 10:11:51 +0300 Subject: [llvm-commits] [AVX] Add EXTRACT_SUBVECTOR to DAGCombine In-Reply-To: <2B8953F251AC92428D9BBC92D9B218865E950F3577@hasmsx502.ger.corp.intel.com> References: <2B8953F251AC92428D9BBC92D9B218865E9469BE94@hasmsx502.ger.corp.intel.com> <2B8953F251AC92428D9BBC92D9B218865E950F3577@hasmsx502.ger.corp.intel.com> Message-ID: <6594DDFF12B03D4E89690887C2486994029A886212@hasmsx504.ger.corp.intel.com> Zvi's patch implements this optimization for subvectors. In some cases the new type-legalizer generates unneeded element inserts/extracts. The patch below implements the discussed optimization for vector elements. I plan to include it as part of the vector-select work. --- lib/CodeGen/SelectionDAG/DAGCombiner.cpp (revision 128837) +++ lib/CodeGen/SelectionDAG/DAGCombiner.cpp (working copy) @@ -6507,7 +6508,20 @@ // (vextract (v4f32 s2v (f32 load $addr)), c) -> (f32 load $addr+c*size) // (vextract (v4f32 shuffle (load $addr), <1,u,u,u>), 0) -> (f32 load $addr) SDValue EltNo = N->getOperand(1); + + // Extract (Insert (Elem, C), C) -> Elem + if (isa(EltNo) && InVec.getOpcode() == ISD::INSERT_VECTOR_ELT + && InVec.getOperand(2) == EltNo) { + return InVec.getOperand(1); + } + // Extract (Insert (Elem, C), K) and (C!=K)-> Extract (Elem, K) + if (isa(EltNo) && InVec.getOpcode() == ISD::INSERT_VECTOR_ELT + && isa(InVec.getOperand(2)) && InVec.getOperand(2) != EltNo) { + return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, N->getDebugLoc(), + N->getValueType(0), InVec.getOperand(0), N->getOperand(1)); + } + -----Original Message----- From: llvm-commits-bounces at cs.uiuc.edu [mailto:llvm-commits-bounces at cs.uiuc.edu] On Behalf Of Rackover, Zvi Sent: Tuesday, September 20, 2011 09:43 To: Bruno Cardoso Lopes Cc: llvm-commits at cs.uiuc.edu Subject: Re: [llvm-commits] [AVX] Add EXTRACT_SUBVECTOR to DAGCombine Bruno, thanks for reviewing and investing effort in this. The undef is only a special case of what this patch addresses. Take for example one of the tests in the patch: define <8 x i32> @test(<8 x i32> %v1, <8 x i32> %v2) { %1 = add <8 x i32> %v1, %v2 %2 = add <8 x i32> %1, %v1 ret <8 x i32> %2 } Running on TOT gives: vextractf128 $1, %ymm1, %xmm3 vextractf128 $1, %ymm0, %xmm2 vpaddd %xmm3, %xmm2, %xmm3 vpaddd %xmm1, %xmm0, %xmm1 vinsertf128 $1, %xmm3, %ymm1, %ymm3 <-------- vextractf128 $1, %ymm3, %xmm1 <--------- vpaddd %xmm2, %xmm1, %xmm1 vpaddd %xmm0, %xmm3, %xmm0 vinsertf128 $1, %xmm1, %ymm0, %ymm0 Running with the patch applied gives: vextractf128 $1, %ymm1, %xmm3 vextractf128 $1, %ymm0, %xmm2 vpaddd %xmm3, %xmm2, %xmm3 vpaddd %xmm2, %xmm3, %xmm2 vpaddd %xmm1, %xmm0, %xmm1 vpaddd %xmm0, %xmm1, %xmm0 vinsertf128 $1, %xmm2, %ymm0, %ymm0 We can optimize away redundant insert_subvector/extract_subvector pairs by applying the following transforms: EXTRACT_SV( INSERT_SV( V1, V2, I ), I) ----> V2 EXTRACT_SV( INSERT_SV( V1, V2, I1 ), I2) ----> EXTRACT_SV( V1, I2 ) I thought it would be right to make this optimization target-interdependent, but if it should be X86-specific, where should it be located? Thanks, Zvi -----Original Message----- From: Bruno Cardoso Lopes [mailto:bruno.cardoso at gmail.com] Sent: Tuesday, September 20, 2011 02:41 To: Rackover, Zvi Cc: llvm-commits at cs.uiuc.edu Subject: Re: [llvm-commits] [AVX] Add EXTRACT_SUBVECTOR to DAGCombine Hi Zvi, On Mon, Sep 19, 2011 at 11:31 AM, Rackover, Zvi wrote: > Hi Bruno and other codegen people, > > > > Please review the attached patch and commit if acceptable. > > I categorized this patch as AVX, since I am not aware of other cases in X86 > where it shows any benefit. You should be looking in INSERT_SUBVECTOR instead of extract, because is the undef being inserted in the upper part that you want to catch. I provided another fix for this in r140097 Thanks -- Bruno Cardoso Lopes http://www.brunocardoso.cc --------------------------------------------------------------------- Intel Israel (74) Limited This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). 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From baldrick at free.fr Tue Sep 20 02:32:27 2011 From: baldrick at free.fr (Duncan Sands) Date: Tue, 20 Sep 2011 09:32:27 +0200 Subject: [llvm-commits] [llvm] r140083 - /llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp In-Reply-To: <20110919230052.E35692A6C12C@llvm.org> References: <20110919230052.E35692A6C12C@llvm.org> Message-ID: <4E78418B.2060108@free.fr> Hi Bill, > If we are extracting a basic block that ends in an invoke call, we must also > extract the landing pad block. Otherwise, there will be a situation where the > invoke's unwind edge lands on a non-landing pad. > > We also forbid the user from extracting the landing pad block by itself. Again, > this is not a valid transformation. > > Modified: > llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp > > Modified: llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp?rev=140083&r1=140082&r2=140083&view=diff > ============================================================================== > --- llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp (original) > +++ llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp Mon Sep 19 18:00:52 2011 > @@ -664,7 +664,13 @@ > // * Pass in uses as args > // 3) Move code region, add call instr to func > // > - BlocksToExtract.insert(code.begin(), code.end()); > + for (std::vector::const_iterator > + I = code.begin(), E = code.end(); I != E; ++I) { > + BasicBlock *BB = *I; > + BlocksToExtract.insert(BB); > + if (InvokeInst *II = dyn_cast(BB->getTerminator())) > + BlocksToExtract.insert(II->getUnwindDest()); > + } I think the design of ExtractCodeRegion is that the caller should already have taken care of this kind of thing. For example, take a look at the following lines (// Assumption: this is a single-entry code region, ...). > > Values inputs, outputs; > > @@ -788,6 +794,7 @@ > /// ExtractBasicBlock - slurp a basic block into a brand new function > /// > Function* llvm::ExtractBasicBlock(BasicBlock *BB, bool AggregateArgs) { > + if (BB->isLandingPad()) return 0; Wouldn't it be better to put this logic in CodeExtractor::isEligible? Ciao, Duncan. From craig.topper at gmail.com Tue Sep 20 02:38:59 2011 From: craig.topper at gmail.com (Craig Topper) Date: Tue, 20 Sep 2011 07:38:59 -0000 Subject: [llvm-commits] [llvm] r140140 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/avx-minmax.ll Message-ID: <20110920073859.716B22A6C12D@llvm.org> Author: ctopper Date: Tue Sep 20 02:38:59 2011 New Revision: 140140 URL: http://llvm.org/viewvc/llvm-project?rev=140140&view=rev Log: Extend changes from r139986 to produce 256-bit AVX minps/minpd/maxps/maxpd. Added: llvm/trunk/test/CodeGen/X86/avx-minmax.ll Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=140140&r1=140139&r2=140140&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Sep 20 02:38:59 2011 @@ -12567,9 +12567,12 @@ // instructions match the semantics of the common C idiom xhasXMMInt() && Cond.getOpcode() == ISD::SETCC && - (LHS.getValueType() == MVT::f32 || LHS.getValueType() == MVT::f64 || - LHS.getValueType() == MVT::v4f32 || LHS.getValueType() == MVT::v2f64)) { + if (Cond.getOpcode() == ISD::SETCC && + ((Subtarget->hasXMMInt() && + (LHS.getValueType() == MVT::f32 || LHS.getValueType() == MVT::v4f32 || + LHS.getValueType() == MVT::f64 || LHS.getValueType() == MVT::v2f64)) || + (Subtarget->hasAVX() && + (LHS.getValueType() == MVT::v8f32 || LHS.getValueType() == MVT::v4f64)))) { ISD::CondCode CC = cast(Cond.getOperand(2))->get(); unsigned Opcode = 0; Added: llvm/trunk/test/CodeGen/X86/avx-minmax.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx-minmax.ll?rev=140140&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/avx-minmax.ll (added) +++ llvm/trunk/test/CodeGen/X86/avx-minmax.ll Tue Sep 20 02:38:59 2011 @@ -0,0 +1,65 @@ +; RUN: llc < %s -march=x86-64 -mattr=+avx -asm-verbose=false -join-physregs -enable-unsafe-fp-math -enable-no-nans-fp-math -promote-elements | FileCheck -check-prefix=UNSAFE %s + +; UNSAFE: maxpd: +; UNSAFE: vmaxpd %xmm +define <2 x double> @maxpd(<2 x double> %x, <2 x double> %y) { + %max_is_x = fcmp oge <2 x double> %x, %y + %max = select <2 x i1> %max_is_x, <2 x double> %x, <2 x double> %y + ret <2 x double> %max +} + +; UNSAFE: minpd: +; UNSAFE: vminpd %xmm +define <2 x double> @minpd(<2 x double> %x, <2 x double> %y) { + %min_is_x = fcmp ole <2 x double> %x, %y + %min = select <2 x i1> %min_is_x, <2 x double> %x, <2 x double> %y + ret <2 x double> %min +} + +; UNSAFE: maxps: +; UNSAFE: vmaxps %xmm +define <4 x float> @maxps(<4 x float> %x, <4 x float> %y) { + %max_is_x = fcmp oge <4 x float> %x, %y + %max = select <4 x i1> %max_is_x, <4 x float> %x, <4 x float> %y + ret <4 x float> %max +} + +; UNSAFE: minps: +; UNSAFE: vminps %xmm +define <4 x float> @minps(<4 x float> %x, <4 x float> %y) { + %min_is_x = fcmp ole <4 x float> %x, %y + %min = select <4 x i1> %min_is_x, <4 x float> %x, <4 x float> %y + ret <4 x float> %min +} + +; UNSAFE: vmaxpd: +; UNSAFE: vmaxpd %ymm +define <4 x double> @vmaxpd(<4 x double> %x, <4 x double> %y) { + %max_is_x = fcmp oge <4 x double> %x, %y + %max = select <4 x i1> %max_is_x, <4 x double> %x, <4 x double> %y + ret <4 x double> %max +} + +; UNSAFE: vminpd: +; UNSAFE: vminpd %ymm +define <4 x double> @vminpd(<4 x double> %x, <4 x double> %y) { + %min_is_x = fcmp ole <4 x double> %x, %y + %min = select <4 x i1> %min_is_x, <4 x double> %x, <4 x double> %y + ret <4 x double> %min +} + +; UNSAFE: vmaxps: +; UNSAFE: vmaxps %ymm +define <8 x float> @vmaxps(<8 x float> %x, <8 x float> %y) { + %max_is_x = fcmp oge <8 x float> %x, %y + %max = select <8 x i1> %max_is_x, <8 x float> %x, <8 x float> %y + ret <8 x float> %max +} + +; UNSAFE: vminps: +; UNSAFE: vminps %ymm +define <8 x float> @vminps(<8 x float> %x, <8 x float> %y) { + %min_is_x = fcmp ole <8 x float> %x, %y + %min = select <8 x i1> %min_is_x, <8 x float> %x, <8 x float> %y + ret <8 x float> %min +} From 6yearold at gmail.com Tue Sep 20 02:40:49 2011 From: 6yearold at gmail.com (arrowdodger) Date: Tue, 20 Sep 2011 11:40:49 +0400 Subject: [llvm-commits] [llvm] r140121 - in /llvm/trunk: docs/ docs/CommandGuide/ include/llvm/CompilerDriver/ lib/ lib/CompilerDriver/ utils/TableGen/ In-Reply-To: <20110920003427.E071C2A6C12C@llvm.org> References: <20110920003427.E071C2A6C12C@llvm.org> Message-ID: I've thought, the purpose of CompilerDriver library was to assist language writers to create theirs driver executables. And LLVMC is example of it's usage. It's not i was using it, but i'm sad of it's removal. -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110920/a3498d25/attachment.html From baldrick at free.fr Tue Sep 20 03:18:50 2011 From: baldrick at free.fr (Duncan Sands) Date: Tue, 20 Sep 2011 10:18:50 +0200 Subject: [llvm-commits] [llvm] r140128 - /llvm/trunk/docs/ExceptionHandling.html In-Reply-To: <20110920010853.92B1B2A6C12C@llvm.org> References: <20110920010853.92B1B2A6C12C@llvm.org> Message-ID: <4E784C6A.2090604@free.fr> Hi Bill, > +

    Thelandingpad instruction takes a reference to the personality > + function to be used for thistry/catch sequence. The > + remainder of the instruction is a list ofcatch andfilter > + clauses. The exception is tested against the clauses sequentially from first > + to last. The selector value is a positive number if the exception matched a > + type info, a negative number if it matched a filter, and zero if it matched a > + cleanup. If nothing is matched, the behaviour of the program > + isundefined. woah! In order to have inlining work, the LLVM IR that compares the selector value with catches (via llvm.eh.typeid.for) needs to call "resume" if nothing matches. So I think it would be better to say that if an exception doesn't match a catch or filter, then control might still get here but with a selector value that doesn't correspond to any of the catches/filters in the landingpad instruction. That automatically forces people to do a "resume" if the selector doesn't match any of their catches. And this is what happens if the landingpad is inlined into another function: if there are some additional catches in the caller, then they get appended to the landingpad instruction, which means that you can get the selector value for them even though in the original landing pad that value didn't correspond to any of the catches/filters. If a type info matched, then the > + selector value is the index of the type info in the exception table, which > + can be obtained using the > +llvm.eh.typeid.for intrinsic.

    > >

    Once the landing pad has the type info selector, the code branches to the > - code for the first catch. The catch then checks the value of the type info > + code for the first catch. The catch then checks the value of the type info > selector against the index of type info for that catch. Since the type info > index is not known until all the type info have been gathered in the backend, > the catch code will call the > -llvm.eh.typeid.for intrinsic > - to determine the index for a given type info. If the catch fails to match > - the selector then control is passed on to the next catch. Note: Since the > - landing pad will not be used if there is no match in the list of type info on > - the call tollvm.eh.selector, then > - neither the last catch norcatch all need to perform the check > - against the selector.

    > +llvm.eh.typeid.for intrinsic to > + determine the index for a given type info. If the catch fails to match the > + selector then control is passed on to the next catch. Note: Since the landing > + pad will not be used if there is no match in the list of type info on the > + call to thelandingpad > + instruction, then neither the last catch norcatch all need to > + perform the check against the selector.

    This last bit is just wrong because of inlining. > >

    Finally, the entry and exit of catch code is bracketed with calls > to__cxa_begin_catch and__cxa_end_catch.

    > @@ -318,16 +305,14 @@ > >
    > > -

    A cleanup is extra code which needs to be run as part of unwinding > - a scope. C++ destructors are a prominent example, but other > - languages and language extensions provide a variety of different > - kinds of cleanup. In general, a landing pad may need to run > - arbitrary amounts of cleanup code before actually entering a catch > - block. To indicate the presence of cleanups, a landing pad's call > - tollvm.eh.selector should > - end with the argumenti32 0; otherwise, the unwinder will > - not stop at the landing pad if there are no catches or filters that > - require it to.

    > +

    A cleanup is extra code which needs to be run as part of unwinding a scope. > + C++ destructors are a prominent example, but other languages and language > + extensions provide a variety of different kinds of cleanup. In general, a > + landing pad may need to run arbitrary amounts of cleanup code before actually before -> before or after In Ada it is after, and due to inlining even in C++ the cleanup code may appear "in the middle": after comparing the selector with some catches, but before comparing it with some other catches. > + entering a catch block. To indicate the presence of cleanups, a > +landingpad instruction > + should have acleanup clause. Otherwise, the unwinder will not stop at > + the landing pad if there are no catches or filters that require it to.

    > >

    Do not allow a new exception to propagate out of the execution of a > cleanup. This can corrupt the internal state of the unwinder. > @@ -337,9 +322,9 @@ > >

    When all cleanups have completed, if the exception is not handled > by the current function, resume unwinding by calling the > -llvm.eh.resume intrinsic, > - passing in the results ofllvm.eh.exception and > -llvm.eh.selector for the original landing pad.

    > +resume instruction, passing in > + the results of thelandingpad instruction for the original landing results -> result > + pad.

    > >
    > > @@ -352,21 +337,19 @@ > >

    C++ allows the specification of which exception types can be thrown from a > function. To represent this a top level landing pad may exist to filter out > - invalid types. To express this in LLVM code the landing pad will > - callllvm.eh.selector. The > - arguments are a reference to the exception structure, a reference to the > - personality function, the length of the filter expression (the number of type > - infos plus one), followed by the type infos themselves. > -llvm.eh.selector will return a > - negative value if the exception does not match any of the type infos. If no > - match is found then a call to__cxa_call_unexpected should be made, > - otherwise_Unwind_Resume. Each of these functions requires a > - reference to the exception structure. Note that the most general form of an > -llvm.eh.selector call can contain > - any number of type infos, filter expressions and cleanups (though having more > - than one cleanup is pointless). The LLVM C++ front-end can generate such > -llvm.eh.selector calls due to > - inlining creating nested exception handling scopes.

    > + invalid types. To express this in LLVM code the > +landingpad instruction will > + have a filter clause. The clause consists of an array of type infos. > +landingpad will return a negative value if the exception does not > + match any of the type infos. If no match is found then a call > + to__cxa_call_unexpected should be made, otherwise > +_Unwind_Resume. _Unwind_Resume -> resume Each of these functions requires a reference to the > + exception structure. Note that the most general form of a > +landingpad instruction can > + have any number of catch, cleanup, and filter clauses (though having more > + than one cleanup is pointless). As there is now only a cleanup flag, you can't have multiple cleanup "clauses". The LLVM C++ front-end can generate such > +landingpad instructions due > + to inlining creating nested exception handling scopes.

    > > > > @@ -377,29 +360,27 @@ > >
    > > -

    The unwinder delegates the decision of whether to stop in a call > - frame to that call frame's language-specific personality function. > - Not all personalities functions guarantee that they will stop to > - perform cleanups: for example, the GNU C++ personality doesn't do > - so unless the exception is actually caught somewhere further up the > - stack. When using this personality to implement EH for a language > - that guarantees that cleanups will always be run, be sure to > - indicate a catch-all in the > -llvm.eh.selector call > +

    The unwinder delegates the decision of whether to stop in a call frame to > + that call frame's language-specific personality function. Not all > + personalities functions guarantee that they will stop to perform > + cleanups. For example, the GNU C++ personality doesn't do so unless the > + exception is actually caught somewhere further up the stack. Here I think it would be good to make clear that in this case the program exits with a called to terminate - the stack isn't unwound at all (well, the unwinder crawls up the stack in the search phase but no more than that). When using this > + personality to implement EH for a language that guarantees that cleanups will > + always be run, be sure to indicate a catch-all in the > +landingpad instruction > rather than just cleanups.

    Ada uses forced unwinding rather than catch-alls to get this effect. I suggest just dropping this bit of advice. > > -

    In order for inlining to behave correctly, landing pads must be > - prepared to handle selector results that they did not originally > - advertise. Suppose that a function catches exceptions of > - typeA, and it's inlined into a function that catches > - exceptions of typeB. The inliner will update the > - selector for the inlined landing pad to include the fact > - thatB is caught. If that landing pad assumes that it > - will only be entered to catch anA, it's in for a rude > - surprise. Consequently, landing pads must test for the selector > - results they understand and then resume exception propagation > - with thellvm.eh.resume > - intrinsic if none of the conditions match.

    > +

    In order for inlining to behave correctly, landing pads must be prepared to > + handle selector results that they did not originally advertise. Right! Suppose that > + a function catches exceptions of typeA, and it's inlined into a > + function that catches exceptions of typeB. The inliner will update > + thelandingpad instruction for the inlined landing pad to include > + the fact thatB is caught. If that landing pad assumes that it will > + only be entered to catch anA, it's in for a rude surprise. > + Consequently, landing pads must test for the selector results they understand > + and then resume exception propagation with the > +resume instruction if none of > + the conditions match.

    Nice explanation. Ciao, Duncan. From baldrick at free.fr Tue Sep 20 03:27:00 2011 From: baldrick at free.fr (Duncan Sands) Date: Tue, 20 Sep 2011 10:27:00 +0200 Subject: [llvm-commits] [llvm] r140140 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/avx-minmax.ll In-Reply-To: <20110920073859.716B22A6C12D@llvm.org> References: <20110920073859.716B22A6C12D@llvm.org> Message-ID: <4E784E54.3010204@free.fr> Hi Craig, > Extend changes from r139986 to produce 256-bit AVX minps/minpd/maxps/maxpd. thanks for doing this. > --- llvm/trunk/test/CodeGen/X86/avx-minmax.ll (added) > +++ llvm/trunk/test/CodeGen/X86/avx-minmax.ll Tue Sep 20 02:38:59 2011 > @@ -0,0 +1,65 @@ > +; RUN: llc< %s -march=x86-64 -mattr=+avx -asm-verbose=false -join-physregs -enable-unsafe-fp-math -enable-no-nans-fp-math -promote-elements | FileCheck -check-prefix=UNSAFE %s Why are -asm-verbose=false -join-physregs needed? > +; UNSAFE: maxpd: > +; UNSAFE: vmaxpd %xmm > +define<2 x double> @maxpd(<2 x double> %x,<2 x double> %y) { > + %max_is_x = fcmp oge<2 x double> %x, %y > + %max = select<2 x i1> %max_is_x,<2 x double> %x,<2 x double> %y > + ret<2 x double> %max > +} Is producing vmaxpd here rather than maxpd a good thing to do? Ciao, Duncan. From wendling at apple.com Tue Sep 20 03:27:21 2011 From: wendling at apple.com (Bill Wendling) Date: Tue, 20 Sep 2011 01:27:21 -0700 Subject: [llvm-commits] [llvm] r140128 - /llvm/trunk/docs/ExceptionHandling.html In-Reply-To: <4E784C6A.2090604@free.fr> References: <20110920010853.92B1B2A6C12C@llvm.org> <4E784C6A.2090604@free.fr> Message-ID: On Sep 20, 2011, at 1:18 AM, Duncan Sands wrote: > Hi Bill, > >> +

    Thelandingpad instruction takes a reference to the personality >> + function to be used for thistry/catch sequence. The >> + remainder of the instruction is a list ofcatch andfilter >> + clauses. The exception is tested against the clauses sequentially from first >> + to last. The selector value is a positive number if the exception matched a >> + type info, a negative number if it matched a filter, and zero if it matched a >> + cleanup. If nothing is matched, the behaviour of the program >> + isundefined. > > woah! In order to have inlining work, the LLVM IR that compares the selector > value with catches (via llvm.eh.typeid.for) needs to call "resume" if nothing > matches. So I think it would be better to say that if an exception doesn't > match a catch or filter, then control might still get here but with a selector > value that doesn't correspond to any of the catches/filters in the landingpad > instruction. That automatically forces people to do a "resume" if the selector > doesn't match any of their catches. And this is what happens if the landingpad > is inlined into another function: if there are some additional catches in the > caller, then they get appended to the landingpad instruction, which means that > you can get the selector value for them even though in the original landing pad > that value didn't correspond to any of the catches/filters. > Hang on. That was from the original doc. :) I'll update it appropriately. > Each of these functions requires a reference to the >> + exception structure. Note that the most general form of a >> +landingpad instruction can >> + have any number of catch, cleanup, and filter clauses (though having more >> + than one cleanup is pointless). > > As there is now only a cleanup flag, you can't have multiple cleanup "clauses". > I thought about that, and yeah. Though you could potentially write something like this: landingpad { i8*, i32 } personality ... cleanup catch i8* @_ZTIi cleanup and it would still work and be just as pointless. > The LLVM C++ front-end can generate such >> +landingpad instructions due >> + to inlining creating nested exception handling scopes.

    >> >>
    >> >> @@ -377,29 +360,27 @@ >> >>
    >> >> -

    The unwinder delegates the decision of whether to stop in a call >> - frame to that call frame's language-specific personality function. >> - Not all personalities functions guarantee that they will stop to >> - perform cleanups: for example, the GNU C++ personality doesn't do >> - so unless the exception is actually caught somewhere further up the >> - stack. When using this personality to implement EH for a language >> - that guarantees that cleanups will always be run, be sure to >> - indicate a catch-all in the >> -llvm.eh.selector call >> +

    The unwinder delegates the decision of whether to stop in a call frame to >> + that call frame's language-specific personality function. Not all >> + personalities functions guarantee that they will stop to perform >> + cleanups. For example, the GNU C++ personality doesn't do so unless the >> + exception is actually caught somewhere further up the stack. > > Here I think it would be good to make clear that in this case the program > exits with a called to terminate - the stack isn't unwound at all (well, > the unwinder crawls up the stack in the search phase but no more than that). > > When using this >> + personality to implement EH for a language that guarantees that cleanups will >> + always be run, be sure to indicate a catch-all in the >> +landingpad instruction >> rather than just cleanups.

    > > Ada uses forced unwinding rather than catch-alls to get this effect. I suggest > just dropping this bit of advice. > Okay. >> >> -

    In order for inlining to behave correctly, landing pads must be >> - prepared to handle selector results that they did not originally >> - advertise. Suppose that a function catches exceptions of >> - typeA, and it's inlined into a function that catches >> - exceptions of typeB. The inliner will update the >> - selector for the inlined landing pad to include the fact >> - thatB is caught. If that landing pad assumes that it >> - will only be entered to catch anA, it's in for a rude >> - surprise. Consequently, landing pads must test for the selector >> - results they understand and then resume exception propagation >> - with thellvm.eh.resume >> - intrinsic if none of the conditions match.

    >> +

    In order for inlining to behave correctly, landing pads must be prepared to >> + handle selector results that they did not originally advertise. > > Right! > > Suppose that >> + a function catches exceptions of typeA, and it's inlined into a >> + function that catches exceptions of typeB. The inliner will update >> + thelandingpad instruction for the inlined landing pad to include >> + the fact thatB is caught. If that landing pad assumes that it will >> + only be entered to catch anA, it's in for a rude surprise. >> + Consequently, landing pads must test for the selector results they understand >> + and then resume exception propagation with the >> +resume instruction if none of >> + the conditions match.

    > > Nice explanation. > Thanks! I wish I could take credit for it. :-) -bw From wendling at apple.com Tue Sep 20 03:33:36 2011 From: wendling at apple.com (Bill Wendling) Date: Tue, 20 Sep 2011 01:33:36 -0700 Subject: [llvm-commits] [llvm] r140083 - /llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp In-Reply-To: <4E78418B.2060108@free.fr> References: <20110919230052.E35692A6C12C@llvm.org> <4E78418B.2060108@free.fr> Message-ID: On Sep 20, 2011, at 12:32 AM, Duncan Sands wrote: > Hi Bill, > >> If we are extracting a basic block that ends in an invoke call, we must also >> extract the landing pad block. Otherwise, there will be a situation where the >> invoke's unwind edge lands on a non-landing pad. >> >> We also forbid the user from extracting the landing pad block by itself. Again, >> this is not a valid transformation. >> >> Modified: >> llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp >> >> Modified: llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp?rev=140083&r1=140082&r2=140083&view=diff >> ============================================================================== >> --- llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp (original) >> +++ llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp Mon Sep 19 18:00:52 2011 >> @@ -664,7 +664,13 @@ >> // * Pass in uses as args >> // 3) Move code region, add call instr to func >> // >> - BlocksToExtract.insert(code.begin(), code.end()); >> + for (std::vector::const_iterator >> + I = code.begin(), E = code.end(); I != E; ++I) { >> + BasicBlock *BB = *I; >> + BlocksToExtract.insert(BB); >> + if (InvokeInst *II = dyn_cast(BB->getTerminator())) >> + BlocksToExtract.insert(II->getUnwindDest()); >> + } > > I think the design of ExtractCodeRegion is that the caller should already have > taken care of this kind of thing. For example, take a look at the following > lines (// Assumption: this is a single-entry code region, ...). Well, it's still single-entry. ;-) I thought about that when I did this, and I could go either way on it. It *does* seem nicer to have the CodeExtractor be simplistic, but it would make calling ExtractBasicBlock more complicated. Basically, the caller would have to make sure that the landing pad was included when necessary and that its critical edge is split... Six to one... Half dozen to the other... >> Values inputs, outputs; >> >> @@ -788,6 +794,7 @@ >> /// ExtractBasicBlock - slurp a basic block into a brand new function >> /// >> Function* llvm::ExtractBasicBlock(BasicBlock *BB, bool AggregateArgs) { >> + if (BB->isLandingPad()) return 0; > > Wouldn't it be better to put this logic in CodeExtractor::isEligible? > Okay, sure. -bw From scanon at apple.com Tue Sep 20 04:43:43 2011 From: scanon at apple.com (Stephen Canon) Date: Tue, 20 Sep 2011 05:43:43 -0400 Subject: [llvm-commits] [llvm] r140140 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/avx-minmax.ll In-Reply-To: <4E784E54.3010204@free.fr> References: <20110920073859.716B22A6C12D@llvm.org> <4E784E54.3010204@free.fr> Message-ID: <7CA61116-29DC-4404-A012-F93B2815CC9F@apple.com> >> +; UNSAFE: maxpd: >> +; UNSAFE: vmaxpd %xmm >> +define<2 x double> @maxpd(<2 x double> %x,<2 x double> %y) { >> + %max_is_x = fcmp oge<2 x double> %x, %y >> + %max = select<2 x i1> %max_is_x,<2 x double> %x,<2 x double> %y >> + ret<2 x double> %max >> +} > > Is producing vmaxpd here rather than maxpd a good thing to do? Yes. When targeting AVX, we should prefer the vex-prefixed forms (vmaxpd) to the legacy sse forms (maxpd). The two instructions "do" exactly the same thing, but the vex-prefixed form zeroes out the high 128 bits of the corresponding ymm register, which allows us to avoid taking a substantial "transition penalty" (stall) if any AVX-256 instructions have been previously executed. Chapter 11 of the Intel Optimization Manual has the full details if you're curious. - Steve From rengolin at systemcall.org Tue Sep 20 07:13:26 2011 From: rengolin at systemcall.org (Renato Golin) Date: Tue, 20 Sep 2011 12:13:26 -0000 Subject: [llvm-commits] [www] r140141 - in /www/trunk/devmtg/2011-09-16: EuroLLVM2011-ExceptionHandling.pdf EuroLLVM2011-ImplementingDynamicScopesInCling.pdf EuroLLVM2011-JET.pdf EuroLLVM2011-LLVMplusARM.pdf EuroLLVM2011-MoreTargetIndependentLLVMBitcode.pdf EuroLLVM2011-MultiVersioningInLLVM.pdf EuroLLVM2011-Winter.pdf index.html Message-ID: <20110920121326.AD5D92A6C12C@llvm.org> Author: rengolin Date: Tue Sep 20 07:13:26 2011 New Revision: 140141 URL: http://llvm.org/viewvc/llvm-project?rev=140141&view=rev Log: Adding slides, changing the format to past event, will send videos later Added: www/trunk/devmtg/2011-09-16/EuroLLVM2011-ExceptionHandling.pdf (with props) www/trunk/devmtg/2011-09-16/EuroLLVM2011-ImplementingDynamicScopesInCling.pdf (with props) www/trunk/devmtg/2011-09-16/EuroLLVM2011-JET.pdf (with props) www/trunk/devmtg/2011-09-16/EuroLLVM2011-LLVMplusARM.pdf (with props) www/trunk/devmtg/2011-09-16/EuroLLVM2011-MoreTargetIndependentLLVMBitcode.pdf (with props) www/trunk/devmtg/2011-09-16/EuroLLVM2011-MultiVersioningInLLVM.pdf (with props) www/trunk/devmtg/2011-09-16/EuroLLVM2011-Winter.pdf (with props) Modified: www/trunk/devmtg/2011-09-16/index.html Added: www/trunk/devmtg/2011-09-16/EuroLLVM2011-ExceptionHandling.pdf URL: http://llvm.org/viewvc/llvm-project/www/trunk/devmtg/2011-09-16/EuroLLVM2011-ExceptionHandling.pdf?rev=140141&view=auto ============================================================================== Binary file - no diff available. Propchange: www/trunk/devmtg/2011-09-16/EuroLLVM2011-ExceptionHandling.pdf ------------------------------------------------------------------------------ svn:mime-type = application/pdf Added: www/trunk/devmtg/2011-09-16/EuroLLVM2011-ImplementingDynamicScopesInCling.pdf URL: http://llvm.org/viewvc/llvm-project/www/trunk/devmtg/2011-09-16/EuroLLVM2011-ImplementingDynamicScopesInCling.pdf?rev=140141&view=auto ============================================================================== Binary file - no diff available. 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Propchange: www/trunk/devmtg/2011-09-16/EuroLLVM2011-LLVMplusARM.pdf ------------------------------------------------------------------------------ svn:mime-type = application/pdf Added: www/trunk/devmtg/2011-09-16/EuroLLVM2011-MoreTargetIndependentLLVMBitcode.pdf URL: http://llvm.org/viewvc/llvm-project/www/trunk/devmtg/2011-09-16/EuroLLVM2011-MoreTargetIndependentLLVMBitcode.pdf?rev=140141&view=auto ============================================================================== Binary file - no diff available. Propchange: www/trunk/devmtg/2011-09-16/EuroLLVM2011-MoreTargetIndependentLLVMBitcode.pdf ------------------------------------------------------------------------------ svn:mime-type = application/pdf Added: www/trunk/devmtg/2011-09-16/EuroLLVM2011-MultiVersioningInLLVM.pdf URL: http://llvm.org/viewvc/llvm-project/www/trunk/devmtg/2011-09-16/EuroLLVM2011-MultiVersioningInLLVM.pdf?rev=140141&view=auto ============================================================================== Binary file - no diff available. Propchange: www/trunk/devmtg/2011-09-16/EuroLLVM2011-MultiVersioningInLLVM.pdf ------------------------------------------------------------------------------ svn:mime-type = application/pdf Added: www/trunk/devmtg/2011-09-16/EuroLLVM2011-Winter.pdf URL: http://llvm.org/viewvc/llvm-project/www/trunk/devmtg/2011-09-16/EuroLLVM2011-Winter.pdf?rev=140141&view=auto ============================================================================== Binary file - no diff available. Propchange: www/trunk/devmtg/2011-09-16/EuroLLVM2011-Winter.pdf ------------------------------------------------------------------------------ svn:mime-type = application/pdf Modified: www/trunk/devmtg/2011-09-16/index.html URL: http://llvm.org/viewvc/llvm-project/www/trunk/devmtg/2011-09-16/index.html?rev=140141&r1=140140&r2=140141&view=diff ============================================================================== --- www/trunk/devmtg/2011-09-16/index.html (original) +++ www/trunk/devmtg/2011-09-16/index.html Tue Sep 20 07:13:26 2011 @@ -15,17 +15,19 @@

    SPONSORED BY: ARM Ltd.

    -

    This will be a half-day meeting for LLVM users to exchange ideas, expose new +

    It was a half-day meeting for LLVM users to exchange ideas, expose new developments and generally strengthen the network of LLVM developers in and around Europe. The meeting is open to anyone, from corporate to academia, professionals to enthusiasts.

    -

    While this is not a full conference like the US LLVM Developers' Meeting, we -plan to have talks, posters, demonstrations and a lot of discussion. We hope -that those most active in LLVM development will consider attending both -meetings.

    +

    While this was not a full conference like the US LLVM Developers' Meeting, we +had talks, posters, demonstrations and a lot of discussion.

    -

    The topic themes for the September 2011 meeting include:

    +

    There were almost 80 people, from academia and industry, experts and newbies, +and the feedback we received was excellent. The organisers of the Euro-LLVM 2011 +would like to thank every one for helping us make this successful event.

    + +

    The topic themes for the September 2011 meeting included:

    • CPU architecture support, code generation, generic optimizations
      • @@ -34,116 +36,80 @@
    • Current developments and the future of LLVM (MC, JIT, vectorisation, &c.)

    -

    We'll be discussing the organisation of the event on the -main LLVM mailing list, -and we welcome suggestions and help. The event -will take place during the afternoon and we'll provide dinner and some beer -at the end to complement the networking.

    - -
    Registration:
    - -

    We're already full, and won't be accepting registrations any more. Please let us know of your interests to join the European Meeting next year.

    Agenda
    -

    +

    The videos are coming.

    - + - + - - + - - - - - - - - - + - - - - - - - - - - - - - - - - From geek4civic at gmail.com Tue Sep 20 09:11:35 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Tue, 20 Sep 2011 14:11:35 -0000 Subject: [llvm-commits] [llvm] r140143 - /llvm/trunk/test/CodeGen/X86/avx-minmax.ll Message-ID: <20110920141135.3AAEF2A6C12C@llvm.org> Author: chapuni Date: Tue Sep 20 09:11:35 2011 New Revision: 140143 URL: http://llvm.org/viewvc/llvm-project?rev=140143&view=rev Log: test/CodeGen/X86/avx-minmax.ll: Unbreak Win32. On Windows x64, 128-bit arguments are not passed by reg but by indirect. eg. maxpd: vmovapd (%rcx), %xmm0 vmaxpd (%rdx), %xmm0, %xmm0 FIXME: I don't care YMM on x64 for now. Modified: llvm/trunk/test/CodeGen/X86/avx-minmax.ll Modified: llvm/trunk/test/CodeGen/X86/avx-minmax.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx-minmax.ll?rev=140143&r1=140142&r2=140143&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/avx-minmax.ll (original) +++ llvm/trunk/test/CodeGen/X86/avx-minmax.ll Tue Sep 20 09:11:35 2011 @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=x86-64 -mattr=+avx -asm-verbose=false -join-physregs -enable-unsafe-fp-math -enable-no-nans-fp-math -promote-elements | FileCheck -check-prefix=UNSAFE %s ; UNSAFE: maxpd: -; UNSAFE: vmaxpd %xmm +; UNSAFE: vmaxpd {{.+}}, %xmm define <2 x double> @maxpd(<2 x double> %x, <2 x double> %y) { %max_is_x = fcmp oge <2 x double> %x, %y %max = select <2 x i1> %max_is_x, <2 x double> %x, <2 x double> %y @@ -9,7 +9,7 @@ } ; UNSAFE: minpd: -; UNSAFE: vminpd %xmm +; UNSAFE: vminpd {{.+}}, %xmm define <2 x double> @minpd(<2 x double> %x, <2 x double> %y) { %min_is_x = fcmp ole <2 x double> %x, %y %min = select <2 x i1> %min_is_x, <2 x double> %x, <2 x double> %y @@ -17,7 +17,7 @@ } ; UNSAFE: maxps: -; UNSAFE: vmaxps %xmm +; UNSAFE: vmaxps {{.+}}, %xmm define <4 x float> @maxps(<4 x float> %x, <4 x float> %y) { %max_is_x = fcmp oge <4 x float> %x, %y %max = select <4 x i1> %max_is_x, <4 x float> %x, <4 x float> %y @@ -25,7 +25,7 @@ } ; UNSAFE: minps: -; UNSAFE: vminps %xmm +; UNSAFE: vminps {{.+}}, %xmm define <4 x float> @minps(<4 x float> %x, <4 x float> %y) { %min_is_x = fcmp ole <4 x float> %x, %y %min = select <4 x i1> %min_is_x, <4 x float> %x, <4 x float> %y From craig.topper at gmail.com Tue Sep 20 09:37:36 2011 From: craig.topper at gmail.com (Craig Topper) Date: Tue, 20 Sep 2011 07:37:36 -0700 Subject: [llvm-commits] [llvm] r140140 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/avx-minmax.ll In-Reply-To: <4E784E54.3010204@free.fr> References: <20110920073859.716B22A6C12D@llvm.org> <4E784E54.3010204@free.fr> Message-ID: <66508566-FAE9-4DFF-B4A9-90792FF02F3A@gmail.com> On Sep 20, 2011, at 1:27 AM, Duncan Sands wrote: > Hi Craig, > >> Extend changes from r139986 to produce 256-bit AVX minps/minpd/maxps/maxpd. > > thanks for doing this. > >> --- llvm/trunk/test/CodeGen/X86/avx-minmax.ll (added) >> +++ llvm/trunk/test/CodeGen/X86/avx-minmax.ll Tue Sep 20 02:38:59 2011 >> @@ -0,0 +1,65 @@ >> +; RUN: llc< %s -march=x86-64 -mattr=+avx -asm-verbose=false -join-physregs -enable-unsafe-fp-math -enable-no-nans-fp-math -promote-elements | FileCheck -check-prefix=UNSAFE %s > > Why are -asm-verbose=false -join-physregs needed? I just copied the run line from the SSE version of the test without actually knowing what those options do. I can remove them if you want. > >> +; UNSAFE: maxpd: >> +; UNSAFE: vmaxpd %xmm >> +define<2 x double> @maxpd(<2 x double> %x,<2 x double> %y) { >> + %max_is_x = fcmp oge<2 x double> %x, %y >> + %max = select<2 x i1> %max_is_x,<2 x double> %x,<2 x double> %y >> + ret<2 x double> %max >> +} > > Is producing vmaxpd here rather than maxpd a good thing to do? That's just what it does in AVX mode. I didn't change anything for the 128-bit case. > > Ciao, Duncan. > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From evan.cheng at apple.com Tue Sep 20 10:49:14 2011 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 20 Sep 2011 08:49:14 -0700 Subject: [llvm-commits] [llvm] r140134 - in /llvm/trunk: include/llvm/MC/MCInstrDesc.h lib/CodeGen/SelectionDAG/InstrEmitter.cpp lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp lib/Target/ARM/ARMISelLowering.cpp lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/ARMInstrThumb2.td test/CodeGen/ARM/2011-09-19-cpsr.ll utils/TableGen/CodeGenInstruction.cpp utils/TableGen/CodeGenInstruction.h utils/TableGen/InstrInfoEmitter.cpp In-Reply-To: References: <20110920031740.C9E852A6C12C@llvm.org> Message-ID: On Sep 19, 2011, at 10:36 PM, Andrew Trick wrote: > On Sep 19, 2011, at 9:55 PM, Evan Cheng wrote: > >> Thanks! Just curious, could you have fixed the bug by adding hasPostIselHook = 1 to SUBS? >> >> Evan >> > > t2SUBS was already under hasPostIselHook (T2I_bin_s_irs). Consequently, when its CPSR result was dead, the implicit def would be removed--that's wrong for any opcode that always sets the 's' bit. Hard-coding certain opcodes would be a sufficient fix, but I wanted some form I'm missing something obvious then. If the cpsr def isn't used, why can't codegen remove the implicit def and the optional def? The net effect is to change it to the non-S variant. > of self-checking within the hook since these miscompiles are so nasty. With the self-checking in place, the hook flag serves no purpose but to avoid a vcall, which isn't very expensive at this point, but is another potential source of bugs when the .td file changes. I slightly disagree with this but this is something we can discuss offline. Evan > > -Andy > >> On Sep 19, 2011, at 8:17 PM, Andrew Trick wrote: >> >>> Author: atrick >>> Date: Mon Sep 19 22:17:40 2011 >>> New Revision: 140134 >>> >>> URL: http://llvm.org/viewvc/llvm-project?rev=140134&view=rev >>> Log: >>> ARM isel bug fix for adds/subs operands. >>> >>> Modified ARMISelLowering::AdjustInstrPostInstrSelection to handle the >>> full gamut of CPSR defs/uses including instructins whose "optional" >>> cc_out operand is not really optional. This allowed removal of the >>> hasPostISelHook to simplify the .td files and make the implementation >>> more robust. >>> Fixes rdar://10137436: sqlite3 miscompile >>> >>> Added: >>> llvm/trunk/test/CodeGen/ARM/2011-09-19-cpsr.ll >>> Modified: >>> llvm/trunk/include/llvm/MC/MCInstrDesc.h >>> llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp >>> llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp >>> llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp >>> llvm/trunk/lib/Target/ARM/ARMInstrInfo.td >>> llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td >>> llvm/trunk/utils/TableGen/CodeGenInstruction.cpp >>> llvm/trunk/utils/TableGen/CodeGenInstruction.h >>> llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp >>> >>> Modified: llvm/trunk/include/llvm/MC/MCInstrDesc.h >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCInstrDesc.h?rev=140134&r1=140133&r2=140134&view=diff >>> ============================================================================== >>> --- llvm/trunk/include/llvm/MC/MCInstrDesc.h (original) >>> +++ llvm/trunk/include/llvm/MC/MCInstrDesc.h Mon Sep 19 22:17:40 2011 >>> @@ -477,14 +477,6 @@ >>> return Flags & (1 << MCID::UsesCustomInserter); >>> } >>> >>> - /// hasPostISelHook - Return true if this instruction requires *adjustment* >>> - /// after instruction selection by calling a target hook. For example, this >>> - /// can be used to fill in ARM 's' optional operand depending on whether >>> - /// the conditional flag register is used. >>> - bool hasPostISelHook() const { >>> - return Flags & (1 << MCID::HasPostISelHook); >>> - } >>> - >>> /// isRematerializable - Returns true if this instruction is a candidate for >>> /// remat. This flag is deprecated, please don't use it anymore. If this >>> /// flag is set, the isReallyTriviallyReMaterializable() method is called to >>> >>> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp?rev=140134&r1=140133&r2=140134&view=diff >>> ============================================================================== >>> --- llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp (original) >>> +++ llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp Mon Sep 19 22:17:40 2011 >>> @@ -763,8 +763,7 @@ >>> } >>> >>> // Run post-isel target hook to adjust this instruction if needed. >>> - if (II.hasPostISelHook()) >>> - TLI->AdjustInstrPostInstrSelection(MI, Node); >>> + TLI->AdjustInstrPostInstrSelection(MI, Node); >>> } >>> >>> /// EmitSpecialNode - Generate machine code for a target-independent node and >>> >>> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=140134&r1=140133&r2=140134&view=diff >>> ============================================================================== >>> --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original) >>> +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Mon Sep 19 22:17:40 2011 >>> @@ -179,12 +179,7 @@ >>> >>> void TargetLowering::AdjustInstrPostInstrSelection(MachineInstr *MI, >>> SDNode *Node) const { >>> -#ifndef NDEBUG >>> - dbgs() << "If a target marks an instruction with " >>> - "'hasPostISelHook', it must implement " >>> - "TargetLowering::AdjustInstrPostInstrSelection!"; >>> -#endif >>> - llvm_unreachable(0); >>> + // Do nothing unless the target overrides it. >>> } >>> >>> //===----------------------------------------------------------------------===// >>> >>> Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=140134&r1=140133&r2=140134&view=diff >>> ============================================================================== >>> --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original) >>> +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Mon Sep 19 22:17:40 2011 >>> @@ -5752,27 +5752,68 @@ >>> } >>> } >>> >>> +/// Generally, ARM instructions may be optionally encoded with a 's' >>> +/// bit. However, some opcodes have a compact encoding that forces an implicit >>> +/// 's' bit. List these exceptions here. >>> +static bool hasForcedCPSRDef(const MCInstrDesc &MCID) { >>> + switch (MCID.getOpcode()) { >>> + case ARM::t2ADDSri: >>> + case ARM::t2ADDSrr: >>> + case ARM::t2ADDSrs: >>> + case ARM::t2SUBSri: >>> + case ARM::t2SUBSrr: >>> + case ARM::t2SUBSrs: >>> + return true; >>> + } >>> + return false; >>> +} >>> + >>> void ARMTargetLowering::AdjustInstrPostInstrSelection(MachineInstr *MI, >>> SDNode *Node) const { >>> - // Adjust potentially 's' setting instructions after isel, i.e. ADC, SBC, >>> - // RSB, RSC. Coming out of isel, they have an implicit CPSR def, but the >>> - // optional operand is not filled in. If the carry bit is used, then change >>> - // the optional operand to CPSR. Otherwise, remove the CPSR implicit def. >>> + // Adjust potentially 's' setting instructions after isel, i.e. ADC, SBC, RSB, >>> + // RSC. Coming out of isel, they have an implicit CPSR def, but the optional >>> + // operand is still set to noreg. If needed, set the optional operand's >>> + // register to CPSR, and remove the redundant implicit def. >>> + >>> const MCInstrDesc &MCID = MI->getDesc(); >>> - if (Node->hasAnyUseOfValue(1)) { >>> - MachineOperand &MO = MI->getOperand(MCID.getNumOperands() - 1); >>> - MO.setReg(ARM::CPSR); >>> - MO.setIsDef(true); >>> - } else { >>> - for (unsigned i = MCID.getNumOperands(), e = MI->getNumOperands(); >>> - i != e; ++i) { >>> - const MachineOperand &MO = MI->getOperand(i); >>> - if (MO.isReg() && MO.isDef() && MO.getReg() == ARM::CPSR) { >>> - MI->RemoveOperand(i); >>> - break; >>> - } >>> + unsigned ccOutIdx = MCID.getNumOperands() - 1; >>> + bool forcedCPSR = hasForcedCPSRDef(MCID); >>> + >>> + // Any ARM instruction that sets the 's' bit should specify an optional >>> + // "cc_out" operand in the last operand position. >>> + if (!MCID.hasOptionalDef() || !MCID.OpInfo[ccOutIdx].isOptionalDef()) { >>> + assert(!forcedCPSR && "Optional cc_out operand required"); >>> + return; >>> + } >>> + // Look for an implicit def of CPSR added by MachineInstr ctor. >>> + bool definesCPSR = false; >>> + bool deadCPSR = false; >>> + for (unsigned i = MCID.getNumOperands(), e = MI->getNumOperands(); >>> + i != e; ++i) { >>> + const MachineOperand &MO = MI->getOperand(i); >>> + if (MO.isReg() && MO.isDef() && MO.getReg() == ARM::CPSR) { >>> + definesCPSR = true; >>> + if (MO.isDead()) >>> + deadCPSR = true; >>> + MI->RemoveOperand(i); >>> + break; >>> } >>> } >>> + if (!definesCPSR) { >>> + assert(!forcedCPSR && "Optional cc_out operand required"); >>> + return; >>> + } >>> + assert(deadCPSR == !Node->hasAnyUseOfValue(1) && "inconsistent dead flag"); >>> + >>> + // If possible, select the encoding that does not set the 's' bit. >>> + if (deadCPSR && !forcedCPSR) >>> + return; >>> + >>> + MachineOperand &MO = MI->getOperand(ccOutIdx); >>> + MO.setReg(ARM::CPSR); >>> + MO.setIsDef(true); >>> + if (deadCPSR) >>> + MO.setIsDead(); >>> } >>> >>> //===----------------------------------------------------------------------===// >>> >>> Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=140134&r1=140133&r2=140134&view=diff >>> ============================================================================== >>> --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) >>> +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Mon Sep 19 22:17:40 2011 >>> @@ -1026,7 +1026,7 @@ >>> } >>> >>> /// AsI1_rbin_s_is - Same as AsI1_rbin_s_is except it sets 's' bit by default. >>> -let hasPostISelHook = 1, isCodeGenOnly = 1, Defs = [CPSR] in { >>> +let isCodeGenOnly = 1, Defs = [CPSR] in { >>> multiclass AsI1_rbin_s_is opcod, string opc, >>> InstrItinClass iii, InstrItinClass iir, InstrItinClass iis, >>> PatFrag opnode, bit Commutable = 0> { >>> @@ -1090,7 +1090,7 @@ >>> } >>> >>> /// AsI1_bin_s_irs - Same as AsI1_bin_irs except it sets the 's' bit by default. >>> -let hasPostISelHook = 1, isCodeGenOnly = 1, Defs = [CPSR] in { >>> +let isCodeGenOnly = 1, Defs = [CPSR] in { >>> multiclass AsI1_bin_s_irs opcod, string opc, >>> InstrItinClass iii, InstrItinClass iir, InstrItinClass iis, >>> PatFrag opnode, bit Commutable = 0> { >>> @@ -1278,7 +1278,7 @@ >>> /// AI1_adde_sube_irs - Define instructions and patterns for adde and sube. >>> multiclass AI1_adde_sube_irs opcod, string opc, PatFrag opnode, >>> string baseOpc, bit Commutable = 0> { >>> - let hasPostISelHook = 1, Defs = [CPSR], Uses = [CPSR] in { >>> + let Defs = [CPSR], Uses = [CPSR] in { >>> def ri : AsI1>> DPFrm, IIC_iALUi, opc, "\t$Rd, $Rn, $imm", >>> [(set GPR:$Rd, CPSR, (opnode GPR:$Rn, so_imm:$imm, CPSR))]>, >>> @@ -1366,7 +1366,7 @@ >>> /// AI1_rsc_irs - Define instructions and patterns for rsc >>> multiclass AI1_rsc_irs opcod, string opc, PatFrag opnode, >>> string baseOpc> { >>> - let hasPostISelHook = 1, Defs = [CPSR], Uses = [CPSR] in { >>> + let Defs = [CPSR], Uses = [CPSR] in { >>> def ri : AsI1>> DPFrm, IIC_iALUi, opc, "\t$Rd, $Rn, $imm", >>> [(set GPR:$Rd, CPSR, (opnode so_imm:$imm, GPR:$Rn, CPSR))]>, >>> >>> Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=140134&r1=140133&r2=140134&view=diff >>> ============================================================================== >>> --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) >>> +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Mon Sep 19 22:17:40 2011 >>> @@ -592,7 +592,7 @@ >>> >>> /// T2I_bin_s_irs - Similar to T2I_bin_irs except it sets the 's' bit so the >>> /// instruction modifies the CPSR register. >>> -let hasPostISelHook = 1, isCodeGenOnly = 1, Defs = [CPSR] in { >>> +let isCodeGenOnly = 1, Defs = [CPSR] in { >>> multiclass T2I_bin_s_irs opcod, string opc, >>> InstrItinClass iii, InstrItinClass iir, InstrItinClass iis, >>> PatFrag opnode, bit Commutable = 0> { >>> @@ -738,7 +738,7 @@ >>> >>> /// T2I_rbin_s_is - Same as T2I_rbin_irs except sets 's' bit and the register >>> /// version is not needed since this is only for codegen. >>> -let hasPostISelHook = 1, isCodeGenOnly = 1, Defs = [CPSR] in { >>> +let isCodeGenOnly = 1, Defs = [CPSR] in { >>> multiclass T2I_rbin_s_is opcod, string opc, PatFrag opnode> { >>> // shifted imm >>> def ri : T2sTwoRegImm< >>> @@ -1846,12 +1846,10 @@ >>> IIC_iALUi, IIC_iALUr, IIC_iALUsi, >>> BinOpFrag<(ARMsubc node:$LHS, node:$RHS)>>; >>> >>> -let hasPostISelHook = 1 in { >>> defm t2ADC : T2I_adde_sube_irs<0b1010, "adc", >>> BinOpWithFlagFrag<(ARMadde node:$LHS, node:$RHS, node:$FLAG)>, 1>; >>> defm t2SBC : T2I_adde_sube_irs<0b1011, "sbc", >>> BinOpWithFlagFrag<(ARMsube node:$LHS, node:$RHS, node:$FLAG)>>; >>> -} >>> >>> // RSB >>> defm t2RSB : T2I_rbin_irs <0b1110, "rsb", >>> >>> Added: llvm/trunk/test/CodeGen/ARM/2011-09-19-cpsr.ll >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2011-09-19-cpsr.ll?rev=140134&view=auto >>> ============================================================================== >>> --- llvm/trunk/test/CodeGen/ARM/2011-09-19-cpsr.ll (added) >>> +++ llvm/trunk/test/CodeGen/ARM/2011-09-19-cpsr.ll Mon Sep 19 22:17:40 2011 >>> @@ -0,0 +1,54 @@ >>> +; RUN: llc -march=thumb -mcpu=cortex-a8 < %s >>> +; rdar://problem/10137436: sqlite3 miscompile >>> +; >>> +; CHECK: subs >>> +; CHECK: cmp >>> +; CHECK: it >>> + >>> +target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32" >>> +target triple = "thumbv7-apple-ios4.0.0" >>> + >>> +declare i8* @__memset_chk(i8*, i32, i32, i32) nounwind >>> + >>> +define hidden fastcc i32 @sqlite3VdbeExec(i32* %p) nounwind { >>> +entry: >>> + br label %sqlite3VarintLen.exit7424 >>> + >>> +sqlite3VarintLen.exit7424: ; preds = %do.body.i7423 >>> + br label %do.body.i >>> + >>> +do.body.i: ; preds = %do.body.i, %sqlite3VarintLen.exit7424 >>> + br i1 undef, label %do.body.i, label %sqlite3VarintLen.exit >>> + >>> +sqlite3VarintLen.exit: ; preds = %do.body.i >>> + %sub2322 = add i64 undef, undef >>> + br i1 undef, label %too_big, label %if.end2327 >>> + >>> +if.end2327: ; preds = %sqlite3VarintLen.exit >>> + br i1 undef, label %if.end2341, label %no_mem >>> + >>> +if.end2341: ; preds = %if.end2327 >>> + br label %for.body2355 >>> + >>> +for.body2355: ; preds = %for.body2355, %if.end2341 >>> + %add2366 = add nsw i32 undef, undef >>> + br i1 undef, label %for.body2377, label %for.body2355 >>> + >>> +for.body2377: ; preds = %for.body2355 >>> + %conv23836154 = zext i32 %add2366 to i64 >>> + %sub2384 = sub i64 %sub2322, %conv23836154 >>> + %conv2385 = trunc i64 %sub2384 to i32 >>> + %len.0.i = select i1 undef, i32 %conv2385, i32 undef >>> + %sub.i7384 = sub nsw i32 %len.0.i, 0 >>> + %call.i.i7385 = call i8* @__memset_chk(i8* undef, i32 0, i32 %sub.i7384, i32 undef) nounwind >>> + unreachable >>> + >>> +too_big: ; preds = %sqlite3VarintLen.exit >>> + unreachable >>> + >>> +no_mem: ; preds = %if.end2327, %for.body, %entry.no_mem_crit_edge >>> + unreachable >>> + >>> +sqlite3ErrStr.exit: ; preds = %if.then82 >>> + unreachable >>> +} >>> >>> Modified: llvm/trunk/utils/TableGen/CodeGenInstruction.cpp >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenInstruction.cpp?rev=140134&r1=140133&r2=140134&view=diff >>> ============================================================================== >>> --- llvm/trunk/utils/TableGen/CodeGenInstruction.cpp (original) >>> +++ llvm/trunk/utils/TableGen/CodeGenInstruction.cpp Mon Sep 19 22:17:40 2011 >>> @@ -309,7 +309,6 @@ >>> isReMaterializable = R->getValueAsBit("isReMaterializable"); >>> hasDelaySlot = R->getValueAsBit("hasDelaySlot"); >>> usesCustomInserter = R->getValueAsBit("usesCustomInserter"); >>> - hasPostISelHook = R->getValueAsBit("hasPostISelHook"); >>> hasCtrlDep = R->getValueAsBit("hasCtrlDep"); >>> isNotDuplicable = R->getValueAsBit("isNotDuplicable"); >>> hasSideEffects = R->getValueAsBit("hasSideEffects"); >>> >>> Modified: llvm/trunk/utils/TableGen/CodeGenInstruction.h >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenInstruction.h?rev=140134&r1=140133&r2=140134&view=diff >>> ============================================================================== >>> --- llvm/trunk/utils/TableGen/CodeGenInstruction.h (original) >>> +++ llvm/trunk/utils/TableGen/CodeGenInstruction.h Mon Sep 19 22:17:40 2011 >>> @@ -233,7 +233,6 @@ >>> bool isReMaterializable; >>> bool hasDelaySlot; >>> bool usesCustomInserter; >>> - bool hasPostISelHook; >>> bool hasCtrlDep; >>> bool isNotDuplicable; >>> bool hasSideEffects; >>> >>> Modified: llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp?rev=140134&r1=140133&r2=140134&view=diff >>> ============================================================================== >>> --- llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp (original) >>> +++ llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp Mon Sep 19 22:17:40 2011 >>> @@ -288,7 +288,6 @@ >>> if (Inst.isNotDuplicable) OS << "|(1<>> if (Inst.Operands.hasOptionalDef) OS << "|(1<>> if (Inst.usesCustomInserter) OS << "|(1<>> - if (Inst.hasPostISelHook) OS << "|(1<>> if (Inst.Operands.isVariadic)OS << "|(1<>> if (Inst.hasSideEffects) OS << "|(1<>> if (Inst.isAsCheapAsAMove) OS << "|(1<>> @@ -345,7 +344,7 @@ >>> >>> // We must emit the PHI opcode first... >>> std::string Namespace = Target.getInstNamespace(); >>> - >>> + >>> if (Namespace.empty()) { >>> fprintf(stderr, "No instructions defined!\n"); >>> exit(1); >>> >>> >>> _______________________________________________ >>> llvm-commits mailing list >>> llvm-commits at cs.uiuc.edu >>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > From dpatel at apple.com Tue Sep 20 10:57:19 2011 From: dpatel at apple.com (Devang Patel) Date: Tue, 20 Sep 2011 15:57:19 -0000 Subject: [llvm-commits] [llvm] r140145 - /llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp Message-ID: <20110920155719.3176C2A6C12C@llvm.org> Author: dpatel Date: Tue Sep 20 10:57:19 2011 New Revision: 140145 URL: http://llvm.org/viewvc/llvm-project?rev=140145&view=rev Log: There is no need to write a local utility routine to find subprogram info if the utility routine is already available in DebugInfo. Modified: llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp Modified: llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp?rev=140145&r1=140144&r2=140145&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp (original) +++ llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp Tue Sep 20 10:57:19 2011 @@ -109,15 +109,6 @@ return new GCOVProfiler(EmitNotes, EmitData, Use402Format); } -static DISubprogram findSubprogram(DIScope Scope) { - while (!Scope.isSubprogram()) { - assert(Scope.isLexicalBlock() && - "Debug location not lexical block or subprogram"); - Scope = DILexicalBlock(Scope).getContext(); - } - return DISubprogram(Scope); -} - namespace { class GCOVRecord { protected: @@ -403,7 +394,7 @@ if (Loc.isUnknown()) continue; if (Line == Loc.getLine()) continue; Line = Loc.getLine(); - if (SP != findSubprogram(DIScope(Loc.getScope(*Ctx)))) continue; + if (SP != getDISubprogram(Loc.getScope(*Ctx))) continue; GCOVLines &Lines = Block.getFile(SP.getFilename()); Lines.addLine(Loc.getLine()); From proljc at gmail.com Tue Sep 20 10:59:47 2011 From: proljc at gmail.com (Liu) Date: Tue, 20 Sep 2011 23:59:47 +0800 Subject: [llvm-commits] [patch] add MIPS64 SubTraget and stubs support to LLVM. In-Reply-To: References: Message-ID: On Tue, Sep 20, 2011 at 11:38 AM, Liu wrote: > On Tue, Sep 20, 2011 at 7:57 AM, Liu wrote: >> On Tue, Sep 20, 2011 at 2:09 AM, Bruno Cardoso Lopes >> wrote: >>> Hi, >>> >>> On Mon, Sep 19, 2011 at 2:35 AM, Liu wrote: >>>> Hi all >>>> >>>> I've add mips64 SubTarget and stubs support to llvm. Please review and checkin. >>> >>> Overall looks good, please fix the space alignment here: >>> >>> + ?if ((TheTriple.getArch() == Triple::mips) || >>> + ? ? ? ? ? ? ?(TheTriple.getArch() == Triple::mips64)) >>> >>> Here: >>> >>> + ? ?TargetRegistry::RegisterMCInstPrinter(TheMips64Target, >>> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?createMipsMCInstPrinter); >>> + ?TargetRegistry::RegisterMCInstPrinter(TheMips64elTarget, >>> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?createMipsMCInstPrinter); >>> >>> And here: >>> >>> +def FeatureMips64 ? ? ?: SubtargetFeature<"mips64", "MipsArchVersion", >>> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?"Mips64", "Mips64 ISA Support", >>> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?[FeatureGP64Bit, FeatureFP64Bit, >>> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? FeatureCondMov, FeatureBitCount]>; >>> >>> -- >>> Bruno Cardoso Lopes >>> http://www.brunocardoso.cc >>> >> >> Hi Bruno >> >> Thanks for review, the space alignment is fixed:) >> >> >> --Liu >> > > Thanks to Akira Hatanaka > > IsMips32() fixed. > > --Liu > The sizes of MIPS64 pointers in the DataLayout is fixed. --Liu -------------- next part -------------- A non-text attachment was scrubbed... Name: 0001-add-mips64-target-stubs.patch Type: text/x-patch Size: 15051 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110920/eb8d48a8/attachment.bin From atrick at apple.com Tue Sep 20 11:07:18 2011 From: atrick at apple.com (Andrew Trick) Date: Tue, 20 Sep 2011 09:07:18 -0700 Subject: [llvm-commits] [llvm] r140134 - in /llvm/trunk: include/llvm/MC/MCInstrDesc.h lib/CodeGen/SelectionDAG/InstrEmitter.cpp lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp lib/Target/ARM/ARMISelLowering.cpp lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/ARMInstrThumb2.td test/CodeGen/ARM/2011-09-19-cpsr.ll utils/TableGen/CodeGenInstruction.cpp utils/TableGen/CodeGenInstruction.h utils/TableGen/InstrInfoEmitter.cpp In-Reply-To: References: <20110920031740.C9E852A6C12C@llvm.org> Message-ID: <4CDEE34B-8068-4073-B3A1-B38B736D50BC@apple.com> On Sep 20, 2011, at 8:49 AM, Evan Cheng wrote: > > > On Sep 19, 2011, at 10:36 PM, Andrew Trick wrote: > >> On Sep 19, 2011, at 9:55 PM, Evan Cheng wrote: >> >>> Thanks! Just curious, could you have fixed the bug by adding hasPostIselHook = 1 to SUBS? >>> >>> Evan >>> >> >> t2SUBS was already under hasPostIselHook (T2I_bin_s_irs). Consequently, when its CPSR result was dead, the implicit def would be removed--that's wrong for any opcode that always sets the 's' bit. Hard-coding certain opcodes would be a sufficient fix, but I wanted some form > > > I'm missing something obvious then. If the cpsr def isn't used, why can't codegen remove the implicit def and the optional def? The net effect is to change it to the non-S variant. There's no non-S variant of the opcode. I'm not 100% sure why we can't convert the opcode to adds/subs.w later. -Andy From echristo at apple.com Tue Sep 20 11:50:37 2011 From: echristo at apple.com (Eric Christopher) Date: Tue, 20 Sep 2011 09:50:37 -0700 Subject: [llvm-commits] [llvm] r140121 - in /llvm/trunk: docs/ docs/CommandGuide/ include/llvm/CompilerDriver/ lib/ lib/CompilerDriver/ utils/TableGen/ In-Reply-To: References: <20110920003427.E071C2A6C12C@llvm.org> Message-ID: On Sep 20, 2011, at 12:40 AM, arrowdodger wrote: > I've thought, the purpose of CompilerDriver library was to assist language writers to create theirs driver executables. And LLVMC is example of it's usage. It's not i was using it, but i'm sad of it's removal. Right. No one else was either. It's still in the version control system, but it wasn't really supported or flexible enough to support long term. In the future I hope that the clang driver can use a similar tablegen driven scheme though. -eric From bruno.cardoso at gmail.com Tue Sep 20 11:52:55 2011 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Tue, 20 Sep 2011 09:52:55 -0700 Subject: [llvm-commits] [llvm] r140140 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/avx-minmax.ll In-Reply-To: <4E784E54.3010204@free.fr> References: <20110920073859.716B22A6C12D@llvm.org> <4E784E54.3010204@free.fr> Message-ID: On Tue, Sep 20, 2011 at 1:27 AM, Duncan Sands wrote: > Hi Craig, > >> Extend changes from r139986 to produce 256-bit AVX minps/minpd/maxps/maxpd. > > thanks for doing this. > >> --- llvm/trunk/test/CodeGen/X86/avx-minmax.ll (added) >> +++ llvm/trunk/test/CodeGen/X86/avx-minmax.ll Tue Sep 20 02:38:59 2011 >> @@ -0,0 +1,65 @@ >> +; RUN: llc< ?%s -march=x86-64 -mattr=+avx -asm-verbose=false -join-physregs -enable-unsafe-fp-math -enable-no-nans-fp-math -promote-elements | FileCheck -check-prefix=UNSAFE %s > > Why are -asm-verbose=false -join-physregs needed? > >> +; UNSAFE: maxpd: >> +; UNSAFE: vmaxpd %xmm >> +define<2 x double> ?@maxpd(<2 x double> ?%x,<2 x double> ?%y) { >> + ?%max_is_x = fcmp oge<2 x double> ?%x, %y >> + ?%max = select<2 x i1> ?%max_is_x,<2 x double> ?%x,<2 x double> ?%y >> + ?ret<2 x double> ?%max >> +} > > Is producing vmaxpd here rather than maxpd a good thing to do? Yep, like Stephen said, it's just an 128-bit AVX encoded form! -- Bruno Cardoso Lopes http://www.brunocardoso.cc From proljc at gmail.com Tue Sep 20 11:59:31 2011 From: proljc at gmail.com (Liu) Date: Wed, 21 Sep 2011 00:59:31 +0800 Subject: [llvm-commits] [patch] fix PPCRegisterInfo.cpp comment typo Message-ID: Hi all I find a typo in PPCRegisterInfo.cpp comment and fixed it. --Liu -------------- next part -------------- A non-text attachment was scrubbed... Name: 0001-fix-PPCRegisterInfo.cpp-comment-typo.patch Type: text/x-patch Size: 1068 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110921/025cc9fe/attachment.bin From proljc at gmail.com Tue Sep 20 12:01:56 2011 From: proljc at gmail.com (Liu) Date: Wed, 21 Sep 2011 01:01:56 +0800 Subject: [llvm-commits] [patch] fix MBlazeAsmParser comment typo Message-ID: Hi all There are typos in MBlazeAsmParser.cpp and the Makefile, I've fixed it. --Liu -------------- next part -------------- A non-text attachment was scrubbed... Name: 0002-fix-MBlazeAsmParser.cpp-and-Makefile-comment-typo.patch Type: text/x-patch Size: 1435 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110921/5bf14964/attachment.bin From proljc at gmail.com Tue Sep 20 12:13:07 2011 From: proljc at gmail.com (Liu) Date: Wed, 21 Sep 2011 01:13:07 +0800 Subject: [llvm-commits] [patch] fix PPC README typo Message-ID: Hi I find a PPC README typo and fixed it. --Liu -------------- next part -------------- A non-text attachment was scrubbed... Name: 0001-fix-PPC-README-typo.patch Type: text/x-patch Size: 761 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110921/e9c92d26/attachment.bin From evan.cheng at apple.com Tue Sep 20 12:27:16 2011 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 20 Sep 2011 10:27:16 -0700 Subject: [llvm-commits] [llvm] r140134 - in /llvm/trunk: include/llvm/MC/MCInstrDesc.h lib/CodeGen/SelectionDAG/InstrEmitter.cpp lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp lib/Target/ARM/ARMISelLowering.cpp lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/ARMInstrThumb2.td test/CodeGen/ARM/2011-09-19-cpsr.ll utils/TableGen/CodeGenInstruction.cpp utils/TableGen/CodeGenInstruction.h utils/TableGen/InstrInfoEmitter.cpp In-Reply-To: <4CDEE34B-8068-4073-B3A1-B38B736D50BC@apple.com> References: <20110920031740.C9E852A6C12C@llvm.org> <4CDEE34B-8068-4073-B3A1-B38B736D50BC@apple.com> Message-ID: On Sep 20, 2011, at 9:07 AM, Andrew Trick wrote: > > On Sep 20, 2011, at 8:49 AM, Evan Cheng wrote: > >> >> >> On Sep 19, 2011, at 10:36 PM, Andrew Trick wrote: >> >>> On Sep 19, 2011, at 9:55 PM, Evan Cheng wrote: >>> >>>> Thanks! Just curious, could you have fixed the bug by adding hasPostIselHook = 1 to SUBS? >>>> >>>> Evan >>>> >>> >>> t2SUBS was already under hasPostIselHook (T2I_bin_s_irs). Consequently, when its CPSR result was dead, the implicit def would be removed--that's wrong for any opcode that always sets the 's' bit. Hard-coding certain opcodes would be a sufficient fix, but I wanted some form >> >> >> I'm missing something obvious then. If the cpsr def isn't used, why can't codegen remove the implicit def and the optional def? The net effect is to change it to the non-S variant. > > There's no non-S variant of the opcode. I'm not 100% sure why we can't convert the opcode to adds/subs.w later. What do you mean? There is t2SUB. t2SUBS and t2SUB are identical opcodes if the CPSR def is dead. The reason we can't just isel to t2SUB is due to tablegen limitation (related to physical register def). Is the bug due to Thum2SizeReduction changing it to tSUB? Perhaps the fix is for the isel hook to change the opcode from t2SUBS to t2SUB if the CPSR def is dead. Evan > -Andy From atrick at apple.com Tue Sep 20 12:39:50 2011 From: atrick at apple.com (Andrew Trick) Date: Tue, 20 Sep 2011 10:39:50 -0700 Subject: [llvm-commits] [llvm] r140134 - in /llvm/trunk: include/llvm/MC/MCInstrDesc.h lib/CodeGen/SelectionDAG/InstrEmitter.cpp lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp lib/Target/ARM/ARMISelLowering.cpp lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/ARMInstrThumb2.td test/CodeGen/ARM/2011-09-19-cpsr.ll utils/TableGen/CodeGenInstruction.cpp utils/TableGen/CodeGenInstruction.h utils/TableGen/InstrInfoEmitter.cpp In-Reply-To: References: <20110920031740.C9E852A6C12C@llvm.org> <4CDEE34B-8068-4073-B3A1-B38B736D50BC@apple.com> Message-ID: <576DCE8B-BD2A-4C17-BA6A-74A6813240E5@apple.com> On Sep 20, 2011, at 10:27 AM, Evan Cheng wrote: > > On Sep 20, 2011, at 9:07 AM, Andrew Trick wrote: > >> >> On Sep 20, 2011, at 8:49 AM, Evan Cheng wrote: >> >>> >>> >>> On Sep 19, 2011, at 10:36 PM, Andrew Trick wrote: >>> >>>> On Sep 19, 2011, at 9:55 PM, Evan Cheng wrote: >>>> >>>>> Thanks! Just curious, could you have fixed the bug by adding hasPostIselHook = 1 to SUBS? >>>>> >>>>> Evan >>>>> >>>> >>>> t2SUBS was already under hasPostIselHook (T2I_bin_s_irs). Consequently, when its CPSR result was dead, the implicit def would be removed--that's wrong for any opcode that always sets the 's' bit. Hard-coding certain opcodes would be a sufficient fix, but I wanted some form >>> >>> >>> I'm missing something obvious then. If the cpsr def isn't used, why can't codegen remove the implicit def and the optional def? The net effect is to change it to the non-S variant. >> >> There's no non-S variant of the opcode. I'm not 100% sure why we can't convert the opcode to adds/subs.w later. > > What do you mean? There is t2SUB. t2SUBS and t2SUB are identical opcodes if the CPSR def is dead. The reason we can't just isel to t2SUB is due to tablegen limitation (related to physical register def). Great. That's what I wasn't 100% sure about. Let's remove the t2SUBS opcode completely. > Is the bug due to Thum2SizeReduction changing it to tSUB? Perhaps the fix is for the isel hook to change the opcode from t2SUBS to t2SUB if the CPSR def is dead. Looking at it that way, the "bug" is that ARM::t2SUBS is strangely always encoded as subs! Changing the opcode in the hook would be superior to what I did. I wasn't sure that would be ok. Although it's still horribly confusing compared to removing the t2ADDS/SUBS opcodes, even if we need custom lowering to set CPSR (due to the tblgen limitation you mentioned?) -Andy From dpatel at apple.com Tue Sep 20 12:43:14 2011 From: dpatel at apple.com (Devang Patel) Date: Tue, 20 Sep 2011 17:43:14 -0000 Subject: [llvm-commits] [llvm] r140151 - /llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp Message-ID: <20110920174314.821A22A6C12C@llvm.org> Author: dpatel Date: Tue Sep 20 12:43:14 2011 New Revision: 140151 URL: http://llvm.org/viewvc/llvm-project?rev=140151&view=rev Log: Eliminate unnecessary copy of FileName from GCOVLines. GCOVLines is always accessed through a StringMap where the key is FileName. Modified: llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp Modified: llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp?rev=140151&r1=140150&r2=140151&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp (original) +++ llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp Tue Sep 20 12:43:14 2011 @@ -167,18 +167,17 @@ } uint32_t length() { - return lengthOfGCOVString(Filename) + 2 + Lines.size(); + // FIXME: ??? What is the significance of 2 here ? + return 2 + Lines.size(); } private: friend class GCOVBlock; - GCOVLines(std::string Filename, raw_ostream *os) - : Filename(Filename) { + GCOVLines(raw_ostream *os) { this->os = os; } - std::string Filename; SmallVector Lines; }; @@ -190,7 +189,7 @@ GCOVLines &getFile(std::string Filename) { GCOVLines *&Lines = LinesByFile[Filename]; if (!Lines) { - Lines = new GCOVLines(Filename, os); + Lines = new GCOVLines(os); } return *Lines; } @@ -203,7 +202,7 @@ uint32_t Len = 3; for (StringMap::iterator I = LinesByFile.begin(), E = LinesByFile.end(); I != E; ++I) { - Len += I->second->length(); + Len = Len + lengthOfGCOVString(I->first()) + I->second->length(); } writeBytes(LinesTag, 4); @@ -212,7 +211,7 @@ for (StringMap::iterator I = LinesByFile.begin(), E = LinesByFile.end(); I != E; ++I) { write(0); - writeGCOVString(I->second->Filename); + writeGCOVString(I->first()); for (int i = 0, e = I->second->Lines.size(); i != e; ++i) { write(I->second->Lines[i]); } From resistor at mac.com Tue Sep 20 12:44:48 2011 From: resistor at mac.com (Owen Anderson) Date: Tue, 20 Sep 2011 17:44:48 -0000 Subject: [llvm-commits] [llvm] r140152 - /llvm/trunk/test/MC/Disassembler/ARM/thumb2.txt Message-ID: <20110920174448.517282A6C12C@llvm.org> Author: resistor Date: Tue Sep 20 12:44:48 2011 New Revision: 140152 URL: http://llvm.org/viewvc/llvm-project?rev=140152&view=rev Log: Port over more Thumb2 encoding tests to decoding tests. Modified: llvm/trunk/test/MC/Disassembler/ARM/thumb2.txt Modified: llvm/trunk/test/MC/Disassembler/ARM/thumb2.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/thumb2.txt?rev=140152&r1=140151&r2=140152&view=diff ============================================================================== --- llvm/trunk/test/MC/Disassembler/ARM/thumb2.txt (original) +++ llvm/trunk/test/MC/Disassembler/ARM/thumb2.txt Tue Sep 20 12:44:48 2011 @@ -1939,3 +1939,611 @@ 0xff 0xdf 0x21 0xdf +#------------------------------------------------------------------------------ +# SXTAB +#------------------------------------------------------------------------------ +# CHECK: sxtab r2, r3, r4 +# CHECK: sxtab r4, r5, r6 +# CHECK: it lt +# CHECK: sxtablt r6, r2, r9, ror #8 +# CHECK: sxtab r5, r1, r4, ror #16 +# CHECK: sxtab r7, r8, r3, ror #24 + +0x43 0xfa 0x84 0xf2 +0x45 0xfa 0x86 0xf4 +0xb8 0xbf +0x42 0xfa 0x99 0xf6 +0x41 0xfa 0xa4 0xf5 +0x48 0xfa 0xb3 0xf7 + + +#------------------------------------------------------------------------------ +# SXTAB16 +#------------------------------------------------------------------------------ +# CHECK: sxtab16 r6, r2, r7 +# CHECK: sxtab16 r3, r5, r8, ror #8 +# CHECK: sxtab16 r3, r2, r1, ror #16 +# CHECK: ite ne +# CHECK: sxtab16ne r0, r1, r4 +# CHECK: sxtab16eq r1, r2, r3, ror #24 + +0x22 0xfa 0x87 0xf6 +0x25 0xfa 0x98 0xf3 +0x22 0xfa 0xa1 0xf3 +0x14 0xbf +0x21 0xfa 0x84 0xf0 +0x22 0xfa 0xb3 0xf1 + + +#------------------------------------------------------------------------------ +# SXTAH +#------------------------------------------------------------------------------ +# CHECK: sxtah r1, r3, r9 +# CHECK: sxtah r3, r8, r3, ror #8 +# CHECK: sxtah r9, r3, r3, ror #24 +# CHECK: ite hi +# CHECK: sxtahhi r6, r1, r6 +# CHECK: sxtahls r2, r2, r4, ror #16 + +0x03 0xfa 0x89 0xf1 +0x08 0xfa 0x93 0xf3 +0x03 0xfa 0xb3 0xf9 +0x8c 0xbf +0x01 0xfa 0x86 0xf6 +0x02 0xfa 0xa4 0xf2 + + +#------------------------------------------------------------------------------ +# SXTB +#------------------------------------------------------------------------------ +# CHECK: sxtb r5, r6 +# CHECK: sxtb.w r6, r9, ror #8 +# CHECK: sxtb.w r8, r3, ror #24 +# CHECK: ite ge +# CHECK: sxtbge r2, r4 +# CHECK: sxtblt.w r5, r1, ror #16 + +0x75 0xb2 +0x4f 0xfa 0x99 0xf6 +0x4f 0xfa 0xb3 0xf8 +0xac 0xbf +0x62 0xb2 +0x4f 0xfa 0xa1 0xf5 + + +#------------------------------------------------------------------------------ +# SXTB16 +#------------------------------------------------------------------------------ +# CHECK: sxtb16 r1, r4 +# CHECK: sxtb16 r6, r7 +# CHECK: sxtb16 r3, r1, ror #16 +# CHECK: ite hs +# CHECK: sxtb16hs r3, r5, ror #8 +# CHECK: sxtb16lo r2, r3, ror #24 + +0x2f 0xfa 0x84 0xf1 +0x2f 0xfa 0x87 0xf6 +0x2f 0xfa 0xa1 0xf3 +0x2c 0xbf +0x2f 0xfa 0x95 0xf3 +0x2f 0xfa 0xb3 0xf2 + + +#------------------------------------------------------------------------------ +# SXTH +#------------------------------------------------------------------------------ +# CHECK: sxth r1, r6 +# CHECK: sxth.w r3, r8, ror #8 +# CHECK: sxth.w r9, r3, ror #24 +# CHECK: itt ne +# CHECK: sxthne.w r3, r9 +# CHECK: sxthne.w r2, r2, ror #16 + +0x31 0xb2 +0x0f 0xfa 0x98 0xf3 +0x0f 0xfa 0xb3 0xf9 +0x1c 0xbf +0x0f 0xfa 0x89 0xf3 +0x0f 0xfa 0xa2 0xf2 + + +#------------------------------------------------------------------------------ +# SXTB +#------------------------------------------------------------------------------ +# CHECK: sxtb r5, r6 +# CHECK: sxtb.w r6, r9, ror #8 +# CHECK: sxtb.w r8, r3, ror #24 +# CHECK: ite ge +# CHECK: sxtbge r2, r4 +# CHECK: sxtblt.w r5, r1, ror #16 + +0x75 0xb2 +0x4f 0xfa 0x99 0xf6 +0x4f 0xfa 0xb3 0xf8 +0xac 0xbf +0x62 0xb2 +0x4f 0xfa 0xa1 0xf5 + + +#------------------------------------------------------------------------------ +# SXTB16 +#------------------------------------------------------------------------------ +# CHECK: sxtb16 r1, r4 +# CHECK: sxtb16 r6, r7 +# CHECK: sxtb16 r3, r1, ror #16 +# CHECK: ite hs +# CHECK: sxtb16hs r3, r5, ror #8 +# CHECK: sxtb16lo r2, r3, ror #24 + +0x2f 0xfa 0x84 0xf1 +0x2f 0xfa 0x87 0xf6 +0x2f 0xfa 0xa1 0xf3 +0x2c 0xbf +0x2f 0xfa 0x95 0xf3 +0x2f 0xfa 0xb3 0xf2 + + +#------------------------------------------------------------------------------ +# SXTH +#------------------------------------------------------------------------------ +# CHECK: sxth r1, r6 +# CHECK: sxth.w r3, r8, ror #8 +# CHECK: sxth.w r9, r3, ror #24 +# CHECK: itt ne +# CHECK: sxthne.w r3, r9 +# CHECK: sxthne.w r2, r2, ror #16 + +0x31 0xb2 +0x0f 0xfa 0x98 0xf3 +0x0f 0xfa 0xb3 0xf9 +0x1c 0xbf +0x0f 0xfa 0x89 0xf3 +0x0f 0xfa 0xa2 0xf2 + + +#------------------------------------------------------------------------------ +# TBB/TBH +#------------------------------------------------------------------------------ +# CHECK: tbb [r3, r8] +# CHECK: tbh [r3, r8, lsl #1] +# CHECK: it eq +# CHECK: tbbeq [r3, r8] +# CHECK: it hs +# CHECK: tbhhs [r3, r8, lsl #1] + +0xd3 0xe8 0x08 0xf0 +0xd3 0xe8 0x18 0xf0 +0x08 0xbf +0xd3 0xe8 0x08 0xf0 +0x28 0xbf +0xd3 0xe8 0x18 0xf0 + + +#------------------------------------------------------------------------------ +# TEQ +#------------------------------------------------------------------------------ +# CHECK: teq.w r5, #61440 +# CHECK: teq.w r4, r5 +# CHECK: teq.w r4, r5, lsl #5 +# CHECK: teq.w r4, r5, lsr #5 +# CHECK: teq.w r4, r5, lsr #5 +# CHECK: teq.w r4, r5, asr #5 +# CHECK: teq.w r4, r5, ror #5 + +0x95 0xf4 0x70 0x4f +0x94 0xea 0x05 0x0f +0x94 0xea 0x45 0x1f +0x94 0xea 0x55 0x1f +0x94 0xea 0x55 0x1f +0x94 0xea 0x65 0x1f +0x94 0xea 0x75 0x1f + + +#------------------------------------------------------------------------------ +# TST +#------------------------------------------------------------------------------ +# CHECK: tst.w r5, #61440 +# CHECK: tst r2, r5 +# CHECK: tst.w r3, r12, lsl #5 +# CHECK: tst.w r4, r11, lsr #4 +# CHECK: tst.w r5, r10, lsr #12 +# CHECK: tst.w r6, r9, asr #30 +# CHECK: tst.w r7, r8, ror #2 + +0x15 0xf4 0x70 0x4f +0x2a 0x42 +0x13 0xea 0x4c 0x1f +0x14 0xea 0x1b 0x1f +0x15 0xea 0x1a 0x3f +0x16 0xea 0xa9 0x7f +0x17 0xea 0xb8 0x0f + + +#------------------------------------------------------------------------------ +# UADD16/UADD8 +#------------------------------------------------------------------------------ +# CHECK: uadd16 r1, r2, r3 +# CHECK: uadd8 r1, r2, r3 +# CHECK: ite gt +# CHECK: uadd16gt r1, r2, r3 +# CHECK: uadd8le r1, r2, r3 + +0x92 0xfa 0x43 0xf1 +0x82 0xfa 0x43 0xf1 +0xcc 0xbf +0x92 0xfa 0x43 0xf1 +0x82 0xfa 0x43 0xf1 + + +#------------------------------------------------------------------------------ +# UASX +#------------------------------------------------------------------------------ +# CHECK: uasx r9, r12, r0 +# CHECK: it eq +# CHECK: uasxeq r9, r12, r0 +# CHECK: uasx r9, r12, r0 +# CHECK: it eq +# CHECK: uasxeq r9, r12, r0 + +0xac 0xfa 0x40 0xf9 +0x08 0xbf +0xac 0xfa 0x40 0xf9 +0xac 0xfa 0x40 0xf9 +0x08 0xbf +0xac 0xfa 0x40 0xf9 + + +#------------------------------------------------------------------------------ +# UBFX +#------------------------------------------------------------------------------ +# CHECK: ubfx r4, r5, #16, #1 +# CHECK: it gt +# CHECK: ubfxgt r4, r5, #16, #16 + +0xc5 0xf3 0x00 0x44 +0xc8 0xbf +0xc5 0xf3 0x0f 0x44 + + +#------------------------------------------------------------------------------ +# UHADD16/UHADD8 +#------------------------------------------------------------------------------ +# CHECK: uhadd16 r4, r8, r2 +# CHECK: uhadd8 r4, r8, r2 +# CHECK: itt gt +# CHECK: uhadd16gt r4, r8, r2 +# CHECK: uhadd8gt r4, r8, r2 + +0x98 0xfa 0x62 0xf4 +0x88 0xfa 0x62 0xf4 +0xc4 0xbf +0x98 0xfa 0x62 0xf4 +0x88 0xfa 0x62 0xf4 + + +#------------------------------------------------------------------------------ +# UHASX/UHSAX +#------------------------------------------------------------------------------ +# CHECK: uhasx r4, r1, r5 +# CHECK: uhsax r5, r6, r6 +# CHECK: itt gt +# CHECK: uhasxgt r6, r9, r8 +# CHECK: uhsaxgt r7, r8, r12 + +0xa1 0xfa 0x65 0xf4 +0xe6 0xfa 0x66 0xf5 +0xc4 0xbf +0xa9 0xfa 0x68 0xf6 +0xe8 0xfa 0x6c 0xf7 + +#------------------------------------------------------------------------------ +# UHSUB16/UHSUB8 +#------------------------------------------------------------------------------ +# CHECK: uhsub16 r5, r8, r3 +# CHECK: uhsub8 r1, r7, r6 +# CHECK: itt lt +# CHECK: uhsub16lt r4, r9, r12 +# CHECK: uhsub8lt r3, r1, r5 + +0xd8 0xfa 0x63 0xf5 +0xc7 0xfa 0x66 0xf1 +0xbc 0xbf +0xd9 0xfa 0x6c 0xf4 +0xc1 0xfa 0x65 0xf3 + + +#------------------------------------------------------------------------------ +# UMAAL +#------------------------------------------------------------------------------ +# CHECK: umaal r3, r4, r5, r6 +# CHECK: it lt +# CHECK: umaallt r3, r4, r5, r6 + +0xe5 0xfb 0x66 0x34 +0xb8 0xbf +0xe5 0xfb 0x66 0x34 + + +#------------------------------------------------------------------------------ +# UMLAL +#------------------------------------------------------------------------------ +# CHECK: umlal r2, r4, r6, r8 +# CHECK: it gt +# CHECK: umlalgt r6, r1, r2, r6 + +0xe6 0xfb 0x08 0x24 +0xc8 0xbf +0xe2 0xfb 0x06 0x61 + + +#------------------------------------------------------------------------------ +# UMULL +#------------------------------------------------------------------------------ +# CHECK: umull r2, r4, r6, r8 +# CHECK: it gt +# CHECK: umullgt r6, r1, r2, r6 + +0xa6 0xfb 0x08 0x24 +0xc8 0xbf +0xa2 0xfb 0x06 0x61 + + +#------------------------------------------------------------------------------ +# UQADD16/UQADD8 +#------------------------------------------------------------------------------ +# CHECK: uqadd16 r1, r2, r3 +# CHECK: uqadd8 r3, r4, r8 +# CHECK: ite gt +# CHECK: uqadd16gt r4, r7, r9 +# CHECK: uqadd8le r8, r1, r2 + +0x92 0xfa 0x53 0xf1 +0x84 0xfa 0x58 0xf3 +0xcc 0xbf +0x97 0xfa 0x59 0xf4 +0x81 0xfa 0x52 0xf8 + + +#------------------------------------------------------------------------------ +# UQASX/UQSAX +#------------------------------------------------------------------------------ +# CHECK: uqasx r1, r2, r3 +# CHECK: uqsax r3, r4, r8 +# CHECK: ite gt +# CHECK: uqasxgt r4, r7, r9 +# CHECK: uqsaxle r8, r1, r2 + +0xa2 0xfa 0x53 0xf1 +0xe4 0xfa 0x58 0xf3 +0xcc 0xbf +0xa7 0xfa 0x59 0xf4 +0xe1 0xfa 0x52 0xf8 + + +#------------------------------------------------------------------------------ +# UQSUB16/UQSUB8 +#------------------------------------------------------------------------------ +# CHECK: uqsub8 r8, r2, r9 +# CHECK: uqsub16 r1, r9, r7 +# CHECK: ite gt +# CHECK: uqsub8gt r3, r1, r6 +# CHECK: uqsub16le r4, r6, r4 + +0xc2 0xfa 0x59 0xf8 +0xd9 0xfa 0x57 0xf1 +0xcc 0xbf +0xc1 0xfa 0x56 0xf3 +0xd6 0xfa 0x54 0xf4 + + +#------------------------------------------------------------------------------ +# UQSUB16/UQSUB8 +#------------------------------------------------------------------------------ +# CHECK: usad8 r1, r9, r7 +# CHECK: usada8 r8, r2, r9, r12 +# CHECK: ite gt +# CHECK: usada8gt r3, r1, r6, r9 +# CHECK: usad8le r4, r6, r4 + +0x79 0xfb 0x07 0xf1 +0x72 0xfb 0x09 0xc8 +0xcc 0xbf +0x71 0xfb 0x06 0x93 +0x76 0xfb 0x04 0xf4 + + +#------------------------------------------------------------------------------ +# USAT +#------------------------------------------------------------------------------ +# CHECK: usat r8, #1, r10 +# CHECK: usat r8, #4, r10 +# CHECK: usat r8, #5, r10, lsl #31 +# CHECK: usat r8, #16, r10, asr #1 + +0x8a 0xf3 0x01 0x08 +0x8a 0xf3 0x04 0x08 +0x8a 0xf3 0xc5 0x78 +0xaa 0xf3 0x50 0x08 + + +#------------------------------------------------------------------------------ +# USAT16 +#------------------------------------------------------------------------------ +# CHECK: usat16 r2, #2, r7 +# CHECK: usat16 r3, #15, r5 + +0xa7 0xf3 0x02 0x02 +0xa5 0xf3 0x0f 0x03 + + +#------------------------------------------------------------------------------ +# USAX +#------------------------------------------------------------------------------ +# CHECK: usax r2, r3, r4 +# CHECK: it ne +# CHECK: usaxne r6, r1, r9 +# CHECK: usax r2, r3, r4 +# CHECK: it ne +# CHECK: usaxne r6, r1, r9 + +0xe3 0xfa 0x44 0xf2 +0x18 0xbf +0xe1 0xfa 0x49 0xf6 +0xe3 0xfa 0x44 0xf2 +0x18 0xbf +0xe1 0xfa 0x49 0xf6 + + +#------------------------------------------------------------------------------ +# USUB16/USUB8 +#------------------------------------------------------------------------------ +# CHECK: usub16 r4, r2, r7 +# CHECK: usub8 r1, r8, r5 +# CHECK: ite hi +# CHECK: usub16hi r1, r1, r3 +# CHECK: usub8ls r9, r2, r3 + +0xd2 0xfa 0x47 0xf4 +0xc8 0xfa 0x45 0xf1 +0x8c 0xbf +0xd1 0xfa 0x43 0xf1 +0xc2 0xfa 0x43 0xf9 + + +#------------------------------------------------------------------------------ +# UXTAB +#------------------------------------------------------------------------------ +# CHECK: uxtab r2, r3, r4 +# CHECK: uxtab r4, r5, r6 +# CHECK: it lt +# CHECK: uxtablt r6, r2, r9, ror #8 +# CHECK: uxtab r5, r1, r4, ror #16 +# CHECK: uxtab r7, r8, r3, ror #24 + +0x53 0xfa 0x84 0xf2 +0x55 0xfa 0x86 0xf4 +0xb8 0xbf +0x52 0xfa 0x99 0xf6 +0x51 0xfa 0xa4 0xf5 +0x58 0xfa 0xb3 0xf7 + + +#------------------------------------------------------------------------------ +# UXTAB16 +#------------------------------------------------------------------------------ +# CHECK: it ge +# CHECK: uxtab16ge r0, r1, r4 +# CHECK: uxtab16 r6, r2, r7 +# CHECK: uxtab16 r3, r5, r8, ror #8 +# CHECK: uxtab16 r3, r2, r1, ror #16 +# CHECK: it eq +# CHECK: uxtab16eq r1, r2, r3, ror #24 + +0xa8 0xbf +0x31 0xfa 0x84 0xf0 +0x32 0xfa 0x87 0xf6 +0x35 0xfa 0x98 0xf3 +0x32 0xfa 0xa1 0xf3 +0x08 0xbf +0x32 0xfa 0xb3 0xf1 + + +#------------------------------------------------------------------------------ +# UXTAH +#------------------------------------------------------------------------------ +# CHECK: uxtah r1, r3, r9 +# CHECK: it hi +# CHECK: uxtahhi r6, r1, r6 +# CHECK: uxtah r3, r8, r3, ror #8 +# CHECK: it lo +# CHECK: uxtahlo r2, r2, r4, ror #16 +# CHECK: uxtah r9, r3, r3, ror #24 + +0x13 0xfa 0x89 0xf1 +0x88 0xbf +0x11 0xfa 0x86 0xf6 +0x18 0xfa 0x93 0xf3 +0x38 0xbf +0x12 0xfa 0xa4 0xf2 +0x13 0xfa 0xb3 0xf9 + + +#------------------------------------------------------------------------------ +# UXTB +#------------------------------------------------------------------------------ +# CHECK: it ge +# CHECK: uxtbge r2, r4 +# CHECK: uxtb r5, r6 +# CHECK: uxtb.w r6, r9, ror #8 +# CHECK: it lo +# CHECK: uxtblo.w r5, r1, ror #16 +# CHECK: uxtb.w r8, r3, ror #24 + +0xa8 0xbf +0xe2 0xb2 +0xf5 0xb2 +0x5f 0xfa 0x99 0xf6 +0x38 0xbf +0x5f 0xfa 0xa1 0xf5 +0x5f 0xfa 0xb3 0xf8 + + +#------------------------------------------------------------------------------ +# UXTB16 +#------------------------------------------------------------------------------ +# CHECK: uxtb16 r1, r4 +# CHECK: uxtb16 r6, r7 +# CHECK: it hs +# CHECK: uxtb16hs r3, r5, ror #8 +# CHECK: uxtb16 r3, r1, ror #16 +# CHECK: it ge +# CHECK: uxtb16ge r2, r3, ror #24 + +0x3f 0xfa 0x84 0xf1 +0x3f 0xfa 0x87 0xf6 +0x28 0xbf +0x3f 0xfa 0x95 0xf3 +0x3f 0xfa 0xa1 0xf3 +0xa8 0xbf +0x3f 0xfa 0xb3 0xf2 + + +#------------------------------------------------------------------------------ +# UXTH +#------------------------------------------------------------------------------ +# CHECK: it ne +# CHECK: uxthne.w r3, r9 +# CHECK: uxth r1, r6 +# CHECK: uxth.w r3, r8, ror #8 +# CHECK: it le +# CHECK: uxthle.w r2, r2, ror #16 +# CHECK: uxth.w r9, r3, ror #24 + +0x18 0xbf +0x1f 0xfa 0x89 0xf3 +0xb1 0xb2 +0x1f 0xfa 0x98 0xf3 +0xd8 0xbf +0x1f 0xfa 0xa2 0xf2 +0x1f 0xfa 0xb3 0xf9 + + +#------------------------------------------------------------------------------ +# WFE/WFI/YIELD +#------------------------------------------------------------------------------ +# CHECK: wfe +# CHECK: wfi +# CHECK: yield +# CHECK: itet lt +# CHECK: wfelt +# CHECK: wfige +# CHECK: yieldlt + +0x20 0xbf +0x30 0xbf +0x10 0xbf +0xb6 0xbf +0x20 0xbf +0x30 0xbf +0x10 0xbf + From benny.kra at googlemail.com Tue Sep 20 12:53:01 2011 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Tue, 20 Sep 2011 17:53:01 -0000 Subject: [llvm-commits] [llvm] r140153 - in /llvm/trunk/tools/llvm-objdump: MCFunction.cpp MCFunction.h MachODump.cpp Message-ID: <20110920175301.9720D2A6C12C@llvm.org> Author: d0k Date: Tue Sep 20 12:53:01 2011 New Revision: 140153 URL: http://llvm.org/viewvc/llvm-project?rev=140153&view=rev Log: llvm-objdump: factor code better, add comments. Modified: llvm/trunk/tools/llvm-objdump/MCFunction.cpp llvm/trunk/tools/llvm-objdump/MCFunction.h llvm/trunk/tools/llvm-objdump/MachODump.cpp Modified: llvm/trunk/tools/llvm-objdump/MCFunction.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-objdump/MCFunction.cpp?rev=140153&r1=140152&r2=140153&view=diff ============================================================================== --- llvm/trunk/tools/llvm-objdump/MCFunction.cpp (original) +++ llvm/trunk/tools/llvm-objdump/MCFunction.cpp Tue Sep 20 12:53:01 2011 @@ -47,44 +47,39 @@ while (!WorkList.empty()) { uint64_t Index = WorkList.pop_back_val(); if (VisitedInsts.find(Index) != VisitedInsts.end()) - continue; + continue; // Already visited this location. for (;Index < End; Index += Size) { - MCInst Inst; + VisitedInsts.insert(Index); + MCInst Inst; if (DisAsm->getInstruction(Inst, Size, Region, Index, DebugOut, nulls())){ + Instructions.push_back(MCDecodedInst(Index, Size, Inst)); if (Ana->isBranch(Inst)) { uint64_t targ = Ana->evaluateBranch(Inst, Index, Size); - if (targ != -1ULL && targ == Index+Size) { - Instructions.push_back(MCDecodedInst(Index, Size, Inst)); - VisitedInsts.insert(Index); - continue; - } + if (targ != -1ULL && targ == Index+Size) + continue; // Skip nop jumps. + + // If we could determine the branch target, make a note to start a + // new basic block there and add the target to the worklist. if (targ != -1ULL) { Splits.insert(targ); WorkList.push_back(targ); WorkList.push_back(Index+Size); } Splits.insert(Index+Size); - Instructions.push_back(MCDecodedInst(Index, Size, Inst)); - VisitedInsts.insert(Index); break; } else if (Ana->isReturn(Inst)) { + // Return instruction. This basic block ends here. Splits.insert(Index+Size); - Instructions.push_back(MCDecodedInst(Index, Size, Inst)); - VisitedInsts.insert(Index); break; } else if (Ana->isCall(Inst)) { uint64_t targ = Ana->evaluateBranch(Inst, Index, Size); - if (targ != -1ULL && targ != Index+Size) { + // Add the call to the call list if the destination is known. + if (targ != -1ULL && targ != Index+Size) Calls.push_back(targ); - } } - - Instructions.push_back(MCDecodedInst(Index, Size, Inst)); - VisitedInsts.insert(Index); } else { - VisitedInsts.insert(Index); errs().write_hex(Index) << ": warning: invalid instruction encoding\n"; if (Size == 0) Size = 1; // skip illegible bytes @@ -93,9 +88,10 @@ } } + // Make sure the instruction list is sorted. std::sort(Instructions.begin(), Instructions.end()); - // Create basic blocks. + // Create basic blocks. unsigned ii = 0, ie = Instructions.size(); for (std::set::iterator spi = Splits.begin(), spe = llvm::prior(Splits.end()); spi != spe; ++spi) { @@ -115,7 +111,7 @@ // Calculate successors of each block. for (MCFunction::iterator i = f.begin(), e = f.end(); i != e; ++i) { - MCBasicBlock &BB = i->second; + MCBasicBlock &BB = const_cast(i->second); if (BB.getInsts().empty()) continue; const MCDecodedInst &Inst = BB.getInsts().back(); Modified: llvm/trunk/tools/llvm-objdump/MCFunction.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-objdump/MCFunction.h?rev=140153&r1=140152&r2=140153&view=diff ============================================================================== --- llvm/trunk/tools/llvm-objdump/MCFunction.h (original) +++ llvm/trunk/tools/llvm-objdump/MCFunction.h Tue Sep 20 12:53:01 2011 @@ -83,9 +83,9 @@ const MCInstrAnalysis *Ana, raw_ostream &DebugOut, SmallVectorImpl &Calls); - typedef MapTy::iterator iterator; - iterator begin() { return Blocks.begin(); } - iterator end() { return Blocks.end(); } + typedef MapTy::const_iterator iterator; + iterator begin() const { return Blocks.begin(); } + iterator end() const { return Blocks.end(); } StringRef getName() const { return Name; } Modified: llvm/trunk/tools/llvm-objdump/MachODump.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-objdump/MachODump.cpp?rev=140153&r1=140152&r2=140153&view=diff ============================================================================== --- llvm/trunk/tools/llvm-objdump/MachODump.cpp (original) +++ llvm/trunk/tools/llvm-objdump/MachODump.cpp Tue Sep 20 12:53:01 2011 @@ -94,6 +94,29 @@ bool operator<(const Symbol &RHS) const { return Value < RHS.Value; } }; + +template +static Section copySection(const T &Sect) { + Section S; + memcpy(S.Name, Sect->Name, 16); + S.Address = Sect->Address; + S.Size = Sect->Size; + S.Offset = Sect->Offset; + S.NumRelocs = Sect->NumRelocationTableEntries; + S.RelocTableOffset = Sect->RelocationTableOffset; + return S; +} + +template +static Symbol copySymbol(const T &STE) { + Symbol S; + S.StringIndex = STE->StringIndex; + S.SectionIndex = STE->SectionIndex; + S.Value = STE->Value; + return S; +} + +// Print addtitional information about an address, if available. static void DumpAddress(uint64_t Address, ArrayRef
    Sections, MachOObject *MachOObj, raw_ostream &OS) { for (unsigned i = 0; i != Sections.size(); ++i) { @@ -102,14 +125,86 @@ Sections[i].Address + Sections[i].Size > Address) { StringRef bytes = MachOObj->getData(Sections[i].Offset, Sections[i].Size); + // Print constant strings. if (!strcmp(Sections[i].Name, "__cstring")) OS << '"' << bytes.substr(addr, bytes.find('\0', addr)) << '"'; + // Print constant CFStrings. if (!strcmp(Sections[i].Name, "__cfstring")) OS << "@\"" << bytes.substr(addr, bytes.find('\0', addr)) << '"'; } } } +typedef std::map FunctionMapTy; +typedef SmallVector FunctionListTy; +static void createMCFunctionAndSaveCalls(StringRef Name, + const MCDisassembler *DisAsm, + MemoryObject &Object, uint64_t Start, + uint64_t End, + MCInstrAnalysis *InstrAnalysis, + uint64_t Address, + raw_ostream &DebugOut, + FunctionMapTy &FunctionMap, + FunctionListTy &Functions) { + SmallVector Calls; + MCFunction f = + MCFunction::createFunctionFromMC(Name, DisAsm, Object, Start, End, + InstrAnalysis, DebugOut, Calls); + Functions.push_back(f); + FunctionMap[Address] = &Functions.back(); + + // Add the gathered callees to the map. + for (unsigned i = 0, e = Calls.size(); i != e; ++i) + FunctionMap.insert(std::make_pair(Calls[i], (MCFunction*)0)); +} + +// Write a graphviz file for the CFG inside an MCFunction. +static void emitDOTFile(const char *FileName, const MCFunction &f, + MCInstPrinter *IP) { + // Start a new dot file. + std::string Error; + raw_fd_ostream Out(FileName, Error); + if (!Error.empty()) { + errs() << "llvm-objdump: warning: " << Error << '\n'; + return; + } + + Out << "digraph " << f.getName() << " {\n"; + Out << "graph [ rankdir = \"LR\" ];\n"; + for (MCFunction::iterator i = f.begin(), e = f.end(); i != e; ++i) { + bool hasPreds = false; + // Only print blocks that have predecessors. + // FIXME: Slow. + for (MCFunction::iterator pi = f.begin(), pe = f.end(); pi != pe; + ++pi) + if (pi->second.contains(i->first)) { + hasPreds = true; + break; + } + + if (!hasPreds && i != f.begin()) + continue; + + Out << '"' << i->first << "\" [ label=\""; + // Print instructions. + for (unsigned ii = 0, ie = i->second.getInsts().size(); ii != ie; + ++ii) { + // Escape special chars and print the instruction in mnemonic form. + std::string Str; + raw_string_ostream OS(Str); + IP->printInst(&i->second.getInsts()[ii].Inst, OS, ""); + Out << DOT::EscapeString(OS.str()) << '|'; + } + Out << "\" shape=\"record\" ];\n"; + + // Add edges. + for (MCBasicBlock::succ_iterator si = i->second.succ_begin(), + se = i->second.succ_end(); si != se; ++si) + Out << i->first << ":o -> " << *si <<":a\n"; + } + Out << "}\n"; +} + void llvm::DisassembleInputMachO(StringRef Filename) { OwningPtr Buff; @@ -131,44 +226,28 @@ // Set up disassembler. OwningPtr AsmInfo(TheTarget->createMCAsmInfo(TripleName)); - - if (!AsmInfo) { - errs() << "error: no assembly info for target " << TripleName << "\n"; - return; - } - OwningPtr STI(TheTarget->createMCSubtargetInfo(TripleName, "", "")); - - if (!STI) { - errs() << "error: no subtarget info for target " << TripleName << "\n"; - return; - } - OwningPtr DisAsm(TheTarget->createMCDisassembler(*STI)); - if (!DisAsm) { - errs() << "error: no disassembler for target " << TripleName << "\n"; - return; - } - int AsmPrinterVariant = AsmInfo->getAssemblerDialect(); OwningPtr IP(TheTarget->createMCInstPrinter( - AsmPrinterVariant, *AsmInfo, *STI)); - if (!IP) { - errs() << "error: no instruction printer for target " << TripleName << '\n'; + AsmPrinterVariant, *AsmInfo, *STI)); + + if (!InstrAnalysis || !AsmInfo || !STI || !DisAsm || !IP) { + errs() << "error: couldn't initialize disassmbler for target " + << TripleName << '\n'; return; } - outs() << '\n'; - outs() << Filename << ":\n\n"; + outs() << '\n' << Filename << ":\n\n"; const macho::Header &Header = MachOObj->getHeader(); const MachOObject::LoadCommandInfo *SymtabLCI = 0; + // First, find the symbol table segment. for (unsigned i = 0; i != Header.NumLoadCommands; ++i) { const MachOObject::LoadCommandInfo &LCI = MachOObj->getLoadCommandInfo(i); - switch (LCI.Command.Type) { - case macho::LCT_Symtab: + if (LCI.Command.Type == macho::LCT_Symtab) { SymtabLCI = &LCI; break; } @@ -184,34 +263,24 @@ std::vector UnsortedSymbols; // FIXME: duplication SmallVector FoundFns; + // Make a list of all symbols in the object file. for (unsigned i = 0; i != Header.NumLoadCommands; ++i) { const MachOObject::LoadCommandInfo &LCI = MachOObj->getLoadCommandInfo(i); if (LCI.Command.Type == macho::LCT_Segment) { InMemoryStruct SegmentLC; MachOObj->ReadSegmentLoadCommand(LCI, SegmentLC); + // Store the sections in this segment. for (unsigned SectNum = 0; SectNum != SegmentLC->NumSections; ++SectNum) { InMemoryStruct Sect; MachOObj->ReadSection(LCI, SectNum, Sect); + Sections.push_back(copySection(Sect)); - Section S; - memcpy(S.Name, Sect->Name, 16); - S.Address = Sect->Address; - S.Size = Sect->Size; - S.Offset = Sect->Offset; - S.NumRelocs = Sect->NumRelocationTableEntries; - S.RelocTableOffset = Sect->RelocationTableOffset; - Sections.push_back(S); - + // Store the symbols in this section. for (unsigned i = 0; i != SymtabLC->NumSymbolTableEntries; ++i) { InMemoryStruct STE; MachOObj->ReadSymbolTableEntry(SymtabLC->SymbolTableOffset, i, STE); - - Symbol S; - S.StringIndex = STE->StringIndex; - S.SectionIndex = STE->SectionIndex; - S.Value = STE->Value; - Symbols.push_back(S); + Symbols.push_back(copySymbol(STE)); UnsortedSymbols.push_back(Symbols.back()); } } @@ -219,32 +288,24 @@ InMemoryStruct Segment64LC; MachOObj->ReadSegment64LoadCommand(LCI, Segment64LC); - for (unsigned SectNum = 0; SectNum != Segment64LC->NumSections; ++SectNum) { + // Store the sections in this segment. + for (unsigned SectNum = 0; SectNum != Segment64LC->NumSections; + ++SectNum) { InMemoryStruct Sect64; MachOObj->ReadSection64(LCI, SectNum, Sect64); + Sections.push_back(copySection(Sect64)); - Section S; - memcpy(S.Name, Sect64->Name, 16); - S.Address = Sect64->Address; - S.Size = Sect64->Size; - S.Offset = Sect64->Offset; - S.NumRelocs = Sect64->NumRelocationTableEntries; - S.RelocTableOffset = Sect64->RelocationTableOffset; - Sections.push_back(S); - + // Store the symbols in this section. for (unsigned i = 0; i != SymtabLC->NumSymbolTableEntries; ++i) { InMemoryStruct STE; MachOObj->ReadSymbol64TableEntry(SymtabLC->SymbolTableOffset, i, STE); - - Symbol S; - S.StringIndex = STE->StringIndex; - S.SectionIndex = STE->SectionIndex; - S.Value = STE->Value; - Symbols.push_back(S); + Symbols.push_back(copySymbol(STE)); UnsortedSymbols.push_back(Symbols.back()); } } } else if (LCI.Command.Type == macho::LCT_FunctionStarts) { + // We found a function starts segment, parse the addresses for later + // consumption. InMemoryStruct LLC; MachOObj->ReadLinkeditDataLoadCommand(LCI, LLC); @@ -252,7 +313,6 @@ } } - std::map FunctionMap; // Sort the symbols by address, just in case they didn't come in that way. array_pod_sort(Symbols.begin(), Symbols.end()); @@ -263,12 +323,14 @@ raw_ostream &DebugOut = nulls(); #endif - SmallVector Functions; + FunctionMapTy FunctionMap; + FunctionListTy Functions; for (unsigned SectIdx = 0; SectIdx != Sections.size(); SectIdx++) { if (strcmp(Sections[SectIdx].Name, "__text")) - continue; + continue; // Skip non-text sections + // Insert the functions from the function starts segment into our map. uint64_t VMAddr = Sections[SectIdx].Address - Sections[SectIdx].Offset; for (unsigned i = 0, e = FoundFns.size(); i != e; ++i) FunctionMap.insert(std::make_pair(FoundFns[i]+VMAddr, (MCFunction*)0)); @@ -278,6 +340,7 @@ StringRefMemoryObject memoryObject(Bytes); bool symbolTableWorked = false; + // Parse relocations. std::vector > Relocs; for (unsigned j = 0; j != Sections[SectIdx].NumRelocs; ++j) { InMemoryStruct RE; @@ -286,11 +349,16 @@ } array_pod_sort(Relocs.begin(), Relocs.end()); + // Disassemble symbol by symbol. for (unsigned SymIdx = 0; SymIdx != Symbols.size(); SymIdx++) { + // Make sure the symbol is defined in this section. if ((unsigned)Symbols[SymIdx].SectionIndex - 1 != SectIdx) continue; + // Start at the address of the symbol relative to the section's address. uint64_t Start = Symbols[SymIdx].Value - Sections[SectIdx].Address; + // Stop disassembling either at the beginning of the next symbol or at + // the end of the section. uint64_t End = (SymIdx+1 == Symbols.size() || Symbols[SymIdx].SectionIndex != Symbols[SymIdx+1].SectionIndex) ? Sections[SectIdx].Size : @@ -303,6 +371,7 @@ symbolTableWorked = true; if (!CFG) { + // Normal disassembly, print addresses, bytes and mnemonic form. outs() << MachOObj->getStringAtIndex(Symbols[SymIdx].StringIndex) << ":\n"; for (uint64_t Index = Start; Index < End; Index += Size) { @@ -322,42 +391,27 @@ } } else { // Create CFG and use it for disassembly. - SmallVector Calls; - MCFunction f = - MCFunction::createFunctionFromMC( - MachOObj->getStringAtIndex(Symbols[SymIdx].StringIndex), - DisAsm.get(), - memoryObject, Start, End, - InstrAnalysis.get(), DebugOut, - Calls); - - Functions.push_back(f); - FunctionMap[Start] = &Functions.back(); - - for (unsigned i = 0, e = Calls.size(); i != e; ++i) - FunctionMap.insert(std::make_pair(Calls[i], (MCFunction*)0)); + createMCFunctionAndSaveCalls( + MachOObj->getStringAtIndex(Symbols[SymIdx].StringIndex), + DisAsm.get(), memoryObject, Start, End, InstrAnalysis.get(), + Start, DebugOut, FunctionMap, Functions); } } if (CFG) { if (!symbolTableWorked) { - // Create CFG and use it for disassembly. - SmallVector Calls; - MCFunction f = - MCFunction::createFunctionFromMC("__TEXT", DisAsm.get(), - memoryObject, 0, Sections[SectIdx].Size, - InstrAnalysis.get(), DebugOut, - Calls); - - Functions.push_back(f); - FunctionMap[Sections[SectIdx].Offset] = &Functions.back(); - - for (unsigned i = 0, e = Calls.size(); i != e; ++i) - FunctionMap.insert(std::make_pair(Calls[i], (MCFunction*)0)); + // Reading the symbol table didn't work, create a big __TEXT symbol. + createMCFunctionAndSaveCalls("__TEXT", DisAsm.get(), memoryObject, + 0, Sections[SectIdx].Size, + InstrAnalysis.get(), + Sections[SectIdx].Offset, DebugOut, + FunctionMap, Functions); } for (std::map::iterator mi = FunctionMap.begin(), me = FunctionMap.end(); mi != me; ++mi) if (mi->second == 0) { + // Create functions for the remaining callees we have gathered, + // but we didn't find a name for them. SmallVector Calls; MCFunction f = MCFunction::createFunctionFromMC("unknown", DisAsm.get(), @@ -367,10 +421,11 @@ Calls); Functions.push_back(f); mi->second = &Functions.back(); - for (unsigned i = 0, e = Calls.size(); i != e; ++i) - if (FunctionMap.insert(std::make_pair(Calls[i], (MCFunction*)0)) - .second) + for (unsigned i = 0, e = Calls.size(); i != e; ++i) { + std::pair p(Calls[i], (MCFunction*)0); + if (FunctionMap.insert(p).second) mi = FunctionMap.begin(); + } } DenseSet PrintedBlocks; @@ -378,10 +433,13 @@ MCFunction &f = Functions[ffi]; for (MCFunction::iterator fi = f.begin(), fe = f.end(); fi != fe; ++fi){ if (!PrintedBlocks.insert(fi->first).second) - continue; + continue; // We already printed this block. + + // We assume a block has predecessors when it's the first block after + // a symbol. bool hasPreds = FunctionMap.find(fi->first) != FunctionMap.end(); - // Only print blocks that have predecessors. + // See if this block has predecessors. // FIXME: Slow. for (MCFunction::iterator pi = f.begin(), pe = f.end(); pi != pe; ++pi) @@ -390,8 +448,8 @@ break; } - // Data block. - if (!hasPreds && fi != f.begin()) { + // No predecessors, this is a data block. Print as .byte directives. + if (!hasPreds) { uint64_t End = llvm::next(fi) == fe ? Sections[SectIdx].Size : llvm::next(fi)->first; outs() << "# " << End-fi->first << " bytes of data:\n"; @@ -403,23 +461,31 @@ continue; } - if (fi->second.contains(fi->first)) + if (fi->second.contains(fi->first)) // Print a header for simple loops outs() << "# Loop begin:\n"; + // Walk over the instructions and print them. for (unsigned ii = 0, ie = fi->second.getInsts().size(); ii != ie; ++ii) { const MCDecodedInst &Inst = fi->second.getInsts()[ii]; + + // If there's a symbol at this address, print its name. if (FunctionMap.find(Sections[SectIdx].Address + Inst.Address) != FunctionMap.end()) outs() << FunctionMap[Sections[SectIdx].Address + Inst.Address]-> getName() << ":\n"; + outs() << format("%8llx:\t", Sections[SectIdx].Address + Inst.Address); DumpBytes(StringRef(Bytes.data() + Inst.Address, Inst.Size)); - // Simple loops. - if (fi->second.contains(fi->first)) + + if (fi->second.contains(fi->first)) // Indent simple loops. outs() << '\t'; + IP->printInst(&Inst.Inst, outs(), ""); + + // Look for relocations inside this instructions, if there is one + // print its target and additional information if availbable. for (unsigned j = 0; j != Relocs.size(); ++j) if (Relocs[j].first >= Sections[SectIdx].Address + Inst.Address && Relocs[j].first < Sections[SectIdx].Address + Inst.Address + @@ -431,6 +497,9 @@ DumpAddress(UnsortedSymbols[Relocs[j].second].Value, Sections, MachOObj.get(), outs()); } + + // If this instructions contains an address, see if we can evaluate + // it and print additional information. uint64_t targ = InstrAnalysis->evaluateBranch(Inst.Inst, Inst.Address, Inst.Size); @@ -441,48 +510,7 @@ } } - // Start a new dot file. - std::string Error; - raw_fd_ostream Out((f.getName().str() + ".dot").c_str(), Error); - if (!Error.empty()) { - errs() << "llvm-objdump: warning: " << Error << '\n'; - continue; - } - - Out << "digraph " << f.getName() << " {\n"; - Out << "graph [ rankdir = \"LR\" ];\n"; - for (MCFunction::iterator i = f.begin(), e = f.end(); i != e; ++i) { - bool hasPreds = false; - // Only print blocks that have predecessors. - // FIXME: Slow. - for (MCFunction::iterator pi = f.begin(), pe = f.end(); pi != pe; - ++pi) - if (pi->second.contains(i->first)) { - hasPreds = true; - break; - } - - if (!hasPreds && i != f.begin()) - continue; - - Out << '"' << i->first << "\" [ label=\""; - // Print instructions. - for (unsigned ii = 0, ie = i->second.getInsts().size(); ii != ie; - ++ii) { - // Escape special chars and print the instruction in mnemonic form. - std::string Str; - raw_string_ostream OS(Str); - IP->printInst(&i->second.getInsts()[ii].Inst, OS, ""); - Out << DOT::EscapeString(OS.str()) << '|'; - } - Out << "\" shape=\"record\" ];\n"; - - // Add edges. - for (MCBasicBlock::succ_iterator si = i->second.succ_begin(), - se = i->second.succ_end(); si != se; ++si) - Out << i->first << ":o -> " << *si <<":a\n"; - } - Out << "}\n"; + emitDOTFile((f.getName().str() + ".dot").c_str(), f, IP.get()); } } } From dpatel at apple.com Tue Sep 20 12:55:20 2011 From: dpatel at apple.com (Devang Patel) Date: Tue, 20 Sep 2011 17:55:20 -0000 Subject: [llvm-commits] [llvm] r140154 - /llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp Message-ID: <20110920175520.267622A6C12C@llvm.org> Author: dpatel Date: Tue Sep 20 12:55:19 2011 New Revision: 140154 URL: http://llvm.org/viewvc/llvm-project?rev=140154&view=rev Log: Use StringRef instead of std::string. Modified: llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp Modified: llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp?rev=140154&r1=140153&r2=140154&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp (original) +++ llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp Tue Sep 20 12:55:19 2011 @@ -186,7 +186,7 @@ // other blocks. class GCOVBlock : public GCOVRecord { public: - GCOVLines &getFile(std::string Filename) { + GCOVLines &getFile(StringRef Filename) { GCOVLines *&Lines = LinesByFile[Filename]; if (!Lines) { Lines = new GCOVLines(os); From dpatel at apple.com Tue Sep 20 13:05:45 2011 From: dpatel at apple.com (Devang Patel) Date: Tue, 20 Sep 2011 18:05:45 -0000 Subject: [llvm-commits] [llvm] r140156 - /llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp Message-ID: <20110920180545.86E792A6C12C@llvm.org> Author: dpatel Date: Tue Sep 20 13:05:45 2011 New Revision: 140156 URL: http://llvm.org/viewvc/llvm-project?rev=140156&view=rev Log: Update comment. Modified: llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp Modified: llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp?rev=140156&r1=140155&r2=140156&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp (original) +++ llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp Tue Sep 20 13:05:45 2011 @@ -158,8 +158,7 @@ class GCOVBlock; // Constructed only by requesting it from a GCOVBlock, this object stores a - // list of line numbers and a single filename, representing lines that belong - // to the block. + // list of line numbers representing lines that belong to the block. class GCOVLines : public GCOVRecord { public: void addLine(uint32_t Line) { From nicholas at mxc.ca Tue Sep 20 13:10:04 2011 From: nicholas at mxc.ca (Nick Lewycky) Date: Tue, 20 Sep 2011 11:10:04 -0700 Subject: [llvm-commits] [llvm] r140151 - /llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp In-Reply-To: <20110920174314.821A22A6C12C@llvm.org> References: <20110920174314.821A22A6C12C@llvm.org> Message-ID: <4E78D6FC.4030701@mxc.ca> Devang Patel wrote: > Author: dpatel > Date: Tue Sep 20 12:43:14 2011 > New Revision: 140151 > > URL: http://llvm.org/viewvc/llvm-project?rev=140151&view=rev > Log: > Eliminate unnecessary copy of FileName from GCOVLines. > GCOVLines is always accessed through a StringMap where the key is FileName. > > Modified: > llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp > > Modified: llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp?rev=140151&r1=140150&r2=140151&view=diff > ============================================================================== > --- llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp (original) > +++ llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp Tue Sep 20 12:43:14 2011 > @@ -167,18 +167,17 @@ > } > > uint32_t length() { > - return lengthOfGCOVString(Filename) + 2 + Lines.size(); > + // FIXME: ??? What is the significance of 2 here ? > + return 2 + Lines.size(); This no longer computes the length() though. How about changing std::string Filename into a StringRef if you're concerned about copies? Alternatively, you could name it something like "getNumLines()" and hoist out the +2 as well. Fundamentally, GCOVLines isn't just a list of lines, it's a list of lines attached to a particular filename, so I wanted it to contain all its own data. The +2 is 1 for string length plus 1 for the '0' line id# which means "the filename is" in GCOV format. Nick > } > > private: > friend class GCOVBlock; > > - GCOVLines(std::string Filename, raw_ostream *os) > - : Filename(Filename) { > + GCOVLines(raw_ostream *os) { > this->os = os; > } > > - std::string Filename; > SmallVector Lines; > }; > > @@ -190,7 +189,7 @@ > GCOVLines&getFile(std::string Filename) { > GCOVLines *&Lines = LinesByFile[Filename]; > if (!Lines) { > - Lines = new GCOVLines(Filename, os); > + Lines = new GCOVLines(os); > } > return *Lines; > } > @@ -203,7 +202,7 @@ > uint32_t Len = 3; > for (StringMap::iterator I = LinesByFile.begin(), > E = LinesByFile.end(); I != E; ++I) { > - Len += I->second->length(); > + Len = Len + lengthOfGCOVString(I->first()) + I->second->length(); > } > > writeBytes(LinesTag, 4); > @@ -212,7 +211,7 @@ > for (StringMap::iterator I = LinesByFile.begin(), > E = LinesByFile.end(); I != E; ++I) { > write(0); > - writeGCOVString(I->second->Filename); > + writeGCOVString(I->first()); > for (int i = 0, e = I->second->Lines.size(); i != e; ++i) { > write(I->second->Lines[i]); > } > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > From ahatanak at gmail.com Tue Sep 20 13:09:37 2011 From: ahatanak at gmail.com (Akira Hatanaka) Date: Tue, 20 Sep 2011 18:09:37 -0000 Subject: [llvm-commits] [llvm] r140157 - in /llvm/trunk: include/llvm/ADT/Triple.h lib/Support/Triple.cpp Message-ID: <20110920180937.818322A6C12C@llvm.org> Author: ahatanak Date: Tue Sep 20 13:09:37 2011 New Revision: 140157 URL: http://llvm.org/viewvc/llvm-project?rev=140157&view=rev Log: Add mips64 & mips64el to Triple. Patch by Liu with modifications. Modified: llvm/trunk/include/llvm/ADT/Triple.h llvm/trunk/lib/Support/Triple.cpp Modified: llvm/trunk/include/llvm/ADT/Triple.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/Triple.h?rev=140157&r1=140156&r2=140157&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/Triple.h (original) +++ llvm/trunk/include/llvm/ADT/Triple.h Tue Sep 20 13:09:37 2011 @@ -49,6 +49,8 @@ cellspu, // CellSPU: spu, cellspu mips, // MIPS: mips, mipsallegrex mipsel, // MIPSEL: mipsel, mipsallegrexel, psp + mips64, // MIPS64: mips64 + mips64el,// MIPS64EL: mips64el msp430, // MSP430: msp430 ppc, // PPC: powerpc ppc64, // PPC64: powerpc64, ppu Modified: llvm/trunk/lib/Support/Triple.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Triple.cpp?rev=140157&r1=140156&r2=140157&view=diff ============================================================================== --- llvm/trunk/lib/Support/Triple.cpp (original) +++ llvm/trunk/lib/Support/Triple.cpp Tue Sep 20 13:09:37 2011 @@ -24,6 +24,8 @@ case cellspu: return "cellspu"; case mips: return "mips"; case mipsel: return "mipsel"; + case mips64: return "mips64"; + case mips64el:return "mips64el"; case msp430: return "msp430"; case ppc64: return "powerpc64"; case ppc: return "powerpc"; @@ -145,6 +147,10 @@ return mips; if (Name == "mipsel") return mipsel; + if (Name == "mips64") + return mips64; + if (Name == "mips64el") + return mips64el; if (Name == "msp430") return msp430; if (Name == "ppc64") @@ -302,6 +308,10 @@ else if (ArchName == "mipsel" || ArchName == "mipsallegrexel" || ArchName == "psp") return mipsel; + else if (ArchName == "mips64" || ArchName == "mips64eb") + return mips64; + else if (ArchName == "mips64el") + return mips64el; else if (ArchName == "sparc") return sparc; else if (ArchName == "sparcv9") From dgregor at apple.com Tue Sep 20 13:11:52 2011 From: dgregor at apple.com (Douglas Gregor) Date: Tue, 20 Sep 2011 18:11:52 -0000 Subject: [llvm-commits] [llvm] r140158 - /llvm/trunk/lib/Support/APInt.cpp Message-ID: <20110920181152.8BA932A6C12C@llvm.org> Author: dgregor Date: Tue Sep 20 13:11:52 2011 New Revision: 140158 URL: http://llvm.org/viewvc/llvm-project?rev=140158&view=rev Log: Eliminate sign-comparison warnings in APInt Modified: llvm/trunk/lib/Support/APInt.cpp Modified: llvm/trunk/lib/Support/APInt.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/APInt.cpp?rev=140158&r1=140157&r2=140158&view=diff ============================================================================== --- llvm/trunk/lib/Support/APInt.cpp (original) +++ llvm/trunk/lib/Support/APInt.cpp Tue Sep 20 13:11:52 2011 @@ -54,12 +54,14 @@ return r; r = cdigit - 'A'; - if (r <= radix - 11U) + if (r <= unsigned(radix - 11U)) return r + 10; r = cdigit - 'a'; - if (r <= radix - 11U) + if (r <= unsigned(radix - 11U)) return r + 10; + + radix = 10; } r = cdigit - '0'; From nicholas at mxc.ca Tue Sep 20 13:16:06 2011 From: nicholas at mxc.ca (Nick Lewycky) Date: Tue, 20 Sep 2011 11:16:06 -0700 Subject: [llvm-commits] [llvm] r140156 - /llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp In-Reply-To: <20110920180545.86E792A6C12C@llvm.org> References: <20110920180545.86E792A6C12C@llvm.org> Message-ID: <4E78D866.5040906@mxc.ca> Devang Patel wrote: > Author: dpatel > Date: Tue Sep 20 13:05:45 2011 > New Revision: 140156 > > URL: http://llvm.org/viewvc/llvm-project?rev=140156&view=rev > Log: > Update comment. > > Modified: > llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp > > Modified: llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp?rev=140156&r1=140155&r2=140156&view=diff > ============================================================================== > --- llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp (original) > +++ llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp Tue Sep 20 13:05:45 2011 > @@ -158,8 +158,7 @@ > class GCOVBlock; > > // Constructed only by requesting it from a GCOVBlock, this object stores a > - // list of line numbers and a single filename, representing lines that belong > - // to the block. > + // list of line numbers representing lines that belong to the block. How about "... list of line numbers within a single source file that belong to a block." ? As written, this sounds like a GCOVLines stores all the lines for a given GCOVBlock. Nick > class GCOVLines : public GCOVRecord { > public: > void addLine(uint32_t Line) { > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > From echristo at apple.com Tue Sep 20 13:16:08 2011 From: echristo at apple.com (Eric Christopher) Date: Tue, 20 Sep 2011 11:16:08 -0700 Subject: [llvm-commits] [llvm] r140132 - in /llvm/trunk: include/llvm/CompilerDriver/ lib/CompilerDriver/ test/CodeGen/X86/SIMD/ test/LLVMC/ tools/llvm2cpp/ tools/llvmc/ In-Reply-To: <20110920024654.F15422A6C12C@llvm.org> References: <20110920024654.F15422A6C12C@llvm.org> Message-ID: <6CBA8A47-BA17-4350-B495-9F9AA739FDE4@apple.com> On Sep 19, 2011, at 7:46 PM, Benjamin Kramer wrote: > Author: d0k > Date: Mon Sep 19 21:46:54 2011 > New Revision: 140132 > > URL: http://llvm.org/viewvc/llvm-project?rev=140132&view=rev > Log: > Remove empty directories. > > Removed: > llvm/trunk/include/llvm/CompilerDriver/ > llvm/trunk/lib/CompilerDriver/ > llvm/trunk/test/CodeGen/X86/SIMD/ > llvm/trunk/test/LLVMC/ > llvm/trunk/tools/llvm2cpp/ > llvm/trunk/tools/llvmc/ > Thanks! I guess git rm -r doesn't actually prune directories. -eric From evan.cheng at apple.com Tue Sep 20 13:16:20 2011 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 20 Sep 2011 11:16:20 -0700 Subject: [llvm-commits] [llvm] r140153 - in /llvm/trunk/tools/llvm-objdump: MCFunction.cpp MCFunction.h MachODump.cpp In-Reply-To: <20110920175301.9720D2A6C12C@llvm.org> References: <20110920175301.9720D2A6C12C@llvm.org> Message-ID: Thanks. Next request. Shouldn't MCFunction live in lib/MC? Evan On Sep 20, 2011, at 10:53 AM, Benjamin Kramer wrote: > Author: d0k > Date: Tue Sep 20 12:53:01 2011 > New Revision: 140153 > > URL: http://llvm.org/viewvc/llvm-project?rev=140153&view=rev > Log: > llvm-objdump: factor code better, add comments. > > Modified: > llvm/trunk/tools/llvm-objdump/MCFunction.cpp > llvm/trunk/tools/llvm-objdump/MCFunction.h > llvm/trunk/tools/llvm-objdump/MachODump.cpp > > Modified: llvm/trunk/tools/llvm-objdump/MCFunction.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-objdump/MCFunction.cpp?rev=140153&r1=140152&r2=140153&view=diff > ============================================================================== > --- llvm/trunk/tools/llvm-objdump/MCFunction.cpp (original) > +++ llvm/trunk/tools/llvm-objdump/MCFunction.cpp Tue Sep 20 12:53:01 2011 > @@ -47,44 +47,39 @@ > while (!WorkList.empty()) { > uint64_t Index = WorkList.pop_back_val(); > if (VisitedInsts.find(Index) != VisitedInsts.end()) > - continue; > + continue; // Already visited this location. > > for (;Index < End; Index += Size) { > - MCInst Inst; > + VisitedInsts.insert(Index); > > + MCInst Inst; > if (DisAsm->getInstruction(Inst, Size, Region, Index, DebugOut, nulls())){ > + Instructions.push_back(MCDecodedInst(Index, Size, Inst)); > if (Ana->isBranch(Inst)) { > uint64_t targ = Ana->evaluateBranch(Inst, Index, Size); > - if (targ != -1ULL && targ == Index+Size) { > - Instructions.push_back(MCDecodedInst(Index, Size, Inst)); > - VisitedInsts.insert(Index); > - continue; > - } > + if (targ != -1ULL && targ == Index+Size) > + continue; // Skip nop jumps. > + > + // If we could determine the branch target, make a note to start a > + // new basic block there and add the target to the worklist. > if (targ != -1ULL) { > Splits.insert(targ); > WorkList.push_back(targ); > WorkList.push_back(Index+Size); > } > Splits.insert(Index+Size); > - Instructions.push_back(MCDecodedInst(Index, Size, Inst)); > - VisitedInsts.insert(Index); > break; > } else if (Ana->isReturn(Inst)) { > + // Return instruction. This basic block ends here. > Splits.insert(Index+Size); > - Instructions.push_back(MCDecodedInst(Index, Size, Inst)); > - VisitedInsts.insert(Index); > break; > } else if (Ana->isCall(Inst)) { > uint64_t targ = Ana->evaluateBranch(Inst, Index, Size); > - if (targ != -1ULL && targ != Index+Size) { > + // Add the call to the call list if the destination is known. > + if (targ != -1ULL && targ != Index+Size) > Calls.push_back(targ); > - } > } > - > - Instructions.push_back(MCDecodedInst(Index, Size, Inst)); > - VisitedInsts.insert(Index); > } else { > - VisitedInsts.insert(Index); > errs().write_hex(Index) << ": warning: invalid instruction encoding\n"; > if (Size == 0) > Size = 1; // skip illegible bytes > @@ -93,9 +88,10 @@ > } > } > > + // Make sure the instruction list is sorted. > std::sort(Instructions.begin(), Instructions.end()); > > - // Create basic blocks. > + // Create basic blocks. > unsigned ii = 0, ie = Instructions.size(); > for (std::set::iterator spi = Splits.begin(), > spe = llvm::prior(Splits.end()); spi != spe; ++spi) { > @@ -115,7 +111,7 @@ > > // Calculate successors of each block. > for (MCFunction::iterator i = f.begin(), e = f.end(); i != e; ++i) { > - MCBasicBlock &BB = i->second; > + MCBasicBlock &BB = const_cast(i->second); > if (BB.getInsts().empty()) continue; > const MCDecodedInst &Inst = BB.getInsts().back(); > > > Modified: llvm/trunk/tools/llvm-objdump/MCFunction.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-objdump/MCFunction.h?rev=140153&r1=140152&r2=140153&view=diff > ============================================================================== > --- llvm/trunk/tools/llvm-objdump/MCFunction.h (original) > +++ llvm/trunk/tools/llvm-objdump/MCFunction.h Tue Sep 20 12:53:01 2011 > @@ -83,9 +83,9 @@ > const MCInstrAnalysis *Ana, raw_ostream &DebugOut, > SmallVectorImpl &Calls); > > - typedef MapTy::iterator iterator; > - iterator begin() { return Blocks.begin(); } > - iterator end() { return Blocks.end(); } > + typedef MapTy::const_iterator iterator; > + iterator begin() const { return Blocks.begin(); } > + iterator end() const { return Blocks.end(); } > > StringRef getName() const { return Name; } > > > Modified: llvm/trunk/tools/llvm-objdump/MachODump.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-objdump/MachODump.cpp?rev=140153&r1=140152&r2=140153&view=diff > ============================================================================== > --- llvm/trunk/tools/llvm-objdump/MachODump.cpp (original) > +++ llvm/trunk/tools/llvm-objdump/MachODump.cpp Tue Sep 20 12:53:01 2011 > @@ -94,6 +94,29 @@ > bool operator<(const Symbol &RHS) const { return Value < RHS.Value; } > }; > > + > +template > +static Section copySection(const T &Sect) { > + Section S; > + memcpy(S.Name, Sect->Name, 16); > + S.Address = Sect->Address; > + S.Size = Sect->Size; > + S.Offset = Sect->Offset; > + S.NumRelocs = Sect->NumRelocationTableEntries; > + S.RelocTableOffset = Sect->RelocationTableOffset; > + return S; > +} > + > +template > +static Symbol copySymbol(const T &STE) { > + Symbol S; > + S.StringIndex = STE->StringIndex; > + S.SectionIndex = STE->SectionIndex; > + S.Value = STE->Value; > + return S; > +} > + > +// Print addtitional information about an address, if available. > static void DumpAddress(uint64_t Address, ArrayRef
    Sections, > MachOObject *MachOObj, raw_ostream &OS) { > for (unsigned i = 0; i != Sections.size(); ++i) { > @@ -102,14 +125,86 @@ > Sections[i].Address + Sections[i].Size > Address) { > StringRef bytes = MachOObj->getData(Sections[i].Offset, > Sections[i].Size); > + // Print constant strings. > if (!strcmp(Sections[i].Name, "__cstring")) > OS << '"' << bytes.substr(addr, bytes.find('\0', addr)) << '"'; > + // Print constant CFStrings. > if (!strcmp(Sections[i].Name, "__cfstring")) > OS << "@\"" << bytes.substr(addr, bytes.find('\0', addr)) << '"'; > } > } > } > > +typedef std::map FunctionMapTy; > +typedef SmallVector FunctionListTy; > +static void createMCFunctionAndSaveCalls(StringRef Name, > + const MCDisassembler *DisAsm, > + MemoryObject &Object, uint64_t Start, > + uint64_t End, > + MCInstrAnalysis *InstrAnalysis, > + uint64_t Address, > + raw_ostream &DebugOut, > + FunctionMapTy &FunctionMap, > + FunctionListTy &Functions) { > + SmallVector Calls; > + MCFunction f = > + MCFunction::createFunctionFromMC(Name, DisAsm, Object, Start, End, > + InstrAnalysis, DebugOut, Calls); > + Functions.push_back(f); > + FunctionMap[Address] = &Functions.back(); > + > + // Add the gathered callees to the map. > + for (unsigned i = 0, e = Calls.size(); i != e; ++i) > + FunctionMap.insert(std::make_pair(Calls[i], (MCFunction*)0)); > +} > + > +// Write a graphviz file for the CFG inside an MCFunction. > +static void emitDOTFile(const char *FileName, const MCFunction &f, > + MCInstPrinter *IP) { > + // Start a new dot file. > + std::string Error; > + raw_fd_ostream Out(FileName, Error); > + if (!Error.empty()) { > + errs() << "llvm-objdump: warning: " << Error << '\n'; > + return; > + } > + > + Out << "digraph " << f.getName() << " {\n"; > + Out << "graph [ rankdir = \"LR\" ];\n"; > + for (MCFunction::iterator i = f.begin(), e = f.end(); i != e; ++i) { > + bool hasPreds = false; > + // Only print blocks that have predecessors. > + // FIXME: Slow. > + for (MCFunction::iterator pi = f.begin(), pe = f.end(); pi != pe; > + ++pi) > + if (pi->second.contains(i->first)) { > + hasPreds = true; > + break; > + } > + > + if (!hasPreds && i != f.begin()) > + continue; > + > + Out << '"' << i->first << "\" [ label=\""; > + // Print instructions. > + for (unsigned ii = 0, ie = i->second.getInsts().size(); ii != ie; > + ++ii) { > + // Escape special chars and print the instruction in mnemonic form. > + std::string Str; > + raw_string_ostream OS(Str); > + IP->printInst(&i->second.getInsts()[ii].Inst, OS, ""); > + Out << DOT::EscapeString(OS.str()) << '|'; > + } > + Out << "\" shape=\"record\" ];\n"; > + > + // Add edges. > + for (MCBasicBlock::succ_iterator si = i->second.succ_begin(), > + se = i->second.succ_end(); si != se; ++si) > + Out << i->first << ":o -> " << *si <<":a\n"; > + } > + Out << "}\n"; > +} > + > void llvm::DisassembleInputMachO(StringRef Filename) { > OwningPtr Buff; > > @@ -131,44 +226,28 @@ > > // Set up disassembler. > OwningPtr AsmInfo(TheTarget->createMCAsmInfo(TripleName)); > - > - if (!AsmInfo) { > - errs() << "error: no assembly info for target " << TripleName << "\n"; > - return; > - } > - > OwningPtr > STI(TheTarget->createMCSubtargetInfo(TripleName, "", "")); > - > - if (!STI) { > - errs() << "error: no subtarget info for target " << TripleName << "\n"; > - return; > - } > - > OwningPtr DisAsm(TheTarget->createMCDisassembler(*STI)); > - if (!DisAsm) { > - errs() << "error: no disassembler for target " << TripleName << "\n"; > - return; > - } > - > int AsmPrinterVariant = AsmInfo->getAssemblerDialect(); > OwningPtr IP(TheTarget->createMCInstPrinter( > - AsmPrinterVariant, *AsmInfo, *STI)); > - if (!IP) { > - errs() << "error: no instruction printer for target " << TripleName << '\n'; > + AsmPrinterVariant, *AsmInfo, *STI)); > + > + if (!InstrAnalysis || !AsmInfo || !STI || !DisAsm || !IP) { > + errs() << "error: couldn't initialize disassmbler for target " > + << TripleName << '\n'; > return; > } > > - outs() << '\n'; > - outs() << Filename << ":\n\n"; > + outs() << '\n' << Filename << ":\n\n"; > > const macho::Header &Header = MachOObj->getHeader(); > > const MachOObject::LoadCommandInfo *SymtabLCI = 0; > + // First, find the symbol table segment. > for (unsigned i = 0; i != Header.NumLoadCommands; ++i) { > const MachOObject::LoadCommandInfo &LCI = MachOObj->getLoadCommandInfo(i); > - switch (LCI.Command.Type) { > - case macho::LCT_Symtab: > + if (LCI.Command.Type == macho::LCT_Symtab) { > SymtabLCI = &LCI; > break; > } > @@ -184,34 +263,24 @@ > std::vector UnsortedSymbols; // FIXME: duplication > SmallVector FoundFns; > > + // Make a list of all symbols in the object file. > for (unsigned i = 0; i != Header.NumLoadCommands; ++i) { > const MachOObject::LoadCommandInfo &LCI = MachOObj->getLoadCommandInfo(i); > if (LCI.Command.Type == macho::LCT_Segment) { > InMemoryStruct SegmentLC; > MachOObj->ReadSegmentLoadCommand(LCI, SegmentLC); > > + // Store the sections in this segment. > for (unsigned SectNum = 0; SectNum != SegmentLC->NumSections; ++SectNum) { > InMemoryStruct Sect; > MachOObj->ReadSection(LCI, SectNum, Sect); > + Sections.push_back(copySection(Sect)); > > - Section S; > - memcpy(S.Name, Sect->Name, 16); > - S.Address = Sect->Address; > - S.Size = Sect->Size; > - S.Offset = Sect->Offset; > - S.NumRelocs = Sect->NumRelocationTableEntries; > - S.RelocTableOffset = Sect->RelocationTableOffset; > - Sections.push_back(S); > - > + // Store the symbols in this section. > for (unsigned i = 0; i != SymtabLC->NumSymbolTableEntries; ++i) { > InMemoryStruct STE; > MachOObj->ReadSymbolTableEntry(SymtabLC->SymbolTableOffset, i, STE); > - > - Symbol S; > - S.StringIndex = STE->StringIndex; > - S.SectionIndex = STE->SectionIndex; > - S.Value = STE->Value; > - Symbols.push_back(S); > + Symbols.push_back(copySymbol(STE)); > UnsortedSymbols.push_back(Symbols.back()); > } > } > @@ -219,32 +288,24 @@ > InMemoryStruct Segment64LC; > MachOObj->ReadSegment64LoadCommand(LCI, Segment64LC); > > - for (unsigned SectNum = 0; SectNum != Segment64LC->NumSections; ++SectNum) { > + // Store the sections in this segment. > + for (unsigned SectNum = 0; SectNum != Segment64LC->NumSections; > + ++SectNum) { > InMemoryStruct Sect64; > MachOObj->ReadSection64(LCI, SectNum, Sect64); > + Sections.push_back(copySection(Sect64)); > > - Section S; > - memcpy(S.Name, Sect64->Name, 16); > - S.Address = Sect64->Address; > - S.Size = Sect64->Size; > - S.Offset = Sect64->Offset; > - S.NumRelocs = Sect64->NumRelocationTableEntries; > - S.RelocTableOffset = Sect64->RelocationTableOffset; > - Sections.push_back(S); > - > + // Store the symbols in this section. > for (unsigned i = 0; i != SymtabLC->NumSymbolTableEntries; ++i) { > InMemoryStruct STE; > MachOObj->ReadSymbol64TableEntry(SymtabLC->SymbolTableOffset, i, STE); > - > - Symbol S; > - S.StringIndex = STE->StringIndex; > - S.SectionIndex = STE->SectionIndex; > - S.Value = STE->Value; > - Symbols.push_back(S); > + Symbols.push_back(copySymbol(STE)); > UnsortedSymbols.push_back(Symbols.back()); > } > } > } else if (LCI.Command.Type == macho::LCT_FunctionStarts) { > + // We found a function starts segment, parse the addresses for later > + // consumption. > InMemoryStruct LLC; > MachOObj->ReadLinkeditDataLoadCommand(LCI, LLC); > > @@ -252,7 +313,6 @@ > } > } > > - std::map FunctionMap; > > // Sort the symbols by address, just in case they didn't come in that way. > array_pod_sort(Symbols.begin(), Symbols.end()); > @@ -263,12 +323,14 @@ > raw_ostream &DebugOut = nulls(); > #endif > > - SmallVector Functions; > + FunctionMapTy FunctionMap; > + FunctionListTy Functions; > > for (unsigned SectIdx = 0; SectIdx != Sections.size(); SectIdx++) { > if (strcmp(Sections[SectIdx].Name, "__text")) > - continue; > + continue; // Skip non-text sections > > + // Insert the functions from the function starts segment into our map. > uint64_t VMAddr = Sections[SectIdx].Address - Sections[SectIdx].Offset; > for (unsigned i = 0, e = FoundFns.size(); i != e; ++i) > FunctionMap.insert(std::make_pair(FoundFns[i]+VMAddr, (MCFunction*)0)); > @@ -278,6 +340,7 @@ > StringRefMemoryObject memoryObject(Bytes); > bool symbolTableWorked = false; > > + // Parse relocations. > std::vector > Relocs; > for (unsigned j = 0; j != Sections[SectIdx].NumRelocs; ++j) { > InMemoryStruct RE; > @@ -286,11 +349,16 @@ > } > array_pod_sort(Relocs.begin(), Relocs.end()); > > + // Disassemble symbol by symbol. > for (unsigned SymIdx = 0; SymIdx != Symbols.size(); SymIdx++) { > + // Make sure the symbol is defined in this section. > if ((unsigned)Symbols[SymIdx].SectionIndex - 1 != SectIdx) > continue; > > + // Start at the address of the symbol relative to the section's address. > uint64_t Start = Symbols[SymIdx].Value - Sections[SectIdx].Address; > + // Stop disassembling either at the beginning of the next symbol or at > + // the end of the section. > uint64_t End = (SymIdx+1 == Symbols.size() || > Symbols[SymIdx].SectionIndex != Symbols[SymIdx+1].SectionIndex) ? > Sections[SectIdx].Size : > @@ -303,6 +371,7 @@ > symbolTableWorked = true; > > if (!CFG) { > + // Normal disassembly, print addresses, bytes and mnemonic form. > outs() << MachOObj->getStringAtIndex(Symbols[SymIdx].StringIndex) > << ":\n"; > for (uint64_t Index = Start; Index < End; Index += Size) { > @@ -322,42 +391,27 @@ > } > } else { > // Create CFG and use it for disassembly. > - SmallVector Calls; > - MCFunction f = > - MCFunction::createFunctionFromMC( > - MachOObj->getStringAtIndex(Symbols[SymIdx].StringIndex), > - DisAsm.get(), > - memoryObject, Start, End, > - InstrAnalysis.get(), DebugOut, > - Calls); > - > - Functions.push_back(f); > - FunctionMap[Start] = &Functions.back(); > - > - for (unsigned i = 0, e = Calls.size(); i != e; ++i) > - FunctionMap.insert(std::make_pair(Calls[i], (MCFunction*)0)); > + createMCFunctionAndSaveCalls( > + MachOObj->getStringAtIndex(Symbols[SymIdx].StringIndex), > + DisAsm.get(), memoryObject, Start, End, InstrAnalysis.get(), > + Start, DebugOut, FunctionMap, Functions); > } > } > > if (CFG) { > if (!symbolTableWorked) { > - // Create CFG and use it for disassembly. > - SmallVector Calls; > - MCFunction f = > - MCFunction::createFunctionFromMC("__TEXT", DisAsm.get(), > - memoryObject, 0, Sections[SectIdx].Size, > - InstrAnalysis.get(), DebugOut, > - Calls); > - > - Functions.push_back(f); > - FunctionMap[Sections[SectIdx].Offset] = &Functions.back(); > - > - for (unsigned i = 0, e = Calls.size(); i != e; ++i) > - FunctionMap.insert(std::make_pair(Calls[i], (MCFunction*)0)); > + // Reading the symbol table didn't work, create a big __TEXT symbol. > + createMCFunctionAndSaveCalls("__TEXT", DisAsm.get(), memoryObject, > + 0, Sections[SectIdx].Size, > + InstrAnalysis.get(), > + Sections[SectIdx].Offset, DebugOut, > + FunctionMap, Functions); > } > for (std::map::iterator mi = FunctionMap.begin(), > me = FunctionMap.end(); mi != me; ++mi) > if (mi->second == 0) { > + // Create functions for the remaining callees we have gathered, > + // but we didn't find a name for them. > SmallVector Calls; > MCFunction f = > MCFunction::createFunctionFromMC("unknown", DisAsm.get(), > @@ -367,10 +421,11 @@ > Calls); > Functions.push_back(f); > mi->second = &Functions.back(); > - for (unsigned i = 0, e = Calls.size(); i != e; ++i) > - if (FunctionMap.insert(std::make_pair(Calls[i], (MCFunction*)0)) > - .second) > + for (unsigned i = 0, e = Calls.size(); i != e; ++i) { > + std::pair p(Calls[i], (MCFunction*)0); > + if (FunctionMap.insert(p).second) > mi = FunctionMap.begin(); > + } > } > > DenseSet PrintedBlocks; > @@ -378,10 +433,13 @@ > MCFunction &f = Functions[ffi]; > for (MCFunction::iterator fi = f.begin(), fe = f.end(); fi != fe; ++fi){ > if (!PrintedBlocks.insert(fi->first).second) > - continue; > + continue; // We already printed this block. > + > + // We assume a block has predecessors when it's the first block after > + // a symbol. > bool hasPreds = FunctionMap.find(fi->first) != FunctionMap.end(); > > - // Only print blocks that have predecessors. > + // See if this block has predecessors. > // FIXME: Slow. > for (MCFunction::iterator pi = f.begin(), pe = f.end(); pi != pe; > ++pi) > @@ -390,8 +448,8 @@ > break; > } > > - // Data block. > - if (!hasPreds && fi != f.begin()) { > + // No predecessors, this is a data block. Print as .byte directives. > + if (!hasPreds) { > uint64_t End = llvm::next(fi) == fe ? Sections[SectIdx].Size : > llvm::next(fi)->first; > outs() << "# " << End-fi->first << " bytes of data:\n"; > @@ -403,23 +461,31 @@ > continue; > } > > - if (fi->second.contains(fi->first)) > + if (fi->second.contains(fi->first)) // Print a header for simple loops > outs() << "# Loop begin:\n"; > > + // Walk over the instructions and print them. > for (unsigned ii = 0, ie = fi->second.getInsts().size(); ii != ie; > ++ii) { > const MCDecodedInst &Inst = fi->second.getInsts()[ii]; > + > + // If there's a symbol at this address, print its name. > if (FunctionMap.find(Sections[SectIdx].Address + Inst.Address) != > FunctionMap.end()) > outs() << FunctionMap[Sections[SectIdx].Address + Inst.Address]-> > getName() << ":\n"; > + > outs() << format("%8llx:\t", Sections[SectIdx].Address + > Inst.Address); > DumpBytes(StringRef(Bytes.data() + Inst.Address, Inst.Size)); > - // Simple loops. > - if (fi->second.contains(fi->first)) > + > + if (fi->second.contains(fi->first)) // Indent simple loops. > outs() << '\t'; > + > IP->printInst(&Inst.Inst, outs(), ""); > + > + // Look for relocations inside this instructions, if there is one > + // print its target and additional information if availbable. > for (unsigned j = 0; j != Relocs.size(); ++j) > if (Relocs[j].first >= Sections[SectIdx].Address + Inst.Address && > Relocs[j].first < Sections[SectIdx].Address + Inst.Address + > @@ -431,6 +497,9 @@ > DumpAddress(UnsortedSymbols[Relocs[j].second].Value, Sections, > MachOObj.get(), outs()); > } > + > + // If this instructions contains an address, see if we can evaluate > + // it and print additional information. > uint64_t targ = InstrAnalysis->evaluateBranch(Inst.Inst, > Inst.Address, > Inst.Size); > @@ -441,48 +510,7 @@ > } > } > > - // Start a new dot file. > - std::string Error; > - raw_fd_ostream Out((f.getName().str() + ".dot").c_str(), Error); > - if (!Error.empty()) { > - errs() << "llvm-objdump: warning: " << Error << '\n'; > - continue; > - } > - > - Out << "digraph " << f.getName() << " {\n"; > - Out << "graph [ rankdir = \"LR\" ];\n"; > - for (MCFunction::iterator i = f.begin(), e = f.end(); i != e; ++i) { > - bool hasPreds = false; > - // Only print blocks that have predecessors. > - // FIXME: Slow. > - for (MCFunction::iterator pi = f.begin(), pe = f.end(); pi != pe; > - ++pi) > - if (pi->second.contains(i->first)) { > - hasPreds = true; > - break; > - } > - > - if (!hasPreds && i != f.begin()) > - continue; > - > - Out << '"' << i->first << "\" [ label=\""; > - // Print instructions. > - for (unsigned ii = 0, ie = i->second.getInsts().size(); ii != ie; > - ++ii) { > - // Escape special chars and print the instruction in mnemonic form. > - std::string Str; > - raw_string_ostream OS(Str); > - IP->printInst(&i->second.getInsts()[ii].Inst, OS, ""); > - Out << DOT::EscapeString(OS.str()) << '|'; > - } > - Out << "\" shape=\"record\" ];\n"; > - > - // Add edges. > - for (MCBasicBlock::succ_iterator si = i->second.succ_begin(), > - se = i->second.succ_end(); si != se; ++si) > - Out << i->first << ":o -> " << *si <<":a\n"; > - } > - Out << "}\n"; > + emitDOTFile((f.getName().str() + ".dot").c_str(), f, IP.get()); > } > } > } > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From atrick at apple.com Tue Sep 20 13:22:32 2011 From: atrick at apple.com (Andrew Trick) Date: Tue, 20 Sep 2011 18:22:32 -0000 Subject: [llvm-commits] [llvm] r140160 - in /llvm/trunk: include/llvm/MC/MCInstrDesc.h lib/CodeGen/SelectionDAG/InstrEmitter.cpp lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/ARMInstrThumb2.td utils/TableGen/CodeGenInstruction.cpp utils/TableGen/CodeGenInstruction.h utils/TableGen/InstrInfoEmitter.cpp Message-ID: <20110920182232.3BCDE2A6C12C@llvm.org> Author: atrick Date: Tue Sep 20 13:22:31 2011 New Revision: 140160 URL: http://llvm.org/viewvc/llvm-project?rev=140160&view=rev Log: Restore hasPostISelHook tblgen flag. No functionality change. The hook makes it explicit which patterns require "special" handling. i.e. it self-documents tblgen deficiencies. I plan to add verification in ExpandISelPseudos and Thumb2SizeReduce to catch any missing hasPostISelHooks. Otherwise it's too fragile. Modified: llvm/trunk/include/llvm/MC/MCInstrDesc.h llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp llvm/trunk/lib/Target/ARM/ARMInstrInfo.td llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td llvm/trunk/utils/TableGen/CodeGenInstruction.cpp llvm/trunk/utils/TableGen/CodeGenInstruction.h llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp Modified: llvm/trunk/include/llvm/MC/MCInstrDesc.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCInstrDesc.h?rev=140160&r1=140159&r2=140160&view=diff ============================================================================== --- llvm/trunk/include/llvm/MC/MCInstrDesc.h (original) +++ llvm/trunk/include/llvm/MC/MCInstrDesc.h Tue Sep 20 13:22:31 2011 @@ -477,6 +477,14 @@ return Flags & (1 << MCID::UsesCustomInserter); } + /// hasPostISelHook - Return true if this instruction requires *adjustment* + /// after instruction selection by calling a target hook. For example, this + /// can be used to fill in ARM 's' optional operand depending on whether + /// the conditional flag register is used. + bool hasPostISelHook() const { + return Flags & (1 << MCID::HasPostISelHook); + } + /// isRematerializable - Returns true if this instruction is a candidate for /// remat. This flag is deprecated, please don't use it anymore. If this /// flag is set, the isReallyTriviallyReMaterializable() method is called to Modified: llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp?rev=140160&r1=140159&r2=140160&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp Tue Sep 20 13:22:31 2011 @@ -763,7 +763,8 @@ } // Run post-isel target hook to adjust this instruction if needed. - TLI->AdjustInstrPostInstrSelection(MI, Node); + if (II.hasPostISelHook()) + TLI->AdjustInstrPostInstrSelection(MI, Node); } /// EmitSpecialNode - Generate machine code for a target-independent node and Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=140160&r1=140159&r2=140160&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Tue Sep 20 13:22:31 2011 @@ -179,7 +179,12 @@ void TargetLowering::AdjustInstrPostInstrSelection(MachineInstr *MI, SDNode *Node) const { - // Do nothing unless the target overrides it. +#ifndef NDEBUG + dbgs() << "If a target marks an instruction with " + "'hasPostISelHook', it must implement " + "TargetLowering::AdjustInstrPostInstrSelection!"; +#endif + llvm_unreachable(0); } //===----------------------------------------------------------------------===// Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=140160&r1=140159&r2=140160&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Tue Sep 20 13:22:31 2011 @@ -1026,7 +1026,7 @@ } /// AsI1_rbin_s_is - Same as AsI1_rbin_s_is except it sets 's' bit by default. -let isCodeGenOnly = 1, Defs = [CPSR] in { +let hasPostISelHook = 1, isCodeGenOnly = 1, Defs = [CPSR] in { multiclass AsI1_rbin_s_is opcod, string opc, InstrItinClass iii, InstrItinClass iir, InstrItinClass iis, PatFrag opnode, bit Commutable = 0> { @@ -1090,7 +1090,7 @@ } /// AsI1_bin_s_irs - Same as AsI1_bin_irs except it sets the 's' bit by default. -let isCodeGenOnly = 1, Defs = [CPSR] in { +let hasPostISelHook = 1, isCodeGenOnly = 1, Defs = [CPSR] in { multiclass AsI1_bin_s_irs opcod, string opc, InstrItinClass iii, InstrItinClass iir, InstrItinClass iis, PatFrag opnode, bit Commutable = 0> { @@ -1278,7 +1278,7 @@ /// AI1_adde_sube_irs - Define instructions and patterns for adde and sube. multiclass AI1_adde_sube_irs opcod, string opc, PatFrag opnode, string baseOpc, bit Commutable = 0> { - let Defs = [CPSR], Uses = [CPSR] in { + let hasPostISelHook = 1, Defs = [CPSR], Uses = [CPSR] in { def ri : AsI1, @@ -1366,7 +1366,7 @@ /// AI1_rsc_irs - Define instructions and patterns for rsc multiclass AI1_rsc_irs opcod, string opc, PatFrag opnode, string baseOpc> { - let Defs = [CPSR], Uses = [CPSR] in { + let hasPostISelHook = 1, Defs = [CPSR], Uses = [CPSR] in { def ri : AsI1, Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=140160&r1=140159&r2=140160&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Tue Sep 20 13:22:31 2011 @@ -592,7 +592,7 @@ /// T2I_bin_s_irs - Similar to T2I_bin_irs except it sets the 's' bit so the /// instruction modifies the CPSR register. -let isCodeGenOnly = 1, Defs = [CPSR] in { +let hasPostISelHook = 1, isCodeGenOnly = 1, Defs = [CPSR] in { multiclass T2I_bin_s_irs opcod, string opc, InstrItinClass iii, InstrItinClass iir, InstrItinClass iis, PatFrag opnode, bit Commutable = 0> { @@ -738,7 +738,7 @@ /// T2I_rbin_s_is - Same as T2I_rbin_irs except sets 's' bit and the register /// version is not needed since this is only for codegen. -let isCodeGenOnly = 1, Defs = [CPSR] in { +let hasPostISelHook = 1, isCodeGenOnly = 1, Defs = [CPSR] in { multiclass T2I_rbin_s_is opcod, string opc, PatFrag opnode> { // shifted imm def ri : T2sTwoRegImm< @@ -1846,10 +1846,12 @@ IIC_iALUi, IIC_iALUr, IIC_iALUsi, BinOpFrag<(ARMsubc node:$LHS, node:$RHS)>>; +let hasPostISelHook = 1 in { defm t2ADC : T2I_adde_sube_irs<0b1010, "adc", BinOpWithFlagFrag<(ARMadde node:$LHS, node:$RHS, node:$FLAG)>, 1>; defm t2SBC : T2I_adde_sube_irs<0b1011, "sbc", BinOpWithFlagFrag<(ARMsube node:$LHS, node:$RHS, node:$FLAG)>>; +} // RSB defm t2RSB : T2I_rbin_irs <0b1110, "rsb", Modified: llvm/trunk/utils/TableGen/CodeGenInstruction.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenInstruction.cpp?rev=140160&r1=140159&r2=140160&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/CodeGenInstruction.cpp (original) +++ llvm/trunk/utils/TableGen/CodeGenInstruction.cpp Tue Sep 20 13:22:31 2011 @@ -309,6 +309,7 @@ isReMaterializable = R->getValueAsBit("isReMaterializable"); hasDelaySlot = R->getValueAsBit("hasDelaySlot"); usesCustomInserter = R->getValueAsBit("usesCustomInserter"); + hasPostISelHook = R->getValueAsBit("hasPostISelHook"); hasCtrlDep = R->getValueAsBit("hasCtrlDep"); isNotDuplicable = R->getValueAsBit("isNotDuplicable"); hasSideEffects = R->getValueAsBit("hasSideEffects"); Modified: llvm/trunk/utils/TableGen/CodeGenInstruction.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenInstruction.h?rev=140160&r1=140159&r2=140160&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/CodeGenInstruction.h (original) +++ llvm/trunk/utils/TableGen/CodeGenInstruction.h Tue Sep 20 13:22:31 2011 @@ -233,6 +233,7 @@ bool isReMaterializable; bool hasDelaySlot; bool usesCustomInserter; + bool hasPostISelHook; bool hasCtrlDep; bool isNotDuplicable; bool hasSideEffects; Modified: llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp?rev=140160&r1=140159&r2=140160&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp Tue Sep 20 13:22:31 2011 @@ -288,6 +288,7 @@ if (Inst.isNotDuplicable) OS << "|(1< Author: void Date: Tue Sep 20 13:24:04 2011 New Revision: 140163 URL: http://llvm.org/viewvc/llvm-project?rev=140163&view=rev Log: Remove mention of llvm-gcc and llvm-g++. -Ministry of Truth Modified: llvm/trunk/docs/CommandGuide/index.html Modified: llvm/trunk/docs/CommandGuide/index.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CommandGuide/index.html?rev=140163&r1=140162&r2=140163&view=diff ============================================================================== --- llvm/trunk/docs/CommandGuide/index.html (original) +++ llvm/trunk/docs/CommandGuide/index.html Tue Sep 20 13:24:04 2011 @@ -78,25 +78,6 @@

    - C and C++ Front-end Commands -

    - - -
    -
      - -
    • llvm-gcc - - GCC-based C front-end for LLVM - -
    • llvm-g++ - - GCC-based C++ front-end for LLVM
      • - -
    - -
    - - -

    Debugging Tools

    From isanbard at gmail.com Tue Sep 20 13:24:46 2011 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 20 Sep 2011 18:24:46 -0000 Subject: [llvm-commits] [llvm] r140164 - /llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp Message-ID: <20110920182446.C22A22A6C12C@llvm.org> Author: void Date: Tue Sep 20 13:24:46 2011 New Revision: 140164 URL: http://llvm.org/viewvc/llvm-project?rev=140164&view=rev Log: Fix comments. Modified: llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp Modified: llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp?rev=140164&r1=140163&r2=140164&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp Tue Sep 20 13:24:46 2011 @@ -770,8 +770,8 @@ } -/// ExtractCodeRegion - slurp a sequence of basic blocks into a brand new -/// function +/// ExtractCodeRegion - Slurp a sequence of basic blocks into a brand new +/// function. /// Function* llvm::ExtractCodeRegion(DominatorTree &DT, const std::vector &code, @@ -779,13 +779,13 @@ return CodeExtractor(&DT, AggregateArgs).ExtractCodeRegion(code); } -/// ExtractBasicBlock - slurp a natural loop into a brand new function +/// ExtractLoop - Slurp a natural loop into a brand new function. /// Function* llvm::ExtractLoop(DominatorTree &DT, Loop *L, bool AggregateArgs) { return CodeExtractor(&DT, AggregateArgs).ExtractCodeRegion(L->getBlocks()); } -/// ExtractBasicBlock - slurp a basic block into a brand new function +/// ExtractBasicBlock - Slurp a basic block into a brand new function. /// Function* llvm::ExtractBasicBlock(BasicBlock *BB, bool AggregateArgs) { std::vector Blocks; From benny.kra at googlemail.com Tue Sep 20 13:31:29 2011 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Tue, 20 Sep 2011 11:31:29 -0700 Subject: [llvm-commits] [llvm] r140132 - in /llvm/trunk: include/llvm/CompilerDriver/ lib/CompilerDriver/ test/CodeGen/X86/SIMD/ test/LLVMC/ tools/llvm2cpp/ tools/llvmc/ In-Reply-To: <6CBA8A47-BA17-4350-B495-9F9AA739FDE4@apple.com> References: <20110920024654.F15422A6C12C@llvm.org> <6CBA8A47-BA17-4350-B495-9F9AA739FDE4@apple.com> Message-ID: On Tue, Sep 20, 2011 at 11:16, Eric Christopher wrote: > > On Sep 19, 2011, at 7:46 PM, Benjamin Kramer wrote: > >> Author: d0k >> Date: Mon Sep 19 21:46:54 2011 >> New Revision: 140132 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=140132&view=rev >> Log: >> Remove empty directories. >> >> Removed: >> ? ?llvm/trunk/include/llvm/CompilerDriver/ >> ? ?llvm/trunk/lib/CompilerDriver/ >> ? ?llvm/trunk/test/CodeGen/X86/SIMD/ >> ? ?llvm/trunk/test/LLVMC/ >> ? ?llvm/trunk/tools/llvm2cpp/ >> ? ?llvm/trunk/tools/llvmc/ >> > > Thanks! I guess git rm -r doesn't actually prune directories. git assumes empty directories don't exist, but svn keeps them. The git-svn bridge is lossy there. - Ben From benny.kra at googlemail.com Tue Sep 20 13:33:09 2011 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Tue, 20 Sep 2011 11:33:09 -0700 Subject: [llvm-commits] [llvm] r140158 - /llvm/trunk/lib/Support/APInt.cpp In-Reply-To: <20110920181152.8BA932A6C12C@llvm.org> References: <20110920181152.8BA932A6C12C@llvm.org> Message-ID: On Tue, Sep 20, 2011 at 11:11, Douglas Gregor wrote: > Author: dgregor > Date: Tue Sep 20 13:11:52 2011 > New Revision: 140158 > > URL: http://llvm.org/viewvc/llvm-project?rev=140158&view=rev > Log: > Eliminate sign-comparison warnings in APInt > > Modified: > ? ?llvm/trunk/lib/Support/APInt.cpp > > Modified: llvm/trunk/lib/Support/APInt.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/APInt.cpp?rev=140158&r1=140157&r2=140158&view=diff > ============================================================================== > --- llvm/trunk/lib/Support/APInt.cpp (original) > +++ llvm/trunk/lib/Support/APInt.cpp Tue Sep 20 13:11:52 2011 > @@ -54,12 +54,14 @@ > ? ? ? return r; > > ? ? r = cdigit - 'A'; > - ? ?if (r <= radix - 11U) > + ? ?if (r <= unsigned(radix - 11U)) > ? ? ? return r + 10; > > ? ? r = cdigit - 'a'; > - ? ?if (r <= radix - 11U) > + ? ?if (r <= unsigned(radix - 11U)) > ? ? ? return r + 10; > + > + ? ?radix = 10; > ? } I added the U suffixes that should have fixed those warnings already by making the whole expression unsigned. - Ben From dgregor at apple.com Tue Sep 20 13:34:30 2011 From: dgregor at apple.com (Douglas Gregor) Date: Tue, 20 Sep 2011 11:34:30 -0700 Subject: [llvm-commits] [llvm] r140158 - /llvm/trunk/lib/Support/APInt.cpp In-Reply-To: References: <20110920181152.8BA932A6C12C@llvm.org> Message-ID: <606DA069-E151-46C0-A95D-A47ECAF7932F@apple.com> On Sep 20, 2011, at 11:33 AM, Benjamin Kramer wrote: > On Tue, Sep 20, 2011 at 11:11, Douglas Gregor wrote: >> Author: dgregor >> Date: Tue Sep 20 13:11:52 2011 >> New Revision: 140158 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=140158&view=rev >> Log: >> Eliminate sign-comparison warnings in APInt >> >> Modified: >> llvm/trunk/lib/Support/APInt.cpp >> >> Modified: llvm/trunk/lib/Support/APInt.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/APInt.cpp?rev=140158&r1=140157&r2=140158&view=diff >> ============================================================================== >> --- llvm/trunk/lib/Support/APInt.cpp (original) >> +++ llvm/trunk/lib/Support/APInt.cpp Tue Sep 20 13:11:52 2011 >> @@ -54,12 +54,14 @@ >> return r; >> >> r = cdigit - 'A'; >> - if (r <= radix - 11U) >> + if (r <= unsigned(radix - 11U)) >> return r + 10; >> >> r = cdigit - 'a'; >> - if (r <= radix - 11U) >> + if (r <= unsigned(radix - 11U)) >> return r + 10; >> + >> + radix = 10; >> } > > I added the U suffixes that should have fixed those warnings already > by making the whole expression unsigned. ? and I didn't even notice them there. Backing out my silliness, sorry! - Doug From dgregor at apple.com Tue Sep 20 13:33:29 2011 From: dgregor at apple.com (Douglas Gregor) Date: Tue, 20 Sep 2011 18:33:29 -0000 Subject: [llvm-commits] [llvm] r140166 - /llvm/trunk/lib/Support/APInt.cpp Message-ID: <20110920183329.575632A6C12C@llvm.org> Author: dgregor Date: Tue Sep 20 13:33:29 2011 New Revision: 140166 URL: http://llvm.org/viewvc/llvm-project?rev=140166&view=rev Log: U is good enough Modified: llvm/trunk/lib/Support/APInt.cpp Modified: llvm/trunk/lib/Support/APInt.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/APInt.cpp?rev=140166&r1=140165&r2=140166&view=diff ============================================================================== --- llvm/trunk/lib/Support/APInt.cpp (original) +++ llvm/trunk/lib/Support/APInt.cpp Tue Sep 20 13:33:29 2011 @@ -54,11 +54,11 @@ return r; r = cdigit - 'A'; - if (r <= unsigned(radix - 11U)) + if (r <= radix - 11U) return r + 10; r = cdigit - 'a'; - if (r <= unsigned(radix - 11U)) + if (r <= radix - 11U) return r + 10; radix = 10; From dpatel at apple.com Tue Sep 20 13:35:00 2011 From: dpatel at apple.com (Devang Patel) Date: Tue, 20 Sep 2011 18:35:00 -0000 Subject: [llvm-commits] [llvm] r140167 - /llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp Message-ID: <20110920183500.ADB562A6C12C@llvm.org> Author: dpatel Date: Tue Sep 20 13:35:00 2011 New Revision: 140167 URL: http://llvm.org/viewvc/llvm-project?rev=140167&view=rev Log: Update GCOVLines to provide interfaces to write line table and calculate complete length. Modified: llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp Modified: llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp?rev=140167&r1=140166&r2=140167&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp (original) +++ llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp Tue Sep 20 13:35:00 2011 @@ -158,7 +158,8 @@ class GCOVBlock; // Constructed only by requesting it from a GCOVBlock, this object stores a - // list of line numbers representing lines that belong to the block. + // list of line numbers and a single filename, representing lines that belong + // to the block. class GCOVLines : public GCOVRecord { public: void addLine(uint32_t Line) { @@ -166,17 +167,25 @@ } uint32_t length() { - // FIXME: ??? What is the significance of 2 here ? - return 2 + Lines.size(); + // Here 2 = 1 for string lenght + 1 for '0' id#. + return lengthOfGCOVString(Filename) + 2 + Lines.size(); } + void writeOut() { + write(0); + writeGCOVString(Filename); + for (int i = 0, e = Lines.size(); i != e; ++i) + write(Lines[i]); + } private: friend class GCOVBlock; - GCOVLines(raw_ostream *os) { + GCOVLines(StringRef F, raw_ostream *os) + : Filename(F) { this->os = os; } + StringRef Filename; SmallVector Lines; }; @@ -188,7 +197,7 @@ GCOVLines &getFile(StringRef Filename) { GCOVLines *&Lines = LinesByFile[Filename]; if (!Lines) { - Lines = new GCOVLines(os); + Lines = new GCOVLines(Filename, os); } return *Lines; } @@ -201,20 +210,15 @@ uint32_t Len = 3; for (StringMap::iterator I = LinesByFile.begin(), E = LinesByFile.end(); I != E; ++I) { - Len = Len + lengthOfGCOVString(I->first()) + I->second->length(); + Len += I->second->length(); } writeBytes(LinesTag, 4); write(Len); write(Number); for (StringMap::iterator I = LinesByFile.begin(), - E = LinesByFile.end(); I != E; ++I) { - write(0); - writeGCOVString(I->first()); - for (int i = 0, e = I->second->Lines.size(); i != e; ++i) { - write(I->second->Lines[i]); - } - } + E = LinesByFile.end(); I != E; ++I) + I->second->writeOut(); write(0); write(0); } From dpatel at apple.com Tue Sep 20 13:38:21 2011 From: dpatel at apple.com (Devang Patel) Date: Tue, 20 Sep 2011 11:38:21 -0700 Subject: [llvm-commits] [llvm] r140151 - /llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp In-Reply-To: <4E78D6FC.4030701@mxc.ca> References: <20110920174314.821A22A6C12C@llvm.org> <4E78D6FC.4030701@mxc.ca> Message-ID: <4CE4C717-7ECF-4052-AA6A-3D1ABE7FA9E8@apple.com> On Sep 20, 2011, at 11:10 AM, Nick Lewycky wrote: > Devang Patel wrote: >> Author: dpatel >> Date: Tue Sep 20 12:43:14 2011 >> New Revision: 140151 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=140151&view=rev >> Log: >> Eliminate unnecessary copy of FileName from GCOVLines. >> GCOVLines is always accessed through a StringMap where the key is FileName. >> >> Modified: >> llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp >> >> Modified: llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp?rev=140151&r1=140150&r2=140151&view=diff >> ============================================================================== >> --- llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp (original) >> +++ llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp Tue Sep 20 12:43:14 2011 >> @@ -167,18 +167,17 @@ >> } >> >> uint32_t length() { >> - return lengthOfGCOVString(Filename) + 2 + Lines.size(); >> + // FIXME: ??? What is the significance of 2 here ? >> + return 2 + Lines.size(); > > This no longer computes the length() though. How about changing std::string Filename into a StringRef if you're concerned about copies? Alternatively, you could name it something like "getNumLines()" and hoist out the +2 as well. In that case I chose the alternate route and robustified GCOVLines in r140167. > Fundamentally, GCOVLines isn't just a list of lines, it's a list of lines attached to a particular filename, so I wanted it to contain all its own data. The +2 is 1 for string length plus 1 for the '0' line id# which means "the filename is" in GCOV format. Thanks, I updated the comments. - Devang From isanbard at gmail.com Tue Sep 20 13:42:07 2011 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 20 Sep 2011 18:42:07 -0000 Subject: [llvm-commits] [llvm] r140168 - /llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp Message-ID: <20110920184207.6CE8B2A6C12C@llvm.org> Author: void Date: Tue Sep 20 13:42:07 2011 New Revision: 140168 URL: http://llvm.org/viewvc/llvm-project?rev=140168&view=rev Log: Use ArrayRef instead of 'const std::vector' to pass around the list of basic blocks to extract. Modified: llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp Modified: llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp?rev=140168&r1=140167&r2=140168&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp Tue Sep 20 13:42:07 2011 @@ -55,9 +55,9 @@ CodeExtractor(DominatorTree* dt = 0, bool AggArgs = false) : DT(dt), AggregateArgs(AggArgs||AggregateArgsOpt), NumExitBlocks(~0U) {} - Function *ExtractCodeRegion(const std::vector &code); + Function *ExtractCodeRegion(ArrayRef code); - bool isEligible(const std::vector &code); + bool isEligible(ArrayRef code); private: /// definedInRegion - Return true if the specified value is defined in the @@ -654,7 +654,7 @@ /// computed result back into memory. /// Function *CodeExtractor:: -ExtractCodeRegion(const std::vector &code) { +ExtractCodeRegion(ArrayRef code) { if (!isEligible(code)) return 0; @@ -754,9 +754,13 @@ return newFunction; } -bool CodeExtractor::isEligible(const std::vector &code) { +bool CodeExtractor::isEligible(ArrayRef code) { + // Deny a single basic block that's a landing pad block. + if (code.size() == 1 && code[0]->isLandingPad()) + return false; + // Deny code region if it contains allocas or vastarts. - for (std::vector::const_iterator BB = code.begin(), e=code.end(); + for (ArrayRef::iterator BB = code.begin(), e=code.end(); BB != e; ++BB) for (BasicBlock::const_iterator I = (*BB)->begin(), Ie = (*BB)->end(); I != Ie; ++I) @@ -788,7 +792,5 @@ /// ExtractBasicBlock - Slurp a basic block into a brand new function. /// Function* llvm::ExtractBasicBlock(BasicBlock *BB, bool AggregateArgs) { - std::vector Blocks; - Blocks.push_back(BB); - return CodeExtractor(0, AggregateArgs).ExtractCodeRegion(Blocks); + return CodeExtractor(0, AggregateArgs).ExtractCodeRegion(BB); } From echristo at apple.com Tue Sep 20 13:44:57 2011 From: echristo at apple.com (Eric Christopher) Date: Tue, 20 Sep 2011 11:44:57 -0700 Subject: [llvm-commits] [llvm] r140132 - in /llvm/trunk: include/llvm/CompilerDriver/ lib/CompilerDriver/ test/CodeGen/X86/SIMD/ test/LLVMC/ tools/llvm2cpp/ tools/llvmc/ In-Reply-To: References: <20110920024654.F15422A6C12C@llvm.org> <6CBA8A47-BA17-4350-B495-9F9AA739FDE4@apple.com> Message-ID: On Sep 20, 2011, at 11:31 AM, Benjamin Kramer wrote: > On Tue, Sep 20, 2011 at 11:16, Eric Christopher wrote: >> >> On Sep 19, 2011, at 7:46 PM, Benjamin Kramer wrote: >> >>> Author: d0k >>> Date: Mon Sep 19 21:46:54 2011 >>> New Revision: 140132 >>> >>> URL: http://llvm.org/viewvc/llvm-project?rev=140132&view=rev >>> Log: >>> Remove empty directories. >>> >>> Removed: >>> llvm/trunk/include/llvm/CompilerDriver/ >>> llvm/trunk/lib/CompilerDriver/ >>> llvm/trunk/test/CodeGen/X86/SIMD/ >>> llvm/trunk/test/LLVMC/ >>> llvm/trunk/tools/llvm2cpp/ >>> llvm/trunk/tools/llvmc/ >>> >> >> Thanks! I guess git rm -r doesn't actually prune directories. > > git assumes empty directories don't exist, but svn keeps them. The > git-svn bridge is lossy there. aha. *makes note* Thanks! -eric From benny.kra at googlemail.com Tue Sep 20 13:49:36 2011 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Tue, 20 Sep 2011 11:49:36 -0700 Subject: [llvm-commits] [llvm] r140153 - in /llvm/trunk/tools/llvm-objdump: MCFunction.cpp MCFunction.h MachODump.cpp In-Reply-To: References: <20110920175301.9720D2A6C12C@llvm.org> Message-ID: On Tue, Sep 20, 2011 at 11:16, Evan Cheng wrote: > Thanks. Next request. Shouldn't MCFunction live in lib/MC? The reason it lives inside llvm-objdump is that I still consider this a prototype. There are no real "functions" at the machine code level, jumps can arbitrarily leave the current "function". There may be a better abstraction for this. I was also looking into representing the whole .text section as a big disassembled object and then adding labels to it, but this can become ugly if there's data inside the code that happens to match a (variable length) encoding of a real instruction. Then all the disassembly that follows that data section will become wrong and the CFG generation algorithm will be confused. - Ben From dpatel at apple.com Tue Sep 20 13:48:56 2011 From: dpatel at apple.com (Devang Patel) Date: Tue, 20 Sep 2011 18:48:56 -0000 Subject: [llvm-commits] [llvm] r140169 - /llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp Message-ID: <20110920184856.C89892A6C12C@llvm.org> Author: dpatel Date: Tue Sep 20 13:48:56 2011 New Revision: 140169 URL: http://llvm.org/viewvc/llvm-project?rev=140169&view=rev Log: If simple ownership works then friendship is not required. Modified: llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp Modified: llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp?rev=140169&r1=140168&r2=140169&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp (original) +++ llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp Tue Sep 20 13:48:56 2011 @@ -177,14 +177,13 @@ for (int i = 0, e = Lines.size(); i != e; ++i) write(Lines[i]); } - private: - friend class GCOVBlock; GCOVLines(StringRef F, raw_ostream *os) : Filename(F) { this->os = os; } + private: StringRef Filename; SmallVector Lines; }; From isanbard at gmail.com Tue Sep 20 14:05:04 2011 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 20 Sep 2011 19:05:04 -0000 Subject: [llvm-commits] [llvm] r140172 - in /llvm/trunk: include/llvm/Transforms/Utils/FunctionUtils.h lib/Transforms/Utils/CodeExtractor.cpp Message-ID: <20110920190504.65A642A6C12C@llvm.org> Author: void Date: Tue Sep 20 14:05:04 2011 New Revision: 140172 URL: http://llvm.org/viewvc/llvm-project?rev=140172&view=rev Log: Use ArrayRef instead of an explicit 'const std::vector &'. Modified: llvm/trunk/include/llvm/Transforms/Utils/FunctionUtils.h llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp Modified: llvm/trunk/include/llvm/Transforms/Utils/FunctionUtils.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Transforms/Utils/FunctionUtils.h?rev=140172&r1=140171&r2=140172&view=diff ============================================================================== --- llvm/trunk/include/llvm/Transforms/Utils/FunctionUtils.h (original) +++ llvm/trunk/include/llvm/Transforms/Utils/FunctionUtils.h Tue Sep 20 14:05:04 2011 @@ -14,6 +14,7 @@ #ifndef LLVM_TRANSFORMS_UTILS_FUNCTION_H #define LLVM_TRANSFORMS_UTILS_FUNCTION_H +#include "llvm/ADT/ArrayRef.h" #include namespace llvm { @@ -22,20 +23,23 @@ class Function; class Loop; - /// ExtractCodeRegion - rip out a sequence of basic blocks into a new function + /// ExtractCodeRegion - Rip out a sequence of basic blocks into a new + /// function. /// Function* ExtractCodeRegion(DominatorTree& DT, - const std::vector &code, + ArrayRef code, bool AggregateArgs = false); - /// ExtractLoop - rip out a natural loop into a new function + /// ExtractLoop - Rip out a natural loop into a new function. /// Function* ExtractLoop(DominatorTree& DT, Loop *L, bool AggregateArgs = false); - /// ExtractBasicBlock - rip out a basic block into a new function + /// ExtractBasicBlock - Rip out a basic block (and the associated landing pad) + /// into a new function. /// - Function* ExtractBasicBlock(BasicBlock *BB, bool AggregateArgs = false); + Function* ExtractBasicBlock(ArrayRef BBs, + bool AggregateArgs = false); } #endif Modified: llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp?rev=140172&r1=140171&r2=140172&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp Tue Sep 20 14:05:04 2011 @@ -778,7 +778,7 @@ /// function. /// Function* llvm::ExtractCodeRegion(DominatorTree &DT, - const std::vector &code, + ArrayRef code, bool AggregateArgs) { return CodeExtractor(&DT, AggregateArgs).ExtractCodeRegion(code); } @@ -791,6 +791,6 @@ /// ExtractBasicBlock - Slurp a basic block into a brand new function. /// -Function* llvm::ExtractBasicBlock(BasicBlock *BB, bool AggregateArgs) { - return CodeExtractor(0, AggregateArgs).ExtractCodeRegion(BB); +Function* llvm::ExtractBasicBlock(ArrayRef BBs, bool AggregateArgs){ + return CodeExtractor(0, AggregateArgs).ExtractCodeRegion(BBs); } From isanbard at gmail.com Tue Sep 20 14:10:24 2011 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 20 Sep 2011 19:10:24 -0000 Subject: [llvm-commits] [llvm] r140173 - /llvm/trunk/lib/Transforms/IPO/LoopExtractor.cpp Message-ID: <20110920191024.E17662A6C12C@llvm.org> Author: void Date: Tue Sep 20 14:10:24 2011 New Revision: 140173 URL: http://llvm.org/viewvc/llvm-project?rev=140173&view=rev Log: When extracting a basic block that ends in an 'invoke' instruction, we need to extract its associated landing pad block as well. However, that landing pad block may have more than one predecessor. So split the landing pad block so that individual landing pads have only one predecessor. This type of transformation may produce a false positive with bugpoint. Modified: llvm/trunk/lib/Transforms/IPO/LoopExtractor.cpp Modified: llvm/trunk/lib/Transforms/IPO/LoopExtractor.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/LoopExtractor.cpp?rev=140173&r1=140172&r2=140173&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/LoopExtractor.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/LoopExtractor.cpp Tue Sep 20 14:10:24 2011 @@ -23,6 +23,7 @@ #include "llvm/Analysis/LoopPass.h" #include "llvm/Support/CommandLine.h" #include "llvm/Transforms/Scalar.h" +#include "llvm/Transforms/Utils/BasicBlockUtils.h" #include "llvm/Transforms/Utils/FunctionUtils.h" #include "llvm/ADT/Statistic.h" #include @@ -53,12 +54,12 @@ char LoopExtractor::ID = 0; INITIALIZE_PASS_BEGIN(LoopExtractor, "loop-extract", - "Extract loops into new functions", false, false) + "Extract loops into new functions", false, false) INITIALIZE_PASS_DEPENDENCY(BreakCriticalEdges) INITIALIZE_PASS_DEPENDENCY(LoopSimplify) INITIALIZE_PASS_DEPENDENCY(DominatorTree) INITIALIZE_PASS_END(LoopExtractor, "loop-extract", - "Extract loops into new functions", false, false) + "Extract loops into new functions", false, false) namespace { /// SingleLoopExtractor - For bugpoint. @@ -149,6 +150,7 @@ /// BlocksToNotExtract list. class BlockExtractorPass : public ModulePass { void LoadFile(const char *Filename); + void SplitLandingPadPreds(Function *F); std::vector BlocksToNotExtract; std::vector > BlocksToNotExtractByName; @@ -171,8 +173,7 @@ // createBlockExtractorPass - This pass extracts all blocks (except those // specified in the argument list) from the functions in the module. // -ModulePass *llvm::createBlockExtractorPass() -{ +ModulePass *llvm::createBlockExtractorPass() { return new BlockExtractorPass(); } @@ -194,6 +195,37 @@ } } +/// SplitLandingPadPreds - The landing pad needs to be extracted with the invoke +/// instruction. The critical edge breaker will refuse to break critical edges +/// to a landing pad. So do them here. After this method runs, all landing pads +/// should have only one predecessor. +void BlockExtractorPass::SplitLandingPadPreds(Function *F) { + for (Function::iterator I = F->begin(), E = F->end(); I != E; ++I) { + InvokeInst *II = dyn_cast(I); + if (!II) continue; + BasicBlock *Parent = II->getParent(); + BasicBlock *LPad = II->getUnwindDest(); + + // Look through the landing pad's predecessors. If one of them ends in an + // 'invoke', then we want to split the landing pad. + bool Split = false; + for (pred_iterator + PI = pred_begin(LPad), PE = pred_end(LPad); PI != PE; ++PI) { + BasicBlock *BB = *PI; + if (BB->isLandingPad() && BB != Parent && + isa(Parent->getTerminator())) { + Split = true; + break; + } + } + + if (!Split) continue; + + SmallVector NewBBs; + SplitLandingPadPredecessors(LPad, Parent, ".1", ".2", 0, NewBBs); + } +} + bool BlockExtractorPass::runOnModule(Module &M) { std::set TranslatedBlocksToNotExtract; for (unsigned i = 0, e = BlocksToNotExtract.size(); i != e; ++i) { @@ -236,13 +268,20 @@ // Now that we know which blocks to not extract, figure out which ones we WANT // to extract. std::vector BlocksToExtract; - for (Module::iterator F = M.begin(), E = M.end(); F != E; ++F) + for (Module::iterator F = M.begin(), E = M.end(); F != E; ++F) { + SplitLandingPadPreds(&*F); for (Function::iterator BB = F->begin(), E = F->end(); BB != E; ++BB) if (!TranslatedBlocksToNotExtract.count(BB)) BlocksToExtract.push_back(BB); + } - for (unsigned i = 0, e = BlocksToExtract.size(); i != e; ++i) - ExtractBasicBlock(BlocksToExtract[i]); + for (unsigned i = 0, e = BlocksToExtract.size(); i != e; ++i) { + SmallVector BlocksToExtractVec; + BlocksToExtractVec.push_back(BlocksToExtract[i]); + if (const InvokeInst *II = dyn_cast(BlocksToExtract[i])) + BlocksToExtractVec.push_back(II->getUnwindDest()); + ExtractBasicBlock(BlocksToExtractVec); + } return !BlocksToExtract.empty(); } From isanbard at gmail.com Tue Sep 20 15:20:50 2011 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 20 Sep 2011 20:20:50 -0000 Subject: [llvm-commits] [llvm] r140176 - /llvm/trunk/lib/Transforms/IPO/LoopExtractor.cpp Message-ID: <20110920202050.47F4F2A6C12C@llvm.org> Author: void Date: Tue Sep 20 15:20:50 2011 New Revision: 140176 URL: http://llvm.org/viewvc/llvm-project?rev=140176&view=rev Log: Check the terminator, not the basic block. Modified: llvm/trunk/lib/Transforms/IPO/LoopExtractor.cpp Modified: llvm/trunk/lib/Transforms/IPO/LoopExtractor.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/LoopExtractor.cpp?rev=140176&r1=140175&r2=140176&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/LoopExtractor.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/LoopExtractor.cpp Tue Sep 20 15:20:50 2011 @@ -278,7 +278,8 @@ for (unsigned i = 0, e = BlocksToExtract.size(); i != e; ++i) { SmallVector BlocksToExtractVec; BlocksToExtractVec.push_back(BlocksToExtract[i]); - if (const InvokeInst *II = dyn_cast(BlocksToExtract[i])) + if (const InvokeInst *II = + dyn_cast(BlocksToExtract[i]->getTerminator())) BlocksToExtractVec.push_back(II->getUnwindDest()); ExtractBasicBlock(BlocksToExtractVec); } From isanbard at gmail.com Tue Sep 20 15:21:16 2011 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 20 Sep 2011 20:21:16 -0000 Subject: [llvm-commits] [llvm] r140177 - /llvm/trunk/test/Transforms/CodeExtractor/2004-11-12-InvokeExtract.ll Message-ID: <20110920202116.F349D2A6C12C@llvm.org> Author: void Date: Tue Sep 20 15:21:16 2011 New Revision: 140177 URL: http://llvm.org/viewvc/llvm-project?rev=140177&view=rev Log: Update to new EH model. Modified: llvm/trunk/test/Transforms/CodeExtractor/2004-11-12-InvokeExtract.ll Modified: llvm/trunk/test/Transforms/CodeExtractor/2004-11-12-InvokeExtract.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/CodeExtractor/2004-11-12-InvokeExtract.ll?rev=140177&r1=140176&r2=140177&view=diff ============================================================================== --- llvm/trunk/test/Transforms/CodeExtractor/2004-11-12-InvokeExtract.ll (original) +++ llvm/trunk/test/Transforms/CodeExtractor/2004-11-12-InvokeExtract.ll Tue Sep 20 15:21:16 2011 @@ -10,6 +10,9 @@ ret i32 %V Unw: ; preds = %EB - unwind + %exn = landingpad { i8*, i32 } personality i32 (...)* @__gcc_personality_v0 + catch i8* null + resume { i8*, i32 } %exn } +declare i32 @__gcc_personality_v0(...) From ahatanak at gmail.com Tue Sep 20 15:28:08 2011 From: ahatanak at gmail.com (Akira Hatanaka) Date: Tue, 20 Sep 2011 20:28:08 -0000 Subject: [llvm-commits] [llvm] r140178 - in /llvm/trunk/lib/Target/Mips: Mips.td MipsSubtarget.h Message-ID: <20110920202809.05AF92A6C12E@llvm.org> Author: ahatanak Date: Tue Sep 20 15:28:08 2011 New Revision: 140178 URL: http://llvm.org/viewvc/llvm-project?rev=140178&view=rev Log: Initial Mips64 support. Patch by Liu with some modifications. Modified: llvm/trunk/lib/Target/Mips/Mips.td llvm/trunk/lib/Target/Mips/MipsSubtarget.h Modified: llvm/trunk/lib/Target/Mips/Mips.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips.td?rev=140178&r1=140177&r2=140178&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/Mips.td (original) +++ llvm/trunk/lib/Target/Mips/Mips.td Tue Sep 20 15:28:08 2011 @@ -38,6 +38,10 @@ "true", "Only supports single precision float">; def FeatureO32 : SubtargetFeature<"o32", "MipsABI", "O32", "Enable o32 ABI">; +def FeatureN32 : SubtargetFeature<"n32", "MipsABI", "N32", + "Enable n32 ABI">; +def FeatureN64 : SubtargetFeature<"n64", "MipsABI", "N64", + "Enable n64 ABI">; def FeatureEABI : SubtargetFeature<"eabi", "MipsABI", "EABI", "Enable eabi ABI">; def FeatureVFPU : SubtargetFeature<"vfpu", "HasVFPU", @@ -60,6 +64,13 @@ def FeatureMips32r2 : SubtargetFeature<"mips32r2", "MipsArchVersion", "Mips32r2", "Mips32r2 ISA Support", [FeatureMips32, FeatureSEInReg]>; +def FeatureMips64 : SubtargetFeature<"mips64", "MipsArchVersion", + "Mips64", "Mips64 ISA Support", + [FeatureGP64Bit, FeatureFP64Bit, + FeatureMips32]>; +def FeatureMips64r2 : SubtargetFeature<"mips64r2", "MipsArchVersion", + "Mips64r2", "Mips64r2 ISA Support", + [FeatureMips64, FeatureMips32r2]>; //===----------------------------------------------------------------------===// // Mips processors supported. @@ -70,6 +81,8 @@ def : Proc<"mips32r1", [FeatureMips32]>; def : Proc<"4ke", [FeatureMips32r2]>; +def : Proc<"mips64r1", [FeatureMips64]>; +def : Proc<"mips64r2", [FeatureMips64r2]>; def MipsAsmWriter : AsmWriter { string AsmWriterClassName = "InstPrinter"; Modified: llvm/trunk/lib/Target/Mips/MipsSubtarget.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSubtarget.h?rev=140178&r1=140177&r2=140178&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsSubtarget.h (original) +++ llvm/trunk/lib/Target/Mips/MipsSubtarget.h Tue Sep 20 15:28:08 2011 @@ -35,7 +35,7 @@ protected: enum MipsArchEnum { - Mips32, Mips32r2 + Mips32, Mips32r2, Mips64, Mips64r2 }; // Mips architecture version @@ -91,6 +91,8 @@ /// Only O32 and EABI supported right now. bool isABI_EABI() const { return MipsABI == EABI; } + bool isABI_N64() const { return MipsABI == N64; } + bool isABI_N32() const { return MipsABI == N32; } bool isABI_O32() const { return MipsABI == O32; } unsigned getTargetABI() const { return MipsABI; } @@ -104,7 +106,10 @@ void ParseSubtargetFeatures(StringRef CPU, StringRef FS); bool isMips32() const { return MipsArchVersion >= Mips32; } - bool isMips32r2() const { return MipsArchVersion == Mips32r2; } + bool isMips32r2() const { return MipsArchVersion == Mips32r2 || + MipsArchVersion == Mips64r2; } + bool isMips64() const { return MipsArchVersion >= Mips64; } + bool isMips64r2() const { return MipsArchVersion == Mips64r2; } bool isLittle() const { return IsLittle; } bool isFP64bit() const { return IsFP64bit; } From bruno.cardoso at gmail.com Tue Sep 20 15:57:09 2011 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Tue, 20 Sep 2011 13:57:09 -0700 Subject: [llvm-commits] [llvm] r140178 - in /llvm/trunk/lib/Target/Mips: Mips.td MipsSubtarget.h In-Reply-To: <20110920202809.05AF92A6C12E@llvm.org> References: <20110920202809.05AF92A6C12E@llvm.org> Message-ID: Hi Akira, > ? bool isMips32() const { return MipsArchVersion >= Mips32; } > - ?bool isMips32r2() const { return MipsArchVersion == Mips32r2; } > + ?bool isMips32r2() const { return MipsArchVersion == Mips32r2 || > + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? MipsArchVersion == Mips64r2; } This seems a bit confusing, probably not the way to go. I think isMips32r2() should answer only for Mips32r2, if you want to check both, have a predicate like "isMipsRev2". Why you want isMips32r2() to answer for both? -- Bruno Cardoso Lopes http://www.brunocardoso.cc From eli.friedman at gmail.com Tue Sep 20 16:19:33 2011 From: eli.friedman at gmail.com (Eli Friedman) Date: Tue, 20 Sep 2011 14:19:33 -0700 Subject: [llvm-commits] [patch] fix PPC README typo In-Reply-To: References: Message-ID: On Tue, Sep 20, 2011 at 10:13 AM, Liu wrote: > Hi > > I find a PPC README typo and fixed it. That's not a typo. -Eli From echristo at apple.com Tue Sep 20 16:26:09 2011 From: echristo at apple.com (Eric Christopher) Date: Tue, 20 Sep 2011 14:26:09 -0700 Subject: [llvm-commits] [PATCH]llvm-ld: add support of deps with the specific version (like liblzma.so.1.0.0) In-Reply-To: References: Message-ID: <4E7D4172-EB25-49A7-AAAF-58A4EAE19526@apple.com> Just got to this, but couldn't review it because the chromium patch isn't up anymore. Could you resend if no one has gotten to this? On Aug 31, 2011, at 11:16 AM, Ivan Krasin wrote: > Friendly ping. > > On Mon, Aug 29, 2011 at 1:58 PM, Ivan Krasin wrote: >> Hi llvm team! >> >> This CL adds support of deps which does not end with ".so" to llvm-ld. >> It happens (for example) when you want to have a dependency on the .so >> with the specific version, like liblzma.so.1.0.0 or >> libcrypto.so.0.9.8. >> >> The patch is attached and is also available online: >> http://codereview.chromium.org/7793002/ >> >> Please, let me know if it's fine to commit. >> >> -- krasin >> > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From ahatanak at gmail.com Tue Sep 20 16:28:17 2011 From: ahatanak at gmail.com (Akira Hatanaka) Date: Tue, 20 Sep 2011 14:28:17 -0700 Subject: [llvm-commits] [llvm] r140178 - in /llvm/trunk/lib/Target/Mips: Mips.td MipsSubtarget.h In-Reply-To: References: <20110920202809.05AF92A6C12E@llvm.org> Message-ID: I think we should first make it clear what these functions mean. This is what I intended: isMips32(): true for any architecture supporting Mips32r1 (Mips32r1/r2, Mips64r1/r2) isMips32r2(): true for any architecture supporting Mips32r2 (Mips32r2, Mips64r2) isMips64(): true for any architecture supporting Mips64r1 (Mips64r1/r2) isMips64r2(): true for any architecture supporting Mips64r2 (Mips64r2) Is this what you want? isMips32(): true for Mips32r1/r2 isMips32r2(): true for Mips32r2 isMips64(): true for Mips64r1/r2 isMips64r2(): true for Mips64r2 If that is the case, we will need to change isMips32() too (need to return false for Mips64r1/r2) and just rename isMips32r2 to isMipsRev2. Also, I think we will have to replace "isMips32()" with "isMips32() && isMips64()" and "isMips32r2()" with "isMips32r2() && isMips64r2()" in several places (do "grep isMips32()" or "grep isMips32r2"). On Tue, Sep 20, 2011 at 1:57 PM, Bruno Cardoso Lopes wrote: > Hi Akira, > >> ? bool isMips32() const { return MipsArchVersion >= Mips32; } >> - ?bool isMips32r2() const { return MipsArchVersion == Mips32r2; } >> + ?bool isMips32r2() const { return MipsArchVersion == Mips32r2 || >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? MipsArchVersion == Mips64r2; } > > This seems a bit confusing, probably not the way to go. I think > isMips32r2() should answer only for Mips32r2, if you want to check > both, have a predicate like "isMipsRev2". Why you want isMips32r2() to > answer for both? > > -- > Bruno Cardoso Lopes > http://www.brunocardoso.cc > From ahatanak at gmail.com Tue Sep 20 16:30:31 2011 From: ahatanak at gmail.com (Akira Hatanaka) Date: Tue, 20 Sep 2011 14:30:31 -0700 Subject: [llvm-commits] [llvm] r140178 - in /llvm/trunk/lib/Target/Mips: Mips.td MipsSubtarget.h In-Reply-To: References: <20110920202809.05AF92A6C12E@llvm.org> Message-ID: On Tue, Sep 20, 2011 at 2:28 PM, Akira Hatanaka wrote: > I think we should first make it clear what these functions mean. > > This is what I intended: > isMips32(): true for any architecture supporting Mips32r1 > (Mips32r1/r2, Mips64r1/r2) > isMips32r2(): true for any architecture supporting Mips32r2 (Mips32r2, Mips64r2) > isMips64(): true for any architecture supporting Mips64r1 (Mips64r1/r2) > isMips64r2(): true for any architecture supporting Mips64r2 (Mips64r2) > > Is this what you want? > isMips32(): true for Mips32r1/r2 > isMips32r2(): true for Mips32r2 > isMips64(): true for Mips64r1/r2 > isMips64r2(): true for Mips64r2 > > If that is the case, we will need to change isMips32() too (need to > return false for Mips64r1/r2) and just rename isMips32r2 to > isMipsRev2. Also, I think we will have to replace "isMips32()" with > "isMips32() && isMips64()" and "isMips32r2()" with "isMips32r2() && > isMips64r2()" in several places (do "grep isMips32()" or "grep > isMips32r2"). > replace "&&" with "||". > On Tue, Sep 20, 2011 at 1:57 PM, Bruno Cardoso Lopes > wrote: >> Hi Akira, >> >>> ? bool isMips32() const { return MipsArchVersion >= Mips32; } >>> - ?bool isMips32r2() const { return MipsArchVersion == Mips32r2; } >>> + ?bool isMips32r2() const { return MipsArchVersion == Mips32r2 || >>> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? MipsArchVersion == Mips64r2; } >> >> This seems a bit confusing, probably not the way to go. I think >> isMips32r2() should answer only for Mips32r2, if you want to check >> both, have a predicate like "isMipsRev2". Why you want isMips32r2() to >> answer for both? >> >> -- >> Bruno Cardoso Lopes >> http://www.brunocardoso.cc >> > From krasin at google.com Tue Sep 20 16:34:46 2011 From: krasin at google.com (Ivan Krasin) Date: Tue, 20 Sep 2011 14:34:46 -0700 Subject: [llvm-commits] [PATCH]llvm-ld: add support of deps with the specific version (like liblzma.so.1.0.0) In-Reply-To: <4E7D4172-EB25-49A7-AAAF-58A4EAE19526@apple.com> References: <4E7D4172-EB25-49A7-AAAF-58A4EAE19526@apple.com> Message-ID: On Tue, Sep 20, 2011 at 2:26 PM, Eric Christopher wrote: > Just got to this, but couldn't review it because the chromium patch isn't up anymore. Hi Eric, that's completely my fault: I have forgot to publish that CL (so that it was available for the people in cc: list only). Now it's open for everyone. Sorry for the confusion and please take a look. krasin > > Could you resend if no one has gotten to this? > > On Aug 31, 2011, at 11:16 AM, Ivan Krasin wrote: > >> Friendly ping. >> >> On Mon, Aug 29, 2011 at 1:58 PM, Ivan Krasin wrote: >>> Hi llvm team! >>> >>> This CL adds support of deps which does not end with ".so" to llvm-ld. >>> It happens (for example) when you want to have a dependency on the .so >>> with the specific version, like liblzma.so.1.0.0 or >>> libcrypto.so.0.9.8. >>> >>> The patch is attached and is also available online: >>> http://codereview.chromium.org/7793002/ >>> >>> Please, let me know if it's fine to commit. >>> >>> -- krasin >>> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > From bruno.cardoso at gmail.com Tue Sep 20 16:37:43 2011 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Tue, 20 Sep 2011 14:37:43 -0700 Subject: [llvm-commits] [llvm] r140178 - in /llvm/trunk/lib/Target/Mips: Mips.td MipsSubtarget.h In-Reply-To: References: <20110920202809.05AF92A6C12E@llvm.org> Message-ID: On Tue, Sep 20, 2011 at 2:28 PM, Akira Hatanaka wrote: > I think we should first make it clear what these functions mean. > > This is what I intended: > isMips32(): true for any architecture supporting Mips32r1 > (Mips32r1/r2, Mips64r1/r2) > isMips32r2(): true for any architecture supporting Mips32r2 (Mips32r2, Mips64r2) > isMips64(): true for any architecture supporting Mips64r1 (Mips64r1/r2) > isMips64r2(): true for any architecture supporting Mips64r2 (Mips64r2) I see now, I think this is ok, but should be renamed "hasMips32" and so on to make it clear, because it makes sense to say that Mips64r2 has Mips32r2 but not that it "is" Mips32r2 -- Bruno Cardoso Lopes http://www.brunocardoso.cc From evan.cheng at apple.com Tue Sep 20 16:38:18 2011 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 20 Sep 2011 21:38:18 -0000 Subject: [llvm-commits] [llvm] r140181 - in /llvm/trunk: lib/Target/ARM/ARM.td test/CodeGen/ARM/mulhi.ll Message-ID: <20110920213818.D89032A6C12C@llvm.org> Author: evancheng Date: Tue Sep 20 16:38:18 2011 New Revision: 140181 URL: http://llvm.org/viewvc/llvm-project?rev=140181&view=rev Log: Fix a bug introduced during refactoring a couple of months ago. Cortex-M3 does not support Thumb2 dsp instructions. rdar://10152911. Modified: llvm/trunk/lib/Target/ARM/ARM.td llvm/trunk/test/CodeGen/ARM/mulhi.ll Modified: llvm/trunk/lib/Target/ARM/ARM.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARM.td?rev=140181&r1=140180&r2=140181&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARM.td (original) +++ llvm/trunk/lib/Target/ARM/ARM.td Tue Sep 20 16:38:18 2011 @@ -108,7 +108,7 @@ [HasV5TEOps]>; def HasV6T2Ops : SubtargetFeature<"v6t2", "HasV6T2Ops", "true", "Support ARM v6t2 instructions", - [HasV6Ops, FeatureThumb2, FeatureDSPThumb2]>; + [HasV6Ops, FeatureThumb2]>; def HasV7Ops : SubtargetFeature<"v7", "HasV7Ops", "true", "Support ARM v7 instructions", [HasV6T2Ops]>; @@ -188,9 +188,11 @@ FeatureDB]>; // V6T2 Processors. -def : Processor<"arm1156t2-s", ARMV6Itineraries, [HasV6T2Ops]>; +def : Processor<"arm1156t2-s", ARMV6Itineraries, [HasV6T2Ops, + FeatureDSPThumb2]>; def : Processor<"arm1156t2f-s", ARMV6Itineraries, [HasV6T2Ops, FeatureVFP2, - FeatureHasSlowFPVMLx]>; + FeatureHasSlowFPVMLx, + FeatureDSPThumb2]>; // V7a Processors. def : Processor<"cortex-a8", CortexA8Itineraries, Modified: llvm/trunk/test/CodeGen/ARM/mulhi.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/mulhi.ll?rev=140181&r1=140180&r2=140181&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/mulhi.ll (original) +++ llvm/trunk/test/CodeGen/ARM/mulhi.ll Tue Sep 20 16:38:18 2011 @@ -1,9 +1,16 @@ -; RUN: llc < %s -march=arm -mattr=+v6 -; RUN: llc < %s -march=arm -mattr=+v6 | \ -; RUN: grep smmul | count 1 -; RUN: llc < %s -march=arm | grep umull | count 1 +; RUN: llc < %s -march=arm -mattr=+v6 | FileCheck %s -check-prefix=V6 +; RUN: llc < %s -march=arm | FileCheck %s -check-prefix=V4 +; RUN: llc < %s -march=thumb -mcpu=cortex-m3 | FileCheck %s -check-prefix=M3 -define i32 @smulhi(i32 %x, i32 %y) { +define i32 @smulhi(i32 %x, i32 %y) nounwind { +; V6: smulhi: +; V6: smmul + +; V4: smulhi: +; V4: smull + +; M3: smulhi: +; M3: smull %tmp = sext i32 %x to i64 ; [#uses=1] %tmp1 = sext i32 %y to i64 ; [#uses=1] %tmp2 = mul i64 %tmp1, %tmp ; [#uses=1] @@ -12,7 +19,15 @@ ret i32 %tmp3.upgrd.1 } -define i32 @umulhi(i32 %x, i32 %y) { +define i32 @umulhi(i32 %x, i32 %y) nounwind { +; V6: umulhi: +; V6: umull + +; V4: umulhi: +; V4: umull + +; M3: umulhi: +; M3: umull %tmp = zext i32 %x to i64 ; [#uses=1] %tmp1 = zext i32 %y to i64 ; [#uses=1] %tmp2 = mul i64 %tmp1, %tmp ; [#uses=1] @@ -20,3 +35,20 @@ %tmp3.upgrd.2 = trunc i64 %tmp3 to i32 ; [#uses=1] ret i32 %tmp3.upgrd.2 } + +; rdar://r10152911 +define i32 @t3(i32 %a) nounwind { +; V6: t3: +; V6: smmla + +; V4: t3: +; V4: smull + +; M3: t3: +; M3-NOT: smmla +; M3: smull +entry: + %tmp1 = mul nsw i32 %a, 3 + %tmp2 = sdiv i32 %tmp1, 23 + ret i32 %tmp2 +} From bruno.cardoso at gmail.com Tue Sep 20 16:39:06 2011 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Tue, 20 Sep 2011 21:39:06 -0000 Subject: [llvm-commits] [llvm] r140183 - /llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp Message-ID: <20110920213906.589972A6C12C@llvm.org> Author: bruno Date: Tue Sep 20 16:39:06 2011 New Revision: 140183 URL: http://llvm.org/viewvc/llvm-project?rev=140183&view=rev Log: Tidy up code! Modified: llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp Modified: llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp?rev=140183&r1=140182&r2=140183&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp Tue Sep 20 16:39:06 2011 @@ -195,11 +195,11 @@ SmallVectorImpl &Fixups, int ImmOffset) const { const MCExpr *Expr = NULL; if (DispOp.isImm()) { - // If this is a simple integer displacement that doesn't require a relocation, - // emit it now. + // If this is a simple integer displacement that doesn't require a + // relocation, emit it now. if (FixupKind != FK_PCRel_1 && - FixupKind != FK_PCRel_2 && - FixupKind != FK_PCRel_4) { + FixupKind != FK_PCRel_2 && + FixupKind != FK_PCRel_4) { EmitConstant(DispOp.getImm()+ImmOffset, Size, CurByte, OS); return; } @@ -1041,8 +1041,7 @@ // in bits[7:4] of a immediate byte, and bits[3:0] are ignored. if ((TSFlags >> X86II::VEXShift) & X86II::VEX_I8IMM) { const MCOperand &MO = MI.getOperand(CurOp++); - bool IsExtReg = - X86II::isX86_64ExtendedReg(MO.getReg()); + bool IsExtReg = X86II::isX86_64ExtendedReg(MO.getReg()); unsigned RegNum = (IsExtReg ? (1 << 7) : 0); RegNum |= GetX86RegNum(MO) << 4; EmitImmediate(MCOperand::CreateImm(RegNum), 1, FK_Data_1, CurByte, OS, From bruno.cardoso at gmail.com Tue Sep 20 16:39:21 2011 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Tue, 20 Sep 2011 21:39:21 -0000 Subject: [llvm-commits] [llvm] r140184 - in /llvm/trunk: lib/Target/X86/X86InstrSSE.td test/MC/X86/x86_64-avx-encoding.s Message-ID: <20110920213921.AB7522A6C12C@llvm.org> Author: bruno Date: Tue Sep 20 16:39:21 2011 New Revision: 140184 URL: http://llvm.org/viewvc/llvm-project?rev=140184&view=rev Log: The wrong relocation was being emitted for several SSSE3 instructions. This fixes PR10963. Thanks to Benjamin for finding the wrong tablegen declaration. Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td llvm/trunk/test/MC/X86/x86_64-avx-encoding.s Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=140184&r1=140183&r2=140184&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Tue Sep 20 16:39:21 2011 @@ -4851,7 +4851,7 @@ (bitconvert (memopv16i8 addr:$src2))))]>, OpSize; } -let Predicates = [HasAVX] in { +let ImmT = NoImm, Predicates = [HasAVX] in { let isCommutable = 0 in { defm VPHADDW : SS3I_binop_rm_int<0x01, "vphaddw", memopv8i16, int_x86_ssse3_phadd_w_128, 0>, VEX_4V; Modified: llvm/trunk/test/MC/X86/x86_64-avx-encoding.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86_64-avx-encoding.s?rev=140184&r1=140183&r2=140184&view=diff ============================================================================== --- llvm/trunk/test/MC/X86/x86_64-avx-encoding.s (original) +++ llvm/trunk/test/MC/X86/x86_64-avx-encoding.s Tue Sep 20 16:39:21 2011 @@ -3340,3 +3340,9 @@ // CHECK: encoding: [0xc4,0xa1,0x78,0x29,0x1c,0x18] vmovaps %xmm3, (%rax,%r11) +// CHECK: vpshufb _foo(%rip), %xmm0, %xmm0 +// CHECK: encoding: [0xc4,0xe2,0x79,0x00,0x05,A,A,A,A] +// CHECK: kind: reloc_riprel_4byte +_foo: + nop + vpshufb _foo(%rip), %xmm0, %xmm0 From bruno.cardoso at gmail.com Tue Sep 20 16:45:26 2011 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Tue, 20 Sep 2011 21:45:26 -0000 Subject: [llvm-commits] [llvm] r140186 - /llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp Message-ID: <20110920214526.B77CB2A6C12C@llvm.org> Author: bruno Date: Tue Sep 20 16:45:26 2011 New Revision: 140186 URL: http://llvm.org/viewvc/llvm-project?rev=140186&view=rev Log: Tidy up a bit more, fix tab and remove trailing whitespaces Modified: llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp Modified: llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp?rev=140186&r1=140185&r2=140186&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp Tue Sep 20 16:45:26 2011 @@ -161,7 +161,7 @@ static bool Is32BitMemOperand(const MCInst &MI, unsigned Op) { const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); const MCOperand &IndexReg = MI.getOperand(Op+X86::AddrIndexReg); - + if ((BaseReg.getReg() != 0 && X86MCRegisterClasses[X86::GR32RegClassID].contains(BaseReg.getReg())) || (IndexReg.getReg() != 0 && @@ -199,7 +199,7 @@ // relocation, emit it now. if (FixupKind != FK_PCRel_1 && FixupKind != FK_PCRel_2 && - FixupKind != FK_PCRel_4) { + FixupKind != FK_PCRel_4) { EmitConstant(DispOp.getImm()+ImmOffset, Size, CurByte, OS); return; } @@ -766,7 +766,7 @@ if ((TSFlags & X86II::AdSize) || (MemOperand != -1 && is64BitMode() && Is32BitMemOperand(MI, MemOperand))) EmitByte(0x67, CurByte, OS); - + // Emit the operand size opcode prefix as needed. if (TSFlags & X86II::OpSize) EmitByte(0x66, CurByte, OS); @@ -869,7 +869,6 @@ if ((TSFlags >> X86II::VEXShift) & X86II::VEX_4V) HasVEX_4V = true; - // Determine where the memory operand starts, if present. int MemoryOperand = X86II::getMemoryOperandNo(TSFlags); if (MemoryOperand != -1) MemoryOperand += CurOp; @@ -879,12 +878,11 @@ else EmitVEXOpcodePrefix(TSFlags, CurByte, MemoryOperand, MI, Desc, OS); - unsigned char BaseOpcode = X86II::getBaseOpcodeFor(TSFlags); - + if ((TSFlags >> X86II::VEXShift) & X86II::Has3DNow0F0FOpcode) BaseOpcode = 0x0F; // Weird 3DNow! encoding. - + unsigned SrcRegNum = 0; switch (TSFlags & X86II::FormMask) { case X86II::MRMInitReg: @@ -896,7 +894,6 @@ case X86II::RawFrm: EmitByte(BaseOpcode, CurByte, OS); break; - case X86II::RawFrmImm8: EmitByte(BaseOpcode, CurByte, OS); EmitImmediate(MI.getOperand(CurOp++), @@ -1064,7 +1061,6 @@ if ((TSFlags >> X86II::VEXShift) & X86II::Has3DNow0F0FOpcode) EmitByte(X86II::getBaseOpcodeFor(TSFlags), CurByte, OS); - #ifndef NDEBUG // FIXME: Verify. From bob.wilson at apple.com Tue Sep 20 17:05:56 2011 From: bob.wilson at apple.com (Bob Wilson) Date: Tue, 20 Sep 2011 22:05:56 -0000 Subject: [llvm-commits] [llvm] r140188 - /llvm/trunk/lib/Support/Unix/Host.inc Message-ID: <20110920220556.F167B2A6C12C@llvm.org> Author: bwilson Date: Tue Sep 20 17:05:56 2011 New Revision: 140188 URL: http://llvm.org/viewvc/llvm-project?rev=140188&view=rev Log: Remove the hack to check UNAME_RELEASE when identifying the Darwin version. This was only needed to locate llvm-gcc's installation directory when clang falls back to run llvm-gcc for i386 kexts. As of clang svn r140187, we're now just searching paths with several different Darwin versions on either side of the current version, so this is no longer needed. Modified: llvm/trunk/lib/Support/Unix/Host.inc Modified: llvm/trunk/lib/Support/Unix/Host.inc URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Unix/Host.inc?rev=140188&r1=140187&r2=140188&view=diff ============================================================================== --- llvm/trunk/lib/Support/Unix/Host.inc (original) +++ llvm/trunk/lib/Support/Unix/Host.inc Tue Sep 20 17:05:56 2011 @@ -29,15 +29,6 @@ static std::string getOSVersion() { struct utsname info; -#ifdef __APPLE__ - // Recognize UNAME_RELEASE environment variable to match Darwin's uname, - // where the value of this variable sets the OS release version - // reported by "uname -r". - const char *UnameOverride = ::getenv("UNAME_RELEASE"); - if (UnameOverride && UnameOverride[0] != '\0') - return UnameOverride; -#endif // __APPLE__ - if (uname(&info)) return ""; From stoklund at 2pi.dk Tue Sep 20 17:24:14 2011 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Tue, 20 Sep 2011 15:24:14 -0700 Subject: [llvm-commits] [llvm] r140160 - in /llvm/trunk: include/llvm/MC/MCInstrDesc.h lib/CodeGen/SelectionDAG/InstrEmitter.cpp lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/ARMInstrThumb2.td utils/TableGen/CodeGenInstruction.cpp utils/TableGen/CodeGenInstruction.h utils/TableGen/InstrInfoEmitter.cpp In-Reply-To: <20110920182232.3BCDE2A6C12C@llvm.org> References: <20110920182232.3BCDE2A6C12C@llvm.org> Message-ID: <1DCAE94E-613C-4EAA-8149-A4F0F0E099C3@2pi.dk> On Sep 20, 2011, at 11:22 AM, Andrew Trick wrote: > --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original) > +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Tue Sep 20 13:22:31 2011 > @@ -179,7 +179,12 @@ > > void TargetLowering::AdjustInstrPostInstrSelection(MachineInstr *MI, > SDNode *Node) const { > - // Do nothing unless the target overrides it. > +#ifndef NDEBUG > + dbgs() << "If a target marks an instruction with " > + "'hasPostISelHook', it must implement " > + "TargetLowering::AdjustInstrPostInstrSelection!"; > +#endif > + llvm_unreachable(0); > } > llvm_unreachable takes a (const char *msg) argument that is optimized away in NDEBUG builds. /jakob From echristo at apple.com Tue Sep 20 17:24:20 2011 From: echristo at apple.com (Eric Christopher) Date: Tue, 20 Sep 2011 15:24:20 -0700 Subject: [llvm-commits] [PATCH]llvm-ld: add support of deps with the specific version (like liblzma.so.1.0.0) In-Reply-To: References: <4E7D4172-EB25-49A7-AAAF-58A4EAE19526@apple.com> Message-ID: <9EF38AA3-8BE4-419D-BA45-9BB8CA01041F@apple.com> On Sep 20, 2011, at 2:34 PM, Ivan Krasin wrote: > On Tue, Sep 20, 2011 at 2:26 PM, Eric Christopher wrote: >> Just got to this, but couldn't review it because the chromium patch isn't up anymore. > Hi Eric, > > that's completely my fault: I have forgot to publish that CL (so that > it was available for the people in cc: list only). Now it's open for > everyone. > > Sorry for the confusion and please take a look. Looks reasonable to me. -eric From isanbard at gmail.com Tue Sep 20 17:23:09 2011 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 20 Sep 2011 22:23:09 -0000 Subject: [llvm-commits] [llvm] r140193 - /llvm/trunk/lib/Transforms/IPO/LoopExtractor.cpp Message-ID: <20110920222309.5E5AB2A6C12C@llvm.org> Author: void Date: Tue Sep 20 17:23:09 2011 New Revision: 140193 URL: http://llvm.org/viewvc/llvm-project?rev=140193&view=rev Log: Omit extracting a loop if one of the exits is a landing pad. The landing pad must accompany the invoke when it's extracted. However, if it does, then the loop isn't properly extracted. I.e., the resulting extraction has a loop in it. The extracted function is then extracted, etc. resulting in an infinite loop. Modified: llvm/trunk/lib/Transforms/IPO/LoopExtractor.cpp Modified: llvm/trunk/lib/Transforms/IPO/LoopExtractor.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/LoopExtractor.cpp?rev=140193&r1=140192&r2=140193&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/LoopExtractor.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/LoopExtractor.cpp Tue Sep 20 17:23:09 2011 @@ -101,18 +101,24 @@ L->getHeader()->getParent()->getEntryBlock().getTerminator(); if (!isa(EntryTI) || !cast(EntryTI)->isUnconditional() || - EntryTI->getSuccessor(0) != L->getHeader()) + EntryTI->getSuccessor(0) != L->getHeader()) { ShouldExtractLoop = true; - else { + } else { // Check to see if any exits from the loop are more than just return - // blocks. + // blocks. We also must omit landing pads. Landing pads must accompany the + // invoke instruction. But this would result in a loop in the extracted + // function. An infinite cycle occurs when it tries to extract that loop as + // well. SmallVector ExitBlocks; L->getExitBlocks(ExitBlocks); - for (unsigned i = 0, e = ExitBlocks.size(); i != e; ++i) - if (!isa(ExitBlocks[i]->getTerminator())) { + for (unsigned i = 0, e = ExitBlocks.size(); i != e; ++i) { + if (!isa(ExitBlocks[i]->getTerminator())) ShouldExtractLoop = true; + if (ExitBlocks[i]->isLandingPad()) { + ShouldExtractLoop = false; break; } + } } if (ShouldExtractLoop) { if (NumLoops == 0) return Changed; From echristo at apple.com Tue Sep 20 17:26:35 2011 From: echristo at apple.com (Eric Christopher) Date: Tue, 20 Sep 2011 22:26:35 -0000 Subject: [llvm-commits] [llvm] r140194 - /llvm/trunk/autoconf/configure.ac Message-ID: <20110920222635.3F16F2A6C12C@llvm.org> Author: echristo Date: Tue Sep 20 17:26:35 2011 New Revision: 140194 URL: http://llvm.org/viewvc/llvm-project?rev=140194&view=rev Log: Fix typos. Modified: llvm/trunk/autoconf/configure.ac Modified: llvm/trunk/autoconf/configure.ac URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/autoconf/configure.ac?rev=140194&r1=140193&r2=140194&view=diff ============================================================================== --- llvm/trunk/autoconf/configure.ac (original) +++ llvm/trunk/autoconf/configure.ac Tue Sep 20 17:26:35 2011 @@ -1536,10 +1536,10 @@ fi fi -dnl Check, whether __dso_handle is present +dnl Check whether __dso_handle is present AC_CHECK_FUNCS([__dso_handle]) -dnl Check wether llvm-gcc is based on dragonegg +dnl Check whether llvm-gcc is based on dragonegg AC_CACHE_CHECK([whether llvm-gcc is dragonegg],[llvm_cv_llvmgcc_dragonegg], [llvm_cv_llvmgcc_dragonegg="no" if test -n "$LLVMGCC" ; then From isanbard at gmail.com Tue Sep 20 17:27:16 2011 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 20 Sep 2011 22:27:16 -0000 Subject: [llvm-commits] [llvm] r140195 - /llvm/trunk/lib/Transforms/IPO/LoopExtractor.cpp Message-ID: <20110920222716.D54192A6C12C@llvm.org> Author: void Date: Tue Sep 20 17:27:16 2011 New Revision: 140195 URL: http://llvm.org/viewvc/llvm-project?rev=140195&view=rev Log: Place the check for an exit landing pad where it will be run on both code paths through the if-then-else. Modified: llvm/trunk/lib/Transforms/IPO/LoopExtractor.cpp Modified: llvm/trunk/lib/Transforms/IPO/LoopExtractor.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/LoopExtractor.cpp?rev=140195&r1=140194&r2=140195&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/LoopExtractor.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/LoopExtractor.cpp Tue Sep 20 17:27:16 2011 @@ -105,21 +105,30 @@ ShouldExtractLoop = true; } else { // Check to see if any exits from the loop are more than just return - // blocks. We also must omit landing pads. Landing pads must accompany the - // invoke instruction. But this would result in a loop in the extracted + // blocks. + SmallVector ExitBlocks; + L->getExitBlocks(ExitBlocks); + for (unsigned i = 0, e = ExitBlocks.size(); i != e; ++i) + if (!isa(ExitBlocks[i]->getTerminator())) { + ShouldExtractLoop = true; + break; + } + } + + if (ShouldExtractLoop) { + // We must omit landing pads. Landing pads must accompany the invoke + // instruction. But this would result in a loop in the extracted // function. An infinite cycle occurs when it tries to extract that loop as // well. SmallVector ExitBlocks; L->getExitBlocks(ExitBlocks); - for (unsigned i = 0, e = ExitBlocks.size(); i != e; ++i) { - if (!isa(ExitBlocks[i]->getTerminator())) - ShouldExtractLoop = true; + for (unsigned i = 0, e = ExitBlocks.size(); i != e; ++i) if (ExitBlocks[i]->isLandingPad()) { ShouldExtractLoop = false; break; } - } } + if (ShouldExtractLoop) { if (NumLoops == 0) return Changed; --NumLoops; From isanbard at gmail.com Tue Sep 20 17:28:17 2011 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 20 Sep 2011 22:28:17 -0000 Subject: [llvm-commits] [llvm] r140196 - /llvm/trunk/lib/Transforms/Utils/BreakCriticalEdges.cpp Message-ID: <20110920222817.5DA752A6C12C@llvm.org> Author: void Date: Tue Sep 20 17:28:17 2011 New Revision: 140196 URL: http://llvm.org/viewvc/llvm-project?rev=140196&view=rev Log: Relax this condition. Some passes require breaking critical edges before they're called. Don't segfault because of that. Modified: llvm/trunk/lib/Transforms/Utils/BreakCriticalEdges.cpp Modified: llvm/trunk/lib/Transforms/Utils/BreakCriticalEdges.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/BreakCriticalEdges.cpp?rev=140196&r1=140195&r2=140196&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/BreakCriticalEdges.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/BreakCriticalEdges.cpp Tue Sep 20 17:28:17 2011 @@ -178,8 +178,7 @@ // Splitting the critical edge to a landing pad block is non-trivial. Don't do // it in this generic function. - assert(!DestBB->isLandingPad() && - "Cannot split critical edge to a landing pad block!"); + if (DestBB->isLandingPad()) return 0; // Create a new basic block, linking it into the CFG. BasicBlock *NewBB = BasicBlock::Create(TI->getContext(), From isanbard at gmail.com Tue Sep 20 17:29:43 2011 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 20 Sep 2011 22:29:43 -0000 Subject: [llvm-commits] [llvm] r140197 - /llvm/trunk/test/Transforms/CodeExtractor/2004-03-18-InvokeHandling.ll Message-ID: <20110920222943.5D9492A6C12C@llvm.org> Author: void Date: Tue Sep 20 17:29:43 2011 New Revision: 140197 URL: http://llvm.org/viewvc/llvm-project?rev=140197&view=rev Log: Update this test to the new EH model. Though I think it may be obsolete with the loop extract changes. And I couldn't get the old version of LLVM to compile so that I could reduce this testcase. Modified: llvm/trunk/test/Transforms/CodeExtractor/2004-03-18-InvokeHandling.ll Modified: llvm/trunk/test/Transforms/CodeExtractor/2004-03-18-InvokeHandling.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/CodeExtractor/2004-03-18-InvokeHandling.ll?rev=140197&r1=140196&r2=140197&view=diff ============================================================================== --- llvm/trunk/test/Transforms/CodeExtractor/2004-03-18-InvokeHandling.ll (original) +++ llvm/trunk/test/Transforms/CodeExtractor/2004-03-18-InvokeHandling.ll Tue Sep 20 17:29:43 2011 @@ -190,5 +190,9 @@ ret void LongJmpBlkPre: ; preds = %endif.52, %then.40 + %exn = landingpad { i8*, i32 } personality i32 (...)* @__gcc_personality_v0 + catch i8* null ret void } + +declare i32 @__gcc_personality_v0(...) From bruno.cardoso at gmail.com Tue Sep 20 17:34:46 2011 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Tue, 20 Sep 2011 22:34:46 -0000 Subject: [llvm-commits] [llvm] r140199 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Message-ID: <20110920223446.328272A6C12C@llvm.org> Author: bruno Date: Tue Sep 20 17:34:45 2011 New Revision: 140199 URL: http://llvm.org/viewvc/llvm-project?rev=140199&view=rev Log: Simplify max/minp[s|d] dagcombine matching Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=140199&r1=140198&r2=140199&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Sep 20 17:34:45 2011 @@ -12562,17 +12562,14 @@ // Get the LHS/RHS of the select. SDValue LHS = N->getOperand(1); SDValue RHS = N->getOperand(2); + EVT VT = LHS.getValueType(); // If we have SSE[12] support, try to form min/max nodes. SSE min/max // instructions match the semantics of the common C idiom xhasXMMInt() && - (LHS.getValueType() == MVT::f32 || LHS.getValueType() == MVT::v4f32 || - LHS.getValueType() == MVT::f64 || LHS.getValueType() == MVT::v2f64)) || - (Subtarget->hasAVX() && - (LHS.getValueType() == MVT::v8f32 || LHS.getValueType() == MVT::v4f64)))) { + if (Cond.getOpcode() == ISD::SETCC && VT.isFloatingPoint() && + VT != MVT::f80 && DAG.getTargetLoweringInfo().isTypeLegal(VT)) { ISD::CondCode CC = cast(Cond.getOperand(2))->get(); unsigned Opcode = 0; From krasin at chromium.org Tue Sep 20 17:52:35 2011 From: krasin at chromium.org (Ivan Krasin) Date: Tue, 20 Sep 2011 22:52:35 -0000 Subject: [llvm-commits] [llvm] r140201 - /llvm/trunk/lib/Linker/Linker.cpp Message-ID: <20110920225235.35EBE2A6C12C@llvm.org> Author: krasin Date: Tue Sep 20 17:52:35 2011 New Revision: 140201 URL: http://llvm.org/viewvc/llvm-project?rev=140201&view=rev Log: lib/Linker: add support of deps which does not end with ".so". It happens (for example) when you want to have a dependency on the .so with the specific version, like liblzma.so.1.0.0 or libcrypto.so.0.9.8. Modified: llvm/trunk/lib/Linker/Linker.cpp Modified: llvm/trunk/lib/Linker/Linker.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Linker/Linker.cpp?rev=140201&r1=140200&r2=140201&view=diff ============================================================================== --- llvm/trunk/lib/Linker/Linker.cpp (original) +++ llvm/trunk/lib/Linker/Linker.cpp Tue Sep 20 17:52:35 2011 @@ -141,6 +141,14 @@ if (FullPath.isBitcodeFile()) // .so file containing bitcode? return FullPath; + // Try libX form, to make it possible to add dependency on the + // specific version of .so, like liblzma.so.1.0.0 + FullPath.eraseSuffix(); + if (FullPath.isDynamicLibrary()) // Native shared library? + return FullPath; + if (FullPath.isBitcodeFile()) // .so file containing bitcode? + return FullPath; + // Not found .. fall through // Indicate that the library was not found in the directory. From krasin at google.com Tue Sep 20 17:54:27 2011 From: krasin at google.com (Ivan Krasin) Date: Tue, 20 Sep 2011 15:54:27 -0700 Subject: [llvm-commits] [PATCH]llvm-ld: add support of deps with the specific version (like liblzma.so.1.0.0) In-Reply-To: <9EF38AA3-8BE4-419D-BA45-9BB8CA01041F@apple.com> References: <4E7D4172-EB25-49A7-AAAF-58A4EAE19526@apple.com> <9EF38AA3-8BE4-419D-BA45-9BB8CA01041F@apple.com> Message-ID: Thanks, r140201. On Tue, Sep 20, 2011 at 3:24 PM, Eric Christopher wrote: > > On Sep 20, 2011, at 2:34 PM, Ivan Krasin wrote: > >> On Tue, Sep 20, 2011 at 2:26 PM, Eric Christopher wrote: >>> Just got to this, but couldn't review it because the chromium patch isn't up anymore. >> Hi Eric, >> >> that's completely my fault: I have forgot to publish that CL (so that >> it was available for the people in cc: list only). Now it's open for >> everyone. >> >> Sorry for the confusion and please take a look. > > Looks reasonable to me. > > -eric > From bruno.cardoso at gmail.com Tue Sep 20 18:19:29 2011 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Tue, 20 Sep 2011 23:19:29 -0000 Subject: [llvm-commits] [llvm] r140203 - in /llvm/trunk: lib/Target/X86/X86InstrSSE.td test/CodeGen/X86/avx-vinsertf128.ll Message-ID: <20110920231929.A75E92A6C12C@llvm.org> Author: bruno Date: Tue Sep 20 18:19:29 2011 New Revision: 140203 URL: http://llvm.org/viewvc/llvm-project?rev=140203&view=rev Log: Revert r140097, working on a better approach Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td llvm/trunk/test/CodeGen/X86/avx-vinsertf128.ll Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=140203&r1=140202&r2=140203&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Tue Sep 20 18:19:29 2011 @@ -157,21 +157,6 @@ def : Pat<(insert_subvector undef, (v16i8 VR128:$src), (i32 0)), (INSERT_SUBREG (v32i8 (IMPLICIT_DEF)), VR128:$src, sub_xmm)>; -// Inserting a 128-bit undef vector into the high part of a 256-bit -// vector should return the 256-bit vector itself. -def : Pat<(insert_subvector (v8i32 VR256:$src), undef, (i32 4)), - (v8i32 VR256:$src)>; -def : Pat<(insert_subvector (v8f32 VR256:$src), undef, (i32 4)), - (v8f32 VR256:$src)>; -def : Pat<(insert_subvector (v4i64 VR256:$src), undef, (i32 4)), - (v4i64 VR256:$src)>; -def : Pat<(insert_subvector (v4f64 VR256:$src), undef, (i32 4)), - (v4f64 VR256:$src)>; -def : Pat<(insert_subvector (v16i16 VR256:$src), undef, (i32 4)), - (v16i16 VR256:$src)>; -def : Pat<(insert_subvector (v32i8 VR256:$src), undef, (i32 4)), - (v32i8 VR256:$src)>; - // Implicitly promote a 32-bit scalar to a vector. def : Pat<(v4f32 (scalar_to_vector FR32:$src)), (INSERT_SUBREG (v4f32 (IMPLICIT_DEF)), FR32:$src, sub_ss)>; Modified: llvm/trunk/test/CodeGen/X86/avx-vinsertf128.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx-vinsertf128.ll?rev=140203&r1=140202&r2=140203&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/avx-vinsertf128.ll (original) +++ llvm/trunk/test/CodeGen/X86/avx-vinsertf128.ll Tue Sep 20 18:19:29 2011 @@ -37,10 +37,3 @@ ret void } -; CHECK: _C -; CHECK-NOT: vinsertf128 $1 -define <4 x i32> @C(<4 x i32> %v1) nounwind readonly { - %1 = shufflevector <4 x i32> %v1, <4 x i32> undef, <8 x i32> - %2 = shufflevector <8 x i32> %1, <8 x i32> undef, <4 x i32> - ret <4 x i32> %2 -} From bruno.cardoso at gmail.com Tue Sep 20 18:19:33 2011 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Tue, 20 Sep 2011 23:19:33 -0000 Subject: [llvm-commits] [llvm] r140204 - in /llvm/trunk: lib/CodeGen/SelectionDAG/DAGCombiner.cpp test/CodeGen/X86/avx-vinsertf128.ll Message-ID: <20110920231933.C64712A6C12C@llvm.org> Author: bruno Date: Tue Sep 20 18:19:33 2011 New Revision: 140204 URL: http://llvm.org/viewvc/llvm-project?rev=140204&view=rev Log: Add a DAGCombine for subvector extracts to remove useless chains of subvector inserts and extracts. Initial patch by Rackover, Zvi with some tweak done by me. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp llvm/trunk/test/CodeGen/X86/avx-vinsertf128.ll Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=140204&r1=140203&r2=140204&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Tue Sep 20 18:19:33 2011 @@ -216,6 +216,7 @@ SDValue visitEXTRACT_VECTOR_ELT(SDNode *N); SDValue visitBUILD_VECTOR(SDNode *N); SDValue visitCONCAT_VECTORS(SDNode *N); + SDValue visitEXTRACT_SUBVECTOR(SDNode *N); SDValue visitVECTOR_SHUFFLE(SDNode *N); SDValue visitMEMBARRIER(SDNode *N); @@ -1105,6 +1106,7 @@ case ISD::EXTRACT_VECTOR_ELT: return visitEXTRACT_VECTOR_ELT(N); case ISD::BUILD_VECTOR: return visitBUILD_VECTOR(N); case ISD::CONCAT_VECTORS: return visitCONCAT_VECTORS(N); + case ISD::EXTRACT_SUBVECTOR: return visitEXTRACT_SUBVECTOR(N); case ISD::VECTOR_SHUFFLE: return visitVECTOR_SHUFFLE(N); case ISD::MEMBARRIER: return visitMEMBARRIER(N); } @@ -7031,6 +7033,36 @@ return SDValue(); } +SDValue DAGCombiner::visitEXTRACT_SUBVECTOR(SDNode* N) { + EVT NVT = N->getValueType(0); + SDValue V = N->getOperand(0); + + if (V->getOpcode() == ISD::INSERT_SUBVECTOR) { + // Handle only simple case where vector being inserted and vector + // being extracted are of same type, and are half size of larger vectors. + EVT BigVT = V->getOperand(0).getValueType(); + EVT SmallVT = V->getOperand(1).getValueType(); + if (NVT != SmallVT || NVT.getSizeInBits()*2 != BigVT.getSizeInBits()) + return SDValue(); + + // Combine: + // (extract_subvec (insert_subvec V1, V2, InsIdx), ExtIdx) + // Into: + // indicies are equal => V1 + // otherwise => (extract_subvec V1, ExtIdx) + // + SDValue InsIdx = N->getOperand(1); + SDValue ExtIdx = V->getOperand(2); + + if (InsIdx == ExtIdx) + return V->getOperand(1); + return DAG.getNode(ISD::EXTRACT_SUBVECTOR, N->getDebugLoc(), NVT, + V->getOperand(0), N->getOperand(1)); + } + + return SDValue(); +} + SDValue DAGCombiner::visitVECTOR_SHUFFLE(SDNode *N) { EVT VT = N->getValueType(0); unsigned NumElts = VT.getVectorNumElements(); Modified: llvm/trunk/test/CodeGen/X86/avx-vinsertf128.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx-vinsertf128.ll?rev=140204&r1=140203&r2=140204&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/avx-vinsertf128.ll (original) +++ llvm/trunk/test/CodeGen/X86/avx-vinsertf128.ll Tue Sep 20 18:19:33 2011 @@ -37,3 +37,22 @@ ret void } +;; DAG Combine must remove useless vinsertf128 instructions + +; CHECK: DAGCombineA +; CHECK-NOT: vinsertf128 $1 +define <4 x i32> @DAGCombineA(<4 x i32> %v1) nounwind readonly { + %1 = shufflevector <4 x i32> %v1, <4 x i32> undef, <8 x i32> + %2 = shufflevector <8 x i32> %1, <8 x i32> undef, <4 x i32> + ret <4 x i32> %2 +} + +; CHECK: DAGCombineB +; CHECK: vpaddd %xmm +; CHECK-NOT: vinsertf128 $1 +; CHECK: vpaddd %xmm +define <8 x i32> @DAGCombineB(<8 x i32> %v1, <8 x i32> %v2) nounwind readonly { + %1 = add <8 x i32> %v1, %v2 + %2 = add <8 x i32> %1, %v1 + ret <8 x i32> %2 +} From bruno.cardoso at gmail.com Tue Sep 20 18:23:03 2011 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Tue, 20 Sep 2011 16:23:03 -0700 Subject: [llvm-commits] [AVX] Add EXTRACT_SUBVECTOR to DAGCombine In-Reply-To: <2B8953F251AC92428D9BBC92D9B218865E950F3577@hasmsx502.ger.corp.intel.com> References: <2B8953F251AC92428D9BBC92D9B218865E9469BE94@hasmsx502.ger.corp.intel.com> <2B8953F251AC92428D9BBC92D9B218865E950F3577@hasmsx502.ger.corp.intel.com> Message-ID: On Mon, Sep 19, 2011 at 11:42 PM, Rackover, Zvi wrote: > Bruno, thanks for reviewing and investing effort in this. > The undef is only a special case of what this patch addresses. > > Take for example one of the tests in the patch: > define <8 x i32> @test(<8 x i32> %v1, <8 x i32> %v2) { > ?%1 = add <8 x i32> %v1, %v2 > ?%2 = add <8 x i32> %1, %v1 > ?ret <8 x i32> %2 > } > > Running on TOT gives: > ? vextractf128 ? ?$1, %ymm1, %xmm3 > ? vextractf128 ? ?$1, %ymm0, %xmm2 > ? vpaddd ?%xmm3, %xmm2, %xmm3 > ? vpaddd ?%xmm1, %xmm0, %xmm1 > ? vinsertf128 ? ? $1, %xmm3, %ymm1, %ymm3 ?<-------- > ? vextractf128 ? ?$1, %ymm3, %xmm1 ? ? ? ? ? ? ? <--------- > ? vpaddd ?%xmm2, %xmm1, %xmm1 > ? vpaddd ?%xmm0, %xmm3, %xmm0 > ? vinsertf128 ? ? $1, %xmm1, %ymm0, %ymm0 > > Running with the patch applied gives: > ? vextractf128 ? ?$1, %ymm1, %xmm3 > ? vextractf128 ? ?$1, %ymm0, %xmm2 > ? vpaddd ?%xmm3, %xmm2, %xmm3 > ? vpaddd ?%xmm2, %xmm3, %xmm2 > ? vpaddd ?%xmm1, %xmm0, %xmm1 > ? vpaddd ?%xmm0, %xmm1, %xmm0 > ? vinsertf128 ? ? $1, %xmm2, %ymm0, %ymm0 > > We can optimize away redundant insert_subvector/extract_subvector pairs by applying the following transforms: > EXTRACT_SV( INSERT_SV( V1, V2, I ), I) ? ? ? ? ----> V2 > EXTRACT_SV( INSERT_SV( V1, V2, I1 ), I2) ? ? ----> EXTRACT_SV( V1, I2 ) > > I thought it would be right to make this optimization target-interdependent, but if it should be X86-specific, where should it be located? Cool! I've applied with some tweaks in r140204! Thanks Zvi! -- Bruno Cardoso Lopes http://www.brunocardoso.cc From eli.friedman at gmail.com Tue Sep 20 18:28:51 2011 From: eli.friedman at gmail.com (Eli Friedman) Date: Tue, 20 Sep 2011 23:28:51 -0000 Subject: [llvm-commits] [llvm] r140210 - in /llvm/trunk: lib/Transforms/Scalar/SCCP.cpp test/Transforms/SCCP/ipsccp-basic.ll Message-ID: <20110920232851.B0C7F2A6C12C@llvm.org> Author: efriedma Date: Tue Sep 20 18:28:51 2011 New Revision: 140210 URL: http://llvm.org/viewvc/llvm-project?rev=140210&view=rev Log: Make sure IPSCCP never marks a tracked call as overdefined in SCCPSolver::ResolvedUndefsIn. If we do, we can end up in a situation where a function is resolved to return a constant, but the caller is marked overdefined, which confuses the code later. (again). Modified: llvm/trunk/lib/Transforms/Scalar/SCCP.cpp llvm/trunk/test/Transforms/SCCP/ipsccp-basic.ll Modified: llvm/trunk/lib/Transforms/Scalar/SCCP.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/SCCP.cpp?rev=140210&r1=140209&r2=140210&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/SCCP.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/SCCP.cpp Tue Sep 20 18:28:51 2011 @@ -1433,15 +1433,25 @@ if (I->getType()->isVoidTy()) continue; if (StructType *STy = dyn_cast(I->getType())) { - // Only a few things that can be structs matter for undef. Just send - // all their results to overdefined. We could be more precise than this - // but it isn't worth bothering. - if (!isa(I) && !isa(I)) { - for (unsigned i = 0, e = STy->getNumElements(); i != e; ++i) { - LatticeVal &LV = getStructValueState(I, i); - if (LV.isUndefined()) - markOverdefined(LV, I); - } + // Only a few things that can be structs matter for undef. + + // Tracked calls must never be marked overdefined in ResolvedUndefsIn. + if (CallSite CS = CallSite(I)) + if (Function *F = CS.getCalledFunction()) + if (MRVFunctionsTracked.count(F)) + continue; + + // extractvalue and insertvalue don't need to be marked; they are + // tracked as precisely as their operands. + if (isa(I) || isa(I)) + continue; + + // Send the results of everything else to overdefined. We could be + // more precise than this but it isn't worth bothering. + for (unsigned i = 0, e = STy->getNumElements(); i != e; ++i) { + LatticeVal &LV = getStructValueState(I, i); + if (LV.isUndefined()) + markOverdefined(LV, I); } continue; } @@ -1594,6 +1604,22 @@ break; markOverdefined(I); return true; + case Instruction::Call: + case Instruction::Invoke: { + // There are two reasons a call can have an undef result + // 1. It could be tracked. + // 2. It could be constant-foldable. + // Because of the way we solve return values, tracked calls must + // never be marked overdefined in ResolvedUndefsIn. + if (Function *F = CallSite(I).getCalledFunction()) + if (TrackedRetVals.count(F)) + break; + + // If the call is constant-foldable, we mark it overdefined because + // we do not know what return values are valid. + markOverdefined(I); + return true; + } default: // If we don't know what should happen here, conservatively mark it // overdefined. Modified: llvm/trunk/test/Transforms/SCCP/ipsccp-basic.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/SCCP/ipsccp-basic.ll?rev=140210&r1=140209&r2=140210&view=diff ============================================================================== --- llvm/trunk/test/Transforms/SCCP/ipsccp-basic.ll (original) +++ llvm/trunk/test/Transforms/SCCP/ipsccp-basic.ll Tue Sep 20 18:28:51 2011 @@ -209,3 +209,21 @@ } declare i32 @__gxx_personality_v0(...) + +;;======================== test10 + +define i32 @test10a() nounwind { +entry: + %call = call i32 @test10b(i32 undef) + ret i32 %call +; CHECK: define i32 @test10a +; CHECK: ret i32 0 +} + +define internal i32 @test10b(i32 %x) nounwind { +entry: + %r = and i32 %x, 1 + ret i32 %r +; CHECK: define internal i32 @test10b +; CHECK: ret i32 undef +} From bruno.cardoso at gmail.com Tue Sep 20 18:51:11 2011 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Tue, 20 Sep 2011 16:51:11 -0700 Subject: [llvm-commits] [llvm] r140107 - in /llvm/trunk/test/CodeGen/X86: 2006-05-11-InstrSched.ll 2009-06-05-ScalarToVectorByteMMX.ll movgs.ll v2f32.ll vec_set-C.ll In-Reply-To: References: <20110920000812.E20BC2A6C12C@llvm.org> Message-ID: Hi Eli, > I think there's a real regression here... I'm pretty sure you "broke" > the fix in r100559 (see also > http://llvm.org/bugs/show_bug.cgi?id=6696). ?Not sure how much we > care, though. I actually care, but if you follow it closely, you're going to notice that all getReserveFP() calls introduced in r100559, were removed afterwards (I can't find it in the history where that happened though) and this didn't trigger PR6696 for Linux, explanation: In the mean time Linux stack default alignment was changed to 128-bit, and the stack alignment heuristic was never needed anymore. It reappeared for AVX, because of the explanation I wrote in r139939's commit message. Besides that, when I replaced getReserveFP() for getForceFramePointer() in X86MaxStackAlignmentHeuristicPass, all I actually did was to restore the behavior added in r100559, which isn't needed anymore for Linux because of the 128-bit alignment. Anyway, if you have any concrete example where it did break, let me know! -- Bruno Cardoso Lopes http://www.brunocardoso.cc From isanbard at gmail.com Tue Sep 20 18:52:09 2011 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 20 Sep 2011 23:52:09 -0000 Subject: [llvm-commits] [llvm] r140213 - /llvm/trunk/test/CodeGen/Generic/2004-02-08-UnwindSupport.ll Message-ID: <20110920235209.7B66F2A6C12C@llvm.org> Author: void Date: Tue Sep 20 18:52:09 2011 New Revision: 140213 URL: http://llvm.org/viewvc/llvm-project?rev=140213&view=rev Log: This test is completely invalid with the modern EH model. Delete. Removed: llvm/trunk/test/CodeGen/Generic/2004-02-08-UnwindSupport.ll Removed: llvm/trunk/test/CodeGen/Generic/2004-02-08-UnwindSupport.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Generic/2004-02-08-UnwindSupport.ll?rev=140212&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Generic/2004-02-08-UnwindSupport.ll (original) +++ llvm/trunk/test/CodeGen/Generic/2004-02-08-UnwindSupport.ll (removed) @@ -1,17 +0,0 @@ -; RUN: llc < %s -enable-correct-eh-support - -define i32 @test() { - unwind -} - -define i32 @main() { - %X = invoke i32 @test( ) - to label %cont unwind label %EH ; [#uses=0] - -cont: ; preds = %0 - ret i32 1 - -EH: ; preds = %0 - ret i32 0 -} - From ahatanak at gmail.com Tue Sep 20 18:53:09 2011 From: ahatanak at gmail.com (Akira Hatanaka) Date: Tue, 20 Sep 2011 23:53:09 -0000 Subject: [llvm-commits] [llvm] r140214 - in /llvm/trunk/lib/Target/Mips: MipsISelDAGToDAG.cpp MipsISelLowering.cpp MipsInstrInfo.td MipsSubtarget.h Message-ID: <20110920235309.3D9532A6C12C@llvm.org> Author: ahatanak Date: Tue Sep 20 18:53:09 2011 New Revision: 140214 URL: http://llvm.org/viewvc/llvm-project?rev=140214&view=rev Log: Change the names of functions isMips* to hasMips*. Modified: llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp llvm/trunk/lib/Target/Mips/MipsInstrInfo.td llvm/trunk/lib/Target/Mips/MipsSubtarget.h Modified: llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp?rev=140214&r1=140213&r2=140214&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp Tue Sep 20 18:53:09 2011 @@ -262,7 +262,7 @@ /// Special Muls case ISD::MUL: - if (Subtarget.isMips32()) + if (Subtarget.hasMips32()) break; case ISD::MULHS: case ISD::MULHU: { Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=140214&r1=140213&r2=140214&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Tue Sep 20 18:53:09 2011 @@ -143,7 +143,7 @@ setOperationAction(ISD::CTTZ, MVT::i32, Expand); setOperationAction(ISD::ROTL, MVT::i32, Expand); - if (!Subtarget->isMips32r2()) + if (!Subtarget->hasMips32r2()) setOperationAction(ISD::ROTR, MVT::i32, Expand); setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand); @@ -378,7 +378,7 @@ if (DCI.isBeforeLegalize()) return SDValue(); - if (Subtarget->isMips32() && SelectMadd(N, &DAG)) + if (Subtarget->hasMips32() && SelectMadd(N, &DAG)) return SDValue(N, 0); return SDValue(); @@ -390,7 +390,7 @@ if (DCI.isBeforeLegalize()) return SDValue(); - if (Subtarget->isMips32() && SelectMsub(N, &DAG)) + if (Subtarget->hasMips32() && SelectMsub(N, &DAG)) return SDValue(N, 0); return SDValue(); @@ -526,7 +526,7 @@ // Pattern match EXT. // $dst = and ((sra or srl) $src , pos), (2**size - 1) // => ext $dst, $src, size, pos - if (DCI.isBeforeLegalizeOps() || !Subtarget->isMips32r2()) + if (DCI.isBeforeLegalizeOps() || !Subtarget->hasMips32r2()) return SDValue(); SDValue ShiftRight = N->getOperand(0), Mask = N->getOperand(1); @@ -567,7 +567,7 @@ // $dst = or (and $src1 , mask0), (and (shl $src, pos), mask1), // where mask1 = (2**size - 1) << pos, mask0 = ~mask1 // => ins $dst, $src, size, pos, $src1 - if (DCI.isBeforeLegalizeOps() || !Subtarget->isMips32r2()) + if (DCI.isBeforeLegalizeOps() || !Subtarget->hasMips32r2()) return SDValue(); SDValue And0 = N->getOperand(0), And1 = N->getOperand(1); Modified: llvm/trunk/lib/Target/Mips/MipsInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrInfo.td?rev=140214&r1=140213&r2=140214&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsInstrInfo.td (original) +++ llvm/trunk/lib/Target/Mips/MipsInstrInfo.td Tue Sep 20 18:53:09 2011 @@ -125,8 +125,8 @@ def HasBitCount : Predicate<"Subtarget.hasBitCount()">; def HasSwap : Predicate<"Subtarget.hasSwap()">; def HasCondMov : Predicate<"Subtarget.hasCondMov()">; -def IsMips32 : Predicate<"Subtarget.isMips32()">; -def IsMips32r2 : Predicate<"Subtarget.isMips32r2()">; +def HasMips32 : Predicate<"Subtarget.hasMips32()">; +def HasMips32r2 : Predicate<"Subtarget.hasMips32r2()">; //===----------------------------------------------------------------------===// // Mips Operand, Complex Patterns and Transformations Definitions. @@ -409,7 +409,7 @@ class ExtIns _funct, string instr_asm, dag outs, dag ins, list pattern, InstrItinClass itin>: FR<0x1f, _funct, outs, ins, !strconcat(instr_asm, " $rt, $rs, $pos, $sz"), - pattern, itin>, Requires<[IsMips32r2]> { + pattern, itin>, Requires<[HasMips32r2]> { bits<5> pos; bits<5> sz; let rd = sz; @@ -546,7 +546,7 @@ def SRAV : LogicR_shift_rotate_reg<0x07, 0x00, "srav", sra>; // Rotate Instructions -let Predicates = [IsMips32r2] in { +let Predicates = [HasMips32r2] in { def ROTR : LogicR_shift_rotate_imm<0x02, 0x01, "rotr", rotr>; def ROTRV : LogicR_shift_rotate_reg<0x06, 0x01, "rotrv", rotr>; } @@ -683,7 +683,7 @@ // MUL is a assembly macro in the current used ISAs. In recent ISA's // it is a real instruction. -def MUL : ArithR<0x1c, 0x02, "mul", mul, IIImul, 1>, Requires<[IsMips32]>; +def MUL : ArithR<0x1c, 0x02, "mul", mul, IIImul, 1>, Requires<[HasMips32]>; def RDHWR : ReadHardware; Modified: llvm/trunk/lib/Target/Mips/MipsSubtarget.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSubtarget.h?rev=140214&r1=140213&r2=140214&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsSubtarget.h (original) +++ llvm/trunk/lib/Target/Mips/MipsSubtarget.h Tue Sep 20 18:53:09 2011 @@ -105,11 +105,11 @@ /// subtarget options. Definition of function is auto generated by tblgen. void ParseSubtargetFeatures(StringRef CPU, StringRef FS); - bool isMips32() const { return MipsArchVersion >= Mips32; } - bool isMips32r2() const { return MipsArchVersion == Mips32r2 || + bool hasMips32() const { return MipsArchVersion >= Mips32; } + bool hasMips32r2() const { return MipsArchVersion == Mips32r2 || MipsArchVersion == Mips64r2; } - bool isMips64() const { return MipsArchVersion >= Mips64; } - bool isMips64r2() const { return MipsArchVersion == Mips64r2; } + bool hassMips64() const { return MipsArchVersion >= Mips64; } + bool hassMips64r2() const { return MipsArchVersion == Mips64r2; } bool isLittle() const { return IsLittle; } bool isFP64bit() const { return IsFP64bit; } From proljc at gmail.com Tue Sep 20 18:57:22 2011 From: proljc at gmail.com (Liu) Date: Wed, 21 Sep 2011 07:57:22 +0800 Subject: [llvm-commits] [patch] fix PPC README typo In-Reply-To: References: Message-ID: On Wed, Sep 21, 2011 at 5:19 AM, Eli Friedman wrote: > On Tue, Sep 20, 2011 at 10:13 AM, Liu wrote: >> Hi >> >> I find a PPC README typo and fixed it. > > That's not a typo. > > -Eli > OK. From echristo at apple.com Tue Sep 20 18:56:51 2011 From: echristo at apple.com (Eric Christopher) Date: Tue, 20 Sep 2011 23:56:51 -0000 Subject: [llvm-commits] [test-suite] r140215 - in /test-suite/trunk: Makefile.config.in autoconf/configure.ac configure Message-ID: <20110920235651.C28FB2A6C12C@llvm.org> Author: echristo Date: Tue Sep 20 18:56:51 2011 New Revision: 140215 URL: http://llvm.org/viewvc/llvm-project?rev=140215&view=rev Log: Migrate llvm-gcc handling to the test-suite project where it belongs. (Part #2 will be committed in llvm.) Modified: test-suite/trunk/Makefile.config.in test-suite/trunk/autoconf/configure.ac test-suite/trunk/configure Modified: test-suite/trunk/Makefile.config.in URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Makefile.config.in?rev=140215&r1=140214&r2=140215&view=diff ============================================================================== --- test-suite/trunk/Makefile.config.in (original) +++ test-suite/trunk/Makefile.config.in Tue Sep 20 18:56:51 2011 @@ -86,6 +86,9 @@ CXX := $(TARGET_CXX) endif +LLVMGCC := @LLVMGCC@ +LLVMGXX := @LLVMGXX@ + ifdef TARGET_LLVMGCC LLVMGCC := $(TARGET_LLVMGCC) LLVMCC := $(TARGET_LLVMGCC) Modified: test-suite/trunk/autoconf/configure.ac URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/autoconf/configure.ac?rev=140215&r1=140214&r2=140215&view=diff ============================================================================== --- test-suite/trunk/autoconf/configure.ac (original) +++ test-suite/trunk/autoconf/configure.ac Tue Sep 20 18:56:51 2011 @@ -165,6 +165,90 @@ AC_SUBST(LLVM_EXTERNALS,[$withval]), AC_SUBST(LLVM_EXTERNALS,[$LLVM_SRC/projects/test-suite-externals])) +dnl Allow a specific llvm-gcc/llvm-g++ pair to be used with this LLVM config. +AC_ARG_WITH(llvmgccdir, + AS_HELP_STRING([--with-llvmgccdir], + [Specify location of llvm-gcc install dir (default searches PATH)]),, + withval=default) +case "$withval" in + default) WITH_LLVMGCCDIR=default ;; + /* | [[A-Za-z]]:[[\\/]]*) WITH_LLVMGCCDIR=$withval ;; + *) AC_MSG_ERROR([Invalid path for --with-llvmgccdir. Provide full path]) ;; +esac + +if test "$WITH_LLVMGCCDIR" = "default" ; then + LLVMGCC="llvm-gcc${EXEEXT}" + LLVMGXX="llvm-g++${EXEEXT}" + AC_PATH_PROG(LLVMGCC, $LLVMGCC, []) + AC_PATH_PROG(LLVMGXX, $LLVMGXX, []) +else + if test -z "$LLVMGCC"; then + LLVMGCC="$WITH_LLVMGCCDIR/bin/llvm-gcc${EXEEXT}" + fi + if test -z "$LLVMGXX"; then + LLVMGXX="$WITH_LLVMGCCDIR/bin/llvm-g++${EXEEXT}" + fi + + AC_SUBST(LLVMGCC,$LLVMGCC) + AC_SUBST(LLVMGXX,$LLVMGXX) +fi + +dnl Check whether llvm-gcc is based on dragonegg +AC_CACHE_CHECK([whether llvm-gcc is dragonegg],[llvm_cv_llvmgcc_dragonegg], +[llvm_cv_llvmgcc_dragonegg="no" +if test "$LLVMCC_OPTION" == "llvm-gcc" ; then + cp /dev/null conftest.c + $LLVMGCC -fplugin-arg-dragonegg-emit-ir -S -o - conftest.c > /dev/null 2>&1 + if test $? -eq 0 ; then + llvm_cv_llvmgcc_dragonegg="yes" + fi + rm conftest.c +fi]) + + +dnl Set the flags needed to emit LLVM IR and to disable optimizations +dnl in clang/llvm-gcc. +if test "$llvm_cv_llvmgcc_dragonegg" = "yes" ; then + LLVMCC_EMITIR_FLAG="-fplugin-arg-dragonegg-emit-ir" + LLVMCC_DISABLEOPT_FLAGS="-fplugin-arg-dragonegg-llvm-ir-optimize=0" +else + LLVMCC_EMITIR_FLAG="-emit-llvm" + LLVMCC_DISABLEOPT_FLAGS="-mllvm -disable-llvm-optzns" +fi + +AC_SUBST(LLVMCC_EMITIR_FLAG) + +dnl See if the llvm-gcc executable can compile to LLVM assembly +AC_CACHE_CHECK([whether llvm-gcc is sane],[llvm_cv_llvmgcc_sanity], +[llvm_cv_llvmgcc_sanity="no" +if test "$LLVMCC_OPTION" != none ; then + cp /dev/null conftest.c + $LLVMGCC "$LLVMCC_EMITIR_FLAG" -S -o - conftest.c | \ + grep 'target datalayout =' > /dev/null 2>&1 + if test $? -eq 0 ; then + llvm_cv_llvmgcc_sanity="yes" + fi + rm conftest.c +fi]) + +dnl Since we have a sane llvm-gcc, identify it and its sub-tools +dnl Furthermore, add some information about the tools +if test "$LLVMCC_OPTION" == "llvm-gcc" ; then + AC_MSG_CHECKING([llvm-gcc component support]) + llvmcc1path=`$LLVMGCC --print-prog-name=cc1` + AC_SUBST(LLVMCC1,$llvmcc1path) + llvmcc1pluspath=`$LLVMGCC --print-prog-name=cc1plus` + AC_SUBST(LLVMCC1PLUS,$llvmcc1pluspath) + llvmgccdir=`echo "$llvmcc1path" | sed 's,/libexec/.*,,'` + AC_SUBST(LLVMGCCDIR,$llvmgccdir) + llvmgcclangs=[`$LLVMGCC -v --help 2>&1 | grep '^Configured with:' | sed \ +'s/^.*--enable-languages=\([^ ]*\).*/\1/'`] + AC_SUBST(LLVMGCC_LANGS,$llvmgcclangs) + AC_SUBST(LLVMGCC_DRAGONEGG,$llvm_cv_llvmgcc_dragonegg) + AC_SUBST(LLVMCC_DISABLEOPT_FLAGS) + AC_MSG_RESULT([ok]) +fi + dnl Configure the default locations of the external benchmarks EXTERNAL_BENCHMARK(spec95,${LLVM_EXTERNALS}/spec95/benchspec) EXTERNAL_BENCHMARK(spec2000,${LLVM_EXTERNALS}/speccpu2000/benchspec,[CINT2000]) Modified: test-suite/trunk/configure URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/configure?rev=140215&r1=140214&r2=140215&view=diff ============================================================================== --- test-suite/trunk/configure (original) +++ test-suite/trunk/configure Tue Sep 20 18:56:51 2011 @@ -1,6 +1,6 @@ #! /bin/sh # Guess values for system-dependent variables and create Makefiles. -# Generated by GNU Autoconf 2.60 for LLVM-TEST 2.8svn. +# Generated by GNU Autoconf 2.61 for LLVM-TEST 2.8svn. # # Report bugs to . # @@ -12,7 +12,8 @@ ## M4sh Initialization. ## ## --------------------- ## -# Be Bourne compatible +# Be more Bourne compatible +DUALCASE=1; export DUALCASE # for MKS sh if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then emulate sh NULLCMD=: @@ -21,10 +22,13 @@ alias -g '${1+"$@"}'='"$@"' setopt NO_GLOB_SUBST else - case `(set -o) 2>/dev/null` in *posix*) set -o posix;; esac + case `(set -o) 2>/dev/null` in + *posix*) set -o posix ;; +esac + fi -BIN_SH=xpg4; export BIN_SH # for Tru64 -DUALCASE=1; export DUALCASE # for MKS sh + + # PATH needs CR @@ -217,7 +221,7 @@ else as_candidate_shells= as_save_IFS=$IFS; IFS=$PATH_SEPARATOR -for as_dir in /usr/bin/posix$PATH_SEPARATOR/bin$PATH_SEPARATOR/usr/bin$PATH_SEPARATOR$PATH +for as_dir in /bin$PATH_SEPARATOR/usr/bin$PATH_SEPARATOR$PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. @@ -235,7 +239,6 @@ # Try only shells that exist, to save several forks. if { test -f "$as_shell" || test -f "$as_shell.exe"; } && { ("$as_shell") 2> /dev/null <<\_ASEOF -# Be Bourne compatible if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then emulate sh NULLCMD=: @@ -244,10 +247,12 @@ alias -g '${1+"$@"}'='"$@"' setopt NO_GLOB_SUBST else - case `(set -o) 2>/dev/null` in *posix*) set -o posix;; esac + case `(set -o) 2>/dev/null` in + *posix*) set -o posix ;; +esac + fi -BIN_SH=xpg4; export BIN_SH # for Tru64 -DUALCASE=1; export DUALCASE # for MKS sh + : _ASEOF @@ -255,7 +260,6 @@ CONFIG_SHELL=$as_shell as_have_required=yes if { "$as_shell" 2> /dev/null <<\_ASEOF -# Be Bourne compatible if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then emulate sh NULLCMD=: @@ -264,10 +268,12 @@ alias -g '${1+"$@"}'='"$@"' setopt NO_GLOB_SUBST else - case `(set -o) 2>/dev/null` in *posix*) set -o posix;; esac + case `(set -o) 2>/dev/null` in + *posix*) set -o posix ;; +esac + fi -BIN_SH=xpg4; export BIN_SH # for Tru64 -DUALCASE=1; export DUALCASE # for MKS sh + : (as_func_return () { @@ -514,19 +520,28 @@ as_mkdir_p=false fi -# Find out whether ``test -x'' works. Don't use a zero-byte file, as -# systems may use methods other than mode bits to determine executability. -cat >conf$$.file <<_ASEOF -#! /bin/sh -exit 0 -_ASEOF -chmod +x conf$$.file -if test -x conf$$.file >/dev/null 2>&1; then - as_executable_p="test -x" +if test -x / >/dev/null 2>&1; then + as_test_x='test -x' else - as_executable_p=: + if ls -dL / >/dev/null 2>&1; then + as_ls_L_option=L + else + as_ls_L_option= + fi + as_test_x=' + eval sh -c '\'' + if test -d "$1"; then + test -d "$1/."; + else + case $1 in + -*)set "./$1";; + esac; + case `ls -ld'$as_ls_L_option' "$1" 2>/dev/null` in + ???[sx]*):;;*)false;;esac;fi + '\'' sh + ' fi -rm -f conf$$.file +as_executable_p=$as_test_x # Sed expression to map a string onto a valid CPP name. as_tr_cpp="eval sed 'y%*$as_cr_letters%P$as_cr_LETTERS%;s%[^_$as_cr_alnum]%_%g'" @@ -721,36 +736,36 @@ # Factoring default headers for most tests. ac_includes_default="\ #include -#if HAVE_SYS_TYPES_H +#ifdef HAVE_SYS_TYPES_H # include #endif -#if HAVE_SYS_STAT_H +#ifdef HAVE_SYS_STAT_H # include #endif -#if STDC_HEADERS +#ifdef STDC_HEADERS # include # include #else -# if HAVE_STDLIB_H +# ifdef HAVE_STDLIB_H # include # endif #endif -#if HAVE_STRING_H -# if !STDC_HEADERS && HAVE_MEMORY_H +#ifdef HAVE_STRING_H +# if !defined STDC_HEADERS && defined HAVE_MEMORY_H # include # endif # include #endif -#if HAVE_STRINGS_H +#ifdef HAVE_STRINGS_H # include #endif -#if HAVE_INTTYPES_H +#ifdef HAVE_INTTYPES_H # include #endif -#if HAVE_STDINT_H +#ifdef HAVE_STDINT_H # include #endif -#if HAVE_UNISTD_H +#ifdef HAVE_UNISTD_H # include #endif" @@ -819,6 +834,15 @@ LLVM_SRC LLVM_OBJ LLVM_EXTERNALS +LLVMGCC +LLVMGXX +LLVMCC_EMITIR_FLAG +LLVMCC1 +LLVMCC1PLUS +LLVMGCCDIR +LLVMGCC_LANGS +LLVMGCC_DRAGONEGG +LLVMCC_DISABLEOPT_FLAGS SPEC95_ROOT USE_SPEC95 SPEC2000_ROOT @@ -879,6 +903,7 @@ CC CFLAGS LDFLAGS +LIBS CPPFLAGS CPP CXX @@ -992,10 +1017,10 @@ -disable-* | --disable-*) ac_feature=`expr "x$ac_option" : 'x-*disable-\(.*\)'` # Reject names that are not valid shell variable names. - expr "x$ac_feature" : ".*[^-_$as_cr_alnum]" >/dev/null && + expr "x$ac_feature" : ".*[^-._$as_cr_alnum]" >/dev/null && { echo "$as_me: error: invalid feature name: $ac_feature" >&2 { (exit 1); exit 1; }; } - ac_feature=`echo $ac_feature | sed 's/-/_/g'` + ac_feature=`echo $ac_feature | sed 's/[-.]/_/g'` eval enable_$ac_feature=no ;; -docdir | --docdir | --docdi | --doc | --do) @@ -1011,10 +1036,10 @@ -enable-* | --enable-*) ac_feature=`expr "x$ac_option" : 'x-*enable-\([^=]*\)'` # Reject names that are not valid shell variable names. - expr "x$ac_feature" : ".*[^-_$as_cr_alnum]" >/dev/null && + expr "x$ac_feature" : ".*[^-._$as_cr_alnum]" >/dev/null && { echo "$as_me: error: invalid feature name: $ac_feature" >&2 { (exit 1); exit 1; }; } - ac_feature=`echo $ac_feature | sed 's/-/_/g'` + ac_feature=`echo $ac_feature | sed 's/[-.]/_/g'` eval enable_$ac_feature=\$ac_optarg ;; -exec-prefix | --exec_prefix | --exec-prefix | --exec-prefi \ @@ -1208,19 +1233,19 @@ -with-* | --with-*) ac_package=`expr "x$ac_option" : 'x-*with-\([^=]*\)'` # Reject names that are not valid shell variable names. - expr "x$ac_package" : ".*[^-_$as_cr_alnum]" >/dev/null && + expr "x$ac_package" : ".*[^-._$as_cr_alnum]" >/dev/null && { echo "$as_me: error: invalid package name: $ac_package" >&2 { (exit 1); exit 1; }; } - ac_package=`echo $ac_package| sed 's/-/_/g'` + ac_package=`echo $ac_package | sed 's/[-.]/_/g'` eval with_$ac_package=\$ac_optarg ;; -without-* | --without-*) ac_package=`expr "x$ac_option" : 'x-*without-\(.*\)'` # Reject names that are not valid shell variable names. - expr "x$ac_package" : ".*[^-_$as_cr_alnum]" >/dev/null && + expr "x$ac_package" : ".*[^-._$as_cr_alnum]" >/dev/null && { echo "$as_me: error: invalid package name: $ac_package" >&2 { (exit 1); exit 1; }; } - ac_package=`echo $ac_package | sed 's/-/_/g'` + ac_package=`echo $ac_package | sed 's/[-.]/_/g'` eval with_$ac_package=no ;; --x) @@ -1478,6 +1503,8 @@ --with-llvmsrc=DIR Location of LLVM Source Code --with-llvmobj=DIR Location of LLVM Object Code --with-externals=DIR Location of External Test code + --with-llvmgccdir Specify location of llvm-gcc install dir (default + searches PATH) --with-gnu-ld assume the C compiler uses GNU ld [default=no] --with-pic try to use only PIC/non-PIC objects [default=use both] @@ -1499,6 +1526,7 @@ CFLAGS C compiler flags LDFLAGS linker flags, e.g. -L if you have libraries in a nonstandard directory + LIBS libraries to pass to the linker, e.g. -l CPPFLAGS C/C++/Objective C preprocessor flags, e.g. -I if you have headers in a nonstandard directory CPP C preprocessor @@ -1573,7 +1601,7 @@ if $ac_init_version; then cat <<\_ACEOF LLVM-TEST configure 2.8svn -generated by GNU Autoconf 2.60 +generated by GNU Autoconf 2.61 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc. @@ -1587,7 +1615,7 @@ running configure, to aid debugging if configure makes a mistake. It was created by LLVM-TEST $as_me 2.8svn, which was -generated by GNU Autoconf 2.60. Invocation command line was +generated by GNU Autoconf 2.61. Invocation command line was $ $0 $@ @@ -2331,7 +2359,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then ac_cv_prog_CC="${ac_tool_prefix}gcc" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 @@ -2371,7 +2399,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then ac_cv_prog_ac_ct_CC="gcc" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 @@ -2428,7 +2456,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then ac_cv_prog_CC="${ac_tool_prefix}cc" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 @@ -2469,7 +2497,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then if test "$as_dir/$ac_word$ac_exec_ext" = "/usr/ucb/cc"; then ac_prog_rejected=yes continue @@ -2527,7 +2555,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then ac_cv_prog_CC="$ac_tool_prefix$ac_prog" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 @@ -2571,7 +2599,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then ac_cv_prog_ac_ct_CC="$ac_prog" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 @@ -2712,7 +2740,7 @@ # in a Makefile. We should not override ac_cv_exeext if it was cached, # so that the user can short-circuit this test for compilers unknown to # Autoconf. -for ac_file in $ac_files +for ac_file in $ac_files '' do test -f "$ac_file" || continue case $ac_file in @@ -2740,6 +2768,12 @@ test "$ac_cv_exeext" = no && ac_cv_exeext= else + ac_file='' +fi + +{ echo "$as_me:$LINENO: result: $ac_file" >&5 +echo "${ECHO_T}$ac_file" >&6; } +if test -z "$ac_file"; then echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 @@ -2751,8 +2785,6 @@ fi ac_exeext=$ac_cv_exeext -{ echo "$as_me:$LINENO: result: $ac_file" >&5 -echo "${ECHO_T}$ac_file" >&6; } # Check that the compiler produces executables we can run. If not, either # the compiler is broken, or we cross compile. @@ -2930,27 +2962,10 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest.$ac_objext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then ac_compiler_gnu=yes else echo "$as_me: failed program was:" >&5 @@ -3005,27 +3020,10 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest.$ac_objext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then ac_cv_prog_cc_g=yes else echo "$as_me: failed program was:" >&5 @@ -3060,27 +3058,10 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest.$ac_objext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then : else echo "$as_me: failed program was:" >&5 @@ -3116,27 +3097,10 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest.$ac_objext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then ac_cv_prog_cc_g=yes else echo "$as_me: failed program was:" >&5 @@ -3252,27 +3216,10 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest.$ac_objext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then ac_cv_prog_cc_c89=$ac_arg else echo "$as_me: failed program was:" >&5 @@ -3362,17 +3309,10 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } >/dev/null; then - if test -s conftest.err; then - ac_cpp_err=$ac_c_preproc_warn_flag - ac_cpp_err=$ac_cpp_err$ac_c_werror_flag - else - ac_cpp_err= - fi -else - ac_cpp_err=yes -fi -if test -z "$ac_cpp_err"; then + (exit $ac_status); } >/dev/null && { + test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" || + test ! -s conftest.err + }; then : else echo "$as_me: failed program was:" >&5 @@ -3406,17 +3346,10 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } >/dev/null; then - if test -s conftest.err; then - ac_cpp_err=$ac_c_preproc_warn_flag - ac_cpp_err=$ac_cpp_err$ac_c_werror_flag - else - ac_cpp_err= - fi -else - ac_cpp_err=yes -fi -if test -z "$ac_cpp_err"; then + (exit $ac_status); } >/dev/null && { + test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" || + test ! -s conftest.err + }; then # Broken: success on invalid input. continue else @@ -3481,17 +3414,10 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } >/dev/null; then - if test -s conftest.err; then - ac_cpp_err=$ac_c_preproc_warn_flag - ac_cpp_err=$ac_cpp_err$ac_c_werror_flag - else - ac_cpp_err= - fi -else - ac_cpp_err=yes -fi -if test -z "$ac_cpp_err"; then + (exit $ac_status); } >/dev/null && { + test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" || + test ! -s conftest.err + }; then : else echo "$as_me: failed program was:" >&5 @@ -3525,17 +3451,10 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } >/dev/null; then - if test -s conftest.err; then - ac_cpp_err=$ac_c_preproc_warn_flag - ac_cpp_err=$ac_cpp_err$ac_c_werror_flag - else - ac_cpp_err= - fi -else - ac_cpp_err=yes -fi -if test -z "$ac_cpp_err"; then + (exit $ac_status); } >/dev/null && { + test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" || + test ! -s conftest.err + }; then # Broken: success on invalid input. continue else @@ -3590,7 +3509,7 @@ for ac_prog in grep ggrep; do for ac_exec_ext in '' $ac_executable_extensions; do ac_path_GREP="$as_dir/$ac_prog$ac_exec_ext" - { test -f "$ac_path_GREP" && $as_executable_p "$ac_path_GREP"; } || continue + { test -f "$ac_path_GREP" && $as_test_x "$ac_path_GREP"; } || continue # Check for GNU ac_path_GREP and select it if it is found. # Check for GNU $ac_path_GREP case `"$ac_path_GREP" --version 2>&1` in @@ -3672,7 +3591,7 @@ for ac_prog in egrep; do for ac_exec_ext in '' $ac_executable_extensions; do ac_path_EGREP="$as_dir/$ac_prog$ac_exec_ext" - { test -f "$ac_path_EGREP" && $as_executable_p "$ac_path_EGREP"; } || continue + { test -f "$ac_path_EGREP" && $as_test_x "$ac_path_EGREP"; } || continue # Check for GNU ac_path_EGREP and select it if it is found. # Check for GNU $ac_path_EGREP case `"$ac_path_EGREP" --version 2>&1` in @@ -3768,27 +3687,10 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest.$ac_objext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then ac_cv_header_stdc=yes else echo "$as_me: failed program was:" >&5 @@ -3816,7 +3718,7 @@ else ac_cv_header_stdc=no fi -rm -f conftest* +rm -f -r conftest* fi @@ -3837,7 +3739,7 @@ else ac_cv_header_stdc=no fi -rm -f conftest* +rm -f -r conftest* fi @@ -3964,27 +3866,10 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest.$ac_objext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then eval "$as_ac_Header=yes" else echo "$as_me: failed program was:" >&5 @@ -4026,7 +3911,8 @@ int main () { -#if !BYTE_ORDER || !BIG_ENDIAN || !LITTLE_ENDIAN +#if ! (defined BYTE_ORDER && defined BIG_ENDIAN && defined LITTLE_ENDIAN \ + && BYTE_ORDER && BIG_ENDIAN && LITTLE_ENDIAN) bogus endian macros #endif @@ -4047,27 +3933,10 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest.$ac_objext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then # It does; now see whether it defined to BIG_ENDIAN or not. cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ @@ -4102,27 +3971,10 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest.$ac_objext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then ac_cv_c_bigendian=yes else echo "$as_me: failed program was:" >&5 @@ -4173,27 +4025,10 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest.$ac_objext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then if grep BIGenDianSyS conftest.$ac_objext >/dev/null ; then ac_cv_c_bigendian=yes fi @@ -4328,6 +4163,190 @@ +# Check whether --with-llvmgccdir was given. +if test "${with_llvmgccdir+set}" = set; then + withval=$with_llvmgccdir; +else + withval=default +fi + +case "$withval" in + default) WITH_LLVMGCCDIR=default ;; + /* | [A-Za-z]:[\\/]*) WITH_LLVMGCCDIR=$withval ;; + *) { { echo "$as_me:$LINENO: error: Invalid path for --with-llvmgccdir. Provide full path" >&5 +echo "$as_me: error: Invalid path for --with-llvmgccdir. Provide full path" >&2;} + { (exit 1); exit 1; }; } ;; +esac + +if test "$WITH_LLVMGCCDIR" = "default" ; then + LLVMGCC="llvm-gcc${EXEEXT}" + LLVMGXX="llvm-g++${EXEEXT}" + # Extract the first word of "$LLVMGCC", so it can be a program name with args. +set dummy $LLVMGCC; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_path_LLVMGCC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + case $LLVMGCC in + [\\/]* | ?:[\\/]*) + ac_cv_path_LLVMGCC="$LLVMGCC" # Let the user override the test with a path. + ;; + *) + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_path_LLVMGCC="$as_dir/$ac_word$ac_exec_ext" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + + ;; +esac +fi +LLVMGCC=$ac_cv_path_LLVMGCC +if test -n "$LLVMGCC"; then + { echo "$as_me:$LINENO: result: $LLVMGCC" >&5 +echo "${ECHO_T}$LLVMGCC" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + + # Extract the first word of "$LLVMGXX", so it can be a program name with args. +set dummy $LLVMGXX; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_path_LLVMGXX+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + case $LLVMGXX in + [\\/]* | ?:[\\/]*) + ac_cv_path_LLVMGXX="$LLVMGXX" # Let the user override the test with a path. + ;; + *) + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_path_LLVMGXX="$as_dir/$ac_word$ac_exec_ext" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + + ;; +esac +fi +LLVMGXX=$ac_cv_path_LLVMGXX +if test -n "$LLVMGXX"; then + { echo "$as_me:$LINENO: result: $LLVMGXX" >&5 +echo "${ECHO_T}$LLVMGXX" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + +else + if test -z "$LLVMGCC"; then + LLVMGCC="$WITH_LLVMGCCDIR/bin/llvm-gcc${EXEEXT}" + fi + if test -z "$LLVMGXX"; then + LLVMGXX="$WITH_LLVMGCCDIR/bin/llvm-g++${EXEEXT}" + fi + + LLVMGCC=$LLVMGCC + + LLVMGXX=$LLVMGXX + +fi + +{ echo "$as_me:$LINENO: checking whether llvm-gcc is dragonegg" >&5 +echo $ECHO_N "checking whether llvm-gcc is dragonegg... $ECHO_C" >&6; } +if test "${llvm_cv_llvmgcc_dragonegg+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + llvm_cv_llvmgcc_dragonegg="no" +if test "$LLVMCC_OPTION" == "llvm-gcc" ; then + cp /dev/null conftest.c + $LLVMGCC -fplugin-arg-dragonegg-emit-ir -S -o - conftest.c > /dev/null 2>&1 + if test $? -eq 0 ; then + llvm_cv_llvmgcc_dragonegg="yes" + fi + rm conftest.c +fi +fi +{ echo "$as_me:$LINENO: result: $llvm_cv_llvmgcc_dragonegg" >&5 +echo "${ECHO_T}$llvm_cv_llvmgcc_dragonegg" >&6; } + + +if test "$llvm_cv_llvmgcc_dragonegg" = "yes" ; then + LLVMCC_EMITIR_FLAG="-fplugin-arg-dragonegg-emit-ir" + LLVMCC_DISABLEOPT_FLAGS="-fplugin-arg-dragonegg-llvm-ir-optimize=0" +else + LLVMCC_EMITIR_FLAG="-emit-llvm" + LLVMCC_DISABLEOPT_FLAGS="-mllvm -disable-llvm-optzns" +fi + + + +{ echo "$as_me:$LINENO: checking whether llvm-gcc is sane" >&5 +echo $ECHO_N "checking whether llvm-gcc is sane... $ECHO_C" >&6; } +if test "${llvm_cv_llvmgcc_sanity+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + llvm_cv_llvmgcc_sanity="no" +if test "$LLVMCC_OPTION" != none ; then + cp /dev/null conftest.c + $LLVMGCC "$LLVMCC_EMITIR_FLAG" -S -o - conftest.c | \ + grep 'target datalayout =' > /dev/null 2>&1 + if test $? -eq 0 ; then + llvm_cv_llvmgcc_sanity="yes" + fi + rm conftest.c +fi +fi +{ echo "$as_me:$LINENO: result: $llvm_cv_llvmgcc_sanity" >&5 +echo "${ECHO_T}$llvm_cv_llvmgcc_sanity" >&6; } + +if test "$LLVMCC_OPTION" == "llvm-gcc" ; then + { echo "$as_me:$LINENO: checking llvm-gcc component support" >&5 +echo $ECHO_N "checking llvm-gcc component support... $ECHO_C" >&6; } + llvmcc1path=`$LLVMGCC --print-prog-name=cc1` + LLVMCC1=$llvmcc1path + + llvmcc1pluspath=`$LLVMGCC --print-prog-name=cc1plus` + LLVMCC1PLUS=$llvmcc1pluspath + + llvmgccdir=`echo "$llvmcc1path" | sed 's,/libexec/.*,,'` + LLVMGCCDIR=$llvmgccdir + + llvmgcclangs=`$LLVMGCC -v --help 2>&1 | grep '^Configured with:' | sed \ +'s/^.*--enable-languages=\([^ ]*\).*/\1/'` + LLVMGCC_LANGS=$llvmgcclangs + + LLVMGCC_DRAGONEGG=$llvm_cv_llvmgcc_dragonegg + + + { echo "$as_me:$LINENO: result: ok" >&5 +echo "${ECHO_T}ok" >&6; } +fi + + @@ -4791,7 +4810,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then ac_cv_prog_CXX="$ac_tool_prefix$ac_prog" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 @@ -4835,7 +4854,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then ac_cv_prog_ac_ct_CXX="$ac_prog" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 @@ -4948,27 +4967,10 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_cxx_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest.$ac_objext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then ac_compiler_gnu=yes else echo "$as_me: failed program was:" >&5 @@ -5023,27 +5025,10 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_cxx_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest.$ac_objext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then ac_cv_prog_cxx_g=yes else echo "$as_me: failed program was:" >&5 @@ -5078,27 +5063,10 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_cxx_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest.$ac_objext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then : else echo "$as_me: failed program was:" >&5 @@ -5134,27 +5102,10 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_cxx_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest.$ac_objext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then ac_cv_prog_cxx_g=yes else echo "$as_me: failed program was:" >&5 @@ -5219,7 +5170,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then ac_cv_prog_CC="$ac_tool_prefix$ac_prog" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 @@ -5263,7 +5214,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then ac_cv_prog_ac_ct_CC="$ac_prog" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 @@ -5381,27 +5332,10 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest.$ac_objext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then ac_compiler_gnu=yes else echo "$as_me: failed program was:" >&5 @@ -5456,27 +5390,10 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest.$ac_objext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then ac_cv_prog_cc_g=yes else echo "$as_me: failed program was:" >&5 @@ -5494,44 +5411,27 @@ main () { - ; - return 0; -} -_ACEOF -rm -f conftest.$ac_objext -if { (ac_try="$ac_compile" -case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_compile") 2>conftest.er1 - ac_status=$? - grep -v '^ *+' conftest.er1 >conftest.err - rm -f conftest.er1 - cat conftest.err >&5 - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest.$ac_objext' - { (case "(($ac_try" in + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; *) ac_try_echo=$ac_try;; esac eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 + (eval "$ac_compile") 2>conftest.er1 ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then : else echo "$as_me: failed program was:" >&5 @@ -5567,27 +5467,10 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest.$ac_objext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then ac_cv_prog_cc_g=yes else echo "$as_me: failed program was:" >&5 @@ -5703,27 +5586,10 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest.$ac_objext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then ac_cv_prog_cc_c89=$ac_arg else echo "$as_me: failed program was:" >&5 @@ -5812,17 +5678,10 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } >/dev/null; then - if test -s conftest.err; then - ac_cpp_err=$ac_c_preproc_warn_flag - ac_cpp_err=$ac_cpp_err$ac_c_werror_flag - else - ac_cpp_err= - fi -else - ac_cpp_err=yes -fi -if test -z "$ac_cpp_err"; then + (exit $ac_status); } >/dev/null && { + test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" || + test ! -s conftest.err + }; then : else echo "$as_me: failed program was:" >&5 @@ -5856,17 +5715,10 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } >/dev/null; then - if test -s conftest.err; then - ac_cpp_err=$ac_c_preproc_warn_flag - ac_cpp_err=$ac_cpp_err$ac_c_werror_flag - else - ac_cpp_err= - fi -else - ac_cpp_err=yes -fi -if test -z "$ac_cpp_err"; then + (exit $ac_status); } >/dev/null && { + test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" || + test ! -s conftest.err + }; then # Broken: success on invalid input. continue else @@ -5931,17 +5783,10 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } >/dev/null; then - if test -s conftest.err; then - ac_cpp_err=$ac_c_preproc_warn_flag - ac_cpp_err=$ac_cpp_err$ac_c_werror_flag - else - ac_cpp_err= - fi -else - ac_cpp_err=yes -fi -if test -z "$ac_cpp_err"; then + (exit $ac_status); } >/dev/null && { + test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" || + test ! -s conftest.err + }; then : else echo "$as_me: failed program was:" >&5 @@ -5975,17 +5820,10 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } >/dev/null; then - if test -s conftest.err; then - ac_cpp_err=$ac_c_preproc_warn_flag - ac_cpp_err=$ac_cpp_err$ac_c_werror_flag - else - ac_cpp_err= - fi -else - ac_cpp_err=yes -fi -if test -z "$ac_cpp_err"; then + (exit $ac_status); } >/dev/null && { + test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" || + test ! -s conftest.err + }; then # Broken: success on invalid input. continue else @@ -6602,7 +6440,7 @@ ;; *-*-irix6*) # Find out which ABI we are using. - echo '#line 6605 "configure"' > conftest.$ac_ext + echo '#line 6443 "configure"' > conftest.$ac_ext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>&5 ac_status=$? @@ -6726,27 +6564,11 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest$ac_exeext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then lt_cv_cc_needs_belf=yes else echo "$as_me: failed program was:" >&5 @@ -6755,7 +6577,7 @@ lt_cv_cc_needs_belf=no fi -rm -f core conftest.err conftest.$ac_objext \ +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ conftest$ac_exeext conftest.$ac_ext ac_ext=c ac_cpp='$CPP $CPPFLAGS' @@ -6836,27 +6658,10 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest.$ac_objext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then ac_header_compiler=yes else echo "$as_me: failed program was:" >&5 @@ -6892,17 +6697,10 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } >/dev/null; then - if test -s conftest.err; then - ac_cpp_err=$ac_c_preproc_warn_flag - ac_cpp_err=$ac_cpp_err$ac_c_werror_flag - else - ac_cpp_err= - fi -else - ac_cpp_err=yes -fi -if test -z "$ac_cpp_err"; then + (exit $ac_status); } >/dev/null && { + test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" || + test ! -s conftest.err + }; then ac_header_preproc=yes else echo "$as_me: failed program was:" >&5 @@ -7019,17 +6817,10 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } >/dev/null; then - if test -s conftest.err; then - ac_cpp_err=$ac_cxx_preproc_warn_flag - ac_cpp_err=$ac_cpp_err$ac_cxx_werror_flag - else - ac_cpp_err= - fi -else - ac_cpp_err=yes -fi -if test -z "$ac_cpp_err"; then + (exit $ac_status); } >/dev/null && { + test -z "$ac_cxx_preproc_warn_flag$ac_cxx_werror_flag" || + test ! -s conftest.err + }; then : else echo "$as_me: failed program was:" >&5 @@ -7063,17 +6854,10 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } >/dev/null; then - if test -s conftest.err; then - ac_cpp_err=$ac_cxx_preproc_warn_flag - ac_cpp_err=$ac_cpp_err$ac_cxx_werror_flag - else - ac_cpp_err= - fi -else - ac_cpp_err=yes -fi -if test -z "$ac_cpp_err"; then + (exit $ac_status); } >/dev/null && { + test -z "$ac_cxx_preproc_warn_flag$ac_cxx_werror_flag" || + test ! -s conftest.err + }; then # Broken: success on invalid input. continue else @@ -7138,17 +6922,10 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } >/dev/null; then - if test -s conftest.err; then - ac_cpp_err=$ac_cxx_preproc_warn_flag - ac_cpp_err=$ac_cpp_err$ac_cxx_werror_flag - else - ac_cpp_err= - fi -else - ac_cpp_err=yes -fi -if test -z "$ac_cpp_err"; then + (exit $ac_status); } >/dev/null && { + test -z "$ac_cxx_preproc_warn_flag$ac_cxx_werror_flag" || + test ! -s conftest.err + }; then : else echo "$as_me: failed program was:" >&5 @@ -7182,17 +6959,10 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } >/dev/null; then - if test -s conftest.err; then - ac_cpp_err=$ac_cxx_preproc_warn_flag - ac_cpp_err=$ac_cpp_err$ac_cxx_werror_flag - else - ac_cpp_err= - fi -else - ac_cpp_err=yes -fi -if test -z "$ac_cpp_err"; then + (exit $ac_status); } >/dev/null && { + test -z "$ac_cxx_preproc_warn_flag$ac_cxx_werror_flag" || + test ! -s conftest.err + }; then # Broken: success on invalid input. continue else @@ -7233,7 +7003,7 @@ ac_link='$F77 -o conftest$ac_exeext $FFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' ac_compiler_gnu=$ac_cv_f77_compiler_gnu if test -n "$ac_tool_prefix"; then - for ac_prog in g77 f77 xlf frt pgf77 cf77 fort77 fl32 af77 f90 xlf90 pgf90 pghpf epcf90 gfortran g95 f95 fort xlf95 ifort ifc efc pgf95 lf95 ftn + for ac_prog in g77 xlf f77 frt pgf77 cf77 fort77 fl32 af77 xlf90 f90 pgf90 pghpf epcf90 gfortran g95 xlf95 f95 fort ifort ifc efc pgf95 lf95 ftn do # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args. set dummy $ac_tool_prefix$ac_prog; ac_word=$2 @@ -7251,7 +7021,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then ac_cv_prog_F77="$ac_tool_prefix$ac_prog" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 @@ -7277,7 +7047,7 @@ fi if test -z "$F77"; then ac_ct_F77=$F77 - for ac_prog in g77 f77 xlf frt pgf77 cf77 fort77 fl32 af77 f90 xlf90 pgf90 pghpf epcf90 gfortran g95 f95 fort xlf95 ifort ifc efc pgf95 lf95 ftn + for ac_prog in g77 xlf f77 frt pgf77 cf77 fort77 fl32 af77 xlf90 f90 pgf90 pghpf epcf90 gfortran g95 xlf95 f95 fort ifort ifc efc pgf95 lf95 ftn do # Extract the first word of "$ac_prog", so it can be a program name with args. set dummy $ac_prog; ac_word=$2 @@ -7295,7 +7065,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then ac_cv_prog_ac_ct_F77="$ac_prog" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 @@ -7402,27 +7172,10 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_f77_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest.$ac_objext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_f77_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then ac_compiler_gnu=yes else echo "$as_me: failed program was:" >&5 @@ -7465,27 +7218,10 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_f77_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest.$ac_objext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_f77_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then ac_cv_prog_f77_g=yes else echo "$as_me: failed program was:" >&5 @@ -7940,7 +7676,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then ac_cv_prog_AR="${ac_tool_prefix}ar" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 @@ -7980,7 +7716,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then ac_cv_prog_ac_ct_AR="ar" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 @@ -8036,7 +7772,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then ac_cv_prog_RANLIB="${ac_tool_prefix}ranlib" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 @@ -8076,7 +7812,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then ac_cv_prog_ac_ct_RANLIB="ranlib" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 @@ -8132,7 +7868,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then ac_cv_prog_STRIP="${ac_tool_prefix}strip" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 @@ -8172,7 +7908,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then ac_cv_prog_ac_ct_STRIP="strip" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 @@ -8489,11 +8225,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:8492: $lt_compile\"" >&5) + (eval echo "\"\$as_me:8228: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:8496: \$? = $ac_status" >&5 + echo "$as_me:8232: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -8757,11 +8493,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:8760: $lt_compile\"" >&5) + (eval echo "\"\$as_me:8496: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:8764: \$? = $ac_status" >&5 + echo "$as_me:8500: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -8861,11 +8597,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:8864: $lt_compile\"" >&5) + (eval echo "\"\$as_me:8600: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:8868: \$? = $ac_status" >&5 + echo "$as_me:8604: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized @@ -9341,27 +9077,11 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest$ac_exeext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then aix_libpath=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e '/Import File Strings/,/^$/ { /^0/ { s/^0 *\(.*\)$/\1/; p; } }'` @@ -9375,7 +9095,7 @@ fi -rm -f core conftest.err conftest.$ac_objext \ +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ conftest$ac_exeext conftest.$ac_ext if test -z "$aix_libpath"; then aix_libpath="/usr/lib:/lib"; fi @@ -9416,27 +9136,11 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest$ac_exeext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then aix_libpath=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e '/Import File Strings/,/^$/ { /^0/ { s/^0 *\(.*\)$/\1/; p; } }'` @@ -9450,7 +9154,7 @@ fi -rm -f core conftest.err conftest.$ac_objext \ +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ conftest$ac_exeext conftest.$ac_ext if test -z "$aix_libpath"; then aix_libpath="/usr/lib:/lib"; fi @@ -10570,7 +10274,7 @@ test -n "$runpath_var" || \ test "X$hardcode_automatic" = "Xyes" ; then - # We can hardcode non-existant directories. + # We can hardcode non-existent directories. if test "$hardcode_direct" != no && # If the only mechanism to avoid hardcoding is shlibpath_var, we # have to relink, otherwise we might link with an installed library @@ -10698,27 +10402,11 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest$ac_exeext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then ac_cv_lib_dl_dlopen=yes else echo "$as_me: failed program was:" >&5 @@ -10727,7 +10415,7 @@ ac_cv_lib_dl_dlopen=no fi -rm -f core conftest.err conftest.$ac_objext \ +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ conftest$ac_exeext conftest.$ac_ext LIBS=$ac_check_lib_save_LIBS fi @@ -10809,27 +10497,11 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest$ac_exeext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then ac_cv_func_shl_load=yes else echo "$as_me: failed program was:" >&5 @@ -10838,7 +10510,7 @@ ac_cv_func_shl_load=no fi -rm -f core conftest.err conftest.$ac_objext \ +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ conftest$ac_exeext conftest.$ac_ext fi { echo "$as_me:$LINENO: result: $ac_cv_func_shl_load" >&5 @@ -10888,27 +10560,11 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest$ac_exeext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then ac_cv_lib_dld_shl_load=yes else echo "$as_me: failed program was:" >&5 @@ -10917,7 +10573,7 @@ ac_cv_lib_dld_shl_load=no fi -rm -f core conftest.err conftest.$ac_objext \ +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ conftest$ac_exeext conftest.$ac_ext LIBS=$ac_check_lib_save_LIBS fi @@ -10978,38 +10634,22 @@ _ACEOF rm -f conftest.$ac_objext conftest$ac_exeext if { (ac_try="$ac_link" -case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_link") 2>conftest.er1 - ac_status=$? - grep -v '^ *+' conftest.er1 >conftest.err - rm -f conftest.er1 - cat conftest.err >&5 - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest$ac_exeext' - { (case "(($ac_try" in +case "(($ac_try" in *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; *) ac_try_echo=$ac_try;; esac eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 + (eval "$ac_link") 2>conftest.er1 ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then ac_cv_func_dlopen=yes else echo "$as_me: failed program was:" >&5 @@ -11018,7 +10658,7 @@ ac_cv_func_dlopen=no fi -rm -f core conftest.err conftest.$ac_objext \ +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ conftest$ac_exeext conftest.$ac_ext fi { echo "$as_me:$LINENO: result: $ac_cv_func_dlopen" >&5 @@ -11068,27 +10708,11 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest$ac_exeext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then ac_cv_lib_dl_dlopen=yes else echo "$as_me: failed program was:" >&5 @@ -11097,7 +10721,7 @@ ac_cv_lib_dl_dlopen=no fi -rm -f core conftest.err conftest.$ac_objext \ +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ conftest$ac_exeext conftest.$ac_ext LIBS=$ac_check_lib_save_LIBS fi @@ -11148,27 +10772,11 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest$ac_exeext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then ac_cv_lib_svld_dlopen=yes else echo "$as_me: failed program was:" >&5 @@ -11177,7 +10785,7 @@ ac_cv_lib_svld_dlopen=no fi -rm -f core conftest.err conftest.$ac_objext \ +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ conftest$ac_exeext conftest.$ac_ext LIBS=$ac_check_lib_save_LIBS fi @@ -11228,27 +10836,11 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest$ac_exeext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then ac_cv_lib_dld_dld_link=yes else echo "$as_me: failed program was:" >&5 @@ -11257,7 +10849,7 @@ ac_cv_lib_dld_dld_link=no fi -rm -f core conftest.err conftest.$ac_objext \ +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ conftest$ac_exeext conftest.$ac_ext LIBS=$ac_check_lib_save_LIBS fi @@ -11313,7 +10905,7 @@ lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext < conftest.$ac_ext <&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_cxx_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest$ac_exeext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then aix_libpath=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e '/Import File Strings/,/^$/ { /^0/ { s/^0 *\(.*\)$/\1/; p; } }'` @@ -12534,7 +12110,7 @@ fi -rm -f core conftest.err conftest.$ac_objext \ +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ conftest$ac_exeext conftest.$ac_ext if test -z "$aix_libpath"; then aix_libpath="/usr/lib:/lib"; fi @@ -12576,27 +12152,11 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_cxx_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest$ac_exeext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then aix_libpath=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e '/Import File Strings/,/^$/ { /^0/ { s/^0 *\(.*\)$/\1/; p; } }'` @@ -12610,7 +12170,7 @@ fi -rm -f core conftest.err conftest.$ac_objext \ +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ conftest$ac_exeext conftest.$ac_ext if test -z "$aix_libpath"; then aix_libpath="/usr/lib:/lib"; fi @@ -13781,11 +13341,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:13784: $lt_compile\"" >&5) + (eval echo "\"\$as_me:13344: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:13788: \$? = $ac_status" >&5 + echo "$as_me:13348: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -13885,11 +13445,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:13888: $lt_compile\"" >&5) + (eval echo "\"\$as_me:13448: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:13892: \$? = $ac_status" >&5 + echo "$as_me:13452: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized @@ -14633,7 +14193,7 @@ test -n "$runpath_var_CXX" || \ test "X$hardcode_automatic_CXX" = "Xyes" ; then - # We can hardcode non-existant directories. + # We can hardcode non-existent directories. if test "$hardcode_direct_CXX" != no && # If the only mechanism to avoid hardcoding is shlibpath_var, we # have to relink, otherwise we might link with an installed library @@ -15455,11 +15015,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:15458: $lt_compile\"" >&5) + (eval echo "\"\$as_me:15018: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:15462: \$? = $ac_status" >&5 + echo "$as_me:15022: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -15559,11 +15119,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:15562: $lt_compile\"" >&5) + (eval echo "\"\$as_me:15122: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:15566: \$? = $ac_status" >&5 + echo "$as_me:15126: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized @@ -16029,27 +15589,11 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_f77_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest$ac_exeext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_f77_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then aix_libpath=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e '/Import File Strings/,/^$/ { /^0/ { s/^0 *\(.*\)$/\1/; p; } }'` @@ -16063,7 +15607,7 @@ fi -rm -f core conftest.err conftest.$ac_objext \ +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ conftest$ac_exeext conftest.$ac_ext if test -z "$aix_libpath"; then aix_libpath="/usr/lib:/lib"; fi @@ -16094,27 +15638,11 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_f77_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest$ac_exeext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_f77_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then aix_libpath=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e '/Import File Strings/,/^$/ { /^0/ { s/^0 *\(.*\)$/\1/; p; } }'` @@ -16128,7 +15656,7 @@ fi -rm -f core conftest.err conftest.$ac_objext \ +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ conftest$ac_exeext conftest.$ac_ext if test -z "$aix_libpath"; then aix_libpath="/usr/lib:/lib"; fi @@ -17248,7 +16776,7 @@ test -n "$runpath_var_F77" || \ test "X$hardcode_automatic_F77" = "Xyes" ; then - # We can hardcode non-existant directories. + # We can hardcode non-existent directories. if test "$hardcode_direct_F77" != no && # If the only mechanism to avoid hardcoding is shlibpath_var, we # have to relink, otherwise we might link with an installed library @@ -17794,11 +17322,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:17797: $lt_compile\"" >&5) + (eval echo "\"\$as_me:17325: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:17801: \$? = $ac_status" >&5 + echo "$as_me:17329: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -18062,11 +17590,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:18065: $lt_compile\"" >&5) + (eval echo "\"\$as_me:17593: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:18069: \$? = $ac_status" >&5 + echo "$as_me:17597: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -18166,11 +17694,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:18169: $lt_compile\"" >&5) + (eval echo "\"\$as_me:17697: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:18173: \$? = $ac_status" >&5 + echo "$as_me:17701: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized @@ -18646,27 +18174,11 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest$ac_exeext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then aix_libpath=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e '/Import File Strings/,/^$/ { /^0/ { s/^0 *\(.*\)$/\1/; p; } }'` @@ -18680,7 +18192,7 @@ fi -rm -f core conftest.err conftest.$ac_objext \ +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ conftest$ac_exeext conftest.$ac_ext if test -z "$aix_libpath"; then aix_libpath="/usr/lib:/lib"; fi @@ -18721,27 +18233,11 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest$ac_exeext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then aix_libpath=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e '/Import File Strings/,/^$/ { /^0/ { s/^0 *\(.*\)$/\1/; p; } }'` @@ -18755,7 +18251,7 @@ fi -rm -f core conftest.err conftest.$ac_objext \ +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ conftest$ac_exeext conftest.$ac_ext if test -z "$aix_libpath"; then aix_libpath="/usr/lib:/lib"; fi @@ -19875,7 +19371,7 @@ test -n "$runpath_var_GCJ" || \ test "X$hardcode_automatic_GCJ" = "Xyes" ; then - # We can hardcode non-existant directories. + # We can hardcode non-existent directories. if test "$hardcode_direct_GCJ" != no && # If the only mechanism to avoid hardcoding is shlibpath_var, we # have to relink, otherwise we might link with an installed library @@ -21465,27 +20961,10 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest.$ac_objext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then ac_cv_header_stdc=yes else echo "$as_me: failed program was:" >&5 @@ -21513,7 +20992,7 @@ else ac_cv_header_stdc=no fi -rm -f conftest* +rm -f -r conftest* fi @@ -21534,7 +21013,7 @@ else ac_cv_header_stdc=no fi -rm -f conftest* +rm -f -r conftest* fi @@ -21662,27 +21141,10 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest.$ac_objext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then ac_cv_header_sys_wait_h=yes else echo "$as_me: failed program was:" >&5 @@ -21745,27 +21207,11 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest$ac_exeext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then llvm_cv_link_use_r=yes else echo "$as_me: failed program was:" >&5 @@ -21774,7 +21220,7 @@ llvm_cv_link_use_r=no fi -rm -f core conftest.err conftest.$ac_objext \ +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ conftest$ac_exeext conftest.$ac_ext CFLAGS="$oldcflags" ac_ext=c @@ -21859,27 +21305,11 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest$ac_exeext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then ac_cv_func_re_comp=yes else echo "$as_me: failed program was:" >&5 @@ -21888,7 +21318,7 @@ ac_cv_func_re_comp=no fi -rm -f core conftest.err conftest.$ac_objext \ +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ conftest$ac_exeext conftest.$ac_ext fi { echo "$as_me:$LINENO: result: $ac_cv_func_re_comp" >&5 @@ -22076,7 +21506,8 @@ ## M4sh Initialization. ## ## --------------------- ## -# Be Bourne compatible +# Be more Bourne compatible +DUALCASE=1; export DUALCASE # for MKS sh if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then emulate sh NULLCMD=: @@ -22085,10 +21516,13 @@ alias -g '${1+"$@"}'='"$@"' setopt NO_GLOB_SUBST else - case `(set -o) 2>/dev/null` in *posix*) set -o posix;; esac + case `(set -o) 2>/dev/null` in + *posix*) set -o posix ;; +esac + fi -BIN_SH=xpg4; export BIN_SH # for Tru64 -DUALCASE=1; export DUALCASE # for MKS sh + + # PATH needs CR @@ -22312,19 +21746,28 @@ as_mkdir_p=false fi -# Find out whether ``test -x'' works. Don't use a zero-byte file, as -# systems may use methods other than mode bits to determine executability. -cat >conf$$.file <<_ASEOF -#! /bin/sh -exit 0 -_ASEOF -chmod +x conf$$.file -if test -x conf$$.file >/dev/null 2>&1; then - as_executable_p="test -x" +if test -x / >/dev/null 2>&1; then + as_test_x='test -x' else - as_executable_p=: + if ls -dL / >/dev/null 2>&1; then + as_ls_L_option=L + else + as_ls_L_option= + fi + as_test_x=' + eval sh -c '\'' + if test -d "$1"; then + test -d "$1/."; + else + case $1 in + -*)set "./$1";; + esac; + case `ls -ld'$as_ls_L_option' "$1" 2>/dev/null` in + ???[sx]*):;;*)false;;esac;fi + '\'' sh + ' fi -rm -f conf$$.file +as_executable_p=$as_test_x # Sed expression to map a string onto a valid CPP name. as_tr_cpp="eval sed 'y%*$as_cr_letters%P$as_cr_LETTERS%;s%[^_$as_cr_alnum]%_%g'" @@ -22340,7 +21783,7 @@ # values after options handling. ac_log=" This file was extended by LLVM-TEST $as_me 2.8svn, which was -generated by GNU Autoconf 2.60. Invocation command line was +generated by GNU Autoconf 2.61. Invocation command line was CONFIG_FILES = $CONFIG_FILES CONFIG_HEADERS = $CONFIG_HEADERS @@ -22368,7 +21811,7 @@ Usage: $0 [OPTIONS] [FILE]... -h, --help print this help, then exit - -V, --version print version number, then exit + -V, --version print version number and configuration settings, then exit -q, --quiet do not print progress messages -d, --debug don't remove temporary files --recheck update $as_me by reconfiguring in the same conditions @@ -22387,7 +21830,7 @@ cat >>$CONFIG_STATUS <<_ACEOF ac_cs_version="\\ LLVM-TEST config.status 2.8svn -configured by $0, generated by GNU Autoconf 2.60, +configured by $0, generated by GNU Autoconf 2.61, with options \\"`echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" Copyright (C) 2006 Free Software Foundation, Inc. @@ -22654,6 +22097,15 @@ LLVM_SRC!$LLVM_SRC$ac_delim LLVM_OBJ!$LLVM_OBJ$ac_delim LLVM_EXTERNALS!$LLVM_EXTERNALS$ac_delim +LLVMGCC!$LLVMGCC$ac_delim +LLVMGXX!$LLVMGXX$ac_delim +LLVMCC_EMITIR_FLAG!$LLVMCC_EMITIR_FLAG$ac_delim +LLVMCC1!$LLVMCC1$ac_delim +LLVMCC1PLUS!$LLVMCC1PLUS$ac_delim +LLVMGCCDIR!$LLVMGCCDIR$ac_delim +LLVMGCC_LANGS!$LLVMGCC_LANGS$ac_delim +LLVMGCC_DRAGONEGG!$LLVMGCC_DRAGONEGG$ac_delim +LLVMCC_DISABLEOPT_FLAGS!$LLVMCC_DISABLEOPT_FLAGS$ac_delim SPEC95_ROOT!$SPEC95_ROOT$ac_delim USE_SPEC95!$USE_SPEC95$ac_delim SPEC2000_ROOT!$SPEC2000_ROOT$ac_delim @@ -22677,15 +22129,6 @@ SKIDMARKS10_ROOT!$SKIDMARKS10_ROOT$ac_delim USE_SKIDMARKS10!$USE_SKIDMARKS10$ac_delim DISABLE_LLC_DIFFS!$DISABLE_LLC_DIFFS$ac_delim -CXX!$CXX$ac_delim -CXXFLAGS!$CXXFLAGS$ac_delim -ac_ct_CXX!$ac_ct_CXX$ac_delim -ifGNUmake!$ifGNUmake$ac_delim -LN_S!$LN_S$ac_delim -ECHO!$ECHO$ac_delim -AR!$AR$ac_delim -RANLIB!$RANLIB$ac_delim -STRIP!$STRIP$ac_delim _ACEOF if test `sed -n "s/.*$ac_delim\$/X/p" conf$$subs.sed | grep -c X` = 97; then @@ -22727,6 +22170,15 @@ ac_delim='%!_!# ' for ac_last_try in false false false false false :; do cat >conf$$subs.sed <<_ACEOF +CXX!$CXX$ac_delim +CXXFLAGS!$CXXFLAGS$ac_delim +ac_ct_CXX!$ac_ct_CXX$ac_delim +ifGNUmake!$ifGNUmake$ac_delim +LN_S!$LN_S$ac_delim +ECHO!$ECHO$ac_delim +AR!$AR$ac_delim +RANLIB!$RANLIB$ac_delim +STRIP!$STRIP$ac_delim CXXCPP!$CXXCPP$ac_delim F77!$F77$ac_delim FFLAGS!$FFLAGS$ac_delim @@ -22750,7 +22202,7 @@ LTLIBOBJS!$LTLIBOBJS$ac_delim _ACEOF - if test `sed -n "s/.*$ac_delim\$/X/p" conf$$subs.sed | grep -c X` = 21; then + if test `sed -n "s/.*$ac_delim\$/X/p" conf$$subs.sed | grep -c X` = 30; then break elif $ac_last_try; then { { echo "$as_me:$LINENO: error: could not make $CONFIG_STATUS" >&5 From eli.friedman at gmail.com Tue Sep 20 18:59:30 2011 From: eli.friedman at gmail.com (Eli Friedman) Date: Tue, 20 Sep 2011 16:59:30 -0700 Subject: [llvm-commits] [llvm] r140107 - in /llvm/trunk/test/CodeGen/X86: 2006-05-11-InstrSched.ll 2009-06-05-ScalarToVectorByteMMX.ll movgs.ll v2f32.ll vec_set-C.ll In-Reply-To: References: <20110920000812.E20BC2A6C12C@llvm.org> Message-ID: On Tue, Sep 20, 2011 at 4:51 PM, Bruno Cardoso Lopes wrote: > Hi Eli, > >> I think there's a real regression here... I'm pretty sure you "broke" >> the fix in r100559 (see also >> http://llvm.org/bugs/show_bug.cgi?id=6696). ?Not sure how much we >> care, though. > > I actually care, but if you follow it closely, you're going to notice > that all getReserveFP() calls introduced in r100559, were removed > afterwards (I can't find it in the history where that happened though) Jakob did that, I think (132199 etc.). > and this didn't trigger PR6696 for Linux, explanation: In the mean > time Linux stack default alignment was changed to 128-bit, and the > stack alignment heuristic was never needed anymore. It reappeared for > AVX, because of the explanation I wrote in r139939's commit message. > Besides that, when I replaced getReserveFP() for > getForceFramePointer() in X86MaxStackAlignmentHeuristicPass, all I > actually did was to restore the behavior added in r100559, which isn't > needed anymore for Linux because of the 128-bit alignment. Anyway, if > you have any concrete example where it did break, let me know! With the current state on trunk, there's a missed optimization on Windows with -fomit-frame-pointer and SSE, and on all platforms with -fomit-frame-pointer and AVX: we build the frame pointer when it isn't necessary. Granted, it isn't really such a great optimization considering that the execution cost of any vector code is likely to be much greater than the cost of pushing and popping the frame pointer, but it was working at one point. -Eli From echristo at apple.com Tue Sep 20 18:58:15 2011 From: echristo at apple.com (Eric Christopher) Date: Tue, 20 Sep 2011 23:58:15 -0000 Subject: [llvm-commits] [llvm] r140216 - in /llvm/trunk: autoconf/configure.ac configure test/CodeGen/CBackend/X86/dg.exp test/lib/llvm.exp test/lit.cfg Message-ID: <20110920235815.9F7592A6C12C@llvm.org> Author: echristo Date: Tue Sep 20 18:58:15 2011 New Revision: 140216 URL: http://llvm.org/viewvc/llvm-project?rev=140216&view=rev Log: Remove llvm-gcc and various compiler handling from llvm. It's not needed here anymore and has been migrated to the test-suite project. Modified: llvm/trunk/autoconf/configure.ac llvm/trunk/configure llvm/trunk/test/CodeGen/CBackend/X86/dg.exp llvm/trunk/test/lib/llvm.exp llvm/trunk/test/lit.cfg Modified: llvm/trunk/autoconf/configure.ac URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/autoconf/configure.ac?rev=140216&r1=140215&r2=140216&view=diff ============================================================================== --- llvm/trunk/autoconf/configure.ac (original) +++ llvm/trunk/autoconf/configure.ac Tue Sep 20 18:58:15 2011 @@ -724,47 +724,6 @@ AC_DEFINE_UNQUOTED([ENABLE_CBE_PRINTF_A],$ENABLE_CBE_PRINTF_A, [Define if CBE is enabled for printf %a output]) -dnl Allow a specific llvm-gcc/llvm-g++ pair to be used with this LLVM config. -AC_ARG_WITH(llvmgccdir, - AS_HELP_STRING([--with-llvmgccdir], - [Specify location of llvm-gcc install dir (default searches PATH)]),, - withval=default) -case "$withval" in - default) WITH_LLVMGCCDIR=default ;; - /* | [[A-Za-z]]:[[\\/]]*) WITH_LLVMGCCDIR=$withval ;; - *) AC_MSG_ERROR([Invalid path for --with-llvmgccdir. Provide full path]) ;; -esac - -dnl Allow a specific llvm-gcc compiler to be used with this LLVM config. -AC_ARG_WITH(llvmgcc, - AS_HELP_STRING([--with-llvmgcc], - [Specify location of llvm-gcc driver (default searches PATH)]), - LLVMGCC=$with_llvmgcc - WITH_LLVMGCCDIR="",) - -dnl Allow a specific llvm-g++ compiler to be used with this LLVM config. -AC_ARG_WITH(llvmgxx, - AS_HELP_STRING([--with-llvmgxx], - [Specify location of llvm-g++ driver (default searches PATH)]), - LLVMGXX=$with_llvmgxx - WITH_LLVMGCCDIR="",) - -if test -n "$LLVMGCC"; then - LLVMGCCCOMMAND="$LLVMGCC" -fi - -if test -n "$LLVMGXX"; then - LLVMGXXCOMMAND="$LLVMGXX" -fi - -if test -n "$LLVMGCC" && test -z "$LLVMGXX"; then - AC_MSG_ERROR([Invalid llvm-g++. Use --with-llvmgxx when --with-llvmgcc is used]); -fi - -if test -n "$LLVMGXX" && test -z "$LLVMGCC"; then - AC_MSG_ERROR([Invalid llvm-gcc. Use --with-llvmgcc when --with-llvmgxx is used]); -fi - dnl Allow a specific Clang compiler to be used with this LLVM config. AC_ARG_WITH(clang, AS_HELP_STRING([--with-clang], @@ -1142,33 +1101,8 @@ AC_LIBTOOL_DLOPEN AC_LIB_LTDL -if test "$WITH_LLVMGCCDIR" = "default" ; then - LLVMGCC="llvm-gcc${EXEEXT}" - LLVMGXX="llvm-g++${EXEEXT}" - LLVMGCCCOMMAND="$LLVMGCC" - LLVMGXXCOMMAND="$LLVMGXX" - AC_SUBST(LLVMGCCCOMMAND,$LLVMGCCCOMMAND) - AC_SUBST(LLVMGXXCOMMAND,$LLVMGXXCOMMAND) - AC_PATH_PROG(LLVMGCC, $LLVMGCC, []) - AC_PATH_PROG(LLVMGXX, $LLVMGXX, []) -else - if test -z "$LLVMGCC"; then - LLVMGCC="$WITH_LLVMGCCDIR/bin/llvm-gcc${EXEEXT}" - LLVMGCCCOMMAND="$LLVMGCC" - fi - if test -z "$LLVMGXX"; then - LLVMGXX="$WITH_LLVMGCCDIR/bin/llvm-g++${EXEEXT}" - LLVMGXXCOMMAND="$LLVMGXX" - fi - - AC_SUBST(LLVMGCC,$LLVMGCC) - AC_SUBST(LLVMGXX,$LLVMGXX) - AC_SUBST(LLVMGCCCOMMAND,$LLVMGCCCOMMAND) - AC_SUBST(LLVMGXXCOMMAND,$LLVMGXXCOMMAND) -fi - -dnl Select the LLVM capable compiler to use, we default to using llvm-gcc if -dnl found, otherwise clang if available. +dnl Select the LLVM capable compiler to use, we default to using clang if +dnl found. AC_ARG_WITH(llvmcc, AS_HELP_STRING([--with-llvmcc=], [Choose the LLVM capable compiler to use (llvm-gcc, clang, or none; default=check)]), @@ -1178,11 +1112,9 @@ if (test "$with_llvmcc" != "llvm-gcc" && test "$with_llvmcc" != "clang" && test "$with_llvmcc" != "none"); then - AC_MSG_ERROR([invalid value for --with-llvmcc, expected 'llvm-gcc', 'clang', or 'none'.]) + AC_MSG_ERROR([invalid value for --with-llvmcc, expected 'clang', 'llvm-gcc', or 'none'.]) fi WITH_LLVMCC="$with_llvmcc" -elif test -n "$LLVMGCC"; then - WITH_LLVMCC=llvm-gcc elif test -n "$WITH_CLANGPATH" || test "$WITH_BUILT_CLANG" -ne "0"; then WITH_LLVMCC=clang else @@ -1539,60 +1471,6 @@ dnl Check whether __dso_handle is present AC_CHECK_FUNCS([__dso_handle]) -dnl Check whether llvm-gcc is based on dragonegg -AC_CACHE_CHECK([whether llvm-gcc is dragonegg],[llvm_cv_llvmgcc_dragonegg], -[llvm_cv_llvmgcc_dragonegg="no" -if test -n "$LLVMGCC" ; then - cp /dev/null conftest.c - $LLVMGCC -fplugin-arg-dragonegg-emit-ir -S -o - conftest.c > /dev/null 2>&1 - if test $? -eq 0 ; then - llvm_cv_llvmgcc_dragonegg="yes" - fi - rm conftest.c -fi]) - -dnl Set the flags needed to emit LLVM IR and to disable optimizations -dnl in llvmgcc -if test "$llvm_cv_llvmgcc_dragonegg" = "yes" ; then - LLVMCC_EMITIR_FLAG="-fplugin-arg-dragonegg-emit-ir" - LLVMCC_DISABLEOPT_FLAGS="-fplugin-arg-dragonegg-llvm-ir-optimize=0" -else - LLVMCC_EMITIR_FLAG="-emit-llvm" - LLVMCC_DISABLEOPT_FLAGS="-mllvm -disable-llvm-optzns" -fi - -AC_SUBST(LLVMCC_EMITIR_FLAG) - -dnl See if the llvm-gcc executable can compile to LLVM assembly -AC_CACHE_CHECK([whether llvm-gcc is sane],[llvm_cv_llvmgcc_sanity], -[llvm_cv_llvmgcc_sanity="no" -if test -n "$LLVMGCC" ; then - cp /dev/null conftest.c - $LLVMGCC "$LLVMCC_EMITIR_FLAG" -S -o - conftest.c | \ - grep 'target datalayout =' > /dev/null 2>&1 - if test $? -eq 0 ; then - llvm_cv_llvmgcc_sanity="yes" - fi - rm conftest.c -fi]) - -dnl Since we have a sane llvm-gcc, identify it and its sub-tools -dnl Furthermore, add some information about the tools -if test "$llvm_cv_llvmgcc_sanity" = "yes" ; then - AC_MSG_CHECKING([llvm-gcc component support]) - llvmcc1path=`$LLVMGCC --print-prog-name=cc1` - AC_SUBST(LLVMCC1,$llvmcc1path) - llvmcc1pluspath=`$LLVMGCC --print-prog-name=cc1plus` - AC_SUBST(LLVMCC1PLUS,$llvmcc1pluspath) - llvmgccdir=`echo "$llvmcc1path" | sed 's,/libexec/.*,,'` - AC_SUBST(LLVMGCCDIR,$llvmgccdir) - llvmgcclangs=[`$LLVMGCC -v --help 2>&1 | grep '^Configured with:' | sed 's/^.*--enable-languages=\([^ ]*\).*/\1/'`] - AC_SUBST(LLVMGCC_LANGS,$llvmgcclangs) - AC_SUBST(LLVMGCC_DRAGONEGG,$llvm_cv_llvmgcc_dragonegg) - AC_SUBST(LLVMCC_DISABLEOPT_FLAGS) - AC_MSG_RESULT([ok]) -fi - dnl Propagate the shared library extension that the libltdl checks did to dnl the Makefiles so we can use it there too AC_SUBST(SHLIBEXT,$libltdl_cv_shlibext) Modified: llvm/trunk/configure URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/configure?rev=140216&r1=140215&r2=140216&view=diff ============================================================================== --- llvm/trunk/configure (original) +++ llvm/trunk/configure Tue Sep 20 18:58:15 2011 @@ -763,10 +763,6 @@ CONVENIENCE_LTDL_TRUE CONVENIENCE_LTDL_FALSE LIBADD_DL -LLVMGCCCOMMAND -LLVMGXXCOMMAND -LLVMGCC -LLVMGXX LLVMCC_OPTION NO_VARIADIC_MACROS NO_MISSING_FIELD_INITIALIZERS @@ -775,13 +771,6 @@ HAVE_PTHREAD HUGE_VAL_SANITY MMAP_FILE -LLVMCC_EMITIR_FLAG -LLVMCC1 -LLVMCC1PLUS -LLVMGCCDIR -LLVMGCC_LANGS -LLVMGCC_DRAGONEGG -LLVMCC_DISABLEOPT_FLAGS SHLIBEXT SHLIBPATH_VAR LLVM_PREFIX @@ -1442,12 +1431,6 @@ Optional Packages: --with-PACKAGE[=ARG] use PACKAGE [ARG=yes] --without-PACKAGE do not use PACKAGE (same as --with-PACKAGE=no) - --with-llvmgccdir Specify location of llvm-gcc install dir (default - searches PATH) - --with-llvmgcc Specify location of llvm-gcc driver (default - searches PATH) - --with-llvmgxx Specify location of llvm-g++ driver (default - searches PATH) --with-clang Specify location of clang compiler (default is --with-built-clang) --with-built-clang Use the compiled Clang as the LLVM compiler @@ -5444,58 +5427,6 @@ -# Check whether --with-llvmgccdir was given. -if test "${with_llvmgccdir+set}" = set; then - withval=$with_llvmgccdir; -else - withval=default -fi - -case "$withval" in - default) WITH_LLVMGCCDIR=default ;; - /* | [A-Za-z]:[\\/]*) WITH_LLVMGCCDIR=$withval ;; - *) { { echo "$as_me:$LINENO: error: Invalid path for --with-llvmgccdir. Provide full path" >&5 -echo "$as_me: error: Invalid path for --with-llvmgccdir. Provide full path" >&2;} - { (exit 1); exit 1; }; } ;; -esac - - -# Check whether --with-llvmgcc was given. -if test "${with_llvmgcc+set}" = set; then - withval=$with_llvmgcc; LLVMGCC=$with_llvmgcc - WITH_LLVMGCCDIR="" -fi - - - -# Check whether --with-llvmgxx was given. -if test "${with_llvmgxx+set}" = set; then - withval=$with_llvmgxx; LLVMGXX=$with_llvmgxx - WITH_LLVMGCCDIR="" -fi - - -if test -n "$LLVMGCC"; then - LLVMGCCCOMMAND="$LLVMGCC" -fi - -if test -n "$LLVMGXX"; then - LLVMGXXCOMMAND="$LLVMGXX" -fi - -if test -n "$LLVMGCC" && test -z "$LLVMGXX"; then - { { echo "$as_me:$LINENO: error: Invalid llvm-g++. Use --with-llvmgxx when --with-llvmgcc is used" >&5 -echo "$as_me: error: Invalid llvm-g++. Use --with-llvmgxx when --with-llvmgcc is used" >&2;} - { (exit 1); exit 1; }; }; -fi - -if test -n "$LLVMGXX" && test -z "$LLVMGCC"; then - { { echo "$as_me:$LINENO: error: Invalid llvm-gcc. Use --with-llvmgcc when --with-llvmgxx is used" >&5 -echo "$as_me: error: Invalid llvm-gcc. Use --with-llvmgcc when --with-llvmgxx is used" >&2;} - { (exit 1); exit 1; }; }; -fi - - # Check whether --with-clang was given. if test "${with_clang+set}" = set; then withval=$with_clang; @@ -10595,7 +10526,7 @@ lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext <&5 -echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } -if test "${ac_cv_path_LLVMGCC+set}" = set; then - echo $ECHO_N "(cached) $ECHO_C" >&6 -else - case $LLVMGCC in - [\\/]* | ?:[\\/]*) - ac_cv_path_LLVMGCC="$LLVMGCC" # Let the user override the test with a path. - ;; - *) - as_save_IFS=$IFS; IFS=$PATH_SEPARATOR -for as_dir in $PATH -do - IFS=$as_save_IFS - test -z "$as_dir" && as_dir=. - for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then - ac_cv_path_LLVMGCC="$as_dir/$ac_word$ac_exec_ext" - echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 - break 2 - fi -done -done -IFS=$as_save_IFS - - ;; -esac -fi -LLVMGCC=$ac_cv_path_LLVMGCC -if test -n "$LLVMGCC"; then - { echo "$as_me:$LINENO: result: $LLVMGCC" >&5 -echo "${ECHO_T}$LLVMGCC" >&6; } -else - { echo "$as_me:$LINENO: result: no" >&5 -echo "${ECHO_T}no" >&6; } -fi - - - # Extract the first word of "$LLVMGXX", so it can be a program name with args. -set dummy $LLVMGXX; ac_word=$2 -{ echo "$as_me:$LINENO: checking for $ac_word" >&5 -echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } -if test "${ac_cv_path_LLVMGXX+set}" = set; then - echo $ECHO_N "(cached) $ECHO_C" >&6 -else - case $LLVMGXX in - [\\/]* | ?:[\\/]*) - ac_cv_path_LLVMGXX="$LLVMGXX" # Let the user override the test with a path. - ;; - *) - as_save_IFS=$IFS; IFS=$PATH_SEPARATOR -for as_dir in $PATH -do - IFS=$as_save_IFS - test -z "$as_dir" && as_dir=. - for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then - ac_cv_path_LLVMGXX="$as_dir/$ac_word$ac_exec_ext" - echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 - break 2 - fi -done -done -IFS=$as_save_IFS - - ;; -esac -fi -LLVMGXX=$ac_cv_path_LLVMGXX -if test -n "$LLVMGXX"; then - { echo "$as_me:$LINENO: result: $LLVMGXX" >&5 -echo "${ECHO_T}$LLVMGXX" >&6; } -else - { echo "$as_me:$LINENO: result: no" >&5 -echo "${ECHO_T}no" >&6; } -fi - - -else - if test -z "$LLVMGCC"; then - LLVMGCC="$WITH_LLVMGCCDIR/bin/llvm-gcc${EXEEXT}" - LLVMGCCCOMMAND="$LLVMGCC" - fi - if test -z "$LLVMGXX"; then - LLVMGXX="$WITH_LLVMGCCDIR/bin/llvm-g++${EXEEXT}" - LLVMGXXCOMMAND="$LLVMGXX" - fi - - LLVMGCC=$LLVMGCC - - LLVMGXX=$LLVMGXX - - LLVMGCCCOMMAND=$LLVMGCCCOMMAND - - LLVMGXXCOMMAND=$LLVMGXXCOMMAND - -fi - # Check whether --with-llvmcc was given. if test "${with_llvmcc+set}" = set; then @@ -12378,13 +12200,11 @@ if (test "$with_llvmcc" != "llvm-gcc" && test "$with_llvmcc" != "clang" && test "$with_llvmcc" != "none"); then - { { echo "$as_me:$LINENO: error: invalid value for --with-llvmcc, expected 'llvm-gcc', 'clang', or 'none'." >&5 -echo "$as_me: error: invalid value for --with-llvmcc, expected 'llvm-gcc', 'clang', or 'none'." >&2;} + { { echo "$as_me:$LINENO: error: invalid value for --with-llvmcc, expected 'clang', 'llvm-gcc', or 'none'." >&5 +echo "$as_me: error: invalid value for --with-llvmcc, expected 'clang', 'llvm-gcc', or 'none'." >&2;} { (exit 1); exit 1; }; } fi WITH_LLVMCC="$with_llvmcc" -elif test -n "$LLVMGCC"; then - WITH_LLVMCC=llvm-gcc elif test -n "$WITH_CLANGPATH" || test "$WITH_BUILT_CLANG" -ne "0"; then WITH_LLVMCC=clang else @@ -21249,75 +21069,6 @@ done -{ echo "$as_me:$LINENO: checking whether llvm-gcc is dragonegg" >&5 -echo $ECHO_N "checking whether llvm-gcc is dragonegg... $ECHO_C" >&6; } -if test "${llvm_cv_llvmgcc_dragonegg+set}" = set; then - echo $ECHO_N "(cached) $ECHO_C" >&6 -else - llvm_cv_llvmgcc_dragonegg="no" -if test -n "$LLVMGCC" ; then - cp /dev/null conftest.c - $LLVMGCC -fplugin-arg-dragonegg-emit-ir -S -o - conftest.c > /dev/null 2>&1 - if test $? -eq 0 ; then - llvm_cv_llvmgcc_dragonegg="yes" - fi - rm conftest.c -fi -fi -{ echo "$as_me:$LINENO: result: $llvm_cv_llvmgcc_dragonegg" >&5 -echo "${ECHO_T}$llvm_cv_llvmgcc_dragonegg" >&6; } - -if test "$llvm_cv_llvmgcc_dragonegg" = "yes" ; then - LLVMCC_EMITIR_FLAG="-fplugin-arg-dragonegg-emit-ir" - LLVMCC_DISABLEOPT_FLAGS="-fplugin-arg-dragonegg-llvm-ir-optimize=0" -else - LLVMCC_EMITIR_FLAG="-emit-llvm" - LLVMCC_DISABLEOPT_FLAGS="-mllvm -disable-llvm-optzns" -fi - - - -{ echo "$as_me:$LINENO: checking whether llvm-gcc is sane" >&5 -echo $ECHO_N "checking whether llvm-gcc is sane... $ECHO_C" >&6; } -if test "${llvm_cv_llvmgcc_sanity+set}" = set; then - echo $ECHO_N "(cached) $ECHO_C" >&6 -else - llvm_cv_llvmgcc_sanity="no" -if test -n "$LLVMGCC" ; then - cp /dev/null conftest.c - $LLVMGCC "$LLVMCC_EMITIR_FLAG" -S -o - conftest.c | \ - grep 'target datalayout =' > /dev/null 2>&1 - if test $? -eq 0 ; then - llvm_cv_llvmgcc_sanity="yes" - fi - rm conftest.c -fi -fi -{ echo "$as_me:$LINENO: result: $llvm_cv_llvmgcc_sanity" >&5 -echo "${ECHO_T}$llvm_cv_llvmgcc_sanity" >&6; } - -if test "$llvm_cv_llvmgcc_sanity" = "yes" ; then - { echo "$as_me:$LINENO: checking llvm-gcc component support" >&5 -echo $ECHO_N "checking llvm-gcc component support... $ECHO_C" >&6; } - llvmcc1path=`$LLVMGCC --print-prog-name=cc1` - LLVMCC1=$llvmcc1path - - llvmcc1pluspath=`$LLVMGCC --print-prog-name=cc1plus` - LLVMCC1PLUS=$llvmcc1pluspath - - llvmgccdir=`echo "$llvmcc1path" | sed 's,/libexec/.*,,'` - LLVMGCCDIR=$llvmgccdir - - llvmgcclangs=`$LLVMGCC -v --help 2>&1 | grep '^Configured with:' | sed 's/^.*--enable-languages=\([^ ]*\).*/\1/'` - LLVMGCC_LANGS=$llvmgcclangs - - LLVMGCC_DRAGONEGG=$llvm_cv_llvmgcc_dragonegg - - - { echo "$as_me:$LINENO: result: ok" >&5 -echo "${ECHO_T}ok" >&6; } -fi - SHLIBEXT=$libltdl_cv_shlibext @@ -22503,10 +22254,6 @@ CONVENIENCE_LTDL_TRUE!$CONVENIENCE_LTDL_TRUE$ac_delim CONVENIENCE_LTDL_FALSE!$CONVENIENCE_LTDL_FALSE$ac_delim LIBADD_DL!$LIBADD_DL$ac_delim -LLVMGCCCOMMAND!$LLVMGCCCOMMAND$ac_delim -LLVMGXXCOMMAND!$LLVMGXXCOMMAND$ac_delim -LLVMGCC!$LLVMGCC$ac_delim -LLVMGXX!$LLVMGXX$ac_delim LLVMCC_OPTION!$LLVMCC_OPTION$ac_delim NO_VARIADIC_MACROS!$NO_VARIADIC_MACROS$ac_delim NO_MISSING_FIELD_INITIALIZERS!$NO_MISSING_FIELD_INITIALIZERS$ac_delim @@ -22515,13 +22262,6 @@ HAVE_PTHREAD!$HAVE_PTHREAD$ac_delim HUGE_VAL_SANITY!$HUGE_VAL_SANITY$ac_delim MMAP_FILE!$MMAP_FILE$ac_delim -LLVMCC_EMITIR_FLAG!$LLVMCC_EMITIR_FLAG$ac_delim -LLVMCC1!$LLVMCC1$ac_delim -LLVMCC1PLUS!$LLVMCC1PLUS$ac_delim -LLVMGCCDIR!$LLVMGCCDIR$ac_delim -LLVMGCC_LANGS!$LLVMGCC_LANGS$ac_delim -LLVMGCC_DRAGONEGG!$LLVMGCC_DRAGONEGG$ac_delim -LLVMCC_DISABLEOPT_FLAGS!$LLVMCC_DISABLEOPT_FLAGS$ac_delim SHLIBEXT!$SHLIBEXT$ac_delim SHLIBPATH_VAR!$SHLIBPATH_VAR$ac_delim LLVM_PREFIX!$LLVM_PREFIX$ac_delim @@ -22536,47 +22276,6 @@ LLVM_CONFIGTIME!$LLVM_CONFIGTIME$ac_delim BINDINGS_TO_BUILD!$BINDINGS_TO_BUILD$ac_delim ALL_BINDINGS!$ALL_BINDINGS$ac_delim -_ACEOF - - if test `sed -n "s/.*$ac_delim\$/X/p" conf$$subs.sed | grep -c X` = 97; then - break - elif $ac_last_try; then - { { echo "$as_me:$LINENO: error: could not make $CONFIG_STATUS" >&5 -echo "$as_me: error: could not make $CONFIG_STATUS" >&2;} - { (exit 1); exit 1; }; } - else - ac_delim="$ac_delim!$ac_delim _$ac_delim!! " - fi -done - -ac_eof=`sed -n '/^CEOF[0-9]*$/s/CEOF/0/p' conf$$subs.sed` -if test -n "$ac_eof"; then - ac_eof=`echo "$ac_eof" | sort -nru | sed 1q` - ac_eof=`expr $ac_eof + 1` -fi - -cat >>$CONFIG_STATUS <<_ACEOF -cat >"\$tmp/subs-2.sed" <<\CEOF$ac_eof -/@[a-zA-Z_][a-zA-Z_0-9]*@/!b -_ACEOF -sed ' -s/[,\\&]/\\&/g; s/@/@|#_!!_#|/g -s/^/s,@/; s/!/@,|#_!!_#|/ -:n -t n -s/'"$ac_delim"'$/,g/; t -s/$/\\/; p -N; s/^.*\n//; s/[,\\&]/\\&/g; s/@/@|#_!!_#|/g; b n -' >>$CONFIG_STATUS >$CONFIG_STATUS <<_ACEOF -CEOF$ac_eof -_ACEOF - - -ac_delim='%!_!# ' -for ac_last_try in false false false false false :; do - cat >conf$$subs.sed <<_ACEOF OCAML_LIBDIR!$OCAML_LIBDIR$ac_delim ENABLE_VISIBILITY_INLINES_HIDDEN!$ENABLE_VISIBILITY_INLINES_HIDDEN$ac_delim RPATH!$RPATH$ac_delim @@ -22585,7 +22284,7 @@ LTLIBOBJS!$LTLIBOBJS$ac_delim _ACEOF - if test `sed -n "s/.*$ac_delim\$/X/p" conf$$subs.sed | grep -c X` = 6; then + if test `sed -n "s/.*$ac_delim\$/X/p" conf$$subs.sed | grep -c X` = 92; then break elif $ac_last_try; then { { echo "$as_me:$LINENO: error: could not make $CONFIG_STATUS" >&5 @@ -22603,7 +22302,7 @@ fi cat >>$CONFIG_STATUS <<_ACEOF -cat >"\$tmp/subs-3.sed" <<\CEOF$ac_eof +cat >"\$tmp/subs-2.sed" <<\CEOF$ac_eof /@[a-zA-Z_][a-zA-Z_0-9]*@/!b end _ACEOF sed ' @@ -22866,7 +22565,7 @@ s&@abs_top_builddir@&$ac_abs_top_builddir&;t t s&@INSTALL@&$ac_INSTALL&;t t $ac_datarootdir_hack -" $ac_file_inputs | sed -f "$tmp/subs-1.sed" | sed -f "$tmp/subs-2.sed" | sed -f "$tmp/subs-3.sed" >$tmp/out +" $ac_file_inputs | sed -f "$tmp/subs-1.sed" | sed -f "$tmp/subs-2.sed" >$tmp/out test -z "$ac_datarootdir_hack$ac_datarootdir_seen" && { ac_out=`sed -n '/\${datarootdir}/p' "$tmp/out"`; test -n "$ac_out"; } && Modified: llvm/trunk/test/CodeGen/CBackend/X86/dg.exp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CBackend/X86/dg.exp?rev=140216&r1=140215&r2=140216&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/CBackend/X86/dg.exp (original) +++ llvm/trunk/test/CodeGen/CBackend/X86/dg.exp Tue Sep 20 18:58:15 2011 @@ -1,5 +1,5 @@ load_lib llvm.exp -if { [llvm_supports_target X86] && [llvm_gcc_supports c] } { +if { [llvm_supports_target X86] } { RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp,s}]] } Modified: llvm/trunk/test/lib/llvm.exp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/lib/llvm.exp?rev=140216&r1=140215&r2=140216&view=diff ============================================================================== --- llvm/trunk/test/lib/llvm.exp (original) +++ llvm/trunk/test/lib/llvm.exp Tue Sep 20 18:58:15 2011 @@ -249,34 +249,6 @@ } } -# This procedure provides an interface to check the LLVMGCC_LANGS makefile -# variable to see if llvm-gcc supports compilation of a particular language. -proc llvm_gcc_supports { lang } { - global llvmgcc llvmgcc_langs - # validate the language choices and determine the name of the compiler - # component responsible for determining if the compiler has been built. - switch "$lang" { - ada { set file gnat1 } - c { set file cc1 } - c++ { set file cc1plus } - objc { set file cc1obj } - obj-c++ { set file cc1objplus } - fortran { set file f951 } - default { return 0 } - } - foreach supported_lang [split "$llvmgcc_langs" ,] { - if { "$lang" == "$supported_lang" } { - # FIXME: Knowing it is configured is not enough. We should do two more - # checks here. First, we need to run llvm-gcc -print-prog-name=$file to - # get the path to the compiler. If we don't get a path, the language isn't - # properly configured or built. If we do get a path, we should check to - # make sure that it is executable and perhaps even try executing it. - return 1; - } - } - return 0; -} - # This procedure provides an interface to check the TARGETS_TO_BUILD makefile # variable to see if a particular target has been configured to build. This # helps avoid running tests for targets that aren't available. Modified: llvm/trunk/test/lit.cfg URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/lit.cfg?rev=140216&r1=140215&r2=140216&view=diff ============================================================================== --- llvm/trunk/test/lit.cfg (original) +++ llvm/trunk/test/lit.cfg Tue Sep 20 18:58:15 2011 @@ -235,10 +235,6 @@ def llvm_supports_darwin_and_target(name): return 'darwin' in config.target_triple and llvm_supports_target(name) -langs = set([s.strip() for s in site_exp['llvmgcc_langs'].split(',')]) -def llvm_gcc_supports(name): - return name.strip() in langs - bindings = set([s.strip() for s in site_exp['llvm_bindings'].split(',')]) def llvm_supports_binding(name): return name.strip() in bindings From resistor at mac.com Tue Sep 20 19:25:23 2011 From: resistor at mac.com (Owen Anderson) Date: Wed, 21 Sep 2011 00:25:23 -0000 Subject: [llvm-commits] [llvm] r140217 - in /llvm/trunk/lib: MC/MCDisassembler/Disassembler.cpp MC/MCInstPrinter.cpp Target/ARM/InstPrinter/ARMInstPrinter.cpp Target/MBlaze/InstPrinter/MBlazeInstPrinter.cpp Target/MSP430/InstPrinter/MSP430InstPrinter.cpp Target/Mips/InstPrinter/MipsInstPrinter.cpp Target/PowerPC/InstPrinter/PPCInstPrinter.cpp Target/X86/InstPrinter/X86ATTInstPrinter.cpp Target/X86/InstPrinter/X86IntelInstPrinter.cpp Message-ID: <20110921002523.571DB2A6C12C@llvm.org> Author: resistor Date: Tue Sep 20 19:25:23 2011 New Revision: 140217 URL: http://llvm.org/viewvc/llvm-project?rev=140217&view=rev Log: In the disassembler C API, be careful not to confuse the comment streamer that the disassembler outputs annotations on with the streamer that the InstPrinter will print them on. Modified: llvm/trunk/lib/MC/MCDisassembler/Disassembler.cpp llvm/trunk/lib/MC/MCInstPrinter.cpp llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp llvm/trunk/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.cpp llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp llvm/trunk/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp llvm/trunk/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp llvm/trunk/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp Modified: llvm/trunk/lib/MC/MCDisassembler/Disassembler.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCDisassembler/Disassembler.cpp?rev=140217&r1=140216&r2=140217&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCDisassembler/Disassembler.cpp (original) +++ llvm/trunk/lib/MC/MCDisassembler/Disassembler.cpp Tue Sep 20 19:25:23 2011 @@ -82,8 +82,6 @@ Ctx, DisAsm, IP); assert(DC && "Allocation failure!"); - IP->setCommentStream(DC->CommentStream); - return DC; } Modified: llvm/trunk/lib/MC/MCInstPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCInstPrinter.cpp?rev=140217&r1=140216&r2=140217&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCInstPrinter.cpp (original) +++ llvm/trunk/lib/MC/MCInstPrinter.cpp Tue Sep 20 19:25:23 2011 @@ -8,6 +8,7 @@ //===----------------------------------------------------------------------===// #include "llvm/MC/MCInstPrinter.h" +#include "llvm/MC/MCAsmInfo.h" #include "llvm/ADT/StringRef.h" #include "llvm/Support/raw_ostream.h" using namespace llvm; @@ -26,5 +27,10 @@ } void MCInstPrinter::printAnnotation(raw_ostream &OS, StringRef Annot) { - if (!Annot.empty()) OS << Annot << "\n"; + if (!Annot.empty()) { + if (CommentStream) + (*CommentStream) << Annot << "\n"; + else + OS << " " << MAI.getCommentString() << " " << Annot << "\n"; + } } Modified: llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp?rev=140217&r1=140216&r2=140217&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp (original) +++ llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp Tue Sep 20 19:25:23 2011 @@ -72,7 +72,7 @@ O << ", " << getRegisterName(MO2.getReg()); assert(ARM_AM::getSORegOffset(MO3.getImm()) == 0); - if (CommentStream) printAnnotation(*CommentStream, Annot); + if (CommentStream) printAnnotation(O, Annot); return; } @@ -90,12 +90,12 @@ << ", " << getRegisterName(MO1.getReg()); if (ARM_AM::getSORegShOp(MO2.getImm()) == ARM_AM::rrx) { - if (CommentStream) printAnnotation(*CommentStream, Annot); + if (CommentStream) printAnnotation(O, Annot); return; } O << ", #" << translateShiftImm(ARM_AM::getSORegOffset(MO2.getImm())); - if (CommentStream) printAnnotation(*CommentStream, Annot); + if (CommentStream) printAnnotation(O, Annot); return; } @@ -109,7 +109,7 @@ O << ".w"; O << '\t'; printRegisterList(MI, 4, O); - if (CommentStream) printAnnotation(*CommentStream, Annot); + if (CommentStream) printAnnotation(O, Annot); return; } if (Opcode == ARM::STR_PRE_IMM && MI->getOperand(2).getReg() == ARM::SP && @@ -117,7 +117,7 @@ O << '\t' << "push"; printPredicateOperand(MI, 4, O); O << "\t{" << getRegisterName(MI->getOperand(1).getReg()) << "}"; - if (CommentStream) printAnnotation(*CommentStream, Annot); + if (CommentStream) printAnnotation(O, Annot); return; } @@ -130,7 +130,7 @@ O << ".w"; O << '\t'; printRegisterList(MI, 4, O); - if (CommentStream) printAnnotation(*CommentStream, Annot); + if (CommentStream) printAnnotation(O, Annot); return; } if (Opcode == ARM::LDR_POST_IMM && MI->getOperand(2).getReg() == ARM::SP && @@ -138,7 +138,7 @@ O << '\t' << "pop"; printPredicateOperand(MI, 5, O); O << "\t{" << getRegisterName(MI->getOperand(0).getReg()) << "}"; - if (CommentStream) printAnnotation(*CommentStream, Annot); + if (CommentStream) printAnnotation(O, Annot); return; } @@ -150,7 +150,7 @@ printPredicateOperand(MI, 2, O); O << '\t'; printRegisterList(MI, 4, O); - if (CommentStream) printAnnotation(*CommentStream, Annot); + if (CommentStream) printAnnotation(O, Annot); return; } @@ -161,7 +161,7 @@ printPredicateOperand(MI, 2, O); O << '\t'; printRegisterList(MI, 4, O); - if (CommentStream) printAnnotation(*CommentStream, Annot); + if (CommentStream) printAnnotation(O, Annot); return; } @@ -180,7 +180,7 @@ if (Writeback) O << "!"; O << ", "; printRegisterList(MI, 3, O); - if (CommentStream) printAnnotation(*CommentStream, Annot); + if (CommentStream) printAnnotation(O, Annot); return; } @@ -189,12 +189,12 @@ MI->getOperand(1).getReg() == ARM::R8) { O << "\tnop"; printPredicateOperand(MI, 2, O); - if (CommentStream) printAnnotation(*CommentStream, Annot); + if (CommentStream) printAnnotation(O, Annot); return; } printInstruction(MI, O); - if (CommentStream) printAnnotation(*CommentStream, Annot); + if (CommentStream) printAnnotation(O, Annot); } void ARMInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, Modified: llvm/trunk/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.cpp?rev=140217&r1=140216&r2=140217&view=diff ============================================================================== --- llvm/trunk/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.cpp (original) +++ llvm/trunk/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.cpp Tue Sep 20 19:25:23 2011 @@ -28,7 +28,7 @@ void MBlazeInstPrinter::printInst(const MCInst *MI, raw_ostream &O, StringRef Annot) { printInstruction(MI, O); - if (CommentStream) printAnnotation(*CommentStream, Annot); + if (CommentStream) printAnnotation(O, Annot); } void MBlazeInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, Modified: llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp?rev=140217&r1=140216&r2=140217&view=diff ============================================================================== --- llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp (original) +++ llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp Tue Sep 20 19:25:23 2011 @@ -28,7 +28,7 @@ void MSP430InstPrinter::printInst(const MCInst *MI, raw_ostream &O, StringRef Annot) { printInstruction(MI, O); - if (CommentStream) printAnnotation(*CommentStream, Annot); + if (CommentStream) printAnnotation(O, Annot); } void MSP430InstPrinter::printPCRelImmOperand(const MCInst *MI, unsigned OpNo, Modified: llvm/trunk/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp?rev=140217&r1=140216&r2=140217&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp (original) +++ llvm/trunk/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp Tue Sep 20 19:25:23 2011 @@ -72,7 +72,7 @@ void MipsInstPrinter::printInst(const MCInst *MI, raw_ostream &O, StringRef Annot) { printInstruction(MI, O); - if (CommentStream) printAnnotation(*CommentStream, Annot); + if (CommentStream) printAnnotation(O, Annot); } void MipsInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, Modified: llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp?rev=140217&r1=140216&r2=140217&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp Tue Sep 20 19:25:23 2011 @@ -52,7 +52,7 @@ printOperand(MI, 1, O); O << ", " << (unsigned int)SH; - if (CommentStream) printAnnotation(*CommentStream, Annot); + if (CommentStream) printAnnotation(O, Annot); return; } } @@ -63,7 +63,7 @@ printOperand(MI, 0, O); O << ", "; printOperand(MI, 1, O); - if (CommentStream) printAnnotation(*CommentStream, Annot); + if (CommentStream) printAnnotation(O, Annot); return; } @@ -77,13 +77,13 @@ O << ", "; printOperand(MI, 1, O); O << ", " << (unsigned int)SH; - if (CommentStream) printAnnotation(*CommentStream, Annot); + if (CommentStream) printAnnotation(O, Annot); return; } } printInstruction(MI, O); - if (CommentStream) printAnnotation(*CommentStream, Annot); + if (CommentStream) printAnnotation(O, Annot); } Modified: llvm/trunk/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp?rev=140217&r1=140216&r2=140217&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp (original) +++ llvm/trunk/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp Tue Sep 20 19:25:23 2011 @@ -47,7 +47,7 @@ // If verbose assembly is enabled, we can print some informative comments. if (CommentStream) { - printAnnotation(*CommentStream, Annot); + printAnnotation(OS, Annot); EmitAnyX86InstComments(MI, *CommentStream, getRegisterName); } } Modified: llvm/trunk/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp?rev=140217&r1=140216&r2=140217&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp (original) +++ llvm/trunk/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp Tue Sep 20 19:25:23 2011 @@ -38,7 +38,7 @@ // If verbose assembly is enabled, we can print some informative comments. if (CommentStream) { - printAnnotation(*CommentStream, Annot); + printAnnotation(OS, Annot); EmitAnyX86InstComments(MI, *CommentStream, getRegisterName); } } From bruno.cardoso at gmail.com Tue Sep 20 19:32:39 2011 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Tue, 20 Sep 2011 17:32:39 -0700 Subject: [llvm-commits] [llvm] r140107 - in /llvm/trunk/test/CodeGen/X86: 2006-05-11-InstrSched.ll 2009-06-05-ScalarToVectorByteMMX.ll movgs.ll v2f32.ll vec_set-C.ll In-Reply-To: References: <20110920000812.E20BC2A6C12C@llvm.org> Message-ID: > With the current state on trunk, there's a missed optimization on > Windows with -fomit-frame-pointer and SSE, and on all platforms with > -fomit-frame-pointer and AVX: we build the frame pointer when it isn't > necessary. ?Granted, it isn't really such a great optimization > considering that the execution cost of any vector code is likely to be > much greater than the cost of pushing and popping the frame pointer, > but it was working at one point. Yep. My point is that all those missing optimization were already happening and my commit had nothing to do with it! :) -- Bruno Cardoso Lopes http://www.brunocardoso.cc From echristo at apple.com Tue Sep 20 19:52:40 2011 From: echristo at apple.com (Eric Christopher) Date: Wed, 21 Sep 2011 00:52:40 -0000 Subject: [llvm-commits] [test-suite] r140219 - in /test-suite/trunk: Makefile.config.in autoconf/configure.ac configure Message-ID: <20110921005240.7572C2A6C12C@llvm.org> Author: echristo Date: Tue Sep 20 19:52:40 2011 New Revision: 140219 URL: http://llvm.org/viewvc/llvm-project?rev=140219&view=rev Log: Migrate the rest of the compiler checking to the testsuite from the toplevel llvm configure script. Modified: test-suite/trunk/Makefile.config.in test-suite/trunk/autoconf/configure.ac test-suite/trunk/configure Modified: test-suite/trunk/Makefile.config.in URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Makefile.config.in?rev=140219&r1=140218&r2=140219&view=diff ============================================================================== --- test-suite/trunk/Makefile.config.in (original) +++ test-suite/trunk/Makefile.config.in Tue Sep 20 19:52:40 2011 @@ -86,8 +86,29 @@ CXX := $(TARGET_CXX) endif -LLVMGCC := @LLVMGCC@ -LLVMGXX := @LLVMGXX@ +# Path to location for LLVM C/C++ front-end. You can modify this if you +# want to override the value set by configure. +LLVMGCCDIR := @LLVMGCCDIR@ + +# Full pathnames of LLVM C/C++ front-end 'cc1' and 'cc1plus' binaries: +LLVMGCC := @LLVMGCC@ +LLVMGXX := @LLVMGXX@ +LLVMCC1 := @LLVMCC1@ +LLVMCC1PLUS := @LLVMCC1PLUS@ +LLVMGCC_LANGS := @LLVMGCC_LANGS@ +LLVMGCC_DRAGONEGG := @LLVMGCC_DRAGONEGG@ + +# Information on Clang, if configured. +CLANGPATH := @CLANGPATH@ +CLANGXXPATH := @CLANGXXPATH@ +ENABLE_BUILT_CLANG := @ENABLE_BUILT_CLANG@ + +# The LLVM capable compiler to use. +LLVMCC_OPTION := @LLVMCC_OPTION@ + +# The flag used to emit LLVM IR. +LLVMCC_EMITIR_FLAG = @LLVMCC_EMITIR_FLAG@ +LLVMCC_DISABLEOPT_FLAGS := @LLVMCC_DISABLEOPT_FLAGS@ ifdef TARGET_LLVMGCC LLVMGCC := $(TARGET_LLVMGCC) Modified: test-suite/trunk/autoconf/configure.ac URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/autoconf/configure.ac?rev=140219&r1=140218&r2=140219&view=diff ============================================================================== --- test-suite/trunk/autoconf/configure.ac (original) +++ test-suite/trunk/autoconf/configure.ac Tue Sep 20 19:52:40 2011 @@ -165,6 +165,78 @@ AC_SUBST(LLVM_EXTERNALS,[$withval]), AC_SUBST(LLVM_EXTERNALS,[$LLVM_SRC/projects/test-suite-externals])) + +dnl Allow a specific Clang compiler to be used with this LLVM config. +AC_ARG_WITH(clang, + AS_HELP_STRING([--with-clang], + [Specify location of clang compiler (default is --with-built-clang)]), + [],[with_clang=default]) + +dnl Enable use of the built Clang. +AC_ARG_WITH(built-clang, + AS_HELP_STRING([--with-built-clang], + [Use the compiled Clang as the LLVM compiler (default=check)]), + [],[with_built_clang=check]) + +dnl Select the Clang compiler option. +dnl +dnl If --with-clang is given, always honor that; otherwise honor +dnl --with-built-clang, or check if we have the clang sources. +AC_MSG_CHECKING([clang compiler]) +WITH_CLANGPATH="" +WITH_BUILT_CLANG=0 +if test "$with_clang" != "default"; then + WITH_CLANGPATH="$with_clang" + if ! test -x "$WITH_CLANGPATH"; then + AC_MSG_ERROR([invalid --with-clang, path does not specify an executable]) + fi +elif test "$with_built_clang" = "yes"; then + WITH_BUILT_CLANG=1 +elif test "$with_built_clang" = "no"; then + WITH_BUILT_CLANG=0 +else + if test "$with_built_clang" != "check"; then + AC_MSG_ERROR([invalid value for --with-built-clang.]) + fi + if test -f ${srcdir}/../../tools/clang/README.txt; then + WITH_BUILT_CLANG=1 + fi +fi + +if ! test -z "$WITH_CLANGPATH"; then + AC_MSG_RESULT([$WITH_CLANGPATH]) + WITH_CLANGXXPATH=`"$WITH_CLANGPATH" --print-prog-name=clang++` +elif test "$WITH_BUILT_CLANG" = "1"; then + AC_MSG_RESULT([built]) +else + AC_MSG_RESULT([none]) +fi +AC_SUBST(CLANGPATH,$WITH_CLANGPATH) +AC_SUBST(CLANGXXPATH,$WITH_CLANGXXPATH) +AC_SUBST(ENABLE_BUILT_CLANG,$WITH_BUILT_CLANG) + +dnl Select the LLVM capable compiler to use, we default to using clang if +dnl found. +AC_ARG_WITH(llvmcc, + AS_HELP_STRING([--with-llvmcc=], + [Choose the LLVM capable compiler to use (llvm-gcc, clang, or none; default=check)]), + [],[with_llvmcc=check]) +AC_MSG_CHECKING([LLVM capable compiler]) +if test "$with_llvmcc" != "check"; then + if (test "$with_llvmcc" != "llvm-gcc" && + test "$with_llvmcc" != "clang" && + test "$with_llvmcc" != "none"); then + AC_MSG_ERROR([invalid value for --with-llvmcc, expected 'clang', 'llvm-gcc', or 'none'.]) + fi + WITH_LLVMCC="$with_llvmcc" +elif test -n "$WITH_CLANGPATH" || test "$WITH_BUILT_CLANG" -ne "0"; then + WITH_LLVMCC=clang +else + WITH_LLVMCC=none +fi +AC_MSG_RESULT([$WITH_LLVMCC]) +AC_SUBST(LLVMCC_OPTION,$WITH_LLVMCC) + dnl Allow a specific llvm-gcc/llvm-g++ pair to be used with this LLVM config. AC_ARG_WITH(llvmgccdir, AS_HELP_STRING([--with-llvmgccdir], Modified: test-suite/trunk/configure URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/configure?rev=140219&r1=140218&r2=140219&view=diff ============================================================================== --- test-suite/trunk/configure (original) +++ test-suite/trunk/configure Tue Sep 20 19:52:40 2011 @@ -1,6 +1,6 @@ #! /bin/sh # Guess values for system-dependent variables and create Makefiles. -# Generated by GNU Autoconf 2.61 for LLVM-TEST 2.8svn. +# Generated by GNU Autoconf 2.60 for LLVM-TEST 2.8svn. # # Report bugs to . # @@ -12,8 +12,7 @@ ## M4sh Initialization. ## ## --------------------- ## -# Be more Bourne compatible -DUALCASE=1; export DUALCASE # for MKS sh +# Be Bourne compatible if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then emulate sh NULLCMD=: @@ -22,13 +21,10 @@ alias -g '${1+"$@"}'='"$@"' setopt NO_GLOB_SUBST else - case `(set -o) 2>/dev/null` in - *posix*) set -o posix ;; -esac - + case `(set -o) 2>/dev/null` in *posix*) set -o posix;; esac fi - - +BIN_SH=xpg4; export BIN_SH # for Tru64 +DUALCASE=1; export DUALCASE # for MKS sh # PATH needs CR @@ -221,7 +217,7 @@ else as_candidate_shells= as_save_IFS=$IFS; IFS=$PATH_SEPARATOR -for as_dir in /bin$PATH_SEPARATOR/usr/bin$PATH_SEPARATOR$PATH +for as_dir in /usr/bin/posix$PATH_SEPARATOR/bin$PATH_SEPARATOR/usr/bin$PATH_SEPARATOR$PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. @@ -239,6 +235,7 @@ # Try only shells that exist, to save several forks. if { test -f "$as_shell" || test -f "$as_shell.exe"; } && { ("$as_shell") 2> /dev/null <<\_ASEOF +# Be Bourne compatible if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then emulate sh NULLCMD=: @@ -247,12 +244,10 @@ alias -g '${1+"$@"}'='"$@"' setopt NO_GLOB_SUBST else - case `(set -o) 2>/dev/null` in - *posix*) set -o posix ;; -esac - + case `(set -o) 2>/dev/null` in *posix*) set -o posix;; esac fi - +BIN_SH=xpg4; export BIN_SH # for Tru64 +DUALCASE=1; export DUALCASE # for MKS sh : _ASEOF @@ -260,6 +255,7 @@ CONFIG_SHELL=$as_shell as_have_required=yes if { "$as_shell" 2> /dev/null <<\_ASEOF +# Be Bourne compatible if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then emulate sh NULLCMD=: @@ -268,12 +264,10 @@ alias -g '${1+"$@"}'='"$@"' setopt NO_GLOB_SUBST else - case `(set -o) 2>/dev/null` in - *posix*) set -o posix ;; -esac - + case `(set -o) 2>/dev/null` in *posix*) set -o posix;; esac fi - +BIN_SH=xpg4; export BIN_SH # for Tru64 +DUALCASE=1; export DUALCASE # for MKS sh : (as_func_return () { @@ -520,28 +514,19 @@ as_mkdir_p=false fi -if test -x / >/dev/null 2>&1; then - as_test_x='test -x' +# Find out whether ``test -x'' works. Don't use a zero-byte file, as +# systems may use methods other than mode bits to determine executability. +cat >conf$$.file <<_ASEOF +#! /bin/sh +exit 0 +_ASEOF +chmod +x conf$$.file +if test -x conf$$.file >/dev/null 2>&1; then + as_executable_p="test -x" else - if ls -dL / >/dev/null 2>&1; then - as_ls_L_option=L - else - as_ls_L_option= - fi - as_test_x=' - eval sh -c '\'' - if test -d "$1"; then - test -d "$1/."; - else - case $1 in - -*)set "./$1";; - esac; - case `ls -ld'$as_ls_L_option' "$1" 2>/dev/null` in - ???[sx]*):;;*)false;;esac;fi - '\'' sh - ' + as_executable_p=: fi -as_executable_p=$as_test_x +rm -f conf$$.file # Sed expression to map a string onto a valid CPP name. as_tr_cpp="eval sed 'y%*$as_cr_letters%P$as_cr_LETTERS%;s%[^_$as_cr_alnum]%_%g'" @@ -736,36 +721,36 @@ # Factoring default headers for most tests. ac_includes_default="\ #include -#ifdef HAVE_SYS_TYPES_H +#if HAVE_SYS_TYPES_H # include #endif -#ifdef HAVE_SYS_STAT_H +#if HAVE_SYS_STAT_H # include #endif -#ifdef STDC_HEADERS +#if STDC_HEADERS # include # include #else -# ifdef HAVE_STDLIB_H +# if HAVE_STDLIB_H # include # endif #endif -#ifdef HAVE_STRING_H -# if !defined STDC_HEADERS && defined HAVE_MEMORY_H +#if HAVE_STRING_H +# if !STDC_HEADERS && HAVE_MEMORY_H # include # endif # include #endif -#ifdef HAVE_STRINGS_H +#if HAVE_STRINGS_H # include #endif -#ifdef HAVE_INTTYPES_H +#if HAVE_INTTYPES_H # include #endif -#ifdef HAVE_STDINT_H +#if HAVE_STDINT_H # include #endif -#ifdef HAVE_UNISTD_H +#if HAVE_UNISTD_H # include #endif" @@ -834,6 +819,10 @@ LLVM_SRC LLVM_OBJ LLVM_EXTERNALS +CLANGPATH +CLANGXXPATH +ENABLE_BUILT_CLANG +LLVMCC_OPTION LLVMGCC LLVMGXX LLVMCC_EMITIR_FLAG @@ -903,7 +892,6 @@ CC CFLAGS LDFLAGS -LIBS CPPFLAGS CPP CXX @@ -1017,10 +1005,10 @@ -disable-* | --disable-*) ac_feature=`expr "x$ac_option" : 'x-*disable-\(.*\)'` # Reject names that are not valid shell variable names. - expr "x$ac_feature" : ".*[^-._$as_cr_alnum]" >/dev/null && + expr "x$ac_feature" : ".*[^-_$as_cr_alnum]" >/dev/null && { echo "$as_me: error: invalid feature name: $ac_feature" >&2 { (exit 1); exit 1; }; } - ac_feature=`echo $ac_feature | sed 's/[-.]/_/g'` + ac_feature=`echo $ac_feature | sed 's/-/_/g'` eval enable_$ac_feature=no ;; -docdir | --docdir | --docdi | --doc | --do) @@ -1036,10 +1024,10 @@ -enable-* | --enable-*) ac_feature=`expr "x$ac_option" : 'x-*enable-\([^=]*\)'` # Reject names that are not valid shell variable names. - expr "x$ac_feature" : ".*[^-._$as_cr_alnum]" >/dev/null && + expr "x$ac_feature" : ".*[^-_$as_cr_alnum]" >/dev/null && { echo "$as_me: error: invalid feature name: $ac_feature" >&2 { (exit 1); exit 1; }; } - ac_feature=`echo $ac_feature | sed 's/[-.]/_/g'` + ac_feature=`echo $ac_feature | sed 's/-/_/g'` eval enable_$ac_feature=\$ac_optarg ;; -exec-prefix | --exec_prefix | --exec-prefix | --exec-prefi \ @@ -1233,19 +1221,19 @@ -with-* | --with-*) ac_package=`expr "x$ac_option" : 'x-*with-\([^=]*\)'` # Reject names that are not valid shell variable names. - expr "x$ac_package" : ".*[^-._$as_cr_alnum]" >/dev/null && + expr "x$ac_package" : ".*[^-_$as_cr_alnum]" >/dev/null && { echo "$as_me: error: invalid package name: $ac_package" >&2 { (exit 1); exit 1; }; } - ac_package=`echo $ac_package | sed 's/[-.]/_/g'` + ac_package=`echo $ac_package| sed 's/-/_/g'` eval with_$ac_package=\$ac_optarg ;; -without-* | --without-*) ac_package=`expr "x$ac_option" : 'x-*without-\(.*\)'` # Reject names that are not valid shell variable names. - expr "x$ac_package" : ".*[^-._$as_cr_alnum]" >/dev/null && + expr "x$ac_package" : ".*[^-_$as_cr_alnum]" >/dev/null && { echo "$as_me: error: invalid package name: $ac_package" >&2 { (exit 1); exit 1; }; } - ac_package=`echo $ac_package | sed 's/[-.]/_/g'` + ac_package=`echo $ac_package | sed 's/-/_/g'` eval with_$ac_package=no ;; --x) @@ -1503,6 +1491,12 @@ --with-llvmsrc=DIR Location of LLVM Source Code --with-llvmobj=DIR Location of LLVM Object Code --with-externals=DIR Location of External Test code + --with-clang Specify location of clang compiler (default is + --with-built-clang) + --with-built-clang Use the compiled Clang as the LLVM compiler + (default=check) + --with-llvmcc= Choose the LLVM capable compiler to use (llvm-gcc, + clang, or none; default=check) --with-llvmgccdir Specify location of llvm-gcc install dir (default searches PATH) --with-gnu-ld assume the C compiler uses GNU ld [default=no] @@ -1526,7 +1520,6 @@ CFLAGS C compiler flags LDFLAGS linker flags, e.g. -L if you have libraries in a nonstandard directory - LIBS libraries to pass to the linker, e.g. -l CPPFLAGS C/C++/Objective C preprocessor flags, e.g. -I if you have headers in a nonstandard directory CPP C preprocessor @@ -1601,7 +1594,7 @@ if $ac_init_version; then cat <<\_ACEOF LLVM-TEST configure 2.8svn -generated by GNU Autoconf 2.61 +generated by GNU Autoconf 2.60 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc. @@ -1615,7 +1608,7 @@ running configure, to aid debugging if configure makes a mistake. It was created by LLVM-TEST $as_me 2.8svn, which was -generated by GNU Autoconf 2.61. Invocation command line was +generated by GNU Autoconf 2.60. Invocation command line was $ $0 $@ @@ -2359,7 +2352,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then ac_cv_prog_CC="${ac_tool_prefix}gcc" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 @@ -2399,7 +2392,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then ac_cv_prog_ac_ct_CC="gcc" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 @@ -2456,7 +2449,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then ac_cv_prog_CC="${ac_tool_prefix}cc" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 @@ -2497,7 +2490,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then if test "$as_dir/$ac_word$ac_exec_ext" = "/usr/ucb/cc"; then ac_prog_rejected=yes continue @@ -2555,7 +2548,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then ac_cv_prog_CC="$ac_tool_prefix$ac_prog" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 @@ -2599,7 +2592,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then ac_cv_prog_ac_ct_CC="$ac_prog" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 @@ -2740,7 +2733,7 @@ # in a Makefile. We should not override ac_cv_exeext if it was cached, # so that the user can short-circuit this test for compilers unknown to # Autoconf. -for ac_file in $ac_files '' +for ac_file in $ac_files do test -f "$ac_file" || continue case $ac_file in @@ -2768,12 +2761,6 @@ test "$ac_cv_exeext" = no && ac_cv_exeext= else - ac_file='' -fi - -{ echo "$as_me:$LINENO: result: $ac_file" >&5 -echo "${ECHO_T}$ac_file" >&6; } -if test -z "$ac_file"; then echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 @@ -2785,6 +2772,8 @@ fi ac_exeext=$ac_cv_exeext +{ echo "$as_me:$LINENO: result: $ac_file" >&5 +echo "${ECHO_T}$ac_file" >&6; } # Check that the compiler produces executables we can run. If not, either # the compiler is broken, or we cross compile. @@ -2962,10 +2951,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_c_werror_flag" || - test ! -s conftest.err - } && test -s conftest.$ac_objext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then ac_compiler_gnu=yes else echo "$as_me: failed program was:" >&5 @@ -3020,10 +3026,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_c_werror_flag" || - test ! -s conftest.err - } && test -s conftest.$ac_objext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then ac_cv_prog_cc_g=yes else echo "$as_me: failed program was:" >&5 @@ -3058,10 +3081,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_c_werror_flag" || - test ! -s conftest.err - } && test -s conftest.$ac_objext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then : else echo "$as_me: failed program was:" >&5 @@ -3097,10 +3137,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_c_werror_flag" || - test ! -s conftest.err - } && test -s conftest.$ac_objext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then ac_cv_prog_cc_g=yes else echo "$as_me: failed program was:" >&5 @@ -3216,10 +3273,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_c_werror_flag" || - test ! -s conftest.err - } && test -s conftest.$ac_objext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then ac_cv_prog_cc_c89=$ac_arg else echo "$as_me: failed program was:" >&5 @@ -3309,10 +3383,17 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } >/dev/null && { - test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" || - test ! -s conftest.err - }; then + (exit $ac_status); } >/dev/null; then + if test -s conftest.err; then + ac_cpp_err=$ac_c_preproc_warn_flag + ac_cpp_err=$ac_cpp_err$ac_c_werror_flag + else + ac_cpp_err= + fi +else + ac_cpp_err=yes +fi +if test -z "$ac_cpp_err"; then : else echo "$as_me: failed program was:" >&5 @@ -3346,10 +3427,17 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } >/dev/null && { - test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" || - test ! -s conftest.err - }; then + (exit $ac_status); } >/dev/null; then + if test -s conftest.err; then + ac_cpp_err=$ac_c_preproc_warn_flag + ac_cpp_err=$ac_cpp_err$ac_c_werror_flag + else + ac_cpp_err= + fi +else + ac_cpp_err=yes +fi +if test -z "$ac_cpp_err"; then # Broken: success on invalid input. continue else @@ -3414,10 +3502,17 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } >/dev/null && { - test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" || - test ! -s conftest.err - }; then + (exit $ac_status); } >/dev/null; then + if test -s conftest.err; then + ac_cpp_err=$ac_c_preproc_warn_flag + ac_cpp_err=$ac_cpp_err$ac_c_werror_flag + else + ac_cpp_err= + fi +else + ac_cpp_err=yes +fi +if test -z "$ac_cpp_err"; then : else echo "$as_me: failed program was:" >&5 @@ -3451,10 +3546,17 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } >/dev/null && { - test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" || - test ! -s conftest.err - }; then + (exit $ac_status); } >/dev/null; then + if test -s conftest.err; then + ac_cpp_err=$ac_c_preproc_warn_flag + ac_cpp_err=$ac_cpp_err$ac_c_werror_flag + else + ac_cpp_err= + fi +else + ac_cpp_err=yes +fi +if test -z "$ac_cpp_err"; then # Broken: success on invalid input. continue else @@ -3509,7 +3611,7 @@ for ac_prog in grep ggrep; do for ac_exec_ext in '' $ac_executable_extensions; do ac_path_GREP="$as_dir/$ac_prog$ac_exec_ext" - { test -f "$ac_path_GREP" && $as_test_x "$ac_path_GREP"; } || continue + { test -f "$ac_path_GREP" && $as_executable_p "$ac_path_GREP"; } || continue # Check for GNU ac_path_GREP and select it if it is found. # Check for GNU $ac_path_GREP case `"$ac_path_GREP" --version 2>&1` in @@ -3591,7 +3693,7 @@ for ac_prog in egrep; do for ac_exec_ext in '' $ac_executable_extensions; do ac_path_EGREP="$as_dir/$ac_prog$ac_exec_ext" - { test -f "$ac_path_EGREP" && $as_test_x "$ac_path_EGREP"; } || continue + { test -f "$ac_path_EGREP" && $as_executable_p "$ac_path_EGREP"; } || continue # Check for GNU ac_path_EGREP and select it if it is found. # Check for GNU $ac_path_EGREP case `"$ac_path_EGREP" --version 2>&1` in @@ -3687,10 +3789,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_c_werror_flag" || - test ! -s conftest.err - } && test -s conftest.$ac_objext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then ac_cv_header_stdc=yes else echo "$as_me: failed program was:" >&5 @@ -3718,7 +3837,7 @@ else ac_cv_header_stdc=no fi -rm -f -r conftest* +rm -f conftest* fi @@ -3739,7 +3858,7 @@ else ac_cv_header_stdc=no fi -rm -f -r conftest* +rm -f conftest* fi @@ -3866,10 +3985,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_c_werror_flag" || - test ! -s conftest.err - } && test -s conftest.$ac_objext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then eval "$as_ac_Header=yes" else echo "$as_me: failed program was:" >&5 @@ -3911,8 +4047,7 @@ int main () { -#if ! (defined BYTE_ORDER && defined BIG_ENDIAN && defined LITTLE_ENDIAN \ - && BYTE_ORDER && BIG_ENDIAN && LITTLE_ENDIAN) +#if !BYTE_ORDER || !BIG_ENDIAN || !LITTLE_ENDIAN bogus endian macros #endif @@ -3933,10 +4068,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_c_werror_flag" || - test ! -s conftest.err - } && test -s conftest.$ac_objext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then # It does; now see whether it defined to BIG_ENDIAN or not. cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ @@ -3971,10 +4123,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_c_werror_flag" || - test ! -s conftest.err - } && test -s conftest.$ac_objext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then ac_cv_c_bigendian=yes else echo "$as_me: failed program was:" >&5 @@ -4025,10 +4194,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_c_werror_flag" || - test ! -s conftest.err - } && test -s conftest.$ac_objext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then if grep BIGenDianSyS conftest.$ac_objext >/dev/null ; then ac_cv_c_bigendian=yes fi @@ -4163,6 +4349,98 @@ + +# Check whether --with-clang was given. +if test "${with_clang+set}" = set; then + withval=$with_clang; +else + with_clang=default +fi + + + +# Check whether --with-built-clang was given. +if test "${with_built_clang+set}" = set; then + withval=$with_built_clang; +else + with_built_clang=check +fi + + +{ echo "$as_me:$LINENO: checking clang compiler" >&5 +echo $ECHO_N "checking clang compiler... $ECHO_C" >&6; } +WITH_CLANGPATH="" +WITH_BUILT_CLANG=0 +if test "$with_clang" != "default"; then + WITH_CLANGPATH="$with_clang" + if ! test -x "$WITH_CLANGPATH"; then + { { echo "$as_me:$LINENO: error: invalid --with-clang, path does not specify an executable" >&5 +echo "$as_me: error: invalid --with-clang, path does not specify an executable" >&2;} + { (exit 1); exit 1; }; } + fi +elif test "$with_built_clang" = "yes"; then + WITH_BUILT_CLANG=1 +elif test "$with_built_clang" = "no"; then + WITH_BUILT_CLANG=0 +else + if test "$with_built_clang" != "check"; then + { { echo "$as_me:$LINENO: error: invalid value for --with-built-clang." >&5 +echo "$as_me: error: invalid value for --with-built-clang." >&2;} + { (exit 1); exit 1; }; } + fi + if test -f ${srcdir}/../../tools/clang/README.txt; then + WITH_BUILT_CLANG=1 + fi +fi + +if ! test -z "$WITH_CLANGPATH"; then + { echo "$as_me:$LINENO: result: $WITH_CLANGPATH" >&5 +echo "${ECHO_T}$WITH_CLANGPATH" >&6; } + WITH_CLANGXXPATH=`"$WITH_CLANGPATH" --print-prog-name=clang++` +elif test "$WITH_BUILT_CLANG" = "1"; then + { echo "$as_me:$LINENO: result: built" >&5 +echo "${ECHO_T}built" >&6; } +else + { echo "$as_me:$LINENO: result: none" >&5 +echo "${ECHO_T}none" >&6; } +fi +CLANGPATH=$WITH_CLANGPATH + +CLANGXXPATH=$WITH_CLANGXXPATH + +ENABLE_BUILT_CLANG=$WITH_BUILT_CLANG + + + +# Check whether --with-llvmcc was given. +if test "${with_llvmcc+set}" = set; then + withval=$with_llvmcc; +else + with_llvmcc=check +fi + +{ echo "$as_me:$LINENO: checking LLVM capable compiler" >&5 +echo $ECHO_N "checking LLVM capable compiler... $ECHO_C" >&6; } +if test "$with_llvmcc" != "check"; then + if (test "$with_llvmcc" != "llvm-gcc" && + test "$with_llvmcc" != "clang" && + test "$with_llvmcc" != "none"); then + { { echo "$as_me:$LINENO: error: invalid value for --with-llvmcc, expected 'clang', 'llvm-gcc', or 'none'." >&5 +echo "$as_me: error: invalid value for --with-llvmcc, expected 'clang', 'llvm-gcc', or 'none'." >&2;} + { (exit 1); exit 1; }; } + fi + WITH_LLVMCC="$with_llvmcc" +elif test -n "$WITH_CLANGPATH" || test "$WITH_BUILT_CLANG" -ne "0"; then + WITH_LLVMCC=clang +else + WITH_LLVMCC=none +fi +{ echo "$as_me:$LINENO: result: $WITH_LLVMCC" >&5 +echo "${ECHO_T}$WITH_LLVMCC" >&6; } +LLVMCC_OPTION=$WITH_LLVMCC + + + # Check whether --with-llvmgccdir was given. if test "${with_llvmgccdir+set}" = set; then withval=$with_llvmgccdir; @@ -4199,7 +4477,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then ac_cv_path_LLVMGCC="$as_dir/$ac_word$ac_exec_ext" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 @@ -4239,7 +4517,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then ac_cv_path_LLVMGXX="$as_dir/$ac_word$ac_exec_ext" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 @@ -4810,7 +5088,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then ac_cv_prog_CXX="$ac_tool_prefix$ac_prog" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 @@ -4854,7 +5132,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then ac_cv_prog_ac_ct_CXX="$ac_prog" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 @@ -4967,10 +5245,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_cxx_werror_flag" || - test ! -s conftest.err - } && test -s conftest.$ac_objext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_cxx_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then ac_compiler_gnu=yes else echo "$as_me: failed program was:" >&5 @@ -5025,10 +5320,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_cxx_werror_flag" || - test ! -s conftest.err - } && test -s conftest.$ac_objext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_cxx_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then ac_cv_prog_cxx_g=yes else echo "$as_me: failed program was:" >&5 @@ -5063,10 +5375,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_cxx_werror_flag" || - test ! -s conftest.err - } && test -s conftest.$ac_objext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_cxx_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then : else echo "$as_me: failed program was:" >&5 @@ -5102,10 +5431,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_cxx_werror_flag" || - test ! -s conftest.err - } && test -s conftest.$ac_objext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_cxx_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then ac_cv_prog_cxx_g=yes else echo "$as_me: failed program was:" >&5 @@ -5170,7 +5516,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then ac_cv_prog_CC="$ac_tool_prefix$ac_prog" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 @@ -5214,7 +5560,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then ac_cv_prog_ac_ct_CC="$ac_prog" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 @@ -5332,10 +5678,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_c_werror_flag" || - test ! -s conftest.err - } && test -s conftest.$ac_objext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then ac_compiler_gnu=yes else echo "$as_me: failed program was:" >&5 @@ -5384,16 +5747,33 @@ *) ac_try_echo=$ac_try;; esac eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_compile") 2>conftest.er1 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 ac_status=$? - grep -v '^ *+' conftest.er1 >conftest.err - rm -f conftest.er1 - cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_c_werror_flag" || - test ! -s conftest.err - } && test -s conftest.$ac_objext; then + (exit $ac_status); }; }; then ac_cv_prog_cc_g=yes else echo "$as_me: failed program was:" >&5 @@ -5428,10 +5808,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_c_werror_flag" || - test ! -s conftest.err - } && test -s conftest.$ac_objext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then : else echo "$as_me: failed program was:" >&5 @@ -5467,10 +5864,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_c_werror_flag" || - test ! -s conftest.err - } && test -s conftest.$ac_objext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then ac_cv_prog_cc_g=yes else echo "$as_me: failed program was:" >&5 @@ -5586,10 +6000,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_c_werror_flag" || - test ! -s conftest.err - } && test -s conftest.$ac_objext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then ac_cv_prog_cc_c89=$ac_arg else echo "$as_me: failed program was:" >&5 @@ -5678,10 +6109,17 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } >/dev/null && { - test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" || - test ! -s conftest.err - }; then + (exit $ac_status); } >/dev/null; then + if test -s conftest.err; then + ac_cpp_err=$ac_c_preproc_warn_flag + ac_cpp_err=$ac_cpp_err$ac_c_werror_flag + else + ac_cpp_err= + fi +else + ac_cpp_err=yes +fi +if test -z "$ac_cpp_err"; then : else echo "$as_me: failed program was:" >&5 @@ -5715,10 +6153,17 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } >/dev/null && { - test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" || - test ! -s conftest.err - }; then + (exit $ac_status); } >/dev/null; then + if test -s conftest.err; then + ac_cpp_err=$ac_c_preproc_warn_flag + ac_cpp_err=$ac_cpp_err$ac_c_werror_flag + else + ac_cpp_err= + fi +else + ac_cpp_err=yes +fi +if test -z "$ac_cpp_err"; then # Broken: success on invalid input. continue else @@ -5783,10 +6228,17 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } >/dev/null && { - test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" || - test ! -s conftest.err - }; then + (exit $ac_status); } >/dev/null; then + if test -s conftest.err; then + ac_cpp_err=$ac_c_preproc_warn_flag + ac_cpp_err=$ac_cpp_err$ac_c_werror_flag + else + ac_cpp_err= + fi +else + ac_cpp_err=yes +fi +if test -z "$ac_cpp_err"; then : else echo "$as_me: failed program was:" >&5 @@ -5820,10 +6272,17 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } >/dev/null && { - test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" || - test ! -s conftest.err - }; then + (exit $ac_status); } >/dev/null; then + if test -s conftest.err; then + ac_cpp_err=$ac_c_preproc_warn_flag + ac_cpp_err=$ac_cpp_err$ac_c_werror_flag + else + ac_cpp_err= + fi +else + ac_cpp_err=yes +fi +if test -z "$ac_cpp_err"; then # Broken: success on invalid input. continue else @@ -6440,7 +6899,7 @@ ;; *-*-irix6*) # Find out which ABI we are using. - echo '#line 6443 "configure"' > conftest.$ac_ext + echo '#line 6902 "configure"' > conftest.$ac_ext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>&5 ac_status=$? @@ -6564,11 +7023,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_c_werror_flag" || - test ! -s conftest.err - } && test -s conftest$ac_exeext && - $as_test_x conftest$ac_exeext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then lt_cv_cc_needs_belf=yes else echo "$as_me: failed program was:" >&5 @@ -6577,7 +7052,7 @@ lt_cv_cc_needs_belf=no fi -rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ +rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext ac_ext=c ac_cpp='$CPP $CPPFLAGS' @@ -6658,10 +7133,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_c_werror_flag" || - test ! -s conftest.err - } && test -s conftest.$ac_objext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then ac_header_compiler=yes else echo "$as_me: failed program was:" >&5 @@ -6697,10 +7189,17 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } >/dev/null && { - test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" || - test ! -s conftest.err - }; then + (exit $ac_status); } >/dev/null; then + if test -s conftest.err; then + ac_cpp_err=$ac_c_preproc_warn_flag + ac_cpp_err=$ac_cpp_err$ac_c_werror_flag + else + ac_cpp_err= + fi +else + ac_cpp_err=yes +fi +if test -z "$ac_cpp_err"; then ac_header_preproc=yes else echo "$as_me: failed program was:" >&5 @@ -6817,10 +7316,17 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } >/dev/null && { - test -z "$ac_cxx_preproc_warn_flag$ac_cxx_werror_flag" || - test ! -s conftest.err - }; then + (exit $ac_status); } >/dev/null; then + if test -s conftest.err; then + ac_cpp_err=$ac_cxx_preproc_warn_flag + ac_cpp_err=$ac_cpp_err$ac_cxx_werror_flag + else + ac_cpp_err= + fi +else + ac_cpp_err=yes +fi +if test -z "$ac_cpp_err"; then : else echo "$as_me: failed program was:" >&5 @@ -6854,10 +7360,17 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } >/dev/null && { - test -z "$ac_cxx_preproc_warn_flag$ac_cxx_werror_flag" || - test ! -s conftest.err - }; then + (exit $ac_status); } >/dev/null; then + if test -s conftest.err; then + ac_cpp_err=$ac_cxx_preproc_warn_flag + ac_cpp_err=$ac_cpp_err$ac_cxx_werror_flag + else + ac_cpp_err= + fi +else + ac_cpp_err=yes +fi +if test -z "$ac_cpp_err"; then # Broken: success on invalid input. continue else @@ -6922,10 +7435,17 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } >/dev/null && { - test -z "$ac_cxx_preproc_warn_flag$ac_cxx_werror_flag" || - test ! -s conftest.err - }; then + (exit $ac_status); } >/dev/null; then + if test -s conftest.err; then + ac_cpp_err=$ac_cxx_preproc_warn_flag + ac_cpp_err=$ac_cpp_err$ac_cxx_werror_flag + else + ac_cpp_err= + fi +else + ac_cpp_err=yes +fi +if test -z "$ac_cpp_err"; then : else echo "$as_me: failed program was:" >&5 @@ -6959,10 +7479,17 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } >/dev/null && { - test -z "$ac_cxx_preproc_warn_flag$ac_cxx_werror_flag" || - test ! -s conftest.err - }; then + (exit $ac_status); } >/dev/null; then + if test -s conftest.err; then + ac_cpp_err=$ac_cxx_preproc_warn_flag + ac_cpp_err=$ac_cpp_err$ac_cxx_werror_flag + else + ac_cpp_err= + fi +else + ac_cpp_err=yes +fi +if test -z "$ac_cpp_err"; then # Broken: success on invalid input. continue else @@ -7003,7 +7530,7 @@ ac_link='$F77 -o conftest$ac_exeext $FFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' ac_compiler_gnu=$ac_cv_f77_compiler_gnu if test -n "$ac_tool_prefix"; then - for ac_prog in g77 xlf f77 frt pgf77 cf77 fort77 fl32 af77 xlf90 f90 pgf90 pghpf epcf90 gfortran g95 xlf95 f95 fort ifort ifc efc pgf95 lf95 ftn + for ac_prog in g77 f77 xlf frt pgf77 cf77 fort77 fl32 af77 f90 xlf90 pgf90 pghpf epcf90 gfortran g95 f95 fort xlf95 ifort ifc efc pgf95 lf95 ftn do # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args. set dummy $ac_tool_prefix$ac_prog; ac_word=$2 @@ -7021,7 +7548,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then ac_cv_prog_F77="$ac_tool_prefix$ac_prog" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 @@ -7047,7 +7574,7 @@ fi if test -z "$F77"; then ac_ct_F77=$F77 - for ac_prog in g77 xlf f77 frt pgf77 cf77 fort77 fl32 af77 xlf90 f90 pgf90 pghpf epcf90 gfortran g95 xlf95 f95 fort ifort ifc efc pgf95 lf95 ftn + for ac_prog in g77 f77 xlf frt pgf77 cf77 fort77 fl32 af77 f90 xlf90 pgf90 pghpf epcf90 gfortran g95 f95 fort xlf95 ifort ifc efc pgf95 lf95 ftn do # Extract the first word of "$ac_prog", so it can be a program name with args. set dummy $ac_prog; ac_word=$2 @@ -7065,7 +7592,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then ac_cv_prog_ac_ct_F77="$ac_prog" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 @@ -7172,10 +7699,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_f77_werror_flag" || - test ! -s conftest.err - } && test -s conftest.$ac_objext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_f77_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then ac_compiler_gnu=yes else echo "$as_me: failed program was:" >&5 @@ -7218,10 +7762,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_f77_werror_flag" || - test ! -s conftest.err - } && test -s conftest.$ac_objext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_f77_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then ac_cv_prog_f77_g=yes else echo "$as_me: failed program was:" >&5 @@ -7676,7 +8237,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then ac_cv_prog_AR="${ac_tool_prefix}ar" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 @@ -7716,7 +8277,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then ac_cv_prog_ac_ct_AR="ar" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 @@ -7772,7 +8333,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then ac_cv_prog_RANLIB="${ac_tool_prefix}ranlib" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 @@ -7812,7 +8373,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then ac_cv_prog_ac_ct_RANLIB="ranlib" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 @@ -7868,7 +8429,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then ac_cv_prog_STRIP="${ac_tool_prefix}strip" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 @@ -7908,7 +8469,7 @@ IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do - if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then ac_cv_prog_ac_ct_STRIP="strip" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 @@ -8225,11 +8786,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:8228: $lt_compile\"" >&5) + (eval echo "\"\$as_me:8789: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:8232: \$? = $ac_status" >&5 + echo "$as_me:8793: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -8493,11 +9054,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:8496: $lt_compile\"" >&5) + (eval echo "\"\$as_me:9057: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:8500: \$? = $ac_status" >&5 + echo "$as_me:9061: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -8597,11 +9158,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:8600: $lt_compile\"" >&5) + (eval echo "\"\$as_me:9161: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:8604: \$? = $ac_status" >&5 + echo "$as_me:9165: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized @@ -9077,11 +9638,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_c_werror_flag" || - test ! -s conftest.err - } && test -s conftest$ac_exeext && - $as_test_x conftest$ac_exeext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then aix_libpath=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e '/Import File Strings/,/^$/ { /^0/ { s/^0 *\(.*\)$/\1/; p; } }'` @@ -9095,7 +9672,7 @@ fi -rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ +rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext if test -z "$aix_libpath"; then aix_libpath="/usr/lib:/lib"; fi @@ -9136,11 +9713,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_c_werror_flag" || - test ! -s conftest.err - } && test -s conftest$ac_exeext && - $as_test_x conftest$ac_exeext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then aix_libpath=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e '/Import File Strings/,/^$/ { /^0/ { s/^0 *\(.*\)$/\1/; p; } }'` @@ -9154,7 +9747,7 @@ fi -rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ +rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext if test -z "$aix_libpath"; then aix_libpath="/usr/lib:/lib"; fi @@ -10402,11 +10995,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_c_werror_flag" || - test ! -s conftest.err - } && test -s conftest$ac_exeext && - $as_test_x conftest$ac_exeext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then ac_cv_lib_dl_dlopen=yes else echo "$as_me: failed program was:" >&5 @@ -10415,7 +11024,7 @@ ac_cv_lib_dl_dlopen=no fi -rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ +rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LIBS=$ac_check_lib_save_LIBS fi @@ -10497,11 +11106,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_c_werror_flag" || - test ! -s conftest.err - } && test -s conftest$ac_exeext && - $as_test_x conftest$ac_exeext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then ac_cv_func_shl_load=yes else echo "$as_me: failed program was:" >&5 @@ -10510,7 +11135,7 @@ ac_cv_func_shl_load=no fi -rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ +rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext fi { echo "$as_me:$LINENO: result: $ac_cv_func_shl_load" >&5 @@ -10560,11 +11185,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_c_werror_flag" || - test ! -s conftest.err - } && test -s conftest$ac_exeext && - $as_test_x conftest$ac_exeext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then ac_cv_lib_dld_shl_load=yes else echo "$as_me: failed program was:" >&5 @@ -10573,7 +11214,7 @@ ac_cv_lib_dld_shl_load=no fi -rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ +rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LIBS=$ac_check_lib_save_LIBS fi @@ -10645,11 +11286,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_c_werror_flag" || - test ! -s conftest.err - } && test -s conftest$ac_exeext && - $as_test_x conftest$ac_exeext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then ac_cv_func_dlopen=yes else echo "$as_me: failed program was:" >&5 @@ -10658,7 +11315,7 @@ ac_cv_func_dlopen=no fi -rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ +rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext fi { echo "$as_me:$LINENO: result: $ac_cv_func_dlopen" >&5 @@ -10708,11 +11365,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_c_werror_flag" || - test ! -s conftest.err - } && test -s conftest$ac_exeext && - $as_test_x conftest$ac_exeext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then ac_cv_lib_dl_dlopen=yes else echo "$as_me: failed program was:" >&5 @@ -10721,7 +11394,7 @@ ac_cv_lib_dl_dlopen=no fi -rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ +rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LIBS=$ac_check_lib_save_LIBS fi @@ -10772,11 +11445,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_c_werror_flag" || - test ! -s conftest.err - } && test -s conftest$ac_exeext && - $as_test_x conftest$ac_exeext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then ac_cv_lib_svld_dlopen=yes else echo "$as_me: failed program was:" >&5 @@ -10785,7 +11474,7 @@ ac_cv_lib_svld_dlopen=no fi -rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ +rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LIBS=$ac_check_lib_save_LIBS fi @@ -10836,11 +11525,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_c_werror_flag" || - test ! -s conftest.err - } && test -s conftest$ac_exeext && - $as_test_x conftest$ac_exeext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then ac_cv_lib_dld_dld_link=yes else echo "$as_me: failed program was:" >&5 @@ -10849,7 +11554,7 @@ ac_cv_lib_dld_dld_link=no fi -rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ +rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LIBS=$ac_check_lib_save_LIBS fi @@ -10905,7 +11610,7 @@ lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext < conftest.$ac_ext <&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_cxx_werror_flag" || - test ! -s conftest.err - } && test -s conftest$ac_exeext && - $as_test_x conftest$ac_exeext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_cxx_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then aix_libpath=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e '/Import File Strings/,/^$/ { /^0/ { s/^0 *\(.*\)$/\1/; p; } }'` @@ -12110,7 +12831,7 @@ fi -rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ +rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext if test -z "$aix_libpath"; then aix_libpath="/usr/lib:/lib"; fi @@ -12152,11 +12873,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_cxx_werror_flag" || - test ! -s conftest.err - } && test -s conftest$ac_exeext && - $as_test_x conftest$ac_exeext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_cxx_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then aix_libpath=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e '/Import File Strings/,/^$/ { /^0/ { s/^0 *\(.*\)$/\1/; p; } }'` @@ -12170,7 +12907,7 @@ fi -rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ +rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext if test -z "$aix_libpath"; then aix_libpath="/usr/lib:/lib"; fi @@ -13341,11 +14078,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:13344: $lt_compile\"" >&5) + (eval echo "\"\$as_me:14081: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:13348: \$? = $ac_status" >&5 + echo "$as_me:14085: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -13445,11 +14182,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:13448: $lt_compile\"" >&5) + (eval echo "\"\$as_me:14185: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:13452: \$? = $ac_status" >&5 + echo "$as_me:14189: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized @@ -15015,11 +15752,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:15018: $lt_compile\"" >&5) + (eval echo "\"\$as_me:15755: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:15022: \$? = $ac_status" >&5 + echo "$as_me:15759: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -15119,11 +15856,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:15122: $lt_compile\"" >&5) + (eval echo "\"\$as_me:15859: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:15126: \$? = $ac_status" >&5 + echo "$as_me:15863: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized @@ -15589,11 +16326,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_f77_werror_flag" || - test ! -s conftest.err - } && test -s conftest$ac_exeext && - $as_test_x conftest$ac_exeext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_f77_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then aix_libpath=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e '/Import File Strings/,/^$/ { /^0/ { s/^0 *\(.*\)$/\1/; p; } }'` @@ -15607,7 +16360,7 @@ fi -rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ +rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext if test -z "$aix_libpath"; then aix_libpath="/usr/lib:/lib"; fi @@ -15638,11 +16391,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_f77_werror_flag" || - test ! -s conftest.err - } && test -s conftest$ac_exeext && - $as_test_x conftest$ac_exeext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_f77_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then aix_libpath=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e '/Import File Strings/,/^$/ { /^0/ { s/^0 *\(.*\)$/\1/; p; } }'` @@ -15656,7 +16425,7 @@ fi -rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ +rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext if test -z "$aix_libpath"; then aix_libpath="/usr/lib:/lib"; fi @@ -17322,11 +18091,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:17325: $lt_compile\"" >&5) + (eval echo "\"\$as_me:18094: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:17329: \$? = $ac_status" >&5 + echo "$as_me:18098: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -17590,11 +18359,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:17593: $lt_compile\"" >&5) + (eval echo "\"\$as_me:18362: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:17597: \$? = $ac_status" >&5 + echo "$as_me:18366: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -17694,11 +18463,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:17697: $lt_compile\"" >&5) + (eval echo "\"\$as_me:18466: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:17701: \$? = $ac_status" >&5 + echo "$as_me:18470: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized @@ -18174,11 +18943,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_c_werror_flag" || - test ! -s conftest.err - } && test -s conftest$ac_exeext && - $as_test_x conftest$ac_exeext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then aix_libpath=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e '/Import File Strings/,/^$/ { /^0/ { s/^0 *\(.*\)$/\1/; p; } }'` @@ -18192,7 +18977,7 @@ fi -rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ +rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext if test -z "$aix_libpath"; then aix_libpath="/usr/lib:/lib"; fi @@ -18233,11 +19018,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_c_werror_flag" || - test ! -s conftest.err - } && test -s conftest$ac_exeext && - $as_test_x conftest$ac_exeext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then aix_libpath=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e '/Import File Strings/,/^$/ { /^0/ { s/^0 *\(.*\)$/\1/; p; } }'` @@ -18251,7 +19052,7 @@ fi -rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ +rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext if test -z "$aix_libpath"; then aix_libpath="/usr/lib:/lib"; fi @@ -20961,10 +21762,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_c_werror_flag" || - test ! -s conftest.err - } && test -s conftest.$ac_objext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then ac_cv_header_stdc=yes else echo "$as_me: failed program was:" >&5 @@ -20992,7 +21810,7 @@ else ac_cv_header_stdc=no fi -rm -f -r conftest* +rm -f conftest* fi @@ -21013,7 +21831,7 @@ else ac_cv_header_stdc=no fi -rm -f -r conftest* +rm -f conftest* fi @@ -21141,10 +21959,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_c_werror_flag" || - test ! -s conftest.err - } && test -s conftest.$ac_objext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then ac_cv_header_sys_wait_h=yes else echo "$as_me: failed program was:" >&5 @@ -21207,11 +22042,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_c_werror_flag" || - test ! -s conftest.err - } && test -s conftest$ac_exeext && - $as_test_x conftest$ac_exeext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then llvm_cv_link_use_r=yes else echo "$as_me: failed program was:" >&5 @@ -21220,7 +22071,7 @@ llvm_cv_link_use_r=no fi -rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ +rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext CFLAGS="$oldcflags" ac_ext=c @@ -21305,11 +22156,27 @@ rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { - test -z "$ac_c_werror_flag" || - test ! -s conftest.err - } && test -s conftest$ac_exeext && - $as_test_x conftest$ac_exeext; then + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then ac_cv_func_re_comp=yes else echo "$as_me: failed program was:" >&5 @@ -21318,7 +22185,7 @@ ac_cv_func_re_comp=no fi -rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ +rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext fi { echo "$as_me:$LINENO: result: $ac_cv_func_re_comp" >&5 @@ -21506,8 +22373,7 @@ ## M4sh Initialization. ## ## --------------------- ## -# Be more Bourne compatible -DUALCASE=1; export DUALCASE # for MKS sh +# Be Bourne compatible if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then emulate sh NULLCMD=: @@ -21516,13 +22382,10 @@ alias -g '${1+"$@"}'='"$@"' setopt NO_GLOB_SUBST else - case `(set -o) 2>/dev/null` in - *posix*) set -o posix ;; -esac - + case `(set -o) 2>/dev/null` in *posix*) set -o posix;; esac fi - - +BIN_SH=xpg4; export BIN_SH # for Tru64 +DUALCASE=1; export DUALCASE # for MKS sh # PATH needs CR @@ -21746,28 +22609,19 @@ as_mkdir_p=false fi -if test -x / >/dev/null 2>&1; then - as_test_x='test -x' +# Find out whether ``test -x'' works. Don't use a zero-byte file, as +# systems may use methods other than mode bits to determine executability. +cat >conf$$.file <<_ASEOF +#! /bin/sh +exit 0 +_ASEOF +chmod +x conf$$.file +if test -x conf$$.file >/dev/null 2>&1; then + as_executable_p="test -x" else - if ls -dL / >/dev/null 2>&1; then - as_ls_L_option=L - else - as_ls_L_option= - fi - as_test_x=' - eval sh -c '\'' - if test -d "$1"; then - test -d "$1/."; - else - case $1 in - -*)set "./$1";; - esac; - case `ls -ld'$as_ls_L_option' "$1" 2>/dev/null` in - ???[sx]*):;;*)false;;esac;fi - '\'' sh - ' + as_executable_p=: fi -as_executable_p=$as_test_x +rm -f conf$$.file # Sed expression to map a string onto a valid CPP name. as_tr_cpp="eval sed 'y%*$as_cr_letters%P$as_cr_LETTERS%;s%[^_$as_cr_alnum]%_%g'" @@ -21783,7 +22637,7 @@ # values after options handling. ac_log=" This file was extended by LLVM-TEST $as_me 2.8svn, which was -generated by GNU Autoconf 2.61. Invocation command line was +generated by GNU Autoconf 2.60. Invocation command line was CONFIG_FILES = $CONFIG_FILES CONFIG_HEADERS = $CONFIG_HEADERS @@ -21811,7 +22665,7 @@ Usage: $0 [OPTIONS] [FILE]... -h, --help print this help, then exit - -V, --version print version number and configuration settings, then exit + -V, --version print version number, then exit -q, --quiet do not print progress messages -d, --debug don't remove temporary files --recheck update $as_me by reconfiguring in the same conditions @@ -21830,7 +22684,7 @@ cat >>$CONFIG_STATUS <<_ACEOF ac_cs_version="\\ LLVM-TEST config.status 2.8svn -configured by $0, generated by GNU Autoconf 2.61, +configured by $0, generated by GNU Autoconf 2.60, with options \\"`echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" Copyright (C) 2006 Free Software Foundation, Inc. @@ -22097,6 +22951,10 @@ LLVM_SRC!$LLVM_SRC$ac_delim LLVM_OBJ!$LLVM_OBJ$ac_delim LLVM_EXTERNALS!$LLVM_EXTERNALS$ac_delim +CLANGPATH!$CLANGPATH$ac_delim +CLANGXXPATH!$CLANGXXPATH$ac_delim +ENABLE_BUILT_CLANG!$ENABLE_BUILT_CLANG$ac_delim +LLVMCC_OPTION!$LLVMCC_OPTION$ac_delim LLVMGCC!$LLVMGCC$ac_delim LLVMGXX!$LLVMGXX$ac_delim LLVMCC_EMITIR_FLAG!$LLVMCC_EMITIR_FLAG$ac_delim @@ -22125,10 +22983,6 @@ NURBS_ROOT!$NURBS_ROOT$ac_delim USE_NURBS!$USE_NURBS$ac_delim HMMER_ROOT!$HMMER_ROOT$ac_delim -USE_HMMER!$USE_HMMER$ac_delim -SKIDMARKS10_ROOT!$SKIDMARKS10_ROOT$ac_delim -USE_SKIDMARKS10!$USE_SKIDMARKS10$ac_delim -DISABLE_LLC_DIFFS!$DISABLE_LLC_DIFFS$ac_delim _ACEOF if test `sed -n "s/.*$ac_delim\$/X/p" conf$$subs.sed | grep -c X` = 97; then @@ -22170,6 +23024,10 @@ ac_delim='%!_!# ' for ac_last_try in false false false false false :; do cat >conf$$subs.sed <<_ACEOF +USE_HMMER!$USE_HMMER$ac_delim +SKIDMARKS10_ROOT!$SKIDMARKS10_ROOT$ac_delim +USE_SKIDMARKS10!$USE_SKIDMARKS10$ac_delim +DISABLE_LLC_DIFFS!$DISABLE_LLC_DIFFS$ac_delim CXX!$CXX$ac_delim CXXFLAGS!$CXXFLAGS$ac_delim ac_ct_CXX!$ac_ct_CXX$ac_delim @@ -22202,7 +23060,7 @@ LTLIBOBJS!$LTLIBOBJS$ac_delim _ACEOF - if test `sed -n "s/.*$ac_delim\$/X/p" conf$$subs.sed | grep -c X` = 30; then + if test `sed -n "s/.*$ac_delim\$/X/p" conf$$subs.sed | grep -c X` = 34; then break elif $ac_last_try; then { { echo "$as_me:$LINENO: error: could not make $CONFIG_STATUS" >&5 From echristo at apple.com Tue Sep 20 19:53:42 2011 From: echristo at apple.com (Eric Christopher) Date: Wed, 21 Sep 2011 00:53:42 -0000 Subject: [llvm-commits] [llvm] r140220 - in /llvm/trunk: Makefile.config.in autoconf/configure.ac configure Message-ID: <20110921005342.7B1DD2A6C12C@llvm.org> Author: echristo Date: Tue Sep 20 19:53:42 2011 New Revision: 140220 URL: http://llvm.org/viewvc/llvm-project?rev=140220&view=rev Log: Remove the rest of the compiler checking from the top level configure script. Only the testsuite project needs to know this information. Modified: llvm/trunk/Makefile.config.in llvm/trunk/autoconf/configure.ac llvm/trunk/configure Modified: llvm/trunk/Makefile.config.in URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/Makefile.config.in?rev=140220&r1=140219&r2=140220&view=diff ============================================================================== --- llvm/trunk/Makefile.config.in (original) +++ llvm/trunk/Makefile.config.in Tue Sep 20 19:53:42 2011 @@ -188,30 +188,6 @@ # Targets that we should build TARGETS_TO_BUILD=@TARGETS_TO_BUILD@ -# Path to location for LLVM C/C++ front-end. You can modify this if you -# want to override the value set by configure. -LLVMGCCDIR := @LLVMGCCDIR@ - -# Full pathnames of LLVM C/C++ front-end 'cc1' and 'cc1plus' binaries: -LLVMGCC := @LLVMGCC@ -LLVMGXX := @LLVMGXX@ -LLVMCC1 := @LLVMCC1@ -LLVMCC1PLUS := @LLVMCC1PLUS@ -LLVMGCC_LANGS := @LLVMGCC_LANGS@ -LLVMGCC_DRAGONEGG := @LLVMGCC_DRAGONEGG@ - -# Information on Clang, if configured. -CLANGPATH := @CLANGPATH@ -CLANGXXPATH := @CLANGXXPATH@ -ENABLE_BUILT_CLANG := @ENABLE_BUILT_CLANG@ - -# The LLVM capable compiler to use. -LLVMCC_OPTION := @LLVMCC_OPTION@ - -# The flag used to emit LLVM IR. -LLVMCC_EMITIR_FLAG = @LLVMCC_EMITIR_FLAG@ -LLVMCC_DISABLEOPT_FLAGS := @LLVMCC_DISABLEOPT_FLAGS@ - # Path to directory where object files should be stored during a build. # Set OBJ_ROOT to "." if you do not want to use a separate place for # object files. Modified: llvm/trunk/autoconf/configure.ac URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/autoconf/configure.ac?rev=140220&r1=140219&r2=140220&view=diff ============================================================================== --- llvm/trunk/autoconf/configure.ac (original) +++ llvm/trunk/autoconf/configure.ac Tue Sep 20 19:53:42 2011 @@ -724,56 +724,6 @@ AC_DEFINE_UNQUOTED([ENABLE_CBE_PRINTF_A],$ENABLE_CBE_PRINTF_A, [Define if CBE is enabled for printf %a output]) -dnl Allow a specific Clang compiler to be used with this LLVM config. -AC_ARG_WITH(clang, - AS_HELP_STRING([--with-clang], - [Specify location of clang compiler (default is --with-built-clang)]), - [],[with_clang=default]) - -dnl Enable use of the built Clang. -AC_ARG_WITH(built-clang, - AS_HELP_STRING([--with-built-clang], - [Use the compiled Clang as the LLVM compiler (default=check)]), - [],[with_built_clang=check]) - -dnl Select the Clang compiler option. -dnl -dnl If --with-clang is given, always honor that; otherwise honor -dnl --with-built-clang, or check if we have the clang sources. -AC_MSG_CHECKING([clang compiler]) -WITH_CLANGPATH="" -WITH_BUILT_CLANG=0 -if test "$with_clang" != "default"; then - WITH_CLANGPATH="$with_clang" - if ! test -x "$WITH_CLANGPATH"; then - AC_MSG_ERROR([invalid --with-clang, path does not specify an executable]) - fi -elif test "$with_built_clang" = "yes"; then - WITH_BUILT_CLANG=1 -elif test "$with_built_clang" = "no"; then - WITH_BUILT_CLANG=0 -else - if test "$with_built_clang" != "check"; then - AC_MSG_ERROR([invalid value for --with-built-clang.]) - fi - - if test -f ${srcdir}/tools/clang/README.txt; then - WITH_BUILT_CLANG=1 - fi -fi - -if ! test -z "$WITH_CLANGPATH"; then - AC_MSG_RESULT([$WITH_CLANGPATH]) - WITH_CLANGXXPATH=`"$WITH_CLANGPATH" --print-prog-name=clang++` -elif test "$WITH_BUILT_CLANG" = "1"; then - AC_MSG_RESULT([built]) -else - AC_MSG_RESULT([none]) -fi -AC_SUBST(CLANGPATH,$WITH_CLANGPATH) -AC_SUBST(CLANGXXPATH,$WITH_CLANGXXPATH) -AC_SUBST(ENABLE_BUILT_CLANG,$WITH_BUILT_CLANG) - dnl Override the option to use for optimized builds. AC_ARG_WITH(optimize-option, AS_HELP_STRING([--with-optimize-option], @@ -1101,28 +1051,6 @@ AC_LIBTOOL_DLOPEN AC_LIB_LTDL -dnl Select the LLVM capable compiler to use, we default to using clang if -dnl found. -AC_ARG_WITH(llvmcc, - AS_HELP_STRING([--with-llvmcc=], - [Choose the LLVM capable compiler to use (llvm-gcc, clang, or none; default=check)]), - [],[with_llvmcc=check]) -AC_MSG_CHECKING([LLVM capable compiler]) -if test "$with_llvmcc" != "check"; then - if (test "$with_llvmcc" != "llvm-gcc" && - test "$with_llvmcc" != "clang" && - test "$with_llvmcc" != "none"); then - AC_MSG_ERROR([invalid value for --with-llvmcc, expected 'clang', 'llvm-gcc', or 'none'.]) - fi - WITH_LLVMCC="$with_llvmcc" -elif test -n "$WITH_CLANGPATH" || test "$WITH_BUILT_CLANG" -ne "0"; then - WITH_LLVMCC=clang -else - WITH_LLVMCC=none -fi -AC_MSG_RESULT([$WITH_LLVMCC]) -AC_SUBST(LLVMCC_OPTION,$WITH_LLVMCC) - AC_MSG_CHECKING([tool compatibility]) dnl Ensure that compilation tools are GCC or a GNU compatible compiler such as Modified: llvm/trunk/configure URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/configure?rev=140220&r1=140219&r2=140220&view=diff ============================================================================== --- llvm/trunk/configure (original) +++ llvm/trunk/configure Tue Sep 20 19:53:42 2011 @@ -705,9 +705,6 @@ LLVM_ENUM_ASM_PARSERS LLVM_ENUM_DISASSEMBLERS ENABLE_CBE_PRINTF_A -CLANGPATH -CLANGXXPATH -ENABLE_BUILT_CLANG OPTIMIZE_OPTION EXTRA_OPTIONS EXTRA_LD_OPTIONS @@ -763,7 +760,6 @@ CONVENIENCE_LTDL_TRUE CONVENIENCE_LTDL_FALSE LIBADD_DL -LLVMCC_OPTION NO_VARIADIC_MACROS NO_MISSING_FIELD_INITIALIZERS USE_UDIS86 @@ -1431,10 +1427,6 @@ Optional Packages: --with-PACKAGE[=ARG] use PACKAGE [ARG=yes] --without-PACKAGE do not use PACKAGE (same as --with-PACKAGE=no) - --with-clang Specify location of clang compiler (default is - --with-built-clang) - --with-built-clang Use the compiled Clang as the LLVM compiler - (default=check) --with-optimize-option Select the compiler options to use for optimized builds --with-extra-options Specify additional options to compile LLVM with @@ -1457,8 +1449,6 @@ --with-bug-report-url Specify the URL where bug reports should be submitted (default=http://llvm.org/bugs/) --with-tclinclude directory where tcl headers are - --with-llvmcc= Choose the LLVM capable compiler to use (llvm-gcc, - clang, or none; default=check) --with-udis86= Use udis86 external x86 disassembler library --with-oprofile= Tell OProfile >= 0.9.4 how to symbolize JIT output @@ -5427,69 +5417,6 @@ -# Check whether --with-clang was given. -if test "${with_clang+set}" = set; then - withval=$with_clang; -else - with_clang=default -fi - - - -# Check whether --with-built-clang was given. -if test "${with_built_clang+set}" = set; then - withval=$with_built_clang; -else - with_built_clang=check -fi - - -{ echo "$as_me:$LINENO: checking clang compiler" >&5 -echo $ECHO_N "checking clang compiler... $ECHO_C" >&6; } -WITH_CLANGPATH="" -WITH_BUILT_CLANG=0 -if test "$with_clang" != "default"; then - WITH_CLANGPATH="$with_clang" - if ! test -x "$WITH_CLANGPATH"; then - { { echo "$as_me:$LINENO: error: invalid --with-clang, path does not specify an executable" >&5 -echo "$as_me: error: invalid --with-clang, path does not specify an executable" >&2;} - { (exit 1); exit 1; }; } - fi -elif test "$with_built_clang" = "yes"; then - WITH_BUILT_CLANG=1 -elif test "$with_built_clang" = "no"; then - WITH_BUILT_CLANG=0 -else - if test "$with_built_clang" != "check"; then - { { echo "$as_me:$LINENO: error: invalid value for --with-built-clang." >&5 -echo "$as_me: error: invalid value for --with-built-clang." >&2;} - { (exit 1); exit 1; }; } - fi - - if test -f ${srcdir}/tools/clang/README.txt; then - WITH_BUILT_CLANG=1 - fi -fi - -if ! test -z "$WITH_CLANGPATH"; then - { echo "$as_me:$LINENO: result: $WITH_CLANGPATH" >&5 -echo "${ECHO_T}$WITH_CLANGPATH" >&6; } - WITH_CLANGXXPATH=`"$WITH_CLANGPATH" --print-prog-name=clang++` -elif test "$WITH_BUILT_CLANG" = "1"; then - { echo "$as_me:$LINENO: result: built" >&5 -echo "${ECHO_T}built" >&6; } -else - { echo "$as_me:$LINENO: result: none" >&5 -echo "${ECHO_T}none" >&6; } -fi -CLANGPATH=$WITH_CLANGPATH - -CLANGXXPATH=$WITH_CLANGXXPATH - -ENABLE_BUILT_CLANG=$WITH_BUILT_CLANG - - - # Check whether --with-optimize-option was given. if test "${with_optimize_option+set}" = set; then withval=$with_optimize_option; @@ -10526,7 +10453,7 @@ lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext <&5 -echo $ECHO_N "checking LLVM capable compiler... $ECHO_C" >&6; } -if test "$with_llvmcc" != "check"; then - if (test "$with_llvmcc" != "llvm-gcc" && - test "$with_llvmcc" != "clang" && - test "$with_llvmcc" != "none"); then - { { echo "$as_me:$LINENO: error: invalid value for --with-llvmcc, expected 'clang', 'llvm-gcc', or 'none'." >&5 -echo "$as_me: error: invalid value for --with-llvmcc, expected 'clang', 'llvm-gcc', or 'none'." >&2;} - { (exit 1); exit 1; }; } - fi - WITH_LLVMCC="$with_llvmcc" -elif test -n "$WITH_CLANGPATH" || test "$WITH_BUILT_CLANG" -ne "0"; then - WITH_LLVMCC=clang -else - WITH_LLVMCC=none -fi -{ echo "$as_me:$LINENO: result: $WITH_LLVMCC" >&5 -echo "${ECHO_T}$WITH_LLVMCC" >&6; } -LLVMCC_OPTION=$WITH_LLVMCC - - { echo "$as_me:$LINENO: checking tool compatibility" >&5 echo $ECHO_N "checking tool compatibility... $ECHO_C" >&6; } @@ -22196,9 +22094,6 @@ LLVM_ENUM_ASM_PARSERS!$LLVM_ENUM_ASM_PARSERS$ac_delim LLVM_ENUM_DISASSEMBLERS!$LLVM_ENUM_DISASSEMBLERS$ac_delim ENABLE_CBE_PRINTF_A!$ENABLE_CBE_PRINTF_A$ac_delim -CLANGPATH!$CLANGPATH$ac_delim -CLANGXXPATH!$CLANGXXPATH$ac_delim -ENABLE_BUILT_CLANG!$ENABLE_BUILT_CLANG$ac_delim OPTIMIZE_OPTION!$OPTIMIZE_OPTION$ac_delim EXTRA_OPTIONS!$EXTRA_OPTIONS$ac_delim EXTRA_LD_OPTIONS!$EXTRA_LD_OPTIONS$ac_delim @@ -22254,7 +22149,6 @@ CONVENIENCE_LTDL_TRUE!$CONVENIENCE_LTDL_TRUE$ac_delim CONVENIENCE_LTDL_FALSE!$CONVENIENCE_LTDL_FALSE$ac_delim LIBADD_DL!$LIBADD_DL$ac_delim -LLVMCC_OPTION!$LLVMCC_OPTION$ac_delim NO_VARIADIC_MACROS!$NO_VARIADIC_MACROS$ac_delim NO_MISSING_FIELD_INITIALIZERS!$NO_MISSING_FIELD_INITIALIZERS$ac_delim USE_UDIS86!$USE_UDIS86$ac_delim @@ -22284,7 +22178,7 @@ LTLIBOBJS!$LTLIBOBJS$ac_delim _ACEOF - if test `sed -n "s/.*$ac_delim\$/X/p" conf$$subs.sed | grep -c X` = 92; then + if test `sed -n "s/.*$ac_delim\$/X/p" conf$$subs.sed | grep -c X` = 88; then break elif $ac_last_try; then { { echo "$as_me:$LINENO: error: could not make $CONFIG_STATUS" >&5 From benny.kra at googlemail.com Tue Sep 20 20:13:16 2011 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Wed, 21 Sep 2011 01:13:16 -0000 Subject: [llvm-commits] [llvm] r140223 - /llvm/trunk/include/llvm/DebugInfo/DIContext.h Message-ID: <20110921011317.06C7D2A6C12C@llvm.org> Author: d0k Date: Tue Sep 20 20:13:16 2011 New Revision: 140223 URL: http://llvm.org/viewvc/llvm-project?rev=140223&view=rev Log: DebugInfo: Add equality operators and default constructor to DILineInfo. Modified: llvm/trunk/include/llvm/DebugInfo/DIContext.h Modified: llvm/trunk/include/llvm/DebugInfo/DIContext.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/DebugInfo/DIContext.h?rev=140223&r1=140222&r2=140223&view=diff ============================================================================== --- llvm/trunk/include/llvm/DebugInfo/DIContext.h (original) +++ llvm/trunk/include/llvm/DebugInfo/DIContext.h Tue Sep 20 20:13:16 2011 @@ -17,6 +17,7 @@ #include "llvm/ADT/StringRef.h" #include "llvm/Support/DataTypes.h" +#include namespace llvm { @@ -28,12 +29,21 @@ uint32_t Line; uint32_t Column; public: + DILineInfo() : FileName(""), Line(0), Column(0) {} DILineInfo(const char *fileName, uint32_t line, uint32_t column) : FileName(fileName), Line(line), Column(column) {} const char *getFileName() const { return FileName; } uint32_t getLine() const { return Line; } uint32_t getColumn() const { return Column; } + + bool operator==(const DILineInfo &RHS) const { + return Line == RHS.Line && Column == RHS.Column && + std::strcmp(FileName, RHS.FileName) == 0; + } + bool operator!=(const DILineInfo &RHS) const { + return !(*this == RHS); + } }; class DIContext { From benny.kra at googlemail.com Tue Sep 20 20:13:19 2011 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Wed, 21 Sep 2011 01:13:19 -0000 Subject: [llvm-commits] [llvm] r140224 - in /llvm/trunk/tools/llvm-objdump: CMakeLists.txt MachODump.cpp Makefile Message-ID: <20110921011319.A67722A6C12C@llvm.org> Author: d0k Date: Tue Sep 20 20:13:19 2011 New Revision: 140224 URL: http://llvm.org/viewvc/llvm-project?rev=140224&view=rev Log: llvm-objdump: Output line info next to the disassembly if available. MachO-only at the moment, sorry. Usage: $ llvm-objdump -d -m -g -dsym=a.out.dSYM/Contents/Resources/DWARF/a.out a.out _main: 100000e90: 55 pushq %rbp ## test.c:11:3 ? Modified: llvm/trunk/tools/llvm-objdump/CMakeLists.txt llvm/trunk/tools/llvm-objdump/MachODump.cpp llvm/trunk/tools/llvm-objdump/Makefile Modified: llvm/trunk/tools/llvm-objdump/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-objdump/CMakeLists.txt?rev=140224&r1=140223&r2=140224&view=diff ============================================================================== --- llvm/trunk/tools/llvm-objdump/CMakeLists.txt (original) +++ llvm/trunk/tools/llvm-objdump/CMakeLists.txt Tue Sep 20 20:13:19 2011 @@ -1,5 +1,6 @@ set(LLVM_LINK_COMPONENTS ${LLVM_TARGETS_TO_BUILD} + DebugInfo MC MCParser MCDisassembler Modified: llvm/trunk/tools/llvm-objdump/MachODump.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-objdump/MachODump.cpp?rev=140224&r1=140223&r2=140224&view=diff ============================================================================== --- llvm/trunk/tools/llvm-objdump/MachODump.cpp (original) +++ llvm/trunk/tools/llvm-objdump/MachODump.cpp Tue Sep 20 20:13:19 2011 @@ -18,6 +18,7 @@ #include "llvm/ADT/OwningPtr.h" #include "llvm/ADT/Triple.h" #include "llvm/ADT/STLExtras.h" +#include "llvm/DebugInfo/DIContext.h" #include "llvm/MC/MCAsmInfo.h" #include "llvm/MC/MCDisassembler.h" #include "llvm/MC/MCInst.h" @@ -44,6 +45,12 @@ CFG("cfg", cl::desc("Create a CFG for every symbol in the object file and" "write it to a graphviz file (MachO-only)")); +static cl::opt + UseDbg("g", cl::desc("Print line information from debug info if available")); + +static cl::opt + DSYMFile("dsym", cl::desc("Use .dSYM file for debug info")); + static const Target *GetTarget(const MachOObject *MachOObj) { // Figure out the target triple. llvm::Triple TT("unknown-unknown-unknown"); @@ -94,7 +101,6 @@ bool operator<(const Symbol &RHS) const { return Value < RHS.Value; } }; - template static Section copySection(const T &Sect) { Section S; @@ -205,6 +211,67 @@ Out << "}\n"; } +static void getSectionsAndSymbols(const macho::Header &Header, + MachOObject *MachOObj, + InMemoryStruct *SymtabLC, + std::vector
    &Sections, + std::vector &Symbols, + SmallVectorImpl &FoundFns) { + // Make a list of all symbols in the object file. + for (unsigned i = 0; i != Header.NumLoadCommands; ++i) { + const MachOObject::LoadCommandInfo &LCI = MachOObj->getLoadCommandInfo(i); + if (LCI.Command.Type == macho::LCT_Segment) { + InMemoryStruct SegmentLC; + MachOObj->ReadSegmentLoadCommand(LCI, SegmentLC); + + // Store the sections in this segment. + for (unsigned SectNum = 0; SectNum != SegmentLC->NumSections; ++SectNum) { + InMemoryStruct Sect; + MachOObj->ReadSection(LCI, SectNum, Sect); + Sections.push_back(copySection(Sect)); + + // Store the symbols in this section. + if (SymtabLC) { + for (unsigned i = 0; i != (*SymtabLC)->NumSymbolTableEntries; ++i) { + InMemoryStruct STE; + MachOObj->ReadSymbolTableEntry((*SymtabLC)->SymbolTableOffset, i, + STE); + Symbols.push_back(copySymbol(STE)); + } + } + } + } else if (LCI.Command.Type == macho::LCT_Segment64) { + InMemoryStruct Segment64LC; + MachOObj->ReadSegment64LoadCommand(LCI, Segment64LC); + + // Store the sections in this segment. + for (unsigned SectNum = 0; SectNum != Segment64LC->NumSections; + ++SectNum) { + InMemoryStruct Sect64; + MachOObj->ReadSection64(LCI, SectNum, Sect64); + Sections.push_back(copySection(Sect64)); + + // Store the symbols in this section. + if (SymtabLC) { + for (unsigned i = 0; i != (*SymtabLC)->NumSymbolTableEntries; ++i) { + InMemoryStruct STE; + MachOObj->ReadSymbol64TableEntry((*SymtabLC)->SymbolTableOffset, i, + STE); + Symbols.push_back(copySymbol(STE)); + } + } + } + } else if (LCI.Command.Type == macho::LCT_FunctionStarts) { + // We found a function starts segment, parse the addresses for later + // consumption. + InMemoryStruct LLC; + MachOObj->ReadLinkeditDataLoadCommand(LCI, LLC); + + MachOObj->ReadULEB128s(LLC->DataOffset, FoundFns); + } + } +} + void llvm::DisassembleInputMachO(StringRef Filename) { OwningPtr Buff; @@ -260,60 +327,13 @@ std::vector
    Sections; std::vector Symbols; - std::vector UnsortedSymbols; // FIXME: duplication SmallVector FoundFns; - // Make a list of all symbols in the object file. - for (unsigned i = 0; i != Header.NumLoadCommands; ++i) { - const MachOObject::LoadCommandInfo &LCI = MachOObj->getLoadCommandInfo(i); - if (LCI.Command.Type == macho::LCT_Segment) { - InMemoryStruct SegmentLC; - MachOObj->ReadSegmentLoadCommand(LCI, SegmentLC); - - // Store the sections in this segment. - for (unsigned SectNum = 0; SectNum != SegmentLC->NumSections; ++SectNum) { - InMemoryStruct Sect; - MachOObj->ReadSection(LCI, SectNum, Sect); - Sections.push_back(copySection(Sect)); - - // Store the symbols in this section. - for (unsigned i = 0; i != SymtabLC->NumSymbolTableEntries; ++i) { - InMemoryStruct STE; - MachOObj->ReadSymbolTableEntry(SymtabLC->SymbolTableOffset, i, STE); - Symbols.push_back(copySymbol(STE)); - UnsortedSymbols.push_back(Symbols.back()); - } - } - } else if (LCI.Command.Type == macho::LCT_Segment64) { - InMemoryStruct Segment64LC; - MachOObj->ReadSegment64LoadCommand(LCI, Segment64LC); - - // Store the sections in this segment. - for (unsigned SectNum = 0; SectNum != Segment64LC->NumSections; - ++SectNum) { - InMemoryStruct Sect64; - MachOObj->ReadSection64(LCI, SectNum, Sect64); - Sections.push_back(copySection(Sect64)); - - // Store the symbols in this section. - for (unsigned i = 0; i != SymtabLC->NumSymbolTableEntries; ++i) { - InMemoryStruct STE; - MachOObj->ReadSymbol64TableEntry(SymtabLC->SymbolTableOffset, i, STE); - Symbols.push_back(copySymbol(STE)); - UnsortedSymbols.push_back(Symbols.back()); - } - } - } else if (LCI.Command.Type == macho::LCT_FunctionStarts) { - // We found a function starts segment, parse the addresses for later - // consumption. - InMemoryStruct LLC; - MachOObj->ReadLinkeditDataLoadCommand(LCI, LLC); - - MachOObj->ReadULEB128s(LLC->DataOffset, FoundFns); - } - } - + getSectionsAndSymbols(Header, MachOObj.get(), &SymtabLC, Sections, Symbols, + FoundFns); + // Make a copy of the unsorted symbol list. FIXME: duplication + std::vector UnsortedSymbols(Symbols); // Sort the symbols by address, just in case they didn't come in that way. array_pod_sort(Symbols.begin(), Symbols.end()); @@ -323,6 +343,61 @@ raw_ostream &DebugOut = nulls(); #endif + StringRef DebugAbbrevSection, DebugInfoSection, DebugArangesSection, + DebugLineSection, DebugStrSection; + OwningPtr diContext; + // Try to find debug info and set up the DIContext for it. + if (UseDbg) { + ArrayRef
    DebugSections = Sections; + std::vector
    DSYMSections; + OwningPtr DSYMObj; + + // A separate DSym file path was specified, parse it as a macho file, + // get the sections and supply it to the section name parsing machinery. + if (!DSYMFile.empty()) { + OwningPtr Buf; + if (error_code ec = MemoryBuffer::getFileOrSTDIN(DSYMFile.c_str(), Buf)) { + errs() << "llvm-objdump: " << Filename << ": " << ec.message() << '\n'; + return; + } + DSYMObj.reset(MachOObject::LoadFromBuffer(Buf.take())); + const macho::Header &Header = DSYMObj->getHeader(); + + std::vector Symbols; + SmallVector FoundFns; + getSectionsAndSymbols(Header, DSYMObj.get(), 0, DSYMSections, Symbols, + FoundFns); + DebugSections = DSYMSections; + } + + // Find the named debug info sections. + for (unsigned SectIdx = 0; SectIdx != DebugSections.size(); SectIdx++) { + if (!strcmp(DebugSections[SectIdx].Name, "__debug_abbrev")) + DebugAbbrevSection = DSYMObj->getData(DebugSections[SectIdx].Offset, + DebugSections[SectIdx].Size); + else if (!strcmp(DebugSections[SectIdx].Name, "__debug_info")) + DebugInfoSection = DSYMObj->getData(DebugSections[SectIdx].Offset, + DebugSections[SectIdx].Size); + else if (!strcmp(DebugSections[SectIdx].Name, "__debug_aranges")) + DebugArangesSection = DSYMObj->getData(DebugSections[SectIdx].Offset, + DebugSections[SectIdx].Size); + else if (!strcmp(DebugSections[SectIdx].Name, "__debug_line")) + DebugLineSection = DSYMObj->getData(DebugSections[SectIdx].Offset, + DebugSections[SectIdx].Size); + else if (!strcmp(DebugSections[SectIdx].Name, "__debug_str")) + DebugStrSection = DSYMObj->getData(DebugSections[SectIdx].Offset, + DebugSections[SectIdx].Size); + } + + // Setup the DIContext. + diContext.reset(DIContext::getDWARFContext(MachOObj->isLittleEndian(), + DebugInfoSection, + DebugAbbrevSection, + DebugArangesSection, + DebugLineSection, + DebugStrSection)); + } + FunctionMapTy FunctionMap; FunctionListTy Functions; @@ -374,6 +449,7 @@ // Normal disassembly, print addresses, bytes and mnemonic form. outs() << MachOObj->getStringAtIndex(Symbols[SymIdx].StringIndex) << ":\n"; + DILineInfo lastLine; for (uint64_t Index = Start; Index < End; Index += Size) { MCInst Inst; @@ -382,6 +458,18 @@ outs() << format("%8llx:\t", Sections[SectIdx].Address + Index); DumpBytes(StringRef(Bytes.data() + Index, Size)); IP->printInst(&Inst, outs(), ""); + + // Print debug info. + if (diContext) { + DILineInfo dli = + diContext->getLineInfoForAddress(Sections[SectIdx].Address + + Index); + // Print valid line info if it changed. + if (dli != lastLine && dli.getLine() != 0) + outs() << "\t## " << dli.getFileName() << ':' + << dli.getLine() << ':' << dli.getColumn(); + lastLine = dli; + } outs() << "\n"; } else { errs() << "llvm-objdump: warning: invalid instruction encoding\n"; @@ -464,6 +552,7 @@ if (fi->second.contains(fi->first)) // Print a header for simple loops outs() << "# Loop begin:\n"; + DILineInfo lastLine; // Walk over the instructions and print them. for (unsigned ii = 0, ie = fi->second.getInsts().size(); ii != ie; ++ii) { @@ -506,6 +595,18 @@ if (targ != -1ULL) DumpAddress(targ, Sections, MachOObj.get(), outs()); + // Print debug info. + if (diContext) { + DILineInfo dli = + diContext->getLineInfoForAddress(Sections[SectIdx].Address + + Inst.Address); + // Print valid line info if it changed. + if (dli != lastLine && dli.getLine() != 0) + outs() << "\t## " << dli.getFileName() << ':' + << dli.getLine() << ':' << dli.getColumn(); + lastLine = dli; + } + outs() << '\n'; } } Modified: llvm/trunk/tools/llvm-objdump/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-objdump/Makefile?rev=140224&r1=140223&r2=140224&view=diff ============================================================================== --- llvm/trunk/tools/llvm-objdump/Makefile (original) +++ llvm/trunk/tools/llvm-objdump/Makefile Tue Sep 20 20:13:19 2011 @@ -9,7 +9,8 @@ LEVEL = ../.. TOOLNAME = llvm-objdump -LINK_COMPONENTS = $(TARGETS_TO_BUILD) MC MCParser MCDisassembler Object +LINK_COMPONENTS = $(TARGETS_TO_BUILD) DebugInfo MC MCParser MCDisassembler \ + Object # This tool has no plugins, optimize startup time. TOOL_NO_EXPORTS = 1 From echristo at apple.com Tue Sep 20 20:21:43 2011 From: echristo at apple.com (Eric Christopher) Date: Tue, 20 Sep 2011 18:21:43 -0700 Subject: [llvm-commits] [llvm] r140224 - in /llvm/trunk/tools/llvm-objdump: CMakeLists.txt MachODump.cpp Makefile In-Reply-To: <20110921011319.A67722A6C12C@llvm.org> References: <20110921011319.A67722A6C12C@llvm.org> Message-ID: <4440F0D4-D618-4B0F-A55B-F58FB205496F@apple.com> On Sep 20, 2011, at 6:13 PM, Benjamin Kramer wrote: > Usage: > $ llvm-objdump -d -m -g -dsym=a.out.dSYM/Contents/Resources/DWARF/a.out a.out > _main: > 100000e90: 55 pushq %rbp ## test.c:11:3 Very cool. -eric -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110920/4c0839eb/attachment.html From atrick at apple.com Tue Sep 20 21:17:38 2011 From: atrick at apple.com (Andrew Trick) Date: Wed, 21 Sep 2011 02:17:38 -0000 Subject: [llvm-commits] [llvm] r140227 - /llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Message-ID: <20110921021738.17A332A6C12C@llvm.org> Author: atrick Date: Tue Sep 20 21:17:37 2011 New Revision: 140227 URL: http://llvm.org/viewvc/llvm-project?rev=140227&view=rev Log: whitespace Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=140227&r1=140226&r2=140227&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Tue Sep 20 21:17:37 2011 @@ -405,7 +405,7 @@ int BccOpc = !AFI->isThumbFunction() ? ARM::Bcc : (AFI->isThumb2Function() ? ARM::t2Bcc : ARM::tBcc); bool isThumb = AFI->isThumbFunction() || AFI->isThumb2Function(); - + // Shouldn't be a fall through. assert(TBB && "InsertBranch must not be told to insert a fallthrough"); assert((Cond.size() == 2 || Cond.size() == 0) && @@ -693,9 +693,9 @@ ARM::QQQQPRRegClass.contains(DestReg, SrcReg)) { const TargetRegisterInfo *TRI = &getRegisterInfo(); assert(ARM::qsub_0 + 3 == ARM::qsub_3 && "Expected contiguous enum."); - unsigned EndSubReg = ARM::QQPRRegClass.contains(DestReg, SrcReg) ? + unsigned EndSubReg = ARM::QQPRRegClass.contains(DestReg, SrcReg) ? ARM::qsub_1 : ARM::qsub_3; - for (unsigned i = ARM::qsub_0, e = EndSubReg + 1; i != e; ++i) { + for (unsigned i = ARM::qsub_0, e = EndSubReg + 1; i != e; ++i) { unsigned Dst = TRI->getSubReg(DestReg, i); unsigned Src = TRI->getSubReg(SrcReg, i); MachineInstrBuilder Mov = @@ -1369,7 +1369,7 @@ // Attempt to estimate the relative costs of predication versus branching. unsigned TUnpredCost = Probability.getNumerator() * TCycles; TUnpredCost /= Probability.getDenominator(); - + uint32_t Comp = Probability.getDenominator() - Probability.getNumerator(); unsigned FUnpredCost = Comp * FCycles; FUnpredCost /= Probability.getDenominator(); From atrick at apple.com Tue Sep 20 21:20:46 2011 From: atrick at apple.com (Andrew Trick) Date: Wed, 21 Sep 2011 02:20:46 -0000 Subject: [llvm-commits] [llvm] r140228 - in /llvm/trunk: include/llvm/Target/TargetInstrInfo.h lib/CodeGen/MachineVerifier.cpp lib/CodeGen/SelectionDAG/InstrEmitter.cpp lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp lib/Target/ARM/ARMAsmPrinter.cpp lib/Target/ARM/ARMBaseInstrInfo.cpp lib/Target/ARM/ARMBaseInstrInfo.h lib/Target/ARM/ARMISelLowering.cpp lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/ARMInstrThumb2.td Message-ID: <20110921022046.E255C2A6C12C@llvm.org> Author: atrick Date: Tue Sep 20 21:20:46 2011 New Revision: 140228 URL: http://llvm.org/viewvc/llvm-project?rev=140228&view=rev Log: Lower ARM adds/subs to add/sub after adding optional CPSR operand. This is still a hack until we can teach tblgen to generate the optional CPSR operand rather than an implicit CPSR def. But the strangeness is now limited to the selection DAG. ADD/SUB MI's no longer have implicit CPSR defs, nor do we allow flag setting variants of these opcodes in machine code. There are several corner cases to consider, and getting one wrong would previously lead to nasty miscompilation. It's not the first time I've debugged one, so this time I added enough verification to ensure it won't happen again. Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h llvm/trunk/lib/CodeGen/MachineVerifier.cpp llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp llvm/trunk/lib/Target/ARM/ARMInstrInfo.td llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrInfo.h?rev=140228&r1=140227&r2=140228&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original) +++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Tue Sep 20 21:20:46 2011 @@ -49,7 +49,7 @@ : CallFrameSetupOpcode(CFSetupOpcode), CallFrameDestroyOpcode(CFDestroyOpcode) { } - + virtual ~TargetInstrInfo(); /// getRegClass - Givem a machine instruction descriptor, returns the register @@ -671,6 +671,12 @@ bool hasLowDefLatency(const InstrItineraryData *ItinData, const MachineInstr *DefMI, unsigned DefIdx) const; + /// verifyInstruction - Perform target specific instruction verification. + virtual + bool verifyInstruction(const MachineInstr *MI, StringRef &ErrInfo) const { + return true; + } + private: int CallFrameSetupOpcode, CallFrameDestroyOpcode; }; Modified: llvm/trunk/lib/CodeGen/MachineVerifier.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineVerifier.cpp?rev=140228&r1=140227&r2=140228&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/MachineVerifier.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineVerifier.cpp Tue Sep 20 21:20:46 2011 @@ -570,6 +570,9 @@ } } + StringRef ErrorInfo; + if (!TII->verifyInstruction(MI, ErrorInfo)) + report(ErrorInfo.data(), MI); } void Modified: llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp?rev=140228&r1=140227&r2=140228&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp Tue Sep 20 21:20:46 2011 @@ -763,7 +763,9 @@ } // Run post-isel target hook to adjust this instruction if needed. +#ifdef NDEBUG if (II.hasPostISelHook()) +#endif TLI->AdjustInstrPostInstrSelection(MI, Node); } Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=140228&r1=140227&r2=140228&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Tue Sep 20 21:20:46 2011 @@ -179,12 +179,9 @@ void TargetLowering::AdjustInstrPostInstrSelection(MachineInstr *MI, SDNode *Node) const { -#ifndef NDEBUG - dbgs() << "If a target marks an instruction with " - "'hasPostISelHook', it must implement " - "TargetLowering::AdjustInstrPostInstrSelection!"; -#endif - llvm_unreachable(0); + assert(!MI->getDesc().hasPostISelHook() && + "If a target marks an instruction with 'hasPostISelHook', " + "it must implement TargetLowering::AdjustInstrPostInstrSelection!"); } //===----------------------------------------------------------------------===// Modified: llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp?rev=140228&r1=140227&r2=140228&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp Tue Sep 20 21:20:46 2011 @@ -1167,6 +1167,9 @@ if (emitPseudoExpansionLowering(OutStreamer, MI)) return; + assert(!convertAddSubFlagsOpcode(MI->getOpcode()) && + "Pseudo flag setting opcode should be expanded early"); + // Check for manual lowerings. unsigned Opc = MI->getOpcode(); switch (Opc) { Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=140228&r1=140227&r2=140228&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Tue Sep 20 21:20:46 2011 @@ -1410,6 +1410,57 @@ } +/// Map pseudo instructions that imply an 'S' bit onto real opcodes. Whether the +/// instruction is encoded with an 'S' bit is determined by the optional CPSR +/// def operand. +/// +/// This will go away once we can teach tblgen how to set the optional CPSR def +/// operand itself. +struct AddSubFlagsOpcodePair { + unsigned PseudoOpc; + unsigned MachineOpc; +}; + +static AddSubFlagsOpcodePair AddSubFlagsOpcodeMap[] = { + {ARM::ADDSri, ARM::ADDri}, + {ARM::ADDSrr, ARM::ADDrr}, + {ARM::ADDSrsi, ARM::ADDrsi}, + {ARM::ADDSrsr, ARM::ADDrsr}, + + {ARM::SUBSri, ARM::SUBri}, + {ARM::SUBSrr, ARM::SUBrr}, + {ARM::SUBSrsi, ARM::SUBrsi}, + {ARM::SUBSrsr, ARM::SUBrsr}, + + {ARM::RSBSri, ARM::RSBri}, + {ARM::RSBSrr, ARM::RSBrr}, + {ARM::RSBSrsi, ARM::RSBrsi}, + {ARM::RSBSrsr, ARM::RSBrsr}, + + {ARM::t2ADDSri, ARM::t2ADDri}, + {ARM::t2ADDSrr, ARM::t2ADDrr}, + {ARM::t2ADDSrs, ARM::t2ADDrs}, + + {ARM::t2SUBSri, ARM::t2SUBri}, + {ARM::t2SUBSrr, ARM::t2SUBrr}, + {ARM::t2SUBSrs, ARM::t2SUBrs}, + + {ARM::t2RSBSri, ARM::t2RSBri}, + {ARM::t2RSBSrs, ARM::t2RSBrs}, +}; + +unsigned llvm::convertAddSubFlagsOpcode(unsigned OldOpc) { + static const int NPairs = + sizeof(AddSubFlagsOpcodeMap) / sizeof(AddSubFlagsOpcodePair); + for (AddSubFlagsOpcodePair *OpcPair = &AddSubFlagsOpcodeMap[0], + *End = &AddSubFlagsOpcodeMap[NPairs]; OpcPair != End; ++OpcPair) { + if (OldOpc == OpcPair->PseudoOpc) { + return OpcPair->MachineOpc; + } + } + return 0; +} + void llvm::emitARMRegPlusImmediate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned DestReg, unsigned BaseReg, int NumBytes, @@ -2645,6 +2696,15 @@ return false; } +bool ARMBaseInstrInfo::verifyInstruction(const MachineInstr *MI, + StringRef &ErrInfo) const { + if (convertAddSubFlagsOpcode(MI->getOpcode())) { + ErrInfo = "Pseudo flag setting opcodes only exist in Selection DAG"; + return false; + } + return true; +} + bool ARMBaseInstrInfo::isFpMLxInstruction(unsigned Opcode, unsigned &MulOpc, unsigned &AddSubOpc, Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h?rev=140228&r1=140227&r2=140228&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h (original) +++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h Tue Sep 20 21:20:46 2011 @@ -246,6 +246,9 @@ bool hasLowDefLatency(const InstrItineraryData *ItinData, const MachineInstr *DefMI, unsigned DefIdx) const; + /// verifyInstruction - Perform target specific instruction verification. + bool verifyInstruction(const MachineInstr *MI, StringRef &ErrInfo) const; + private: /// Modeling special VFP / NEON fp MLA / MLS hazards. @@ -328,6 +331,12 @@ int getMatchingCondBranchOpcode(int Opc); + +/// Map pseudo instructions that imply an 'S' bit onto real opcodes. Whether +/// the instruction is encoded with an 'S' bit is determined by the optional +/// CPSR def operand. +unsigned convertAddSubFlagsOpcode(unsigned OldOpc); + /// emitARMRegPlusImmediate / emitT2RegPlusImmediate - Emits a series of /// instructions to materializea destreg = basereg + immediate in ARM / Thumb2 /// code. Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=140228&r1=140227&r2=140228&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Tue Sep 20 21:20:46 2011 @@ -5752,40 +5752,39 @@ } } -/// Generally, ARM instructions may be optionally encoded with a 's' -/// bit. However, some opcodes have a compact encoding that forces an implicit -/// 's' bit. List these exceptions here. -static bool hasForcedCPSRDef(const MCInstrDesc &MCID) { - switch (MCID.getOpcode()) { - case ARM::t2ADDSri: - case ARM::t2ADDSrr: - case ARM::t2ADDSrs: - case ARM::t2SUBSri: - case ARM::t2SUBSrr: - case ARM::t2SUBSrs: - return true; - } - return false; -} - void ARMTargetLowering::AdjustInstrPostInstrSelection(MachineInstr *MI, SDNode *Node) const { + const MCInstrDesc &MCID = MI->getDesc(); + if (!MCID.hasPostISelHook()) { + assert(!convertAddSubFlagsOpcode(MI->getOpcode()) && + "Pseudo flag-setting opcodes must be marked with 'hasPostISelHook'"); + return; + } + // Adjust potentially 's' setting instructions after isel, i.e. ADC, SBC, RSB, // RSC. Coming out of isel, they have an implicit CPSR def, but the optional // operand is still set to noreg. If needed, set the optional operand's // register to CPSR, and remove the redundant implicit def. + // + // e.g. ADCS (...opt:%noreg, CPSR) -> ADC (... opt:CPSR). - const MCInstrDesc &MCID = MI->getDesc(); + // Rename pseudo opcodes. + unsigned NewOpc = convertAddSubFlagsOpcode(MI->getOpcode()); + if (NewOpc) { + const ARMBaseInstrInfo *TII = + static_cast(getTargetMachine().getInstrInfo()); + MI->setDesc(TII->get(NewOpc)); + } unsigned ccOutIdx = MCID.getNumOperands() - 1; - bool forcedCPSR = hasForcedCPSRDef(MCID); // Any ARM instruction that sets the 's' bit should specify an optional // "cc_out" operand in the last operand position. if (!MCID.hasOptionalDef() || !MCID.OpInfo[ccOutIdx].isOptionalDef()) { - assert(!forcedCPSR && "Optional cc_out operand required"); + assert(!NewOpc && "Optional cc_out operand required"); return; } - // Look for an implicit def of CPSR added by MachineInstr ctor. + // Look for an implicit def of CPSR added by MachineInstr ctor. Remove it + // since we already have an optional CPSR def. bool definesCPSR = false; bool deadCPSR = false; for (unsigned i = MCID.getNumOperands(), e = MI->getNumOperands(); @@ -5800,20 +5799,21 @@ } } if (!definesCPSR) { - assert(!forcedCPSR && "Optional cc_out operand required"); + assert(!NewOpc && "Optional cc_out operand required"); return; } assert(deadCPSR == !Node->hasAnyUseOfValue(1) && "inconsistent dead flag"); - - // If possible, select the encoding that does not set the 's' bit. - if (deadCPSR && !forcedCPSR) + if (deadCPSR) { + assert(!MI->getOperand(ccOutIdx).getReg() && + "expect uninitialized optional cc_out operand"); return; + } + // If this instruction was defined with an optional CPSR def and its dag node + // had a live implicit CPSR def, then activate the optional CPSR def. MachineOperand &MO = MI->getOperand(ccOutIdx); MO.setReg(ARM::CPSR); MO.setIsDef(true); - if (deadCPSR) - MO.setIsDead(); } //===----------------------------------------------------------------------===// Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=140228&r1=140227&r2=140228&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Tue Sep 20 21:20:46 2011 @@ -1026,49 +1026,25 @@ } /// AsI1_rbin_s_is - Same as AsI1_rbin_s_is except it sets 's' bit by default. -let hasPostISelHook = 1, isCodeGenOnly = 1, Defs = [CPSR] in { +/// +/// These opcodes will be converted to the real non-S opcodes by +/// AdjustInstrPostInstrSelection after giving then an optional CPSR operand. +let hasPostISelHook = 1, isCodeGenOnly = 1, isPseudo = 1, Defs = [CPSR] in { multiclass AsI1_rbin_s_is opcod, string opc, InstrItinClass iii, InstrItinClass iir, InstrItinClass iis, PatFrag opnode, bit Commutable = 0> { def ri : AsI1 { - bits<4> Rd; - bits<4> Rn; - bits<12> imm; - let Inst{25} = 1; - let Inst{19-16} = Rn; - let Inst{15-12} = Rd; - let Inst{11-0} = imm; - } + [(set GPR:$Rd, CPSR, (opnode so_imm:$imm, GPR:$Rn))]>; def rr : AsI1 { - bits<4> Rd; - bits<4> Rn; - bits<4> Rm; - let Inst{11-4} = 0b00000000; - let Inst{25} = 0; - let Inst{3-0} = Rm; - let Inst{15-12} = Rd; - let Inst{19-16} = Rn; - } + [/* pattern left blank */]>; def rsi : AsI1 { - bits<4> Rd; - bits<4> Rn; - bits<12> shift; - let Inst{25} = 0; - let Inst{19-16} = Rn; - let Inst{15-12} = Rd; - let Inst{11-5} = shift{11-5}; - let Inst{4} = 0; - let Inst{3-0} = shift{3-0}; - } + [(set GPR:$Rd, CPSR, (opnode so_reg_imm:$shift, GPR:$Rn))]>; def rsr : AsI1 opcod, string opc, InstrItinClass iii, InstrItinClass iir, InstrItinClass iis, PatFrag opnode, bit Commutable = 0> { - let isReMaterializable = 1 in { def ri : AsI1 { - bits<4> Rd; - bits<4> Rn; - bits<12> imm; - let Inst{25} = 1; - let Inst{19-16} = Rn; - let Inst{15-12} = Rd; - let Inst{11-0} = imm; - } - } + [(set GPR:$Rd, CPSR, (opnode GPR:$Rn, so_imm:$imm))]>; def rr : AsI1 { - bits<4> Rd; - bits<4> Rn; - bits<4> Rm; - let isCommutable = Commutable; - let Inst{25} = 0; - let Inst{19-16} = Rn; - let Inst{15-12} = Rd; - let Inst{11-4} = 0b00000000; - let Inst{3-0} = Rm; - } + [(set GPR:$Rd, CPSR, (opnode GPR:$Rn, GPR:$Rm))]>; def rsi : AsI1 { - bits<4> Rd; - bits<4> Rn; - bits<12> shift; - let Inst{25} = 0; - let Inst{19-16} = Rn; - let Inst{15-12} = Rd; - let Inst{11-5} = shift{11-5}; - let Inst{4} = 0; - let Inst{3-0} = shift{3-0}; - } + [(set GPR:$Rd, CPSR, (opnode GPR:$Rn, so_reg_imm:$shift))]>; def rsr : AsI1 { - bits<4> Rd; - bits<4> Rn; - bits<12> shift; - let Inst{25} = 0; - let Inst{20} = 1; - let Inst{19-16} = Rn; - let Inst{15-12} = Rd; - let Inst{11-8} = shift{11-8}; - let Inst{7} = 0; - let Inst{6-5} = shift{6-5}; - let Inst{4} = 1; - let Inst{3-0} = shift{3-0}; - } + [(set GPR:$Rd, CPSR, (opnode GPR:$Rn, so_reg_reg:$shift))]>; } } @@ -3122,8 +3058,15 @@ BinOpFrag<(sub node:$LHS, node:$RHS)>, "SUB">; // ADD and SUB with 's' bit set. -// FIXME: Eliminate them if we can write def : Pat patterns which defines -// CPSR and the implicit def of CPSR is not needed. +// +// Currently, t2ADDS/t2SUBS are pseudo opcodes that exist only in the +// selection DAG. They are "lowered" to real t2ADD/t2SUB opcodes by +// AdjustInstrPostInstrSelection where we determine whether or not to +// set the "s" bit based on CPSR liveness. +// +// FIXME: Eliminate t2ADDS/t2SUBS pseudo opcodes after adding tablegen +// support for an optional CPSR definition that corresponds to the DAG +// node's second value. We can then eliminate the implicit def of CPSR. defm ADDS : AsI1_bin_s_irs<0b0100, "add", IIC_iALUi, IIC_iALUr, IIC_iALUsr, BinOpFrag<(ARMaddc node:$LHS, node:$RHS)>, 1>; Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=140228&r1=140227&r2=140228&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Tue Sep 20 21:20:46 2011 @@ -592,7 +592,10 @@ /// T2I_bin_s_irs - Similar to T2I_bin_irs except it sets the 's' bit so the /// instruction modifies the CPSR register. -let hasPostISelHook = 1, isCodeGenOnly = 1, Defs = [CPSR] in { +/// +/// These opcodes will be converted to the real non-S opcodes by +/// AdjustInstrPostInstrSelection after giving then an optional CPSR operand. +let hasPostISelHook = 1, isCodeGenOnly = 1, isPseudo = 1, Defs = [CPSR] in { multiclass T2I_bin_s_irs opcod, string opc, InstrItinClass iii, InstrItinClass iir, InstrItinClass iis, PatFrag opnode, bit Commutable = 0> { @@ -600,34 +603,17 @@ def ri : T2sTwoRegImm< (outs rGPR:$Rd), (ins GPR:$Rn, t2_so_imm:$imm), iii, opc, ".w\t$Rd, $Rn, $imm", - [(set rGPR:$Rd, CPSR, (opnode GPR:$Rn, t2_so_imm:$imm))]> { - let Inst{31-27} = 0b11110; - let Inst{25} = 0; - let Inst{24-21} = opcod; - let Inst{15} = 0; - } + [(set rGPR:$Rd, CPSR, (opnode GPR:$Rn, t2_so_imm:$imm))]>; // register def rr : T2sThreeReg< (outs rGPR:$Rd), (ins GPR:$Rn, rGPR:$Rm), iir, opc, ".w\t$Rd, $Rn, $Rm", - [(set rGPR:$Rd, CPSR, (opnode GPR:$Rn, rGPR:$Rm))]> { - let isCommutable = Commutable; - let Inst{31-27} = 0b11101; - let Inst{26-25} = 0b01; - let Inst{24-21} = opcod; - let Inst{14-12} = 0b000; // imm3 - let Inst{7-6} = 0b00; // imm2 - let Inst{5-4} = 0b00; // type - } + [(set rGPR:$Rd, CPSR, (opnode GPR:$Rn, rGPR:$Rm))]>; // shifted register def rs : T2sTwoRegShiftedReg< (outs rGPR:$Rd), (ins GPR:$Rn, t2_so_reg:$ShiftedRm), iis, opc, ".w\t$Rd, $Rn, $ShiftedRm", - [(set rGPR:$Rd, CPSR, (opnode GPR:$Rn, t2_so_reg:$ShiftedRm))]> { - let Inst{31-27} = 0b11101; - let Inst{26-25} = 0b01; - let Inst{24-21} = opcod; - } + [(set rGPR:$Rd, CPSR, (opnode GPR:$Rn, t2_so_reg:$ShiftedRm))]>; } } @@ -738,27 +724,21 @@ /// T2I_rbin_s_is - Same as T2I_rbin_irs except sets 's' bit and the register /// version is not needed since this is only for codegen. -let hasPostISelHook = 1, isCodeGenOnly = 1, Defs = [CPSR] in { +/// +/// These opcodes will be converted to the real non-S opcodes by +/// AdjustInstrPostInstrSelection after giving then an optional CPSR operand. +let hasPostISelHook = 1, isCodeGenOnly = 1, isPseudo = 1, Defs = [CPSR] in { multiclass T2I_rbin_s_is opcod, string opc, PatFrag opnode> { // shifted imm def ri : T2sTwoRegImm< (outs rGPR:$Rd), (ins rGPR:$Rn, t2_so_imm:$imm), IIC_iALUi, opc, ".w\t$Rd, $Rn, $imm", - [(set rGPR:$Rd, CPSR, (opnode t2_so_imm:$imm, rGPR:$Rn))]> { - let Inst{31-27} = 0b11110; - let Inst{25} = 0; - let Inst{24-21} = opcod; - let Inst{15} = 0; - } + [(set rGPR:$Rd, CPSR, (opnode t2_so_imm:$imm, rGPR:$Rn))]>; // shifted register def rs : T2sTwoRegShiftedReg< (outs rGPR:$Rd), (ins rGPR:$Rn, t2_so_reg:$ShiftedRm), IIC_iALUsi, opc, "\t$Rd, $Rn, $ShiftedRm", - [(set rGPR:$Rd, CPSR, (opnode t2_so_reg:$ShiftedRm, rGPR:$Rn))]> { - let Inst{31-27} = 0b11101; - let Inst{26-25} = 0b01; - let Inst{24-21} = opcod; - } + [(set rGPR:$Rd, CPSR, (opnode t2_so_reg:$ShiftedRm, rGPR:$Rn))]>; } } @@ -1837,8 +1817,15 @@ BinOpFrag<(sub node:$LHS, node:$RHS)>>; // ADD and SUB with 's' bit set. No 12-bit immediate (T4) variants. -// FIXME: Eliminate them if we can write def : Pat patterns which defines -// CPSR and the implicit def of CPSR is not needed. +// +// Currently, t2ADDS/t2SUBS are pseudo opcodes that exist only in the +// selection DAG. They are "lowered" to real t2ADD/t2SUB opcodes by +// AdjustInstrPostInstrSelection where we determine whether or not to +// set the "s" bit based on CPSR liveness. +// +// FIXME: Eliminate t2ADDS/t2SUBS pseudo opcodes after adding tablegen +// support for an optional CPSR definition that corresponds to the DAG +// node's second value. We can then eliminate the implicit def of CPSR. defm t2ADDS : T2I_bin_s_irs <0b1000, "add", IIC_iALUi, IIC_iALUr, IIC_iALUsi, BinOpFrag<(ARMaddc node:$LHS, node:$RHS)>, 1>; From benny.kra at googlemail.com Tue Sep 20 21:25:13 2011 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Tue, 20 Sep 2011 19:25:13 -0700 Subject: [llvm-commits] [llvm] r140199 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp In-Reply-To: <20110920223446.328272A6C12C@llvm.org> References: <20110920223446.328272A6C12C@llvm.org> Message-ID: <778D031A-DB54-4161-B497-39A8C130B00B@googlemail.com> On 20.09.2011, at 15:34, Bruno Cardoso Lopes wrote: > Author: bruno > Date: Tue Sep 20 17:34:45 2011 > New Revision: 140199 > > URL: http://llvm.org/viewvc/llvm-project?rev=140199&view=rev > Log: > Simplify max/minp[s|d] dagcombine matching > > Modified: > llvm/trunk/lib/Target/X86/X86ISelLowering.cpp > > Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=140199&r1=140198&r2=140199&view=diff > ============================================================================== > --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) > +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Sep 20 17:34:45 2011 > @@ -12562,17 +12562,14 @@ > // Get the LHS/RHS of the select. > SDValue LHS = N->getOperand(1); > SDValue RHS = N->getOperand(2); > + EVT VT = LHS.getValueType(); > > // If we have SSE[12] support, try to form min/max nodes. SSE min/max > // instructions match the semantics of the common C idiom x // x<=y?x:y, because of how they handle negative zero (which can be > // ignored in unsafe-math mode). > - if (Cond.getOpcode() == ISD::SETCC && > - ((Subtarget->hasXMMInt() && > - (LHS.getValueType() == MVT::f32 || LHS.getValueType() == MVT::v4f32 || > - LHS.getValueType() == MVT::f64 || LHS.getValueType() == MVT::v2f64)) || > - (Subtarget->hasAVX() && > - (LHS.getValueType() == MVT::v8f32 || LHS.getValueType() == MVT::v4f64)))) { > + if (Cond.getOpcode() == ISD::SETCC && VT.isFloatingPoint() && > + VT != MVT::f80 && DAG.getTargetLoweringInfo().isTypeLegal(VT)) { > ISD::CondCode CC = cast(Cond.getOperand(2))->get(); Hi, This will break if SSE is disabled, in x87 mode floating point types are still legal but it doesn't support the min/max operations. - Ben From ahatanak at gmail.com Tue Sep 20 21:24:25 2011 From: ahatanak at gmail.com (Akira Hatanaka) Date: Wed, 21 Sep 2011 02:24:25 -0000 Subject: [llvm-commits] [llvm] r140229 - /llvm/trunk/lib/Target/Mips/MipsSubtarget.h Message-ID: <20110921022425.4D2CB2A6C12C@llvm.org> Author: ahatanak Date: Tue Sep 20 21:24:25 2011 New Revision: 140229 URL: http://llvm.org/viewvc/llvm-project?rev=140229&view=rev Log: Fix typo. Modified: llvm/trunk/lib/Target/Mips/MipsSubtarget.h Modified: llvm/trunk/lib/Target/Mips/MipsSubtarget.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSubtarget.h?rev=140229&r1=140228&r2=140229&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsSubtarget.h (original) +++ llvm/trunk/lib/Target/Mips/MipsSubtarget.h Tue Sep 20 21:24:25 2011 @@ -108,8 +108,8 @@ bool hasMips32() const { return MipsArchVersion >= Mips32; } bool hasMips32r2() const { return MipsArchVersion == Mips32r2 || MipsArchVersion == Mips64r2; } - bool hassMips64() const { return MipsArchVersion >= Mips64; } - bool hassMips64r2() const { return MipsArchVersion == Mips64r2; } + bool hasMips64() const { return MipsArchVersion >= Mips64; } + bool hasMips64r2() const { return MipsArchVersion == Mips64r2; } bool isLittle() const { return IsLittle; } bool isFP64bit() const { return IsFP64bit; } From ahatanak at gmail.com Tue Sep 20 21:45:30 2011 From: ahatanak at gmail.com (Akira Hatanaka) Date: Wed, 21 Sep 2011 02:45:30 -0000 Subject: [llvm-commits] [llvm] r140230 - in /llvm/trunk/lib/Target/Mips: MipsSubtarget.cpp MipsSubtarget.h Message-ID: <20110921024530.1B1F92A6C12C@llvm.org> Author: ahatanak Date: Tue Sep 20 21:45:29 2011 New Revision: 140230 URL: http://llvm.org/viewvc/llvm-project?rev=140230&view=rev Log: Set ABI if it hasn't been set on the command line. Check if architecture & ABI combination is valid. Modified: llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp llvm/trunk/lib/Target/Mips/MipsSubtarget.h Modified: llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp?rev=140230&r1=140229&r2=140230&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp Tue Sep 20 21:45:29 2011 @@ -39,6 +39,15 @@ // Initialize scheduling itinerary for the specified CPU. InstrItins = getInstrItineraryForCPU(CPUName); + // Set MipsABI if it hasn't been set yet. + if (MipsABI == UnknownABI) + MipsABI = hasMips64() ? N64 : O32; + + // Check if Architecture and ABI are compatible. + assert(((!hasMips64() && (isABI_O32() || isABI_EABI())) || + (hasMips64() && (isABI_N32() || isABI_N64()))) && + "Invalid Arch & ABI pair."); + // Is the target system Linux ? if (TT.find("linux") == std::string::npos) IsLinux = false; Modified: llvm/trunk/lib/Target/Mips/MipsSubtarget.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSubtarget.h?rev=140230&r1=140229&r2=140230&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsSubtarget.h (original) +++ llvm/trunk/lib/Target/Mips/MipsSubtarget.h Tue Sep 20 21:45:29 2011 @@ -29,7 +29,7 @@ public: // NOTE: O64 will not be supported. enum MipsABIEnum { - O32, N32, N64, EABI + UnknownABI, O32, N32, N64, EABI }; protected: From ahatanak at gmail.com Tue Sep 20 22:00:58 2011 From: ahatanak at gmail.com (Akira Hatanaka) Date: Wed, 21 Sep 2011 03:00:58 -0000 Subject: [llvm-commits] [llvm] r140233 - in /llvm/trunk/lib/Target/Mips: MCTargetDesc/MipsMCAsmInfo.cpp MCTargetDesc/MipsMCTargetDesc.cpp MCTargetDesc/MipsMCTargetDesc.h MipsAsmPrinter.cpp MipsTargetMachine.cpp MipsTargetMachine.h TargetInfo/MipsTargetInfo.cpp Message-ID: <20110921030058.B43332A6C12C@llvm.org> Author: ahatanak Date: Tue Sep 20 22:00:58 2011 New Revision: 140233 URL: http://llvm.org/viewvc/llvm-project?rev=140233&view=rev Log: Add a base class for Mips TargetMachines and add Mips64 TargetMachines. Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp llvm/trunk/lib/Target/Mips/MipsTargetMachine.h llvm/trunk/lib/Target/Mips/TargetInfo/MipsTargetInfo.cpp Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp?rev=140233&r1=140232&r2=140233&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp (original) +++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp Tue Sep 20 22:00:58 2011 @@ -18,7 +18,8 @@ MipsMCAsmInfo::MipsMCAsmInfo(const Target &T, StringRef TT) { Triple TheTriple(TT); - if (TheTriple.getArch() == Triple::mips) + if ((TheTriple.getArch() == Triple::mips) || + (TheTriple.getArch() == Triple::mips64)) IsLittleEndian = false; AlignmentIsInBytes = false; Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp?rev=140233&r1=140232&r2=140233&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp (original) +++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp Tue Sep 20 22:00:58 2011 @@ -81,27 +81,49 @@ // Register the MC asm info. RegisterMCAsmInfoFn X(TheMipsTarget, createMipsMCAsmInfo); RegisterMCAsmInfoFn Y(TheMipselTarget, createMipsMCAsmInfo); + RegisterMCAsmInfoFn A(TheMips64Target, createMipsMCAsmInfo); + RegisterMCAsmInfoFn B(TheMips64elTarget, createMipsMCAsmInfo); // Register the MC codegen info. TargetRegistry::RegisterMCCodeGenInfo(TheMipsTarget, createMipsMCCodeGenInfo); TargetRegistry::RegisterMCCodeGenInfo(TheMipselTarget, createMipsMCCodeGenInfo); + TargetRegistry::RegisterMCCodeGenInfo(TheMips64Target, + createMipsMCCodeGenInfo); + TargetRegistry::RegisterMCCodeGenInfo(TheMips64elTarget, + createMipsMCCodeGenInfo); // Register the MC instruction info. TargetRegistry::RegisterMCInstrInfo(TheMipsTarget, createMipsMCInstrInfo); + TargetRegistry::RegisterMCInstrInfo(TheMipselTarget, createMipsMCInstrInfo); + TargetRegistry::RegisterMCInstrInfo(TheMips64Target, createMipsMCInstrInfo); + TargetRegistry::RegisterMCInstrInfo(TheMips64elTarget, createMipsMCInstrInfo); // Register the MC register info. TargetRegistry::RegisterMCRegInfo(TheMipsTarget, createMipsMCRegisterInfo); TargetRegistry::RegisterMCRegInfo(TheMipselTarget, createMipsMCRegisterInfo); + TargetRegistry::RegisterMCRegInfo(TheMips64Target, createMipsMCRegisterInfo); + TargetRegistry::RegisterMCRegInfo(TheMips64elTarget, + createMipsMCRegisterInfo); // Register the MC subtarget info. TargetRegistry::RegisterMCSubtargetInfo(TheMipsTarget, createMipsMCSubtargetInfo); + TargetRegistry::RegisterMCSubtargetInfo(TheMipselTarget, + createMipsMCSubtargetInfo); + TargetRegistry::RegisterMCSubtargetInfo(TheMips64Target, + createMipsMCSubtargetInfo); + TargetRegistry::RegisterMCSubtargetInfo(TheMips64elTarget, + createMipsMCSubtargetInfo); // Register the MCInstPrinter. TargetRegistry::RegisterMCInstPrinter(TheMipsTarget, createMipsMCInstPrinter); TargetRegistry::RegisterMCInstPrinter(TheMipselTarget, createMipsMCInstPrinter); + TargetRegistry::RegisterMCInstPrinter(TheMips64Target, + createMipsMCInstPrinter); + TargetRegistry::RegisterMCInstPrinter(TheMips64elTarget, + createMipsMCInstPrinter); } Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h?rev=140233&r1=140232&r2=140233&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h (original) +++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h Tue Sep 20 22:00:58 2011 @@ -21,6 +21,8 @@ extern Target TheMipsTarget; extern Target TheMipselTarget; +extern Target TheMips64Target; +extern Target TheMips64elTarget; } // End llvm namespace Modified: llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp?rev=140233&r1=140232&r2=140233&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp Tue Sep 20 22:00:58 2011 @@ -455,4 +455,6 @@ extern "C" void LLVMInitializeMipsAsmPrinter() { RegisterAsmPrinter X(TheMipsTarget); RegisterAsmPrinter Y(TheMipselTarget); + RegisterAsmPrinter A(TheMips64Target); + RegisterAsmPrinter B(TheMips64elTarget); } Modified: llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp?rev=140233&r1=140232&r2=140233&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp Tue Sep 20 22:00:58 2011 @@ -19,8 +19,10 @@ extern "C" void LLVMInitializeMipsTarget() { // Register the target. - RegisterTargetMachine X(TheMipsTarget); + RegisterTargetMachine X(TheMipsTarget); RegisterTargetMachine Y(TheMipselTarget); + RegisterTargetMachine A(TheMips64Target); + RegisterTargetMachine B(TheMips64elTarget); } // DataLayout --> Big-endian, 32-bit pointer/ABI/alignment @@ -34,23 +36,45 @@ MipsTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, Reloc::Model RM, CodeModel::Model CM, - bool isLittle=false): + bool isLittle): LLVMTargetMachine(T, TT, CPU, FS, RM, CM), Subtarget(TT, CPU, FS, isLittle), - DataLayout(isLittle ? - std::string("e-p:32:32:32-i8:8:32-i16:16:32-i64:64:64-n32") : - std::string("E-p:32:32:32-i8:8:32-i16:16:32-i64:64:64-n32")), + DataLayout(isLittle ? + (Subtarget.isABI_N64() ? + "e-p:64:64:64-i8:8:32-i16:16:32-i64:64:64-n32" : + "e-p:32:32:32-i8:8:32-i16:16:32-i64:64:64-n32") : + (Subtarget.isABI_N64() ? + "E-p:64:64:64-i8:8:32-i16:16:32-i64:64:64-n32" : + "E-p:32:32:32-i8:8:32-i16:16:32-i64:64:64-n32")), InstrInfo(*this), FrameLowering(Subtarget), TLInfo(*this), TSInfo(*this), JITInfo() { } +MipsebTargetMachine:: +MipsebTargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, + Reloc::Model RM, CodeModel::Model CM) : + MipsTargetMachine(T, TT, CPU, FS, RM, CM, false) {} + MipselTargetMachine:: MipselTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, Reloc::Model RM, CodeModel::Model CM) : MipsTargetMachine(T, TT, CPU, FS, RM, CM, true) {} +Mips64ebTargetMachine:: +Mips64ebTargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, + Reloc::Model RM, CodeModel::Model CM) : + MipsTargetMachine(T, TT, CPU, FS, RM, CM, false) {} + +Mips64elTargetMachine:: +Mips64elTargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, + Reloc::Model RM, CodeModel::Model CM) : + MipsTargetMachine(T, TT, CPU, FS, RM, CM, true) {} + // Install an instruction selector pass using // the ISelDag to gen Mips code. bool MipsTargetMachine:: Modified: llvm/trunk/lib/Target/Mips/MipsTargetMachine.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsTargetMachine.h?rev=140233&r1=140232&r2=140233&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsTargetMachine.h (original) +++ llvm/trunk/lib/Target/Mips/MipsTargetMachine.h Tue Sep 20 22:00:58 2011 @@ -80,7 +80,16 @@ }; -/// MipselTargetMachine - Mipsel target machine. +/// MipsebTargetMachine - Mips32 big endian target machine. +/// +class MipsebTargetMachine : public MipsTargetMachine { +public: + MipsebTargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, + Reloc::Model RM, CodeModel::Model CM); +}; + +/// MipselTargetMachine - Mips32 little endian target machine. /// class MipselTargetMachine : public MipsTargetMachine { public: @@ -89,6 +98,23 @@ Reloc::Model RM, CodeModel::Model CM); }; +/// MipsebTargetMachine - Mips32 big endian target machine. +/// +class Mips64ebTargetMachine : public MipsTargetMachine { +public: + Mips64ebTargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, + Reloc::Model RM, CodeModel::Model CM); +}; + +/// MipselTargetMachine - Mips32 little endian target machine. +/// +class Mips64elTargetMachine : public MipsTargetMachine { +public: + Mips64elTargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, + Reloc::Model RM, CodeModel::Model CM); +}; } // End llvm namespace #endif Modified: llvm/trunk/lib/Target/Mips/TargetInfo/MipsTargetInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/TargetInfo/MipsTargetInfo.cpp?rev=140233&r1=140232&r2=140233&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/TargetInfo/MipsTargetInfo.cpp (original) +++ llvm/trunk/lib/Target/Mips/TargetInfo/MipsTargetInfo.cpp Tue Sep 20 22:00:58 2011 @@ -13,6 +13,7 @@ using namespace llvm; Target llvm::TheMipsTarget, llvm::TheMipselTarget; +Target llvm::TheMips64Target, llvm::TheMips64elTarget; extern "C" void LLVMInitializeMipsTargetInfo() { RegisterTarget Y(TheMipselTarget, "mipsel", "Mipsel"); + + RegisterTarget A(TheMips64Target, "mips64", "Mips64 [experimental]"); + + RegisterTarget B(TheMips64elTarget, + "mips64el", "Mips64el [experimental]"); } From rtrieu at google.com Tue Sep 20 22:09:09 2011 From: rtrieu at google.com (Richard Trieu) Date: Wed, 21 Sep 2011 03:09:09 -0000 Subject: [llvm-commits] [llvm] r140234 - in /llvm/trunk/lib: Support/ConstantRange.cpp Target/CppBackend/CPPBackend.cpp Target/X86/X86ISelLowering.cpp VMCore/Constants.cpp VMCore/Instructions.cpp Message-ID: <20110921030910.08BFB2A6C12C@llvm.org> Author: rtrieu Date: Tue Sep 20 22:09:09 2011 New Revision: 140234 URL: http://llvm.org/viewvc/llvm-project?rev=140234&view=rev Log: Change: assert(!"error message"); To: assert(0 && "error message"); which is more consistant across the code base. Modified: llvm/trunk/lib/Support/ConstantRange.cpp llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp llvm/trunk/lib/Target/X86/X86ISelLowering.cpp llvm/trunk/lib/VMCore/Constants.cpp llvm/trunk/lib/VMCore/Instructions.cpp Modified: llvm/trunk/lib/Support/ConstantRange.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/ConstantRange.cpp?rev=140234&r1=140233&r2=140234&view=diff ============================================================================== --- llvm/trunk/lib/Support/ConstantRange.cpp (original) +++ llvm/trunk/lib/Support/ConstantRange.cpp Tue Sep 20 22:09:09 2011 @@ -55,7 +55,7 @@ uint32_t W = CR.getBitWidth(); switch (Pred) { - default: assert(!"Invalid ICmp predicate to makeICmpRegion()"); + default: assert(0 && "Invalid ICmp predicate to makeICmpRegion()"); case CmpInst::ICMP_EQ: return CR; case CmpInst::ICMP_NE: Modified: llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp?rev=140234&r1=140233&r2=140234&view=diff ============================================================================== --- llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp (original) +++ llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp Tue Sep 20 22:09:09 2011 @@ -1298,7 +1298,7 @@ case Instruction::PtrToInt: Out << "PtrToIntInst"; break; case Instruction::IntToPtr: Out << "IntToPtrInst"; break; case Instruction::BitCast: Out << "BitCastInst"; break; - default: assert(!"Unreachable"); break; + default: assert(0 && "Unreachable"); break; } Out << "(" << opNames[0] << ", " << getCppName(cst->getType()) << ", \""; Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=140234&r1=140233&r2=140234&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Sep 20 22:09:09 2011 @@ -11946,11 +11946,11 @@ X86TargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI, MachineBasicBlock *BB) const { switch (MI->getOpcode()) { - default: assert(false && "Unexpected instr type to insert"); + default: assert(0 && "Unexpected instr type to insert"); case X86::TAILJMPd64: case X86::TAILJMPr64: case X86::TAILJMPm64: - assert(!"TAILJMP64 would not be touched here."); + assert(0 && "TAILJMP64 would not be touched here."); case X86::TCRETURNdi64: case X86::TCRETURNri64: case X86::TCRETURNmi64: Modified: llvm/trunk/lib/VMCore/Constants.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Constants.cpp?rev=140234&r1=140233&r2=140234&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Constants.cpp (original) +++ llvm/trunk/lib/VMCore/Constants.cpp Tue Sep 20 22:09:09 2011 @@ -105,7 +105,7 @@ return ConstantAggregateZero::get(Ty); default: // Function, Label, or Opaque type? - assert(!"Cannot create a null constant of that type!"); + assert(0 && "Cannot create a null constant of that type!"); return 0; } } Modified: llvm/trunk/lib/VMCore/Instructions.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Instructions.cpp?rev=140234&r1=140233&r2=140234&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Instructions.cpp (original) +++ llvm/trunk/lib/VMCore/Instructions.cpp Tue Sep 20 22:09:09 2011 @@ -2022,7 +2022,7 @@ Type *IntPtrTy) { switch (Opcode) { default: - assert(!"Invalid CastOp"); + assert(0 && "Invalid CastOp"); case Instruction::Trunc: case Instruction::ZExt: case Instruction::SExt: @@ -2215,10 +2215,10 @@ case 99: // cast combination can't happen (error in input). This is for all cases // where the MidTy is not the same for the two cast instructions. - assert(!"Invalid Cast Combination"); + assert(0 && "Invalid Cast Combination"); return 0; default: - assert(!"Error in CastResults table!!!"); + assert(0 && "Error in CastResults table!!!"); return 0; } return 0; @@ -2242,7 +2242,7 @@ case IntToPtr: return new IntToPtrInst (S, Ty, Name, InsertBefore); case BitCast: return new BitCastInst (S, Ty, Name, InsertBefore); default: - assert(!"Invalid opcode provided"); + assert(0 && "Invalid opcode provided"); } return 0; } @@ -2265,7 +2265,7 @@ case IntToPtr: return new IntToPtrInst (S, Ty, Name, InsertAtEnd); case BitCast: return new BitCastInst (S, Ty, Name, InsertAtEnd); default: - assert(!"Invalid opcode provided"); + assert(0 && "Invalid opcode provided"); } return 0; } @@ -2549,17 +2549,17 @@ } else if (SrcTy->isIntegerTy()) { return IntToPtr; // int -> ptr } else { - assert(!"Casting pointer to other than pointer or int"); + assert(0 && "Casting pointer to other than pointer or int"); } } else if (DestTy->isX86_MMXTy()) { if (SrcTy->isVectorTy()) { assert(DestBits == SrcBits && "Casting vector of wrong width to X86_MMX"); return BitCast; // 64-bit vector to MMX } else { - assert(!"Illegal cast to X86_MMX"); + assert(0 && "Illegal cast to X86_MMX"); } } else { - assert(!"Casting to type that is not first-class"); + assert(0 && "Casting to type that is not first-class"); } // If we fall through to here we probably hit an assertion cast above @@ -2869,7 +2869,7 @@ CmpInst::Predicate CmpInst::getInversePredicate(Predicate pred) { switch (pred) { - default: assert(!"Unknown cmp predicate!"); + default: assert(0 && "Unknown cmp predicate!"); case ICMP_EQ: return ICMP_NE; case ICMP_NE: return ICMP_EQ; case ICMP_UGT: return ICMP_ULE; @@ -2902,7 +2902,7 @@ ICmpInst::Predicate ICmpInst::getSignedPredicate(Predicate pred) { switch (pred) { - default: assert(! "Unknown icmp predicate!"); + default: assert(0 && "Unknown icmp predicate!"); case ICMP_EQ: case ICMP_NE: case ICMP_SGT: case ICMP_SLT: case ICMP_SGE: case ICMP_SLE: return pred; @@ -2915,7 +2915,7 @@ ICmpInst::Predicate ICmpInst::getUnsignedPredicate(Predicate pred) { switch (pred) { - default: assert(! "Unknown icmp predicate!"); + default: assert(0 && "Unknown icmp predicate!"); case ICMP_EQ: case ICMP_NE: case ICMP_UGT: case ICMP_ULT: case ICMP_UGE: case ICMP_ULE: return pred; @@ -2991,7 +2991,7 @@ CmpInst::Predicate CmpInst::getSwappedPredicate(Predicate pred) { switch (pred) { - default: assert(!"Unknown cmp predicate!"); + default: assert(0 && "Unknown cmp predicate!"); case ICMP_EQ: case ICMP_NE: return pred; case ICMP_SGT: return ICMP_SLT; From dblaikie at gmail.com Tue Sep 20 22:27:45 2011 From: dblaikie at gmail.com (David Blaikie) Date: Tue, 20 Sep 2011 20:27:45 -0700 Subject: [llvm-commits] [llvm] r140234 - in /llvm/trunk/lib: Support/ConstantRange.cpp Target/CppBackend/CPPBackend.cpp Target/X86/X86ISelLowering.cpp VMCore/Constants.cpp VMCore/Instructions.cpp In-Reply-To: <20110921030910.08BFB2A6C12C@llvm.org> References: <20110921030910.08BFB2A6C12C@llvm.org> Message-ID: > > Change: > > assert(!"error message"); > > To: > > assert(0 && "error message"); > Should these all be changed to llvm_unreachable instead? - David -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110920/27265112/attachment.html From proljc at gmail.com Tue Sep 20 22:35:38 2011 From: proljc at gmail.com (Liu) Date: Wed, 21 Sep 2011 11:35:38 +0800 Subject: [llvm-commits] [patch] fix MBlazeAsmParser comment typo In-Reply-To: References: Message-ID: On Wed, Sep 21, 2011 at 1:01 AM, Liu wrote: > Hi all > > There are typos in MBlazeAsmParser.cpp and the Makefile, I've fixed it. > > --Liu > ping From pdox at google.com Tue Sep 20 22:34:31 2011 From: pdox at google.com (David Meyer) Date: Wed, 21 Sep 2011 03:34:31 -0000 Subject: [llvm-commits] [llvm] r140235 - /llvm/trunk/README.txt Message-ID: <20110921033431.AE9B02A6C12C@llvm.org> Author: pdox Date: Tue Sep 20 22:34:31 2011 New Revision: 140235 URL: http://llvm.org/viewvc/llvm-project?rev=140235&view=rev Log: Test commit Modified: llvm/trunk/README.txt Modified: llvm/trunk/README.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/README.txt?rev=140235&r1=140234&r2=140235&view=diff ============================================================================== --- llvm/trunk/README.txt (original) +++ llvm/trunk/README.txt Tue Sep 20 22:34:31 2011 @@ -13,4 +13,3 @@ If you're writing a package for LLVM, see docs/Packaging.html for our suggestions. - From rtrieu at google.com Tue Sep 20 22:36:17 2011 From: rtrieu at google.com (Richard Trieu) Date: Tue, 20 Sep 2011 20:36:17 -0700 Subject: [llvm-commits] [llvm] r140234 - in /llvm/trunk/lib: Support/ConstantRange.cpp Target/CppBackend/CPPBackend.cpp Target/X86/X86ISelLowering.cpp VMCore/Constants.cpp VMCore/Instructions.cpp In-Reply-To: References: <20110921030910.08BFB2A6C12C@llvm.org> Message-ID: On Tue, Sep 20, 2011 at 8:27 PM, David Blaikie wrote: >> Change: >> >> ?assert(!"error message"); >> >> To: >> >> ?assert(0 && "error message"); > > Should these all be changed to llvm_unreachable instead? > - David I'm not sure what's the difference between assert's and llvm_unreachable's and how they are used within LLVM. This code change is to prepare the codebase for a new warning that I hope to turn on soon in Clang. Thus the change preserves behavior with minimal changes to not prevent the warning. From benny.kra at googlemail.com Tue Sep 20 22:56:21 2011 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Tue, 20 Sep 2011 20:56:21 -0700 Subject: [llvm-commits] [llvm] r140234 - in /llvm/trunk/lib: Support/ConstantRange.cpp Target/CppBackend/CPPBackend.cpp Target/X86/X86ISelLowering.cpp VMCore/Constants.cpp VMCore/Instructions.cpp In-Reply-To: References: <20110921030910.08BFB2A6C12C@llvm.org> Message-ID: On 20.09.2011, at 20:36, Richard Trieu wrote: > On Tue, Sep 20, 2011 at 8:27 PM, David Blaikie wrote: >>> Change: >>> >>> assert(!"error message"); >>> >>> To: >>> >>> assert(0 && "error message"); >> >> Should these all be changed to llvm_unreachable instead? >> - David > > I'm not sure what's the difference between assert's and > llvm_unreachable's and how they are used within LLVM. This code > change is to prepare the codebase for a new warning that I hope to > turn on soon in Clang. Thus the change preserves behavior with > minimal changes to not prevent the warning. The main difference is that the compiler knows that llvm_unreachable doesn't return, no matter if it's a build with or without asserts. Thus it can be used to silence compiler warnings, for example missing returns in non-void functions when we now that the missing return is on an impossible path. The optimizer can also take advantage of llvm_unreachable in Release builds and remove dead code, but I doubt that it has a huge effect. - Ben From geek4civic at gmail.com Tue Sep 20 22:58:03 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Wed, 21 Sep 2011 12:58:03 +0900 Subject: [llvm-commits] [llvm] r140234 - in /llvm/trunk/lib: Support/ConstantRange.cpp Target/CppBackend/CPPBackend.cpp Target/X86/X86ISelLowering.cpp VMCore/Constants.cpp VMCore/Instructions.cpp In-Reply-To: <20110921030910.08BFB2A6C12C@llvm.org> References: <20110921030910.08BFB2A6C12C@llvm.org> Message-ID: I loved assert(!"XXX") so much... From benny.kra at googlemail.com Tue Sep 20 23:01:19 2011 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Wed, 21 Sep 2011 04:01:19 -0000 Subject: [llvm-commits] [llvm] r140237 - /llvm/trunk/tools/llvm-objdump/MachODump.cpp Message-ID: <20110921040119.63BA42A6C12C@llvm.org> Author: d0k Date: Tue Sep 20 23:01:19 2011 New Revision: 140237 URL: http://llvm.org/viewvc/llvm-project?rev=140237&view=rev Log: llvm-objdump: Fix use after free. Modified: llvm/trunk/tools/llvm-objdump/MachODump.cpp Modified: llvm/trunk/tools/llvm-objdump/MachODump.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-objdump/MachODump.cpp?rev=140237&r1=140236&r2=140237&view=diff ============================================================================== --- llvm/trunk/tools/llvm-objdump/MachODump.cpp (original) +++ llvm/trunk/tools/llvm-objdump/MachODump.cpp Tue Sep 20 23:01:19 2011 @@ -346,11 +346,11 @@ StringRef DebugAbbrevSection, DebugInfoSection, DebugArangesSection, DebugLineSection, DebugStrSection; OwningPtr diContext; + OwningPtr DSYMObj; // Try to find debug info and set up the DIContext for it. if (UseDbg) { ArrayRef
    DebugSections = Sections; std::vector
    DSYMSections; - OwningPtr DSYMObj; // A separate DSym file path was specified, parse it as a macho file, // get the sections and supply it to the section name parsing machinery. From baldrick at free.fr Wed Sep 21 03:43:57 2011 From: baldrick at free.fr (Duncan Sands) Date: Wed, 21 Sep 2011 10:43:57 +0200 Subject: [llvm-commits] [llvm] r140168 - /llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp In-Reply-To: <20110920184207.6CE8B2A6C12C@llvm.org> References: <20110920184207.6CE8B2A6C12C@llvm.org> Message-ID: <4E79A3CD.1050200@free.fr> Hi Bill, > --- llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp (original) > +++ llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp Tue Sep 20 13:42:07 2011 > @@ -754,9 +754,13 @@ > return newFunction; > } > > -bool CodeExtractor::isEligible(const std::vector &code) { > +bool CodeExtractor::isEligible(ArrayRef code) { > + // Deny a single basic block that's a landing pad block. > + if (code.size() == 1&& code[0]->isLandingPad()) > + return false; does this mean that you can remove the "isLandingPad" check you previously added somewhere else in this file? Ciao, Duncan. From nadav.rotem at intel.com Wed Sep 21 03:45:11 2011 From: nadav.rotem at intel.com (Nadav Rotem) Date: Wed, 21 Sep 2011 08:45:11 -0000 Subject: [llvm-commits] [llvm] r140246 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Message-ID: <20110921084511.2ABD32A6C12C@llvm.org> Author: nadav Date: Wed Sep 21 03:45:10 2011 New Revision: 140246 URL: http://llvm.org/viewvc/llvm-project?rev=140246&view=rev Log: Insert a sanity check on the combining of x86 truncing-store nodes. This comes to replace the problematic check that was removed in r139995. Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=140246&r1=140245&r2=140246&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Sep 21 03:45:10 2011 @@ -13563,6 +13563,9 @@ // From, To sizes and ElemCount must be pow of two if (!isPowerOf2_32(NumElems * FromSz * ToSz)) return SDValue(); + // We are going to use the original vector elt for storing. + // accumulated smaller vector elements must be a multiple of the store size. + if (0 != (NumElems * FromSz) % ToSz) return SDValue(); unsigned SizeRatio = FromSz / ToSz; From baldrick at free.fr Wed Sep 21 03:59:00 2011 From: baldrick at free.fr (Duncan Sands) Date: Wed, 21 Sep 2011 10:59:00 +0200 Subject: [llvm-commits] [llvm] r140246 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp In-Reply-To: <20110921084511.2ABD32A6C12C@llvm.org> References: <20110921084511.2ABD32A6C12C@llvm.org> Message-ID: <4E79A754.7050601@free.fr> Hi Nadav, > --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) > +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Sep 21 03:45:10 2011 > @@ -13563,6 +13563,9 @@ > > // From, To sizes and ElemCount must be pow of two > if (!isPowerOf2_32(NumElems * FromSz * ToSz)) return SDValue(); > + // We are going to use the original vector elt for storing. > + // accumulated smaller vector elements must be a multiple of the store size. accumulated -> Accumulated Ciao, Duncan. From nadav.rotem at intel.com Wed Sep 21 09:34:38 2011 From: nadav.rotem at intel.com (Nadav Rotem) Date: Wed, 21 Sep 2011 14:34:38 -0000 Subject: [llvm-commits] [llvm] r140249 - in /llvm/trunk: lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp test/CodeGen/X86/2011-09-21-setcc-bug.ll Message-ID: <20110921143438.997B62A6C12C@llvm.org> Author: nadav Date: Wed Sep 21 09:34:38 2011 New Revision: 140249 URL: http://llvm.org/viewvc/llvm-project?rev=140249&view=rev Log: [VECTOR-SELECT] Address one of the bugs in pr10902. Vector SetCC result types need to be type-legalized. This code worked before because scalar result types are known to be legal. Added: llvm/trunk/test/CodeGen/X86/2011-09-21-setcc-bug.ll Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp?rev=140249&r1=140248&r2=140249&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Wed Sep 21 09:34:38 2011 @@ -500,6 +500,8 @@ SDValue DAGTypeLegalizer::PromoteIntRes_SETCC(SDNode *N) { EVT SVT = TLI.getSetCCResultType(N->getOperand(0).getValueType()); + // Vector setcc result types need to be leglized. + SVT = TLI.getTypeToTransformTo(*DAG.getContext(), SVT); DebugLoc dl = N->getDebugLoc(); assert(SVT.isVector() == N->getOperand(0).getValueType().isVector() && Added: llvm/trunk/test/CodeGen/X86/2011-09-21-setcc-bug.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2011-09-21-setcc-bug.ll?rev=140249&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/2011-09-21-setcc-bug.ll (added) +++ llvm/trunk/test/CodeGen/X86/2011-09-21-setcc-bug.ll Wed Sep 21 09:34:38 2011 @@ -0,0 +1,15 @@ +; RUN: llc < %s -march=x86-64 -mcpu=corei7 -promote-elements -mattr=+sse41 + +; Make sure we are not crashing on this code. + +define void @load_4_i8(<4 x i8>* %k, <4 x i8>* %y, <4 x double>* %A1, <4 x double>* %A0) { + %A = load <4 x i8>* %k + %B = load <4 x i8>* %y + %C = load <4 x double>* %A0 + %D= load <4 x double>* %A1 + %M = icmp uge <4 x i8> %A, %B + %T = select <4 x i1> %M, <4 x double> %C, <4 x double> %D + store <4 x double> %T, <4 x double>* undef + ret void +} + From baldrick at free.fr Wed Sep 21 09:41:51 2011 From: baldrick at free.fr (Duncan Sands) Date: Wed, 21 Sep 2011 16:41:51 +0200 Subject: [llvm-commits] [llvm] r140249 - in /llvm/trunk: lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp test/CodeGen/X86/2011-09-21-setcc-bug.ll In-Reply-To: <20110921143438.997B62A6C12C@llvm.org> References: <20110921143438.997B62A6C12C@llvm.org> Message-ID: <4E79F7AF.9070007@free.fr> Hi Nadav, > --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original) > +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Wed Sep 21 09:34:38 2011 > @@ -500,6 +500,8 @@ > > SDValue DAGTypeLegalizer::PromoteIntRes_SETCC(SDNode *N) { > EVT SVT = TLI.getSetCCResultType(N->getOperand(0).getValueType()); > + // Vector setcc result types need to be leglized. > + SVT = TLI.getTypeToTransformTo(*DAG.getContext(), SVT); I think this is obviously wrong. Consider a SETCC with operand type <256 x i8> and return type <256 x i1>. Then SVT will be <256 x i8> on x86, but this will then be turned into <128 x i8> by your change, resulting in an invalid SETCC. Ciao, Duncan. From zvi.rackover at intel.com Wed Sep 21 10:58:59 2011 From: zvi.rackover at intel.com (Rackover, Zvi) Date: Wed, 21 Sep 2011 18:58:59 +0300 Subject: [llvm-commits] [AVX PATCH] Add VBROADCASTSS selection Message-ID: <2B8953F251AC92428D9BBC92D9B218865E954102AC@hasmsx502.ger.corp.intel.com> Hi Bruno et al, This patch adds selection of the vbroadcastss/vbroadcastsd instructions, fixes the avx-vbroadcast.ll test and improves generated code in a few other test cases. However, for one test case, avx-splat.ll::funcC, the generated code worsens and the test fails. Please review the attached patch and commit if acceptable. Thanks, Zvi --------------------------------------------------------------------- Intel Israel (74) Limited This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). Any review or distribution by others is strictly prohibited. If you are not the intended recipient, please contact the sender and delete all copies. -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110921/5eccd181/attachment.html -------------- next part -------------- A non-text attachment was scrubbed... Name: avx-vbroadcastss.patch Type: application/octet-stream Size: 7795 bytes Desc: avx-vbroadcastss.patch Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110921/5eccd181/attachment.obj From nadav.rotem at intel.com Wed Sep 21 11:34:54 2011 From: nadav.rotem at intel.com (Rotem, Nadav) Date: Wed, 21 Sep 2011 19:34:54 +0300 Subject: [llvm-commits] [llvm] r140249 - in /llvm/trunk: lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp test/CodeGen/X86/2011-09-21-setcc-bug.ll In-Reply-To: <4E79F7AF.9070007@free.fr> References: <20110921143438.997B62A6C12C@llvm.org> <4E79F7AF.9070007@free.fr> Message-ID: <6594DDFF12B03D4E89690887C2486994029A886BDF@hasmsx504.ger.corp.intel.com> >Hi Nadav, > --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original) > +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Wed Sep 21 09:34:38 2011 > @@ -500,6 +500,8 @@ > > SDValue DAGTypeLegalizer::PromoteIntRes_SETCC(SDNode *N) { > EVT SVT = TLI.getSetCCResultType(N->getOperand(0).getValueType()); > + // Vector setcc result types need to be leglized. > + SVT = TLI.getTypeToTransformTo(*DAG.getContext(), SVT); >I think this is obviously wrong. Consider a SETCC with operand type <256 x i8> Well, it was not obvious to me :) PromoteIntRes is called only when the return type needs to be IntPromoted. So the type, <256 x i8> would be split before getting to this code. Right ? I will try to write an exhaustive test with many types and check if I can make this fail. Thanks, Nadav >and return type <256 x i1>. Then SVT will be <256 x i8> on x86, but this will >then be turned into <128 x i8> by your change, resulting in an invalid SETCC. >Ciao, Duncan. _______________________________________________ llvm-commits mailing list llvm-commits at cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits --------------------------------------------------------------------- Intel Israel (74) Limited This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). Any review or distribution by others is strictly prohibited. If you are not the intended recipient, please contact the sender and delete all copies. From ahatanak at gmail.com Wed Sep 21 11:41:44 2011 From: ahatanak at gmail.com (Akira Hatanaka) Date: Wed, 21 Sep 2011 16:41:44 -0000 Subject: [llvm-commits] [llvm] r140254 - /llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp Message-ID: <20110921164144.105962A6C12C@llvm.org> Author: ahatanak Date: Wed Sep 21 11:41:43 2011 New Revision: 140254 URL: http://llvm.org/viewvc/llvm-project?rev=140254&view=rev Log: MipsArchVersion does not need to be in the initialization list and MipsABI should be initialized to UnknownABI. Modified: llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp Modified: llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp?rev=140254&r1=140253&r2=140254&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp Wed Sep 21 11:41:43 2011 @@ -24,7 +24,7 @@ MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS, bool little) : MipsGenSubtargetInfo(TT, CPU, FS), - MipsArchVersion(Mips32), MipsABI(O32), IsLittle(little), IsSingleFloat(false), + MipsABI(UnknownABI), IsLittle(little), IsSingleFloat(false), IsFP64bit(false), IsGP64bit(false), HasVFPU(false), IsLinux(true), HasSEInReg(false), HasCondMov(false), HasMulDivAdd(false), HasMinMax(false), HasSwap(false), HasBitCount(false) From nadav.rotem at intel.com Wed Sep 21 12:13:40 2011 From: nadav.rotem at intel.com (Nadav Rotem) Date: Wed, 21 Sep 2011 17:13:40 -0000 Subject: [llvm-commits] [llvm] r140257 - /llvm/trunk/test/CodeGen/X86/2011-09-21-setcc-bug.ll Message-ID: <20110921171340.56F3F2A6C12E@llvm.org> Author: nadav Date: Wed Sep 21 12:13:40 2011 New Revision: 140257 URL: http://llvm.org/viewvc/llvm-project?rev=140257&view=rev Log: add another testcase for pr10902 Modified: llvm/trunk/test/CodeGen/X86/2011-09-21-setcc-bug.ll Modified: llvm/trunk/test/CodeGen/X86/2011-09-21-setcc-bug.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2011-09-21-setcc-bug.ll?rev=140257&r1=140256&r2=140257&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/2011-09-21-setcc-bug.ll (original) +++ llvm/trunk/test/CodeGen/X86/2011-09-21-setcc-bug.ll Wed Sep 21 12:13:40 2011 @@ -13,3 +13,15 @@ ret void } + +define void @load_256_i8(<256 x i8>* %k, <256 x i8>* %y, <256 x double>* %A1, <256 x double>* %A0) { + %A = load <256 x i8>* %k + %B = load <256 x i8>* %y + %C = load <256 x double>* %A0 + %D= load <256 x double>* %A1 + %M = icmp uge <256 x i8> %A, %B + %T = select <256 x i1> %M, <256 x double> %C, <256 x double> %D + store <256 x double> %T, <256 x double>* undef + ret void +} + From nadav.rotem at intel.com Wed Sep 21 12:14:40 2011 From: nadav.rotem at intel.com (Nadav Rotem) Date: Wed, 21 Sep 2011 17:14:40 -0000 Subject: [llvm-commits] [llvm] r140258 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Message-ID: <20110921171440.ADB842A6C12E@llvm.org> Author: nadav Date: Wed Sep 21 12:14:40 2011 New Revision: 140258 URL: http://llvm.org/viewvc/llvm-project?rev=140258&view=rev Log: fix comment Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=140258&r1=140257&r2=140258&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Sep 21 12:14:40 2011 @@ -13564,7 +13564,7 @@ // From, To sizes and ElemCount must be pow of two if (!isPowerOf2_32(NumElems * FromSz * ToSz)) return SDValue(); // We are going to use the original vector elt for storing. - // accumulated smaller vector elements must be a multiple of the store size. + // Accumulated smaller vector elements must be a multiple of the store size. if (0 != (NumElems * FromSz) % ToSz) return SDValue(); unsigned SizeRatio = FromSz / ToSz; From benny.kra at googlemail.com Wed Sep 21 12:31:42 2011 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Wed, 21 Sep 2011 17:31:42 -0000 Subject: [llvm-commits] [llvm] r140260 - /llvm/trunk/lib/DebugInfo/DWARFDebugLine.cpp Message-ID: <20110921173142.D99CF2A6C12C@llvm.org> Author: d0k Date: Wed Sep 21 12:31:42 2011 New Revision: 140260 URL: http://llvm.org/viewvc/llvm-project?rev=140260&view=rev Log: DWARF: avoid unnecessary map lookups. Modified: llvm/trunk/lib/DebugInfo/DWARFDebugLine.cpp Modified: llvm/trunk/lib/DebugInfo/DWARFDebugLine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/DebugInfo/DWARFDebugLine.cpp?rev=140260&r1=140259&r2=140260&view=diff ============================================================================== --- llvm/trunk/lib/DebugInfo/DWARFDebugLine.cpp (original) +++ llvm/trunk/lib/DebugInfo/DWARFDebugLine.cpp Wed Sep 21 12:31:42 2011 @@ -116,17 +116,16 @@ const DWARFDebugLine::LineTable * DWARFDebugLine::getOrParseLineTable(DataExtractor debug_line_data, uint32_t offset) { - LineTableIter pos = LineTableMap.find(offset); - if (pos == LineTableMap.end()) { + std::pair pos = + LineTableMap.insert(LineTableMapTy::value_type(offset, LineTable())); + if (pos.second) { // Parse and cache the line table for at this offset. State state; if (!parseStatementTable(debug_line_data, &offset, state)) return 0; - // FIXME: double lookup. - LineTableMap[offset] = state; - return &LineTableMap[offset]; + pos.first->second = state; } - return &pos->second; + return &pos.first->second; } bool From ahatanak at gmail.com Wed Sep 21 12:31:46 2011 From: ahatanak at gmail.com (Akira Hatanaka) Date: Wed, 21 Sep 2011 17:31:46 -0000 Subject: [llvm-commits] [llvm] r140261 - /llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp Message-ID: <20110921173146.191922A6C12C@llvm.org> Author: ahatanak Date: Wed Sep 21 12:31:45 2011 New Revision: 140261 URL: http://llvm.org/viewvc/llvm-project?rev=140261&view=rev Log: Undo a change made in r140254. MipsArchVersion needs to be initialized to Mips32. Modified: llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp Modified: llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp?rev=140261&r1=140260&r2=140261&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp Wed Sep 21 12:31:45 2011 @@ -24,10 +24,10 @@ MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS, bool little) : MipsGenSubtargetInfo(TT, CPU, FS), - MipsABI(UnknownABI), IsLittle(little), IsSingleFloat(false), - IsFP64bit(false), IsGP64bit(false), HasVFPU(false), IsLinux(true), - HasSEInReg(false), HasCondMov(false), HasMulDivAdd(false), HasMinMax(false), - HasSwap(false), HasBitCount(false) + MipsArchVersion(Mips32), MipsABI(UnknownABI), IsLittle(little), + IsSingleFloat(false), IsFP64bit(false), IsGP64bit(false), HasVFPU(false), + IsLinux(true), HasSEInReg(false), HasCondMov(false), HasMulDivAdd(false), + HasMinMax(false), HasSwap(false), HasBitCount(false) { std::string CPUName = CPU; if (CPUName.empty()) From rjmccall at apple.com Wed Sep 21 12:33:28 2011 From: rjmccall at apple.com (John McCall) Date: Wed, 21 Sep 2011 10:33:28 -0700 Subject: [llvm-commits] [llvm] r140254 - /llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp In-Reply-To: <20110921164144.105962A6C12C@llvm.org> References: <20110921164144.105962A6C12C@llvm.org> Message-ID: <84366AA5-41EF-40E5-A5B9-8D2BEEC67B46@apple.com> On Sep 21, 2011, at 9:41 AM, Akira Hatanaka wrote: > Author: ahatanak > Date: Wed Sep 21 11:41:43 2011 > New Revision: 140254 > > URL: http://llvm.org/viewvc/llvm-project?rev=140254&view=rev > Log: > MipsArchVersion does not need to be in the initialization list and MipsABI > should be initialized to UnknownABI. This is causing test suite failures, like the following: ******************** TEST 'LLVM :: CodeGen/Mips/alloca.ll' FAILED ******************** Script: -- /Users/buildslave/zorg/buildbot/smooshlab/slave-0.8/build.clang-x86_64-darwin10-gcc42-RA/clang-build/Release+Asserts/bin/llc -march=mipsel < /Users/buildslave/zorg/buildbot/smooshlab/slave-0.8/build.clang-x86_64-darwin10-gcc42-RA/llvm/test/CodeGen/Mips/alloca.ll | /Users/buildslave/zorg/buildbot/smooshlab/slave-0.8/build.clang-x86_64-darwin10-gcc42-RA/clang-build/Release+Asserts/bin/FileCheck /Users/buildslave/zorg/buildbot/smooshlab/slave-0.8/build.clang-x86_64-darwin10-gcc42-RA/llvm/test/CodeGen/Mips/alloca.ll -- Exit Code: 1 Command Output (stderr): -- Formal argument #0 has unhandled type i32 UNREACHABLE executed at /Users/buildslave/zorg/buildbot/smooshlab/slave-0.8/build.clang-x86_64-darwin10-gcc42-RA/llvm/lib/CodeGen/CallingConvLower.cpp:81! 0 llc 0x0000000100c5af72 PrintStackTrace(void*) + 34 1 llc 0x0000000100c5bef3 SignalHandler(int) + 707 2 libSystem.B.dylib 0x00007fff804de67a _sigtramp + 26 3 llc 0x0000000100017ad9 llvm::LLParser::ParseType(llvm::Type*&, bool) + 521 4 llc 0x0000000100c5b396 abort + 22 5 llc 0x0000000100c467bd llvm::llvm_unreachable_internal(char const*, char const*, unsigned int) + 381 6 llc 0x00000001007ac3ea llvm::CCState::AnalyzeFormalArguments(llvm::SmallVectorImpl const&, bool (*)(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)) + 346 7 llc 0x0000000100177eab llvm::MipsTargetLowering::LowerFormalArguments(llvm::SDValue, llvm::CallingConv::ID, bool, llvm::SmallVectorImpl const&, llvm::DebugLoc, llvm::SelectionDAG&, llvm::SmallVectorImpl&) const + 3931 8 llc 0x00000001006c36f0 llvm::SelectionDAGISel::LowerArguments(llvm::BasicBlock const*) + 3056 9 llc 0x00000001006ffbd8 llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function const&) + 2248 10 llc 0x00000001007003ac llvm::SelectionDAGISel::runOnMachineFunction(llvm::MachineFunction&) + 460 11 llc 0x00000001008400f3 llvm::MachineFunctionPass::runOnFunction(llvm::Function&) + 83 12 llc 0x0000000100b8e470 llvm::FPPassManager::runOnFunction(llvm::Function&) + 752 13 llc 0x0000000100b8e59b llvm::FPPassManager::runOnModule(llvm::Module&) + 187 14 llc 0x0000000100b8dd4f llvm::MPPassManager::runOnModule(llvm::Module&) + 607 15 llc 0x0000000100b8e051 llvm::PassManagerImpl::run(llvm::Module&) + 177 16 llc 0x0000000100b8e16d llvm::PassManager::run(llvm::Module&) + 13 17 llc 0x00000001000035ef main + 4975 18 llc 0x0000000100001834 start + 52 Stack dump: 0. Program arguments: /Users/buildslave/zorg/buildbot/smooshlab/slave-0.8/build.clang-x86_64-darwin10-gcc42-RA/clang-build/Release+Asserts/bin/llc -march=mipsel 1. Running pass 'Function Pass Manager' on module ''. 2. Running pass 'MIPS DAG->DAG Pattern Instruction Selection' on function '@twoalloca' FileCheck error: '-' is empty. John. From baldrick at free.fr Wed Sep 21 12:37:35 2011 From: baldrick at free.fr (Duncan Sands) Date: Wed, 21 Sep 2011 19:37:35 +0200 Subject: [llvm-commits] [llvm] r140249 - in /llvm/trunk: lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp test/CodeGen/X86/2011-09-21-setcc-bug.ll In-Reply-To: <6594DDFF12B03D4E89690887C2486994029A886BDF@hasmsx504.ger.corp.intel.com> References: <20110921143438.997B62A6C12C@llvm.org> <4E79F7AF.9070007@free.fr> <6594DDFF12B03D4E89690887C2486994029A886BDF@hasmsx504.ger.corp.intel.com> Message-ID: <4E7A20DF.6030200@free.fr> Hi Nadav, >> --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original) >> +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Wed Sep 21 09:34:38 2011 >> @@ -500,6 +500,8 @@ >> >> SDValue DAGTypeLegalizer::PromoteIntRes_SETCC(SDNode *N) { >> EVT SVT = TLI.getSetCCResultType(N->getOperand(0).getValueType()); >> + // Vector setcc result types need to be leglized. >> + SVT = TLI.getTypeToTransformTo(*DAG.getContext(), SVT); > >> I think this is obviously wrong. Consider a SETCC with operand type<256 x i8> > > Well, it was not obvious to me :) OK :) I think the thing to do is to only use the result of getSetCCResultType if it is legal, and otherwise just use the usual promoted type (NVT). > PromoteIntRes is called only when the return type needs to be IntPromoted. Since the result type is a vector of i1 (isn't it?), this always happens. > So the type,<256 x i8> would be split before getting to this code. Right ? In my example, that's the operand type not the result type. > > I will try to write an exhaustive test with many types and check if I can make this fail. Thanks! Ciao, Duncan. > > Thanks, > Nadav > > >> and return type<256 x i1>. Then SVT will be<256 x i8> on x86, but this will >> then be turned into<128 x i8> by your change, resulting in an invalid SETCC. > >> Ciao, Duncan. > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > --------------------------------------------------------------------- > Intel Israel (74) Limited > > This e-mail and any attachments may contain confidential material for > the sole use of the intended recipient(s). Any review or distribution > by others is strictly prohibited. If you are not the intended > recipient, please contact the sender and delete all copies. > From ahatanak at gmail.com Wed Sep 21 12:36:30 2011 From: ahatanak at gmail.com (Akira Hatanaka) Date: Wed, 21 Sep 2011 17:36:30 -0000 Subject: [llvm-commits] [llvm] r140263 - in /llvm/trunk/test/CodeGen/Mips: 2008-07-06-fadd64.ll 2008-07-07-FPExtend.ll 2008-07-07-IntDoubleConvertions.ll 2008-07-15-InternalConstant.ll 2008-08-07-FPRound.ll Message-ID: <20110921173630.C63DD2A6C12C@llvm.org> Author: ahatanak Date: Wed Sep 21 12:36:30 2011 New Revision: 140263 URL: http://llvm.org/viewvc/llvm-project?rev=140263&view=rev Log: Re-enable some of the disabled tests. Use FileCheck instead of grep to check output. Modified: llvm/trunk/test/CodeGen/Mips/2008-07-06-fadd64.ll llvm/trunk/test/CodeGen/Mips/2008-07-07-FPExtend.ll llvm/trunk/test/CodeGen/Mips/2008-07-07-IntDoubleConvertions.ll llvm/trunk/test/CodeGen/Mips/2008-07-15-InternalConstant.ll llvm/trunk/test/CodeGen/Mips/2008-08-07-FPRound.ll Modified: llvm/trunk/test/CodeGen/Mips/2008-07-06-fadd64.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/2008-07-06-fadd64.ll?rev=140263&r1=140262&r2=140263&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Mips/2008-07-06-fadd64.ll (original) +++ llvm/trunk/test/CodeGen/Mips/2008-07-06-fadd64.ll Wed Sep 21 12:36:30 2011 @@ -1,12 +1,8 @@ -; DISABLED: llc < %s -march=mips | grep __adddf3 -; RUN: false -; XFAIL: * - -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" -target triple = "mipsallegrexel-unknown-psp-elf" +; RUN: llc -march=mips -mattr=single-float < %s | FileCheck %s define double @dofloat(double %a, double %b) nounwind { entry: +; CHECK: __adddf3 fadd double %a, %b ; :0 [#uses=1] ret double %0 } Modified: llvm/trunk/test/CodeGen/Mips/2008-07-07-FPExtend.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/2008-07-07-FPExtend.ll?rev=140263&r1=140262&r2=140263&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Mips/2008-07-07-FPExtend.ll (original) +++ llvm/trunk/test/CodeGen/Mips/2008-07-07-FPExtend.ll Wed Sep 21 12:36:30 2011 @@ -1,12 +1,8 @@ -; DISABLED: llc < %s -march=mips | grep __extendsfdf2 -; RUN: false -; XFAIL: * - -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" -target triple = "mipsallegrexel-unknown-psp-elf" +; RUN: llc -march=mips -mattr=single-float < %s | FileCheck %s define double @dofloat(float %a) nounwind { entry: +; CHECK: __extendsfdf2 fpext float %a to double ; :0 [#uses=1] ret double %0 } Modified: llvm/trunk/test/CodeGen/Mips/2008-07-07-IntDoubleConvertions.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/2008-07-07-IntDoubleConvertions.ll?rev=140263&r1=140262&r2=140263&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Mips/2008-07-07-IntDoubleConvertions.ll (original) +++ llvm/trunk/test/CodeGen/Mips/2008-07-07-IntDoubleConvertions.ll Wed Sep 21 12:36:30 2011 @@ -1,34 +1,33 @@ -; DISABLED: llc < %s -march=mips -o %t -; DISABLED: grep __floatsidf %t | count 1 -; DISABLED: grep __floatunsidf %t | count 1 -; DISABLED: grep __fixdfsi %t | count 1 -; DISABLED: grep __fixunsdfsi %t | count 1 -; RUN: false -; XFAIL: * - -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" -target triple = "mipsallegrexel-unknown-psp-elf" +; RUN: llc -march=mips -mattr=single-float < %s | FileCheck %s define double @int2fp(i32 %a) nounwind { entry: +; CHECK: int2fp +; CHECK: __floatsidf sitofp i32 %a to double ; :0 [#uses=1] ret double %0 } define double @uint2double(i32 %a) nounwind { entry: +; CHECK: uint2double +; CHECK: __floatunsidf uitofp i32 %a to double ; :0 [#uses=1] ret double %0 } define i32 @double2int(double %a) nounwind { entry: +; CHECK: double2int +; CHECK: __fixdfsi fptosi double %a to i32 ; :0 [#uses=1] ret i32 %0 } define i32 @double2uint(double %a) nounwind { entry: +; CHECK: double2uint +; CHECK: __fixunsdfsi fptoui double %a to i32 ; :0 [#uses=1] ret i32 %0 } Modified: llvm/trunk/test/CodeGen/Mips/2008-07-15-InternalConstant.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/2008-07-15-InternalConstant.ll?rev=140263&r1=140262&r2=140263&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Mips/2008-07-15-InternalConstant.ll (original) +++ llvm/trunk/test/CodeGen/Mips/2008-07-15-InternalConstant.ll Wed Sep 21 12:36:30 2011 @@ -1,25 +1,23 @@ -; DISABLED: llc < %s -march=mips -o %t -; DISABLED: grep {rodata.str1.4,"aMS", at progbits} %t | count 1 -; DISABLED: grep {r.data,} %t | count 1 -; DISABLED: grep {\%hi} %t | count 2 -; DISABLED: grep {\%lo} %t | count 2 -; DISABLED: not grep {gp_rel} %t -; RUN: false -+; XFAIL: * +; RUN: llc -march=mips -relocation-model=static < %s | FileCheck %s - -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" -target triple = "mipsallegrexel-unknown-psp-elf" @.str = internal unnamed_addr constant [10 x i8] c"AAAAAAAAA\00" - at i0 = internal unnamed_addr constant [5 x i32] [ i32 0, i32 1, i32 2, i32 3, i32 4 ] + at i0 = internal unnamed_addr constant [5 x i32] [ i32 0, i32 1, i32 2, i32 3, i32 4 ] define i8* @foo() nounwind { entry: +; CHECK: foo +; CHECK: %hi(.str) +; CHECK: %lo(.str) ret i8* getelementptr ([10 x i8]* @.str, i32 0, i32 0) } define i32* @bar() nounwind { entry: +; CHECK: bar +; CHECK: %hi(i0) +; CHECK: %lo(i0) ret i32* getelementptr ([5 x i32]* @i0, i32 0, i32 0) } +; CHECK: rodata.str1.4,"aMS", at progbits +; CHECK: rodata,"a", at progbits Modified: llvm/trunk/test/CodeGen/Mips/2008-08-07-FPRound.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/2008-08-07-FPRound.ll?rev=140263&r1=140262&r2=140263&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Mips/2008-08-07-FPRound.ll (original) +++ llvm/trunk/test/CodeGen/Mips/2008-08-07-FPRound.ll Wed Sep 21 12:36:30 2011 @@ -1,12 +1,8 @@ -; DISABLED: llc < %s -march=mips | grep __truncdfsf2 | count 1 -; RUN: false -; XFAIL: * - -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" -target triple = "mipsallegrexel-unknown-psp-elf" +; RUN: llc -march=mips -mattr=single-float < %s | FileCheck %s define float @round2float(double %a) nounwind { entry: +; CHECK: __truncdfsf2 fptrunc double %a to float ; :0 [#uses=1] ret float %0 } From ahatanak at gmail.com Wed Sep 21 12:40:24 2011 From: ahatanak at gmail.com (Akira Hatanaka) Date: Wed, 21 Sep 2011 10:40:24 -0700 Subject: [llvm-commits] [llvm] r140254 - /llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp In-Reply-To: <84366AA5-41EF-40E5-A5B9-8D2BEEC67B46@apple.com> References: <20110921164144.105962A6C12C@llvm.org> <84366AA5-41EF-40E5-A5B9-8D2BEEC67B46@apple.com> Message-ID: Sorry, I didn't do make check. Fixed in r140261. On Wed, Sep 21, 2011 at 10:33 AM, John McCall wrote: > On Sep 21, 2011, at 9:41 AM, Akira Hatanaka wrote: >> Author: ahatanak >> Date: Wed Sep 21 11:41:43 2011 >> New Revision: 140254 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=140254&view=rev >> Log: >> MipsArchVersion does not need to be in the initialization list and MipsABI >> should be initialized to UnknownABI. > > This is causing test suite failures, like the following: > > ******************** TEST 'LLVM :: CodeGen/Mips/alloca.ll' FAILED ******************** > Script: > -- > /Users/buildslave/zorg/buildbot/smooshlab/slave-0.8/build.clang-x86_64-darwin10-gcc42-RA/clang-build/Release+Asserts/bin/llc -march=mipsel < /Users/buildslave/zorg/buildbot/smooshlab/slave-0.8/build.clang-x86_64-darwin10-gcc42-RA/llvm/test/CodeGen/Mips/alloca.ll | /Users/buildslave/zorg/buildbot/smooshlab/slave-0.8/build.clang-x86_64-darwin10-gcc42-RA/clang-build/Release+Asserts/bin/FileCheck /Users/buildslave/zorg/buildbot/smooshlab/slave-0.8/build.clang-x86_64-darwin10-gcc42-RA/llvm/test/CodeGen/Mips/alloca.ll > -- > Exit Code: 1 > Command Output (stderr): > -- > Formal argument #0 has unhandled type i32 > UNREACHABLE executed at /Users/buildslave/zorg/buildbot/smooshlab/slave-0.8/build.clang-x86_64-darwin10-gcc42-RA/llvm/lib/CodeGen/CallingConvLower.cpp:81! > 0 ?llc ? ? ? ? ? ? ? 0x0000000100c5af72 PrintStackTrace(void*) + 34 > 1 ?llc ? ? ? ? ? ? ? 0x0000000100c5bef3 SignalHandler(int) + 707 > 2 ?libSystem.B.dylib 0x00007fff804de67a _sigtramp + 26 > 3 ?llc ? ? ? ? ? ? ? 0x0000000100017ad9 llvm::LLParser::ParseType(llvm::Type*&, bool) + 521 > 4 ?llc ? ? ? ? ? ? ? 0x0000000100c5b396 abort + 22 > 5 ?llc ? ? ? ? ? ? ? 0x0000000100c467bd llvm::llvm_unreachable_internal(char const*, char const*, unsigned int) + 381 > 6 ?llc ? ? ? ? ? ? ? 0x00000001007ac3ea llvm::CCState::AnalyzeFormalArguments(llvm::SmallVectorImpl const&, bool (*)(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)) + 346 > 7 ?llc ? ? ? ? ? ? ? 0x0000000100177eab llvm::MipsTargetLowering::LowerFormalArguments(llvm::SDValue, llvm::CallingConv::ID, bool, llvm::SmallVectorImpl const&, llvm::DebugLoc, llvm::SelectionDAG&, llvm::SmallVectorImpl&) const + 3931 > 8 ?llc ? ? ? ? ? ? ? 0x00000001006c36f0 llvm::SelectionDAGISel::LowerArguments(llvm::BasicBlock const*) + 3056 > 9 ?llc ? ? ? ? ? ? ? 0x00000001006ffbd8 llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function const&) + 2248 > 10 llc ? ? ? ? ? ? ? 0x00000001007003ac llvm::SelectionDAGISel::runOnMachineFunction(llvm::MachineFunction&) + 460 > 11 llc ? ? ? ? ? ? ? 0x00000001008400f3 llvm::MachineFunctionPass::runOnFunction(llvm::Function&) + 83 > 12 llc ? ? ? ? ? ? ? 0x0000000100b8e470 llvm::FPPassManager::runOnFunction(llvm::Function&) + 752 > 13 llc ? ? ? ? ? ? ? 0x0000000100b8e59b llvm::FPPassManager::runOnModule(llvm::Module&) + 187 > 14 llc ? ? ? ? ? ? ? 0x0000000100b8dd4f llvm::MPPassManager::runOnModule(llvm::Module&) + 607 > 15 llc ? ? ? ? ? ? ? 0x0000000100b8e051 llvm::PassManagerImpl::run(llvm::Module&) + 177 > 16 llc ? ? ? ? ? ? ? 0x0000000100b8e16d llvm::PassManager::run(llvm::Module&) + 13 > 17 llc ? ? ? ? ? ? ? 0x00000001000035ef main + 4975 > 18 llc ? ? ? ? ? ? ? 0x0000000100001834 start + 52 > Stack dump: > 0. ? ? ?Program arguments: /Users/buildslave/zorg/buildbot/smooshlab/slave-0.8/build.clang-x86_64-darwin10-gcc42-RA/clang-build/Release+Asserts/bin/llc -march=mipsel > 1. ? ? ?Running pass 'Function Pass Manager' on module ''. > 2. ? ? ?Running pass 'MIPS DAG->DAG Pattern Instruction Selection' on function '@twoalloca' > FileCheck error: '-' is empty. > > John. > From ahatanak at gmail.com Wed Sep 21 12:43:48 2011 From: ahatanak at gmail.com (Akira Hatanaka) Date: Wed, 21 Sep 2011 17:43:48 -0000 Subject: [llvm-commits] [llvm] r140266 - /llvm/trunk/test/CodeGen/Mips/2008-07-15-SmallSection.ll Message-ID: <20110921174348.990CA2A6C12C@llvm.org> Author: ahatanak Date: Wed Sep 21 12:43:48 2011 New Revision: 140266 URL: http://llvm.org/viewvc/llvm-project?rev=140266&view=rev Log: Remove +. Modified: llvm/trunk/test/CodeGen/Mips/2008-07-15-SmallSection.ll Modified: llvm/trunk/test/CodeGen/Mips/2008-07-15-SmallSection.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/2008-07-15-SmallSection.ll?rev=140266&r1=140265&r2=140266&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Mips/2008-07-15-SmallSection.ll (original) +++ llvm/trunk/test/CodeGen/Mips/2008-07-15-SmallSection.ll Wed Sep 21 12:43:48 2011 @@ -9,7 +9,7 @@ ; DISABLED: grep {\%hi} %t1 | count 2 ; DISABLED: grep {\%lo} %t1 | count 3 ; RUN: false -+; XFAIL: * +; XFAIL: * target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" From resistor at mac.com Wed Sep 21 12:58:45 2011 From: resistor at mac.com (Owen Anderson) Date: Wed, 21 Sep 2011 17:58:45 -0000 Subject: [llvm-commits] [llvm] r140267 - in /llvm/trunk/lib/Target: ARM/InstPrinter/ARMInstPrinter.cpp MBlaze/InstPrinter/MBlazeInstPrinter.cpp MSP430/InstPrinter/MSP430InstPrinter.cpp Mips/InstPrinter/MipsInstPrinter.cpp PowerPC/InstPrinter/PPCInstPrinter.cpp Message-ID: <20110921175846.07C932A6C12C@llvm.org> Author: resistor Date: Wed Sep 21 12:58:45 2011 New Revision: 140267 URL: http://llvm.org/viewvc/llvm-project?rev=140267&view=rev Log: These do not need to be conditional on the presence of CommentStream, as they have a fallback path now. Modified: llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp llvm/trunk/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.cpp llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp llvm/trunk/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp Modified: llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp?rev=140267&r1=140266&r2=140267&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp (original) +++ llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp Wed Sep 21 12:58:45 2011 @@ -72,7 +72,7 @@ O << ", " << getRegisterName(MO2.getReg()); assert(ARM_AM::getSORegOffset(MO3.getImm()) == 0); - if (CommentStream) printAnnotation(O, Annot); + printAnnotation(O, Annot); return; } @@ -90,12 +90,12 @@ << ", " << getRegisterName(MO1.getReg()); if (ARM_AM::getSORegShOp(MO2.getImm()) == ARM_AM::rrx) { - if (CommentStream) printAnnotation(O, Annot); + printAnnotation(O, Annot); return; } O << ", #" << translateShiftImm(ARM_AM::getSORegOffset(MO2.getImm())); - if (CommentStream) printAnnotation(O, Annot); + printAnnotation(O, Annot); return; } @@ -109,7 +109,7 @@ O << ".w"; O << '\t'; printRegisterList(MI, 4, O); - if (CommentStream) printAnnotation(O, Annot); + printAnnotation(O, Annot); return; } if (Opcode == ARM::STR_PRE_IMM && MI->getOperand(2).getReg() == ARM::SP && @@ -117,7 +117,7 @@ O << '\t' << "push"; printPredicateOperand(MI, 4, O); O << "\t{" << getRegisterName(MI->getOperand(1).getReg()) << "}"; - if (CommentStream) printAnnotation(O, Annot); + printAnnotation(O, Annot); return; } @@ -130,7 +130,7 @@ O << ".w"; O << '\t'; printRegisterList(MI, 4, O); - if (CommentStream) printAnnotation(O, Annot); + printAnnotation(O, Annot); return; } if (Opcode == ARM::LDR_POST_IMM && MI->getOperand(2).getReg() == ARM::SP && @@ -138,7 +138,7 @@ O << '\t' << "pop"; printPredicateOperand(MI, 5, O); O << "\t{" << getRegisterName(MI->getOperand(0).getReg()) << "}"; - if (CommentStream) printAnnotation(O, Annot); + printAnnotation(O, Annot); return; } @@ -150,7 +150,7 @@ printPredicateOperand(MI, 2, O); O << '\t'; printRegisterList(MI, 4, O); - if (CommentStream) printAnnotation(O, Annot); + printAnnotation(O, Annot); return; } @@ -161,7 +161,7 @@ printPredicateOperand(MI, 2, O); O << '\t'; printRegisterList(MI, 4, O); - if (CommentStream) printAnnotation(O, Annot); + printAnnotation(O, Annot); return; } @@ -180,7 +180,7 @@ if (Writeback) O << "!"; O << ", "; printRegisterList(MI, 3, O); - if (CommentStream) printAnnotation(O, Annot); + printAnnotation(O, Annot); return; } @@ -189,12 +189,12 @@ MI->getOperand(1).getReg() == ARM::R8) { O << "\tnop"; printPredicateOperand(MI, 2, O); - if (CommentStream) printAnnotation(O, Annot); + printAnnotation(O, Annot); return; } printInstruction(MI, O); - if (CommentStream) printAnnotation(O, Annot); + printAnnotation(O, Annot); } void ARMInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, Modified: llvm/trunk/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.cpp?rev=140267&r1=140266&r2=140267&view=diff ============================================================================== --- llvm/trunk/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.cpp (original) +++ llvm/trunk/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.cpp Wed Sep 21 12:58:45 2011 @@ -28,7 +28,7 @@ void MBlazeInstPrinter::printInst(const MCInst *MI, raw_ostream &O, StringRef Annot) { printInstruction(MI, O); - if (CommentStream) printAnnotation(O, Annot); + printAnnotation(O, Annot); } void MBlazeInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, Modified: llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp?rev=140267&r1=140266&r2=140267&view=diff ============================================================================== --- llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp (original) +++ llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp Wed Sep 21 12:58:45 2011 @@ -28,7 +28,7 @@ void MSP430InstPrinter::printInst(const MCInst *MI, raw_ostream &O, StringRef Annot) { printInstruction(MI, O); - if (CommentStream) printAnnotation(O, Annot); + printAnnotation(O, Annot); } void MSP430InstPrinter::printPCRelImmOperand(const MCInst *MI, unsigned OpNo, Modified: llvm/trunk/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp?rev=140267&r1=140266&r2=140267&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp (original) +++ llvm/trunk/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp Wed Sep 21 12:58:45 2011 @@ -72,7 +72,7 @@ void MipsInstPrinter::printInst(const MCInst *MI, raw_ostream &O, StringRef Annot) { printInstruction(MI, O); - if (CommentStream) printAnnotation(O, Annot); + printAnnotation(O, Annot); } void MipsInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, Modified: llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp?rev=140267&r1=140266&r2=140267&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp Wed Sep 21 12:58:45 2011 @@ -52,7 +52,7 @@ printOperand(MI, 1, O); O << ", " << (unsigned int)SH; - if (CommentStream) printAnnotation(O, Annot); + printAnnotation(O, Annot); return; } } @@ -63,7 +63,7 @@ printOperand(MI, 0, O); O << ", "; printOperand(MI, 1, O); - if (CommentStream) printAnnotation(O, Annot); + printAnnotation(O, Annot); return; } @@ -77,13 +77,13 @@ O << ", "; printOperand(MI, 1, O); O << ", " << (unsigned int)SH; - if (CommentStream) printAnnotation(O, Annot); + printAnnotation(O, Annot); return; } } printInstruction(MI, O); - if (CommentStream) printAnnotation(O, Annot); + printAnnotation(O, Annot); } From bruno.cardoso at gmail.com Wed Sep 21 13:12:57 2011 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Wed, 21 Sep 2011 11:12:57 -0700 Subject: [llvm-commits] [AVX PATCH] Add VBROADCASTSS selection In-Reply-To: <2B8953F251AC92428D9BBC92D9B218865E954102AC@hasmsx502.ger.corp.intel.com> References: <2B8953F251AC92428D9BBC92D9B218865E954102AC@hasmsx502.ger.corp.intel.com> Message-ID: Hi Zvi, On Wed, Sep 21, 2011 at 8:58 AM, Rackover, Zvi wrote: > Hi Bruno et al, > > > > This patch adds selection of the vbroadcastss/vbroadcastsd instructions, > fixes the avx-vbroadcast.ll test and improves generated code in a few other > test cases. > > However, for one test case, avx-splat.ll::funcC, the generated code worsens > and the test fails. > > > > Please review the attached patch and commit if acceptable. We already have vbroadcast support (isVectorBroadcast in ISelLowering), it's disabled because of PR8156, but should be re-enabled once this is solved. About your patch, handling it in BUILD_VECTOR isn't the way to go because you only want to match a scalar_to_vector+loads, for the other cases you don't want it. If the actual code doesn't catch any cases you might be looking at, please modify that function or add a x86 target specific dag combine to handle them. To test the actual code before PR8156 gets solved replace MayFoldLoad with RelaxedMayFoldLoad locally. -- Bruno Cardoso Lopes http://www.brunocardoso.cc From benny.kra at googlemail.com Wed Sep 21 13:18:53 2011 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Wed, 21 Sep 2011 18:18:53 -0000 Subject: [llvm-commits] [llvm] r140269 - /llvm/trunk/tools/llvm-objdump/MachODump.cpp Message-ID: <20110921181853.DAE9D2A6C12C@llvm.org> Author: d0k Date: Wed Sep 21 13:18:53 2011 New Revision: 140269 URL: http://llvm.org/viewvc/llvm-project?rev=140269&view=rev Log: llvm-objdump: Take the data from the right object when there's no dSYM around. Modified: llvm/trunk/tools/llvm-objdump/MachODump.cpp Modified: llvm/trunk/tools/llvm-objdump/MachODump.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-objdump/MachODump.cpp?rev=140269&r1=140268&r2=140269&view=diff ============================================================================== --- llvm/trunk/tools/llvm-objdump/MachODump.cpp (original) +++ llvm/trunk/tools/llvm-objdump/MachODump.cpp Wed Sep 21 13:18:53 2011 @@ -347,6 +347,7 @@ DebugLineSection, DebugStrSection; OwningPtr diContext; OwningPtr DSYMObj; + MachOObject *DbgInfoObj = MachOObj.get(); // Try to find debug info and set up the DIContext for it. if (UseDbg) { ArrayRef
    DebugSections = Sections; @@ -368,29 +369,30 @@ getSectionsAndSymbols(Header, DSYMObj.get(), 0, DSYMSections, Symbols, FoundFns); DebugSections = DSYMSections; + DbgInfoObj = DSYMObj.get(); } // Find the named debug info sections. for (unsigned SectIdx = 0; SectIdx != DebugSections.size(); SectIdx++) { if (!strcmp(DebugSections[SectIdx].Name, "__debug_abbrev")) - DebugAbbrevSection = DSYMObj->getData(DebugSections[SectIdx].Offset, - DebugSections[SectIdx].Size); + DebugAbbrevSection = DbgInfoObj->getData(DebugSections[SectIdx].Offset, + DebugSections[SectIdx].Size); else if (!strcmp(DebugSections[SectIdx].Name, "__debug_info")) - DebugInfoSection = DSYMObj->getData(DebugSections[SectIdx].Offset, - DebugSections[SectIdx].Size); - else if (!strcmp(DebugSections[SectIdx].Name, "__debug_aranges")) - DebugArangesSection = DSYMObj->getData(DebugSections[SectIdx].Offset, + DebugInfoSection = DbgInfoObj->getData(DebugSections[SectIdx].Offset, DebugSections[SectIdx].Size); + else if (!strcmp(DebugSections[SectIdx].Name, "__debug_aranges")) + DebugArangesSection = DbgInfoObj->getData(DebugSections[SectIdx].Offset, + DebugSections[SectIdx].Size); else if (!strcmp(DebugSections[SectIdx].Name, "__debug_line")) - DebugLineSection = DSYMObj->getData(DebugSections[SectIdx].Offset, - DebugSections[SectIdx].Size); + DebugLineSection = DbgInfoObj->getData(DebugSections[SectIdx].Offset, + DebugSections[SectIdx].Size); else if (!strcmp(DebugSections[SectIdx].Name, "__debug_str")) - DebugStrSection = DSYMObj->getData(DebugSections[SectIdx].Offset, - DebugSections[SectIdx].Size); + DebugStrSection = DbgInfoObj->getData(DebugSections[SectIdx].Offset, + DebugSections[SectIdx].Size); } // Setup the DIContext. - diContext.reset(DIContext::getDWARFContext(MachOObj->isLittleEndian(), + diContext.reset(DIContext::getDWARFContext(DbgInfoObj->isLittleEndian(), DebugInfoSection, DebugAbbrevSection, DebugArangesSection, From peckw at wesleypeck.com Wed Sep 21 14:23:46 2011 From: peckw at wesleypeck.com (Wesley Peck) Date: Wed, 21 Sep 2011 19:23:46 -0000 Subject: [llvm-commits] [llvm] r140273 - in /llvm/trunk/lib/Target/MBlaze/AsmParser: MBlazeAsmParser.cpp Makefile Message-ID: <20110921192346.4F4AC2A6C12C@llvm.org> Author: peckw Date: Wed Sep 21 14:23:46 2011 New Revision: 140273 URL: http://llvm.org/viewvc/llvm-project?rev=140273&view=rev Log: Fix some simple copy-paste errors in MBlaze ASM Parser and Makefile. patch contributed by Jia Liu! Modified: llvm/trunk/lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp llvm/trunk/lib/Target/MBlaze/AsmParser/Makefile Modified: llvm/trunk/lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp?rev=140273&r1=140272&r2=140273&view=diff ============================================================================== --- llvm/trunk/lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp (original) +++ llvm/trunk/lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp Wed Sep 21 14:23:46 2011 @@ -519,7 +519,7 @@ return false; } -/// ParseDirective parses the arm specific directives +/// ParseDirective parses the MBlaze specific directives bool MBlazeAsmParser::ParseDirective(AsmToken DirectiveID) { StringRef IDVal = DirectiveID.getIdentifier(); if (IDVal == ".word") Modified: llvm/trunk/lib/Target/MBlaze/AsmParser/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/AsmParser/Makefile?rev=140273&r1=140272&r2=140273&view=diff ============================================================================== --- llvm/trunk/lib/Target/MBlaze/AsmParser/Makefile (original) +++ llvm/trunk/lib/Target/MBlaze/AsmParser/Makefile Wed Sep 21 14:23:46 2011 @@ -1,4 +1,4 @@ -##===- lib/Target/ARM/AsmParser/Makefile -------------------*- Makefile -*-===## +##===- lib/Target/MBlaze/AsmParser/Makefile ----------------*- Makefile -*-===## # # The LLVM Compiler Infrastructure # From peckw at wesleypeck.com Wed Sep 21 14:26:34 2011 From: peckw at wesleypeck.com (Wesley Peck) Date: Wed, 21 Sep 2011 14:26:34 -0500 Subject: [llvm-commits] [patch] fix MBlazeAsmParser comment typo In-Reply-To: References: Message-ID: Somehow I missed the first email. Sorry. I have applied the patch and committed it as revision 140273. -- Wesley Peck University of Kansas SLDG Laboratory On Sep 20, 2011, at 10:35 PM, Liu wrote: > On Wed, Sep 21, 2011 at 1:01 AM, Liu wrote: >> Hi all >> >> There are typos in MBlazeAsmParser.cpp and the Makefile, I've fixed it. >> >> --Liu >> > > ping > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From grosbach at apple.com Wed Sep 21 16:36:53 2011 From: grosbach at apple.com (Jim Grosbach) Date: Wed, 21 Sep 2011 21:36:53 -0000 Subject: [llvm-commits] [llvm] r140275 - /llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp Message-ID: <20110921213653.BE2792A6C12C@llvm.org> Author: grosbach Date: Wed Sep 21 16:36:53 2011 New Revision: 140275 URL: http://llvm.org/viewvc/llvm-project?rev=140275&view=rev Log: Tidy up. Whitepsace. Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp?rev=140275&r1=140274&r2=140275&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp (original) +++ llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp Wed Sep 21 16:36:53 2011 @@ -49,7 +49,7 @@ static void SrcMgrDiagHandler(const SMDiagnostic &Diag, void *diagInfo) { SrcMgrDiagInfo *DiagInfo = static_cast(diagInfo); assert(DiagInfo && "Diagnostic context not passed down?"); - + // If the inline asm had metadata associated with it, pull out a location // cookie corresponding to which line the error occurred on. unsigned LocCookie = 0; @@ -57,13 +57,13 @@ unsigned ErrorLine = Diag.getLineNo()-1; if (ErrorLine >= LocInfo->getNumOperands()) ErrorLine = 0; - + if (LocInfo->getNumOperands() != 0) if (const ConstantInt *CI = dyn_cast(LocInfo->getOperand(ErrorLine))) LocCookie = CI->getZExtValue(); } - + DiagInfo->DiagHandler(Diag, DiagInfo->DiagContext, LocCookie); } From benny.kra at googlemail.com Wed Sep 21 16:47:35 2011 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Wed, 21 Sep 2011 21:47:35 -0000 Subject: [llvm-commits] [llvm] r140276 - /llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp Message-ID: <20110921214735.5B9422A6C12C@llvm.org> Author: d0k Date: Wed Sep 21 16:47:35 2011 New Revision: 140276 URL: http://llvm.org/viewvc/llvm-project?rev=140276&view=rev Log: X86Disassembler: if verbose logging is going to nulls(), disable logging completely. Otherwise we'll spend a ridiculous amount of time pretty printing debug output and then discarding it. Modified: llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp Modified: llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp?rev=140276&r1=140275&r2=140276&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp (original) +++ llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp Wed Sep 21 16:47:35 2011 @@ -117,11 +117,15 @@ raw_ostream &vStream, raw_ostream &cStream) const { InternalInstruction internalInstr; + + dlog_t loggerFn = logger; + if (&vStream == &nulls()) + loggerFn = 0; // Disable logging completely if it's going to nulls(). int ret = decodeInstruction(&internalInstr, regionReader, (void*)®ion, - logger, + loggerFn, (void*)&vStream, address, fMode); From isanbard at gmail.com Wed Sep 21 17:14:28 2011 From: isanbard at gmail.com (Bill Wendling) Date: Wed, 21 Sep 2011 22:14:28 -0000 Subject: [llvm-commits] [llvm] r140277 - /llvm/trunk/lib/CodeGen/ShadowStackGC.cpp Message-ID: <20110921221428.799D02A6C12C@llvm.org> Author: void Date: Wed Sep 21 17:14:28 2011 New Revision: 140277 URL: http://llvm.org/viewvc/llvm-project?rev=140277&view=rev Log: Attempt to update the shadow stack GC pass to the new EH model. This inserts a cleanup landingpad instruction and a resume to mimic the old unwind instruction. Modified: llvm/trunk/lib/CodeGen/ShadowStackGC.cpp Modified: llvm/trunk/lib/CodeGen/ShadowStackGC.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ShadowStackGC.cpp?rev=140277&r1=140276&r2=140277&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/ShadowStackGC.cpp (original) +++ llvm/trunk/lib/CodeGen/ShadowStackGC.cpp Wed Sep 21 17:14:28 2011 @@ -109,7 +109,7 @@ State = 1; case 1: - // Find all 'return' and 'unwind' instructions. + // Find all 'return', 'resume', and 'unwind' instructions. while (StateBB != StateE) { BasicBlock *CurBB = StateBB++; @@ -141,9 +141,21 @@ return 0; // Create a cleanup block. - BasicBlock *CleanupBB = BasicBlock::Create(F.getContext(), - CleanupBBName, &F); - UnwindInst *UI = new UnwindInst(F.getContext(), CleanupBB); + LLVMContext &C = F.getContext(); + BasicBlock *CleanupBB = BasicBlock::Create(C, CleanupBBName, &F); + Type *ExnTy = StructType::get(Type::getInt8PtrTy(C), + Type::getInt32Ty(C), NULL); + // FIXME: Assuming the C++ personality function probably isn't the best + // thing in the world. + Constant *PersFn = + F.getParent()-> + getOrInsertFunction("__gxx_personality_v0", + FunctionType::get(Type::getInt32Ty(C), true)); + LandingPadInst *LPad = LandingPadInst::Create(ExnTy, PersFn, 1, + "cleanup.lpad", + CleanupBB); + LPad->setCleanup(true); + ResumeInst *RI = ResumeInst::Create(LPad, CleanupBB); // Transform the 'call' instructions into 'invoke's branching to the // cleanup block. Go in reverse order to make prettier BB names. @@ -174,7 +186,7 @@ delete CI; } - Builder.SetInsertPoint(UI->getParent(), UI); + Builder.SetInsertPoint(RI->getParent(), RI); return &Builder; } } From benny.kra at googlemail.com Wed Sep 21 17:16:43 2011 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Wed, 21 Sep 2011 22:16:43 -0000 Subject: [llvm-commits] [llvm] r140278 - /llvm/trunk/tools/llvm-objdump/MachODump.cpp Message-ID: <20110921221643.DD58A2A6C12C@llvm.org> Author: d0k Date: Wed Sep 21 17:16:43 2011 New Revision: 140278 URL: http://llvm.org/viewvc/llvm-project?rev=140278&view=rev Log: llvm-objdump: Detach symbol listing from section enumeration for mach-o. This reduces memory usage as we don't add the same symbol multiple times anymore. Modified: llvm/trunk/tools/llvm-objdump/MachODump.cpp Modified: llvm/trunk/tools/llvm-objdump/MachODump.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-objdump/MachODump.cpp?rev=140278&r1=140277&r2=140278&view=diff ============================================================================== --- llvm/trunk/tools/llvm-objdump/MachODump.cpp (original) +++ llvm/trunk/tools/llvm-objdump/MachODump.cpp Wed Sep 21 17:16:43 2011 @@ -230,15 +230,6 @@ MachOObj->ReadSection(LCI, SectNum, Sect); Sections.push_back(copySection(Sect)); - // Store the symbols in this section. - if (SymtabLC) { - for (unsigned i = 0; i != (*SymtabLC)->NumSymbolTableEntries; ++i) { - InMemoryStruct STE; - MachOObj->ReadSymbolTableEntry((*SymtabLC)->SymbolTableOffset, i, - STE); - Symbols.push_back(copySymbol(STE)); - } - } } } else if (LCI.Command.Type == macho::LCT_Segment64) { InMemoryStruct Segment64LC; @@ -250,16 +241,6 @@ InMemoryStruct Sect64; MachOObj->ReadSection64(LCI, SectNum, Sect64); Sections.push_back(copySection(Sect64)); - - // Store the symbols in this section. - if (SymtabLC) { - for (unsigned i = 0; i != (*SymtabLC)->NumSymbolTableEntries; ++i) { - InMemoryStruct STE; - MachOObj->ReadSymbol64TableEntry((*SymtabLC)->SymbolTableOffset, i, - STE); - Symbols.push_back(copySymbol(STE)); - } - } } } else if (LCI.Command.Type == macho::LCT_FunctionStarts) { // We found a function starts segment, parse the addresses for later @@ -270,6 +251,22 @@ MachOObj->ReadULEB128s(LLC->DataOffset, FoundFns); } } + // Store the symbols. + if (SymtabLC) { + for (unsigned i = 0; i != (*SymtabLC)->NumSymbolTableEntries; ++i) { + if (MachOObj->is64Bit()) { + InMemoryStruct STE; + MachOObj->ReadSymbol64TableEntry((*SymtabLC)->SymbolTableOffset, i, + STE); + Symbols.push_back(copySymbol(STE)); + } else { + InMemoryStruct STE; + MachOObj->ReadSymbolTableEntry((*SymtabLC)->SymbolTableOffset, i, + STE); + Symbols.push_back(copySymbol(STE)); + } + } + } } void llvm::DisassembleInputMachO(StringRef Filename) { From aaron at aaronballman.com Wed Sep 21 17:37:34 2011 From: aaron at aaronballman.com (Aaron Ballman) Date: Wed, 21 Sep 2011 17:37:34 -0500 Subject: [llvm-commits] [PATCH] Improved threading support on Windows In-Reply-To: <1701904A-B4BA-4820-BCDE-46E47D835B7A@apple.com> References: <1701904A-B4BA-4820-BCDE-46E47D835B7A@apple.com> Message-ID: Apologies -- I accidentally hit Reply instead of Reply All! > On Mon, Sep 19, 2011 at 5:08 PM, Eric Christopher wrote: >> >> On Sep 19, 2011, at 2:53 PM, Aaron Ballman wrote: >> >> But this may point out a minor problem with the system in that it >> takes almost a month for Win32 reviews. Takumi does a wonderful job >> as a reviewer (as does Anton), but we may want to explore ways to >> ensure a faster turnaround time for Win32 patches. One that doesn't >> put undue burden on anyone, obviously. > > Suggestions welcome? Perhaps a call-out to see if anyone else is comfortable doing periodic Win32 reviews. Takumi, Anton and I can't be the only people with Win32 knowledge in the community, I would think! I'm certainly willing to reviews. Even if I don't get commit access, I can at least assist with the review process for someone who does. ~Aaron From wendling at apple.com Wed Sep 21 17:43:19 2011 From: wendling at apple.com (Bill Wendling) Date: Wed, 21 Sep 2011 15:43:19 -0700 Subject: [llvm-commits] [llvm] r140168 - /llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp In-Reply-To: <4E79A3CD.1050200@free.fr> References: <20110920184207.6CE8B2A6C12C@llvm.org> <4E79A3CD.1050200@free.fr> Message-ID: On Sep 21, 2011, at 1:43 AM, Duncan Sands wrote: > Hi Bill, > >> --- llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp (original) >> +++ llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp Tue Sep 20 13:42:07 2011 >> @@ -754,9 +754,13 @@ >> return newFunction; >> } >> >> -bool CodeExtractor::isEligible(const std::vector &code) { >> +bool CodeExtractor::isEligible(ArrayRef code) { >> + // Deny a single basic block that's a landing pad block. >> + if (code.size() == 1&& code[0]->isLandingPad()) >> + return false; > > does this mean that you can remove the "isLandingPad" check you previously added > somewhere else in this file? > Hi Duncan, I'd reverted that patch because it broke things. So, 'yes'. ;-) -bw From isanbard at gmail.com Wed Sep 21 17:57:02 2011 From: isanbard at gmail.com (Bill Wendling) Date: Wed, 21 Sep 2011 22:57:02 -0000 Subject: [llvm-commits] [llvm] r140280 - /llvm/trunk/lib/VMCore/Verifier.cpp Message-ID: <20110921225702.63C1C2A6C12C@llvm.org> Author: void Date: Wed Sep 21 17:57:02 2011 New Revision: 140280 URL: http://llvm.org/viewvc/llvm-project?rev=140280&view=rev Log: The last verification check for the new EH model. This makes sure that the unwind destination of an invoke is a landing pad. Modified: llvm/trunk/lib/VMCore/Verifier.cpp Modified: llvm/trunk/lib/VMCore/Verifier.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Verifier.cpp?rev=140280&r1=140279&r2=140280&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Verifier.cpp (original) +++ llvm/trunk/lib/VMCore/Verifier.cpp Wed Sep 21 17:57:02 2011 @@ -1167,6 +1167,12 @@ void Verifier::visitInvokeInst(InvokeInst &II) { VerifyCallSite(&II); + + // Verify that there is a landingpad instruction as the first non-PHI + // instruction of the 'unwind' destination. + Assert1(II.getUnwindDest()->isLandingPad(), + "The unwind destination does not have a landingpad instruction!",&II); + visitTerminatorInst(II); } From aaron at aaronballman.com Wed Sep 21 18:06:54 2011 From: aaron at aaronballman.com (Aaron Ballman) Date: Wed, 21 Sep 2011 18:06:54 -0500 Subject: [llvm-commits] [PATCH] Win64 Support for Crash Stack Crawls Message-ID: This patch fixes a FIXME in Signals.inc for Win64. Now, it contains support for 32- and 64-bit versions of the library. The StackWalk64 API (and friends) were introduced in DebugHlp 5.1, which shipped with Windows XP. However, I don't have an XP install handy to test against, so I've not verified on the LCD platform. However, I have tested it on Win7 64-bit with 32-bit and 64-bit versions of the library. The majority of this patch involved working around MinGW. :-( It doesn't have support for any of the 64-bit APIs or structures, so I had to dynamically load them. All structures and function signatures were pulled from the platform SDK. So this has been tested with VC++ and MinGW both. ~Aaron -------------- next part -------------- A non-text attachment was scrubbed... Name: Signals.diff Type: application/octet-stream Size: 11125 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110921/407fd797/attachment-0001.obj From gkistanova at gmail.com Wed Sep 21 18:34:23 2011 From: gkistanova at gmail.com (Galina Kistanova) Date: Wed, 21 Sep 2011 23:34:23 -0000 Subject: [llvm-commits] [llvm] r140281 - /llvm/trunk/lib/Analysis/DbgInfoPrinter.cpp Message-ID: <20110921233423.F2C2A2A6C12C@llvm.org> Author: gkistanova Date: Wed Sep 21 18:34:23 2011 New Revision: 140281 URL: http://llvm.org/viewvc/llvm-project?rev=140281&view=rev Log: Fix for DbgInfoPrinter.cpp:174:12: warning: ?LineNo? may be used uninitialized in this function. Modified: llvm/trunk/lib/Analysis/DbgInfoPrinter.cpp Modified: llvm/trunk/lib/Analysis/DbgInfoPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/DbgInfoPrinter.cpp?rev=140281&r1=140280&r2=140281&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/DbgInfoPrinter.cpp (original) +++ llvm/trunk/lib/Analysis/DbgInfoPrinter.cpp Wed Sep 21 18:34:23 2011 @@ -171,7 +171,7 @@ void PrintDbgInfo::printVariableDeclaration(const Value *V) { std::string DisplayName, File, Directory, Type; - unsigned LineNo; + unsigned LineNo = 0; if (!getLocationInfo(V, DisplayName, Type, LineNo, File, Directory)) return; From dpatel at apple.com Wed Sep 21 18:41:11 2011 From: dpatel at apple.com (Devang Patel) Date: Wed, 21 Sep 2011 23:41:11 -0000 Subject: [llvm-commits] [llvm] r140282 - in /llvm/trunk: lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp test/CodeGen/X86/dbg-at-specficiation.ll Message-ID: <20110921234111.D8CC82A6C12C@llvm.org> Author: dpatel Date: Wed Sep 21 18:41:11 2011 New Revision: 140282 URL: http://llvm.org/viewvc/llvm-project?rev=140282&view=rev Log: Do not unnecessarily use AT_specification DIE because it does not add any value. Few weeks ago, llvm completely inverted the debug info graph. Earlier each debug info node used to keep track of its compile unit, now compile unit keeps track of important nodes. One impact of this change is that the global variable's do not have any context, which should be checked before deciding to use AT_specification DIE. Added: llvm/trunk/test/CodeGen/X86/dbg-at-specficiation.ll Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp?rev=140282&r1=140281&r2=140282&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp (original) +++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp Wed Sep 21 18:41:11 2011 @@ -1081,7 +1081,7 @@ Asm->Mang->getSymbol(GV.getGlobal())); // Do not create specification DIE if context is either compile unit // or a subprogram. - if (GV.isDefinition() && !GVContext.isCompileUnit() && + if (GVContext && GV.isDefinition() && !GVContext.isCompileUnit() && !GVContext.isFile() && !isSubprogramContext(GVContext)) { // Create specification DIE. DIE *VariableSpecDIE = new DIE(dwarf::DW_TAG_variable); Added: llvm/trunk/test/CodeGen/X86/dbg-at-specficiation.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/dbg-at-specficiation.ll?rev=140282&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/dbg-at-specficiation.ll (added) +++ llvm/trunk/test/CodeGen/X86/dbg-at-specficiation.ll Wed Sep 21 18:41:11 2011 @@ -0,0 +1,20 @@ +; RUN: llc < %s | FileCheck %s +; Radar 10147769 +; Do not unnecessarily use AT_specification DIE. +; CHECK-NOT: AT_specification + + at a = common global [10 x i32] zeroinitializer, align 16 + +!llvm.dbg.cu = !{!0} + +!0 = metadata !{i32 720913, i32 0, i32 12, metadata !"x.c", metadata !"/private/tmp", metadata !"clang version 3.0 (trunk 140253)", i1 true, i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !1, metadata !3} ; [ DW_TAG_compile_unit ] +!1 = metadata !{metadata !2} +!2 = metadata !{i32 0} +!3 = metadata !{metadata !4} +!4 = metadata !{metadata !5} +!5 = metadata !{i32 720948, i32 0, null, metadata !"a", metadata !"a", metadata !"", metadata !6, i32 1, metadata !7, i32 0, i32 1, [10 x i32]* @a} ; [ DW_TAG_variable ] +!6 = metadata !{i32 720937, metadata !"x.c", metadata !"/private/tmp", null} ; [ DW_TAG_file_type ] +!7 = metadata !{i32 720897, null, metadata !"", null, i32 0, i64 320, i64 32, i32 0, i32 0, metadata !8, metadata !9, i32 0, i32 0} ; [ DW_TAG_array_type ] +!8 = metadata !{i32 720932, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!9 = metadata !{metadata !10} +!10 = metadata !{i32 720929, i64 0, i64 9} ; [ DW_TAG_subrange_type ] From resistor at mac.com Wed Sep 21 18:44:46 2011 From: resistor at mac.com (Owen Anderson) Date: Wed, 21 Sep 2011 23:44:46 -0000 Subject: [llvm-commits] [llvm] r140283 - in /llvm/trunk: lib/Target/ARM/ARMInstrThumb2.td lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp lib/Target/ARM/InstPrinter/ARMInstPrinter.h test/MC/Disassembler/ARM/thumb-tests.txt test/MC/Disassembler/ARM/thumb2.txt Message-ID: <20110921234446.8FB402A6C12C@llvm.org> Author: resistor Date: Wed Sep 21 18:44:46 2011 New Revision: 140283 URL: http://llvm.org/viewvc/llvm-project?rev=140283&view=rev Log: Print out immediate offset versions of PC-relative load/store instructions as [pc, #123] rather than simply #123. Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.h llvm/trunk/test/MC/Disassembler/ARM/thumb-tests.txt llvm/trunk/test/MC/Disassembler/ARM/thumb2.txt Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=140283&r1=140282&r2=140283&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Wed Sep 21 18:44:46 2011 @@ -114,12 +114,14 @@ // t2ldrlabel := imm12 def t2ldrlabel : Operand { let EncoderMethod = "getAddrModeImm12OpValue"; + let PrintMethod = "printT2LdrLabelOperand"; } // ADR instruction labels. def t2adrlabel : Operand { let EncoderMethod = "getT2AdrLabelOpValue"; + let PrintMethod = "printT2AdrLabelOperand"; } Modified: llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp?rev=140283&r1=140282&r2=140283&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp (original) +++ llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp Wed Sep 21 18:44:46 2011 @@ -211,6 +211,29 @@ } } +void ARMInstPrinter::printT2LdrLabelOperand(const MCInst *MI, unsigned OpNum, + raw_ostream &O) { + const MCOperand &MO1 = MI->getOperand(OpNum); + if (MO1.isExpr()) + O << *MO1.getExpr(); + else if (MO1.isImm()) + O << "[pc, #" << MO1.getImm() << "]"; + else + llvm_unreachable("Unknown LDR label operand?"); +} + +void ARMInstPrinter::printT2AdrLabelOperand(const MCInst *MI, unsigned OpNum, + raw_ostream &O) { + const MCOperand &MO1 = MI->getOperand(OpNum); + if (MO1.isExpr()) + O << *MO1.getExpr(); + else if (MO1.isImm()) + O << "[pc, #" << MO1.getImm() << "]"; + else + llvm_unreachable("Unknown LDR label operand?"); +} + + // so_reg is a 4-operand unit corresponding to register forms of the A5.1 // "Addressing Mode 1 - Data-processing operands" forms. This includes: // REG 0 0 - e.g. R5 Modified: llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.h?rev=140283&r1=140282&r2=140283&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.h (original) +++ llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.h Wed Sep 21 18:44:46 2011 @@ -127,6 +127,8 @@ void printRotImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); void printPCLabel(const MCInst *MI, unsigned OpNum, raw_ostream &O); + void printT2LdrLabelOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); + void printT2AdrLabelOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); }; } // end namespace llvm Modified: llvm/trunk/test/MC/Disassembler/ARM/thumb-tests.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/thumb-tests.txt?rev=140283&r1=140282&r2=140283&view=diff ============================================================================== --- llvm/trunk/test/MC/Disassembler/ARM/thumb-tests.txt (original) +++ llvm/trunk/test/MC/Disassembler/ARM/thumb-tests.txt Wed Sep 21 18:44:46 2011 @@ -42,7 +42,7 @@ # CHECK: str r2, [r5, r3] 0xea 0x50 -# CHECK: ldrb.w r8, #-24 +# CHECK: ldrb.w r8, [pc, #-24] 0x1f 0xf8 0x18 0x80 # CHECK: ldrd r0, r1, [r7, #64]! Modified: llvm/trunk/test/MC/Disassembler/ARM/thumb2.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/thumb2.txt?rev=140283&r1=140282&r2=140283&view=diff ============================================================================== --- llvm/trunk/test/MC/Disassembler/ARM/thumb2.txt (original) +++ llvm/trunk/test/MC/Disassembler/ARM/thumb2.txt Wed Sep 21 18:44:46 2011 @@ -649,12 +649,14 @@ # CHECK: ldrh.w r5, [r6, #33] # CHECK: ldrh.w r5, [r6, #257] # CHECK: ldrh.w lr, [r7, #257] +# CHECK: ldrh.w sp, [pc, #-21] 0x35 0xf8 0x04 0x5c 0x35 0x8c 0xb6 0xf8 0x21 0x50 0xb6 0xf8 0x01 0x51 0xb7 0xf8 0x01 0xe1 +0x3f 0xf8 0x15 0xd0 #------------------------------------------------------------------------------ From resistor at mac.com Wed Sep 21 18:53:44 2011 From: resistor at mac.com (Owen Anderson) Date: Wed, 21 Sep 2011 23:53:44 -0000 Subject: [llvm-commits] [llvm] r140284 - in /llvm/trunk: lib/Target/ARM/ARMInstrThumb2.td lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp lib/Target/ARM/InstPrinter/ARMInstPrinter.h test/MC/ARM/basic-thumb2-instructions.s Message-ID: <20110921235344.E99212A6C12C@llvm.org> Author: resistor Date: Wed Sep 21 18:53:44 2011 New Revision: 140284 URL: http://llvm.org/viewvc/llvm-project?rev=140284&view=rev Log: Turns out that Thumb2 ADR doesn't need special printing like LDR does. Fix other test failures I caused. Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.h llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=140284&r1=140283&r2=140284&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Wed Sep 21 18:53:44 2011 @@ -121,7 +121,6 @@ // ADR instruction labels. def t2adrlabel : Operand { let EncoderMethod = "getT2AdrLabelOpValue"; - let PrintMethod = "printT2AdrLabelOperand"; } Modified: llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp?rev=140284&r1=140283&r2=140284&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp (original) +++ llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp Wed Sep 21 18:53:44 2011 @@ -222,18 +222,6 @@ llvm_unreachable("Unknown LDR label operand?"); } -void ARMInstPrinter::printT2AdrLabelOperand(const MCInst *MI, unsigned OpNum, - raw_ostream &O) { - const MCOperand &MO1 = MI->getOperand(OpNum); - if (MO1.isExpr()) - O << *MO1.getExpr(); - else if (MO1.isImm()) - O << "[pc, #" << MO1.getImm() << "]"; - else - llvm_unreachable("Unknown LDR label operand?"); -} - - // so_reg is a 4-operand unit corresponding to register forms of the A5.1 // "Addressing Mode 1 - Data-processing operands" forms. This includes: // REG 0 0 - e.g. R5 Modified: llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.h?rev=140284&r1=140283&r2=140284&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.h (original) +++ llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.h Wed Sep 21 18:53:44 2011 @@ -128,7 +128,6 @@ void printPCLabel(const MCInst *MI, unsigned OpNum, raw_ostream &O); void printT2LdrLabelOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); - void printT2AdrLabelOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); }; } // end namespace llvm Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s?rev=140284&r1=140283&r2=140284&view=diff ============================================================================== --- llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s (original) +++ llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Wed Sep 21 18:53:44 2011 @@ -890,11 +890,13 @@ @ LDRSH(literal) @------------------------------------------------------------------------------ ldrsh r5, _bar - ldrsh.w r4, #1435 @ CHECK: ldrsh.w r5, _bar @ encoding: [0xbf'A',0xf9'A',A,0x50'A'] @ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_ldst_pcrel_12 -@ CHECK: ldrsh.w r4, #1435 @ encoding: [0x3f,0xf9,0x9b,0x45] + +@ TEMPORARILY DISABLED: +@ ldrsh.w r4, [pc, #1435] +@ : ldrsh.w r4, [pc, #1435] @ encoding: [0x3f,0xf9,0x9b,0x45] @------------------------------------------------------------------------------ @ LDRSHT From proljc at gmail.com Wed Sep 21 19:32:56 2011 From: proljc at gmail.com (Liu) Date: Thu, 22 Sep 2011 08:32:56 +0800 Subject: [llvm-commits] [patch] fix PPCRegisterInfo.cpp comment typo In-Reply-To: References: Message-ID: On Wed, Sep 21, 2011 at 12:59 AM, Liu wrote: > Hi all > > I find a typo in PPCRegisterInfo.cpp comment and fixed it. > > --Liu > ping --- a/lib/Target/PowerPC/PPCRegisterInfo.cpp +++ b/lib/Target/PowerPC/PPCRegisterInfo.cpp @@ -322,7 +322,7 @@ unsigned findScratchRegister(MachineBasicBlock::iterator II, RegScavenger *RS, const TargetRegisterClass *RC, int SPAdj) { assert(RS && "Register scavenging must be on"); unsigned Reg = RS->FindUnusedReg(RC); - // FIXME: move ARM callee-saved reg scan to target independent code, then + // FIXME: move PPC callee-saved reg scan to target independent code, then // search for already spilled CS register here. if (Reg == 0) Reg = RS->scavengeRegister(RC, II, SPAdj); -- Isn't it a typo? From wendling at apple.com Wed Sep 21 20:09:32 2011 From: wendling at apple.com (Bill Wendling) Date: Wed, 21 Sep 2011 18:09:32 -0700 Subject: [llvm-commits] [patch] fix PPCRegisterInfo.cpp comment typo In-Reply-To: References: Message-ID: On Sep 21, 2011, at 5:32 PM, Liu wrote: > On Wed, Sep 21, 2011 at 12:59 AM, Liu wrote: >> Hi all >> >> I find a typo in PPCRegisterInfo.cpp comment and fixed it. >> >> --Liu >> > > ping > > --- a/lib/Target/PowerPC/PPCRegisterInfo.cpp > +++ b/lib/Target/PowerPC/PPCRegisterInfo.cpp > @@ -322,7 +322,7 @@ unsigned > findScratchRegister(MachineBasicBlock::iterator II, RegScavenger *RS, > const TargetRegisterClass *RC, int SPAdj) { > assert(RS && "Register scavenging must be on"); > unsigned Reg = RS->FindUnusedReg(RC); > - // FIXME: move ARM callee-saved reg scan to target independent code, then > + // FIXME: move PPC callee-saved reg scan to target independent code, then > // search for already spilled CS register here. > if (Reg == 0) > Reg = RS->scavengeRegister(RC, II, SPAdj); > -- > > Isn't it a typo? I don't believe so. It's saying that the reg scan in ARM should be target independent. Once that's accomplished, we can use that functionality here. -bw From isanbard at gmail.com Wed Sep 21 20:34:16 2011 From: isanbard at gmail.com (Bill Wendling) Date: Thu, 22 Sep 2011 01:34:16 -0000 Subject: [llvm-commits] [test-suite] r140286 - in /test-suite/trunk/SingleSource/UnitTests/EH: filter-1.cpp filter-1.reference_output Message-ID: <20110922013416.2A2A42A6C12C@llvm.org> Author: void Date: Wed Sep 21 20:34:15 2011 New Revision: 140286 URL: http://llvm.org/viewvc/llvm-project?rev=140286&view=rev Log: Add a filter test to the nightly test suite. Added: test-suite/trunk/SingleSource/UnitTests/EH/filter-1.cpp test-suite/trunk/SingleSource/UnitTests/EH/filter-1.reference_output Added: test-suite/trunk/SingleSource/UnitTests/EH/filter-1.cpp URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/EH/filter-1.cpp?rev=140286&view=auto ============================================================================== --- test-suite/trunk/SingleSource/UnitTests/EH/filter-1.cpp (added) +++ test-suite/trunk/SingleSource/UnitTests/EH/filter-1.cpp Wed Sep 21 20:34:15 2011 @@ -0,0 +1,25 @@ +#include +#include + +void bar() throw (int) { + std::cout << "Throwing in bar(): \"hello world\"\n"; + throw "hello world"; +} + +void foo() { + try { + bar(); + } catch (int i) { + std::cout << "Caught in foo(): " << i << "\n"; + } +} + +void unexpected() { + std::cout << "Throwing in unexpected(): 42\n"; + throw 42; +} + +int main() { + std::set_unexpected(unexpected); + foo(); +} Added: test-suite/trunk/SingleSource/UnitTests/EH/filter-1.reference_output URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/EH/filter-1.reference_output?rev=140286&view=auto ============================================================================== --- test-suite/trunk/SingleSource/UnitTests/EH/filter-1.reference_output (added) +++ test-suite/trunk/SingleSource/UnitTests/EH/filter-1.reference_output Wed Sep 21 20:34:15 2011 @@ -0,0 +1,4 @@ +Throwing in bar(): "hello world" +Throwing in unexpected(): 42 +Caught in foo(): 42 +exit 0 From ahatanak at gmail.com Wed Sep 21 21:41:29 2011 From: ahatanak at gmail.com (Akira Hatanaka) Date: Thu, 22 Sep 2011 02:41:29 -0000 Subject: [llvm-commits] [llvm] r140291 - /llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Message-ID: <20110922024130.023C82A6C12C@llvm.org> Author: ahatanak Date: Wed Sep 21 21:41:29 2011 New Revision: 140291 URL: http://llvm.org/viewvc/llvm-project?rev=140291&view=rev Log: Remove unnecessary condition check. Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=140291&r1=140290&r2=140291&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Wed Sep 21 21:41:29 2011 @@ -96,7 +96,6 @@ // When dealing with single precision only, use libcalls if (!Subtarget->isSingleFloat()) - if (!Subtarget->isFP64bit()) addRegisterClass(MVT::f64, Mips::AFGR64RegisterClass); // Load extented operations for i1 types must be promoted From ahatanak at gmail.com Wed Sep 21 21:53:37 2011 From: ahatanak at gmail.com (Akira Hatanaka) Date: Thu, 22 Sep 2011 02:53:37 -0000 Subject: [llvm-commits] [llvm] r140292 - /llvm/trunk/lib/Target/Mips/MipsFrameLowering.h Message-ID: <20110922025337.9B2922A6C12C@llvm.org> Author: ahatanak Date: Wed Sep 21 21:53:37 2011 New Revision: 140292 URL: http://llvm.org/viewvc/llvm-project?rev=140292&view=rev Log: Mips64 aligns stack on 16-byte boundary. Modified: llvm/trunk/lib/Target/Mips/MipsFrameLowering.h Modified: llvm/trunk/lib/Target/Mips/MipsFrameLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsFrameLowering.h?rev=140292&r1=140291&r2=140292&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsFrameLowering.h (original) +++ llvm/trunk/lib/Target/Mips/MipsFrameLowering.h Wed Sep 21 21:53:37 2011 @@ -27,7 +27,8 @@ public: explicit MipsFrameLowering(const MipsSubtarget &sti) - : TargetFrameLowering(StackGrowsDown, 8, 0), STI(sti) { + : TargetFrameLowering(StackGrowsDown, sti.hasMips64() ? 16 : 8, 0), + STI(sti) { } bool targetHandlesStackFrameRounding() const; From benny.kra at googlemail.com Wed Sep 21 22:01:42 2011 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Thu, 22 Sep 2011 03:01:42 -0000 Subject: [llvm-commits] [llvm] r140294 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Message-ID: <20110922030142.916D42A6C12C@llvm.org> Author: d0k Date: Wed Sep 21 22:01:42 2011 New Revision: 140294 URL: http://llvm.org/viewvc/llvm-project?rev=140294&view=rev Log: X86: Don't form min/max nodes if the target is missing SSE. Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=140294&r1=140293&r2=140294&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Sep 21 22:01:42 2011 @@ -12568,7 +12568,8 @@ // instructions match the semantics of the common C idiom xhasXMM() && + Cond.getOpcode() == ISD::SETCC && VT.isFloatingPoint() && VT != MVT::f80 && DAG.getTargetLoweringInfo().isTypeLegal(VT)) { ISD::CondCode CC = cast(Cond.getOperand(2))->get(); From ahatanak at gmail.com Wed Sep 21 22:09:07 2011 From: ahatanak at gmail.com (Akira Hatanaka) Date: Thu, 22 Sep 2011 03:09:07 -0000 Subject: [llvm-commits] [llvm] r140295 - in /llvm/trunk/lib/Target/Mips: MipsAsmPrinter.cpp MipsInstrInfo.h MipsMCInstLower.cpp MipsMCSymbolRefExpr.cpp MipsMCSymbolRefExpr.h Message-ID: <20110922030907.9DEFB2A6C12C@llvm.org> Author: ahatanak Date: Wed Sep 21 22:09:07 2011 New Revision: 140295 URL: http://llvm.org/viewvc/llvm-project?rev=140295&view=rev Log: Add enums and functions for symbols Mips64 uses. Modified: llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp llvm/trunk/lib/Target/Mips/MipsInstrInfo.h llvm/trunk/lib/Target/Mips/MipsMCInstLower.cpp llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.cpp llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.h Modified: llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp?rev=140295&r1=140294&r2=140295&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp Wed Sep 21 22:09:07 2011 @@ -332,6 +332,11 @@ case MipsII::MO_GOTTPREL: O << "%gottprel("; break; case MipsII::MO_TPREL_HI: O << "%tprel_hi("; break; case MipsII::MO_TPREL_LO: O << "%tprel_lo("; break; + case MipsII::MO_GPOFF_HI: O << "%hi(%neg(%gp_rel("; break; + case MipsII::MO_GPOFF_LO: O << "%lo(%neg(%gp_rel("; break; + case MipsII::MO_GOT_DISP: O << "%got_disp("; break; + case MipsII::MO_GOT_PAGE: O << "%got_page("; break; + case MipsII::MO_GOT_OFST: O << "%got_ofst("; break; } switch (MO.getType()) { Modified: llvm/trunk/lib/Target/Mips/MipsInstrInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrInfo.h?rev=140295&r1=140294&r2=140295&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsInstrInfo.h (original) +++ llvm/trunk/lib/Target/Mips/MipsInstrInfo.h Wed Sep 21 22:09:07 2011 @@ -72,7 +72,14 @@ /// MO_TPREL_HI/LO - Represents the hi and low part of the offset from // the thread pointer (Local Exec TLS). MO_TPREL_HI, - MO_TPREL_LO + MO_TPREL_LO, + + // N32/64 Flags. + MO_GPOFF_HI, + MO_GPOFF_LO, + MO_GOT_DISP, + MO_GOT_PAGE, + MO_GOT_OFST }; enum { Modified: llvm/trunk/lib/Target/Mips/MipsMCInstLower.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsMCInstLower.cpp?rev=140295&r1=140294&r2=140295&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsMCInstLower.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsMCInstLower.cpp Wed Sep 21 22:09:07 2011 @@ -46,6 +46,11 @@ case MipsII::MO_GOTTPREL: Kind = MipsMCSymbolRefExpr::VK_Mips_GOTTPREL; break; case MipsII::MO_TPREL_HI: Kind = MipsMCSymbolRefExpr::VK_Mips_TPREL_HI; break; case MipsII::MO_TPREL_LO: Kind = MipsMCSymbolRefExpr::VK_Mips_TPREL_LO; break; + case MipsII::MO_GPOFF_HI: Kind = MipsMCSymbolRefExpr::VK_Mips_GPOFF_HI; break; + case MipsII::MO_GPOFF_LO: Kind = MipsMCSymbolRefExpr::VK_Mips_GPOFF_LO; break; + case MipsII::MO_GOT_DISP: Kind = MipsMCSymbolRefExpr::VK_Mips_GOT_DISP; break; + case MipsII::MO_GOT_PAGE: Kind = MipsMCSymbolRefExpr::VK_Mips_GOT_PAGE; break; + case MipsII::MO_GOT_OFST: Kind = MipsMCSymbolRefExpr::VK_Mips_GOT_OFST; break; } switch (MOTy) { Modified: llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.cpp?rev=140295&r1=140294&r2=140295&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.cpp Wed Sep 21 22:09:07 2011 @@ -33,6 +33,11 @@ case VK_Mips_GOTTPREL: OS << "%gottprel("; break; case VK_Mips_TPREL_HI: OS << "%tprel_hi("; break; case VK_Mips_TPREL_LO: OS << "%tprel_lo("; break; + case VK_Mips_GPOFF_HI: OS << "%hi(%neg(%gp_rel("; break; + case VK_Mips_GPOFF_LO: OS << "%lo(%neg(%gp_rel("; break; + case VK_Mips_GOT_DISP: OS << "%got_disp("; break; + case VK_Mips_GOT_PAGE: OS << "%got_page("; break; + case VK_Mips_GOT_OFST: OS << "%got_ofst("; break; } OS << *Symbol; Modified: llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.h?rev=140295&r1=140294&r2=140295&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.h (original) +++ llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.h Wed Sep 21 22:09:07 2011 @@ -25,7 +25,12 @@ VK_Mips_TLSGD, VK_Mips_GOTTPREL, VK_Mips_TPREL_HI, - VK_Mips_TPREL_LO + VK_Mips_TPREL_LO, + VK_Mips_GPOFF_HI, + VK_Mips_GPOFF_LO, + VK_Mips_GOT_DISP, + VK_Mips_GOT_PAGE, + VK_Mips_GOT_OFST }; private: From benny.kra at googlemail.com Wed Sep 21 22:27:22 2011 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Thu, 22 Sep 2011 03:27:22 -0000 Subject: [llvm-commits] [llvm] r140296 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Message-ID: <20110922032722.76C1C2A6C12C@llvm.org> Author: d0k Date: Wed Sep 21 22:27:22 2011 New Revision: 140296 URL: http://llvm.org/viewvc/llvm-project?rev=140296&view=rev Log: The SSE version differences for fmin/fmax are more involved than I thought. - x87: no min or max. - SSE1: min/max for single precision scalars and vectors. - SSE2: min/max for single and double precision scalars and vectors. - AVX: as SSE2, but also supports the wider ymm vectors. (this is covered by the isTypeLegal check) Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=140296&r1=140295&r2=140296&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Sep 21 22:27:22 2011 @@ -12568,9 +12568,10 @@ // instructions match the semantics of the common C idiom xhasXMM() && - Cond.getOpcode() == ISD::SETCC && VT.isFloatingPoint() && - VT != MVT::f80 && DAG.getTargetLoweringInfo().isTypeLegal(VT)) { + if (Cond.getOpcode() == ISD::SETCC && VT.isFloatingPoint() && + VT != MVT::f80 && DAG.getTargetLoweringInfo().isTypeLegal(VT) && + (Subtarget->hasXMMInt() || + (Subtarget->hasSSE1() && VT.getScalarType() == MVT::f32))) { ISD::CondCode CC = cast(Cond.getOperand(2))->get(); unsigned Opcode = 0; From bruno.cardoso at gmail.com Wed Sep 21 22:32:23 2011 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Wed, 21 Sep 2011 20:32:23 -0700 Subject: [llvm-commits] [llvm] r140296 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp In-Reply-To: <20110922032722.76C1C2A6C12C@llvm.org> References: <20110922032722.76C1C2A6C12C@llvm.org> Message-ID: Hi Benjamim, On Wed, Sep 21, 2011 at 8:27 PM, Benjamin Kramer wrote: > Author: d0k > Date: Wed Sep 21 22:27:22 2011 > New Revision: 140296 > > URL: http://llvm.org/viewvc/llvm-project?rev=140296&view=rev > Log: > The SSE version differences for fmin/fmax are more involved than I thought. > > - x87: no min or max. > - SSE1: min/max for single precision scalars and vectors. > - SSE2: min/max for single and double precision scalars and vectors. > - AVX: as SSE2, but also supports the wider ymm vectors. (this is covered by the isTypeLegal check) > > Modified: > ? ?llvm/trunk/lib/Target/X86/X86ISelLowering.cpp > > Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=140296&r1=140295&r2=140296&view=diff > ============================================================================== > --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) > +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Sep 21 22:27:22 2011 > @@ -12568,9 +12568,10 @@ > ? // instructions match the semantics of the common C idiom x ? // x<=y?x:y, because of how they handle negative zero (which can be > ? // ignored in unsafe-math mode). > - ?if (Subtarget->hasXMM() && > - ? ? ?Cond.getOpcode() == ISD::SETCC && VT.isFloatingPoint() && > - ? ? ?VT != MVT::f80 && DAG.getTargetLoweringInfo().isTypeLegal(VT)) { > + ?if (Cond.getOpcode() == ISD::SETCC && VT.isFloatingPoint() && > + ? ? ?VT != MVT::f80 && DAG.getTargetLoweringInfo().isTypeLegal(VT) && > + ? ? ?(Subtarget->hasXMMInt() || > + ? ? ? (Subtarget->hasSSE1() && VT.getScalarType() == MVT::f32))) { > ? ? ISD::CondCode CC = cast(Cond.getOperand(2))->get(); > > ? ? unsigned Opcode = 0; The isTypeLegal already covers not selecting min/maxpd when sse2 isnt available -- Bruno Cardoso Lopes http://www.brunocardoso.cc From benny.kra at googlemail.com Wed Sep 21 22:40:45 2011 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Wed, 21 Sep 2011 20:40:45 -0700 Subject: [llvm-commits] [llvm] r140296 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp In-Reply-To: References: <20110922032722.76C1C2A6C12C@llvm.org> Message-ID: On 21.09.2011, at 20:32, Bruno Cardoso Lopes wrote: > Hi Benjamim, > > On Wed, Sep 21, 2011 at 8:27 PM, Benjamin Kramer > wrote: >> Author: d0k >> Date: Wed Sep 21 22:27:22 2011 >> New Revision: 140296 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=140296&view=rev >> Log: >> The SSE version differences for fmin/fmax are more involved than I thought. >> >> - x87: no min or max. >> - SSE1: min/max for single precision scalars and vectors. >> - SSE2: min/max for single and double precision scalars and vectors. >> - AVX: as SSE2, but also supports the wider ymm vectors. (this is covered by the isTypeLegal check) >> >> Modified: >> llvm/trunk/lib/Target/X86/X86ISelLowering.cpp >> >> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=140296&r1=140295&r2=140296&view=diff >> ============================================================================== >> --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) >> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Sep 21 22:27:22 2011 >> @@ -12568,9 +12568,10 @@ >> // instructions match the semantics of the common C idiom x> // x<=y?x:y, because of how they handle negative zero (which can be >> // ignored in unsafe-math mode). >> - if (Subtarget->hasXMM() && >> - Cond.getOpcode() == ISD::SETCC && VT.isFloatingPoint() && >> - VT != MVT::f80 && DAG.getTargetLoweringInfo().isTypeLegal(VT)) { >> + if (Cond.getOpcode() == ISD::SETCC && VT.isFloatingPoint() && >> + VT != MVT::f80 && DAG.getTargetLoweringInfo().isTypeLegal(VT) && >> + (Subtarget->hasXMMInt() || >> + (Subtarget->hasSSE1() && VT.getScalarType() == MVT::f32))) { >> ISD::CondCode CC = cast(Cond.getOperand(2))->get(); >> >> unsigned Opcode = 0; > > The isTypeLegal already covers not selecting min/maxpd when sse2 isnt available But it will still select minsd/maxsd and crash :( The getScalarType() call is indeed superflous, but the checking is required. - Ben From ahatanak at gmail.com Wed Sep 21 22:48:47 2011 From: ahatanak at gmail.com (Akira Hatanaka) Date: Thu, 22 Sep 2011 03:48:47 -0000 Subject: [llvm-commits] [llvm] r140297 - /llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td Message-ID: <20110922034847.95C422A6C12C@llvm.org> Author: ahatanak Date: Wed Sep 21 22:48:47 2011 New Revision: 140297 URL: http://llvm.org/viewvc/llvm-project?rev=140297&view=rev Log: Add definition of 64-bit floating registers used for Mips64. Modified: llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td Modified: llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td?rev=140297&r1=140296&r2=140297&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td (original) +++ llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td Wed Sep 21 22:48:47 2011 @@ -44,6 +44,12 @@ let SubRegIndices = [sub_fpeven, sub_fpodd]; } +class AFPR64 num, string n, list subregs> + : MipsRegWithSubRegs { + let Num = num; + let SubRegIndices = [sub_fpeven]; +} + // Mips Hardware Registers class HWR num, string n> : MipsReg { let Num = num; @@ -142,6 +148,40 @@ def D14 : AFPR<28, "F28", [F28, F29]>; def D15 : AFPR<30, "F30", [F30, F31]>; + /// Mips Double point precision FPU Registers in MFP64 mode. + def D0_64 : AFPR64<0, "F0", [F0]>; + def D1_64 : AFPR64<1, "F1", [F1]>; + def D2_64 : AFPR64<2, "F2", [F2]>; + def D3_64 : AFPR64<3, "F3", [F3]>; + def D4_64 : AFPR64<4, "F4", [F4]>; + def D5_64 : AFPR64<5, "F5", [F5]>; + def D6_64 : AFPR64<6, "F6", [F6]>; + def D7_64 : AFPR64<7, "F7", [F7]>; + def D8_64 : AFPR64<8, "F8", [F8]>; + def D9_64 : AFPR64<9, "F9", [F9]>; + def D10_64 : AFPR64<10, "F10", [F10]>; + def D11_64 : AFPR64<11, "F11", [F11]>; + def D12_64 : AFPR64<12, "F12", [F12]>; + def D13_64 : AFPR64<13, "F13", [F13]>; + def D14_64 : AFPR64<14, "F14", [F14]>; + def D15_64 : AFPR64<15, "F15", [F15]>; + def D16_64 : AFPR64<16, "F16", [F16]>; + def D17_64 : AFPR64<17, "F17", [F17]>; + def D18_64 : AFPR64<18, "F18", [F18]>; + def D19_64 : AFPR64<19, "F19", [F19]>; + def D20_64 : AFPR64<20, "F20", [F20]>; + def D21_64 : AFPR64<21, "F21", [F21]>; + def D22_64 : AFPR64<22, "F22", [F22]>; + def D23_64 : AFPR64<23, "F23", [F23]>; + def D24_64 : AFPR64<24, "F24", [F24]>; + def D25_64 : AFPR64<25, "F25", [F25]>; + def D26_64 : AFPR64<26, "F26", [F26]>; + def D27_64 : AFPR64<27, "F27", [F27]>; + def D28_64 : AFPR64<28, "F28", [F28]>; + def D29_64 : AFPR64<29, "F29", [F29]>; + def D30_64 : AFPR64<30, "F30", [F30]>; + def D31_64 : AFPR64<31, "F31", [F31]>; + // Hi/Lo registers def HI : Register<"hi">, DwarfRegNum<[64]>; def LO : Register<"lo">, DwarfRegNum<[65]>; From proljc at gmail.com Thu Sep 22 00:51:02 2011 From: proljc at gmail.com (Liu) Date: Thu, 22 Sep 2011 13:51:02 +0800 Subject: [llvm-commits] [patch] fix PPCRegisterInfo.cpp comment typo In-Reply-To: References: Message-ID: On Thu, Sep 22, 2011 at 9:09 AM, Bill Wendling wrote: > On Sep 21, 2011, at 5:32 PM, Liu wrote: > >> On Wed, Sep 21, 2011 at 12:59 AM, Liu wrote: >>> Hi all >>> >>> I find a typo in PPCRegisterInfo.cpp comment and fixed it. >>> >>> --Liu >>> >> >> ping >> >> --- a/lib/Target/PowerPC/PPCRegisterInfo.cpp >> +++ b/lib/Target/PowerPC/PPCRegisterInfo.cpp >> @@ -322,7 +322,7 @@ unsigned >> findScratchRegister(MachineBasicBlock::iterator II, RegScavenger *RS, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?const TargetRegisterClass *RC, int SPAdj) { >> ? assert(RS && "Register scavenging must be on"); >> ? unsigned Reg = RS->FindUnusedReg(RC); >> - ?// FIXME: move ARM callee-saved reg scan to target independent code, then >> + ?// FIXME: move PPC callee-saved reg scan to target independent code, then >> ? // search for already spilled CS register here. >> ? if (Reg == 0) >> ? ? Reg = RS->scavengeRegister(RC, II, SPAdj); >> -- >> >> Isn't it a typo? > > I don't believe so. It's saying that the reg scan in ARM should be target independent. Once that's accomplished, we can use that functionality here. > > -bw > > > Thanks, I get. From clattner at apple.com Thu Sep 22 01:15:28 2011 From: clattner at apple.com (Chris Lattner) Date: Wed, 21 Sep 2011 23:15:28 -0700 Subject: [llvm-commits] [llvm] r140121 - in /llvm/trunk: docs/ docs/CommandGuide/ include/llvm/CompilerDriver/ lib/ lib/CompilerDriver/ utils/TableGen/ In-Reply-To: References: <20110920003427.E071C2A6C12C@llvm.org> Message-ID: <00BE85C0-E8E5-4360-A617-92A31260A558@apple.com> On Sep 20, 2011, at 9:50 AM, Eric Christopher wrote: > > On Sep 20, 2011, at 12:40 AM, arrowdodger wrote: > >> I've thought, the purpose of CompilerDriver library was to assist language writers to create theirs driver executables. And LLVMC is example of it's usage. It's not i was using it, but i'm sad of it's removal. > > Right. No one else was either. It's still in the version control system, but it wasn't really supported or flexible enough to support long term. In the future I hope that the clang driver can use a similar tablegen driven scheme though. I agree: if someone finds it useful, they can dig it out of SVN. -Chris From craig.topper at gmail.com Thu Sep 22 02:01:50 2011 From: craig.topper at gmail.com (Craig Topper) Date: Thu, 22 Sep 2011 07:01:50 -0000 Subject: [llvm-commits] [llvm] r140299 - in /llvm/trunk: lib/Target/X86/X86InstrSystem.td test/MC/Disassembler/X86/intel-syntax.txt Message-ID: <20110922070150.3743F2A6C12C@llvm.org> Author: ctopper Date: Thu Sep 22 02:01:50 2011 New Revision: 140299 URL: http://llvm.org/viewvc/llvm-project?rev=140299&view=rev Log: Fix register printing in disassembling of push/pop of segment registers and in/out in Intel syntax mode. Fixes PR10960 Modified: llvm/trunk/lib/Target/X86/X86InstrSystem.td llvm/trunk/test/MC/Disassembler/X86/intel-syntax.txt Modified: llvm/trunk/lib/Target/X86/X86InstrSystem.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSystem.td?rev=140299&r1=140298&r2=140299&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrSystem.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrSystem.td Thu Sep 22 02:01:50 2011 @@ -67,43 +67,43 @@ // let Defs = [AL], Uses = [DX] in def IN8rr : I<0xEC, RawFrm, (outs), (ins), - "in{b}\t{%dx, %al|%AL, %DX}", []>; + "in{b}\t{%dx, %al|AL, DX}", []>; let Defs = [AX], Uses = [DX] in def IN16rr : I<0xED, RawFrm, (outs), (ins), - "in{w}\t{%dx, %ax|%AX, %DX}", []>, OpSize; + "in{w}\t{%dx, %ax|AX, DX}", []>, OpSize; let Defs = [EAX], Uses = [DX] in def IN32rr : I<0xED, RawFrm, (outs), (ins), - "in{l}\t{%dx, %eax|%EAX, %DX}", []>; + "in{l}\t{%dx, %eax|EAX, DX}", []>; let Defs = [AL] in def IN8ri : Ii8<0xE4, RawFrm, (outs), (ins i8imm:$port), - "in{b}\t{$port, %al|%AL, $port}", []>; + "in{b}\t{$port, %al|AL, $port}", []>; let Defs = [AX] in def IN16ri : Ii8<0xE5, RawFrm, (outs), (ins i8imm:$port), - "in{w}\t{$port, %ax|%AX, $port}", []>, OpSize; + "in{w}\t{$port, %ax|AX, $port}", []>, OpSize; let Defs = [EAX] in def IN32ri : Ii8<0xE5, RawFrm, (outs), (ins i8imm:$port), - "in{l}\t{$port, %eax|%EAX, $port}", []>; + "in{l}\t{$port, %eax|EAX, $port}", []>; let Uses = [DX, AL] in def OUT8rr : I<0xEE, RawFrm, (outs), (ins), - "out{b}\t{%al, %dx|%DX, %AL}", []>; + "out{b}\t{%al, %dx|DX, AL}", []>; let Uses = [DX, AX] in def OUT16rr : I<0xEF, RawFrm, (outs), (ins), - "out{w}\t{%ax, %dx|%DX, %AX}", []>, OpSize; + "out{w}\t{%ax, %dx|DX, AX}", []>, OpSize; let Uses = [DX, EAX] in def OUT32rr : I<0xEF, RawFrm, (outs), (ins), - "out{l}\t{%eax, %dx|%DX, %EAX}", []>; + "out{l}\t{%eax, %dx|DX, EAX}", []>; let Uses = [AL] in def OUT8ir : Ii8<0xE6, RawFrm, (outs), (ins i8imm:$port), - "out{b}\t{%al, $port|$port, %AL}", []>; + "out{b}\t{%al, $port|$port, AL}", []>; let Uses = [AX] in def OUT16ir : Ii8<0xE7, RawFrm, (outs), (ins i8imm:$port), - "out{w}\t{%ax, $port|$port, %AX}", []>, OpSize; + "out{w}\t{%ax, $port|$port, AX}", []>, OpSize; let Uses = [EAX] in def OUT32ir : Ii8<0xE7, RawFrm, (outs), (ins i8imm:$port), - "out{l}\t{%eax, $port|$port, %EAX}", []>; + "out{l}\t{%eax, $port|$port, EAX}", []>; def IN8 : I<0x6C, RawFrm, (outs), (ins), "ins{b}", []>; def IN16 : I<0x6D, RawFrm, (outs), (ins), "ins{w}", []>, OpSize; @@ -229,65 +229,65 @@ "ltr{w}\t{$src}", []>, TB; def PUSHCS16 : I<0x0E, RawFrm, (outs), (ins), - "push{w}\t%cs", []>, Requires<[In32BitMode]>, OpSize; + "push{w}\t{%cs|CS}", []>, Requires<[In32BitMode]>, OpSize; def PUSHCS32 : I<0x0E, RawFrm, (outs), (ins), - "push{l}\t%cs", []>, Requires<[In32BitMode]>; + "push{l}\t{%cs|CS}", []>, Requires<[In32BitMode]>; def PUSHSS16 : I<0x16, RawFrm, (outs), (ins), - "push{w}\t%ss", []>, Requires<[In32BitMode]>, OpSize; + "push{w}\t{%ss|SS}", []>, Requires<[In32BitMode]>, OpSize; def PUSHSS32 : I<0x16, RawFrm, (outs), (ins), - "push{l}\t%ss", []>, Requires<[In32BitMode]>; + "push{l}\t{%ss|SS}", []>, Requires<[In32BitMode]>; def PUSHDS16 : I<0x1E, RawFrm, (outs), (ins), - "push{w}\t%ds", []>, Requires<[In32BitMode]>, OpSize; + "push{w}\t{%ds|DS}", []>, Requires<[In32BitMode]>, OpSize; def PUSHDS32 : I<0x1E, RawFrm, (outs), (ins), - "push{l}\t%ds", []>, Requires<[In32BitMode]>; + "push{l}\t{%ds|DS}", []>, Requires<[In32BitMode]>; def PUSHES16 : I<0x06, RawFrm, (outs), (ins), - "push{w}\t%es", []>, Requires<[In32BitMode]>, OpSize; + "push{w}\t{%es|ES}", []>, Requires<[In32BitMode]>, OpSize; def PUSHES32 : I<0x06, RawFrm, (outs), (ins), - "push{l}\t%es", []>, Requires<[In32BitMode]>; + "push{l}\t{%es|ES}", []>, Requires<[In32BitMode]>; def PUSHFS16 : I<0xa0, RawFrm, (outs), (ins), - "push{w}\t%fs", []>, OpSize, TB; + "push{w}\t{%fs|FS}", []>, OpSize, TB; def PUSHFS32 : I<0xa0, RawFrm, (outs), (ins), - "push{l}\t%fs", []>, TB, Requires<[In32BitMode]>; + "push{l}\t{%fs|FS}", []>, TB, Requires<[In32BitMode]>; def PUSHGS16 : I<0xa8, RawFrm, (outs), (ins), - "push{w}\t%gs", []>, OpSize, TB; + "push{w}\t{%gs|GS}", []>, OpSize, TB; def PUSHGS32 : I<0xa8, RawFrm, (outs), (ins), - "push{l}\t%gs", []>, TB, Requires<[In32BitMode]>; + "push{l}\t{%gs|GS}", []>, TB, Requires<[In32BitMode]>; def PUSHFS64 : I<0xa0, RawFrm, (outs), (ins), - "push{q}\t%fs", []>, TB; + "push{q}\t{%fs|FS}", []>, TB; def PUSHGS64 : I<0xa8, RawFrm, (outs), (ins), - "push{q}\t%gs", []>, TB; + "push{q}\t{%gs|GS}", []>, TB; // No "pop cs" instruction. def POPSS16 : I<0x17, RawFrm, (outs), (ins), - "pop{w}\t%ss", []>, OpSize, Requires<[In32BitMode]>; + "pop{w}\t{%ss|SS}", []>, OpSize, Requires<[In32BitMode]>; def POPSS32 : I<0x17, RawFrm, (outs), (ins), - "pop{l}\t%ss", []> , Requires<[In32BitMode]>; + "pop{l}\t{%ss|SS}", []> , Requires<[In32BitMode]>; def POPDS16 : I<0x1F, RawFrm, (outs), (ins), - "pop{w}\t%ds", []>, OpSize, Requires<[In32BitMode]>; + "pop{w}\t{%ds|DS}", []>, OpSize, Requires<[In32BitMode]>; def POPDS32 : I<0x1F, RawFrm, (outs), (ins), - "pop{l}\t%ds", []> , Requires<[In32BitMode]>; + "pop{l}\t{%ds|DS}", []> , Requires<[In32BitMode]>; def POPES16 : I<0x07, RawFrm, (outs), (ins), - "pop{w}\t%es", []>, OpSize, Requires<[In32BitMode]>; + "pop{w}\t{%es|ES}", []>, OpSize, Requires<[In32BitMode]>; def POPES32 : I<0x07, RawFrm, (outs), (ins), - "pop{l}\t%es", []> , Requires<[In32BitMode]>; + "pop{l}\t{%es|ES}", []> , Requires<[In32BitMode]>; def POPFS16 : I<0xa1, RawFrm, (outs), (ins), - "pop{w}\t%fs", []>, OpSize, TB; + "pop{w}\t{%fs|FS}", []>, OpSize, TB; def POPFS32 : I<0xa1, RawFrm, (outs), (ins), - "pop{l}\t%fs", []>, TB , Requires<[In32BitMode]>; + "pop{l}\t{%fs|FS}", []>, TB , Requires<[In32BitMode]>; def POPFS64 : I<0xa1, RawFrm, (outs), (ins), - "pop{q}\t%fs", []>, TB; + "pop{q}\t{%fs|FS}", []>, TB; def POPGS16 : I<0xa9, RawFrm, (outs), (ins), - "pop{w}\t%gs", []>, OpSize, TB; + "pop{w}\t{%gs|GS}", []>, OpSize, TB; def POPGS32 : I<0xa9, RawFrm, (outs), (ins), - "pop{l}\t%gs", []>, TB , Requires<[In32BitMode]>; + "pop{l}\t{%gs|GS}", []>, TB , Requires<[In32BitMode]>; def POPGS64 : I<0xa9, RawFrm, (outs), (ins), - "pop{q}\t%gs", []>, TB; + "pop{q}\t{%gs|GS}", []>, TB; def LDS16rm : I<0xc5, MRMSrcMem, (outs GR16:$dst), (ins opaque32mem:$src), Modified: llvm/trunk/test/MC/Disassembler/X86/intel-syntax.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/X86/intel-syntax.txt?rev=140299&r1=140298&r2=140299&view=diff ============================================================================== --- llvm/trunk/test/MC/Disassembler/X86/intel-syntax.txt (original) +++ llvm/trunk/test/MC/Disassembler/X86/intel-syntax.txt Thu Sep 22 02:01:50 2011 @@ -11,3 +11,15 @@ # CHECK: movsq 0x48 0xa5 + +# CHECK: pop DS +0x1f + +# CHECK: pop ES +0x07 + +# CHECK: pop SS +0x17 + +# CHECK: in AL, DX +0xec From proljc at gmail.com Thu Sep 22 02:23:11 2011 From: proljc at gmail.com (Liu) Date: Thu, 22 Sep 2011 15:23:11 +0800 Subject: [llvm-commits] [patch] add n32/64 ABI description. Message-ID: Hi I added n32/64 ABI description for MIPS Backend. --Liu -------------- next part -------------- A non-text attachment was scrubbed... Name: 0001-add-n32-64-ABI-description.patch Type: text/x-patch Size: 3369 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110922/09058441/attachment.bin From grosbach at apple.com Thu Sep 22 02:26:50 2011 From: grosbach at apple.com (Jim Grosbach) Date: Thu, 22 Sep 2011 00:26:50 -0700 Subject: [llvm-commits] [patch] fix PPCRegisterInfo.cpp comment typo In-Reply-To: References: Message-ID: <79BF3DAD-D15C-48B4-83DD-2A8A6343EA21@apple.com> On Sep 21, 2011, at 10:51 PM, Liu wrote: > On Thu, Sep 22, 2011 at 9:09 AM, Bill Wendling wrote: >> On Sep 21, 2011, at 5:32 PM, Liu wrote: >> >>> On Wed, Sep 21, 2011 at 12:59 AM, Liu wrote: >>>> Hi all >>>> >>>> I find a typo in PPCRegisterInfo.cpp comment and fixed it. >>>> >>>> --Liu >>>> >>> >>> ping >>> >>> --- a/lib/Target/PowerPC/PPCRegisterInfo.cpp >>> +++ b/lib/Target/PowerPC/PPCRegisterInfo.cpp >>> @@ -322,7 +322,7 @@ unsigned >>> findScratchRegister(MachineBasicBlock::iterator II, RegScavenger *RS, >>> const TargetRegisterClass *RC, int SPAdj) { >>> assert(RS && "Register scavenging must be on"); >>> unsigned Reg = RS->FindUnusedReg(RC); >>> - // FIXME: move ARM callee-saved reg scan to target independent code, then >>> + // FIXME: move PPC callee-saved reg scan to target independent code, then >>> // search for already spilled CS register here. >>> if (Reg == 0) >>> Reg = RS->scavengeRegister(RC, II, SPAdj); >>> -- >>> >>> Isn't it a typo? >> >> I don't believe so. It's saying that the reg scan in ARM should be target independent. Once that's accomplished, we can use that functionality here. >> >> -bw >> >> >> > > Thanks, I get. > Please revert. As bill points out, your change is not correct. > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From proljc at gmail.com Thu Sep 22 02:30:35 2011 From: proljc at gmail.com (Liu) Date: Thu, 22 Sep 2011 15:30:35 +0800 Subject: [llvm-commits] [patch] fix PPCRegisterInfo.cpp comment typo In-Reply-To: <79BF3DAD-D15C-48B4-83DD-2A8A6343EA21@apple.com> References: <79BF3DAD-D15C-48B4-83DD-2A8A6343EA21@apple.com> Message-ID: On Thu, Sep 22, 2011 at 3:26 PM, Jim Grosbach wrote: > > > On Sep 21, 2011, at 10:51 PM, Liu wrote: > >> On Thu, Sep 22, 2011 at 9:09 AM, Bill Wendling wrote: >>> On Sep 21, 2011, at 5:32 PM, Liu wrote: >>> >>>> On Wed, Sep 21, 2011 at 12:59 AM, Liu wrote: >>>>> Hi all >>>>> >>>>> I find a typo in PPCRegisterInfo.cpp comment and fixed it. >>>>> >>>>> --Liu >>>>> >>>> >>>> ping >>>> >>>> --- a/lib/Target/PowerPC/PPCRegisterInfo.cpp >>>> +++ b/lib/Target/PowerPC/PPCRegisterInfo.cpp >>>> @@ -322,7 +322,7 @@ unsigned >>>> findScratchRegister(MachineBasicBlock::iterator II, RegScavenger *RS, >>>> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?const TargetRegisterClass *RC, int SPAdj) { >>>> ? assert(RS && "Register scavenging must be on"); >>>> ? unsigned Reg = RS->FindUnusedReg(RC); >>>> - ?// FIXME: move ARM callee-saved reg scan to target independent code, then >>>> + ?// FIXME: move PPC callee-saved reg scan to target independent code, then >>>> ? // search for already spilled CS register here. >>>> ? if (Reg == 0) >>>> ? ? Reg = RS->scavengeRegister(RC, II, SPAdj); >>>> -- >>>> >>>> Isn't it a typo? >>> >>> I don't believe so. It's saying that the reg scan in ARM should be target independent. Once that's accomplished, we can use that functionality here. >>> >>> -bw >>> >>> >>> >> >> Thanks, I get. >> > > Please revert. As bill points out, your change is not correct. > > >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > Hi Jim It just a patch, nobody apply it. I get I was wrong:) From grosbach at apple.com Thu Sep 22 02:31:13 2011 From: grosbach at apple.com (Jim Grosbach) Date: Thu, 22 Sep 2011 00:31:13 -0700 Subject: [llvm-commits] [patch] fix PPCRegisterInfo.cpp comment typo In-Reply-To: <79BF3DAD-D15C-48B4-83DD-2A8A6343EA21@apple.com> References: <79BF3DAD-D15C-48B4-83DD-2A8A6343EA21@apple.com> Message-ID: Ignore me. I see now this was a proposed patch, not an actual commit. What I get for reading mail late at night? Mea culpa. -j On Sep 22, 2011, at 12:26 AM, Jim Grosbach wrote: > > > On Sep 21, 2011, at 10:51 PM, Liu wrote: > >> On Thu, Sep 22, 2011 at 9:09 AM, Bill Wendling wrote: >>> On Sep 21, 2011, at 5:32 PM, Liu wrote: >>> >>>> On Wed, Sep 21, 2011 at 12:59 AM, Liu wrote: >>>>> Hi all >>>>> >>>>> I find a typo in PPCRegisterInfo.cpp comment and fixed it. >>>>> >>>>> --Liu >>>>> >>>> >>>> ping >>>> >>>> --- a/lib/Target/PowerPC/PPCRegisterInfo.cpp >>>> +++ b/lib/Target/PowerPC/PPCRegisterInfo.cpp >>>> @@ -322,7 +322,7 @@ unsigned >>>> findScratchRegister(MachineBasicBlock::iterator II, RegScavenger *RS, >>>> const TargetRegisterClass *RC, int SPAdj) { >>>> assert(RS && "Register scavenging must be on"); >>>> unsigned Reg = RS->FindUnusedReg(RC); >>>> - // FIXME: move ARM callee-saved reg scan to target independent code, then >>>> + // FIXME: move PPC callee-saved reg scan to target independent code, then >>>> // search for already spilled CS register here. >>>> if (Reg == 0) >>>> Reg = RS->scavengeRegister(RC, II, SPAdj); >>>> -- >>>> >>>> Isn't it a typo? >>> >>> I don't believe so. It's saying that the reg scan in ARM should be target independent. Once that's accomplished, we can use that functionality here. >>> >>> -bw >>> >>> >>> >> >> Thanks, I get. >> > > Please revert. As bill points out, your change is not correct. > > >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From baldrick at free.fr Thu Sep 22 03:02:57 2011 From: baldrick at free.fr (Duncan Sands) Date: Thu, 22 Sep 2011 10:02:57 +0200 Subject: [llvm-commits] [llvm] r140277 - /llvm/trunk/lib/CodeGen/ShadowStackGC.cpp In-Reply-To: <20110921221428.799D02A6C12C@llvm.org> References: <20110921221428.799D02A6C12C@llvm.org> Message-ID: <4E7AEBB1.3080901@free.fr> Hi Bill, > Attempt to update the shadow stack GC pass to the new EH model. > > This inserts a cleanup landingpad instruction and a resume to mimic the old > unwind instruction. > --- llvm/trunk/lib/CodeGen/ShadowStackGC.cpp (original) > +++ llvm/trunk/lib/CodeGen/ShadowStackGC.cpp Wed Sep 21 17:14:28 2011 > @@ -141,9 +141,21 @@ > return 0; > > // Create a cleanup block. > - BasicBlock *CleanupBB = BasicBlock::Create(F.getContext(), > - CleanupBBName,&F); > - UnwindInst *UI = new UnwindInst(F.getContext(), CleanupBB); > + LLVMContext&C = F.getContext(); > + BasicBlock *CleanupBB = BasicBlock::Create(C, CleanupBBName,&F); > + Type *ExnTy = StructType::get(Type::getInt8PtrTy(C), > + Type::getInt32Ty(C), NULL); > + // FIXME: Assuming the C++ personality function probably isn't the best > + // thing in the world. > + Constant *PersFn = > + F.getParent()-> > + getOrInsertFunction("__gxx_personality_v0", you should use the C personality function. It can handle cleanups and is provided by libgcc. It's called __gcc_personality_v0. Ciao, Duncan. From baldrick at free.fr Thu Sep 22 03:19:07 2011 From: baldrick at free.fr (Duncan Sands) Date: Thu, 22 Sep 2011 10:19:07 +0200 Subject: [llvm-commits] [llvm] r140296 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp In-Reply-To: <20110922032722.76C1C2A6C12C@llvm.org> References: <20110922032722.76C1C2A6C12C@llvm.org> Message-ID: <4E7AEF7B.7000905@free.fr> > The SSE version differences for fmin/fmax are more involved than I thought. While on the subject of fmin/fmax, I noticed that "isCommutable" is set to zero for max/min. Yet the result of max/min presumably doesn't depend on the order of its arguments, so is this a mistake? Ciao, Duncan. let isCommutable = 0 in { defm VSUB : basic_sse12_fp_binop_s<0x5C, "sub", fsub, 0>, basic_sse12_fp_binop_s_int<0x5C, "sub", 0>, basic_sse12_fp_binop_p<0x5C, "sub", fsub, 0>, basic_sse12_fp_binop_p_y<0x5C, "sub", fsub>, VEX_4V; defm VDIV : basic_sse12_fp_binop_s<0x5E, "div", fdiv, 0>, basic_sse12_fp_binop_s_int<0x5E, "div", 0>, basic_sse12_fp_binop_p<0x5E, "div", fdiv, 0>, basic_sse12_fp_binop_p_y<0x5E, "div", fdiv>, VEX_4V; defm VMAX : basic_sse12_fp_binop_s<0x5F, "max", X86fmax, 0>, basic_sse12_fp_binop_s_int<0x5F, "max", 0>, basic_sse12_fp_binop_p<0x5F, "max", X86fmax, 0>, basic_sse12_fp_binop_p_int<0x5F, "max", 0>, basic_sse12_fp_binop_p_y<0x5F, "max", X86fmax>, basic_sse12_fp_binop_p_y_int<0x5F, "max">, VEX_4V; defm VMIN : basic_sse12_fp_binop_s<0x5D, "min", X86fmin, 0>, basic_sse12_fp_binop_s_int<0x5D, "min", 0>, basic_sse12_fp_binop_p<0x5D, "min", X86fmin, 0>, basic_sse12_fp_binop_p_int<0x5D, "min", 0>, basic_sse12_fp_binop_p_y_int<0x5D, "min">, basic_sse12_fp_binop_p_y<0x5D, "min", X86fmin>, VEX_4V; } and let isCommutable = 0 in { defm SUB : basic_sse12_fp_binop_s<0x5C, "sub", fsub>, basic_sse12_fp_binop_p<0x5C, "sub", fsub>, basic_sse12_fp_binop_s_int<0x5C, "sub">; defm DIV : basic_sse12_fp_binop_s<0x5E, "div", fdiv>, basic_sse12_fp_binop_p<0x5E, "div", fdiv>, basic_sse12_fp_binop_s_int<0x5E, "div">; defm MAX : basic_sse12_fp_binop_s<0x5F, "max", X86fmax>, basic_sse12_fp_binop_p<0x5F, "max", X86fmax>, basic_sse12_fp_binop_s_int<0x5F, "max">, basic_sse12_fp_binop_p_int<0x5F, "max">; defm MIN : basic_sse12_fp_binop_s<0x5D, "min", X86fmin>, basic_sse12_fp_binop_p<0x5D, "min", X86fmin>, basic_sse12_fp_binop_s_int<0x5D, "min">, basic_sse12_fp_binop_p_int<0x5D, "min">; } From proljc at gmail.com Thu Sep 22 06:51:25 2011 From: proljc at gmail.com (Liu) Date: Thu, 22 Sep 2011 19:51:25 +0800 Subject: [llvm-commits] [patch] add i64 args support to EABI Message-ID: Hi I find that MIPS64 support EABI too, so I added i64 type args to EABI. --Liu -------------- next part -------------- A non-text attachment was scrubbed... Name: 0002-add-i64-args-support-to-EABI.patch Type: text/x-patch Size: 920 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110922/e086131d/attachment.bin From gvenn.cfe.dev at gmail.com Thu Sep 22 09:07:50 2011 From: gvenn.cfe.dev at gmail.com (Garrison Venn) Date: Thu, 22 Sep 2011 14:07:50 -0000 Subject: [llvm-commits] [llvm] r140301 - /llvm/trunk/examples/ExceptionDemo/ExceptionDemo.cpp Message-ID: <20110922140750.670772A6C12C@llvm.org> Author: gvenn Date: Thu Sep 22 09:07:50 2011 New Revision: 140301 URL: http://llvm.org/viewvc/llvm-project?rev=140301&view=rev Log: This is a hack to get the demo working with the new 3.0 exception infrastructure. As this makes the demo no longer a demo, and especially not a demo on how to use the llvm exception mechanism, this hack will shortly be changed to use the new 3.0 exception infrastructure. However for the time being this demo is an example on how to use the AutoUpgrade UpgradeExceptionHandling(...) function on < 3.0 exception handling code. Modified: llvm/trunk/examples/ExceptionDemo/ExceptionDemo.cpp Modified: llvm/trunk/examples/ExceptionDemo/ExceptionDemo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/examples/ExceptionDemo/ExceptionDemo.cpp?rev=140301&r1=140300&r2=140301&view=diff ============================================================================== --- llvm/trunk/examples/ExceptionDemo/ExceptionDemo.cpp (original) +++ llvm/trunk/examples/ExceptionDemo/ExceptionDemo.cpp Thu Sep 22 09:07:50 2011 @@ -62,6 +62,9 @@ #include "llvm/Support/Dwarf.h" #include "llvm/Support/TargetSelect.h" +// FIXME: See use of UpgradeExceptionHandling(...) below +#include "llvm/AutoUpgrade.h" + // FIXME: Although all systems tested with (Linux, OS X), do not need this // header file included. A user on ubuntu reported, undefined symbols // for stderr, and fprintf, and the addition of this include fixed the @@ -1341,6 +1344,17 @@ catchBlocks[nextTypeToCatch]); } + // FIXME: This is a hack to get the demo working with the new 3.0 exception + // infrastructure. As this makes the demo no longer a demo, and + // especially not a demo on how to use the llvm exception mechanism, + // this hack will shortly be changed to use the new 3.0 exception + // infrastructure. However for the time being this demo is an + // example on how to use the AutoUpgrade UpgradeExceptionHandling(...) + // function on < 3.0 exception handling code. + // + // Must be run before verifier + UpgradeExceptionHandling(&module); + llvm::verifyFunction(*ret); fpm.run(*ret); @@ -1981,10 +1995,10 @@ // Generate test code using function throwCppException(...) as // the function which throws foreign exceptions. llvm::Function *toRun = - createUnwindExceptionTest(*module, - theBuilder, - fpm, - "throwCppException"); + createUnwindExceptionTest(*module, + theBuilder, + fpm, + "throwCppException"); fprintf(stderr, "\nBegin module dump:\n\n"); From proljc at gmail.com Thu Sep 22 10:33:28 2011 From: proljc at gmail.com (Liu) Date: Thu, 22 Sep 2011 23:33:28 +0800 Subject: [llvm-commits] [patch] add mips64 support to EABI. Message-ID: Hi I think that EABI is needed to be supported in MIPS64, so I try to make it happen. --Liu -------------- next part -------------- A non-text attachment was scrubbed... Name: 0003-add-mips64-support-to-EABI.patch Type: text/x-patch Size: 2149 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110922/b4105031/attachment.bin From eli.friedman at gmail.com Thu Sep 22 10:38:44 2011 From: eli.friedman at gmail.com (Eli Friedman) Date: Thu, 22 Sep 2011 08:38:44 -0700 Subject: [llvm-commits] [llvm] r140296 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp In-Reply-To: <4E7AEF7B.7000905@free.fr> References: <20110922032722.76C1C2A6C12C@llvm.org> <4E7AEF7B.7000905@free.fr> Message-ID: On Thu, Sep 22, 2011 at 1:19 AM, Duncan Sands wrote: >> The SSE version differences for fmin/fmax are more involved than I thought. > > While on the subject of fmin/fmax, I noticed that "isCommutable" is set to > zero for max/min. ?Yet the result of max/min presumably doesn't depend on > the order of its arguments, so is this a mistake? Strictly spearking, min/max on x86 are not commutable. It would probably be okay to commute them when -ffast-math is turned on, though. -Eli From gvenn.cfe.dev at gmail.com Thu Sep 22 10:45:15 2011 From: gvenn.cfe.dev at gmail.com (Garrison Venn) Date: Thu, 22 Sep 2011 15:45:15 -0000 Subject: [llvm-commits] [llvm] r140303 - /llvm/trunk/examples/ExceptionDemo/ExceptionDemo.cpp Message-ID: <20110922154515.124B42A6C12C@llvm.org> Author: gvenn Date: Thu Sep 22 10:45:14 2011 New Revision: 140303 URL: http://llvm.org/viewvc/llvm-project?rev=140303&view=rev Log: Converted Exception demo over to using new 3.0 landingpad instruction. This was compiled and tested on OS X 10.7.1. It was not tested on LINUX. In addition the defined OLD_EXC_SYSTEM was not tested with this version. Modified: llvm/trunk/examples/ExceptionDemo/ExceptionDemo.cpp Modified: llvm/trunk/examples/ExceptionDemo/ExceptionDemo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/examples/ExceptionDemo/ExceptionDemo.cpp?rev=140303&r1=140302&r2=140303&view=diff ============================================================================== --- llvm/trunk/examples/ExceptionDemo/ExceptionDemo.cpp (original) +++ llvm/trunk/examples/ExceptionDemo/ExceptionDemo.cpp Thu Sep 22 10:45:14 2011 @@ -62,8 +62,10 @@ #include "llvm/Support/Dwarf.h" #include "llvm/Support/TargetSelect.h" -// FIXME: See use of UpgradeExceptionHandling(...) below +#ifdef OLD_EXC_SYSTEM +// See use of UpgradeExceptionHandling(...) below #include "llvm/AutoUpgrade.h" +#endif // FIXME: Although all systems tested with (Linux, OS X), do not need this // header file included. A user on ubuntu reported, undefined symbols @@ -185,6 +187,9 @@ static std::map ourTypeInfoNamesIndex; static llvm::StructType *ourTypeInfoType; +#ifndef OLD_EXC_SYSTEM +static llvm::StructType *ourCaughtResultType; +#endif static llvm::StructType *ourExceptionType; static llvm::StructType *ourUnwindExceptionType; @@ -1219,8 +1224,7 @@ builder.SetInsertPoint(unwindResumeBlock); - llvm::Function *resumeOurException = - module.getFunction("_Unwind_Resume"); + llvm::Function *resumeOurException = module.getFunction("_Unwind_Resume"); builder.CreateCall(resumeOurException, builder.CreateLoad(exceptionStorage)); builder.CreateUnreachable(); @@ -1229,18 +1233,41 @@ builder.SetInsertPoint(exceptionBlock); - llvm::Function *ehException = module.getFunction("llvm.eh.exception"); + llvm::Function *personality = module.getFunction("ourPersonality"); +#ifndef OLD_EXC_SYSTEM + llvm::LandingPadInst *caughtResult = + builder.CreateLandingPad(ourCaughtResultType, + personality, + numExceptionsToCatch, + "landingPad"); + + caughtResult->setCleanup(true); + + for (unsigned i = 0; i < numExceptionsToCatch; ++i) { + // Set up type infos to be caught + caughtResult->addClause(module.getGlobalVariable( + ourTypeInfoNames[exceptionTypesToCatch[i]])); + } + + llvm::Value *unwindException = builder.CreateExtractValue(caughtResult, 0); + llvm::Value *retTypeInfoIndex = + builder.CreateExtractValue(caughtResult, 1); + + builder.CreateStore(unwindException, exceptionStorage); + builder.CreateStore(ourExceptionThrownState, exceptionCaughtFlag); + +#else + llvm::Function *ehException = module.getFunction("llvm.eh.exception"); + // Retrieve thrown exception llvm::Value *unwindException = builder.CreateCall(ehException); // Store exception and flag builder.CreateStore(unwindException, exceptionStorage); builder.CreateStore(ourExceptionThrownState, exceptionCaughtFlag); - llvm::Function *personality = module.getFunction("ourPersonality"); llvm::Value *functPtr = - builder.CreatePointerCast(personality, - builder.getInt8PtrTy()); + builder.CreatePointerCast(personality, builder.getInt8PtrTy()); args.clear(); args.push_back(unwindException); @@ -1265,6 +1292,7 @@ // called either because it nees to cleanup (call finally) or a type // info was found which matched the thrown exception. llvm::Value *retTypeInfoIndex = builder.CreateCall(ehSelector, args); +#endif // Retrieve exception_class member from thrown exception // (_Unwind_Exception instance). This member tells us whether or not @@ -1343,18 +1371,13 @@ llvm::Type::getInt32Ty(context), i), catchBlocks[nextTypeToCatch]); } - - // FIXME: This is a hack to get the demo working with the new 3.0 exception - // infrastructure. As this makes the demo no longer a demo, and - // especially not a demo on how to use the llvm exception mechanism, - // this hack will shortly be changed to use the new 3.0 exception - // infrastructure. However for the time being this demo is an - // example on how to use the AutoUpgrade UpgradeExceptionHandling(...) - // function on < 3.0 exception handling code. - // - // Must be run before verifier + +#ifdef OLD_EXC_SYSTEM + // Must be run before verifier UpgradeExceptionHandling(&module); +#endif + llvm::verifyFunction(*ret); fpm.run(*ret); @@ -1661,6 +1684,20 @@ // Create our type info type ourTypeInfoType = llvm::StructType::get(context, TypeArray(builder.getInt32Ty())); + +#ifndef OLD_EXC_SYSTEM + + llvm::Type *caughtResultFieldTypes[] = { + builder.getInt8PtrTy(), + builder.getInt32Ty() + }; + + // Create our landingpad result type + ourCaughtResultType = llvm::StructType::get(context, + TypeArray(caughtResultFieldTypes)); + +#endif + // Create OurException type ourExceptionType = llvm::StructType::get(context, TypeArray(ourTypeInfoType)); @@ -1677,7 +1714,7 @@ // Calculate offset of OurException::unwindException member. ourBaseFromUnwindOffset = ((uintptr_t) &dummyException) - - ((uintptr_t) &(dummyException.unwindException)); + ((uintptr_t) &(dummyException.unwindException)); #ifdef DEBUG fprintf(stderr, @@ -1995,10 +2032,10 @@ // Generate test code using function throwCppException(...) as // the function which throws foreign exceptions. llvm::Function *toRun = - createUnwindExceptionTest(*module, - theBuilder, - fpm, - "throwCppException"); + createUnwindExceptionTest(*module, + theBuilder, + fpm, + "throwCppException"); fprintf(stderr, "\nBegin module dump:\n\n"); From baldrick at free.fr Thu Sep 22 11:08:27 2011 From: baldrick at free.fr (Duncan Sands) Date: Thu, 22 Sep 2011 18:08:27 +0200 Subject: [llvm-commits] [llvm] r140296 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp In-Reply-To: References: <20110922032722.76C1C2A6C12C@llvm.org> <4E7AEF7B.7000905@free.fr> Message-ID: <4E7B5D7B.1080907@free.fr> On 09/22/11 17:38, Eli Friedman wrote: > On Thu, Sep 22, 2011 at 1:19 AM, Duncan Sands wrote: >>> The SSE version differences for fmin/fmax are more involved than I thought. >> >> While on the subject of fmin/fmax, I noticed that "isCommutable" is set to >> zero for max/min. Yet the result of max/min presumably doesn't depend on >> the order of its arguments, so is this a mistake? > > Strictly spearking, min/max on x86 are not commutable. It would > probably be okay to commute them when -ffast-math is turned on, > though. I checked the Intel docs and you are correct. As a mathematician I find this pretty amazing. I particularly enjoyed how max(+0.0, -0.0) is whatever is in the second operand rather than +0.0. Ciao, Duncan. From justin.holewinski at gmail.com Thu Sep 22 11:45:34 2011 From: justin.holewinski at gmail.com (Justin Holewinski) Date: Thu, 22 Sep 2011 16:45:34 -0000 Subject: [llvm-commits] [llvm] r140305 - in /llvm/trunk/lib/Target/PTX: CMakeLists.txt PTX.h PTXRegAlloc.cpp Message-ID: <20110922164534.262382A6C12C@llvm.org> Author: jholewinski Date: Thu Sep 22 11:45:33 2011 New Revision: 140305 URL: http://llvm.org/viewvc/llvm-project?rev=140305&view=rev Log: PTX: Add new PTX-specific register allocator that keeps virtual registers instead of allocating physical registers. This is part of a work-in-progress overhaul of the PTX register allocation scheme. Added: llvm/trunk/lib/Target/PTX/PTXRegAlloc.cpp Modified: llvm/trunk/lib/Target/PTX/CMakeLists.txt llvm/trunk/lib/Target/PTX/PTX.h Modified: llvm/trunk/lib/Target/PTX/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/CMakeLists.txt?rev=140305&r1=140304&r2=140305&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/CMakeLists.txt (original) +++ llvm/trunk/lib/Target/PTX/CMakeLists.txt Thu Sep 22 11:45:33 2011 @@ -16,6 +16,7 @@ PTXFrameLowering.cpp PTXMCAsmStreamer.cpp PTXMFInfoExtract.cpp + PTXRegAlloc.cpp PTXRegisterInfo.cpp PTXSubtarget.cpp PTXTargetMachine.cpp Modified: llvm/trunk/lib/Target/PTX/PTX.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTX.h?rev=140305&r1=140304&r2=140305&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTX.h (original) +++ llvm/trunk/lib/Target/PTX/PTX.h Thu Sep 22 11:45:33 2011 @@ -43,6 +43,8 @@ FunctionPass *createPTXMFInfoExtract(PTXTargetMachine &TM, CodeGenOpt::Level OptLevel); + FunctionPass *createPTXRegisterAllocator(); + } // namespace llvm; #endif // PTX_H Added: llvm/trunk/lib/Target/PTX/PTXRegAlloc.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXRegAlloc.cpp?rev=140305&view=auto ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXRegAlloc.cpp (added) +++ llvm/trunk/lib/Target/PTX/PTXRegAlloc.cpp Thu Sep 22 11:45:33 2011 @@ -0,0 +1,58 @@ +//===-- PTXRegAlloc.cpp - PTX Register Allocator --------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains a register allocator for PTX code. +// +//===----------------------------------------------------------------------===// + +#define DEBUG_TYPE "ptx-reg-alloc" + +#include "PTX.h" +#include "llvm/CodeGen/MachineFunctionPass.h" +#include "llvm/CodeGen/RegAllocRegistry.h" + +using namespace llvm; + +namespace { + // Special register allocator for PTX. + class PTXRegAlloc : public MachineFunctionPass { + public: + static char ID; + PTXRegAlloc() : MachineFunctionPass(ID) { + initializePHIEliminationPass(*PassRegistry::getPassRegistry()); + initializeTwoAddressInstructionPassPass(*PassRegistry::getPassRegistry()); + } + + virtual const char* getPassName() const { + return "PTX Register Allocator"; + } + + virtual void getAnalysisUsage(AnalysisUsage &AU) const { + AU.setPreservesCFG(); + AU.addRequiredID(PHIEliminationID); + AU.addRequiredID(TwoAddressInstructionPassID); + MachineFunctionPass::getAnalysisUsage(AU); + } + + virtual bool runOnMachineFunction(MachineFunction &MF) { + // We do not actually do anything (at least not yet). + return false; + } + }; + + char PTXRegAlloc::ID = 0; + + static RegisterRegAlloc + ptxRegAlloc("ptx", "PTX register allocator", createPTXRegisterAllocator); +} + +FunctionPass *llvm::createPTXRegisterAllocator() { + return new PTXRegAlloc(); +} + From justin.holewinski at gmail.com Thu Sep 22 11:45:37 2011 From: justin.holewinski at gmail.com (Justin Holewinski) Date: Thu, 22 Sep 2011 16:45:37 -0000 Subject: [llvm-commits] [llvm] r140306 - in /llvm/trunk/lib/Target/PTX: PTXTargetMachine.cpp PTXTargetMachine.h Message-ID: <20110922164537.78CC42A6C12C@llvm.org> Author: jholewinski Date: Thu Sep 22 11:45:37 2011 New Revision: 140306 URL: http://llvm.org/viewvc/llvm-project?rev=140306&view=rev Log: PTX: Customize codegen passes in backend Modified: llvm/trunk/lib/Target/PTX/PTXTargetMachine.cpp llvm/trunk/lib/Target/PTX/PTXTargetMachine.h Modified: llvm/trunk/lib/Target/PTX/PTXTargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXTargetMachine.cpp?rev=140306&r1=140305&r2=140306&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXTargetMachine.cpp (original) +++ llvm/trunk/lib/Target/PTX/PTXTargetMachine.cpp Thu Sep 22 11:45:37 2011 @@ -14,8 +14,32 @@ #include "PTX.h" #include "PTXTargetMachine.h" #include "llvm/PassManager.h" +#include "llvm/Analysis/Passes.h" +#include "llvm/Analysis/Verifier.h" +#include "llvm/Assembly/PrintModulePass.h" +#include "llvm/ADT/OwningPtr.h" +#include "llvm/CodeGen/AsmPrinter.h" +#include "llvm/CodeGen/MachineFunctionAnalysis.h" +#include "llvm/CodeGen/MachineModuleInfo.h" +#include "llvm/CodeGen/Passes.h" +#include "llvm/MC/MCAsmInfo.h" +#include "llvm/MC/MCInstrInfo.h" +#include "llvm/MC/MCStreamer.h" +#include "llvm/MC/MCSubtargetInfo.h" #include "llvm/Support/TargetRegistry.h" #include "llvm/Support/raw_ostream.h" +#include "llvm/Target/TargetData.h" +#include "llvm/Target/TargetInstrInfo.h" +#include "llvm/Target/TargetLowering.h" +#include "llvm/Target/TargetLoweringObjectFile.h" +#include "llvm/Target/TargetMachine.h" +#include "llvm/Target/TargetOptions.h" +#include "llvm/Target/TargetRegisterInfo.h" +#include "llvm/Target/TargetSubtargetInfo.h" +#include "llvm/Transforms/Scalar.h" +#include "llvm/Support/Debug.h" +#include "llvm/Support/TargetRegistry.h" + using namespace llvm; @@ -43,6 +67,21 @@ "e-p:32:32-i64:32:32-f64:32:32-v128:32:128-v64:32:64-n32:64"; const char* DataLayout64 = "e-p:64:64-i64:32:32-f64:32:32-v128:32:128-v64:32:64-n32:64"; + + // Copied from LLVMTargetMachine.cpp + void printNoVerify(PassManagerBase &PM, const char *Banner) { + if (PrintMachineCode) + PM.add(createMachineFunctionPrinterPass(dbgs(), Banner)); + } + + void printAndVerify(PassManagerBase &PM, + const char *Banner) { + if (PrintMachineCode) + PM.add(createMachineFunctionPrinterPass(dbgs(), Banner)); + + //if (VerifyMachineCode) + // PM.add(createMachineVerifierPass(Banner)); + } } // DataLayout and FrameLowering are filled with dummy data @@ -82,3 +121,249 @@ PM.add(createPTXMFInfoExtract(*this, OptLevel)); return false; } + +bool PTXTargetMachine::addPassesToEmitFile(PassManagerBase &PM, + formatted_raw_ostream &Out, + CodeGenFileType FileType, + CodeGenOpt::Level OptLevel, + bool DisableVerify) { + // This is mostly based on LLVMTargetMachine::addPassesToEmitFile + + // Add common CodeGen passes. + MCContext *Context = 0; + if (addCommonCodeGenPasses(PM, OptLevel, DisableVerify, Context)) + return true; + assert(Context != 0 && "Failed to get MCContext"); + + if (hasMCSaveTempLabels()) + Context->setAllowTemporaryLabels(false); + + const MCAsmInfo &MAI = *getMCAsmInfo(); + const MCSubtargetInfo &STI = getSubtarget(); + OwningPtr AsmStreamer; + + switch (FileType) { + default: return true; + case CGFT_AssemblyFile: { + MCInstPrinter *InstPrinter = + getTarget().createMCInstPrinter(MAI.getAssemblerDialect(), MAI, STI); + + // Create a code emitter if asked to show the encoding. + MCCodeEmitter *MCE = 0; + MCAsmBackend *MAB = 0; + + MCStreamer *S = getTarget().createAsmStreamer(*Context, Out, + true, /* verbose asm */ + hasMCUseLoc(), + hasMCUseCFI(), + InstPrinter, + MCE, MAB, + false /* show MC encoding */); + AsmStreamer.reset(S); + break; + } + case CGFT_ObjectFile: { + llvm_unreachable("Object file emission is not supported with PTX"); + } + case CGFT_Null: + // The Null output is intended for use for performance analysis and testing, + // not real users. + AsmStreamer.reset(createNullStreamer(*Context)); + break; + } + + // MC Logging + //AsmStreamer.reset(createLoggingStreamer(AsmStreamer.take(), errs())); + + // Create the AsmPrinter, which takes ownership of AsmStreamer if successful. + FunctionPass *Printer = getTarget().createAsmPrinter(*this, *AsmStreamer); + if (Printer == 0) + return true; + + // If successful, createAsmPrinter took ownership of AsmStreamer. + AsmStreamer.take(); + + PM.add(Printer); + + PM.add(createGCInfoDeleter()); + return false; +} + +bool PTXTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM, + CodeGenOpt::Level OptLevel, + bool DisableVerify, + MCContext *&OutContext) { + // Add standard LLVM codegen passes. + // This is derived from LLVMTargetMachine::addCommonCodeGenPasses, with some + // modifications for the PTX target. + + // Standard LLVM-Level Passes. + + // Basic AliasAnalysis support. + // Add TypeBasedAliasAnalysis before BasicAliasAnalysis so that + // BasicAliasAnalysis wins if they disagree. This is intended to help + // support "obvious" type-punning idioms. + PM.add(createTypeBasedAliasAnalysisPass()); + PM.add(createBasicAliasAnalysisPass()); + + // Before running any passes, run the verifier to determine if the input + // coming from the front-end and/or optimizer is valid. + if (!DisableVerify) + PM.add(createVerifierPass()); + + // Run loop strength reduction before anything else. + if (OptLevel != CodeGenOpt::None) { + PM.add(createLoopStrengthReducePass(getTargetLowering())); + //PM.add(createPrintFunctionPass("\n\n*** Code after LSR ***\n", &dbgs())); + } + + PM.add(createGCLoweringPass()); + + // Make sure that no unreachable blocks are instruction selected. + PM.add(createUnreachableBlockEliminationPass()); + + PM.add(createLowerInvokePass(getTargetLowering())); + // The lower invoke pass may create unreachable code. Remove it. + PM.add(createUnreachableBlockEliminationPass()); + + if (OptLevel != CodeGenOpt::None) + PM.add(createCodeGenPreparePass(getTargetLowering())); + + PM.add(createStackProtectorPass(getTargetLowering())); + + addPreISel(PM, OptLevel); + + //PM.add(createPrintFunctionPass("\n\n" + // "*** Final LLVM Code input to ISel ***\n", + // &dbgs())); + + // All passes which modify the LLVM IR are now complete; run the verifier + // to ensure that the IR is valid. + if (!DisableVerify) + PM.add(createVerifierPass()); + + // Standard Lower-Level Passes. + + // Install a MachineModuleInfo class, which is an immutable pass that holds + // all the per-module stuff we're generating, including MCContext. + MachineModuleInfo *MMI = new MachineModuleInfo(*getMCAsmInfo(), + *getRegisterInfo(), + &getTargetLowering()->getObjFileLowering()); + PM.add(MMI); + OutContext = &MMI->getContext(); // Return the MCContext specifically by-ref. + + // Set up a MachineFunction for the rest of CodeGen to work on. + PM.add(new MachineFunctionAnalysis(*this, OptLevel)); + + // Ask the target for an isel. + if (addInstSelector(PM, OptLevel)) + return true; + + // Print the instruction selected machine code... + printAndVerify(PM, "After Instruction Selection"); + + // Expand pseudo-instructions emitted by ISel. + PM.add(createExpandISelPseudosPass()); + + // Pre-ra tail duplication. + if (OptLevel != CodeGenOpt::None) { + PM.add(createTailDuplicatePass(true)); + printAndVerify(PM, "After Pre-RegAlloc TailDuplicate"); + } + + // Optimize PHIs before DCE: removing dead PHI cycles may make more + // instructions dead. + if (OptLevel != CodeGenOpt::None) + PM.add(createOptimizePHIsPass()); + + // If the target requests it, assign local variables to stack slots relative + // to one another and simplify frame index references where possible. + PM.add(createLocalStackSlotAllocationPass()); + + if (OptLevel != CodeGenOpt::None) { + // With optimization, dead code should already be eliminated. However + // there is one known exception: lowered code for arguments that are only + // used by tail calls, where the tail calls reuse the incoming stack + // arguments directly (see t11 in test/CodeGen/X86/sibcall.ll). + PM.add(createDeadMachineInstructionElimPass()); + printAndVerify(PM, "After codegen DCE pass"); + + PM.add(createMachineLICMPass()); + PM.add(createMachineCSEPass()); + PM.add(createMachineSinkingPass()); + printAndVerify(PM, "After Machine LICM, CSE and Sinking passes"); + + PM.add(createPeepholeOptimizerPass()); + printAndVerify(PM, "After codegen peephole optimization pass"); + } + + // Run pre-ra passes. + if (addPreRegAlloc(PM, OptLevel)) + printAndVerify(PM, "After PreRegAlloc passes"); + + // Perform register allocation. + PM.add(createPTXRegisterAllocator()); + printAndVerify(PM, "After Register Allocation"); + + // Perform stack slot coloring and post-ra machine LICM. + if (OptLevel != CodeGenOpt::None) { + // FIXME: Re-enable coloring with register when it's capable of adding + // kill markers. + PM.add(createStackSlotColoringPass(false)); + + // FIXME: Post-RA LICM has asserts that fire on virtual registers. + // Run post-ra machine LICM to hoist reloads / remats. + //if (!DisablePostRAMachineLICM) + // PM.add(createMachineLICMPass(false)); + + printAndVerify(PM, "After StackSlotColoring and postra Machine LICM"); + } + + // Run post-ra passes. + if (addPostRegAlloc(PM, OptLevel)) + printAndVerify(PM, "After PostRegAlloc passes"); + + PM.add(createLowerSubregsPass()); + printAndVerify(PM, "After LowerSubregs"); + + // Insert prolog/epilog code. Eliminate abstract frame index references... + PM.add(createPrologEpilogCodeInserter()); + printAndVerify(PM, "After PrologEpilogCodeInserter"); + + // Run pre-sched2 passes. + if (addPreSched2(PM, OptLevel)) + printAndVerify(PM, "After PreSched2 passes"); + + // Second pass scheduler. + if (OptLevel != CodeGenOpt::None) { + PM.add(createPostRAScheduler(OptLevel)); + printAndVerify(PM, "After PostRAScheduler"); + } + + // Branch folding must be run after regalloc and prolog/epilog insertion. + if (OptLevel != CodeGenOpt::None) { + PM.add(createBranchFoldingPass(getEnableTailMergeDefault())); + printNoVerify(PM, "After BranchFolding"); + } + + // Tail duplication. + if (OptLevel != CodeGenOpt::None) { + PM.add(createTailDuplicatePass(false)); + printNoVerify(PM, "After TailDuplicate"); + } + + PM.add(createGCMachineCodeAnalysisPass()); + + //if (PrintGCInfo) + // PM.add(createGCInfoPrinter(dbgs())); + + if (OptLevel != CodeGenOpt::None) { + PM.add(createCodePlacementOptPass()); + printNoVerify(PM, "After CodePlacementOpt"); + } + + if (addPreEmitPass(PM, OptLevel)) + printNoVerify(PM, "After PreEmit passes"); + + return false; +} Modified: llvm/trunk/lib/Target/PTX/PTXTargetMachine.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXTargetMachine.h?rev=140306&r1=140305&r2=140306&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXTargetMachine.h (original) +++ llvm/trunk/lib/Target/PTX/PTXTargetMachine.h Thu Sep 22 11:45:37 2011 @@ -56,6 +56,35 @@ CodeGenOpt::Level OptLevel); virtual bool addPostRegAlloc(PassManagerBase &PM, CodeGenOpt::Level OptLevel); + + // We override this method to supply our own set of codegen passes. + virtual bool addPassesToEmitFile(PassManagerBase &, + formatted_raw_ostream &, + CodeGenFileType, + CodeGenOpt::Level, + bool = true); + + // Emission of machine code through JITCodeEmitter is not supported. + virtual bool addPassesToEmitMachineCode(PassManagerBase &, + JITCodeEmitter &, + CodeGenOpt::Level, + bool = true) { + return true; + } + + // Emission of machine code through MCJIT is not supported. + virtual bool addPassesToEmitMC(PassManagerBase &, + MCContext *&, + raw_ostream &, + CodeGenOpt::Level, + bool = true) { + return true; + } + + private: + + bool addCommonCodeGenPasses(PassManagerBase &, CodeGenOpt::Level, + bool DisableVerify, MCContext *&OutCtx); }; // class PTXTargetMachine From justin.holewinski at gmail.com Thu Sep 22 11:45:40 2011 From: justin.holewinski at gmail.com (Justin Holewinski) Date: Thu, 22 Sep 2011 16:45:40 -0000 Subject: [llvm-commits] [llvm] r140307 - in /llvm/trunk/lib/Target/PTX: PTXAsmPrinter.cpp PTXInstrInfo.cpp PTXMFInfoExtract.cpp PTXMachineFunctionInfo.h Message-ID: <20110922164540.7AA4C2A6C12C@llvm.org> Author: jholewinski Date: Thu Sep 22 11:45:40 2011 New Revision: 140307 URL: http://llvm.org/viewvc/llvm-project?rev=140307&view=rev Log: PTX: Fixup codegen to handle emission of virtual registers. Modified: llvm/trunk/lib/Target/PTX/PTXAsmPrinter.cpp llvm/trunk/lib/Target/PTX/PTXInstrInfo.cpp llvm/trunk/lib/Target/PTX/PTXMFInfoExtract.cpp llvm/trunk/lib/Target/PTX/PTXMachineFunctionInfo.h Modified: llvm/trunk/lib/Target/PTX/PTXAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXAsmPrinter.cpp?rev=140307&r1=140306&r2=140307&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/PTX/PTXAsmPrinter.cpp Thu Sep 22 11:45:40 2011 @@ -16,6 +16,7 @@ #include "PTX.h" #include "PTXMachineFunctionInfo.h" +#include "PTXRegisterInfo.h" #include "PTXTargetMachine.h" #include "llvm/DerivedTypes.h" #include "llvm/Module.h" @@ -67,7 +68,7 @@ void printParamOperand(const MachineInstr *MI, int opNum, raw_ostream &OS, const char *Modifier = 0); void printReturnOperand(const MachineInstr *MI, int opNum, raw_ostream &OS, - const char *Modifier = 0); + const char *Modifier = 0); void printPredicateOperand(const MachineInstr *MI, raw_ostream &O); void printCall(const MachineInstr *MI, raw_ostream &O); @@ -217,19 +218,61 @@ const PTXMachineFunctionInfo *MFI = MF->getInfo(); - // Print local variable definition - for (PTXMachineFunctionInfo::reg_iterator - i = MFI->localVarRegBegin(), e = MFI->localVarRegEnd(); i != e; ++ i) { - unsigned reg = *i; - - std::string def = "\t.reg ."; - def += getRegisterTypeName(reg); - def += ' '; - def += getRegisterName(reg); - def += ';'; - OutStreamer.EmitRawText(Twine(def)); + // Print register definitions + std::string regDefs; + unsigned numRegs; + + // pred + numRegs = MFI->getNumRegistersForClass(PTX::RegPredRegisterClass); + if(numRegs > 0) { + regDefs += "\t.reg .pred %p<"; + regDefs += utostr(numRegs); + regDefs += ">;\n"; + } + + // i16 + numRegs = MFI->getNumRegistersForClass(PTX::RegI16RegisterClass); + if(numRegs > 0) { + regDefs += "\t.reg .b16 %rh<"; + regDefs += utostr(numRegs); + regDefs += ">;\n"; + } + + // i32 + numRegs = MFI->getNumRegistersForClass(PTX::RegI32RegisterClass); + if(numRegs > 0) { + regDefs += "\t.reg .b32 %r<"; + regDefs += utostr(numRegs); + regDefs += ">;\n"; + } + + // i64 + numRegs = MFI->getNumRegistersForClass(PTX::RegI64RegisterClass); + if(numRegs > 0) { + regDefs += "\t.reg .b64 %rd<"; + regDefs += utostr(numRegs); + regDefs += ">;\n"; + } + + // f32 + numRegs = MFI->getNumRegistersForClass(PTX::RegF32RegisterClass); + if(numRegs > 0) { + regDefs += "\t.reg .f32 %f<"; + regDefs += utostr(numRegs); + regDefs += ">;\n"; + } + + // f64 + numRegs = MFI->getNumRegistersForClass(PTX::RegF64RegisterClass); + if(numRegs > 0) { + regDefs += "\t.reg .f64 %fd<"; + regDefs += utostr(numRegs); + regDefs += ">;\n"; } + OutStreamer.EmitRawText(Twine(regDefs)); + + const MachineFrameInfo* FrameInfo = MF->getFrameInfo(); DEBUG(dbgs() << "Have " << FrameInfo->getNumObjects() << " frame object(s)\n"); @@ -332,6 +375,7 @@ void PTXAsmPrinter::printOperand(const MachineInstr *MI, int opNum, raw_ostream &OS) { const MachineOperand &MO = MI->getOperand(opNum); + const PTXMachineFunctionInfo *MFI = MF->getInfo(); switch (MO.getType()) { default: @@ -347,7 +391,7 @@ OS << *MO.getMBB()->getSymbol(); break; case MachineOperand::MO_Register: - OS << getRegisterName(MO.getReg()); + OS << MFI->getRegisterName(MO.getReg()); break; case MachineOperand::MO_FPImmediate: APInt constFP = MO.getFPImm()->getValueAPF().bitcastToAPInt(); @@ -466,7 +510,7 @@ if (gv->hasInitializer()) { - const Constant *C = gv->getInitializer(); + const Constant *C = gv->getInitializer(); if (const ConstantArray *CA = dyn_cast(C)) { decl += " = {"; @@ -577,6 +621,7 @@ unsigned reg = MI->getOperand(i).getReg(); int predOp = MI->getOperand(i+1).getImm(); + const PTXMachineFunctionInfo *MFI = MF->getInfo(); DEBUG(dbgs() << "predicate: (" << reg << ", " << predOp << ")\n"); @@ -584,7 +629,7 @@ O << '@'; if (predOp == PTX::PRED_NEGATE) O << '!'; - O << getRegisterName(reg); + O << MFI->getRegisterName(reg); } } Modified: llvm/trunk/lib/Target/PTX/PTXInstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXInstrInfo.cpp?rev=140307&r1=140306&r2=140307&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXInstrInfo.cpp (original) +++ llvm/trunk/lib/Target/PTX/PTXInstrInfo.cpp Thu Sep 22 11:45:40 2011 @@ -16,6 +16,7 @@ #include "PTX.h" #include "PTXInstrInfo.h" #include "llvm/CodeGen/MachineInstrBuilder.h" +#include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/SelectionDAG.h" #include "llvm/CodeGen/SelectionDAGNodes.h" #include "llvm/Support/Debug.h" @@ -47,8 +48,13 @@ MachineBasicBlock::iterator I, DebugLoc DL, unsigned DstReg, unsigned SrcReg, bool KillSrc) const { - for (int i = 0, e = sizeof(map)/sizeof(map[0]); i != e; ++ i) { - if (map[i].cls->contains(DstReg, SrcReg)) { + + const MachineRegisterInfo& MRI = MBB.getParent()->getRegInfo(); + assert(MRI.getRegClass(SrcReg) == MRI.getRegClass(DstReg) && + "Invalid register copy between two register classes"); + + for (int i = 0, e = sizeof(map)/sizeof(map[0]); i != e; ++i) { + if (map[i].cls == MRI.getRegClass(SrcReg)) { const MCInstrDesc &MCID = get(map[i].opcode); MachineInstr *MI = BuildMI(MBB, I, DL, MCID, DstReg). addReg(SrcReg, getKillRegState(KillSrc)); Modified: llvm/trunk/lib/Target/PTX/PTXMFInfoExtract.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXMFInfoExtract.cpp?rev=140307&r1=140306&r2=140307&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXMFInfoExtract.cpp (original) +++ llvm/trunk/lib/Target/PTX/PTXMFInfoExtract.cpp Thu Sep 22 11:45:40 2011 @@ -83,6 +83,13 @@ i != e; ++i) dbgs() << "Local Var Reg: " << *i << "\n";); + // Generate list of all virtual registers used in this function + for (unsigned i = 0; i < MRI.getNumVirtRegs(); ++i) { + unsigned Reg = TargetRegisterInfo::index2VirtReg(i); + const TargetRegisterClass *TRC = MRI.getRegClass(Reg); + MFI->addVirtualRegister(TRC, Reg); + } + return false; } Modified: llvm/trunk/lib/Target/PTX/PTXMachineFunctionInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXMachineFunctionInfo.h?rev=140307&r1=140306&r2=140307&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXMachineFunctionInfo.h (original) +++ llvm/trunk/lib/Target/PTX/PTXMachineFunctionInfo.h Thu Sep 22 11:45:40 2011 @@ -15,7 +15,10 @@ #define PTX_MACHINE_FUNCTION_INFO_H #include "PTX.h" +#include "PTXRegisterInfo.h" +#include "llvm/ADT/DenseMap.h" #include "llvm/ADT/DenseSet.h" +#include "llvm/ADT/StringExtras.h" #include "llvm/CodeGen/MachineFunction.h" namespace llvm { @@ -30,11 +33,25 @@ std::vector call_params; bool _isDoneAddArg; + typedef std::vector RegisterList; + typedef DenseMap RegisterMap; + typedef DenseMap RegisterNameMap; + + RegisterMap usedRegs; + RegisterNameMap regNames; + public: PTXMachineFunctionInfo(MachineFunction &MF) : is_kernel(false), reg_ret(PTX::NoRegister), _isDoneAddArg(false) { reg_arg.reserve(8); reg_local_var.reserve(32); + + usedRegs[PTX::RegPredRegisterClass] = RegisterList(); + usedRegs[PTX::RegI16RegisterClass] = RegisterList(); + usedRegs[PTX::RegI32RegisterClass] = RegisterList(); + usedRegs[PTX::RegI64RegisterClass] = RegisterList(); + usedRegs[PTX::RegF32RegisterClass] = RegisterList(); + usedRegs[PTX::RegF64RegisterClass] = RegisterList(); } void setKernel(bool _is_kernel=true) { is_kernel = _is_kernel; } @@ -94,6 +111,42 @@ return std::find(reg_local_var.begin(), reg_local_var.end(), reg) != reg_local_var.end(); } + + void addVirtualRegister(const TargetRegisterClass *TRC, unsigned Reg) { + usedRegs[TRC].push_back(Reg); + + std::string name; + + if (TRC == PTX::RegPredRegisterClass) + name = "%p"; + else if (TRC == PTX::RegI16RegisterClass) + name = "%rh"; + else if (TRC == PTX::RegI32RegisterClass) + name = "%r"; + else if (TRC == PTX::RegI64RegisterClass) + name = "%rd"; + else if (TRC == PTX::RegF32RegisterClass) + name = "%f"; + else if (TRC == PTX::RegF64RegisterClass) + name = "%fd"; + else + llvm_unreachable("Invalid register class"); + + name += utostr(usedRegs[TRC].size() - 1); + regNames[Reg] = name; + } + + std::string getRegisterName(unsigned Reg) const { + if (regNames.count(Reg)) + return regNames.lookup(Reg); + else + llvm_unreachable("Register not in register name map"); + } + + unsigned getNumRegistersForClass(const TargetRegisterClass *TRC) const { + return usedRegs.lookup(TRC).size(); + } + }; // class PTXMachineFunctionInfo } // namespace llvm From justin.holewinski at gmail.com Thu Sep 22 11:45:43 2011 From: justin.holewinski at gmail.com (Justin Holewinski) Date: Thu, 22 Sep 2011 16:45:43 -0000 Subject: [llvm-commits] [llvm] r140308 - in /llvm/trunk/lib/Target/PTX: PTXISelLowering.cpp PTXTargetMachine.cpp Message-ID: <20110922164543.6C44A2A6C12C@llvm.org> Author: jholewinski Date: Thu Sep 22 11:45:43 2011 New Revision: 140308 URL: http://llvm.org/viewvc/llvm-project?rev=140308&view=rev Log: PTX: Fix style issues Modified: llvm/trunk/lib/Target/PTX/PTXISelLowering.cpp llvm/trunk/lib/Target/PTX/PTXTargetMachine.cpp Modified: llvm/trunk/lib/Target/PTX/PTXISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXISelLowering.cpp?rev=140308&r1=140307&r2=140308&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXISelLowering.cpp (original) +++ llvm/trunk/lib/Target/PTX/PTXISelLowering.cpp Thu Sep 22 11:45:43 2011 @@ -50,56 +50,56 @@ setBooleanContents(ZeroOrOneBooleanContent); setBooleanVectorContents(ZeroOrOneBooleanContent); // FIXME: Is this correct? setMinFunctionAlignment(2); - + //////////////////////////////////// /////////// Expansion ////////////// //////////////////////////////////// - + // (any/zero/sign) extload => load + (any/zero/sign) extend - + setLoadExtAction(ISD::EXTLOAD, MVT::i16, Expand); setLoadExtAction(ISD::ZEXTLOAD, MVT::i16, Expand); setLoadExtAction(ISD::SEXTLOAD, MVT::i16, Expand); - + // f32 extload => load + fextend - - setLoadExtAction(ISD::EXTLOAD, MVT::f32, Expand); - + + setLoadExtAction(ISD::EXTLOAD, MVT::f32, Expand); + // f64 truncstore => trunc + store - - setTruncStoreAction(MVT::f64, MVT::f32, Expand); - + + setTruncStoreAction(MVT::f64, MVT::f32, Expand); + // sign_extend_inreg => sign_extend - + setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand); - + // br_cc => brcond - + setOperationAction(ISD::BR_CC, MVT::Other, Expand); // select_cc => setcc - + setOperationAction(ISD::SELECT_CC, MVT::Other, Expand); setOperationAction(ISD::SELECT_CC, MVT::f32, Expand); setOperationAction(ISD::SELECT_CC, MVT::f64, Expand); - + //////////////////////////////////// //////////// Legal ///////////////// //////////////////////////////////// - + setOperationAction(ISD::ConstantFP, MVT::f32, Legal); setOperationAction(ISD::ConstantFP, MVT::f64, Legal); - + //////////////////////////////////// //////////// Custom //////////////// //////////////////////////////////// - + // customise setcc to use bitwise logic if possible - + setOperationAction(ISD::SETCC, MVT::i1, Custom); // customize translation of memory addresses - + setOperationAction(ISD::GlobalAddress, MVT::i32, Custom); setOperationAction(ISD::GlobalAddress, MVT::i64, Custom); @@ -153,7 +153,7 @@ DebugLoc dl = Op.getDebugLoc(); ISD::CondCode CC = cast(Op.getOperand(2))->get(); - // Look for X == 0, X == 1, X != 0, or X != 1 + // Look for X == 0, X == 1, X != 0, or X != 1 // We can simplify these to bitwise logic if (Op1.getOpcode() == ISD::Constant && Modified: llvm/trunk/lib/Target/PTX/PTXTargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXTargetMachine.cpp?rev=140308&r1=140307&r2=140308&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXTargetMachine.cpp (original) +++ llvm/trunk/lib/Target/PTX/PTXTargetMachine.cpp Thu Sep 22 11:45:43 2011 @@ -248,7 +248,7 @@ // all the per-module stuff we're generating, including MCContext. MachineModuleInfo *MMI = new MachineModuleInfo(*getMCAsmInfo(), *getRegisterInfo(), - &getTargetLowering()->getObjFileLowering()); + &getTargetLowering()->getObjFileLowering()); PM.add(MMI); OutContext = &MMI->getContext(); // Return the MCContext specifically by-ref. From justin.holewinski at gmail.com Thu Sep 22 11:45:46 2011 From: justin.holewinski at gmail.com (Justin Holewinski) Date: Thu, 22 Sep 2011 16:45:46 -0000 Subject: [llvm-commits] [llvm] r140309 - in /llvm/trunk/lib/Target/PTX: PTXAsmPrinter.cpp PTXISelDAGToDAG.cpp PTXISelLowering.cpp PTXISelLowering.h PTXInstrInfo.cpp PTXInstrInfo.td PTXMFInfoExtract.cpp PTXMachineFunctionInfo.h Message-ID: <20110922164546.6C0A32A6C12C@llvm.org> Author: jholewinski Date: Thu Sep 22 11:45:46 2011 New Revision: 140309 URL: http://llvm.org/viewvc/llvm-project?rev=140309&view=rev Log: PTX: Use .param space for device function return values on SM 2.0+, and attempt to fix up parameter passing on SM < 2.0 Modified: llvm/trunk/lib/Target/PTX/PTXAsmPrinter.cpp llvm/trunk/lib/Target/PTX/PTXISelDAGToDAG.cpp llvm/trunk/lib/Target/PTX/PTXISelLowering.cpp llvm/trunk/lib/Target/PTX/PTXISelLowering.h llvm/trunk/lib/Target/PTX/PTXInstrInfo.cpp llvm/trunk/lib/Target/PTX/PTXInstrInfo.td llvm/trunk/lib/Target/PTX/PTXMFInfoExtract.cpp llvm/trunk/lib/Target/PTX/PTXMachineFunctionInfo.h Modified: llvm/trunk/lib/Target/PTX/PTXAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXAsmPrinter.cpp?rev=140309&r1=140308&r2=140309&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/PTX/PTXAsmPrinter.cpp Thu Sep 22 11:45:46 2011 @@ -91,9 +91,13 @@ static const char PARAM_PREFIX[] = "__param_"; static const char RETURN_PREFIX[] = "__ret_"; -static const char *getRegisterTypeName(unsigned RegNo) { -#define TEST_REGCLS(cls, clsstr) \ - if (PTX::cls ## RegisterClass->contains(RegNo)) return # clsstr; +static const char *getRegisterTypeName(unsigned RegNo, + const MachineRegisterInfo& MRI) { + const TargetRegisterClass *TRC = MRI.getRegClass(RegNo); + +#define TEST_REGCLS(cls, clsstr) \ + if (PTX::cls ## RegisterClass == TRC) return # clsstr; + TEST_REGCLS(RegPred, pred); TEST_REGCLS(RegI16, b16); TEST_REGCLS(RegI32, b32); @@ -288,18 +292,18 @@ } } - unsigned Index = 1; + //unsigned Index = 1; // Print parameter passing params - for (PTXMachineFunctionInfo::param_iterator - i = MFI->paramBegin(), e = MFI->paramEnd(); i != e; ++i) { - std::string def = "\t.param .b"; - def += utostr(*i); - def += " __ret_"; - def += utostr(Index); - Index++; - def += ";"; - OutStreamer.EmitRawText(Twine(def)); - } + //for (PTXMachineFunctionInfo::param_iterator + // i = MFI->paramBegin(), e = MFI->paramEnd(); i != e; ++i) { + // std::string def = "\t.param .b"; + // def += utostr(*i); + // def += " __ret_"; + // def += utostr(Index); + // Index++; + // def += ";"; + // OutStreamer.EmitRawText(Twine(def)); + //} } void PTXAsmPrinter::EmitInstruction(const MachineInstr *MI) { @@ -436,7 +440,8 @@ void PTXAsmPrinter::printReturnOperand(const MachineInstr *MI, int opNum, raw_ostream &OS, const char *Modifier) { - OS << RETURN_PREFIX << (int) MI->getOperand(opNum).getImm() + 1; + //OS << RETURN_PREFIX << (int) MI->getOperand(opNum).getImm() + 1; + OS << "__ret"; } void PTXAsmPrinter::EmitVariableDeclaration(const GlobalVariable *gv) { @@ -559,6 +564,7 @@ const PTXMachineFunctionInfo *MFI = MF->getInfo(); const bool isKernel = MFI->isKernel(); const PTXSubtarget& ST = TM.getSubtarget(); + const MachineRegisterInfo& MRI = MF->getRegInfo(); std::string decl = isKernel ? ".entry" : ".func"; @@ -566,16 +572,22 @@ if (!isKernel) { decl += " ("; - for (PTXMachineFunctionInfo::ret_iterator - i = MFI->retRegBegin(), e = MFI->retRegEnd(), b = i; - i != e; ++i) { - if (i != b) { - decl += ", "; + if (ST.useParamSpaceForDeviceArgs() && MFI->getRetParamSize() != 0) { + decl += ".param .b"; + decl += utostr(MFI->getRetParamSize()); + decl += " __ret"; + } else { + for (PTXMachineFunctionInfo::ret_iterator + i = MFI->retRegBegin(), e = MFI->retRegEnd(), b = i; + i != e; ++i) { + if (i != b) { + decl += ", "; + } + decl += ".reg ."; + decl += getRegisterTypeName(*i, MRI); + decl += " "; + decl += MFI->getRegisterName(*i); } - decl += ".reg ."; - decl += getRegisterTypeName(*i); - decl += " "; - decl += getRegisterName(*i); } decl += ")"; } @@ -589,23 +601,32 @@ cnt = 0; // Print parameters - for (PTXMachineFunctionInfo::reg_iterator - i = MFI->argRegBegin(), e = MFI->argRegEnd(), b = i; - i != e; ++i) { - if (i != b) { - decl += ", "; - } - if (isKernel || ST.useParamSpaceForDeviceArgs()) { + if (isKernel || ST.useParamSpaceForDeviceArgs()) { + for (PTXMachineFunctionInfo::argparam_iterator + i = MFI->argParamBegin(), e = MFI->argParamEnd(), b = i; + i != e; ++i) { + if (i != b) { + decl += ", "; + } + decl += ".param .b"; decl += utostr(*i); decl += " "; decl += PARAM_PREFIX; decl += utostr(++cnt); - } else { + } + } else { + for (PTXMachineFunctionInfo::reg_iterator + i = MFI->argRegBegin(), e = MFI->argRegEnd(), b = i; + i != e; ++i) { + if (i != b) { + decl += ", "; + } + decl += ".reg ."; - decl += getRegisterTypeName(*i); + decl += getRegisterTypeName(*i, MRI); decl += " "; - decl += getRegisterName(*i); + decl += MFI->getRegisterName(*i); } } decl += ")"; Modified: llvm/trunk/lib/Target/PTX/PTXISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXISelDAGToDAG.cpp?rev=140309&r1=140308&r2=140309&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/PTX/PTXISelDAGToDAG.cpp Thu Sep 22 11:45:46 2011 @@ -46,6 +46,9 @@ // pattern (PTXbrcond bb:$d, ...) in PTXInstrInfo.td SDNode *SelectBRCOND(SDNode *Node); + SDNode *SelectREADPARAM(SDNode *Node); + SDNode *SelectWRITEPARAM(SDNode *Node); + bool isImm(const SDValue &operand); bool SelectImm(const SDValue &operand, SDValue &imm); @@ -68,6 +71,10 @@ switch (Node->getOpcode()) { case ISD::BRCOND: return SelectBRCOND(Node); + case PTXISD::READ_PARAM: + return SelectREADPARAM(Node); + case PTXISD::WRITE_PARAM: + return SelectWRITEPARAM(Node); default: return SelectCode(Node); } @@ -90,6 +97,82 @@ return CurDAG->getMachineNode(PTX::BRAdp, dl, MVT::Other, Ops, 4); } +SDNode *PTXDAGToDAGISel::SelectREADPARAM(SDNode *Node) { + SDValue Chain = Node->getOperand(0); + SDValue Index = Node->getOperand(1); + + int OpCode; + + // Get the type of parameter we are reading + EVT VT = Node->getValueType(0); + assert(VT.isSimple() && "READ_PARAM only implemented for MVT types"); + + MVT Type = VT.getSimpleVT(); + + if (Type == MVT::i1) + OpCode = PTX::READPARAMPRED; + else if (Type == MVT::i16) + OpCode = PTX::READPARAMI16; + else if (Type == MVT::i32) + OpCode = PTX::READPARAMI32; + else if (Type == MVT::i64) + OpCode = PTX::READPARAMI64; + else if (Type == MVT::f32) + OpCode = PTX::READPARAMF32; + else if (Type == MVT::f64) + OpCode = PTX::READPARAMF64; + + SDValue Pred = CurDAG->getRegister(PTX::NoRegister, MVT::i1); + SDValue PredOp = CurDAG->getTargetConstant(PTX::PRED_NORMAL, MVT::i32); + DebugLoc dl = Node->getDebugLoc(); + + SDValue Ops[] = { Index, Pred, PredOp, Chain }; + return CurDAG->getMachineNode(OpCode, dl, VT, Ops, 4); +} + +SDNode *PTXDAGToDAGISel::SelectWRITEPARAM(SDNode *Node) { + + SDValue Chain = Node->getOperand(0); + SDValue Value = Node->getOperand(1); + + int OpCode; + + //Node->dumpr(CurDAG); + + // Get the type of parameter we are writing + EVT VT = Value->getValueType(0); + assert(VT.isSimple() && "WRITE_PARAM only implemented for MVT types"); + + MVT Type = VT.getSimpleVT(); + + if (Type == MVT::i1) + OpCode = PTX::WRITEPARAMPRED; + else if (Type == MVT::i16) + OpCode = PTX::WRITEPARAMI16; + else if (Type == MVT::i32) + OpCode = PTX::WRITEPARAMI32; + else if (Type == MVT::i64) + OpCode = PTX::WRITEPARAMI64; + else if (Type == MVT::f32) + OpCode = PTX::WRITEPARAMF32; + else if (Type == MVT::f64) + OpCode = PTX::WRITEPARAMF64; + else + llvm_unreachable("Invalid type in SelectWRITEPARAM"); + + SDValue Pred = CurDAG->getRegister(PTX::NoRegister, MVT::i1); + SDValue PredOp = CurDAG->getTargetConstant(PTX::PRED_NORMAL, MVT::i32); + DebugLoc dl = Node->getDebugLoc(); + + SDValue Ops[] = { Value, Pred, PredOp, Chain }; + SDNode* Ret = CurDAG->getMachineNode(OpCode, dl, MVT::Other, Ops, 4); + + //dbgs() << "SelectWRITEPARAM produced:\n\t"; + //Ret->dumpr(CurDAG); + + return Ret; +} + // Match memory operand of the form [reg+reg] bool PTXDAGToDAGISel::SelectADDRrr(SDValue &Addr, SDValue &R1, SDValue &R2) { if (Addr.getOpcode() != ISD::ADD || Addr.getNumOperands() < 2 || Modified: llvm/trunk/lib/Target/PTX/PTXISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXISelLowering.cpp?rev=140309&r1=140308&r2=140309&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXISelLowering.cpp (original) +++ llvm/trunk/lib/Target/PTX/PTXISelLowering.cpp Thu Sep 22 11:45:46 2011 @@ -132,6 +132,10 @@ return "PTXISD::LOAD_PARAM"; case PTXISD::STORE_PARAM: return "PTXISD::STORE_PARAM"; + case PTXISD::READ_PARAM: + return "PTXISD::READ_PARAM"; + case PTXISD::WRITE_PARAM: + return "PTXISD::WRITE_PARAM"; case PTXISD::EXIT: return "PTXISD::EXIT"; case PTXISD::RET: @@ -220,7 +224,6 @@ if (MFI->isKernel() || ST.useParamSpaceForDeviceArgs()) { // We just need to emit the proper LOAD_PARAM ISDs for (unsigned i = 0, e = Ins.size(); i != e; ++i) { - assert((!MFI->isKernel() || Ins[i].VT != MVT::i1) && "Kernels cannot take pred operands"); @@ -231,57 +234,71 @@ // Instead of storing a physical register in our argument list, we just // store the total size of the parameter, in bits. The ASM printer // knows how to process this. - MFI->addArgReg(Ins[i].VT.getStoreSizeInBits()); + MFI->addArgParam(Ins[i].VT.getStoreSizeInBits()); } } else { // For device functions, we use the PTX calling convention to do register // assignments then create CopyFromReg ISDs for the allocated registers - SmallVector ArgLocs; - CCState CCInfo(CallConv, isVarArg, MF, getTargetMachine(), ArgLocs, - *DAG.getContext()); + //SmallVector ArgLocs; + //CCState CCInfo(CallConv, isVarArg, MF, getTargetMachine(), ArgLocs, + // *DAG.getContext()); - CCInfo.AnalyzeFormalArguments(Ins, CC_PTX); + //CCInfo.AnalyzeFormalArguments(Ins, CC_PTX); - for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { + //for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { + for (unsigned i = 0, e = Ins.size(); i != e; ++i) { - CCValAssign& VA = ArgLocs[i]; - EVT RegVT = VA.getLocVT(); + EVT RegVT = Ins[i].VT; TargetRegisterClass* TRC = 0; + int OpCode; - assert(VA.isRegLoc() && "CCValAssign must be RegLoc"); + //assert(VA.isRegLoc() && "CCValAssign must be RegLoc"); // Determine which register class we need if (RegVT == MVT::i1) { TRC = PTX::RegPredRegisterClass; + OpCode = PTX::READPARAMPRED; } else if (RegVT == MVT::i16) { TRC = PTX::RegI16RegisterClass; + OpCode = PTX::READPARAMI16; } else if (RegVT == MVT::i32) { TRC = PTX::RegI32RegisterClass; + OpCode = PTX::READPARAMI32; } else if (RegVT == MVT::i64) { TRC = PTX::RegI64RegisterClass; + OpCode = PTX::READPARAMI64; } else if (RegVT == MVT::f32) { TRC = PTX::RegF32RegisterClass; + OpCode = PTX::READPARAMF32; } else if (RegVT == MVT::f64) { TRC = PTX::RegF64RegisterClass; + OpCode = PTX::READPARAMF64; } else { llvm_unreachable("Unknown parameter type"); } + // Use a unique index in the instruction to prevent instruction folding. + // Yes, this is a hack. + SDValue Index = DAG.getTargetConstant(i, MVT::i32); unsigned Reg = MF.getRegInfo().createVirtualRegister(TRC); - MF.getRegInfo().addLiveIn(VA.getLocReg(), Reg); + SDValue ArgValue = DAG.getNode(PTXISD::READ_PARAM, dl, RegVT, Chain, + Index); + + SDValue Flag = ArgValue.getValue(1); - SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, RegVT); + SDValue Copy = DAG.getCopyFromReg(Chain, dl, Reg, RegVT); + SDValue RegValue = DAG.getRegister(Reg, RegVT); InVals.push_back(ArgValue); - MFI->addArgReg(VA.getLocReg()); + MFI->addArgReg(Reg); } } @@ -305,7 +322,7 @@ assert(Outs.size() == 0 && "Kernel must return void."); return DAG.getNode(PTXISD::EXIT, dl, MVT::Other, Chain); case CallingConv::PTX_Device: - //assert(Outs.size() <= 1 && "Can at most return one value."); + assert(Outs.size() <= 1 && "Can at most return one value."); break; } @@ -318,28 +335,84 @@ // device functions if SM >= 2.0 and the number of return arguments is // only 1, we just always use registers since this makes the codegen // easier. - SmallVector RVLocs; - CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), - getTargetMachine(), RVLocs, *DAG.getContext()); - CCInfo.AnalyzeReturn(Outs, RetCC_PTX); + const PTXSubtarget& ST = getTargetMachine().getSubtarget(); - for (unsigned i = 0, e = RVLocs.size(); i != e; ++i) { - CCValAssign& VA = RVLocs[i]; + if (ST.useParamSpaceForDeviceArgs()) { + assert(Outs.size() < 2 && "Device functions can return at most one value"); - assert(VA.isRegLoc() && "CCValAssign must be RegLoc"); + if (Outs.size() == 1) { + unsigned Size = OutVals[0].getValueType().getSizeInBits(); + SDValue Index = DAG.getTargetConstant(MFI->getNextParam(Size), MVT::i32); + Chain = DAG.getNode(PTXISD::STORE_PARAM, dl, MVT::Other, Chain, + Index, OutVals[0]); - unsigned Reg = VA.getLocReg(); + //Flag = Chain.getValue(1); + MFI->setRetParamSize(Outs[0].VT.getStoreSizeInBits()); + } + } else { + //SmallVector RVLocs; + //CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), + //getTargetMachine(), RVLocs, *DAG.getContext()); - DAG.getMachineFunction().getRegInfo().addLiveOut(Reg); + //CCInfo.AnalyzeReturn(Outs, RetCC_PTX); - Chain = DAG.getCopyToReg(Chain, dl, Reg, OutVals[i], Flag); + //for (unsigned i = 0, e = RVLocs.size(); i != e; ++i) { + //CCValAssign& VA = RVLocs[i]; - // Guarantee that all emitted copies are stuck together, - // avoiding something bad - Flag = Chain.getValue(1); + for (unsigned i = 0, e = Outs.size(); i != e; ++i) { - MFI->addRetReg(Reg); + //assert(VA.isRegLoc() && "CCValAssign must be RegLoc"); + + //unsigned Reg = VA.getLocReg(); + + EVT RegVT = Outs[i].VT; + TargetRegisterClass* TRC = 0; + + // Determine which register class we need + if (RegVT == MVT::i1) { + TRC = PTX::RegPredRegisterClass; + } + else if (RegVT == MVT::i16) { + TRC = PTX::RegI16RegisterClass; + } + else if (RegVT == MVT::i32) { + TRC = PTX::RegI32RegisterClass; + } + else if (RegVT == MVT::i64) { + TRC = PTX::RegI64RegisterClass; + } + else if (RegVT == MVT::f32) { + TRC = PTX::RegF32RegisterClass; + } + else if (RegVT == MVT::f64) { + TRC = PTX::RegF64RegisterClass; + } + else { + llvm_unreachable("Unknown parameter type"); + } + + unsigned Reg = MF.getRegInfo().createVirtualRegister(TRC); + + //DAG.getMachineFunction().getRegInfo().addLiveOut(Reg); + + //Chain = DAG.getCopyToReg(Chain, dl, Reg, OutVals[i], Flag); + //SDValue Copy = DAG.getCopyToReg(Chain, dl, Reg, OutVals[i]/*, Flag*/); + + // Guarantee that all emitted copies are stuck together, + // avoiding something bad + //Flag = Chain.getValue(1); + + SDValue Copy = DAG.getCopyToReg(Chain, dl, Reg, OutVals[i]/*, Flag*/); + SDValue OutReg = DAG.getRegister(Reg, RegVT); + + Chain = DAG.getNode(PTXISD::WRITE_PARAM, dl, MVT::Other, Copy, OutReg); + //Flag = Chain.getValue(1); + + MFI->addRetReg(Reg); + + //MFI->addRetReg(Reg); + } } if (Flag.getNode() == 0) { Modified: llvm/trunk/lib/Target/PTX/PTXISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXISelLowering.h?rev=140309&r1=140308&r2=140309&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXISelLowering.h (original) +++ llvm/trunk/lib/Target/PTX/PTXISelLowering.h Thu Sep 22 11:45:46 2011 @@ -26,6 +26,8 @@ FIRST_NUMBER = ISD::BUILTIN_OP_END, LOAD_PARAM, STORE_PARAM, + READ_PARAM, + WRITE_PARAM, EXIT, RET, COPY_ADDRESS, Modified: llvm/trunk/lib/Target/PTX/PTXInstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXInstrInfo.cpp?rev=140309&r1=140308&r2=140309&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXInstrInfo.cpp (original) +++ llvm/trunk/lib/Target/PTX/PTXInstrInfo.cpp Thu Sep 22 11:45:46 2011 @@ -50,11 +50,11 @@ bool KillSrc) const { const MachineRegisterInfo& MRI = MBB.getParent()->getRegInfo(); - assert(MRI.getRegClass(SrcReg) == MRI.getRegClass(DstReg) && - "Invalid register copy between two register classes"); + //assert(MRI.getRegClass(SrcReg) == MRI.getRegClass(DstReg) && + // "Invalid register copy between two register classes"); for (int i = 0, e = sizeof(map)/sizeof(map[0]); i != e; ++i) { - if (map[i].cls == MRI.getRegClass(SrcReg)) { + if (map[i].cls == MRI.getRegClass(DstReg)) { const MCInstrDesc &MCID = get(map[i].opcode); MachineInstr *MI = BuildMI(MBB, I, DL, MCID, DstReg). addReg(SrcReg, getKillRegState(KillSrc)); Modified: llvm/trunk/lib/Target/PTX/PTXInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXInstrInfo.td?rev=140309&r1=140308&r2=140309&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXInstrInfo.td (original) +++ llvm/trunk/lib/Target/PTX/PTXInstrInfo.td Thu Sep 22 11:45:46 2011 @@ -209,6 +209,13 @@ : SDNode<"PTXISD::STORE_PARAM", SDTypeProfile<0, 2, [SDTCisVT<0, i32>]>, [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue]>; +def PTXreadparam + : SDNode<"PTXISD::READ_PARAM", SDTypeProfile<1, 1, [SDTCisVT<1, i32>]>, + [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue]>; +def PTXwriteparam + : SDNode<"PTXISD::WRITE_PARAM", SDTypeProfile<0, 1, []>, + [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue]>; + //===----------------------------------------------------------------------===// // Instruction Class Templates //===----------------------------------------------------------------------===// @@ -617,7 +624,7 @@ // SM_13+ defaults to .rn for f32 and f64, // SM10 must *not* provide a rounding -// TODO: +// TODO: // - Allow user selection of rounding modes for fdiv // - Add support for -prec-div=false (.approx) @@ -1045,7 +1052,7 @@ // Conversion to f64 def CVT_f64_pred - : InstPTX<(outs RegF64:$d), (ins RegPred:$a), + : InstPTX<(outs RegF64:$d), (ins RegPred:$a), "selp.f64\t$d, 0D3F80000000000000, 0D0000000000000000, $a", // 1.0 [(set RegF64:$d, (uint_to_fp RegPred:$a))]>; @@ -1114,6 +1121,27 @@ def STACKLOADF64 : InstPTX<(outs), (ins RegF64:$d, i32imm:$a), "mov.f64\t$d, s$a", []>; +///===- Parameter Passing Pseudo-Instructions -----------------------------===// + +def READPARAMPRED : InstPTX<(outs RegPred:$a), (ins i32imm:$b), + "mov.pred\t$a, %param$b", []>; +def READPARAMI16 : InstPTX<(outs RegI16:$a), (ins i32imm:$b), + "mov.b16\t$a, %param$b", []>; +def READPARAMI32 : InstPTX<(outs RegI32:$a), (ins i32imm:$b), + "mov.b32\t$a, %param$b", []>; +def READPARAMI64 : InstPTX<(outs RegI64:$a), (ins i32imm:$b), + "mov.b64\t$a, %param$b", []>; +def READPARAMF32 : InstPTX<(outs RegF32:$a), (ins i32imm:$b), + "mov.f32\t$a, %param$b", []>; +def READPARAMF64 : InstPTX<(outs RegF64:$a), (ins i32imm:$b), + "mov.f64\t$a, %param$b", []>; + +def WRITEPARAMPRED : InstPTX<(outs), (ins RegPred:$a), "//w", []>; +def WRITEPARAMI16 : InstPTX<(outs), (ins RegI16:$a), "//w", []>; +def WRITEPARAMI32 : InstPTX<(outs), (ins RegI32:$a), "//w", []>; +def WRITEPARAMI64 : InstPTX<(outs), (ins RegI64:$a), "//w", []>; +def WRITEPARAMF32 : InstPTX<(outs), (ins RegF32:$a), "//w", []>; +def WRITEPARAMF64 : InstPTX<(outs), (ins RegF64:$a), "//w", []>; // Call handling // def ADJCALLSTACKUP : Modified: llvm/trunk/lib/Target/PTX/PTXMFInfoExtract.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXMFInfoExtract.cpp?rev=140309&r1=140308&r2=140309&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXMFInfoExtract.cpp (original) +++ llvm/trunk/lib/Target/PTX/PTXMFInfoExtract.cpp Thu Sep 22 11:45:46 2011 @@ -66,7 +66,7 @@ // FIXME: This is a slow linear scanning for (unsigned reg = PTX::NoRegister + 1; reg < PTX::NUM_TARGET_REGS; ++reg) if (MRI.isPhysRegUsed(reg) && - !MFI->isRetReg(reg) && + //!MFI->isRetReg(reg) && (MFI->isKernel() || !MFI->isArgReg(reg))) MFI->addLocalVarReg(reg); Modified: llvm/trunk/lib/Target/PTX/PTXMachineFunctionInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXMachineFunctionInfo.h?rev=140309&r1=140308&r2=140309&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXMachineFunctionInfo.h (original) +++ llvm/trunk/lib/Target/PTX/PTXMachineFunctionInfo.h Thu Sep 22 11:45:46 2011 @@ -20,16 +20,20 @@ #include "llvm/ADT/DenseSet.h" #include "llvm/ADT/StringExtras.h" #include "llvm/CodeGen/MachineFunction.h" +#include "llvm/Support/Debug.h" +#include "llvm/Support/raw_ostream.h" namespace llvm { + /// PTXMachineFunctionInfo - This class is derived from MachineFunction and /// contains private PTX target-specific information for each MachineFunction. /// class PTXMachineFunctionInfo : public MachineFunctionInfo { private: bool is_kernel; - std::vector reg_arg, reg_local_var; - std::vector reg_ret; + DenseSet reg_local_var; + DenseSet reg_arg; + DenseSet reg_ret; std::vector call_params; bool _isDoneAddArg; @@ -40,29 +44,28 @@ RegisterMap usedRegs; RegisterNameMap regNames; + SmallVector argParams; + + unsigned retParamSize; + public: PTXMachineFunctionInfo(MachineFunction &MF) : is_kernel(false), reg_ret(PTX::NoRegister), _isDoneAddArg(false) { - reg_arg.reserve(8); - reg_local_var.reserve(32); - usedRegs[PTX::RegPredRegisterClass] = RegisterList(); usedRegs[PTX::RegI16RegisterClass] = RegisterList(); usedRegs[PTX::RegI32RegisterClass] = RegisterList(); usedRegs[PTX::RegI64RegisterClass] = RegisterList(); usedRegs[PTX::RegF32RegisterClass] = RegisterList(); usedRegs[PTX::RegF64RegisterClass] = RegisterList(); + + retParamSize = 0; } void setKernel(bool _is_kernel=true) { is_kernel = _is_kernel; } - void addArgReg(unsigned reg) { reg_arg.push_back(reg); } - void addLocalVarReg(unsigned reg) { reg_local_var.push_back(reg); } - void addRetReg(unsigned reg) { - if (!isRetReg(reg)) { - reg_ret.push_back(reg); - } - } + + void addLocalVarReg(unsigned reg) { reg_local_var.insert(reg); } + void doneAddArg(void) { _isDoneAddArg = true; @@ -71,17 +74,20 @@ bool isKernel() const { return is_kernel; } - typedef std::vector::const_iterator reg_iterator; - typedef std::vector::const_reverse_iterator reg_reverse_iterator; - typedef std::vector::const_iterator ret_iterator; + typedef DenseSet::const_iterator reg_iterator; + //typedef DenseSet::const_reverse_iterator reg_reverse_iterator; + typedef DenseSet::const_iterator ret_iterator; typedef std::vector::const_iterator param_iterator; + typedef SmallVector::const_iterator argparam_iterator; bool argRegEmpty() const { return reg_arg.empty(); } int getNumArg() const { return reg_arg.size(); } reg_iterator argRegBegin() const { return reg_arg.begin(); } reg_iterator argRegEnd() const { return reg_arg.end(); } - reg_reverse_iterator argRegReverseBegin() const { return reg_arg.rbegin(); } - reg_reverse_iterator argRegReverseEnd() const { return reg_arg.rend(); } + argparam_iterator argParamBegin() const { return argParams.begin(); } + argparam_iterator argParamEnd() const { return argParams.end(); } + //reg_reverse_iterator argRegReverseBegin() const { return reg_arg.rbegin(); } + //reg_reverse_iterator argRegReverseEnd() const { return reg_arg.rend(); } bool localVarRegEmpty() const { return reg_local_var.empty(); } reg_iterator localVarRegBegin() const { return reg_local_var.begin(); } @@ -103,42 +109,75 @@ return std::find(reg_arg.begin(), reg_arg.end(), reg) != reg_arg.end(); } - bool isRetReg(unsigned reg) const { + /*bool isRetReg(unsigned reg) const { return std::find(reg_ret.begin(), reg_ret.end(), reg) != reg_ret.end(); - } + }*/ bool isLocalVarReg(unsigned reg) const { return std::find(reg_local_var.begin(), reg_local_var.end(), reg) != reg_local_var.end(); } - void addVirtualRegister(const TargetRegisterClass *TRC, unsigned Reg) { - usedRegs[TRC].push_back(Reg); + void addRetReg(unsigned Reg) { + if (!reg_ret.count(Reg)) { + reg_ret.insert(Reg); + std::string name; + name = "%ret"; + name += utostr(reg_ret.size() - 1); + regNames[Reg] = name; + } + } - std::string name; + void setRetParamSize(unsigned SizeInBits) { + retParamSize = SizeInBits; + } - if (TRC == PTX::RegPredRegisterClass) - name = "%p"; - else if (TRC == PTX::RegI16RegisterClass) - name = "%rh"; - else if (TRC == PTX::RegI32RegisterClass) - name = "%r"; - else if (TRC == PTX::RegI64RegisterClass) - name = "%rd"; - else if (TRC == PTX::RegF32RegisterClass) - name = "%f"; - else if (TRC == PTX::RegF64RegisterClass) - name = "%fd"; - else - llvm_unreachable("Invalid register class"); + unsigned getRetParamSize() const { + return retParamSize; + } - name += utostr(usedRegs[TRC].size() - 1); + void addArgReg(unsigned Reg) { + reg_arg.insert(Reg); + std::string name; + name = "%param"; + name += utostr(reg_arg.size() - 1); regNames[Reg] = name; } + void addArgParam(unsigned SizeInBits) { + argParams.push_back(SizeInBits); + } + + void addVirtualRegister(const TargetRegisterClass *TRC, unsigned Reg) { + std::string name; + + if (!reg_ret.count(Reg) && !reg_arg.count(Reg)) { + usedRegs[TRC].push_back(Reg); + if (TRC == PTX::RegPredRegisterClass) + name = "%p"; + else if (TRC == PTX::RegI16RegisterClass) + name = "%rh"; + else if (TRC == PTX::RegI32RegisterClass) + name = "%r"; + else if (TRC == PTX::RegI64RegisterClass) + name = "%rd"; + else if (TRC == PTX::RegF32RegisterClass) + name = "%f"; + else if (TRC == PTX::RegF64RegisterClass) + name = "%fd"; + else + llvm_unreachable("Invalid register class"); + + name += utostr(usedRegs[TRC].size() - 1); + regNames[Reg] = name; + } + } + std::string getRegisterName(unsigned Reg) const { if (regNames.count(Reg)) return regNames.lookup(Reg); + else if (Reg == PTX::NoRegister) + return "%noreg"; else llvm_unreachable("Register not in register name map"); } From justin.holewinski at gmail.com Thu Sep 22 11:45:48 2011 From: justin.holewinski at gmail.com (Justin Holewinski) Date: Thu, 22 Sep 2011 16:45:48 -0000 Subject: [llvm-commits] [llvm] r140310 - in /llvm/trunk/lib/Target/PTX: CMakeLists.txt Makefile PTX.td PTXISelLowering.cpp PTXRegisterInfo.td Message-ID: <20110922164548.D74F72A6C12C@llvm.org> Author: jholewinski Date: Thu Sep 22 11:45:48 2011 New Revision: 140310 URL: http://llvm.org/viewvc/llvm-project?rev=140310&view=rev Log: PTX: Remove physical register defs Modified: llvm/trunk/lib/Target/PTX/CMakeLists.txt llvm/trunk/lib/Target/PTX/Makefile llvm/trunk/lib/Target/PTX/PTX.td llvm/trunk/lib/Target/PTX/PTXISelLowering.cpp llvm/trunk/lib/Target/PTX/PTXRegisterInfo.td Modified: llvm/trunk/lib/Target/PTX/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/CMakeLists.txt?rev=140310&r1=140309&r2=140310&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/CMakeLists.txt (original) +++ llvm/trunk/lib/Target/PTX/CMakeLists.txt Thu Sep 22 11:45:48 2011 @@ -1,7 +1,6 @@ set(LLVM_TARGET_DEFINITIONS PTX.td) tablegen(PTXGenAsmWriter.inc -gen-asm-writer) -tablegen(PTXGenCallingConv.inc -gen-callingconv) tablegen(PTXGenDAGISel.inc -gen-dag-isel) tablegen(PTXGenInstrInfo.inc -gen-instr-info) tablegen(PTXGenRegisterInfo.inc -gen-register-info) Modified: llvm/trunk/lib/Target/PTX/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/Makefile?rev=140310&r1=140309&r2=140310&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/Makefile (original) +++ llvm/trunk/lib/Target/PTX/Makefile Thu Sep 22 11:45:48 2011 @@ -13,7 +13,6 @@ # Make sure that tblgen is run, first thing. BUILT_SOURCES = PTXGenAsmWriter.inc \ - PTXGenCallingConv.inc \ PTXGenDAGISel.inc \ PTXGenInstrInfo.inc \ PTXGenRegisterInfo.inc \ Modified: llvm/trunk/lib/Target/PTX/PTX.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTX.td?rev=140310&r1=140309&r2=140310&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTX.td (original) +++ llvm/trunk/lib/Target/PTX/PTX.td Thu Sep 22 11:45:48 2011 @@ -113,12 +113,6 @@ include "PTXRegisterInfo.td" //===----------------------------------------------------------------------===// -// Calling Conventions -//===----------------------------------------------------------------------===// - -include "PTXCallingConv.td" - -//===----------------------------------------------------------------------===// // Instruction Descriptions //===----------------------------------------------------------------------===// Modified: llvm/trunk/lib/Target/PTX/PTXISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXISelLowering.cpp?rev=140310&r1=140309&r2=140310&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXISelLowering.cpp (original) +++ llvm/trunk/lib/Target/PTX/PTXISelLowering.cpp Thu Sep 22 11:45:48 2011 @@ -28,12 +28,6 @@ using namespace llvm; //===----------------------------------------------------------------------===// -// Calling Convention Implementation -//===----------------------------------------------------------------------===// - -#include "PTXGenCallingConv.inc" - -//===----------------------------------------------------------------------===// // TargetLowering Implementation //===----------------------------------------------------------------------===// Modified: llvm/trunk/lib/Target/PTX/PTXRegisterInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXRegisterInfo.td?rev=140310&r1=140309&r2=140310&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXRegisterInfo.td (original) +++ llvm/trunk/lib/Target/PTX/PTXRegisterInfo.td Thu Sep 22 11:45:48 2011 @@ -20,536 +20,18 @@ // Registers //===----------------------------------------------------------------------===// -///===- Predicate Registers -----------------------------------------------===// - -def P0 : PTXReg<"p0">; -def P1 : PTXReg<"p1">; -def P2 : PTXReg<"p2">; -def P3 : PTXReg<"p3">; -def P4 : PTXReg<"p4">; -def P5 : PTXReg<"p5">; -def P6 : PTXReg<"p6">; -def P7 : PTXReg<"p7">; -def P8 : PTXReg<"p8">; -def P9 : PTXReg<"p9">; -def P10 : PTXReg<"p10">; -def P11 : PTXReg<"p11">; -def P12 : PTXReg<"p12">; -def P13 : PTXReg<"p13">; -def P14 : PTXReg<"p14">; -def P15 : PTXReg<"p15">; -def P16 : PTXReg<"p16">; -def P17 : PTXReg<"p17">; -def P18 : PTXReg<"p18">; -def P19 : PTXReg<"p19">; -def P20 : PTXReg<"p20">; -def P21 : PTXReg<"p21">; -def P22 : PTXReg<"p22">; -def P23 : PTXReg<"p23">; -def P24 : PTXReg<"p24">; -def P25 : PTXReg<"p25">; -def P26 : PTXReg<"p26">; -def P27 : PTXReg<"p27">; -def P28 : PTXReg<"p28">; -def P29 : PTXReg<"p29">; -def P30 : PTXReg<"p30">; -def P31 : PTXReg<"p31">; -def P32 : PTXReg<"p32">; -def P33 : PTXReg<"p33">; -def P34 : PTXReg<"p34">; -def P35 : PTXReg<"p35">; -def P36 : PTXReg<"p36">; -def P37 : PTXReg<"p37">; -def P38 : PTXReg<"p38">; -def P39 : PTXReg<"p39">; -def P40 : PTXReg<"p40">; -def P41 : PTXReg<"p41">; -def P42 : PTXReg<"p42">; -def P43 : PTXReg<"p43">; -def P44 : PTXReg<"p44">; -def P45 : PTXReg<"p45">; -def P46 : PTXReg<"p46">; -def P47 : PTXReg<"p47">; -def P48 : PTXReg<"p48">; -def P49 : PTXReg<"p49">; -def P50 : PTXReg<"p50">; -def P51 : PTXReg<"p51">; -def P52 : PTXReg<"p52">; -def P53 : PTXReg<"p53">; -def P54 : PTXReg<"p54">; -def P55 : PTXReg<"p55">; -def P56 : PTXReg<"p56">; -def P57 : PTXReg<"p57">; -def P58 : PTXReg<"p58">; -def P59 : PTXReg<"p59">; -def P60 : PTXReg<"p60">; -def P61 : PTXReg<"p61">; -def P62 : PTXReg<"p62">; -def P63 : PTXReg<"p63">; -def P64 : PTXReg<"p64">; -def P65 : PTXReg<"p65">; -def P66 : PTXReg<"p66">; -def P67 : PTXReg<"p67">; -def P68 : PTXReg<"p68">; -def P69 : PTXReg<"p69">; -def P70 : PTXReg<"p70">; -def P71 : PTXReg<"p71">; -def P72 : PTXReg<"p72">; -def P73 : PTXReg<"p73">; -def P74 : PTXReg<"p74">; -def P75 : PTXReg<"p75">; -def P76 : PTXReg<"p76">; -def P77 : PTXReg<"p77">; -def P78 : PTXReg<"p78">; -def P79 : PTXReg<"p79">; -def P80 : PTXReg<"p80">; -def P81 : PTXReg<"p81">; -def P82 : PTXReg<"p82">; -def P83 : PTXReg<"p83">; -def P84 : PTXReg<"p84">; -def P85 : PTXReg<"p85">; -def P86 : PTXReg<"p86">; -def P87 : PTXReg<"p87">; -def P88 : PTXReg<"p88">; -def P89 : PTXReg<"p89">; -def P90 : PTXReg<"p90">; -def P91 : PTXReg<"p91">; -def P92 : PTXReg<"p92">; -def P93 : PTXReg<"p93">; -def P94 : PTXReg<"p94">; -def P95 : PTXReg<"p95">; -def P96 : PTXReg<"p96">; -def P97 : PTXReg<"p97">; -def P98 : PTXReg<"p98">; -def P99 : PTXReg<"p99">; -def P100 : PTXReg<"p100">; -def P101 : PTXReg<"p101">; -def P102 : PTXReg<"p102">; -def P103 : PTXReg<"p103">; -def P104 : PTXReg<"p104">; -def P105 : PTXReg<"p105">; -def P106 : PTXReg<"p106">; -def P107 : PTXReg<"p107">; -def P108 : PTXReg<"p108">; -def P109 : PTXReg<"p109">; -def P110 : PTXReg<"p110">; -def P111 : PTXReg<"p111">; -def P112 : PTXReg<"p112">; -def P113 : PTXReg<"p113">; -def P114 : PTXReg<"p114">; -def P115 : PTXReg<"p115">; -def P116 : PTXReg<"p116">; -def P117 : PTXReg<"p117">; -def P118 : PTXReg<"p118">; -def P119 : PTXReg<"p119">; -def P120 : PTXReg<"p120">; -def P121 : PTXReg<"p121">; -def P122 : PTXReg<"p122">; -def P123 : PTXReg<"p123">; -def P124 : PTXReg<"p124">; -def P125 : PTXReg<"p125">; -def P126 : PTXReg<"p126">; -def P127 : PTXReg<"p127">; - -///===- 16-Bit Registers --------------------------------------------------===// - -def RH0 : PTXReg<"rh0">; -def RH1 : PTXReg<"rh1">; -def RH2 : PTXReg<"rh2">; -def RH3 : PTXReg<"rh3">; -def RH4 : PTXReg<"rh4">; -def RH5 : PTXReg<"rh5">; -def RH6 : PTXReg<"rh6">; -def RH7 : PTXReg<"rh7">; -def RH8 : PTXReg<"rh8">; -def RH9 : PTXReg<"rh9">; -def RH10 : PTXReg<"rh10">; -def RH11 : PTXReg<"rh11">; -def RH12 : PTXReg<"rh12">; -def RH13 : PTXReg<"rh13">; -def RH14 : PTXReg<"rh14">; -def RH15 : PTXReg<"rh15">; -def RH16 : PTXReg<"rh16">; -def RH17 : PTXReg<"rh17">; -def RH18 : PTXReg<"rh18">; -def RH19 : PTXReg<"rh19">; -def RH20 : PTXReg<"rh20">; -def RH21 : PTXReg<"rh21">; -def RH22 : PTXReg<"rh22">; -def RH23 : PTXReg<"rh23">; -def RH24 : PTXReg<"rh24">; -def RH25 : PTXReg<"rh25">; -def RH26 : PTXReg<"rh26">; -def RH27 : PTXReg<"rh27">; -def RH28 : PTXReg<"rh28">; -def RH29 : PTXReg<"rh29">; -def RH30 : PTXReg<"rh30">; -def RH31 : PTXReg<"rh31">; -def RH32 : PTXReg<"rh32">; -def RH33 : PTXReg<"rh33">; -def RH34 : PTXReg<"rh34">; -def RH35 : PTXReg<"rh35">; -def RH36 : PTXReg<"rh36">; -def RH37 : PTXReg<"rh37">; -def RH38 : PTXReg<"rh38">; -def RH39 : PTXReg<"rh39">; -def RH40 : PTXReg<"rh40">; -def RH41 : PTXReg<"rh41">; -def RH42 : PTXReg<"rh42">; -def RH43 : PTXReg<"rh43">; -def RH44 : PTXReg<"rh44">; -def RH45 : PTXReg<"rh45">; -def RH46 : PTXReg<"rh46">; -def RH47 : PTXReg<"rh47">; -def RH48 : PTXReg<"rh48">; -def RH49 : PTXReg<"rh49">; -def RH50 : PTXReg<"rh50">; -def RH51 : PTXReg<"rh51">; -def RH52 : PTXReg<"rh52">; -def RH53 : PTXReg<"rh53">; -def RH54 : PTXReg<"rh54">; -def RH55 : PTXReg<"rh55">; -def RH56 : PTXReg<"rh56">; -def RH57 : PTXReg<"rh57">; -def RH58 : PTXReg<"rh58">; -def RH59 : PTXReg<"rh59">; -def RH60 : PTXReg<"rh60">; -def RH61 : PTXReg<"rh61">; -def RH62 : PTXReg<"rh62">; -def RH63 : PTXReg<"rh63">; -def RH64 : PTXReg<"rh64">; -def RH65 : PTXReg<"rh65">; -def RH66 : PTXReg<"rh66">; -def RH67 : PTXReg<"rh67">; -def RH68 : PTXReg<"rh68">; -def RH69 : PTXReg<"rh69">; -def RH70 : PTXReg<"rh70">; -def RH71 : PTXReg<"rh71">; -def RH72 : PTXReg<"rh72">; -def RH73 : PTXReg<"rh73">; -def RH74 : PTXReg<"rh74">; -def RH75 : PTXReg<"rh75">; -def RH76 : PTXReg<"rh76">; -def RH77 : PTXReg<"rh77">; -def RH78 : PTXReg<"rh78">; -def RH79 : PTXReg<"rh79">; -def RH80 : PTXReg<"rh80">; -def RH81 : PTXReg<"rh81">; -def RH82 : PTXReg<"rh82">; -def RH83 : PTXReg<"rh83">; -def RH84 : PTXReg<"rh84">; -def RH85 : PTXReg<"rh85">; -def RH86 : PTXReg<"rh86">; -def RH87 : PTXReg<"rh87">; -def RH88 : PTXReg<"rh88">; -def RH89 : PTXReg<"rh89">; -def RH90 : PTXReg<"rh90">; -def RH91 : PTXReg<"rh91">; -def RH92 : PTXReg<"rh92">; -def RH93 : PTXReg<"rh93">; -def RH94 : PTXReg<"rh94">; -def RH95 : PTXReg<"rh95">; -def RH96 : PTXReg<"rh96">; -def RH97 : PTXReg<"rh97">; -def RH98 : PTXReg<"rh98">; -def RH99 : PTXReg<"rh99">; -def RH100 : PTXReg<"rh100">; -def RH101 : PTXReg<"rh101">; -def RH102 : PTXReg<"rh102">; -def RH103 : PTXReg<"rh103">; -def RH104 : PTXReg<"rh104">; -def RH105 : PTXReg<"rh105">; -def RH106 : PTXReg<"rh106">; -def RH107 : PTXReg<"rh107">; -def RH108 : PTXReg<"rh108">; -def RH109 : PTXReg<"rh109">; -def RH110 : PTXReg<"rh110">; -def RH111 : PTXReg<"rh111">; -def RH112 : PTXReg<"rh112">; -def RH113 : PTXReg<"rh113">; -def RH114 : PTXReg<"rh114">; -def RH115 : PTXReg<"rh115">; -def RH116 : PTXReg<"rh116">; -def RH117 : PTXReg<"rh117">; -def RH118 : PTXReg<"rh118">; -def RH119 : PTXReg<"rh119">; -def RH120 : PTXReg<"rh120">; -def RH121 : PTXReg<"rh121">; -def RH122 : PTXReg<"rh122">; -def RH123 : PTXReg<"rh123">; -def RH124 : PTXReg<"rh124">; -def RH125 : PTXReg<"rh125">; -def RH126 : PTXReg<"rh126">; -def RH127 : PTXReg<"rh127">; - -///===- 32-Bit Registers --------------------------------------------------===// - -def R0 : PTXReg<"r0">; -def R1 : PTXReg<"r1">; -def R2 : PTXReg<"r2">; -def R3 : PTXReg<"r3">; -def R4 : PTXReg<"r4">; -def R5 : PTXReg<"r5">; -def R6 : PTXReg<"r6">; -def R7 : PTXReg<"r7">; -def R8 : PTXReg<"r8">; -def R9 : PTXReg<"r9">; -def R10 : PTXReg<"r10">; -def R11 : PTXReg<"r11">; -def R12 : PTXReg<"r12">; -def R13 : PTXReg<"r13">; -def R14 : PTXReg<"r14">; -def R15 : PTXReg<"r15">; -def R16 : PTXReg<"r16">; -def R17 : PTXReg<"r17">; -def R18 : PTXReg<"r18">; -def R19 : PTXReg<"r19">; -def R20 : PTXReg<"r20">; -def R21 : PTXReg<"r21">; -def R22 : PTXReg<"r22">; -def R23 : PTXReg<"r23">; -def R24 : PTXReg<"r24">; -def R25 : PTXReg<"r25">; -def R26 : PTXReg<"r26">; -def R27 : PTXReg<"r27">; -def R28 : PTXReg<"r28">; -def R29 : PTXReg<"r29">; -def R30 : PTXReg<"r30">; -def R31 : PTXReg<"r31">; -def R32 : PTXReg<"r32">; -def R33 : PTXReg<"r33">; -def R34 : PTXReg<"r34">; -def R35 : PTXReg<"r35">; -def R36 : PTXReg<"r36">; -def R37 : PTXReg<"r37">; -def R38 : PTXReg<"r38">; -def R39 : PTXReg<"r39">; -def R40 : PTXReg<"r40">; -def R41 : PTXReg<"r41">; -def R42 : PTXReg<"r42">; -def R43 : PTXReg<"r43">; -def R44 : PTXReg<"r44">; -def R45 : PTXReg<"r45">; -def R46 : PTXReg<"r46">; -def R47 : PTXReg<"r47">; -def R48 : PTXReg<"r48">; -def R49 : PTXReg<"r49">; -def R50 : PTXReg<"r50">; -def R51 : PTXReg<"r51">; -def R52 : PTXReg<"r52">; -def R53 : PTXReg<"r53">; -def R54 : PTXReg<"r54">; -def R55 : PTXReg<"r55">; -def R56 : PTXReg<"r56">; -def R57 : PTXReg<"r57">; -def R58 : PTXReg<"r58">; -def R59 : PTXReg<"r59">; -def R60 : PTXReg<"r60">; -def R61 : PTXReg<"r61">; -def R62 : PTXReg<"r62">; -def R63 : PTXReg<"r63">; -def R64 : PTXReg<"r64">; -def R65 : PTXReg<"r65">; -def R66 : PTXReg<"r66">; -def R67 : PTXReg<"r67">; -def R68 : PTXReg<"r68">; -def R69 : PTXReg<"r69">; -def R70 : PTXReg<"r70">; -def R71 : PTXReg<"r71">; -def R72 : PTXReg<"r72">; -def R73 : PTXReg<"r73">; -def R74 : PTXReg<"r74">; -def R75 : PTXReg<"r75">; -def R76 : PTXReg<"r76">; -def R77 : PTXReg<"r77">; -def R78 : PTXReg<"r78">; -def R79 : PTXReg<"r79">; -def R80 : PTXReg<"r80">; -def R81 : PTXReg<"r81">; -def R82 : PTXReg<"r82">; -def R83 : PTXReg<"r83">; -def R84 : PTXReg<"r84">; -def R85 : PTXReg<"r85">; -def R86 : PTXReg<"r86">; -def R87 : PTXReg<"r87">; -def R88 : PTXReg<"r88">; -def R89 : PTXReg<"r89">; -def R90 : PTXReg<"r90">; -def R91 : PTXReg<"r91">; -def R92 : PTXReg<"r92">; -def R93 : PTXReg<"r93">; -def R94 : PTXReg<"r94">; -def R95 : PTXReg<"r95">; -def R96 : PTXReg<"r96">; -def R97 : PTXReg<"r97">; -def R98 : PTXReg<"r98">; -def R99 : PTXReg<"r99">; -def R100 : PTXReg<"r100">; -def R101 : PTXReg<"r101">; -def R102 : PTXReg<"r102">; -def R103 : PTXReg<"r103">; -def R104 : PTXReg<"r104">; -def R105 : PTXReg<"r105">; -def R106 : PTXReg<"r106">; -def R107 : PTXReg<"r107">; -def R108 : PTXReg<"r108">; -def R109 : PTXReg<"r109">; -def R110 : PTXReg<"r110">; -def R111 : PTXReg<"r111">; -def R112 : PTXReg<"r112">; -def R113 : PTXReg<"r113">; -def R114 : PTXReg<"r114">; -def R115 : PTXReg<"r115">; -def R116 : PTXReg<"r116">; -def R117 : PTXReg<"r117">; -def R118 : PTXReg<"r118">; -def R119 : PTXReg<"r119">; -def R120 : PTXReg<"r120">; -def R121 : PTXReg<"r121">; -def R122 : PTXReg<"r122">; -def R123 : PTXReg<"r123">; -def R124 : PTXReg<"r124">; -def R125 : PTXReg<"r125">; -def R126 : PTXReg<"r126">; -def R127 : PTXReg<"r127">; - -///===- 64-Bit Registers --------------------------------------------------===// - -def RD0 : PTXReg<"rd0">; -def RD1 : PTXReg<"rd1">; -def RD2 : PTXReg<"rd2">; -def RD3 : PTXReg<"rd3">; -def RD4 : PTXReg<"rd4">; -def RD5 : PTXReg<"rd5">; -def RD6 : PTXReg<"rd6">; -def RD7 : PTXReg<"rd7">; -def RD8 : PTXReg<"rd8">; -def RD9 : PTXReg<"rd9">; -def RD10 : PTXReg<"rd10">; -def RD11 : PTXReg<"rd11">; -def RD12 : PTXReg<"rd12">; -def RD13 : PTXReg<"rd13">; -def RD14 : PTXReg<"rd14">; -def RD15 : PTXReg<"rd15">; -def RD16 : PTXReg<"rd16">; -def RD17 : PTXReg<"rd17">; -def RD18 : PTXReg<"rd18">; -def RD19 : PTXReg<"rd19">; -def RD20 : PTXReg<"rd20">; -def RD21 : PTXReg<"rd21">; -def RD22 : PTXReg<"rd22">; -def RD23 : PTXReg<"rd23">; -def RD24 : PTXReg<"rd24">; -def RD25 : PTXReg<"rd25">; -def RD26 : PTXReg<"rd26">; -def RD27 : PTXReg<"rd27">; -def RD28 : PTXReg<"rd28">; -def RD29 : PTXReg<"rd29">; -def RD30 : PTXReg<"rd30">; -def RD31 : PTXReg<"rd31">; -def RD32 : PTXReg<"rd32">; -def RD33 : PTXReg<"rd33">; -def RD34 : PTXReg<"rd34">; -def RD35 : PTXReg<"rd35">; -def RD36 : PTXReg<"rd36">; -def RD37 : PTXReg<"rd37">; -def RD38 : PTXReg<"rd38">; -def RD39 : PTXReg<"rd39">; -def RD40 : PTXReg<"rd40">; -def RD41 : PTXReg<"rd41">; -def RD42 : PTXReg<"rd42">; -def RD43 : PTXReg<"rd43">; -def RD44 : PTXReg<"rd44">; -def RD45 : PTXReg<"rd45">; -def RD46 : PTXReg<"rd46">; -def RD47 : PTXReg<"rd47">; -def RD48 : PTXReg<"rd48">; -def RD49 : PTXReg<"rd49">; -def RD50 : PTXReg<"rd50">; -def RD51 : PTXReg<"rd51">; -def RD52 : PTXReg<"rd52">; -def RD53 : PTXReg<"rd53">; -def RD54 : PTXReg<"rd54">; -def RD55 : PTXReg<"rd55">; -def RD56 : PTXReg<"rd56">; -def RD57 : PTXReg<"rd57">; -def RD58 : PTXReg<"rd58">; -def RD59 : PTXReg<"rd59">; -def RD60 : PTXReg<"rd60">; -def RD61 : PTXReg<"rd61">; -def RD62 : PTXReg<"rd62">; -def RD63 : PTXReg<"rd63">; -def RD64 : PTXReg<"rd64">; -def RD65 : PTXReg<"rd65">; -def RD66 : PTXReg<"rd66">; -def RD67 : PTXReg<"rd67">; -def RD68 : PTXReg<"rd68">; -def RD69 : PTXReg<"rd69">; -def RD70 : PTXReg<"rd70">; -def RD71 : PTXReg<"rd71">; -def RD72 : PTXReg<"rd72">; -def RD73 : PTXReg<"rd73">; -def RD74 : PTXReg<"rd74">; -def RD75 : PTXReg<"rd75">; -def RD76 : PTXReg<"rd76">; -def RD77 : PTXReg<"rd77">; -def RD78 : PTXReg<"rd78">; -def RD79 : PTXReg<"rd79">; -def RD80 : PTXReg<"rd80">; -def RD81 : PTXReg<"rd81">; -def RD82 : PTXReg<"rd82">; -def RD83 : PTXReg<"rd83">; -def RD84 : PTXReg<"rd84">; -def RD85 : PTXReg<"rd85">; -def RD86 : PTXReg<"rd86">; -def RD87 : PTXReg<"rd87">; -def RD88 : PTXReg<"rd88">; -def RD89 : PTXReg<"rd89">; -def RD90 : PTXReg<"rd90">; -def RD91 : PTXReg<"rd91">; -def RD92 : PTXReg<"rd92">; -def RD93 : PTXReg<"rd93">; -def RD94 : PTXReg<"rd94">; -def RD95 : PTXReg<"rd95">; -def RD96 : PTXReg<"rd96">; -def RD97 : PTXReg<"rd97">; -def RD98 : PTXReg<"rd98">; -def RD99 : PTXReg<"rd99">; -def RD100 : PTXReg<"rd100">; -def RD101 : PTXReg<"rd101">; -def RD102 : PTXReg<"rd102">; -def RD103 : PTXReg<"rd103">; -def RD104 : PTXReg<"rd104">; -def RD105 : PTXReg<"rd105">; -def RD106 : PTXReg<"rd106">; -def RD107 : PTXReg<"rd107">; -def RD108 : PTXReg<"rd108">; -def RD109 : PTXReg<"rd109">; -def RD110 : PTXReg<"rd110">; -def RD111 : PTXReg<"rd111">; -def RD112 : PTXReg<"rd112">; -def RD113 : PTXReg<"rd113">; -def RD114 : PTXReg<"rd114">; -def RD115 : PTXReg<"rd115">; -def RD116 : PTXReg<"rd116">; -def RD117 : PTXReg<"rd117">; -def RD118 : PTXReg<"rd118">; -def RD119 : PTXReg<"rd119">; -def RD120 : PTXReg<"rd120">; -def RD121 : PTXReg<"rd121">; -def RD122 : PTXReg<"rd122">; -def RD123 : PTXReg<"rd123">; -def RD124 : PTXReg<"rd124">; -def RD125 : PTXReg<"rd125">; -def RD126 : PTXReg<"rd126">; -def RD127 : PTXReg<"rd127">; +// The generated register info code throws warnings for empty register classes +// (e.g. zero-length arrays), so we use a dummy register here just to prevent +// these warnings. +def DUMMY_REG : PTXReg<"R0">; //===----------------------------------------------------------------------===// // Register classes //===----------------------------------------------------------------------===// -def RegPred : RegisterClass<"PTX", [i1], 8, (sequence "P%u", 0, 127)>; -def RegI16 : RegisterClass<"PTX", [i16], 16, (sequence "RH%u", 0, 127)>; -def RegI32 : RegisterClass<"PTX", [i32], 32, (sequence "R%u", 0, 127)>; -def RegI64 : RegisterClass<"PTX", [i64], 64, (sequence "RD%u", 0, 127)>; -def RegF32 : RegisterClass<"PTX", [f32], 32, (sequence "R%u", 0, 127)>; -def RegF64 : RegisterClass<"PTX", [f64], 64, (sequence "RD%u", 0, 127)>; +def RegPred : RegisterClass<"PTX", [i1], 8, (add DUMMY_REG)>; +def RegI16 : RegisterClass<"PTX", [i16], 16, (add DUMMY_REG)>; +def RegI32 : RegisterClass<"PTX", [i32], 32, (add DUMMY_REG)>; +def RegI64 : RegisterClass<"PTX", [i64], 64, (add DUMMY_REG)>; +def RegF32 : RegisterClass<"PTX", [f32], 32, (add DUMMY_REG)>; +def RegF64 : RegisterClass<"PTX", [f64], 64, (add DUMMY_REG)>; + From justin.holewinski at gmail.com Thu Sep 22 11:45:51 2011 From: justin.holewinski at gmail.com (Justin Holewinski) Date: Thu, 22 Sep 2011 16:45:51 -0000 Subject: [llvm-commits] [llvm] r140311 - in /llvm/trunk/test/CodeGen/PTX: add.ll aggregates.ll bitwise.ll bra.ll cvt.ll fdiv-sm10.ll fdiv-sm13.ll fneg.ll intrinsic.ll ld.ll llvm-intrinsic.ll mad.ll mov.ll mul.ll parameter-order.ll selp.ll setp.ll shl.ll shr.ll simple-call.ll st.ll sub.ll Message-ID: <20110922164551.D53D62A6C12C@llvm.org> Author: jholewinski Date: Thu Sep 22 11:45:51 2011 New Revision: 140311 URL: http://llvm.org/viewvc/llvm-project?rev=140311&view=rev Log: PTX: fixup test cases for register changes Modified: llvm/trunk/test/CodeGen/PTX/add.ll llvm/trunk/test/CodeGen/PTX/aggregates.ll llvm/trunk/test/CodeGen/PTX/bitwise.ll llvm/trunk/test/CodeGen/PTX/bra.ll llvm/trunk/test/CodeGen/PTX/cvt.ll llvm/trunk/test/CodeGen/PTX/fdiv-sm10.ll llvm/trunk/test/CodeGen/PTX/fdiv-sm13.ll llvm/trunk/test/CodeGen/PTX/fneg.ll llvm/trunk/test/CodeGen/PTX/intrinsic.ll llvm/trunk/test/CodeGen/PTX/ld.ll llvm/trunk/test/CodeGen/PTX/llvm-intrinsic.ll llvm/trunk/test/CodeGen/PTX/mad.ll llvm/trunk/test/CodeGen/PTX/mov.ll llvm/trunk/test/CodeGen/PTX/mul.ll llvm/trunk/test/CodeGen/PTX/parameter-order.ll llvm/trunk/test/CodeGen/PTX/selp.ll llvm/trunk/test/CodeGen/PTX/setp.ll llvm/trunk/test/CodeGen/PTX/shl.ll llvm/trunk/test/CodeGen/PTX/shr.ll llvm/trunk/test/CodeGen/PTX/simple-call.ll llvm/trunk/test/CodeGen/PTX/st.ll llvm/trunk/test/CodeGen/PTX/sub.ll Modified: llvm/trunk/test/CodeGen/PTX/add.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PTX/add.ll?rev=140311&r1=140310&r2=140311&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PTX/add.ll (original) +++ llvm/trunk/test/CodeGen/PTX/add.ll Thu Sep 22 11:45:51 2011 @@ -1,71 +1,71 @@ ; RUN: llc < %s -march=ptx32 | FileCheck %s define ptx_device i16 @t1_u16(i16 %x, i16 %y) { -; CHECK: add.u16 rh{{[0-9]+}}, rh{{[0-9]+}}, rh{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: add.u16 %ret{{[0-9]+}}, %rh{{[0-9]+}}, %rh{{[0-9]+}}; +; CHECK: ret; %z = add i16 %x, %y ret i16 %z } define ptx_device i32 @t1_u32(i32 %x, i32 %y) { -; CHECK: add.u32 r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: add.u32 %ret{{[0-9]+}}, %r{{[0-9]+}}, %r{{[0-9]+}}; +; CHECK: ret; %z = add i32 %x, %y ret i32 %z } define ptx_device i64 @t1_u64(i64 %x, i64 %y) { -; CHECK: add.u64 rd{{[0-9]+}}, rd{{[0-9]+}}, rd{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: add.u64 %ret{{[0-9]+}}, %rd{{[0-9]+}}, %rd{{[0-9]+}}; +; CHECK: ret; %z = add i64 %x, %y ret i64 %z } define ptx_device float @t1_f32(float %x, float %y) { -; CHECK: add.rn.f32 r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}} -; CHECK-NEXT: ret; +; CHECK: add.rn.f32 %ret{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}} +; CHECK: ret; %z = fadd float %x, %y ret float %z } define ptx_device double @t1_f64(double %x, double %y) { -; CHECK: add.rn.f64 rd{{[0-9]+}}, rd{{[0-9]+}}, rd{{[0-9]+}} -; CHECK-NEXT: ret; +; CHECK: add.rn.f64 %ret{{[0-9]+}}, %fd{{[0-9]+}}, %fd{{[0-9]+}} +; CHECK: ret; %z = fadd double %x, %y ret double %z } define ptx_device i16 @t2_u16(i16 %x) { -; CHECK: add.u16 rh{{[0-9]+}}, rh{{[0-9]+}}, 1; -; CHECK-NEXT: ret; +; CHECK: add.u16 %ret{{[0-9]+}}, %rh{{[0-9]+}}, 1; +; CHECK: ret; %z = add i16 %x, 1 ret i16 %z } define ptx_device i32 @t2_u32(i32 %x) { -; CHECK: add.u32 r{{[0-9]+}}, r{{[0-9]+}}, 1; -; CHECK-NEXT: ret; +; CHECK: add.u32 %ret{{[0-9]+}}, %r{{[0-9]+}}, 1; +; CHECK: ret; %z = add i32 %x, 1 ret i32 %z } define ptx_device i64 @t2_u64(i64 %x) { -; CHECK: add.u64 rd{{[0-9]+}}, rd{{[0-9]+}}, 1; -; CHECK-NEXT: ret; +; CHECK: add.u64 %ret{{[0-9]+}}, %rd{{[0-9]+}}, 1; +; CHECK: ret; %z = add i64 %x, 1 ret i64 %z } define ptx_device float @t2_f32(float %x) { -; CHECK: add.rn.f32 r{{[0-9]+}}, r{{[0-9]+}}, 0F3F800000; -; CHECK-NEXT: ret; +; CHECK: add.rn.f32 %ret{{[0-9]+}}, %f{{[0-9]+}}, 0F3F800000; +; CHECK: ret; %z = fadd float %x, 1.0 ret float %z } define ptx_device double @t2_f64(double %x) { -; CHECK: add.rn.f64 rd{{[0-9]+}}, rd{{[0-9]+}}, 0D3FF0000000000000; -; CHECK-NEXT: ret; +; CHECK: add.rn.f64 %ret{{[0-9]+}}, %fd{{[0-9]+}}, 0D3FF0000000000000; +; CHECK: ret; %z = fadd double %x, 1.0 ret double %z } Modified: llvm/trunk/test/CodeGen/PTX/aggregates.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PTX/aggregates.ll?rev=140311&r1=140310&r2=140311&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PTX/aggregates.ll (original) +++ llvm/trunk/test/CodeGen/PTX/aggregates.ll Thu Sep 22 11:45:51 2011 @@ -1,4 +1,5 @@ ; RUN: llc < %s -march=ptx32 -mattr=sm20 | FileCheck %s +; XFAIL: * %complex = type { float, float } Modified: llvm/trunk/test/CodeGen/PTX/bitwise.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PTX/bitwise.ll?rev=140311&r1=140310&r2=140311&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PTX/bitwise.ll (original) +++ llvm/trunk/test/CodeGen/PTX/bitwise.ll Thu Sep 22 11:45:51 2011 @@ -3,21 +3,21 @@ ; preds define ptx_device i32 @t1_and_preds(i1 %x, i1 %y) { -; CHECK: and.pred p{{[0-9]+}}, p{{[0-9]+}}, p{{[0-9]+}} +; CHECK: and.pred %p{{[0-9]+}}, %p{{[0-9]+}}, %p{{[0-9]+}} %c = and i1 %x, %y %d = zext i1 %c to i32 ret i32 %d } define ptx_device i32 @t1_or_preds(i1 %x, i1 %y) { -; CHECK: or.pred p{{[0-9]+}}, p{{[0-9]+}}, p{{[0-9]+}} +; CHECK: or.pred %p{{[0-9]+}}, %p{{[0-9]+}}, %p{{[0-9]+}} %a = or i1 %x, %y %b = zext i1 %a to i32 ret i32 %b } define ptx_device i32 @t1_xor_preds(i1 %x, i1 %y) { -; CHECK: xor.pred p{{[0-9]+}}, p{{[0-9]+}}, p{{[0-9]+}} +; CHECK: xor.pred %p{{[0-9]+}}, %p{{[0-9]+}}, %p{{[0-9]+}} %a = xor i1 %x, %y %b = zext i1 %a to i32 ret i32 %b Modified: llvm/trunk/test/CodeGen/PTX/bra.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PTX/bra.ll?rev=140311&r1=140310&r2=140311&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PTX/bra.ll (original) +++ llvm/trunk/test/CodeGen/PTX/bra.ll Thu Sep 22 11:45:51 2011 @@ -10,15 +10,15 @@ define ptx_device i32 @test_bra_cond_direct(i32 %x, i32 %y) { entry: -; CHECK: setp.le.u32 p0, r[[R0:[0-9]+]], r[[R1:[0-9]+]] +; CHECK: setp.le.u32 %p0, %r[[R0:[0-9]+]], %r[[R1:[0-9]+]] %p = icmp ugt i32 %x, %y -; CHECK-NEXT: @p0 bra +; CHECK-NEXT: @%p0 bra ; CHECK-NOT: bra br i1 %p, label %clause.if, label %clause.else clause.if: -; CHECK: mov.u32 r{{[0-9]+}}, r[[R0]] +; CHECK: mov.u32 %ret{{[0-9]+}}, %r[[R0]] ret i32 %x clause.else: -; CHECK: mov.u32 r{{[0-9]+}}, r[[R1]] +; CHECK: mov.u32 %ret{{[0-9]+}}, %r[[R1]] ret i32 %y } Modified: llvm/trunk/test/CodeGen/PTX/cvt.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PTX/cvt.ll?rev=140311&r1=140310&r2=140311&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PTX/cvt.ll (original) +++ llvm/trunk/test/CodeGen/PTX/cvt.ll Thu Sep 22 11:45:51 2011 @@ -4,10 +4,10 @@ ; (note: we convert back to i32 to return) define ptx_device i32 @cvt_pred_i16(i16 %x, i1 %y) { -; CHECK: setp.gt.u16 p[[P0:[0-9]+]], rh{{[0-9]+}}, 0 -; CHECK-NEXT: and.pred p0, p[[P0:[0-9]+]], p{{[0-9]+}}; -; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0:[0-9]+]]; -; CHECK-NEXT: ret; +; CHECK: setp.gt.u16 %p[[P0:[0-9]+]], %rh{{[0-9]+}}, 0 +; CHECK: and.pred %p2, %p[[P0:[0-9]+]], %p{{[0-9]+}}; +; CHECK: selp.u32 %ret{{[0-9]+}}, 1, 0, %p[[P0:[0-9]+]]; +; CHECK: ret; %a = trunc i16 %x to i1 %b = and i1 %a, %y %c = zext i1 %b to i32 @@ -15,10 +15,10 @@ } define ptx_device i32 @cvt_pred_i32(i32 %x, i1 %y) { -; CHECK: setp.gt.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, 0 -; CHECK-NEXT: and.pred p0, p[[P0:[0-9]+]], p{{[0-9]+}}; -; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0:[0-9]+]]; -; CHECK-NEXT: ret; +; CHECK: setp.gt.u32 %p[[P0:[0-9]+]], %r{{[0-9]+}}, 0 +; CHECK: and.pred %p2, %p[[P0:[0-9]+]], %p{{[0-9]+}}; +; CHECK: selp.u32 %ret{{[0-9]+}}, 1, 0, %p[[P0:[0-9]+]]; +; CHECK: ret; %a = trunc i32 %x to i1 %b = and i1 %a, %y %c = zext i1 %b to i32 @@ -26,10 +26,10 @@ } define ptx_device i32 @cvt_pred_i64(i64 %x, i1 %y) { -; CHECK: setp.gt.u64 p[[P0:[0-9]+]], rd{{[0-9]+}}, 0 -; CHECK-NEXT: and.pred p0, p[[P0:[0-9]+]], p{{[0-9]+}}; -; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0:[0-9]+]]; -; CHECK-NEXT: ret; +; CHECK: setp.gt.u64 %p[[P0:[0-9]+]], %rd{{[0-9]+}}, 0 +; CHECK: and.pred %p2, %p[[P0:[0-9]+]], %p{{[0-9]+}}; +; CHECK: selp.u32 %ret{{[0-9]+}}, 1, 0, %p[[P0:[0-9]+]]; +; CHECK: ret; %a = trunc i64 %x to i1 %b = and i1 %a, %y %c = zext i1 %b to i32 @@ -37,10 +37,10 @@ } define ptx_device i32 @cvt_pred_f32(float %x, i1 %y) { -; CHECK: setp.gt.f32 p[[P0:[0-9]+]], r{{[0-9]+}}, 0 -; CHECK-NEXT: and.pred p0, p[[P0:[0-9]+]], p{{[0-9]+}}; -; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0:[0-9]+]]; -; CHECK-NEXT: ret; +; CHECK: setp.gt.f32 %p[[P0:[0-9]+]], %f{{[0-9]+}}, 0 +; CHECK: and.pred %p2, %p[[P0:[0-9]+]], %p{{[0-9]+}}; +; CHECK: selp.u32 %ret{{[0-9]+}}, 1, 0, %p[[P0:[0-9]+]]; +; CHECK: ret; %a = fptoui float %x to i1 %b = and i1 %a, %y %c = zext i1 %b to i32 @@ -48,10 +48,10 @@ } define ptx_device i32 @cvt_pred_f64(double %x, i1 %y) { -; CHECK: setp.gt.f64 p[[P0:[0-9]+]], rd{{[0-9]+}}, 0 -; CHECK-NEXT: and.pred p0, p[[P0:[0-9]+]], p{{[0-9]+}}; -; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0:[0-9]+]]; -; CHECK-NEXT: ret; +; CHECK: setp.gt.f64 %p[[P0:[0-9]+]], %fd{{[0-9]+}}, 0 +; CHECK: and.pred %p2, %p[[P0:[0-9]+]], %p{{[0-9]+}}; +; CHECK: selp.u32 %ret{{[0-9]+}}, 1, 0, %p[[P0:[0-9]+]]; +; CHECK: ret; %a = fptoui double %x to i1 %b = and i1 %a, %y %c = zext i1 %b to i32 @@ -61,36 +61,36 @@ ; i16 define ptx_device i16 @cvt_i16_preds(i1 %x) { -; CHECK: selp.u16 rh{{[0-9]+}}, 1, 0, p{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: selp.u16 %ret{{[0-9]+}}, 1, 0, %p{{[0-9]+}}; +; CHECK: ret; %a = zext i1 %x to i16 ret i16 %a } define ptx_device i16 @cvt_i16_i32(i32 %x) { -; CHECK: cvt.u16.u32 rh{{[0-9]+}}, r{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: cvt.u16.u32 %ret{{[0-9]+}}, %r{{[0-9]+}}; +; CHECK: ret; %a = trunc i32 %x to i16 ret i16 %a } define ptx_device i16 @cvt_i16_i64(i64 %x) { -; CHECK: cvt.u16.u64 rh{{[0-9]+}}, rd{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: cvt.u16.u64 %ret{{[0-9]+}}, %rd{{[0-9]+}}; +; CHECK: ret; %a = trunc i64 %x to i16 ret i16 %a } define ptx_device i16 @cvt_i16_f32(float %x) { -; CHECK: cvt.rzi.u16.f32 rh{{[0-9]+}}, r{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: cvt.rzi.u16.f32 %ret{{[0-9]+}}, %f{{[0-9]+}}; +; CHECK: ret; %a = fptoui float %x to i16 ret i16 %a } define ptx_device i16 @cvt_i16_f64(double %x) { -; CHECK: cvt.rzi.u16.f64 rh{{[0-9]+}}, rd{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: cvt.rzi.u16.f64 %ret{{[0-9]+}}, %fd{{[0-9]+}}; +; CHECK: ret; %a = fptoui double %x to i16 ret i16 %a } @@ -98,36 +98,36 @@ ; i32 define ptx_device i32 @cvt_i32_preds(i1 %x) { -; CHECK: selp.u32 r{{[0-9]+}}, 1, 0, p{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: selp.u32 %ret{{[0-9]+}}, 1, 0, %p{{[0-9]+}}; +; CHECK: ret; %a = zext i1 %x to i32 ret i32 %a } define ptx_device i32 @cvt_i32_i16(i16 %x) { -; CHECK: cvt.u32.u16 r{{[0-9]+}}, rh{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: cvt.u32.u16 %ret{{[0-9]+}}, %rh{{[0-9]+}}; +; CHECK: ret; %a = zext i16 %x to i32 ret i32 %a } define ptx_device i32 @cvt_i32_i64(i64 %x) { -; CHECK: cvt.u32.u64 r{{[0-9]+}}, rd{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: cvt.u32.u64 %ret{{[0-9]+}}, %rd{{[0-9]+}}; +; CHECK: ret; %a = trunc i64 %x to i32 ret i32 %a } define ptx_device i32 @cvt_i32_f32(float %x) { -; CHECK: cvt.rzi.u32.f32 r{{[0-9]+}}, r{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: cvt.rzi.u32.f32 %ret{{[0-9]+}}, %f{{[0-9]+}}; +; CHECK: ret; %a = fptoui float %x to i32 ret i32 %a } define ptx_device i32 @cvt_i32_f64(double %x) { -; CHECK: cvt.rzi.u32.f64 r{{[0-9]+}}, rd{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: cvt.rzi.u32.f64 %ret{{[0-9]+}}, %fd{{[0-9]+}}; +; CHECK: ret; %a = fptoui double %x to i32 ret i32 %a } @@ -135,35 +135,35 @@ ; i64 define ptx_device i64 @cvt_i64_preds(i1 %x) { -; CHECK: selp.u64 rd{{[0-9]+}}, 1, 0, p{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: selp.u64 %ret{{[0-9]+}}, 1, 0, %p{{[0-9]+}}; +; CHECK: ret; %a = zext i1 %x to i64 ret i64 %a } define ptx_device i64 @cvt_i64_i16(i16 %x) { -; CHECK: cvt.u64.u16 rd{{[0-9]+}}, rh{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: cvt.u64.u16 %ret{{[0-9]+}}, %rh{{[0-9]+}}; +; CHECK: ret; %a = zext i16 %x to i64 ret i64 %a } define ptx_device i64 @cvt_i64_i32(i32 %x) { -; CHECK: cvt.u64.u32 rd{{[0-9]+}}, r{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: cvt.u64.u32 %ret{{[0-9]+}}, %r{{[0-9]+}}; +; CHECK: ret; %a = zext i32 %x to i64 ret i64 %a } define ptx_device i64 @cvt_i64_f32(float %x) { -; CHECK: cvt.rzi.u64.f32 rd{{[0-9]+}}, r{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: cvt.rzi.u64.f32 %ret{{[0-9]+}}, %f{{[0-9]+}}; +; CHECK: ret; %a = fptoui float %x to i64 ret i64 %a } define ptx_device i64 @cvt_i64_f64(double %x) { -; CHECK: cvt.rzi.u64.f64 rd{{[0-9]+}}, rd{{[0-9]+}}; +; CHECK: cvt.rzi.u64.f64 %ret{{[0-9]+}}, %fd{{[0-9]+}}; ; CHECK: ret; %a = fptoui double %x to i64 ret i64 %a @@ -172,36 +172,36 @@ ; f32 define ptx_device float @cvt_f32_preds(i1 %x) { -; CHECK: selp.f32 r{{[0-9]+}}, 0F3F800000, 0F00000000, p{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: selp.f32 %ret{{[0-9]+}}, 0F3F800000, 0F00000000, %p{{[0-9]+}}; +; CHECK: ret; %a = uitofp i1 %x to float ret float %a } define ptx_device float @cvt_f32_i16(i16 %x) { -; CHECK: cvt.rn.f32.u16 r{{[0-9]+}}, rh{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: cvt.rn.f32.u16 %ret{{[0-9]+}}, %rh{{[0-9]+}}; +; CHECK: ret; %a = uitofp i16 %x to float ret float %a } define ptx_device float @cvt_f32_i32(i32 %x) { -; CHECK: cvt.rn.f32.u32 r{{[0-9]+}}, r{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: cvt.rn.f32.u32 %ret{{[0-9]+}}, %r{{[0-9]+}}; +; CHECK: ret; %a = uitofp i32 %x to float ret float %a } define ptx_device float @cvt_f32_i64(i64 %x) { -; CHECK: cvt.rn.f32.u64 r{{[0-9]+}}, rd{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: cvt.rn.f32.u64 %ret{{[0-9]+}}, %rd{{[0-9]+}}; +; CHECK: ret; %a = uitofp i64 %x to float ret float %a } define ptx_device float @cvt_f32_f64(double %x) { -; CHECK: cvt.rn.f32.f64 r{{[0-9]+}}, rd{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: cvt.rn.f32.f64 %ret{{[0-9]+}}, %fd{{[0-9]+}}; +; CHECK: ret; %a = fptrunc double %x to float ret float %a } @@ -209,36 +209,36 @@ ; f64 define ptx_device double @cvt_f64_preds(i1 %x) { -; CHECK: selp.f64 rd{{[0-9]+}}, 0D3F80000000000000, 0D0000000000000000, p{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: selp.f64 %ret{{[0-9]+}}, 0D3F80000000000000, 0D0000000000000000, %p{{[0-9]+}}; +; CHECK: ret; %a = uitofp i1 %x to double ret double %a } define ptx_device double @cvt_f64_i16(i16 %x) { -; CHECK: cvt.rn.f64.u16 rd{{[0-9]+}}, rh{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: cvt.rn.f64.u16 %ret{{[0-9]+}}, %rh{{[0-9]+}}; +; CHECK: ret; %a = uitofp i16 %x to double ret double %a } define ptx_device double @cvt_f64_i32(i32 %x) { -; CHECK: cvt.rn.f64.u32 rd{{[0-9]+}}, r{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: cvt.rn.f64.u32 %ret{{[0-9]+}}, %r{{[0-9]+}}; +; CHECK: ret; %a = uitofp i32 %x to double ret double %a } define ptx_device double @cvt_f64_i64(i64 %x) { -; CHECK: cvt.rn.f64.u64 rd{{[0-9]+}}, rd{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: cvt.rn.f64.u64 %ret{{[0-9]+}}, %rd{{[0-9]+}}; +; CHECK: ret; %a = uitofp i64 %x to double ret double %a } define ptx_device double @cvt_f64_f32(float %x) { -; CHECK: cvt.f64.f32 rd{{[0-9]+}}, r{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: cvt.f64.f32 %ret{{[0-9]+}}, %f{{[0-9]+}}; +; CHECK: ret; %a = fpext float %x to double ret double %a } Modified: llvm/trunk/test/CodeGen/PTX/fdiv-sm10.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PTX/fdiv-sm10.ll?rev=140311&r1=140310&r2=140311&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PTX/fdiv-sm10.ll (original) +++ llvm/trunk/test/CodeGen/PTX/fdiv-sm10.ll Thu Sep 22 11:45:51 2011 @@ -1,15 +1,15 @@ ; RUN: llc < %s -march=ptx32 -mattr=+sm10 | FileCheck %s define ptx_device float @t1_f32(float %x, float %y) { -; CHECK: div.f32 r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: div.f32 %ret{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}; +; CHECK: ret; %a = fdiv float %x, %y ret float %a } define ptx_device double @t1_f64(double %x, double %y) { -; CHECK: div.f64 rd{{[0-9]+}}, rd{{[0-9]+}}, rd{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: div.f64 %ret{{[0-9]+}}, %fd{{[0-9]+}}, %fd{{[0-9]+}}; +; CHECK: ret; %a = fdiv double %x, %y ret double %a } Modified: llvm/trunk/test/CodeGen/PTX/fdiv-sm13.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PTX/fdiv-sm13.ll?rev=140311&r1=140310&r2=140311&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PTX/fdiv-sm13.ll (original) +++ llvm/trunk/test/CodeGen/PTX/fdiv-sm13.ll Thu Sep 22 11:45:51 2011 @@ -1,15 +1,15 @@ ; RUN: llc < %s -march=ptx32 -mattr=+sm13 | FileCheck %s define ptx_device float @t1_f32(float %x, float %y) { -; CHECK: div.rn.f32 r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: div.rn.f32 %ret{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}; +; CHECK: ret; %a = fdiv float %x, %y ret float %a } define ptx_device double @t1_f64(double %x, double %y) { -; CHECK: div.rn.f64 rd{{[0-9]+}}, rd{{[0-9]+}}, rd{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: div.rn.f64 %ret{{[0-9]+}}, %fd{{[0-9]+}}, %fd{{[0-9]+}}; +; CHECK: ret; %a = fdiv double %x, %y ret double %a } Modified: llvm/trunk/test/CodeGen/PTX/fneg.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PTX/fneg.ll?rev=140311&r1=140310&r2=140311&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PTX/fneg.ll (original) +++ llvm/trunk/test/CodeGen/PTX/fneg.ll Thu Sep 22 11:45:51 2011 @@ -1,15 +1,15 @@ ; RUN: llc < %s -march=ptx32 | FileCheck %s define ptx_device float @t1_f32(float %x) { -; CHECK: neg.f32 r{{[0-9]+}}, r{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: neg.f32 %ret{{[0-9]+}}, %f{{[0-9]+}}; +; CHECK: ret; %y = fsub float -0.000000e+00, %x ret float %y } define ptx_device double @t1_f64(double %x) { -; CHECK: neg.f64 rd{{[0-9]+}}, rd{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: neg.f64 %ret{{[0-9]+}}, %fd{{[0-9]+}}; +; CHECK: ret; %y = fsub double -0.000000e+00, %x ret double %y } Modified: llvm/trunk/test/CodeGen/PTX/intrinsic.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PTX/intrinsic.ll?rev=140311&r1=140310&r2=140311&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PTX/intrinsic.ll (original) +++ llvm/trunk/test/CodeGen/PTX/intrinsic.ll Thu Sep 22 11:45:51 2011 @@ -1,239 +1,239 @@ ; RUN: llc < %s -march=ptx32 -mattr=+ptx20 | FileCheck %s define ptx_device i32 @test_tid_x() { -; CHECK: mov.u32 r0, %tid.x; -; CHECK-NEXT: ret; +; CHECK: mov.u32 %ret0, %tid.x; +; CHECK: ret; %x = call i32 @llvm.ptx.read.tid.x() ret i32 %x } define ptx_device i32 @test_tid_y() { -; CHECK: mov.u32 r0, %tid.y; -; CHECK-NEXT: ret; +; CHECK: mov.u32 %ret0, %tid.y; +; CHECK: ret; %x = call i32 @llvm.ptx.read.tid.y() ret i32 %x } define ptx_device i32 @test_tid_z() { -; CHECK: mov.u32 r0, %tid.z; -; CHECK-NEXT: ret; +; CHECK: mov.u32 %ret0, %tid.z; +; CHECK: ret; %x = call i32 @llvm.ptx.read.tid.z() ret i32 %x } define ptx_device i32 @test_tid_w() { -; CHECK: mov.u32 r0, %tid.w; -; CHECK-NEXT: ret; +; CHECK: mov.u32 %ret0, %tid.w; +; CHECK: ret; %x = call i32 @llvm.ptx.read.tid.w() ret i32 %x } define ptx_device i32 @test_ntid_x() { -; CHECK: mov.u32 r0, %ntid.x; -; CHECK-NEXT: ret; +; CHECK: mov.u32 %ret0, %ntid.x; +; CHECK: ret; %x = call i32 @llvm.ptx.read.ntid.x() ret i32 %x } define ptx_device i32 @test_ntid_y() { -; CHECK: mov.u32 r0, %ntid.y; -; CHECK-NEXT: ret; +; CHECK: mov.u32 %ret0, %ntid.y; +; CHECK: ret; %x = call i32 @llvm.ptx.read.ntid.y() ret i32 %x } define ptx_device i32 @test_ntid_z() { -; CHECK: mov.u32 r0, %ntid.z; -; CHECK-NEXT: ret; +; CHECK: mov.u32 %ret0, %ntid.z; +; CHECK: ret; %x = call i32 @llvm.ptx.read.ntid.z() ret i32 %x } define ptx_device i32 @test_ntid_w() { -; CHECK: mov.u32 r0, %ntid.w; -; CHECK-NEXT: ret; +; CHECK: mov.u32 %ret0, %ntid.w; +; CHECK: ret; %x = call i32 @llvm.ptx.read.ntid.w() ret i32 %x } define ptx_device i32 @test_laneid() { -; CHECK: mov.u32 r0, %laneid; -; CHECK-NEXT: ret; +; CHECK: mov.u32 %ret0, %laneid; +; CHECK: ret; %x = call i32 @llvm.ptx.read.laneid() ret i32 %x } define ptx_device i32 @test_warpid() { -; CHECK: mov.u32 r0, %warpid; -; CHECK-NEXT: ret; +; CHECK: mov.u32 %ret0, %warpid; +; CHECK: ret; %x = call i32 @llvm.ptx.read.warpid() ret i32 %x } define ptx_device i32 @test_nwarpid() { -; CHECK: mov.u32 r0, %nwarpid; -; CHECK-NEXT: ret; +; CHECK: mov.u32 %ret0, %nwarpid; +; CHECK: ret; %x = call i32 @llvm.ptx.read.nwarpid() ret i32 %x } define ptx_device i32 @test_ctaid_x() { -; CHECK: mov.u32 r0, %ctaid.x; -; CHECK-NEXT: ret; +; CHECK: mov.u32 %ret0, %ctaid.x; +; CHECK: ret; %x = call i32 @llvm.ptx.read.ctaid.x() ret i32 %x } define ptx_device i32 @test_ctaid_y() { -; CHECK: mov.u32 r0, %ctaid.y; -; CHECK-NEXT: ret; +; CHECK: mov.u32 %ret0, %ctaid.y; +; CHECK: ret; %x = call i32 @llvm.ptx.read.ctaid.y() ret i32 %x } define ptx_device i32 @test_ctaid_z() { -; CHECK: mov.u32 r0, %ctaid.z; -; CHECK-NEXT: ret; +; CHECK: mov.u32 %ret0, %ctaid.z; +; CHECK: ret; %x = call i32 @llvm.ptx.read.ctaid.z() ret i32 %x } define ptx_device i32 @test_ctaid_w() { -; CHECK: mov.u32 r0, %ctaid.w; -; CHECK-NEXT: ret; +; CHECK: mov.u32 %ret0, %ctaid.w; +; CHECK: ret; %x = call i32 @llvm.ptx.read.ctaid.w() ret i32 %x } define ptx_device i32 @test_nctaid_x() { -; CHECK: mov.u32 r0, %nctaid.x; -; CHECK-NEXT: ret; +; CHECK: mov.u32 %ret0, %nctaid.x; +; CHECK: ret; %x = call i32 @llvm.ptx.read.nctaid.x() ret i32 %x } define ptx_device i32 @test_nctaid_y() { -; CHECK: mov.u32 r0, %nctaid.y; -; CHECK-NEXT: ret; +; CHECK: mov.u32 %ret0, %nctaid.y; +; CHECK: ret; %x = call i32 @llvm.ptx.read.nctaid.y() ret i32 %x } define ptx_device i32 @test_nctaid_z() { -; CHECK: mov.u32 r0, %nctaid.z; -; CHECK-NEXT: ret; +; CHECK: mov.u32 %ret0, %nctaid.z; +; CHECK: ret; %x = call i32 @llvm.ptx.read.nctaid.z() ret i32 %x } define ptx_device i32 @test_nctaid_w() { -; CHECK: mov.u32 r0, %nctaid.w; -; CHECK-NEXT: ret; +; CHECK: mov.u32 %ret0, %nctaid.w; +; CHECK: ret; %x = call i32 @llvm.ptx.read.nctaid.w() ret i32 %x } define ptx_device i32 @test_smid() { -; CHECK: mov.u32 r0, %smid; -; CHECK-NEXT: ret; +; CHECK: mov.u32 %ret0, %smid; +; CHECK: ret; %x = call i32 @llvm.ptx.read.smid() ret i32 %x } define ptx_device i32 @test_nsmid() { -; CHECK: mov.u32 r0, %nsmid; -; CHECK-NEXT: ret; +; CHECK: mov.u32 %ret0, %nsmid; +; CHECK: ret; %x = call i32 @llvm.ptx.read.nsmid() ret i32 %x } define ptx_device i32 @test_gridid() { -; CHECK: mov.u32 r0, %gridid; -; CHECK-NEXT: ret; +; CHECK: mov.u32 %ret0, %gridid; +; CHECK: ret; %x = call i32 @llvm.ptx.read.gridid() ret i32 %x } define ptx_device i32 @test_lanemask_eq() { -; CHECK: mov.u32 r0, %lanemask_eq; -; CHECK-NEXT: ret; +; CHECK: mov.u32 %ret0, %lanemask_eq; +; CHECK: ret; %x = call i32 @llvm.ptx.read.lanemask.eq() ret i32 %x } define ptx_device i32 @test_lanemask_le() { -; CHECK: mov.u32 r0, %lanemask_le; -; CHECK-NEXT: ret; +; CHECK: mov.u32 %ret0, %lanemask_le; +; CHECK: ret; %x = call i32 @llvm.ptx.read.lanemask.le() ret i32 %x } define ptx_device i32 @test_lanemask_lt() { -; CHECK: mov.u32 r0, %lanemask_lt; -; CHECK-NEXT: ret; +; CHECK: mov.u32 %ret0, %lanemask_lt; +; CHECK: ret; %x = call i32 @llvm.ptx.read.lanemask.lt() ret i32 %x } define ptx_device i32 @test_lanemask_ge() { -; CHECK: mov.u32 r0, %lanemask_ge; -; CHECK-NEXT: ret; +; CHECK: mov.u32 %ret0, %lanemask_ge; +; CHECK: ret; %x = call i32 @llvm.ptx.read.lanemask.ge() ret i32 %x } define ptx_device i32 @test_lanemask_gt() { -; CHECK: mov.u32 r0, %lanemask_gt; -; CHECK-NEXT: ret; +; CHECK: mov.u32 %ret0, %lanemask_gt; +; CHECK: ret; %x = call i32 @llvm.ptx.read.lanemask.gt() ret i32 %x } define ptx_device i32 @test_clock() { -; CHECK: mov.u32 r0, %clock; -; CHECK-NEXT: ret; +; CHECK: mov.u32 %ret0, %clock; +; CHECK: ret; %x = call i32 @llvm.ptx.read.clock() ret i32 %x } define ptx_device i64 @test_clock64() { -; CHECK: mov.u64 rd0, %clock64; -; CHECK-NEXT: ret; +; CHECK: mov.u64 %ret0, %clock64; +; CHECK: ret; %x = call i64 @llvm.ptx.read.clock64() ret i64 %x } define ptx_device i32 @test_pm0() { -; CHECK: mov.u32 r0, %pm0; -; CHECK-NEXT: ret; +; CHECK: mov.u32 %ret0, %pm0; +; CHECK: ret; %x = call i32 @llvm.ptx.read.pm0() ret i32 %x } define ptx_device i32 @test_pm1() { -; CHECK: mov.u32 r0, %pm1; -; CHECK-NEXT: ret; +; CHECK: mov.u32 %ret0, %pm1; +; CHECK: ret; %x = call i32 @llvm.ptx.read.pm1() ret i32 %x } define ptx_device i32 @test_pm2() { -; CHECK: mov.u32 r0, %pm2; -; CHECK-NEXT: ret; +; CHECK: mov.u32 %ret0, %pm2; +; CHECK: ret; %x = call i32 @llvm.ptx.read.pm2() ret i32 %x } define ptx_device i32 @test_pm3() { -; CHECK: mov.u32 r0, %pm3; -; CHECK-NEXT: ret; +; CHECK: mov.u32 %ret0, %pm3; +; CHECK: ret; %x = call i32 @llvm.ptx.read.pm3() ret i32 %x } define ptx_device void @test_bar_sync() { ; CHECK: bar.sync 0 -; CHECK-NEXT: ret; +; CHECK: ret; call void @llvm.ptx.bar.sync(i32 0) ret void } Modified: llvm/trunk/test/CodeGen/PTX/ld.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PTX/ld.ll?rev=140311&r1=140310&r2=140311&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PTX/ld.ll (original) +++ llvm/trunk/test/CodeGen/PTX/ld.ll Thu Sep 22 11:45:51 2011 @@ -63,48 +63,48 @@ define ptx_device i16 @t1_u16(i16* %p) { entry: -;CHECK: ld.global.u16 rh{{[0-9]+}}, [r{{[0-9]+}}]; -;CHECK-NEXT: ret; +;CHECK: ld.global.u16 %ret{{[0-9]+}}, [%r{{[0-9]+}}]; +;CHECK: ret; %x = load i16* %p ret i16 %x } define ptx_device i32 @t1_u32(i32* %p) { entry: -;CHECK: ld.global.u32 r{{[0-9]+}}, [r{{[0-9]+}}]; -;CHECK-NEXT: ret; +;CHECK: ld.global.u32 %ret{{[0-9]+}}, [%r{{[0-9]+}}]; +;CHECK: ret; %x = load i32* %p ret i32 %x } define ptx_device i64 @t1_u64(i64* %p) { entry: -;CHECK: ld.global.u64 rd{{[0-9]+}}, [r{{[0-9]+}}]; -;CHECK-NEXT: ret; +;CHECK: ld.global.u64 %ret{{[0-9]+}}, [%r{{[0-9]+}}]; +;CHECK: ret; %x = load i64* %p ret i64 %x } define ptx_device float @t1_f32(float* %p) { entry: -;CHECK: ld.global.f32 r{{[0-9]+}}, [r{{[0-9]+}}]; -;CHECK-NEXT: ret; +;CHECK: ld.global.f32 %ret{{[0-9]+}}, [%r{{[0-9]+}}]; +;CHECK: ret; %x = load float* %p ret float %x } define ptx_device double @t1_f64(double* %p) { entry: -;CHECK: ld.global.f64 rd{{[0-9]+}}, [r{{[0-9]+}}]; -;CHECK-NEXT: ret; +;CHECK: ld.global.f64 %ret{{[0-9]+}}, [%r{{[0-9]+}}]; +;CHECK: ret; %x = load double* %p ret double %x } define ptx_device i16 @t2_u16(i16* %p) { entry: -;CHECK: ld.global.u16 rh{{[0-9]+}}, [r{{[0-9]+}}+2]; -;CHECK-NEXT: ret; +;CHECK: ld.global.u16 %ret{{[0-9]+}}, [%r{{[0-9]+}}+2]; +;CHECK: ret; %i = getelementptr i16* %p, i32 1 %x = load i16* %i ret i16 %x @@ -112,8 +112,8 @@ define ptx_device i32 @t2_u32(i32* %p) { entry: -;CHECK: ld.global.u32 r{{[0-9]+}}, [r{{[0-9]+}}+4]; -;CHECK-NEXT: ret; +;CHECK: ld.global.u32 %ret{{[0-9]+}}, [%r{{[0-9]+}}+4]; +;CHECK: ret; %i = getelementptr i32* %p, i32 1 %x = load i32* %i ret i32 %x @@ -121,8 +121,8 @@ define ptx_device i64 @t2_u64(i64* %p) { entry: -;CHECK: ld.global.u64 rd{{[0-9]+}}, [r{{[0-9]+}}+8]; -;CHECK-NEXT: ret; +;CHECK: ld.global.u64 %ret{{[0-9]+}}, [%r{{[0-9]+}}+8]; +;CHECK: ret; %i = getelementptr i64* %p, i32 1 %x = load i64* %i ret i64 %x @@ -130,8 +130,8 @@ define ptx_device float @t2_f32(float* %p) { entry: -;CHECK: ld.global.f32 r{{[0-9]+}}, [r{{[0-9]+}}+4]; -;CHECK-NEXT: ret; +;CHECK: ld.global.f32 %ret{{[0-9]+}}, [%r{{[0-9]+}}+4]; +;CHECK: ret; %i = getelementptr float* %p, i32 1 %x = load float* %i ret float %x @@ -139,8 +139,8 @@ define ptx_device double @t2_f64(double* %p) { entry: -;CHECK: ld.global.f64 rd{{[0-9]+}}, [r{{[0-9]+}}+8]; -;CHECK-NEXT: ret; +;CHECK: ld.global.f64 %ret{{[0-9]+}}, [%r{{[0-9]+}}+8]; +;CHECK: ret; %i = getelementptr double* %p, i32 1 %x = load double* %i ret double %x @@ -148,9 +148,9 @@ define ptx_device i16 @t3_u16(i16* %p, i32 %q) { entry: -;CHECK: shl.b32 r[[R0:[0-9]+]], r{{[0-9]+}}, 1; -;CHECK-NEXT: add.u32 r[[R0]], r{{[0-9]+}}, r[[R0]]; -;CHECK-NEXT: ld.global.u16 rh{{[0-9]+}}, [r[[R0]]]; +;CHECK: shl.b32 %r[[R0:[0-9]+]], %r{{[0-9]+}}, 1; +;CHECK: add.u32 %r{{[0-9]+}}, %r{{[0-9]+}}, %r[[R0]]; +;CHECK: ld.global.u16 %ret{{[0-9]+}}, [%r{{[0-9]+}}]; %i = getelementptr i16* %p, i32 %q %x = load i16* %i ret i16 %x @@ -158,9 +158,9 @@ define ptx_device i32 @t3_u32(i32* %p, i32 %q) { entry: -;CHECK: shl.b32 r[[R0:[0-9]+]], r{{[0-9]+}}, 2; -;CHECK-NEXT: add.u32 r[[R0]], r{{[0-9]+}}, r[[R0]]; -;CHECK-NEXT: ld.global.u32 r{{[0-9]+}}, [r[[R0]]]; +;CHECK: shl.b32 %r[[R0:[0-9]+]], %r{{[0-9]+}}, 2; +;CHECK: add.u32 %r{{[0-9]+}}, %r{{[0-9]+}}, %r[[R0]]; +;CHECK: ld.global.u32 %ret{{[0-9]+}}, [%r{{[0-9]+}}]; %i = getelementptr i32* %p, i32 %q %x = load i32* %i ret i32 %x @@ -168,9 +168,9 @@ define ptx_device i64 @t3_u64(i64* %p, i32 %q) { entry: -;CHECK: shl.b32 r[[R0:[0-9]+]], r{{[0-9]+}}, 3; -;CHECK-NEXT: add.u32 r[[R0]], r{{[0-9]+}}, r[[R0]]; -;CHECK-NEXT: ld.global.u64 rd{{[0-9]+}}, [r[[R0]]]; +;CHECK: shl.b32 %r[[R0:[0-9]+]], %r{{[0-9]+}}, 3; +;CHECK: add.u32 %r{{[0-9]+}}, %r{{[0-9]+}}, %r[[R0]]; +;CHECK: ld.global.u64 %ret{{[0-9]+}}, [%r{{[0-9]+}}]; %i = getelementptr i64* %p, i32 %q %x = load i64* %i ret i64 %x @@ -178,9 +178,9 @@ define ptx_device float @t3_f32(float* %p, i32 %q) { entry: -;CHECK: shl.b32 r[[R0:[0-9]+]], r{{[0-9]+}}, 2; -;CHECK-NEXT: add.u32 r[[R0]], r{{[0-9]+}}, r[[R0]]; -;CHECK-NEXT: ld.global.f32 r{{[0-9]+}}, [r[[R0]]]; +;CHECK: shl.b32 %r[[R0:[0-9]+]], %r{{[0-9]+}}, 2; +;CHECK: add.u32 %r{{[0-9]+}}, %r{{[0-9]+}}, %r[[R0]]; +;CHECK: ld.global.f32 %ret{{[0-9]+}}, [%r{{[0-9]+}}]; %i = getelementptr float* %p, i32 %q %x = load float* %i ret float %x @@ -188,9 +188,9 @@ define ptx_device double @t3_f64(double* %p, i32 %q) { entry: -;CHECK: shl.b32 r[[R0:[0-9]+]], r{{[0-9]+}}, 3; -;CHECK-NEXT: add.u32 r[[R0]], r{{[0-9]+}}, r[[R0]]; -;CHECK-NEXT: ld.global.f64 rd{{[0-9]+}}, [r[[R0]]]; +;CHECK: shl.b32 %r[[R0:[0-9]+]], %r{{[0-9]+}}, 3; +;CHECK: add.u32 %r{{[0-9]+}}, %r{{[0-9]+}}, %r[[R0]]; +;CHECK: ld.global.f64 %ret{{[0-9]+}}, [%r{{[0-9]+}}]; %i = getelementptr double* %p, i32 %q %x = load double* %i ret double %x @@ -198,9 +198,9 @@ define ptx_device i16 @t4_global_u16() { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_i16; -;CHECK-NEXT: ld.global.u16 rh{{[0-9]+}}, [r[[R0]]]; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_i16; +;CHECK: ld.global.u16 %ret{{[0-9]+}}, [%r[[R0]]]; +;CHECK: ret; %i = getelementptr [10 x i16]* @array_i16, i32 0, i32 0 %x = load i16* %i ret i16 %x @@ -208,9 +208,9 @@ define ptx_device i32 @t4_global_u32() { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_i32; -;CHECK-NEXT: ld.global.u32 r{{[0-9]+}}, [r[[R0]]]; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_i32; +;CHECK: ld.global.u32 %ret{{[0-9]+}}, [%r[[R0]]]; +;CHECK: ret; %i = getelementptr [10 x i32]* @array_i32, i32 0, i32 0 %x = load i32* %i ret i32 %x @@ -218,9 +218,9 @@ define ptx_device i64 @t4_global_u64() { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_i64; -;CHECK-NEXT: ld.global.u64 rd{{[0-9]+}}, [r[[R0]]]; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_i64; +;CHECK: ld.global.u64 %ret{{[0-9]+}}, [%r[[R0]]]; +;CHECK: ret; %i = getelementptr [10 x i64]* @array_i64, i32 0, i32 0 %x = load i64* %i ret i64 %x @@ -228,9 +228,9 @@ define ptx_device float @t4_global_f32() { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_float; -;CHECK-NEXT: ld.global.f32 r{{[0-9]+}}, [r[[R0]]]; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_float; +;CHECK: ld.global.f32 %ret{{[0-9]+}}, [%r[[R0]]]; +;CHECK: ret; %i = getelementptr [10 x float]* @array_float, i32 0, i32 0 %x = load float* %i ret float %x @@ -238,9 +238,9 @@ define ptx_device double @t4_global_f64() { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_double; -;CHECK-NEXT: ld.global.f64 rd{{[0-9]+}}, [r[[R0]]]; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_double; +;CHECK: ld.global.f64 %ret{{[0-9]+}}, [%r[[R0]]]; +;CHECK: ret; %i = getelementptr [10 x double]* @array_double, i32 0, i32 0 %x = load double* %i ret double %x @@ -248,9 +248,9 @@ define ptx_device i16 @t4_const_u16() { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_constant_i16; -;CHECK-NEXT: ld.const.u16 rh{{[0-9]+}}, [r[[R0]]]; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_constant_i16; +;CHECK: ld.const.u16 %ret{{[0-9]+}}, [%r[[R0]]]; +;CHECK: ret; %i = getelementptr [10 x i16] addrspace(1)* @array_constant_i16, i32 0, i32 0 %x = load i16 addrspace(1)* %i ret i16 %x @@ -258,9 +258,9 @@ define ptx_device i32 @t4_const_u32() { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_constant_i32; -;CHECK-NEXT: ld.const.u32 r{{[0-9]+}}, [r[[R0]]]; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_constant_i32; +;CHECK: ld.const.u32 %ret{{[0-9]+}}, [%r[[R0]]]; +;CHECK: ret; %i = getelementptr [10 x i32] addrspace(1)* @array_constant_i32, i32 0, i32 0 %x = load i32 addrspace(1)* %i ret i32 %x @@ -268,9 +268,9 @@ define ptx_device i64 @t4_const_u64() { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_constant_i64; -;CHECK-NEXT: ld.const.u64 rd{{[0-9]+}}, [r[[R0]]]; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_constant_i64; +;CHECK: ld.const.u64 %ret{{[0-9]+}}, [%r[[R0]]]; +;CHECK: ret; %i = getelementptr [10 x i64] addrspace(1)* @array_constant_i64, i32 0, i32 0 %x = load i64 addrspace(1)* %i ret i64 %x @@ -278,9 +278,9 @@ define ptx_device float @t4_const_f32() { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_constant_float; -;CHECK-NEXT: ld.const.f32 r{{[0-9]+}}, [r[[R0]]]; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_constant_float; +;CHECK: ld.const.f32 %ret{{[0-9]+}}, [%r[[R0]]]; +;CHECK: ret; %i = getelementptr [10 x float] addrspace(1)* @array_constant_float, i32 0, i32 0 %x = load float addrspace(1)* %i ret float %x @@ -288,9 +288,9 @@ define ptx_device double @t4_const_f64() { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_constant_double; -;CHECK-NEXT: ld.const.f64 rd{{[0-9]+}}, [r[[R0]]]; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_constant_double; +;CHECK: ld.const.f64 %ret{{[0-9]+}}, [%r[[R0]]]; +;CHECK: ret; %i = getelementptr [10 x double] addrspace(1)* @array_constant_double, i32 0, i32 0 %x = load double addrspace(1)* %i ret double %x @@ -298,9 +298,9 @@ define ptx_device i16 @t4_local_u16() { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_local_i16; -;CHECK-NEXT: ld.local.u16 rh{{[0-9]+}}, [r[[R0]]]; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_local_i16; +;CHECK: ld.local.u16 %ret{{[0-9]+}}, [%r[[R0]]]; +;CHECK: ret; %i = getelementptr [10 x i16] addrspace(2)* @array_local_i16, i32 0, i32 0 %x = load i16 addrspace(2)* %i ret i16 %x @@ -308,9 +308,9 @@ define ptx_device i32 @t4_local_u32() { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_local_i32; -;CHECK-NEXT: ld.local.u32 r{{[0-9]+}}, [r[[R0]]]; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_local_i32; +;CHECK: ld.local.u32 %ret{{[0-9]+}}, [%r[[R0]]]; +;CHECK: ret; %i = getelementptr [10 x i32] addrspace(2)* @array_local_i32, i32 0, i32 0 %x = load i32 addrspace(2)* %i ret i32 %x @@ -318,9 +318,9 @@ define ptx_device i64 @t4_local_u64() { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_local_i64; -;CHECK-NEXT: ld.local.u64 rd{{[0-9]+}}, [r[[R0]]]; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_local_i64; +;CHECK: ld.local.u64 %ret{{[0-9]+}}, [%r[[R0]]]; +;CHECK: ret; %i = getelementptr [10 x i64] addrspace(2)* @array_local_i64, i32 0, i32 0 %x = load i64 addrspace(2)* %i ret i64 %x @@ -328,9 +328,9 @@ define ptx_device float @t4_local_f32() { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_local_float; -;CHECK-NEXT: ld.local.f32 r{{[0-9]+}}, [r[[R0]]]; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_local_float; +;CHECK: ld.local.f32 %ret{{[0-9]+}}, [%r[[R0]]]; +;CHECK: ret; %i = getelementptr [10 x float] addrspace(2)* @array_local_float, i32 0, i32 0 %x = load float addrspace(2)* %i ret float %x @@ -338,9 +338,9 @@ define ptx_device double @t4_local_f64() { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_local_double; -;CHECK-NEXT: ld.local.f64 rd{{[0-9]+}}, [r[[R0]]]; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_local_double; +;CHECK: ld.local.f64 %ret{{[0-9]+}}, [%r[[R0]]]; +;CHECK: ret; %i = getelementptr [10 x double] addrspace(2)* @array_local_double, i32 0, i32 0 %x = load double addrspace(2)* %i ret double %x @@ -348,9 +348,9 @@ define ptx_device i16 @t4_shared_u16() { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_shared_i16; -;CHECK-NEXT: ld.shared.u16 rh{{[0-9]+}}, [r[[R0]]]; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_shared_i16; +;CHECK: ld.shared.u16 %ret{{[0-9]+}}, [%r[[R0]]]; +;CHECK: ret; %i = getelementptr [10 x i16] addrspace(4)* @array_shared_i16, i32 0, i32 0 %x = load i16 addrspace(4)* %i ret i16 %x @@ -358,9 +358,9 @@ define ptx_device i32 @t4_shared_u32() { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_shared_i32; -;CHECK-NEXT: ld.shared.u32 r{{[0-9]+}}, [r[[R0]]]; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_shared_i32; +;CHECK: ld.shared.u32 %ret{{[0-9]+}}, [%r[[R0]]]; +;CHECK: ret; %i = getelementptr [10 x i32] addrspace(4)* @array_shared_i32, i32 0, i32 0 %x = load i32 addrspace(4)* %i ret i32 %x @@ -368,9 +368,9 @@ define ptx_device i64 @t4_shared_u64() { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_shared_i64; -;CHECK-NEXT: ld.shared.u64 rd{{[0-9]+}}, [r[[R0]]]; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_shared_i64; +;CHECK: ld.shared.u64 %ret{{[0-9]+}}, [%r[[R0]]]; +;CHECK: ret; %i = getelementptr [10 x i64] addrspace(4)* @array_shared_i64, i32 0, i32 0 %x = load i64 addrspace(4)* %i ret i64 %x @@ -378,9 +378,9 @@ define ptx_device float @t4_shared_f32() { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_shared_float; -;CHECK-NEXT: ld.shared.f32 r{{[0-9]+}}, [r[[R0]]]; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_shared_float; +;CHECK: ld.shared.f32 %ret{{[0-9]+}}, [%r[[R0]]]; +;CHECK: ret; %i = getelementptr [10 x float] addrspace(4)* @array_shared_float, i32 0, i32 0 %x = load float addrspace(4)* %i ret float %x @@ -388,9 +388,9 @@ define ptx_device double @t4_shared_f64() { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_shared_double; -;CHECK-NEXT: ld.shared.f64 rd{{[0-9]+}}, [r[[R0]]]; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_shared_double; +;CHECK: ld.shared.f64 %ret{{[0-9]+}}, [%r[[R0]]]; +;CHECK: ret; %i = getelementptr [10 x double] addrspace(4)* @array_shared_double, i32 0, i32 0 %x = load double addrspace(4)* %i ret double %x @@ -398,9 +398,9 @@ define ptx_device i16 @t5_u16() { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_i16; -;CHECK-NEXT: ld.global.u16 rh{{[0-9]+}}, [r[[R0]]+2]; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_i16; +;CHECK: ld.global.u16 %ret{{[0-9]+}}, [%r[[R0]]+2]; +;CHECK: ret; %i = getelementptr [10 x i16]* @array_i16, i32 0, i32 1 %x = load i16* %i ret i16 %x @@ -408,9 +408,9 @@ define ptx_device i32 @t5_u32() { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_i32; -;CHECK-NEXT: ld.global.u32 r{{[0-9]+}}, [r[[R0]]+4]; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_i32; +;CHECK: ld.global.u32 %ret{{[0-9]+}}, [%r[[R0]]+4]; +;CHECK: ret; %i = getelementptr [10 x i32]* @array_i32, i32 0, i32 1 %x = load i32* %i ret i32 %x @@ -418,9 +418,9 @@ define ptx_device i64 @t5_u64() { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_i64; -;CHECK-NEXT: ld.global.u64 rd{{[0-9]+}}, [r[[R0]]+8]; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_i64; +;CHECK: ld.global.u64 %ret{{[0-9]+}}, [%r[[R0]]+8]; +;CHECK: ret; %i = getelementptr [10 x i64]* @array_i64, i32 0, i32 1 %x = load i64* %i ret i64 %x @@ -428,9 +428,9 @@ define ptx_device float @t5_f32() { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_float; -;CHECK-NEXT: ld.global.f32 r{{[0-9]+}}, [r[[R0]]+4]; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_float; +;CHECK: ld.global.f32 %ret{{[0-9]+}}, [%r[[R0]]+4]; +;CHECK: ret; %i = getelementptr [10 x float]* @array_float, i32 0, i32 1 %x = load float* %i ret float %x @@ -438,9 +438,9 @@ define ptx_device double @t5_f64() { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_double; -;CHECK-NEXT: ld.global.f64 rd{{[0-9]+}}, [r[[R0]]+8]; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_double; +;CHECK: ld.global.f64 %ret{{[0-9]+}}, [%r[[R0]]+8]; +;CHECK: ret; %i = getelementptr [10 x double]* @array_double, i32 0, i32 1 %x = load double* %i ret double %x Modified: llvm/trunk/test/CodeGen/PTX/llvm-intrinsic.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PTX/llvm-intrinsic.ll?rev=140311&r1=140310&r2=140311&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PTX/llvm-intrinsic.ll (original) +++ llvm/trunk/test/CodeGen/PTX/llvm-intrinsic.ll Thu Sep 22 11:45:51 2011 @@ -2,48 +2,48 @@ define ptx_device float @test_sqrt_f32(float %x) { entry: -; CHECK: sqrt.rn.f32 r{{[0-9]+}}, r{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: sqrt.rn.f32 %ret{{[0-9]+}}, %f{{[0-9]+}}; +; CHECK: ret; %y = call float @llvm.sqrt.f32(float %x) ret float %y } define ptx_device double @test_sqrt_f64(double %x) { entry: -; CHECK: sqrt.rn.f64 rd{{[0-9]+}}, rd{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: sqrt.rn.f64 %ret{{[0-9]+}}, %fd{{[0-9]+}}; +; CHECK: ret; %y = call double @llvm.sqrt.f64(double %x) ret double %y } define ptx_device float @test_sin_f32(float %x) { entry: -; CHECK: sin.approx.f32 r{{[0-9]+}}, r{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: sin.approx.f32 %ret{{[0-9]+}}, %f{{[0-9]+}}; +; CHECK: ret; %y = call float @llvm.sin.f32(float %x) ret float %y } define ptx_device double @test_sin_f64(double %x) { entry: -; CHECK: sin.approx.f64 rd{{[0-9]+}}, rd{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: sin.approx.f64 %ret{{[0-9]+}}, %fd{{[0-9]+}}; +; CHECK: ret; %y = call double @llvm.sin.f64(double %x) ret double %y } define ptx_device float @test_cos_f32(float %x) { entry: -; CHECK: cos.approx.f32 r{{[0-9]+}}, r{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: cos.approx.f32 %ret{{[0-9]+}}, %f{{[0-9]+}}; +; CHECK: ret; %y = call float @llvm.cos.f32(float %x) ret float %y } define ptx_device double @test_cos_f64(double %x) { entry: -; CHECK: cos.approx.f64 rd{{[0-9]+}}, rd{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: cos.approx.f64 %ret{{[0-9]+}}, %fd{{[0-9]+}}; +; CHECK: ret; %y = call double @llvm.cos.f64(double %x) ret double %y } Modified: llvm/trunk/test/CodeGen/PTX/mad.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PTX/mad.ll?rev=140311&r1=140310&r2=140311&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PTX/mad.ll (original) +++ llvm/trunk/test/CodeGen/PTX/mad.ll Thu Sep 22 11:45:51 2011 @@ -1,16 +1,16 @@ ; RUN: llc < %s -march=ptx32 -mattr=+sm13 | FileCheck %s define ptx_device float @t1_f32(float %x, float %y, float %z) { -; CHECK: mad.rn.f32 r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: mad.rn.f32 %ret{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}; +; CHECK: ret; %a = fmul float %x, %y %b = fadd float %a, %z ret float %b } define ptx_device double @t1_f64(double %x, double %y, double %z) { -; CHECK: mad.rn.f64 rd{{[0-9]+}}, rd{{[0-9]+}}, rd{{[0-9]+}}, rd{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: mad.rn.f64 %ret{{[0-9]+}}, %fd{{[0-9]+}}, %fd{{[0-9]+}}, %fd{{[0-9]+}}; +; CHECK: ret; %a = fmul double %x, %y %b = fadd double %a, %z ret double %b Modified: llvm/trunk/test/CodeGen/PTX/mov.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PTX/mov.ll?rev=140311&r1=140310&r2=140311&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PTX/mov.ll (original) +++ llvm/trunk/test/CodeGen/PTX/mov.ll Thu Sep 22 11:45:51 2011 @@ -1,62 +1,62 @@ ; RUN: llc < %s -march=ptx32 | FileCheck %s define ptx_device i16 @t1_u16() { -; CHECK: mov.u16 rh{{[0-9]+}}, 0; +; CHECK: mov.u16 %ret{{[0-9]+}}, 0; ; CHECK: ret; ret i16 0 } define ptx_device i32 @t1_u32() { -; CHECK: mov.u32 r{{[0-9]+}}, 0; +; CHECK: mov.u32 %ret{{[0-9]+}}, 0; ; CHECK: ret; ret i32 0 } define ptx_device i64 @t1_u64() { -; CHECK: mov.u64 rd{{[0-9]+}}, 0; +; CHECK: mov.u64 %ret{{[0-9]+}}, 0; ; CHECK: ret; ret i64 0 } define ptx_device float @t1_f32() { -; CHECK: mov.f32 r{{[0-9]+}}, 0F00000000; +; CHECK: mov.f32 %ret{{[0-9]+}}, 0F00000000; ; CHECK: ret; ret float 0.0 } define ptx_device double @t1_f64() { -; CHECK: mov.f64 rd{{[0-9]+}}, 0D0000000000000000; +; CHECK: mov.f64 %ret{{[0-9]+}}, 0D0000000000000000; ; CHECK: ret; ret double 0.0 } define ptx_device i16 @t2_u16(i16 %x) { -; CHECK: mov.u16 rh{{[0-9]+}}, rh{{[0-9]+}}; +; CHECK: mov.b16 %ret{{[0-9]+}}, %param{{[0-9]+}}; ; CHECK: ret; ret i16 %x } define ptx_device i32 @t2_u32(i32 %x) { -; CHECK: mov.u32 r{{[0-9]+}}, r{{[0-9]+}}; +; CHECK: mov.b32 %ret{{[0-9]+}}, %param{{[0-9]+}}; ; CHECK: ret; ret i32 %x } define ptx_device i64 @t2_u64(i64 %x) { -; CHECK: mov.u64 rd{{[0-9]+}}, rd{{[0-9]+}}; +; CHECK: mov.b64 %ret{{[0-9]+}}, %param{{[0-9]+}}; ; CHECK: ret; ret i64 %x } define ptx_device float @t3_f32(float %x) { -; CHECK: mov.u32 r{{[0-9]+}}, r{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: mov.f32 %ret{{[0-9]+}}, %param{{[0-9]+}}; +; CHECK: ret; ret float %x } define ptx_device double @t3_f64(double %x) { -; CHECK: mov.u64 rd{{[0-9]+}}, rd{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: mov.f64 %ret{{[0-9]+}}, %param{{[0-9]+}}; +; CHECK: ret; ret double %x } Modified: llvm/trunk/test/CodeGen/PTX/mul.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PTX/mul.ll?rev=140311&r1=140310&r2=140311&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PTX/mul.ll (original) +++ llvm/trunk/test/CodeGen/PTX/mul.ll Thu Sep 22 11:45:51 2011 @@ -11,29 +11,29 @@ ;} define ptx_device float @t1_f32(float %x, float %y) { -; CHECK: mul.rn.f32 r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}} -; CHECK-NEXT: ret; +; CHECK: mul.rn.f32 %ret{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}} +; CHECK: ret; %z = fmul float %x, %y ret float %z } define ptx_device double @t1_f64(double %x, double %y) { -; CHECK: mul.rn.f64 rd{{[0-9]+}}, rd{{[0-9]+}}, rd{{[0-9]+}} -; CHECK-NEXT: ret; +; CHECK: mul.rn.f64 %ret{{[0-9]+}}, %fd{{[0-9]+}}, %fd{{[0-9]+}} +; CHECK: ret; %z = fmul double %x, %y ret double %z } define ptx_device float @t2_f32(float %x) { -; CHECK: mul.rn.f32 r{{[0-9]+}}, r{{[0-9]+}}, 0F40A00000; -; CHECK-NEXT: ret; +; CHECK: mul.rn.f32 %ret{{[0-9]+}}, %f{{[0-9]+}}, 0F40A00000; +; CHECK: ret; %z = fmul float %x, 5.0 ret float %z } define ptx_device double @t2_f64(double %x) { -; CHECK: mul.rn.f64 rd{{[0-9]+}}, rd{{[0-9]+}}, 0D4014000000000000; -; CHECK-NEXT: ret; +; CHECK: mul.rn.f64 %ret{{[0-9]+}}, %fd{{[0-9]+}}, 0D4014000000000000; +; CHECK: ret; %z = fmul double %x, 5.0 ret double %z } Modified: llvm/trunk/test/CodeGen/PTX/parameter-order.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PTX/parameter-order.ll?rev=140311&r1=140310&r2=140311&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PTX/parameter-order.ll (original) +++ llvm/trunk/test/CodeGen/PTX/parameter-order.ll Thu Sep 22 11:45:51 2011 @@ -1,8 +1,8 @@ ; RUN: llc < %s -march=ptx32 | FileCheck %s -; CHECK: .func (.reg .b32 r{{[0-9]+}}) test_parameter_order (.reg .b32 r{{[0-9]+}}, .reg .b32 r{{[0-9]+}}, .reg .b32 r{{[0-9]+}}, .reg .b32 r{{[0-9]+}}) +; CHECK: .func (.reg .b32 %ret{{[0-9]+}}) test_parameter_order (.reg .b32 %param{{[0-9]+}}, .reg .b32 %param{{[0-9]+}}, .reg .b32 %param{{[0-9]+}}, .reg .b32 %param{{[0-9]+}}) define ptx_device i32 @test_parameter_order(float %a, i32 %b, i32 %c, float %d) { -; CHECK: sub.u32 r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}} +; CHECK: sub.u32 %ret{{[0-9]+}}, %r{{[0-9]+}}, %r{{[0-9]+}} %result = sub i32 %b, %c ret i32 %result } Modified: llvm/trunk/test/CodeGen/PTX/selp.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PTX/selp.ll?rev=140311&r1=140310&r2=140311&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PTX/selp.ll (original) +++ llvm/trunk/test/CodeGen/PTX/selp.ll Thu Sep 22 11:45:51 2011 @@ -1,25 +1,25 @@ ; RUN: llc < %s -march=ptx32 | FileCheck %s define ptx_device i32 @test_selp_i32(i1 %x, i32 %y, i32 %z) { -; CHECK: selp.u32 r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}}, p{{[0-9]+}}; +; CHECK: selp.u32 %ret{{[0-9]+}}, %r{{[0-9]+}}, %r{{[0-9]+}}, %p{{[0-9]+}}; %a = select i1 %x, i32 %y, i32 %z ret i32 %a } define ptx_device i64 @test_selp_i64(i1 %x, i64 %y, i64 %z) { -; CHECK: selp.u64 rd{{[0-9]+}}, rd{{[0-9]+}}, rd{{[0-9]+}}, p{{[0-9]+}}; +; CHECK: selp.u64 %ret{{[0-9]+}}, %rd{{[0-9]+}}, %rd{{[0-9]+}}, %p{{[0-9]+}}; %a = select i1 %x, i64 %y, i64 %z ret i64 %a } define ptx_device float @test_selp_f32(i1 %x, float %y, float %z) { -; CHECK: selp.f32 r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}}, p{{[0-9]+}}; +; CHECK: selp.f32 %ret{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}, %p{{[0-9]+}}; %a = select i1 %x, float %y, float %z ret float %a } define ptx_device double @test_selp_f64(i1 %x, double %y, double %z) { -; CHECK: selp.f64 rd{{[0-9]+}}, rd{{[0-9]+}}, rd{{[0-9]+}}, p{{[0-9]+}}; +; CHECK: selp.f64 %ret{{[0-9]+}}, %fd{{[0-9]+}}, %fd{{[0-9]+}}, %p{{[0-9]+}}; %a = select i1 %x, double %y, double %z ret double %a } Modified: llvm/trunk/test/CodeGen/PTX/setp.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PTX/setp.ll?rev=140311&r1=140310&r2=140311&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PTX/setp.ll (original) +++ llvm/trunk/test/CodeGen/PTX/setp.ll Thu Sep 22 11:45:51 2011 @@ -1,190 +1,190 @@ ; RUN: llc < %s -march=ptx32 | FileCheck %s define ptx_device i32 @test_setp_eq_u32_rr(i32 %x, i32 %y) { -; CHECK: setp.eq.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, r{{[0-9]+}}; -; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; -; CHECK-NEXT: ret; +; CHECK: setp.eq.u32 %p[[P0:[0-9]+]], %r{{[0-9]+}}, %r{{[0-9]+}}; +; CHECK: selp.u32 %ret{{[0-9]+}}, 1, 0, %p[[P0]]; +; CHECK: ret; %p = icmp eq i32 %x, %y %z = zext i1 %p to i32 ret i32 %z } define ptx_device i32 @test_setp_ne_u32_rr(i32 %x, i32 %y) { -; CHECK: setp.ne.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, r{{[0-9]+}}; -; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; -; CHECK-NEXT: ret; +; CHECK: setp.ne.u32 %p[[P0:[0-9]+]], %r{{[0-9]+}}, %r{{[0-9]+}}; +; CHECK: selp.u32 %ret{{[0-9]+}}, 1, 0, %p[[P0]]; +; CHECK: ret; %p = icmp ne i32 %x, %y %z = zext i1 %p to i32 ret i32 %z } define ptx_device i32 @test_setp_lt_u32_rr(i32 %x, i32 %y) { -; CHECK: setp.lt.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, r{{[0-9]+}}; -; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; -; CHECK-NEXT: ret; +; CHECK: setp.lt.u32 %p[[P0:[0-9]+]], %r{{[0-9]+}}, %r{{[0-9]+}}; +; CHECK: selp.u32 %ret{{[0-9]+}}, 1, 0, %p[[P0]]; +; CHECK: ret; %p = icmp ult i32 %x, %y %z = zext i1 %p to i32 ret i32 %z } define ptx_device i32 @test_setp_le_u32_rr(i32 %x, i32 %y) { -; CHECK: setp.le.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, r{{[0-9]+}}; -; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; -; CHECK-NEXT: ret; +; CHECK: setp.le.u32 %p[[P0:[0-9]+]], %r{{[0-9]+}}, %r{{[0-9]+}}; +; CHECK: selp.u32 %ret{{[0-9]+}}, 1, 0, %p[[P0]]; +; CHECK: ret; %p = icmp ule i32 %x, %y %z = zext i1 %p to i32 ret i32 %z } define ptx_device i32 @test_setp_gt_u32_rr(i32 %x, i32 %y) { -; CHECK: setp.gt.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, r{{[0-9]+}}; -; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; -; CHECK-NEXT: ret; +; CHECK: setp.gt.u32 %p[[P0:[0-9]+]], %r{{[0-9]+}}, %r{{[0-9]+}}; +; CHECK: selp.u32 %ret{{[0-9]+}}, 1, 0, %p[[P0]]; +; CHECK: ret; %p = icmp ugt i32 %x, %y %z = zext i1 %p to i32 ret i32 %z } define ptx_device i32 @test_setp_ge_u32_rr(i32 %x, i32 %y) { -; CHECK: setp.ge.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, r{{[0-9]+}}; -; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; -; CHECK-NEXT: ret; +; CHECK: setp.ge.u32 %p[[P0:[0-9]+]], %r{{[0-9]+}}, %r{{[0-9]+}}; +; CHECK: selp.u32 %ret{{[0-9]+}}, 1, 0, %p[[P0]]; +; CHECK: ret; %p = icmp uge i32 %x, %y %z = zext i1 %p to i32 ret i32 %z } define ptx_device i32 @test_setp_lt_s32_rr(i32 %x, i32 %y) { -; CHECK: setp.lt.s32 p[[P0:[0-9]+]], r{{[0-9]+}}, r{{[0-9]+}}; -; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; -; CHECK-NEXT: ret; +; CHECK: setp.lt.s32 %p[[P0:[0-9]+]], %r{{[0-9]+}}, %r{{[0-9]+}}; +; CHECK: selp.u32 %ret{{[0-9]+}}, 1, 0, %p[[P0]]; +; CHECK: ret; %p = icmp slt i32 %x, %y %z = zext i1 %p to i32 ret i32 %z } define ptx_device i32 @test_setp_le_s32_rr(i32 %x, i32 %y) { -; CHECK: setp.le.s32 p[[P0:[0-9]+]], r{{[0-9]+}}, r{{[0-9]+}}; -; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; -; CHECK-NEXT: ret; +; CHECK: setp.le.s32 %p[[P0:[0-9]+]], %r{{[0-9]+}}, %r{{[0-9]+}}; +; CHECK: selp.u32 %ret{{[0-9]+}}, 1, 0, %p[[P0]]; +; CHECK: ret; %p = icmp sle i32 %x, %y %z = zext i1 %p to i32 ret i32 %z } define ptx_device i32 @test_setp_gt_s32_rr(i32 %x, i32 %y) { -; CHECK: setp.gt.s32 p[[P0:[0-9]+]], r{{[0-9]+}}, r{{[0-9]+}}; -; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; -; CHECK-NEXT: ret; +; CHECK: setp.gt.s32 %p[[P0:[0-9]+]], %r{{[0-9]+}}, %r{{[0-9]+}}; +; CHECK: selp.u32 %ret{{[0-9]+}}, 1, 0, %p[[P0]]; +; CHECK: ret; %p = icmp sgt i32 %x, %y %z = zext i1 %p to i32 ret i32 %z } define ptx_device i32 @test_setp_ge_s32_rr(i32 %x, i32 %y) { -; CHECK: setp.ge.s32 p[[P0:[0-9]+]], r{{[0-9]+}}, r{{[0-9]+}}; -; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; -; CHECK-NEXT: ret; +; CHECK: setp.ge.s32 %p[[P0:[0-9]+]], %r{{[0-9]+}}, %r{{[0-9]+}}; +; CHECK: selp.u32 %ret{{[0-9]+}}, 1, 0, %p[[P0]]; +; CHECK: ret; %p = icmp sge i32 %x, %y %z = zext i1 %p to i32 ret i32 %z } define ptx_device i32 @test_setp_eq_u32_ri(i32 %x) { -; CHECK: setp.eq.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, 1; -; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; -; CHECK-NEXT: ret; +; CHECK: setp.eq.u32 %p[[P0:[0-9]+]], %r{{[0-9]+}}, 1; +; CHECK: selp.u32 %ret{{[0-9]+}}, 1, 0, %p[[P0]]; +; CHECK: ret; %p = icmp eq i32 %x, 1 %z = zext i1 %p to i32 ret i32 %z } define ptx_device i32 @test_setp_ne_u32_ri(i32 %x) { -; CHECK: setp.ne.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, 1; -; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; -; CHECK-NEXT: ret; +; CHECK: setp.ne.u32 %p[[P0:[0-9]+]], %r{{[0-9]+}}, 1; +; CHECK: selp.u32 %ret{{[0-9]+}}, 1, 0, %p[[P0]]; +; CHECK: ret; %p = icmp ne i32 %x, 1 %z = zext i1 %p to i32 ret i32 %z } define ptx_device i32 @test_setp_lt_u32_ri(i32 %x) { -; CHECK: setp.eq.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, 0; -; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; -; CHECK-NEXT: ret; +; CHECK: setp.eq.u32 %p[[P0:[0-9]+]], %r{{[0-9]+}}, 0; +; CHECK: selp.u32 %ret{{[0-9]+}}, 1, 0, %p[[P0]]; +; CHECK: ret; %p = icmp ult i32 %x, 1 %z = zext i1 %p to i32 ret i32 %z } define ptx_device i32 @test_setp_le_u32_ri(i32 %x) { -; CHECK: setp.lt.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, 2; -; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; -; CHECK-NEXT: ret; +; CHECK: setp.lt.u32 %p[[P0:[0-9]+]], %r{{[0-9]+}}, 2; +; CHECK: selp.u32 %ret{{[0-9]+}}, 1, 0, %p[[P0]]; +; CHECK: ret; %p = icmp ule i32 %x, 1 %z = zext i1 %p to i32 ret i32 %z } define ptx_device i32 @test_setp_gt_u32_ri(i32 %x) { -; CHECK: setp.gt.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, 1; -; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; -; CHECK-NEXT: ret; +; CHECK: setp.gt.u32 %p[[P0:[0-9]+]], %r{{[0-9]+}}, 1; +; CHECK: selp.u32 %ret{{[0-9]+}}, 1, 0, %p[[P0]]; +; CHECK: ret; %p = icmp ugt i32 %x, 1 %z = zext i1 %p to i32 ret i32 %z } define ptx_device i32 @test_setp_ge_u32_ri(i32 %x) { -; CHECK: setp.ne.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, 0; -; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; -; CHECK-NEXT: ret; +; CHECK: setp.ne.u32 %p[[P0:[0-9]+]], %r{{[0-9]+}}, 0; +; CHECK: selp.u32 %ret{{[0-9]+}}, 1, 0, %p[[P0]]; +; CHECK: ret; %p = icmp uge i32 %x, 1 %z = zext i1 %p to i32 ret i32 %z } define ptx_device i32 @test_setp_lt_s32_ri(i32 %x) { -; CHECK: setp.lt.s32 p[[P0:[0-9]+]], r{{[0-9]+}}, 1; -; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; -; CHECK-NEXT: ret; +; CHECK: setp.lt.s32 %p[[P0:[0-9]+]], %r{{[0-9]+}}, 1; +; CHECK: selp.u32 %ret{{[0-9]+}}, 1, 0, %p[[P0]]; +; CHECK: ret; %p = icmp slt i32 %x, 1 %z = zext i1 %p to i32 ret i32 %z } define ptx_device i32 @test_setp_le_s32_ri(i32 %x) { -; CHECK: setp.lt.s32 p[[P0:[0-9]+]], r{{[0-9]+}}, 2; -; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; -; CHECK-NEXT: ret; +; CHECK: setp.lt.s32 %p[[P0:[0-9]+]], %r{{[0-9]+}}, 2; +; CHECK: selp.u32 %ret{{[0-9]+}}, 1, 0, %p[[P0]]; +; CHECK: ret; %p = icmp sle i32 %x, 1 %z = zext i1 %p to i32 ret i32 %z } define ptx_device i32 @test_setp_gt_s32_ri(i32 %x) { -; CHECK: setp.gt.s32 p[[P0:[0-9]+]], r{{[0-9]+}}, 1; -; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; -; CHECK-NEXT: ret; +; CHECK: setp.gt.s32 %p[[P0:[0-9]+]], %r{{[0-9]+}}, 1; +; CHECK: selp.u32 %ret{{[0-9]+}}, 1, 0, %p[[P0]]; +; CHECK: ret; %p = icmp sgt i32 %x, 1 %z = zext i1 %p to i32 ret i32 %z } define ptx_device i32 @test_setp_ge_s32_ri(i32 %x) { -; CHECK: setp.gt.s32 p[[P0:[0-9]+]], r{{[0-9]+}}, 0; -; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; -; CHECK-NEXT: ret; +; CHECK: setp.gt.s32 %p[[P0:[0-9]+]], %r{{[0-9]+}}, 0; +; CHECK: selp.u32 %ret{{[0-9]+}}, 1, 0, %p[[P0]]; +; CHECK: ret; %p = icmp sge i32 %x, 1 %z = zext i1 %p to i32 ret i32 %z } define ptx_device i32 @test_setp_4_op_format_1(i32 %x, i32 %y, i32 %u, i32 %v) { -; CHECK: setp.gt.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, r{{[0-9]+}}; -; CHECK-NEXT: setp.eq.and.u32 p[[P0]], r{{[0-9]+}}, r{{[0-9]+}}, p[[P0]]; -; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; -; CHECK-NEXT: ret; +; CHECK: setp.gt.u32 %p[[P0:[0-9]+]], %r{{[0-9]+}}, %r{{[0-9]+}}; +; CHECK: setp.eq.and.u32 %p1, %r{{[0-9]+}}, %r{{[0-9]+}}, %p[[P0]]; +; CHECK: selp.u32 %ret{{[0-9]+}}, 1, 0, %p1; +; CHECK: ret; %c = icmp eq i32 %x, %y %d = icmp ugt i32 %u, %v %e = and i1 %c, %d @@ -193,10 +193,10 @@ } define ptx_device i32 @test_setp_4_op_format_2(i32 %x, i32 %y, i32 %w) { -; CHECK: setp.gt.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, 0; -; CHECK-NEXT: setp.eq.and.u32 p[[P0]], r{{[0-9]+}}, r{{[0-9]+}}, !p[[P0]]; -; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; -; CHECK-NEXT: ret; +; CHECK: setp.gt.u32 %p[[P0:[0-9]+]], %r{{[0-9]+}}, 0; +; CHECK: setp.eq.and.u32 %p1, %r{{[0-9]+}}, %r{{[0-9]+}}, !%p[[P0]]; +; CHECK: selp.u32 %ret{{[0-9]+}}, 1, 0, %p1; +; CHECK: ret; %c = trunc i32 %w to i1 %d = icmp eq i32 %x, %y %e = xor i1 %c, 1 Modified: llvm/trunk/test/CodeGen/PTX/shl.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PTX/shl.ll?rev=140311&r1=140310&r2=140311&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PTX/shl.ll (original) +++ llvm/trunk/test/CodeGen/PTX/shl.ll Thu Sep 22 11:45:51 2011 @@ -1,21 +1,21 @@ ; RUN: llc < %s -march=ptx32 | FileCheck %s define ptx_device i32 @t1(i32 %x, i32 %y) { -; CHECK: shl.b32 r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}} +; CHECK: shl.b32 %ret{{[0-9]+}}, %r{{[0-9]+}}, %r{{[0-9]+}} %z = shl i32 %x, %y ; CHECK: ret; ret i32 %z } define ptx_device i32 @t2(i32 %x) { -; CHECK: shl.b32 r{{[0-9]+}}, r{{[0-9]+}}, 3 +; CHECK: shl.b32 %ret{{[0-9]+}}, %r{{[0-9]+}}, 3 %z = shl i32 %x, 3 ; CHECK: ret; ret i32 %z } define ptx_device i32 @t3(i32 %x) { -; CHECK: shl.b32 r{{[0-9]+}}, 3, r{{[0-9]+}} +; CHECK: shl.b32 %ret{{[0-9]+}}, 3, %r{{[0-9]+}} %z = shl i32 3, %x ; CHECK: ret; ret i32 %z Modified: llvm/trunk/test/CodeGen/PTX/shr.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PTX/shr.ll?rev=140311&r1=140310&r2=140311&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PTX/shr.ll (original) +++ llvm/trunk/test/CodeGen/PTX/shr.ll Thu Sep 22 11:45:51 2011 @@ -1,42 +1,42 @@ ; RUN: llc < %s -march=ptx32 | FileCheck %s define ptx_device i32 @t1(i32 %x, i32 %y) { -; CHECK: shr.u32 r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}} +; CHECK: shr.u32 %ret{{[0-9]+}}, %r{{[0-9]+}}, %r{{[0-9]+}} %z = lshr i32 %x, %y ; CHECK: ret; ret i32 %z } define ptx_device i32 @t2(i32 %x) { -; CHECK: shr.u32 r{{[0-9]+}}, r{{[0-9]+}}, 3 +; CHECK: shr.u32 %ret{{[0-9]+}}, %r{{[0-9]+}}, 3 %z = lshr i32 %x, 3 ; CHECK: ret; ret i32 %z } define ptx_device i32 @t3(i32 %x) { -; CHECK: shr.u32 r{{[0-9]+}}, 3, r{{[0-9]+}} +; CHECK: shr.u32 %ret{{[0-9]+}}, 3, %r{{[0-9]+}} %z = lshr i32 3, %x ; CHECK: ret; ret i32 %z } define ptx_device i32 @t4(i32 %x, i32 %y) { -; CHECK: shr.s32 r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}} +; CHECK: shr.s32 %ret{{[0-9]+}}, %r{{[0-9]+}}, %r{{[0-9]+}} %z = ashr i32 %x, %y ; CHECK: ret; ret i32 %z } define ptx_device i32 @t5(i32 %x) { -; CHECK: shr.s32 r{{[0-9]+}}, r{{[0-9]+}}, 3 +; CHECK: shr.s32 %ret{{[0-9]+}}, %r{{[0-9]+}}, 3 %z = ashr i32 %x, 3 ; CHECK: ret; ret i32 %z } define ptx_device i32 @t6(i32 %x) { -; CHECK: shr.s32 r{{[0-9]+}}, -3, r{{[0-9]+}} +; CHECK: shr.s32 %ret{{[0-9]+}}, -3, %r{{[0-9]+}} %z = ashr i32 -3, %x ; CHECK: ret; ret i32 %z Modified: llvm/trunk/test/CodeGen/PTX/simple-call.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PTX/simple-call.ll?rev=140311&r1=140310&r2=140311&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PTX/simple-call.ll (original) +++ llvm/trunk/test/CodeGen/PTX/simple-call.ll Thu Sep 22 11:45:51 2011 @@ -1,4 +1,5 @@ ; RUN: llc < %s -march=ptx32 -mattr=sm20 | FileCheck %s +; XFAIL: * define ptx_device void @test_add(float %x, float %y) { ; CHECK: ret; Modified: llvm/trunk/test/CodeGen/PTX/st.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PTX/st.ll?rev=140311&r1=140310&r2=140311&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PTX/st.ll (original) +++ llvm/trunk/test/CodeGen/PTX/st.ll Thu Sep 22 11:45:51 2011 @@ -63,48 +63,48 @@ define ptx_device void @t1_u16(i16* %p, i16 %x) { entry: -;CHECK: st.global.u16 [r{{[0-9]+}}], rh{{[0-9]+}}; -;CHECK-NEXT: ret; +;CHECK: st.global.u16 [%r{{[0-9]+}}], %rh{{[0-9]+}}; +;CHECK: ret; store i16 %x, i16* %p ret void } define ptx_device void @t1_u32(i32* %p, i32 %x) { entry: -;CHECK: st.global.u32 [r{{[0-9]+}}], r{{[0-9]+}}; -;CHECK-NEXT: ret; +;CHECK: st.global.u32 [%r{{[0-9]+}}], %r{{[0-9]+}}; +;CHECK: ret; store i32 %x, i32* %p ret void } define ptx_device void @t1_u64(i64* %p, i64 %x) { entry: -;CHECK: st.global.u64 [r{{[0-9]+}}], rd{{[0-9]+}}; -;CHECK-NEXT: ret; +;CHECK: st.global.u64 [%r{{[0-9]+}}], %rd{{[0-9]+}}; +;CHECK: ret; store i64 %x, i64* %p ret void } define ptx_device void @t1_f32(float* %p, float %x) { entry: -;CHECK: st.global.f32 [r{{[0-9]+}}], r{{[0-9]+}}; -;CHECK-NEXT: ret; +;CHECK: st.global.f32 [%r{{[0-9]+}}], %f{{[0-9]+}}; +;CHECK: ret; store float %x, float* %p ret void } define ptx_device void @t1_f64(double* %p, double %x) { entry: -;CHECK: st.global.f64 [r{{[0-9]+}}], rd{{[0-9]+}}; -;CHECK-NEXT: ret; +;CHECK: st.global.f64 [%r{{[0-9]+}}], %fd{{[0-9]+}}; +;CHECK: ret; store double %x, double* %p ret void } define ptx_device void @t2_u16(i16* %p, i16 %x) { entry: -;CHECK: st.global.u16 [r{{[0-9]+}}+2], rh{{[0-9]+}}; -;CHECK-NEXT: ret; +;CHECK: st.global.u16 [%r{{[0-9]+}}+2], %rh{{[0-9]+}}; +;CHECK: ret; %i = getelementptr i16* %p, i32 1 store i16 %x, i16* %i ret void @@ -112,8 +112,8 @@ define ptx_device void @t2_u32(i32* %p, i32 %x) { entry: -;CHECK: st.global.u32 [r{{[0-9]+}}+4], r{{[0-9]+}}; -;CHECK-NEXT: ret; +;CHECK: st.global.u32 [%r{{[0-9]+}}+4], %r{{[0-9]+}}; +;CHECK: ret; %i = getelementptr i32* %p, i32 1 store i32 %x, i32* %i ret void @@ -121,8 +121,8 @@ define ptx_device void @t2_u64(i64* %p, i64 %x) { entry: -;CHECK: st.global.u64 [r{{[0-9]+}}+8], rd{{[0-9]+}}; -;CHECK-NEXT: ret; +;CHECK: st.global.u64 [%r{{[0-9]+}}+8], %rd{{[0-9]+}}; +;CHECK: ret; %i = getelementptr i64* %p, i32 1 store i64 %x, i64* %i ret void @@ -130,8 +130,8 @@ define ptx_device void @t2_f32(float* %p, float %x) { entry: -;CHECK: st.global.f32 [r{{[0-9]+}}+4], r{{[0-9]+}}; -;CHECK-NEXT: ret; +;CHECK: st.global.f32 [%r{{[0-9]+}}+4], %f{{[0-9]+}}; +;CHECK: ret; %i = getelementptr float* %p, i32 1 store float %x, float* %i ret void @@ -139,8 +139,8 @@ define ptx_device void @t2_f64(double* %p, double %x) { entry: -;CHECK: st.global.f64 [r{{[0-9]+}}+8], rd{{[0-9]+}}; -;CHECK-NEXT: ret; +;CHECK: st.global.f64 [%r{{[0-9]+}}+8], %fd{{[0-9]+}}; +;CHECK: ret; %i = getelementptr double* %p, i32 1 store double %x, double* %i ret void @@ -148,10 +148,10 @@ define ptx_device void @t3_u16(i16* %p, i32 %q, i16 %x) { entry: -;CHECK: shl.b32 r[[R0:[0-9]+]], r{{[0-9]+}}, 1; -;CHECK-NEXT: add.u32 r[[R0]], r{{[0-9]+}}, r[[R0]]; -;CHECK-NEXT: st.global.u16 [r[[R0]]], rh{{[0-9]+}}; -;CHECK-NEXT: ret; +;CHECK: shl.b32 %r[[R0:[0-9]+]], %r{{[0-9]+}}, 1; +;CHECK: add.u32 %r{{[0-9]+}}, %r{{[0-9]+}}, %r[[R0]]; +;CHECK: st.global.u16 [%r{{[0-9]+}}], %rh{{[0-9]+}}; +;CHECK: ret; %i = getelementptr i16* %p, i32 %q store i16 %x, i16* %i ret void @@ -159,10 +159,10 @@ define ptx_device void @t3_u32(i32* %p, i32 %q, i32 %x) { entry: -;CHECK: shl.b32 r[[R0:[0-9]+]], r{{[0-9]+}}, 2; -;CHECK-NEXT: add.u32 r[[R0]], r{{[0-9]+}}, r[[R0]]; -;CHECK-NEXT: st.global.u32 [r[[R0]]], r{{[0-9]+}}; -;CHECK-NEXT: ret; +;CHECK: shl.b32 %r[[R0:[0-9]+]], %r{{[0-9]+}}, 2; +;CHECK: add.u32 %r{{[0-9]+}}, %r{{[0-9]+}}, %r[[R0]]; +;CHECK: st.global.u32 [%r{{[0-9]+}}], %r{{[0-9]+}}; +;CHECK: ret; %i = getelementptr i32* %p, i32 %q store i32 %x, i32* %i ret void @@ -170,10 +170,10 @@ define ptx_device void @t3_u64(i64* %p, i32 %q, i64 %x) { entry: -;CHECK: shl.b32 r[[R0:[0-9]+]], r{{[0-9]+}}, 3; -;CHECK-NEXT: add.u32 r[[R0]], r{{[0-9]+}}, r[[R0]]; -;CHECK-NEXT: st.global.u64 [r[[R0]]], rd{{[0-9]+}}; -;CHECK-NEXT: ret; +;CHECK: shl.b32 %r[[R0:[0-9]+]], %r{{[0-9]+}}, 3; +;CHECK: add.u32 %r{{[0-9]+}}, %r{{[0-9]+}}, %r[[R0]]; +;CHECK: st.global.u64 [%r{{[0-9]+}}], %rd{{[0-9]+}}; +;CHECK: ret; %i = getelementptr i64* %p, i32 %q store i64 %x, i64* %i ret void @@ -181,10 +181,10 @@ define ptx_device void @t3_f32(float* %p, i32 %q, float %x) { entry: -;CHECK: shl.b32 r[[R0:[0-9]+]], r{{[0-9]+}}, 2; -;CHECK-NEXT: add.u32 r[[R0]], r{{[0-9]+}}, r[[R0]]; -;CHECK-NEXT: st.global.f32 [r[[R0]]], r{{[0-9]+}}; -;CHECK-NEXT: ret; +;CHECK: shl.b32 %r[[R0:[0-9]+]], %r{{[0-9]+}}, 2; +;CHECK: add.u32 %r{{[0-9]+}}, %r{{[0-9]+}}, %r[[R0]]; +;CHECK: st.global.f32 [%r{{[0-9]+}}], %f{{[0-9]+}}; +;CHECK: ret; %i = getelementptr float* %p, i32 %q store float %x, float* %i ret void @@ -192,10 +192,10 @@ define ptx_device void @t3_f64(double* %p, i32 %q, double %x) { entry: -;CHECK: shl.b32 r[[R0:[0-9]+]], r{{[0-9]+}}, 3; -;CHECK-NEXT: add.u32 r[[R0]], r{{[0-9]+}}, r[[R0]]; -;CHECK-NEXT: st.global.f64 [r[[R0]]], rd{{[0-9]+}}; -;CHECK-NEXT: ret; +;CHECK: shl.b32 %r[[R0:[0-9]+]], %r{{[0-9]+}}, 3; +;CHECK: add.u32 %r{{[0-9]+}}, %r{{[0-9]+}}, %r[[R0]]; +;CHECK: st.global.f64 [%r{{[0-9]+}}], %fd{{[0-9]+}}; +;CHECK: ret; %i = getelementptr double* %p, i32 %q store double %x, double* %i ret void @@ -203,9 +203,9 @@ define ptx_device void @t4_global_u16(i16 %x) { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_i16; -;CHECK-NEXT: st.global.u16 [r[[R0]]], rh{{[0-9]+}}; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_i16; +;CHECK: st.global.u16 [%r[[R0]]], %rh{{[0-9]+}}; +;CHECK: ret; %i = getelementptr [10 x i16]* @array_i16, i16 0, i16 0 store i16 %x, i16* %i ret void @@ -213,9 +213,9 @@ define ptx_device void @t4_global_u32(i32 %x) { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_i32; -;CHECK-NEXT: st.global.u32 [r[[R0]]], r{{[0-9]+}}; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_i32; +;CHECK: st.global.u32 [%r[[R0]]], %r{{[0-9]+}}; +;CHECK: ret; %i = getelementptr [10 x i32]* @array_i32, i32 0, i32 0 store i32 %x, i32* %i ret void @@ -223,9 +223,9 @@ define ptx_device void @t4_global_u64(i64 %x) { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_i64; -;CHECK-NEXT: st.global.u64 [r[[R0]]], rd{{[0-9]+}}; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_i64; +;CHECK: st.global.u64 [%r[[R0]]], %rd{{[0-9]+}}; +;CHECK: ret; %i = getelementptr [10 x i64]* @array_i64, i32 0, i32 0 store i64 %x, i64* %i ret void @@ -233,9 +233,9 @@ define ptx_device void @t4_global_f32(float %x) { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_float; -;CHECK-NEXT: st.global.f32 [r[[R0]]], r{{[0-9]+}}; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_float; +;CHECK: st.global.f32 [%r[[R0]]], %f{{[0-9]+}}; +;CHECK: ret; %i = getelementptr [10 x float]* @array_float, i32 0, i32 0 store float %x, float* %i ret void @@ -243,9 +243,9 @@ define ptx_device void @t4_global_f64(double %x) { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_double; -;CHECK-NEXT: st.global.f64 [r[[R0]]], rd{{[0-9]+}}; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_double; +;CHECK: st.global.f64 [%r[[R0]]], %fd{{[0-9]+}}; +;CHECK: ret; %i = getelementptr [10 x double]* @array_double, i32 0, i32 0 store double %x, double* %i ret void @@ -253,9 +253,9 @@ define ptx_device void @t4_local_u16(i16 %x) { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_local_i16; -;CHECK-NEXT: st.local.u16 [r[[R0]]], rh{{[0-9]+}}; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_local_i16; +;CHECK: st.local.u16 [%r[[R0]]], %rh{{[0-9]+}}; +;CHECK: ret; %i = getelementptr [10 x i16] addrspace(2)* @array_local_i16, i32 0, i32 0 store i16 %x, i16 addrspace(2)* %i ret void @@ -263,9 +263,9 @@ define ptx_device void @t4_local_u32(i32 %x) { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_local_i32; -;CHECK-NEXT: st.local.u32 [r[[R0]]], r{{[0-9]+}}; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_local_i32; +;CHECK: st.local.u32 [%r[[R0]]], %r{{[0-9]+}}; +;CHECK: ret; %i = getelementptr [10 x i32] addrspace(2)* @array_local_i32, i32 0, i32 0 store i32 %x, i32 addrspace(2)* %i ret void @@ -273,9 +273,9 @@ define ptx_device void @t4_local_u64(i64 %x) { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_local_i64; -;CHECK-NEXT: st.local.u64 [r[[R0]]], rd{{[0-9]+}}; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_local_i64; +;CHECK: st.local.u64 [%r[[R0]]], %rd{{[0-9]+}}; +;CHECK: ret; %i = getelementptr [10 x i64] addrspace(2)* @array_local_i64, i32 0, i32 0 store i64 %x, i64 addrspace(2)* %i ret void @@ -283,9 +283,9 @@ define ptx_device void @t4_local_f32(float %x) { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_local_float; -;CHECK-NEXT: st.local.f32 [r[[R0]]], r{{[0-9]+}}; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_local_float; +;CHECK: st.local.f32 [%r[[R0]]], %f{{[0-9]+}}; +;CHECK: ret; %i = getelementptr [10 x float] addrspace(2)* @array_local_float, i32 0, i32 0 store float %x, float addrspace(2)* %i ret void @@ -293,9 +293,9 @@ define ptx_device void @t4_local_f64(double %x) { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_local_double; -;CHECK-NEXT: st.local.f64 [r[[R0]]], rd{{[0-9]+}}; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_local_double; +;CHECK: st.local.f64 [%r[[R0]]], %fd{{[0-9]+}}; +;CHECK: ret; %i = getelementptr [10 x double] addrspace(2)* @array_local_double, i32 0, i32 0 store double %x, double addrspace(2)* %i ret void @@ -303,9 +303,9 @@ define ptx_device void @t4_shared_u16(i16 %x) { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_shared_i16; -;CHECK-NEXT: st.shared.u16 [r[[R0]]], rh{{[0-9]+}}; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_shared_i16; +;CHECK: st.shared.u16 [%r[[R0]]], %rh{{[0-9]+}}; +;CHECK: ret; %i = getelementptr [10 x i16] addrspace(4)* @array_shared_i16, i32 0, i32 0 store i16 %x, i16 addrspace(4)* %i ret void @@ -313,9 +313,9 @@ define ptx_device void @t4_shared_u32(i32 %x) { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_shared_i32; -;CHECK-NEXT: st.shared.u32 [r[[R0]]], r{{[0-9]+}}; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_shared_i32; +;CHECK: st.shared.u32 [%r[[R0]]], %r{{[0-9]+}}; +;CHECK: ret; %i = getelementptr [10 x i32] addrspace(4)* @array_shared_i32, i32 0, i32 0 store i32 %x, i32 addrspace(4)* %i ret void @@ -323,9 +323,9 @@ define ptx_device void @t4_shared_u64(i64 %x) { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_shared_i64; -;CHECK-NEXT: st.shared.u64 [r[[R0]]], rd{{[0-9]+}}; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_shared_i64; +;CHECK: st.shared.u64 [%r[[R0]]], %rd{{[0-9]+}}; +;CHECK: ret; %i = getelementptr [10 x i64] addrspace(4)* @array_shared_i64, i32 0, i32 0 store i64 %x, i64 addrspace(4)* %i ret void @@ -333,9 +333,9 @@ define ptx_device void @t4_shared_f32(float %x) { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_shared_float; -;CHECK-NEXT: st.shared.f32 [r[[R0]]], r{{[0-9]+}}; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_shared_float; +;CHECK: st.shared.f32 [%r[[R0]]], %f{{[0-9]+}}; +;CHECK: ret; %i = getelementptr [10 x float] addrspace(4)* @array_shared_float, i32 0, i32 0 store float %x, float addrspace(4)* %i ret void @@ -343,9 +343,9 @@ define ptx_device void @t4_shared_f64(double %x) { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_shared_double; -;CHECK-NEXT: st.shared.f64 [r[[R0]]], rd{{[0-9]+}}; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_shared_double; +;CHECK: st.shared.f64 [%r[[R0]]], %fd{{[0-9]+}}; +;CHECK: ret; %i = getelementptr [10 x double] addrspace(4)* @array_shared_double, i32 0, i32 0 store double %x, double addrspace(4)* %i ret void @@ -353,9 +353,9 @@ define ptx_device void @t5_u16(i16 %x) { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_i16; -;CHECK-NEXT: st.global.u16 [r[[R0]]+2], rh{{[0-9]+}}; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_i16; +;CHECK: st.global.u16 [%r[[R0]]+2], %rh{{[0-9]+}}; +;CHECK: ret; %i = getelementptr [10 x i16]* @array_i16, i32 0, i32 1 store i16 %x, i16* %i ret void @@ -363,9 +363,9 @@ define ptx_device void @t5_u32(i32 %x) { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_i32; -;CHECK-NEXT: st.global.u32 [r[[R0]]+4], r{{[0-9]+}}; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_i32; +;CHECK: st.global.u32 [%r[[R0]]+4], %r{{[0-9]+}}; +;CHECK: ret; %i = getelementptr [10 x i32]* @array_i32, i32 0, i32 1 store i32 %x, i32* %i ret void @@ -373,9 +373,9 @@ define ptx_device void @t5_u64(i64 %x) { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_i64; -;CHECK-NEXT: st.global.u64 [r[[R0]]+8], rd{{[0-9]+}}; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_i64; +;CHECK: st.global.u64 [%r[[R0]]+8], %rd{{[0-9]+}}; +;CHECK: ret; %i = getelementptr [10 x i64]* @array_i64, i32 0, i32 1 store i64 %x, i64* %i ret void @@ -383,9 +383,9 @@ define ptx_device void @t5_f32(float %x) { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_float; -;CHECK-NEXT: st.global.f32 [r[[R0]]+4], r{{[0-9]+}}; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_float; +;CHECK: st.global.f32 [%r[[R0]]+4], %f{{[0-9]+}}; +;CHECK: ret; %i = getelementptr [10 x float]* @array_float, i32 0, i32 1 store float %x, float* %i ret void @@ -393,9 +393,9 @@ define ptx_device void @t5_f64(double %x) { entry: -;CHECK: mov.u32 r[[R0:[0-9]+]], array_double; -;CHECK-NEXT: st.global.f64 [r[[R0]]+8], rd{{[0-9]+}}; -;CHECK-NEXT: ret; +;CHECK: mov.u32 %r[[R0:[0-9]+]], array_double; +;CHECK: st.global.f64 [%r[[R0]]+8], %fd{{[0-9]+}}; +;CHECK: ret; %i = getelementptr [10 x double]* @array_double, i32 0, i32 1 store double %x, double* %i ret void Modified: llvm/trunk/test/CodeGen/PTX/sub.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PTX/sub.ll?rev=140311&r1=140310&r2=140311&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PTX/sub.ll (original) +++ llvm/trunk/test/CodeGen/PTX/sub.ll Thu Sep 22 11:45:51 2011 @@ -1,71 +1,71 @@ ; RUN: llc < %s -march=ptx32 | FileCheck %s define ptx_device i16 @t1_u16(i16 %x, i16 %y) { -; CHECK: sub.u16 rh{{[0-9]+}}, rh{{[0-9]+}}, rh{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: sub.u16 %ret{{[0-9]+}}, %rh{{[0-9]+}}, %rh{{[0-9]+}}; +; CHECK: ret; %z = sub i16 %x, %y ret i16 %z } define ptx_device i32 @t1_u32(i32 %x, i32 %y) { -; CHECK: sub.u32 r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: sub.u32 %ret{{[0-9]+}}, %r{{[0-9]+}}, %r{{[0-9]+}}; +; CHECK: ret; %z = sub i32 %x, %y ret i32 %z } define ptx_device i64 @t1_u64(i64 %x, i64 %y) { -; CHECK: sub.u64 rd{{[0-9]+}}, rd{{[0-9]+}}, rd{{[0-9]+}}; -; CHECK-NEXT: ret; +; CHECK: sub.u64 %ret{{[0-9]+}}, %rd{{[0-9]+}}, %rd{{[0-9]+}}; +; CHECK: ret; %z = sub i64 %x, %y ret i64 %z } define ptx_device float @t1_f32(float %x, float %y) { -; CHECK: sub.rn.f32 r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}} -; CHECK-NEXT: ret; +; CHECK: sub.rn.f32 %ret{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}} +; CHECK: ret; %z = fsub float %x, %y ret float %z } define ptx_device double @t1_f64(double %x, double %y) { -; CHECK: sub.rn.f64 rd{{[0-9]+}}, rd{{[0-9]+}}, rd{{[0-9]+}} -; CHECK-NEXT: ret; +; CHECK: sub.rn.f64 %ret{{[0-9]+}}, %fd{{[0-9]+}}, %fd{{[0-9]+}} +; CHECK: ret; %z = fsub double %x, %y ret double %z } define ptx_device i16 @t2_u16(i16 %x) { -; CHECK: add.u16 rh{{[0-9]+}}, rh{{[0-9]+}}, -1; -; CHECK-NEXT: ret; +; CHECK: add.u16 %ret{{[0-9]+}}, %rh{{[0-9]+}}, -1; +; CHECK: ret; %z = sub i16 %x, 1 ret i16 %z } define ptx_device i32 @t2_u32(i32 %x) { -; CHECK: add.u32 r{{[0-9]+}}, r{{[0-9]+}}, -1; -; CHECK-NEXT: ret; +; CHECK: add.u32 %ret{{[0-9]+}}, %r{{[0-9]+}}, -1; +; CHECK: ret; %z = sub i32 %x, 1 ret i32 %z } define ptx_device i64 @t2_u64(i64 %x) { -; CHECK: add.u64 rd{{[0-9]+}}, rd{{[0-9]+}}, -1; -; CHECK-NEXT: ret; +; CHECK: add.u64 %ret{{[0-9]+}}, %rd{{[0-9]+}}, -1; +; CHECK: ret; %z = sub i64 %x, 1 ret i64 %z } define ptx_device float @t2_f32(float %x) { -; CHECK: add.rn.f32 r{{[0-9]+}}, r{{[0-9]+}}, 0FBF800000; -; CHECK-NEXT: ret; +; CHECK: add.rn.f32 %ret{{[0-9]+}}, %f{{[0-9]+}}, 0FBF800000; +; CHECK: ret; %z = fsub float %x, 1.0 ret float %z } define ptx_device double @t2_f64(double %x) { -; CHECK: add.rn.f64 rd{{[0-9]+}}, rd{{[0-9]+}}, 0DBFF0000000000000; -; CHECK-NEXT: ret; +; CHECK: add.rn.f64 %ret{{[0-9]+}}, %fd{{[0-9]+}}, 0DBFF0000000000000; +; CHECK: ret; %z = fsub double %x, 1.0 ret double %z } From ahatanak at gmail.com Thu Sep 22 12:17:53 2011 From: ahatanak at gmail.com (Akira Hatanaka) Date: Thu, 22 Sep 2011 10:17:53 -0700 Subject: [llvm-commits] [patch] add n32/64 ABI description. In-Reply-To: References: Message-ID: A few comments. Please let me know if you have any questions. - If N64 and N32 have the same calling convention, you should define just one for both (e.g. CC_MIps64). - Arguments passed in Integer registers shadow floating pointer registers and vice verca. For example, the first doubleword is passed in either $4 or $f1, the second in either $5 or $f1, and so on. Probably you will need to use CCAssignToRegWithShadow (please see ARMCallingConv.td). - Integer arguments are all promoted to i64. - i64 integer arguments should be passed in 64-bit registers (I will add the register and register file definitions shortly). Also, i64 return value should be in 64-bit registers. - Arguments that cannot be passed in registers are push to the stack, so you need to use CCAssignToStack. On Thu, Sep 22, 2011 at 12:23 AM, Liu wrote: > Hi > > I added n32/64 ABI description for MIPS Backend. > > --Liu > From ahatanak at gmail.com Thu Sep 22 12:22:15 2011 From: ahatanak at gmail.com (Akira Hatanaka) Date: Thu, 22 Sep 2011 10:22:15 -0700 Subject: [llvm-commits] [patch] add mips64 support to EABI. In-Reply-To: References: Message-ID: Unless there is an urgent need to add support for 64-bit EABI, I think it is better to focus on getting N32/64 work first. Also, 32-bit EABI hasn't been tested as much as O32, so we should make sure it works before we add 64-bit EABI. On Thu, Sep 22, 2011 at 8:33 AM, Liu wrote: > Hi > > I think that EABI is needed to be supported in MIPS64, so I try to > make it happen. > > --Liu > From ahatanak at gmail.com Thu Sep 22 12:26:58 2011 From: ahatanak at gmail.com (Akira Hatanaka) Date: Thu, 22 Sep 2011 17:26:58 -0000 Subject: [llvm-commits] [llvm] r140313 - /llvm/trunk/lib/Target/Mips/MipsTargetMachine.h Message-ID: <20110922172658.DF9372A6C12C@llvm.org> Author: ahatanak Date: Thu Sep 22 12:26:58 2011 New Revision: 140313 URL: http://llvm.org/viewvc/llvm-project?rev=140313&view=rev Log: Fix typo. Modified: llvm/trunk/lib/Target/Mips/MipsTargetMachine.h Modified: llvm/trunk/lib/Target/Mips/MipsTargetMachine.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsTargetMachine.h?rev=140313&r1=140312&r2=140313&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsTargetMachine.h (original) +++ llvm/trunk/lib/Target/Mips/MipsTargetMachine.h Thu Sep 22 12:26:58 2011 @@ -98,7 +98,7 @@ Reloc::Model RM, CodeModel::Model CM); }; -/// MipsebTargetMachine - Mips32 big endian target machine. +/// Mips64ebTargetMachine - Mips64 big endian target machine. /// class Mips64ebTargetMachine : public MipsTargetMachine { public: @@ -107,7 +107,7 @@ Reloc::Model RM, CodeModel::Model CM); }; -/// MipselTargetMachine - Mips32 little endian target machine. +/// Mips64elTargetMachine - Mips64 little endian target machine. /// class Mips64elTargetMachine : public MipsTargetMachine { public: From gkistanova at gmail.com Thu Sep 22 12:33:24 2011 From: gkistanova at gmail.com (Galina Kistanova) Date: Thu, 22 Sep 2011 17:33:24 -0000 Subject: [llvm-commits] [llvm] r140314 - /llvm/trunk/runtime/libprofile/CommonProfiling.c Message-ID: <20110922173324.B8A362A6C12C@llvm.org> Author: gkistanova Date: Thu Sep 22 12:33:24 2011 New Revision: 140314 URL: http://llvm.org/viewvc/llvm-project?rev=140314&view=rev Log: Fix for warnings: ignoring return value of ?write?, declared with attribute warn_unused_result. Modified: llvm/trunk/runtime/libprofile/CommonProfiling.c Modified: llvm/trunk/runtime/libprofile/CommonProfiling.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/runtime/libprofile/CommonProfiling.c?rev=140314&r1=140313&r2=140314&view=diff ============================================================================== --- llvm/trunk/runtime/libprofile/CommonProfiling.c (original) +++ llvm/trunk/runtime/libprofile/CommonProfiling.c Thu Sep 22 12:33:24 2011 @@ -102,12 +102,19 @@ { int PTy = ArgumentInfo; int Zeros = 0; - write(OutFile, &PTy, sizeof(int)); - write(OutFile, &SavedArgsLength, sizeof(unsigned)); - write(OutFile, SavedArgs, SavedArgsLength); + if (write(OutFile, &PTy, sizeof(int)) < 0 || + write(OutFile, &SavedArgsLength, sizeof(unsigned)) < 0 || + write(OutFile, SavedArgs, SavedArgsLength) < 0 ) { + fprintf(stderr,"error: unable to write to output file."); + exit(0); + } /* Pad out to a multiple of four bytes */ - if (SavedArgsLength & 3) - write(OutFile, &Zeros, 4-(SavedArgsLength&3)); + if (SavedArgsLength & 3) { + if (write(OutFile, &Zeros, 4-(SavedArgsLength&3)) < 0) { + fprintf(stderr,"error: unable to write to output file."); + exit(0); + } + } } } return(OutFile); From ahatanak at gmail.com Thu Sep 22 12:35:03 2011 From: ahatanak at gmail.com (Akira Hatanaka) Date: Thu, 22 Sep 2011 17:35:03 -0000 Subject: [llvm-commits] [llvm] r140315 - /llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp Message-ID: <20110922173503.7AEF42A6C12C@llvm.org> Author: ahatanak Date: Thu Sep 22 12:35:03 2011 New Revision: 140315 URL: http://llvm.org/viewvc/llvm-project?rev=140315&view=rev Log: Add F31 to the set of callee-saved registers. Modified: llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp Modified: llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp?rev=140315&r1=140314&r2=140315&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp Thu Sep 22 12:35:03 2011 @@ -100,7 +100,7 @@ { // Mips callee-save register range is $16-$23, $f20-$f30 static const unsigned SingleFloatOnlyCalleeSavedRegs[] = { - Mips::F30, Mips::F29, Mips::F28, Mips::F27, Mips::F26, + Mips::F31, Mips::F30, Mips::F29, Mips::F28, Mips::F27, Mips::F26, Mips::F25, Mips::F24, Mips::F23, Mips::F22, Mips::F21, Mips::F20, Mips::RA, Mips::FP, Mips::S7, Mips::S6, Mips::S5, Mips::S4, Mips::S3, Mips::S2, Mips::S1, Mips::S0, 0 From ahatanak at gmail.com Thu Sep 22 12:44:37 2011 From: ahatanak at gmail.com (Akira Hatanaka) Date: Thu, 22 Sep 2011 17:44:37 -0000 Subject: [llvm-commits] [llvm] r140316 - /llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.cpp Message-ID: <20110922174437.87A2E2A6C12C@llvm.org> Author: ahatanak Date: Thu Sep 22 12:44:37 2011 New Revision: 140316 URL: http://llvm.org/viewvc/llvm-project?rev=140316&view=rev Log: Print three closing parentheses when Kind is either VK_Mips_GPOFF_HI or VK_Mips_GPOFF_LO. Modified: llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.cpp Modified: llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.cpp?rev=140316&r1=140315&r2=140316&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.cpp Thu Sep 22 12:44:37 2011 @@ -48,8 +48,8 @@ OS << Offset; } - if (Kind != VK_Mips_None) - OS << ')'; + if (Kind == VK_Mips_GPOFF_HI || Kind == VK_Mips_GPOFF_LO) OS << ")))"; + else if (Kind != VK_Mips_None) OS << ')'; } bool From bruno.cardoso at gmail.com Thu Sep 22 12:57:46 2011 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Thu, 22 Sep 2011 10:57:46 -0700 Subject: [llvm-commits] [llvm] r140316 - /llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.cpp In-Reply-To: <20110922174437.87A2E2A6C12C@llvm.org> References: <20110922174437.87A2E2A6C12C@llvm.org> Message-ID: Hi Akira, On Thu, Sep 22, 2011 at 10:44 AM, Akira Hatanaka wrote: > Author: ahatanak > Date: Thu Sep 22 12:44:37 2011 > New Revision: 140316 > > URL: http://llvm.org/viewvc/llvm-project?rev=140316&view=rev > Log: > Print three closing parentheses when Kind is either VK_Mips_GPOFF_HI or > VK_Mips_GPOFF_LO. > > > > Modified: > ? ?llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.cpp > > Modified: llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.cpp?rev=140316&r1=140315&r2=140316&view=diff > ============================================================================== > --- llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.cpp (original) > +++ llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.cpp Thu Sep 22 12:44:37 2011 > @@ -48,8 +48,8 @@ > ? ? OS << Offset; > ? } > > - ?if (Kind != VK_Mips_None) > - ? ?OS << ')'; > + ?if (Kind == VK_Mips_GPOFF_HI || Kind == VK_Mips_GPOFF_LO) OS << ")))"; > + ?else if (Kind != VK_Mips_None) ? ? ? ? ? ? ? ? ? ? ? ? ? ?OS << ')'; > ?} Please place the "OS << ..."s in lines following the conditions. -- Bruno Cardoso Lopes http://www.brunocardoso.cc From isanbard at gmail.com Thu Sep 22 12:56:40 2011 From: isanbard at gmail.com (Bill Wendling) Date: Thu, 22 Sep 2011 17:56:40 -0000 Subject: [llvm-commits] [llvm] r140318 - /llvm/trunk/lib/CodeGen/ShadowStackGC.cpp Message-ID: <20110922175640.D09522A6C12C@llvm.org> Author: void Date: Thu Sep 22 12:56:40 2011 New Revision: 140318 URL: http://llvm.org/viewvc/llvm-project?rev=140318&view=rev Log: Use the C personality function instead of the C++ personality function. Modified: llvm/trunk/lib/CodeGen/ShadowStackGC.cpp Modified: llvm/trunk/lib/CodeGen/ShadowStackGC.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ShadowStackGC.cpp?rev=140318&r1=140317&r2=140318&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/ShadowStackGC.cpp (original) +++ llvm/trunk/lib/CodeGen/ShadowStackGC.cpp Thu Sep 22 12:56:40 2011 @@ -145,11 +145,9 @@ BasicBlock *CleanupBB = BasicBlock::Create(C, CleanupBBName, &F); Type *ExnTy = StructType::get(Type::getInt8PtrTy(C), Type::getInt32Ty(C), NULL); - // FIXME: Assuming the C++ personality function probably isn't the best - // thing in the world. Constant *PersFn = F.getParent()-> - getOrInsertFunction("__gxx_personality_v0", + getOrInsertFunction("__gcc_personality_v0", FunctionType::get(Type::getInt32Ty(C), true)); LandingPadInst *LPad = LandingPadInst::Create(ExnTy, PersFn, 1, "cleanup.lpad", From wendling at apple.com Thu Sep 22 12:58:28 2011 From: wendling at apple.com (Bill Wendling) Date: Thu, 22 Sep 2011 10:58:28 -0700 Subject: [llvm-commits] [llvm] r140277 - /llvm/trunk/lib/CodeGen/ShadowStackGC.cpp In-Reply-To: <4E7AEBB1.3080901@free.fr> References: <20110921221428.799D02A6C12C@llvm.org> <4E7AEBB1.3080901@free.fr> Message-ID: <41D27CEA-73E1-42AF-AF32-79523F3FF266@apple.com> \ On Sep 22, 2011, at 1:02 AM, Duncan Sands wrote: > Hi Bill, > >> Attempt to update the shadow stack GC pass to the new EH model. >> >> This inserts a cleanup landingpad instruction and a resume to mimic the old >> unwind instruction. > >> --- llvm/trunk/lib/CodeGen/ShadowStackGC.cpp (original) >> +++ llvm/trunk/lib/CodeGen/ShadowStackGC.cpp Wed Sep 21 17:14:28 2011 >> @@ -141,9 +141,21 @@ >> return 0; >> >> // Create a cleanup block. >> - BasicBlock *CleanupBB = BasicBlock::Create(F.getContext(), >> - CleanupBBName,&F); >> - UnwindInst *UI = new UnwindInst(F.getContext(), CleanupBB); >> + LLVMContext&C = F.getContext(); >> + BasicBlock *CleanupBB = BasicBlock::Create(C, CleanupBBName,&F); >> + Type *ExnTy = StructType::get(Type::getInt8PtrTy(C), >> + Type::getInt32Ty(C), NULL); >> + // FIXME: Assuming the C++ personality function probably isn't the best >> + // thing in the world. >> + Constant *PersFn = >> + F.getParent()-> >> + getOrInsertFunction("__gxx_personality_v0", > > you should use the C personality function. It can handle cleanups and is > provided by libgcc. It's called __gcc_personality_v0. > Done. Thanks! :-) -bw From ahatanak at gmail.com Thu Sep 22 12:57:32 2011 From: ahatanak at gmail.com (Akira Hatanaka) Date: Thu, 22 Sep 2011 17:57:32 -0000 Subject: [llvm-commits] [llvm] r140319 - /llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td Message-ID: <20110922175732.49A722A6C12C@llvm.org> Author: ahatanak Date: Thu Sep 22 12:57:32 2011 New Revision: 140319 URL: http://llvm.org/viewvc/llvm-project?rev=140319&view=rev Log: Define a new sub-register index sub_32 for accessing the 32-bit sub-register of a 64-bit integer register. Move the subreg index definitions to the beginning of the file. Modified: llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td Modified: llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td?rev=140319&r1=140318&r2=140319&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td (original) +++ llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td Thu Sep 22 12:57:32 2011 @@ -10,6 +10,11 @@ //===----------------------------------------------------------------------===// // Declarations that describe the MIPS register file //===----------------------------------------------------------------------===// +let Namespace = "Mips" in { +def sub_fpeven : SubRegIndex; +def sub_fpodd : SubRegIndex; +def sub_32 : SubRegIndex; +} // We have banks of 32 registers each. class MipsReg : Register { @@ -34,10 +39,6 @@ } // Mips 64-bit (aliased) FPU Registers -let Namespace = "Mips" in { -def sub_fpeven : SubRegIndex; -def sub_fpodd : SubRegIndex; -} class AFPR num, string n, list subregs> : MipsRegWithSubRegs { let Num = num; From stoklund at 2pi.dk Thu Sep 22 12:57:49 2011 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Thu, 22 Sep 2011 17:57:49 -0000 Subject: [llvm-commits] [zorg] r140321 - /zorg/trunk/lnt/lnt/tests/nt.py Message-ID: <20110922175749.9F04B2A6C12C@llvm.org> Author: stoklund Date: Thu Sep 22 12:57:49 2011 New Revision: 140321 URL: http://llvm.org/viewvc/llvm-project?rev=140321&view=rev Log: Add an --mllvm option to 'lnt runtest nt'. It is equivalent to --cflag -mllvm --cflag FLAG which is very tedious to write when testing out backend features. Modified: zorg/trunk/lnt/lnt/tests/nt.py Modified: zorg/trunk/lnt/lnt/tests/nt.py URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/lnt/lnt/tests/nt.py?rev=140321&r1=140320&r2=140321&view=diff ============================================================================== --- zorg/trunk/lnt/lnt/tests/nt.py (original) +++ zorg/trunk/lnt/lnt/tests/nt.py Thu Sep 22 12:57:49 2011 @@ -30,6 +30,10 @@ # FIXME: Eliminate this blanket option. target_flags.extend(opts.cflags) + # Pass flags to backend. + for f in opts.mllvm: + target_flags.extend(['-mllvm', f]) + if opts.arch is not None: target_flags.append('-arch') target_flags.append(opts.arch) @@ -727,6 +731,9 @@ group.add_option("", "--cflag", dest="cflags", help="Additional flags to set in TARGET_FLAGS", action="append", type=str, default=[], metavar="FLAG") + group.add_option("", "--mllvm", dest="mllvm", + help="Add -mllvm FLAG to TARGET_FLAGS", + action="append", type=str, default=[], metavar="FLAG") parser.add_option_group(group) group = OptionGroup(parser, "Test Selection") From stoklund at 2pi.dk Thu Sep 22 13:08:43 2011 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Thu, 22 Sep 2011 11:08:43 -0700 Subject: [llvm-commits] [llvm] r140319 - /llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td In-Reply-To: <20110922175732.49A722A6C12C@llvm.org> References: <20110922175732.49A722A6C12C@llvm.org> Message-ID: <613B8C51-6BF4-46C1-9C5C-C7EA15482D74@2pi.dk> On Sep 22, 2011, at 10:57 AM, Akira Hatanaka wrote: > Author: ahatanak > Date: Thu Sep 22 12:57:32 2011 > New Revision: 140319 > > URL: http://llvm.org/viewvc/llvm-project?rev=140319&view=rev > Log: > Define a new sub-register index sub_32 for accessing the 32-bit sub-register of > a 64-bit integer register. Move the subreg index definitions to the beginning > of the file. Hi Akira, You should consider using sub_32 for the floating point registers as well. The sub_fpeven sub-registers on the D*_64 registers is a little confusing: (sub_fpeven D1_64) = F1 which isn't an even register. /jakob From ahatanak at gmail.com Thu Sep 22 13:17:14 2011 From: ahatanak at gmail.com (Akira Hatanaka) Date: Thu, 22 Sep 2011 11:17:14 -0700 Subject: [llvm-commits] [llvm] r140316 - /llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.cpp In-Reply-To: References: <20110922174437.87A2E2A6C12C@llvm.org> Message-ID: I am not opposed to making this change, but is this needed to conform to LLVM's calling convention? I do see several places (not in Mips's directory, but in other targets) in which if statement is contained in one line. Is this a bad coding style? On Thu, Sep 22, 2011 at 10:57 AM, Bruno Cardoso Lopes wrote: > Hi Akira, > > On Thu, Sep 22, 2011 at 10:44 AM, Akira Hatanaka wrote: >> Author: ahatanak >> Date: Thu Sep 22 12:44:37 2011 >> New Revision: 140316 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=140316&view=rev >> Log: >> Print three closing parentheses when Kind is either VK_Mips_GPOFF_HI or >> VK_Mips_GPOFF_LO. >> >> >> >> Modified: >> ? ?llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.cpp >> >> Modified: llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.cpp?rev=140316&r1=140315&r2=140316&view=diff >> ============================================================================== >> --- llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.cpp (original) >> +++ llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.cpp Thu Sep 22 12:44:37 2011 >> @@ -48,8 +48,8 @@ >> ? ? OS << Offset; >> ? } >> >> - ?if (Kind != VK_Mips_None) >> - ? ?OS << ')'; >> + ?if (Kind == VK_Mips_GPOFF_HI || Kind == VK_Mips_GPOFF_LO) OS << ")))"; >> + ?else if (Kind != VK_Mips_None) ? ? ? ? ? ? ? ? ? ? ? ? ? ?OS << ')'; >> ?} > > Please place the "OS << ..."s in lines following the conditions. > > -- > Bruno Cardoso Lopes > http://www.brunocardoso.cc > From ahatanak at gmail.com Thu Sep 22 13:24:21 2011 From: ahatanak at gmail.com (Akira Hatanaka) Date: Thu, 22 Sep 2011 18:24:21 -0000 Subject: [llvm-commits] [llvm] r140324 - /llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td Message-ID: <20110922182421.DF8392A6C12C@llvm.org> Author: ahatanak Date: Thu Sep 22 13:24:21 2011 New Revision: 140324 URL: http://llvm.org/viewvc/llvm-project?rev=140324&view=rev Log: Change subreg index of AFPR64 from sub_fpeven to sub_32 per Jakob's comment. Modified: llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td Modified: llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td?rev=140324&r1=140323&r2=140324&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td (original) +++ llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td Thu Sep 22 13:24:21 2011 @@ -48,7 +48,7 @@ class AFPR64 num, string n, list subregs> : MipsRegWithSubRegs { let Num = num; - let SubRegIndices = [sub_fpeven]; + let SubRegIndices = [sub_32]; } // Mips Hardware Registers From ahatanak at gmail.com Thu Sep 22 13:26:28 2011 From: ahatanak at gmail.com (Akira Hatanaka) Date: Thu, 22 Sep 2011 11:26:28 -0700 Subject: [llvm-commits] [llvm] r140319 - /llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td In-Reply-To: <613B8C51-6BF4-46C1-9C5C-C7EA15482D74@2pi.dk> References: <20110922175732.49A722A6C12C@llvm.org> <613B8C51-6BF4-46C1-9C5C-C7EA15482D74@2pi.dk> Message-ID: I have fixed this in r140324. Thank you for your comment. On Thu, Sep 22, 2011 at 11:08 AM, Jakob Stoklund Olesen wrote: > > On Sep 22, 2011, at 10:57 AM, Akira Hatanaka wrote: > >> Author: ahatanak >> Date: Thu Sep 22 12:57:32 2011 >> New Revision: 140319 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=140319&view=rev >> Log: >> Define a new sub-register index sub_32 for accessing the 32-bit sub-register of >> a 64-bit integer register. Move the subreg index definitions to the beginning >> of the file. > > Hi Akira, > > You should consider using sub_32 for the floating point registers as well. > > The sub_fpeven sub-registers on the D*_64 registers is a little confusing: > > (sub_fpeven D1_64) = F1 which isn't an even register. > > /jakob > > From ahatanak at gmail.com Thu Sep 22 13:29:29 2011 From: ahatanak at gmail.com (Akira Hatanaka) Date: Thu, 22 Sep 2011 18:29:29 -0000 Subject: [llvm-commits] [llvm] r140325 - /llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.cpp Message-ID: <20110922182929.A88792A6C12C@llvm.org> Author: ahatanak Date: Thu Sep 22 13:29:29 2011 New Revision: 140325 URL: http://llvm.org/viewvc/llvm-project?rev=140325&view=rev Log: Print parentheses in next line. Modified: llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.cpp Modified: llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.cpp?rev=140325&r1=140324&r2=140325&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.cpp Thu Sep 22 13:29:29 2011 @@ -48,8 +48,10 @@ OS << Offset; } - if (Kind == VK_Mips_GPOFF_HI || Kind == VK_Mips_GPOFF_LO) OS << ")))"; - else if (Kind != VK_Mips_None) OS << ')'; + if (Kind == VK_Mips_GPOFF_HI || Kind == VK_Mips_GPOFF_LO) + OS << ")))"; + else if (Kind != VK_Mips_None) + OS << ')'; } bool From ahatanak at gmail.com Thu Sep 22 13:31:48 2011 From: ahatanak at gmail.com (Akira Hatanaka) Date: Thu, 22 Sep 2011 11:31:48 -0700 Subject: [llvm-commits] [llvm] r140316 - /llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.cpp In-Reply-To: References: <20110922174437.87A2E2A6C12C@llvm.org> Message-ID: Never mind, I fixed this in r140325. I think this looks better. On Thu, Sep 22, 2011 at 11:17 AM, Akira Hatanaka wrote: > I am not opposed to making this change, but is this needed to conform > to LLVM's calling convention? I do see several places (not in Mips's > directory, but in other targets) in which if statement is contained in > one line. Is this a bad coding style? > > On Thu, Sep 22, 2011 at 10:57 AM, Bruno Cardoso Lopes > wrote: >> Hi Akira, >> >> On Thu, Sep 22, 2011 at 10:44 AM, Akira Hatanaka wrote: >>> Author: ahatanak >>> Date: Thu Sep 22 12:44:37 2011 >>> New Revision: 140316 >>> >>> URL: http://llvm.org/viewvc/llvm-project?rev=140316&view=rev >>> Log: >>> Print three closing parentheses when Kind is either VK_Mips_GPOFF_HI or >>> VK_Mips_GPOFF_LO. >>> >>> >>> >>> Modified: >>> ? ?llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.cpp >>> >>> Modified: llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.cpp >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.cpp?rev=140316&r1=140315&r2=140316&view=diff >>> ============================================================================== >>> --- llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.cpp (original) >>> +++ llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.cpp Thu Sep 22 12:44:37 2011 >>> @@ -48,8 +48,8 @@ >>> ? ? OS << Offset; >>> ? } >>> >>> - ?if (Kind != VK_Mips_None) >>> - ? ?OS << ')'; >>> + ?if (Kind == VK_Mips_GPOFF_HI || Kind == VK_Mips_GPOFF_LO) OS << ")))"; >>> + ?else if (Kind != VK_Mips_None) ? ? ? ? ? ? ? ? ? ? ? ? ? ?OS << ')'; >>> ?} >> >> Please place the "OS << ..."s in lines following the conditions. >> >> -- >> Bruno Cardoso Lopes >> http://www.brunocardoso.cc >> > From bruno.cardoso at gmail.com Thu Sep 22 13:31:51 2011 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Thu, 22 Sep 2011 11:31:51 -0700 Subject: [llvm-commits] [llvm] r140316 - /llvm/trunk/lib/Target/Mips/MipsMCSymbolRefExpr.cpp In-Reply-To: References: <20110922174437.87A2E2A6C12C@llvm.org> Message-ID: Hi Akira, On Thu, Sep 22, 2011 at 11:17 AM, Akira Hatanaka wrote: > I am not opposed to making this change, but is this needed to conform > to LLVM's calling convention? I do see several places (not in Mips's > directory, but in other targets) in which if statement is contained in > one line. Is this a bad coding style? In some cases I wouldn't care at all, but look below: >>> - ?if (Kind != VK_Mips_None) >>> - ? ?OS << ')'; >>> + ?if (Kind == VK_Mips_GPOFF_HI || Kind == VK_Mips_GPOFF_LO) OS << ")))"; >>> + ?else if (Kind != VK_Mips_None) ? ? ? ? ? ? ? ? ? ? ? ? ? ?OS << ')'; >>> ?} It's messy (the first is bloated and the second has a weird amount of spaces...), please fix it! -- Bruno Cardoso Lopes http://www.brunocardoso.cc From clattner at apple.com Thu Sep 22 13:47:09 2011 From: clattner at apple.com (Chris Lattner) Date: Thu, 22 Sep 2011 11:47:09 -0700 Subject: [llvm-commits] [llvm] r140296 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp In-Reply-To: <4E7B5D7B.1080907@free.fr> References: <20110922032722.76C1C2A6C12C@llvm.org> <4E7AEF7B.7000905@free.fr> <4E7B5D7B.1080907@free.fr> Message-ID: <266C4B64-A559-45C5-9420-FBF755FAB1C9@apple.com> On Sep 22, 2011, at 9:08 AM, Duncan Sands wrote: > On 09/22/11 17:38, Eli Friedman wrote: >> On Thu, Sep 22, 2011 at 1:19 AM, Duncan Sands wrote: >>>> The SSE version differences for fmin/fmax are more involved than I thought. >>> >>> While on the subject of fmin/fmax, I noticed that "isCommutable" is set to >>> zero for max/min. Yet the result of max/min presumably doesn't depend on >>> the order of its arguments, so is this a mistake? >> >> Strictly spearking, min/max on x86 are not commutable. It would >> probably be okay to commute them when -ffast-math is turned on, >> though. > > I checked the Intel docs and you are correct. As a mathematician I find this > pretty amazing. I particularly enjoyed how max(+0.0, -0.0) is whatever is in > the second operand rather than +0.0. FWIW, I think that this is what allows the compiler to use the max instruction for idioms like "(x > y) ? x : y". -Chris From sabre at nondot.org Thu Sep 22 13:54:31 2011 From: sabre at nondot.org (Chris Lattner) Date: Thu, 22 Sep 2011 18:54:31 -0000 Subject: [llvm-commits] [llvm] r140326 - /llvm/trunk/docs/DeveloperPolicy.html Message-ID: <20110922185431.CC13F2A6C12C@llvm.org> Author: lattner Date: Thu Sep 22 13:54:31 2011 New Revision: 140326 URL: http://llvm.org/viewvc/llvm-project?rev=140326&view=rev Log: Resynch intro to section with copyright section. Modified: llvm/trunk/docs/DeveloperPolicy.html Modified: llvm/trunk/docs/DeveloperPolicy.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/DeveloperPolicy.html?rev=140326&r1=140325&r2=140326&view=diff ============================================================================== --- llvm/trunk/docs/DeveloperPolicy.html (original) +++ llvm/trunk/docs/DeveloperPolicy.html Thu Sep 22 13:54:31 2011 @@ -494,8 +494,9 @@

    This section addresses the issues of copyright, license and patents for the - LLVM project. Currently, the University of Illinois is the LLVM copyright - holder and the terms of its license to LLVM users and developers is the + LLVM project. The copyright holder for the code is held by the individual + contributors of the code and the terms of its license to LLVM users and + developers is the University of Illinois/NCSA Open Source License.

    From eli.friedman at gmail.com Thu Sep 22 13:56:30 2011 From: eli.friedman at gmail.com (Eli Friedman) Date: Thu, 22 Sep 2011 18:56:30 -0000 Subject: [llvm-commits] [llvm] r140327 - in /llvm/trunk: lib/Transforms/Scalar/ScalarReplAggregates.cpp test/Transforms/ScalarRepl/2011-09-22-PHISpeculateInvoke.ll Message-ID: <20110922185630.6EFC42A6C12C@llvm.org> Author: efriedma Date: Thu Sep 22 13:56:30 2011 New Revision: 140327 URL: http://llvm.org/viewvc/llvm-project?rev=140327&view=rev Log: PR10987: add a missed safety check to isSafePHIToSpeculate in scalarrepl. Added: llvm/trunk/test/Transforms/ScalarRepl/2011-09-22-PHISpeculateInvoke.ll Modified: llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp Modified: llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp?rev=140327&r1=140326&r2=140327&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp Thu Sep 22 13:56:30 2011 @@ -1286,17 +1286,21 @@ // trapping load in the predecessor if it is a critical edge. for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i) { BasicBlock *Pred = PN->getIncomingBlock(i); + Value *InVal = PN->getIncomingValue(i); + + // If the terminator of the predecessor has side-effects (an invoke), + // there is no safe place to put a load in the predecessor. + if (Pred->getTerminator()->mayHaveSideEffects()) + return false; + + // If the value is produced by the terminator of the predecessor + // (an invoke), there is no valid place to put a load in the predecessor. + if (Pred->getTerminator() == InVal) + return false; // If the predecessor has a single successor, then the edge isn't critical. if (Pred->getTerminator()->getNumSuccessors() == 1) continue; - - Value *InVal = PN->getIncomingValue(i); - - // If the InVal is an invoke in the pred, we can't put a load on the edge. - if (InvokeInst *II = dyn_cast(InVal)) - if (II->getParent() == Pred) - return false; // If this pointer is always safe to load, or if we can prove that there is // already a load in the block, then we can move the load to the pred block. Added: llvm/trunk/test/Transforms/ScalarRepl/2011-09-22-PHISpeculateInvoke.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/ScalarRepl/2011-09-22-PHISpeculateInvoke.ll?rev=140327&view=auto ============================================================================== --- llvm/trunk/test/Transforms/ScalarRepl/2011-09-22-PHISpeculateInvoke.ll (added) +++ llvm/trunk/test/Transforms/ScalarRepl/2011-09-22-PHISpeculateInvoke.ll Thu Sep 22 13:56:30 2011 @@ -0,0 +1,40 @@ +; RUN: opt < %s -scalarrepl -S | FileCheck %s +; PR10987 + +; Make sure scalarrepl doesn't move a load across an invoke which could +; modify the loaded value. +; (The PHI could theoretically be transformed by splitting the critical +; edge, but scalarrepl doesn't modify the CFG, at least at the moment.) + +declare void @extern_fn(i32*) +declare i32 @extern_fn2(i32) +declare i32 @__gcc_personality_v0(i32, i64, i8*, i8*) + +define void @odd_fn(i1) noinline { + %retptr1 = alloca i32 + %retptr2 = alloca i32 + br i1 %0, label %then, label %else + +then: ; preds = %2 + invoke void @extern_fn(i32* %retptr1) + to label %join unwind label %unwind + +else: ; preds = %2 + store i32 3, i32* %retptr2 + br label %join + +join: ; preds = %then, %else + %storemerge.in = phi i32* [ %retptr2, %else ], [ %retptr1, %then ] + %storemerge = load i32* %storemerge.in + %x3 = call i32 @extern_fn2(i32 %storemerge) + ret void + +unwind: ; preds = %then + %info = landingpad { i8*, i32 } personality i32 (i32, i64, i8*, i8*)* @__gcc_personality_v0 + cleanup + call void @extern_fn(i32* null) + unreachable +} + +; CHECK: define void @odd_fn +; CHECK: %storemerge.in = phi i32* [ %retptr2, %else ], [ %retptr1, %then ] From baldrick at free.fr Thu Sep 22 15:15:49 2011 From: baldrick at free.fr (Duncan Sands) Date: Thu, 22 Sep 2011 20:15:49 -0000 Subject: [llvm-commits] [llvm] r140332 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86ISelLowering.h lib/Target/X86/X86InstrFragmentsSIMD.td lib/Target/X86/X86InstrSSE.td test/CodeGen/X86/haddsub.ll Message-ID: <20110922201549.548402A6C12D@llvm.org> Author: baldrick Date: Thu Sep 22 15:15:48 2011 New Revision: 140332 URL: http://llvm.org/viewvc/llvm-project?rev=140332&view=rev Log: Synthesize SSE3/AVX 128 bit horizontal add/sub instructions from floating point add/sub of appropriate shuffle vectors. Does not synthesize the 256 bit AVX versions because they work differently. Added: llvm/trunk/test/CodeGen/X86/haddsub.ll Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp llvm/trunk/lib/Target/X86/X86ISelLowering.h llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td llvm/trunk/lib/Target/X86/X86InstrSSE.td Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=140332&r1=140331&r2=140332&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Sep 22 15:15:48 2011 @@ -1137,6 +1137,8 @@ setTargetDAGCombine(ISD::OR); setTargetDAGCombine(ISD::AND); setTargetDAGCombine(ISD::ADD); + setTargetDAGCombine(ISD::FADD); + setTargetDAGCombine(ISD::FSUB); setTargetDAGCombine(ISD::SUB); setTargetDAGCombine(ISD::LOAD); setTargetDAGCombine(ISD::STORE); @@ -10647,6 +10649,8 @@ case X86ISD::FMIN: return "X86ISD::FMIN"; case X86ISD::FRSQRT: return "X86ISD::FRSQRT"; case X86ISD::FRCP: return "X86ISD::FRCP"; + case X86ISD::FHADD: return "X86ISD::FHADD"; + case X86ISD::FHSUB: return "X86ISD::FHSUB"; case X86ISD::TLSADDR: return "X86ISD::TLSADDR"; case X86ISD::TLSCALL: return "X86ISD::TLSCALL"; case X86ISD::EH_RETURN: return "X86ISD::EH_RETURN"; @@ -13738,6 +13742,150 @@ return SDValue(); } +/// isHorizontalBinOp - Return 'true' if this vector operation is "horizontal" +/// and return the operands for the horizontal operation in LHS and RHS. A +/// horizontal operation performs the binary operation on successive elements +/// of its first operand, then on successive elements of its second operand, +/// returning the resulting values in a vector. For example, if +/// A = < float a0, float a1, float a2, float a3 > +/// and +/// B = < float b0, float b1, float b2, float b3 > +/// then the result of doing a horizontal operation on A and B is +/// A horizontal-op B = < a0 op a1, a2 op a3, b0 op b1, b2 op b3 >. +/// In short, LHS and RHS are inspected to see if LHS op RHS is of the form +/// A horizontal-op B, for some already available A and B, and if so then LHS is +/// set to A, RHS to B, and the routine returns 'true'. +/// Note that the binary operation should have the property that if one of the +/// operands is UNDEF then the result is UNDEF. +static bool isHorizontalBinOp(SDValue &LHS, SDValue &RHS, bool isCommutative) { + // Look for the following pattern: if + // A = < float a0, float a1, float a2, float a3 > + // B = < float b0, float b1, float b2, float b3 > + // and + // LHS = VECTOR_SHUFFLE A, B, <0, 2, 4, 6> + // RHS = VECTOR_SHUFFLE A, B, <1, 3, 5, 7> + // then LHS op RHS = < a0 op a1, a2 op a3, b0 op b1, b2 op b3 > + // which is A horizontal-op B. + + // At least one of the operands should be a vector shuffle. + if (LHS.getOpcode() != ISD::VECTOR_SHUFFLE && + RHS.getOpcode() != ISD::VECTOR_SHUFFLE) + return false; + + EVT VT = LHS.getValueType(); + unsigned N = VT.getVectorNumElements(); + + // View LHS in the form + // LHS = VECTOR_SHUFFLE A, B, LMask + // If LHS is not a shuffle then pretend it is the shuffle + // LHS = VECTOR_SHUFFLE LHS, undef, <0, 1, ..., N-1> + // NOTE: in what follows a default initialized SDValue represents an UNDEF of + // type VT. + SDValue A, B; + SmallVector LMask(N); + if (LHS.getOpcode() == ISD::VECTOR_SHUFFLE) { + if (LHS.getOperand(0).getOpcode() != ISD::UNDEF) + A = LHS.getOperand(0); + if (LHS.getOperand(1).getOpcode() != ISD::UNDEF) + B = LHS.getOperand(1); + cast(LHS.getNode())->getMask(LMask); + } else { + if (LHS.getOpcode() != ISD::UNDEF) + A = LHS; + for (unsigned i = 0; i != N; ++i) + LMask[i] = i; + } + + // Likewise, view RHS in the form + // RHS = VECTOR_SHUFFLE C, D, RMask + SDValue C, D; + SmallVector RMask(N); + if (RHS.getOpcode() == ISD::VECTOR_SHUFFLE) { + if (RHS.getOperand(0).getOpcode() != ISD::UNDEF) + C = RHS.getOperand(0); + if (RHS.getOperand(1).getOpcode() != ISD::UNDEF) + D = RHS.getOperand(1); + cast(RHS.getNode())->getMask(RMask); + } else { + if (RHS.getOpcode() != ISD::UNDEF) + C = RHS; + for (unsigned i = 0; i != N; ++i) + RMask[i] = i; + } + + // Check that the shuffles are both shuffling the same vectors. + if (!(A == C && B == D) && !(A == D && B == C)) + return false; + + // If everything is UNDEF then bail out: it would be better to fold to UNDEF. + if (!A.getNode() && !B.getNode()) + return false; + + // If A and B occur in reverse order in RHS, then "swap" them (which means + // rewriting the mask). + if (A != C) + for (unsigned i = 0; i != N; ++i) { + unsigned Idx = RMask[i]; + if (Idx < N) + RMask[i] += N; + else if (Idx < 2*N) + RMask[i] -= N; + } + + // At this point LHS and RHS are equivalent to + // LHS = VECTOR_SHUFFLE A, B, LMask + // RHS = VECTOR_SHUFFLE A, B, RMask + // Check that the masks correspond to performing a horizontal operation. + for (unsigned i = 0; i != N; ++i) { + unsigned LIdx = LMask[i], RIdx = RMask[i]; + + // Ignore any UNDEF components. + if (LIdx >= 2*N || RIdx >= 2*N || (!A.getNode() && (LIdx < N || RIdx < N)) + || (!B.getNode() && (LIdx >= N || RIdx >= N))) + continue; + + // Check that successive elements are being operated on. If not, this is + // not a horizontal operation. + if (!(LIdx == 2*i && RIdx == 2*i + 1) && + !(isCommutative && LIdx == 2*i + 1 && RIdx == 2*i)) + return false; + } + + LHS = A.getNode() ? A : B; // If A is 'UNDEF', use B for it. + RHS = B.getNode() ? B : A; // If B is 'UNDEF', use A for it. + return true; +} + +/// PerformFADDCombine - Do target-specific dag combines on floating point adds. +static SDValue PerformFADDCombine(SDNode *N, SelectionDAG &DAG, + const X86Subtarget *Subtarget) { + EVT VT = N->getValueType(0); + SDValue LHS = N->getOperand(0); + SDValue RHS = N->getOperand(1); + + // Try to synthesize horizontal adds from adds of shuffles. + if ((Subtarget->hasSSE3() || Subtarget->hasAVX()) && + (VT == MVT::v4f32 || VT == MVT::v2f64) && + isHorizontalBinOp(LHS, RHS, true)) + return DAG.getNode(X86ISD::FHADD, N->getDebugLoc(), VT, LHS, RHS); + return SDValue(); +} + +/// PerformFSUBCombine - Do target-specific dag combines on floating point subs. +static SDValue PerformFSUBCombine(SDNode *N, SelectionDAG &DAG, + const X86Subtarget *Subtarget) { + EVT VT = N->getValueType(0); + SDValue LHS = N->getOperand(0); + SDValue RHS = N->getOperand(1); + + // Try to synthesize horizontal subs from subs of shuffles. + if ((Subtarget->hasSSE3() || Subtarget->hasAVX()) && + (VT == MVT::v4f32 || VT == MVT::v2f64) && + isHorizontalBinOp(LHS, RHS, false)) + return DAG.getNode(X86ISD::FHSUB, N->getDebugLoc(), VT, LHS, RHS); + return SDValue(); +} + /// PerformFORCombine - Do target-specific dag combines on X86ISD::FOR and /// X86ISD::FXOR nodes. static SDValue PerformFORCombine(SDNode *N, SelectionDAG &DAG) { @@ -13975,6 +14123,8 @@ case ISD::LOAD: return PerformLOADCombine(N, DAG, Subtarget); case ISD::STORE: return PerformSTORECombine(N, DAG, Subtarget); case ISD::SINT_TO_FP: return PerformSINT_TO_FPCombine(N, DAG, this); + case ISD::FADD: return PerformFADDCombine(N, DAG, Subtarget); + case ISD::FSUB: return PerformFSUBCombine(N, DAG, Subtarget); case X86ISD::FXOR: case X86ISD::FOR: return PerformFORCombine(N, DAG); case X86ISD::FAND: return PerformFANDCombine(N, DAG); Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=140332&r1=140331&r2=140332&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Thu Sep 22 15:15:48 2011 @@ -178,6 +178,12 @@ /// BLEND family of opcodes BLENDV, + /// FHADD - Floating point horizontal add. + FHADD, + + /// FHSUB - Floating point horizontal sub. + FHSUB, + /// FMAX, FMIN - Floating point max and min. /// FMAX, FMIN, Modified: llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td?rev=140332&r1=140331&r2=140332&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td Thu Sep 22 15:15:48 2011 @@ -39,6 +39,8 @@ def X86frcp : SDNode<"X86ISD::FRCP", SDTFPUnaryOp>; def X86fsrl : SDNode<"X86ISD::FSRL", SDTX86FPShiftOp>; def X86fgetsign: SDNode<"X86ISD::FGETSIGNx86",SDTFPToIntOp>; +def X86fhadd : SDNode<"X86ISD::FHADD", SDTFPBinOp>; +def X86fhsub : SDNode<"X86ISD::FHSUB", SDTFPBinOp>; def X86comi : SDNode<"X86ISD::COMI", SDTX86CmpTest>; def X86ucomi : SDNode<"X86ISD::UCOMI", SDTX86CmpTest>; def X86cmpss : SDNode<"X86ISD::FSETCCss", SDTX86Cmpss>; Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=140332&r1=140331&r2=140332&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Thu Sep 22 15:15:48 2011 @@ -4714,62 +4714,122 @@ // Horizontal ops multiclass S3D_Int o, string OpcodeStr, ValueType vt, RegisterClass RC, - X86MemOperand x86memop, Intrinsic IntId, bit Is2Addr = 1> { + X86MemOperand x86memop, SDNode OpNode, bit Is2Addr = 1> { def rr : S3DI; + [(set RC:$dst, (vt (OpNode RC:$src1, RC:$src2)))]>; def rm : S3DI; + [(set RC:$dst, (vt (OpNode RC:$src1, (memop addr:$src2))))]>; } multiclass S3_Int o, string OpcodeStr, ValueType vt, RegisterClass RC, - X86MemOperand x86memop, Intrinsic IntId, bit Is2Addr = 1> { + X86MemOperand x86memop, SDNode OpNode, bit Is2Addr = 1> { def rr : S3I; + [(set RC:$dst, (vt (OpNode RC:$src1, RC:$src2)))]>; def rm : S3I; + [(set RC:$dst, (vt (OpNode RC:$src1, (memop addr:$src2))))]>; } let Predicates = [HasAVX] in { defm VHADDPS : S3D_Int<0x7C, "vhaddps", v4f32, VR128, f128mem, - int_x86_sse3_hadd_ps, 0>, VEX_4V; + X86fhadd, 0>, VEX_4V; defm VHADDPD : S3_Int <0x7C, "vhaddpd", v2f64, VR128, f128mem, - int_x86_sse3_hadd_pd, 0>, VEX_4V; + X86fhadd, 0>, VEX_4V; defm VHSUBPS : S3D_Int<0x7D, "vhsubps", v4f32, VR128, f128mem, - int_x86_sse3_hsub_ps, 0>, VEX_4V; + X86fhsub, 0>, VEX_4V; defm VHSUBPD : S3_Int <0x7D, "vhsubpd", v2f64, VR128, f128mem, - int_x86_sse3_hsub_pd, 0>, VEX_4V; + X86fhsub, 0>, VEX_4V; defm VHADDPSY : S3D_Int<0x7C, "vhaddps", v8f32, VR256, f256mem, - int_x86_avx_hadd_ps_256, 0>, VEX_4V; + X86fhadd, 0>, VEX_4V; defm VHADDPDY : S3_Int <0x7C, "vhaddpd", v4f64, VR256, f256mem, - int_x86_avx_hadd_pd_256, 0>, VEX_4V; + X86fhadd, 0>, VEX_4V; defm VHSUBPSY : S3D_Int<0x7D, "vhsubps", v8f32, VR256, f256mem, - int_x86_avx_hsub_ps_256, 0>, VEX_4V; + X86fhsub, 0>, VEX_4V; defm VHSUBPDY : S3_Int <0x7D, "vhsubpd", v4f64, VR256, f256mem, - int_x86_avx_hsub_pd_256, 0>, VEX_4V; + X86fhsub, 0>, VEX_4V; +} + +let Predicates = [HasAVX] in { + def : Pat<(int_x86_sse3_hadd_ps (v4f32 VR128:$src1), VR128:$src2), + (VHADDPSrr VR128:$src1, VR128:$src2)>; + def : Pat<(int_x86_sse3_hadd_ps (v4f32 VR128:$src1), (memop addr:$src2)), + (VHADDPSrm VR128:$src1, addr:$src2)>; + + def : Pat<(int_x86_sse3_hadd_pd (v2f64 VR128:$src1), VR128:$src2), + (VHADDPDrr VR128:$src1, VR128:$src2)>; + def : Pat<(int_x86_sse3_hadd_pd (v2f64 VR128:$src1), (memop addr:$src2)), + (VHADDPDrm VR128:$src1, addr:$src2)>; + + def : Pat<(int_x86_sse3_hsub_ps (v4f32 VR128:$src1), VR128:$src2), + (VHSUBPSrr VR128:$src1, VR128:$src2)>; + def : Pat<(int_x86_sse3_hsub_ps (v4f32 VR128:$src1), (memop addr:$src2)), + (VHSUBPSrm VR128:$src1, addr:$src2)>; + + def : Pat<(int_x86_sse3_hsub_pd (v2f64 VR128:$src1), VR128:$src2), + (VHSUBPDrr VR128:$src1, VR128:$src2)>; + def : Pat<(int_x86_sse3_hsub_pd (v2f64 VR128:$src1), (memop addr:$src2)), + (VHSUBPDrm VR128:$src1, addr:$src2)>; + + def : Pat<(int_x86_avx_hadd_ps_256 (v8f32 VR256:$src1), VR256:$src2), + (VHADDPSYrr VR256:$src1, VR256:$src2)>; + def : Pat<(int_x86_avx_hadd_ps_256 (v8f32 VR256:$src1), (memop addr:$src2)), + (VHADDPSYrm VR256:$src1, addr:$src2)>; + + def : Pat<(int_x86_avx_hadd_pd_256 (v4f64 VR256:$src1), VR256:$src2), + (VHADDPDYrr VR256:$src1, VR256:$src2)>; + def : Pat<(int_x86_avx_hadd_pd_256 (v4f64 VR256:$src1), (memop addr:$src2)), + (VHADDPDYrm VR256:$src1, addr:$src2)>; + + def : Pat<(int_x86_avx_hsub_ps_256 (v8f32 VR256:$src1), VR256:$src2), + (VHSUBPSYrr VR256:$src1, VR256:$src2)>; + def : Pat<(int_x86_avx_hsub_ps_256 (v8f32 VR256:$src1), (memop addr:$src2)), + (VHSUBPSYrm VR256:$src1, addr:$src2)>; + + def : Pat<(int_x86_avx_hsub_pd_256 (v4f64 VR256:$src1), VR256:$src2), + (VHSUBPDYrr VR256:$src1, VR256:$src2)>; + def : Pat<(int_x86_avx_hsub_pd_256 (v4f64 VR256:$src1), (memop addr:$src2)), + (VHSUBPDYrm VR256:$src1, addr:$src2)>; } let Constraints = "$src1 = $dst" in { - defm HADDPS : S3D_Int<0x7C, "haddps", v4f32, VR128, f128mem, - int_x86_sse3_hadd_ps>; - defm HADDPD : S3_Int<0x7C, "haddpd", v2f64, VR128, f128mem, - int_x86_sse3_hadd_pd>; - defm HSUBPS : S3D_Int<0x7D, "hsubps", v4f32, VR128, f128mem, - int_x86_sse3_hsub_ps>; - defm HSUBPD : S3_Int<0x7D, "hsubpd", v2f64, VR128, f128mem, - int_x86_sse3_hsub_pd>; + defm HADDPS : S3D_Int<0x7C, "haddps", v4f32, VR128, f128mem, X86fhadd>; + defm HADDPD : S3_Int<0x7C, "haddpd", v2f64, VR128, f128mem, X86fhadd>; + defm HSUBPS : S3D_Int<0x7D, "hsubps", v4f32, VR128, f128mem, X86fhsub>; + defm HSUBPD : S3_Int<0x7D, "hsubpd", v2f64, VR128, f128mem, X86fhsub>; +} + +let Predicates = [HasSSE3] in { + def : Pat<(int_x86_sse3_hadd_ps (v4f32 VR128:$src1), VR128:$src2), + (HADDPSrr VR128:$src1, VR128:$src2)>; + def : Pat<(int_x86_sse3_hadd_ps (v4f32 VR128:$src1), (memop addr:$src2)), + (HADDPSrm VR128:$src1, addr:$src2)>; + + def : Pat<(int_x86_sse3_hadd_pd (v2f64 VR128:$src1), VR128:$src2), + (HADDPDrr VR128:$src1, VR128:$src2)>; + def : Pat<(int_x86_sse3_hadd_pd (v2f64 VR128:$src1), (memop addr:$src2)), + (HADDPDrm VR128:$src1, addr:$src2)>; + + def : Pat<(int_x86_sse3_hsub_ps (v4f32 VR128:$src1), VR128:$src2), + (HSUBPSrr VR128:$src1, VR128:$src2)>; + def : Pat<(int_x86_sse3_hsub_ps (v4f32 VR128:$src1), (memop addr:$src2)), + (HSUBPSrm VR128:$src1, addr:$src2)>; + + def : Pat<(int_x86_sse3_hsub_pd (v2f64 VR128:$src1), VR128:$src2), + (HSUBPDrr VR128:$src1, VR128:$src2)>; + def : Pat<(int_x86_sse3_hsub_pd (v2f64 VR128:$src1), (memop addr:$src2)), + (HSUBPDrm VR128:$src1, addr:$src2)>; } //===---------------------------------------------------------------------===// Added: llvm/trunk/test/CodeGen/X86/haddsub.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/haddsub.ll?rev=140332&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/haddsub.ll (added) +++ llvm/trunk/test/CodeGen/X86/haddsub.ll Thu Sep 22 15:15:48 2011 @@ -0,0 +1,194 @@ +; RUN: llc < %s -march=x86-64 -mattr=+sse3,-avx | FileCheck %s -check-prefix=SSE3 +; RUN: llc < %s -march=x86-64 -mattr=-sse3,+avx | FileCheck %s -check-prefix=AVX + +; SSE3: haddpd1: +; SSE3-NOT: vhaddpd +; SSE3: haddpd +; AVX: haddpd1: +; AVX: vhaddpd +define <2 x double> @haddpd1(<2 x double> %x, <2 x double> %y) { + %a = shufflevector <2 x double> %x, <2 x double> %y, <2 x i32> + %b = shufflevector <2 x double> %x, <2 x double> %y, <2 x i32> + %r = fadd <2 x double> %a, %b + ret <2 x double> %r +} + +; SSE3: haddpd2: +; SSE3-NOT: vhaddpd +; SSE3: haddpd +; AVX: haddpd2: +; AVX: vhaddpd +define <2 x double> @haddpd2(<2 x double> %x, <2 x double> %y) { + %a = shufflevector <2 x double> %x, <2 x double> %y, <2 x i32> + %b = shufflevector <2 x double> %y, <2 x double> %x, <2 x i32> + %r = fadd <2 x double> %a, %b + ret <2 x double> %r +} + +; SSE3: haddpd3: +; SSE3-NOT: vhaddpd +; SSE3: haddpd +; AVX: haddpd3: +; AVX: vhaddpd +define <2 x double> @haddpd3(<2 x double> %x) { + %a = shufflevector <2 x double> %x, <2 x double> undef, <2 x i32> + %b = shufflevector <2 x double> %x, <2 x double> undef, <2 x i32> + %r = fadd <2 x double> %a, %b + ret <2 x double> %r +} + +; SSE3: haddps1: +; SSE3-NOT: vhaddps +; SSE3: haddps +; AVX: haddps1: +; AVX: vhaddps +define <4 x float> @haddps1(<4 x float> %x, <4 x float> %y) { + %a = shufflevector <4 x float> %x, <4 x float> %y, <4 x i32> + %b = shufflevector <4 x float> %x, <4 x float> %y, <4 x i32> + %r = fadd <4 x float> %a, %b + ret <4 x float> %r +} + +; SSE3: haddps2: +; SSE3-NOT: vhaddps +; SSE3: haddps +; AVX: haddps2: +; AVX: vhaddps +define <4 x float> @haddps2(<4 x float> %x, <4 x float> %y) { + %a = shufflevector <4 x float> %x, <4 x float> %y, <4 x i32> + %b = shufflevector <4 x float> %y, <4 x float> %x, <4 x i32> + %r = fadd <4 x float> %a, %b + ret <4 x float> %r +} + +; SSE3: haddps3: +; SSE3-NOT: vhaddps +; SSE3: haddps +; AVX: haddps3: +; AVX: vhaddps +define <4 x float> @haddps3(<4 x float> %x) { + %a = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> + %b = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> + %r = fadd <4 x float> %a, %b + ret <4 x float> %r +} + +; SSE3: haddps4: +; SSE3-NOT: vhaddps +; SSE3: haddps +; AVX: haddps4: +; AVX: vhaddps +define <4 x float> @haddps4(<4 x float> %x) { + %a = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> + %b = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> + %r = fadd <4 x float> %a, %b + ret <4 x float> %r +} + +; SSE3: haddps5: +; SSE3-NOT: vhaddps +; SSE3: haddps +; AVX: haddps5: +; AVX: vhaddps +define <4 x float> @haddps5(<4 x float> %x) { + %a = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> + %b = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> + %r = fadd <4 x float> %a, %b + ret <4 x float> %r +} + +; SSE3: haddps6: +; SSE3-NOT: vhaddps +; SSE3: haddps +; AVX: haddps6: +; AVX: vhaddps +define <4 x float> @haddps6(<4 x float> %x) { + %a = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> + %b = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> + %r = fadd <4 x float> %a, %b + ret <4 x float> %r +} + +; SSE3: haddps7: +; SSE3-NOT: vhaddps +; SSE3: haddps +; AVX: haddps7: +; AVX: vhaddps +define <4 x float> @haddps7(<4 x float> %x) { + %a = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> + %b = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> + %r = fadd <4 x float> %a, %b + ret <4 x float> %r +} + +; SSE3: hsubpd1: +; SSE3-NOT: vhsubpd +; SSE3: hsubpd +; AVX: hsubpd1: +; AVX: vhsubpd +define <2 x double> @hsubpd1(<2 x double> %x, <2 x double> %y) { + %a = shufflevector <2 x double> %x, <2 x double> %y, <2 x i32> + %b = shufflevector <2 x double> %x, <2 x double> %y, <2 x i32> + %r = fsub <2 x double> %a, %b + ret <2 x double> %r +} + +; SSE3: hsubpd2: +; SSE3-NOT: vhsubpd +; SSE3: hsubpd +; AVX: hsubpd2: +; AVX: vhsubpd +define <2 x double> @hsubpd2(<2 x double> %x) { + %a = shufflevector <2 x double> %x, <2 x double> undef, <2 x i32> + %b = shufflevector <2 x double> %x, <2 x double> undef, <2 x i32> + %r = fsub <2 x double> %a, %b + ret <2 x double> %r +} + +; SSE3: hsubps1: +; SSE3-NOT: vhsubps +; SSE3: hsubps +; AVX: hsubps1: +; AVX: vhsubps +define <4 x float> @hsubps1(<4 x float> %x, <4 x float> %y) { + %a = shufflevector <4 x float> %x, <4 x float> %y, <4 x i32> + %b = shufflevector <4 x float> %x, <4 x float> %y, <4 x i32> + %r = fsub <4 x float> %a, %b + ret <4 x float> %r +} + +; SSE3: hsubps2: +; SSE3-NOT: vhsubps +; SSE3: hsubps +; AVX: hsubps2: +; AVX: vhsubps +define <4 x float> @hsubps2(<4 x float> %x) { + %a = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> + %b = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> + %r = fsub <4 x float> %a, %b + ret <4 x float> %r +} + +; SSE3: hsubps3: +; SSE3-NOT: vhsubps +; SSE3: hsubps +; AVX: hsubps3: +; AVX: vhsubps +define <4 x float> @hsubps3(<4 x float> %x) { + %a = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> + %b = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> + %r = fsub <4 x float> %a, %b + ret <4 x float> %r +} + +; SSE3: hsubps4: +; SSE3-NOT: vhsubps +; SSE3: hsubps +; AVX: hsubps4: +; AVX: vhsubps +define <4 x float> @hsubps4(<4 x float> %x) { + %a = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> + %b = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> + %r = fsub <4 x float> %a, %b + ret <4 x float> %r +} From isanbard at gmail.com Thu Sep 22 15:31:23 2011 From: isanbard at gmail.com (Bill Wendling) Date: Thu, 22 Sep 2011 20:31:23 -0000 Subject: [llvm-commits] [test-suite] r140333 - /test-suite/trunk/SingleSource/UnitTests/EH/Makefile Message-ID: <20110922203123.C48792A6C12D@llvm.org> Author: void Date: Thu Sep 22 15:31:23 2011 New Revision: 140333 URL: http://llvm.org/viewvc/llvm-project?rev=140333&view=rev Log: Add comment. Modified: test-suite/trunk/SingleSource/UnitTests/EH/Makefile Modified: test-suite/trunk/SingleSource/UnitTests/EH/Makefile URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/EH/Makefile?rev=140333&r1=140332&r2=140333&view=diff ============================================================================== --- test-suite/trunk/SingleSource/UnitTests/EH/Makefile (original) +++ test-suite/trunk/SingleSource/UnitTests/EH/Makefile Thu Sep 22 15:31:23 2011 @@ -1,3 +1,4 @@ +# SingleSource/UnitTests/EH/Makefile LEVEL = ../../.. REQUIRES_EH_SUPPORT = 1 From isanbard at gmail.com Thu Sep 22 15:33:15 2011 From: isanbard at gmail.com (Bill Wendling) Date: Thu, 22 Sep 2011 20:33:15 -0000 Subject: [llvm-commits] [test-suite] r140336 - in /test-suite/trunk/SingleSource/UnitTests/EH: filter-2.cpp filter-2.reference_output Message-ID: <20110922203315.DC6C22A6C12D@llvm.org> Author: void Date: Thu Sep 22 15:33:15 2011 New Revision: 140336 URL: http://llvm.org/viewvc/llvm-project?rev=140336&view=rev Log: EH testcase. This tests r140335. Added: test-suite/trunk/SingleSource/UnitTests/EH/filter-2.cpp test-suite/trunk/SingleSource/UnitTests/EH/filter-2.reference_output Added: test-suite/trunk/SingleSource/UnitTests/EH/filter-2.cpp URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/EH/filter-2.cpp?rev=140336&view=auto ============================================================================== --- test-suite/trunk/SingleSource/UnitTests/EH/filter-2.cpp (added) +++ test-suite/trunk/SingleSource/UnitTests/EH/filter-2.cpp Thu Sep 22 15:33:15 2011 @@ -0,0 +1,50 @@ +#include +#include + +void unexpected_float() { + std::cout << "Throwing in unexpected(): 927.37\n"; + throw 927.37f; +} + +void unexpected_int() { + std::set_unexpected(unexpected_float); + std::cout << "Throwing in unexpected(): 42\n"; + throw 42; +} + +void qux() __attribute__((always_inline)); +void qux() { + std::cout << "Throwing in qux(): \"hello world\"\n"; + throw "hello world"; +} + +void bar() throw (int) __attribute__((always_inline)); +void bar() throw (int) { + std::set_unexpected(unexpected_int); + try { + qux(); + } catch (int i) { + std::cout << "Caught in bar(): " << i << "\n"; + exit(EXIT_FAILURE); + } +} + +void foo() throw (float) { + try { + bar(); + } catch (const char *s) { + std::cout << "Caught in foo(): " << s << "\n"; + exit(EXIT_FAILURE); + } +} + +int main() { + try { + foo(); + } catch (float f) { + std::cout << "Caught in main(): " << f << "\n"; + } catch (...) { + std::cout << "Caught in main(): catch all\n"; + exit(EXIT_FAILURE); + } +} Added: test-suite/trunk/SingleSource/UnitTests/EH/filter-2.reference_output URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/EH/filter-2.reference_output?rev=140336&view=auto ============================================================================== --- test-suite/trunk/SingleSource/UnitTests/EH/filter-2.reference_output (added) +++ test-suite/trunk/SingleSource/UnitTests/EH/filter-2.reference_output Thu Sep 22 15:33:15 2011 @@ -0,0 +1,5 @@ +Throwing in qux(): "hello world" +Throwing in unexpected(): 42 +Throwing in unexpected(): 927.37 +Caught in main(): 927.37 +exit 0 From ahatanak at gmail.com Thu Sep 22 15:41:35 2011 From: ahatanak at gmail.com (Akira Hatanaka) Date: Thu, 22 Sep 2011 13:41:35 -0700 Subject: [llvm-commits] [llvm] r140319 - /llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td In-Reply-To: References: <20110922175732.49A722A6C12C@llvm.org> <613B8C51-6BF4-46C1-9C5C-C7EA15482D74@2pi.dk> Message-ID: I have a question about subreg index. I am going to add the D_64 FP registers to the same register file that has the 16 64-bit registers consisting of a pair of 32-bit FP register (this makes code simpler in other places). The register file definition will look like this: def AFGR64 : RegisterClass<"Mips", [f64], 64, (add // Return Values and Arguments D0, D1, D6, D7, // Not preserved across procedure calls D2, D3, D4, D5, D8, D9, // Callee save D10, D11, D12, D13, D14, D15, D0_64, D1_64, D2_64, D3_64, D4_64, D5_64, D6_64, D7_64, D8_64, D9_64, D10_64, D11_64, D12_64, D13_64, D14_64, D15_64, D16_64, D17_64, D18_64, D19_64, D20_64, D21_64, D22_64, D23_64, D24_64, D25_64, D26_64, D27_64, D28_64, D29_64, D30_64, D31_64)> { let SubRegClasses = [(FGR32 sub_fpeven, sub_fpodd)]; } In this case, is it still correct to use sub_32 in D*_64 64-bit FP register definitions or should I be using the same subreg indices (sub_fpeven) that the paired registers use (perhaps renaming sub_fpeven and sub_fpodd)? On Thu, Sep 22, 2011 at 11:26 AM, Akira Hatanaka wrote: > I have fixed this in r140324. > Thank you for your comment. > > On Thu, Sep 22, 2011 at 11:08 AM, Jakob Stoklund Olesen wrote: >> >> On Sep 22, 2011, at 10:57 AM, Akira Hatanaka wrote: >> >>> Author: ahatanak >>> Date: Thu Sep 22 12:57:32 2011 >>> New Revision: 140319 >>> >>> URL: http://llvm.org/viewvc/llvm-project?rev=140319&view=rev >>> Log: >>> Define a new sub-register index sub_32 for accessing the 32-bit sub-register of >>> a 64-bit integer register. Move the subreg index definitions to the beginning >>> of the file. >> >> Hi Akira, >> >> You should consider using sub_32 for the floating point registers as well. >> >> The sub_fpeven sub-registers on the D*_64 registers is a little confusing: >> >> (sub_fpeven D1_64) = F1 which isn't an even register. >> >> /jakob >> >> > From stoklund at 2pi.dk Thu Sep 22 15:49:18 2011 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Thu, 22 Sep 2011 13:49:18 -0700 Subject: [llvm-commits] [llvm] r140319 - /llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td In-Reply-To: References: <20110922175732.49A722A6C12C@llvm.org> <613B8C51-6BF4-46C1-9C5C-C7EA15482D74@2pi.dk> Message-ID: <4E46EBD3-B61E-470B-9357-04C366185BD1@2pi.dk> On Sep 22, 2011, at 1:41 PM, Akira Hatanaka wrote: > I have a question about subreg index. > > I am going to add the D_64 FP registers to the same register file that > has the 16 64-bit registers consisting of a pair of 32-bit FP register > (this makes code simpler in other places). The register file > definition will look like this: > > def AFGR64 : RegisterClass<"Mips", [f64], 64, (add > // Return Values and Arguments > D0, D1, D6, D7, > // Not preserved across procedure calls > D2, D3, D4, D5, D8, D9, > // Callee save > D10, D11, D12, D13, D14, D15, > > D0_64, D1_64, D2_64, D3_64, D4_64, D5_64, D6_64, D7_64, > D8_64, D9_64, D10_64, D11_64, D12_64, D13_64, D14_64, D15_64, > D16_64, D17_64, D18_64, D19_64, D20_64, D21_64, D22_64, D23_64, > D24_64, D25_64, D26_64, D27_64, D28_64, D29_64, D30_64, D31_64)> { > let SubRegClasses = [(FGR32 sub_fpeven, sub_fpodd)]; > } > > In this case, is it still correct to use sub_32 in D*_64 64-bit FP > register definitions or should I be using the same subreg indices > (sub_fpeven) that the paired registers use (perhaps renaming > sub_fpeven and sub_fpodd)? Wow, that looks really weird. I don't know the Mips target very well, could you explain what you are trying to do? A register class is mostly used as a constraint on the legal registers for an instruction. Are there instructions that can use both D0_64 and D0? What does that mean? Which one should the register allocator pick? /jakob From evan.cheng at apple.com Thu Sep 22 16:20:47 2011 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 22 Sep 2011 14:20:47 -0700 Subject: [llvm-commits] [llvm] r140296 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp In-Reply-To: References: <20110922032722.76C1C2A6C12C@llvm.org> <4E7AEF7B.7000905@free.fr> Message-ID: On Sep 22, 2011, at 8:38 AM, Eli Friedman wrote: > On Thu, Sep 22, 2011 at 1:19 AM, Duncan Sands wrote: >>> The SSE version differences for fmin/fmax are more involved than I thought. >> >> While on the subject of fmin/fmax, I noticed that "isCommutable" is set to >> zero for max/min. Yet the result of max/min presumably doesn't depend on >> the order of its arguments, so is this a mistake? > > Strictly spearking, min/max on x86 are not commutable. It would > probably be okay to commute them when -ffast-math is turned on, > though. Right, it's a bug that I know about but haven't gotten to. Unfortunately we'd like to continue to support the -ffast-math optimization so I haven't simply remove the isCommutable = 1 bit. Patches welcome. :-) Evan > > -Eli > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From stoklund at 2pi.dk Thu Sep 22 16:39:31 2011 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Thu, 22 Sep 2011 21:39:31 -0000 Subject: [llvm-commits] [llvm] r140339 - in /llvm/trunk: include/llvm/CodeGen/MachineRegisterInfo.h lib/CodeGen/MachineRegisterInfo.cpp Message-ID: <20110922213931.8F8852A6C12C@llvm.org> Author: stoklund Date: Thu Sep 22 16:39:31 2011 New Revision: 140339 URL: http://llvm.org/viewvc/llvm-project?rev=140339&view=rev Log: Add a MinNumRegs argument to MRI::constrainRegClass(). The function will refuse to use a register class with fewer registers than MinNumRegs. This can be used by clients to avoid accidentally increase register pressure too much. The default value of MinNumRegs=0 doesn't affect how constrainRegClass() works. Modified: llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp Modified: llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h?rev=140339&r1=140338&r2=140339&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h (original) +++ llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h Thu Sep 22 16:39:31 2011 @@ -215,13 +215,15 @@ void setRegClass(unsigned Reg, const TargetRegisterClass *RC); /// constrainRegClass - Constrain the register class of the specified virtual - /// register to be a common subclass of RC and the current register class. - /// Return the new register class, or NULL if no such class exists. + /// register to be a common subclass of RC and the current register class, + /// but only if the new class has at least MinNumRegs registers. Return the + /// new register class, or NULL if no such class exists. /// This should only be used when the constraint is known to be trivial, like /// GR32 -> GR32_NOSP. Beware of increasing register pressure. /// const TargetRegisterClass *constrainRegClass(unsigned Reg, - const TargetRegisterClass *RC); + const TargetRegisterClass *RC, + unsigned MinNumRegs = 0); /// recomputeRegClass - Try to find a legal super-class of Reg's register /// class that still satisfies the constraints from the instructions using Modified: llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp?rev=140339&r1=140338&r2=140339&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp Thu Sep 22 16:39:31 2011 @@ -49,15 +49,17 @@ const TargetRegisterClass * MachineRegisterInfo::constrainRegClass(unsigned Reg, - const TargetRegisterClass *RC) { + const TargetRegisterClass *RC, + unsigned MinNumRegs) { const TargetRegisterClass *OldRC = getRegClass(Reg); if (OldRC == RC) return RC; const TargetRegisterClass *NewRC = getCommonSubClass(OldRC, RC); - if (!NewRC) + if (!NewRC || NewRC == OldRC) + return NewRC; + if (NewRC->getNumRegs() < MinNumRegs) return 0; - if (NewRC != OldRC) - setRegClass(Reg, NewRC); + setRegClass(Reg, NewRC); return NewRC; } From stoklund at 2pi.dk Thu Sep 22 16:39:34 2011 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Thu, 22 Sep 2011 21:39:34 -0000 Subject: [llvm-commits] [llvm] r140340 - /llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp Message-ID: <20110922213934.539332A6C12C@llvm.org> Author: stoklund Date: Thu Sep 22 16:39:34 2011 New Revision: 140340 URL: http://llvm.org/viewvc/llvm-project?rev=140340&view=rev Log: Constrain register classes instead of emitting copies. Sometimes register class constraints are trivial, like GR32->GR32_NOSP, or GPR->rGPR. Teach InstrEmitter to simply constrain the virtual register instead of emitting a copy in these cases. Normally, these copies are handled by the coalescer. This saves some coalescer work. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp?rev=140340&r1=140339&r2=140340&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp Thu Sep 22 16:39:34 2011 @@ -280,15 +280,17 @@ MCID.OpInfo[IIOpNum].isOptionalDef(); // If the instruction requires a register in a different class, create - // a new virtual register and copy the value into it. + // a new virtual register and copy the value into it, but first attempt to + // shrink VReg's register class within reason. For example, if VReg == GR32 + // and II requires a GR32_NOSP, just constrain VReg to GR32_NOSP. + const unsigned MinRCSize = 4; if (II) { - const TargetRegisterClass *SrcRC = MRI->getRegClass(VReg); const TargetRegisterClass *DstRC = 0; if (IIOpNum < II->getNumOperands()) DstRC = TII->getRegClass(*II, IIOpNum, TRI); assert((DstRC || (MCID.isVariadic() && IIOpNum >= MCID.getNumOperands())) && "Don't have operand info for this instruction!"); - if (DstRC && !SrcRC->hasSuperClassEq(DstRC)) { + if (DstRC && !MRI->constrainRegClass(VReg, DstRC, MinRCSize)) { unsigned NewVReg = MRI->createVirtualRegister(DstRC); BuildMI(*MBB, InsertPos, Op.getNode()->getDebugLoc(), TII->get(TargetOpcode::COPY), NewVReg).addReg(VReg); From clattner at apple.com Thu Sep 22 16:52:22 2011 From: clattner at apple.com (Chris Lattner) Date: Thu, 22 Sep 2011 14:52:22 -0700 Subject: [llvm-commits] [llvm] r140332 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86ISelLowering.h lib/Target/X86/X86InstrFragmentsSIMD.td lib/Target/X86/X86InstrSSE.td test/CodeGen/X86/haddsub.ll In-Reply-To: <20110922201549.548402A6C12D@llvm.org> References: <20110922201549.548402A6C12D@llvm.org> Message-ID: <451683E3-A32C-4905-A05A-364A33747D2F@apple.com> On Sep 22, 2011, at 1:15 PM, Duncan Sands wrote: > Author: baldrick > Date: Thu Sep 22 15:15:48 2011 > New Revision: 140332 > > URL: http://llvm.org/viewvc/llvm-project?rev=140332&view=rev > Log: > Synthesize SSE3/AVX 128 bit horizontal add/sub instructions from > floating point add/sub of appropriate shuffle vectors. Does not > synthesize the 256 bit AVX versions because they work differently. Very cool Duncan. Would it make sense to legalize the intrinsics for these into the X86ISD nodes to avoid the duplicate patterns? -Chris > > Added: > llvm/trunk/test/CodeGen/X86/haddsub.ll > Modified: > llvm/trunk/lib/Target/X86/X86ISelLowering.cpp > llvm/trunk/lib/Target/X86/X86ISelLowering.h > llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td > llvm/trunk/lib/Target/X86/X86InstrSSE.td > > Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=140332&r1=140331&r2=140332&view=diff > ============================================================================== > --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) > +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Sep 22 15:15:48 2011 > @@ -1137,6 +1137,8 @@ > setTargetDAGCombine(ISD::OR); > setTargetDAGCombine(ISD::AND); > setTargetDAGCombine(ISD::ADD); > + setTargetDAGCombine(ISD::FADD); > + setTargetDAGCombine(ISD::FSUB); > setTargetDAGCombine(ISD::SUB); > setTargetDAGCombine(ISD::LOAD); > setTargetDAGCombine(ISD::STORE); > @@ -10647,6 +10649,8 @@ > case X86ISD::FMIN: return "X86ISD::FMIN"; > case X86ISD::FRSQRT: return "X86ISD::FRSQRT"; > case X86ISD::FRCP: return "X86ISD::FRCP"; > + case X86ISD::FHADD: return "X86ISD::FHADD"; > + case X86ISD::FHSUB: return "X86ISD::FHSUB"; > case X86ISD::TLSADDR: return "X86ISD::TLSADDR"; > case X86ISD::TLSCALL: return "X86ISD::TLSCALL"; > case X86ISD::EH_RETURN: return "X86ISD::EH_RETURN"; > @@ -13738,6 +13742,150 @@ > return SDValue(); > } > > +/// isHorizontalBinOp - Return 'true' if this vector operation is "horizontal" > +/// and return the operands for the horizontal operation in LHS and RHS. A > +/// horizontal operation performs the binary operation on successive elements > +/// of its first operand, then on successive elements of its second operand, > +/// returning the resulting values in a vector. For example, if > +/// A = < float a0, float a1, float a2, float a3 > > +/// and > +/// B = < float b0, float b1, float b2, float b3 > > +/// then the result of doing a horizontal operation on A and B is > +/// A horizontal-op B = < a0 op a1, a2 op a3, b0 op b1, b2 op b3 >. > +/// In short, LHS and RHS are inspected to see if LHS op RHS is of the form > +/// A horizontal-op B, for some already available A and B, and if so then LHS is > +/// set to A, RHS to B, and the routine returns 'true'. > +/// Note that the binary operation should have the property that if one of the > +/// operands is UNDEF then the result is UNDEF. > +static bool isHorizontalBinOp(SDValue &LHS, SDValue &RHS, bool isCommutative) { > + // Look for the following pattern: if > + // A = < float a0, float a1, float a2, float a3 > > + // B = < float b0, float b1, float b2, float b3 > > + // and > + // LHS = VECTOR_SHUFFLE A, B, <0, 2, 4, 6> > + // RHS = VECTOR_SHUFFLE A, B, <1, 3, 5, 7> > + // then LHS op RHS = < a0 op a1, a2 op a3, b0 op b1, b2 op b3 > > + // which is A horizontal-op B. > + > + // At least one of the operands should be a vector shuffle. > + if (LHS.getOpcode() != ISD::VECTOR_SHUFFLE && > + RHS.getOpcode() != ISD::VECTOR_SHUFFLE) > + return false; > + > + EVT VT = LHS.getValueType(); > + unsigned N = VT.getVectorNumElements(); > + > + // View LHS in the form > + // LHS = VECTOR_SHUFFLE A, B, LMask > + // If LHS is not a shuffle then pretend it is the shuffle > + // LHS = VECTOR_SHUFFLE LHS, undef, <0, 1, ..., N-1> > + // NOTE: in what follows a default initialized SDValue represents an UNDEF of > + // type VT. > + SDValue A, B; > + SmallVector LMask(N); > + if (LHS.getOpcode() == ISD::VECTOR_SHUFFLE) { > + if (LHS.getOperand(0).getOpcode() != ISD::UNDEF) > + A = LHS.getOperand(0); > + if (LHS.getOperand(1).getOpcode() != ISD::UNDEF) > + B = LHS.getOperand(1); > + cast(LHS.getNode())->getMask(LMask); > + } else { > + if (LHS.getOpcode() != ISD::UNDEF) > + A = LHS; > + for (unsigned i = 0; i != N; ++i) > + LMask[i] = i; > + } > + > + // Likewise, view RHS in the form > + // RHS = VECTOR_SHUFFLE C, D, RMask > + SDValue C, D; > + SmallVector RMask(N); > + if (RHS.getOpcode() == ISD::VECTOR_SHUFFLE) { > + if (RHS.getOperand(0).getOpcode() != ISD::UNDEF) > + C = RHS.getOperand(0); > + if (RHS.getOperand(1).getOpcode() != ISD::UNDEF) > + D = RHS.getOperand(1); > + cast(RHS.getNode())->getMask(RMask); > + } else { > + if (RHS.getOpcode() != ISD::UNDEF) > + C = RHS; > + for (unsigned i = 0; i != N; ++i) > + RMask[i] = i; > + } > + > + // Check that the shuffles are both shuffling the same vectors. > + if (!(A == C && B == D) && !(A == D && B == C)) > + return false; > + > + // If everything is UNDEF then bail out: it would be better to fold to UNDEF. > + if (!A.getNode() && !B.getNode()) > + return false; > + > + // If A and B occur in reverse order in RHS, then "swap" them (which means > + // rewriting the mask). > + if (A != C) > + for (unsigned i = 0; i != N; ++i) { > + unsigned Idx = RMask[i]; > + if (Idx < N) > + RMask[i] += N; > + else if (Idx < 2*N) > + RMask[i] -= N; > + } > + > + // At this point LHS and RHS are equivalent to > + // LHS = VECTOR_SHUFFLE A, B, LMask > + // RHS = VECTOR_SHUFFLE A, B, RMask > + // Check that the masks correspond to performing a horizontal operation. > + for (unsigned i = 0; i != N; ++i) { > + unsigned LIdx = LMask[i], RIdx = RMask[i]; > + > + // Ignore any UNDEF components. > + if (LIdx >= 2*N || RIdx >= 2*N || (!A.getNode() && (LIdx < N || RIdx < N)) > + || (!B.getNode() && (LIdx >= N || RIdx >= N))) > + continue; > + > + // Check that successive elements are being operated on. If not, this is > + // not a horizontal operation. > + if (!(LIdx == 2*i && RIdx == 2*i + 1) && > + !(isCommutative && LIdx == 2*i + 1 && RIdx == 2*i)) > + return false; > + } > + > + LHS = A.getNode() ? A : B; // If A is 'UNDEF', use B for it. > + RHS = B.getNode() ? B : A; // If B is 'UNDEF', use A for it. > + return true; > +} > + > +/// PerformFADDCombine - Do target-specific dag combines on floating point adds. > +static SDValue PerformFADDCombine(SDNode *N, SelectionDAG &DAG, > + const X86Subtarget *Subtarget) { > + EVT VT = N->getValueType(0); > + SDValue LHS = N->getOperand(0); > + SDValue RHS = N->getOperand(1); > + > + // Try to synthesize horizontal adds from adds of shuffles. > + if ((Subtarget->hasSSE3() || Subtarget->hasAVX()) && > + (VT == MVT::v4f32 || VT == MVT::v2f64) && > + isHorizontalBinOp(LHS, RHS, true)) > + return DAG.getNode(X86ISD::FHADD, N->getDebugLoc(), VT, LHS, RHS); > + return SDValue(); > +} > + > +/// PerformFSUBCombine - Do target-specific dag combines on floating point subs. > +static SDValue PerformFSUBCombine(SDNode *N, SelectionDAG &DAG, > + const X86Subtarget *Subtarget) { > + EVT VT = N->getValueType(0); > + SDValue LHS = N->getOperand(0); > + SDValue RHS = N->getOperand(1); > + > + // Try to synthesize horizontal subs from subs of shuffles. > + if ((Subtarget->hasSSE3() || Subtarget->hasAVX()) && > + (VT == MVT::v4f32 || VT == MVT::v2f64) && > + isHorizontalBinOp(LHS, RHS, false)) > + return DAG.getNode(X86ISD::FHSUB, N->getDebugLoc(), VT, LHS, RHS); > + return SDValue(); > +} > + > /// PerformFORCombine - Do target-specific dag combines on X86ISD::FOR and > /// X86ISD::FXOR nodes. > static SDValue PerformFORCombine(SDNode *N, SelectionDAG &DAG) { > @@ -13975,6 +14123,8 @@ > case ISD::LOAD: return PerformLOADCombine(N, DAG, Subtarget); > case ISD::STORE: return PerformSTORECombine(N, DAG, Subtarget); > case ISD::SINT_TO_FP: return PerformSINT_TO_FPCombine(N, DAG, this); > + case ISD::FADD: return PerformFADDCombine(N, DAG, Subtarget); > + case ISD::FSUB: return PerformFSUBCombine(N, DAG, Subtarget); > case X86ISD::FXOR: > case X86ISD::FOR: return PerformFORCombine(N, DAG); > case X86ISD::FAND: return PerformFANDCombine(N, DAG); > > Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=140332&r1=140331&r2=140332&view=diff > ============================================================================== > --- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original) > +++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Thu Sep 22 15:15:48 2011 > @@ -178,6 +178,12 @@ > /// BLEND family of opcodes > BLENDV, > > + /// FHADD - Floating point horizontal add. > + FHADD, > + > + /// FHSUB - Floating point horizontal sub. > + FHSUB, > + > /// FMAX, FMIN - Floating point max and min. > /// > FMAX, FMIN, > > Modified: llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td?rev=140332&r1=140331&r2=140332&view=diff > ============================================================================== > --- llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td (original) > +++ llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td Thu Sep 22 15:15:48 2011 > @@ -39,6 +39,8 @@ > def X86frcp : SDNode<"X86ISD::FRCP", SDTFPUnaryOp>; > def X86fsrl : SDNode<"X86ISD::FSRL", SDTX86FPShiftOp>; > def X86fgetsign: SDNode<"X86ISD::FGETSIGNx86",SDTFPToIntOp>; > +def X86fhadd : SDNode<"X86ISD::FHADD", SDTFPBinOp>; > +def X86fhsub : SDNode<"X86ISD::FHSUB", SDTFPBinOp>; > def X86comi : SDNode<"X86ISD::COMI", SDTX86CmpTest>; > def X86ucomi : SDNode<"X86ISD::UCOMI", SDTX86CmpTest>; > def X86cmpss : SDNode<"X86ISD::FSETCCss", SDTX86Cmpss>; > > Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=140332&r1=140331&r2=140332&view=diff > ============================================================================== > --- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original) > +++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Thu Sep 22 15:15:48 2011 > @@ -4714,62 +4714,122 @@ > > // Horizontal ops > multiclass S3D_Int o, string OpcodeStr, ValueType vt, RegisterClass RC, > - X86MemOperand x86memop, Intrinsic IntId, bit Is2Addr = 1> { > + X86MemOperand x86memop, SDNode OpNode, bit Is2Addr = 1> { > def rr : S3DI !if(Is2Addr, > !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"), > !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")), > - [(set RC:$dst, (vt (IntId RC:$src1, RC:$src2)))]>; > + [(set RC:$dst, (vt (OpNode RC:$src1, RC:$src2)))]>; > > def rm : S3DI !if(Is2Addr, > !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"), > !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")), > - [(set RC:$dst, (vt (IntId RC:$src1, (memop addr:$src2))))]>; > + [(set RC:$dst, (vt (OpNode RC:$src1, (memop addr:$src2))))]>; > } > multiclass S3_Int o, string OpcodeStr, ValueType vt, RegisterClass RC, > - X86MemOperand x86memop, Intrinsic IntId, bit Is2Addr = 1> { > + X86MemOperand x86memop, SDNode OpNode, bit Is2Addr = 1> { > def rr : S3I !if(Is2Addr, > !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"), > !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")), > - [(set RC:$dst, (vt (IntId RC:$src1, RC:$src2)))]>; > + [(set RC:$dst, (vt (OpNode RC:$src1, RC:$src2)))]>; > > def rm : S3I !if(Is2Addr, > !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"), > !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")), > - [(set RC:$dst, (vt (IntId RC:$src1, (memop addr:$src2))))]>; > + [(set RC:$dst, (vt (OpNode RC:$src1, (memop addr:$src2))))]>; > } > > let Predicates = [HasAVX] in { > defm VHADDPS : S3D_Int<0x7C, "vhaddps", v4f32, VR128, f128mem, > - int_x86_sse3_hadd_ps, 0>, VEX_4V; > + X86fhadd, 0>, VEX_4V; > defm VHADDPD : S3_Int <0x7C, "vhaddpd", v2f64, VR128, f128mem, > - int_x86_sse3_hadd_pd, 0>, VEX_4V; > + X86fhadd, 0>, VEX_4V; > defm VHSUBPS : S3D_Int<0x7D, "vhsubps", v4f32, VR128, f128mem, > - int_x86_sse3_hsub_ps, 0>, VEX_4V; > + X86fhsub, 0>, VEX_4V; > defm VHSUBPD : S3_Int <0x7D, "vhsubpd", v2f64, VR128, f128mem, > - int_x86_sse3_hsub_pd, 0>, VEX_4V; > + X86fhsub, 0>, VEX_4V; > defm VHADDPSY : S3D_Int<0x7C, "vhaddps", v8f32, VR256, f256mem, > - int_x86_avx_hadd_ps_256, 0>, VEX_4V; > + X86fhadd, 0>, VEX_4V; > defm VHADDPDY : S3_Int <0x7C, "vhaddpd", v4f64, VR256, f256mem, > - int_x86_avx_hadd_pd_256, 0>, VEX_4V; > + X86fhadd, 0>, VEX_4V; > defm VHSUBPSY : S3D_Int<0x7D, "vhsubps", v8f32, VR256, f256mem, > - int_x86_avx_hsub_ps_256, 0>, VEX_4V; > + X86fhsub, 0>, VEX_4V; > defm VHSUBPDY : S3_Int <0x7D, "vhsubpd", v4f64, VR256, f256mem, > - int_x86_avx_hsub_pd_256, 0>, VEX_4V; > + X86fhsub, 0>, VEX_4V; > +} > + > +let Predicates = [HasAVX] in { > + def : Pat<(int_x86_sse3_hadd_ps (v4f32 VR128:$src1), VR128:$src2), > + (VHADDPSrr VR128:$src1, VR128:$src2)>; > + def : Pat<(int_x86_sse3_hadd_ps (v4f32 VR128:$src1), (memop addr:$src2)), > + (VHADDPSrm VR128:$src1, addr:$src2)>; > + > + def : Pat<(int_x86_sse3_hadd_pd (v2f64 VR128:$src1), VR128:$src2), > + (VHADDPDrr VR128:$src1, VR128:$src2)>; > + def : Pat<(int_x86_sse3_hadd_pd (v2f64 VR128:$src1), (memop addr:$src2)), > + (VHADDPDrm VR128:$src1, addr:$src2)>; > + > + def : Pat<(int_x86_sse3_hsub_ps (v4f32 VR128:$src1), VR128:$src2), > + (VHSUBPSrr VR128:$src1, VR128:$src2)>; > + def : Pat<(int_x86_sse3_hsub_ps (v4f32 VR128:$src1), (memop addr:$src2)), > + (VHSUBPSrm VR128:$src1, addr:$src2)>; > + > + def : Pat<(int_x86_sse3_hsub_pd (v2f64 VR128:$src1), VR128:$src2), > + (VHSUBPDrr VR128:$src1, VR128:$src2)>; > + def : Pat<(int_x86_sse3_hsub_pd (v2f64 VR128:$src1), (memop addr:$src2)), > + (VHSUBPDrm VR128:$src1, addr:$src2)>; > + > + def : Pat<(int_x86_avx_hadd_ps_256 (v8f32 VR256:$src1), VR256:$src2), > + (VHADDPSYrr VR256:$src1, VR256:$src2)>; > + def : Pat<(int_x86_avx_hadd_ps_256 (v8f32 VR256:$src1), (memop addr:$src2)), > + (VHADDPSYrm VR256:$src1, addr:$src2)>; > + > + def : Pat<(int_x86_avx_hadd_pd_256 (v4f64 VR256:$src1), VR256:$src2), > + (VHADDPDYrr VR256:$src1, VR256:$src2)>; > + def : Pat<(int_x86_avx_hadd_pd_256 (v4f64 VR256:$src1), (memop addr:$src2)), > + (VHADDPDYrm VR256:$src1, addr:$src2)>; > + > + def : Pat<(int_x86_avx_hsub_ps_256 (v8f32 VR256:$src1), VR256:$src2), > + (VHSUBPSYrr VR256:$src1, VR256:$src2)>; > + def : Pat<(int_x86_avx_hsub_ps_256 (v8f32 VR256:$src1), (memop addr:$src2)), > + (VHSUBPSYrm VR256:$src1, addr:$src2)>; > + > + def : Pat<(int_x86_avx_hsub_pd_256 (v4f64 VR256:$src1), VR256:$src2), > + (VHSUBPDYrr VR256:$src1, VR256:$src2)>; > + def : Pat<(int_x86_avx_hsub_pd_256 (v4f64 VR256:$src1), (memop addr:$src2)), > + (VHSUBPDYrm VR256:$src1, addr:$src2)>; > } > > let Constraints = "$src1 = $dst" in { > - defm HADDPS : S3D_Int<0x7C, "haddps", v4f32, VR128, f128mem, > - int_x86_sse3_hadd_ps>; > - defm HADDPD : S3_Int<0x7C, "haddpd", v2f64, VR128, f128mem, > - int_x86_sse3_hadd_pd>; > - defm HSUBPS : S3D_Int<0x7D, "hsubps", v4f32, VR128, f128mem, > - int_x86_sse3_hsub_ps>; > - defm HSUBPD : S3_Int<0x7D, "hsubpd", v2f64, VR128, f128mem, > - int_x86_sse3_hsub_pd>; > + defm HADDPS : S3D_Int<0x7C, "haddps", v4f32, VR128, f128mem, X86fhadd>; > + defm HADDPD : S3_Int<0x7C, "haddpd", v2f64, VR128, f128mem, X86fhadd>; > + defm HSUBPS : S3D_Int<0x7D, "hsubps", v4f32, VR128, f128mem, X86fhsub>; > + defm HSUBPD : S3_Int<0x7D, "hsubpd", v2f64, VR128, f128mem, X86fhsub>; > +} > + > +let Predicates = [HasSSE3] in { > + def : Pat<(int_x86_sse3_hadd_ps (v4f32 VR128:$src1), VR128:$src2), > + (HADDPSrr VR128:$src1, VR128:$src2)>; > + def : Pat<(int_x86_sse3_hadd_ps (v4f32 VR128:$src1), (memop addr:$src2)), > + (HADDPSrm VR128:$src1, addr:$src2)>; > + > + def : Pat<(int_x86_sse3_hadd_pd (v2f64 VR128:$src1), VR128:$src2), > + (HADDPDrr VR128:$src1, VR128:$src2)>; > + def : Pat<(int_x86_sse3_hadd_pd (v2f64 VR128:$src1), (memop addr:$src2)), > + (HADDPDrm VR128:$src1, addr:$src2)>; > + > + def : Pat<(int_x86_sse3_hsub_ps (v4f32 VR128:$src1), VR128:$src2), > + (HSUBPSrr VR128:$src1, VR128:$src2)>; > + def : Pat<(int_x86_sse3_hsub_ps (v4f32 VR128:$src1), (memop addr:$src2)), > + (HSUBPSrm VR128:$src1, addr:$src2)>; > + > + def : Pat<(int_x86_sse3_hsub_pd (v2f64 VR128:$src1), VR128:$src2), > + (HSUBPDrr VR128:$src1, VR128:$src2)>; > + def : Pat<(int_x86_sse3_hsub_pd (v2f64 VR128:$src1), (memop addr:$src2)), > + (HSUBPDrm VR128:$src1, addr:$src2)>; > } > > //===---------------------------------------------------------------------===// > > Added: llvm/trunk/test/CodeGen/X86/haddsub.ll > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/haddsub.ll?rev=140332&view=auto > ============================================================================== > --- llvm/trunk/test/CodeGen/X86/haddsub.ll (added) > +++ llvm/trunk/test/CodeGen/X86/haddsub.ll Thu Sep 22 15:15:48 2011 > @@ -0,0 +1,194 @@ > +; RUN: llc < %s -march=x86-64 -mattr=+sse3,-avx | FileCheck %s -check-prefix=SSE3 > +; RUN: llc < %s -march=x86-64 -mattr=-sse3,+avx | FileCheck %s -check-prefix=AVX > + > +; SSE3: haddpd1: > +; SSE3-NOT: vhaddpd > +; SSE3: haddpd > +; AVX: haddpd1: > +; AVX: vhaddpd > +define <2 x double> @haddpd1(<2 x double> %x, <2 x double> %y) { > + %a = shufflevector <2 x double> %x, <2 x double> %y, <2 x i32> > + %b = shufflevector <2 x double> %x, <2 x double> %y, <2 x i32> > + %r = fadd <2 x double> %a, %b > + ret <2 x double> %r > +} > + > +; SSE3: haddpd2: > +; SSE3-NOT: vhaddpd > +; SSE3: haddpd > +; AVX: haddpd2: > +; AVX: vhaddpd > +define <2 x double> @haddpd2(<2 x double> %x, <2 x double> %y) { > + %a = shufflevector <2 x double> %x, <2 x double> %y, <2 x i32> > + %b = shufflevector <2 x double> %y, <2 x double> %x, <2 x i32> > + %r = fadd <2 x double> %a, %b > + ret <2 x double> %r > +} > + > +; SSE3: haddpd3: > +; SSE3-NOT: vhaddpd > +; SSE3: haddpd > +; AVX: haddpd3: > +; AVX: vhaddpd > +define <2 x double> @haddpd3(<2 x double> %x) { > + %a = shufflevector <2 x double> %x, <2 x double> undef, <2 x i32> > + %b = shufflevector <2 x double> %x, <2 x double> undef, <2 x i32> > + %r = fadd <2 x double> %a, %b > + ret <2 x double> %r > +} > + > +; SSE3: haddps1: > +; SSE3-NOT: vhaddps > +; SSE3: haddps > +; AVX: haddps1: > +; AVX: vhaddps > +define <4 x float> @haddps1(<4 x float> %x, <4 x float> %y) { > + %a = shufflevector <4 x float> %x, <4 x float> %y, <4 x i32> > + %b = shufflevector <4 x float> %x, <4 x float> %y, <4 x i32> > + %r = fadd <4 x float> %a, %b > + ret <4 x float> %r > +} > + > +; SSE3: haddps2: > +; SSE3-NOT: vhaddps > +; SSE3: haddps > +; AVX: haddps2: > +; AVX: vhaddps > +define <4 x float> @haddps2(<4 x float> %x, <4 x float> %y) { > + %a = shufflevector <4 x float> %x, <4 x float> %y, <4 x i32> > + %b = shufflevector <4 x float> %y, <4 x float> %x, <4 x i32> > + %r = fadd <4 x float> %a, %b > + ret <4 x float> %r > +} > + > +; SSE3: haddps3: > +; SSE3-NOT: vhaddps > +; SSE3: haddps > +; AVX: haddps3: > +; AVX: vhaddps > +define <4 x float> @haddps3(<4 x float> %x) { > + %a = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> > + %b = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> > + %r = fadd <4 x float> %a, %b > + ret <4 x float> %r > +} > + > +; SSE3: haddps4: > +; SSE3-NOT: vhaddps > +; SSE3: haddps > +; AVX: haddps4: > +; AVX: vhaddps > +define <4 x float> @haddps4(<4 x float> %x) { > + %a = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> > + %b = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> > + %r = fadd <4 x float> %a, %b > + ret <4 x float> %r > +} > + > +; SSE3: haddps5: > +; SSE3-NOT: vhaddps > +; SSE3: haddps > +; AVX: haddps5: > +; AVX: vhaddps > +define <4 x float> @haddps5(<4 x float> %x) { > + %a = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> > + %b = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> > + %r = fadd <4 x float> %a, %b > + ret <4 x float> %r > +} > + > +; SSE3: haddps6: > +; SSE3-NOT: vhaddps > +; SSE3: haddps > +; AVX: haddps6: > +; AVX: vhaddps > +define <4 x float> @haddps6(<4 x float> %x) { > + %a = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> > + %b = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> > + %r = fadd <4 x float> %a, %b > + ret <4 x float> %r > +} > + > +; SSE3: haddps7: > +; SSE3-NOT: vhaddps > +; SSE3: haddps > +; AVX: haddps7: > +; AVX: vhaddps > +define <4 x float> @haddps7(<4 x float> %x) { > + %a = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> > + %b = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> > + %r = fadd <4 x float> %a, %b > + ret <4 x float> %r > +} > + > +; SSE3: hsubpd1: > +; SSE3-NOT: vhsubpd > +; SSE3: hsubpd > +; AVX: hsubpd1: > +; AVX: vhsubpd > +define <2 x double> @hsubpd1(<2 x double> %x, <2 x double> %y) { > + %a = shufflevector <2 x double> %x, <2 x double> %y, <2 x i32> > + %b = shufflevector <2 x double> %x, <2 x double> %y, <2 x i32> > + %r = fsub <2 x double> %a, %b > + ret <2 x double> %r > +} > + > +; SSE3: hsubpd2: > +; SSE3-NOT: vhsubpd > +; SSE3: hsubpd > +; AVX: hsubpd2: > +; AVX: vhsubpd > +define <2 x double> @hsubpd2(<2 x double> %x) { > + %a = shufflevector <2 x double> %x, <2 x double> undef, <2 x i32> > + %b = shufflevector <2 x double> %x, <2 x double> undef, <2 x i32> > + %r = fsub <2 x double> %a, %b > + ret <2 x double> %r > +} > + > +; SSE3: hsubps1: > +; SSE3-NOT: vhsubps > +; SSE3: hsubps > +; AVX: hsubps1: > +; AVX: vhsubps > +define <4 x float> @hsubps1(<4 x float> %x, <4 x float> %y) { > + %a = shufflevector <4 x float> %x, <4 x float> %y, <4 x i32> > + %b = shufflevector <4 x float> %x, <4 x float> %y, <4 x i32> > + %r = fsub <4 x float> %a, %b > + ret <4 x float> %r > +} > + > +; SSE3: hsubps2: > +; SSE3-NOT: vhsubps > +; SSE3: hsubps > +; AVX: hsubps2: > +; AVX: vhsubps > +define <4 x float> @hsubps2(<4 x float> %x) { > + %a = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> > + %b = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> > + %r = fsub <4 x float> %a, %b > + ret <4 x float> %r > +} > + > +; SSE3: hsubps3: > +; SSE3-NOT: vhsubps > +; SSE3: hsubps > +; AVX: hsubps3: > +; AVX: vhsubps > +define <4 x float> @hsubps3(<4 x float> %x) { > + %a = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> > + %b = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> > + %r = fsub <4 x float> %a, %b > + ret <4 x float> %r > +} > + > +; SSE3: hsubps4: > +; SSE3-NOT: vhsubps > +; SSE3: hsubps > +; AVX: hsubps4: > +; AVX: vhsubps > +define <4 x float> @hsubps4(<4 x float> %x) { > + %a = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> > + %b = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> > + %r = fsub <4 x float> %a, %b > + ret <4 x float> %r > +} > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From ahatanak at gmail.com Thu Sep 22 17:10:43 2011 From: ahatanak at gmail.com (Akira Hatanaka) Date: Thu, 22 Sep 2011 15:10:43 -0700 Subject: [llvm-commits] [llvm] r140319 - /llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td In-Reply-To: <4E46EBD3-B61E-470B-9357-04C366185BD1@2pi.dk> References: <20110922175732.49A722A6C12C@llvm.org> <613B8C51-6BF4-46C1-9C5C-C7EA15482D74@2pi.dk> <4E46EBD3-B61E-470B-9357-04C366185BD1@2pi.dk> Message-ID: Mips64 and Mips32 have the same set of floating point instructions but the organization of the floating point register file is different: Mips64's register file consists of 32 x 64-bit registers, whilie Mips32's register file consists of 16 x 64-bit registers (each 64-bit register consist of a pair of single precision registers). I was considering making only one out of the two sets of registers available for the register allocator to pick at any time by changing the set of reserved registers. For example, if the target is Mips32, D*_64 registers are reserved, while D* registers are available. Does this make sense? > Are there instructions that can use both D0_64 and D0? What does that mean? Which one should the register allocator pick? On Thu, Sep 22, 2011 at 1:49 PM, Jakob Stoklund Olesen wrote: > > On Sep 22, 2011, at 1:41 PM, Akira Hatanaka wrote: > >> I have a question about subreg index. >> >> I am going to add the D_64 FP registers to the same register file that >> has the 16 64-bit registers consisting of a pair of 32-bit FP register >> (this makes code simpler in other places). The register file >> definition will look like this: >> >> def AFGR64 : RegisterClass<"Mips", [f64], 64, (add >> ?// Return Values and Arguments >> ?D0, D1, D6, D7, >> ?// Not preserved across procedure calls >> ?D2, D3, D4, D5, D8, D9, >> ?// Callee save >> ?D10, D11, D12, D13, D14, D15, >> >> ?D0_64, D1_64, D2_64, D3_64, D4_64, D5_64, D6_64, D7_64, >> ?D8_64, D9_64, D10_64, D11_64, D12_64, D13_64, D14_64, D15_64, >> ?D16_64, D17_64, D18_64, D19_64, D20_64, D21_64, D22_64, D23_64, >> ?D24_64, D25_64, D26_64, D27_64, D28_64, D29_64, D30_64, D31_64)> { >> ?let SubRegClasses = [(FGR32 sub_fpeven, sub_fpodd)]; >> } >> >> In this case, is it still correct to use sub_32 in D*_64 64-bit FP >> register definitions or should I be using the same subreg indices >> (sub_fpeven) that the paired registers use (perhaps renaming >> sub_fpeven and sub_fpodd)? > > Wow, that looks really weird. > > I don't know the Mips target very well, could you explain what you are trying to do? > > A register class is mostly used as a constraint on the legal registers for an instruction. > > Are there instructions that can use both D0_64 and D0? What does that mean? Which one should the register allocator pick? > > /jakob > > From resistor at mac.com Thu Sep 22 17:32:22 2011 From: resistor at mac.com (Owen Anderson) Date: Thu, 22 Sep 2011 22:32:22 -0000 Subject: [llvm-commits] [llvm] r140345 - in /llvm/trunk: include/llvm/MC/MCAtom.h include/llvm/MC/MCModule.h lib/MC/MCAtom.cpp lib/MC/MCModule.cpp Message-ID: <20110922223222.4E4922A6C12C@llvm.org> Author: resistor Date: Thu Sep 22 17:32:22 2011 New Revision: 140345 URL: http://llvm.org/viewvc/llvm-project?rev=140345&view=rev Log: Start stubbing out MCModule and MCAtom, which provide an API for accessing the rich disassembly of a complete object or executable. These are very much a work in progress, and not really useful yet. Added: llvm/trunk/include/llvm/MC/MCAtom.h llvm/trunk/include/llvm/MC/MCModule.h llvm/trunk/lib/MC/MCAtom.cpp llvm/trunk/lib/MC/MCModule.cpp Added: llvm/trunk/include/llvm/MC/MCAtom.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCAtom.h?rev=140345&view=auto ============================================================================== --- llvm/trunk/include/llvm/MC/MCAtom.h (added) +++ llvm/trunk/include/llvm/MC/MCAtom.h Thu Sep 22 17:32:22 2011 @@ -0,0 +1,75 @@ +//===-- llvm/MC/MCAtom.h - MCAtom class ---------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains the declaration of the MCAtom class, which is used to +// represent a contiguous region in a decoded object that is uniformly data or +// instructions; +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCATOM_H +#define LLVM_MC_MCATOM_H + +#include "llvm/MC/MCInst.h" +#include "llvm/Support/DataTypes.h" +#include + +namespace llvm { + +class MCModule; + +/// MCData - An entry in a data MCAtom. +// NOTE: This may change to a more complex type in the future. +typedef uint8_t MCData; + +/// MCAtom - Represents a contiguous range of either instructions (a TextAtom) +/// or data (a DataAtom). Address ranges are expressed as _closed_ intervals. +class MCAtom { + friend class MCModule; + typedef enum { TextAtom, DataAtom } AtomType; + + AtomType Type; + MCModule *Parent; + uint64_t Begin, End; + + std::vector > Text; + std::vector Data; + + // Private constructor - only callable by MCModule + MCAtom(AtomType T, MCModule *P, uint64_t B, uint64_t E) + : Type(T), Parent(P), Begin(B), End(E) { } + +public: + bool isTextAtom() { return Type == TextAtom; } + bool isDataAtom() { return Type == DataAtom; } + + void addInst(const MCInst &I, uint64_t Address) { + assert(Type == TextAtom && "Trying to add MCInst to a non-text atom!"); + Text.push_back(std::make_pair(Address, I)); + } + + void addData(const MCData &D) { + assert(Type == DataAtom && "Trying to add MCData to a non-data atom!"); + Data.push_back(D); + } + + /// split - Splits the atom in two at a given address, which must align with + /// and instruction boundary if this is a TextAtom. Returns the newly created + /// atom representing the high part of the split. + MCAtom *split(uint64_t SplitPt); + + /// truncate - Truncates an atom so that TruncPt is the last byte address + /// contained in the atom. + void truncate(uint64_t TruncPt); +}; + +} + +#endif + Added: llvm/trunk/include/llvm/MC/MCModule.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCModule.h?rev=140345&view=auto ============================================================================== --- llvm/trunk/include/llvm/MC/MCModule.h (added) +++ llvm/trunk/include/llvm/MC/MCModule.h Thu Sep 22 17:32:22 2011 @@ -0,0 +1,58 @@ +//===-- llvm/MC/MCModule.h - MCModule class ---------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains the declaration of the MCModule class, which is used to +// represent a complete, disassembled object file or executable. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCMODULE_H +#define LLVM_MC_MCMODULE_H + +#include "llvm/ADT/DenseMap.h" +#include "llvm/ADT/IntervalMap.h" +#include "llvm/ADT/SmallPtrSet.h" +#include "llvm/Support/DataTypes.h" + +namespace llvm { + +class MCAtom; + +/// MCModule - This class represent a completely disassembled object file or +/// executable. It comprises a list of MCAtom's, and a branch target table. +/// Each atom represents a contiguous range of either instructions or data. +class MCModule { + /// AtomAllocationTracker - An MCModule owns its component MCAtom's, so it + /// must track them in order to ensure they are properly freed as atoms are + /// merged or otherwise manipulated. + SmallPtrSet AtomAllocationTracker; + + /// OffsetMap - Efficiently maps offset ranges to MCAtom's. + IntervalMap OffsetMap; + + /// BranchTargetMap - Maps offsets that are determined to be branches and + /// can be statically resolved to their target offsets. + DenseMap BranchTargetMap; + + friend class MCAtom; + + /// remap - Update the interval mapping for an MCAtom. + void remap(MCAtom *Atom, uint64_t NewBegin, uint64_t NewEnd); + +public: + MCModule(IntervalMap::Allocator &A) : OffsetMap(A) { } + + /// createAtom - Creates a new MCAtom covering the specified offset range. + MCAtom *createAtom(MCAtom::AtomType Type, uint64_t Begin, uint64_t End); +}; + +} + +#endif + Added: llvm/trunk/lib/MC/MCAtom.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCAtom.cpp?rev=140345&view=auto ============================================================================== --- llvm/trunk/lib/MC/MCAtom.cpp (added) +++ llvm/trunk/lib/MC/MCAtom.cpp Thu Sep 22 17:32:22 2011 @@ -0,0 +1,79 @@ +//===- lib/MC/MCAtom.cpp - MCAtom implementation --------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCAtom.h" +#include "llvm/MC/MCModule.h" +#include "llvm/Support/ErrorHandling.h" + +using namespace llvm; + +MCAtom *MCAtom::split(uint64_t SplitPt) { + assert((SplitPt > Begin && SplitPt <= End) && + "Splitting at point not contained in atom!"); + + // Compute the new begin/end points. + uint64_t LeftBegin = Begin; + uint64_t LeftEnd = SplitPt - 1; + uint64_t RightBegin = SplitPt; + uint64_t RightEnd = End; + + // Remap this atom to become the lower of the two new ones. + Parent->remap(this, LeftBegin, LeftEnd); + + // Create a new atom for the higher atom. + MCAtom *RightAtom = Parent->createAtom(Type, RightBegin, RightEnd); + + // Split the contents of the original atom between it and the new one. The + // precise method depends on whether this is a data or a text atom. + if (isDataAtom()) { + std::vector::iterator I = Data.begin() + (RightBegin - LeftBegin); + + assert(I != Data.end() && "Split point not found in range!"); + + std::copy(I, Data.end(), RightAtom->Data.end()); + Data.erase(I, Data.end()); + } else if (isTextAtom()) { + std::vector >::iterator I = Text.begin(); + + while (I != Text.end() && I->first < SplitPt) ++I; + + assert(I != Text.end() && "Split point not found in disassembly!"); + assert(I->first == SplitPt && + "Split point does not fall on instruction boundary!"); + + std::copy(I, Text.end(), RightAtom->Text.end()); + Text.erase(I, Text.end()); + } else + llvm_unreachable("Unknown atom type!"); + + return RightAtom; +} + +void MCAtom::truncate(uint64_t TruncPt) { + assert((TruncPt >= Begin && TruncPt < End) && + "Truncation point not contained in atom!"); + + Parent->remap(this, Begin, TruncPt); + + if (isDataAtom()) { + Data.resize(TruncPt - Begin + 1); + } else if (isTextAtom()) { + std::vector >::iterator I = Text.begin(); + + while (I != Text.end() && I->first <= TruncPt) ++I; + + assert(I != Text.end() && "Truncation point not found in disassembly!"); + assert(I->first == TruncPt+1 && + "Truncation point does not fall on instruction boundary"); + + Text.erase(I, Text.end()); + } else + llvm_unreachable("Unknown atom type!"); +} + Added: llvm/trunk/lib/MC/MCModule.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCModule.cpp?rev=140345&view=auto ============================================================================== --- llvm/trunk/lib/MC/MCModule.cpp (added) +++ llvm/trunk/lib/MC/MCModule.cpp Thu Sep 22 17:32:22 2011 @@ -0,0 +1,45 @@ +//===- lib/MC/MCModule.cpp - MCModule implementation --------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCAtom.h" +#include "llvm/MC/MCModule.h" + +using namespace llvm; + +MCAtom *MCModule::createAtom(MCAtom::AtomType Type, + uint64_t Begin, uint64_t End) { + assert(Begin < End && "Creating MCAtom with endpoints reversed?"); + + // Check for atoms already covering this range. + IntervalMap::iterator I = OffsetMap.find(Begin); + assert((!I.valid() || I.start() < End) && "Offset range already occupied!"); + + // Create the new atom and add it to our maps. + MCAtom *NewAtom = new MCAtom(Type, this, Begin, End); + AtomAllocationTracker.insert(NewAtom); + OffsetMap.insert(Begin, End, NewAtom); + return NewAtom; +} + +// remap - Update the interval mapping for an atom. +void MCModule::remap(MCAtom *Atom, uint64_t NewBegin, uint64_t NewEnd) { + // Find and erase the old mapping. + IntervalMap::iterator I = OffsetMap.find(Atom->Begin); + assert(I.valid() && "Atom offset not found in module!"); + assert(*I == Atom && "Previous atom mapping was invalid!"); + I.erase(); + + // Insert the new mapping. + OffsetMap.insert(NewBegin, NewEnd, Atom); + + // Update the atom internal bounds. + Atom->Begin = NewBegin; + Atom->End = NewEnd; +} + From stoklund at 2pi.dk Thu Sep 22 17:35:44 2011 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Thu, 22 Sep 2011 15:35:44 -0700 Subject: [llvm-commits] [llvm] r140319 - /llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td In-Reply-To: References: <20110922175732.49A722A6C12C@llvm.org> <613B8C51-6BF4-46C1-9C5C-C7EA15482D74@2pi.dk> <4E46EBD3-B61E-470B-9357-04C366185BD1@2pi.dk> Message-ID: On Sep 22, 2011, at 3:10 PM, Akira Hatanaka wrote: > Mips64 and Mips32 have the same set of floating point instructions but > the organization of the floating point register file is different: > Mips64's register file consists of 32 x 64-bit registers, whilie > Mips32's register file consists of 16 x 64-bit registers (each 64-bit > register consist of a pair of single precision registers). OK, so the same set of instructions use different register banks depending on the target configuration. > I was considering making only one out of the two sets of registers > available for the register allocator to pick at any time by changing > the set of reserved registers. For example, if the target is Mips32, > D*_64 registers are reserved, while D* registers are available. > > Does this make sense? I think I understand now. I think your scheme could work, but it is quite confusing to have D1_64 and D1 in the same register class. It would be better to create two separate register classes for f64. One containing D*_64, and one containing D*. That would require duplicate f64 instruction definitions for 64-bit and 32-bit mode. This is what you want to avoid, right? An alternative is to use the TRI::getPointerRegClass() hook. It should really be called getDynamicRegClass(), it is not just for pointers. You can: def f64_rc : PointerLikeRegClass<1>; Then use f64_rc instead of AFGR64 in your f64 FPU instruction definitions, and add a TRI::getPointerRegClass() hook. If you are planning to add MC support, you should know that the MC layer doesn't understand dynamic register classes. In that case, I think it would be better to duplicate the f64 instructions for 64-bit and 32-bit mode. /jakob From benny.kra at googlemail.com Thu Sep 22 17:38:34 2011 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Thu, 22 Sep 2011 22:38:34 -0000 Subject: [llvm-commits] [llvm] r140347 - /llvm/trunk/lib/MC/CMakeLists.txt Message-ID: <20110922223834.432EB2A6C12D@llvm.org> Author: d0k Date: Thu Sep 22 17:38:34 2011 New Revision: 140347 URL: http://llvm.org/viewvc/llvm-project?rev=140347&view=rev Log: Update CMake build. Modified: llvm/trunk/lib/MC/CMakeLists.txt Modified: llvm/trunk/lib/MC/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/CMakeLists.txt?rev=140347&r1=140346&r2=140347&view=diff ============================================================================== --- llvm/trunk/lib/MC/CMakeLists.txt (original) +++ llvm/trunk/lib/MC/CMakeLists.txt Thu Sep 22 17:38:34 2011 @@ -5,6 +5,7 @@ MCAsmInfoDarwin.cpp MCAsmStreamer.cpp MCAssembler.cpp + MCAtom.cpp MCCodeEmitter.cpp MCCodeGenInfo.cpp MCContext.cpp @@ -21,6 +22,7 @@ MCLoggingStreamer.cpp MCMachOStreamer.cpp MCMachObjectTargetWriter.cpp + MCModule.cpp MCNullStreamer.cpp MCObjectFileInfo.cpp MCObjectStreamer.cpp From bruno.cardoso at gmail.com Thu Sep 22 17:42:01 2011 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Thu, 22 Sep 2011 15:42:01 -0700 Subject: [llvm-commits] [llvm] r140319 - /llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td In-Reply-To: References: <20110922175732.49A722A6C12C@llvm.org> <613B8C51-6BF4-46C1-9C5C-C7EA15482D74@2pi.dk> <4E46EBD3-B61E-470B-9357-04C366185BD1@2pi.dk> Message-ID: On Thu, Sep 22, 2011 at 3:35 PM, Jakob Stoklund Olesen wrote: > > On Sep 22, 2011, at 3:10 PM, Akira Hatanaka wrote: > > > Mips64 and Mips32 have the same set of floating point instructions but > > the organization of the floating point register file is different: > > Mips64's register file consists of 32 x 64-bit registers, whilie > > Mips32's register file consists of 16 x 64-bit registers (each 64-bit > > register consist of a pair of single precision registers). > > OK, so the same set of instructions use different register banks depending on the target configuration. > > > I was considering making only one out of the two sets of registers > > available for the register allocator to pick at any time by changing > > the set of reserved registers. For example, if the target is Mips32, > > D*_64 registers are reserved, while D* registers are available. > > > > Does this make sense? > > I think I understand now. > > I think your scheme could work, but it is quite confusing to have D1_64 and D1 in the same register class. It would be better to create two separate register classes for f64. One containing D*_64, and one containing D*. > > That would require duplicate f64 instruction definitions for 64-bit and 32-bit mode. This is what you want to avoid, right? > > An alternative is to use the TRI::getPointerRegClass() hook. ?It should really be called getDynamicRegClass(), it is not just for pointers. You can: > > ?def f64_rc : PointerLikeRegClass<1>; > > Then use f64_rc instead of AFGR64 in your f64 FPU instruction definitions, and add a TRI::getPointerRegClass() hook. > > > If you are planning to add MC support, you should know that the MC layer doesn't understand dynamic register classes. ?In that case, I think it would be better to duplicate the f64 instructions for 64-bit and 32-bit mode. +1 for having 2 different reg classes and duplicating the instructions! -- Bruno Cardoso Lopes http://www.brunocardoso.cc From stoklund at 2pi.dk Thu Sep 22 17:45:24 2011 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Thu, 22 Sep 2011 22:45:24 -0000 Subject: [llvm-commits] [llvm] r140348 - /llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Message-ID: <20110922224524.D0F1D2A6C12C@llvm.org> Author: stoklund Date: Thu Sep 22 17:45:24 2011 New Revision: 140348 URL: http://llvm.org/viewvc/llvm-project?rev=140348&view=rev Log: Add support for GR32 <-> FR32 cross class copies. We already support GR64 <-> VR128 copies. All of these copies break partial register dependencies by zeroing the high part of the target register. Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=140348&r1=140347&r2=140348&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Thu Sep 22 17:45:24 2011 @@ -2158,6 +2158,17 @@ return X86::MOV64toSDrr; } + // SrcReg(FR32) -> DestReg(GR32) + // SrcReg(GR32) -> DestReg(FR32) + + if (X86::GR32RegClass.contains(DestReg) && X86::FR32RegClass.contains(SrcReg)) + // Copy from a FR32 register to a GR32 register. + return HasAVX ? X86::VMOVSS2DIrr : X86::MOVSS2DIrr; + + if (X86::FR32RegClass.contains(DestReg) && X86::GR32RegClass.contains(SrcReg)) + // Copy from a GR32 register to a FR32 register. + return HasAVX ? X86::VMOVDI2SSrr : X86::MOVDI2SSrr; + return 0; } From gohman at apple.com Thu Sep 22 18:01:29 2011 From: gohman at apple.com (Dan Gohman) Date: Thu, 22 Sep 2011 23:01:29 -0000 Subject: [llvm-commits] [llvm] r140349 - in /llvm/trunk: lib/CodeGen/SelectionDAG/DAGCombiner.cpp test/CodeGen/ARM/select.ll Message-ID: <20110922230129.3A23E2A6C12C@llvm.org> Author: djg Date: Thu Sep 22 18:01:29 2011 New Revision: 140349 URL: http://llvm.org/viewvc/llvm-project?rev=140349&view=rev Log: Fix SimplifySelectCC to add newly created nodes to the DAGCombiner worklist, as it may be possible to perform further optimization on them. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp llvm/trunk/test/CodeGen/ARM/select.ll Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=140349&r1=140348&r2=140349&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Thu Sep 22 18:01:29 2011 @@ -7500,10 +7500,13 @@ SDValue Cond = DAG.getSetCC(DL, TLI.getSetCCResultType(N0.getValueType()), N0, N1, CC); + AddToWorkList(Cond.getNode()); SDValue CstOffset = DAG.getNode(ISD::SELECT, DL, Zero.getValueType(), Cond, One, Zero); + AddToWorkList(CstOffset.getNode()); CPIdx = DAG.getNode(ISD::ADD, DL, TLI.getPointerTy(), CPIdx, CstOffset); + AddToWorkList(CPIdx.getNode()); return DAG.getLoad(TV->getValueType(0), DL, DAG.getEntryNode(), CPIdx, MachinePointerInfo::getConstantPool(), false, false, Alignment); Modified: llvm/trunk/test/CodeGen/ARM/select.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/select.ll?rev=140349&r1=140348&r2=140349&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/select.ll (original) +++ llvm/trunk/test/CodeGen/ARM/select.ll Thu Sep 22 18:01:29 2011 @@ -76,12 +76,12 @@ ; block generated, odds are good that we have close to the ideal code for this: ; ; CHECK-NEON: _f8: -; CHECK-NEON: movw [[REGISTER_1:r[0-9]+]], #1123 -; CHECK-NEON-NEXT: movs [[REGISTER_2:r[0-9]+]], #0 -; CHECK-NEON-NEXT: cmp r0, [[REGISTER_1]] -; CHECK-NEON-NEXT: it eq -; CHECK-NEON-NEXT: moveq [[REGISTER_2]], #4 -; CHECK-NEON-NEXT: adr [[REGISTER_3:r[0-9]+]], LCPI +; CHECK-NEON: adr r2, LCPI7_0 +; CHECK-NEON-NEXT: movw r3, #1123 +; CHECK-NEON-NEXT: adds r1, r2, #4 +; CHECK-NEON-NEXT: cmp r0, r3 +; CHECK-NEON-NEXT: it ne +; CHECK-NEON-NEXT: movne r1, r2 ; CHECK-NEON-NEXT: ldr ; CHECK-NEON: bx From ahatanak at gmail.com Thu Sep 22 18:16:37 2011 From: ahatanak at gmail.com (Akira Hatanaka) Date: Thu, 22 Sep 2011 16:16:37 -0700 Subject: [llvm-commits] [llvm] r140319 - /llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td In-Reply-To: References: <20110922175732.49A722A6C12C@llvm.org> <613B8C51-6BF4-46C1-9C5C-C7EA15482D74@2pi.dk> <4E46EBD3-B61E-470B-9357-04C366185BD1@2pi.dk> Message-ID: Okay, I will create two register files and two sets of instructions. Thank you for your comments. On Thu, Sep 22, 2011 at 3:42 PM, Bruno Cardoso Lopes wrote: > On Thu, Sep 22, 2011 at 3:35 PM, Jakob Stoklund Olesen wrote: >> >> On Sep 22, 2011, at 3:10 PM, Akira Hatanaka wrote: >> >> > Mips64 and Mips32 have the same set of floating point instructions but >> > the organization of the floating point register file is different: >> > Mips64's register file consists of 32 x 64-bit registers, whilie >> > Mips32's register file consists of 16 x 64-bit registers (each 64-bit >> > register consist of a pair of single precision registers). >> >> OK, so the same set of instructions use different register banks depending on the target configuration. >> >> > I was considering making only one out of the two sets of registers >> > available for the register allocator to pick at any time by changing >> > the set of reserved registers. For example, if the target is Mips32, >> > D*_64 registers are reserved, while D* registers are available. >> > >> > Does this make sense? >> >> I think I understand now. >> >> I think your scheme could work, but it is quite confusing to have D1_64 and D1 in the same register class. It would be better to create two separate register classes for f64. One containing D*_64, and one containing D*. >> >> That would require duplicate f64 instruction definitions for 64-bit and 32-bit mode. This is what you want to avoid, right? >> >> An alternative is to use the TRI::getPointerRegClass() hook. ?It should really be called getDynamicRegClass(), it is not just for pointers. You can: >> >> ?def f64_rc : PointerLikeRegClass<1>; >> >> Then use f64_rc instead of AFGR64 in your f64 FPU instruction definitions, and add a TRI::getPointerRegClass() hook. >> >> >> If you are planning to add MC support, you should know that the MC layer doesn't understand dynamic register classes. ?In that case, I think it would be better to duplicate the f64 instructions for 64-bit and 32-bit mode. > > +1 for having 2 different reg classes and duplicating the instructions! > > > -- > Bruno Cardoso Lopes > http://www.brunocardoso.cc > From resistor at mac.com Thu Sep 22 18:20:48 2011 From: resistor at mac.com (Owen Anderson) Date: Thu, 22 Sep 2011 23:20:48 -0000 Subject: [llvm-commits] [llvm] r140352 - /llvm/trunk/lib/MC/CMakeLists.txt Message-ID: <20110922232048.790912A6C12C@llvm.org> Author: resistor Date: Thu Sep 22 18:20:48 2011 New Revision: 140352 URL: http://llvm.org/viewvc/llvm-project?rev=140352&view=rev Log: Add new files to CMake. Modified: llvm/trunk/lib/MC/CMakeLists.txt Modified: llvm/trunk/lib/MC/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/CMakeLists.txt?rev=140352&r1=140351&r2=140352&view=diff ============================================================================== --- llvm/trunk/lib/MC/CMakeLists.txt (original) +++ llvm/trunk/lib/MC/CMakeLists.txt Thu Sep 22 18:20:48 2011 @@ -43,6 +43,8 @@ SubtargetFeature.cpp MCAsmBackend.cpp MCTargetAsmLexer.cpp + MCAtom.cpp + MCModule.cpp ) add_llvm_library_dependencies(LLVMMC From isanbard at gmail.com Thu Sep 22 18:27:10 2011 From: isanbard at gmail.com (Bill Wendling) Date: Thu, 22 Sep 2011 23:27:10 -0000 Subject: [llvm-commits] [www] r140353 - /www/trunk/index.html Message-ID: <20110922232710.AF3AD2A6C12C@llvm.org> Author: void Date: Thu Sep 22 18:27:10 2011 New Revision: 140353 URL: http://llvm.org/viewvc/llvm-project?rev=140353&view=rev Log: Add the tentative 3.0 release schedule. Modified: www/trunk/index.html Modified: www/trunk/index.html URL: http://llvm.org/viewvc/llvm-project/www/trunk/index.html?rev=140353&r1=140352&r2=140353&view=diff ============================================================================== --- www/trunk/index.html (original) +++ www/trunk/index.html Thu Sep 22 18:27:10 2011 @@ -142,7 +142,16 @@
    Upcoming Releases
    -

    LLVM 3.0 Release: To Be Announced

    +

    LLVM 3.0 Release: Tentative Schedule

    +
      +
    • October 14th — Create 3.0 branch
      • +
    • October 16th — First round of testing starts
      • +
    • October 23rd — First round of testing ends / Bug fixing begins
      • +
    • October 30th — Second round of testing starts
      • +
    • November 6th — Second round of testing ends / Bug fixing begins
      • +
    • November 13th — Finalization of binaries
      • +
    • November 16th — Release!
      • +

    From ahatanak at gmail.com Thu Sep 22 18:31:54 2011 From: ahatanak at gmail.com (Akira Hatanaka) Date: Thu, 22 Sep 2011 23:31:54 -0000 Subject: [llvm-commits] [llvm] r140354 - in /llvm/trunk/lib/Target/Mips: MipsInstrFPU.td MipsInstrInfo.td Message-ID: <20110922233154.CC6C52A6C12C@llvm.org> Author: ahatanak Date: Thu Sep 22 18:31:54 2011 New Revision: 140354 URL: http://llvm.org/viewvc/llvm-project?rev=140354&view=rev Log: Make changes in instruction and pattern definitions so that tablegen does not complain it cannot infer types in patterns. Fix a mistake in definition of SDT_MipsExtractElementF64. Modified: llvm/trunk/lib/Target/Mips/MipsInstrFPU.td llvm/trunk/lib/Target/Mips/MipsInstrInfo.td Modified: llvm/trunk/lib/Target/Mips/MipsInstrFPU.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrFPU.td?rev=140354&r1=140353&r2=140354&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsInstrFPU.td (original) +++ llvm/trunk/lib/Target/Mips/MipsInstrFPU.td Thu Sep 22 18:31:54 2011 @@ -27,7 +27,7 @@ def SDT_MipsFPBrcond : SDTypeProfile<0, 2, [SDTCisInt<0>, SDTCisVT<1, OtherVT>]>; def SDT_MipsFPCmp : SDTypeProfile<0, 3, [SDTCisSameAs<0, 1>, SDTCisFP<1>, - SDTCisInt<2>]>; + SDTCisVT<2, i32>]>; def SDT_MipsCMovFP : SDTypeProfile<1, 2, [SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>]>; def SDT_MipsBuildPairF64 : SDTypeProfile<1, 2, [SDTCisVT<0, f64>, @@ -35,7 +35,7 @@ SDTCisSameAs<1, 2>]>; def SDT_MipsExtractElementF64 : SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisVT<1, f64>, - SDTCisVT<0, i32>]>; + SDTCisVT<2, i32>]>; def MipsFPCmp : SDNode<"MipsISD::FPCmp", SDT_MipsFPCmp, [SDNPOutGlue]>; def MipsCMovFP_T : SDNode<"MipsISD::CMovFP_T", SDT_MipsCMovFP, [SDNPInGlue]>; Modified: llvm/trunk/lib/Target/Mips/MipsInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrInfo.td?rev=140354&r1=140353&r2=140354&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsInstrInfo.td (original) +++ llvm/trunk/lib/Target/Mips/MipsInstrInfo.td Thu Sep 22 18:31:54 2011 @@ -43,10 +43,10 @@ SDTCisVT<1, iPTR>]>; def SDT_Sync : SDTypeProfile<0, 1, [SDTCisVT<0, i32>]>; -def SDT_Ext : SDTypeProfile<1, 3, [SDTCisVT<0, i32>, SDTCisSameAs<0, 1>, - SDTCisInt<2>, SDTCisSameAs<2, 3>]>; -def SDT_Ins : SDTypeProfile<1, 4, [SDTCisVT<0, i32>, SDTCisSameAs<0, 1>, - SDTCisInt<2>, SDTCisSameAs<2, 3>, +def SDT_Ext : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisSameAs<0, 1>, + SDTCisVT<2, i32>, SDTCisSameAs<2, 3>]>; +def SDT_Ins : SDTypeProfile<1, 4, [SDTCisInt<0>, SDTCisSameAs<0, 1>, + SDTCisVT<2, i32>, SDTCisSameAs<2, 3>, SDTCisSameAs<0, 4>]>; // Call @@ -252,7 +252,7 @@ SDNode OpNode>: FR<0x00, func, (outs CPURegs:$dst), (ins CPURegs:$b, shamt:$c), !strconcat(instr_asm, "\t$dst, $b, $c"), - [(set CPURegs:$dst, (OpNode CPURegs:$b, immZExt5:$c))], IIAlu> { + [(set CPURegs:$dst, (OpNode CPURegs:$b, (i32 immZExt5:$c)))], IIAlu> { let rs = _rs; } @@ -289,13 +289,13 @@ class CBranch op, string instr_asm, PatFrag cond_op>: FI; class CBranchZero op, string instr_asm, PatFrag cond_op>: FI; } @@ -791,23 +791,23 @@ def : Pat<(store (i32 0), addr:$dst), (SW ZERO, addr:$dst)>; // brcond patterns -def : Pat<(brcond (setne CPURegs:$lhs, 0), bb:$dst), +def : Pat<(brcond (i32 (setne CPURegs:$lhs, 0)), bb:$dst), (BNE CPURegs:$lhs, ZERO, bb:$dst)>; -def : Pat<(brcond (seteq CPURegs:$lhs, 0), bb:$dst), +def : Pat<(brcond (i32 (seteq CPURegs:$lhs, 0)), bb:$dst), (BEQ CPURegs:$lhs, ZERO, bb:$dst)>; -def : Pat<(brcond (setge CPURegs:$lhs, CPURegs:$rhs), bb:$dst), +def : Pat<(brcond (i32 (setge CPURegs:$lhs, CPURegs:$rhs)), bb:$dst), (BEQ (SLT CPURegs:$lhs, CPURegs:$rhs), ZERO, bb:$dst)>; -def : Pat<(brcond (setuge CPURegs:$lhs, CPURegs:$rhs), bb:$dst), +def : Pat<(brcond (i32 (setuge CPURegs:$lhs, CPURegs:$rhs)), bb:$dst), (BEQ (SLTu CPURegs:$lhs, CPURegs:$rhs), ZERO, bb:$dst)>; -def : Pat<(brcond (setge CPURegs:$lhs, immSExt16:$rhs), bb:$dst), +def : Pat<(brcond (i32 (setge CPURegs:$lhs, immSExt16:$rhs)), bb:$dst), (BEQ (SLTi CPURegs:$lhs, immSExt16:$rhs), ZERO, bb:$dst)>; -def : Pat<(brcond (setuge CPURegs:$lhs, immSExt16:$rhs), bb:$dst), +def : Pat<(brcond (i32 (setuge CPURegs:$lhs, immSExt16:$rhs)), bb:$dst), (BEQ (SLTiu CPURegs:$lhs, immSExt16:$rhs), ZERO, bb:$dst)>; -def : Pat<(brcond (setle CPURegs:$lhs, CPURegs:$rhs), bb:$dst), +def : Pat<(brcond (i32 (setle CPURegs:$lhs, CPURegs:$rhs)), bb:$dst), (BEQ (SLT CPURegs:$rhs, CPURegs:$lhs), ZERO, bb:$dst)>; -def : Pat<(brcond (setule CPURegs:$lhs, CPURegs:$rhs), bb:$dst), +def : Pat<(brcond (i32 (setule CPURegs:$lhs, CPURegs:$rhs)), bb:$dst), (BEQ (SLTu CPURegs:$rhs, CPURegs:$lhs), ZERO, bb:$dst)>; def : Pat<(brcond CPURegs:$cond, bb:$dst), @@ -815,30 +815,30 @@ // select patterns multiclass MovzPats { - def : Pat<(select (setge CPURegs:$lhs, CPURegs:$rhs), RC:$T, RC:$F), + def : Pat<(select (i32 (setge CPURegs:$lhs, CPURegs:$rhs)), RC:$T, RC:$F), (MOVZInst RC:$T, (SLT CPURegs:$lhs, CPURegs:$rhs), RC:$F)>; - def : Pat<(select (setuge CPURegs:$lhs, CPURegs:$rhs), RC:$T, RC:$F), + def : Pat<(select (i32 (setuge CPURegs:$lhs, CPURegs:$rhs)), RC:$T, RC:$F), (MOVZInst RC:$T, (SLTu CPURegs:$lhs, CPURegs:$rhs), RC:$F)>; - def : Pat<(select (setge CPURegs:$lhs, immSExt16:$rhs), RC:$T, RC:$F), + def : Pat<(select (i32 (setge CPURegs:$lhs, immSExt16:$rhs)), RC:$T, RC:$F), (MOVZInst RC:$T, (SLTi CPURegs:$lhs, immSExt16:$rhs), RC:$F)>; - def : Pat<(select (setuge CPURegs:$lh, immSExt16:$rh), RC:$T, RC:$F), + def : Pat<(select (i32 (setuge CPURegs:$lh, immSExt16:$rh)), RC:$T, RC:$F), (MOVZInst RC:$T, (SLTiu CPURegs:$lh, immSExt16:$rh), RC:$F)>; - def : Pat<(select (setle CPURegs:$lhs, CPURegs:$rhs), RC:$T, RC:$F), + def : Pat<(select (i32 (setle CPURegs:$lhs, CPURegs:$rhs)), RC:$T, RC:$F), (MOVZInst RC:$T, (SLT CPURegs:$rhs, CPURegs:$lhs), RC:$F)>; - def : Pat<(select (setule CPURegs:$lhs, CPURegs:$rhs), RC:$T, RC:$F), + def : Pat<(select (i32 (setule CPURegs:$lhs, CPURegs:$rhs)), RC:$T, RC:$F), (MOVZInst RC:$T, (SLTu CPURegs:$rhs, CPURegs:$lhs), RC:$F)>; - def : Pat<(select (seteq CPURegs:$lhs, CPURegs:$rhs), RC:$T, RC:$F), + def : Pat<(select (i32 (seteq CPURegs:$lhs, CPURegs:$rhs)), RC:$T, RC:$F), (MOVZInst RC:$T, (XOR CPURegs:$lhs, CPURegs:$rhs), RC:$F)>; - def : Pat<(select (seteq CPURegs:$lhs, 0), RC:$T, RC:$F), + def : Pat<(select (i32 (seteq CPURegs:$lhs, 0)), RC:$T, RC:$F), (MOVZInst RC:$T, CPURegs:$lhs, RC:$F)>; } multiclass MovnPats { - def : Pat<(select (setne CPURegs:$lhs, CPURegs:$rhs), RC:$T, RC:$F), + def : Pat<(select (i32 (setne CPURegs:$lhs, CPURegs:$rhs)), RC:$T, RC:$F), (MOVNInst RC:$T, (XOR CPURegs:$lhs, CPURegs:$rhs), RC:$F)>; def : Pat<(select CPURegs:$cond, RC:$T, RC:$F), (MOVNInst RC:$T, CPURegs:$cond, RC:$F)>; - def : Pat<(select (setne CPURegs:$lhs, 0), RC:$T, RC:$F), + def : Pat<(select (i32 (setne CPURegs:$lhs, 0)), RC:$T, RC:$F), (MOVNInst RC:$T, CPURegs:$lhs, RC:$F)>; } From eli.friedman at gmail.com Thu Sep 22 18:41:29 2011 From: eli.friedman at gmail.com (Eli Friedman) Date: Thu, 22 Sep 2011 23:41:29 -0000 Subject: [llvm-commits] [llvm] r140355 - in /llvm/trunk: lib/Target/X86/X86FastISel.cpp test/CodeGen/X86/fast-isel-tls.ll Message-ID: <20110922234129.2397E2A6C12C@llvm.org> Author: efriedma Date: Thu Sep 22 18:41:28 2011 New Revision: 140355 URL: http://llvm.org/viewvc/llvm-project?rev=140355&view=rev Log: PR10991: make fast-isel correctly check whether accessing a global through an alias involves thread-local storage. (I'm not entirely sure how this is supposed to work, but this patch makes fast-isel consistent with the normal isel path.) Modified: llvm/trunk/lib/Target/X86/X86FastISel.cpp llvm/trunk/test/CodeGen/X86/fast-isel-tls.ll Modified: llvm/trunk/lib/Target/X86/X86FastISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FastISel.cpp?rev=140355&r1=140354&r2=140355&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86FastISel.cpp (original) +++ llvm/trunk/lib/Target/X86/X86FastISel.cpp Thu Sep 22 18:41:28 2011 @@ -22,6 +22,7 @@ #include "llvm/CallingConv.h" #include "llvm/DerivedTypes.h" #include "llvm/GlobalVariable.h" +#include "llvm/GlobalAlias.h" #include "llvm/Instructions.h" #include "llvm/IntrinsicInst.h" #include "llvm/Operator.h" @@ -467,14 +468,23 @@ // Handle constant address. if (const GlobalValue *GV = dyn_cast(V)) { - // Can't handle alternate code models or TLS yet. + // Can't handle alternate code models yet. if (TM.getCodeModel() != CodeModel::Small) return false; + // Can't handle TLS yet. if (const GlobalVariable *GVar = dyn_cast(GV)) if (GVar->isThreadLocal()) return false; + // Can't handle TLS yet, part 2 (this is slightly crazy, but this is how + // it works...). + if (const GlobalAlias *GA = dyn_cast(GV)) + if (const GlobalVariable *GVar = + dyn_cast_or_null(GA->resolveAliasedGlobal(false))) + if (GVar->isThreadLocal()) + return false; + // RIP-relative addresses can't have additional register operands, so if // we've already folded stuff into the addressing mode, just force the // global value into its own register, which we can use as the basereg. Modified: llvm/trunk/test/CodeGen/X86/fast-isel-tls.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel-tls.ll?rev=140355&r1=140354&r2=140355&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/fast-isel-tls.ll (original) +++ llvm/trunk/test/CodeGen/X86/fast-isel-tls.ll Thu Sep 22 18:41:28 2011 @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -relocation-model=pic -mtriple=i686-unknown-linux-gnu -fast-isel | grep __tls_get_addr +; RUN: llc < %s -march=x86 -relocation-model=pic -mtriple=i686-unknown-linux-gnu -fast-isel | FileCheck %s ; PR3654 @v = thread_local global i32 0 @@ -8,3 +8,19 @@ %s = add i32 %t, 1 ret i32 %s } + +; CHECK: f: +; CHECK: leal v at TLSGD +; CHECK: __tls_get_addr + + at alias = alias internal i32* @v +define i32 @f_alias() nounwind { +entry: + %t = load i32* @v + %s = add i32 %t, 1 + ret i32 %s +} + +; CHECK: f_alias: +; CHECK: leal v at TLSGD +; CHECK: __tls_get_addr From eli.friedman at gmail.com Thu Sep 22 19:13:02 2011 From: eli.friedman at gmail.com (Eli Friedman) Date: Fri, 23 Sep 2011 00:13:02 -0000 Subject: [llvm-commits] [llvm] r140356 - in /llvm/trunk: lib/MC/MCAsmInfoCOFF.cpp test/CodeGen/X86/hidden-vis.ll Message-ID: <20110923001302.AA0392A6C12C@llvm.org> Author: efriedma Date: Thu Sep 22 19:13:02 2011 New Revision: 140356 URL: http://llvm.org/viewvc/llvm-project?rev=140356&view=rev Log: PR10989: Don't print .hidden on Windows. Modified: llvm/trunk/lib/MC/MCAsmInfoCOFF.cpp llvm/trunk/test/CodeGen/X86/hidden-vis.ll Modified: llvm/trunk/lib/MC/MCAsmInfoCOFF.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCAsmInfoCOFF.cpp?rev=140356&r1=140355&r2=140356&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCAsmInfoCOFF.cpp (original) +++ llvm/trunk/lib/MC/MCAsmInfoCOFF.cpp Thu Sep 22 19:13:02 2011 @@ -27,7 +27,8 @@ LinkOnceDirective = "\t.linkonce discard\n"; // Doesn't support visibility: - HiddenVisibilityAttr = ProtectedVisibilityAttr = MCSA_Invalid; + HiddenVisibilityAttr = HiddenDeclarationVisibilityAttr = MCSA_Invalid; + ProtectedVisibilityAttr = MCSA_Invalid; // Set up DWARF directives HasLEB128 = true; // Target asm supports leb128 directives (little-endian) Modified: llvm/trunk/test/CodeGen/X86/hidden-vis.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/hidden-vis.ll?rev=140356&r1=140355&r2=140356&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/hidden-vis.ll (original) +++ llvm/trunk/test/CodeGen/X86/hidden-vis.ll Thu Sep 22 19:13:02 2011 @@ -1,8 +1,11 @@ ; RUN: llc < %s -mtriple=i686-pc-linux-gnu | FileCheck %s -check-prefix=LINUX ; RUN: llc < %s -mtriple=i686-apple-darwin8 | FileCheck %s -check-prefix=DARWIN +; RUN: llc < %s -mtriple=x86_64-w64-mingw32 | FileCheck %s -check-prefix=WINDOWS + @a = hidden global i32 0 - at b = external global i32 + at b = external hidden global i32 + at c = global i32* @b define weak hidden void @t1() nounwind { ; LINUX: .hidden t1 @@ -10,15 +13,19 @@ ; DARWIN: .private_extern _t1 ; DARWIN: t1: + +; WINDOWS: t1: +; WINDOWS-NOT: hidden ret void } define weak void @t2() nounwind { -; LINUX: t2: -; LINUX: .hidden a - -; DARWIN: t2: -; DARWIN: .private_extern _a +; DARWIN: .weak_definition _t2 ret void } +; LINUX: .hidden a +; LINUX: .hidden b + +; DARWIN: .private_extern _a +; DARWIN-NOT: private_extern From geek4civic at gmail.com Thu Sep 22 19:33:29 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Fri, 23 Sep 2011 09:33:29 +0900 Subject: [llvm-commits] [PATCH] Target/PowerPC: [PR10969] Fix build error on some ppc hosts to #undef PPC, due to predefined macro PPC. Message-ID: --- lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h | 4 ++++ lib/Target/PowerPC/MCTargetDesc/PPCPredicates.h | 4 ++++ 2 files changed, 8 insertions(+), 0 deletions(-) -------------- next part -------------- A non-text attachment was scrubbed... Name: 0001-Target-PowerPC-PR10969-Fix-build-error-on-some-p.patch.txt Type: text/x-patch Size: 1174 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110923/b7e326cd/attachment.bin From echristo at apple.com Thu Sep 22 19:51:44 2011 From: echristo at apple.com (Eric Christopher) Date: Fri, 23 Sep 2011 00:51:44 -0000 Subject: [llvm-commits] [test-suite] r140359 - in /test-suite/trunk: autoconf/AutoRegen.sh autoconf/configure.ac configure Message-ID: <20110923005144.BAD392A6C12C@llvm.org> Author: echristo Date: Thu Sep 22 19:51:44 2011 New Revision: 140359 URL: http://llvm.org/viewvc/llvm-project?rev=140359&view=rev Log: Miscelleous updates: a) We're using 2.60. b) It's llvm 2.9. c) We no longer support systems old enough to not have standard c headers. Modified: test-suite/trunk/autoconf/AutoRegen.sh test-suite/trunk/autoconf/configure.ac test-suite/trunk/configure Modified: test-suite/trunk/autoconf/AutoRegen.sh URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/autoconf/AutoRegen.sh?rev=140359&r1=140358&r2=140359&view=diff ============================================================================== --- test-suite/trunk/autoconf/AutoRegen.sh (original) +++ test-suite/trunk/autoconf/AutoRegen.sh Thu Sep 22 19:51:44 2011 @@ -5,9 +5,9 @@ } test -d autoconf && test -f autoconf/configure.ac && cd autoconf test -f configure.ac || die "Can't find 'autoconf' dir; please cd into it first" -autoconf --version | egrep '2\.[5-6][0-9]' > /dev/null +autoconf --version | egrep '2\.[6][0-9]' > /dev/null if test $? -ne 0 ; then - die "Your autoconf was not detected as being 2.5x" + die "Your autoconf was not detected as being 2.6x" fi cwd=`pwd` if test -d ../../../autoconf/m4 ; then @@ -24,7 +24,7 @@ echo "Regenerating aclocal.m4 with aclocal" rm -f aclocal.m4 aclocal --force -I $cwd/m4 -I $llvm_m4 || die "aclocal failed" -echo "Regenerating configure with autoconf 2.5x" +echo "Regenerating configure with autoconf 2.6x" autoconf --force --warnings=all -o ../configure configure.ac || die "autoconf failed" cd .. exit 0 Modified: test-suite/trunk/autoconf/configure.ac URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/autoconf/configure.ac?rev=140359&r1=140358&r2=140359&view=diff ============================================================================== --- test-suite/trunk/autoconf/configure.ac (original) +++ test-suite/trunk/autoconf/configure.ac Thu Sep 22 19:51:44 2011 @@ -1,5 +1,5 @@ dnl Initialize autoconf -AC_INIT([[LLVM-TEST]],[[2.8svn]],[llvmbugs at cs.uiuc.edu]) +AC_INIT([[LLVM-TEST]],[[2.9svn]],[llvmbugs at cs.uiuc.edu]) dnl Place all of the extra autoconf files into the config subdirectory AC_CONFIG_AUX_DIR([autoconf]) @@ -384,7 +384,6 @@ dnl Checks for header files. dnl We don't check for ancient stuff or things that are guaranteed to be there dnl by the C++ standard. We always use the versions of C headers. -AC_HEADER_STDC AC_HEADER_SYS_WAIT dnl Determine if the linker supports the -R option. Modified: test-suite/trunk/configure URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/configure?rev=140359&r1=140358&r2=140359&view=diff ============================================================================== --- test-suite/trunk/configure (original) +++ test-suite/trunk/configure Thu Sep 22 19:51:44 2011 @@ -1,6 +1,6 @@ #! /bin/sh # Guess values for system-dependent variables and create Makefiles. -# Generated by GNU Autoconf 2.60 for LLVM-TEST 2.8svn. +# Generated by GNU Autoconf 2.60 for LLVM-TEST 2.9svn. # # Report bugs to . # @@ -713,8 +713,8 @@ # Identity of this package. PACKAGE_NAME='LLVM-TEST' PACKAGE_TARNAME='-llvm-test-' -PACKAGE_VERSION='2.8svn' -PACKAGE_STRING='LLVM-TEST 2.8svn' +PACKAGE_VERSION='2.9svn' +PACKAGE_STRING='LLVM-TEST 2.9svn' PACKAGE_BUGREPORT='llvmbugs at cs.uiuc.edu' ac_unique_file="SingleSource/Benchmarks/Makefile" @@ -1402,7 +1402,7 @@ # Omit some internal or obsolete options to make the list less imposing. # This message is too long to be a string in the A/UX 3.1 sh. cat <<_ACEOF -\`configure' configures LLVM-TEST 2.8svn to adapt to many kinds of systems. +\`configure' configures LLVM-TEST 2.9svn to adapt to many kinds of systems. Usage: $0 [OPTION]... [VAR=VALUE]... @@ -1468,7 +1468,7 @@ if test -n "$ac_init_help"; then case $ac_init_help in - short | recursive ) echo "Configuration of LLVM-TEST 2.8svn:";; + short | recursive ) echo "Configuration of LLVM-TEST 2.9svn:";; esac cat <<\_ACEOF @@ -1593,7 +1593,7 @@ test -n "$ac_init_help" && exit $ac_status if $ac_init_version; then cat <<\_ACEOF -LLVM-TEST configure 2.8svn +LLVM-TEST configure 2.9svn generated by GNU Autoconf 2.60 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, @@ -1607,7 +1607,7 @@ This file contains any messages produced by compilers while running configure, to aid debugging if configure makes a mistake. -It was created by LLVM-TEST $as_me 2.8svn, which was +It was created by LLVM-TEST $as_me 2.9svn, which was generated by GNU Autoconf 2.60. Invocation command line was $ $0 $@ @@ -21725,197 +21725,6 @@ fi fi -{ echo "$as_me:$LINENO: checking for ANSI C header files" >&5 -echo $ECHO_N "checking for ANSI C header files... $ECHO_C" >&6; } -if test "${ac_cv_header_stdc+set}" = set; then - echo $ECHO_N "(cached) $ECHO_C" >&6 -else - cat >conftest.$ac_ext <<_ACEOF -/* confdefs.h. */ -_ACEOF -cat confdefs.h >>conftest.$ac_ext -cat >>conftest.$ac_ext <<_ACEOF -/* end confdefs.h. */ -#include -#include -#include -#include - -int -main () -{ - - ; - return 0; -} -_ACEOF -rm -f conftest.$ac_objext -if { (ac_try="$ac_compile" -case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_compile") 2>conftest.er1 - ac_status=$? - grep -v '^ *+' conftest.er1 >conftest.err - rm -f conftest.er1 - cat conftest.err >&5 - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest.$ac_objext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then - ac_cv_header_stdc=yes -else - echo "$as_me: failed program was:" >&5 -sed 's/^/| /' conftest.$ac_ext >&5 - - ac_cv_header_stdc=no -fi - -rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext - -if test $ac_cv_header_stdc = yes; then - # SunOS 4.x string.h does not declare mem*, contrary to ANSI. - cat >conftest.$ac_ext <<_ACEOF -/* confdefs.h. */ -_ACEOF -cat confdefs.h >>conftest.$ac_ext -cat >>conftest.$ac_ext <<_ACEOF -/* end confdefs.h. */ -#include - -_ACEOF -if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | - $EGREP "memchr" >/dev/null 2>&1; then - : -else - ac_cv_header_stdc=no -fi -rm -f conftest* - -fi - -if test $ac_cv_header_stdc = yes; then - # ISC 2.0.2 stdlib.h does not declare free, contrary to ANSI. - cat >conftest.$ac_ext <<_ACEOF -/* confdefs.h. */ -_ACEOF -cat confdefs.h >>conftest.$ac_ext -cat >>conftest.$ac_ext <<_ACEOF -/* end confdefs.h. */ -#include - -_ACEOF -if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | - $EGREP "free" >/dev/null 2>&1; then - : -else - ac_cv_header_stdc=no -fi -rm -f conftest* - -fi - -if test $ac_cv_header_stdc = yes; then - # /bin/cc in Irix-4.0.5 gets non-ANSI ctype macros unless using -ansi. - if test "$cross_compiling" = yes; then - : -else - cat >conftest.$ac_ext <<_ACEOF -/* confdefs.h. */ -_ACEOF -cat confdefs.h >>conftest.$ac_ext -cat >>conftest.$ac_ext <<_ACEOF -/* end confdefs.h. */ -#include -#include -#if ((' ' & 0x0FF) == 0x020) -# define ISLOWER(c) ('a' <= (c) && (c) <= 'z') -# define TOUPPER(c) (ISLOWER(c) ? 'A' + ((c) - 'a') : (c)) -#else -# define ISLOWER(c) \ - (('a' <= (c) && (c) <= 'i') \ - || ('j' <= (c) && (c) <= 'r') \ - || ('s' <= (c) && (c) <= 'z')) -# define TOUPPER(c) (ISLOWER(c) ? ((c) | 0x40) : (c)) -#endif - -#define XOR(e, f) (((e) && !(f)) || (!(e) && (f))) -int -main () -{ - int i; - for (i = 0; i < 256; i++) - if (XOR (islower (i), ISLOWER (i)) - || toupper (i) != TOUPPER (i)) - return 2; - return 0; -} -_ACEOF -rm -f conftest$ac_exeext -if { (ac_try="$ac_link" -case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_link") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { ac_try='./conftest$ac_exeext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then - : -else - echo "$as_me: program exited with status $ac_status" >&5 -echo "$as_me: failed program was:" >&5 -sed 's/^/| /' conftest.$ac_ext >&5 - -( exit $ac_status ) -ac_cv_header_stdc=no -fi -rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext -fi - - -fi -fi -{ echo "$as_me:$LINENO: result: $ac_cv_header_stdc" >&5 -echo "${ECHO_T}$ac_cv_header_stdc" >&6; } -if test $ac_cv_header_stdc = yes; then - -cat >>confdefs.h <<\_ACEOF -#define STDC_HEADERS 1 -_ACEOF - -fi - { echo "$as_me:$LINENO: checking for sys/wait.h that is POSIX.1 compatible" >&5 echo $ECHO_N "checking for sys/wait.h that is POSIX.1 compatible... $ECHO_C" >&6; } if test "${ac_cv_header_sys_wait_h+set}" = set; then @@ -22636,7 +22445,7 @@ # report actual input values of CONFIG_FILES etc. instead of their # values after options handling. ac_log=" -This file was extended by LLVM-TEST $as_me 2.8svn, which was +This file was extended by LLVM-TEST $as_me 2.9svn, which was generated by GNU Autoconf 2.60. Invocation command line was CONFIG_FILES = $CONFIG_FILES @@ -22683,7 +22492,7 @@ _ACEOF cat >>$CONFIG_STATUS <<_ACEOF ac_cs_version="\\ -LLVM-TEST config.status 2.8svn +LLVM-TEST config.status 2.9svn configured by $0, generated by GNU Autoconf 2.60, with options \\"`echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" From echristo at apple.com Thu Sep 22 19:53:11 2011 From: echristo at apple.com (Eric Christopher) Date: Fri, 23 Sep 2011 00:53:11 -0000 Subject: [llvm-commits] [llvm] r140361 - in /llvm/trunk: autoconf/configure.ac configure include/llvm/Config/config.h.cmake include/llvm/Config/config.h.in Message-ID: <20110923005311.3FFBE2A6C12C@llvm.org> Author: echristo Date: Thu Sep 22 19:53:10 2011 New Revision: 140361 URL: http://llvm.org/viewvc/llvm-project?rev=140361&view=rev Log: We're no longer going to bother supporting platforms that don't support C89. We probably didn't support them anyways. Modified: llvm/trunk/autoconf/configure.ac llvm/trunk/configure llvm/trunk/include/llvm/Config/config.h.cmake llvm/trunk/include/llvm/Config/config.h.in Modified: llvm/trunk/autoconf/configure.ac URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/autoconf/configure.ac?rev=140361&r1=140360&r2=140361&view=diff ============================================================================== --- llvm/trunk/autoconf/configure.ac (original) +++ llvm/trunk/autoconf/configure.ac Thu Sep 22 19:53:10 2011 @@ -38,9 +38,8 @@ AC_SUBST(LLVM_COPYRIGHT,["Copyright (c) 2003-2011 University of Illinois at Urbana-Champaign."]) AC_COPYRIGHT([Copyright (c) 2003-2011 University of Illinois at Urbana-Champaign.]) -dnl Indicate that we require autoconf 2.59 or later. Ths is needed because we -dnl use some autoconf macros only available in 2.59. -AC_PREREQ(2.59) +dnl Indicate that we require autoconf 2.60 or later. +AC_PREREQ(2.60) dnl Verify that the source directory is valid. This makes sure that we are dnl configuring LLVM and not some other package (it validates --srcdir argument) @@ -1215,7 +1214,6 @@ AC_HEADER_DIRENT AC_HEADER_MMAP_ANONYMOUS AC_HEADER_STAT -AC_HEADER_STDC AC_HEADER_SYS_WAIT AC_HEADER_TIME Modified: llvm/trunk/configure URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/configure?rev=140361&r1=140360&r2=140361&view=diff ============================================================================== --- llvm/trunk/configure (original) +++ llvm/trunk/configure Thu Sep 22 19:53:10 2011 @@ -14138,197 +14138,6 @@ fi -{ echo "$as_me:$LINENO: checking for ANSI C header files" >&5 -echo $ECHO_N "checking for ANSI C header files... $ECHO_C" >&6; } -if test "${ac_cv_header_stdc+set}" = set; then - echo $ECHO_N "(cached) $ECHO_C" >&6 -else - cat >conftest.$ac_ext <<_ACEOF -/* confdefs.h. */ -_ACEOF -cat confdefs.h >>conftest.$ac_ext -cat >>conftest.$ac_ext <<_ACEOF -/* end confdefs.h. */ -#include -#include -#include -#include - -int -main () -{ - - ; - return 0; -} -_ACEOF -rm -f conftest.$ac_objext -if { (ac_try="$ac_compile" -case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_compile") 2>conftest.er1 - ac_status=$? - grep -v '^ *+' conftest.er1 >conftest.err - rm -f conftest.er1 - cat conftest.err >&5 - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest.$ac_objext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then - ac_cv_header_stdc=yes -else - echo "$as_me: failed program was:" >&5 -sed 's/^/| /' conftest.$ac_ext >&5 - - ac_cv_header_stdc=no -fi - -rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext - -if test $ac_cv_header_stdc = yes; then - # SunOS 4.x string.h does not declare mem*, contrary to ANSI. - cat >conftest.$ac_ext <<_ACEOF -/* confdefs.h. */ -_ACEOF -cat confdefs.h >>conftest.$ac_ext -cat >>conftest.$ac_ext <<_ACEOF -/* end confdefs.h. */ -#include - -_ACEOF -if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | - $EGREP "memchr" >/dev/null 2>&1; then - : -else - ac_cv_header_stdc=no -fi -rm -f conftest* - -fi - -if test $ac_cv_header_stdc = yes; then - # ISC 2.0.2 stdlib.h does not declare free, contrary to ANSI. - cat >conftest.$ac_ext <<_ACEOF -/* confdefs.h. */ -_ACEOF -cat confdefs.h >>conftest.$ac_ext -cat >>conftest.$ac_ext <<_ACEOF -/* end confdefs.h. */ -#include - -_ACEOF -if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | - $EGREP "free" >/dev/null 2>&1; then - : -else - ac_cv_header_stdc=no -fi -rm -f conftest* - -fi - -if test $ac_cv_header_stdc = yes; then - # /bin/cc in Irix-4.0.5 gets non-ANSI ctype macros unless using -ansi. - if test "$cross_compiling" = yes; then - : -else - cat >conftest.$ac_ext <<_ACEOF -/* confdefs.h. */ -_ACEOF -cat confdefs.h >>conftest.$ac_ext -cat >>conftest.$ac_ext <<_ACEOF -/* end confdefs.h. */ -#include -#include -#if ((' ' & 0x0FF) == 0x020) -# define ISLOWER(c) ('a' <= (c) && (c) <= 'z') -# define TOUPPER(c) (ISLOWER(c) ? 'A' + ((c) - 'a') : (c)) -#else -# define ISLOWER(c) \ - (('a' <= (c) && (c) <= 'i') \ - || ('j' <= (c) && (c) <= 'r') \ - || ('s' <= (c) && (c) <= 'z')) -# define TOUPPER(c) (ISLOWER(c) ? ((c) | 0x40) : (c)) -#endif - -#define XOR(e, f) (((e) && !(f)) || (!(e) && (f))) -int -main () -{ - int i; - for (i = 0; i < 256; i++) - if (XOR (islower (i), ISLOWER (i)) - || toupper (i) != TOUPPER (i)) - return 2; - return 0; -} -_ACEOF -rm -f conftest$ac_exeext -if { (ac_try="$ac_link" -case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_link") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && { ac_try='./conftest$ac_exeext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then - : -else - echo "$as_me: program exited with status $ac_status" >&5 -echo "$as_me: failed program was:" >&5 -sed 's/^/| /' conftest.$ac_ext >&5 - -( exit $ac_status ) -ac_cv_header_stdc=no -fi -rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext -fi - - -fi -fi -{ echo "$as_me:$LINENO: result: $ac_cv_header_stdc" >&5 -echo "${ECHO_T}$ac_cv_header_stdc" >&6; } -if test $ac_cv_header_stdc = yes; then - -cat >>confdefs.h <<\_ACEOF -#define STDC_HEADERS 1 -_ACEOF - -fi - { echo "$as_me:$LINENO: checking for sys/wait.h that is POSIX.1 compatible" >&5 echo $ECHO_N "checking for sys/wait.h that is POSIX.1 compatible... $ECHO_C" >&6; } if test "${ac_cv_header_sys_wait_h+set}" = set; then Modified: llvm/trunk/include/llvm/Config/config.h.cmake URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Config/config.h.cmake?rev=140361&r1=140360&r2=140361&view=diff ============================================================================== --- llvm/trunk/include/llvm/Config/config.h.cmake (original) +++ llvm/trunk/include/llvm/Config/config.h.cmake Thu Sep 22 19:53:10 2011 @@ -668,9 +668,6 @@ /* Define to 1 if the `S_IS*' macros in do not work properly. */ #undef STAT_MACROS_BROKEN -/* Define to 1 if you have the ANSI C header files. */ -#undef STDC_HEADERS - /* Define to 1 if you can safely include both and . */ #undef TIME_WITH_SYS_TIME Modified: llvm/trunk/include/llvm/Config/config.h.in URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Config/config.h.in?rev=140361&r1=140360&r2=140361&view=diff ============================================================================== --- llvm/trunk/include/llvm/Config/config.h.in (original) +++ llvm/trunk/include/llvm/Config/config.h.in Thu Sep 22 19:53:10 2011 @@ -666,9 +666,6 @@ /* Define to 1 if the `S_IS*' macros in do not work properly. */ #undef STAT_MACROS_BROKEN -/* Define to 1 if you have the ANSI C header files. */ -#undef STDC_HEADERS - /* Define to 1 if you can safely include both and . */ #undef TIME_WITH_SYS_TIME From ahatanak at gmail.com Thu Sep 22 19:58:33 2011 From: ahatanak at gmail.com (Akira Hatanaka) Date: Fri, 23 Sep 2011 00:58:33 -0000 Subject: [llvm-commits] [llvm] r140363 - /llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Message-ID: <20110923005833.A3A962A6C12C@llvm.org> Author: ahatanak Date: Thu Sep 22 19:58:33 2011 New Revision: 140363 URL: http://llvm.org/viewvc/llvm-project?rev=140363&view=rev Log: Do not rely on the enum values of argument registers A0-A3 being consecutive. Define function getNextIntArgReg, which takes a register as a parameter and returns the next O32 argument integer register. Use this function when double precision floating point arguments are passed in two integer registers. Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=140363&r1=140362&r2=140363&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Thu Sep 22 19:58:33 2011 @@ -1796,6 +1796,12 @@ Mips::A0, Mips::A1, Mips::A2, Mips::A3 }; +// Return next O32 integer argument register. +static unsigned getNextIntArgReg(unsigned Reg) { + assert((Reg == Mips::A0) || (Reg == Mips::A2)); + return (Reg == Mips::A0) ? Mips::A1 : Mips::A3; +} + // Write ByVal Arg to arg registers and stack. static void WriteByValArg(SDValue& ByValChain, SDValue Chain, DebugLoc dl, @@ -1988,8 +1994,10 @@ Arg, DAG.getConstant(1, MVT::i32)); if (!Subtarget->isLittle()) std::swap(Lo, Hi); - RegsToPass.push_back(std::make_pair(VA.getLocReg(), Lo)); - RegsToPass.push_back(std::make_pair(VA.getLocReg()+1, Hi)); + unsigned LocRegLo = VA.getLocReg(); + unsigned LocRegHigh = getNextIntArgReg(LocRegLo); + RegsToPass.push_back(std::make_pair(LocRegLo, Lo)); + RegsToPass.push_back(std::make_pair(LocRegHigh, Hi)); continue; } } @@ -2281,7 +2289,7 @@ ArgValue = DAG.getNode(ISD::BITCAST, dl, MVT::f32, ArgValue); if (RegVT == MVT::i32 && VA.getValVT() == MVT::f64) { unsigned Reg2 = AddLiveIn(DAG.getMachineFunction(), - VA.getLocReg()+1, RC); + getNextIntArgReg(ArgReg), RC); SDValue ArgValue2 = DAG.getCopyFromReg(Chain, dl, Reg2, RegVT); if (!Subtarget->isLittle()) std::swap(ArgValue, ArgValue2); From proljc at gmail.com Thu Sep 22 20:48:20 2011 From: proljc at gmail.com (Liu) Date: Fri, 23 Sep 2011 09:48:20 +0800 Subject: [llvm-commits] [patch] add n32/64 ABI description. In-Reply-To: References: Message-ID: On Fri, Sep 23, 2011 at 1:17 AM, Akira Hatanaka wrote: > A few comments. Please let me know if you have any questions. > > - If N64 and N32 have the same calling convention, you should define > just one for both (e.g. CC_MIps64). I'll double check this. > - Arguments passed in Integer registers shadow floating pointer > registers and vice verca. For example, the first doubleword is passed > in either $4 or $f1, the second in > either $5 or $f1, and so on. Probably you will need to use > CCAssignToRegWithShadow (please see ARMCallingConv.td). Thanks, I'll fix it. > - Integer arguments are all promoted to i64. fixed. > - i64 integer arguments should be passed in 64-bit registers (I will > add the register and register file definitions shortly). Also, i64 > return value should be in 64-bit registers. I'm not sure about this. Shall we need regs such as "AT_64, V0_64, V1_64..."? > - Arguments that cannot be passed in registers are push to the stack, > so you need to use ?CCAssignToStack. Thank you, I'll fix it soon. > > On Thu, Sep 22, 2011 at 12:23 AM, Liu wrote: >> Hi >> >> I added n32/64 ABI description for MIPS Backend. >> >> --Liu >> > From benny.kra at googlemail.com Thu Sep 22 21:00:36 2011 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Thu, 22 Sep 2011 19:00:36 -0700 Subject: [llvm-commits] [llvm] r140352 - /llvm/trunk/lib/MC/CMakeLists.txt In-Reply-To: <20110922232048.790912A6C12C@llvm.org> References: <20110922232048.790912A6C12C@llvm.org> Message-ID: <6270085C-8C6C-471A-93AC-7EEE1469FE30@googlemail.com> On 22.09.2011, at 16:20, Owen Anderson wrote: > Author: resistor > Date: Thu Sep 22 18:20:48 2011 > New Revision: 140352 > > URL: http://llvm.org/viewvc/llvm-project?rev=140352&view=rev > Log: > Add new files to CMake. > > Modified: > llvm/trunk/lib/MC/CMakeLists.txt > > Modified: llvm/trunk/lib/MC/CMakeLists.txt > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/CMakeLists.txt?rev=140352&r1=140351&r2=140352&view=diff > ============================================================================== > --- llvm/trunk/lib/MC/CMakeLists.txt (original) > +++ llvm/trunk/lib/MC/CMakeLists.txt Thu Sep 22 18:20:48 2011 > @@ -43,6 +43,8 @@ > SubtargetFeature.cpp > MCAsmBackend.cpp > MCTargetAsmLexer.cpp > + MCAtom.cpp > + MCModule.cpp Now they're in the list twice :p - Ben From proljc at gmail.com Thu Sep 22 21:23:15 2011 From: proljc at gmail.com (Liu) Date: Fri, 23 Sep 2011 10:23:15 +0800 Subject: [llvm-commits] [patch] PTXCallingConv.td, 80 columns. Message-ID: Hi all PTXCallingConv.td have several long lines, I made them 80 columns. --Liu -------------- next part -------------- A non-text attachment was scrubbed... Name: 0001-PTXCallingConv.td-80-columns.patch Type: text/x-patch Size: 9903 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110923/60ab703c/attachment.bin From ahatanak at gmail.com Thu Sep 22 21:33:16 2011 From: ahatanak at gmail.com (Akira Hatanaka) Date: Fri, 23 Sep 2011 02:33:16 -0000 Subject: [llvm-commits] [llvm] r140366 - /llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td Message-ID: <20110923023316.17C1C2A6C12C@llvm.org> Author: ahatanak Date: Thu Sep 22 21:33:15 2011 New Revision: 140366 URL: http://llvm.org/viewvc/llvm-project?rev=140366&view=rev Log: Add definitions of 64-bit int registers. Modified: llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td Modified: llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td?rev=140366&r1=140365&r2=140366&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td (original) +++ llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td Thu Sep 22 21:33:15 2011 @@ -33,6 +33,13 @@ let Num = num; } +// Mips 64-bit CPU Registers +class Mips64GPRReg num, string n, list subregs> + : MipsRegWithSubRegs { + let Num = num; + let SubRegIndices = [sub_32]; +} + // Mips 32-bit FPU Registers class FPR num, string n> : MipsReg { let Num = num; @@ -96,6 +103,40 @@ def FP : MipsGPRReg< 30, "FP">, DwarfRegNum<[30]>; def RA : MipsGPRReg< 31, "RA">, DwarfRegNum<[31]>; + // General Purpose 64-bit Registers + def ZERO_64 : Mips64GPRReg< 0, "ZERO", [ZERO]>; + def AT_64 : Mips64GPRReg< 1, "AT", [AT]>; + def V0_64 : Mips64GPRReg< 2, "2", [V0]>; + def V1_64 : Mips64GPRReg< 3, "3", [V1]>; + def A0_64 : Mips64GPRReg< 4, "4", [A0]>; + def A1_64 : Mips64GPRReg< 5, "5", [A1]>; + def A2_64 : Mips64GPRReg< 6, "6", [A2]>; + def A3_64 : Mips64GPRReg< 7, "7", [A3]>; + def T0_64 : Mips64GPRReg< 8, "8", [T0]>; + def T1_64 : Mips64GPRReg< 9, "9", [T1]>; + def T2_64 : Mips64GPRReg< 10, "10", [T2]>; + def T3_64 : Mips64GPRReg< 11, "11", [T3]>; + def T4_64 : Mips64GPRReg< 12, "12", [T4]>; + def T5_64 : Mips64GPRReg< 13, "13", [T5]>; + def T6_64 : Mips64GPRReg< 14, "14", [T6]>; + def T7_64 : Mips64GPRReg< 15, "15", [T7]>; + def S0_64 : Mips64GPRReg< 16, "16", [S0]>; + def S1_64 : Mips64GPRReg< 17, "17", [S1]>; + def S2_64 : Mips64GPRReg< 18, "18", [S2]>; + def S3_64 : Mips64GPRReg< 19, "19", [S3]>; + def S4_64 : Mips64GPRReg< 20, "20", [S4]>; + def S5_64 : Mips64GPRReg< 21, "21", [S5]>; + def S6_64 : Mips64GPRReg< 22, "22", [S6]>; + def S7_64 : Mips64GPRReg< 23, "23", [S7]>; + def T8_64 : Mips64GPRReg< 24, "24", [T8]>; + def T9_64 : Mips64GPRReg< 25, "25", [T9]>; + def K0_64 : Mips64GPRReg< 26, "26", [K0]>; + def K1_64 : Mips64GPRReg< 27, "27", [K1]>; + def GP_64 : Mips64GPRReg< 28, "GP", [GP]>; + def SP_64 : Mips64GPRReg< 29, "SP", [SP]>; + def FP_64 : Mips64GPRReg< 30, "FP", [FP]>; + def RA_64 : Mips64GPRReg< 31, "RA", [RA]>; + /// Mips Single point precision FPU Registers def F0 : FPR< 0, "F0">, DwarfRegNum<[32]>; def F1 : FPR< 1, "F1">, DwarfRegNum<[33]>; From ahatanak at gmail.com Thu Sep 22 21:36:09 2011 From: ahatanak at gmail.com (Akira Hatanaka) Date: Thu, 22 Sep 2011 19:36:09 -0700 Subject: [llvm-commits] [patch] add n32/64 ABI description. In-Reply-To: References: Message-ID: On Thu, Sep 22, 2011 at 6:48 PM, Liu wrote: > On Fri, Sep 23, 2011 at 1:17 AM, Akira Hatanaka wrote: >> A few comments. Please let me know if you have any questions. >> >> - If N64 and N32 have the same calling convention, you should define >> just one for both (e.g. CC_MIps64). > I'll double check this. > >> - Arguments passed in Integer registers shadow floating pointer >> registers and vice verca. For example, the first doubleword is passed >> in either $4 or $f1, the second in >> either $5 or $f1, and so on. Probably you will need to use >> CCAssignToRegWithShadow (please see ARMCallingConv.td). > Thanks, I'll fix it. > >> - Integer arguments are all promoted to i64. > fixed. > >> - i64 integer arguments should be passed in 64-bit registers (I will >> add the register and register file definitions shortly). Also, i64 >> return value should be in 64-bit registers. > I'm not sure about this. Shall we need regs such as "AT_64, V0_64, V1_64..."? > Yes. The definitions were added in r140366. >> - Arguments that cannot be passed in registers are push to the stack, >> so you need to use ?CCAssignToStack. > Thank you, I'll fix it soon. > >> >> On Thu, Sep 22, 2011 at 12:23 AM, Liu wrote: >>> Hi >>> >>> I added n32/64 ABI description for MIPS Backend. >>> >>> --Liu >>> >> > From geek4civic at gmail.com Thu Sep 22 23:21:57 2011 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Fri, 23 Sep 2011 13:21:57 +0900 Subject: [llvm-commits] [PATCH] Target/PowerPC: [PR10969] Fix build error on some ppc hosts to #undef PPC, due to predefined macro PPC. In-Reply-To: References: Message-ID: > ?lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h | ? ?4 ++++ > ?lib/Target/PowerPC/MCTargetDesc/PPCPredicates.h ? | ? ?4 ++++ > ?2 files changed, 8 insertions(+), 0 deletions(-) Er, I need to tweak one more file. --- a/lib/Target/PowerPC/MCTargetDesc/PPCFixupKinds.h +++ b/lib/Target/PowerPC/MCTargetDesc/PPCFixupKinds.h @@ -12,6 +12,10 @@ #include "llvm/MC/MCFixup.h" +// Generated files will use "namespace PPC". To avoid symbol clash, +// undefine PPC here. PPC may be predefined on some hosts. +#undef PPC + namespace llvm { namespace PPC { enum Fixups { ...Takumi From proljc at gmail.com Fri Sep 23 01:12:55 2011 From: proljc at gmail.com (Liu) Date: Fri, 23 Sep 2011 14:12:55 +0800 Subject: [llvm-commits] [patch] add n32/64 ABI description. In-Reply-To: References: Message-ID: On Fri, Sep 23, 2011 at 10:36 AM, Akira Hatanaka wrote: > On Thu, Sep 22, 2011 at 6:48 PM, Liu wrote: >> On Fri, Sep 23, 2011 at 1:17 AM, Akira Hatanaka wrote: >>> A few comments. Please let me know if you have any questions. >>> >>> - If N64 and N32 have the same calling convention, you should define >>> just one for both (e.g. CC_MIps64). >> I'll double check this. >> >>> - Arguments passed in Integer registers shadow floating pointer >>> registers and vice verca. For example, the first doubleword is passed >>> in either $4 or $f1, the second in >>> either $5 or $f1, and so on. Probably you will need to use >>> CCAssignToRegWithShadow (please see ARMCallingConv.td). >> Thanks, I'll fix it. >> >>> - Integer arguments are all promoted to i64. >> fixed. >> >>> - i64 integer arguments should be passed in 64-bit registers (I will >>> add the register and register file definitions shortly). Also, i64 >>> return value should be in 64-bit registers. >> I'm not sure about this. Shall we need regs such as "AT_64, V0_64, V1_64..."? >> > > Yes. The definitions were added in r140366. Everything should be done. Please review again. --Liu > >>> - Arguments that cannot be passed in registers are push to the stack, >>> so you need to use ?CCAssignToStack. >> Thank you, I'll fix it soon. >> >>> >>> On Thu, Sep 22, 2011 at 12:23 AM, Liu wrote: >>>> Hi >>>> >>>> I added n32/64 ABI description for MIPS Backend. >>>> >>>> --Liu >>>> >>> >> > -------------- next part -------------- A non-text attachment was scrubbed... Name: 0001-add-n32-n64-ABI-support-to-MIPS.patch Type: text/x-patch Size: 3108 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110923/5ba22592/attachment-0001.bin From proljc at gmail.com Fri Sep 23 01:57:26 2011 From: proljc at gmail.com (Liu) Date: Fri, 23 Sep 2011 14:57:26 +0800 Subject: [llvm-commits] [patch] add n32/64 ABI description. In-Reply-To: References: Message-ID: On Fri, Sep 23, 2011 at 2:12 PM, Liu wrote: > On Fri, Sep 23, 2011 at 10:36 AM, Akira Hatanaka wrote: >> On Thu, Sep 22, 2011 at 6:48 PM, Liu wrote: >>> On Fri, Sep 23, 2011 at 1:17 AM, Akira Hatanaka wrote: >>>> A few comments. Please let me know if you have any questions. >>>> >>>> - If N64 and N32 have the same calling convention, you should define >>>> just one for both (e.g. CC_MIps64). >>> I'll double check this. >>> >>>> - Arguments passed in Integer registers shadow floating pointer >>>> registers and vice verca. For example, the first doubleword is passed >>>> in either $4 or $f1, the second in >>>> either $5 or $f1, and so on. Probably you will need to use >>>> CCAssignToRegWithShadow (please see ARMCallingConv.td). >>> Thanks, I'll fix it. >>> >>>> - Integer arguments are all promoted to i64. >>> fixed. >>> >>>> - i64 integer arguments should be passed in 64-bit registers (I will >>>> add the register and register file definitions shortly). Also, i64 >>>> return value should be in 64-bit registers. >>> I'm not sure about this. Shall we need regs such as "AT_64, V0_64, V1_64..."? >>> >> >> Yes. The definitions were added in r140366. > Everything should be done. Please review again. > > --Liu > >> >>>> - Arguments that cannot be passed in registers are push to the stack, >>>> so you need to use ?CCAssignToStack. >>> Thank you, I'll fix it soon. >>> >>>> >>>> On Thu, Sep 22, 2011 at 12:23 AM, Liu wrote: >>>>> Hi >>>>> >>>>> I added n32/64 ABI description for MIPS Backend. >>>>> >>>>> --Liu >>>>> >>>> >>> >> > I'm very sorry, last patch have two typo. This one is OK. --Liu -------------- next part -------------- A non-text attachment was scrubbed... Name: 0001-add-n32-n64-ABI-support-to-MIPS.patch Type: text/x-patch Size: 3084 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110923/44b5ed33/attachment.bin From craig.topper at gmail.com Fri Sep 23 01:57:25 2011 From: craig.topper at gmail.com (Craig Topper) Date: Fri, 23 Sep 2011 06:57:25 -0000 Subject: [llvm-commits] [llvm] r140370 - in /llvm/trunk: test/MC/Disassembler/X86/intel-syntax.txt utils/TableGen/X86DisassemblerTables.cpp utils/TableGen/X86DisassemblerTables.h utils/TableGen/X86RecognizableInstr.cpp utils/TableGen/X86RecognizableInstr.h Message-ID: <20110923065725.861542A6C12C@llvm.org> Author: ctopper Date: Fri Sep 23 01:57:25 2011 New Revision: 140370 URL: http://llvm.org/viewvc/llvm-project?rev=140370&view=rev Log: Don't allow 32-bit only instructions to be disassembled in 64-bit mode. Fixes part of PR10700. Modified: llvm/trunk/test/MC/Disassembler/X86/intel-syntax.txt llvm/trunk/utils/TableGen/X86DisassemblerTables.cpp llvm/trunk/utils/TableGen/X86DisassemblerTables.h llvm/trunk/utils/TableGen/X86RecognizableInstr.cpp llvm/trunk/utils/TableGen/X86RecognizableInstr.h Modified: llvm/trunk/test/MC/Disassembler/X86/intel-syntax.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/X86/intel-syntax.txt?rev=140370&r1=140369&r2=140370&view=diff ============================================================================== --- llvm/trunk/test/MC/Disassembler/X86/intel-syntax.txt (original) +++ llvm/trunk/test/MC/Disassembler/X86/intel-syntax.txt Fri Sep 23 01:57:25 2011 @@ -12,14 +12,11 @@ # CHECK: movsq 0x48 0xa5 -# CHECK: pop DS -0x1f +# CHECK: pop FS +0x0f 0xa1 -# CHECK: pop ES -0x07 - -# CHECK: pop SS -0x17 +# CHECK: pop GS +0x0f 0xa9 # CHECK: in AL, DX 0xec Modified: llvm/trunk/utils/TableGen/X86DisassemblerTables.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/X86DisassemblerTables.cpp?rev=140370&r1=140369&r2=140370&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/X86DisassemblerTables.cpp (original) +++ llvm/trunk/utils/TableGen/X86DisassemblerTables.cpp Fri Sep 23 01:57:25 2011 @@ -642,12 +642,16 @@ InstructionContext insnContext, uint8_t opcode, const ModRMFilter &filter, - InstrUID uid) { + InstrUID uid, + bool is32bit) { unsigned index; ContextDecision &decision = *Tables[type]; for (index = 0; index < IC_max; ++index) { + if (is32bit && inheritsFrom((InstructionContext)index, IC_64BIT)) + continue; + if (inheritsFrom((InstructionContext)index, InstructionSpecifiers[uid].insnContext)) setTableFields(decision.opcodeDecisions[index].modRMDecisions[opcode], Modified: llvm/trunk/utils/TableGen/X86DisassemblerTables.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/X86DisassemblerTables.h?rev=140370&r1=140369&r2=140370&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/X86DisassemblerTables.h (original) +++ llvm/trunk/utils/TableGen/X86DisassemblerTables.h Fri Sep 23 01:57:25 2011 @@ -260,11 +260,13 @@ /// @param filter - The ModRMFilter that decides which ModR/M byte values /// correspond to the desired instruction. /// @param uid - The unique ID of the instruction. + /// @param is32bit - Instructon is only 32-bit void setTableFields(OpcodeType type, InstructionContext insnContext, uint8_t opcode, const ModRMFilter &filter, - InstrUID uid); + InstrUID uid, + bool is32bit); /// specForUID - Returns the instruction specifier for a given unique /// instruction ID. Used when resolving collisions. Modified: llvm/trunk/utils/TableGen/X86RecognizableInstr.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/X86RecognizableInstr.cpp?rev=140370&r1=140369&r2=140370&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/X86RecognizableInstr.cpp (original) +++ llvm/trunk/utils/TableGen/X86RecognizableInstr.cpp Fri Sep 23 01:57:25 2011 @@ -231,10 +231,15 @@ HasVEX_LPrefix = has256BitOperands() || Rec->getValueAsBit("hasVEX_L"); // Check for 64-bit inst which does not require REX + Is32Bit = false; Is64Bit = false; // FIXME: Is there some better way to check for In64BitMode? std::vector Predicates = Rec->getValueAsListOfDefs("Predicates"); for (unsigned i = 0, e = Predicates.size(); i != e; ++i) { + if (Predicates[i]->getName().find("32Bit") != Name.npos) { + Is32Bit = true; + break; + } if (Predicates[i]->getName().find("64Bit") != Name.npos) { Is64Bit = true; break; @@ -947,7 +952,7 @@ insnContext(), currentOpcode, *filter, - UID); + UID, Is32Bit); Spec->modifierType = MODIFIER_OPCODE; Spec->modifierBase = opcodeToSet; @@ -957,14 +962,14 @@ insnContext(), opcodeToSet, *filter, - UID); + UID, Is32Bit); } } else { tables.setTableFields(opcodeType, insnContext(), opcodeToSet, *filter, - UID); + UID, Is32Bit); Spec->modifierType = MODIFIER_NONE; Spec->modifierBase = opcodeToSet; Modified: llvm/trunk/utils/TableGen/X86RecognizableInstr.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/X86RecognizableInstr.h?rev=140370&r1=140369&r2=140370&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/X86RecognizableInstr.h (original) +++ llvm/trunk/utils/TableGen/X86RecognizableInstr.h Fri Sep 23 01:57:25 2011 @@ -64,8 +64,10 @@ bool HasLockPrefix; /// The isCodeGenOnly filed from the record bool IsCodeGenOnly; - // Whether the instruction has the predicate "Mode64Bit" + // Whether the instruction has the predicate "In64BitMode" bool Is64Bit; + // Whether the instruction has the predicate "In32BitMode" + bool Is32Bit; /// The instruction name as listed in the tables std::string Name; From echristo at apple.com Fri Sep 23 02:03:07 2011 From: echristo at apple.com (Eric Christopher) Date: Fri, 23 Sep 2011 07:03:07 -0000 Subject: [llvm-commits] [test-suite] r140371 - in /test-suite/trunk: autoconf/configure.ac configure Message-ID: <20110923070307.591D92A6C12C@llvm.org> Author: echristo Date: Fri Sep 23 02:03:07 2011 New Revision: 140371 URL: http://llvm.org/viewvc/llvm-project?rev=140371&view=rev Log: Err... 3.0svn Modified: test-suite/trunk/autoconf/configure.ac test-suite/trunk/configure Modified: test-suite/trunk/autoconf/configure.ac URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/autoconf/configure.ac?rev=140371&r1=140370&r2=140371&view=diff ============================================================================== --- test-suite/trunk/autoconf/configure.ac (original) +++ test-suite/trunk/autoconf/configure.ac Fri Sep 23 02:03:07 2011 @@ -1,5 +1,5 @@ dnl Initialize autoconf -AC_INIT([[LLVM-TEST]],[[2.9svn]],[llvmbugs at cs.uiuc.edu]) +AC_INIT([[LLVM-TEST]],[[3.0svn]],[llvmbugs at cs.uiuc.edu]) dnl Place all of the extra autoconf files into the config subdirectory AC_CONFIG_AUX_DIR([autoconf]) Modified: test-suite/trunk/configure URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/configure?rev=140371&r1=140370&r2=140371&view=diff ============================================================================== --- test-suite/trunk/configure (original) +++ test-suite/trunk/configure Fri Sep 23 02:03:07 2011 @@ -1,6 +1,6 @@ #! /bin/sh # Guess values for system-dependent variables and create Makefiles. -# Generated by GNU Autoconf 2.60 for LLVM-TEST 2.9svn. +# Generated by GNU Autoconf 2.60 for LLVM-TEST 3.0svn. # # Report bugs to . # @@ -713,8 +713,8 @@ # Identity of this package. PACKAGE_NAME='LLVM-TEST' PACKAGE_TARNAME='-llvm-test-' -PACKAGE_VERSION='2.9svn' -PACKAGE_STRING='LLVM-TEST 2.9svn' +PACKAGE_VERSION='3.0svn' +PACKAGE_STRING='LLVM-TEST 3.0svn' PACKAGE_BUGREPORT='llvmbugs at cs.uiuc.edu' ac_unique_file="SingleSource/Benchmarks/Makefile" @@ -1402,7 +1402,7 @@ # Omit some internal or obsolete options to make the list less imposing. # This message is too long to be a string in the A/UX 3.1 sh. cat <<_ACEOF -\`configure' configures LLVM-TEST 2.9svn to adapt to many kinds of systems. +\`configure' configures LLVM-TEST 3.0svn to adapt to many kinds of systems. Usage: $0 [OPTION]... [VAR=VALUE]... @@ -1468,7 +1468,7 @@ if test -n "$ac_init_help"; then case $ac_init_help in - short | recursive ) echo "Configuration of LLVM-TEST 2.9svn:";; + short | recursive ) echo "Configuration of LLVM-TEST 3.0svn:";; esac cat <<\_ACEOF @@ -1593,7 +1593,7 @@ test -n "$ac_init_help" && exit $ac_status if $ac_init_version; then cat <<\_ACEOF -LLVM-TEST configure 2.9svn +LLVM-TEST configure 3.0svn generated by GNU Autoconf 2.60 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, @@ -1607,7 +1607,7 @@ This file contains any messages produced by compilers while running configure, to aid debugging if configure makes a mistake. -It was created by LLVM-TEST $as_me 2.9svn, which was +It was created by LLVM-TEST $as_me 3.0svn, which was generated by GNU Autoconf 2.60. Invocation command line was $ $0 $@ @@ -22445,7 +22445,7 @@ # report actual input values of CONFIG_FILES etc. instead of their # values after options handling. ac_log=" -This file was extended by LLVM-TEST $as_me 2.9svn, which was +This file was extended by LLVM-TEST $as_me 3.0svn, which was generated by GNU Autoconf 2.60. Invocation command line was CONFIG_FILES = $CONFIG_FILES @@ -22492,7 +22492,7 @@ _ACEOF cat >>$CONFIG_STATUS <<_ACEOF ac_cs_version="\\ -LLVM-TEST config.status 2.9svn +LLVM-TEST config.status 3.0svn configured by $0, generated by GNU Autoconf 2.60, with options \\"`echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" From James.Molloy at arm.com Fri Sep 23 02:09:57 2011 From: James.Molloy at arm.com (James Molloy) Date: Fri, 23 Sep 2011 08:09:57 +0100 Subject: [llvm-commits] [llvm] r140345 - in /llvm/trunk: include/llvm/MC/MCAtom.h include/llvm/MC/MCModule.h lib/MC/MCAtom.cpp lib/MC/MCModule.cpp In-Reply-To: <20110922223222.4E4922A6C12C@llvm.org> References: <20110922223222.4E4922A6C12C@llvm.org> Message-ID: Hi Owen, This looks nice. Is it meant to be a stepping-stone to linker formats such as ELF and Mach-O? If so (or even if not), why did you decide to create a new piece of nomenclature ("Atom") where words like "segment" or "section" already exist and describe the same concept? Cheers, James -----Original Message----- From: llvm-commits-bounces at cs.uiuc.edu [mailto:llvm-commits-bounces at cs.uiuc.edu] On Behalf Of Owen Anderson Sent: 22 September 2011 23:32 To: llvm-commits at cs.uiuc.edu Subject: [llvm-commits] [llvm] r140345 - in /llvm/trunk: include/llvm/MC/MCAtom.h include/llvm/MC/MCModule.h lib/MC/MCAtom.cpp lib/MC/MCModule.cpp Author: resistor Date: Thu Sep 22 17:32:22 2011 New Revision: 140345 URL: http://llvm.org/viewvc/llvm-project?rev=140345&view=rev Log: Start stubbing out MCModule and MCAtom, which provide an API for accessing the rich disassembly of a complete object or executable. These are very much a work in progress, and not really useful yet. Added: llvm/trunk/include/llvm/MC/MCAtom.h llvm/trunk/include/llvm/MC/MCModule.h llvm/trunk/lib/MC/MCAtom.cpp llvm/trunk/lib/MC/MCModule.cpp Added: llvm/trunk/include/llvm/MC/MCAtom.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCAtom.h?rev=140345&view=auto ============================================================================== --- llvm/trunk/include/llvm/MC/MCAtom.h (added) +++ llvm/trunk/include/llvm/MC/MCAtom.h Thu Sep 22 17:32:22 2011 @@ -0,0 +1,75 @@ +//===-- llvm/MC/MCAtom.h - MCAtom class ---------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains the declaration of the MCAtom class, which is used to +// represent a contiguous region in a decoded object that is uniformly data or +// instructions; +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCATOM_H +#define LLVM_MC_MCATOM_H + +#include "llvm/MC/MCInst.h" +#include "llvm/Support/DataTypes.h" +#include + +namespace llvm { + +class MCModule; + +/// MCData - An entry in a data MCAtom. +// NOTE: This may change to a more complex type in the future. +typedef uint8_t MCData; + +/// MCAtom - Represents a contiguous range of either instructions (a TextAtom) +/// or data (a DataAtom). Address ranges are expressed as _closed_ intervals. +class MCAtom { + friend class MCModule; + typedef enum { TextAtom, DataAtom } AtomType; + + AtomType Type; + MCModule *Parent; + uint64_t Begin, End; + + std::vector > Text; + std::vector Data; + + // Private constructor - only callable by MCModule + MCAtom(AtomType T, MCModule *P, uint64_t B, uint64_t E) + : Type(T), Parent(P), Begin(B), End(E) { } + +public: + bool isTextAtom() { return Type == TextAtom; } + bool isDataAtom() { return Type == DataAtom; } + + void addInst(const MCInst &I, uint64_t Address) { + assert(Type == TextAtom && "Trying to add MCInst to a non-text atom!"); + Text.push_back(std::make_pair(Address, I)); + } + + void addData(const MCData &D) { + assert(Type == DataAtom && "Trying to add MCData to a non-data atom!"); + Data.push_back(D); + } + + /// split - Splits the atom in two at a given address, which must align with + /// and instruction boundary if this is a TextAtom. Returns the newly created + /// atom representing the high part of the split. + MCAtom *split(uint64_t SplitPt); + + /// truncate - Truncates an atom so that TruncPt is the last byte address + /// contained in the atom. + void truncate(uint64_t TruncPt); +}; + +} + +#endif + Added: llvm/trunk/include/llvm/MC/MCModule.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCModule.h?rev=140345&view=auto ============================================================================== --- llvm/trunk/include/llvm/MC/MCModule.h (added) +++ llvm/trunk/include/llvm/MC/MCModule.h Thu Sep 22 17:32:22 2011 @@ -0,0 +1,58 @@ +//===-- llvm/MC/MCModule.h - MCModule class ---------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains the declaration of the MCModule class, which is used to +// represent a complete, disassembled object file or executable. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCMODULE_H +#define LLVM_MC_MCMODULE_H + +#include "llvm/ADT/DenseMap.h" +#include "llvm/ADT/IntervalMap.h" +#include "llvm/ADT/SmallPtrSet.h" +#include "llvm/Support/DataTypes.h" + +namespace llvm { + +class MCAtom; + +/// MCModule - This class represent a completely disassembled object file or +/// executable. It comprises a list of MCAtom's, and a branch target table. +/// Each atom represents a contiguous range of either instructions or data. +class MCModule { + /// AtomAllocationTracker - An MCModule owns its component MCAtom's, so it + /// must track them in order to ensure they are properly freed as atoms are + /// merged or otherwise manipulated. + SmallPtrSet AtomAllocationTracker; + + /// OffsetMap - Efficiently maps offset ranges to MCAtom's. + IntervalMap OffsetMap; + + /// BranchTargetMap - Maps offsets that are determined to be branches and + /// can be statically resolved to their target offsets. + DenseMap BranchTargetMap; + + friend class MCAtom; + + /// remap - Update the interval mapping for an MCAtom. + void remap(MCAtom *Atom, uint64_t NewBegin, uint64_t NewEnd); + +public: + MCModule(IntervalMap::Allocator &A) : OffsetMap(A) { } + + /// createAtom - Creates a new MCAtom covering the specified offset range. + MCAtom *createAtom(MCAtom::AtomType Type, uint64_t Begin, uint64_t End); +}; + +} + +#endif + Added: llvm/trunk/lib/MC/MCAtom.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCAtom.cpp?rev=140345&view=auto ============================================================================== --- llvm/trunk/lib/MC/MCAtom.cpp (added) +++ llvm/trunk/lib/MC/MCAtom.cpp Thu Sep 22 17:32:22 2011 @@ -0,0 +1,79 @@ +//===- lib/MC/MCAtom.cpp - MCAtom implementation --------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCAtom.h" +#include "llvm/MC/MCModule.h" +#include "llvm/Support/ErrorHandling.h" + +using namespace llvm; + +MCAtom *MCAtom::split(uint64_t SplitPt) { + assert((SplitPt > Begin && SplitPt <= End) && + "Splitting at point not contained in atom!"); + + // Compute the new begin/end points. + uint64_t LeftBegin = Begin; + uint64_t LeftEnd = SplitPt - 1; + uint64_t RightBegin = SplitPt; + uint64_t RightEnd = End; + + // Remap this atom to become the lower of the two new ones. + Parent->remap(this, LeftBegin, LeftEnd); + + // Create a new atom for the higher atom. + MCAtom *RightAtom = Parent->createAtom(Type, RightBegin, RightEnd); + + // Split the contents of the original atom between it and the new one. The + // precise method depends on whether this is a data or a text atom. + if (isDataAtom()) { + std::vector::iterator I = Data.begin() + (RightBegin - LeftBegin); + + assert(I != Data.end() && "Split point not found in range!"); + + std::copy(I, Data.end(), RightAtom->Data.end()); + Data.erase(I, Data.end()); + } else if (isTextAtom()) { + std::vector >::iterator I = Text.begin(); + + while (I != Text.end() && I->first < SplitPt) ++I; + + assert(I != Text.end() && "Split point not found in disassembly!"); + assert(I->first == SplitPt && + "Split point does not fall on instruction boundary!"); + + std::copy(I, Text.end(), RightAtom->Text.end()); + Text.erase(I, Text.end()); + } else + llvm_unreachable("Unknown atom type!"); + + return RightAtom; +} + +void MCAtom::truncate(uint64_t TruncPt) { + assert((TruncPt >= Begin && TruncPt < End) && + "Truncation point not contained in atom!"); + + Parent->remap(this, Begin, TruncPt); + + if (isDataAtom()) { + Data.resize(TruncPt - Begin + 1); + } else if (isTextAtom()) { + std::vector >::iterator I = Text.begin(); + + while (I != Text.end() && I->first <= TruncPt) ++I; + + assert(I != Text.end() && "Truncation point not found in disassembly!"); + assert(I->first == TruncPt+1 && + "Truncation point does not fall on instruction boundary"); + + Text.erase(I, Text.end()); + } else + llvm_unreachable("Unknown atom type!"); +} + Added: llvm/trunk/lib/MC/MCModule.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCModule.cpp?rev=140345&view=auto ============================================================================== --- llvm/trunk/lib/MC/MCModule.cpp (added) +++ llvm/trunk/lib/MC/MCModule.cpp Thu Sep 22 17:32:22 2011 @@ -0,0 +1,45 @@ +//===- lib/MC/MCModule.cpp - MCModule implementation --------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCAtom.h" +#include "llvm/MC/MCModule.h" + +using namespace llvm; + +MCAtom *MCModule::createAtom(MCAtom::AtomType Type, + uint64_t Begin, uint64_t End) { + assert(Begin < End && "Creating MCAtom with endpoints reversed?"); + + // Check for atoms already covering this range. + IntervalMap::iterator I = OffsetMap.find(Begin); + assert((!I.valid() || I.start() < End) && "Offset range already occupied!"); + + // Create the new atom and add it to our maps. + MCAtom *NewAtom = new MCAtom(Type, this, Begin, End); + AtomAllocationTracker.insert(NewAtom); + OffsetMap.insert(Begin, End, NewAtom); + return NewAtom; +} + +// remap - Update the interval mapping for an atom. +void MCModule::remap(MCAtom *Atom, uint64_t NewBegin, uint64_t NewEnd) { + // Find and erase the old mapping. + IntervalMap::iterator I = OffsetMap.find(Atom->Begin); + assert(I.valid() && "Atom offset not found in module!"); + assert(*I == Atom && "Previous atom mapping was invalid!"); + I.erase(); + + // Insert the new mapping. + OffsetMap.insert(NewBegin, NewEnd, Atom); + + // Update the atom internal bounds. + Atom->Begin = NewBegin; + Atom->End = NewEnd; +} + _______________________________________________ llvm-commits mailing list llvm-commits at cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits -- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. From resistor at mac.com Fri Sep 23 02:54:25 2011 From: resistor at mac.com (Owen Anderson) Date: Fri, 23 Sep 2011 00:54:25 -0700 Subject: [llvm-commits] [llvm] r140345 - in /llvm/trunk: include/llvm/MC/MCAtom.h include/llvm/MC/MCModule.h lib/MC/MCAtom.cpp lib/MC/MCModule.cpp In-Reply-To: References: <20110922223222.4E4922A6C12C@llvm.org> Message-ID: Hi James, This isn't actually intended as a step towards a linker format, though it does draw some inspiration from it. The intention is to provide an API for clients to access rich, whole-program disassemblies. You may have noticed Benjamin's work recently on CFG rediscovery at the MC level, as well as DWARF decoding for annotated disassembly. This is related. The term atom actually comes from the MachO linker, where it refers to relocatable regions. Here, I use it to refer to contiguous regions that are uniformly instructions, or uniformly data. Note that this does not correspond to sections/segments. It is common in Thumb1 code, for instance, to have constant pools embedded within executable code because of the limited displacements available. With Benjamin's CFG rediscovery, we will be able to distinguish those data atoms from the surrounding text atoms. That said, it may make sense for atoms to be tagged with section/segment information. I haven't really thought about that yet. --Owen On Sep 23, 2011, at 12:09 AM, James Molloy wrote: > Hi Owen, > > This looks nice. Is it meant to be a stepping-stone to linker formats such as ELF and Mach-O? > > If so (or even if not), why did you decide to create a new piece of nomenclature ("Atom") where words like "segment" or "section" already exist and describe the same concept? > > Cheers, > > James > > -----Original Message----- > From: llvm-commits-bounces at cs.uiuc.edu [mailto:llvm-commits-bounces at cs.uiuc.edu] On Behalf Of Owen Anderson > Sent: 22 September 2011 23:32 > To: llvm-commits at cs.uiuc.edu > Subject: [llvm-commits] [llvm] r140345 - in /llvm/trunk: include/llvm/MC/MCAtom.h include/llvm/MC/MCModule.h lib/MC/MCAtom.cpp lib/MC/MCModule.cpp > > Author: resistor > Date: Thu Sep 22 17:32:22 2011 > New Revision: 140345 > > URL: http://llvm.org/viewvc/llvm-project?rev=140345&view=rev > Log: > Start stubbing out MCModule and MCAtom, which provide an API for accessing the rich disassembly of a complete object or executable. > These are very much a work in progress, and not really useful yet. > > Added: > llvm/trunk/include/llvm/MC/MCAtom.h > llvm/trunk/include/llvm/MC/MCModule.h > llvm/trunk/lib/MC/MCAtom.cpp > llvm/trunk/lib/MC/MCModule.cpp > > Added: llvm/trunk/include/llvm/MC/MCAtom.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCAtom.h?rev=140345&view=auto > ============================================================================== > --- llvm/trunk/include/llvm/MC/MCAtom.h (added) > +++ llvm/trunk/include/llvm/MC/MCAtom.h Thu Sep 22 17:32:22 2011 > @@ -0,0 +1,75 @@ > +//===-- llvm/MC/MCAtom.h - MCAtom class ---------------------*- C++ -*-===// > +// > +// The LLVM Compiler Infrastructure > +// > +// This file is distributed under the University of Illinois Open Source > +// License. See LICENSE.TXT for details. > +// > +//===----------------------------------------------------------------------===// > +// > +// This file contains the declaration of the MCAtom class, which is used to > +// represent a contiguous region in a decoded object that is uniformly data or > +// instructions; > +// > +//===----------------------------------------------------------------------===// > + > +#ifndef LLVM_MC_MCATOM_H > +#define LLVM_MC_MCATOM_H > + > +#include "llvm/MC/MCInst.h" > +#include "llvm/Support/DataTypes.h" > +#include > + > +namespace llvm { > + > +class MCModule; > + > +/// MCData - An entry in a data MCAtom. > +// NOTE: This may change to a more complex type in the future. > +typedef uint8_t MCData; > + > +/// MCAtom - Represents a contiguous range of either instructions (a TextAtom) > +/// or data (a DataAtom). Address ranges are expressed as _closed_ intervals. > +class MCAtom { > + friend class MCModule; > + typedef enum { TextAtom, DataAtom } AtomType; > + > + AtomType Type; > + MCModule *Parent; > + uint64_t Begin, End; > + > + std::vector > Text; > + std::vector Data; > + > + // Private constructor - only callable by MCModule > + MCAtom(AtomType T, MCModule *P, uint64_t B, uint64_t E) > + : Type(T), Parent(P), Begin(B), End(E) { } > + > +public: > + bool isTextAtom() { return Type == TextAtom; } > + bool isDataAtom() { return Type == DataAtom; } > + > + void addInst(const MCInst &I, uint64_t Address) { > + assert(Type == TextAtom && "Trying to add MCInst to a non-text atom!"); > + Text.push_back(std::make_pair(Address, I)); > + } > + > + void addData(const MCData &D) { > + assert(Type == DataAtom && "Trying to add MCData to a non-data atom!"); > + Data.push_back(D); > + } > + > + /// split - Splits the atom in two at a given address, which must align with > + /// and instruction boundary if this is a TextAtom. Returns the newly created > + /// atom representing the high part of the split. > + MCAtom *split(uint64_t SplitPt); > + > + /// truncate - Truncates an atom so that TruncPt is the last byte address > + /// contained in the atom. > + void truncate(uint64_t TruncPt); > +}; > + > +} > + > +#endif > + > > Added: llvm/trunk/include/llvm/MC/MCModule.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCModule.h?rev=140345&view=auto > ============================================================================== > --- llvm/trunk/include/llvm/MC/MCModule.h (added) > +++ llvm/trunk/include/llvm/MC/MCModule.h Thu Sep 22 17:32:22 2011 > @@ -0,0 +1,58 @@ > +//===-- llvm/MC/MCModule.h - MCModule class ---------------------*- C++ -*-===// > +// > +// The LLVM Compiler Infrastructure > +// > +// This file is distributed under the University of Illinois Open Source > +// License. See LICENSE.TXT for details. > +// > +//===----------------------------------------------------------------------===// > +// > +// This file contains the declaration of the MCModule class, which is used to > +// represent a complete, disassembled object file or executable. > +// > +//===----------------------------------------------------------------------===// > + > +#ifndef LLVM_MC_MCMODULE_H > +#define LLVM_MC_MCMODULE_H > + > +#include "llvm/ADT/DenseMap.h" > +#include "llvm/ADT/IntervalMap.h" > +#include "llvm/ADT/SmallPtrSet.h" > +#include "llvm/Support/DataTypes.h" > + > +namespace llvm { > + > +class MCAtom; > + > +/// MCModule - This class represent a completely disassembled object file or > +/// executable. It comprises a list of MCAtom's, and a branch target table. > +/// Each atom represents a contiguous range of either instructions or data. > +class MCModule { > + /// AtomAllocationTracker - An MCModule owns its component MCAtom's, so it > + /// must track them in order to ensure they are properly freed as atoms are > + /// merged or otherwise manipulated. > + SmallPtrSet AtomAllocationTracker; > + > + /// OffsetMap - Efficiently maps offset ranges to MCAtom's. > + IntervalMap OffsetMap; > + > + /// BranchTargetMap - Maps offsets that are determined to be branches and > + /// can be statically resolved to their target offsets. > + DenseMap BranchTargetMap; > + > + friend class MCAtom; > + > + /// remap - Update the interval mapping for an MCAtom. > + void remap(MCAtom *Atom, uint64_t NewBegin, uint64_t NewEnd); > + > +public: > + MCModule(IntervalMap::Allocator &A) : OffsetMap(A) { } > + > + /// createAtom - Creates a new MCAtom covering the specified offset range. > + MCAtom *createAtom(MCAtom::AtomType Type, uint64_t Begin, uint64_t End); > +}; > + > +} > + > +#endif > + > > Added: llvm/trunk/lib/MC/MCAtom.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCAtom.cpp?rev=140345&view=auto > ============================================================================== > --- llvm/trunk/lib/MC/MCAtom.cpp (added) > +++ llvm/trunk/lib/MC/MCAtom.cpp Thu Sep 22 17:32:22 2011 > @@ -0,0 +1,79 @@ > +//===- lib/MC/MCAtom.cpp - MCAtom implementation --------------------------===// > +// > +// The LLVM Compiler Infrastructure > +// > +// This file is distributed under the University of Illinois Open Source > +// License. See LICENSE.TXT for details. > +// > +//===----------------------------------------------------------------------===// > + > +#include "llvm/MC/MCAtom.h" > +#include "llvm/MC/MCModule.h" > +#include "llvm/Support/ErrorHandling.h" > + > +using namespace llvm; > + > +MCAtom *MCAtom::split(uint64_t SplitPt) { > + assert((SplitPt > Begin && SplitPt <= End) && > + "Splitting at point not contained in atom!"); > + > + // Compute the new begin/end points. > + uint64_t LeftBegin = Begin; > + uint64_t LeftEnd = SplitPt - 1; > + uint64_t RightBegin = SplitPt; > + uint64_t RightEnd = End; > + > + // Remap this atom to become the lower of the two new ones. > + Parent->remap(this, LeftBegin, LeftEnd); > + > + // Create a new atom for the higher atom. > + MCAtom *RightAtom = Parent->createAtom(Type, RightBegin, RightEnd); > + > + // Split the contents of the original atom between it and the new one. The > + // precise method depends on whether this is a data or a text atom. > + if (isDataAtom()) { > + std::vector::iterator I = Data.begin() + (RightBegin - LeftBegin); > + > + assert(I != Data.end() && "Split point not found in range!"); > + > + std::copy(I, Data.end(), RightAtom->Data.end()); > + Data.erase(I, Data.end()); > + } else if (isTextAtom()) { > + std::vector >::iterator I = Text.begin(); > + > + while (I != Text.end() && I->first < SplitPt) ++I; > + > + assert(I != Text.end() && "Split point not found in disassembly!"); > + assert(I->first == SplitPt && > + "Split point does not fall on instruction boundary!"); > + > + std::copy(I, Text.end(), RightAtom->Text.end()); > + Text.erase(I, Text.end()); > + } else > + llvm_unreachable("Unknown atom type!"); > + > + return RightAtom; > +} > + > +void MCAtom::truncate(uint64_t TruncPt) { > + assert((TruncPt >= Begin && TruncPt < End) && > + "Truncation point not contained in atom!"); > + > + Parent->remap(this, Begin, TruncPt); > + > + if (isDataAtom()) { > + Data.resize(TruncPt - Begin + 1); > + } else if (isTextAtom()) { > + std::vector >::iterator I = Text.begin(); > + > + while (I != Text.end() && I->first <= TruncPt) ++I; > + > + assert(I != Text.end() && "Truncation point not found in disassembly!"); > + assert(I->first == TruncPt+1 && > + "Truncation point does not fall on instruction boundary"); > + > + Text.erase(I, Text.end()); > + } else > + llvm_unreachable("Unknown atom type!"); > +} > + > > Added: llvm/trunk/lib/MC/MCModule.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCModule.cpp?rev=140345&view=auto > ============================================================================== > --- llvm/trunk/lib/MC/MCModule.cpp (added) > +++ llvm/trunk/lib/MC/MCModule.cpp Thu Sep 22 17:32:22 2011 > @@ -0,0 +1,45 @@ > +//===- lib/MC/MCModule.cpp - MCModule implementation --------------------------===// > +// > +// The LLVM Compiler Infrastructure > +// > +// This file is distributed under the University of Illinois Open Source > +// License. See LICENSE.TXT for details. > +// > +//===----------------------------------------------------------------------===// > + > +#include "llvm/MC/MCAtom.h" > +#include "llvm/MC/MCModule.h" > + > +using namespace llvm; > + > +MCAtom *MCModule::createAtom(MCAtom::AtomType Type, > + uint64_t Begin, uint64_t End) { > + assert(Begin < End && "Creating MCAtom with endpoints reversed?"); > + > + // Check for atoms already covering this range. > + IntervalMap::iterator I = OffsetMap.find(Begin); > + assert((!I.valid() || I.start() < End) && "Offset range already occupied!"); > + > + // Create the new atom and add it to our maps. > + MCAtom *NewAtom = new MCAtom(Type, this, Begin, End); > + AtomAllocationTracker.insert(NewAtom); > + OffsetMap.insert(Begin, End, NewAtom); > + return NewAtom; > +} > + > +// remap - Update the interval mapping for an atom. > +void MCModule::remap(MCAtom *Atom, uint64_t NewBegin, uint64_t NewEnd) { > + // Find and erase the old mapping. > + IntervalMap::iterator I = OffsetMap.find(Atom->Begin); > + assert(I.valid() && "Atom offset not found in module!"); > + assert(*I == Atom && "Previous atom mapping was invalid!"); > + I.erase(); > + > + // Insert the new mapping. > + OffsetMap.insert(NewBegin, NewEnd, Atom); > + > + // Update the atom internal bounds. > + Atom->Begin = NewBegin; > + Atom->End = NewEnd; > +} > + > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > > -- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. > From James.Molloy at arm.com Fri Sep 23 02:57:44 2011 From: James.Molloy at arm.com (James Molloy) Date: Fri, 23 Sep 2011 08:57:44 +0100 Subject: [llvm-commits] [llvm] r140345 - in /llvm/trunk: include/llvm/MC/MCAtom.h include/llvm/MC/MCModule.h lib/MC/MCAtom.cpp lib/MC/MCModule.cpp In-Reply-To: References: <20110922223222.4E4922A6C12C@llvm.org> Message-ID: Hi Owen, Thanks for the explanation - it looks like really useful and interesting work! Cheers, James -----Original Message----- From: Owen Anderson [mailto:resistor at mac.com] Sent: 23 September 2011 08:54 To: James Molloy Cc: llvm-commits at cs.uiuc.edu Subject: Re: [llvm-commits] [llvm] r140345 - in /llvm/trunk: include/llvm/MC/MCAtom.h include/llvm/MC/MCModule.h lib/MC/MCAtom.cpp lib/MC/MCModule.cpp Hi James, This isn't actually intended as a step towards a linker format, though it does draw some inspiration from it. The intention is to provide an API for clients to access rich, whole-program disassemblies. You may have noticed Benjamin's work recently on CFG rediscovery at the MC level, as well as DWARF decoding for annotated disassembly. This is related. The term atom actually comes from the MachO linker, where it refers to relocatable regions. Here, I use it to refer to contiguous regions that are uniformly instructions, or uniformly data. Note that this does not correspond to sections/segments. It is common in Thumb1 code, for instance, to have constant pools embedded within executable code because of the limited displacements available. With Benjamin's CFG rediscovery, we will be able to distinguish those data atoms from the surrounding text atoms. That said, it may make sense for atoms to be tagged with section/segment information. I haven't really thought about that yet. --Owen On Sep 23, 2011, at 12:09 AM, James Molloy wrote: > Hi Owen, > > This looks nice. Is it meant to be a stepping-stone to linker formats such as ELF and Mach-O? > > If so (or even if not), why did you decide to create a new piece of nomenclature ("Atom") where words like "segment" or "section" already exist and describe the same concept? > > Cheers, > > James > > -----Original Message----- > From: llvm-commits-bounces at cs.uiuc.edu [mailto:llvm-commits-bounces at cs.uiuc.edu] On Behalf Of Owen Anderson > Sent: 22 September 2011 23:32 > To: llvm-commits at cs.uiuc.edu > Subject: [llvm-commits] [llvm] r140345 - in /llvm/trunk: include/llvm/MC/MCAtom.h include/llvm/MC/MCModule.h lib/MC/MCAtom.cpp lib/MC/MCModule.cpp > > Author: resistor > Date: Thu Sep 22 17:32:22 2011 > New Revision: 140345 > > URL: http://llvm.org/viewvc/llvm-project?rev=140345&view=rev > Log: > Start stubbing out MCModule and MCAtom, which provide an API for accessing the rich disassembly of a complete object or executable. > These are very much a work in progress, and not really useful yet. > > Added: > llvm/trunk/include/llvm/MC/MCAtom.h > llvm/trunk/include/llvm/MC/MCModule.h > llvm/trunk/lib/MC/MCAtom.cpp > llvm/trunk/lib/MC/MCModule.cpp > > Added: llvm/trunk/include/llvm/MC/MCAtom.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCAtom.h?rev=140345&view=auto > ============================================================================== > --- llvm/trunk/include/llvm/MC/MCAtom.h (added) > +++ llvm/trunk/include/llvm/MC/MCAtom.h Thu Sep 22 17:32:22 2011 > @@ -0,0 +1,75 @@ > +//===-- llvm/MC/MCAtom.h - MCAtom class ---------------------*- C++ -*-===// > +// > +// The LLVM Compiler Infrastructure > +// > +// This file is distributed under the University of Illinois Open Source > +// License. See LICENSE.TXT for details. > +// > +//===----------------------------------------------------------------------===// > +// > +// This file contains the declaration of the MCAtom class, which is used to > +// represent a contiguous region in a decoded object that is uniformly data or > +// instructions; > +// > +//===----------------------------------------------------------------------===// > + > +#ifndef LLVM_MC_MCATOM_H > +#define LLVM_MC_MCATOM_H > + > +#include "llvm/MC/MCInst.h" > +#include "llvm/Support/DataTypes.h" > +#include > + > +namespace llvm { > + > +class MCModule; > + > +/// MCData - An entry in a data MCAtom. > +// NOTE: This may change to a more complex type in the future. > +typedef uint8_t MCData; > + > +/// MCAtom - Represents a contiguous range of either instructions (a TextAtom) > +/// or data (a DataAtom). Address ranges are expressed as _closed_ intervals. > +class MCAtom { > + friend class MCModule; > + typedef enum { TextAtom, DataAtom } AtomType; > + > + AtomType Type; > + MCModule *Parent; > + uint64_t Begin, End; > + > + std::vector > Text; > + std::vector Data; > + > + // Private constructor - only callable by MCModule > + MCAtom(AtomType T, MCModule *P, uint64_t B, uint64_t E) > + : Type(T), Parent(P), Begin(B), End(E) { } > + > +public: > + bool isTextAtom() { return Type == TextAtom; } > + bool isDataAtom() { return Type == DataAtom; } > + > + void addInst(const MCInst &I, uint64_t Address) { > + assert(Type == TextAtom && "Trying to add MCInst to a non-text atom!"); > + Text.push_back(std::make_pair(Address, I)); > + } > + > + void addData(const MCData &D) { > + assert(Type == DataAtom && "Trying to add MCData to a non-data atom!"); > + Data.push_back(D); > + } > + > + /// split - Splits the atom in two at a given address, which must align with > + /// and instruction boundary if this is a TextAtom. Returns the newly created > + /// atom representing the high part of the split. > + MCAtom *split(uint64_t SplitPt); > + > + /// truncate - Truncates an atom so that TruncPt is the last byte address > + /// contained in the atom. > + void truncate(uint64_t TruncPt); > +}; > + > +} > + > +#endif > + > > Added: llvm/trunk/include/llvm/MC/MCModule.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCModule.h?rev=140345&view=auto > ============================================================================== > --- llvm/trunk/include/llvm/MC/MCModule.h (added) > +++ llvm/trunk/include/llvm/MC/MCModule.h Thu Sep 22 17:32:22 2011 > @@ -0,0 +1,58 @@ > +//===-- llvm/MC/MCModule.h - MCModule class ---------------------*- C++ -*-===// > +// > +// The LLVM Compiler Infrastructure > +// > +// This file is distributed under the University of Illinois Open Source > +// License. See LICENSE.TXT for details. > +// > +//===----------------------------------------------------------------------===// > +// > +// This file contains the declaration of the MCModule class, which is used to > +// represent a complete, disassembled object file or executable. > +// > +//===----------------------------------------------------------------------===// > + > +#ifndef LLVM_MC_MCMODULE_H > +#define LLVM_MC_MCMODULE_H > + > +#include "llvm/ADT/DenseMap.h" > +#include "llvm/ADT/IntervalMap.h" > +#include "llvm/ADT/SmallPtrSet.h" > +#include "llvm/Support/DataTypes.h" > + > +namespace llvm { > + > +class MCAtom; > + > +/// MCModule - This class represent a completely disassembled object file or > +/// executable. It comprises a list of MCAtom's, and a branch target table. > +/// Each atom represents a contiguous range of either instructions or data. > +class MCModule { > + /// AtomAllocationTracker - An MCModule owns its component MCAtom's, so it > + /// must track them in order to ensure they are properly freed as atoms are > + /// merged or otherwise manipulated. > + SmallPtrSet AtomAllocationTracker; > + > + /// OffsetMap - Efficiently maps offset ranges to MCAtom's. > + IntervalMap OffsetMap; > + > + /// BranchTargetMap - Maps offsets that are determined to be branches and > + /// can be statically resolved to their target offsets. > + DenseMap BranchTargetMap; > + > + friend class MCAtom; > + > + /// remap - Update the interval mapping for an MCAtom. > + void remap(MCAtom *Atom, uint64_t NewBegin, uint64_t NewEnd); > + > +public: > + MCModule(IntervalMap::Allocator &A) : OffsetMap(A) { } > + > + /// createAtom - Creates a new MCAtom covering the specified offset range. > + MCAtom *createAtom(MCAtom::AtomType Type, uint64_t Begin, uint64_t End); > +}; > + > +} > + > +#endif > + > > Added: llvm/trunk/lib/MC/MCAtom.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCAtom.cpp?rev=140345&view=auto > ============================================================================== > --- llvm/trunk/lib/MC/MCAtom.cpp (added) > +++ llvm/trunk/lib/MC/MCAtom.cpp Thu Sep 22 17:32:22 2011 > @@ -0,0 +1,79 @@ > +//===- lib/MC/MCAtom.cpp - MCAtom implementation --------------------------===// > +// > +// The LLVM Compiler Infrastructure > +// > +// This file is distributed under the University of Illinois Open Source > +// License. See LICENSE.TXT for details. > +// > +//===----------------------------------------------------------------------===// > + > +#include "llvm/MC/MCAtom.h" > +#include "llvm/MC/MCModule.h" > +#include "llvm/Support/ErrorHandling.h" > + > +using namespace llvm; > + > +MCAtom *MCAtom::split(uint64_t SplitPt) { > + assert((SplitPt > Begin && SplitPt <= End) && > + "Splitting at point not contained in atom!"); > + > + // Compute the new begin/end points. > + uint64_t LeftBegin = Begin; > + uint64_t LeftEnd = SplitPt - 1; > + uint64_t RightBegin = SplitPt; > + uint64_t RightEnd = End; > + > + // Remap this atom to become the lower of the two new ones. > + Parent->remap(this, LeftBegin, LeftEnd); > + > + // Create a new atom for the higher atom. > + MCAtom *RightAtom = Parent->createAtom(Type, RightBegin, RightEnd); > + > + // Split the contents of the original atom between it and the new one. The > + // precise method depends on whether this is a data or a text atom. > + if (isDataAtom()) { > + std::vector::iterator I = Data.begin() + (RightBegin - LeftBegin); > + > + assert(I != Data.end() && "Split point not found in range!"); > + > + std::copy(I, Data.end(), RightAtom->Data.end()); > + Data.erase(I, Data.end()); > + } else if (isTextAtom()) { > + std::vector >::iterator I = Text.begin(); > + > + while (I != Text.end() && I->first < SplitPt) ++I; > + > + assert(I != Text.end() && "Split point not found in disassembly!"); > + assert(I->first == SplitPt && > + "Split point does not fall on instruction boundary!"); > + > + std::copy(I, Text.end(), RightAtom->Text.end()); > + Text.erase(I, Text.end()); > + } else > + llvm_unreachable("Unknown atom type!"); > + > + return RightAtom; > +} > + > +void MCAtom::truncate(uint64_t TruncPt) { > + assert((TruncPt >= Begin && TruncPt < End) && > + "Truncation point not contained in atom!"); > + > + Parent->remap(this, Begin, TruncPt); > + > + if (isDataAtom()) { > + Data.resize(TruncPt - Begin + 1); > + } else if (isTextAtom()) { > + std::vector >::iterator I = Text.begin(); > + > + while (I != Text.end() && I->first <= TruncPt) ++I; > + > + assert(I != Text.end() && "Truncation point not found in disassembly!"); > + assert(I->first == TruncPt+1 && > + "Truncation point does not fall on instruction boundary"); > + > + Text.erase(I, Text.end()); > + } else > + llvm_unreachable("Unknown atom type!"); > +} > + > > Added: llvm/trunk/lib/MC/MCModule.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCModule.cpp?rev=140345&view=auto > ============================================================================== > --- llvm/trunk/lib/MC/MCModule.cpp (added) > +++ llvm/trunk/lib/MC/MCModule.cpp Thu Sep 22 17:32:22 2011 > @@ -0,0 +1,45 @@ > +//===- lib/MC/MCModule.cpp - MCModule implementation --------------------------===// > +// > +// The LLVM Compiler Infrastructure > +// > +// This file is distributed under the University of Illinois Open Source > +// License. See LICENSE.TXT for details. > +// > +//===----------------------------------------------------------------------===// > + > +#include "llvm/MC/MCAtom.h" > +#include "llvm/MC/MCModule.h" > + > +using namespace llvm; > + > +MCAtom *MCModule::createAtom(MCAtom::AtomType Type, > + uint64_t Begin, uint64_t End) { > + assert(Begin < End && "Creating MCAtom with endpoints reversed?"); > + > + // Check for atoms already covering this range. > + IntervalMap::iterator I = OffsetMap.find(Begin); > + assert((!I.valid() || I.start() < End) && "Offset range already occupied!"); > + > + // Create the new atom and add it to our maps. > + MCAtom *NewAtom = new MCAtom(Type, this, Begin, End); > + AtomAllocationTracker.insert(NewAtom); > + OffsetMap.insert(Begin, End, NewAtom); > + return NewAtom; > +} > + > +// remap - Update the interval mapping for an atom. > +void MCModule::remap(MCAtom *Atom, uint64_t NewBegin, uint64_t NewEnd) { > + // Find and erase the old mapping. > + IntervalMap::iterator I = OffsetMap.find(Atom->Begin); > + assert(I.valid() && "Atom offset not found in module!"); > + assert(*I == Atom && "Previous atom mapping was invalid!"); > + I.erase(); > + > + // Insert the new mapping. > + OffsetMap.insert(NewBegin, NewEnd, Atom); > + > + // Update the atom internal bounds. > + Atom->Begin = NewBegin; > + Atom->End = NewEnd; > +} > + > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > > -- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. > -- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. From proljc at gmail.com Fri Sep 23 03:58:08 2011 From: proljc at gmail.com (Liu) Date: Fri, 23 Sep 2011 16:58:08 +0800 Subject: [llvm-commits] [patch] add n32/64 ABI description. In-Reply-To: <20110923082646.GA26832@cs.nctu.edu.tw> References: <20110923082646.GA26832@cs.nctu.edu.tw> Message-ID: On Fri, Sep 23, 2011 at 4:26 PM, ?????? wrote: >> >>> - Arguments passed in Integer registers shadow floating pointer >> >>> registers and vice verca. For example, the first doubleword is passed >> >>> in either $4 or $f1, the second in >> >>> either $5 or $f1, and so on. Probably you will need to use >> >>> CCAssignToRegWithShadow (please see ARMCallingConv.td). > > What "Arguments passed in Integer registers shadow floating pointer > registers" means? Does it mean if we use use $4, then $f1 cannot be > used? n23/64 can only hold 8 args in regs. so you can't use all 8 gprs and 8fprs. > > Thanks! > > Regards, > chenwj > > -- > Wei-Ren Chen (??????) > Computer Systems Lab, Institute of Information Science, > Academia Sinica, Taiwan (R.O.C.) > Tel:886-2-2788-3799 #1667 > From nadav.rotem at intel.com Fri Sep 23 04:33:24 2011 From: nadav.rotem at intel.com (Nadav Rotem) Date: Fri, 23 Sep 2011 09:33:24 -0000 Subject: [llvm-commits] [llvm] r140372 - in /llvm/trunk/lib/CodeGen/SelectionDAG: LegalizeIntegerTypes.cpp LegalizeTypes.h Message-ID: <20110923093324.8794C2A6C12C@llvm.org> Author: nadav Date: Fri Sep 23 04:33:24 2011 New Revision: 140372 URL: http://llvm.org/viewvc/llvm-project?rev=140372&view=rev Log: Vector-Select: Address one of the problems in pr10902. Add handling for the integer-promotion of CONCAT_VECTORS. Test: test/CodeGen/X86/widen_shuffle-1.ll This patch fixes the above tests (when running in with -promote-elements). Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp?rev=140372&r1=140371&r2=140372&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Fri Sep 23 04:33:24 2011 @@ -86,6 +86,8 @@ Res = PromoteIntRes_BUILD_VECTOR(N); break; case ISD::SCALAR_TO_VECTOR: Res = PromoteIntRes_SCALAR_TO_VECTOR(N); break; + case ISD::CONCAT_VECTORS: + Res = PromoteIntRes_CONCAT_VECTORS(N); break; case ISD::SIGN_EXTEND: case ISD::ZERO_EXTEND: @@ -2916,6 +2918,46 @@ return DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NOutVT, Op); } +SDValue DAGTypeLegalizer::PromoteIntRes_CONCAT_VECTORS(SDNode *N) { + DebugLoc dl = N->getDebugLoc(); + + SDValue Op0 = N->getOperand(1); + SDValue Op1 = N->getOperand(1); + assert(Op0.getValueType() == Op1.getValueType() && + "Invalid input vector types"); + + EVT OutVT = N->getValueType(0); + EVT NOutVT = TLI.getTypeToTransformTo(*DAG.getContext(), OutVT); + assert(NOutVT.isVector() && "This type must be promoted to a vector type"); + + EVT OutElemTy = NOutVT.getVectorElementType(); + + unsigned NumElem0 = Op0.getValueType().getVectorNumElements(); + unsigned NumElem1 = Op1.getValueType().getVectorNumElements(); + unsigned NumOutElem = NOutVT.getVectorNumElements(); + assert(NumElem0 + NumElem1 == NumOutElem && + "Invalid number of incoming elements"); + + // Take the elements from the first vector. + SmallVector Ops(NumOutElem); + for (unsigned i = 0; i < NumElem0; ++i) { + SDValue Ext = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, + Op0.getValueType().getScalarType(), Op0, + DAG.getIntPtrConstant(i)); + Ops[i] = DAG.getNode(ISD::ANY_EXTEND, dl, OutElemTy, Ext); + } + + // Take the elements from the second vector + for (unsigned i = 0; i < NumElem1; ++i) { + SDValue Ext = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, + Op1.getValueType().getScalarType(), Op1, + DAG.getIntPtrConstant(i)); + Ops[i + NumElem0] = DAG.getNode(ISD::ANY_EXTEND, dl, OutElemTy, Ext); + } + + return DAG.getNode(ISD::BUILD_VECTOR, dl, NOutVT, &Ops[0], Ops.size()); +} + SDValue DAGTypeLegalizer::PromoteIntRes_INSERT_VECTOR_ELT(SDNode *N) { EVT OutVT = N->getValueType(0); EVT NOutVT = TLI.getTypeToTransformTo(*DAG.getContext(), OutVT); Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h?rev=140372&r1=140371&r2=140372&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h Fri Sep 23 04:33:24 2011 @@ -224,6 +224,7 @@ SDValue PromoteIntRes_BUILD_VECTOR(SDNode *N); SDValue PromoteIntRes_SCALAR_TO_VECTOR(SDNode *N); SDValue PromoteIntRes_INSERT_VECTOR_ELT(SDNode *N); + SDValue PromoteIntRes_CONCAT_VECTORS(SDNode *N); SDValue PromoteIntRes_BITCAST(SDNode *N); SDValue PromoteIntRes_BSWAP(SDNode *N); SDValue PromoteIntRes_BUILD_PAIR(SDNode *N); From proljc at gmail.com Fri Sep 23 05:02:15 2011 From: proljc at gmail.com (Liu) Date: Fri, 23 Sep 2011 18:02:15 +0800 Subject: [llvm-commits] [patch] PTXInstrInfo.td and PTXIntrinsicInstrInfo.td, 80 columns. Message-ID: Hi A lot of 80 columns in these two files. And another 80 columns: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20110919/128570.html I'm not sure about the file 'generate-register-td.py', so I didn't change it. --Liu -------------- next part -------------- A non-text attachment was scrubbed... Name: 0002-PTXInstrInfo.td-PTXIntrinsicInstrInfo.td-80-columns.patch Type: text/x-patch Size: 23136 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110923/6c56deaf/attachment-0001.bin From proljc at gmail.com Fri Sep 23 07:57:15 2011 From: proljc at gmail.com (Liu) Date: Fri, 23 Sep 2011 20:57:15 +0800 Subject: [llvm-commits] [patch] ARM Backend 80 columns. Message-ID: Hi all ARM Backend 80 columns. --Liu -------------- next part -------------- A non-text attachment was scrubbed... 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Message-ID: Hi all Blackfin Backend 80 columns. --Liu -------------- next part -------------- A non-text attachment was scrubbed... Name: 0001-Blackfin-Backend-80-columns.patch Type: text/x-patch Size: 1132 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110923/84f1d59e/attachment.bin From proljc at gmail.com Fri Sep 23 07:59:15 2011 From: proljc at gmail.com (Liu) Date: Fri, 23 Sep 2011 20:59:15 +0800 Subject: [llvm-commits] [patch] CellSPU Backend 80 columns. Message-ID: Hi all CellSPU Backend 80 columns. --Liu -------------- next part -------------- A non-text attachment was scrubbed... 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Message-ID: Hi all MSP430 Backend 80 columns. --Liu -------------- next part -------------- A non-text attachment was scrubbed... Name: 0001-MSP430-Backend-80-columns.patch Type: text/x-patch Size: 2016 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110923/549efde4/attachment.bin From proljc at gmail.com Fri Sep 23 08:01:21 2011 From: proljc at gmail.com (Liu) Date: Fri, 23 Sep 2011 21:01:21 +0800 Subject: [llvm-commits] [patch] PowerPC Backend 80 columns. Message-ID: Hi all PowerPC Backend 80 columns. --Liu -------------- next part -------------- A non-text attachment was scrubbed... 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Message-ID: Hi all XCore Backend 80 columns. --Liu -------------- next part -------------- A non-text attachment was scrubbed... Name: 0001-XCore-Backend-80-columns.patch Type: text/x-patch Size: 4741 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20110923/976b3ff5/attachment.bin From baldrick at free.fr Fri Sep 23 08:59:22 2011 From: baldrick at free.fr (Duncan Sands) Date: Fri, 23 Sep 2011 13:59:22 -0000 Subject: [llvm-commits] [llvm] r140373 - in /llvm/trunk/lib/CodeGen/SelectionDAG: LegalizeFloatTypes.cpp LegalizeIntegerTypes.cpp LegalizeTypes.cpp LegalizeTypes.h LegalizeTypesGeneric.cpp LegalizeVectorTypes.cpp Message-ID: <20110923135922.D629A2A6C12C@llvm.org> Author: baldrick Date: Fri Sep 23 08:59:22 2011 New Revision: 140373 URL: http://llvm.org/viewvc/llvm-project?rev=140373&view=rev Log: Tweak the handling of MERGE_VALUES nodes: remove the need for DecomposeMERGE_VALUES to "know" that results are legalized in a particular order, by passing it the number of the result being legalized (the type legalization core provides this, it just needs to be passed on). Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp?rev=140373&r1=140372&r2=140373&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp Fri Sep 23 08:59:22 2011 @@ -55,7 +55,7 @@ #endif llvm_unreachable("Do not know how to soften the result of this operator!"); - case ISD::MERGE_VALUES:R = SoftenFloatRes_MERGE_VALUES(N); break; + case ISD::MERGE_VALUES:R = SoftenFloatRes_MERGE_VALUES(N, ResNo); break; case ISD::BITCAST: R = SoftenFloatRes_BITCAST(N); break; case ISD::BUILD_PAIR: R = SoftenFloatRes_BUILD_PAIR(N); break; case ISD::ConstantFP: @@ -108,8 +108,9 @@ return BitConvertToInteger(N->getOperand(0)); } -SDValue DAGTypeLegalizer::SoftenFloatRes_MERGE_VALUES(SDNode *N) { - SDValue Op = DecomposeMERGE_VALUES(N); +SDValue DAGTypeLegalizer::SoftenFloatRes_MERGE_VALUES(SDNode *N, + unsigned ResNo) { + SDValue Op = DisintegrateMERGE_VALUES(N, ResNo); return BitConvertToInteger(Op); } @@ -837,7 +838,7 @@ case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break; case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break; - case ISD::MERGE_VALUES: ExpandRes_MERGE_VALUES(N, Lo, Hi); break; + case ISD::MERGE_VALUES: ExpandRes_MERGE_VALUES(N, ResNo, Lo, Hi); break; case ISD::BITCAST: ExpandRes_BITCAST(N, Lo, Hi); break; case ISD::BUILD_PAIR: ExpandRes_BUILD_PAIR(N, Lo, Hi); break; case ISD::EXTRACT_ELEMENT: ExpandRes_EXTRACT_ELEMENT(N, Lo, Hi); break; Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp?rev=140373&r1=140372&r2=140373&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Fri Sep 23 08:59:22 2011 @@ -48,7 +48,7 @@ N->dump(&DAG); dbgs() << "\n"; #endif llvm_unreachable("Do not know how to promote this operator!"); - case ISD::MERGE_VALUES:Res = PromoteIntRes_MERGE_VALUES(N); break; + case ISD::MERGE_VALUES:Res = PromoteIntRes_MERGE_VALUES(N, ResNo); break; case ISD::AssertSext: Res = PromoteIntRes_AssertSext(N); break; case ISD::AssertZext: Res = PromoteIntRes_AssertZext(N); break; case ISD::BITCAST: Res = PromoteIntRes_BITCAST(N); break; @@ -143,8 +143,9 @@ SetPromotedInteger(SDValue(N, ResNo), Res); } -SDValue DAGTypeLegalizer::PromoteIntRes_MERGE_VALUES(SDNode *N) { - SDValue Op = DecomposeMERGE_VALUES(N); +SDValue DAGTypeLegalizer::PromoteIntRes_MERGE_VALUES(SDNode *N, + unsigned ResNo) { + SDValue Op = DisintegrateMERGE_VALUES(N, ResNo); return GetPromotedInteger(Op); } @@ -1077,7 +1078,7 @@ #endif llvm_unreachable("Do not know how to expand the result of this operator!"); - case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, Lo, Hi); break; + case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, ResNo, Lo, Hi); break; case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break; case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break; case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break; @@ -1600,9 +1601,9 @@ ReplaceValueWith(SDValue(N, 1), Hi.getValue(1)); } -void DAGTypeLegalizer::ExpandIntRes_MERGE_VALUES(SDNode *N, +void DAGTypeLegalizer::ExpandIntRes_MERGE_VALUES(SDNode *N, unsigned ResNo, SDValue &Lo, SDValue &Hi) { - SDValue Res = DecomposeMERGE_VALUES(N); + SDValue Res = DisintegrateMERGE_VALUES(N, ResNo); SplitInteger(Res, Lo, Hi); } Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp?rev=140373&r1=140372&r2=140373&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp Fri Sep 23 08:59:22 2011 @@ -946,24 +946,11 @@ return true; } -SDValue DAGTypeLegalizer::DecomposeMERGE_VALUES(SDNode *N) { - unsigned i; - // A MERGE_VALUES node can produce any number of values. - // Replace the results other than the first illegal one with the - // corresponding input operands. - for (i = 0; isTypeLegal(N->getValueType(i)); ++i) - ReplaceValueWith(SDValue(N, i), SDValue(N->getOperand(i))); - - // The first illegal result is the one which needs to be handled; - // type legalization legalizes values in order. - SDValue IllegalValue = N->getOperand(i); - - // Continue replacing results. - unsigned e = N->getNumValues(); - for (++i; i != e; ++i) - ReplaceValueWith(SDValue(N, i), SDValue(N->getOperand(i))); - - return IllegalValue; +SDValue DAGTypeLegalizer::DisintegrateMERGE_VALUES(SDNode *N, unsigned ResNo) { + for (unsigned i = 0, e = N->getNumValues(); i != e; ++i) + if (i != ResNo) + ReplaceValueWith(SDValue(N, i), SDValue(N->getOperand(i))); + return SDValue(N, ResNo); } /// GetSplitDestVTs - Compute the VTs needed for the low/hi parts of a type Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h?rev=140373&r1=140372&r2=140373&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h Fri Sep 23 08:59:22 2011 @@ -149,10 +149,10 @@ bool CustomLowerNode(SDNode *N, EVT VT, bool LegalizeResult); bool CustomWidenLowerNode(SDNode *N, EVT VT); - // DecomposeMERGE_VALUES takes a SDNode and returns the first - // illegal value. All other results are replaced with the - // corresponding input operand. - SDValue DecomposeMERGE_VALUES(SDNode *N); + /// DisintegrateMERGE_VALUES - Replace each result of the given MERGE_VALUES + /// node with the corresponding input operand, except for the result 'ResNo', + /// which is returned. + SDValue DisintegrateMERGE_VALUES(SDNode *N, unsigned ResNo); SDValue GetVectorElementPointer(SDValue VecPtr, EVT EltVT, SDValue Index); SDValue JoinIntegers(SDValue Lo, SDValue Hi); @@ -213,7 +213,7 @@ // Integer Result Promotion. void PromoteIntegerResult(SDNode *N, unsigned ResNo); - SDValue PromoteIntRes_MERGE_VALUES(SDNode *N); + SDValue PromoteIntRes_MERGE_VALUES(SDNode *N, unsigned ResNo); SDValue PromoteIntRes_AssertSext(SDNode *N); SDValue PromoteIntRes_AssertZext(SDNode *N); SDValue PromoteIntRes_Atomic0(AtomicSDNode *N); @@ -302,7 +302,8 @@ // Integer Result Expansion. void ExpandIntegerResult(SDNode *N, unsigned ResNo); - void ExpandIntRes_MERGE_VALUES (SDNode *N, SDValue &Lo, SDValue &Hi); + void ExpandIntRes_MERGE_VALUES (SDNode *N, unsigned ResNo, + SDValue &Lo, SDValue &Hi); void ExpandIntRes_ANY_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi); void ExpandIntRes_AssertSext (SDNode *N, SDValue &Lo, SDValue &Hi); void ExpandIntRes_AssertZext (SDNode *N, SDValue &Lo, SDValue &Hi); @@ -379,7 +380,7 @@ // Result Float to Integer Conversion. void SoftenFloatResult(SDNode *N, unsigned OpNo); - SDValue SoftenFloatRes_MERGE_VALUES(SDNode *N); + SDValue SoftenFloatRes_MERGE_VALUES(SDNode *N, unsigned ResNo); SDValue SoftenFloatRes_BITCAST(SDNode *N); SDValue SoftenFloatRes_BUILD_PAIR(SDNode *N); SDValue SoftenFloatRes_ConstantFP(ConstantFPSDNode *N); @@ -506,7 +507,7 @@ // Vector Result Scalarization: <1 x ty> -> ty. void ScalarizeVectorResult(SDNode *N, unsigned OpNo); - SDValue ScalarizeVecRes_MERGE_VALUES(SDNode *N); + SDValue ScalarizeVecRes_MERGE_VALUES(SDNode *N, unsigned ResNo); SDValue ScalarizeVecRes_BinOp(SDNode *N); SDValue ScalarizeVecRes_UnaryOp(SDNode *N); SDValue ScalarizeVecRes_InregOp(SDNode *N); @@ -601,7 +602,7 @@ // Widen Vector Result Promotion. void WidenVectorResult(SDNode *N, unsigned ResNo); - SDValue WidenVecRes_MERGE_VALUES(SDNode* N); + SDValue WidenVecRes_MERGE_VALUES(SDNode* N, unsigned ResNo); SDValue WidenVecRes_BITCAST(SDNode* N); SDValue WidenVecRes_BUILD_VECTOR(SDNode* N); SDValue WidenVecRes_CONCAT_VECTORS(SDNode* N); @@ -698,7 +699,8 @@ void GetPairElements(SDValue Pair, SDValue &Lo, SDValue &Hi); // Generic Result Splitting. - void SplitRes_MERGE_VALUES(SDNode *N, SDValue &Lo, SDValue &Hi); + void SplitRes_MERGE_VALUES(SDNode *N, unsigned ResNo, + SDValue &Lo, SDValue &Hi); void SplitRes_SELECT (SDNode *N, SDValue &Lo, SDValue &Hi); void SplitRes_SELECT_CC (SDNode *N, SDValue &Lo, SDValue &Hi); void SplitRes_UNDEF (SDNode *N, SDValue &Lo, SDValue &Hi); @@ -720,7 +722,8 @@ } // Generic Result Expansion. - void ExpandRes_MERGE_VALUES (SDNode *N, SDValue &Lo, SDValue &Hi); + void ExpandRes_MERGE_VALUES (SDNode *N, unsigned ResNo, + SDValue &Lo, SDValue &Hi); void ExpandRes_BITCAST (SDNode *N, SDValue &Lo, SDValue &Hi); void ExpandRes_BUILD_PAIR (SDNode *N, SDValue &Lo, SDValue &Hi); void ExpandRes_EXTRACT_ELEMENT (SDNode *N, SDValue &Lo, SDValue &Hi); Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp?rev=140373&r1=140372&r2=140373&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp Fri Sep 23 08:59:22 2011 @@ -31,9 +31,9 @@ // These routines assume that the Lo/Hi part is stored first in memory on // little/big-endian machines, followed by the Hi/Lo part. This means that // they cannot be used as is on vectors, for which Lo is always stored first. -void DAGTypeLegalizer::ExpandRes_MERGE_VALUES(SDNode *N, +void DAGTypeLegalizer::ExpandRes_MERGE_VALUES(SDNode *N, unsigned ResNo, SDValue &Lo, SDValue &Hi) { - SDValue Op = DecomposeMERGE_VALUES(N); + SDValue Op = DisintegrateMERGE_VALUES(N, ResNo); GetExpandedOp(Op, Lo, Hi); } @@ -431,9 +431,9 @@ // bytes; for integers and floats it is Lo first if and only if the machine is // little-endian). -void DAGTypeLegalizer::SplitRes_MERGE_VALUES(SDNode *N, +void DAGTypeLegalizer::SplitRes_MERGE_VALUES(SDNode *N, unsigned ResNo, SDValue &Lo, SDValue &Hi) { - SDValue Op = DecomposeMERGE_VALUES(N); + SDValue Op = DisintegrateMERGE_VALUES(N, ResNo); GetSplitOp(Op, Lo, Hi); } Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp?rev=140373&r1=140372&r2=140373&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp Fri Sep 23 08:59:22 2011 @@ -47,7 +47,7 @@ report_fatal_error("Do not know how to scalarize the result of this " "operator!\n"); - case ISD::MERGE_VALUES: R = ScalarizeVecRes_MERGE_VALUES(N); break; + case ISD::MERGE_VALUES: R = ScalarizeVecRes_MERGE_VALUES(N, ResNo);break; case ISD::BITCAST: R = ScalarizeVecRes_BITCAST(N); break; case ISD::BUILD_VECTOR: R = N->getOperand(0); break; case ISD::CONVERT_RNDSAT: R = ScalarizeVecRes_CONVERT_RNDSAT(N); break; @@ -129,8 +129,9 @@ LHS.getValueType(), LHS, RHS); } -SDValue DAGTypeLegalizer::ScalarizeVecRes_MERGE_VALUES(SDNode *N) { - SDValue Op = DecomposeMERGE_VALUES(N); +SDValue DAGTypeLegalizer::ScalarizeVecRes_MERGE_VALUES(SDNode *N, + unsigned ResNo) { + SDValue Op = DisintegrateMERGE_VALUES(N, ResNo); return GetScalarizedVector(Op); } @@ -414,7 +415,7 @@ #endif llvm_unreachable("Do not know how to split the result of this operator!"); - case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, Lo, Hi); break; + case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, ResNo, Lo, Hi); break; case ISD::VSELECT: case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break; case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break; @@ -1227,7 +1228,7 @@ #endif llvm_unreachable("Do not know how to widen the result of this operator!"); - case ISD::MERGE_VALUES: Res = WidenVecRes_MERGE_VALUES(N); break; + case ISD::MERGE_VALUES: Res = WidenVecRes_MERGE_VALUES(N, ResNo); break; case ISD::BITCAST: Res = WidenVecRes_BITCAST(N); break; case ISD::BUILD_VECTOR: Res = WidenVecRes_BUILD_VECTOR(N); break; case ISD::CONCAT_VECTORS: Res = WidenVecRes_CONCAT_VECTORS(N); break; @@ -1576,9 +1577,8 @@ WidenVT, WidenLHS, DAG.getValueType(ExtVT)); } -SDValue DAGTypeLegalizer::WidenVecRes_MERGE_VALUES(SDNode *N) -{ - SDValue WidenVec = DecomposeMERGE_VALUES(N); +SDValue DAGTypeLegalizer::WidenVecRes_MERGE_VALUES(SDNode *N, unsigned ResNo) { + SDValue WidenVec = DisintegrateMERGE_VALUES(N, ResNo); return GetWidenedVector(WidenVec); } From justin.holewinski at gmail.com Fri Sep 23 09:18:19 2011 From: justin.holewinski at gmail.com (Justin Holewinski) Date: Fri, 23 Sep 2011 14:18:19 -0000 Subject: [llvm-commits] [llvm] r140374 - /llvm/trunk/lib/Target/PTX/PTXMFInfoExtract.cpp Message-ID: <20110923141819.B78412A6C12C@llvm.org> Author: jholewinski Date: Fri Sep 23 09:18:19 2011 New Revision: 140374 URL: http://llvm.org/viewvc/llvm-project?rev=140374&view=rev Log: PTX: Cleanup unused code in the PTXMFInfoExtract pass Modified: llvm/trunk/lib/Target/PTX/PTXMFInfoExtract.cpp Modified: llvm/trunk/lib/Target/PTX/PTXMFInfoExtract.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXMFInfoExtract.cpp?rev=140374&r1=140373&r2=140374&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXMFInfoExtract.cpp (original) +++ llvm/trunk/lib/Target/PTX/PTXMFInfoExtract.cpp Fri Sep 23 09:18:19 2011 @@ -52,37 +52,6 @@ PTXMachineFunctionInfo *MFI = MF.getInfo(); MachineRegisterInfo &MRI = MF.getRegInfo(); - DEBUG(dbgs() << "******** PTX FUNCTION LOCAL VAR REG DEF ********\n"); - - DEBUG(dbgs() - << "PTX::NoRegister == " << PTX::NoRegister << "\n" - << "PTX::NUM_TARGET_REGS == " << PTX::NUM_TARGET_REGS << "\n"); - - DEBUG(for (unsigned reg = PTX::NoRegister + 1; - reg < PTX::NUM_TARGET_REGS; ++reg) - if (MRI.isPhysRegUsed(reg)) - dbgs() << "Used Reg: " << reg << "\n";); - - // FIXME: This is a slow linear scanning - for (unsigned reg = PTX::NoRegister + 1; reg < PTX::NUM_TARGET_REGS; ++reg) - if (MRI.isPhysRegUsed(reg) && - //!MFI->isRetReg(reg) && - (MFI->isKernel() || !MFI->isArgReg(reg))) - MFI->addLocalVarReg(reg); - - // Notify MachineFunctionInfo that I've done adding local var reg - MFI->doneAddLocalVar(); - - DEBUG(for (PTXMachineFunctionInfo::reg_iterator - i = MFI->argRegBegin(), e = MFI->argRegEnd(); - i != e; ++i) - dbgs() << "Arg Reg: " << *i << "\n";); - - DEBUG(for (PTXMachineFunctionInfo::reg_iterator - i = MFI->localVarRegBegin(), e = MFI->localVarRegEnd(); - i != e; ++i) - dbgs() << "Local Var Reg: " << *i << "\n";); - // Generate list of all virtual registers used in this function for (unsigned i = 0; i < MRI.getNumVirtRegs(); ++i) { unsigned Reg = TargetRegisterInfo::index2VirtReg(i); From justin.holewinski at gmail.com Fri Sep 23 09:18:22 2011 From: justin.holewinski at gmail.com (Justin Holewinski) Date: Fri, 23 Sep 2011 14:18:22 -0000 Subject: [llvm-commits] [llvm] r140375 - in /llvm/trunk/lib/Target/PTX: CMakeLists.txt PTXAsmPrinter.cpp PTXISelLowering.cpp PTXInstrInfo.td PTXMachineFunctionInfo.h PTXParamManager.cpp PTXParamManager.h Message-ID: <20110923141822.9FC092A6C12C@llvm.org> Author: jholewinski Date: Fri Sep 23 09:18:22 2011 New Revision: 140375 URL: http://llvm.org/viewvc/llvm-project?rev=140375&view=rev Log: PTX: Generalize handling of .param types Added: llvm/trunk/lib/Target/PTX/PTXParamManager.cpp llvm/trunk/lib/Target/PTX/PTXParamManager.h Modified: llvm/trunk/lib/Target/PTX/CMakeLists.txt llvm/trunk/lib/Target/PTX/PTXAsmPrinter.cpp llvm/trunk/lib/Target/PTX/PTXISelLowering.cpp llvm/trunk/lib/Target/PTX/PTXInstrInfo.td llvm/trunk/lib/Target/PTX/PTXMachineFunctionInfo.h Modified: llvm/trunk/lib/Target/PTX/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/CMakeLists.txt?rev=140375&r1=140374&r2=140375&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/CMakeLists.txt (original) +++ llvm/trunk/lib/Target/PTX/CMakeLists.txt Fri Sep 23 09:18:22 2011 @@ -15,6 +15,7 @@ PTXFrameLowering.cpp PTXMCAsmStreamer.cpp PTXMFInfoExtract.cpp + PTXParamManager.cpp PTXRegAlloc.cpp PTXRegisterInfo.cpp PTXSubtarget.cpp Modified: llvm/trunk/lib/Target/PTX/PTXAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXAsmPrinter.cpp?rev=140375&r1=140374&r2=140375&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/PTX/PTXAsmPrinter.cpp Fri Sep 23 09:18:22 2011 @@ -16,6 +16,7 @@ #include "PTX.h" #include "PTXMachineFunctionInfo.h" +#include "PTXParamManager.h" #include "PTXRegisterInfo.h" #include "PTXTargetMachine.h" #include "llvm/DerivedTypes.h" @@ -435,7 +436,9 @@ void PTXAsmPrinter::printParamOperand(const MachineInstr *MI, int opNum, raw_ostream &OS, const char *Modifier) { - OS << PARAM_PREFIX << (int) MI->getOperand(opNum).getImm() + 1; + const PTXMachineFunctionInfo *MFI = MI->getParent()->getParent()-> + getInfo(); + OS << MFI->getParamManager().getParamName(MI->getOperand(opNum).getImm()); } void PTXAsmPrinter::printReturnOperand(const MachineInstr *MI, int opNum, @@ -562,6 +565,7 @@ } const PTXMachineFunctionInfo *MFI = MF->getInfo(); + const PTXParamManager &PM = MFI->getParamManager(); const bool isKernel = MFI->isKernel(); const PTXSubtarget& ST = TM.getSubtarget(); const MachineRegisterInfo& MRI = MF->getRegInfo(); @@ -572,10 +576,18 @@ if (!isKernel) { decl += " ("; - if (ST.useParamSpaceForDeviceArgs() && MFI->getRetParamSize() != 0) { - decl += ".param .b"; - decl += utostr(MFI->getRetParamSize()); - decl += " __ret"; + if (ST.useParamSpaceForDeviceArgs()) { + for (PTXParamManager::param_iterator i = PM.ret_begin(), e = PM.ret_end(), + b = i; i != e; ++i) { + if (i != b) { + decl += ", "; + } + + decl += ".param .b"; + decl += utostr(PM.getParamSize(*i)); + decl += " "; + decl += PM.getParamName(*i); + } } else { for (PTXMachineFunctionInfo::ret_iterator i = MFI->retRegBegin(), e = MFI->retRegEnd(), b = i; @@ -602,18 +614,16 @@ // Print parameters if (isKernel || ST.useParamSpaceForDeviceArgs()) { - for (PTXMachineFunctionInfo::argparam_iterator - i = MFI->argParamBegin(), e = MFI->argParamEnd(), b = i; - i != e; ++i) { + for (PTXParamManager::param_iterator i = PM.arg_begin(), e = PM.arg_end(), + b = i; i != e; ++i) { if (i != b) { decl += ", "; } decl += ".param .b"; - decl += utostr(*i); + decl += utostr(PM.getParamSize(*i)); decl += " "; - decl += PARAM_PREFIX; - decl += utostr(++cnt); + decl += PM.getParamName(*i); } } else { for (PTXMachineFunctionInfo::reg_iterator Modified: llvm/trunk/lib/Target/PTX/PTXISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXISelLowering.cpp?rev=140375&r1=140374&r2=140375&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXISelLowering.cpp (original) +++ llvm/trunk/lib/Target/PTX/PTXISelLowering.cpp Fri Sep 23 09:18:22 2011 @@ -199,6 +199,7 @@ MachineFunction &MF = DAG.getMachineFunction(); const PTXSubtarget& ST = getTargetMachine().getSubtarget(); PTXMachineFunctionInfo *MFI = MF.getInfo(); + PTXParamManager &PM = MFI->getParamManager(); switch (CallConv) { default: @@ -221,8 +222,10 @@ assert((!MFI->isKernel() || Ins[i].VT != MVT::i1) && "Kernels cannot take pred operands"); + unsigned ParamSize = Ins[i].VT.getStoreSizeInBits(); + unsigned Param = PM.addArgumentParam(ParamSize); SDValue ArgValue = DAG.getNode(PTXISD::LOAD_PARAM, dl, Ins[i].VT, Chain, - DAG.getTargetConstant(i, MVT::i32)); + DAG.getTargetConstant(Param, MVT::i32)); InVals.push_back(ArgValue); // Instead of storing a physical register in our argument list, we just @@ -322,6 +325,7 @@ MachineFunction& MF = DAG.getMachineFunction(); PTXMachineFunctionInfo *MFI = MF.getInfo(); + PTXParamManager &PM = MFI->getParamManager(); SDValue Flag; @@ -336,13 +340,15 @@ assert(Outs.size() < 2 && "Device functions can return at most one value"); if (Outs.size() == 1) { - unsigned Size = OutVals[0].getValueType().getSizeInBits(); - SDValue Index = DAG.getTargetConstant(MFI->getNextParam(Size), MVT::i32); + unsigned ParamSize = OutVals[0].getValueType().getSizeInBits(); + unsigned Param = PM.addReturnParam(ParamSize); + SDValue ParamIndex = DAG.getTargetConstant(Param, MVT::i32); Chain = DAG.getNode(PTXISD::STORE_PARAM, dl, MVT::Other, Chain, - Index, OutVals[0]); + ParamIndex, OutVals[0]); + //Flag = Chain.getValue(1); - MFI->setRetParamSize(Outs[0].VT.getStoreSizeInBits()); + //MFI->setRetParamSize(Outs[0].VT.getStoreSizeInBits()); } } else { //SmallVector RVLocs; Modified: llvm/trunk/lib/Target/PTX/PTXInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXInstrInfo.td?rev=140375&r1=140374&r2=140375&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXInstrInfo.td (original) +++ llvm/trunk/lib/Target/PTX/PTXInstrInfo.td Fri Sep 23 09:18:22 2011 @@ -873,22 +873,22 @@ "ld.param.f64\t$d, [$a]", [(set RegF64:$d, (PTXloadparam timm:$a))]>; - def STpiPred : InstPTX<(outs), (ins MEMret:$d, RegPred:$a), + def STpiPred : InstPTX<(outs), (ins MEMpi:$d, RegPred:$a), "st.param.pred\t[$d], $a", [(PTXstoreparam timm:$d, RegPred:$a)]>; - def STpiU16 : InstPTX<(outs), (ins MEMret:$d, RegI16:$a), + def STpiU16 : InstPTX<(outs), (ins MEMpi:$d, RegI16:$a), "st.param.u16\t[$d], $a", [(PTXstoreparam timm:$d, RegI16:$a)]>; - def STpiU32 : InstPTX<(outs), (ins MEMret:$d, RegI32:$a), + def STpiU32 : InstPTX<(outs), (ins MEMpi:$d, RegI32:$a), "st.param.u32\t[$d], $a", [(PTXstoreparam timm:$d, RegI32:$a)]>; - def STpiU64 : InstPTX<(outs), (ins MEMret:$d, RegI64:$a), + def STpiU64 : InstPTX<(outs), (ins MEMpi:$d, RegI64:$a), "st.param.u64\t[$d], $a", [(PTXstoreparam timm:$d, RegI64:$a)]>; - def STpiF32 : InstPTX<(outs), (ins MEMret:$d, RegF32:$a), + def STpiF32 : InstPTX<(outs), (ins MEMpi:$d, RegF32:$a), "st.param.f32\t[$d], $a", [(PTXstoreparam timm:$d, RegF32:$a)]>; - def STpiF64 : InstPTX<(outs), (ins MEMret:$d, RegF64:$a), + def STpiF64 : InstPTX<(outs), (ins MEMpi:$d, RegF64:$a), "st.param.f64\t[$d], $a", [(PTXstoreparam timm:$d, RegF64:$a)]>; } Modified: llvm/trunk/lib/Target/PTX/PTXMachineFunctionInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXMachineFunctionInfo.h?rev=140375&r1=140374&r2=140375&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXMachineFunctionInfo.h (original) +++ llvm/trunk/lib/Target/PTX/PTXMachineFunctionInfo.h Fri Sep 23 09:18:22 2011 @@ -15,6 +15,7 @@ #define PTX_MACHINE_FUNCTION_INFO_H #include "PTX.h" +#include "PTXParamManager.h" #include "PTXRegisterInfo.h" #include "llvm/ADT/DenseMap.h" #include "llvm/ADT/DenseSet.h" @@ -48,6 +49,8 @@ unsigned retParamSize; + PTXParamManager ParamManager; + public: PTXMachineFunctionInfo(MachineFunction &MF) : is_kernel(false), reg_ret(PTX::NoRegister), _isDoneAddArg(false) { @@ -61,6 +64,9 @@ retParamSize = 0; } + PTXParamManager& getParamManager() { return ParamManager; } + const PTXParamManager& getParamManager() const { return ParamManager; } + void setKernel(bool _is_kernel=true) { is_kernel = _is_kernel; } Added: llvm/trunk/lib/Target/PTX/PTXParamManager.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXParamManager.cpp?rev=140375&view=auto ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXParamManager.cpp (added) +++ llvm/trunk/lib/Target/PTX/PTXParamManager.cpp Fri Sep 23 09:18:22 2011 @@ -0,0 +1,73 @@ +//===- PTXParamManager.cpp - Manager for .param variables -------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements the PTXParamManager class. +// +//===----------------------------------------------------------------------===// + +#include "PTX.h" +#include "PTXParamManager.h" +#include "llvm/ADT/StringExtras.h" + +using namespace llvm; + +PTXParamManager::PTXParamManager() { +} + +unsigned PTXParamManager::addArgumentParam(unsigned Size) { + PTXParam Param; + Param.Type = PTX_PARAM_TYPE_ARGUMENT; + Param.Size = Size; + + std::string Name; + Name = "__param_"; + Name += utostr(ArgumentParams.size()+1); + Param.Name = Name; + + unsigned Index = AllParams.size(); + AllParams[Index] = Param; + ArgumentParams.insert(Index); + + return Index; +} + +unsigned PTXParamManager::addReturnParam(unsigned Size) { + PTXParam Param; + Param.Type = PTX_PARAM_TYPE_RETURN; + Param.Size = Size; + + std::string Name; + Name = "__ret_"; + Name += utostr(ReturnParams.size()+1); + Param.Name = Name; + + unsigned Index = AllParams.size(); + AllParams[Index] = Param; + ReturnParams.insert(Index); + + return Index; +} + +unsigned PTXParamManager::addLocalParam(unsigned Size) { + PTXParam Param; + Param.Type = PTX_PARAM_TYPE_LOCAL; + Param.Size = Size; + + std::string Name; + Name = "__localparam_"; + Name += utostr(LocalParams.size()+1); + Param.Name = Name; + + unsigned Index = AllParams.size(); + AllParams[Index] = Param; + LocalParams.insert(Index); + + return Index; +} + Added: llvm/trunk/lib/Target/PTX/PTXParamManager.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXParamManager.h?rev=140375&view=auto ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXParamManager.h (added) +++ llvm/trunk/lib/Target/PTX/PTXParamManager.h Fri Sep 23 09:18:22 2011 @@ -0,0 +1,86 @@ +//===- PTXParamManager.h - Manager for .param variables ----------*- C++ -*-==// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines the PTXParamManager class, which manages all defined .param +// variables for a particular function. +// +//===----------------------------------------------------------------------===// + +#ifndef PTX_PARAM_MANAGER_H +#define PTX_PARAM_MANAGER_H + +#include "llvm/ADT/DenseMap.h" +#include "llvm/ADT/DenseSet.h" + +namespace llvm { + +/// PTXParamManager - This class manages all .param variables defined for a +/// particular function. +class PTXParamManager { +private: + + /// PTXParamType - Type of a .param variable + enum PTXParamType { + PTX_PARAM_TYPE_ARGUMENT, + PTX_PARAM_TYPE_RETURN, + PTX_PARAM_TYPE_LOCAL + }; + + /// PTXParam - Definition of a PTX .param variable + struct PTXParam { + PTXParamType Type; + unsigned Size; + std::string Name; + }; + + DenseMap AllParams; + DenseSet ArgumentParams; + DenseSet ReturnParams; + DenseSet LocalParams; + +public: + + typedef DenseSet::const_iterator param_iterator; + + PTXParamManager(); + + param_iterator arg_begin() const { return ArgumentParams.begin(); } + param_iterator arg_end() const { return ArgumentParams.end(); } + param_iterator ret_begin() const { return ReturnParams.begin(); } + param_iterator ret_end() const { return ReturnParams.end(); } + param_iterator local_begin() const { return LocalParams.begin(); } + param_iterator local_end() const { return LocalParams.end(); } + + /// addArgumentParam - Returns a new .param used as an argument. + unsigned addArgumentParam(unsigned Size); + + /// addReturnParam - Returns a new .param used as a return argument. + unsigned addReturnParam(unsigned Size); + + /// addLocalParam - Returns a new .param used as a local .param variable. + unsigned addLocalParam(unsigned Size); + + /// getParamName - Returns the name of the parameter as a string. + std::string getParamName(unsigned Param) const { + assert(AllParams.count(Param) == 1 && "Param has not been defined!"); + return AllParams.lookup(Param).Name; + } + + /// getParamSize - Returns the size of the parameter in bits. + unsigned getParamSize(unsigned Param) const { + assert(AllParams.count(Param) == 1 && "Param has not been defined!"); + return AllParams.lookup(Param).Size; + } + +}; + +} + +#endif + From justin.holewinski at gmail.com Fri Sep 23 09:18:24 2011 From: justin.holewinski at gmail.com (Justin Holewinski) Date: Fri, 23 Sep 2011 14:18:24 -0000 Subject: [llvm-commits] [llvm] r140376 - in /llvm/trunk/lib/Target/PTX: PTXInstrInfo.td PTXIntrinsicInstrInfo.td Message-ID: <20110923141824.E8E472A6C12C@llvm.org> Author: jholewinski Date: Fri Sep 23 09:18:24 2011 New Revision: 140376 URL: http://llvm.org/viewvc/llvm-project?rev=140376&view=rev Log: [PATCH 2/2] PTXInstrInfo.td PTXIntrinsicInstrInfo.td 80 columns >From 5936c03172e251f12a0332d1033de5718e6e2091 Mon Sep 17 00:00:00 2001 --- lib/Target/PTX/PTXInstrInfo.td | 165 ++++++++++++++++++++---------- lib/Target/PTX/PTXIntrinsicInstrInfo.td | 88 +++++++++++------ 2 files changed, 167 insertions(+), 86 deletions(-) Modified: llvm/trunk/lib/Target/PTX/PTXInstrInfo.td llvm/trunk/lib/Target/PTX/PTXIntrinsicInstrInfo.td Modified: llvm/trunk/lib/Target/PTX/PTXInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXInstrInfo.td?rev=140376&r1=140375&r2=140376&view=diff ============================================================================== --- llvm/trunk/lib/Target/PTX/PTXInstrInfo.td (original) +++ llvm/trunk/lib/Target/PTX/PTXInstrInfo.td Fri Sep 23 09:18:24 2011 @@ -404,53 +404,73 @@ def rr_and_r : InstPTX<(outs RegPred:$p), (ins RC:$a, RC:$b, RegPred:$c), - !strconcat("setp.", cmpstr, ".and.", regclsname, "\t$p, $a, $b, $c"), + !strconcat("setp.", cmpstr, ".and.", regclsname, + "\t$p, $a, $b, $c"), [(set RegPred:$p, (and (setcc RC:$a, RC:$b, cmp), RegPred:$c))]>; def ri_and_r : InstPTX<(outs RegPred:$p), (ins RC:$a, immcls:$b, RegPred:$c), - !strconcat("setp.", cmpstr, ".and.", regclsname, "\t$p, $a, $b, $c"), - [(set RegPred:$p, (and (setcc RC:$a, imm:$b, cmp), RegPred:$c))]>; + !strconcat("setp.", cmpstr, ".and.", regclsname, + "\t$p, $a, $b, $c"), + [(set RegPred:$p, (and (setcc RC:$a, imm:$b, cmp), + RegPred:$c))]>; def rr_or_r : InstPTX<(outs RegPred:$p), (ins RC:$a, RC:$b, RegPred:$c), - !strconcat("setp.", cmpstr, ".or.", regclsname, "\t$p, $a, $b, $c"), + !strconcat("setp.", cmpstr, ".or.", regclsname, + "\t$p, $a, $b, $c"), [(set RegPred:$p, (or (setcc RC:$a, RC:$b, cmp), RegPred:$c))]>; def ri_or_r : InstPTX<(outs RegPred:$p), (ins RC:$a, immcls:$b, RegPred:$c), - !strconcat("setp.", cmpstr, ".or.", regclsname, "\t$p, $a, $b, $c"), + !strconcat("setp.", cmpstr, ".or.", regclsname, + "\t$p, $a, $b, $c"), [(set RegPred:$p, (or (setcc RC:$a, imm:$b, cmp), RegPred:$c))]>; def rr_xor_r : InstPTX<(outs RegPred:$p), (ins RC:$a, RC:$b, RegPred:$c), - !strconcat("setp.", cmpstr, ".xor.", regclsname, "\t$p, $a, $b, $c"), + !strconcat("setp.", cmpstr, ".xor.", regclsname, + "\t$p, $a, $b, $c"), [(set RegPred:$p, (xor (setcc RC:$a, RC:$b, cmp), RegPred:$c))]>; def ri_xor_r : InstPTX<(outs RegPred:$p), (ins RC:$a, immcls:$b, RegPred:$c), - !strconcat("setp.", cmpstr,
    TimeMander HallSide Room #1Side Room #2
    MediaTalk
    - 12:00 + [ Slides ] - Welcome and refreshments + + Handling Multi-Versioning in LLVM: Code Tracking and Cloning
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    - 13:00 + [ Slides ] - Handling Multi-Versioning in LLVM: Code Tracking and Cloning
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