[LLVMbugs] [Bug 8637] New: ARM backend produces AAPCS-incompatible code

bugzilla-daemon at llvm.org bugzilla-daemon at llvm.org
Wed Nov 17 09:34:40 CST 2010


http://llvm.org/bugs/show_bug.cgi?id=8637

           Summary: ARM backend produces AAPCS-incompatible code
           Product: new-bugs
           Version: trunk
          Platform: PC
        OS/Version: Linux
            Status: NEW
          Severity: release blocker
          Priority: P
         Component: new bugs
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: yarogami at gmail.com
                CC: llvmbugs at cs.uiuc.edu


Created an attachment (id=5792)
 --> (http://llvm.org/bugs/attachment.cgi?id=5792)
The ARM assembly file

Compiling the following C program for arm produces a binary that prints "0.0":

//test.c
#include <stdio.h>
int main() {
  printf("%f\n", 4.6);
  return 0;
}

x86_64$ clang -S -emit-llvm -o test.ll test.c
x86_64$ llc -march=arm -mcpu=cortex-a8 -O0 -o test.s test.ll
x86_64$ arm-linux-gnueabi-gcc-cvs -mcpu=cortex-a8 -mfpu=neon -o test test.s

arm$ ./test
0.000000

x86_64-scratchbox2$ sb2 ./test
0.000000


Clang and LLVM are fresh (r119494), but this happens also in the 2.8 release.
I'm using a cross-compiling gcc 4.6.0 (cvs) for assembling and linking.

Manually changing the "vmov    r1, r2, d16" to "vmov    r2, r3, d16" yields a
working arm-binary (see attached .s file). This is the instruction that brings
the double argument of printf into the argument registers. The AAPCS states
that double precision floats are 8-byte aligned, and should be passed in a
register pair starting with an even register (AAPCS 5.5 Parameter Passing: "A
double-word aligned type will always start in an even-numbered core register,
or at a double-word aligned address on the stack even if it is not the first
member of an aggregate."). It seems that llc disregards this.

The same thing happens with -O1, -O2 and -O3 (for llc). However, if I manually
add alignstack(4) to main() in the .ll file (while not manually tinkering with
the .s file), things go well for some reason. Or if I manually change the "sub
sp, sp, #12" to "sub sp, sp, #16", and leave the double argument in {r1,r2}. 
So maybe this is some stack alignment problem?

Perhaps this is related to bug 8040?

More info:

x86_64$ arm-linux-gnueabi-gcc-cvs -v
Using built-in specs.
COLLECT_GCC=arm-linux-gnueabi-gcc-cvs
COLLECT_LTO_WRAPPER=/usr/local/libexec/gcc/arm-linux-gnueabi/4.6.0/lto-wrapper
Target: arm-linux-gnueabi
Configured with: ../configure --prefix=/usr/local
--program-prefix=arm-linux-gnueabi- --program-suffix=-cvs
--target=arm-linux-gnueabi --enable-languages=c,c++
Thread model: posix
gcc version 4.6.0 20101110 (experimental) (GCC)

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