[LLVMdev] Proposal for atomic and synchronization instructions
sabre at nondot.org
Tue Jul 10 13:57:17 CDT 2007
On Mon, 9 Jul 2007, John Criswell wrote:
>> Comments are more than welcome, especially suggestions for
>> improvement. I hope this provides a sound background and a good
>> starting place for bringing these features to LLVM. Many thanks also
>> go to Reid who has helped tremendously with putting this together, and
>> several of the people at Aerospace who helped in the research phase.
> This looks good; this is basically what we came up with for the SVA-OS work.
> Some comments:
> 1) You may want to consider adding atomic load-<bitwise operation>-store
> instructions in addition to load-<add/subtract> instructions. The Linux
Yep, this is also important for supporting the GCC synch builtins:
despite the description, these are not itanium specific.
We will want to support these with GCC 4.2 to support OpenMP.
> 2) You need a strategy for handling architectures that can't handle
> atomic operations on certain LLVM data types. For example, 64 bit
> 3) You say that your operations work on all first class LLVM data
> types. The LLVM vector type is considered a first class type. Should
> LLVM support atomic vector operations?
Yep :), potentially through spinlocking.
> 5) With the addition of membar instructions, it may be time to re-think
> what the LLVM volatile keyword means. Currently, volatile prevents
The volatile marker and synchronization are two different things. Please
don't mess with volatile :)
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