[LLVMdev] Forcing basic blocks to end with no more than one branch instruction?
Daniel M Gessel
gessel at apple.com
Wed Oct 15 13:38:00 CDT 2008
I'm analyzing the basic blocks of MachineInstructions that LLVM
generates for my TargetMachine to try to reconstruct high-level flow
I misunderstood the isTerminator property of an instruction to mean
that it had to be at the end of a basic block, but now I've seen
blocks that end with a conditional branch followed by an unconditional
I'm sure this depends somewhat on my target, but can there be an
arbitrary number of conditional branches before that last branch? How
about before a return?
Before I dive in and generalize my analysis (probably only a minor
pain), is there any way I can get LLVM to generate BBs that are
constrained to use only one terminator instruction?
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