[LLVMdev] TableGen Enhancement Feasibility
dag at cray.com
Tue Apr 7 10:03:26 CDT 2009
On Tuesday 07 April 2009 01:18, someguy wrote:
> Can you give an example of where you would use such a feature?
> It seems entirely too abstract (at least to me) at the moment.
Basically I wanted to pass the various prefix encoding classes (XS, XD, etc.)
down into generic SIMD multiclasses so that we could write rr / rm patterns
once and reuse them with different prefix encoding base classes for the
various x86 SIMD instruction sets.
These prefix bits are reused in AVX and I found myself duplicating all of the
SIMD boilerplate for AVX that already exists for SSE simply because the
prefix encoding classes are hard-coded into the SSE classes.
The way I'm going to do this is define some global prefix bits<> and pass
those instead. I'll use these just for AVX initially but we can move SSE over
to them and share code going forward.
More information about the LLVMdev